Project Combine

Contents:

  • Xilinx FPGAs
  • SiliconBlue FPGAs
  • Xilinx XC9500, XC9500XL, XC9500XV CPLDs
  • Xilinx XPLA3 CPLDs
  • Xilinx Coolrunner II CPLDs
  • Digilent Adept Programmers
    • Introduction, general protocol
    • DMGT: Management subsystem
    • DJTG: JTAG controller subsystem
    • DPIO: simple GPIO subsystem
    • DEPP: parallel port subsystem
    • DSPI: SPI controller subsystem
    • Devices
Project Combine
  • Digilent Adept Programmers
  • View page source

Digilent Adept Programmers

Contents:

  • Introduction, general protocol
  • DMGT: Management subsystem
  • DJTG: JTAG controller subsystem
  • DPIO: simple GPIO subsystem
  • DEPP: parallel port subsystem
  • DSPI: SPI controller subsystem
  • Devices
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