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Block RAM

Tile EBR

Cells: 9

Bel EBR0

ecp4 EBR bel EBR0
PinDirectionWires
ADA0inputTCELL0:IMUX_C2
ADA1inputTCELL0:IMUX_C3
ADA10inputTCELL1:IMUX_C0
ADA11inputTCELL1:IMUX_C1
ADA12inputTCELL1:IMUX_C6
ADA13inputTCELL1:IMUX_C7
ADA2inputTCELL0:IMUX_C0
ADA3inputTCELL0:IMUX_C1
ADA4inputTCELL0:IMUX_C6
ADA5inputTCELL0:IMUX_C7
ADA6inputTCELL0:IMUX_C4
ADA7inputTCELL0:IMUX_C5
ADA8inputTCELL1:IMUX_C2
ADA9inputTCELL1:IMUX_C3
ADB0inputTCELL0:IMUX_A6
ADB1inputTCELL0:IMUX_A7
ADB10inputTCELL1:IMUX_A4
ADB11inputTCELL1:IMUX_A5
ADB12inputTCELL1:IMUX_A2
ADB13inputTCELL1:IMUX_A3
ADB2inputTCELL0:IMUX_A4
ADB3inputTCELL0:IMUX_A5
ADB4inputTCELL0:IMUX_A2
ADB5inputTCELL0:IMUX_A3
ADB6inputTCELL0:IMUX_A0
ADB7inputTCELL0:IMUX_A1
ADB8inputTCELL1:IMUX_A6
ADB9inputTCELL1:IMUX_A7
AEoutputTCELL1:OUT_OFX1
AFoutputTCELL0:OUT_OFX1
CEAinputTCELL0:IMUX_CE1
CEBinputTCELL1:IMUX_CE1
CLKAinputTCELL0:IMUX_CLK0_DELAY
CLKBinputTCELL1:IMUX_CLK0_DELAY
CSA0inputTCELL0:IMUX_CE2
CSA1inputTCELL0:IMUX_CE3
CSA2inputTCELL1:IMUX_CE3
CSB0inputTCELL1:IMUX_CE2
CSB1inputTCELL2:IMUX_CE2
CSB2inputTCELL2:IMUX_CE3
DIA0inputTCELL0:IMUX_D0
DIA1inputTCELL0:IMUX_D1
DIA10inputTCELL1:IMUX_D2
DIA11inputTCELL1:IMUX_D3
DIA12inputTCELL1:IMUX_D4
DIA13inputTCELL1:IMUX_D5
DIA14inputTCELL1:IMUX_D6
DIA15inputTCELL1:IMUX_D7
DIA16inputTCELL2:IMUX_D0
DIA17inputTCELL2:IMUX_D1
DIA2inputTCELL0:IMUX_D2
DIA3inputTCELL0:IMUX_D3
DIA4inputTCELL0:IMUX_D4
DIA5inputTCELL0:IMUX_D5
DIA6inputTCELL0:IMUX_D6
DIA7inputTCELL0:IMUX_D7
DIA8inputTCELL1:IMUX_D0
DIA9inputTCELL1:IMUX_D1
DIB0inputTCELL0:IMUX_B4
DIB1inputTCELL0:IMUX_B5
DIB10inputTCELL1:IMUX_B6
DIB11inputTCELL1:IMUX_B7
DIB12inputTCELL1:IMUX_B0
DIB13inputTCELL1:IMUX_B1
DIB14inputTCELL1:IMUX_B2
DIB15inputTCELL1:IMUX_B3
DIB16inputTCELL2:IMUX_B4
DIB17inputTCELL2:IMUX_B5
DIB2inputTCELL0:IMUX_B6
DIB3inputTCELL0:IMUX_B7
DIB4inputTCELL0:IMUX_B0
DIB5inputTCELL0:IMUX_B1
DIB6inputTCELL0:IMUX_B2
DIB7inputTCELL0:IMUX_B3
DIB8inputTCELL1:IMUX_B4
DIB9inputTCELL1:IMUX_B5
DOA0outputTCELL0:OUT_F0
DOA1outputTCELL0:OUT_F1
DOA10outputTCELL1:OUT_F2
DOA11outputTCELL1:OUT_F3
DOA12outputTCELL1:OUT_F4
DOA13outputTCELL1:OUT_F5
DOA14outputTCELL1:OUT_F6
DOA15outputTCELL1:OUT_F7
DOA16outputTCELL2:OUT_F0
DOA17outputTCELL2:OUT_F1
DOA2outputTCELL0:OUT_F2
DOA3outputTCELL0:OUT_F3
DOA4outputTCELL0:OUT_F4
DOA5outputTCELL0:OUT_F5
DOA6outputTCELL0:OUT_F6
DOA7outputTCELL0:OUT_F7
DOA8outputTCELL1:OUT_F0
DOA9outputTCELL1:OUT_F1
DOB0outputTCELL0:OUT_Q0
DOB1outputTCELL0:OUT_Q1
DOB10outputTCELL1:OUT_Q2
DOB11outputTCELL1:OUT_Q3
DOB12outputTCELL1:OUT_Q4
DOB13outputTCELL1:OUT_Q5
DOB14outputTCELL1:OUT_Q6
DOB15outputTCELL1:OUT_Q7
DOB16outputTCELL2:OUT_Q0
DOB17outputTCELL2:OUT_Q1
DOB2outputTCELL0:OUT_Q2
DOB3outputTCELL0:OUT_Q3
DOB4outputTCELL0:OUT_Q4
DOB5outputTCELL0:OUT_Q5
DOB6outputTCELL0:OUT_Q6
DOB7outputTCELL0:OUT_Q7
DOB8outputTCELL1:OUT_Q0
DOB9outputTCELL1:OUT_Q1
EFoutputTCELL1:OUT_OFX0
FFoutputTCELL0:OUT_OFX0
OCEAinputTCELL0:IMUX_CE0
OCEBinputTCELL1:IMUX_CE0
RSTAinputTCELL0:IMUX_LSR0
RSTBinputTCELL1:IMUX_LSR0
WEAinputTCELL0:IMUX_LSR1
WEBinputTCELL1:IMUX_LSR1

Bel EBR1

ecp4 EBR bel EBR1
PinDirectionWires
ADA0inputTCELL2:IMUX_C2
ADA1inputTCELL2:IMUX_C3
ADA10inputTCELL3:IMUX_C0
ADA11inputTCELL3:IMUX_C1
ADA12inputTCELL3:IMUX_C6
ADA13inputTCELL3:IMUX_C7
ADA2inputTCELL2:IMUX_C0
ADA3inputTCELL2:IMUX_C1
ADA4inputTCELL2:IMUX_C6
ADA5inputTCELL2:IMUX_C7
ADA6inputTCELL2:IMUX_C4
ADA7inputTCELL2:IMUX_C5
ADA8inputTCELL3:IMUX_C2
ADA9inputTCELL3:IMUX_C3
ADB0inputTCELL2:IMUX_A6
ADB1inputTCELL2:IMUX_A7
ADB10inputTCELL3:IMUX_A4
ADB11inputTCELL3:IMUX_A5
ADB12inputTCELL3:IMUX_A2
ADB13inputTCELL3:IMUX_A3
ADB2inputTCELL2:IMUX_A4
ADB3inputTCELL2:IMUX_A5
ADB4inputTCELL2:IMUX_A2
ADB5inputTCELL2:IMUX_A3
ADB6inputTCELL2:IMUX_A0
ADB7inputTCELL2:IMUX_A1
ADB8inputTCELL3:IMUX_A6
ADB9inputTCELL3:IMUX_A7
AEoutputTCELL3:OUT_OFX1
AFoutputTCELL2:OUT_OFX1
CEAinputTCELL2:IMUX_CE1
CEBinputTCELL3:IMUX_CE1
CLKAinputTCELL2:IMUX_CLK0_DELAY
CLKBinputTCELL3:IMUX_CLK0_DELAY
CSA0inputTCELL3:IMUX_CE2
CSA1inputTCELL3:IMUX_CE3
CSA2inputTCELL4:IMUX_CLK0_DELAY
CSB0inputTCELL4:IMUX_CE0
CSB1inputTCELL4:IMUX_CE1
CSB2inputTCELL4:IMUX_LSR0
DIA0inputTCELL2:IMUX_D2
DIA1inputTCELL2:IMUX_D3
DIA10inputTCELL3:IMUX_D4
DIA11inputTCELL3:IMUX_D5
DIA12inputTCELL3:IMUX_D6
DIA13inputTCELL3:IMUX_D7
DIA14inputTCELL4:IMUX_D0
DIA15inputTCELL4:IMUX_D1
DIA16inputTCELL4:IMUX_D2
DIA17inputTCELL4:IMUX_D3
DIA2inputTCELL2:IMUX_D4
DIA3inputTCELL2:IMUX_D5
DIA4inputTCELL2:IMUX_D6
DIA5inputTCELL2:IMUX_D7
DIA6inputTCELL3:IMUX_D0
DIA7inputTCELL3:IMUX_D1
DIA8inputTCELL3:IMUX_D2
DIA9inputTCELL3:IMUX_D3
DIB0inputTCELL2:IMUX_B6
DIB1inputTCELL2:IMUX_B7
DIB10inputTCELL3:IMUX_B0
DIB11inputTCELL3:IMUX_B1
DIB12inputTCELL3:IMUX_B2
DIB13inputTCELL3:IMUX_B3
DIB14inputTCELL4:IMUX_B4
DIB15inputTCELL4:IMUX_B5
DIB16inputTCELL4:IMUX_B6
DIB17inputTCELL4:IMUX_B7
DIB2inputTCELL2:IMUX_B0
DIB3inputTCELL2:IMUX_B1
DIB4inputTCELL2:IMUX_B2
DIB5inputTCELL2:IMUX_B3
DIB6inputTCELL3:IMUX_B4
DIB7inputTCELL3:IMUX_B5
DIB8inputTCELL3:IMUX_B6
DIB9inputTCELL3:IMUX_B7
DOA0outputTCELL2:OUT_F2
DOA1outputTCELL2:OUT_F3
DOA10outputTCELL3:OUT_F4
DOA11outputTCELL3:OUT_F5
DOA12outputTCELL3:OUT_F6
DOA13outputTCELL3:OUT_F7
DOA14outputTCELL4:OUT_F0
DOA15outputTCELL4:OUT_F1
DOA16outputTCELL4:OUT_F2
DOA17outputTCELL4:OUT_F3
DOA2outputTCELL2:OUT_F4
DOA3outputTCELL2:OUT_F5
DOA4outputTCELL2:OUT_F6
DOA5outputTCELL2:OUT_F7
DOA6outputTCELL3:OUT_F0
DOA7outputTCELL3:OUT_F1
DOA8outputTCELL3:OUT_F2
DOA9outputTCELL3:OUT_F3
DOB0outputTCELL2:OUT_Q2
DOB1outputTCELL2:OUT_Q3
DOB10outputTCELL3:OUT_Q4
DOB11outputTCELL3:OUT_Q5
DOB12outputTCELL3:OUT_Q6
DOB13outputTCELL3:OUT_Q7
DOB14outputTCELL4:OUT_Q0
DOB15outputTCELL4:OUT_Q1
DOB16outputTCELL4:OUT_Q2
DOB17outputTCELL4:OUT_Q3
DOB2outputTCELL2:OUT_Q4
DOB3outputTCELL2:OUT_Q5
DOB4outputTCELL2:OUT_Q6
DOB5outputTCELL2:OUT_Q7
DOB6outputTCELL3:OUT_Q0
DOB7outputTCELL3:OUT_Q1
DOB8outputTCELL3:OUT_Q2
DOB9outputTCELL3:OUT_Q3
EFoutputTCELL3:OUT_OFX0
FFoutputTCELL2:OUT_OFX0
OCEAinputTCELL2:IMUX_CE0
OCEBinputTCELL3:IMUX_CE0
RSTAinputTCELL2:IMUX_LSR0
RSTBinputTCELL3:IMUX_LSR0
WEAinputTCELL2:IMUX_LSR1
WEBinputTCELL3:IMUX_LSR1

Bel EBR2

ecp4 EBR bel EBR2
PinDirectionWires
ADA0inputTCELL5:IMUX_C2
ADA1inputTCELL5:IMUX_C3
ADA10inputTCELL6:IMUX_C0
ADA11inputTCELL6:IMUX_C1
ADA12inputTCELL6:IMUX_C6
ADA13inputTCELL6:IMUX_C7
ADA2inputTCELL5:IMUX_C0
ADA3inputTCELL5:IMUX_C1
ADA4inputTCELL5:IMUX_C6
ADA5inputTCELL5:IMUX_C7
ADA6inputTCELL5:IMUX_C4
ADA7inputTCELL5:IMUX_C5
ADA8inputTCELL6:IMUX_C2
ADA9inputTCELL6:IMUX_C3
ADB0inputTCELL5:IMUX_A6
ADB1inputTCELL5:IMUX_A7
ADB10inputTCELL6:IMUX_A4
ADB11inputTCELL6:IMUX_A5
ADB12inputTCELL6:IMUX_A2
ADB13inputTCELL6:IMUX_A3
ADB2inputTCELL5:IMUX_A4
ADB3inputTCELL5:IMUX_A5
ADB4inputTCELL5:IMUX_A2
ADB5inputTCELL5:IMUX_A3
ADB6inputTCELL5:IMUX_A0
ADB7inputTCELL5:IMUX_A1
ADB8inputTCELL6:IMUX_A6
ADB9inputTCELL6:IMUX_A7
AEoutputTCELL6:OUT_OFX1
AFoutputTCELL5:OUT_OFX1
CEAinputTCELL5:IMUX_CE1
CEBinputTCELL6:IMUX_CE1
CLKAinputTCELL5:IMUX_CLK0_DELAY
CLKBinputTCELL6:IMUX_CLK0_DELAY
CSA0inputTCELL4:IMUX_CE2
CSA1inputTCELL4:IMUX_CE3
CSA2inputTCELL4:IMUX_CLK1_DELAY
CSB0inputTCELL5:IMUX_CE2
CSB1inputTCELL5:IMUX_CE3
CSB2inputTCELL4:IMUX_LSR1
DIA0inputTCELL4:IMUX_D4
DIA1inputTCELL4:IMUX_D5
DIA10inputTCELL5:IMUX_D6
DIA11inputTCELL5:IMUX_D7
DIA12inputTCELL6:IMUX_D0
DIA13inputTCELL6:IMUX_D1
DIA14inputTCELL6:IMUX_D2
DIA15inputTCELL6:IMUX_D3
DIA16inputTCELL6:IMUX_D4
DIA17inputTCELL6:IMUX_D5
DIA2inputTCELL4:IMUX_D6
DIA3inputTCELL4:IMUX_D7
DIA4inputTCELL5:IMUX_D0
DIA5inputTCELL5:IMUX_D1
DIA6inputTCELL5:IMUX_D2
DIA7inputTCELL5:IMUX_D3
DIA8inputTCELL5:IMUX_D4
DIA9inputTCELL5:IMUX_D5
DIB0inputTCELL4:IMUX_B0
DIB1inputTCELL4:IMUX_B1
DIB10inputTCELL5:IMUX_B2
DIB11inputTCELL5:IMUX_B3
DIB12inputTCELL6:IMUX_B4
DIB13inputTCELL6:IMUX_B5
DIB14inputTCELL6:IMUX_B6
DIB15inputTCELL6:IMUX_B7
DIB16inputTCELL6:IMUX_B0
DIB17inputTCELL6:IMUX_B1
DIB2inputTCELL4:IMUX_B2
DIB3inputTCELL4:IMUX_B3
DIB4inputTCELL5:IMUX_B4
DIB5inputTCELL5:IMUX_B5
DIB6inputTCELL5:IMUX_B6
DIB7inputTCELL5:IMUX_B7
DIB8inputTCELL5:IMUX_B0
DIB9inputTCELL5:IMUX_B1
DOA0outputTCELL4:OUT_F4
DOA1outputTCELL4:OUT_F5
DOA10outputTCELL5:OUT_F6
DOA11outputTCELL5:OUT_F7
DOA12outputTCELL6:OUT_F0
DOA13outputTCELL6:OUT_F1
DOA14outputTCELL6:OUT_F2
DOA15outputTCELL6:OUT_F3
DOA16outputTCELL6:OUT_F4
DOA17outputTCELL6:OUT_F5
DOA2outputTCELL4:OUT_F6
DOA3outputTCELL4:OUT_F7
DOA4outputTCELL5:OUT_F0
DOA5outputTCELL5:OUT_F1
DOA6outputTCELL5:OUT_F2
DOA7outputTCELL5:OUT_F3
DOA8outputTCELL5:OUT_F4
DOA9outputTCELL5:OUT_F5
DOB0outputTCELL4:OUT_Q4
DOB1outputTCELL4:OUT_Q5
DOB10outputTCELL5:OUT_Q6
DOB11outputTCELL5:OUT_Q7
DOB12outputTCELL6:OUT_Q0
DOB13outputTCELL6:OUT_Q1
DOB14outputTCELL6:OUT_Q2
DOB15outputTCELL6:OUT_Q3
DOB16outputTCELL6:OUT_Q4
DOB17outputTCELL6:OUT_Q5
DOB2outputTCELL4:OUT_Q6
DOB3outputTCELL4:OUT_Q7
DOB4outputTCELL5:OUT_Q0
DOB5outputTCELL5:OUT_Q1
DOB6outputTCELL5:OUT_Q2
DOB7outputTCELL5:OUT_Q3
DOB8outputTCELL5:OUT_Q4
DOB9outputTCELL5:OUT_Q5
EFoutputTCELL6:OUT_OFX0
FFoutputTCELL5:OUT_OFX0
OCEAinputTCELL5:IMUX_CE0
OCEBinputTCELL6:IMUX_CE0
RSTAinputTCELL5:IMUX_LSR0
RSTBinputTCELL6:IMUX_LSR0
WEAinputTCELL5:IMUX_LSR1
WEBinputTCELL6:IMUX_LSR1

Bel EBR3

ecp4 EBR bel EBR3
PinDirectionWires
ADA0inputTCELL7:IMUX_C2
ADA1inputTCELL7:IMUX_C3
ADA10inputTCELL8:IMUX_C0
ADA11inputTCELL8:IMUX_C1
ADA12inputTCELL8:IMUX_C6
ADA13inputTCELL8:IMUX_C7
ADA2inputTCELL7:IMUX_C0
ADA3inputTCELL7:IMUX_C1
ADA4inputTCELL7:IMUX_C6
ADA5inputTCELL7:IMUX_C7
ADA6inputTCELL7:IMUX_C4
ADA7inputTCELL7:IMUX_C5
ADA8inputTCELL8:IMUX_C2
ADA9inputTCELL8:IMUX_C3
ADB0inputTCELL7:IMUX_A6
ADB1inputTCELL7:IMUX_A7
ADB10inputTCELL8:IMUX_A4
ADB11inputTCELL8:IMUX_A5
ADB12inputTCELL8:IMUX_A2
ADB13inputTCELL8:IMUX_A3
ADB2inputTCELL7:IMUX_A4
ADB3inputTCELL7:IMUX_A5
ADB4inputTCELL7:IMUX_A2
ADB5inputTCELL7:IMUX_A3
ADB6inputTCELL7:IMUX_A0
ADB7inputTCELL7:IMUX_A1
ADB8inputTCELL8:IMUX_A6
ADB9inputTCELL8:IMUX_A7
AEoutputTCELL8:OUT_OFX1
AFoutputTCELL7:OUT_OFX1
CEAinputTCELL7:IMUX_CE1
CEBinputTCELL8:IMUX_CE1
CLKAinputTCELL7:IMUX_CLK0_DELAY
CLKBinputTCELL8:IMUX_CLK0_DELAY
CSA0inputTCELL7:IMUX_CE2
CSA1inputTCELL6:IMUX_CE2
CSA2inputTCELL6:IMUX_CE3
CSB0inputTCELL8:IMUX_CE2
CSB1inputTCELL8:IMUX_CE3
CSB2inputTCELL7:IMUX_CE3
DIA0inputTCELL6:IMUX_D6
DIA1inputTCELL6:IMUX_D7
DIA10inputTCELL8:IMUX_D0
DIA11inputTCELL8:IMUX_D1
DIA12inputTCELL8:IMUX_D2
DIA13inputTCELL8:IMUX_D3
DIA14inputTCELL8:IMUX_D4
DIA15inputTCELL8:IMUX_D5
DIA16inputTCELL8:IMUX_D6
DIA17inputTCELL8:IMUX_D7
DIA2inputTCELL7:IMUX_D0
DIA3inputTCELL7:IMUX_D1
DIA4inputTCELL7:IMUX_D2
DIA5inputTCELL7:IMUX_D3
DIA6inputTCELL7:IMUX_D4
DIA7inputTCELL7:IMUX_D5
DIA8inputTCELL7:IMUX_D6
DIA9inputTCELL7:IMUX_D7
DIB0inputTCELL6:IMUX_B2
DIB1inputTCELL6:IMUX_B3
DIB10inputTCELL8:IMUX_B4
DIB11inputTCELL8:IMUX_B5
DIB12inputTCELL8:IMUX_B6
DIB13inputTCELL8:IMUX_B7
DIB14inputTCELL8:IMUX_B0
DIB15inputTCELL8:IMUX_B1
DIB16inputTCELL8:IMUX_B2
DIB17inputTCELL8:IMUX_B3
DIB2inputTCELL7:IMUX_B4
DIB3inputTCELL7:IMUX_B5
DIB4inputTCELL7:IMUX_B6
DIB5inputTCELL7:IMUX_B7
DIB6inputTCELL7:IMUX_B0
DIB7inputTCELL7:IMUX_B1
DIB8inputTCELL7:IMUX_B2
DIB9inputTCELL7:IMUX_B3
DOA0outputTCELL6:OUT_F6
DOA1outputTCELL6:OUT_F7
DOA10outputTCELL8:OUT_F0
DOA11outputTCELL8:OUT_F1
DOA12outputTCELL8:OUT_F2
DOA13outputTCELL8:OUT_F3
DOA14outputTCELL8:OUT_F4
DOA15outputTCELL8:OUT_F5
DOA16outputTCELL8:OUT_F6
DOA17outputTCELL8:OUT_F7
DOA2outputTCELL7:OUT_F0
DOA3outputTCELL7:OUT_F1
DOA4outputTCELL7:OUT_F2
DOA5outputTCELL7:OUT_F3
DOA6outputTCELL7:OUT_F4
DOA7outputTCELL7:OUT_F5
DOA8outputTCELL7:OUT_F6
DOA9outputTCELL7:OUT_F7
DOB0outputTCELL6:OUT_Q6
DOB1outputTCELL6:OUT_Q7
DOB10outputTCELL8:OUT_Q0
DOB11outputTCELL8:OUT_Q1
DOB12outputTCELL8:OUT_Q2
DOB13outputTCELL8:OUT_Q3
DOB14outputTCELL8:OUT_Q4
DOB15outputTCELL8:OUT_Q5
DOB16outputTCELL8:OUT_Q6
DOB17outputTCELL8:OUT_Q7
DOB2outputTCELL7:OUT_Q0
DOB3outputTCELL7:OUT_Q1
DOB4outputTCELL7:OUT_Q2
DOB5outputTCELL7:OUT_Q3
DOB6outputTCELL7:OUT_Q4
DOB7outputTCELL7:OUT_Q5
DOB8outputTCELL7:OUT_Q6
DOB9outputTCELL7:OUT_Q7
EFoutputTCELL8:OUT_OFX0
FFoutputTCELL7:OUT_OFX0
OCEAinputTCELL7:IMUX_CE0
OCEBinputTCELL8:IMUX_CE0
RSTAinputTCELL7:IMUX_LSR0
RSTBinputTCELL8:IMUX_LSR0
WEAinputTCELL7:IMUX_LSR1
WEBinputTCELL8:IMUX_LSR1

Bel wires

ecp4 EBR bel wires
WirePins
TCELL0:IMUX_A0EBR0.ADB6
TCELL0:IMUX_A1EBR0.ADB7
TCELL0:IMUX_A2EBR0.ADB4
TCELL0:IMUX_A3EBR0.ADB5
TCELL0:IMUX_A4EBR0.ADB2
TCELL0:IMUX_A5EBR0.ADB3
TCELL0:IMUX_A6EBR0.ADB0
TCELL0:IMUX_A7EBR0.ADB1
TCELL0:IMUX_B0EBR0.DIB4
TCELL0:IMUX_B1EBR0.DIB5
TCELL0:IMUX_B2EBR0.DIB6
TCELL0:IMUX_B3EBR0.DIB7
TCELL0:IMUX_B4EBR0.DIB0
TCELL0:IMUX_B5EBR0.DIB1
TCELL0:IMUX_B6EBR0.DIB2
TCELL0:IMUX_B7EBR0.DIB3
TCELL0:IMUX_C0EBR0.ADA2
TCELL0:IMUX_C1EBR0.ADA3
TCELL0:IMUX_C2EBR0.ADA0
TCELL0:IMUX_C3EBR0.ADA1
TCELL0:IMUX_C4EBR0.ADA6
TCELL0:IMUX_C5EBR0.ADA7
TCELL0:IMUX_C6EBR0.ADA4
TCELL0:IMUX_C7EBR0.ADA5
TCELL0:IMUX_D0EBR0.DIA0
TCELL0:IMUX_D1EBR0.DIA1
TCELL0:IMUX_D2EBR0.DIA2
TCELL0:IMUX_D3EBR0.DIA3
TCELL0:IMUX_D4EBR0.DIA4
TCELL0:IMUX_D5EBR0.DIA5
TCELL0:IMUX_D6EBR0.DIA6
TCELL0:IMUX_D7EBR0.DIA7
TCELL0:IMUX_LSR0EBR0.RSTA
TCELL0:IMUX_LSR1EBR0.WEA
TCELL0:IMUX_CLK0_DELAYEBR0.CLKA
TCELL0:IMUX_CE0EBR0.OCEA
TCELL0:IMUX_CE1EBR0.CEA
TCELL0:IMUX_CE2EBR0.CSA0
TCELL0:IMUX_CE3EBR0.CSA1
TCELL0:OUT_F0EBR0.DOA0
TCELL0:OUT_F1EBR0.DOA1
TCELL0:OUT_F2EBR0.DOA2
TCELL0:OUT_F3EBR0.DOA3
TCELL0:OUT_F4EBR0.DOA4
TCELL0:OUT_F5EBR0.DOA5
TCELL0:OUT_F6EBR0.DOA6
TCELL0:OUT_F7EBR0.DOA7
TCELL0:OUT_Q0EBR0.DOB0
TCELL0:OUT_Q1EBR0.DOB1
TCELL0:OUT_Q2EBR0.DOB2
TCELL0:OUT_Q3EBR0.DOB3
TCELL0:OUT_Q4EBR0.DOB4
TCELL0:OUT_Q5EBR0.DOB5
TCELL0:OUT_Q6EBR0.DOB6
TCELL0:OUT_Q7EBR0.DOB7
TCELL0:OUT_OFX0EBR0.FF
TCELL0:OUT_OFX1EBR0.AF
TCELL1:IMUX_A2EBR0.ADB12
TCELL1:IMUX_A3EBR0.ADB13
TCELL1:IMUX_A4EBR0.ADB10
TCELL1:IMUX_A5EBR0.ADB11
TCELL1:IMUX_A6EBR0.ADB8
TCELL1:IMUX_A7EBR0.ADB9
TCELL1:IMUX_B0EBR0.DIB12
TCELL1:IMUX_B1EBR0.DIB13
TCELL1:IMUX_B2EBR0.DIB14
TCELL1:IMUX_B3EBR0.DIB15
TCELL1:IMUX_B4EBR0.DIB8
TCELL1:IMUX_B5EBR0.DIB9
TCELL1:IMUX_B6EBR0.DIB10
TCELL1:IMUX_B7EBR0.DIB11
TCELL1:IMUX_C0EBR0.ADA10
TCELL1:IMUX_C1EBR0.ADA11
TCELL1:IMUX_C2EBR0.ADA8
TCELL1:IMUX_C3EBR0.ADA9
TCELL1:IMUX_C6EBR0.ADA12
TCELL1:IMUX_C7EBR0.ADA13
TCELL1:IMUX_D0EBR0.DIA8
TCELL1:IMUX_D1EBR0.DIA9
TCELL1:IMUX_D2EBR0.DIA10
TCELL1:IMUX_D3EBR0.DIA11
TCELL1:IMUX_D4EBR0.DIA12
TCELL1:IMUX_D5EBR0.DIA13
TCELL1:IMUX_D6EBR0.DIA14
TCELL1:IMUX_D7EBR0.DIA15
TCELL1:IMUX_LSR0EBR0.RSTB
TCELL1:IMUX_LSR1EBR0.WEB
TCELL1:IMUX_CLK0_DELAYEBR0.CLKB
TCELL1:IMUX_CE0EBR0.OCEB
TCELL1:IMUX_CE1EBR0.CEB
TCELL1:IMUX_CE2EBR0.CSB0
TCELL1:IMUX_CE3EBR0.CSA2
TCELL1:OUT_F0EBR0.DOA8
TCELL1:OUT_F1EBR0.DOA9
TCELL1:OUT_F2EBR0.DOA10
TCELL1:OUT_F3EBR0.DOA11
TCELL1:OUT_F4EBR0.DOA12
TCELL1:OUT_F5EBR0.DOA13
TCELL1:OUT_F6EBR0.DOA14
TCELL1:OUT_F7EBR0.DOA15
TCELL1:OUT_Q0EBR0.DOB8
TCELL1:OUT_Q1EBR0.DOB9
TCELL1:OUT_Q2EBR0.DOB10
TCELL1:OUT_Q3EBR0.DOB11
TCELL1:OUT_Q4EBR0.DOB12
TCELL1:OUT_Q5EBR0.DOB13
TCELL1:OUT_Q6EBR0.DOB14
TCELL1:OUT_Q7EBR0.DOB15
TCELL1:OUT_OFX0EBR0.EF
TCELL1:OUT_OFX1EBR0.AE
TCELL2:IMUX_A0EBR1.ADB6
TCELL2:IMUX_A1EBR1.ADB7
TCELL2:IMUX_A2EBR1.ADB4
TCELL2:IMUX_A3EBR1.ADB5
TCELL2:IMUX_A4EBR1.ADB2
TCELL2:IMUX_A5EBR1.ADB3
TCELL2:IMUX_A6EBR1.ADB0
TCELL2:IMUX_A7EBR1.ADB1
TCELL2:IMUX_B0EBR1.DIB2
TCELL2:IMUX_B1EBR1.DIB3
TCELL2:IMUX_B2EBR1.DIB4
TCELL2:IMUX_B3EBR1.DIB5
TCELL2:IMUX_B4EBR0.DIB16
TCELL2:IMUX_B5EBR0.DIB17
TCELL2:IMUX_B6EBR1.DIB0
TCELL2:IMUX_B7EBR1.DIB1
TCELL2:IMUX_C0EBR1.ADA2
TCELL2:IMUX_C1EBR1.ADA3
TCELL2:IMUX_C2EBR1.ADA0
TCELL2:IMUX_C3EBR1.ADA1
TCELL2:IMUX_C4EBR1.ADA6
TCELL2:IMUX_C5EBR1.ADA7
TCELL2:IMUX_C6EBR1.ADA4
TCELL2:IMUX_C7EBR1.ADA5
TCELL2:IMUX_D0EBR0.DIA16
TCELL2:IMUX_D1EBR0.DIA17
TCELL2:IMUX_D2EBR1.DIA0
TCELL2:IMUX_D3EBR1.DIA1
TCELL2:IMUX_D4EBR1.DIA2
TCELL2:IMUX_D5EBR1.DIA3
TCELL2:IMUX_D6EBR1.DIA4
TCELL2:IMUX_D7EBR1.DIA5
TCELL2:IMUX_LSR0EBR1.RSTA
TCELL2:IMUX_LSR1EBR1.WEA
TCELL2:IMUX_CLK0_DELAYEBR1.CLKA
TCELL2:IMUX_CE0EBR1.OCEA
TCELL2:IMUX_CE1EBR1.CEA
TCELL2:IMUX_CE2EBR0.CSB1
TCELL2:IMUX_CE3EBR0.CSB2
TCELL2:OUT_F0EBR0.DOA16
TCELL2:OUT_F1EBR0.DOA17
TCELL2:OUT_F2EBR1.DOA0
TCELL2:OUT_F3EBR1.DOA1
TCELL2:OUT_F4EBR1.DOA2
TCELL2:OUT_F5EBR1.DOA3
TCELL2:OUT_F6EBR1.DOA4
TCELL2:OUT_F7EBR1.DOA5
TCELL2:OUT_Q0EBR0.DOB16
TCELL2:OUT_Q1EBR0.DOB17
TCELL2:OUT_Q2EBR1.DOB0
TCELL2:OUT_Q3EBR1.DOB1
TCELL2:OUT_Q4EBR1.DOB2
TCELL2:OUT_Q5EBR1.DOB3
TCELL2:OUT_Q6EBR1.DOB4
TCELL2:OUT_Q7EBR1.DOB5
TCELL2:OUT_OFX0EBR1.FF
TCELL2:OUT_OFX1EBR1.AF
TCELL3:IMUX_A2EBR1.ADB12
TCELL3:IMUX_A3EBR1.ADB13
TCELL3:IMUX_A4EBR1.ADB10
TCELL3:IMUX_A5EBR1.ADB11
TCELL3:IMUX_A6EBR1.ADB8
TCELL3:IMUX_A7EBR1.ADB9
TCELL3:IMUX_B0EBR1.DIB10
TCELL3:IMUX_B1EBR1.DIB11
TCELL3:IMUX_B2EBR1.DIB12
TCELL3:IMUX_B3EBR1.DIB13
TCELL3:IMUX_B4EBR1.DIB6
TCELL3:IMUX_B5EBR1.DIB7
TCELL3:IMUX_B6EBR1.DIB8
TCELL3:IMUX_B7EBR1.DIB9
TCELL3:IMUX_C0EBR1.ADA10
TCELL3:IMUX_C1EBR1.ADA11
TCELL3:IMUX_C2EBR1.ADA8
TCELL3:IMUX_C3EBR1.ADA9
TCELL3:IMUX_C6EBR1.ADA12
TCELL3:IMUX_C7EBR1.ADA13
TCELL3:IMUX_D0EBR1.DIA6
TCELL3:IMUX_D1EBR1.DIA7
TCELL3:IMUX_D2EBR1.DIA8
TCELL3:IMUX_D3EBR1.DIA9
TCELL3:IMUX_D4EBR1.DIA10
TCELL3:IMUX_D5EBR1.DIA11
TCELL3:IMUX_D6EBR1.DIA12
TCELL3:IMUX_D7EBR1.DIA13
TCELL3:IMUX_LSR0EBR1.RSTB
TCELL3:IMUX_LSR1EBR1.WEB
TCELL3:IMUX_CLK0_DELAYEBR1.CLKB
TCELL3:IMUX_CE0EBR1.OCEB
TCELL3:IMUX_CE1EBR1.CEB
TCELL3:IMUX_CE2EBR1.CSA0
TCELL3:IMUX_CE3EBR1.CSA1
TCELL3:OUT_F0EBR1.DOA6
TCELL3:OUT_F1EBR1.DOA7
TCELL3:OUT_F2EBR1.DOA8
TCELL3:OUT_F3EBR1.DOA9
TCELL3:OUT_F4EBR1.DOA10
TCELL3:OUT_F5EBR1.DOA11
TCELL3:OUT_F6EBR1.DOA12
TCELL3:OUT_F7EBR1.DOA13
TCELL3:OUT_Q0EBR1.DOB6
TCELL3:OUT_Q1EBR1.DOB7
TCELL3:OUT_Q2EBR1.DOB8
TCELL3:OUT_Q3EBR1.DOB9
TCELL3:OUT_Q4EBR1.DOB10
TCELL3:OUT_Q5EBR1.DOB11
TCELL3:OUT_Q6EBR1.DOB12
TCELL3:OUT_Q7EBR1.DOB13
TCELL3:OUT_OFX0EBR1.EF
TCELL3:OUT_OFX1EBR1.AE
TCELL4:IMUX_B0EBR2.DIB0
TCELL4:IMUX_B1EBR2.DIB1
TCELL4:IMUX_B2EBR2.DIB2
TCELL4:IMUX_B3EBR2.DIB3
TCELL4:IMUX_B4EBR1.DIB14
TCELL4:IMUX_B5EBR1.DIB15
TCELL4:IMUX_B6EBR1.DIB16
TCELL4:IMUX_B7EBR1.DIB17
TCELL4:IMUX_D0EBR1.DIA14
TCELL4:IMUX_D1EBR1.DIA15
TCELL4:IMUX_D2EBR1.DIA16
TCELL4:IMUX_D3EBR1.DIA17
TCELL4:IMUX_D4EBR2.DIA0
TCELL4:IMUX_D5EBR2.DIA1
TCELL4:IMUX_D6EBR2.DIA2
TCELL4:IMUX_D7EBR2.DIA3
TCELL4:IMUX_LSR0EBR1.CSB2
TCELL4:IMUX_LSR1EBR2.CSB2
TCELL4:IMUX_CLK0_DELAYEBR1.CSA2
TCELL4:IMUX_CLK1_DELAYEBR2.CSA2
TCELL4:IMUX_CE0EBR1.CSB0
TCELL4:IMUX_CE1EBR1.CSB1
TCELL4:IMUX_CE2EBR2.CSA0
TCELL4:IMUX_CE3EBR2.CSA1
TCELL4:OUT_F0EBR1.DOA14
TCELL4:OUT_F1EBR1.DOA15
TCELL4:OUT_F2EBR1.DOA16
TCELL4:OUT_F3EBR1.DOA17
TCELL4:OUT_F4EBR2.DOA0
TCELL4:OUT_F5EBR2.DOA1
TCELL4:OUT_F6EBR2.DOA2
TCELL4:OUT_F7EBR2.DOA3
TCELL4:OUT_Q0EBR1.DOB14
TCELL4:OUT_Q1EBR1.DOB15
TCELL4:OUT_Q2EBR1.DOB16
TCELL4:OUT_Q3EBR1.DOB17
TCELL4:OUT_Q4EBR2.DOB0
TCELL4:OUT_Q5EBR2.DOB1
TCELL4:OUT_Q6EBR2.DOB2
TCELL4:OUT_Q7EBR2.DOB3
TCELL5:IMUX_A0EBR2.ADB6
TCELL5:IMUX_A1EBR2.ADB7
TCELL5:IMUX_A2EBR2.ADB4
TCELL5:IMUX_A3EBR2.ADB5
TCELL5:IMUX_A4EBR2.ADB2
TCELL5:IMUX_A5EBR2.ADB3
TCELL5:IMUX_A6EBR2.ADB0
TCELL5:IMUX_A7EBR2.ADB1
TCELL5:IMUX_B0EBR2.DIB8
TCELL5:IMUX_B1EBR2.DIB9
TCELL5:IMUX_B2EBR2.DIB10
TCELL5:IMUX_B3EBR2.DIB11
TCELL5:IMUX_B4EBR2.DIB4
TCELL5:IMUX_B5EBR2.DIB5
TCELL5:IMUX_B6EBR2.DIB6
TCELL5:IMUX_B7EBR2.DIB7
TCELL5:IMUX_C0EBR2.ADA2
TCELL5:IMUX_C1EBR2.ADA3
TCELL5:IMUX_C2EBR2.ADA0
TCELL5:IMUX_C3EBR2.ADA1
TCELL5:IMUX_C4EBR2.ADA6
TCELL5:IMUX_C5EBR2.ADA7
TCELL5:IMUX_C6EBR2.ADA4
TCELL5:IMUX_C7EBR2.ADA5
TCELL5:IMUX_D0EBR2.DIA4
TCELL5:IMUX_D1EBR2.DIA5
TCELL5:IMUX_D2EBR2.DIA6
TCELL5:IMUX_D3EBR2.DIA7
TCELL5:IMUX_D4EBR2.DIA8
TCELL5:IMUX_D5EBR2.DIA9
TCELL5:IMUX_D6EBR2.DIA10
TCELL5:IMUX_D7EBR2.DIA11
TCELL5:IMUX_LSR0EBR2.RSTA
TCELL5:IMUX_LSR1EBR2.WEA
TCELL5:IMUX_CLK0_DELAYEBR2.CLKA
TCELL5:IMUX_CE0EBR2.OCEA
TCELL5:IMUX_CE1EBR2.CEA
TCELL5:IMUX_CE2EBR2.CSB0
TCELL5:IMUX_CE3EBR2.CSB1
TCELL5:OUT_F0EBR2.DOA4
TCELL5:OUT_F1EBR2.DOA5
TCELL5:OUT_F2EBR2.DOA6
TCELL5:OUT_F3EBR2.DOA7
TCELL5:OUT_F4EBR2.DOA8
TCELL5:OUT_F5EBR2.DOA9
TCELL5:OUT_F6EBR2.DOA10
TCELL5:OUT_F7EBR2.DOA11
TCELL5:OUT_Q0EBR2.DOB4
TCELL5:OUT_Q1EBR2.DOB5
TCELL5:OUT_Q2EBR2.DOB6
TCELL5:OUT_Q3EBR2.DOB7
TCELL5:OUT_Q4EBR2.DOB8
TCELL5:OUT_Q5EBR2.DOB9
TCELL5:OUT_Q6EBR2.DOB10
TCELL5:OUT_Q7EBR2.DOB11
TCELL5:OUT_OFX0EBR2.FF
TCELL5:OUT_OFX1EBR2.AF
TCELL6:IMUX_A2EBR2.ADB12
TCELL6:IMUX_A3EBR2.ADB13
TCELL6:IMUX_A4EBR2.ADB10
TCELL6:IMUX_A5EBR2.ADB11
TCELL6:IMUX_A6EBR2.ADB8
TCELL6:IMUX_A7EBR2.ADB9
TCELL6:IMUX_B0EBR2.DIB16
TCELL6:IMUX_B1EBR2.DIB17
TCELL6:IMUX_B2EBR3.DIB0
TCELL6:IMUX_B3EBR3.DIB1
TCELL6:IMUX_B4EBR2.DIB12
TCELL6:IMUX_B5EBR2.DIB13
TCELL6:IMUX_B6EBR2.DIB14
TCELL6:IMUX_B7EBR2.DIB15
TCELL6:IMUX_C0EBR2.ADA10
TCELL6:IMUX_C1EBR2.ADA11
TCELL6:IMUX_C2EBR2.ADA8
TCELL6:IMUX_C3EBR2.ADA9
TCELL6:IMUX_C6EBR2.ADA12
TCELL6:IMUX_C7EBR2.ADA13
TCELL6:IMUX_D0EBR2.DIA12
TCELL6:IMUX_D1EBR2.DIA13
TCELL6:IMUX_D2EBR2.DIA14
TCELL6:IMUX_D3EBR2.DIA15
TCELL6:IMUX_D4EBR2.DIA16
TCELL6:IMUX_D5EBR2.DIA17
TCELL6:IMUX_D6EBR3.DIA0
TCELL6:IMUX_D7EBR3.DIA1
TCELL6:IMUX_LSR0EBR2.RSTB
TCELL6:IMUX_LSR1EBR2.WEB
TCELL6:IMUX_CLK0_DELAYEBR2.CLKB
TCELL6:IMUX_CE0EBR2.OCEB
TCELL6:IMUX_CE1EBR2.CEB
TCELL6:IMUX_CE2EBR3.CSA1
TCELL6:IMUX_CE3EBR3.CSA2
TCELL6:OUT_F0EBR2.DOA12
TCELL6:OUT_F1EBR2.DOA13
TCELL6:OUT_F2EBR2.DOA14
TCELL6:OUT_F3EBR2.DOA15
TCELL6:OUT_F4EBR2.DOA16
TCELL6:OUT_F5EBR2.DOA17
TCELL6:OUT_F6EBR3.DOA0
TCELL6:OUT_F7EBR3.DOA1
TCELL6:OUT_Q0EBR2.DOB12
TCELL6:OUT_Q1EBR2.DOB13
TCELL6:OUT_Q2EBR2.DOB14
TCELL6:OUT_Q3EBR2.DOB15
TCELL6:OUT_Q4EBR2.DOB16
TCELL6:OUT_Q5EBR2.DOB17
TCELL6:OUT_Q6EBR3.DOB0
TCELL6:OUT_Q7EBR3.DOB1
TCELL6:OUT_OFX0EBR2.EF
TCELL6:OUT_OFX1EBR2.AE
TCELL7:IMUX_A0EBR3.ADB6
TCELL7:IMUX_A1EBR3.ADB7
TCELL7:IMUX_A2EBR3.ADB4
TCELL7:IMUX_A3EBR3.ADB5
TCELL7:IMUX_A4EBR3.ADB2
TCELL7:IMUX_A5EBR3.ADB3
TCELL7:IMUX_A6EBR3.ADB0
TCELL7:IMUX_A7EBR3.ADB1
TCELL7:IMUX_B0EBR3.DIB6
TCELL7:IMUX_B1EBR3.DIB7
TCELL7:IMUX_B2EBR3.DIB8
TCELL7:IMUX_B3EBR3.DIB9
TCELL7:IMUX_B4EBR3.DIB2
TCELL7:IMUX_B5EBR3.DIB3
TCELL7:IMUX_B6EBR3.DIB4
TCELL7:IMUX_B7EBR3.DIB5
TCELL7:IMUX_C0EBR3.ADA2
TCELL7:IMUX_C1EBR3.ADA3
TCELL7:IMUX_C2EBR3.ADA0
TCELL7:IMUX_C3EBR3.ADA1
TCELL7:IMUX_C4EBR3.ADA6
TCELL7:IMUX_C5EBR3.ADA7
TCELL7:IMUX_C6EBR3.ADA4
TCELL7:IMUX_C7EBR3.ADA5
TCELL7:IMUX_D0EBR3.DIA2
TCELL7:IMUX_D1EBR3.DIA3
TCELL7:IMUX_D2EBR3.DIA4
TCELL7:IMUX_D3EBR3.DIA5
TCELL7:IMUX_D4EBR3.DIA6
TCELL7:IMUX_D5EBR3.DIA7
TCELL7:IMUX_D6EBR3.DIA8
TCELL7:IMUX_D7EBR3.DIA9
TCELL7:IMUX_LSR0EBR3.RSTA
TCELL7:IMUX_LSR1EBR3.WEA
TCELL7:IMUX_CLK0_DELAYEBR3.CLKA
TCELL7:IMUX_CE0EBR3.OCEA
TCELL7:IMUX_CE1EBR3.CEA
TCELL7:IMUX_CE2EBR3.CSA0
TCELL7:IMUX_CE3EBR3.CSB2
TCELL7:OUT_F0EBR3.DOA2
TCELL7:OUT_F1EBR3.DOA3
TCELL7:OUT_F2EBR3.DOA4
TCELL7:OUT_F3EBR3.DOA5
TCELL7:OUT_F4EBR3.DOA6
TCELL7:OUT_F5EBR3.DOA7
TCELL7:OUT_F6EBR3.DOA8
TCELL7:OUT_F7EBR3.DOA9
TCELL7:OUT_Q0EBR3.DOB2
TCELL7:OUT_Q1EBR3.DOB3
TCELL7:OUT_Q2EBR3.DOB4
TCELL7:OUT_Q3EBR3.DOB5
TCELL7:OUT_Q4EBR3.DOB6
TCELL7:OUT_Q5EBR3.DOB7
TCELL7:OUT_Q6EBR3.DOB8
TCELL7:OUT_Q7EBR3.DOB9
TCELL7:OUT_OFX0EBR3.FF
TCELL7:OUT_OFX1EBR3.AF
TCELL8:IMUX_A2EBR3.ADB12
TCELL8:IMUX_A3EBR3.ADB13
TCELL8:IMUX_A4EBR3.ADB10
TCELL8:IMUX_A5EBR3.ADB11
TCELL8:IMUX_A6EBR3.ADB8
TCELL8:IMUX_A7EBR3.ADB9
TCELL8:IMUX_B0EBR3.DIB14
TCELL8:IMUX_B1EBR3.DIB15
TCELL8:IMUX_B2EBR3.DIB16
TCELL8:IMUX_B3EBR3.DIB17
TCELL8:IMUX_B4EBR3.DIB10
TCELL8:IMUX_B5EBR3.DIB11
TCELL8:IMUX_B6EBR3.DIB12
TCELL8:IMUX_B7EBR3.DIB13
TCELL8:IMUX_C0EBR3.ADA10
TCELL8:IMUX_C1EBR3.ADA11
TCELL8:IMUX_C2EBR3.ADA8
TCELL8:IMUX_C3EBR3.ADA9
TCELL8:IMUX_C6EBR3.ADA12
TCELL8:IMUX_C7EBR3.ADA13
TCELL8:IMUX_D0EBR3.DIA10
TCELL8:IMUX_D1EBR3.DIA11
TCELL8:IMUX_D2EBR3.DIA12
TCELL8:IMUX_D3EBR3.DIA13
TCELL8:IMUX_D4EBR3.DIA14
TCELL8:IMUX_D5EBR3.DIA15
TCELL8:IMUX_D6EBR3.DIA16
TCELL8:IMUX_D7EBR3.DIA17
TCELL8:IMUX_LSR0EBR3.RSTB
TCELL8:IMUX_LSR1EBR3.WEB
TCELL8:IMUX_CLK0_DELAYEBR3.CLKB
TCELL8:IMUX_CE0EBR3.OCEB
TCELL8:IMUX_CE1EBR3.CEB
TCELL8:IMUX_CE2EBR3.CSB0
TCELL8:IMUX_CE3EBR3.CSB1
TCELL8:OUT_F0EBR3.DOA10
TCELL8:OUT_F1EBR3.DOA11
TCELL8:OUT_F2EBR3.DOA12
TCELL8:OUT_F3EBR3.DOA13
TCELL8:OUT_F4EBR3.DOA14
TCELL8:OUT_F5EBR3.DOA15
TCELL8:OUT_F6EBR3.DOA16
TCELL8:OUT_F7EBR3.DOA17
TCELL8:OUT_Q0EBR3.DOB10
TCELL8:OUT_Q1EBR3.DOB11
TCELL8:OUT_Q2EBR3.DOB12
TCELL8:OUT_Q3EBR3.DOB13
TCELL8:OUT_Q4EBR3.DOB14
TCELL8:OUT_Q5EBR3.DOB15
TCELL8:OUT_Q6EBR3.DOB16
TCELL8:OUT_Q7EBR3.DOB17
TCELL8:OUT_OFX0EBR3.EF
TCELL8:OUT_OFX1EBR3.AE