The CLB is identical to Spartan 3.
The data for a CLB is located in the same bitstream tile as the associated INT.CLB
tile.
SLICE0:CY0F |
0.1.10 |
0.1.7 |
0.1.9 |
SLICE1:CY0F |
0.2.10 |
0.2.7 |
0.2.9 |
SLICE2:CY0F |
0.1.42 |
0.1.39 |
0.1.41 |
SLICE3:CY0F |
0.2.42 |
0.2.39 |
0.2.41 |
BX |
0 |
0 |
0 |
F2 |
0 |
0 |
1 |
F1 |
0 |
1 |
1 |
PROD |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
1 |
1 |
1 |
SLICE0:CY0G |
0.1.30 |
0.1.31 |
0.1.29 |
SLICE1:CY0G |
0.2.30 |
0.2.31 |
0.2.29 |
SLICE2:CY0G |
0.1.62 |
0.1.63 |
0.1.61 |
SLICE3:CY0G |
0.2.62 |
0.2.63 |
0.2.61 |
BY |
0 |
0 |
0 |
G2 |
0 |
0 |
1 |
G1 |
0 |
1 |
1 |
PROD |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
1 |
1 |
1 |
SLICE0:CYINIT |
0.1.4 |
SLICE1:CYINIT |
0.2.4 |
SLICE2:CYINIT |
0.1.36 |
SLICE3:CYINIT |
0.2.36 |
BX |
0 |
CIN |
1 |
SLICE0:CYSELF |
0.1.0 |
SLICE1:CYSELF |
0.2.0 |
SLICE2:CYSELF |
0.1.32 |
SLICE3:CYSELF |
0.2.32 |
1 |
0 |
F |
1 |
SLICE0:CYSELG |
0.1.3 |
SLICE1:CYSELG |
0.2.3 |
SLICE2:CYSELG |
0.1.35 |
SLICE3:CYSELG |
0.2.35 |
1 |
0 |
G |
1 |
SLICE0:DIF_MUX |
0.1.15 |
SLICE2:DIF_MUX |
0.1.47 |
ALT |
0 |
BX |
1 |
SLICE0:DIG_MUX |
0.1.26 |
SLICE2:DIG_MUX |
0.1.58 |
ALT |
0 |
BY |
1 |
SLICE0:DXMUX |
0.1.11 |
SLICE1:DXMUX |
0.2.11 |
SLICE2:DXMUX |
0.1.43 |
SLICE3:DXMUX |
0.2.43 |
BX |
0 |
X |
1 |
SLICE0:DYMUX |
0.1.27 |
SLICE1:DYMUX |
0.2.27 |
SLICE2:DYMUX |
0.1.59 |
SLICE3:DYMUX |
0.2.59 |
BY |
0 |
Y |
1 |
SLICE0:F |
0.0.0 |
0.0.1 |
0.0.2 |
0.0.3 |
0.0.4 |
0.0.5 |
0.0.6 |
0.0.7 |
0.0.8 |
0.0.9 |
0.0.10 |
0.0.11 |
0.0.12 |
0.0.13 |
0.0.14 |
0.0.15 |
SLICE0:G |
0.0.16 |
0.0.17 |
0.0.18 |
0.0.19 |
0.0.20 |
0.0.21 |
0.0.22 |
0.0.23 |
0.0.24 |
0.0.25 |
0.0.26 |
0.0.27 |
0.0.28 |
0.0.29 |
0.0.30 |
0.0.31 |
SLICE1:F |
0.3.0 |
0.3.1 |
0.3.2 |
0.3.3 |
0.3.4 |
0.3.5 |
0.3.6 |
0.3.7 |
0.3.8 |
0.3.9 |
0.3.10 |
0.3.11 |
0.3.12 |
0.3.13 |
0.3.14 |
0.3.15 |
SLICE1:G |
0.3.16 |
0.3.17 |
0.3.18 |
0.3.19 |
0.3.20 |
0.3.21 |
0.3.22 |
0.3.23 |
0.3.24 |
0.3.25 |
0.3.26 |
0.3.27 |
0.3.28 |
0.3.29 |
0.3.30 |
0.3.31 |
SLICE2:F |
0.0.32 |
0.0.33 |
0.0.34 |
0.0.35 |
0.0.36 |
0.0.37 |
0.0.38 |
0.0.39 |
0.0.40 |
0.0.41 |
0.0.42 |
0.0.43 |
0.0.44 |
0.0.45 |
0.0.46 |
0.0.47 |
SLICE2:G |
0.0.48 |
0.0.49 |
0.0.50 |
0.0.51 |
0.0.52 |
0.0.53 |
0.0.54 |
0.0.55 |
0.0.56 |
0.0.57 |
0.0.58 |
0.0.59 |
0.0.60 |
0.0.61 |
0.0.62 |
0.0.63 |
SLICE3:F |
0.3.32 |
0.3.33 |
0.3.34 |
0.3.35 |
0.3.36 |
0.3.37 |
0.3.38 |
0.3.39 |
0.3.40 |
0.3.41 |
0.3.42 |
0.3.43 |
0.3.44 |
0.3.45 |
0.3.46 |
0.3.47 |
SLICE3:G |
0.3.48 |
0.3.49 |
0.3.50 |
0.3.51 |
0.3.52 |
0.3.53 |
0.3.54 |
0.3.55 |
0.3.56 |
0.3.57 |
0.3.58 |
0.3.59 |
0.3.60 |
0.3.61 |
0.3.62 |
0.3.63 |
inverted
|
~[15] |
~[14] |
~[13] |
~[12] |
~[11] |
~[10] |
~[9] |
~[8] |
~[7] |
~[6] |
~[5] |
~[4] |
~[3] |
~[2] |
~[1] |
~[0] |
SLICE0:FFX_INIT |
0.1.18 |
SLICE0:FFX_SRVAL |
0.1.14 |
SLICE0:FFY_INIT |
0.1.21 |
SLICE0:FFY_SRVAL |
0.1.24 |
SLICE0:FF_SR_ENABLE |
0.1.17 |
SLICE0:F_RAM |
0.1.13 |
SLICE0:F_SHIFT |
0.1.8 |
SLICE0:G_RAM |
0.1.12 |
SLICE0:G_SHIFT |
0.1.6 |
SLICE1:FFX_INIT |
0.2.18 |
SLICE1:FFX_SRVAL |
0.2.14 |
SLICE1:FFY_INIT |
0.2.21 |
SLICE1:FFY_SRVAL |
0.2.24 |
SLICE2:FFX_INIT |
0.1.50 |
SLICE2:FFX_SRVAL |
0.1.46 |
SLICE2:FFY_INIT |
0.1.53 |
SLICE2:FFY_SRVAL |
0.1.56 |
SLICE2:FF_SR_ENABLE |
0.1.49 |
SLICE2:F_RAM |
0.1.45 |
SLICE2:F_SHIFT |
0.1.40 |
SLICE2:G_RAM |
0.1.44 |
SLICE2:G_SHIFT |
0.1.38 |
SLICE3:FFX_INIT |
0.2.50 |
SLICE3:FFX_SRVAL |
0.2.46 |
SLICE3:FFY_INIT |
0.2.53 |
SLICE3:FFY_SRVAL |
0.2.56 |
inverted
|
~[0] |
SLICE0:FF_LATCH |
0.1.22 |
SLICE0:FF_REV_ENABLE |
0.1.23 |
SLICE0:FF_SR_SYNC |
0.1.19 |
SLICE0:INV.BX |
0.5.14 |
SLICE0:INV.BY |
0.5.27 |
SLICE0:SLICEWE0USED |
0.2.17 |
SLICE0:SLICEWE1USED |
0.1.20 |
SLICE1:FF_LATCH |
0.2.22 |
SLICE1:FF_REV_ENABLE |
0.2.23 |
SLICE1:FF_SR_SYNC |
0.2.19 |
SLICE1:INV.BX |
0.5.28 |
SLICE1:INV.BY |
0.5.31 |
SLICE2:FF_LATCH |
0.1.54 |
SLICE2:FF_REV_ENABLE |
0.1.55 |
SLICE2:FF_SR_SYNC |
0.1.51 |
SLICE2:INV.BX |
0.5.32 |
SLICE2:INV.BY |
0.5.35 |
SLICE2:SLICEWE0USED |
0.2.49 |
SLICE3:FF_LATCH |
0.2.54 |
SLICE3:FF_REV_ENABLE |
0.2.55 |
SLICE3:FF_SR_SYNC |
0.2.51 |
SLICE3:INV.BX |
0.5.36 |
SLICE3:INV.BY |
0.5.49 |
non-inverted
|
[0] |
SLICE0:FXMUX |
0.1.16 |
0.1.2 |
SLICE1:FXMUX |
0.2.16 |
0.2.2 |
SLICE2:FXMUX |
0.1.48 |
0.1.34 |
SLICE3:FXMUX |
0.2.48 |
0.2.34 |
F |
0 |
0 |
F5 |
0 |
1 |
FXOR |
1 |
1 |
SLICE0:GYMUX |
0.1.28 |
0.1.25 |
SLICE1:GYMUX |
0.2.28 |
0.2.25 |
SLICE2:GYMUX |
0.1.60 |
0.1.57 |
SLICE3:GYMUX |
0.2.60 |
0.2.57 |
G |
0 |
0 |
FX |
0 |
1 |
GXOR |
1 |
1 |
SLICE0:XBMUX |
0.1.1 |
SLICE2:XBMUX |
0.1.33 |
FCY |
0 |
FMC15 |
1 |
SLICE0:YBMUX |
0.1.5 |
SLICE2:YBMUX |
0.1.37 |
GCY |
0 |
GMC15 |
1 |
TODO: wtf is this even
This tile overlaps IOI.*
.
This tile overlaps top-left interconnect tile.
fpgacore RANDOR_INIT bittile 0
Bit | Frame |
0 |
63 |
RANDOR_INIT:MODE[0]
|
62 |
- |
61 |
- |
60 |
- |
59 |
- |
58 |
- |
57 |
- |
56 |
- |
55 |
- |
54 |
- |
53 |
- |
52 |
- |
51 |
- |
50 |
- |
49 |
- |
48 |
- |
47 |
- |
46 |
- |
45 |
- |
44 |
- |
43 |
- |
42 |
- |
41 |
- |
40 |
- |
39 |
- |
38 |
- |
37 |
- |
36 |
- |
35 |
- |
34 |
- |
33 |
- |
32 |
- |
31 |
- |
30 |
- |
29 |
- |
28 |
- |
27 |
- |
26 |
- |
25 |
- |
24 |
- |
23 |
- |
22 |
- |
21 |
- |
20 |
- |
19 |
- |
18 |
- |
17 |
- |
16 |
- |
15 |
- |
14 |
- |
13 |
- |
12 |
- |
11 |
- |
10 |
- |
9 |
- |
8 |
- |
7 |
- |
6 |
- |
5 |
- |
4 |
- |
3 |
- |
2 |
- |
1 |
- |
0 |
- |
RANDOR_INIT:MODE |
0.0.63 |
OR |
0 |
AND |
1 |