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DSP

Tile DSP

Cells: 5

Bel DSP0

ultrascale DSP bel DSP0
PinDirectionWires
A0inputTCELL0:IMUX.IMUX.0
A1inputTCELL0:IMUX.IMUX.2
A10inputTCELL1:IMUX.IMUX.4
A11inputTCELL1:IMUX.IMUX.6
A12inputTCELL1:IMUX.IMUX.8
A13inputTCELL1:IMUX.IMUX.10
A14inputTCELL1:IMUX.IMUX.12
A15inputTCELL1:IMUX.IMUX.14
A16inputTCELL2:IMUX.IMUX.0
A17inputTCELL2:IMUX.IMUX.2
A18inputTCELL2:IMUX.IMUX.4
A19inputTCELL2:IMUX.IMUX.6
A2inputTCELL0:IMUX.IMUX.4
A20inputTCELL2:IMUX.IMUX.8
A21inputTCELL2:IMUX.IMUX.10
A22inputTCELL2:IMUX.IMUX.12
A23inputTCELL2:IMUX.IMUX.14
A24inputTCELL3:IMUX.IMUX.0
A25inputTCELL3:IMUX.IMUX.2
A26inputTCELL3:IMUX.IMUX.4
A27inputTCELL3:IMUX.IMUX.6
A28inputTCELL3:IMUX.IMUX.8
A29inputTCELL3:IMUX.IMUX.10
A3inputTCELL0:IMUX.IMUX.6
A4inputTCELL0:IMUX.IMUX.8
A5inputTCELL0:IMUX.IMUX.10
A6inputTCELL0:IMUX.IMUX.12
A7inputTCELL0:IMUX.IMUX.14
A8inputTCELL1:IMUX.IMUX.0
A9inputTCELL1:IMUX.IMUX.2
ALUMODE0inputTCELL0:IMUX.IMUX.1
ALUMODE1inputTCELL0:IMUX.IMUX.5
ALUMODE2inputTCELL0:IMUX.IMUX.9
ALUMODE3inputTCELL0:IMUX.IMUX.13
B0inputTCELL0:IMUX.IMUX.17
B1inputTCELL0:IMUX.IMUX.21
B10inputTCELL1:IMUX.IMUX.25
B11inputTCELL1:IMUX.IMUX.29
B12inputTCELL1:IMUX.IMUX.33
B13inputTCELL1:IMUX.IMUX.37
B14inputTCELL1:IMUX.IMUX.41
B15inputTCELL1:IMUX.IMUX.45
B16inputTCELL2:IMUX.IMUX.17
B17inputTCELL2:IMUX.IMUX.21
B2inputTCELL0:IMUX.IMUX.25
B3inputTCELL0:IMUX.IMUX.29
B4inputTCELL0:IMUX.IMUX.33
B5inputTCELL0:IMUX.IMUX.37
B6inputTCELL0:IMUX.IMUX.41
B7inputTCELL0:IMUX.IMUX.45
B8inputTCELL1:IMUX.IMUX.17
B9inputTCELL1:IMUX.IMUX.21
C0inputTCELL0:IMUX.IMUX.18
C1inputTCELL0:IMUX.IMUX.22
C10inputTCELL1:IMUX.IMUX.26
C11inputTCELL1:IMUX.IMUX.30
C12inputTCELL1:IMUX.IMUX.34
C13inputTCELL1:IMUX.IMUX.38
C14inputTCELL1:IMUX.IMUX.42
C15inputTCELL1:IMUX.IMUX.46
C16inputTCELL2:IMUX.IMUX.18
C17inputTCELL2:IMUX.IMUX.22
C18inputTCELL2:IMUX.IMUX.26
C19inputTCELL2:IMUX.IMUX.30
C2inputTCELL0:IMUX.IMUX.26
C20inputTCELL2:IMUX.IMUX.34
C21inputTCELL2:IMUX.IMUX.38
C22inputTCELL2:IMUX.IMUX.42
C23inputTCELL2:IMUX.IMUX.46
C24inputTCELL3:IMUX.IMUX.18
C25inputTCELL3:IMUX.IMUX.22
C26inputTCELL3:IMUX.IMUX.26
C27inputTCELL3:IMUX.IMUX.30
C28inputTCELL3:IMUX.IMUX.34
C29inputTCELL3:IMUX.IMUX.38
C3inputTCELL0:IMUX.IMUX.30
C30inputTCELL3:IMUX.IMUX.42
C31inputTCELL3:IMUX.IMUX.46
C32inputTCELL4:IMUX.IMUX.18
C33inputTCELL4:IMUX.IMUX.22
C34inputTCELL4:IMUX.IMUX.26
C35inputTCELL4:IMUX.IMUX.30
C36inputTCELL4:IMUX.IMUX.34
C37inputTCELL4:IMUX.IMUX.38
C38inputTCELL4:IMUX.IMUX.42
C39inputTCELL4:IMUX.IMUX.46
C4inputTCELL0:IMUX.IMUX.34
C40inputTCELL0:IMUX.IMUX.16
C41inputTCELL0:IMUX.IMUX.24
C42inputTCELL0:IMUX.IMUX.32
C43inputTCELL0:IMUX.IMUX.40
C44inputTCELL1:IMUX.IMUX.16
C45inputTCELL1:IMUX.IMUX.24
C46inputTCELL1:IMUX.IMUX.32
C47inputTCELL1:IMUX.IMUX.40
C5inputTCELL0:IMUX.IMUX.38
C6inputTCELL0:IMUX.IMUX.43
C7inputTCELL0:IMUX.IMUX.46
C8inputTCELL1:IMUX.IMUX.18
C9inputTCELL1:IMUX.IMUX.22
CARRYINinputTCELL2:IMUX.IMUX.28
CARRYINSEL0inputTCELL0:IMUX.BYP.3
CARRYINSEL1inputTCELL0:IMUX.BYP.7
CARRYINSEL2inputTCELL0:IMUX.BYP.11
CARRYOUT0outputTCELL1:OUT.17.TMIN
CARRYOUT1outputTCELL3:OUT.1.TMIN
CARRYOUT2outputTCELL4:OUT.9.TMIN
CARRYOUT3outputTCELL2:OUT.12.TMIN
CEA1_BinputTCELL0:IMUX.CTRL.1
CEA2_BinputTCELL0:IMUX.CTRL.3
CEAD_BinputTCELL1:IMUX.CTRL.7
CEALUMODEinputTCELL0:IMUX.IMUX.11
CEB1_BinputTCELL1:IMUX.CTRL.1
CEB2_BinputTCELL0:IMUX.CTRL.7
CECARRYINinputTCELL2:IMUX.IMUX.24
CECTRLinputTCELL2:IMUX.IMUX.16
CEC_BinputTCELL0:IMUX.CTRL.5
CED_BinputTCELL1:IMUX.CTRL.5
CEINMODEinputTCELL0:IMUX.IMUX.7
CEM_BinputTCELL1:IMUX.CTRL.3
CEP_BinputTCELL2:IMUX.CTRL.3
CLK_BinputTCELL1:IMUX.CTRL.4
DIN0inputTCELL0:IMUX.BYP.0
DIN1inputTCELL0:IMUX.BYP.2
DIN10inputTCELL1:IMUX.BYP.4
DIN11inputTCELL1:IMUX.BYP.6
DIN12inputTCELL1:IMUX.BYP.8
DIN13inputTCELL1:IMUX.BYP.10
DIN14inputTCELL1:IMUX.BYP.12
DIN15inputTCELL1:IMUX.BYP.14
DIN16inputTCELL2:IMUX.BYP.0
DIN17inputTCELL2:IMUX.BYP.2
DIN18inputTCELL2:IMUX.BYP.4
DIN19inputTCELL2:IMUX.BYP.6
DIN2inputTCELL0:IMUX.BYP.4
DIN20inputTCELL2:IMUX.BYP.8
DIN21inputTCELL2:IMUX.BYP.10
DIN22inputTCELL2:IMUX.BYP.12
DIN23inputTCELL2:IMUX.BYP.14
DIN24inputTCELL3:IMUX.BYP.0
DIN25inputTCELL3:IMUX.BYP.2
DIN26inputTCELL3:IMUX.BYP.4
DIN3inputTCELL0:IMUX.BYP.6
DIN4inputTCELL0:IMUX.BYP.8
DIN5inputTCELL0:IMUX.BYP.10
DIN6inputTCELL0:IMUX.BYP.12
DIN7inputTCELL0:IMUX.BYP.14
DIN8inputTCELL1:IMUX.BYP.0
DIN9inputTCELL1:IMUX.BYP.2
INMODE0inputTCELL0:IMUX.IMUX.3
INMODE1inputTCELL1:IMUX.IMUX.1
INMODE2inputTCELL1:IMUX.IMUX.3
INMODE3inputTCELL0:IMUX.IMUX.44
INMODE4inputTCELL2:IMUX.IMUX.25
OPMODE0inputTCELL0:IMUX.IMUX.20
OPMODE1inputTCELL0:IMUX.IMUX.28
OPMODE2inputTCELL0:IMUX.IMUX.36
OPMODE3inputTCELL0:IMUX.IMUX.15
OPMODE4inputTCELL1:IMUX.IMUX.20
OPMODE5inputTCELL1:IMUX.IMUX.28
OPMODE6inputTCELL1:IMUX.IMUX.36
OPMODE7inputTCELL1:IMUX.IMUX.44
OPMODE8inputTCELL2:IMUX.IMUX.20
OVERFLOWoutputTCELL1:OUT.9.TMIN
P0outputTCELL0:OUT.2.TMIN
P1outputTCELL0:OUT.6.TMIN
P10outputTCELL1:OUT.10.TMIN
P11outputTCELL1:OUT.14.TMIN
P12outputTCELL1:OUT.18.TMIN
P13outputTCELL1:OUT.22.TMIN
P14outputTCELL1:OUT.26.TMIN
P15outputTCELL1:OUT.30.TMIN
P16outputTCELL2:OUT.2.TMIN
P17outputTCELL2:OUT.6.TMIN
P18outputTCELL2:OUT.10.TMIN
P19outputTCELL2:OUT.14.TMIN
P2outputTCELL0:OUT.10.TMIN
P20outputTCELL2:OUT.18.TMIN
P21outputTCELL2:OUT.22.TMIN
P22outputTCELL2:OUT.26.TMIN
P23outputTCELL2:OUT.30.TMIN
P24outputTCELL3:OUT.2.TMIN
P25outputTCELL3:OUT.6.TMIN
P26outputTCELL3:OUT.10.TMIN
P27outputTCELL3:OUT.14.TMIN
P28outputTCELL3:OUT.18.TMIN
P29outputTCELL3:OUT.22.TMIN
P3outputTCELL0:OUT.14.TMIN
P30outputTCELL3:OUT.26.TMIN
P31outputTCELL3:OUT.30.TMIN
P32outputTCELL4:OUT.2.TMIN
P33outputTCELL4:OUT.6.TMIN
P34outputTCELL4:OUT.10.TMIN
P35outputTCELL4:OUT.14.TMIN
P36outputTCELL4:OUT.18.TMIN
P37outputTCELL4:OUT.22.TMIN
P38outputTCELL4:OUT.26.TMIN
P39outputTCELL4:OUT.30.TMIN
P4outputTCELL0:OUT.18.TMIN
P40outputTCELL0:OUT.0.TMIN
P41outputTCELL0:OUT.8.TMIN
P42outputTCELL0:OUT.16.TMIN
P43outputTCELL0:OUT.24.TMIN
P44outputTCELL1:OUT.0.TMIN
P45outputTCELL1:OUT.8.TMIN
P46outputTCELL1:OUT.16.TMIN
P47outputTCELL1:OUT.24.TMIN
P5outputTCELL0:OUT.22.TMIN
P6outputTCELL0:OUT.26.TMIN
P7outputTCELL0:OUT.30.TMIN
P8outputTCELL1:OUT.2.TMIN
P9outputTCELL1:OUT.6.TMIN
PATTERN_B_DETECToutputTCELL0:OUT.4.TMIN
PATTERN_DETECToutputTCELL0:OUT.28.TMIN
RSTALLCARRYIN_BinputTCELL2:IMUX.CTRL.2
RSTALUMODE_BinputTCELL0:IMUX.CTRL.4
RSTA_BinputTCELL0:IMUX.CTRL.2
RSTB_BinputTCELL1:IMUX.CTRL.2
RSTCTRL_BinputTCELL2:IMUX.CTRL.1
RSTC_BinputTCELL0:IMUX.CTRL.6
RSTD_BinputTCELL1:IMUX.CTRL.6
RSTINMODE_BinputTCELL0:IMUX.CTRL.0
RSTM_BinputTCELL1:IMUX.CTRL.0
RSTP_BinputTCELL2:IMUX.CTRL.0
UNDERFLOWoutputTCELL0:OUT.17.TMIN
XOROUT0outputTCELL0:OUT.13.TMIN
XOROUT1outputTCELL0:OUT.21.TMIN
XOROUT2outputTCELL0:OUT.29.TMIN
XOROUT3outputTCELL1:OUT.5.TMIN
XOROUT4outputTCELL1:OUT.13.TMIN
XOROUT5outputTCELL1:OUT.21.TMIN
XOROUT6outputTCELL1:OUT.29.TMIN
XOROUT7outputTCELL2:OUT.5.TMIN

Bel DSP1

ultrascale DSP bel DSP1
PinDirectionWires
A0inputTCELL1:IMUX.IMUX.5
A1inputTCELL1:IMUX.IMUX.7
A10inputTCELL2:IMUX.IMUX.9
A11inputTCELL2:IMUX.IMUX.11
A12inputTCELL2:IMUX.IMUX.13
A13inputTCELL2:IMUX.IMUX.15
A14inputTCELL3:IMUX.IMUX.1
A15inputTCELL3:IMUX.IMUX.3
A16inputTCELL3:IMUX.IMUX.5
A17inputTCELL3:IMUX.IMUX.7
A18inputTCELL3:IMUX.IMUX.9
A19inputTCELL3:IMUX.IMUX.11
A2inputTCELL1:IMUX.IMUX.9
A20inputTCELL3:IMUX.IMUX.13
A21inputTCELL3:IMUX.IMUX.15
A22inputTCELL4:IMUX.IMUX.1
A23inputTCELL4:IMUX.IMUX.3
A24inputTCELL4:IMUX.IMUX.5
A25inputTCELL4:IMUX.IMUX.7
A26inputTCELL4:IMUX.IMUX.9
A27inputTCELL4:IMUX.IMUX.11
A28inputTCELL4:IMUX.IMUX.13
A29inputTCELL4:IMUX.IMUX.15
A3inputTCELL1:IMUX.IMUX.11
A4inputTCELL1:IMUX.IMUX.13
A5inputTCELL1:IMUX.IMUX.15
A6inputTCELL2:IMUX.IMUX.1
A7inputTCELL2:IMUX.IMUX.3
A8inputTCELL2:IMUX.IMUX.5
A9inputTCELL2:IMUX.IMUX.7
ALUMODE0inputTCELL3:IMUX.IMUX.12
ALUMODE1inputTCELL4:IMUX.IMUX.0
ALUMODE2inputTCELL4:IMUX.IMUX.4
ALUMODE3inputTCELL4:IMUX.IMUX.8
B0inputTCELL2:IMUX.IMUX.33
B1inputTCELL2:IMUX.IMUX.37
B10inputTCELL3:IMUX.IMUX.41
B11inputTCELL3:IMUX.IMUX.45
B12inputTCELL4:IMUX.IMUX.17
B13inputTCELL4:IMUX.IMUX.21
B14inputTCELL4:IMUX.IMUX.25
B15inputTCELL4:IMUX.IMUX.29
B16inputTCELL4:IMUX.IMUX.33
B17inputTCELL4:IMUX.IMUX.37
B2inputTCELL2:IMUX.IMUX.41
B3inputTCELL2:IMUX.IMUX.45
B4inputTCELL3:IMUX.IMUX.17
B5inputTCELL3:IMUX.IMUX.21
B6inputTCELL3:IMUX.IMUX.25
B7inputTCELL3:IMUX.IMUX.29
B8inputTCELL3:IMUX.IMUX.33
B9inputTCELL3:IMUX.IMUX.37
C0inputTCELL0:IMUX.IMUX.19
C1inputTCELL0:IMUX.IMUX.23
C10inputTCELL1:IMUX.IMUX.27
C11inputTCELL1:IMUX.IMUX.31
C12inputTCELL1:IMUX.IMUX.35
C13inputTCELL1:IMUX.IMUX.39
C14inputTCELL1:IMUX.IMUX.43
C15inputTCELL1:IMUX.IMUX.47
C16inputTCELL2:IMUX.IMUX.19
C17inputTCELL2:IMUX.IMUX.23
C18inputTCELL2:IMUX.IMUX.27
C19inputTCELL2:IMUX.IMUX.31
C2inputTCELL0:IMUX.IMUX.27
C20inputTCELL2:IMUX.IMUX.35
C21inputTCELL2:IMUX.IMUX.39
C22inputTCELL2:IMUX.IMUX.43
C23inputTCELL2:IMUX.IMUX.47
C24inputTCELL3:IMUX.IMUX.19
C25inputTCELL3:IMUX.IMUX.23
C26inputTCELL3:IMUX.IMUX.27
C27inputTCELL3:IMUX.IMUX.31
C28inputTCELL3:IMUX.IMUX.35
C29inputTCELL3:IMUX.IMUX.39
C3inputTCELL0:IMUX.IMUX.31
C30inputTCELL3:IMUX.IMUX.43
C31inputTCELL3:IMUX.IMUX.47
C32inputTCELL4:IMUX.IMUX.19
C33inputTCELL4:IMUX.IMUX.23
C34inputTCELL4:IMUX.IMUX.27
C35inputTCELL4:IMUX.IMUX.31
C36inputTCELL4:IMUX.IMUX.35
C37inputTCELL4:IMUX.IMUX.39
C38inputTCELL4:IMUX.IMUX.43
C39inputTCELL4:IMUX.IMUX.47
C4inputTCELL0:IMUX.IMUX.35
C40inputTCELL2:IMUX.IMUX.32
C41inputTCELL2:IMUX.IMUX.40
C42inputTCELL3:IMUX.IMUX.16
C43inputTCELL3:IMUX.IMUX.24
C44inputTCELL3:IMUX.IMUX.32
C45inputTCELL3:IMUX.IMUX.40
C46inputTCELL4:IMUX.IMUX.16
C47inputTCELL4:IMUX.IMUX.24
C5inputTCELL0:IMUX.IMUX.39
C6inputTCELL0:IMUX.IMUX.42
C7inputTCELL0:IMUX.IMUX.47
C8inputTCELL1:IMUX.IMUX.19
C9inputTCELL1:IMUX.IMUX.23
CARRYINinputTCELL2:IMUX.IMUX.29
CARRYINSEL0inputTCELL4:IMUX.BYP.10
CARRYINSEL1inputTCELL4:IMUX.BYP.12
CARRYINSEL2inputTCELL4:IMUX.BYP.14
CARRYOUT0outputTCELL1:OUT.12.TMIN
CARRYOUT1outputTCELL2:OUT.28.TMIN
CARRYOUT2outputTCELL4:OUT.12.TMIN
CARRYOUT3outputTCELL2:OUT.13.TMIN
CEA1_BinputTCELL4:IMUX.CTRL.1
CEA2_BinputTCELL4:IMUX.CTRL.3
CEAD_BinputTCELL3:IMUX.CTRL.7
CEALUMODEinputTCELL4:IMUX.IMUX.2
CEB1_BinputTCELL3:IMUX.CTRL.3
CEB2_BinputTCELL4:IMUX.CTRL.7
CECARRYINinputTCELL3:IMUX.IMUX.14
CECTRLinputTCELL4:IMUX.IMUX.41
CEC_BinputTCELL2:IMUX.CTRL.5
CED_BinputTCELL3:IMUX.CTRL.1
CEINMODEinputTCELL4:IMUX.IMUX.6
CEM_BinputTCELL3:IMUX.CTRL.5
CEP_BinputTCELL2:IMUX.CTRL.7
CLK_BinputTCELL3:IMUX.CTRL.4
DIN0inputTCELL1:IMUX.BYP.11
DIN1inputTCELL1:IMUX.BYP.13
DIN10inputTCELL2:IMUX.BYP.15
DIN11inputTCELL3:IMUX.BYP.1
DIN12inputTCELL3:IMUX.BYP.3
DIN13inputTCELL3:IMUX.BYP.5
DIN14inputTCELL3:IMUX.BYP.7
DIN15inputTCELL3:IMUX.BYP.9
DIN16inputTCELL3:IMUX.BYP.11
DIN17inputTCELL3:IMUX.BYP.13
DIN18inputTCELL3:IMUX.BYP.15
DIN19inputTCELL4:IMUX.BYP.1
DIN2inputTCELL1:IMUX.BYP.15
DIN20inputTCELL4:IMUX.BYP.3
DIN21inputTCELL4:IMUX.BYP.5
DIN22inputTCELL4:IMUX.BYP.7
DIN23inputTCELL4:IMUX.BYP.9
DIN24inputTCELL4:IMUX.BYP.11
DIN25inputTCELL4:IMUX.BYP.13
DIN26inputTCELL4:IMUX.BYP.15
DIN3inputTCELL2:IMUX.BYP.1
DIN4inputTCELL2:IMUX.BYP.3
DIN5inputTCELL2:IMUX.BYP.5
DIN6inputTCELL2:IMUX.BYP.7
DIN7inputTCELL2:IMUX.BYP.9
DIN8inputTCELL2:IMUX.BYP.11
DIN9inputTCELL2:IMUX.BYP.13
INMODE0inputTCELL4:IMUX.IMUX.44
INMODE1inputTCELL4:IMUX.IMUX.10
INMODE2inputTCELL4:IMUX.IMUX.40
INMODE3inputTCELL4:IMUX.IMUX.32
INMODE4inputTCELL4:IMUX.IMUX.14
OPMODE0inputTCELL2:IMUX.IMUX.36
OPMODE1inputTCELL2:IMUX.IMUX.44
OPMODE2inputTCELL3:IMUX.IMUX.20
OPMODE3inputTCELL3:IMUX.IMUX.28
OPMODE4inputTCELL3:IMUX.IMUX.36
OPMODE5inputTCELL3:IMUX.IMUX.44
OPMODE6inputTCELL4:IMUX.IMUX.20
OPMODE7inputTCELL4:IMUX.IMUX.28
OPMODE8inputTCELL4:IMUX.IMUX.36
OVERFLOWoutputTCELL3:OUT.25.TMIN
P0outputTCELL0:OUT.3.TMIN
P1outputTCELL0:OUT.7.TMIN
P10outputTCELL1:OUT.11.TMIN
P11outputTCELL1:OUT.15.TMIN
P12outputTCELL1:OUT.19.TMIN
P13outputTCELL1:OUT.23.TMIN
P14outputTCELL1:OUT.27.TMIN
P15outputTCELL1:OUT.31.TMIN
P16outputTCELL2:OUT.3.TMIN
P17outputTCELL2:OUT.7.TMIN
P18outputTCELL2:OUT.11.TMIN
P19outputTCELL2:OUT.15.TMIN
P2outputTCELL0:OUT.11.TMIN
P20outputTCELL2:OUT.19.TMIN
P21outputTCELL2:OUT.23.TMIN
P22outputTCELL2:OUT.27.TMIN
P23outputTCELL2:OUT.31.TMIN
P24outputTCELL3:OUT.3.TMIN
P25outputTCELL3:OUT.7.TMIN
P26outputTCELL3:OUT.11.TMIN
P27outputTCELL3:OUT.15.TMIN
P28outputTCELL3:OUT.19.TMIN
P29outputTCELL3:OUT.23.TMIN
P3outputTCELL0:OUT.15.TMIN
P30outputTCELL3:OUT.27.TMIN
P31outputTCELL3:OUT.31.TMIN
P32outputTCELL4:OUT.3.TMIN
P33outputTCELL4:OUT.7.TMIN
P34outputTCELL4:OUT.11.TMIN
P35outputTCELL4:OUT.15.TMIN
P36outputTCELL4:OUT.19.TMIN
P37outputTCELL4:OUT.23.TMIN
P38outputTCELL4:OUT.27.TMIN
P39outputTCELL4:OUT.31.TMIN
P4outputTCELL0:OUT.19.TMIN
P40outputTCELL2:OUT.16.TMIN
P41outputTCELL2:OUT.24.TMIN
P42outputTCELL3:OUT.0.TMIN
P43outputTCELL3:OUT.8.TMIN
P44outputTCELL3:OUT.16.TMIN
P45outputTCELL3:OUT.24.TMIN
P46outputTCELL4:OUT.0.TMIN
P47outputTCELL4:OUT.8.TMIN
P5outputTCELL0:OUT.23.TMIN
P6outputTCELL0:OUT.27.TMIN
P7outputTCELL0:OUT.31.TMIN
P8outputTCELL1:OUT.3.TMIN
P9outputTCELL1:OUT.7.TMIN
PATTERN_B_DETECToutputTCELL2:OUT.20.TMIN
PATTERN_DETECToutputTCELL4:OUT.17.TMIN
RSTALLCARRYIN_BinputTCELL4:IMUX.CTRL.6
RSTALUMODE_BinputTCELL4:IMUX.CTRL.0
RSTA_BinputTCELL4:IMUX.CTRL.2
RSTB_BinputTCELL3:IMUX.CTRL.0
RSTCTRL_BinputTCELL4:IMUX.CTRL.5
RSTC_BinputTCELL2:IMUX.CTRL.6
RSTD_BinputTCELL3:IMUX.CTRL.2
RSTINMODE_BinputTCELL4:IMUX.CTRL.4
RSTM_BinputTCELL3:IMUX.CTRL.6
RSTP_BinputTCELL2:IMUX.CTRL.4
UNDERFLOWoutputTCELL3:OUT.4.TMIN
XOROUT0outputTCELL2:OUT.29.TMIN
XOROUT1outputTCELL3:OUT.5.TMIN
XOROUT2outputTCELL3:OUT.13.TMIN
XOROUT3outputTCELL3:OUT.21.TMIN
XOROUT4outputTCELL3:OUT.29.TMIN
XOROUT5outputTCELL4:OUT.5.TMIN
XOROUT6outputTCELL4:OUT.13.TMIN
XOROUT7outputTCELL4:OUT.21.TMIN

Bel wires

ultrascale DSP bel wires
WirePins
TCELL0:OUT.0.TMINDSP0.P40
TCELL0:OUT.2.TMINDSP0.P0
TCELL0:OUT.3.TMINDSP1.P0
TCELL0:OUT.4.TMINDSP0.PATTERN_B_DETECT
TCELL0:OUT.6.TMINDSP0.P1
TCELL0:OUT.7.TMINDSP1.P1
TCELL0:OUT.8.TMINDSP0.P41
TCELL0:OUT.10.TMINDSP0.P2
TCELL0:OUT.11.TMINDSP1.P2
TCELL0:OUT.13.TMINDSP0.XOROUT0
TCELL0:OUT.14.TMINDSP0.P3
TCELL0:OUT.15.TMINDSP1.P3
TCELL0:OUT.16.TMINDSP0.P42
TCELL0:OUT.17.TMINDSP0.UNDERFLOW
TCELL0:OUT.18.TMINDSP0.P4
TCELL0:OUT.19.TMINDSP1.P4
TCELL0:OUT.21.TMINDSP0.XOROUT1
TCELL0:OUT.22.TMINDSP0.P5
TCELL0:OUT.23.TMINDSP1.P5
TCELL0:OUT.24.TMINDSP0.P43
TCELL0:OUT.26.TMINDSP0.P6
TCELL0:OUT.27.TMINDSP1.P6
TCELL0:OUT.28.TMINDSP0.PATTERN_DETECT
TCELL0:OUT.29.TMINDSP0.XOROUT2
TCELL0:OUT.30.TMINDSP0.P7
TCELL0:OUT.31.TMINDSP1.P7
TCELL0:IMUX.CTRL.0DSP0.RSTINMODE_B
TCELL0:IMUX.CTRL.1DSP0.CEA1_B
TCELL0:IMUX.CTRL.2DSP0.RSTA_B
TCELL0:IMUX.CTRL.3DSP0.CEA2_B
TCELL0:IMUX.CTRL.4DSP0.RSTALUMODE_B
TCELL0:IMUX.CTRL.5DSP0.CEC_B
TCELL0:IMUX.CTRL.6DSP0.RSTC_B
TCELL0:IMUX.CTRL.7DSP0.CEB2_B
TCELL0:IMUX.BYP.0DSP0.DIN0
TCELL0:IMUX.BYP.2DSP0.DIN1
TCELL0:IMUX.BYP.3DSP0.CARRYINSEL0
TCELL0:IMUX.BYP.4DSP0.DIN2
TCELL0:IMUX.BYP.6DSP0.DIN3
TCELL0:IMUX.BYP.7DSP0.CARRYINSEL1
TCELL0:IMUX.BYP.8DSP0.DIN4
TCELL0:IMUX.BYP.10DSP0.DIN5
TCELL0:IMUX.BYP.11DSP0.CARRYINSEL2
TCELL0:IMUX.BYP.12DSP0.DIN6
TCELL0:IMUX.BYP.14DSP0.DIN7
TCELL0:IMUX.IMUX.0DSP0.A0
TCELL0:IMUX.IMUX.1DSP0.ALUMODE0
TCELL0:IMUX.IMUX.2DSP0.A1
TCELL0:IMUX.IMUX.3DSP0.INMODE0
TCELL0:IMUX.IMUX.4DSP0.A2
TCELL0:IMUX.IMUX.5DSP0.ALUMODE1
TCELL0:IMUX.IMUX.6DSP0.A3
TCELL0:IMUX.IMUX.7DSP0.CEINMODE
TCELL0:IMUX.IMUX.8DSP0.A4
TCELL0:IMUX.IMUX.9DSP0.ALUMODE2
TCELL0:IMUX.IMUX.10DSP0.A5
TCELL0:IMUX.IMUX.11DSP0.CEALUMODE
TCELL0:IMUX.IMUX.12DSP0.A6
TCELL0:IMUX.IMUX.13DSP0.ALUMODE3
TCELL0:IMUX.IMUX.14DSP0.A7
TCELL0:IMUX.IMUX.15DSP0.OPMODE3
TCELL0:IMUX.IMUX.16DSP0.C40
TCELL0:IMUX.IMUX.17DSP0.B0
TCELL0:IMUX.IMUX.18DSP0.C0
TCELL0:IMUX.IMUX.19DSP1.C0
TCELL0:IMUX.IMUX.20DSP0.OPMODE0
TCELL0:IMUX.IMUX.21DSP0.B1
TCELL0:IMUX.IMUX.22DSP0.C1
TCELL0:IMUX.IMUX.23DSP1.C1
TCELL0:IMUX.IMUX.24DSP0.C41
TCELL0:IMUX.IMUX.25DSP0.B2
TCELL0:IMUX.IMUX.26DSP0.C2
TCELL0:IMUX.IMUX.27DSP1.C2
TCELL0:IMUX.IMUX.28DSP0.OPMODE1
TCELL0:IMUX.IMUX.29DSP0.B3
TCELL0:IMUX.IMUX.30DSP0.C3
TCELL0:IMUX.IMUX.31DSP1.C3
TCELL0:IMUX.IMUX.32DSP0.C42
TCELL0:IMUX.IMUX.33DSP0.B4
TCELL0:IMUX.IMUX.34DSP0.C4
TCELL0:IMUX.IMUX.35DSP1.C4
TCELL0:IMUX.IMUX.36DSP0.OPMODE2
TCELL0:IMUX.IMUX.37DSP0.B5
TCELL0:IMUX.IMUX.38DSP0.C5
TCELL0:IMUX.IMUX.39DSP1.C5
TCELL0:IMUX.IMUX.40DSP0.C43
TCELL0:IMUX.IMUX.41DSP0.B6
TCELL0:IMUX.IMUX.42DSP1.C6
TCELL0:IMUX.IMUX.43DSP0.C6
TCELL0:IMUX.IMUX.44DSP0.INMODE3
TCELL0:IMUX.IMUX.45DSP0.B7
TCELL0:IMUX.IMUX.46DSP0.C7
TCELL0:IMUX.IMUX.47DSP1.C7
TCELL1:OUT.0.TMINDSP0.P44
TCELL1:OUT.2.TMINDSP0.P8
TCELL1:OUT.3.TMINDSP1.P8
TCELL1:OUT.5.TMINDSP0.XOROUT3
TCELL1:OUT.6.TMINDSP0.P9
TCELL1:OUT.7.TMINDSP1.P9
TCELL1:OUT.8.TMINDSP0.P45
TCELL1:OUT.9.TMINDSP0.OVERFLOW
TCELL1:OUT.10.TMINDSP0.P10
TCELL1:OUT.11.TMINDSP1.P10
TCELL1:OUT.12.TMINDSP1.CARRYOUT0
TCELL1:OUT.13.TMINDSP0.XOROUT4
TCELL1:OUT.14.TMINDSP0.P11
TCELL1:OUT.15.TMINDSP1.P11
TCELL1:OUT.16.TMINDSP0.P46
TCELL1:OUT.17.TMINDSP0.CARRYOUT0
TCELL1:OUT.18.TMINDSP0.P12
TCELL1:OUT.19.TMINDSP1.P12
TCELL1:OUT.21.TMINDSP0.XOROUT5
TCELL1:OUT.22.TMINDSP0.P13
TCELL1:OUT.23.TMINDSP1.P13
TCELL1:OUT.24.TMINDSP0.P47
TCELL1:OUT.26.TMINDSP0.P14
TCELL1:OUT.27.TMINDSP1.P14
TCELL1:OUT.29.TMINDSP0.XOROUT6
TCELL1:OUT.30.TMINDSP0.P15
TCELL1:OUT.31.TMINDSP1.P15
TCELL1:IMUX.CTRL.0DSP0.RSTM_B
TCELL1:IMUX.CTRL.1DSP0.CEB1_B
TCELL1:IMUX.CTRL.2DSP0.RSTB_B
TCELL1:IMUX.CTRL.3DSP0.CEM_B
TCELL1:IMUX.CTRL.4DSP0.CLK_B
TCELL1:IMUX.CTRL.5DSP0.CED_B
TCELL1:IMUX.CTRL.6DSP0.RSTD_B
TCELL1:IMUX.CTRL.7DSP0.CEAD_B
TCELL1:IMUX.BYP.0DSP0.DIN8
TCELL1:IMUX.BYP.2DSP0.DIN9
TCELL1:IMUX.BYP.4DSP0.DIN10
TCELL1:IMUX.BYP.6DSP0.DIN11
TCELL1:IMUX.BYP.8DSP0.DIN12
TCELL1:IMUX.BYP.10DSP0.DIN13
TCELL1:IMUX.BYP.11DSP1.DIN0
TCELL1:IMUX.BYP.12DSP0.DIN14
TCELL1:IMUX.BYP.13DSP1.DIN1
TCELL1:IMUX.BYP.14DSP0.DIN15
TCELL1:IMUX.BYP.15DSP1.DIN2
TCELL1:IMUX.IMUX.0DSP0.A8
TCELL1:IMUX.IMUX.1DSP0.INMODE1
TCELL1:IMUX.IMUX.2DSP0.A9
TCELL1:IMUX.IMUX.3DSP0.INMODE2
TCELL1:IMUX.IMUX.4DSP0.A10
TCELL1:IMUX.IMUX.5DSP1.A0
TCELL1:IMUX.IMUX.6DSP0.A11
TCELL1:IMUX.IMUX.7DSP1.A1
TCELL1:IMUX.IMUX.8DSP0.A12
TCELL1:IMUX.IMUX.9DSP1.A2
TCELL1:IMUX.IMUX.10DSP0.A13
TCELL1:IMUX.IMUX.11DSP1.A3
TCELL1:IMUX.IMUX.12DSP0.A14
TCELL1:IMUX.IMUX.13DSP1.A4
TCELL1:IMUX.IMUX.14DSP0.A15
TCELL1:IMUX.IMUX.15DSP1.A5
TCELL1:IMUX.IMUX.16DSP0.C44
TCELL1:IMUX.IMUX.17DSP0.B8
TCELL1:IMUX.IMUX.18DSP0.C8
TCELL1:IMUX.IMUX.19DSP1.C8
TCELL1:IMUX.IMUX.20DSP0.OPMODE4
TCELL1:IMUX.IMUX.21DSP0.B9
TCELL1:IMUX.IMUX.22DSP0.C9
TCELL1:IMUX.IMUX.23DSP1.C9
TCELL1:IMUX.IMUX.24DSP0.C45
TCELL1:IMUX.IMUX.25DSP0.B10
TCELL1:IMUX.IMUX.26DSP0.C10
TCELL1:IMUX.IMUX.27DSP1.C10
TCELL1:IMUX.IMUX.28DSP0.OPMODE5
TCELL1:IMUX.IMUX.29DSP0.B11
TCELL1:IMUX.IMUX.30DSP0.C11
TCELL1:IMUX.IMUX.31DSP1.C11
TCELL1:IMUX.IMUX.32DSP0.C46
TCELL1:IMUX.IMUX.33DSP0.B12
TCELL1:IMUX.IMUX.34DSP0.C12
TCELL1:IMUX.IMUX.35DSP1.C12
TCELL1:IMUX.IMUX.36DSP0.OPMODE6
TCELL1:IMUX.IMUX.37DSP0.B13
TCELL1:IMUX.IMUX.38DSP0.C13
TCELL1:IMUX.IMUX.39DSP1.C13
TCELL1:IMUX.IMUX.40DSP0.C47
TCELL1:IMUX.IMUX.41DSP0.B14
TCELL1:IMUX.IMUX.42DSP0.C14
TCELL1:IMUX.IMUX.43DSP1.C14
TCELL1:IMUX.IMUX.44DSP0.OPMODE7
TCELL1:IMUX.IMUX.45DSP0.B15
TCELL1:IMUX.IMUX.46DSP0.C15
TCELL1:IMUX.IMUX.47DSP1.C15
TCELL2:OUT.2.TMINDSP0.P16
TCELL2:OUT.3.TMINDSP1.P16
TCELL2:OUT.5.TMINDSP0.XOROUT7
TCELL2:OUT.6.TMINDSP0.P17
TCELL2:OUT.7.TMINDSP1.P17
TCELL2:OUT.10.TMINDSP0.P18
TCELL2:OUT.11.TMINDSP1.P18
TCELL2:OUT.12.TMINDSP0.CARRYOUT3
TCELL2:OUT.13.TMINDSP1.CARRYOUT3
TCELL2:OUT.14.TMINDSP0.P19
TCELL2:OUT.15.TMINDSP1.P19
TCELL2:OUT.16.TMINDSP1.P40
TCELL2:OUT.18.TMINDSP0.P20
TCELL2:OUT.19.TMINDSP1.P20
TCELL2:OUT.20.TMINDSP1.PATTERN_B_DETECT
TCELL2:OUT.22.TMINDSP0.P21
TCELL2:OUT.23.TMINDSP1.P21
TCELL2:OUT.24.TMINDSP1.P41
TCELL2:OUT.26.TMINDSP0.P22
TCELL2:OUT.27.TMINDSP1.P22
TCELL2:OUT.28.TMINDSP1.CARRYOUT1
TCELL2:OUT.29.TMINDSP1.XOROUT0
TCELL2:OUT.30.TMINDSP0.P23
TCELL2:OUT.31.TMINDSP1.P23
TCELL2:IMUX.CTRL.0DSP0.RSTP_B
TCELL2:IMUX.CTRL.1DSP0.RSTCTRL_B
TCELL2:IMUX.CTRL.2DSP0.RSTALLCARRYIN_B
TCELL2:IMUX.CTRL.3DSP0.CEP_B
TCELL2:IMUX.CTRL.4DSP1.RSTP_B
TCELL2:IMUX.CTRL.5DSP1.CEC_B
TCELL2:IMUX.CTRL.6DSP1.RSTC_B
TCELL2:IMUX.CTRL.7DSP1.CEP_B
TCELL2:IMUX.BYP.0DSP0.DIN16
TCELL2:IMUX.BYP.1DSP1.DIN3
TCELL2:IMUX.BYP.2DSP0.DIN17
TCELL2:IMUX.BYP.3DSP1.DIN4
TCELL2:IMUX.BYP.4DSP0.DIN18
TCELL2:IMUX.BYP.5DSP1.DIN5
TCELL2:IMUX.BYP.6DSP0.DIN19
TCELL2:IMUX.BYP.7DSP1.DIN6
TCELL2:IMUX.BYP.8DSP0.DIN20
TCELL2:IMUX.BYP.9DSP1.DIN7
TCELL2:IMUX.BYP.10DSP0.DIN21
TCELL2:IMUX.BYP.11DSP1.DIN8
TCELL2:IMUX.BYP.12DSP0.DIN22
TCELL2:IMUX.BYP.13DSP1.DIN9
TCELL2:IMUX.BYP.14DSP0.DIN23
TCELL2:IMUX.BYP.15DSP1.DIN10
TCELL2:IMUX.IMUX.0DSP0.A16
TCELL2:IMUX.IMUX.1DSP1.A6
TCELL2:IMUX.IMUX.2DSP0.A17
TCELL2:IMUX.IMUX.3DSP1.A7
TCELL2:IMUX.IMUX.4DSP0.A18
TCELL2:IMUX.IMUX.5DSP1.A8
TCELL2:IMUX.IMUX.6DSP0.A19
TCELL2:IMUX.IMUX.7DSP1.A9
TCELL2:IMUX.IMUX.8DSP0.A20
TCELL2:IMUX.IMUX.9DSP1.A10
TCELL2:IMUX.IMUX.10DSP0.A21
TCELL2:IMUX.IMUX.11DSP1.A11
TCELL2:IMUX.IMUX.12DSP0.A22
TCELL2:IMUX.IMUX.13DSP1.A12
TCELL2:IMUX.IMUX.14DSP0.A23
TCELL2:IMUX.IMUX.15DSP1.A13
TCELL2:IMUX.IMUX.16DSP0.CECTRL
TCELL2:IMUX.IMUX.17DSP0.B16
TCELL2:IMUX.IMUX.18DSP0.C16
TCELL2:IMUX.IMUX.19DSP1.C16
TCELL2:IMUX.IMUX.20DSP0.OPMODE8
TCELL2:IMUX.IMUX.21DSP0.B17
TCELL2:IMUX.IMUX.22DSP0.C17
TCELL2:IMUX.IMUX.23DSP1.C17
TCELL2:IMUX.IMUX.24DSP0.CECARRYIN
TCELL2:IMUX.IMUX.25DSP0.INMODE4
TCELL2:IMUX.IMUX.26DSP0.C18
TCELL2:IMUX.IMUX.27DSP1.C18
TCELL2:IMUX.IMUX.28DSP0.CARRYIN
TCELL2:IMUX.IMUX.29DSP1.CARRYIN
TCELL2:IMUX.IMUX.30DSP0.C19
TCELL2:IMUX.IMUX.31DSP1.C19
TCELL2:IMUX.IMUX.32DSP1.C40
TCELL2:IMUX.IMUX.33DSP1.B0
TCELL2:IMUX.IMUX.34DSP0.C20
TCELL2:IMUX.IMUX.35DSP1.C20
TCELL2:IMUX.IMUX.36DSP1.OPMODE0
TCELL2:IMUX.IMUX.37DSP1.B1
TCELL2:IMUX.IMUX.38DSP0.C21
TCELL2:IMUX.IMUX.39DSP1.C21
TCELL2:IMUX.IMUX.40DSP1.C41
TCELL2:IMUX.IMUX.41DSP1.B2
TCELL2:IMUX.IMUX.42DSP0.C22
TCELL2:IMUX.IMUX.43DSP1.C22
TCELL2:IMUX.IMUX.44DSP1.OPMODE1
TCELL2:IMUX.IMUX.45DSP1.B3
TCELL2:IMUX.IMUX.46DSP0.C23
TCELL2:IMUX.IMUX.47DSP1.C23
TCELL3:OUT.0.TMINDSP1.P42
TCELL3:OUT.1.TMINDSP0.CARRYOUT1
TCELL3:OUT.2.TMINDSP0.P24
TCELL3:OUT.3.TMINDSP1.P24
TCELL3:OUT.4.TMINDSP1.UNDERFLOW
TCELL3:OUT.5.TMINDSP1.XOROUT1
TCELL3:OUT.6.TMINDSP0.P25
TCELL3:OUT.7.TMINDSP1.P25
TCELL3:OUT.8.TMINDSP1.P43
TCELL3:OUT.10.TMINDSP0.P26
TCELL3:OUT.11.TMINDSP1.P26
TCELL3:OUT.13.TMINDSP1.XOROUT2
TCELL3:OUT.14.TMINDSP0.P27
TCELL3:OUT.15.TMINDSP1.P27
TCELL3:OUT.16.TMINDSP1.P44
TCELL3:OUT.18.TMINDSP0.P28
TCELL3:OUT.19.TMINDSP1.P28
TCELL3:OUT.21.TMINDSP1.XOROUT3
TCELL3:OUT.22.TMINDSP0.P29
TCELL3:OUT.23.TMINDSP1.P29
TCELL3:OUT.24.TMINDSP1.P45
TCELL3:OUT.25.TMINDSP1.OVERFLOW
TCELL3:OUT.26.TMINDSP0.P30
TCELL3:OUT.27.TMINDSP1.P30
TCELL3:OUT.29.TMINDSP1.XOROUT4
TCELL3:OUT.30.TMINDSP0.P31
TCELL3:OUT.31.TMINDSP1.P31
TCELL3:IMUX.CTRL.0DSP1.RSTB_B
TCELL3:IMUX.CTRL.1DSP1.CED_B
TCELL3:IMUX.CTRL.2DSP1.RSTD_B
TCELL3:IMUX.CTRL.3DSP1.CEB1_B
TCELL3:IMUX.CTRL.4DSP1.CLK_B
TCELL3:IMUX.CTRL.5DSP1.CEM_B
TCELL3:IMUX.CTRL.6DSP1.RSTM_B
TCELL3:IMUX.CTRL.7DSP1.CEAD_B
TCELL3:IMUX.BYP.0DSP0.DIN24
TCELL3:IMUX.BYP.1DSP1.DIN11
TCELL3:IMUX.BYP.2DSP0.DIN25
TCELL3:IMUX.BYP.3DSP1.DIN12
TCELL3:IMUX.BYP.4DSP0.DIN26
TCELL3:IMUX.BYP.5DSP1.DIN13
TCELL3:IMUX.BYP.7DSP1.DIN14
TCELL3:IMUX.BYP.9DSP1.DIN15
TCELL3:IMUX.BYP.11DSP1.DIN16
TCELL3:IMUX.BYP.13DSP1.DIN17
TCELL3:IMUX.BYP.15DSP1.DIN18
TCELL3:IMUX.IMUX.0DSP0.A24
TCELL3:IMUX.IMUX.1DSP1.A14
TCELL3:IMUX.IMUX.2DSP0.A25
TCELL3:IMUX.IMUX.3DSP1.A15
TCELL3:IMUX.IMUX.4DSP0.A26
TCELL3:IMUX.IMUX.5DSP1.A16
TCELL3:IMUX.IMUX.6DSP0.A27
TCELL3:IMUX.IMUX.7DSP1.A17
TCELL3:IMUX.IMUX.8DSP0.A28
TCELL3:IMUX.IMUX.9DSP1.A18
TCELL3:IMUX.IMUX.10DSP0.A29
TCELL3:IMUX.IMUX.11DSP1.A19
TCELL3:IMUX.IMUX.12DSP1.ALUMODE0
TCELL3:IMUX.IMUX.13DSP1.A20
TCELL3:IMUX.IMUX.14DSP1.CECARRYIN
TCELL3:IMUX.IMUX.15DSP1.A21
TCELL3:IMUX.IMUX.16DSP1.C42
TCELL3:IMUX.IMUX.17DSP1.B4
TCELL3:IMUX.IMUX.18DSP0.C24
TCELL3:IMUX.IMUX.19DSP1.C24
TCELL3:IMUX.IMUX.20DSP1.OPMODE2
TCELL3:IMUX.IMUX.21DSP1.B5
TCELL3:IMUX.IMUX.22DSP0.C25
TCELL3:IMUX.IMUX.23DSP1.C25
TCELL3:IMUX.IMUX.24DSP1.C43
TCELL3:IMUX.IMUX.25DSP1.B6
TCELL3:IMUX.IMUX.26DSP0.C26
TCELL3:IMUX.IMUX.27DSP1.C26
TCELL3:IMUX.IMUX.28DSP1.OPMODE3
TCELL3:IMUX.IMUX.29DSP1.B7
TCELL3:IMUX.IMUX.30DSP0.C27
TCELL3:IMUX.IMUX.31DSP1.C27
TCELL3:IMUX.IMUX.32DSP1.C44
TCELL3:IMUX.IMUX.33DSP1.B8
TCELL3:IMUX.IMUX.34DSP0.C28
TCELL3:IMUX.IMUX.35DSP1.C28
TCELL3:IMUX.IMUX.36DSP1.OPMODE4
TCELL3:IMUX.IMUX.37DSP1.B9
TCELL3:IMUX.IMUX.38DSP0.C29
TCELL3:IMUX.IMUX.39DSP1.C29
TCELL3:IMUX.IMUX.40DSP1.C45
TCELL3:IMUX.IMUX.41DSP1.B10
TCELL3:IMUX.IMUX.42DSP0.C30
TCELL3:IMUX.IMUX.43DSP1.C30
TCELL3:IMUX.IMUX.44DSP1.OPMODE5
TCELL3:IMUX.IMUX.45DSP1.B11
TCELL3:IMUX.IMUX.46DSP0.C31
TCELL3:IMUX.IMUX.47DSP1.C31
TCELL4:OUT.0.TMINDSP1.P46
TCELL4:OUT.2.TMINDSP0.P32
TCELL4:OUT.3.TMINDSP1.P32
TCELL4:OUT.5.TMINDSP1.XOROUT5
TCELL4:OUT.6.TMINDSP0.P33
TCELL4:OUT.7.TMINDSP1.P33
TCELL4:OUT.8.TMINDSP1.P47
TCELL4:OUT.9.TMINDSP0.CARRYOUT2
TCELL4:OUT.10.TMINDSP0.P34
TCELL4:OUT.11.TMINDSP1.P34
TCELL4:OUT.12.TMINDSP1.CARRYOUT2
TCELL4:OUT.13.TMINDSP1.XOROUT6
TCELL4:OUT.14.TMINDSP0.P35
TCELL4:OUT.15.TMINDSP1.P35
TCELL4:OUT.17.TMINDSP1.PATTERN_DETECT
TCELL4:OUT.18.TMINDSP0.P36
TCELL4:OUT.19.TMINDSP1.P36
TCELL4:OUT.21.TMINDSP1.XOROUT7
TCELL4:OUT.22.TMINDSP0.P37
TCELL4:OUT.23.TMINDSP1.P37
TCELL4:OUT.26.TMINDSP0.P38
TCELL4:OUT.27.TMINDSP1.P38
TCELL4:OUT.30.TMINDSP0.P39
TCELL4:OUT.31.TMINDSP1.P39
TCELL4:IMUX.CTRL.0DSP1.RSTALUMODE_B
TCELL4:IMUX.CTRL.1DSP1.CEA1_B
TCELL4:IMUX.CTRL.2DSP1.RSTA_B
TCELL4:IMUX.CTRL.3DSP1.CEA2_B
TCELL4:IMUX.CTRL.4DSP1.RSTINMODE_B
TCELL4:IMUX.CTRL.5DSP1.RSTCTRL_B
TCELL4:IMUX.CTRL.6DSP1.RSTALLCARRYIN_B
TCELL4:IMUX.CTRL.7DSP1.CEB2_B
TCELL4:IMUX.BYP.1DSP1.DIN19
TCELL4:IMUX.BYP.3DSP1.DIN20
TCELL4:IMUX.BYP.5DSP1.DIN21
TCELL4:IMUX.BYP.7DSP1.DIN22
TCELL4:IMUX.BYP.9DSP1.DIN23
TCELL4:IMUX.BYP.10DSP1.CARRYINSEL0
TCELL4:IMUX.BYP.11DSP1.DIN24
TCELL4:IMUX.BYP.12DSP1.CARRYINSEL1
TCELL4:IMUX.BYP.13DSP1.DIN25
TCELL4:IMUX.BYP.14DSP1.CARRYINSEL2
TCELL4:IMUX.BYP.15DSP1.DIN26
TCELL4:IMUX.IMUX.0DSP1.ALUMODE1
TCELL4:IMUX.IMUX.1DSP1.A22
TCELL4:IMUX.IMUX.2DSP1.CEALUMODE
TCELL4:IMUX.IMUX.3DSP1.A23
TCELL4:IMUX.IMUX.4DSP1.ALUMODE2
TCELL4:IMUX.IMUX.5DSP1.A24
TCELL4:IMUX.IMUX.6DSP1.CEINMODE
TCELL4:IMUX.IMUX.7DSP1.A25
TCELL4:IMUX.IMUX.8DSP1.ALUMODE3
TCELL4:IMUX.IMUX.9DSP1.A26
TCELL4:IMUX.IMUX.10DSP1.INMODE1
TCELL4:IMUX.IMUX.11DSP1.A27
TCELL4:IMUX.IMUX.13DSP1.A28
TCELL4:IMUX.IMUX.14DSP1.INMODE4
TCELL4:IMUX.IMUX.15DSP1.A29
TCELL4:IMUX.IMUX.16DSP1.C46
TCELL4:IMUX.IMUX.17DSP1.B12
TCELL4:IMUX.IMUX.18DSP0.C32
TCELL4:IMUX.IMUX.19DSP1.C32
TCELL4:IMUX.IMUX.20DSP1.OPMODE6
TCELL4:IMUX.IMUX.21DSP1.B13
TCELL4:IMUX.IMUX.22DSP0.C33
TCELL4:IMUX.IMUX.23DSP1.C33
TCELL4:IMUX.IMUX.24DSP1.C47
TCELL4:IMUX.IMUX.25DSP1.B14
TCELL4:IMUX.IMUX.26DSP0.C34
TCELL4:IMUX.IMUX.27DSP1.C34
TCELL4:IMUX.IMUX.28DSP1.OPMODE7
TCELL4:IMUX.IMUX.29DSP1.B15
TCELL4:IMUX.IMUX.30DSP0.C35
TCELL4:IMUX.IMUX.31DSP1.C35
TCELL4:IMUX.IMUX.32DSP1.INMODE3
TCELL4:IMUX.IMUX.33DSP1.B16
TCELL4:IMUX.IMUX.34DSP0.C36
TCELL4:IMUX.IMUX.35DSP1.C36
TCELL4:IMUX.IMUX.36DSP1.OPMODE8
TCELL4:IMUX.IMUX.37DSP1.B17
TCELL4:IMUX.IMUX.38DSP0.C37
TCELL4:IMUX.IMUX.39DSP1.C37
TCELL4:IMUX.IMUX.40DSP1.INMODE2
TCELL4:IMUX.IMUX.41DSP1.CECTRL
TCELL4:IMUX.IMUX.42DSP0.C38
TCELL4:IMUX.IMUX.43DSP1.C38
TCELL4:IMUX.IMUX.44DSP1.INMODE0
TCELL4:IMUX.IMUX.46DSP0.C39
TCELL4:IMUX.IMUX.47DSP1.C39