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GTY transceivers

Tile GTY

Cells: 60

Bel BUFG_GT0

ultrascale GTY bel BUFG_GT0
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.42.DELAY
DIV0inputTCELL13:IMUX.IMUX.47.DELAY
DIV1inputTCELL13:IMUX.IMUX.43.DELAY
DIV2inputTCELL13:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.36.DELAY

Bel BUFG_GT1

ultrascale GTY bel BUFG_GT1
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.24.DELAY
DIV0inputTCELL13:IMUX.IMUX.31.DELAY
DIV1inputTCELL13:IMUX.IMUX.25.DELAY
DIV2inputTCELL13:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.18.DELAY

Bel BUFG_GT2

ultrascale GTY bel BUFG_GT2
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.6.DELAY
DIV0inputTCELL13:IMUX.IMUX.13.DELAY
DIV1inputTCELL13:IMUX.IMUX.7.DELAY
DIV2inputTCELL13:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.0.DELAY

Bel BUFG_GT3

ultrascale GTY bel BUFG_GT3
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.42.DELAY
DIV0inputTCELL14:IMUX.IMUX.47.DELAY
DIV1inputTCELL14:IMUX.IMUX.43.DELAY
DIV2inputTCELL14:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.36.DELAY

Bel BUFG_GT4

ultrascale GTY bel BUFG_GT4
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.24.DELAY
DIV0inputTCELL14:IMUX.IMUX.31.DELAY
DIV1inputTCELL14:IMUX.IMUX.25.DELAY
DIV2inputTCELL14:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.18.DELAY

Bel BUFG_GT5

ultrascale GTY bel BUFG_GT5
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.6.DELAY
DIV0inputTCELL14:IMUX.IMUX.13.DELAY
DIV1inputTCELL14:IMUX.IMUX.7.DELAY
DIV2inputTCELL14:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.0.DELAY

Bel BUFG_GT6

ultrascale GTY bel BUFG_GT6
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.42.DELAY
DIV0inputTCELL15:IMUX.IMUX.47.DELAY
DIV1inputTCELL15:IMUX.IMUX.43.DELAY
DIV2inputTCELL15:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.36.DELAY

Bel BUFG_GT7

ultrascale GTY bel BUFG_GT7
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.24.DELAY
DIV0inputTCELL15:IMUX.IMUX.31.DELAY
DIV1inputTCELL15:IMUX.IMUX.25.DELAY
DIV2inputTCELL15:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.18.DELAY

Bel BUFG_GT8

ultrascale GTY bel BUFG_GT8
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.6.DELAY
DIV0inputTCELL15:IMUX.IMUX.13.DELAY
DIV1inputTCELL15:IMUX.IMUX.7.DELAY
DIV2inputTCELL15:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.0.DELAY

Bel BUFG_GT9

ultrascale GTY bel BUFG_GT9
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.42.DELAY
DIV0inputTCELL16:IMUX.IMUX.47.DELAY
DIV1inputTCELL16:IMUX.IMUX.43.DELAY
DIV2inputTCELL16:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.36.DELAY

Bel BUFG_GT10

ultrascale GTY bel BUFG_GT10
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.24.DELAY
DIV0inputTCELL16:IMUX.IMUX.31.DELAY
DIV1inputTCELL16:IMUX.IMUX.25.DELAY
DIV2inputTCELL16:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.18.DELAY

Bel BUFG_GT11

ultrascale GTY bel BUFG_GT11
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.6.DELAY
DIV0inputTCELL16:IMUX.IMUX.13.DELAY
DIV1inputTCELL16:IMUX.IMUX.7.DELAY
DIV2inputTCELL16:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.0.DELAY

Bel BUFG_GT12

ultrascale GTY bel BUFG_GT12
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.42.DELAY
DIV0inputTCELL43:IMUX.IMUX.47.DELAY
DIV1inputTCELL43:IMUX.IMUX.43.DELAY
DIV2inputTCELL43:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.36.DELAY

Bel BUFG_GT13

ultrascale GTY bel BUFG_GT13
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.24.DELAY
DIV0inputTCELL43:IMUX.IMUX.31.DELAY
DIV1inputTCELL43:IMUX.IMUX.25.DELAY
DIV2inputTCELL43:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.18.DELAY

Bel BUFG_GT14

ultrascale GTY bel BUFG_GT14
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.6.DELAY
DIV0inputTCELL43:IMUX.IMUX.13.DELAY
DIV1inputTCELL43:IMUX.IMUX.7.DELAY
DIV2inputTCELL43:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.0.DELAY

Bel BUFG_GT15

ultrascale GTY bel BUFG_GT15
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.42.DELAY
DIV0inputTCELL44:IMUX.IMUX.47.DELAY
DIV1inputTCELL44:IMUX.IMUX.43.DELAY
DIV2inputTCELL44:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.36.DELAY

Bel BUFG_GT16

ultrascale GTY bel BUFG_GT16
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.24.DELAY
DIV0inputTCELL44:IMUX.IMUX.31.DELAY
DIV1inputTCELL44:IMUX.IMUX.25.DELAY
DIV2inputTCELL44:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.18.DELAY

Bel BUFG_GT17

ultrascale GTY bel BUFG_GT17
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.6.DELAY
DIV0inputTCELL44:IMUX.IMUX.13.DELAY
DIV1inputTCELL44:IMUX.IMUX.7.DELAY
DIV2inputTCELL44:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.0.DELAY

Bel BUFG_GT18

ultrascale GTY bel BUFG_GT18
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.42.DELAY
DIV0inputTCELL45:IMUX.IMUX.47.DELAY
DIV1inputTCELL45:IMUX.IMUX.43.DELAY
DIV2inputTCELL45:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.36.DELAY

Bel BUFG_GT19

ultrascale GTY bel BUFG_GT19
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.24.DELAY
DIV0inputTCELL45:IMUX.IMUX.31.DELAY
DIV1inputTCELL45:IMUX.IMUX.25.DELAY
DIV2inputTCELL45:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.18.DELAY

Bel BUFG_GT20

ultrascale GTY bel BUFG_GT20
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.6.DELAY
DIV0inputTCELL45:IMUX.IMUX.13.DELAY
DIV1inputTCELL45:IMUX.IMUX.7.DELAY
DIV2inputTCELL45:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.0.DELAY

Bel BUFG_GT21

ultrascale GTY bel BUFG_GT21
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.42.DELAY
DIV0inputTCELL46:IMUX.IMUX.47.DELAY
DIV1inputTCELL46:IMUX.IMUX.43.DELAY
DIV2inputTCELL46:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.36.DELAY

Bel BUFG_GT22

ultrascale GTY bel BUFG_GT22
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.24.DELAY
DIV0inputTCELL46:IMUX.IMUX.31.DELAY
DIV1inputTCELL46:IMUX.IMUX.25.DELAY
DIV2inputTCELL46:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.18.DELAY

Bel BUFG_GT23

ultrascale GTY bel BUFG_GT23
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.6.DELAY
DIV0inputTCELL46:IMUX.IMUX.13.DELAY
DIV1inputTCELL46:IMUX.IMUX.7.DELAY
DIV2inputTCELL46:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.0.DELAY

Bel BUFG_GT_SYNC0

ultrascale GTY bel BUFG_GT_SYNC0
PinDirectionWires
CE_INinputTCELL14:IMUX.IMUX.5.DELAY
RST_INinputTCELL16:IMUX.IMUX.15.DELAY

Bel BUFG_GT_SYNC1

ultrascale GTY bel BUFG_GT_SYNC1
PinDirectionWires
CE_INinputTCELL14:IMUX.IMUX.3.DELAY
RST_INinputTCELL16:IMUX.IMUX.14.DELAY

Bel BUFG_GT_SYNC2

ultrascale GTY bel BUFG_GT_SYNC2
PinDirectionWires
CE_INinputTCELL16:IMUX.IMUX.5.DELAY
RST_INinputTCELL16:IMUX.IMUX.12.DELAY

Bel BUFG_GT_SYNC3

ultrascale GTY bel BUFG_GT_SYNC3
PinDirectionWires
CE_INinputTCELL16:IMUX.IMUX.4.DELAY
RST_INinputTCELL16:IMUX.IMUX.11.DELAY

Bel BUFG_GT_SYNC4

ultrascale GTY bel BUFG_GT_SYNC4
PinDirectionWires
CE_INinputTCELL16:IMUX.IMUX.3.DELAY
RST_INinputTCELL16:IMUX.IMUX.10.DELAY

Bel BUFG_GT_SYNC5

ultrascale GTY bel BUFG_GT_SYNC5
PinDirectionWires
CE_INinputTCELL44:IMUX.IMUX.5.DELAY
RST_INinputTCELL46:IMUX.IMUX.15.DELAY

Bel BUFG_GT_SYNC6

ultrascale GTY bel BUFG_GT_SYNC6
PinDirectionWires
CE_INinputTCELL44:IMUX.IMUX.3.DELAY
RST_INinputTCELL46:IMUX.IMUX.14.DELAY

Bel BUFG_GT_SYNC7

ultrascale GTY bel BUFG_GT_SYNC7
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.5.DELAY
RST_INinputTCELL46:IMUX.IMUX.12.DELAY

Bel BUFG_GT_SYNC8

ultrascale GTY bel BUFG_GT_SYNC8
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.4.DELAY
RST_INinputTCELL46:IMUX.IMUX.11.DELAY

Bel BUFG_GT_SYNC9

ultrascale GTY bel BUFG_GT_SYNC9
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.3.DELAY
RST_INinputTCELL46:IMUX.IMUX.10.DELAY

Bel BUFG_GT_SYNC10

ultrascale GTY bel BUFG_GT_SYNC10
PinDirectionWires
CE_INinputTCELL45:IMUX.IMUX.5.DELAY
CLK_INinputTCELL30:RCLK.IMUX.6
RST_INinputTCELL46:IMUX.IMUX.9.DELAY

Bel ABUS_SWITCH_GT0

ultrascale GTY bel ABUS_SWITCH_GT0
PinDirectionWires

Bel ABUS_SWITCH_GT1

ultrascale GTY bel ABUS_SWITCH_GT1
PinDirectionWires

Bel ABUS_SWITCH_GT2

ultrascale GTY bel ABUS_SWITCH_GT2
PinDirectionWires

Bel ABUS_SWITCH_GT3

ultrascale GTY bel ABUS_SWITCH_GT3
PinDirectionWires

Bel GTY_COMMON

ultrascale GTY bel GTY_COMMON
PinDirectionWires
BGBYPASS_FS_1inputTCELL44:IMUX.IMUX.10.DELAY
BGRCALCTL_FS_1_0inputTCELL43:IMUX.IMUX.45.DELAY
BGRCALCTL_FS_1_1inputTCELL43:IMUX.IMUX.39.DELAY
BGRCALCTL_FS_1_2inputTCELL43:IMUX.IMUX.33.DELAY
BGRCALCTL_FS_1_3inputTCELL43:IMUX.IMUX.27.DELAY
BGRCALCTL_FS_1_4inputTCELL43:IMUX.IMUX.21.DELAY
BGRCALOVRDENB_FS_1inputTCELL43:IMUX.IMUX.15.DELAY
BGTESTEN_FS_1inputTCELL43:IMUX.IMUX.9.DELAY
DADDR_FS0inputTCELL13:IMUX.IMUX.45.DELAY
DADDR_FS1inputTCELL13:IMUX.IMUX.39.DELAY
DADDR_FS2inputTCELL13:IMUX.IMUX.33.DELAY
DADDR_FS3inputTCELL13:IMUX.IMUX.27.DELAY
DADDR_FS4inputTCELL13:IMUX.IMUX.21.DELAY
DADDR_FS5inputTCELL13:IMUX.IMUX.15.DELAY
DADDR_FS6inputTCELL13:IMUX.IMUX.9.DELAY
DADDR_FS7inputTCELL13:IMUX.IMUX.3.DELAY
DADDR_FS8inputTCELL14:IMUX.IMUX.41.DELAY
DADDR_FS9inputTCELL14:IMUX.IMUX.35.DELAY
DCLKB_FSinputTCELL15:IMUX.CTRL.5
DEN_FSinputTCELL13:IMUX.IMUX.17.DELAY
DI_FS0inputTCELL13:IMUX.IMUX.46.DELAY
DI_FS1inputTCELL13:IMUX.IMUX.40.DELAY
DI_FS10inputTCELL14:IMUX.IMUX.34.DELAY
DI_FS11inputTCELL14:IMUX.IMUX.28.DELAY
DI_FS12inputTCELL14:IMUX.IMUX.22.DELAY
DI_FS13inputTCELL14:IMUX.IMUX.16.DELAY
DI_FS14inputTCELL14:IMUX.IMUX.10.DELAY
DI_FS15inputTCELL14:IMUX.IMUX.4.DELAY
DI_FS2inputTCELL13:IMUX.IMUX.34.DELAY
DI_FS3inputTCELL13:IMUX.IMUX.28.DELAY
DI_FS4inputTCELL13:IMUX.IMUX.22.DELAY
DI_FS5inputTCELL13:IMUX.IMUX.16.DELAY
DI_FS6inputTCELL13:IMUX.IMUX.10.DELAY
DI_FS7inputTCELL13:IMUX.IMUX.4.DELAY
DI_FS8inputTCELL14:IMUX.IMUX.46.DELAY
DI_FS9inputTCELL14:IMUX.IMUX.40.DELAY
DMONOUT_QDCM_SF_0_0outputTCELL13:OUT.26.TMIN
DMONOUT_QDCM_SF_0_1outputTCELL14:OUT.26.TMIN
DMONOUT_QDCM_SF_0_2outputTCELL15:OUT.26.TMIN
DMONOUT_QDCM_SF_0_3outputTCELL16:OUT.26.TMIN
DMONOUT_QDCM_SF_0_4outputTCELL13:OUT.18.TMIN
DMONOUT_QDCM_SF_0_5outputTCELL14:OUT.18.TMIN
DMONOUT_QDCM_SF_0_6outputTCELL15:OUT.18.TMIN
DMONOUT_QDCM_SF_0_7outputTCELL16:OUT.18.TMIN
DMONOUT_QDCM_SF_1_0outputTCELL43:OUT.26.TMIN
DMONOUT_QDCM_SF_1_1outputTCELL44:OUT.26.TMIN
DMONOUT_QDCM_SF_1_2outputTCELL45:OUT.26.TMIN
DMONOUT_QDCM_SF_1_3outputTCELL46:OUT.26.TMIN
DMONOUT_QDCM_SF_1_4outputTCELL43:OUT.18.TMIN
DMONOUT_QDCM_SF_1_5outputTCELL44:OUT.18.TMIN
DMONOUT_QDCM_SF_1_6outputTCELL45:OUT.18.TMIN
DMONOUT_QDCM_SF_1_7outputTCELL46:OUT.18.TMIN
DRDY_SFoutputTCELL16:OUT.4.TMIN
DRPDO_SF0outputTCELL13:OUT.29.TMIN
DRPDO_SF1outputTCELL14:OUT.29.TMIN
DRPDO_SF10outputTCELL15:OUT.13.TMIN
DRPDO_SF11outputTCELL16:OUT.13.TMIN
DRPDO_SF12outputTCELL13:OUT.5.TMIN
DRPDO_SF13outputTCELL14:OUT.5.TMIN
DRPDO_SF14outputTCELL15:OUT.5.TMIN
DRPDO_SF15outputTCELL16:OUT.5.TMIN
DRPDO_SF2outputTCELL15:OUT.29.TMIN
DRPDO_SF3outputTCELL16:OUT.29.TMIN
DRPDO_SF4outputTCELL13:OUT.21.TMIN
DRPDO_SF5outputTCELL14:OUT.21.TMIN
DRPDO_SF6outputTCELL15:OUT.21.TMIN
DRPDO_SF7outputTCELL16:OUT.21.TMIN
DRPDO_SF8outputTCELL13:OUT.13.TMIN
DRPDO_SF9outputTCELL14:OUT.13.TMIN
DWE_FSinputTCELL13:IMUX.IMUX.5.DELAY
HROW_TEST_CKB_FS_0inputTCELL13:IMUX.CTRL.5
HROW_TEST_CKB_FS_1inputTCELL43:IMUX.CTRL.5
MGTREFCLKFA_SF_0outputTCELL15:OUT.22.TMIN
MGTREFCLKFA_SF_1outputTCELL45:OUT.22.TMIN
PWRDNBGB_FS_1inputTCELL44:IMUX.IMUX.4.DELAY
QDCLKPINSPRDB0_FS_0inputTCELL16:IMUX.CTRL.5
QDCLKPINSPRDB0_FS_1inputTCELL46:IMUX.CTRL.5
QDCLKPINSPRDB1_FS_0inputTCELL16:IMUX.CTRL.4
QDCLKPINSPRDB1_FS_1inputTCELL46:IMUX.CTRL.4
QDCMRSVDOUT_SF_0_0outputTCELL13:OUT.25.TMIN
QDCMRSVDOUT_SF_0_1outputTCELL14:OUT.25.TMIN
QDCMRSVDOUT_SF_0_2outputTCELL15:OUT.25.TMIN
QDCMRSVDOUT_SF_0_3outputTCELL16:OUT.25.TMIN
QDCMRSVDOUT_SF_0_4outputTCELL13:OUT.17.TMIN
QDCMRSVDOUT_SF_0_5outputTCELL14:OUT.17.TMIN
QDCMRSVDOUT_SF_0_6outputTCELL15:OUT.17.TMIN
QDCMRSVDOUT_SF_0_7outputTCELL16:OUT.17.TMIN
QDCMRSVDOUT_SF_1_0outputTCELL43:OUT.25.TMIN
QDCMRSVDOUT_SF_1_1outputTCELL44:OUT.25.TMIN
QDCMRSVDOUT_SF_1_2outputTCELL45:OUT.25.TMIN
QDCMRSVDOUT_SF_1_3outputTCELL46:OUT.25.TMIN
QDCMRSVDOUT_SF_1_4outputTCELL43:OUT.17.TMIN
QDCMRSVDOUT_SF_1_5outputTCELL44:OUT.17.TMIN
QDCMRSVDOUT_SF_1_6outputTCELL45:OUT.17.TMIN
QDCMRSVDOUT_SF_1_7outputTCELL46:OUT.17.TMIN
QDCMRSVDPIN_FS_0_0inputTCELL15:IMUX.IMUX.46.DELAY
QDCMRSVDPIN_FS_0_1inputTCELL15:IMUX.IMUX.40.DELAY
QDCMRSVDPIN_FS_0_2inputTCELL15:IMUX.IMUX.34.DELAY
QDCMRSVDPIN_FS_0_3inputTCELL15:IMUX.IMUX.28.DELAY
QDCMRSVDPIN_FS_0_4inputTCELL15:IMUX.IMUX.22.DELAY
QDCMRSVDPIN_FS_0_5inputTCELL15:IMUX.IMUX.16.DELAY
QDCMRSVDPIN_FS_0_6inputTCELL15:IMUX.IMUX.10.DELAY
QDCMRSVDPIN_FS_0_7inputTCELL15:IMUX.IMUX.4.DELAY
QDCMRSVDPIN_FS_1_0inputTCELL45:IMUX.IMUX.46.DELAY
QDCMRSVDPIN_FS_1_1inputTCELL45:IMUX.IMUX.40.DELAY
QDCMRSVDPIN_FS_1_2inputTCELL45:IMUX.IMUX.34.DELAY
QDCMRSVDPIN_FS_1_3inputTCELL45:IMUX.IMUX.28.DELAY
QDCMRSVDPIN_FS_1_4inputTCELL45:IMUX.IMUX.22.DELAY
QDCMRSVDPIN_FS_1_5inputTCELL45:IMUX.IMUX.16.DELAY
QDCMRSVDPIN_FS_1_6inputTCELL45:IMUX.IMUX.10.DELAY
QDCMRSVDPIN_FS_1_7inputTCELL45:IMUX.IMUX.4.DELAY
QDPINSPRD_FS_0_0inputTCELL16:IMUX.IMUX.45.DELAY
QDPINSPRD_FS_0_1inputTCELL16:IMUX.IMUX.39.DELAY
QDPINSPRD_FS_0_2inputTCELL16:IMUX.IMUX.33.DELAY
QDPINSPRD_FS_0_3inputTCELL16:IMUX.IMUX.27.DELAY
QDPINSPRD_FS_0_4inputTCELL16:IMUX.IMUX.21.DELAY
QDPINSPRD_FS_1_0inputTCELL46:IMUX.IMUX.45.DELAY
QDPINSPRD_FS_1_1inputTCELL46:IMUX.IMUX.39.DELAY
QDPINSPRD_FS_1_2inputTCELL46:IMUX.IMUX.33.DELAY
QDPINSPRD_FS_1_3inputTCELL46:IMUX.IMUX.27.DELAY
QDPINSPRD_FS_1_4inputTCELL46:IMUX.IMUX.21.DELAY
QDPMAPINRSVD_FS_0_0inputTCELL15:IMUX.IMUX.45.DELAY
QDPMAPINRSVD_FS_0_1inputTCELL15:IMUX.IMUX.39.DELAY
QDPMAPINRSVD_FS_0_2inputTCELL15:IMUX.IMUX.33.DELAY
QDPMAPINRSVD_FS_0_3inputTCELL15:IMUX.IMUX.27.DELAY
QDPMAPINRSVD_FS_0_4inputTCELL15:IMUX.IMUX.21.DELAY
QDPMAPINRSVD_FS_0_5inputTCELL15:IMUX.IMUX.15.DELAY
QDPMAPINRSVD_FS_0_6inputTCELL15:IMUX.IMUX.9.DELAY
QDPMAPINRSVD_FS_0_7inputTCELL15:IMUX.IMUX.3.DELAY
QDPMAPINRSVD_FS_1_0inputTCELL45:IMUX.IMUX.45.DELAY
QDPMAPINRSVD_FS_1_1inputTCELL45:IMUX.IMUX.39.DELAY
QDPMAPINRSVD_FS_1_2inputTCELL45:IMUX.IMUX.33.DELAY
QDPMAPINRSVD_FS_1_3inputTCELL45:IMUX.IMUX.27.DELAY
QDPMAPINRSVD_FS_1_4inputTCELL45:IMUX.IMUX.21.DELAY
QDPMAPINRSVD_FS_1_5inputTCELL45:IMUX.IMUX.15.DELAY
QDPMAPINRSVD_FS_1_6inputTCELL45:IMUX.IMUX.9.DELAY
QDPMAPINRSVD_FS_1_7inputTCELL45:IMUX.IMUX.3.DELAY
QDPMASCANCLKB_FS0inputTCELL13:IMUX.CTRL.3
QDPMASCANCLKB_FS1inputTCELL14:IMUX.CTRL.3
QDPMASCANCLKB_FS2inputTCELL15:IMUX.CTRL.3
QDPMASCANCLKB_FS3inputTCELL16:IMUX.CTRL.3
QDPMASCANCLKB_FS4inputTCELL43:IMUX.CTRL.3
QDPMASCANCLKB_FS5inputTCELL44:IMUX.CTRL.3
QDPMASCANCLKB_FS6inputTCELL45:IMUX.CTRL.3
QDPMASCANCLKB_FS7inputTCELL46:IMUX.CTRL.3
QDPMASCANENB_FSinputTCELL44:IMUX.IMUX.16.DELAY
QDPMASCANIN_FS0inputTCELL16:IMUX.IMUX.38.DELAY
QDPMASCANIN_FS1inputTCELL16:IMUX.IMUX.32.DELAY
QDPMASCANIN_FS2inputTCELL16:IMUX.IMUX.26.DELAY
QDPMASCANIN_FS3inputTCELL16:IMUX.IMUX.20.DELAY
QDPMASCANIN_FS4inputTCELL46:IMUX.IMUX.38.DELAY
QDPMASCANIN_FS5inputTCELL46:IMUX.IMUX.32.DELAY
QDPMASCANIN_FS6inputTCELL46:IMUX.IMUX.26.DELAY
QDPMASCANIN_FS7inputTCELL46:IMUX.IMUX.20.DELAY
QDPMASCANMODEB_FSinputTCELL44:IMUX.IMUX.34.DELAY
QDPMASCANOUT_SF0outputTCELL13:OUT.12.TMIN
QDPMASCANOUT_SF1outputTCELL14:OUT.12.TMIN
QDPMASCANOUT_SF2outputTCELL15:OUT.12.TMIN
QDPMASCANOUT_SF3outputTCELL16:OUT.12.TMIN
QDPMASCANOUT_SF4outputTCELL43:OUT.12.TMIN
QDPMASCANOUT_SF5outputTCELL44:OUT.12.TMIN
QDPMASCANOUT_SF6outputTCELL45:OUT.12.TMIN
QDPMASCANOUT_SF7outputTCELL46:OUT.12.TMIN
QDPMASCANRSTEN_FSinputTCELL44:IMUX.IMUX.22.DELAY
QPLFBLOSS_SF_0outputTCELL16:OUT.22.TMIN
QPLFBLOSS_SF_1outputTCELL46:OUT.22.TMIN
QPLFREQLOCK_SF_0outputTCELL16:OUT.3.TMIN
QPLFREQLOCK_SF_1outputTCELL46:OUT.3.TMIN
QPLLDMONCLKB_FS_0inputTCELL15:IMUX.CTRL.4
QPLLDMONCLKB_FS_1inputTCELL45:IMUX.CTRL.4
QPLLKDETEN_FS_0inputTCELL15:IMUX.IMUX.29.DELAY
QPLLKDETEN_FS_1inputTCELL45:IMUX.IMUX.29.DELAY
QPLPWRDN_FS_0inputTCELL14:IMUX.IMUX.11.DELAY
QPLPWRDN_FS_1inputTCELL44:IMUX.IMUX.11.DELAY
QPLREFDYN_FS_0_0inputTCELL14:IMUX.IMUX.45.DELAY
QPLREFDYN_FS_0_1inputTCELL14:IMUX.IMUX.39.DELAY
QPLREFDYN_FS_0_2inputTCELL14:IMUX.IMUX.33.DELAY
QPLREFDYN_FS_1_0inputTCELL44:IMUX.IMUX.45.DELAY
QPLREFDYN_FS_1_1inputTCELL44:IMUX.IMUX.39.DELAY
QPLREFDYN_FS_1_2inputTCELL44:IMUX.IMUX.33.DELAY
QPLREFLOSS_SF_0outputTCELL14:OUT.22.TMIN
QPLREFLOSS_SF_1outputTCELL44:OUT.22.TMIN
QPLRESETB_FS_0inputTCELL14:IMUX.CTRL.0
QPLRESETB_FS_1inputTCELL44:IMUX.CTRL.0
RCALENB_FS_1inputTCELL43:IMUX.IMUX.3.DELAY
REFCLKPD_FS_0inputTCELL16:IMUX.IMUX.2.DELAY
REFCLKPD_FS_1inputTCELL46:IMUX.IMUX.2.DELAY
SDMDATA_FS_0_0inputTCELL13:IMUX.IMUX.44.DELAY
SDMDATA_FS_0_1inputTCELL13:IMUX.IMUX.38.DELAY
SDMDATA_FS_0_10inputTCELL14:IMUX.IMUX.32.DELAY
SDMDATA_FS_0_11inputTCELL14:IMUX.IMUX.26.DELAY
SDMDATA_FS_0_12inputTCELL14:IMUX.IMUX.20.DELAY
SDMDATA_FS_0_13inputTCELL14:IMUX.IMUX.14.DELAY
SDMDATA_FS_0_14inputTCELL14:IMUX.IMUX.8.DELAY
SDMDATA_FS_0_15inputTCELL14:IMUX.IMUX.2.DELAY
SDMDATA_FS_0_16inputTCELL15:IMUX.IMUX.44.DELAY
SDMDATA_FS_0_17inputTCELL15:IMUX.IMUX.38.DELAY
SDMDATA_FS_0_18inputTCELL15:IMUX.IMUX.32.DELAY
SDMDATA_FS_0_19inputTCELL15:IMUX.IMUX.26.DELAY
SDMDATA_FS_0_2inputTCELL13:IMUX.IMUX.32.DELAY
SDMDATA_FS_0_20inputTCELL15:IMUX.IMUX.20.DELAY
SDMDATA_FS_0_21inputTCELL15:IMUX.IMUX.14.DELAY
SDMDATA_FS_0_22inputTCELL15:IMUX.IMUX.8.DELAY
SDMDATA_FS_0_23inputTCELL15:IMUX.IMUX.2.DELAY
SDMDATA_FS_0_24inputTCELL16:IMUX.IMUX.44.DELAY
SDMDATA_FS_0_3inputTCELL13:IMUX.IMUX.26.DELAY
SDMDATA_FS_0_4inputTCELL13:IMUX.IMUX.20.DELAY
SDMDATA_FS_0_5inputTCELL13:IMUX.IMUX.14.DELAY
SDMDATA_FS_0_6inputTCELL13:IMUX.IMUX.8.DELAY
SDMDATA_FS_0_7inputTCELL13:IMUX.IMUX.2.DELAY
SDMDATA_FS_0_8inputTCELL14:IMUX.IMUX.44.DELAY
SDMDATA_FS_0_9inputTCELL14:IMUX.IMUX.38.DELAY
SDMDATA_FS_1_0inputTCELL43:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_1inputTCELL43:IMUX.IMUX.38.DELAY
SDMDATA_FS_1_10inputTCELL44:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_11inputTCELL44:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_12inputTCELL44:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_13inputTCELL44:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_14inputTCELL44:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_15inputTCELL44:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_16inputTCELL45:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_17inputTCELL45:IMUX.IMUX.38.DELAY
SDMDATA_FS_1_18inputTCELL45:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_19inputTCELL45:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_2inputTCELL43:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_20inputTCELL45:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_21inputTCELL45:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_22inputTCELL45:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_23inputTCELL45:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_24inputTCELL46:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_3inputTCELL43:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_4inputTCELL43:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_5inputTCELL43:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_6inputTCELL43:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_7inputTCELL43:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_8inputTCELL44:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_9inputTCELL44:IMUX.IMUX.38.DELAY
SDMFINALOUT_SF_0_0outputTCELL13:OUT.30.TMIN
SDMFINALOUT_SF_0_1outputTCELL14:OUT.30.TMIN
SDMFINALOUT_SF_0_2outputTCELL15:OUT.30.TMIN
SDMFINALOUT_SF_0_3outputTCELL16:OUT.30.TMIN
SDMFINALOUT_SF_1_0outputTCELL43:OUT.30.TMIN
SDMFINALOUT_SF_1_1outputTCELL44:OUT.30.TMIN
SDMFINALOUT_SF_1_2outputTCELL45:OUT.30.TMIN
SDMFINALOUT_SF_1_3outputTCELL46:OUT.30.TMIN
SDMRESETB_FS_0inputTCELL15:IMUX.CTRL.0
SDMRESETB_FS_1inputTCELL45:IMUX.CTRL.0
SDMTESTDATA_SF_0_0outputTCELL13:OUT.27.TMIN
SDMTESTDATA_SF_0_1outputTCELL14:OUT.27.TMIN
SDMTESTDATA_SF_0_10outputTCELL15:OUT.11.TMIN
SDMTESTDATA_SF_0_11outputTCELL16:OUT.11.TMIN
SDMTESTDATA_SF_0_12outputTCELL13:OUT.3.TMIN
SDMTESTDATA_SF_0_13outputTCELL14:OUT.3.TMIN
SDMTESTDATA_SF_0_14outputTCELL15:OUT.3.TMIN
SDMTESTDATA_SF_0_2outputTCELL15:OUT.27.TMIN
SDMTESTDATA_SF_0_3outputTCELL16:OUT.27.TMIN
SDMTESTDATA_SF_0_4outputTCELL13:OUT.19.TMIN
SDMTESTDATA_SF_0_5outputTCELL14:OUT.19.TMIN
SDMTESTDATA_SF_0_6outputTCELL15:OUT.19.TMIN
SDMTESTDATA_SF_0_7outputTCELL16:OUT.19.TMIN
SDMTESTDATA_SF_0_8outputTCELL13:OUT.11.TMIN
SDMTESTDATA_SF_0_9outputTCELL14:OUT.11.TMIN
SDMTESTDATA_SF_1_0outputTCELL43:OUT.27.TMIN
SDMTESTDATA_SF_1_1outputTCELL44:OUT.27.TMIN
SDMTESTDATA_SF_1_10outputTCELL45:OUT.11.TMIN
SDMTESTDATA_SF_1_11outputTCELL46:OUT.11.TMIN
SDMTESTDATA_SF_1_12outputTCELL43:OUT.3.TMIN
SDMTESTDATA_SF_1_13outputTCELL44:OUT.3.TMIN
SDMTESTDATA_SF_1_14outputTCELL45:OUT.3.TMIN
SDMTESTDATA_SF_1_2outputTCELL45:OUT.27.TMIN
SDMTESTDATA_SF_1_3outputTCELL46:OUT.27.TMIN
SDMTESTDATA_SF_1_4outputTCELL43:OUT.19.TMIN
SDMTESTDATA_SF_1_5outputTCELL44:OUT.19.TMIN
SDMTESTDATA_SF_1_6outputTCELL45:OUT.19.TMIN
SDMTESTDATA_SF_1_7outputTCELL46:OUT.19.TMIN
SDMTESTDATA_SF_1_8outputTCELL43:OUT.11.TMIN
SDMTESTDATA_SF_1_9outputTCELL44:OUT.11.TMIN
SDMWIDTH_FS_0_0inputTCELL14:IMUX.IMUX.15.DELAY
SDMWIDTH_FS_0_1inputTCELL14:IMUX.IMUX.17.DELAY
SDMWIDTH_FS_1_0inputTCELL44:IMUX.IMUX.15.DELAY
SDMWIDTH_FS_1_1inputTCELL44:IMUX.IMUX.17.DELAY

Bel GTY_CHANNEL0

ultrascale GTY bel GTY_CHANNEL0
PinDirectionWires
AFECFOKEN_FSinputTCELL10:IMUX.IMUX.17.DELAY
ALT_SIGVALID_CLKB_FSinputTCELL11:IMUX.CTRL.5
BUFGTCEMASK_SF0outputTCELL0:OUT.18.TMIN
BUFGTCEMASK_SF1outputTCELL1:OUT.18.TMIN
BUFGTCEMASK_SF2outputTCELL0:OUT.12.TMIN
BUFGTCE_SF0outputTCELL0:OUT.16.TMIN
BUFGTCE_SF1outputTCELL1:OUT.16.TMIN
BUFGTCE_SF2outputTCELL1:OUT.12.TMIN
BUFGTDIV_SF0outputTCELL0:OUT.3.TMIN
BUFGTDIV_SF1outputTCELL1:OUT.3.TMIN
BUFGTDIV_SF2outputTCELL2:OUT.3.TMIN
BUFGTDIV_SF3outputTCELL0:OUT.5.TMIN
BUFGTDIV_SF4outputTCELL1:OUT.5.TMIN
BUFGTDIV_SF5outputTCELL2:OUT.5.TMIN
BUFGTDIV_SF6outputTCELL0:OUT.7.TMIN
BUFGTDIV_SF7outputTCELL1:OUT.7.TMIN
BUFGTDIV_SF8outputTCELL2:OUT.7.TMIN
BUFGTRESET_SF0outputTCELL0:OUT.1.TMIN
BUFGTRESET_SF1outputTCELL1:OUT.1.TMIN
BUFGTRESET_SF2outputTCELL0:OUT.10.TMIN
BUFGTRSTMASK_SF0outputTCELL1:OUT.10.TMIN
BUFGTRSTMASK_SF1outputTCELL4:OUT.11.TMIN
BUFGTRSTMASK_SF2outputTCELL4:OUT.14.TMIN
CDRFRRESETB_FSinputTCELL8:IMUX.CTRL.0
CDRHOLD_FSinputTCELL8:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL6:OUT.6.TMIN
CDROVREN_FSinputTCELL9:IMUX.IMUX.31.DELAY
CDRPHRESETB_FSinputTCELL11:IMUX.CTRL.0
CDRRESETB_FSinputTCELL12:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL12:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL12:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL12:IMUX.IMUX.15.DELAY
CFGRESETB_FSinputTCELL2:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL3:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL3:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL4:OUT.0.TMIN
CFOKRESET_FSinputTCELL10:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL4:OUT.6.TMIN
CKOKDONE_SFoutputTCELL3:OUT.17.TMIN
CKOKRESET_FSinputTCELL10:IMUX.IMUX.2.DELAY
CKPINRSRVD0B_FSinputTCELL12:IMUX.CTRL.5
CKPINRSRVD1B_FSinputTCELL12:IMUX.CTRL.4
COMFINISH_SFoutputTCELL6:OUT.0.TMIN
COMINITDET_SFoutputTCELL8:OUT.0.TMIN
COMSASDET_SFoutputTCELL10:OUT.0.TMIN
COMWAKEDET_SFoutputTCELL11:OUT.0.TMIN
COREREFCLKB_FSinputTCELL1:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL2:OUT.18.TMIN
CPLFREQLOCK_SFoutputTCELL2:OUT.1.TMIN
CPLLDMONCLKB_FSinputTCELL3:IMUX.CTRL.5
CPLLKDETEN_FSinputTCELL3:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL2:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL2:OUT.8.TMIN
CPLREFSELDYN_FS0inputTCELL3:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL3:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL3:IMUX.IMUX.3.DELAY
CPLRESETB_FSinputTCELL3:IMUX.CTRL.0
DADDR_FS0inputTCELL0:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL0:IMUX.IMUX.8.DELAY
DADDR_FS2inputTCELL0:IMUX.IMUX.14.DELAY
DADDR_FS3inputTCELL0:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL0:IMUX.IMUX.26.DELAY
DADDR_FS5inputTCELL0:IMUX.IMUX.32.DELAY
DADDR_FS6inputTCELL0:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL0:IMUX.IMUX.44.DELAY
DADDR_FS8inputTCELL1:IMUX.IMUX.2.DELAY
DADDR_FS9inputTCELL1:IMUX.IMUX.8.DELAY
DCLKB_FSinputTCELL0:IMUX.CTRL.4
DEN_FSinputTCELL0:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL12:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL12:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL12:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL12:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL9:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL9:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL10:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL9:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL11:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL11:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL0:OUT.26.TMIN
DFEDOUT_SF1outputTCELL1:OUT.26.TMIN
DFEDOUT_SF2outputTCELL2:OUT.26.TMIN
DFEDOUT_SF3outputTCELL3:OUT.26.TMIN
DFEDOUT_SF4outputTCELL4:OUT.26.TMIN
DFEDOUT_SF5outputTCELL0:OUT.6.TMIN
DFEDOUT_SF6outputTCELL1:OUT.6.TMIN
DFEGCHOLD_FSinputTCELL10:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL10:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL12:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL12:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL10:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL10:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL11:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL11:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL12:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL12:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL10:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL10:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL11:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL11:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL10:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL10:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL11:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL11:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL12:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL12:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL10:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL10:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL11:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL11:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL12:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL12:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL10:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL10:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL11:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL11:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL10:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL10:IMUX.IMUX.38.DELAY
DFERESETB_FSinputTCELL7:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL10:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL10:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL11:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL11:IMUX.IMUX.39.DELAY
DFEVSEN_FSinputTCELL10:IMUX.IMUX.45.DELAY
DFEYEN_FSinputTCELL11:IMUX.IMUX.45.DELAY
DI_FS0inputTCELL0:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL0:IMUX.IMUX.11.DELAY
DI_FS10inputTCELL1:IMUX.IMUX.17.DELAY
DI_FS11inputTCELL1:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL1:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL1:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL1:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL1:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL0:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL0:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL0:IMUX.IMUX.29.DELAY
DI_FS5inputTCELL0:IMUX.IMUX.35.DELAY
DI_FS6inputTCELL0:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL0:IMUX.IMUX.47.DELAY
DI_FS8inputTCELL1:IMUX.IMUX.5.DELAY
DI_FS9inputTCELL1:IMUX.IMUX.11.DELAY
DMONCLKB_FSinputTCELL0:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL1:IMUX.IMUX.0.DELAY
DMONOUT_SF0outputTCELL0:OUT.27.TMIN
DMONOUT_SF1outputTCELL1:OUT.27.TMIN
DMONOUT_SF10outputTCELL0:OUT.15.TMIN
DMONOUT_SF11outputTCELL1:OUT.15.TMIN
DMONOUT_SF12outputTCELL2:OUT.15.TMIN
DMONOUT_SF13outputTCELL3:OUT.15.TMIN
DMONOUT_SF14outputTCELL4:OUT.15.TMIN
DMONOUT_SF15outputTCELL0:OUT.9.TMIN
DMONOUT_SF16outputTCELL1:OUT.13.TMIN
DMONOUT_SF2outputTCELL2:OUT.27.TMIN
DMONOUT_SF3outputTCELL3:OUT.27.TMIN
DMONOUT_SF4outputTCELL4:OUT.27.TMIN
DMONOUT_SF5outputTCELL0:OUT.21.TMIN
DMONOUT_SF6outputTCELL1:OUT.21.TMIN
DMONOUT_SF7outputTCELL2:OUT.21.TMIN
DMONOUT_SF8outputTCELL3:OUT.21.TMIN
DMONOUT_SF9outputTCELL4:OUT.21.TMIN
DRDY_SFoutputTCELL1:OUT.11.TMIN
DRPDO_SF0outputTCELL0:OUT.31.TMIN
DRPDO_SF1outputTCELL1:OUT.31.TMIN
DRPDO_SF10outputTCELL0:OUT.19.TMIN
DRPDO_SF11outputTCELL1:OUT.19.TMIN
DRPDO_SF12outputTCELL2:OUT.19.TMIN
DRPDO_SF13outputTCELL3:OUT.19.TMIN
DRPDO_SF14outputTCELL4:OUT.19.TMIN
DRPDO_SF15outputTCELL0:OUT.13.TMIN
DRPDO_SF2outputTCELL2:OUT.31.TMIN
DRPDO_SF3outputTCELL3:OUT.31.TMIN
DRPDO_SF4outputTCELL4:OUT.31.TMIN
DRPDO_SF5outputTCELL0:OUT.25.TMIN
DRPDO_SF6outputTCELL1:OUT.25.TMIN
DRPDO_SF7outputTCELL2:OUT.25.TMIN
DRPDO_SF8outputTCELL3:OUT.25.TMIN
DRPDO_SF9outputTCELL4:OUT.25.TMIN
DWE_FSinputTCELL0:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL3:IMUX.IMUX.22.DELAY
EVODDPHICALDONE_FSinputTCELL1:IMUX.IMUX.42.DELAY
EVODDPHICALSTART_FSinputTCELL1:IMUX.IMUX.45.DELAY
EVODDPHIDRDEN_FSinputTCELL1:IMUX.IMUX.39.DELAY
EVODDPHIDWREN_FSinputTCELL1:IMUX.IMUX.36.DELAY
EVODDPHIXRDEN_FSinputTCELL1:IMUX.IMUX.34.DELAY
EVODDPHIXWREN_FSinputTCELL1:IMUX.IMUX.31.DELAY
EYESCANDATAERROR_SFoutputTCELL1:OUT.28.TMIN
EYESCANTRIGGER_FSinputTCELL0:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL8:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL8:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL4:OUT.22.TMIN
GTRSTSEL_FSinputTCELL1:IMUX.IMUX.20.DELAY
GTRXRSTB_FSinputTCELL9:IMUX.CTRL.0
GTTXRSTB_FSinputTCELL4:IMUX.CTRL.0
ISCANRESET_FSinputTCELL0:IMUX.IMUX.9.DELAY
ISERRDETEN_FSinputTCELL0:IMUX.IMUX.6.DELAY
LOOPBACK_FS0inputTCELL2:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL2:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL2:IMUX.IMUX.9.DELAY
LOOPRSVD_FS0inputTCELL10:IMUX.IMUX.3.DELAY
LOOPRSVD_FS1inputTCELL11:IMUX.IMUX.3.DELAY
LOOPRSVD_FS10inputTCELL11:IMUX.IMUX.14.DELAY
LOOPRSVD_FS11inputTCELL11:IMUX.IMUX.17.DELAY
LOOPRSVD_FS12inputTCELL11:IMUX.IMUX.21.DELAY
LOOPRSVD_FS13inputTCELL12:IMUX.IMUX.24.DELAY
LOOPRSVD_FS14inputTCELL12:IMUX.IMUX.31.DELAY
LOOPRSVD_FS15inputTCELL12:IMUX.IMUX.41.DELAY
LOOPRSVD_FS2inputTCELL12:IMUX.IMUX.3.DELAY
LOOPRSVD_FS3inputTCELL10:IMUX.IMUX.6.DELAY
LOOPRSVD_FS4inputTCELL11:IMUX.IMUX.6.DELAY
LOOPRSVD_FS5inputTCELL12:IMUX.IMUX.6.DELAY
LOOPRSVD_FS6inputTCELL10:IMUX.IMUX.9.DELAY
LOOPRSVD_FS7inputTCELL11:IMUX.IMUX.9.DELAY
LOOPRSVD_FS8inputTCELL12:IMUX.IMUX.9.DELAY
LOOPRSVD_FS9inputTCELL10:IMUX.IMUX.14.DELAY
LPBKRXTXSEREN_FSinputTCELL1:IMUX.IMUX.26.DELAY
LPBKTXRXSEREN_FSinputTCELL0:IMUX.IMUX.15.DELAY
LPMGCHOLD_FSinputTCELL12:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL12:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL12:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL11:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL12:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL12:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL11:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL11:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL0:OUT.28.TMIN
OSHOLD_FSinputTCELL10:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL9:IMUX.IMUX.16.DELAY
PCIEEQRXEQADAPTDONE_FSinputTCELL12:IMUX.IMUX.39.DELAY
PCIERATEGEN3_SFoutputTCELL1:OUT.24.TMIN
PCIERATEIDLE_SFoutputTCELL0:OUT.24.TMIN
PCIERATEQPLLPD_SF0outputTCELL5:OUT.10.TMIN
PCIERATEQPLLPD_SF1outputTCELL6:OUT.10.TMIN
PCIERATEQPLLRESET_SF0outputTCELL0:OUT.20.TMIN
PCIERATEQPLLRESET_SF1outputTCELL1:OUT.20.TMIN
PCIERSTIDLE_FSinputTCELL11:IMUX.IMUX.41.DELAY
PCIERSTTXSYNCSTART_FSinputTCELL5:IMUX.IMUX.4.DELAY
PCIESYNCTXSYNCDONE_SFoutputTCELL2:OUT.17.TMIN
PCIEUSERGEN3RDY_SFoutputTCELL3:OUT.5.TMIN
PCIEUSERPHYSTATUSRST_SFoutputTCELL3:OUT.3.TMIN
PCS_RSVD_IN_FS0inputTCELL5:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL5:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL10:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL10:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL11:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL11:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL12:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL12:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL6:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL6:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL7:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL7:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL8:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL8:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL9:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL9:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL5:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL6:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL7:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL8:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL9:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL10:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL11:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL12:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL7:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL8:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL9:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL10:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL11:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL12:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL5:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL6:OUT.20.TMIN
PHYSTATUS_SFoutputTCELL7:OUT.0.TMIN
PINRSRVDAS_SF0outputTCELL1:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL2:OUT.9.TMIN
PINRSRVDAS_SF2outputTCELL3:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL4:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL1:OUT.30.TMIN
PINRSRVDAS_SF5outputTCELL2:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL3:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL4:OUT.30.TMIN
PINRSRVD_FS0inputTCELL5:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL5:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL10:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL10:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL11:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL11:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL12:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL12:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL6:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL6:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL7:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL7:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL8:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL8:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL9:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL9:IMUX.IMUX.46.DELAY
PMASCANCLK0B_FSinputTCELL10:IMUX.CTRL.5
PMASCANCLK1B_FSinputTCELL10:IMUX.CTRL.4
PMASCANCLK2B_FSinputTCELL4:IMUX.CTRL.5
PMASCANCLK3B_FSinputTCELL4:IMUX.CTRL.4
PMASCANCLK4B_FSinputTCELL2:IMUX.CTRL.5
PMASCANCLK5B_FSinputTCELL2:IMUX.CTRL.6
PMASCANENB_FSinputTCELL1:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL1:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL2:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL0:IMUX.IMUX.42.DELAY
PMASCANIN_FS11inputTCELL0:IMUX.IMUX.45.DELAY
PMASCANIN_FS2inputTCELL2:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL3:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL3:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL4:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL4:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL0:IMUX.IMUX.34.DELAY
PMASCANIN_FS8inputTCELL0:IMUX.IMUX.36.DELAY
PMASCANIN_FS9inputTCELL0:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL0:IMUX.IMUX.40.DELAY
PMASCANOUT_SF0outputTCELL0:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL1:OUT.29.TMIN
PMASCANOUT_SF10outputTCELL2:OUT.14.TMIN
PMASCANOUT_SF11outputTCELL3:OUT.14.TMIN
PMASCANOUT_SF2outputTCELL2:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL3:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL4:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL0:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL1:OUT.17.TMIN
PMASCANOUT_SF7outputTCELL2:OUT.16.TMIN
PMASCANOUT_SF8outputTCELL0:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL1:OUT.14.TMIN
PMASCANRSTEN_FSinputTCELL0:IMUX.IMUX.37.DELAY
PRBSCNTRST_FSinputTCELL8:IMUX.IMUX.12.DELAY
RATE_DRP_DONE_EXT_FSinputTCELL7:IMUX.IMUX.13.DELAY
RATE_DRP_START_SFoutputTCELL3:OUT.24.TMIN
RCODAPWDN_FSinputTCELL8:IMUX.IMUX.19.DELAY
RCODARESETB_FSinputTCELL9:IMUX.CTRL.7
RCOOVREN_FSinputTCELL8:IMUX.IMUX.16.DELAY
RDASOFTRSTDONE_SFoutputTCELL5:OUT.6.TMIN
RESETOVRD_FSinputTCELL7:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL4:OUT.18.TMIN
RSTCLKENTX_FSinputTCELL3:IMUX.IMUX.7.DELAY
RXBUFRSTB_FSinputTCELL10:IMUX.CTRL.0
RXBUFSTATUS_SF0outputTCELL7:OUT.6.TMIN
RXBUFSTATUS_SF1outputTCELL8:OUT.6.TMIN
RXBUFSTATUS_SF2outputTCELL9:OUT.6.TMIN
RXBYTEISALIGNED_SFoutputTCELL7:OUT.2.TMIN
RXBYTEREALIGN_SFoutputTCELL6:OUT.2.TMIN
RXCDRPHDONE_SFoutputTCELL3:OUT.20.TMIN
RXCHANBONDSEQ_SFoutputTCELL10:OUT.2.TMIN
RXCHANREALIGN_SFoutputTCELL12:OUT.2.TMIN
RXCHARISCOMMA_SF0outputTCELL5:OUT.18.TMIN
RXCHARISCOMMA_SF1outputTCELL6:OUT.18.TMIN
RXCHARISCOMMA_SF2outputTCELL7:OUT.18.TMIN
RXCHARISCOMMA_SF3outputTCELL8:OUT.18.TMIN
RXCHARISCOMMA_SF4outputTCELL9:OUT.18.TMIN
RXCHARISCOMMA_SF5outputTCELL10:OUT.18.TMIN
RXCHARISCOMMA_SF6outputTCELL11:OUT.18.TMIN
RXCHARISCOMMA_SF7outputTCELL12:OUT.18.TMIN
RXCHARISK_SF0outputTCELL5:OUT.26.TMIN
RXCHARISK_SF1outputTCELL6:OUT.26.TMIN
RXCHARISK_SF10outputTCELL7:OUT.24.TMIN
RXCHARISK_SF11outputTCELL8:OUT.24.TMIN
RXCHARISK_SF12outputTCELL9:OUT.24.TMIN
RXCHARISK_SF13outputTCELL10:OUT.24.TMIN
RXCHARISK_SF14outputTCELL11:OUT.24.TMIN
RXCHARISK_SF15outputTCELL12:OUT.24.TMIN
RXCHARISK_SF2outputTCELL7:OUT.26.TMIN
RXCHARISK_SF3outputTCELL8:OUT.26.TMIN
RXCHARISK_SF4outputTCELL9:OUT.26.TMIN
RXCHARISK_SF5outputTCELL10:OUT.26.TMIN
RXCHARISK_SF6outputTCELL11:OUT.26.TMIN
RXCHARISK_SF7outputTCELL12:OUT.26.TMIN
RXCHARISK_SF8outputTCELL5:OUT.24.TMIN
RXCHARISK_SF9outputTCELL6:OUT.24.TMIN
RXCHBONDI_FS0inputTCELL10:IMUX.IMUX.15.DELAY
RXCHBONDI_FS1inputTCELL10:IMUX.IMUX.18.DELAY
RXCHBONDI_FS2inputTCELL10:IMUX.IMUX.21.DELAY
RXCHBONDI_FS3inputTCELL10:IMUX.IMUX.24.DELAY
RXCHBONDI_FS4inputTCELL10:IMUX.IMUX.27.DELAY
RXCHBONDLEVEL_FS0inputTCELL11:IMUX.IMUX.2.DELAY
RXCHBONDLEVEL_FS1inputTCELL11:IMUX.IMUX.5.DELAY
RXCHBONDLEVEL_FS2inputTCELL11:IMUX.IMUX.8.DELAY
RXCHBONDMASTER_FSinputTCELL8:IMUX.IMUX.33.DELAY
RXCHBONDO_SF0outputTCELL5:OUT.14.TMIN
RXCHBONDO_SF1outputTCELL6:OUT.14.TMIN
RXCHBONDO_SF2outputTCELL7:OUT.14.TMIN
RXCHBONDO_SF3outputTCELL8:OUT.14.TMIN
RXCHBONDO_SF4outputTCELL9:OUT.14.TMIN
RXCHBONDSLAVE_FSinputTCELL9:IMUX.IMUX.33.DELAY
RXCHISALIGNED_SFoutputTCELL11:OUT.2.TMIN
RXCKCORCNT_SF0outputTCELL8:OUT.2.TMIN
RXCKCORCNT_SF1outputTCELL9:OUT.2.TMIN
RXCOALGNEN_FSinputTCELL8:IMUX.IMUX.22.DELAY
RXCOMMADETUSE_FSinputTCELL10:IMUX.IMUX.12.DELAY
RXCOMMADET_SFoutputTCELL9:OUT.0.TMIN
RXCOPHDONE_SFoutputTCELL4:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL8:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL12:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL12:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL12:IMUX.IMUX.32.DELAY
RXDASOFTRESETB_FSinputTCELL11:IMUX.CTRL.7
RXDATAEXTENDRSVD_SF0outputTCELL5:OUT.4.TMIN
RXDATAEXTENDRSVD_SF1outputTCELL6:OUT.4.TMIN
RXDATAEXTENDRSVD_SF2outputTCELL7:OUT.4.TMIN
RXDATAEXTENDRSVD_SF3outputTCELL8:OUT.4.TMIN
RXDATAEXTENDRSVD_SF4outputTCELL9:OUT.4.TMIN
RXDATAEXTENDRSVD_SF5outputTCELL10:OUT.4.TMIN
RXDATAEXTENDRSVD_SF6outputTCELL11:OUT.4.TMIN
RXDATAEXTENDRSVD_SF7outputTCELL12:OUT.4.TMIN
RXDATAVALID_SF0outputTCELL8:OUT.8.TMIN
RXDATAVALID_SF1outputTCELL9:OUT.8.TMIN
RXDATA_SF0outputTCELL5:OUT.3.TMIN
RXDATA_SF1outputTCELL5:OUT.7.TMIN
RXDATA_SF10outputTCELL6:OUT.11.TMIN
RXDATA_SF100outputTCELL9:OUT.17.TMIN
RXDATA_SF101outputTCELL9:OUT.21.TMIN
RXDATA_SF102outputTCELL9:OUT.25.TMIN
RXDATA_SF103outputTCELL9:OUT.29.TMIN
RXDATA_SF104outputTCELL10:OUT.1.TMIN
RXDATA_SF105outputTCELL10:OUT.5.TMIN
RXDATA_SF106outputTCELL10:OUT.9.TMIN
RXDATA_SF107outputTCELL10:OUT.13.TMIN
RXDATA_SF108outputTCELL10:OUT.17.TMIN
RXDATA_SF109outputTCELL10:OUT.21.TMIN
RXDATA_SF11outputTCELL6:OUT.15.TMIN
RXDATA_SF110outputTCELL10:OUT.25.TMIN
RXDATA_SF111outputTCELL10:OUT.29.TMIN
RXDATA_SF112outputTCELL11:OUT.1.TMIN
RXDATA_SF113outputTCELL11:OUT.5.TMIN
RXDATA_SF114outputTCELL11:OUT.9.TMIN
RXDATA_SF115outputTCELL11:OUT.13.TMIN
RXDATA_SF116outputTCELL11:OUT.17.TMIN
RXDATA_SF117outputTCELL11:OUT.21.TMIN
RXDATA_SF118outputTCELL11:OUT.25.TMIN
RXDATA_SF119outputTCELL11:OUT.29.TMIN
RXDATA_SF12outputTCELL6:OUT.19.TMIN
RXDATA_SF120outputTCELL12:OUT.1.TMIN
RXDATA_SF121outputTCELL12:OUT.5.TMIN
RXDATA_SF122outputTCELL12:OUT.9.TMIN
RXDATA_SF123outputTCELL12:OUT.13.TMIN
RXDATA_SF124outputTCELL12:OUT.17.TMIN
RXDATA_SF125outputTCELL12:OUT.21.TMIN
RXDATA_SF126outputTCELL12:OUT.25.TMIN
RXDATA_SF127outputTCELL12:OUT.29.TMIN
RXDATA_SF13outputTCELL6:OUT.23.TMIN
RXDATA_SF14outputTCELL6:OUT.27.TMIN
RXDATA_SF15outputTCELL6:OUT.31.TMIN
RXDATA_SF16outputTCELL7:OUT.3.TMIN
RXDATA_SF17outputTCELL7:OUT.7.TMIN
RXDATA_SF18outputTCELL7:OUT.11.TMIN
RXDATA_SF19outputTCELL7:OUT.15.TMIN
RXDATA_SF2outputTCELL5:OUT.11.TMIN
RXDATA_SF20outputTCELL7:OUT.19.TMIN
RXDATA_SF21outputTCELL7:OUT.23.TMIN
RXDATA_SF22outputTCELL7:OUT.27.TMIN
RXDATA_SF23outputTCELL7:OUT.31.TMIN
RXDATA_SF24outputTCELL8:OUT.3.TMIN
RXDATA_SF25outputTCELL8:OUT.7.TMIN
RXDATA_SF26outputTCELL8:OUT.11.TMIN
RXDATA_SF27outputTCELL8:OUT.15.TMIN
RXDATA_SF28outputTCELL8:OUT.19.TMIN
RXDATA_SF29outputTCELL8:OUT.23.TMIN
RXDATA_SF3outputTCELL5:OUT.15.TMIN
RXDATA_SF30outputTCELL8:OUT.27.TMIN
RXDATA_SF31outputTCELL8:OUT.31.TMIN
RXDATA_SF32outputTCELL9:OUT.3.TMIN
RXDATA_SF33outputTCELL9:OUT.7.TMIN
RXDATA_SF34outputTCELL9:OUT.11.TMIN
RXDATA_SF35outputTCELL9:OUT.15.TMIN
RXDATA_SF36outputTCELL9:OUT.19.TMIN
RXDATA_SF37outputTCELL9:OUT.23.TMIN
RXDATA_SF38outputTCELL9:OUT.27.TMIN
RXDATA_SF39outputTCELL9:OUT.31.TMIN
RXDATA_SF4outputTCELL5:OUT.19.TMIN
RXDATA_SF40outputTCELL10:OUT.3.TMIN
RXDATA_SF41outputTCELL10:OUT.7.TMIN
RXDATA_SF42outputTCELL10:OUT.11.TMIN
RXDATA_SF43outputTCELL10:OUT.15.TMIN
RXDATA_SF44outputTCELL10:OUT.19.TMIN
RXDATA_SF45outputTCELL10:OUT.23.TMIN
RXDATA_SF46outputTCELL10:OUT.27.TMIN
RXDATA_SF47outputTCELL10:OUT.31.TMIN
RXDATA_SF48outputTCELL11:OUT.3.TMIN
RXDATA_SF49outputTCELL11:OUT.7.TMIN
RXDATA_SF5outputTCELL5:OUT.23.TMIN
RXDATA_SF50outputTCELL11:OUT.11.TMIN
RXDATA_SF51outputTCELL11:OUT.15.TMIN
RXDATA_SF52outputTCELL11:OUT.19.TMIN
RXDATA_SF53outputTCELL11:OUT.23.TMIN
RXDATA_SF54outputTCELL11:OUT.27.TMIN
RXDATA_SF55outputTCELL11:OUT.31.TMIN
RXDATA_SF56outputTCELL12:OUT.3.TMIN
RXDATA_SF57outputTCELL12:OUT.7.TMIN
RXDATA_SF58outputTCELL12:OUT.11.TMIN
RXDATA_SF59outputTCELL12:OUT.15.TMIN
RXDATA_SF6outputTCELL5:OUT.27.TMIN
RXDATA_SF60outputTCELL12:OUT.19.TMIN
RXDATA_SF61outputTCELL12:OUT.23.TMIN
RXDATA_SF62outputTCELL12:OUT.27.TMIN
RXDATA_SF63outputTCELL12:OUT.31.TMIN
RXDATA_SF64outputTCELL5:OUT.1.TMIN
RXDATA_SF65outputTCELL5:OUT.5.TMIN
RXDATA_SF66outputTCELL5:OUT.9.TMIN
RXDATA_SF67outputTCELL5:OUT.13.TMIN
RXDATA_SF68outputTCELL5:OUT.17.TMIN
RXDATA_SF69outputTCELL5:OUT.21.TMIN
RXDATA_SF7outputTCELL5:OUT.31.TMIN
RXDATA_SF70outputTCELL5:OUT.25.TMIN
RXDATA_SF71outputTCELL5:OUT.29.TMIN
RXDATA_SF72outputTCELL6:OUT.1.TMIN
RXDATA_SF73outputTCELL6:OUT.5.TMIN
RXDATA_SF74outputTCELL6:OUT.9.TMIN
RXDATA_SF75outputTCELL6:OUT.13.TMIN
RXDATA_SF76outputTCELL6:OUT.17.TMIN
RXDATA_SF77outputTCELL6:OUT.21.TMIN
RXDATA_SF78outputTCELL6:OUT.25.TMIN
RXDATA_SF79outputTCELL6:OUT.29.TMIN
RXDATA_SF8outputTCELL6:OUT.3.TMIN
RXDATA_SF80outputTCELL7:OUT.1.TMIN
RXDATA_SF81outputTCELL7:OUT.5.TMIN
RXDATA_SF82outputTCELL7:OUT.9.TMIN
RXDATA_SF83outputTCELL7:OUT.13.TMIN
RXDATA_SF84outputTCELL7:OUT.17.TMIN
RXDATA_SF85outputTCELL7:OUT.21.TMIN
RXDATA_SF86outputTCELL7:OUT.25.TMIN
RXDATA_SF87outputTCELL7:OUT.29.TMIN
RXDATA_SF88outputTCELL8:OUT.1.TMIN
RXDATA_SF89outputTCELL8:OUT.5.TMIN
RXDATA_SF9outputTCELL6:OUT.7.TMIN
RXDATA_SF90outputTCELL8:OUT.9.TMIN
RXDATA_SF91outputTCELL8:OUT.13.TMIN
RXDATA_SF92outputTCELL8:OUT.17.TMIN
RXDATA_SF93outputTCELL8:OUT.21.TMIN
RXDATA_SF94outputTCELL8:OUT.25.TMIN
RXDATA_SF95outputTCELL8:OUT.29.TMIN
RXDATA_SF96outputTCELL9:OUT.1.TMIN
RXDATA_SF97outputTCELL9:OUT.5.TMIN
RXDATA_SF98outputTCELL9:OUT.9.TMIN
RXDATA_SF99outputTCELL9:OUT.13.TMIN
RXDEC8B10BUSE_FSinputTCELL11:IMUX.IMUX.36.DELAY
RXDISPERR_SF0outputTCELL5:OUT.30.TMIN
RXDISPERR_SF1outputTCELL6:OUT.30.TMIN
RXDISPERR_SF10outputTCELL7:OUT.28.TMIN
RXDISPERR_SF11outputTCELL8:OUT.28.TMIN
RXDISPERR_SF12outputTCELL9:OUT.28.TMIN
RXDISPERR_SF13outputTCELL10:OUT.28.TMIN
RXDISPERR_SF14outputTCELL11:OUT.28.TMIN
RXDISPERR_SF15outputTCELL12:OUT.28.TMIN
RXDISPERR_SF2outputTCELL7:OUT.30.TMIN
RXDISPERR_SF3outputTCELL8:OUT.30.TMIN
RXDISPERR_SF4outputTCELL9:OUT.30.TMIN
RXDISPERR_SF5outputTCELL10:OUT.30.TMIN
RXDISPERR_SF6outputTCELL11:OUT.30.TMIN
RXDISPERR_SF7outputTCELL12:OUT.30.TMIN
RXDISPERR_SF8outputTCELL5:OUT.28.TMIN
RXDISPERR_SF9outputTCELL6:OUT.28.TMIN
RXELECIDLE_SFoutputTCELL5:OUT.2.TMIN
RXENCHANSYNC_FSinputTCELL7:IMUX.IMUX.33.DELAY
RXENMCOMMAALIGN_FSinputTCELL10:IMUX.IMUX.30.DELAY
RXENPCOMMAALIGN_FSinputTCELL8:IMUX.IMUX.25.DELAY
RXGEARBOXSLIP_FSinputTCELL11:IMUX.IMUX.33.DELAY
RXHEADERVALID_SF0outputTCELL10:OUT.8.TMIN
RXHEADERVALID_SF1outputTCELL11:OUT.8.TMIN
RXHEADER_SF0outputTCELL5:OUT.12.TMIN
RXHEADER_SF1outputTCELL6:OUT.12.TMIN
RXHEADER_SF2outputTCELL7:OUT.12.TMIN
RXHEADER_SF3outputTCELL8:OUT.12.TMIN
RXHEADER_SF4outputTCELL9:OUT.12.TMIN
RXHEADER_SF5outputTCELL10:OUT.12.TMIN
RXLATCLKB_FSinputTCELL11:IMUX.CTRL.4
RXLINKSYNCDONE_SFoutputTCELL4:OUT.13.TMIN
RXLPMEN_FSinputTCELL11:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL11:IMUX.IMUX.35.DELAY
RXNOTINTABLE_SF0outputTCELL5:OUT.16.TMIN
RXNOTINTABLE_SF1outputTCELL6:OUT.16.TMIN
RXNOTINTABLE_SF2outputTCELL7:OUT.16.TMIN
RXNOTINTABLE_SF3outputTCELL8:OUT.16.TMIN
RXNOTINTABLE_SF4outputTCELL9:OUT.16.TMIN
RXNOTINTABLE_SF5outputTCELL10:OUT.16.TMIN
RXNOTINTABLE_SF6outputTCELL11:OUT.16.TMIN
RXNOTINTABLE_SF7outputTCELL12:OUT.16.TMIN
RXOOBRESETB_FSinputTCELL7:IMUX.CTRL.7
RXOUTCKCTL_FS0inputTCELL8:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL9:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL9:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL2:OUT.12.TMIN
RXPLLCKSEL_FS0inputTCELL9:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL10:IMUX.IMUX.4.DELAY
RXPMARESETB_FSinputTCELL8:IMUX.CTRL.7
RXPMARESETDONE_SFoutputTCELL4:OUT.2.TMIN
RXPOLARITY_FSinputTCELL8:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL12:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL5:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL12:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL12:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL12:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL12:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL4:OUT.20.TMIN
RXPROGDIVRESETB_FSinputTCELL10:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL11:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL12:IMUX.IMUX.4.DELAY
RXRATEASYNCH_FSinputTCELL10:IMUX.IMUX.36.DELAY
RXRATEDONE_SFoutputTCELL10:OUT.6.TMIN
RXRATE_FS0inputTCELL9:IMUX.IMUX.18.DELAY
RXRATE_FS1inputTCELL9:IMUX.IMUX.21.DELAY
RXRATE_FS2inputTCELL9:IMUX.IMUX.24.DELAY
RXRECCLKPCS_SFoutputTCELL7:OUT.8.TMIN
RXRECCLK_SFoutputTCELL6:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL12:OUT.10.TMIN
RXRESET_FSinputTCELL9:IMUX.IMUX.13.DELAY
RXSIGVALDLY_FS0inputTCELL2:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS1inputTCELL3:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS2inputTCELL3:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS3inputTCELL4:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS4inputTCELL4:IMUX.IMUX.46.DELAY
RXSLIDERDY_SFoutputTCELL4:OUT.12.TMIN
RXSLIDE_FSinputTCELL10:IMUX.IMUX.33.DELAY
RXSLIPDONE_SFoutputTCELL4:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL4:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL12:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL4:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL12:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL11:IMUX.IMUX.26.DELAY
RXSTARTOFSEQ_SF0outputTCELL11:OUT.6.TMIN
RXSTARTOFSEQ_SF1outputTCELL12:OUT.6.TMIN
RXSTATUS_SF0outputTCELL10:OUT.14.TMIN
RXSTATUS_SF1outputTCELL11:OUT.14.TMIN
RXSTATUS_SF2outputTCELL12:OUT.14.TMIN
RXSYNCEN2SLV_SFoutputTCELL4:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL11:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL9:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL8:IMUX.IMUX.4.DELAY
RXTERMPROG_FS0inputTCELL0:IMUX.IMUX.43.DELAY
RXTERMPROG_FS1inputTCELL0:IMUX.IMUX.46.DELAY
RXTERMPROG_FS2inputTCELL1:IMUX.IMUX.43.DELAY
RXTERMPROG_FS3inputTCELL1:IMUX.IMUX.46.DELAY
RXTERMPROG_FS4inputTCELL2:IMUX.IMUX.43.DELAY
RXUSRCLK2B_FSinputTCELL9:IMUX.CTRL.4
RXUSRCLKB_FSinputTCELL9:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL11:IMUX.IMUX.29.DELAY
RXVALID_SFoutputTCELL12:OUT.0.TMIN
RX_POST_DCC_START_FSinputTCELL10:IMUX.IMUX.5.DELAY
SCANCLKB_FSinputTCELL7:IMUX.CTRL.5
SCANENB_FSinputTCELL1:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL0:IMUX.IMUX.27.DELAY
SCANIN_FS1inputTCELL1:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL1:IMUX.IMUX.18.DELAY
SCANIN_FS11inputTCELL0:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL0:IMUX.IMUX.31.DELAY
SCANIN_FS13inputTCELL2:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL9:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL9:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL10:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL11:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL12:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL0:IMUX.IMUX.30.DELAY
SCANIN_FS3inputTCELL1:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL0:IMUX.IMUX.33.DELAY
SCANIN_FS5inputTCELL1:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL1:IMUX.IMUX.24.DELAY
SCANIN_FS7inputTCELL0:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL1:IMUX.IMUX.21.DELAY
SCANIN_FS9inputTCELL0:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL1:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL0:OUT.23.TMIN
SCANOUT_SF1outputTCELL1:OUT.23.TMIN
SCANOUT_SF10outputTCELL2:OUT.2.TMIN
SCANOUT_SF11outputTCELL0:OUT.4.TMIN
SCANOUT_SF12outputTCELL1:OUT.4.TMIN
SCANOUT_SF13outputTCELL2:OUT.4.TMIN
SCANOUT_SF14outputTCELL0:OUT.8.TMIN
SCANOUT_SF15outputTCELL1:OUT.8.TMIN
SCANOUT_SF16outputTCELL2:OUT.10.TMIN
SCANOUT_SF17outputTCELL3:OUT.10.TMIN
SCANOUT_SF18outputTCELL3:OUT.12.TMIN
SCANOUT_SF2outputTCELL2:OUT.23.TMIN
SCANOUT_SF3outputTCELL3:OUT.23.TMIN
SCANOUT_SF4outputTCELL4:OUT.23.TMIN
SCANOUT_SF5outputTCELL0:OUT.11.TMIN
SCANOUT_SF6outputTCELL0:OUT.0.TMIN
SCANOUT_SF7outputTCELL1:OUT.0.TMIN
SCANOUT_SF8outputTCELL0:OUT.2.TMIN
SCANOUT_SF9outputTCELL1:OUT.2.TMIN
STEPSIZEPPM_FS0inputTCELL2:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL3:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL4:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL5:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL6:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUTB_FSinputTCELL6:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL5:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL6:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL7:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL7:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL6:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL2:OUT.20.TMIN
TCOINITSET_FSinputTCELL8:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL3:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL7:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL6:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL3:OUT.8.TMIN
TSTCLK0B_FSinputTCELL8:IMUX.CTRL.5
TSTCLK1B_FSinputTCELL8:IMUX.CTRL.4
TSTIN_FS0inputTCELL0:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL1:IMUX.IMUX.1.DELAY
TSTIN_FS10inputTCELL0:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL1:IMUX.IMUX.16.DELAY
TSTIN_FS12inputTCELL0:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL1:IMUX.IMUX.19.DELAY
TSTIN_FS14inputTCELL0:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL1:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL0:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL1:IMUX.IMUX.25.DELAY
TSTIN_FS18inputTCELL0:IMUX.IMUX.28.DELAY
TSTIN_FS19inputTCELL1:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL0:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL1:IMUX.IMUX.4.DELAY
TSTIN_FS4inputTCELL0:IMUX.IMUX.7.DELAY
TSTIN_FS5inputTCELL1:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL0:IMUX.IMUX.10.DELAY
TSTIN_FS7inputTCELL1:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL0:IMUX.IMUX.13.DELAY
TSTIN_FS9inputTCELL1:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL1:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL1:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL1:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL1:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL1:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL1:IMUX.IMUX.15.DELAY
TXBUFSTATUS_SF0outputTCELL2:OUT.0.TMIN
TXBUFSTATUS_SF1outputTCELL2:OUT.13.TMIN
TXBYPASS8B10B_FS0inputTCELL2:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS1inputTCELL3:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS2inputTCELL4:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS3inputTCELL5:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS4inputTCELL6:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS5inputTCELL7:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS6inputTCELL8:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS7inputTCELL9:IMUX.IMUX.15.DELAY
TXCHARDISPMODE_FS0inputTCELL2:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS1inputTCELL3:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS10inputTCELL4:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS11inputTCELL5:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS12inputTCELL6:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS13inputTCELL7:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS14inputTCELL8:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS15inputTCELL9:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS2inputTCELL4:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS3inputTCELL5:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS4inputTCELL6:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS5inputTCELL7:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS6inputTCELL8:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS7inputTCELL9:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS8inputTCELL2:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS9inputTCELL3:IMUX.IMUX.39.DELAY
TXCHARDISPVAL_FS0inputTCELL2:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS1inputTCELL3:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS10inputTCELL4:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS11inputTCELL5:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS12inputTCELL6:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS13inputTCELL7:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS14inputTCELL8:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS15inputTCELL9:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS2inputTCELL4:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS3inputTCELL5:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS4inputTCELL6:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS5inputTCELL7:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS6inputTCELL8:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS7inputTCELL9:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS8inputTCELL2:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS9inputTCELL3:IMUX.IMUX.36.DELAY
TXCHARISK_FS0inputTCELL2:IMUX.IMUX.0.DELAY
TXCHARISK_FS1inputTCELL3:IMUX.IMUX.0.DELAY
TXCHARISK_FS2inputTCELL4:IMUX.IMUX.0.DELAY
TXCHARISK_FS3inputTCELL5:IMUX.IMUX.0.DELAY
TXCHARISK_FS4inputTCELL6:IMUX.IMUX.0.DELAY
TXCHARISK_FS5inputTCELL7:IMUX.IMUX.0.DELAY
TXCHARISK_FS6inputTCELL8:IMUX.IMUX.0.DELAY
TXCHARISK_FS7inputTCELL9:IMUX.IMUX.0.DELAY
TXCODAALGNEN_FSinputTCELL5:IMUX.IMUX.7.DELAY
TXCOMINIT_FSinputTCELL4:IMUX.IMUX.16.DELAY
TXCOMSAS_FSinputTCELL4:IMUX.IMUX.10.DELAY
TXCOMWAKE_FSinputTCELL4:IMUX.IMUX.9.DELAY
TXCOPIALGNEN_FSinputTCELL7:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL2:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL7:IMUX.IMUX.19.DELAY
TXDATAEXTENDRSVD_FS0inputTCELL2:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS1inputTCELL3:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS2inputTCELL4:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS3inputTCELL5:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS4inputTCELL6:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS5inputTCELL7:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS6inputTCELL8:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS7inputTCELL9:IMUX.IMUX.30.DELAY
TXDATA_FS0inputTCELL2:IMUX.IMUX.5.DELAY
TXDATA_FS1inputTCELL2:IMUX.IMUX.11.DELAY
TXDATA_FS10inputTCELL3:IMUX.IMUX.17.DELAY
TXDATA_FS100inputTCELL6:IMUX.IMUX.26.DELAY
TXDATA_FS101inputTCELL6:IMUX.IMUX.32.DELAY
TXDATA_FS102inputTCELL6:IMUX.IMUX.38.DELAY
TXDATA_FS103inputTCELL6:IMUX.IMUX.44.DELAY
TXDATA_FS104inputTCELL7:IMUX.IMUX.2.DELAY
TXDATA_FS105inputTCELL7:IMUX.IMUX.8.DELAY
TXDATA_FS106inputTCELL7:IMUX.IMUX.14.DELAY
TXDATA_FS107inputTCELL7:IMUX.IMUX.20.DELAY
TXDATA_FS108inputTCELL7:IMUX.IMUX.26.DELAY
TXDATA_FS109inputTCELL7:IMUX.IMUX.32.DELAY
TXDATA_FS11inputTCELL3:IMUX.IMUX.23.DELAY
TXDATA_FS110inputTCELL7:IMUX.IMUX.38.DELAY
TXDATA_FS111inputTCELL7:IMUX.IMUX.44.DELAY
TXDATA_FS112inputTCELL8:IMUX.IMUX.2.DELAY
TXDATA_FS113inputTCELL8:IMUX.IMUX.8.DELAY
TXDATA_FS114inputTCELL8:IMUX.IMUX.14.DELAY
TXDATA_FS115inputTCELL8:IMUX.IMUX.20.DELAY
TXDATA_FS116inputTCELL8:IMUX.IMUX.26.DELAY
TXDATA_FS117inputTCELL8:IMUX.IMUX.32.DELAY
TXDATA_FS118inputTCELL8:IMUX.IMUX.38.DELAY
TXDATA_FS119inputTCELL8:IMUX.IMUX.44.DELAY
TXDATA_FS12inputTCELL3:IMUX.IMUX.29.DELAY
TXDATA_FS120inputTCELL9:IMUX.IMUX.2.DELAY
TXDATA_FS121inputTCELL9:IMUX.IMUX.8.DELAY
TXDATA_FS122inputTCELL9:IMUX.IMUX.14.DELAY
TXDATA_FS123inputTCELL9:IMUX.IMUX.20.DELAY
TXDATA_FS124inputTCELL9:IMUX.IMUX.26.DELAY
TXDATA_FS125inputTCELL9:IMUX.IMUX.32.DELAY
TXDATA_FS126inputTCELL9:IMUX.IMUX.38.DELAY
TXDATA_FS127inputTCELL9:IMUX.IMUX.44.DELAY
TXDATA_FS13inputTCELL3:IMUX.IMUX.35.DELAY
TXDATA_FS14inputTCELL3:IMUX.IMUX.41.DELAY
TXDATA_FS15inputTCELL3:IMUX.IMUX.47.DELAY
TXDATA_FS16inputTCELL4:IMUX.IMUX.5.DELAY
TXDATA_FS17inputTCELL4:IMUX.IMUX.11.DELAY
TXDATA_FS18inputTCELL4:IMUX.IMUX.17.DELAY
TXDATA_FS19inputTCELL4:IMUX.IMUX.23.DELAY
TXDATA_FS2inputTCELL2:IMUX.IMUX.17.DELAY
TXDATA_FS20inputTCELL4:IMUX.IMUX.29.DELAY
TXDATA_FS21inputTCELL4:IMUX.IMUX.35.DELAY
TXDATA_FS22inputTCELL4:IMUX.IMUX.41.DELAY
TXDATA_FS23inputTCELL4:IMUX.IMUX.47.DELAY
TXDATA_FS24inputTCELL5:IMUX.IMUX.5.DELAY
TXDATA_FS25inputTCELL5:IMUX.IMUX.11.DELAY
TXDATA_FS26inputTCELL5:IMUX.IMUX.17.DELAY
TXDATA_FS27inputTCELL5:IMUX.IMUX.23.DELAY
TXDATA_FS28inputTCELL5:IMUX.IMUX.29.DELAY
TXDATA_FS29inputTCELL5:IMUX.IMUX.35.DELAY
TXDATA_FS3inputTCELL2:IMUX.IMUX.23.DELAY
TXDATA_FS30inputTCELL5:IMUX.IMUX.41.DELAY
TXDATA_FS31inputTCELL5:IMUX.IMUX.47.DELAY
TXDATA_FS32inputTCELL6:IMUX.IMUX.5.DELAY
TXDATA_FS33inputTCELL6:IMUX.IMUX.11.DELAY
TXDATA_FS34inputTCELL6:IMUX.IMUX.17.DELAY
TXDATA_FS35inputTCELL6:IMUX.IMUX.23.DELAY
TXDATA_FS36inputTCELL6:IMUX.IMUX.29.DELAY
TXDATA_FS37inputTCELL6:IMUX.IMUX.35.DELAY
TXDATA_FS38inputTCELL6:IMUX.IMUX.41.DELAY
TXDATA_FS39inputTCELL6:IMUX.IMUX.47.DELAY
TXDATA_FS4inputTCELL2:IMUX.IMUX.29.DELAY
TXDATA_FS40inputTCELL7:IMUX.IMUX.5.DELAY
TXDATA_FS41inputTCELL7:IMUX.IMUX.11.DELAY
TXDATA_FS42inputTCELL7:IMUX.IMUX.17.DELAY
TXDATA_FS43inputTCELL7:IMUX.IMUX.23.DELAY
TXDATA_FS44inputTCELL7:IMUX.IMUX.29.DELAY
TXDATA_FS45inputTCELL7:IMUX.IMUX.35.DELAY
TXDATA_FS46inputTCELL7:IMUX.IMUX.41.DELAY
TXDATA_FS47inputTCELL7:IMUX.IMUX.47.DELAY
TXDATA_FS48inputTCELL8:IMUX.IMUX.5.DELAY
TXDATA_FS49inputTCELL8:IMUX.IMUX.11.DELAY
TXDATA_FS5inputTCELL2:IMUX.IMUX.35.DELAY
TXDATA_FS50inputTCELL8:IMUX.IMUX.17.DELAY
TXDATA_FS51inputTCELL8:IMUX.IMUX.23.DELAY
TXDATA_FS52inputTCELL8:IMUX.IMUX.29.DELAY
TXDATA_FS53inputTCELL8:IMUX.IMUX.35.DELAY
TXDATA_FS54inputTCELL8:IMUX.IMUX.41.DELAY
TXDATA_FS55inputTCELL8:IMUX.IMUX.47.DELAY
TXDATA_FS56inputTCELL9:IMUX.IMUX.5.DELAY
TXDATA_FS57inputTCELL9:IMUX.IMUX.11.DELAY
TXDATA_FS58inputTCELL9:IMUX.IMUX.17.DELAY
TXDATA_FS59inputTCELL9:IMUX.IMUX.23.DELAY
TXDATA_FS6inputTCELL2:IMUX.IMUX.41.DELAY
TXDATA_FS60inputTCELL9:IMUX.IMUX.29.DELAY
TXDATA_FS61inputTCELL9:IMUX.IMUX.35.DELAY
TXDATA_FS62inputTCELL9:IMUX.IMUX.41.DELAY
TXDATA_FS63inputTCELL9:IMUX.IMUX.47.DELAY
TXDATA_FS64inputTCELL2:IMUX.IMUX.2.DELAY
TXDATA_FS65inputTCELL2:IMUX.IMUX.8.DELAY
TXDATA_FS66inputTCELL2:IMUX.IMUX.14.DELAY
TXDATA_FS67inputTCELL2:IMUX.IMUX.20.DELAY
TXDATA_FS68inputTCELL2:IMUX.IMUX.26.DELAY
TXDATA_FS69inputTCELL2:IMUX.IMUX.32.DELAY
TXDATA_FS7inputTCELL2:IMUX.IMUX.47.DELAY
TXDATA_FS70inputTCELL2:IMUX.IMUX.38.DELAY
TXDATA_FS71inputTCELL2:IMUX.IMUX.44.DELAY
TXDATA_FS72inputTCELL3:IMUX.IMUX.2.DELAY
TXDATA_FS73inputTCELL3:IMUX.IMUX.8.DELAY
TXDATA_FS74inputTCELL3:IMUX.IMUX.14.DELAY
TXDATA_FS75inputTCELL3:IMUX.IMUX.20.DELAY
TXDATA_FS76inputTCELL3:IMUX.IMUX.26.DELAY
TXDATA_FS77inputTCELL3:IMUX.IMUX.32.DELAY
TXDATA_FS78inputTCELL3:IMUX.IMUX.38.DELAY
TXDATA_FS79inputTCELL3:IMUX.IMUX.44.DELAY
TXDATA_FS8inputTCELL3:IMUX.IMUX.5.DELAY
TXDATA_FS80inputTCELL4:IMUX.IMUX.2.DELAY
TXDATA_FS81inputTCELL4:IMUX.IMUX.8.DELAY
TXDATA_FS82inputTCELL4:IMUX.IMUX.14.DELAY
TXDATA_FS83inputTCELL4:IMUX.IMUX.20.DELAY
TXDATA_FS84inputTCELL4:IMUX.IMUX.26.DELAY
TXDATA_FS85inputTCELL4:IMUX.IMUX.32.DELAY
TXDATA_FS86inputTCELL4:IMUX.IMUX.38.DELAY
TXDATA_FS87inputTCELL4:IMUX.IMUX.44.DELAY
TXDATA_FS88inputTCELL5:IMUX.IMUX.2.DELAY
TXDATA_FS89inputTCELL5:IMUX.IMUX.8.DELAY
TXDATA_FS9inputTCELL3:IMUX.IMUX.11.DELAY
TXDATA_FS90inputTCELL5:IMUX.IMUX.14.DELAY
TXDATA_FS91inputTCELL5:IMUX.IMUX.20.DELAY
TXDATA_FS92inputTCELL5:IMUX.IMUX.26.DELAY
TXDATA_FS93inputTCELL5:IMUX.IMUX.32.DELAY
TXDATA_FS94inputTCELL5:IMUX.IMUX.38.DELAY
TXDATA_FS95inputTCELL5:IMUX.IMUX.44.DELAY
TXDATA_FS96inputTCELL6:IMUX.IMUX.2.DELAY
TXDATA_FS97inputTCELL6:IMUX.IMUX.8.DELAY
TXDATA_FS98inputTCELL6:IMUX.IMUX.14.DELAY
TXDATA_FS99inputTCELL6:IMUX.IMUX.20.DELAY
TXDCCDONE_SFoutputTCELL3:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL2:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL7:IMUX.IMUX.4.DELAY
TXDEEMPH_FSinputTCELL4:IMUX.IMUX.7.DELAY
TXDETECTRX_FSinputTCELL5:IMUX.IMUX.19.DELAY
TXDRVAMP_FS0inputTCELL4:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL5:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL6:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL7:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL7:IMUX.IMUX.3.DELAY
TXDRVPWRDN_FSinputTCELL5:IMUX.IMUX.16.DELAY
TXELECIDLE_FSinputTCELL7:IMUX.IMUX.27.DELAY
TXEMPINVPO_FSinputTCELL2:IMUX.IMUX.22.DELAY
TXEMPINVPR_FSinputTCELL2:IMUX.IMUX.16.DELAY
TXEMPMAIN_FS0inputTCELL2:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL3:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL4:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL5:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL6:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL7:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL8:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL2:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL3:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL4:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL5:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL6:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL2:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL3:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL4:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL5:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL6:IMUX.IMUX.13.DELAY
TXENC8B10BUSE_FSinputTCELL4:IMUX.IMUX.19.DELAY
TXHEADER_FS0inputTCELL2:IMUX.IMUX.34.DELAY
TXHEADER_FS1inputTCELL2:IMUX.IMUX.31.DELAY
TXHEADER_FS2inputTCELL3:IMUX.IMUX.34.DELAY
TXHEADER_FS3inputTCELL3:IMUX.IMUX.31.DELAY
TXHEADER_FS4inputTCELL4:IMUX.IMUX.34.DELAY
TXHEADER_FS5inputTCELL4:IMUX.IMUX.31.DELAY
TXINHIBIT_FSinputTCELL7:IMUX.IMUX.25.DELAY
TXLATCLKB_FSinputTCELL6:IMUX.CTRL.4
TXLINKSYNCDONE_SFoutputTCELL3:OUT.11.TMIN
TXMARGIN_FS0inputTCELL4:IMUX.IMUX.28.DELAY
TXMARGIN_FS1inputTCELL5:IMUX.IMUX.28.DELAY
TXMARGIN_FS2inputTCELL6:IMUX.IMUX.28.DELAY
TXMSTRSETPHDONE_FSinputTCELL4:IMUX.IMUX.4.DELAY
TXOUTCKCTL_FS0inputTCELL4:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL5:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL6:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL2:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL2:OUT.6.TMIN
TXPDOWNASYNCH_FSinputTCELL7:IMUX.IMUX.22.DELAY
TXPIPPMPWDN_FSinputTCELL3:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL5:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL6:IMUX.IMUX.27.DELAY
TXPMARESETB_FSinputTCELL6:IMUX.CTRL.0
TXPMARESETDONE_SFoutputTCELL2:OUT.24.TMIN
TXPOLARITY_FSinputTCELL2:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL3:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL3:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL2:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL4:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL5:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL6:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL6:IMUX.IMUX.1.DELAY
TXPREAMP_FS0inputTCELL4:IMUX.IMUX.6.DELAY
TXPREAMP_FS1inputTCELL5:IMUX.IMUX.6.DELAY
TXPREAMP_FS2inputTCELL6:IMUX.IMUX.6.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL4:OUT.17.TMIN
TXPROGDIVRESETB_FSinputTCELL5:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL2:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL3:IMUX.IMUX.28.DELAY
TXRATEASYNCH_FSinputTCELL2:IMUX.IMUX.7.DELAY
TXRATEDONE_SFoutputTCELL3:OUT.4.TMIN
TXRATE_FS0inputTCELL4:IMUX.IMUX.22.DELAY
TXRATE_FS1inputTCELL5:IMUX.IMUX.22.DELAY
TXRATE_FS2inputTCELL6:IMUX.IMUX.22.DELAY
TXRESETDONE_SFoutputTCELL3:OUT.13.TMIN
TXRESET_FSinputTCELL8:IMUX.IMUX.9.DELAY
TXSEQUENCE_FS0inputTCELL2:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS1inputTCELL3:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS2inputTCELL4:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS3inputTCELL5:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS4inputTCELL6:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS5inputTCELL7:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS6inputTCELL8:IMUX.IMUX.21.DELAY
TXSERPWRDN_FSinputTCELL2:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL3:IMUX.IMUX.4.DELAY
TXSWING_FSinputTCELL9:IMUX.IMUX.1.DELAY
TXSYNCEN2SLV_SFoutputTCELL3:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL8:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL3:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL4:IMUX.IMUX.27.DELAY
TXUSRCLK2B_FSinputTCELL5:IMUX.CTRL.4
TXUSRCLKB_FSinputTCELL5:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL2:IMUX.IMUX.4.DELAY
TX_EL_FORCE_START_FSinputTCELL6:IMUX.IMUX.4.DELAY

Bel GTY_CHANNEL1

ultrascale GTY bel GTY_CHANNEL1
PinDirectionWires
AFECFOKEN_FSinputTCELL27:IMUX.IMUX.17.DELAY
ALT_SIGVALID_CLKB_FSinputTCELL28:IMUX.CTRL.5
BUFGTCEMASK_SF0outputTCELL17:OUT.18.TMIN
BUFGTCEMASK_SF1outputTCELL18:OUT.18.TMIN
BUFGTCEMASK_SF2outputTCELL17:OUT.12.TMIN
BUFGTCE_SF0outputTCELL17:OUT.16.TMIN
BUFGTCE_SF1outputTCELL18:OUT.16.TMIN
BUFGTCE_SF2outputTCELL18:OUT.12.TMIN
BUFGTDIV_SF0outputTCELL17:OUT.3.TMIN
BUFGTDIV_SF1outputTCELL18:OUT.3.TMIN
BUFGTDIV_SF2outputTCELL19:OUT.3.TMIN
BUFGTDIV_SF3outputTCELL17:OUT.5.TMIN
BUFGTDIV_SF4outputTCELL18:OUT.5.TMIN
BUFGTDIV_SF5outputTCELL19:OUT.5.TMIN
BUFGTDIV_SF6outputTCELL17:OUT.7.TMIN
BUFGTDIV_SF7outputTCELL18:OUT.7.TMIN
BUFGTDIV_SF8outputTCELL19:OUT.7.TMIN
BUFGTRESET_SF0outputTCELL17:OUT.1.TMIN
BUFGTRESET_SF1outputTCELL18:OUT.1.TMIN
BUFGTRESET_SF2outputTCELL17:OUT.10.TMIN
BUFGTRSTMASK_SF0outputTCELL18:OUT.10.TMIN
BUFGTRSTMASK_SF1outputTCELL21:OUT.11.TMIN
BUFGTRSTMASK_SF2outputTCELL21:OUT.14.TMIN
CDRFRRESETB_FSinputTCELL25:IMUX.CTRL.0
CDRHOLD_FSinputTCELL25:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL23:OUT.6.TMIN
CDROVREN_FSinputTCELL26:IMUX.IMUX.31.DELAY
CDRPHRESETB_FSinputTCELL28:IMUX.CTRL.0
CDRRESETB_FSinputTCELL29:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL29:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL29:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL29:IMUX.IMUX.15.DELAY
CFGRESETB_FSinputTCELL19:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL20:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL20:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL21:OUT.0.TMIN
CFOKRESET_FSinputTCELL27:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL21:OUT.6.TMIN
CKOKDONE_SFoutputTCELL20:OUT.17.TMIN
CKOKRESET_FSinputTCELL27:IMUX.IMUX.2.DELAY
CKPINRSRVD0B_FSinputTCELL29:IMUX.CTRL.5
CKPINRSRVD1B_FSinputTCELL29:IMUX.CTRL.4
COMFINISH_SFoutputTCELL23:OUT.0.TMIN
COMINITDET_SFoutputTCELL25:OUT.0.TMIN
COMSASDET_SFoutputTCELL27:OUT.0.TMIN
COMWAKEDET_SFoutputTCELL28:OUT.0.TMIN
COREREFCLKB_FSinputTCELL18:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL19:OUT.18.TMIN
CPLFREQLOCK_SFoutputTCELL19:OUT.1.TMIN
CPLLDMONCLKB_FSinputTCELL20:IMUX.CTRL.5
CPLLKDETEN_FSinputTCELL20:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL19:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL19:OUT.8.TMIN
CPLREFSELDYN_FS0inputTCELL20:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL20:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL20:IMUX.IMUX.3.DELAY
CPLRESETB_FSinputTCELL20:IMUX.CTRL.0
DADDR_FS0inputTCELL17:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL17:IMUX.IMUX.8.DELAY
DADDR_FS2inputTCELL17:IMUX.IMUX.14.DELAY
DADDR_FS3inputTCELL17:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL17:IMUX.IMUX.26.DELAY
DADDR_FS5inputTCELL17:IMUX.IMUX.32.DELAY
DADDR_FS6inputTCELL17:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL17:IMUX.IMUX.44.DELAY
DADDR_FS8inputTCELL18:IMUX.IMUX.2.DELAY
DADDR_FS9inputTCELL18:IMUX.IMUX.8.DELAY
DCLKB_FSinputTCELL17:IMUX.CTRL.4
DEN_FSinputTCELL17:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL29:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL29:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL29:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL29:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL26:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL26:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL27:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL26:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL28:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL28:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL17:OUT.26.TMIN
DFEDOUT_SF1outputTCELL18:OUT.26.TMIN
DFEDOUT_SF2outputTCELL19:OUT.26.TMIN
DFEDOUT_SF3outputTCELL20:OUT.26.TMIN
DFEDOUT_SF4outputTCELL21:OUT.26.TMIN
DFEDOUT_SF5outputTCELL17:OUT.6.TMIN
DFEDOUT_SF6outputTCELL18:OUT.6.TMIN
DFEGCHOLD_FSinputTCELL27:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL27:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL29:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL29:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL27:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL27:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL28:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL28:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL29:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL29:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL27:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL27:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL28:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL28:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL27:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL27:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL28:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL28:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL29:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL29:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL27:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL27:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL28:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL28:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL29:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL29:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL27:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL27:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL28:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL28:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL27:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL27:IMUX.IMUX.38.DELAY
DFERESETB_FSinputTCELL24:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL27:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL27:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL28:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL28:IMUX.IMUX.39.DELAY
DFEVSEN_FSinputTCELL27:IMUX.IMUX.45.DELAY
DFEYEN_FSinputTCELL28:IMUX.IMUX.45.DELAY
DI_FS0inputTCELL17:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL17:IMUX.IMUX.11.DELAY
DI_FS10inputTCELL18:IMUX.IMUX.17.DELAY
DI_FS11inputTCELL18:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL18:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL18:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL18:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL18:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL17:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL17:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL17:IMUX.IMUX.29.DELAY
DI_FS5inputTCELL17:IMUX.IMUX.35.DELAY
DI_FS6inputTCELL17:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL17:IMUX.IMUX.47.DELAY
DI_FS8inputTCELL18:IMUX.IMUX.5.DELAY
DI_FS9inputTCELL18:IMUX.IMUX.11.DELAY
DMONCLKB_FSinputTCELL17:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL18:IMUX.IMUX.0.DELAY
DMONOUT_SF0outputTCELL17:OUT.27.TMIN
DMONOUT_SF1outputTCELL18:OUT.27.TMIN
DMONOUT_SF10outputTCELL17:OUT.15.TMIN
DMONOUT_SF11outputTCELL18:OUT.15.TMIN
DMONOUT_SF12outputTCELL19:OUT.15.TMIN
DMONOUT_SF13outputTCELL20:OUT.15.TMIN
DMONOUT_SF14outputTCELL21:OUT.15.TMIN
DMONOUT_SF15outputTCELL17:OUT.9.TMIN
DMONOUT_SF16outputTCELL18:OUT.13.TMIN
DMONOUT_SF2outputTCELL19:OUT.27.TMIN
DMONOUT_SF3outputTCELL20:OUT.27.TMIN
DMONOUT_SF4outputTCELL21:OUT.27.TMIN
DMONOUT_SF5outputTCELL17:OUT.21.TMIN
DMONOUT_SF6outputTCELL18:OUT.21.TMIN
DMONOUT_SF7outputTCELL19:OUT.21.TMIN
DMONOUT_SF8outputTCELL20:OUT.21.TMIN
DMONOUT_SF9outputTCELL21:OUT.21.TMIN
DRDY_SFoutputTCELL18:OUT.11.TMIN
DRPDO_SF0outputTCELL17:OUT.31.TMIN
DRPDO_SF1outputTCELL18:OUT.31.TMIN
DRPDO_SF10outputTCELL17:OUT.19.TMIN
DRPDO_SF11outputTCELL18:OUT.19.TMIN
DRPDO_SF12outputTCELL19:OUT.19.TMIN
DRPDO_SF13outputTCELL20:OUT.19.TMIN
DRPDO_SF14outputTCELL21:OUT.19.TMIN
DRPDO_SF15outputTCELL17:OUT.13.TMIN
DRPDO_SF2outputTCELL19:OUT.31.TMIN
DRPDO_SF3outputTCELL20:OUT.31.TMIN
DRPDO_SF4outputTCELL21:OUT.31.TMIN
DRPDO_SF5outputTCELL17:OUT.25.TMIN
DRPDO_SF6outputTCELL18:OUT.25.TMIN
DRPDO_SF7outputTCELL19:OUT.25.TMIN
DRPDO_SF8outputTCELL20:OUT.25.TMIN
DRPDO_SF9outputTCELL21:OUT.25.TMIN
DWE_FSinputTCELL17:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL20:IMUX.IMUX.22.DELAY
EVODDPHICALDONE_FSinputTCELL18:IMUX.IMUX.42.DELAY
EVODDPHICALSTART_FSinputTCELL18:IMUX.IMUX.45.DELAY
EVODDPHIDRDEN_FSinputTCELL18:IMUX.IMUX.39.DELAY
EVODDPHIDWREN_FSinputTCELL18:IMUX.IMUX.36.DELAY
EVODDPHIXRDEN_FSinputTCELL18:IMUX.IMUX.34.DELAY
EVODDPHIXWREN_FSinputTCELL18:IMUX.IMUX.31.DELAY
EYESCANDATAERROR_SFoutputTCELL18:OUT.28.TMIN
EYESCANTRIGGER_FSinputTCELL17:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL25:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL25:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL21:OUT.22.TMIN
GTRSTSEL_FSinputTCELL18:IMUX.IMUX.20.DELAY
GTRXRSTB_FSinputTCELL26:IMUX.CTRL.0
GTTXRSTB_FSinputTCELL21:IMUX.CTRL.0
ISCANRESET_FSinputTCELL17:IMUX.IMUX.9.DELAY
ISERRDETEN_FSinputTCELL17:IMUX.IMUX.6.DELAY
LOOPBACK_FS0inputTCELL19:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL19:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL19:IMUX.IMUX.9.DELAY
LOOPRSVD_FS0inputTCELL27:IMUX.IMUX.3.DELAY
LOOPRSVD_FS1inputTCELL28:IMUX.IMUX.3.DELAY
LOOPRSVD_FS10inputTCELL28:IMUX.IMUX.14.DELAY
LOOPRSVD_FS11inputTCELL28:IMUX.IMUX.17.DELAY
LOOPRSVD_FS12inputTCELL28:IMUX.IMUX.21.DELAY
LOOPRSVD_FS13inputTCELL29:IMUX.IMUX.24.DELAY
LOOPRSVD_FS14inputTCELL29:IMUX.IMUX.31.DELAY
LOOPRSVD_FS15inputTCELL29:IMUX.IMUX.41.DELAY
LOOPRSVD_FS2inputTCELL29:IMUX.IMUX.3.DELAY
LOOPRSVD_FS3inputTCELL27:IMUX.IMUX.6.DELAY
LOOPRSVD_FS4inputTCELL28:IMUX.IMUX.6.DELAY
LOOPRSVD_FS5inputTCELL29:IMUX.IMUX.6.DELAY
LOOPRSVD_FS6inputTCELL27:IMUX.IMUX.9.DELAY
LOOPRSVD_FS7inputTCELL28:IMUX.IMUX.9.DELAY
LOOPRSVD_FS8inputTCELL29:IMUX.IMUX.9.DELAY
LOOPRSVD_FS9inputTCELL27:IMUX.IMUX.14.DELAY
LPBKRXTXSEREN_FSinputTCELL18:IMUX.IMUX.26.DELAY
LPBKTXRXSEREN_FSinputTCELL17:IMUX.IMUX.15.DELAY
LPMGCHOLD_FSinputTCELL29:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL29:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL29:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL28:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL29:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL29:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL28:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL28:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL17:OUT.28.TMIN
OSHOLD_FSinputTCELL27:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL26:IMUX.IMUX.16.DELAY
PCIEEQRXEQADAPTDONE_FSinputTCELL29:IMUX.IMUX.39.DELAY
PCIERATEGEN3_SFoutputTCELL18:OUT.24.TMIN
PCIERATEIDLE_SFoutputTCELL17:OUT.24.TMIN
PCIERATEQPLLPD_SF0outputTCELL22:OUT.10.TMIN
PCIERATEQPLLPD_SF1outputTCELL23:OUT.10.TMIN
PCIERATEQPLLRESET_SF0outputTCELL17:OUT.20.TMIN
PCIERATEQPLLRESET_SF1outputTCELL18:OUT.20.TMIN
PCIERSTIDLE_FSinputTCELL28:IMUX.IMUX.41.DELAY
PCIERSTTXSYNCSTART_FSinputTCELL22:IMUX.IMUX.4.DELAY
PCIESYNCTXSYNCDONE_SFoutputTCELL19:OUT.17.TMIN
PCIEUSERGEN3RDY_SFoutputTCELL20:OUT.5.TMIN
PCIEUSERPHYSTATUSRST_SFoutputTCELL20:OUT.3.TMIN
PCS_RSVD_IN_FS0inputTCELL22:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL22:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL27:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL27:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL28:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL28:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL29:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL29:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL23:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL23:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL24:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL24:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL25:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL25:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL26:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL26:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL22:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL23:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL24:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL25:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL26:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL27:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL28:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL29:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL24:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL25:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL26:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL27:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL28:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL29:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL22:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL23:OUT.20.TMIN
PHYSTATUS_SFoutputTCELL24:OUT.0.TMIN
PINRSRVDAS_SF0outputTCELL18:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL19:OUT.9.TMIN
PINRSRVDAS_SF2outputTCELL20:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL21:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL18:OUT.30.TMIN
PINRSRVDAS_SF5outputTCELL19:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL20:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL21:OUT.30.TMIN
PINRSRVD_FS0inputTCELL22:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL22:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL27:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL27:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL28:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL28:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL29:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL29:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL23:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL23:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL24:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL24:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL25:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL25:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL26:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL26:IMUX.IMUX.46.DELAY
PMASCANCLK0B_FSinputTCELL27:IMUX.CTRL.5
PMASCANCLK1B_FSinputTCELL27:IMUX.CTRL.4
PMASCANCLK2B_FSinputTCELL21:IMUX.CTRL.5
PMASCANCLK3B_FSinputTCELL21:IMUX.CTRL.4
PMASCANCLK4B_FSinputTCELL19:IMUX.CTRL.5
PMASCANCLK5B_FSinputTCELL19:IMUX.CTRL.6
PMASCANENB_FSinputTCELL18:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL18:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL19:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL17:IMUX.IMUX.42.DELAY
PMASCANIN_FS11inputTCELL17:IMUX.IMUX.45.DELAY
PMASCANIN_FS2inputTCELL19:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL20:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL20:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL21:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL21:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL17:IMUX.IMUX.34.DELAY
PMASCANIN_FS8inputTCELL17:IMUX.IMUX.36.DELAY
PMASCANIN_FS9inputTCELL17:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL17:IMUX.IMUX.40.DELAY
PMASCANOUT_SF0outputTCELL17:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL18:OUT.29.TMIN
PMASCANOUT_SF10outputTCELL19:OUT.14.TMIN
PMASCANOUT_SF11outputTCELL20:OUT.14.TMIN
PMASCANOUT_SF2outputTCELL19:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL20:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL21:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL17:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL18:OUT.17.TMIN
PMASCANOUT_SF7outputTCELL19:OUT.16.TMIN
PMASCANOUT_SF8outputTCELL17:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL18:OUT.14.TMIN
PMASCANRSTEN_FSinputTCELL17:IMUX.IMUX.37.DELAY
PRBSCNTRST_FSinputTCELL25:IMUX.IMUX.12.DELAY
RATE_DRP_DONE_EXT_FSinputTCELL24:IMUX.IMUX.13.DELAY
RATE_DRP_START_SFoutputTCELL20:OUT.24.TMIN
RCODAPWDN_FSinputTCELL25:IMUX.IMUX.19.DELAY
RCODARESETB_FSinputTCELL26:IMUX.CTRL.7
RCOOVREN_FSinputTCELL25:IMUX.IMUX.16.DELAY
RDASOFTRSTDONE_SFoutputTCELL22:OUT.6.TMIN
RESETOVRD_FSinputTCELL24:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL21:OUT.18.TMIN
RSTCLKENTX_FSinputTCELL20:IMUX.IMUX.7.DELAY
RXBUFRSTB_FSinputTCELL27:IMUX.CTRL.0
RXBUFSTATUS_SF0outputTCELL24:OUT.6.TMIN
RXBUFSTATUS_SF1outputTCELL25:OUT.6.TMIN
RXBUFSTATUS_SF2outputTCELL26:OUT.6.TMIN
RXBYTEISALIGNED_SFoutputTCELL24:OUT.2.TMIN
RXBYTEREALIGN_SFoutputTCELL23:OUT.2.TMIN
RXCDRPHDONE_SFoutputTCELL20:OUT.20.TMIN
RXCHANBONDSEQ_SFoutputTCELL27:OUT.2.TMIN
RXCHANREALIGN_SFoutputTCELL29:OUT.2.TMIN
RXCHARISCOMMA_SF0outputTCELL22:OUT.18.TMIN
RXCHARISCOMMA_SF1outputTCELL23:OUT.18.TMIN
RXCHARISCOMMA_SF2outputTCELL24:OUT.18.TMIN
RXCHARISCOMMA_SF3outputTCELL25:OUT.18.TMIN
RXCHARISCOMMA_SF4outputTCELL26:OUT.18.TMIN
RXCHARISCOMMA_SF5outputTCELL27:OUT.18.TMIN
RXCHARISCOMMA_SF6outputTCELL28:OUT.18.TMIN
RXCHARISCOMMA_SF7outputTCELL29:OUT.18.TMIN
RXCHARISK_SF0outputTCELL22:OUT.26.TMIN
RXCHARISK_SF1outputTCELL23:OUT.26.TMIN
RXCHARISK_SF10outputTCELL24:OUT.24.TMIN
RXCHARISK_SF11outputTCELL25:OUT.24.TMIN
RXCHARISK_SF12outputTCELL26:OUT.24.TMIN
RXCHARISK_SF13outputTCELL27:OUT.24.TMIN
RXCHARISK_SF14outputTCELL28:OUT.24.TMIN
RXCHARISK_SF15outputTCELL29:OUT.24.TMIN
RXCHARISK_SF2outputTCELL24:OUT.26.TMIN
RXCHARISK_SF3outputTCELL25:OUT.26.TMIN
RXCHARISK_SF4outputTCELL26:OUT.26.TMIN
RXCHARISK_SF5outputTCELL27:OUT.26.TMIN
RXCHARISK_SF6outputTCELL28:OUT.26.TMIN
RXCHARISK_SF7outputTCELL29:OUT.26.TMIN
RXCHARISK_SF8outputTCELL22:OUT.24.TMIN
RXCHARISK_SF9outputTCELL23:OUT.24.TMIN
RXCHBONDI_FS0inputTCELL27:IMUX.IMUX.15.DELAY
RXCHBONDI_FS1inputTCELL27:IMUX.IMUX.18.DELAY
RXCHBONDI_FS2inputTCELL27:IMUX.IMUX.21.DELAY
RXCHBONDI_FS3inputTCELL27:IMUX.IMUX.24.DELAY
RXCHBONDI_FS4inputTCELL27:IMUX.IMUX.27.DELAY
RXCHBONDLEVEL_FS0inputTCELL28:IMUX.IMUX.2.DELAY
RXCHBONDLEVEL_FS1inputTCELL28:IMUX.IMUX.5.DELAY
RXCHBONDLEVEL_FS2inputTCELL28:IMUX.IMUX.8.DELAY
RXCHBONDMASTER_FSinputTCELL25:IMUX.IMUX.33.DELAY
RXCHBONDO_SF0outputTCELL22:OUT.14.TMIN
RXCHBONDO_SF1outputTCELL23:OUT.14.TMIN
RXCHBONDO_SF2outputTCELL24:OUT.14.TMIN
RXCHBONDO_SF3outputTCELL25:OUT.14.TMIN
RXCHBONDO_SF4outputTCELL26:OUT.14.TMIN
RXCHBONDSLAVE_FSinputTCELL26:IMUX.IMUX.33.DELAY
RXCHISALIGNED_SFoutputTCELL28:OUT.2.TMIN
RXCKCORCNT_SF0outputTCELL25:OUT.2.TMIN
RXCKCORCNT_SF1outputTCELL26:OUT.2.TMIN
RXCOALGNEN_FSinputTCELL25:IMUX.IMUX.22.DELAY
RXCOMMADETUSE_FSinputTCELL27:IMUX.IMUX.12.DELAY
RXCOMMADET_SFoutputTCELL26:OUT.0.TMIN
RXCOPHDONE_SFoutputTCELL21:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL25:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL29:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL29:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL29:IMUX.IMUX.32.DELAY
RXDASOFTRESETB_FSinputTCELL28:IMUX.CTRL.7
RXDATAEXTENDRSVD_SF0outputTCELL22:OUT.4.TMIN
RXDATAEXTENDRSVD_SF1outputTCELL23:OUT.4.TMIN
RXDATAEXTENDRSVD_SF2outputTCELL24:OUT.4.TMIN
RXDATAEXTENDRSVD_SF3outputTCELL25:OUT.4.TMIN
RXDATAEXTENDRSVD_SF4outputTCELL26:OUT.4.TMIN
RXDATAEXTENDRSVD_SF5outputTCELL27:OUT.4.TMIN
RXDATAEXTENDRSVD_SF6outputTCELL28:OUT.4.TMIN
RXDATAEXTENDRSVD_SF7outputTCELL29:OUT.4.TMIN
RXDATAVALID_SF0outputTCELL25:OUT.8.TMIN
RXDATAVALID_SF1outputTCELL26:OUT.8.TMIN
RXDATA_SF0outputTCELL22:OUT.3.TMIN
RXDATA_SF1outputTCELL22:OUT.7.TMIN
RXDATA_SF10outputTCELL23:OUT.11.TMIN
RXDATA_SF100outputTCELL26:OUT.17.TMIN
RXDATA_SF101outputTCELL26:OUT.21.TMIN
RXDATA_SF102outputTCELL26:OUT.25.TMIN
RXDATA_SF103outputTCELL26:OUT.29.TMIN
RXDATA_SF104outputTCELL27:OUT.1.TMIN
RXDATA_SF105outputTCELL27:OUT.5.TMIN
RXDATA_SF106outputTCELL27:OUT.9.TMIN
RXDATA_SF107outputTCELL27:OUT.13.TMIN
RXDATA_SF108outputTCELL27:OUT.17.TMIN
RXDATA_SF109outputTCELL27:OUT.21.TMIN
RXDATA_SF11outputTCELL23:OUT.15.TMIN
RXDATA_SF110outputTCELL27:OUT.25.TMIN
RXDATA_SF111outputTCELL27:OUT.29.TMIN
RXDATA_SF112outputTCELL28:OUT.1.TMIN
RXDATA_SF113outputTCELL28:OUT.5.TMIN
RXDATA_SF114outputTCELL28:OUT.9.TMIN
RXDATA_SF115outputTCELL28:OUT.13.TMIN
RXDATA_SF116outputTCELL28:OUT.17.TMIN
RXDATA_SF117outputTCELL28:OUT.21.TMIN
RXDATA_SF118outputTCELL28:OUT.25.TMIN
RXDATA_SF119outputTCELL28:OUT.29.TMIN
RXDATA_SF12outputTCELL23:OUT.19.TMIN
RXDATA_SF120outputTCELL29:OUT.1.TMIN
RXDATA_SF121outputTCELL29:OUT.5.TMIN
RXDATA_SF122outputTCELL29:OUT.9.TMIN
RXDATA_SF123outputTCELL29:OUT.13.TMIN
RXDATA_SF124outputTCELL29:OUT.17.TMIN
RXDATA_SF125outputTCELL29:OUT.21.TMIN
RXDATA_SF126outputTCELL29:OUT.25.TMIN
RXDATA_SF127outputTCELL29:OUT.29.TMIN
RXDATA_SF13outputTCELL23:OUT.23.TMIN
RXDATA_SF14outputTCELL23:OUT.27.TMIN
RXDATA_SF15outputTCELL23:OUT.31.TMIN
RXDATA_SF16outputTCELL24:OUT.3.TMIN
RXDATA_SF17outputTCELL24:OUT.7.TMIN
RXDATA_SF18outputTCELL24:OUT.11.TMIN
RXDATA_SF19outputTCELL24:OUT.15.TMIN
RXDATA_SF2outputTCELL22:OUT.11.TMIN
RXDATA_SF20outputTCELL24:OUT.19.TMIN
RXDATA_SF21outputTCELL24:OUT.23.TMIN
RXDATA_SF22outputTCELL24:OUT.27.TMIN
RXDATA_SF23outputTCELL24:OUT.31.TMIN
RXDATA_SF24outputTCELL25:OUT.3.TMIN
RXDATA_SF25outputTCELL25:OUT.7.TMIN
RXDATA_SF26outputTCELL25:OUT.11.TMIN
RXDATA_SF27outputTCELL25:OUT.15.TMIN
RXDATA_SF28outputTCELL25:OUT.19.TMIN
RXDATA_SF29outputTCELL25:OUT.23.TMIN
RXDATA_SF3outputTCELL22:OUT.15.TMIN
RXDATA_SF30outputTCELL25:OUT.27.TMIN
RXDATA_SF31outputTCELL25:OUT.31.TMIN
RXDATA_SF32outputTCELL26:OUT.3.TMIN
RXDATA_SF33outputTCELL26:OUT.7.TMIN
RXDATA_SF34outputTCELL26:OUT.11.TMIN
RXDATA_SF35outputTCELL26:OUT.15.TMIN
RXDATA_SF36outputTCELL26:OUT.19.TMIN
RXDATA_SF37outputTCELL26:OUT.23.TMIN
RXDATA_SF38outputTCELL26:OUT.27.TMIN
RXDATA_SF39outputTCELL26:OUT.31.TMIN
RXDATA_SF4outputTCELL22:OUT.19.TMIN
RXDATA_SF40outputTCELL27:OUT.3.TMIN
RXDATA_SF41outputTCELL27:OUT.7.TMIN
RXDATA_SF42outputTCELL27:OUT.11.TMIN
RXDATA_SF43outputTCELL27:OUT.15.TMIN
RXDATA_SF44outputTCELL27:OUT.19.TMIN
RXDATA_SF45outputTCELL27:OUT.23.TMIN
RXDATA_SF46outputTCELL27:OUT.27.TMIN
RXDATA_SF47outputTCELL27:OUT.31.TMIN
RXDATA_SF48outputTCELL28:OUT.3.TMIN
RXDATA_SF49outputTCELL28:OUT.7.TMIN
RXDATA_SF5outputTCELL22:OUT.23.TMIN
RXDATA_SF50outputTCELL28:OUT.11.TMIN
RXDATA_SF51outputTCELL28:OUT.15.TMIN
RXDATA_SF52outputTCELL28:OUT.19.TMIN
RXDATA_SF53outputTCELL28:OUT.23.TMIN
RXDATA_SF54outputTCELL28:OUT.27.TMIN
RXDATA_SF55outputTCELL28:OUT.31.TMIN
RXDATA_SF56outputTCELL29:OUT.3.TMIN
RXDATA_SF57outputTCELL29:OUT.7.TMIN
RXDATA_SF58outputTCELL29:OUT.11.TMIN
RXDATA_SF59outputTCELL29:OUT.15.TMIN
RXDATA_SF6outputTCELL22:OUT.27.TMIN
RXDATA_SF60outputTCELL29:OUT.19.TMIN
RXDATA_SF61outputTCELL29:OUT.23.TMIN
RXDATA_SF62outputTCELL29:OUT.27.TMIN
RXDATA_SF63outputTCELL29:OUT.31.TMIN
RXDATA_SF64outputTCELL22:OUT.1.TMIN
RXDATA_SF65outputTCELL22:OUT.5.TMIN
RXDATA_SF66outputTCELL22:OUT.9.TMIN
RXDATA_SF67outputTCELL22:OUT.13.TMIN
RXDATA_SF68outputTCELL22:OUT.17.TMIN
RXDATA_SF69outputTCELL22:OUT.21.TMIN
RXDATA_SF7outputTCELL22:OUT.31.TMIN
RXDATA_SF70outputTCELL22:OUT.25.TMIN
RXDATA_SF71outputTCELL22:OUT.29.TMIN
RXDATA_SF72outputTCELL23:OUT.1.TMIN
RXDATA_SF73outputTCELL23:OUT.5.TMIN
RXDATA_SF74outputTCELL23:OUT.9.TMIN
RXDATA_SF75outputTCELL23:OUT.13.TMIN
RXDATA_SF76outputTCELL23:OUT.17.TMIN
RXDATA_SF77outputTCELL23:OUT.21.TMIN
RXDATA_SF78outputTCELL23:OUT.25.TMIN
RXDATA_SF79outputTCELL23:OUT.29.TMIN
RXDATA_SF8outputTCELL23:OUT.3.TMIN
RXDATA_SF80outputTCELL24:OUT.1.TMIN
RXDATA_SF81outputTCELL24:OUT.5.TMIN
RXDATA_SF82outputTCELL24:OUT.9.TMIN
RXDATA_SF83outputTCELL24:OUT.13.TMIN
RXDATA_SF84outputTCELL24:OUT.17.TMIN
RXDATA_SF85outputTCELL24:OUT.21.TMIN
RXDATA_SF86outputTCELL24:OUT.25.TMIN
RXDATA_SF87outputTCELL24:OUT.29.TMIN
RXDATA_SF88outputTCELL25:OUT.1.TMIN
RXDATA_SF89outputTCELL25:OUT.5.TMIN
RXDATA_SF9outputTCELL23:OUT.7.TMIN
RXDATA_SF90outputTCELL25:OUT.9.TMIN
RXDATA_SF91outputTCELL25:OUT.13.TMIN
RXDATA_SF92outputTCELL25:OUT.17.TMIN
RXDATA_SF93outputTCELL25:OUT.21.TMIN
RXDATA_SF94outputTCELL25:OUT.25.TMIN
RXDATA_SF95outputTCELL25:OUT.29.TMIN
RXDATA_SF96outputTCELL26:OUT.1.TMIN
RXDATA_SF97outputTCELL26:OUT.5.TMIN
RXDATA_SF98outputTCELL26:OUT.9.TMIN
RXDATA_SF99outputTCELL26:OUT.13.TMIN
RXDEC8B10BUSE_FSinputTCELL28:IMUX.IMUX.36.DELAY
RXDISPERR_SF0outputTCELL22:OUT.30.TMIN
RXDISPERR_SF1outputTCELL23:OUT.30.TMIN
RXDISPERR_SF10outputTCELL24:OUT.28.TMIN
RXDISPERR_SF11outputTCELL25:OUT.28.TMIN
RXDISPERR_SF12outputTCELL26:OUT.28.TMIN
RXDISPERR_SF13outputTCELL27:OUT.28.TMIN
RXDISPERR_SF14outputTCELL28:OUT.28.TMIN
RXDISPERR_SF15outputTCELL29:OUT.28.TMIN
RXDISPERR_SF2outputTCELL24:OUT.30.TMIN
RXDISPERR_SF3outputTCELL25:OUT.30.TMIN
RXDISPERR_SF4outputTCELL26:OUT.30.TMIN
RXDISPERR_SF5outputTCELL27:OUT.30.TMIN
RXDISPERR_SF6outputTCELL28:OUT.30.TMIN
RXDISPERR_SF7outputTCELL29:OUT.30.TMIN
RXDISPERR_SF8outputTCELL22:OUT.28.TMIN
RXDISPERR_SF9outputTCELL23:OUT.28.TMIN
RXELECIDLE_SFoutputTCELL22:OUT.2.TMIN
RXENCHANSYNC_FSinputTCELL24:IMUX.IMUX.33.DELAY
RXENMCOMMAALIGN_FSinputTCELL27:IMUX.IMUX.30.DELAY
RXENPCOMMAALIGN_FSinputTCELL25:IMUX.IMUX.25.DELAY
RXGEARBOXSLIP_FSinputTCELL28:IMUX.IMUX.33.DELAY
RXHEADERVALID_SF0outputTCELL27:OUT.8.TMIN
RXHEADERVALID_SF1outputTCELL28:OUT.8.TMIN
RXHEADER_SF0outputTCELL22:OUT.12.TMIN
RXHEADER_SF1outputTCELL23:OUT.12.TMIN
RXHEADER_SF2outputTCELL24:OUT.12.TMIN
RXHEADER_SF3outputTCELL25:OUT.12.TMIN
RXHEADER_SF4outputTCELL26:OUT.12.TMIN
RXHEADER_SF5outputTCELL27:OUT.12.TMIN
RXLATCLKB_FSinputTCELL28:IMUX.CTRL.4
RXLINKSYNCDONE_SFoutputTCELL21:OUT.13.TMIN
RXLPMEN_FSinputTCELL28:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL28:IMUX.IMUX.35.DELAY
RXNOTINTABLE_SF0outputTCELL22:OUT.16.TMIN
RXNOTINTABLE_SF1outputTCELL23:OUT.16.TMIN
RXNOTINTABLE_SF2outputTCELL24:OUT.16.TMIN
RXNOTINTABLE_SF3outputTCELL25:OUT.16.TMIN
RXNOTINTABLE_SF4outputTCELL26:OUT.16.TMIN
RXNOTINTABLE_SF5outputTCELL27:OUT.16.TMIN
RXNOTINTABLE_SF6outputTCELL28:OUT.16.TMIN
RXNOTINTABLE_SF7outputTCELL29:OUT.16.TMIN
RXOOBRESETB_FSinputTCELL24:IMUX.CTRL.7
RXOUTCKCTL_FS0inputTCELL25:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL26:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL26:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL19:OUT.12.TMIN
RXPLLCKSEL_FS0inputTCELL26:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL27:IMUX.IMUX.4.DELAY
RXPMARESETB_FSinputTCELL25:IMUX.CTRL.7
RXPMARESETDONE_SFoutputTCELL21:OUT.2.TMIN
RXPOLARITY_FSinputTCELL25:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL29:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL22:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL29:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL29:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL29:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL29:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL21:OUT.20.TMIN
RXPROGDIVRESETB_FSinputTCELL27:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL28:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL29:IMUX.IMUX.4.DELAY
RXRATEASYNCH_FSinputTCELL27:IMUX.IMUX.36.DELAY
RXRATEDONE_SFoutputTCELL27:OUT.6.TMIN
RXRATE_FS0inputTCELL26:IMUX.IMUX.18.DELAY
RXRATE_FS1inputTCELL26:IMUX.IMUX.21.DELAY
RXRATE_FS2inputTCELL26:IMUX.IMUX.24.DELAY
RXRECCLKPCS_SFoutputTCELL24:OUT.8.TMIN
RXRECCLK_SFoutputTCELL23:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL29:OUT.10.TMIN
RXRESET_FSinputTCELL26:IMUX.IMUX.13.DELAY
RXSIGVALDLY_FS0inputTCELL19:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS1inputTCELL20:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS2inputTCELL20:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS3inputTCELL21:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS4inputTCELL21:IMUX.IMUX.46.DELAY
RXSLIDERDY_SFoutputTCELL21:OUT.12.TMIN
RXSLIDE_FSinputTCELL27:IMUX.IMUX.33.DELAY
RXSLIPDONE_SFoutputTCELL21:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL21:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL29:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL21:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL29:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL28:IMUX.IMUX.26.DELAY
RXSTARTOFSEQ_SF0outputTCELL28:OUT.6.TMIN
RXSTARTOFSEQ_SF1outputTCELL29:OUT.6.TMIN
RXSTATUS_SF0outputTCELL27:OUT.14.TMIN
RXSTATUS_SF1outputTCELL28:OUT.14.TMIN
RXSTATUS_SF2outputTCELL29:OUT.14.TMIN
RXSYNCEN2SLV_SFoutputTCELL21:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL28:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL26:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL25:IMUX.IMUX.4.DELAY
RXTERMPROG_FS0inputTCELL17:IMUX.IMUX.43.DELAY
RXTERMPROG_FS1inputTCELL17:IMUX.IMUX.46.DELAY
RXTERMPROG_FS2inputTCELL18:IMUX.IMUX.43.DELAY
RXTERMPROG_FS3inputTCELL18:IMUX.IMUX.46.DELAY
RXTERMPROG_FS4inputTCELL19:IMUX.IMUX.43.DELAY
RXUSRCLK2B_FSinputTCELL26:IMUX.CTRL.4
RXUSRCLKB_FSinputTCELL26:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL28:IMUX.IMUX.29.DELAY
RXVALID_SFoutputTCELL29:OUT.0.TMIN
RX_POST_DCC_START_FSinputTCELL27:IMUX.IMUX.5.DELAY
SCANCLKB_FSinputTCELL24:IMUX.CTRL.5
SCANENB_FSinputTCELL18:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL17:IMUX.IMUX.27.DELAY
SCANIN_FS1inputTCELL18:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL18:IMUX.IMUX.18.DELAY
SCANIN_FS11inputTCELL17:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL17:IMUX.IMUX.31.DELAY
SCANIN_FS13inputTCELL19:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL26:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL26:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL27:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL28:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL29:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL17:IMUX.IMUX.30.DELAY
SCANIN_FS3inputTCELL18:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL17:IMUX.IMUX.33.DELAY
SCANIN_FS5inputTCELL18:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL18:IMUX.IMUX.24.DELAY
SCANIN_FS7inputTCELL17:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL18:IMUX.IMUX.21.DELAY
SCANIN_FS9inputTCELL17:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL18:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL17:OUT.23.TMIN
SCANOUT_SF1outputTCELL18:OUT.23.TMIN
SCANOUT_SF10outputTCELL19:OUT.2.TMIN
SCANOUT_SF11outputTCELL17:OUT.4.TMIN
SCANOUT_SF12outputTCELL18:OUT.4.TMIN
SCANOUT_SF13outputTCELL19:OUT.4.TMIN
SCANOUT_SF14outputTCELL17:OUT.8.TMIN
SCANOUT_SF15outputTCELL18:OUT.8.TMIN
SCANOUT_SF16outputTCELL19:OUT.10.TMIN
SCANOUT_SF17outputTCELL20:OUT.10.TMIN
SCANOUT_SF18outputTCELL20:OUT.12.TMIN
SCANOUT_SF2outputTCELL19:OUT.23.TMIN
SCANOUT_SF3outputTCELL20:OUT.23.TMIN
SCANOUT_SF4outputTCELL21:OUT.23.TMIN
SCANOUT_SF5outputTCELL17:OUT.11.TMIN
SCANOUT_SF6outputTCELL17:OUT.0.TMIN
SCANOUT_SF7outputTCELL18:OUT.0.TMIN
SCANOUT_SF8outputTCELL17:OUT.2.TMIN
SCANOUT_SF9outputTCELL18:OUT.2.TMIN
STEPSIZEPPM_FS0inputTCELL19:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL20:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL21:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL22:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL23:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUTB_FSinputTCELL23:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL22:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL23:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL24:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL24:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL23:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL19:OUT.20.TMIN
TCOINITSET_FSinputTCELL25:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL20:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL24:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL23:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL20:OUT.8.TMIN
TSTCLK0B_FSinputTCELL25:IMUX.CTRL.5
TSTCLK1B_FSinputTCELL25:IMUX.CTRL.4
TSTIN_FS0inputTCELL17:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL18:IMUX.IMUX.1.DELAY
TSTIN_FS10inputTCELL17:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL18:IMUX.IMUX.16.DELAY
TSTIN_FS12inputTCELL17:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL18:IMUX.IMUX.19.DELAY
TSTIN_FS14inputTCELL17:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL18:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL17:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL18:IMUX.IMUX.25.DELAY
TSTIN_FS18inputTCELL17:IMUX.IMUX.28.DELAY
TSTIN_FS19inputTCELL18:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL17:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL18:IMUX.IMUX.4.DELAY
TSTIN_FS4inputTCELL17:IMUX.IMUX.7.DELAY
TSTIN_FS5inputTCELL18:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL17:IMUX.IMUX.10.DELAY
TSTIN_FS7inputTCELL18:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL17:IMUX.IMUX.13.DELAY
TSTIN_FS9inputTCELL18:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL18:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL18:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL18:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL18:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL18:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL18:IMUX.IMUX.15.DELAY
TXBUFSTATUS_SF0outputTCELL19:OUT.0.TMIN
TXBUFSTATUS_SF1outputTCELL19:OUT.13.TMIN
TXBYPASS8B10B_FS0inputTCELL19:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS1inputTCELL20:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS2inputTCELL21:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS3inputTCELL22:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS4inputTCELL23:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS5inputTCELL24:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS6inputTCELL25:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS7inputTCELL26:IMUX.IMUX.15.DELAY
TXCHARDISPMODE_FS0inputTCELL19:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS1inputTCELL20:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS10inputTCELL21:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS11inputTCELL22:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS12inputTCELL23:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS13inputTCELL24:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS14inputTCELL25:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS15inputTCELL26:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS2inputTCELL21:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS3inputTCELL22:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS4inputTCELL23:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS5inputTCELL24:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS6inputTCELL25:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS7inputTCELL26:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS8inputTCELL19:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS9inputTCELL20:IMUX.IMUX.39.DELAY
TXCHARDISPVAL_FS0inputTCELL19:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS1inputTCELL20:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS10inputTCELL21:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS11inputTCELL22:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS12inputTCELL23:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS13inputTCELL24:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS14inputTCELL25:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS15inputTCELL26:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS2inputTCELL21:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS3inputTCELL22:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS4inputTCELL23:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS5inputTCELL24:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS6inputTCELL25:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS7inputTCELL26:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS8inputTCELL19:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS9inputTCELL20:IMUX.IMUX.36.DELAY
TXCHARISK_FS0inputTCELL19:IMUX.IMUX.0.DELAY
TXCHARISK_FS1inputTCELL20:IMUX.IMUX.0.DELAY
TXCHARISK_FS2inputTCELL21:IMUX.IMUX.0.DELAY
TXCHARISK_FS3inputTCELL22:IMUX.IMUX.0.DELAY
TXCHARISK_FS4inputTCELL23:IMUX.IMUX.0.DELAY
TXCHARISK_FS5inputTCELL24:IMUX.IMUX.0.DELAY
TXCHARISK_FS6inputTCELL25:IMUX.IMUX.0.DELAY
TXCHARISK_FS7inputTCELL26:IMUX.IMUX.0.DELAY
TXCODAALGNEN_FSinputTCELL22:IMUX.IMUX.7.DELAY
TXCOMINIT_FSinputTCELL21:IMUX.IMUX.16.DELAY
TXCOMSAS_FSinputTCELL21:IMUX.IMUX.10.DELAY
TXCOMWAKE_FSinputTCELL21:IMUX.IMUX.9.DELAY
TXCOPIALGNEN_FSinputTCELL24:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL19:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL24:IMUX.IMUX.19.DELAY
TXDATAEXTENDRSVD_FS0inputTCELL19:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS1inputTCELL20:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS2inputTCELL21:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS3inputTCELL22:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS4inputTCELL23:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS5inputTCELL24:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS6inputTCELL25:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS7inputTCELL26:IMUX.IMUX.30.DELAY
TXDATA_FS0inputTCELL19:IMUX.IMUX.5.DELAY
TXDATA_FS1inputTCELL19:IMUX.IMUX.11.DELAY
TXDATA_FS10inputTCELL20:IMUX.IMUX.17.DELAY
TXDATA_FS100inputTCELL23:IMUX.IMUX.26.DELAY
TXDATA_FS101inputTCELL23:IMUX.IMUX.32.DELAY
TXDATA_FS102inputTCELL23:IMUX.IMUX.38.DELAY
TXDATA_FS103inputTCELL23:IMUX.IMUX.44.DELAY
TXDATA_FS104inputTCELL24:IMUX.IMUX.2.DELAY
TXDATA_FS105inputTCELL24:IMUX.IMUX.8.DELAY
TXDATA_FS106inputTCELL24:IMUX.IMUX.14.DELAY
TXDATA_FS107inputTCELL24:IMUX.IMUX.20.DELAY
TXDATA_FS108inputTCELL24:IMUX.IMUX.26.DELAY
TXDATA_FS109inputTCELL24:IMUX.IMUX.32.DELAY
TXDATA_FS11inputTCELL20:IMUX.IMUX.23.DELAY
TXDATA_FS110inputTCELL24:IMUX.IMUX.38.DELAY
TXDATA_FS111inputTCELL24:IMUX.IMUX.44.DELAY
TXDATA_FS112inputTCELL25:IMUX.IMUX.2.DELAY
TXDATA_FS113inputTCELL25:IMUX.IMUX.8.DELAY
TXDATA_FS114inputTCELL25:IMUX.IMUX.14.DELAY
TXDATA_FS115inputTCELL25:IMUX.IMUX.20.DELAY
TXDATA_FS116inputTCELL25:IMUX.IMUX.26.DELAY
TXDATA_FS117inputTCELL25:IMUX.IMUX.32.DELAY
TXDATA_FS118inputTCELL25:IMUX.IMUX.38.DELAY
TXDATA_FS119inputTCELL25:IMUX.IMUX.44.DELAY
TXDATA_FS12inputTCELL20:IMUX.IMUX.29.DELAY
TXDATA_FS120inputTCELL26:IMUX.IMUX.2.DELAY
TXDATA_FS121inputTCELL26:IMUX.IMUX.8.DELAY
TXDATA_FS122inputTCELL26:IMUX.IMUX.14.DELAY
TXDATA_FS123inputTCELL26:IMUX.IMUX.20.DELAY
TXDATA_FS124inputTCELL26:IMUX.IMUX.26.DELAY
TXDATA_FS125inputTCELL26:IMUX.IMUX.32.DELAY
TXDATA_FS126inputTCELL26:IMUX.IMUX.38.DELAY
TXDATA_FS127inputTCELL26:IMUX.IMUX.44.DELAY
TXDATA_FS13inputTCELL20:IMUX.IMUX.35.DELAY
TXDATA_FS14inputTCELL20:IMUX.IMUX.41.DELAY
TXDATA_FS15inputTCELL20:IMUX.IMUX.47.DELAY
TXDATA_FS16inputTCELL21:IMUX.IMUX.5.DELAY
TXDATA_FS17inputTCELL21:IMUX.IMUX.11.DELAY
TXDATA_FS18inputTCELL21:IMUX.IMUX.17.DELAY
TXDATA_FS19inputTCELL21:IMUX.IMUX.23.DELAY
TXDATA_FS2inputTCELL19:IMUX.IMUX.17.DELAY
TXDATA_FS20inputTCELL21:IMUX.IMUX.29.DELAY
TXDATA_FS21inputTCELL21:IMUX.IMUX.35.DELAY
TXDATA_FS22inputTCELL21:IMUX.IMUX.41.DELAY
TXDATA_FS23inputTCELL21:IMUX.IMUX.47.DELAY
TXDATA_FS24inputTCELL22:IMUX.IMUX.5.DELAY
TXDATA_FS25inputTCELL22:IMUX.IMUX.11.DELAY
TXDATA_FS26inputTCELL22:IMUX.IMUX.17.DELAY
TXDATA_FS27inputTCELL22:IMUX.IMUX.23.DELAY
TXDATA_FS28inputTCELL22:IMUX.IMUX.29.DELAY
TXDATA_FS29inputTCELL22:IMUX.IMUX.35.DELAY
TXDATA_FS3inputTCELL19:IMUX.IMUX.23.DELAY
TXDATA_FS30inputTCELL22:IMUX.IMUX.41.DELAY
TXDATA_FS31inputTCELL22:IMUX.IMUX.47.DELAY
TXDATA_FS32inputTCELL23:IMUX.IMUX.5.DELAY
TXDATA_FS33inputTCELL23:IMUX.IMUX.11.DELAY
TXDATA_FS34inputTCELL23:IMUX.IMUX.17.DELAY
TXDATA_FS35inputTCELL23:IMUX.IMUX.23.DELAY
TXDATA_FS36inputTCELL23:IMUX.IMUX.29.DELAY
TXDATA_FS37inputTCELL23:IMUX.IMUX.35.DELAY
TXDATA_FS38inputTCELL23:IMUX.IMUX.41.DELAY
TXDATA_FS39inputTCELL23:IMUX.IMUX.47.DELAY
TXDATA_FS4inputTCELL19:IMUX.IMUX.29.DELAY
TXDATA_FS40inputTCELL24:IMUX.IMUX.5.DELAY
TXDATA_FS41inputTCELL24:IMUX.IMUX.11.DELAY
TXDATA_FS42inputTCELL24:IMUX.IMUX.17.DELAY
TXDATA_FS43inputTCELL24:IMUX.IMUX.23.DELAY
TXDATA_FS44inputTCELL24:IMUX.IMUX.29.DELAY
TXDATA_FS45inputTCELL24:IMUX.IMUX.35.DELAY
TXDATA_FS46inputTCELL24:IMUX.IMUX.41.DELAY
TXDATA_FS47inputTCELL24:IMUX.IMUX.47.DELAY
TXDATA_FS48inputTCELL25:IMUX.IMUX.5.DELAY
TXDATA_FS49inputTCELL25:IMUX.IMUX.11.DELAY
TXDATA_FS5inputTCELL19:IMUX.IMUX.35.DELAY
TXDATA_FS50inputTCELL25:IMUX.IMUX.17.DELAY
TXDATA_FS51inputTCELL25:IMUX.IMUX.23.DELAY
TXDATA_FS52inputTCELL25:IMUX.IMUX.29.DELAY
TXDATA_FS53inputTCELL25:IMUX.IMUX.35.DELAY
TXDATA_FS54inputTCELL25:IMUX.IMUX.41.DELAY
TXDATA_FS55inputTCELL25:IMUX.IMUX.47.DELAY
TXDATA_FS56inputTCELL26:IMUX.IMUX.5.DELAY
TXDATA_FS57inputTCELL26:IMUX.IMUX.11.DELAY
TXDATA_FS58inputTCELL26:IMUX.IMUX.17.DELAY
TXDATA_FS59inputTCELL26:IMUX.IMUX.23.DELAY
TXDATA_FS6inputTCELL19:IMUX.IMUX.41.DELAY
TXDATA_FS60inputTCELL26:IMUX.IMUX.29.DELAY
TXDATA_FS61inputTCELL26:IMUX.IMUX.35.DELAY
TXDATA_FS62inputTCELL26:IMUX.IMUX.41.DELAY
TXDATA_FS63inputTCELL26:IMUX.IMUX.47.DELAY
TXDATA_FS64inputTCELL19:IMUX.IMUX.2.DELAY
TXDATA_FS65inputTCELL19:IMUX.IMUX.8.DELAY
TXDATA_FS66inputTCELL19:IMUX.IMUX.14.DELAY
TXDATA_FS67inputTCELL19:IMUX.IMUX.20.DELAY
TXDATA_FS68inputTCELL19:IMUX.IMUX.26.DELAY
TXDATA_FS69inputTCELL19:IMUX.IMUX.32.DELAY
TXDATA_FS7inputTCELL19:IMUX.IMUX.47.DELAY
TXDATA_FS70inputTCELL19:IMUX.IMUX.38.DELAY
TXDATA_FS71inputTCELL19:IMUX.IMUX.44.DELAY
TXDATA_FS72inputTCELL20:IMUX.IMUX.2.DELAY
TXDATA_FS73inputTCELL20:IMUX.IMUX.8.DELAY
TXDATA_FS74inputTCELL20:IMUX.IMUX.14.DELAY
TXDATA_FS75inputTCELL20:IMUX.IMUX.20.DELAY
TXDATA_FS76inputTCELL20:IMUX.IMUX.26.DELAY
TXDATA_FS77inputTCELL20:IMUX.IMUX.32.DELAY
TXDATA_FS78inputTCELL20:IMUX.IMUX.38.DELAY
TXDATA_FS79inputTCELL20:IMUX.IMUX.44.DELAY
TXDATA_FS8inputTCELL20:IMUX.IMUX.5.DELAY
TXDATA_FS80inputTCELL21:IMUX.IMUX.2.DELAY
TXDATA_FS81inputTCELL21:IMUX.IMUX.8.DELAY
TXDATA_FS82inputTCELL21:IMUX.IMUX.14.DELAY
TXDATA_FS83inputTCELL21:IMUX.IMUX.20.DELAY
TXDATA_FS84inputTCELL21:IMUX.IMUX.26.DELAY
TXDATA_FS85inputTCELL21:IMUX.IMUX.32.DELAY
TXDATA_FS86inputTCELL21:IMUX.IMUX.38.DELAY
TXDATA_FS87inputTCELL21:IMUX.IMUX.44.DELAY
TXDATA_FS88inputTCELL22:IMUX.IMUX.2.DELAY
TXDATA_FS89inputTCELL22:IMUX.IMUX.8.DELAY
TXDATA_FS9inputTCELL20:IMUX.IMUX.11.DELAY
TXDATA_FS90inputTCELL22:IMUX.IMUX.14.DELAY
TXDATA_FS91inputTCELL22:IMUX.IMUX.20.DELAY
TXDATA_FS92inputTCELL22:IMUX.IMUX.26.DELAY
TXDATA_FS93inputTCELL22:IMUX.IMUX.32.DELAY
TXDATA_FS94inputTCELL22:IMUX.IMUX.38.DELAY
TXDATA_FS95inputTCELL22:IMUX.IMUX.44.DELAY
TXDATA_FS96inputTCELL23:IMUX.IMUX.2.DELAY
TXDATA_FS97inputTCELL23:IMUX.IMUX.8.DELAY
TXDATA_FS98inputTCELL23:IMUX.IMUX.14.DELAY
TXDATA_FS99inputTCELL23:IMUX.IMUX.20.DELAY
TXDCCDONE_SFoutputTCELL20:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL19:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL24:IMUX.IMUX.4.DELAY
TXDEEMPH_FSinputTCELL21:IMUX.IMUX.7.DELAY
TXDETECTRX_FSinputTCELL22:IMUX.IMUX.19.DELAY
TXDRVAMP_FS0inputTCELL21:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL22:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL23:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL24:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL24:IMUX.IMUX.3.DELAY
TXDRVPWRDN_FSinputTCELL22:IMUX.IMUX.16.DELAY
TXELECIDLE_FSinputTCELL24:IMUX.IMUX.27.DELAY
TXEMPINVPO_FSinputTCELL19:IMUX.IMUX.22.DELAY
TXEMPINVPR_FSinputTCELL19:IMUX.IMUX.16.DELAY
TXEMPMAIN_FS0inputTCELL19:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL20:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL21:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL22:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL23:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL24:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL25:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL19:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL20:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL21:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL22:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL23:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL19:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL20:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL21:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL22:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL23:IMUX.IMUX.13.DELAY
TXENC8B10BUSE_FSinputTCELL21:IMUX.IMUX.19.DELAY
TXHEADER_FS0inputTCELL19:IMUX.IMUX.34.DELAY
TXHEADER_FS1inputTCELL19:IMUX.IMUX.31.DELAY
TXHEADER_FS2inputTCELL20:IMUX.IMUX.34.DELAY
TXHEADER_FS3inputTCELL20:IMUX.IMUX.31.DELAY
TXHEADER_FS4inputTCELL21:IMUX.IMUX.34.DELAY
TXHEADER_FS5inputTCELL21:IMUX.IMUX.31.DELAY
TXINHIBIT_FSinputTCELL24:IMUX.IMUX.25.DELAY
TXLATCLKB_FSinputTCELL23:IMUX.CTRL.4
TXLINKSYNCDONE_SFoutputTCELL20:OUT.11.TMIN
TXMARGIN_FS0inputTCELL21:IMUX.IMUX.28.DELAY
TXMARGIN_FS1inputTCELL22:IMUX.IMUX.28.DELAY
TXMARGIN_FS2inputTCELL23:IMUX.IMUX.28.DELAY
TXMSTRSETPHDONE_FSinputTCELL21:IMUX.IMUX.4.DELAY
TXOUTCKCTL_FS0inputTCELL21:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL22:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL23:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL19:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL19:OUT.6.TMIN
TXPDOWNASYNCH_FSinputTCELL24:IMUX.IMUX.22.DELAY
TXPIPPMPWDN_FSinputTCELL20:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL22:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL23:IMUX.IMUX.27.DELAY
TXPMARESETB_FSinputTCELL23:IMUX.CTRL.0
TXPMARESETDONE_SFoutputTCELL19:OUT.24.TMIN
TXPOLARITY_FSinputTCELL19:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL20:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL20:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL19:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL21:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL22:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL23:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL23:IMUX.IMUX.1.DELAY
TXPREAMP_FS0inputTCELL21:IMUX.IMUX.6.DELAY
TXPREAMP_FS1inputTCELL22:IMUX.IMUX.6.DELAY
TXPREAMP_FS2inputTCELL23:IMUX.IMUX.6.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL21:OUT.17.TMIN
TXPROGDIVRESETB_FSinputTCELL22:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL19:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL20:IMUX.IMUX.28.DELAY
TXRATEASYNCH_FSinputTCELL19:IMUX.IMUX.7.DELAY
TXRATEDONE_SFoutputTCELL20:OUT.4.TMIN
TXRATE_FS0inputTCELL21:IMUX.IMUX.22.DELAY
TXRATE_FS1inputTCELL22:IMUX.IMUX.22.DELAY
TXRATE_FS2inputTCELL23:IMUX.IMUX.22.DELAY
TXRESETDONE_SFoutputTCELL20:OUT.13.TMIN
TXRESET_FSinputTCELL25:IMUX.IMUX.9.DELAY
TXSEQUENCE_FS0inputTCELL19:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS1inputTCELL20:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS2inputTCELL21:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS3inputTCELL22:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS4inputTCELL23:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS5inputTCELL24:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS6inputTCELL25:IMUX.IMUX.21.DELAY
TXSERPWRDN_FSinputTCELL19:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL20:IMUX.IMUX.4.DELAY
TXSWING_FSinputTCELL26:IMUX.IMUX.1.DELAY
TXSYNCEN2SLV_SFoutputTCELL20:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL25:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL20:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL21:IMUX.IMUX.27.DELAY
TXUSRCLK2B_FSinputTCELL22:IMUX.CTRL.4
TXUSRCLKB_FSinputTCELL22:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL19:IMUX.IMUX.4.DELAY
TX_EL_FORCE_START_FSinputTCELL23:IMUX.IMUX.4.DELAY

Bel GTY_CHANNEL2

ultrascale GTY bel GTY_CHANNEL2
PinDirectionWires
AFECFOKEN_FSinputTCELL40:IMUX.IMUX.17.DELAY
ALT_SIGVALID_CLKB_FSinputTCELL41:IMUX.CTRL.5
BUFGTCEMASK_SF0outputTCELL30:OUT.18.TMIN
BUFGTCEMASK_SF1outputTCELL31:OUT.18.TMIN
BUFGTCEMASK_SF2outputTCELL30:OUT.12.TMIN
BUFGTCE_SF0outputTCELL30:OUT.16.TMIN
BUFGTCE_SF1outputTCELL31:OUT.16.TMIN
BUFGTCE_SF2outputTCELL31:OUT.12.TMIN
BUFGTDIV_SF0outputTCELL30:OUT.3.TMIN
BUFGTDIV_SF1outputTCELL31:OUT.3.TMIN
BUFGTDIV_SF2outputTCELL32:OUT.3.TMIN
BUFGTDIV_SF3outputTCELL30:OUT.5.TMIN
BUFGTDIV_SF4outputTCELL31:OUT.5.TMIN
BUFGTDIV_SF5outputTCELL32:OUT.5.TMIN
BUFGTDIV_SF6outputTCELL30:OUT.7.TMIN
BUFGTDIV_SF7outputTCELL31:OUT.7.TMIN
BUFGTDIV_SF8outputTCELL32:OUT.7.TMIN
BUFGTRESET_SF0outputTCELL30:OUT.1.TMIN
BUFGTRESET_SF1outputTCELL31:OUT.1.TMIN
BUFGTRESET_SF2outputTCELL30:OUT.10.TMIN
BUFGTRSTMASK_SF0outputTCELL31:OUT.10.TMIN
BUFGTRSTMASK_SF1outputTCELL34:OUT.11.TMIN
BUFGTRSTMASK_SF2outputTCELL34:OUT.14.TMIN
CDRFRRESETB_FSinputTCELL38:IMUX.CTRL.0
CDRHOLD_FSinputTCELL38:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL36:OUT.6.TMIN
CDROVREN_FSinputTCELL39:IMUX.IMUX.31.DELAY
CDRPHRESETB_FSinputTCELL41:IMUX.CTRL.0
CDRRESETB_FSinputTCELL42:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL42:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL42:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL42:IMUX.IMUX.15.DELAY
CFGRESETB_FSinputTCELL32:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL33:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL33:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL34:OUT.0.TMIN
CFOKRESET_FSinputTCELL40:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL34:OUT.6.TMIN
CKOKDONE_SFoutputTCELL33:OUT.17.TMIN
CKOKRESET_FSinputTCELL40:IMUX.IMUX.2.DELAY
CKPINRSRVD0B_FSinputTCELL42:IMUX.CTRL.5
CKPINRSRVD1B_FSinputTCELL42:IMUX.CTRL.4
COMFINISH_SFoutputTCELL36:OUT.0.TMIN
COMINITDET_SFoutputTCELL38:OUT.0.TMIN
COMSASDET_SFoutputTCELL40:OUT.0.TMIN
COMWAKEDET_SFoutputTCELL41:OUT.0.TMIN
COREREFCLKB_FSinputTCELL31:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL32:OUT.18.TMIN
CPLFREQLOCK_SFoutputTCELL32:OUT.1.TMIN
CPLLDMONCLKB_FSinputTCELL33:IMUX.CTRL.5
CPLLKDETEN_FSinputTCELL33:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL32:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL32:OUT.8.TMIN
CPLREFSELDYN_FS0inputTCELL33:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL33:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL33:IMUX.IMUX.3.DELAY
CPLRESETB_FSinputTCELL33:IMUX.CTRL.0
DADDR_FS0inputTCELL30:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL30:IMUX.IMUX.8.DELAY
DADDR_FS2inputTCELL30:IMUX.IMUX.14.DELAY
DADDR_FS3inputTCELL30:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL30:IMUX.IMUX.26.DELAY
DADDR_FS5inputTCELL30:IMUX.IMUX.32.DELAY
DADDR_FS6inputTCELL30:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL30:IMUX.IMUX.44.DELAY
DADDR_FS8inputTCELL31:IMUX.IMUX.2.DELAY
DADDR_FS9inputTCELL31:IMUX.IMUX.8.DELAY
DCLKB_FSinputTCELL30:IMUX.CTRL.4
DEN_FSinputTCELL30:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL42:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL42:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL42:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL42:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL39:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL39:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL40:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL39:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL41:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL41:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL30:OUT.26.TMIN
DFEDOUT_SF1outputTCELL31:OUT.26.TMIN
DFEDOUT_SF2outputTCELL32:OUT.26.TMIN
DFEDOUT_SF3outputTCELL33:OUT.26.TMIN
DFEDOUT_SF4outputTCELL34:OUT.26.TMIN
DFEDOUT_SF5outputTCELL30:OUT.6.TMIN
DFEDOUT_SF6outputTCELL31:OUT.6.TMIN
DFEGCHOLD_FSinputTCELL40:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL40:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL42:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL42:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL40:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL40:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL41:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL41:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL42:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL42:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL40:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL40:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL41:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL41:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL40:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL40:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL41:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL41:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL42:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL42:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL40:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL40:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL41:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL41:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL42:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL42:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL40:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL40:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL41:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL41:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL40:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL40:IMUX.IMUX.38.DELAY
DFERESETB_FSinputTCELL37:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL40:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL40:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL41:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL41:IMUX.IMUX.39.DELAY
DFEVSEN_FSinputTCELL40:IMUX.IMUX.45.DELAY
DFEYEN_FSinputTCELL41:IMUX.IMUX.45.DELAY
DI_FS0inputTCELL30:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL30:IMUX.IMUX.11.DELAY
DI_FS10inputTCELL31:IMUX.IMUX.17.DELAY
DI_FS11inputTCELL31:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL31:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL31:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL31:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL31:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL30:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL30:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL30:IMUX.IMUX.29.DELAY
DI_FS5inputTCELL30:IMUX.IMUX.35.DELAY
DI_FS6inputTCELL30:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL30:IMUX.IMUX.47.DELAY
DI_FS8inputTCELL31:IMUX.IMUX.5.DELAY
DI_FS9inputTCELL31:IMUX.IMUX.11.DELAY
DMONCLKB_FSinputTCELL30:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL31:IMUX.IMUX.0.DELAY
DMONOUT_SF0outputTCELL30:OUT.27.TMIN
DMONOUT_SF1outputTCELL31:OUT.27.TMIN
DMONOUT_SF10outputTCELL30:OUT.15.TMIN
DMONOUT_SF11outputTCELL31:OUT.15.TMIN
DMONOUT_SF12outputTCELL32:OUT.15.TMIN
DMONOUT_SF13outputTCELL33:OUT.15.TMIN
DMONOUT_SF14outputTCELL34:OUT.15.TMIN
DMONOUT_SF15outputTCELL30:OUT.9.TMIN
DMONOUT_SF16outputTCELL31:OUT.13.TMIN
DMONOUT_SF2outputTCELL32:OUT.27.TMIN
DMONOUT_SF3outputTCELL33:OUT.27.TMIN
DMONOUT_SF4outputTCELL34:OUT.27.TMIN
DMONOUT_SF5outputTCELL30:OUT.21.TMIN
DMONOUT_SF6outputTCELL31:OUT.21.TMIN
DMONOUT_SF7outputTCELL32:OUT.21.TMIN
DMONOUT_SF8outputTCELL33:OUT.21.TMIN
DMONOUT_SF9outputTCELL34:OUT.21.TMIN
DRDY_SFoutputTCELL31:OUT.11.TMIN
DRPDO_SF0outputTCELL30:OUT.31.TMIN
DRPDO_SF1outputTCELL31:OUT.31.TMIN
DRPDO_SF10outputTCELL30:OUT.19.TMIN
DRPDO_SF11outputTCELL31:OUT.19.TMIN
DRPDO_SF12outputTCELL32:OUT.19.TMIN
DRPDO_SF13outputTCELL33:OUT.19.TMIN
DRPDO_SF14outputTCELL34:OUT.19.TMIN
DRPDO_SF15outputTCELL30:OUT.13.TMIN
DRPDO_SF2outputTCELL32:OUT.31.TMIN
DRPDO_SF3outputTCELL33:OUT.31.TMIN
DRPDO_SF4outputTCELL34:OUT.31.TMIN
DRPDO_SF5outputTCELL30:OUT.25.TMIN
DRPDO_SF6outputTCELL31:OUT.25.TMIN
DRPDO_SF7outputTCELL32:OUT.25.TMIN
DRPDO_SF8outputTCELL33:OUT.25.TMIN
DRPDO_SF9outputTCELL34:OUT.25.TMIN
DWE_FSinputTCELL30:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL33:IMUX.IMUX.22.DELAY
EVODDPHICALDONE_FSinputTCELL31:IMUX.IMUX.42.DELAY
EVODDPHICALSTART_FSinputTCELL31:IMUX.IMUX.45.DELAY
EVODDPHIDRDEN_FSinputTCELL31:IMUX.IMUX.39.DELAY
EVODDPHIDWREN_FSinputTCELL31:IMUX.IMUX.36.DELAY
EVODDPHIXRDEN_FSinputTCELL31:IMUX.IMUX.34.DELAY
EVODDPHIXWREN_FSinputTCELL31:IMUX.IMUX.31.DELAY
EYESCANDATAERROR_SFoutputTCELL31:OUT.28.TMIN
EYESCANTRIGGER_FSinputTCELL30:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL38:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL38:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL34:OUT.22.TMIN
GTRSTSEL_FSinputTCELL31:IMUX.IMUX.20.DELAY
GTRXRSTB_FSinputTCELL39:IMUX.CTRL.0
GTTXRSTB_FSinputTCELL34:IMUX.CTRL.0
ISCANRESET_FSinputTCELL30:IMUX.IMUX.9.DELAY
ISERRDETEN_FSinputTCELL30:IMUX.IMUX.6.DELAY
LOOPBACK_FS0inputTCELL32:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL32:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL32:IMUX.IMUX.9.DELAY
LOOPRSVD_FS0inputTCELL40:IMUX.IMUX.3.DELAY
LOOPRSVD_FS1inputTCELL41:IMUX.IMUX.3.DELAY
LOOPRSVD_FS10inputTCELL41:IMUX.IMUX.14.DELAY
LOOPRSVD_FS11inputTCELL41:IMUX.IMUX.17.DELAY
LOOPRSVD_FS12inputTCELL41:IMUX.IMUX.21.DELAY
LOOPRSVD_FS13inputTCELL42:IMUX.IMUX.24.DELAY
LOOPRSVD_FS14inputTCELL42:IMUX.IMUX.31.DELAY
LOOPRSVD_FS15inputTCELL42:IMUX.IMUX.41.DELAY
LOOPRSVD_FS2inputTCELL42:IMUX.IMUX.3.DELAY
LOOPRSVD_FS3inputTCELL40:IMUX.IMUX.6.DELAY
LOOPRSVD_FS4inputTCELL41:IMUX.IMUX.6.DELAY
LOOPRSVD_FS5inputTCELL42:IMUX.IMUX.6.DELAY
LOOPRSVD_FS6inputTCELL40:IMUX.IMUX.9.DELAY
LOOPRSVD_FS7inputTCELL41:IMUX.IMUX.9.DELAY
LOOPRSVD_FS8inputTCELL42:IMUX.IMUX.9.DELAY
LOOPRSVD_FS9inputTCELL40:IMUX.IMUX.14.DELAY
LPBKRXTXSEREN_FSinputTCELL31:IMUX.IMUX.26.DELAY
LPBKTXRXSEREN_FSinputTCELL30:IMUX.IMUX.15.DELAY
LPMGCHOLD_FSinputTCELL42:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL42:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL42:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL41:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL42:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL42:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL41:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL41:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL30:OUT.28.TMIN
OSHOLD_FSinputTCELL40:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL39:IMUX.IMUX.16.DELAY
PCIEEQRXEQADAPTDONE_FSinputTCELL42:IMUX.IMUX.39.DELAY
PCIERATEGEN3_SFoutputTCELL31:OUT.24.TMIN
PCIERATEIDLE_SFoutputTCELL30:OUT.24.TMIN
PCIERATEQPLLPD_SF0outputTCELL35:OUT.10.TMIN
PCIERATEQPLLPD_SF1outputTCELL36:OUT.10.TMIN
PCIERATEQPLLRESET_SF0outputTCELL30:OUT.20.TMIN
PCIERATEQPLLRESET_SF1outputTCELL31:OUT.20.TMIN
PCIERSTIDLE_FSinputTCELL41:IMUX.IMUX.41.DELAY
PCIERSTTXSYNCSTART_FSinputTCELL35:IMUX.IMUX.4.DELAY
PCIESYNCTXSYNCDONE_SFoutputTCELL32:OUT.17.TMIN
PCIEUSERGEN3RDY_SFoutputTCELL33:OUT.5.TMIN
PCIEUSERPHYSTATUSRST_SFoutputTCELL33:OUT.3.TMIN
PCS_RSVD_IN_FS0inputTCELL35:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL35:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL40:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL40:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL41:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL41:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL42:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL42:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL36:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL36:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL37:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL37:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL38:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL38:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL39:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL39:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL35:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL36:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL37:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL38:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL39:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL40:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL41:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL42:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL37:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL38:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL39:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL40:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL41:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL42:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL35:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL36:OUT.20.TMIN
PHYSTATUS_SFoutputTCELL37:OUT.0.TMIN
PINRSRVDAS_SF0outputTCELL31:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL32:OUT.9.TMIN
PINRSRVDAS_SF2outputTCELL33:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL34:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL31:OUT.30.TMIN
PINRSRVDAS_SF5outputTCELL32:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL33:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL34:OUT.30.TMIN
PINRSRVD_FS0inputTCELL35:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL35:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL40:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL40:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL41:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL41:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL42:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL42:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL36:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL36:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL37:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL37:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL38:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL38:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL39:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL39:IMUX.IMUX.46.DELAY
PMASCANCLK0B_FSinputTCELL40:IMUX.CTRL.5
PMASCANCLK1B_FSinputTCELL40:IMUX.CTRL.4
PMASCANCLK2B_FSinputTCELL34:IMUX.CTRL.5
PMASCANCLK3B_FSinputTCELL34:IMUX.CTRL.4
PMASCANCLK4B_FSinputTCELL32:IMUX.CTRL.5
PMASCANCLK5B_FSinputTCELL32:IMUX.CTRL.6
PMASCANENB_FSinputTCELL31:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL31:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL32:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL30:IMUX.IMUX.42.DELAY
PMASCANIN_FS11inputTCELL30:IMUX.IMUX.45.DELAY
PMASCANIN_FS2inputTCELL32:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL33:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL33:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL34:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL34:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL30:IMUX.IMUX.34.DELAY
PMASCANIN_FS8inputTCELL30:IMUX.IMUX.36.DELAY
PMASCANIN_FS9inputTCELL30:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL30:IMUX.IMUX.40.DELAY
PMASCANOUT_SF0outputTCELL30:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL31:OUT.29.TMIN
PMASCANOUT_SF10outputTCELL32:OUT.14.TMIN
PMASCANOUT_SF11outputTCELL33:OUT.14.TMIN
PMASCANOUT_SF2outputTCELL32:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL33:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL34:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL30:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL31:OUT.17.TMIN
PMASCANOUT_SF7outputTCELL32:OUT.16.TMIN
PMASCANOUT_SF8outputTCELL30:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL31:OUT.14.TMIN
PMASCANRSTEN_FSinputTCELL30:IMUX.IMUX.37.DELAY
PRBSCNTRST_FSinputTCELL38:IMUX.IMUX.12.DELAY
RATE_DRP_DONE_EXT_FSinputTCELL37:IMUX.IMUX.13.DELAY
RATE_DRP_START_SFoutputTCELL33:OUT.24.TMIN
RCODAPWDN_FSinputTCELL38:IMUX.IMUX.19.DELAY
RCODARESETB_FSinputTCELL39:IMUX.CTRL.7
RCOOVREN_FSinputTCELL38:IMUX.IMUX.16.DELAY
RDASOFTRSTDONE_SFoutputTCELL35:OUT.6.TMIN
RESETOVRD_FSinputTCELL37:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL34:OUT.18.TMIN
RSTCLKENTX_FSinputTCELL33:IMUX.IMUX.7.DELAY
RXBUFRSTB_FSinputTCELL40:IMUX.CTRL.0
RXBUFSTATUS_SF0outputTCELL37:OUT.6.TMIN
RXBUFSTATUS_SF1outputTCELL38:OUT.6.TMIN
RXBUFSTATUS_SF2outputTCELL39:OUT.6.TMIN
RXBYTEISALIGNED_SFoutputTCELL37:OUT.2.TMIN
RXBYTEREALIGN_SFoutputTCELL36:OUT.2.TMIN
RXCDRPHDONE_SFoutputTCELL33:OUT.20.TMIN
RXCHANBONDSEQ_SFoutputTCELL40:OUT.2.TMIN
RXCHANREALIGN_SFoutputTCELL42:OUT.2.TMIN
RXCHARISCOMMA_SF0outputTCELL35:OUT.18.TMIN
RXCHARISCOMMA_SF1outputTCELL36:OUT.18.TMIN
RXCHARISCOMMA_SF2outputTCELL37:OUT.18.TMIN
RXCHARISCOMMA_SF3outputTCELL38:OUT.18.TMIN
RXCHARISCOMMA_SF4outputTCELL39:OUT.18.TMIN
RXCHARISCOMMA_SF5outputTCELL40:OUT.18.TMIN
RXCHARISCOMMA_SF6outputTCELL41:OUT.18.TMIN
RXCHARISCOMMA_SF7outputTCELL42:OUT.18.TMIN
RXCHARISK_SF0outputTCELL35:OUT.26.TMIN
RXCHARISK_SF1outputTCELL36:OUT.26.TMIN
RXCHARISK_SF10outputTCELL37:OUT.24.TMIN
RXCHARISK_SF11outputTCELL38:OUT.24.TMIN
RXCHARISK_SF12outputTCELL39:OUT.24.TMIN
RXCHARISK_SF13outputTCELL40:OUT.24.TMIN
RXCHARISK_SF14outputTCELL41:OUT.24.TMIN
RXCHARISK_SF15outputTCELL42:OUT.24.TMIN
RXCHARISK_SF2outputTCELL37:OUT.26.TMIN
RXCHARISK_SF3outputTCELL38:OUT.26.TMIN
RXCHARISK_SF4outputTCELL39:OUT.26.TMIN
RXCHARISK_SF5outputTCELL40:OUT.26.TMIN
RXCHARISK_SF6outputTCELL41:OUT.26.TMIN
RXCHARISK_SF7outputTCELL42:OUT.26.TMIN
RXCHARISK_SF8outputTCELL35:OUT.24.TMIN
RXCHARISK_SF9outputTCELL36:OUT.24.TMIN
RXCHBONDI_FS0inputTCELL40:IMUX.IMUX.15.DELAY
RXCHBONDI_FS1inputTCELL40:IMUX.IMUX.18.DELAY
RXCHBONDI_FS2inputTCELL40:IMUX.IMUX.21.DELAY
RXCHBONDI_FS3inputTCELL40:IMUX.IMUX.24.DELAY
RXCHBONDI_FS4inputTCELL40:IMUX.IMUX.27.DELAY
RXCHBONDLEVEL_FS0inputTCELL41:IMUX.IMUX.2.DELAY
RXCHBONDLEVEL_FS1inputTCELL41:IMUX.IMUX.5.DELAY
RXCHBONDLEVEL_FS2inputTCELL41:IMUX.IMUX.8.DELAY
RXCHBONDMASTER_FSinputTCELL38:IMUX.IMUX.33.DELAY
RXCHBONDO_SF0outputTCELL35:OUT.14.TMIN
RXCHBONDO_SF1outputTCELL36:OUT.14.TMIN
RXCHBONDO_SF2outputTCELL37:OUT.14.TMIN
RXCHBONDO_SF3outputTCELL38:OUT.14.TMIN
RXCHBONDO_SF4outputTCELL39:OUT.14.TMIN
RXCHBONDSLAVE_FSinputTCELL39:IMUX.IMUX.33.DELAY
RXCHISALIGNED_SFoutputTCELL41:OUT.2.TMIN
RXCKCORCNT_SF0outputTCELL38:OUT.2.TMIN
RXCKCORCNT_SF1outputTCELL39:OUT.2.TMIN
RXCOALGNEN_FSinputTCELL38:IMUX.IMUX.22.DELAY
RXCOMMADETUSE_FSinputTCELL40:IMUX.IMUX.12.DELAY
RXCOMMADET_SFoutputTCELL39:OUT.0.TMIN
RXCOPHDONE_SFoutputTCELL34:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL38:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL42:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL42:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL42:IMUX.IMUX.32.DELAY
RXDASOFTRESETB_FSinputTCELL41:IMUX.CTRL.7
RXDATAEXTENDRSVD_SF0outputTCELL35:OUT.4.TMIN
RXDATAEXTENDRSVD_SF1outputTCELL36:OUT.4.TMIN
RXDATAEXTENDRSVD_SF2outputTCELL37:OUT.4.TMIN
RXDATAEXTENDRSVD_SF3outputTCELL38:OUT.4.TMIN
RXDATAEXTENDRSVD_SF4outputTCELL39:OUT.4.TMIN
RXDATAEXTENDRSVD_SF5outputTCELL40:OUT.4.TMIN
RXDATAEXTENDRSVD_SF6outputTCELL41:OUT.4.TMIN
RXDATAEXTENDRSVD_SF7outputTCELL42:OUT.4.TMIN
RXDATAVALID_SF0outputTCELL38:OUT.8.TMIN
RXDATAVALID_SF1outputTCELL39:OUT.8.TMIN
RXDATA_SF0outputTCELL35:OUT.3.TMIN
RXDATA_SF1outputTCELL35:OUT.7.TMIN
RXDATA_SF10outputTCELL36:OUT.11.TMIN
RXDATA_SF100outputTCELL39:OUT.17.TMIN
RXDATA_SF101outputTCELL39:OUT.21.TMIN
RXDATA_SF102outputTCELL39:OUT.25.TMIN
RXDATA_SF103outputTCELL39:OUT.29.TMIN
RXDATA_SF104outputTCELL40:OUT.1.TMIN
RXDATA_SF105outputTCELL40:OUT.5.TMIN
RXDATA_SF106outputTCELL40:OUT.9.TMIN
RXDATA_SF107outputTCELL40:OUT.13.TMIN
RXDATA_SF108outputTCELL40:OUT.17.TMIN
RXDATA_SF109outputTCELL40:OUT.21.TMIN
RXDATA_SF11outputTCELL36:OUT.15.TMIN
RXDATA_SF110outputTCELL40:OUT.25.TMIN
RXDATA_SF111outputTCELL40:OUT.29.TMIN
RXDATA_SF112outputTCELL41:OUT.1.TMIN
RXDATA_SF113outputTCELL41:OUT.5.TMIN
RXDATA_SF114outputTCELL41:OUT.9.TMIN
RXDATA_SF115outputTCELL41:OUT.13.TMIN
RXDATA_SF116outputTCELL41:OUT.17.TMIN
RXDATA_SF117outputTCELL41:OUT.21.TMIN
RXDATA_SF118outputTCELL41:OUT.25.TMIN
RXDATA_SF119outputTCELL41:OUT.29.TMIN
RXDATA_SF12outputTCELL36:OUT.19.TMIN
RXDATA_SF120outputTCELL42:OUT.1.TMIN
RXDATA_SF121outputTCELL42:OUT.5.TMIN
RXDATA_SF122outputTCELL42:OUT.9.TMIN
RXDATA_SF123outputTCELL42:OUT.13.TMIN
RXDATA_SF124outputTCELL42:OUT.17.TMIN
RXDATA_SF125outputTCELL42:OUT.21.TMIN
RXDATA_SF126outputTCELL42:OUT.25.TMIN
RXDATA_SF127outputTCELL42:OUT.29.TMIN
RXDATA_SF13outputTCELL36:OUT.23.TMIN
RXDATA_SF14outputTCELL36:OUT.27.TMIN
RXDATA_SF15outputTCELL36:OUT.31.TMIN
RXDATA_SF16outputTCELL37:OUT.3.TMIN
RXDATA_SF17outputTCELL37:OUT.7.TMIN
RXDATA_SF18outputTCELL37:OUT.11.TMIN
RXDATA_SF19outputTCELL37:OUT.15.TMIN
RXDATA_SF2outputTCELL35:OUT.11.TMIN
RXDATA_SF20outputTCELL37:OUT.19.TMIN
RXDATA_SF21outputTCELL37:OUT.23.TMIN
RXDATA_SF22outputTCELL37:OUT.27.TMIN
RXDATA_SF23outputTCELL37:OUT.31.TMIN
RXDATA_SF24outputTCELL38:OUT.3.TMIN
RXDATA_SF25outputTCELL38:OUT.7.TMIN
RXDATA_SF26outputTCELL38:OUT.11.TMIN
RXDATA_SF27outputTCELL38:OUT.15.TMIN
RXDATA_SF28outputTCELL38:OUT.19.TMIN
RXDATA_SF29outputTCELL38:OUT.23.TMIN
RXDATA_SF3outputTCELL35:OUT.15.TMIN
RXDATA_SF30outputTCELL38:OUT.27.TMIN
RXDATA_SF31outputTCELL38:OUT.31.TMIN
RXDATA_SF32outputTCELL39:OUT.3.TMIN
RXDATA_SF33outputTCELL39:OUT.7.TMIN
RXDATA_SF34outputTCELL39:OUT.11.TMIN
RXDATA_SF35outputTCELL39:OUT.15.TMIN
RXDATA_SF36outputTCELL39:OUT.19.TMIN
RXDATA_SF37outputTCELL39:OUT.23.TMIN
RXDATA_SF38outputTCELL39:OUT.27.TMIN
RXDATA_SF39outputTCELL39:OUT.31.TMIN
RXDATA_SF4outputTCELL35:OUT.19.TMIN
RXDATA_SF40outputTCELL40:OUT.3.TMIN
RXDATA_SF41outputTCELL40:OUT.7.TMIN
RXDATA_SF42outputTCELL40:OUT.11.TMIN
RXDATA_SF43outputTCELL40:OUT.15.TMIN
RXDATA_SF44outputTCELL40:OUT.19.TMIN
RXDATA_SF45outputTCELL40:OUT.23.TMIN
RXDATA_SF46outputTCELL40:OUT.27.TMIN
RXDATA_SF47outputTCELL40:OUT.31.TMIN
RXDATA_SF48outputTCELL41:OUT.3.TMIN
RXDATA_SF49outputTCELL41:OUT.7.TMIN
RXDATA_SF5outputTCELL35:OUT.23.TMIN
RXDATA_SF50outputTCELL41:OUT.11.TMIN
RXDATA_SF51outputTCELL41:OUT.15.TMIN
RXDATA_SF52outputTCELL41:OUT.19.TMIN
RXDATA_SF53outputTCELL41:OUT.23.TMIN
RXDATA_SF54outputTCELL41:OUT.27.TMIN
RXDATA_SF55outputTCELL41:OUT.31.TMIN
RXDATA_SF56outputTCELL42:OUT.3.TMIN
RXDATA_SF57outputTCELL42:OUT.7.TMIN
RXDATA_SF58outputTCELL42:OUT.11.TMIN
RXDATA_SF59outputTCELL42:OUT.15.TMIN
RXDATA_SF6outputTCELL35:OUT.27.TMIN
RXDATA_SF60outputTCELL42:OUT.19.TMIN
RXDATA_SF61outputTCELL42:OUT.23.TMIN
RXDATA_SF62outputTCELL42:OUT.27.TMIN
RXDATA_SF63outputTCELL42:OUT.31.TMIN
RXDATA_SF64outputTCELL35:OUT.1.TMIN
RXDATA_SF65outputTCELL35:OUT.5.TMIN
RXDATA_SF66outputTCELL35:OUT.9.TMIN
RXDATA_SF67outputTCELL35:OUT.13.TMIN
RXDATA_SF68outputTCELL35:OUT.17.TMIN
RXDATA_SF69outputTCELL35:OUT.21.TMIN
RXDATA_SF7outputTCELL35:OUT.31.TMIN
RXDATA_SF70outputTCELL35:OUT.25.TMIN
RXDATA_SF71outputTCELL35:OUT.29.TMIN
RXDATA_SF72outputTCELL36:OUT.1.TMIN
RXDATA_SF73outputTCELL36:OUT.5.TMIN
RXDATA_SF74outputTCELL36:OUT.9.TMIN
RXDATA_SF75outputTCELL36:OUT.13.TMIN
RXDATA_SF76outputTCELL36:OUT.17.TMIN
RXDATA_SF77outputTCELL36:OUT.21.TMIN
RXDATA_SF78outputTCELL36:OUT.25.TMIN
RXDATA_SF79outputTCELL36:OUT.29.TMIN
RXDATA_SF8outputTCELL36:OUT.3.TMIN
RXDATA_SF80outputTCELL37:OUT.1.TMIN
RXDATA_SF81outputTCELL37:OUT.5.TMIN
RXDATA_SF82outputTCELL37:OUT.9.TMIN
RXDATA_SF83outputTCELL37:OUT.13.TMIN
RXDATA_SF84outputTCELL37:OUT.17.TMIN
RXDATA_SF85outputTCELL37:OUT.21.TMIN
RXDATA_SF86outputTCELL37:OUT.25.TMIN
RXDATA_SF87outputTCELL37:OUT.29.TMIN
RXDATA_SF88outputTCELL38:OUT.1.TMIN
RXDATA_SF89outputTCELL38:OUT.5.TMIN
RXDATA_SF9outputTCELL36:OUT.7.TMIN
RXDATA_SF90outputTCELL38:OUT.9.TMIN
RXDATA_SF91outputTCELL38:OUT.13.TMIN
RXDATA_SF92outputTCELL38:OUT.17.TMIN
RXDATA_SF93outputTCELL38:OUT.21.TMIN
RXDATA_SF94outputTCELL38:OUT.25.TMIN
RXDATA_SF95outputTCELL38:OUT.29.TMIN
RXDATA_SF96outputTCELL39:OUT.1.TMIN
RXDATA_SF97outputTCELL39:OUT.5.TMIN
RXDATA_SF98outputTCELL39:OUT.9.TMIN
RXDATA_SF99outputTCELL39:OUT.13.TMIN
RXDEC8B10BUSE_FSinputTCELL41:IMUX.IMUX.36.DELAY
RXDISPERR_SF0outputTCELL35:OUT.30.TMIN
RXDISPERR_SF1outputTCELL36:OUT.30.TMIN
RXDISPERR_SF10outputTCELL37:OUT.28.TMIN
RXDISPERR_SF11outputTCELL38:OUT.28.TMIN
RXDISPERR_SF12outputTCELL39:OUT.28.TMIN
RXDISPERR_SF13outputTCELL40:OUT.28.TMIN
RXDISPERR_SF14outputTCELL41:OUT.28.TMIN
RXDISPERR_SF15outputTCELL42:OUT.28.TMIN
RXDISPERR_SF2outputTCELL37:OUT.30.TMIN
RXDISPERR_SF3outputTCELL38:OUT.30.TMIN
RXDISPERR_SF4outputTCELL39:OUT.30.TMIN
RXDISPERR_SF5outputTCELL40:OUT.30.TMIN
RXDISPERR_SF6outputTCELL41:OUT.30.TMIN
RXDISPERR_SF7outputTCELL42:OUT.30.TMIN
RXDISPERR_SF8outputTCELL35:OUT.28.TMIN
RXDISPERR_SF9outputTCELL36:OUT.28.TMIN
RXELECIDLE_SFoutputTCELL35:OUT.2.TMIN
RXENCHANSYNC_FSinputTCELL37:IMUX.IMUX.33.DELAY
RXENMCOMMAALIGN_FSinputTCELL40:IMUX.IMUX.30.DELAY
RXENPCOMMAALIGN_FSinputTCELL38:IMUX.IMUX.25.DELAY
RXGEARBOXSLIP_FSinputTCELL41:IMUX.IMUX.33.DELAY
RXHEADERVALID_SF0outputTCELL40:OUT.8.TMIN
RXHEADERVALID_SF1outputTCELL41:OUT.8.TMIN
RXHEADER_SF0outputTCELL35:OUT.12.TMIN
RXHEADER_SF1outputTCELL36:OUT.12.TMIN
RXHEADER_SF2outputTCELL37:OUT.12.TMIN
RXHEADER_SF3outputTCELL38:OUT.12.TMIN
RXHEADER_SF4outputTCELL39:OUT.12.TMIN
RXHEADER_SF5outputTCELL40:OUT.12.TMIN
RXLATCLKB_FSinputTCELL41:IMUX.CTRL.4
RXLINKSYNCDONE_SFoutputTCELL34:OUT.13.TMIN
RXLPMEN_FSinputTCELL41:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL41:IMUX.IMUX.35.DELAY
RXNOTINTABLE_SF0outputTCELL35:OUT.16.TMIN
RXNOTINTABLE_SF1outputTCELL36:OUT.16.TMIN
RXNOTINTABLE_SF2outputTCELL37:OUT.16.TMIN
RXNOTINTABLE_SF3outputTCELL38:OUT.16.TMIN
RXNOTINTABLE_SF4outputTCELL39:OUT.16.TMIN
RXNOTINTABLE_SF5outputTCELL40:OUT.16.TMIN
RXNOTINTABLE_SF6outputTCELL41:OUT.16.TMIN
RXNOTINTABLE_SF7outputTCELL42:OUT.16.TMIN
RXOOBRESETB_FSinputTCELL37:IMUX.CTRL.7
RXOUTCKCTL_FS0inputTCELL38:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL39:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL39:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL32:OUT.12.TMIN
RXPLLCKSEL_FS0inputTCELL39:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL40:IMUX.IMUX.4.DELAY
RXPMARESETB_FSinputTCELL38:IMUX.CTRL.7
RXPMARESETDONE_SFoutputTCELL34:OUT.2.TMIN
RXPOLARITY_FSinputTCELL38:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL42:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL35:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL42:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL42:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL42:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL42:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL34:OUT.20.TMIN
RXPROGDIVRESETB_FSinputTCELL40:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL41:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL42:IMUX.IMUX.4.DELAY
RXRATEASYNCH_FSinputTCELL40:IMUX.IMUX.36.DELAY
RXRATEDONE_SFoutputTCELL40:OUT.6.TMIN
RXRATE_FS0inputTCELL39:IMUX.IMUX.18.DELAY
RXRATE_FS1inputTCELL39:IMUX.IMUX.21.DELAY
RXRATE_FS2inputTCELL39:IMUX.IMUX.24.DELAY
RXRECCLKPCS_SFoutputTCELL37:OUT.8.TMIN
RXRECCLK_SFoutputTCELL36:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL42:OUT.10.TMIN
RXRESET_FSinputTCELL39:IMUX.IMUX.13.DELAY
RXSIGVALDLY_FS0inputTCELL32:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS1inputTCELL33:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS2inputTCELL33:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS3inputTCELL34:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS4inputTCELL34:IMUX.IMUX.46.DELAY
RXSLIDERDY_SFoutputTCELL34:OUT.12.TMIN
RXSLIDE_FSinputTCELL40:IMUX.IMUX.33.DELAY
RXSLIPDONE_SFoutputTCELL34:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL34:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL42:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL34:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL42:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL41:IMUX.IMUX.26.DELAY
RXSTARTOFSEQ_SF0outputTCELL41:OUT.6.TMIN
RXSTARTOFSEQ_SF1outputTCELL42:OUT.6.TMIN
RXSTATUS_SF0outputTCELL40:OUT.14.TMIN
RXSTATUS_SF1outputTCELL41:OUT.14.TMIN
RXSTATUS_SF2outputTCELL42:OUT.14.TMIN
RXSYNCEN2SLV_SFoutputTCELL34:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL41:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL39:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL38:IMUX.IMUX.4.DELAY
RXTERMPROG_FS0inputTCELL30:IMUX.IMUX.43.DELAY
RXTERMPROG_FS1inputTCELL30:IMUX.IMUX.46.DELAY
RXTERMPROG_FS2inputTCELL31:IMUX.IMUX.43.DELAY
RXTERMPROG_FS3inputTCELL31:IMUX.IMUX.46.DELAY
RXTERMPROG_FS4inputTCELL32:IMUX.IMUX.43.DELAY
RXUSRCLK2B_FSinputTCELL39:IMUX.CTRL.4
RXUSRCLKB_FSinputTCELL39:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL41:IMUX.IMUX.29.DELAY
RXVALID_SFoutputTCELL42:OUT.0.TMIN
RX_POST_DCC_START_FSinputTCELL40:IMUX.IMUX.5.DELAY
SCANCLKB_FSinputTCELL37:IMUX.CTRL.5
SCANENB_FSinputTCELL31:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL30:IMUX.IMUX.27.DELAY
SCANIN_FS1inputTCELL31:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL31:IMUX.IMUX.18.DELAY
SCANIN_FS11inputTCELL30:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL30:IMUX.IMUX.31.DELAY
SCANIN_FS13inputTCELL32:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL39:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL39:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL40:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL41:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL42:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL30:IMUX.IMUX.30.DELAY
SCANIN_FS3inputTCELL31:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL30:IMUX.IMUX.33.DELAY
SCANIN_FS5inputTCELL31:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL31:IMUX.IMUX.24.DELAY
SCANIN_FS7inputTCELL30:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL31:IMUX.IMUX.21.DELAY
SCANIN_FS9inputTCELL30:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL31:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL30:OUT.23.TMIN
SCANOUT_SF1outputTCELL31:OUT.23.TMIN
SCANOUT_SF10outputTCELL32:OUT.2.TMIN
SCANOUT_SF11outputTCELL30:OUT.4.TMIN
SCANOUT_SF12outputTCELL31:OUT.4.TMIN
SCANOUT_SF13outputTCELL32:OUT.4.TMIN
SCANOUT_SF14outputTCELL30:OUT.8.TMIN
SCANOUT_SF15outputTCELL31:OUT.8.TMIN
SCANOUT_SF16outputTCELL32:OUT.10.TMIN
SCANOUT_SF17outputTCELL33:OUT.10.TMIN
SCANOUT_SF18outputTCELL33:OUT.12.TMIN
SCANOUT_SF2outputTCELL32:OUT.23.TMIN
SCANOUT_SF3outputTCELL33:OUT.23.TMIN
SCANOUT_SF4outputTCELL34:OUT.23.TMIN
SCANOUT_SF5outputTCELL30:OUT.11.TMIN
SCANOUT_SF6outputTCELL30:OUT.0.TMIN
SCANOUT_SF7outputTCELL31:OUT.0.TMIN
SCANOUT_SF8outputTCELL30:OUT.2.TMIN
SCANOUT_SF9outputTCELL31:OUT.2.TMIN
STEPSIZEPPM_FS0inputTCELL32:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL33:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL34:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL35:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL36:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUTB_FSinputTCELL36:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL35:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL36:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL37:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL37:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL36:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL32:OUT.20.TMIN
TCOINITSET_FSinputTCELL38:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL33:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL37:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL36:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL33:OUT.8.TMIN
TSTCLK0B_FSinputTCELL38:IMUX.CTRL.5
TSTCLK1B_FSinputTCELL38:IMUX.CTRL.4
TSTIN_FS0inputTCELL30:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL31:IMUX.IMUX.1.DELAY
TSTIN_FS10inputTCELL30:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL31:IMUX.IMUX.16.DELAY
TSTIN_FS12inputTCELL30:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL31:IMUX.IMUX.19.DELAY
TSTIN_FS14inputTCELL30:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL31:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL30:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL31:IMUX.IMUX.25.DELAY
TSTIN_FS18inputTCELL30:IMUX.IMUX.28.DELAY
TSTIN_FS19inputTCELL31:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL30:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL31:IMUX.IMUX.4.DELAY
TSTIN_FS4inputTCELL30:IMUX.IMUX.7.DELAY
TSTIN_FS5inputTCELL31:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL30:IMUX.IMUX.10.DELAY
TSTIN_FS7inputTCELL31:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL30:IMUX.IMUX.13.DELAY
TSTIN_FS9inputTCELL31:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL31:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL31:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL31:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL31:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL31:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL31:IMUX.IMUX.15.DELAY
TXBUFSTATUS_SF0outputTCELL32:OUT.0.TMIN
TXBUFSTATUS_SF1outputTCELL32:OUT.13.TMIN
TXBYPASS8B10B_FS0inputTCELL32:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS1inputTCELL33:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS2inputTCELL34:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS3inputTCELL35:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS4inputTCELL36:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS5inputTCELL37:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS6inputTCELL38:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS7inputTCELL39:IMUX.IMUX.15.DELAY
TXCHARDISPMODE_FS0inputTCELL32:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS1inputTCELL33:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS10inputTCELL34:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS11inputTCELL35:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS12inputTCELL36:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS13inputTCELL37:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS14inputTCELL38:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS15inputTCELL39:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS2inputTCELL34:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS3inputTCELL35:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS4inputTCELL36:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS5inputTCELL37:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS6inputTCELL38:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS7inputTCELL39:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS8inputTCELL32:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS9inputTCELL33:IMUX.IMUX.39.DELAY
TXCHARDISPVAL_FS0inputTCELL32:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS1inputTCELL33:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS10inputTCELL34:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS11inputTCELL35:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS12inputTCELL36:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS13inputTCELL37:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS14inputTCELL38:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS15inputTCELL39:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS2inputTCELL34:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS3inputTCELL35:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS4inputTCELL36:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS5inputTCELL37:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS6inputTCELL38:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS7inputTCELL39:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS8inputTCELL32:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS9inputTCELL33:IMUX.IMUX.36.DELAY
TXCHARISK_FS0inputTCELL32:IMUX.IMUX.0.DELAY
TXCHARISK_FS1inputTCELL33:IMUX.IMUX.0.DELAY
TXCHARISK_FS2inputTCELL34:IMUX.IMUX.0.DELAY
TXCHARISK_FS3inputTCELL35:IMUX.IMUX.0.DELAY
TXCHARISK_FS4inputTCELL36:IMUX.IMUX.0.DELAY
TXCHARISK_FS5inputTCELL37:IMUX.IMUX.0.DELAY
TXCHARISK_FS6inputTCELL38:IMUX.IMUX.0.DELAY
TXCHARISK_FS7inputTCELL39:IMUX.IMUX.0.DELAY
TXCODAALGNEN_FSinputTCELL35:IMUX.IMUX.7.DELAY
TXCOMINIT_FSinputTCELL34:IMUX.IMUX.16.DELAY
TXCOMSAS_FSinputTCELL34:IMUX.IMUX.10.DELAY
TXCOMWAKE_FSinputTCELL34:IMUX.IMUX.9.DELAY
TXCOPIALGNEN_FSinputTCELL37:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL32:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL37:IMUX.IMUX.19.DELAY
TXDATAEXTENDRSVD_FS0inputTCELL32:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS1inputTCELL33:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS2inputTCELL34:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS3inputTCELL35:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS4inputTCELL36:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS5inputTCELL37:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS6inputTCELL38:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS7inputTCELL39:IMUX.IMUX.30.DELAY
TXDATA_FS0inputTCELL32:IMUX.IMUX.5.DELAY
TXDATA_FS1inputTCELL32:IMUX.IMUX.11.DELAY
TXDATA_FS10inputTCELL33:IMUX.IMUX.17.DELAY
TXDATA_FS100inputTCELL36:IMUX.IMUX.26.DELAY
TXDATA_FS101inputTCELL36:IMUX.IMUX.32.DELAY
TXDATA_FS102inputTCELL36:IMUX.IMUX.38.DELAY
TXDATA_FS103inputTCELL36:IMUX.IMUX.44.DELAY
TXDATA_FS104inputTCELL37:IMUX.IMUX.2.DELAY
TXDATA_FS105inputTCELL37:IMUX.IMUX.8.DELAY
TXDATA_FS106inputTCELL37:IMUX.IMUX.14.DELAY
TXDATA_FS107inputTCELL37:IMUX.IMUX.20.DELAY
TXDATA_FS108inputTCELL37:IMUX.IMUX.26.DELAY
TXDATA_FS109inputTCELL37:IMUX.IMUX.32.DELAY
TXDATA_FS11inputTCELL33:IMUX.IMUX.23.DELAY
TXDATA_FS110inputTCELL37:IMUX.IMUX.38.DELAY
TXDATA_FS111inputTCELL37:IMUX.IMUX.44.DELAY
TXDATA_FS112inputTCELL38:IMUX.IMUX.2.DELAY
TXDATA_FS113inputTCELL38:IMUX.IMUX.8.DELAY
TXDATA_FS114inputTCELL38:IMUX.IMUX.14.DELAY
TXDATA_FS115inputTCELL38:IMUX.IMUX.20.DELAY
TXDATA_FS116inputTCELL38:IMUX.IMUX.26.DELAY
TXDATA_FS117inputTCELL38:IMUX.IMUX.32.DELAY
TXDATA_FS118inputTCELL38:IMUX.IMUX.38.DELAY
TXDATA_FS119inputTCELL38:IMUX.IMUX.44.DELAY
TXDATA_FS12inputTCELL33:IMUX.IMUX.29.DELAY
TXDATA_FS120inputTCELL39:IMUX.IMUX.2.DELAY
TXDATA_FS121inputTCELL39:IMUX.IMUX.8.DELAY
TXDATA_FS122inputTCELL39:IMUX.IMUX.14.DELAY
TXDATA_FS123inputTCELL39:IMUX.IMUX.20.DELAY
TXDATA_FS124inputTCELL39:IMUX.IMUX.26.DELAY
TXDATA_FS125inputTCELL39:IMUX.IMUX.32.DELAY
TXDATA_FS126inputTCELL39:IMUX.IMUX.38.DELAY
TXDATA_FS127inputTCELL39:IMUX.IMUX.44.DELAY
TXDATA_FS13inputTCELL33:IMUX.IMUX.35.DELAY
TXDATA_FS14inputTCELL33:IMUX.IMUX.41.DELAY
TXDATA_FS15inputTCELL33:IMUX.IMUX.47.DELAY
TXDATA_FS16inputTCELL34:IMUX.IMUX.5.DELAY
TXDATA_FS17inputTCELL34:IMUX.IMUX.11.DELAY
TXDATA_FS18inputTCELL34:IMUX.IMUX.17.DELAY
TXDATA_FS19inputTCELL34:IMUX.IMUX.23.DELAY
TXDATA_FS2inputTCELL32:IMUX.IMUX.17.DELAY
TXDATA_FS20inputTCELL34:IMUX.IMUX.29.DELAY
TXDATA_FS21inputTCELL34:IMUX.IMUX.35.DELAY
TXDATA_FS22inputTCELL34:IMUX.IMUX.41.DELAY
TXDATA_FS23inputTCELL34:IMUX.IMUX.47.DELAY
TXDATA_FS24inputTCELL35:IMUX.IMUX.5.DELAY
TXDATA_FS25inputTCELL35:IMUX.IMUX.11.DELAY
TXDATA_FS26inputTCELL35:IMUX.IMUX.17.DELAY
TXDATA_FS27inputTCELL35:IMUX.IMUX.23.DELAY
TXDATA_FS28inputTCELL35:IMUX.IMUX.29.DELAY
TXDATA_FS29inputTCELL35:IMUX.IMUX.35.DELAY
TXDATA_FS3inputTCELL32:IMUX.IMUX.23.DELAY
TXDATA_FS30inputTCELL35:IMUX.IMUX.41.DELAY
TXDATA_FS31inputTCELL35:IMUX.IMUX.47.DELAY
TXDATA_FS32inputTCELL36:IMUX.IMUX.5.DELAY
TXDATA_FS33inputTCELL36:IMUX.IMUX.11.DELAY
TXDATA_FS34inputTCELL36:IMUX.IMUX.17.DELAY
TXDATA_FS35inputTCELL36:IMUX.IMUX.23.DELAY
TXDATA_FS36inputTCELL36:IMUX.IMUX.29.DELAY
TXDATA_FS37inputTCELL36:IMUX.IMUX.35.DELAY
TXDATA_FS38inputTCELL36:IMUX.IMUX.41.DELAY
TXDATA_FS39inputTCELL36:IMUX.IMUX.47.DELAY
TXDATA_FS4inputTCELL32:IMUX.IMUX.29.DELAY
TXDATA_FS40inputTCELL37:IMUX.IMUX.5.DELAY
TXDATA_FS41inputTCELL37:IMUX.IMUX.11.DELAY
TXDATA_FS42inputTCELL37:IMUX.IMUX.17.DELAY
TXDATA_FS43inputTCELL37:IMUX.IMUX.23.DELAY
TXDATA_FS44inputTCELL37:IMUX.IMUX.29.DELAY
TXDATA_FS45inputTCELL37:IMUX.IMUX.35.DELAY
TXDATA_FS46inputTCELL37:IMUX.IMUX.41.DELAY
TXDATA_FS47inputTCELL37:IMUX.IMUX.47.DELAY
TXDATA_FS48inputTCELL38:IMUX.IMUX.5.DELAY
TXDATA_FS49inputTCELL38:IMUX.IMUX.11.DELAY
TXDATA_FS5inputTCELL32:IMUX.IMUX.35.DELAY
TXDATA_FS50inputTCELL38:IMUX.IMUX.17.DELAY
TXDATA_FS51inputTCELL38:IMUX.IMUX.23.DELAY
TXDATA_FS52inputTCELL38:IMUX.IMUX.29.DELAY
TXDATA_FS53inputTCELL38:IMUX.IMUX.35.DELAY
TXDATA_FS54inputTCELL38:IMUX.IMUX.41.DELAY
TXDATA_FS55inputTCELL38:IMUX.IMUX.47.DELAY
TXDATA_FS56inputTCELL39:IMUX.IMUX.5.DELAY
TXDATA_FS57inputTCELL39:IMUX.IMUX.11.DELAY
TXDATA_FS58inputTCELL39:IMUX.IMUX.17.DELAY
TXDATA_FS59inputTCELL39:IMUX.IMUX.23.DELAY
TXDATA_FS6inputTCELL32:IMUX.IMUX.41.DELAY
TXDATA_FS60inputTCELL39:IMUX.IMUX.29.DELAY
TXDATA_FS61inputTCELL39:IMUX.IMUX.35.DELAY
TXDATA_FS62inputTCELL39:IMUX.IMUX.41.DELAY
TXDATA_FS63inputTCELL39:IMUX.IMUX.47.DELAY
TXDATA_FS64inputTCELL32:IMUX.IMUX.2.DELAY
TXDATA_FS65inputTCELL32:IMUX.IMUX.8.DELAY
TXDATA_FS66inputTCELL32:IMUX.IMUX.14.DELAY
TXDATA_FS67inputTCELL32:IMUX.IMUX.20.DELAY
TXDATA_FS68inputTCELL32:IMUX.IMUX.26.DELAY
TXDATA_FS69inputTCELL32:IMUX.IMUX.32.DELAY
TXDATA_FS7inputTCELL32:IMUX.IMUX.47.DELAY
TXDATA_FS70inputTCELL32:IMUX.IMUX.38.DELAY
TXDATA_FS71inputTCELL32:IMUX.IMUX.44.DELAY
TXDATA_FS72inputTCELL33:IMUX.IMUX.2.DELAY
TXDATA_FS73inputTCELL33:IMUX.IMUX.8.DELAY
TXDATA_FS74inputTCELL33:IMUX.IMUX.14.DELAY
TXDATA_FS75inputTCELL33:IMUX.IMUX.20.DELAY
TXDATA_FS76inputTCELL33:IMUX.IMUX.26.DELAY
TXDATA_FS77inputTCELL33:IMUX.IMUX.32.DELAY
TXDATA_FS78inputTCELL33:IMUX.IMUX.38.DELAY
TXDATA_FS79inputTCELL33:IMUX.IMUX.44.DELAY
TXDATA_FS8inputTCELL33:IMUX.IMUX.5.DELAY
TXDATA_FS80inputTCELL34:IMUX.IMUX.2.DELAY
TXDATA_FS81inputTCELL34:IMUX.IMUX.8.DELAY
TXDATA_FS82inputTCELL34:IMUX.IMUX.14.DELAY
TXDATA_FS83inputTCELL34:IMUX.IMUX.20.DELAY
TXDATA_FS84inputTCELL34:IMUX.IMUX.26.DELAY
TXDATA_FS85inputTCELL34:IMUX.IMUX.32.DELAY
TXDATA_FS86inputTCELL34:IMUX.IMUX.38.DELAY
TXDATA_FS87inputTCELL34:IMUX.IMUX.44.DELAY
TXDATA_FS88inputTCELL35:IMUX.IMUX.2.DELAY
TXDATA_FS89inputTCELL35:IMUX.IMUX.8.DELAY
TXDATA_FS9inputTCELL33:IMUX.IMUX.11.DELAY
TXDATA_FS90inputTCELL35:IMUX.IMUX.14.DELAY
TXDATA_FS91inputTCELL35:IMUX.IMUX.20.DELAY
TXDATA_FS92inputTCELL35:IMUX.IMUX.26.DELAY
TXDATA_FS93inputTCELL35:IMUX.IMUX.32.DELAY
TXDATA_FS94inputTCELL35:IMUX.IMUX.38.DELAY
TXDATA_FS95inputTCELL35:IMUX.IMUX.44.DELAY
TXDATA_FS96inputTCELL36:IMUX.IMUX.2.DELAY
TXDATA_FS97inputTCELL36:IMUX.IMUX.8.DELAY
TXDATA_FS98inputTCELL36:IMUX.IMUX.14.DELAY
TXDATA_FS99inputTCELL36:IMUX.IMUX.20.DELAY
TXDCCDONE_SFoutputTCELL33:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL32:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL37:IMUX.IMUX.4.DELAY
TXDEEMPH_FSinputTCELL34:IMUX.IMUX.7.DELAY
TXDETECTRX_FSinputTCELL35:IMUX.IMUX.19.DELAY
TXDRVAMP_FS0inputTCELL34:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL35:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL36:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL37:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL37:IMUX.IMUX.3.DELAY
TXDRVPWRDN_FSinputTCELL35:IMUX.IMUX.16.DELAY
TXELECIDLE_FSinputTCELL37:IMUX.IMUX.27.DELAY
TXEMPINVPO_FSinputTCELL32:IMUX.IMUX.22.DELAY
TXEMPINVPR_FSinputTCELL32:IMUX.IMUX.16.DELAY
TXEMPMAIN_FS0inputTCELL32:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL33:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL34:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL35:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL36:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL37:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL38:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL32:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL33:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL34:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL35:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL36:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL32:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL33:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL34:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL35:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL36:IMUX.IMUX.13.DELAY
TXENC8B10BUSE_FSinputTCELL34:IMUX.IMUX.19.DELAY
TXHEADER_FS0inputTCELL32:IMUX.IMUX.34.DELAY
TXHEADER_FS1inputTCELL32:IMUX.IMUX.31.DELAY
TXHEADER_FS2inputTCELL33:IMUX.IMUX.34.DELAY
TXHEADER_FS3inputTCELL33:IMUX.IMUX.31.DELAY
TXHEADER_FS4inputTCELL34:IMUX.IMUX.34.DELAY
TXHEADER_FS5inputTCELL34:IMUX.IMUX.31.DELAY
TXINHIBIT_FSinputTCELL37:IMUX.IMUX.25.DELAY
TXLATCLKB_FSinputTCELL36:IMUX.CTRL.4
TXLINKSYNCDONE_SFoutputTCELL33:OUT.11.TMIN
TXMARGIN_FS0inputTCELL34:IMUX.IMUX.28.DELAY
TXMARGIN_FS1inputTCELL35:IMUX.IMUX.28.DELAY
TXMARGIN_FS2inputTCELL36:IMUX.IMUX.28.DELAY
TXMSTRSETPHDONE_FSinputTCELL34:IMUX.IMUX.4.DELAY
TXOUTCKCTL_FS0inputTCELL34:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL35:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL36:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL32:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL32:OUT.6.TMIN
TXPDOWNASYNCH_FSinputTCELL37:IMUX.IMUX.22.DELAY
TXPIPPMPWDN_FSinputTCELL33:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL35:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL36:IMUX.IMUX.27.DELAY
TXPMARESETB_FSinputTCELL36:IMUX.CTRL.0
TXPMARESETDONE_SFoutputTCELL32:OUT.24.TMIN
TXPOLARITY_FSinputTCELL32:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL33:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL33:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL32:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL34:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL35:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL36:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL36:IMUX.IMUX.1.DELAY
TXPREAMP_FS0inputTCELL34:IMUX.IMUX.6.DELAY
TXPREAMP_FS1inputTCELL35:IMUX.IMUX.6.DELAY
TXPREAMP_FS2inputTCELL36:IMUX.IMUX.6.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL34:OUT.17.TMIN
TXPROGDIVRESETB_FSinputTCELL35:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL32:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL33:IMUX.IMUX.28.DELAY
TXRATEASYNCH_FSinputTCELL32:IMUX.IMUX.7.DELAY
TXRATEDONE_SFoutputTCELL33:OUT.4.TMIN
TXRATE_FS0inputTCELL34:IMUX.IMUX.22.DELAY
TXRATE_FS1inputTCELL35:IMUX.IMUX.22.DELAY
TXRATE_FS2inputTCELL36:IMUX.IMUX.22.DELAY
TXRESETDONE_SFoutputTCELL33:OUT.13.TMIN
TXRESET_FSinputTCELL38:IMUX.IMUX.9.DELAY
TXSEQUENCE_FS0inputTCELL32:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS1inputTCELL33:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS2inputTCELL34:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS3inputTCELL35:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS4inputTCELL36:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS5inputTCELL37:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS6inputTCELL38:IMUX.IMUX.21.DELAY
TXSERPWRDN_FSinputTCELL32:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL33:IMUX.IMUX.4.DELAY
TXSWING_FSinputTCELL39:IMUX.IMUX.1.DELAY
TXSYNCEN2SLV_SFoutputTCELL33:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL38:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL33:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL34:IMUX.IMUX.27.DELAY
TXUSRCLK2B_FSinputTCELL35:IMUX.CTRL.4
TXUSRCLKB_FSinputTCELL35:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL32:IMUX.IMUX.4.DELAY
TX_EL_FORCE_START_FSinputTCELL36:IMUX.IMUX.4.DELAY

Bel GTY_CHANNEL3

ultrascale GTY bel GTY_CHANNEL3
PinDirectionWires
AFECFOKEN_FSinputTCELL57:IMUX.IMUX.17.DELAY
ALT_SIGVALID_CLKB_FSinputTCELL58:IMUX.CTRL.5
BUFGTCEMASK_SF0outputTCELL47:OUT.18.TMIN
BUFGTCEMASK_SF1outputTCELL48:OUT.18.TMIN
BUFGTCEMASK_SF2outputTCELL47:OUT.12.TMIN
BUFGTCE_SF0outputTCELL47:OUT.16.TMIN
BUFGTCE_SF1outputTCELL48:OUT.16.TMIN
BUFGTCE_SF2outputTCELL48:OUT.12.TMIN
BUFGTDIV_SF0outputTCELL47:OUT.3.TMIN
BUFGTDIV_SF1outputTCELL48:OUT.3.TMIN
BUFGTDIV_SF2outputTCELL49:OUT.3.TMIN
BUFGTDIV_SF3outputTCELL47:OUT.5.TMIN
BUFGTDIV_SF4outputTCELL48:OUT.5.TMIN
BUFGTDIV_SF5outputTCELL49:OUT.5.TMIN
BUFGTDIV_SF6outputTCELL47:OUT.7.TMIN
BUFGTDIV_SF7outputTCELL48:OUT.7.TMIN
BUFGTDIV_SF8outputTCELL49:OUT.7.TMIN
BUFGTRESET_SF0outputTCELL47:OUT.1.TMIN
BUFGTRESET_SF1outputTCELL48:OUT.1.TMIN
BUFGTRESET_SF2outputTCELL47:OUT.10.TMIN
BUFGTRSTMASK_SF0outputTCELL48:OUT.10.TMIN
BUFGTRSTMASK_SF1outputTCELL51:OUT.11.TMIN
BUFGTRSTMASK_SF2outputTCELL51:OUT.14.TMIN
CDRFRRESETB_FSinputTCELL55:IMUX.CTRL.0
CDRHOLD_FSinputTCELL55:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL53:OUT.6.TMIN
CDROVREN_FSinputTCELL56:IMUX.IMUX.31.DELAY
CDRPHRESETB_FSinputTCELL58:IMUX.CTRL.0
CDRRESETB_FSinputTCELL59:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL59:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL59:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL59:IMUX.IMUX.15.DELAY
CFGRESETB_FSinputTCELL49:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL50:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL50:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL51:OUT.0.TMIN
CFOKRESET_FSinputTCELL57:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL51:OUT.6.TMIN
CKOKDONE_SFoutputTCELL50:OUT.17.TMIN
CKOKRESET_FSinputTCELL57:IMUX.IMUX.2.DELAY
CKPINRSRVD0B_FSinputTCELL59:IMUX.CTRL.5
CKPINRSRVD1B_FSinputTCELL59:IMUX.CTRL.4
COMFINISH_SFoutputTCELL53:OUT.0.TMIN
COMINITDET_SFoutputTCELL55:OUT.0.TMIN
COMSASDET_SFoutputTCELL57:OUT.0.TMIN
COMWAKEDET_SFoutputTCELL58:OUT.0.TMIN
COREREFCLKB_FSinputTCELL48:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL49:OUT.18.TMIN
CPLFREQLOCK_SFoutputTCELL49:OUT.1.TMIN
CPLLDMONCLKB_FSinputTCELL50:IMUX.CTRL.5
CPLLKDETEN_FSinputTCELL50:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL49:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL49:OUT.8.TMIN
CPLREFSELDYN_FS0inputTCELL50:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL50:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL50:IMUX.IMUX.3.DELAY
CPLRESETB_FSinputTCELL50:IMUX.CTRL.0
DADDR_FS0inputTCELL47:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL47:IMUX.IMUX.8.DELAY
DADDR_FS2inputTCELL47:IMUX.IMUX.14.DELAY
DADDR_FS3inputTCELL47:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL47:IMUX.IMUX.26.DELAY
DADDR_FS5inputTCELL47:IMUX.IMUX.32.DELAY
DADDR_FS6inputTCELL47:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL47:IMUX.IMUX.44.DELAY
DADDR_FS8inputTCELL48:IMUX.IMUX.2.DELAY
DADDR_FS9inputTCELL48:IMUX.IMUX.8.DELAY
DCLKB_FSinputTCELL47:IMUX.CTRL.4
DEN_FSinputTCELL47:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL59:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL59:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL59:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL59:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL56:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL56:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL57:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL56:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL58:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL58:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL47:OUT.26.TMIN
DFEDOUT_SF1outputTCELL48:OUT.26.TMIN
DFEDOUT_SF2outputTCELL49:OUT.26.TMIN
DFEDOUT_SF3outputTCELL50:OUT.26.TMIN
DFEDOUT_SF4outputTCELL51:OUT.26.TMIN
DFEDOUT_SF5outputTCELL47:OUT.6.TMIN
DFEDOUT_SF6outputTCELL48:OUT.6.TMIN
DFEGCHOLD_FSinputTCELL57:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL57:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL59:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL59:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL57:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL57:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL58:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL58:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL59:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL59:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL57:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL57:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL58:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL58:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL57:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL57:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL58:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL58:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL59:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL59:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL57:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL57:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL58:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL58:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL59:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL59:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL57:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL57:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL58:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL58:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL57:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL57:IMUX.IMUX.38.DELAY
DFERESETB_FSinputTCELL54:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL57:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL57:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL58:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL58:IMUX.IMUX.39.DELAY
DFEVSEN_FSinputTCELL57:IMUX.IMUX.45.DELAY
DFEYEN_FSinputTCELL58:IMUX.IMUX.45.DELAY
DI_FS0inputTCELL47:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL47:IMUX.IMUX.11.DELAY
DI_FS10inputTCELL48:IMUX.IMUX.17.DELAY
DI_FS11inputTCELL48:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL48:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL48:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL48:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL48:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL47:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL47:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL47:IMUX.IMUX.29.DELAY
DI_FS5inputTCELL47:IMUX.IMUX.35.DELAY
DI_FS6inputTCELL47:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL47:IMUX.IMUX.47.DELAY
DI_FS8inputTCELL48:IMUX.IMUX.5.DELAY
DI_FS9inputTCELL48:IMUX.IMUX.11.DELAY
DMONCLKB_FSinputTCELL47:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL48:IMUX.IMUX.0.DELAY
DMONOUT_SF0outputTCELL47:OUT.27.TMIN
DMONOUT_SF1outputTCELL48:OUT.27.TMIN
DMONOUT_SF10outputTCELL47:OUT.15.TMIN
DMONOUT_SF11outputTCELL48:OUT.15.TMIN
DMONOUT_SF12outputTCELL49:OUT.15.TMIN
DMONOUT_SF13outputTCELL50:OUT.15.TMIN
DMONOUT_SF14outputTCELL51:OUT.15.TMIN
DMONOUT_SF15outputTCELL47:OUT.9.TMIN
DMONOUT_SF16outputTCELL48:OUT.13.TMIN
DMONOUT_SF2outputTCELL49:OUT.27.TMIN
DMONOUT_SF3outputTCELL50:OUT.27.TMIN
DMONOUT_SF4outputTCELL51:OUT.27.TMIN
DMONOUT_SF5outputTCELL47:OUT.21.TMIN
DMONOUT_SF6outputTCELL48:OUT.21.TMIN
DMONOUT_SF7outputTCELL49:OUT.21.TMIN
DMONOUT_SF8outputTCELL50:OUT.21.TMIN
DMONOUT_SF9outputTCELL51:OUT.21.TMIN
DRDY_SFoutputTCELL48:OUT.11.TMIN
DRPDO_SF0outputTCELL47:OUT.31.TMIN
DRPDO_SF1outputTCELL48:OUT.31.TMIN
DRPDO_SF10outputTCELL47:OUT.19.TMIN
DRPDO_SF11outputTCELL48:OUT.19.TMIN
DRPDO_SF12outputTCELL49:OUT.19.TMIN
DRPDO_SF13outputTCELL50:OUT.19.TMIN
DRPDO_SF14outputTCELL51:OUT.19.TMIN
DRPDO_SF15outputTCELL47:OUT.13.TMIN
DRPDO_SF2outputTCELL49:OUT.31.TMIN
DRPDO_SF3outputTCELL50:OUT.31.TMIN
DRPDO_SF4outputTCELL51:OUT.31.TMIN
DRPDO_SF5outputTCELL47:OUT.25.TMIN
DRPDO_SF6outputTCELL48:OUT.25.TMIN
DRPDO_SF7outputTCELL49:OUT.25.TMIN
DRPDO_SF8outputTCELL50:OUT.25.TMIN
DRPDO_SF9outputTCELL51:OUT.25.TMIN
DWE_FSinputTCELL47:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL50:IMUX.IMUX.22.DELAY
EVODDPHICALDONE_FSinputTCELL48:IMUX.IMUX.42.DELAY
EVODDPHICALSTART_FSinputTCELL48:IMUX.IMUX.45.DELAY
EVODDPHIDRDEN_FSinputTCELL48:IMUX.IMUX.39.DELAY
EVODDPHIDWREN_FSinputTCELL48:IMUX.IMUX.36.DELAY
EVODDPHIXRDEN_FSinputTCELL48:IMUX.IMUX.34.DELAY
EVODDPHIXWREN_FSinputTCELL48:IMUX.IMUX.31.DELAY
EYESCANDATAERROR_SFoutputTCELL48:OUT.28.TMIN
EYESCANTRIGGER_FSinputTCELL47:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL55:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL55:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL51:OUT.22.TMIN
GTRSTSEL_FSinputTCELL48:IMUX.IMUX.20.DELAY
GTRXRSTB_FSinputTCELL56:IMUX.CTRL.0
GTTXRSTB_FSinputTCELL51:IMUX.CTRL.0
ISCANRESET_FSinputTCELL47:IMUX.IMUX.9.DELAY
ISERRDETEN_FSinputTCELL47:IMUX.IMUX.6.DELAY
LOOPBACK_FS0inputTCELL49:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL49:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL49:IMUX.IMUX.9.DELAY
LOOPRSVD_FS0inputTCELL57:IMUX.IMUX.3.DELAY
LOOPRSVD_FS1inputTCELL58:IMUX.IMUX.3.DELAY
LOOPRSVD_FS10inputTCELL58:IMUX.IMUX.14.DELAY
LOOPRSVD_FS11inputTCELL58:IMUX.IMUX.17.DELAY
LOOPRSVD_FS12inputTCELL58:IMUX.IMUX.21.DELAY
LOOPRSVD_FS13inputTCELL59:IMUX.IMUX.24.DELAY
LOOPRSVD_FS14inputTCELL59:IMUX.IMUX.31.DELAY
LOOPRSVD_FS15inputTCELL59:IMUX.IMUX.41.DELAY
LOOPRSVD_FS2inputTCELL59:IMUX.IMUX.3.DELAY
LOOPRSVD_FS3inputTCELL57:IMUX.IMUX.6.DELAY
LOOPRSVD_FS4inputTCELL58:IMUX.IMUX.6.DELAY
LOOPRSVD_FS5inputTCELL59:IMUX.IMUX.6.DELAY
LOOPRSVD_FS6inputTCELL57:IMUX.IMUX.9.DELAY
LOOPRSVD_FS7inputTCELL58:IMUX.IMUX.9.DELAY
LOOPRSVD_FS8inputTCELL59:IMUX.IMUX.9.DELAY
LOOPRSVD_FS9inputTCELL57:IMUX.IMUX.14.DELAY
LPBKRXTXSEREN_FSinputTCELL48:IMUX.IMUX.26.DELAY
LPBKTXRXSEREN_FSinputTCELL47:IMUX.IMUX.15.DELAY
LPMGCHOLD_FSinputTCELL59:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL59:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL59:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL58:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL59:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL59:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL58:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL58:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL47:OUT.28.TMIN
OSHOLD_FSinputTCELL57:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL56:IMUX.IMUX.16.DELAY
PCIEEQRXEQADAPTDONE_FSinputTCELL59:IMUX.IMUX.39.DELAY
PCIERATEGEN3_SFoutputTCELL48:OUT.24.TMIN
PCIERATEIDLE_SFoutputTCELL47:OUT.24.TMIN
PCIERATEQPLLPD_SF0outputTCELL52:OUT.10.TMIN
PCIERATEQPLLPD_SF1outputTCELL53:OUT.10.TMIN
PCIERATEQPLLRESET_SF0outputTCELL47:OUT.20.TMIN
PCIERATEQPLLRESET_SF1outputTCELL48:OUT.20.TMIN
PCIERSTIDLE_FSinputTCELL58:IMUX.IMUX.41.DELAY
PCIERSTTXSYNCSTART_FSinputTCELL52:IMUX.IMUX.4.DELAY
PCIESYNCTXSYNCDONE_SFoutputTCELL49:OUT.17.TMIN
PCIEUSERGEN3RDY_SFoutputTCELL50:OUT.5.TMIN
PCIEUSERPHYSTATUSRST_SFoutputTCELL50:OUT.3.TMIN
PCS_RSVD_IN_FS0inputTCELL52:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL52:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL57:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL57:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL58:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL58:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL59:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL59:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL53:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL53:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL54:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL54:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL55:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL55:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL56:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL56:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL52:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL53:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL54:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL55:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL56:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL57:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL58:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL59:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL54:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL55:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL56:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL57:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL58:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL59:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL52:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL53:OUT.20.TMIN
PHYSTATUS_SFoutputTCELL54:OUT.0.TMIN
PINRSRVDAS_SF0outputTCELL48:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL49:OUT.9.TMIN
PINRSRVDAS_SF2outputTCELL50:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL51:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL48:OUT.30.TMIN
PINRSRVDAS_SF5outputTCELL49:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL50:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL51:OUT.30.TMIN
PINRSRVD_FS0inputTCELL52:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL52:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL57:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL57:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL58:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL58:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL59:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL59:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL53:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL53:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL54:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL54:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL55:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL55:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL56:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL56:IMUX.IMUX.46.DELAY
PMASCANCLK0B_FSinputTCELL57:IMUX.CTRL.5
PMASCANCLK1B_FSinputTCELL57:IMUX.CTRL.4
PMASCANCLK2B_FSinputTCELL51:IMUX.CTRL.5
PMASCANCLK3B_FSinputTCELL51:IMUX.CTRL.4
PMASCANCLK4B_FSinputTCELL49:IMUX.CTRL.5
PMASCANCLK5B_FSinputTCELL49:IMUX.CTRL.6
PMASCANENB_FSinputTCELL48:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL48:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL49:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL47:IMUX.IMUX.42.DELAY
PMASCANIN_FS11inputTCELL47:IMUX.IMUX.45.DELAY
PMASCANIN_FS2inputTCELL49:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL50:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL50:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL51:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL51:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL47:IMUX.IMUX.34.DELAY
PMASCANIN_FS8inputTCELL47:IMUX.IMUX.36.DELAY
PMASCANIN_FS9inputTCELL47:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL47:IMUX.IMUX.40.DELAY
PMASCANOUT_SF0outputTCELL47:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL48:OUT.29.TMIN
PMASCANOUT_SF10outputTCELL49:OUT.14.TMIN
PMASCANOUT_SF11outputTCELL50:OUT.14.TMIN
PMASCANOUT_SF2outputTCELL49:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL50:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL51:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL47:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL48:OUT.17.TMIN
PMASCANOUT_SF7outputTCELL49:OUT.16.TMIN
PMASCANOUT_SF8outputTCELL47:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL48:OUT.14.TMIN
PMASCANRSTEN_FSinputTCELL47:IMUX.IMUX.37.DELAY
PRBSCNTRST_FSinputTCELL55:IMUX.IMUX.12.DELAY
RATE_DRP_DONE_EXT_FSinputTCELL54:IMUX.IMUX.13.DELAY
RATE_DRP_START_SFoutputTCELL50:OUT.24.TMIN
RCODAPWDN_FSinputTCELL55:IMUX.IMUX.19.DELAY
RCODARESETB_FSinputTCELL56:IMUX.CTRL.7
RCOOVREN_FSinputTCELL55:IMUX.IMUX.16.DELAY
RDASOFTRSTDONE_SFoutputTCELL52:OUT.6.TMIN
RESETOVRD_FSinputTCELL54:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL51:OUT.18.TMIN
RSTCLKENTX_FSinputTCELL50:IMUX.IMUX.7.DELAY
RXBUFRSTB_FSinputTCELL57:IMUX.CTRL.0
RXBUFSTATUS_SF0outputTCELL54:OUT.6.TMIN
RXBUFSTATUS_SF1outputTCELL55:OUT.6.TMIN
RXBUFSTATUS_SF2outputTCELL56:OUT.6.TMIN
RXBYTEISALIGNED_SFoutputTCELL54:OUT.2.TMIN
RXBYTEREALIGN_SFoutputTCELL53:OUT.2.TMIN
RXCDRPHDONE_SFoutputTCELL50:OUT.20.TMIN
RXCHANBONDSEQ_SFoutputTCELL57:OUT.2.TMIN
RXCHANREALIGN_SFoutputTCELL59:OUT.2.TMIN
RXCHARISCOMMA_SF0outputTCELL52:OUT.18.TMIN
RXCHARISCOMMA_SF1outputTCELL53:OUT.18.TMIN
RXCHARISCOMMA_SF2outputTCELL54:OUT.18.TMIN
RXCHARISCOMMA_SF3outputTCELL55:OUT.18.TMIN
RXCHARISCOMMA_SF4outputTCELL56:OUT.18.TMIN
RXCHARISCOMMA_SF5outputTCELL57:OUT.18.TMIN
RXCHARISCOMMA_SF6outputTCELL58:OUT.18.TMIN
RXCHARISCOMMA_SF7outputTCELL59:OUT.18.TMIN
RXCHARISK_SF0outputTCELL52:OUT.26.TMIN
RXCHARISK_SF1outputTCELL53:OUT.26.TMIN
RXCHARISK_SF10outputTCELL54:OUT.24.TMIN
RXCHARISK_SF11outputTCELL55:OUT.24.TMIN
RXCHARISK_SF12outputTCELL56:OUT.24.TMIN
RXCHARISK_SF13outputTCELL57:OUT.24.TMIN
RXCHARISK_SF14outputTCELL58:OUT.24.TMIN
RXCHARISK_SF15outputTCELL59:OUT.24.TMIN
RXCHARISK_SF2outputTCELL54:OUT.26.TMIN
RXCHARISK_SF3outputTCELL55:OUT.26.TMIN
RXCHARISK_SF4outputTCELL56:OUT.26.TMIN
RXCHARISK_SF5outputTCELL57:OUT.26.TMIN
RXCHARISK_SF6outputTCELL58:OUT.26.TMIN
RXCHARISK_SF7outputTCELL59:OUT.26.TMIN
RXCHARISK_SF8outputTCELL52:OUT.24.TMIN
RXCHARISK_SF9outputTCELL53:OUT.24.TMIN
RXCHBONDI_FS0inputTCELL57:IMUX.IMUX.15.DELAY
RXCHBONDI_FS1inputTCELL57:IMUX.IMUX.18.DELAY
RXCHBONDI_FS2inputTCELL57:IMUX.IMUX.21.DELAY
RXCHBONDI_FS3inputTCELL57:IMUX.IMUX.24.DELAY
RXCHBONDI_FS4inputTCELL57:IMUX.IMUX.27.DELAY
RXCHBONDLEVEL_FS0inputTCELL58:IMUX.IMUX.2.DELAY
RXCHBONDLEVEL_FS1inputTCELL58:IMUX.IMUX.5.DELAY
RXCHBONDLEVEL_FS2inputTCELL58:IMUX.IMUX.8.DELAY
RXCHBONDMASTER_FSinputTCELL55:IMUX.IMUX.33.DELAY
RXCHBONDO_SF0outputTCELL52:OUT.14.TMIN
RXCHBONDO_SF1outputTCELL53:OUT.14.TMIN
RXCHBONDO_SF2outputTCELL54:OUT.14.TMIN
RXCHBONDO_SF3outputTCELL55:OUT.14.TMIN
RXCHBONDO_SF4outputTCELL56:OUT.14.TMIN
RXCHBONDSLAVE_FSinputTCELL56:IMUX.IMUX.33.DELAY
RXCHISALIGNED_SFoutputTCELL58:OUT.2.TMIN
RXCKCORCNT_SF0outputTCELL55:OUT.2.TMIN
RXCKCORCNT_SF1outputTCELL56:OUT.2.TMIN
RXCOALGNEN_FSinputTCELL55:IMUX.IMUX.22.DELAY
RXCOMMADETUSE_FSinputTCELL57:IMUX.IMUX.12.DELAY
RXCOMMADET_SFoutputTCELL56:OUT.0.TMIN
RXCOPHDONE_SFoutputTCELL51:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL55:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL59:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL59:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL59:IMUX.IMUX.32.DELAY
RXDASOFTRESETB_FSinputTCELL58:IMUX.CTRL.7
RXDATAEXTENDRSVD_SF0outputTCELL52:OUT.4.TMIN
RXDATAEXTENDRSVD_SF1outputTCELL53:OUT.4.TMIN
RXDATAEXTENDRSVD_SF2outputTCELL54:OUT.4.TMIN
RXDATAEXTENDRSVD_SF3outputTCELL55:OUT.4.TMIN
RXDATAEXTENDRSVD_SF4outputTCELL56:OUT.4.TMIN
RXDATAEXTENDRSVD_SF5outputTCELL57:OUT.4.TMIN
RXDATAEXTENDRSVD_SF6outputTCELL58:OUT.4.TMIN
RXDATAEXTENDRSVD_SF7outputTCELL59:OUT.4.TMIN
RXDATAVALID_SF0outputTCELL55:OUT.8.TMIN
RXDATAVALID_SF1outputTCELL56:OUT.8.TMIN
RXDATA_SF0outputTCELL52:OUT.3.TMIN
RXDATA_SF1outputTCELL52:OUT.7.TMIN
RXDATA_SF10outputTCELL53:OUT.11.TMIN
RXDATA_SF100outputTCELL56:OUT.17.TMIN
RXDATA_SF101outputTCELL56:OUT.21.TMIN
RXDATA_SF102outputTCELL56:OUT.25.TMIN
RXDATA_SF103outputTCELL56:OUT.29.TMIN
RXDATA_SF104outputTCELL57:OUT.1.TMIN
RXDATA_SF105outputTCELL57:OUT.5.TMIN
RXDATA_SF106outputTCELL57:OUT.9.TMIN
RXDATA_SF107outputTCELL57:OUT.13.TMIN
RXDATA_SF108outputTCELL57:OUT.17.TMIN
RXDATA_SF109outputTCELL57:OUT.21.TMIN
RXDATA_SF11outputTCELL53:OUT.15.TMIN
RXDATA_SF110outputTCELL57:OUT.25.TMIN
RXDATA_SF111outputTCELL57:OUT.29.TMIN
RXDATA_SF112outputTCELL58:OUT.1.TMIN
RXDATA_SF113outputTCELL58:OUT.5.TMIN
RXDATA_SF114outputTCELL58:OUT.9.TMIN
RXDATA_SF115outputTCELL58:OUT.13.TMIN
RXDATA_SF116outputTCELL58:OUT.17.TMIN
RXDATA_SF117outputTCELL58:OUT.21.TMIN
RXDATA_SF118outputTCELL58:OUT.25.TMIN
RXDATA_SF119outputTCELL58:OUT.29.TMIN
RXDATA_SF12outputTCELL53:OUT.19.TMIN
RXDATA_SF120outputTCELL59:OUT.1.TMIN
RXDATA_SF121outputTCELL59:OUT.5.TMIN
RXDATA_SF122outputTCELL59:OUT.9.TMIN
RXDATA_SF123outputTCELL59:OUT.13.TMIN
RXDATA_SF124outputTCELL59:OUT.17.TMIN
RXDATA_SF125outputTCELL59:OUT.21.TMIN
RXDATA_SF126outputTCELL59:OUT.25.TMIN
RXDATA_SF127outputTCELL59:OUT.29.TMIN
RXDATA_SF13outputTCELL53:OUT.23.TMIN
RXDATA_SF14outputTCELL53:OUT.27.TMIN
RXDATA_SF15outputTCELL53:OUT.31.TMIN
RXDATA_SF16outputTCELL54:OUT.3.TMIN
RXDATA_SF17outputTCELL54:OUT.7.TMIN
RXDATA_SF18outputTCELL54:OUT.11.TMIN
RXDATA_SF19outputTCELL54:OUT.15.TMIN
RXDATA_SF2outputTCELL52:OUT.11.TMIN
RXDATA_SF20outputTCELL54:OUT.19.TMIN
RXDATA_SF21outputTCELL54:OUT.23.TMIN
RXDATA_SF22outputTCELL54:OUT.27.TMIN
RXDATA_SF23outputTCELL54:OUT.31.TMIN
RXDATA_SF24outputTCELL55:OUT.3.TMIN
RXDATA_SF25outputTCELL55:OUT.7.TMIN
RXDATA_SF26outputTCELL55:OUT.11.TMIN
RXDATA_SF27outputTCELL55:OUT.15.TMIN
RXDATA_SF28outputTCELL55:OUT.19.TMIN
RXDATA_SF29outputTCELL55:OUT.23.TMIN
RXDATA_SF3outputTCELL52:OUT.15.TMIN
RXDATA_SF30outputTCELL55:OUT.27.TMIN
RXDATA_SF31outputTCELL55:OUT.31.TMIN
RXDATA_SF32outputTCELL56:OUT.3.TMIN
RXDATA_SF33outputTCELL56:OUT.7.TMIN
RXDATA_SF34outputTCELL56:OUT.11.TMIN
RXDATA_SF35outputTCELL56:OUT.15.TMIN
RXDATA_SF36outputTCELL56:OUT.19.TMIN
RXDATA_SF37outputTCELL56:OUT.23.TMIN
RXDATA_SF38outputTCELL56:OUT.27.TMIN
RXDATA_SF39outputTCELL56:OUT.31.TMIN
RXDATA_SF4outputTCELL52:OUT.19.TMIN
RXDATA_SF40outputTCELL57:OUT.3.TMIN
RXDATA_SF41outputTCELL57:OUT.7.TMIN
RXDATA_SF42outputTCELL57:OUT.11.TMIN
RXDATA_SF43outputTCELL57:OUT.15.TMIN
RXDATA_SF44outputTCELL57:OUT.19.TMIN
RXDATA_SF45outputTCELL57:OUT.23.TMIN
RXDATA_SF46outputTCELL57:OUT.27.TMIN
RXDATA_SF47outputTCELL57:OUT.31.TMIN
RXDATA_SF48outputTCELL58:OUT.3.TMIN
RXDATA_SF49outputTCELL58:OUT.7.TMIN
RXDATA_SF5outputTCELL52:OUT.23.TMIN
RXDATA_SF50outputTCELL58:OUT.11.TMIN
RXDATA_SF51outputTCELL58:OUT.15.TMIN
RXDATA_SF52outputTCELL58:OUT.19.TMIN
RXDATA_SF53outputTCELL58:OUT.23.TMIN
RXDATA_SF54outputTCELL58:OUT.27.TMIN
RXDATA_SF55outputTCELL58:OUT.31.TMIN
RXDATA_SF56outputTCELL59:OUT.3.TMIN
RXDATA_SF57outputTCELL59:OUT.7.TMIN
RXDATA_SF58outputTCELL59:OUT.11.TMIN
RXDATA_SF59outputTCELL59:OUT.15.TMIN
RXDATA_SF6outputTCELL52:OUT.27.TMIN
RXDATA_SF60outputTCELL59:OUT.19.TMIN
RXDATA_SF61outputTCELL59:OUT.23.TMIN
RXDATA_SF62outputTCELL59:OUT.27.TMIN
RXDATA_SF63outputTCELL59:OUT.31.TMIN
RXDATA_SF64outputTCELL52:OUT.1.TMIN
RXDATA_SF65outputTCELL52:OUT.5.TMIN
RXDATA_SF66outputTCELL52:OUT.9.TMIN
RXDATA_SF67outputTCELL52:OUT.13.TMIN
RXDATA_SF68outputTCELL52:OUT.17.TMIN
RXDATA_SF69outputTCELL52:OUT.21.TMIN
RXDATA_SF7outputTCELL52:OUT.31.TMIN
RXDATA_SF70outputTCELL52:OUT.25.TMIN
RXDATA_SF71outputTCELL52:OUT.29.TMIN
RXDATA_SF72outputTCELL53:OUT.1.TMIN
RXDATA_SF73outputTCELL53:OUT.5.TMIN
RXDATA_SF74outputTCELL53:OUT.9.TMIN
RXDATA_SF75outputTCELL53:OUT.13.TMIN
RXDATA_SF76outputTCELL53:OUT.17.TMIN
RXDATA_SF77outputTCELL53:OUT.21.TMIN
RXDATA_SF78outputTCELL53:OUT.25.TMIN
RXDATA_SF79outputTCELL53:OUT.29.TMIN
RXDATA_SF8outputTCELL53:OUT.3.TMIN
RXDATA_SF80outputTCELL54:OUT.1.TMIN
RXDATA_SF81outputTCELL54:OUT.5.TMIN
RXDATA_SF82outputTCELL54:OUT.9.TMIN
RXDATA_SF83outputTCELL54:OUT.13.TMIN
RXDATA_SF84outputTCELL54:OUT.17.TMIN
RXDATA_SF85outputTCELL54:OUT.21.TMIN
RXDATA_SF86outputTCELL54:OUT.25.TMIN
RXDATA_SF87outputTCELL54:OUT.29.TMIN
RXDATA_SF88outputTCELL55:OUT.1.TMIN
RXDATA_SF89outputTCELL55:OUT.5.TMIN
RXDATA_SF9outputTCELL53:OUT.7.TMIN
RXDATA_SF90outputTCELL55:OUT.9.TMIN
RXDATA_SF91outputTCELL55:OUT.13.TMIN
RXDATA_SF92outputTCELL55:OUT.17.TMIN
RXDATA_SF93outputTCELL55:OUT.21.TMIN
RXDATA_SF94outputTCELL55:OUT.25.TMIN
RXDATA_SF95outputTCELL55:OUT.29.TMIN
RXDATA_SF96outputTCELL56:OUT.1.TMIN
RXDATA_SF97outputTCELL56:OUT.5.TMIN
RXDATA_SF98outputTCELL56:OUT.9.TMIN
RXDATA_SF99outputTCELL56:OUT.13.TMIN
RXDEC8B10BUSE_FSinputTCELL58:IMUX.IMUX.36.DELAY
RXDISPERR_SF0outputTCELL52:OUT.30.TMIN
RXDISPERR_SF1outputTCELL53:OUT.30.TMIN
RXDISPERR_SF10outputTCELL54:OUT.28.TMIN
RXDISPERR_SF11outputTCELL55:OUT.28.TMIN
RXDISPERR_SF12outputTCELL56:OUT.28.TMIN
RXDISPERR_SF13outputTCELL57:OUT.28.TMIN
RXDISPERR_SF14outputTCELL58:OUT.28.TMIN
RXDISPERR_SF15outputTCELL59:OUT.28.TMIN
RXDISPERR_SF2outputTCELL54:OUT.30.TMIN
RXDISPERR_SF3outputTCELL55:OUT.30.TMIN
RXDISPERR_SF4outputTCELL56:OUT.30.TMIN
RXDISPERR_SF5outputTCELL57:OUT.30.TMIN
RXDISPERR_SF6outputTCELL58:OUT.30.TMIN
RXDISPERR_SF7outputTCELL59:OUT.30.TMIN
RXDISPERR_SF8outputTCELL52:OUT.28.TMIN
RXDISPERR_SF9outputTCELL53:OUT.28.TMIN
RXELECIDLE_SFoutputTCELL52:OUT.2.TMIN
RXENCHANSYNC_FSinputTCELL54:IMUX.IMUX.33.DELAY
RXENMCOMMAALIGN_FSinputTCELL57:IMUX.IMUX.30.DELAY
RXENPCOMMAALIGN_FSinputTCELL55:IMUX.IMUX.25.DELAY
RXGEARBOXSLIP_FSinputTCELL58:IMUX.IMUX.33.DELAY
RXHEADERVALID_SF0outputTCELL57:OUT.8.TMIN
RXHEADERVALID_SF1outputTCELL58:OUT.8.TMIN
RXHEADER_SF0outputTCELL52:OUT.12.TMIN
RXHEADER_SF1outputTCELL53:OUT.12.TMIN
RXHEADER_SF2outputTCELL54:OUT.12.TMIN
RXHEADER_SF3outputTCELL55:OUT.12.TMIN
RXHEADER_SF4outputTCELL56:OUT.12.TMIN
RXHEADER_SF5outputTCELL57:OUT.12.TMIN
RXLATCLKB_FSinputTCELL58:IMUX.CTRL.4
RXLINKSYNCDONE_SFoutputTCELL51:OUT.13.TMIN
RXLPMEN_FSinputTCELL58:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL58:IMUX.IMUX.35.DELAY
RXNOTINTABLE_SF0outputTCELL52:OUT.16.TMIN
RXNOTINTABLE_SF1outputTCELL53:OUT.16.TMIN
RXNOTINTABLE_SF2outputTCELL54:OUT.16.TMIN
RXNOTINTABLE_SF3outputTCELL55:OUT.16.TMIN
RXNOTINTABLE_SF4outputTCELL56:OUT.16.TMIN
RXNOTINTABLE_SF5outputTCELL57:OUT.16.TMIN
RXNOTINTABLE_SF6outputTCELL58:OUT.16.TMIN
RXNOTINTABLE_SF7outputTCELL59:OUT.16.TMIN
RXOOBRESETB_FSinputTCELL54:IMUX.CTRL.7
RXOUTCKCTL_FS0inputTCELL55:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL56:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL56:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL49:OUT.12.TMIN
RXPLLCKSEL_FS0inputTCELL56:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL57:IMUX.IMUX.4.DELAY
RXPMARESETB_FSinputTCELL55:IMUX.CTRL.7
RXPMARESETDONE_SFoutputTCELL51:OUT.2.TMIN
RXPOLARITY_FSinputTCELL55:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL59:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL52:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL59:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL59:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL59:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL59:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL51:OUT.20.TMIN
RXPROGDIVRESETB_FSinputTCELL57:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL58:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL59:IMUX.IMUX.4.DELAY
RXRATEASYNCH_FSinputTCELL57:IMUX.IMUX.36.DELAY
RXRATEDONE_SFoutputTCELL57:OUT.6.TMIN
RXRATE_FS0inputTCELL56:IMUX.IMUX.18.DELAY
RXRATE_FS1inputTCELL56:IMUX.IMUX.21.DELAY
RXRATE_FS2inputTCELL56:IMUX.IMUX.24.DELAY
RXRECCLKPCS_SFoutputTCELL54:OUT.8.TMIN
RXRECCLK_SFoutputTCELL53:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL59:OUT.10.TMIN
RXRESET_FSinputTCELL56:IMUX.IMUX.13.DELAY
RXSIGVALDLY_FS0inputTCELL49:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS1inputTCELL50:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS2inputTCELL50:IMUX.IMUX.46.DELAY
RXSIGVALDLY_FS3inputTCELL51:IMUX.IMUX.43.DELAY
RXSIGVALDLY_FS4inputTCELL51:IMUX.IMUX.46.DELAY
RXSLIDERDY_SFoutputTCELL51:OUT.12.TMIN
RXSLIDE_FSinputTCELL57:IMUX.IMUX.33.DELAY
RXSLIPDONE_SFoutputTCELL51:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL51:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL59:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL51:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL59:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL58:IMUX.IMUX.26.DELAY
RXSTARTOFSEQ_SF0outputTCELL58:OUT.6.TMIN
RXSTARTOFSEQ_SF1outputTCELL59:OUT.6.TMIN
RXSTATUS_SF0outputTCELL57:OUT.14.TMIN
RXSTATUS_SF1outputTCELL58:OUT.14.TMIN
RXSTATUS_SF2outputTCELL59:OUT.14.TMIN
RXSYNCEN2SLV_SFoutputTCELL51:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL58:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL56:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL55:IMUX.IMUX.4.DELAY
RXTERMPROG_FS0inputTCELL47:IMUX.IMUX.43.DELAY
RXTERMPROG_FS1inputTCELL47:IMUX.IMUX.46.DELAY
RXTERMPROG_FS2inputTCELL48:IMUX.IMUX.43.DELAY
RXTERMPROG_FS3inputTCELL48:IMUX.IMUX.46.DELAY
RXTERMPROG_FS4inputTCELL49:IMUX.IMUX.43.DELAY
RXUSRCLK2B_FSinputTCELL56:IMUX.CTRL.4
RXUSRCLKB_FSinputTCELL56:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL58:IMUX.IMUX.29.DELAY
RXVALID_SFoutputTCELL59:OUT.0.TMIN
RX_POST_DCC_START_FSinputTCELL57:IMUX.IMUX.5.DELAY
SCANCLKB_FSinputTCELL54:IMUX.CTRL.5
SCANENB_FSinputTCELL48:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL47:IMUX.IMUX.27.DELAY
SCANIN_FS1inputTCELL48:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL48:IMUX.IMUX.18.DELAY
SCANIN_FS11inputTCELL47:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL47:IMUX.IMUX.31.DELAY
SCANIN_FS13inputTCELL49:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL56:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL56:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL57:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL58:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL59:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL47:IMUX.IMUX.30.DELAY
SCANIN_FS3inputTCELL48:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL47:IMUX.IMUX.33.DELAY
SCANIN_FS5inputTCELL48:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL48:IMUX.IMUX.24.DELAY
SCANIN_FS7inputTCELL47:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL48:IMUX.IMUX.21.DELAY
SCANIN_FS9inputTCELL47:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL48:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL47:OUT.23.TMIN
SCANOUT_SF1outputTCELL48:OUT.23.TMIN
SCANOUT_SF10outputTCELL49:OUT.2.TMIN
SCANOUT_SF11outputTCELL47:OUT.4.TMIN
SCANOUT_SF12outputTCELL48:OUT.4.TMIN
SCANOUT_SF13outputTCELL49:OUT.4.TMIN
SCANOUT_SF14outputTCELL47:OUT.8.TMIN
SCANOUT_SF15outputTCELL48:OUT.8.TMIN
SCANOUT_SF16outputTCELL49:OUT.10.TMIN
SCANOUT_SF17outputTCELL50:OUT.10.TMIN
SCANOUT_SF18outputTCELL50:OUT.12.TMIN
SCANOUT_SF2outputTCELL49:OUT.23.TMIN
SCANOUT_SF3outputTCELL50:OUT.23.TMIN
SCANOUT_SF4outputTCELL51:OUT.23.TMIN
SCANOUT_SF5outputTCELL47:OUT.11.TMIN
SCANOUT_SF6outputTCELL47:OUT.0.TMIN
SCANOUT_SF7outputTCELL48:OUT.0.TMIN
SCANOUT_SF8outputTCELL47:OUT.2.TMIN
SCANOUT_SF9outputTCELL48:OUT.2.TMIN
STEPSIZEPPM_FS0inputTCELL49:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL50:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL51:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL52:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL53:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUTB_FSinputTCELL53:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL52:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL53:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL54:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL54:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL53:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL49:OUT.20.TMIN
TCOINITSET_FSinputTCELL55:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL50:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL54:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL53:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL50:OUT.8.TMIN
TSTCLK0B_FSinputTCELL55:IMUX.CTRL.5
TSTCLK1B_FSinputTCELL55:IMUX.CTRL.4
TSTIN_FS0inputTCELL47:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL48:IMUX.IMUX.1.DELAY
TSTIN_FS10inputTCELL47:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL48:IMUX.IMUX.16.DELAY
TSTIN_FS12inputTCELL47:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL48:IMUX.IMUX.19.DELAY
TSTIN_FS14inputTCELL47:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL48:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL47:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL48:IMUX.IMUX.25.DELAY
TSTIN_FS18inputTCELL47:IMUX.IMUX.28.DELAY
TSTIN_FS19inputTCELL48:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL47:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL48:IMUX.IMUX.4.DELAY
TSTIN_FS4inputTCELL47:IMUX.IMUX.7.DELAY
TSTIN_FS5inputTCELL48:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL47:IMUX.IMUX.10.DELAY
TSTIN_FS7inputTCELL48:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL47:IMUX.IMUX.13.DELAY
TSTIN_FS9inputTCELL48:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL48:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL48:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL48:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL48:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL48:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL48:IMUX.IMUX.15.DELAY
TXBUFSTATUS_SF0outputTCELL49:OUT.0.TMIN
TXBUFSTATUS_SF1outputTCELL49:OUT.13.TMIN
TXBYPASS8B10B_FS0inputTCELL49:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS1inputTCELL50:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS2inputTCELL51:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS3inputTCELL52:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS4inputTCELL53:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS5inputTCELL54:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS6inputTCELL55:IMUX.IMUX.15.DELAY
TXBYPASS8B10B_FS7inputTCELL56:IMUX.IMUX.15.DELAY
TXCHARDISPMODE_FS0inputTCELL49:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS1inputTCELL50:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS10inputTCELL51:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS11inputTCELL52:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS12inputTCELL53:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS13inputTCELL54:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS14inputTCELL55:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS15inputTCELL56:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS2inputTCELL51:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS3inputTCELL52:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS4inputTCELL53:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS5inputTCELL54:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS6inputTCELL55:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS7inputTCELL56:IMUX.IMUX.45.DELAY
TXCHARDISPMODE_FS8inputTCELL49:IMUX.IMUX.39.DELAY
TXCHARDISPMODE_FS9inputTCELL50:IMUX.IMUX.39.DELAY
TXCHARDISPVAL_FS0inputTCELL49:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS1inputTCELL50:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS10inputTCELL51:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS11inputTCELL52:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS12inputTCELL53:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS13inputTCELL54:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS14inputTCELL55:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS15inputTCELL56:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS2inputTCELL51:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS3inputTCELL52:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS4inputTCELL53:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS5inputTCELL54:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS6inputTCELL55:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS7inputTCELL56:IMUX.IMUX.42.DELAY
TXCHARDISPVAL_FS8inputTCELL49:IMUX.IMUX.36.DELAY
TXCHARDISPVAL_FS9inputTCELL50:IMUX.IMUX.36.DELAY
TXCHARISK_FS0inputTCELL49:IMUX.IMUX.0.DELAY
TXCHARISK_FS1inputTCELL50:IMUX.IMUX.0.DELAY
TXCHARISK_FS2inputTCELL51:IMUX.IMUX.0.DELAY
TXCHARISK_FS3inputTCELL52:IMUX.IMUX.0.DELAY
TXCHARISK_FS4inputTCELL53:IMUX.IMUX.0.DELAY
TXCHARISK_FS5inputTCELL54:IMUX.IMUX.0.DELAY
TXCHARISK_FS6inputTCELL55:IMUX.IMUX.0.DELAY
TXCHARISK_FS7inputTCELL56:IMUX.IMUX.0.DELAY
TXCODAALGNEN_FSinputTCELL52:IMUX.IMUX.7.DELAY
TXCOMINIT_FSinputTCELL51:IMUX.IMUX.16.DELAY
TXCOMSAS_FSinputTCELL51:IMUX.IMUX.10.DELAY
TXCOMWAKE_FSinputTCELL51:IMUX.IMUX.9.DELAY
TXCOPIALGNEN_FSinputTCELL54:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL49:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL54:IMUX.IMUX.19.DELAY
TXDATAEXTENDRSVD_FS0inputTCELL49:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS1inputTCELL50:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS2inputTCELL51:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS3inputTCELL52:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS4inputTCELL53:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS5inputTCELL54:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS6inputTCELL55:IMUX.IMUX.30.DELAY
TXDATAEXTENDRSVD_FS7inputTCELL56:IMUX.IMUX.30.DELAY
TXDATA_FS0inputTCELL49:IMUX.IMUX.5.DELAY
TXDATA_FS1inputTCELL49:IMUX.IMUX.11.DELAY
TXDATA_FS10inputTCELL50:IMUX.IMUX.17.DELAY
TXDATA_FS100inputTCELL53:IMUX.IMUX.26.DELAY
TXDATA_FS101inputTCELL53:IMUX.IMUX.32.DELAY
TXDATA_FS102inputTCELL53:IMUX.IMUX.38.DELAY
TXDATA_FS103inputTCELL53:IMUX.IMUX.44.DELAY
TXDATA_FS104inputTCELL54:IMUX.IMUX.2.DELAY
TXDATA_FS105inputTCELL54:IMUX.IMUX.8.DELAY
TXDATA_FS106inputTCELL54:IMUX.IMUX.14.DELAY
TXDATA_FS107inputTCELL54:IMUX.IMUX.20.DELAY
TXDATA_FS108inputTCELL54:IMUX.IMUX.26.DELAY
TXDATA_FS109inputTCELL54:IMUX.IMUX.32.DELAY
TXDATA_FS11inputTCELL50:IMUX.IMUX.23.DELAY
TXDATA_FS110inputTCELL54:IMUX.IMUX.38.DELAY
TXDATA_FS111inputTCELL54:IMUX.IMUX.44.DELAY
TXDATA_FS112inputTCELL55:IMUX.IMUX.2.DELAY
TXDATA_FS113inputTCELL55:IMUX.IMUX.8.DELAY
TXDATA_FS114inputTCELL55:IMUX.IMUX.14.DELAY
TXDATA_FS115inputTCELL55:IMUX.IMUX.20.DELAY
TXDATA_FS116inputTCELL55:IMUX.IMUX.26.DELAY
TXDATA_FS117inputTCELL55:IMUX.IMUX.32.DELAY
TXDATA_FS118inputTCELL55:IMUX.IMUX.38.DELAY
TXDATA_FS119inputTCELL55:IMUX.IMUX.44.DELAY
TXDATA_FS12inputTCELL50:IMUX.IMUX.29.DELAY
TXDATA_FS120inputTCELL56:IMUX.IMUX.2.DELAY
TXDATA_FS121inputTCELL56:IMUX.IMUX.8.DELAY
TXDATA_FS122inputTCELL56:IMUX.IMUX.14.DELAY
TXDATA_FS123inputTCELL56:IMUX.IMUX.20.DELAY
TXDATA_FS124inputTCELL56:IMUX.IMUX.26.DELAY
TXDATA_FS125inputTCELL56:IMUX.IMUX.32.DELAY
TXDATA_FS126inputTCELL56:IMUX.IMUX.38.DELAY
TXDATA_FS127inputTCELL56:IMUX.IMUX.44.DELAY
TXDATA_FS13inputTCELL50:IMUX.IMUX.35.DELAY
TXDATA_FS14inputTCELL50:IMUX.IMUX.41.DELAY
TXDATA_FS15inputTCELL50:IMUX.IMUX.47.DELAY
TXDATA_FS16inputTCELL51:IMUX.IMUX.5.DELAY
TXDATA_FS17inputTCELL51:IMUX.IMUX.11.DELAY
TXDATA_FS18inputTCELL51:IMUX.IMUX.17.DELAY
TXDATA_FS19inputTCELL51:IMUX.IMUX.23.DELAY
TXDATA_FS2inputTCELL49:IMUX.IMUX.17.DELAY
TXDATA_FS20inputTCELL51:IMUX.IMUX.29.DELAY
TXDATA_FS21inputTCELL51:IMUX.IMUX.35.DELAY
TXDATA_FS22inputTCELL51:IMUX.IMUX.41.DELAY
TXDATA_FS23inputTCELL51:IMUX.IMUX.47.DELAY
TXDATA_FS24inputTCELL52:IMUX.IMUX.5.DELAY
TXDATA_FS25inputTCELL52:IMUX.IMUX.11.DELAY
TXDATA_FS26inputTCELL52:IMUX.IMUX.17.DELAY
TXDATA_FS27inputTCELL52:IMUX.IMUX.23.DELAY
TXDATA_FS28inputTCELL52:IMUX.IMUX.29.DELAY
TXDATA_FS29inputTCELL52:IMUX.IMUX.35.DELAY
TXDATA_FS3inputTCELL49:IMUX.IMUX.23.DELAY
TXDATA_FS30inputTCELL52:IMUX.IMUX.41.DELAY
TXDATA_FS31inputTCELL52:IMUX.IMUX.47.DELAY
TXDATA_FS32inputTCELL53:IMUX.IMUX.5.DELAY
TXDATA_FS33inputTCELL53:IMUX.IMUX.11.DELAY
TXDATA_FS34inputTCELL53:IMUX.IMUX.17.DELAY
TXDATA_FS35inputTCELL53:IMUX.IMUX.23.DELAY
TXDATA_FS36inputTCELL53:IMUX.IMUX.29.DELAY
TXDATA_FS37inputTCELL53:IMUX.IMUX.35.DELAY
TXDATA_FS38inputTCELL53:IMUX.IMUX.41.DELAY
TXDATA_FS39inputTCELL53:IMUX.IMUX.47.DELAY
TXDATA_FS4inputTCELL49:IMUX.IMUX.29.DELAY
TXDATA_FS40inputTCELL54:IMUX.IMUX.5.DELAY
TXDATA_FS41inputTCELL54:IMUX.IMUX.11.DELAY
TXDATA_FS42inputTCELL54:IMUX.IMUX.17.DELAY
TXDATA_FS43inputTCELL54:IMUX.IMUX.23.DELAY
TXDATA_FS44inputTCELL54:IMUX.IMUX.29.DELAY
TXDATA_FS45inputTCELL54:IMUX.IMUX.35.DELAY
TXDATA_FS46inputTCELL54:IMUX.IMUX.41.DELAY
TXDATA_FS47inputTCELL54:IMUX.IMUX.47.DELAY
TXDATA_FS48inputTCELL55:IMUX.IMUX.5.DELAY
TXDATA_FS49inputTCELL55:IMUX.IMUX.11.DELAY
TXDATA_FS5inputTCELL49:IMUX.IMUX.35.DELAY
TXDATA_FS50inputTCELL55:IMUX.IMUX.17.DELAY
TXDATA_FS51inputTCELL55:IMUX.IMUX.23.DELAY
TXDATA_FS52inputTCELL55:IMUX.IMUX.29.DELAY
TXDATA_FS53inputTCELL55:IMUX.IMUX.35.DELAY
TXDATA_FS54inputTCELL55:IMUX.IMUX.41.DELAY
TXDATA_FS55inputTCELL55:IMUX.IMUX.47.DELAY
TXDATA_FS56inputTCELL56:IMUX.IMUX.5.DELAY
TXDATA_FS57inputTCELL56:IMUX.IMUX.11.DELAY
TXDATA_FS58inputTCELL56:IMUX.IMUX.17.DELAY
TXDATA_FS59inputTCELL56:IMUX.IMUX.23.DELAY
TXDATA_FS6inputTCELL49:IMUX.IMUX.41.DELAY
TXDATA_FS60inputTCELL56:IMUX.IMUX.29.DELAY
TXDATA_FS61inputTCELL56:IMUX.IMUX.35.DELAY
TXDATA_FS62inputTCELL56:IMUX.IMUX.41.DELAY
TXDATA_FS63inputTCELL56:IMUX.IMUX.47.DELAY
TXDATA_FS64inputTCELL49:IMUX.IMUX.2.DELAY
TXDATA_FS65inputTCELL49:IMUX.IMUX.8.DELAY
TXDATA_FS66inputTCELL49:IMUX.IMUX.14.DELAY
TXDATA_FS67inputTCELL49:IMUX.IMUX.20.DELAY
TXDATA_FS68inputTCELL49:IMUX.IMUX.26.DELAY
TXDATA_FS69inputTCELL49:IMUX.IMUX.32.DELAY
TXDATA_FS7inputTCELL49:IMUX.IMUX.47.DELAY
TXDATA_FS70inputTCELL49:IMUX.IMUX.38.DELAY
TXDATA_FS71inputTCELL49:IMUX.IMUX.44.DELAY
TXDATA_FS72inputTCELL50:IMUX.IMUX.2.DELAY
TXDATA_FS73inputTCELL50:IMUX.IMUX.8.DELAY
TXDATA_FS74inputTCELL50:IMUX.IMUX.14.DELAY
TXDATA_FS75inputTCELL50:IMUX.IMUX.20.DELAY
TXDATA_FS76inputTCELL50:IMUX.IMUX.26.DELAY
TXDATA_FS77inputTCELL50:IMUX.IMUX.32.DELAY
TXDATA_FS78inputTCELL50:IMUX.IMUX.38.DELAY
TXDATA_FS79inputTCELL50:IMUX.IMUX.44.DELAY
TXDATA_FS8inputTCELL50:IMUX.IMUX.5.DELAY
TXDATA_FS80inputTCELL51:IMUX.IMUX.2.DELAY
TXDATA_FS81inputTCELL51:IMUX.IMUX.8.DELAY
TXDATA_FS82inputTCELL51:IMUX.IMUX.14.DELAY
TXDATA_FS83inputTCELL51:IMUX.IMUX.20.DELAY
TXDATA_FS84inputTCELL51:IMUX.IMUX.26.DELAY
TXDATA_FS85inputTCELL51:IMUX.IMUX.32.DELAY
TXDATA_FS86inputTCELL51:IMUX.IMUX.38.DELAY
TXDATA_FS87inputTCELL51:IMUX.IMUX.44.DELAY
TXDATA_FS88inputTCELL52:IMUX.IMUX.2.DELAY
TXDATA_FS89inputTCELL52:IMUX.IMUX.8.DELAY
TXDATA_FS9inputTCELL50:IMUX.IMUX.11.DELAY
TXDATA_FS90inputTCELL52:IMUX.IMUX.14.DELAY
TXDATA_FS91inputTCELL52:IMUX.IMUX.20.DELAY
TXDATA_FS92inputTCELL52:IMUX.IMUX.26.DELAY
TXDATA_FS93inputTCELL52:IMUX.IMUX.32.DELAY
TXDATA_FS94inputTCELL52:IMUX.IMUX.38.DELAY
TXDATA_FS95inputTCELL52:IMUX.IMUX.44.DELAY
TXDATA_FS96inputTCELL53:IMUX.IMUX.2.DELAY
TXDATA_FS97inputTCELL53:IMUX.IMUX.8.DELAY
TXDATA_FS98inputTCELL53:IMUX.IMUX.14.DELAY
TXDATA_FS99inputTCELL53:IMUX.IMUX.20.DELAY
TXDCCDONE_SFoutputTCELL50:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL49:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL54:IMUX.IMUX.4.DELAY
TXDEEMPH_FSinputTCELL51:IMUX.IMUX.7.DELAY
TXDETECTRX_FSinputTCELL52:IMUX.IMUX.19.DELAY
TXDRVAMP_FS0inputTCELL51:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL52:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL53:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL54:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL54:IMUX.IMUX.3.DELAY
TXDRVPWRDN_FSinputTCELL52:IMUX.IMUX.16.DELAY
TXELECIDLE_FSinputTCELL54:IMUX.IMUX.27.DELAY
TXEMPINVPO_FSinputTCELL49:IMUX.IMUX.22.DELAY
TXEMPINVPR_FSinputTCELL49:IMUX.IMUX.16.DELAY
TXEMPMAIN_FS0inputTCELL49:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL50:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL51:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL52:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL53:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL54:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL55:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL49:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL50:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL51:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL52:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL53:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL49:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL50:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL51:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL52:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL53:IMUX.IMUX.13.DELAY
TXENC8B10BUSE_FSinputTCELL51:IMUX.IMUX.19.DELAY
TXHEADER_FS0inputTCELL49:IMUX.IMUX.34.DELAY
TXHEADER_FS1inputTCELL49:IMUX.IMUX.31.DELAY
TXHEADER_FS2inputTCELL50:IMUX.IMUX.34.DELAY
TXHEADER_FS3inputTCELL50:IMUX.IMUX.31.DELAY
TXHEADER_FS4inputTCELL51:IMUX.IMUX.34.DELAY
TXHEADER_FS5inputTCELL51:IMUX.IMUX.31.DELAY
TXINHIBIT_FSinputTCELL54:IMUX.IMUX.25.DELAY
TXLATCLKB_FSinputTCELL53:IMUX.CTRL.4
TXLINKSYNCDONE_SFoutputTCELL50:OUT.11.TMIN
TXMARGIN_FS0inputTCELL51:IMUX.IMUX.28.DELAY
TXMARGIN_FS1inputTCELL52:IMUX.IMUX.28.DELAY
TXMARGIN_FS2inputTCELL53:IMUX.IMUX.28.DELAY
TXMSTRSETPHDONE_FSinputTCELL51:IMUX.IMUX.4.DELAY
TXOUTCKCTL_FS0inputTCELL51:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL52:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL53:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL49:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL49:OUT.6.TMIN
TXPDOWNASYNCH_FSinputTCELL54:IMUX.IMUX.22.DELAY
TXPIPPMPWDN_FSinputTCELL50:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL52:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL53:IMUX.IMUX.27.DELAY
TXPMARESETB_FSinputTCELL53:IMUX.CTRL.0
TXPMARESETDONE_SFoutputTCELL49:OUT.24.TMIN
TXPOLARITY_FSinputTCELL49:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL50:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL50:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL49:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL51:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL52:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL53:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL53:IMUX.IMUX.1.DELAY
TXPREAMP_FS0inputTCELL51:IMUX.IMUX.6.DELAY
TXPREAMP_FS1inputTCELL52:IMUX.IMUX.6.DELAY
TXPREAMP_FS2inputTCELL53:IMUX.IMUX.6.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL51:OUT.17.TMIN
TXPROGDIVRESETB_FSinputTCELL52:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL49:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL50:IMUX.IMUX.28.DELAY
TXRATEASYNCH_FSinputTCELL49:IMUX.IMUX.7.DELAY
TXRATEDONE_SFoutputTCELL50:OUT.4.TMIN
TXRATE_FS0inputTCELL51:IMUX.IMUX.22.DELAY
TXRATE_FS1inputTCELL52:IMUX.IMUX.22.DELAY
TXRATE_FS2inputTCELL53:IMUX.IMUX.22.DELAY
TXRESETDONE_SFoutputTCELL50:OUT.13.TMIN
TXRESET_FSinputTCELL55:IMUX.IMUX.9.DELAY
TXSEQUENCE_FS0inputTCELL49:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS1inputTCELL50:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS2inputTCELL51:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS3inputTCELL52:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS4inputTCELL53:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS5inputTCELL54:IMUX.IMUX.21.DELAY
TXSEQUENCE_FS6inputTCELL55:IMUX.IMUX.21.DELAY
TXSERPWRDN_FSinputTCELL49:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL50:IMUX.IMUX.4.DELAY
TXSWING_FSinputTCELL56:IMUX.IMUX.1.DELAY
TXSYNCEN2SLV_SFoutputTCELL50:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL55:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL50:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL51:IMUX.IMUX.27.DELAY
TXUSRCLK2B_FSinputTCELL52:IMUX.CTRL.4
TXUSRCLKB_FSinputTCELL52:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL49:IMUX.IMUX.4.DELAY
TX_EL_FORCE_START_FSinputTCELL53:IMUX.IMUX.4.DELAY

Bel RCLK_GT

ultrascale GTY bel RCLK_GT
PinDirectionWires

Bel VCC_GT

ultrascale GTY bel VCC_GT
PinDirectionWires

Bel wires

ultrascale GTY bel wires
WirePins
TCELL0:OUT.0.TMINGTY_CHANNEL0.SCANOUT_SF6
TCELL0:OUT.1.TMINGTY_CHANNEL0.BUFGTRESET_SF0
TCELL0:OUT.2.TMINGTY_CHANNEL0.SCANOUT_SF8
TCELL0:OUT.3.TMINGTY_CHANNEL0.BUFGTDIV_SF0
TCELL0:OUT.4.TMINGTY_CHANNEL0.SCANOUT_SF11
TCELL0:OUT.5.TMINGTY_CHANNEL0.BUFGTDIV_SF3
TCELL0:OUT.6.TMINGTY_CHANNEL0.DFEDOUT_SF5
TCELL0:OUT.7.TMINGTY_CHANNEL0.BUFGTDIV_SF6
TCELL0:OUT.8.TMINGTY_CHANNEL0.SCANOUT_SF14
TCELL0:OUT.9.TMINGTY_CHANNEL0.DMONOUT_SF15
TCELL0:OUT.10.TMINGTY_CHANNEL0.BUFGTRESET_SF2
TCELL0:OUT.11.TMINGTY_CHANNEL0.SCANOUT_SF5
TCELL0:OUT.12.TMINGTY_CHANNEL0.BUFGTCEMASK_SF2
TCELL0:OUT.13.TMINGTY_CHANNEL0.DRPDO_SF15
TCELL0:OUT.14.TMINGTY_CHANNEL0.PMASCANOUT_SF8
TCELL0:OUT.15.TMINGTY_CHANNEL0.DMONOUT_SF10
TCELL0:OUT.16.TMINGTY_CHANNEL0.BUFGTCE_SF0
TCELL0:OUT.17.TMINGTY_CHANNEL0.PMASCANOUT_SF5
TCELL0:OUT.18.TMINGTY_CHANNEL0.BUFGTCEMASK_SF0
TCELL0:OUT.19.TMINGTY_CHANNEL0.DRPDO_SF10
TCELL0:OUT.20.TMINGTY_CHANNEL0.PCIERATEQPLLRESET_SF0
TCELL0:OUT.21.TMINGTY_CHANNEL0.DMONOUT_SF5
TCELL0:OUT.23.TMINGTY_CHANNEL0.SCANOUT_SF0
TCELL0:OUT.24.TMINGTY_CHANNEL0.PCIERATEIDLE_SF
TCELL0:OUT.25.TMINGTY_CHANNEL0.DRPDO_SF5
TCELL0:OUT.26.TMINGTY_CHANNEL0.DFEDOUT_SF0
TCELL0:OUT.27.TMINGTY_CHANNEL0.DMONOUT_SF0
TCELL0:OUT.28.TMINGTY_CHANNEL0.MGTREFCLKFA_SF
TCELL0:OUT.29.TMINGTY_CHANNEL0.PMASCANOUT_SF0
TCELL0:OUT.31.TMINGTY_CHANNEL0.DRPDO_SF0
TCELL0:IMUX.CTRL.4GTY_CHANNEL0.DCLKB_FS
TCELL0:IMUX.CTRL.5GTY_CHANNEL0.DMONCLKB_FS
TCELL0:IMUX.IMUX.0.DELAYGTY_CHANNEL0.DEN_FS
TCELL0:IMUX.IMUX.1.DELAYGTY_CHANNEL0.TSTIN_FS0
TCELL0:IMUX.IMUX.2.DELAYGTY_CHANNEL0.DADDR_FS0
TCELL0:IMUX.IMUX.3.DELAYGTY_CHANNEL0.DWE_FS
TCELL0:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TSTIN_FS2
TCELL0:IMUX.IMUX.5.DELAYGTY_CHANNEL0.DI_FS0
TCELL0:IMUX.IMUX.6.DELAYGTY_CHANNEL0.ISERRDETEN_FS
TCELL0:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TSTIN_FS4
TCELL0:IMUX.IMUX.8.DELAYGTY_CHANNEL0.DADDR_FS1
TCELL0:IMUX.IMUX.9.DELAYGTY_CHANNEL0.ISCANRESET_FS
TCELL0:IMUX.IMUX.10.DELAYGTY_CHANNEL0.TSTIN_FS6
TCELL0:IMUX.IMUX.11.DELAYGTY_CHANNEL0.DI_FS1
TCELL0:IMUX.IMUX.12.DELAYGTY_CHANNEL0.EYESCANTRIGGER_FS
TCELL0:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TSTIN_FS8
TCELL0:IMUX.IMUX.14.DELAYGTY_CHANNEL0.DADDR_FS2
TCELL0:IMUX.IMUX.15.DELAYGTY_CHANNEL0.LPBKTXRXSEREN_FS
TCELL0:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TSTIN_FS10
TCELL0:IMUX.IMUX.17.DELAYGTY_CHANNEL0.DI_FS2
TCELL0:IMUX.IMUX.18.DELAYGTY_CHANNEL0.SCANIN_FS11
TCELL0:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TSTIN_FS12
TCELL0:IMUX.IMUX.20.DELAYGTY_CHANNEL0.DADDR_FS3
TCELL0:IMUX.IMUX.21.DELAYGTY_CHANNEL0.SCANIN_FS9
TCELL0:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TSTIN_FS14
TCELL0:IMUX.IMUX.23.DELAYGTY_CHANNEL0.DI_FS3
TCELL0:IMUX.IMUX.24.DELAYGTY_CHANNEL0.SCANIN_FS7
TCELL0:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TSTIN_FS16
TCELL0:IMUX.IMUX.26.DELAYGTY_CHANNEL0.DADDR_FS4
TCELL0:IMUX.IMUX.27.DELAYGTY_CHANNEL0.SCANIN_FS0
TCELL0:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TSTIN_FS18
TCELL0:IMUX.IMUX.29.DELAYGTY_CHANNEL0.DI_FS4
TCELL0:IMUX.IMUX.30.DELAYGTY_CHANNEL0.SCANIN_FS2
TCELL0:IMUX.IMUX.31.DELAYGTY_CHANNEL0.SCANIN_FS12
TCELL0:IMUX.IMUX.32.DELAYGTY_CHANNEL0.DADDR_FS5
TCELL0:IMUX.IMUX.33.DELAYGTY_CHANNEL0.SCANIN_FS4
TCELL0:IMUX.IMUX.34.DELAYGTY_CHANNEL0.PMASCANIN_FS7
TCELL0:IMUX.IMUX.35.DELAYGTY_CHANNEL0.DI_FS5
TCELL0:IMUX.IMUX.36.DELAYGTY_CHANNEL0.PMASCANIN_FS8
TCELL0:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PMASCANRSTEN_FS
TCELL0:IMUX.IMUX.38.DELAYGTY_CHANNEL0.DADDR_FS6
TCELL0:IMUX.IMUX.39.DELAYGTY_CHANNEL0.PMASCANIN_FS9
TCELL0:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PMASCANMODEB_FS
TCELL0:IMUX.IMUX.41.DELAYGTY_CHANNEL0.DI_FS6
TCELL0:IMUX.IMUX.42.DELAYGTY_CHANNEL0.PMASCANIN_FS10
TCELL0:IMUX.IMUX.43.DELAYGTY_CHANNEL0.RXTERMPROG_FS0
TCELL0:IMUX.IMUX.44.DELAYGTY_CHANNEL0.DADDR_FS7
TCELL0:IMUX.IMUX.45.DELAYGTY_CHANNEL0.PMASCANIN_FS11
TCELL0:IMUX.IMUX.46.DELAYGTY_CHANNEL0.RXTERMPROG_FS1
TCELL0:IMUX.IMUX.47.DELAYGTY_CHANNEL0.DI_FS7
TCELL1:OUT.0.TMINGTY_CHANNEL0.SCANOUT_SF7
TCELL1:OUT.1.TMINGTY_CHANNEL0.BUFGTRESET_SF1
TCELL1:OUT.2.TMINGTY_CHANNEL0.SCANOUT_SF9
TCELL1:OUT.3.TMINGTY_CHANNEL0.BUFGTDIV_SF1
TCELL1:OUT.4.TMINGTY_CHANNEL0.SCANOUT_SF12
TCELL1:OUT.5.TMINGTY_CHANNEL0.BUFGTDIV_SF4
TCELL1:OUT.6.TMINGTY_CHANNEL0.DFEDOUT_SF6
TCELL1:OUT.7.TMINGTY_CHANNEL0.BUFGTDIV_SF7
TCELL1:OUT.8.TMINGTY_CHANNEL0.SCANOUT_SF15
TCELL1:OUT.9.TMINGTY_CHANNEL0.PINRSRVDAS_SF0
TCELL1:OUT.10.TMINGTY_CHANNEL0.BUFGTRSTMASK_SF0
TCELL1:OUT.11.TMINGTY_CHANNEL0.DRDY_SF
TCELL1:OUT.12.TMINGTY_CHANNEL0.BUFGTCE_SF2
TCELL1:OUT.13.TMINGTY_CHANNEL0.DMONOUT_SF16
TCELL1:OUT.14.TMINGTY_CHANNEL0.PMASCANOUT_SF9
TCELL1:OUT.15.TMINGTY_CHANNEL0.DMONOUT_SF11
TCELL1:OUT.16.TMINGTY_CHANNEL0.BUFGTCE_SF1
TCELL1:OUT.17.TMINGTY_CHANNEL0.PMASCANOUT_SF6
TCELL1:OUT.18.TMINGTY_CHANNEL0.BUFGTCEMASK_SF1
TCELL1:OUT.19.TMINGTY_CHANNEL0.DRPDO_SF11
TCELL1:OUT.20.TMINGTY_CHANNEL0.PCIERATEQPLLRESET_SF1
TCELL1:OUT.21.TMINGTY_CHANNEL0.DMONOUT_SF6
TCELL1:OUT.23.TMINGTY_CHANNEL0.SCANOUT_SF1
TCELL1:OUT.24.TMINGTY_CHANNEL0.PCIERATEGEN3_SF
TCELL1:OUT.25.TMINGTY_CHANNEL0.DRPDO_SF6
TCELL1:OUT.26.TMINGTY_CHANNEL0.DFEDOUT_SF1
TCELL1:OUT.27.TMINGTY_CHANNEL0.DMONOUT_SF1
TCELL1:OUT.28.TMINGTY_CHANNEL0.EYESCANDATAERROR_SF
TCELL1:OUT.29.TMINGTY_CHANNEL0.PMASCANOUT_SF1
TCELL1:OUT.30.TMINGTY_CHANNEL0.PINRSRVDAS_SF4
TCELL1:OUT.31.TMINGTY_CHANNEL0.DRPDO_SF1
TCELL1:IMUX.CTRL.5GTY_CHANNEL0.COREREFCLKB_FS
TCELL1:IMUX.IMUX.0.DELAYGTY_CHANNEL0.DMONFIFORESET_FS
TCELL1:IMUX.IMUX.1.DELAYGTY_CHANNEL0.TSTIN_FS1
TCELL1:IMUX.IMUX.2.DELAYGTY_CHANNEL0.DADDR_FS8
TCELL1:IMUX.IMUX.3.DELAYGTY_CHANNEL0.TSTPWRDN_FS0
TCELL1:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TSTIN_FS3
TCELL1:IMUX.IMUX.5.DELAYGTY_CHANNEL0.DI_FS8
TCELL1:IMUX.IMUX.6.DELAYGTY_CHANNEL0.TSTPWRDN_FS1
TCELL1:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TSTIN_FS5
TCELL1:IMUX.IMUX.8.DELAYGTY_CHANNEL0.DADDR_FS9
TCELL1:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TSTPWRDN_FS2
TCELL1:IMUX.IMUX.10.DELAYGTY_CHANNEL0.TSTIN_FS7
TCELL1:IMUX.IMUX.11.DELAYGTY_CHANNEL0.DI_FS9
TCELL1:IMUX.IMUX.12.DELAYGTY_CHANNEL0.TSTPWRDN_FS3
TCELL1:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TSTIN_FS9
TCELL1:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TSTPWRDN_FS4
TCELL1:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TSTIN_FS11
TCELL1:IMUX.IMUX.17.DELAYGTY_CHANNEL0.DI_FS10
TCELL1:IMUX.IMUX.18.DELAYGTY_CHANNEL0.SCANIN_FS10
TCELL1:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TSTIN_FS13
TCELL1:IMUX.IMUX.20.DELAYGTY_CHANNEL0.GTRSTSEL_FS
TCELL1:IMUX.IMUX.21.DELAYGTY_CHANNEL0.SCANIN_FS8
TCELL1:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TSTIN_FS15
TCELL1:IMUX.IMUX.23.DELAYGTY_CHANNEL0.DI_FS11
TCELL1:IMUX.IMUX.24.DELAYGTY_CHANNEL0.SCANIN_FS6
TCELL1:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TSTIN_FS17
TCELL1:IMUX.IMUX.26.DELAYGTY_CHANNEL0.LPBKRXTXSEREN_FS
TCELL1:IMUX.IMUX.27.DELAYGTY_CHANNEL0.SCANIN_FS1
TCELL1:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TSTIN_FS19
TCELL1:IMUX.IMUX.29.DELAYGTY_CHANNEL0.DI_FS12
TCELL1:IMUX.IMUX.30.DELAYGTY_CHANNEL0.SCANIN_FS3
TCELL1:IMUX.IMUX.31.DELAYGTY_CHANNEL0.EVODDPHIXWREN_FS
TCELL1:IMUX.IMUX.32.DELAYGTY_CHANNEL0.SCANMODEB_FS
TCELL1:IMUX.IMUX.33.DELAYGTY_CHANNEL0.SCANIN_FS5
TCELL1:IMUX.IMUX.34.DELAYGTY_CHANNEL0.EVODDPHIXRDEN_FS
TCELL1:IMUX.IMUX.35.DELAYGTY_CHANNEL0.DI_FS13
TCELL1:IMUX.IMUX.36.DELAYGTY_CHANNEL0.EVODDPHIDWREN_FS
TCELL1:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PMASCANENB_FS
TCELL1:IMUX.IMUX.38.DELAYGTY_CHANNEL0.SCANENB_FS
TCELL1:IMUX.IMUX.39.DELAYGTY_CHANNEL0.EVODDPHIDRDEN_FS
TCELL1:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PMASCANIN_FS0
TCELL1:IMUX.IMUX.41.DELAYGTY_CHANNEL0.DI_FS14
TCELL1:IMUX.IMUX.42.DELAYGTY_CHANNEL0.EVODDPHICALDONE_FS
TCELL1:IMUX.IMUX.43.DELAYGTY_CHANNEL0.RXTERMPROG_FS2
TCELL1:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TSTPWRDNOVRDB_FS
TCELL1:IMUX.IMUX.45.DELAYGTY_CHANNEL0.EVODDPHICALSTART_FS
TCELL1:IMUX.IMUX.46.DELAYGTY_CHANNEL0.RXTERMPROG_FS3
TCELL1:IMUX.IMUX.47.DELAYGTY_CHANNEL0.DI_FS15
TCELL2:OUT.0.TMINGTY_CHANNEL0.TXBUFSTATUS_SF0
TCELL2:OUT.1.TMINGTY_CHANNEL0.CPLFREQLOCK_SF
TCELL2:OUT.2.TMINGTY_CHANNEL0.SCANOUT_SF10
TCELL2:OUT.3.TMINGTY_CHANNEL0.BUFGTDIV_SF2
TCELL2:OUT.4.TMINGTY_CHANNEL0.SCANOUT_SF13
TCELL2:OUT.5.TMINGTY_CHANNEL0.BUFGTDIV_SF5
TCELL2:OUT.6.TMINGTY_CHANNEL0.TXOUTCLK_SF
TCELL2:OUT.7.TMINGTY_CHANNEL0.BUFGTDIV_SF8
TCELL2:OUT.8.TMINGTY_CHANNEL0.CPLREFLOSS_SF
TCELL2:OUT.9.TMINGTY_CHANNEL0.PINRSRVDAS_SF1
TCELL2:OUT.10.TMINGTY_CHANNEL0.SCANOUT_SF16
TCELL2:OUT.11.TMINGTY_CHANNEL0.TXOUTCLKPCS_SF
TCELL2:OUT.12.TMINGTY_CHANNEL0.RXPHALIGNERR_SF
TCELL2:OUT.13.TMINGTY_CHANNEL0.TXBUFSTATUS_SF1
TCELL2:OUT.14.TMINGTY_CHANNEL0.PMASCANOUT_SF10
TCELL2:OUT.15.TMINGTY_CHANNEL0.DMONOUT_SF12
TCELL2:OUT.16.TMINGTY_CHANNEL0.PMASCANOUT_SF7
TCELL2:OUT.17.TMINGTY_CHANNEL0.PCIESYNCTXSYNCDONE_SF
TCELL2:OUT.18.TMINGTY_CHANNEL0.CPLFBLOSS_SF
TCELL2:OUT.19.TMINGTY_CHANNEL0.DRPDO_SF12
TCELL2:OUT.20.TMINGTY_CHANNEL0.TCOINITDONE_SF
TCELL2:OUT.21.TMINGTY_CHANNEL0.DMONOUT_SF7
TCELL2:OUT.23.TMINGTY_CHANNEL0.SCANOUT_SF2
TCELL2:OUT.24.TMINGTY_CHANNEL0.TXPMARESETDONE_SF
TCELL2:OUT.25.TMINGTY_CHANNEL0.DRPDO_SF7
TCELL2:OUT.26.TMINGTY_CHANNEL0.DFEDOUT_SF2
TCELL2:OUT.27.TMINGTY_CHANNEL0.DMONOUT_SF2
TCELL2:OUT.28.TMINGTY_CHANNEL0.TXCOPIPHDONE_SF
TCELL2:OUT.29.TMINGTY_CHANNEL0.PMASCANOUT_SF2
TCELL2:OUT.30.TMINGTY_CHANNEL0.PINRSRVDAS_SF5
TCELL2:OUT.31.TMINGTY_CHANNEL0.DRPDO_SF2
TCELL2:IMUX.CTRL.0GTY_CHANNEL0.CFGRESETB_FS
TCELL2:IMUX.CTRL.5GTY_CHANNEL0.PMASCANCLK4B_FS
TCELL2:IMUX.CTRL.6GTY_CHANNEL0.PMASCANCLK5B_FS
TCELL2:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS0
TCELL2:IMUX.IMUX.1.DELAYGTY_CHANNEL0.SCANIN_FS13
TCELL2:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS64
TCELL2:IMUX.IMUX.3.DELAYGTY_CHANNEL0.LOOPBACK_FS0
TCELL2:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TXUSRRDY_FS
TCELL2:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS0
TCELL2:IMUX.IMUX.6.DELAYGTY_CHANNEL0.LOOPBACK_FS1
TCELL2:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TXRATEASYNCH_FS
TCELL2:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS65
TCELL2:IMUX.IMUX.9.DELAYGTY_CHANNEL0.LOOPBACK_FS2
TCELL2:IMUX.IMUX.10.DELAYGTY_CHANNEL0.TXDCCSRESET_FS
TCELL2:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS1
TCELL2:IMUX.IMUX.12.DELAYGTY_CHANNEL0.CPLPWRDN_FS
TCELL2:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TXEMPPRE_FS0
TCELL2:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS66
TCELL2:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS0
TCELL2:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TXEMPINVPR_FS
TCELL2:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS2
TCELL2:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS0
TCELL2:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TXPRBSINERR_FS
TCELL2:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS67
TCELL2:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS0
TCELL2:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TXEMPINVPO_FS
TCELL2:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS3
TCELL2:IMUX.IMUX.24.DELAYGTY_CHANNEL0.TXEMPPOS_FS0
TCELL2:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TXPOLARITY_FS
TCELL2:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS68
TCELL2:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXSERPWRDN_FS
TCELL2:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TXPWRDN_FS0
TCELL2:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS4
TCELL2:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS0
TCELL2:IMUX.IMUX.31.DELAYGTY_CHANNEL0.TXHEADER_FS1
TCELL2:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS69
TCELL2:IMUX.IMUX.33.DELAYGTY_CHANNEL0.STEPSIZEPPM_FS0
TCELL2:IMUX.IMUX.34.DELAYGTY_CHANNEL0.TXHEADER_FS0
TCELL2:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS5
TCELL2:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS8
TCELL2:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PMASCANIN_FS1
TCELL2:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS70
TCELL2:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS8
TCELL2:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PMASCANIN_FS2
TCELL2:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS6
TCELL2:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS0
TCELL2:IMUX.IMUX.43.DELAYGTY_CHANNEL0.RXTERMPROG_FS4
TCELL2:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS71
TCELL2:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS0
TCELL2:IMUX.IMUX.46.DELAYGTY_CHANNEL0.RXSIGVALDLY_FS0
TCELL2:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS7
TCELL3:OUT.0.TMINGTY_CHANNEL0.CFOKFORCEDONE_SF
TCELL3:OUT.2.TMINGTY_CHANNEL0.TXSYNCEN2SLV_SF
TCELL3:OUT.3.TMINGTY_CHANNEL0.PCIEUSERPHYSTATUSRST_SF
TCELL3:OUT.4.TMINGTY_CHANNEL0.TXRATEDONE_SF
TCELL3:OUT.5.TMINGTY_CHANNEL0.PCIEUSERGEN3RDY_SF
TCELL3:OUT.6.TMINGTY_CHANNEL0.CFOKDONE_SF
TCELL3:OUT.8.TMINGTY_CHANNEL0.TDASOFTRSTDONE_SF
TCELL3:OUT.9.TMINGTY_CHANNEL0.PINRSRVDAS_SF2
TCELL3:OUT.10.TMINGTY_CHANNEL0.SCANOUT_SF17
TCELL3:OUT.11.TMINGTY_CHANNEL0.TXLINKSYNCDONE_SF
TCELL3:OUT.12.TMINGTY_CHANNEL0.SCANOUT_SF18
TCELL3:OUT.13.TMINGTY_CHANNEL0.TXRESETDONE_SF
TCELL3:OUT.14.TMINGTY_CHANNEL0.PMASCANOUT_SF11
TCELL3:OUT.15.TMINGTY_CHANNEL0.DMONOUT_SF13
TCELL3:OUT.17.TMINGTY_CHANNEL0.CKOKDONE_SF
TCELL3:OUT.18.TMINGTY_CHANNEL0.TXDCCDONE_SF
TCELL3:OUT.19.TMINGTY_CHANNEL0.DRPDO_SF13
TCELL3:OUT.20.TMINGTY_CHANNEL0.RXCDRPHDONE_SF
TCELL3:OUT.21.TMINGTY_CHANNEL0.DMONOUT_SF8
TCELL3:OUT.23.TMINGTY_CHANNEL0.SCANOUT_SF3
TCELL3:OUT.24.TMINGTY_CHANNEL0.RATE_DRP_START_SF
TCELL3:OUT.25.TMINGTY_CHANNEL0.DRPDO_SF8
TCELL3:OUT.26.TMINGTY_CHANNEL0.DFEDOUT_SF3
TCELL3:OUT.27.TMINGTY_CHANNEL0.DMONOUT_SF3
TCELL3:OUT.29.TMINGTY_CHANNEL0.PMASCANOUT_SF3
TCELL3:OUT.30.TMINGTY_CHANNEL0.PINRSRVDAS_SF6
TCELL3:OUT.31.TMINGTY_CHANNEL0.DRPDO_SF3
TCELL3:IMUX.CTRL.0GTY_CHANNEL0.CPLRESETB_FS
TCELL3:IMUX.CTRL.5GTY_CHANNEL0.CPLLDMONCLKB_FS
TCELL3:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS1
TCELL3:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS72
TCELL3:IMUX.IMUX.3.DELAYGTY_CHANNEL0.CPLREFSELDYN_FS2
TCELL3:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TXSLVSYNCEN_FS
TCELL3:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS8
TCELL3:IMUX.IMUX.6.DELAYGTY_CHANNEL0.CPLREFSELDYN_FS1
TCELL3:IMUX.IMUX.7.DELAYGTY_CHANNEL0.RSTCLKENTX_FS
TCELL3:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS73
TCELL3:IMUX.IMUX.9.DELAYGTY_CHANNEL0.CPLREFSELDYN_FS0
TCELL3:IMUX.IMUX.10.DELAYGTY_CHANNEL0.TXPPMSEL_FS
TCELL3:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS9
TCELL3:IMUX.IMUX.12.DELAYGTY_CHANNEL0.CPLLKDETEN_FS
TCELL3:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TXEMPPRE_FS1
TCELL3:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS74
TCELL3:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS1
TCELL3:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TXPIPPMPWDN_FS
TCELL3:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS10
TCELL3:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS1
TCELL3:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TXPPMOVRDEN_FS
TCELL3:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS75
TCELL3:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS1
TCELL3:IMUX.IMUX.22.DELAYGTY_CHANNEL0.ENPPM_FS
TCELL3:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS11
TCELL3:IMUX.IMUX.24.DELAYGTY_CHANNEL0.TXEMPPOS_FS1
TCELL3:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TCOPIOVREN_FS
TCELL3:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS76
TCELL3:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXSYSCKSEL_FS0
TCELL3:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TXPWRDN_FS1
TCELL3:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS12
TCELL3:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS1
TCELL3:IMUX.IMUX.31.DELAYGTY_CHANNEL0.TXHEADER_FS3
TCELL3:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS77
TCELL3:IMUX.IMUX.33.DELAYGTY_CHANNEL0.STEPSIZEPPM_FS1
TCELL3:IMUX.IMUX.34.DELAYGTY_CHANNEL0.TXHEADER_FS2
TCELL3:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS13
TCELL3:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS9
TCELL3:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PMASCANIN_FS3
TCELL3:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS78
TCELL3:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS9
TCELL3:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PMASCANIN_FS4
TCELL3:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS14
TCELL3:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS1
TCELL3:IMUX.IMUX.43.DELAYGTY_CHANNEL0.RXSIGVALDLY_FS1
TCELL3:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS79
TCELL3:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS1
TCELL3:IMUX.IMUX.46.DELAYGTY_CHANNEL0.RXSIGVALDLY_FS2
TCELL3:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS15
TCELL4:OUT.0.TMINGTY_CHANNEL0.CFOKFSTARTED_SF
TCELL4:OUT.2.TMINGTY_CHANNEL0.RXPMARESETDONE_SF
TCELL4:OUT.3.TMINGTY_CHANNEL0.RXSLIPPMARDY_SF
TCELL4:OUT.4.TMINGTY_CHANNEL0.RXSYNCEN2SLV_SF
TCELL4:OUT.5.TMINGTY_CHANNEL0.RXSLIPOUTCLKRDY_SF
TCELL4:OUT.6.TMINGTY_CHANNEL0.CFOKSTART_SF
TCELL4:OUT.8.TMINGTY_CHANNEL0.RXCOPHDONE_SF
TCELL4:OUT.9.TMINGTY_CHANNEL0.PINRSRVDAS_SF3
TCELL4:OUT.10.TMINGTY_CHANNEL0.RXSLIPDONE_SF
TCELL4:OUT.11.TMINGTY_CHANNEL0.BUFGTRSTMASK_SF1
TCELL4:OUT.12.TMINGTY_CHANNEL0.RXSLIDERDY_SF
TCELL4:OUT.13.TMINGTY_CHANNEL0.RXLINKSYNCDONE_SF
TCELL4:OUT.14.TMINGTY_CHANNEL0.BUFGTRSTMASK_SF2
TCELL4:OUT.15.TMINGTY_CHANNEL0.DMONOUT_SF14
TCELL4:OUT.17.TMINGTY_CHANNEL0.TXPRGDIVRSTDONE_SF
TCELL4:OUT.18.TMINGTY_CHANNEL0.RESET_EXCEPTION_SF
TCELL4:OUT.19.TMINGTY_CHANNEL0.DRPDO_SF14
TCELL4:OUT.20.TMINGTY_CHANNEL0.RXPRGDIVRSTDONE_SF
TCELL4:OUT.21.TMINGTY_CHANNEL0.DMONOUT_SF9
TCELL4:OUT.22.TMINGTY_CHANNEL0.GTPOWERGOOD_SF
TCELL4:OUT.23.TMINGTY_CHANNEL0.SCANOUT_SF4
TCELL4:OUT.25.TMINGTY_CHANNEL0.DRPDO_SF9
TCELL4:OUT.26.TMINGTY_CHANNEL0.DFEDOUT_SF4
TCELL4:OUT.27.TMINGTY_CHANNEL0.DMONOUT_SF4
TCELL4:OUT.29.TMINGTY_CHANNEL0.PMASCANOUT_SF4
TCELL4:OUT.30.TMINGTY_CHANNEL0.PINRSRVDAS_SF7
TCELL4:OUT.31.TMINGTY_CHANNEL0.DRPDO_SF4
TCELL4:IMUX.CTRL.0GTY_CHANNEL0.GTTXRSTB_FS
TCELL4:IMUX.CTRL.4GTY_CHANNEL0.PMASCANCLK3B_FS
TCELL4:IMUX.CTRL.5GTY_CHANNEL0.PMASCANCLK2B_FS
TCELL4:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS2
TCELL4:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS80
TCELL4:IMUX.IMUX.3.DELAYGTY_CHANNEL0.TXOUTCKCTL_FS0
TCELL4:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TXMSTRSETPHDONE_FS
TCELL4:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS16
TCELL4:IMUX.IMUX.6.DELAYGTY_CHANNEL0.TXPREAMP_FS0
TCELL4:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TXDEEMPH_FS
TCELL4:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS81
TCELL4:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TXCOMWAKE_FS
TCELL4:IMUX.IMUX.10.DELAYGTY_CHANNEL0.TXCOMSAS_FS
TCELL4:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS17
TCELL4:IMUX.IMUX.12.DELAYGTY_CHANNEL0.TXDRVAMP_FS0
TCELL4:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TXEMPPRE_FS2
TCELL4:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS82
TCELL4:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS2
TCELL4:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TXCOMINIT_FS
TCELL4:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS18
TCELL4:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS2
TCELL4:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TXENC8B10BUSE_FS
TCELL4:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS83
TCELL4:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS2
TCELL4:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TXRATE_FS0
TCELL4:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS19
TCELL4:IMUX.IMUX.24.DELAYGTY_CHANNEL0.TXEMPPOS_FS2
TCELL4:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TXPRBSPTN_FS0
TCELL4:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS84
TCELL4:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXSYSCKSEL_FS1
TCELL4:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TXMARGIN_FS0
TCELL4:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS20
TCELL4:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS2
TCELL4:IMUX.IMUX.31.DELAYGTY_CHANNEL0.TXHEADER_FS5
TCELL4:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS85
TCELL4:IMUX.IMUX.33.DELAYGTY_CHANNEL0.STEPSIZEPPM_FS2
TCELL4:IMUX.IMUX.34.DELAYGTY_CHANNEL0.TXHEADER_FS4
TCELL4:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS21
TCELL4:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS10
TCELL4:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PMASCANIN_FS5
TCELL4:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS86
TCELL4:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS10
TCELL4:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PMASCANIN_FS6
TCELL4:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS22
TCELL4:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS2
TCELL4:IMUX.IMUX.43.DELAYGTY_CHANNEL0.RXSIGVALDLY_FS3
TCELL4:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS87
TCELL4:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS2
TCELL4:IMUX.IMUX.46.DELAYGTY_CHANNEL0.RXSIGVALDLY_FS4
TCELL4:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS23
TCELL5:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF64
TCELL5:OUT.2.TMINGTY_CHANNEL0.RXELECIDLE_SF
TCELL5:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF0
TCELL5:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF0
TCELL5:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF65
TCELL5:OUT.6.TMINGTY_CHANNEL0.RDASOFTRSTDONE_SF
TCELL5:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF1
TCELL5:OUT.8.TMINGTY_CHANNEL0.RXPRBSLOCKED_SF
TCELL5:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF66
TCELL5:OUT.10.TMINGTY_CHANNEL0.PCIERATEQPLLPD_SF0
TCELL5:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF2
TCELL5:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF0
TCELL5:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF67
TCELL5:OUT.14.TMINGTY_CHANNEL0.RXCHBONDO_SF0
TCELL5:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF3
TCELL5:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF0
TCELL5:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF68
TCELL5:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF0
TCELL5:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF4
TCELL5:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF8
TCELL5:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF69
TCELL5:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF0
TCELL5:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF5
TCELL5:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF8
TCELL5:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF70
TCELL5:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF0
TCELL5:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF6
TCELL5:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF8
TCELL5:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF71
TCELL5:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF0
TCELL5:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF7
TCELL5:IMUX.CTRL.0GTY_CHANNEL0.TXPROGDIVRESETB_FS
TCELL5:IMUX.CTRL.4GTY_CHANNEL0.TXUSRCLK2B_FS
TCELL5:IMUX.CTRL.5GTY_CHANNEL0.TXUSRCLKB_FS
TCELL5:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS3
TCELL5:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS88
TCELL5:IMUX.IMUX.3.DELAYGTY_CHANNEL0.TXOUTCKCTL_FS1
TCELL5:IMUX.IMUX.4.DELAYGTY_CHANNEL0.PCIERSTTXSYNCSTART_FS
TCELL5:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS24
TCELL5:IMUX.IMUX.6.DELAYGTY_CHANNEL0.TXPREAMP_FS1
TCELL5:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TXCODAALGNEN_FS
TCELL5:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS89
TCELL5:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TCODABYPASS_FS
TCELL5:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS25
TCELL5:IMUX.IMUX.12.DELAYGTY_CHANNEL0.TXDRVAMP_FS1
TCELL5:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TXEMPPRE_FS3
TCELL5:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS90
TCELL5:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS3
TCELL5:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TXDRVPWRDN_FS
TCELL5:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS26
TCELL5:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS3
TCELL5:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TXDETECTRX_FS
TCELL5:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS91
TCELL5:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS3
TCELL5:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TXRATE_FS1
TCELL5:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS27
TCELL5:IMUX.IMUX.24.DELAYGTY_CHANNEL0.TXEMPPOS_FS3
TCELL5:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TXPRBSPTN_FS1
TCELL5:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS92
TCELL5:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXPLLCKSEL_FS0
TCELL5:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TXMARGIN_FS1
TCELL5:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS28
TCELL5:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS3
TCELL5:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS93
TCELL5:IMUX.IMUX.33.DELAYGTY_CHANNEL0.STEPSIZEPPM_FS3
TCELL5:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS29
TCELL5:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS11
TCELL5:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS0
TCELL5:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS94
TCELL5:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS11
TCELL5:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS1
TCELL5:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS30
TCELL5:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS3
TCELL5:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS0
TCELL5:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS95
TCELL5:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS3
TCELL5:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS1
TCELL5:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS31
TCELL6:OUT.0.TMINGTY_CHANNEL0.COMFINISH_SF
TCELL6:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF72
TCELL6:OUT.2.TMINGTY_CHANNEL0.RXBYTEREALIGN_SF
TCELL6:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF8
TCELL6:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF1
TCELL6:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF73
TCELL6:OUT.6.TMINGTY_CHANNEL0.CDRLOCK_SF
TCELL6:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF9
TCELL6:OUT.8.TMINGTY_CHANNEL0.RXRECCLK_SF
TCELL6:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF74
TCELL6:OUT.10.TMINGTY_CHANNEL0.PCIERATEQPLLPD_SF1
TCELL6:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF10
TCELL6:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF1
TCELL6:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF75
TCELL6:OUT.14.TMINGTY_CHANNEL0.RXCHBONDO_SF1
TCELL6:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF11
TCELL6:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF1
TCELL6:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF76
TCELL6:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF1
TCELL6:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF12
TCELL6:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF9
TCELL6:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF77
TCELL6:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF1
TCELL6:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF13
TCELL6:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF9
TCELL6:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF78
TCELL6:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF1
TCELL6:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF14
TCELL6:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF9
TCELL6:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF79
TCELL6:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF1
TCELL6:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF15
TCELL6:IMUX.CTRL.0GTY_CHANNEL0.TXPMARESETB_FS
TCELL6:IMUX.CTRL.4GTY_CHANNEL0.TXLATCLKB_FS
TCELL6:IMUX.CTRL.5GTY_CHANNEL0.TCOCLKFSMFROUTB_FS
TCELL6:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS4
TCELL6:IMUX.IMUX.1.DELAYGTY_CHANNEL0.TXPRBSPTN_FS3
TCELL6:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS96
TCELL6:IMUX.IMUX.3.DELAYGTY_CHANNEL0.TXOUTCKCTL_FS2
TCELL6:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TX_EL_FORCE_START_FS
TCELL6:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS32
TCELL6:IMUX.IMUX.6.DELAYGTY_CHANNEL0.TXPREAMP_FS2
TCELL6:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS97
TCELL6:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TDASOFTRESET_FS
TCELL6:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS33
TCELL6:IMUX.IMUX.12.DELAYGTY_CHANNEL0.TXDRVAMP_FS2
TCELL6:IMUX.IMUX.13.DELAYGTY_CHANNEL0.TXEMPPRE_FS4
TCELL6:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS98
TCELL6:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS4
TCELL6:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TCODAOVREN_FS
TCELL6:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS34
TCELL6:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS4
TCELL6:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TCOHOLDFROUT_FS
TCELL6:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS99
TCELL6:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS4
TCELL6:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TXRATE_FS2
TCELL6:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS35
TCELL6:IMUX.IMUX.24.DELAYGTY_CHANNEL0.TXEMPPOS_FS4
TCELL6:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TXPRBSPTN_FS2
TCELL6:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS100
TCELL6:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXPLLCKSEL_FS1
TCELL6:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TXMARGIN_FS2
TCELL6:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS36
TCELL6:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS4
TCELL6:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS101
TCELL6:IMUX.IMUX.33.DELAYGTY_CHANNEL0.STEPSIZEPPM_FS4
TCELL6:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS37
TCELL6:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS12
TCELL6:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS2
TCELL6:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS102
TCELL6:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS12
TCELL6:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS3
TCELL6:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS38
TCELL6:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS4
TCELL6:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS2
TCELL6:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS103
TCELL6:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS4
TCELL6:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS3
TCELL6:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS39
TCELL7:OUT.0.TMINGTY_CHANNEL0.PHYSTATUS_SF
TCELL7:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF80
TCELL7:OUT.2.TMINGTY_CHANNEL0.RXBYTEISALIGNED_SF
TCELL7:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF16
TCELL7:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF2
TCELL7:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF81
TCELL7:OUT.6.TMINGTY_CHANNEL0.RXBUFSTATUS_SF0
TCELL7:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF17
TCELL7:OUT.8.TMINGTY_CHANNEL0.RXRECCLKPCS_SF
TCELL7:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF82
TCELL7:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF18
TCELL7:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF2
TCELL7:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF83
TCELL7:OUT.14.TMINGTY_CHANNEL0.RXCHBONDO_SF2
TCELL7:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF19
TCELL7:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF2
TCELL7:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF84
TCELL7:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF2
TCELL7:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF20
TCELL7:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF10
TCELL7:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF85
TCELL7:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF2
TCELL7:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF21
TCELL7:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF10
TCELL7:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF86
TCELL7:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF2
TCELL7:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF22
TCELL7:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF10
TCELL7:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF87
TCELL7:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF2
TCELL7:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF23
TCELL7:IMUX.CTRL.0GTY_CHANNEL0.DFERESETB_FS
TCELL7:IMUX.CTRL.5GTY_CHANNEL0.SCANCLKB_FS
TCELL7:IMUX.CTRL.7GTY_CHANNEL0.RXOOBRESETB_FS
TCELL7:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS5
TCELL7:IMUX.IMUX.1.DELAYGTY_CHANNEL0.RESETOVRD_FS
TCELL7:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS104
TCELL7:IMUX.IMUX.3.DELAYGTY_CHANNEL0.TXDRVAMP_FS4
TCELL7:IMUX.IMUX.4.DELAYGTY_CHANNEL0.TXDCCSTART_FS
TCELL7:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS40
TCELL7:IMUX.IMUX.7.DELAYGTY_CHANNEL0.TCODARESET_FS
TCELL7:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS105
TCELL7:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TCODAPWDN_FS
TCELL7:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS41
TCELL7:IMUX.IMUX.12.DELAYGTY_CHANNEL0.TXDRVAMP_FS3
TCELL7:IMUX.IMUX.13.DELAYGTY_CHANNEL0.RATE_DRP_DONE_EXT_FS
TCELL7:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS106
TCELL7:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS5
TCELL7:IMUX.IMUX.16.DELAYGTY_CHANNEL0.TXCOPIALGNEN_FS
TCELL7:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS42
TCELL7:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS5
TCELL7:IMUX.IMUX.19.DELAYGTY_CHANNEL0.TXCOPISETPHS_FS
TCELL7:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS107
TCELL7:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS5
TCELL7:IMUX.IMUX.22.DELAYGTY_CHANNEL0.TXPDOWNASYNCH_FS
TCELL7:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS43
TCELL7:IMUX.IMUX.25.DELAYGTY_CHANNEL0.TXINHIBIT_FS
TCELL7:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS108
TCELL7:IMUX.IMUX.27.DELAYGTY_CHANNEL0.TXELECIDLE_FS
TCELL7:IMUX.IMUX.28.DELAYGTY_CHANNEL0.TCOUPDNFROUT_FS
TCELL7:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS44
TCELL7:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS5
TCELL7:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS109
TCELL7:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXENCHANSYNC_FS
TCELL7:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS45
TCELL7:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS13
TCELL7:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS4
TCELL7:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS110
TCELL7:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS13
TCELL7:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS5
TCELL7:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS46
TCELL7:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS5
TCELL7:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS4
TCELL7:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS111
TCELL7:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS5
TCELL7:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS5
TCELL7:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS47
TCELL8:OUT.0.TMINGTY_CHANNEL0.COMINITDET_SF
TCELL8:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF88
TCELL8:OUT.2.TMINGTY_CHANNEL0.RXCKCORCNT_SF0
TCELL8:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF24
TCELL8:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF3
TCELL8:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF89
TCELL8:OUT.6.TMINGTY_CHANNEL0.RXBUFSTATUS_SF1
TCELL8:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF25
TCELL8:OUT.8.TMINGTY_CHANNEL0.RXDATAVALID_SF0
TCELL8:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF90
TCELL8:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF26
TCELL8:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF3
TCELL8:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF91
TCELL8:OUT.14.TMINGTY_CHANNEL0.RXCHBONDO_SF3
TCELL8:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF27
TCELL8:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF3
TCELL8:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF92
TCELL8:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF3
TCELL8:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF28
TCELL8:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF11
TCELL8:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF93
TCELL8:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF3
TCELL8:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF29
TCELL8:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF11
TCELL8:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF94
TCELL8:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF3
TCELL8:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF30
TCELL8:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF11
TCELL8:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF95
TCELL8:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF3
TCELL8:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF31
TCELL8:IMUX.CTRL.0GTY_CHANNEL0.CDRFRRESETB_FS
TCELL8:IMUX.CTRL.4GTY_CHANNEL0.TSTCLK1B_FS
TCELL8:IMUX.CTRL.5GTY_CHANNEL0.TSTCLK0B_FS
TCELL8:IMUX.CTRL.7GTY_CHANNEL0.RXPMARESETB_FS
TCELL8:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS6
TCELL8:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS112
TCELL8:IMUX.IMUX.3.DELAYGTY_CHANNEL0.GATERXELECIDLE_FS0
TCELL8:IMUX.IMUX.4.DELAYGTY_CHANNEL0.RXSYSCKSEL_FS1
TCELL8:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS48
TCELL8:IMUX.IMUX.6.DELAYGTY_CHANNEL0.TXSYNCFSMMASTER_FS
TCELL8:IMUX.IMUX.7.DELAYGTY_CHANNEL0.GATERXELECIDLE_FS1
TCELL8:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS113
TCELL8:IMUX.IMUX.9.DELAYGTY_CHANNEL0.TXRESET_FS
TCELL8:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS49
TCELL8:IMUX.IMUX.12.DELAYGTY_CHANNEL0.PRBSCNTRST_FS
TCELL8:IMUX.IMUX.13.DELAYGTY_CHANNEL0.RXPOLARITY_FS
TCELL8:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS114
TCELL8:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS6
TCELL8:IMUX.IMUX.16.DELAYGTY_CHANNEL0.RCOOVREN_FS
TCELL8:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS50
TCELL8:IMUX.IMUX.18.DELAYGTY_CHANNEL0.TXEMPMAIN_FS6
TCELL8:IMUX.IMUX.19.DELAYGTY_CHANNEL0.RCODAPWDN_FS
TCELL8:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS115
TCELL8:IMUX.IMUX.21.DELAYGTY_CHANNEL0.TXSEQUENCE_FS6
TCELL8:IMUX.IMUX.22.DELAYGTY_CHANNEL0.RXCOALGNEN_FS
TCELL8:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS51
TCELL8:IMUX.IMUX.24.DELAYGTY_CHANNEL0.RXCOSETPHS_FS
TCELL8:IMUX.IMUX.25.DELAYGTY_CHANNEL0.RXENPCOMMAALIGN_FS
TCELL8:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS116
TCELL8:IMUX.IMUX.28.DELAYGTY_CHANNEL0.RXOUTCKCTL_FS0
TCELL8:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS52
TCELL8:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS6
TCELL8:IMUX.IMUX.31.DELAYGTY_CHANNEL0.CDRHOLD_FS
TCELL8:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS117
TCELL8:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXCHBONDMASTER_FS
TCELL8:IMUX.IMUX.34.DELAYGTY_CHANNEL0.TCOINITSET_FS
TCELL8:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS53
TCELL8:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS14
TCELL8:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS6
TCELL8:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS118
TCELL8:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS14
TCELL8:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS7
TCELL8:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS54
TCELL8:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS6
TCELL8:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS6
TCELL8:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS119
TCELL8:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS6
TCELL8:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS7
TCELL8:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS55
TCELL9:OUT.0.TMINGTY_CHANNEL0.RXCOMMADET_SF
TCELL9:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF96
TCELL9:OUT.2.TMINGTY_CHANNEL0.RXCKCORCNT_SF1
TCELL9:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF32
TCELL9:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF4
TCELL9:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF97
TCELL9:OUT.6.TMINGTY_CHANNEL0.RXBUFSTATUS_SF2
TCELL9:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF33
TCELL9:OUT.8.TMINGTY_CHANNEL0.RXDATAVALID_SF1
TCELL9:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF98
TCELL9:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF34
TCELL9:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF4
TCELL9:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF99
TCELL9:OUT.14.TMINGTY_CHANNEL0.RXCHBONDO_SF4
TCELL9:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF35
TCELL9:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF4
TCELL9:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF100
TCELL9:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF4
TCELL9:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF36
TCELL9:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF12
TCELL9:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF101
TCELL9:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF4
TCELL9:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF37
TCELL9:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF12
TCELL9:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF102
TCELL9:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF4
TCELL9:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF38
TCELL9:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF12
TCELL9:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF103
TCELL9:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF4
TCELL9:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF39
TCELL9:IMUX.CTRL.0GTY_CHANNEL0.GTRXRSTB_FS
TCELL9:IMUX.CTRL.4GTY_CHANNEL0.RXUSRCLK2B_FS
TCELL9:IMUX.CTRL.5GTY_CHANNEL0.RXUSRCLKB_FS
TCELL9:IMUX.CTRL.7GTY_CHANNEL0.RCODARESETB_FS
TCELL9:IMUX.IMUX.0.DELAYGTY_CHANNEL0.TXCHARISK_FS7
TCELL9:IMUX.IMUX.1.DELAYGTY_CHANNEL0.TXSWING_FS
TCELL9:IMUX.IMUX.2.DELAYGTY_CHANNEL0.TXDATA_FS120
TCELL9:IMUX.IMUX.4.DELAYGTY_CHANNEL0.RXPLLCKSEL_FS0
TCELL9:IMUX.IMUX.5.DELAYGTY_CHANNEL0.TXDATA_FS56
TCELL9:IMUX.IMUX.7.DELAYGTY_CHANNEL0.SCANIN_FS14
TCELL9:IMUX.IMUX.8.DELAYGTY_CHANNEL0.TXDATA_FS121
TCELL9:IMUX.IMUX.10.DELAYGTY_CHANNEL0.SCANIN_FS15
TCELL9:IMUX.IMUX.11.DELAYGTY_CHANNEL0.TXDATA_FS57
TCELL9:IMUX.IMUX.13.DELAYGTY_CHANNEL0.RXRESET_FS
TCELL9:IMUX.IMUX.14.DELAYGTY_CHANNEL0.TXDATA_FS122
TCELL9:IMUX.IMUX.15.DELAYGTY_CHANNEL0.TXBYPASS8B10B_FS7
TCELL9:IMUX.IMUX.16.DELAYGTY_CHANNEL0.OSOVREN_FS
TCELL9:IMUX.IMUX.17.DELAYGTY_CHANNEL0.TXDATA_FS58
TCELL9:IMUX.IMUX.18.DELAYGTY_CHANNEL0.RXRATE_FS0
TCELL9:IMUX.IMUX.19.DELAYGTY_CHANNEL0.DFECFOKOVREN_FS
TCELL9:IMUX.IMUX.20.DELAYGTY_CHANNEL0.TXDATA_FS123
TCELL9:IMUX.IMUX.21.DELAYGTY_CHANNEL0.RXRATE_FS1
TCELL9:IMUX.IMUX.22.DELAYGTY_CHANNEL0.DFECFOKFPULSE_FS
TCELL9:IMUX.IMUX.23.DELAYGTY_CHANNEL0.TXDATA_FS59
TCELL9:IMUX.IMUX.24.DELAYGTY_CHANNEL0.RXRATE_FS2
TCELL9:IMUX.IMUX.25.DELAYGTY_CHANNEL0.DFECFOKFEN_FS
TCELL9:IMUX.IMUX.26.DELAYGTY_CHANNEL0.TXDATA_FS124
TCELL9:IMUX.IMUX.27.DELAYGTY_CHANNEL0.RXSYSCKSEL_FS0
TCELL9:IMUX.IMUX.28.DELAYGTY_CHANNEL0.RXOUTCKCTL_FS1
TCELL9:IMUX.IMUX.29.DELAYGTY_CHANNEL0.TXDATA_FS60
TCELL9:IMUX.IMUX.30.DELAYGTY_CHANNEL0.TXDATAEXTENDRSVD_FS7
TCELL9:IMUX.IMUX.31.DELAYGTY_CHANNEL0.CDROVREN_FS
TCELL9:IMUX.IMUX.32.DELAYGTY_CHANNEL0.TXDATA_FS125
TCELL9:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXCHBONDSLAVE_FS
TCELL9:IMUX.IMUX.34.DELAYGTY_CHANNEL0.RXOUTCKCTL_FS2
TCELL9:IMUX.IMUX.35.DELAYGTY_CHANNEL0.TXDATA_FS61
TCELL9:IMUX.IMUX.36.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS15
TCELL9:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS8
TCELL9:IMUX.IMUX.38.DELAYGTY_CHANNEL0.TXDATA_FS126
TCELL9:IMUX.IMUX.39.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS15
TCELL9:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS9
TCELL9:IMUX.IMUX.41.DELAYGTY_CHANNEL0.TXDATA_FS62
TCELL9:IMUX.IMUX.42.DELAYGTY_CHANNEL0.TXCHARDISPVAL_FS7
TCELL9:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS8
TCELL9:IMUX.IMUX.44.DELAYGTY_CHANNEL0.TXDATA_FS127
TCELL9:IMUX.IMUX.45.DELAYGTY_CHANNEL0.TXCHARDISPMODE_FS7
TCELL9:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS9
TCELL9:IMUX.IMUX.47.DELAYGTY_CHANNEL0.TXDATA_FS63
TCELL10:OUT.0.TMINGTY_CHANNEL0.COMSASDET_SF
TCELL10:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF104
TCELL10:OUT.2.TMINGTY_CHANNEL0.RXCHANBONDSEQ_SF
TCELL10:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF40
TCELL10:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF5
TCELL10:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF105
TCELL10:OUT.6.TMINGTY_CHANNEL0.RXRATEDONE_SF
TCELL10:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF41
TCELL10:OUT.8.TMINGTY_CHANNEL0.RXHEADERVALID_SF0
TCELL10:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF106
TCELL10:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF42
TCELL10:OUT.12.TMINGTY_CHANNEL0.RXHEADER_SF5
TCELL10:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF107
TCELL10:OUT.14.TMINGTY_CHANNEL0.RXSTATUS_SF0
TCELL10:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF43
TCELL10:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF5
TCELL10:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF108
TCELL10:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF5
TCELL10:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF44
TCELL10:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF13
TCELL10:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF109
TCELL10:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF5
TCELL10:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF45
TCELL10:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF13
TCELL10:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF110
TCELL10:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF5
TCELL10:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF46
TCELL10:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF13
TCELL10:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF111
TCELL10:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF5
TCELL10:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF47
TCELL10:IMUX.CTRL.0GTY_CHANNEL0.RXBUFRSTB_FS
TCELL10:IMUX.CTRL.4GTY_CHANNEL0.PMASCANCLK1B_FS
TCELL10:IMUX.CTRL.5GTY_CHANNEL0.PMASCANCLK0B_FS
TCELL10:IMUX.CTRL.7GTY_CHANNEL0.RXPROGDIVRESETB_FS
TCELL10:IMUX.IMUX.1.DELAYGTY_CHANNEL0.SCANIN_FS16
TCELL10:IMUX.IMUX.2.DELAYGTY_CHANNEL0.CKOKRESET_FS
TCELL10:IMUX.IMUX.3.DELAYGTY_CHANNEL0.LOOPRSVD_FS0
TCELL10:IMUX.IMUX.4.DELAYGTY_CHANNEL0.RXPLLCKSEL_FS1
TCELL10:IMUX.IMUX.5.DELAYGTY_CHANNEL0.RX_POST_DCC_START_FS
TCELL10:IMUX.IMUX.6.DELAYGTY_CHANNEL0.LOOPRSVD_FS3
TCELL10:IMUX.IMUX.7.DELAYGTY_CHANNEL0.DFEH2HOLD_FS
TCELL10:IMUX.IMUX.9.DELAYGTY_CHANNEL0.LOOPRSVD_FS6
TCELL10:IMUX.IMUX.10.DELAYGTY_CHANNEL0.DFEH2OVREN_FS
TCELL10:IMUX.IMUX.11.DELAYGTY_CHANNEL0.DFECFOKHOLD_FS
TCELL10:IMUX.IMUX.12.DELAYGTY_CHANNEL0.RXCOMMADETUSE_FS
TCELL10:IMUX.IMUX.13.DELAYGTY_CHANNEL0.DFEH5HOLD_FS
TCELL10:IMUX.IMUX.14.DELAYGTY_CHANNEL0.LOOPRSVD_FS9
TCELL10:IMUX.IMUX.15.DELAYGTY_CHANNEL0.RXCHBONDI_FS0
TCELL10:IMUX.IMUX.16.DELAYGTY_CHANNEL0.DFEH5OVREN_FS
TCELL10:IMUX.IMUX.17.DELAYGTY_CHANNEL0.AFECFOKEN_FS
TCELL10:IMUX.IMUX.18.DELAYGTY_CHANNEL0.RXCHBONDI_FS1
TCELL10:IMUX.IMUX.19.DELAYGTY_CHANNEL0.DFEH8HOLD_FS
TCELL10:IMUX.IMUX.21.DELAYGTY_CHANNEL0.RXCHBONDI_FS2
TCELL10:IMUX.IMUX.22.DELAYGTY_CHANNEL0.DFEH8OVREN_FS
TCELL10:IMUX.IMUX.23.DELAYGTY_CHANNEL0.OSHOLD_FS
TCELL10:IMUX.IMUX.24.DELAYGTY_CHANNEL0.RXCHBONDI_FS3
TCELL10:IMUX.IMUX.25.DELAYGTY_CHANNEL0.DFEH11HOLD_FS
TCELL10:IMUX.IMUX.27.DELAYGTY_CHANNEL0.RXCHBONDI_FS4
TCELL10:IMUX.IMUX.28.DELAYGTY_CHANNEL0.DFEH11OVREN_FS
TCELL10:IMUX.IMUX.29.DELAYGTY_CHANNEL0.CFOKRESET_FS
TCELL10:IMUX.IMUX.30.DELAYGTY_CHANNEL0.RXENMCOMMAALIGN_FS
TCELL10:IMUX.IMUX.31.DELAYGTY_CHANNEL0.DFEH14HOLD_FS
TCELL10:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXSLIDE_FS
TCELL10:IMUX.IMUX.34.DELAYGTY_CHANNEL0.DFEH14OVREN_FS
TCELL10:IMUX.IMUX.36.DELAYGTY_CHANNEL0.RXRATEASYNCH_FS
TCELL10:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS10
TCELL10:IMUX.IMUX.38.DELAYGTY_CHANNEL0.DFEKLOVREN_FS
TCELL10:IMUX.IMUX.39.DELAYGTY_CHANNEL0.DFEUTOVREN_FS
TCELL10:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS11
TCELL10:IMUX.IMUX.41.DELAYGTY_CHANNEL0.DFEKLHOLD_FS
TCELL10:IMUX.IMUX.42.DELAYGTY_CHANNEL0.DFEUTHOLD_FS
TCELL10:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS10
TCELL10:IMUX.IMUX.44.DELAYGTY_CHANNEL0.DFEGCOVREN_FS
TCELL10:IMUX.IMUX.45.DELAYGTY_CHANNEL0.DFEVSEN_FS
TCELL10:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS11
TCELL10:IMUX.IMUX.47.DELAYGTY_CHANNEL0.DFEGCHOLD_FS
TCELL11:OUT.0.TMINGTY_CHANNEL0.COMWAKEDET_SF
TCELL11:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF112
TCELL11:OUT.2.TMINGTY_CHANNEL0.RXCHISALIGNED_SF
TCELL11:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF48
TCELL11:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF6
TCELL11:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF113
TCELL11:OUT.6.TMINGTY_CHANNEL0.RXSTARTOFSEQ_SF0
TCELL11:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF49
TCELL11:OUT.8.TMINGTY_CHANNEL0.RXHEADERVALID_SF1
TCELL11:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF114
TCELL11:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF50
TCELL11:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF115
TCELL11:OUT.14.TMINGTY_CHANNEL0.RXSTATUS_SF1
TCELL11:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF51
TCELL11:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF6
TCELL11:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF116
TCELL11:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF6
TCELL11:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF52
TCELL11:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF14
TCELL11:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF117
TCELL11:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF6
TCELL11:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF53
TCELL11:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF14
TCELL11:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF118
TCELL11:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF6
TCELL11:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF54
TCELL11:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF14
TCELL11:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF119
TCELL11:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF6
TCELL11:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF55
TCELL11:IMUX.CTRL.0GTY_CHANNEL0.CDRPHRESETB_FS
TCELL11:IMUX.CTRL.4GTY_CHANNEL0.RXLATCLKB_FS
TCELL11:IMUX.CTRL.5GTY_CHANNEL0.ALT_SIGVALID_CLKB_FS
TCELL11:IMUX.CTRL.7GTY_CHANNEL0.RXDASOFTRESETB_FS
TCELL11:IMUX.IMUX.1.DELAYGTY_CHANNEL0.SCANIN_FS17
TCELL11:IMUX.IMUX.2.DELAYGTY_CHANNEL0.RXCHBONDLEVEL_FS0
TCELL11:IMUX.IMUX.3.DELAYGTY_CHANNEL0.LOOPRSVD_FS1
TCELL11:IMUX.IMUX.4.DELAYGTY_CHANNEL0.RXPWRDN_FS0
TCELL11:IMUX.IMUX.5.DELAYGTY_CHANNEL0.RXCHBONDLEVEL_FS1
TCELL11:IMUX.IMUX.6.DELAYGTY_CHANNEL0.LOOPRSVD_FS4
TCELL11:IMUX.IMUX.7.DELAYGTY_CHANNEL0.DFEH3HOLD_FS
TCELL11:IMUX.IMUX.8.DELAYGTY_CHANNEL0.RXCHBONDLEVEL_FS2
TCELL11:IMUX.IMUX.9.DELAYGTY_CHANNEL0.LOOPRSVD_FS7
TCELL11:IMUX.IMUX.10.DELAYGTY_CHANNEL0.DFEH3OVREN_FS
TCELL11:IMUX.IMUX.12.DELAYGTY_CHANNEL0.LPMOSHOLD_FS
TCELL11:IMUX.IMUX.13.DELAYGTY_CHANNEL0.DFEH6HOLD_FS
TCELL11:IMUX.IMUX.14.DELAYGTY_CHANNEL0.LOOPRSVD_FS10
TCELL11:IMUX.IMUX.16.DELAYGTY_CHANNEL0.DFEH6OVREN_FS
TCELL11:IMUX.IMUX.17.DELAYGTY_CHANNEL0.LOOPRSVD_FS11
TCELL11:IMUX.IMUX.19.DELAYGTY_CHANNEL0.DFEH9HOLD_FS
TCELL11:IMUX.IMUX.20.DELAYGTY_CHANNEL0.LPMOSOVREN_FS
TCELL11:IMUX.IMUX.21.DELAYGTY_CHANNEL0.LOOPRSVD_FS12
TCELL11:IMUX.IMUX.22.DELAYGTY_CHANNEL0.DFEH9OVREN_FS
TCELL11:IMUX.IMUX.23.DELAYGTY_CHANNEL0.RXSYNCFSMMASTER_FS
TCELL11:IMUX.IMUX.25.DELAYGTY_CHANNEL0.DFEH12HOLD_FS
TCELL11:IMUX.IMUX.26.DELAYGTY_CHANNEL0.RXSLVSYNCEN_FS
TCELL11:IMUX.IMUX.28.DELAYGTY_CHANNEL0.DFEH12OVREN_FS
TCELL11:IMUX.IMUX.29.DELAYGTY_CHANNEL0.RXUSRRDY_FS
TCELL11:IMUX.IMUX.30.DELAYGTY_CHANNEL0.LPMKHOVREN_FS
TCELL11:IMUX.IMUX.31.DELAYGTY_CHANNEL0.DFEH15HOLD_FS
TCELL11:IMUX.IMUX.32.DELAYGTY_CHANNEL0.RXLPMEN_FS
TCELL11:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXGEARBOXSLIP_FS
TCELL11:IMUX.IMUX.34.DELAYGTY_CHANNEL0.DFEH15OVREN_FS
TCELL11:IMUX.IMUX.35.DELAYGTY_CHANNEL0.RXMSTRSETPHDONE_FS
TCELL11:IMUX.IMUX.36.DELAYGTY_CHANNEL0.RXDEC8B10BUSE_FS
TCELL11:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS12
TCELL11:IMUX.IMUX.38.DELAYGTY_CHANNEL0.DFEDOUTMODE_FS0
TCELL11:IMUX.IMUX.39.DELAYGTY_CHANNEL0.DFEVPOVREN_FS
TCELL11:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS13
TCELL11:IMUX.IMUX.41.DELAYGTY_CHANNEL0.PCIERSTIDLE_FS
TCELL11:IMUX.IMUX.42.DELAYGTY_CHANNEL0.DFEVPHOLD_FS
TCELL11:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS12
TCELL11:IMUX.IMUX.44.DELAYGTY_CHANNEL0.DFEDOUTMODE_FS1
TCELL11:IMUX.IMUX.45.DELAYGTY_CHANNEL0.DFEYEN_FS
TCELL11:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS13
TCELL12:OUT.0.TMINGTY_CHANNEL0.RXVALID_SF
TCELL12:OUT.1.TMINGTY_CHANNEL0.RXDATA_SF120
TCELL12:OUT.2.TMINGTY_CHANNEL0.RXCHANREALIGN_SF
TCELL12:OUT.3.TMINGTY_CHANNEL0.RXDATA_SF56
TCELL12:OUT.4.TMINGTY_CHANNEL0.RXDATAEXTENDRSVD_SF7
TCELL12:OUT.5.TMINGTY_CHANNEL0.RXDATA_SF121
TCELL12:OUT.6.TMINGTY_CHANNEL0.RXSTARTOFSEQ_SF1
TCELL12:OUT.7.TMINGTY_CHANNEL0.RXDATA_SF57
TCELL12:OUT.8.TMINGTY_CHANNEL0.RXPRBSERR_SF
TCELL12:OUT.9.TMINGTY_CHANNEL0.RXDATA_SF122
TCELL12:OUT.10.TMINGTY_CHANNEL0.RXRESETDONE_SF
TCELL12:OUT.11.TMINGTY_CHANNEL0.RXDATA_SF58
TCELL12:OUT.13.TMINGTY_CHANNEL0.RXDATA_SF123
TCELL12:OUT.14.TMINGTY_CHANNEL0.RXSTATUS_SF2
TCELL12:OUT.15.TMINGTY_CHANNEL0.RXDATA_SF59
TCELL12:OUT.16.TMINGTY_CHANNEL0.RXNOTINTABLE_SF7
TCELL12:OUT.17.TMINGTY_CHANNEL0.RXDATA_SF124
TCELL12:OUT.18.TMINGTY_CHANNEL0.RXCHARISCOMMA_SF7
TCELL12:OUT.19.TMINGTY_CHANNEL0.RXDATA_SF60
TCELL12:OUT.20.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF15
TCELL12:OUT.21.TMINGTY_CHANNEL0.RXDATA_SF125
TCELL12:OUT.22.TMINGTY_CHANNEL0.PCS_RSVD_OUT_SF7
TCELL12:OUT.23.TMINGTY_CHANNEL0.RXDATA_SF61
TCELL12:OUT.24.TMINGTY_CHANNEL0.RXCHARISK_SF15
TCELL12:OUT.25.TMINGTY_CHANNEL0.RXDATA_SF126
TCELL12:OUT.26.TMINGTY_CHANNEL0.RXCHARISK_SF7
TCELL12:OUT.27.TMINGTY_CHANNEL0.RXDATA_SF62
TCELL12:OUT.28.TMINGTY_CHANNEL0.RXDISPERR_SF15
TCELL12:OUT.29.TMINGTY_CHANNEL0.RXDATA_SF127
TCELL12:OUT.30.TMINGTY_CHANNEL0.RXDISPERR_SF7
TCELL12:OUT.31.TMINGTY_CHANNEL0.RXDATA_SF63
TCELL12:IMUX.CTRL.0GTY_CHANNEL0.CDRRESETB_FS
TCELL12:IMUX.CTRL.4GTY_CHANNEL0.CKPINRSRVD1B_FS
TCELL12:IMUX.CTRL.5GTY_CHANNEL0.CKPINRSRVD0B_FS
TCELL12:IMUX.IMUX.0.DELAYGTY_CHANNEL0.RXPRBSPTN_FS3
TCELL12:IMUX.IMUX.1.DELAYGTY_CHANNEL0.SCANIN_FS18
TCELL12:IMUX.IMUX.2.DELAYGTY_CHANNEL0.RXPRBSPTN_FS0
TCELL12:IMUX.IMUX.3.DELAYGTY_CHANNEL0.LOOPRSVD_FS2
TCELL12:IMUX.IMUX.4.DELAYGTY_CHANNEL0.RXPWRDN_FS1
TCELL12:IMUX.IMUX.5.DELAYGTY_CHANNEL0.RXPRBSPTN_FS1
TCELL12:IMUX.IMUX.6.DELAYGTY_CHANNEL0.LOOPRSVD_FS5
TCELL12:IMUX.IMUX.7.DELAYGTY_CHANNEL0.DFEH4HOLD_FS
TCELL12:IMUX.IMUX.8.DELAYGTY_CHANNEL0.RXPRBSPTN_FS2
TCELL12:IMUX.IMUX.9.DELAYGTY_CHANNEL0.LOOPRSVD_FS8
TCELL12:IMUX.IMUX.10.DELAYGTY_CHANNEL0.DFEH4OVREN_FS
TCELL12:IMUX.IMUX.11.DELAYGTY_CHANNEL0.DFECFOKCFNUM_FS0
TCELL12:IMUX.IMUX.13.DELAYGTY_CHANNEL0.DFEH7HOLD_FS
TCELL12:IMUX.IMUX.14.DELAYGTY_CHANNEL0.DFECFOKCFNUM_FS1
TCELL12:IMUX.IMUX.15.DELAYGTY_CHANNEL0.CDRSTEPSX_FS
TCELL12:IMUX.IMUX.16.DELAYGTY_CHANNEL0.DFEH7OVREN_FS
TCELL12:IMUX.IMUX.17.DELAYGTY_CHANNEL0.DFECFOKCFNUM_FS2
TCELL12:IMUX.IMUX.18.DELAYGTY_CHANNEL0.CDRSTEPSQ_FS
TCELL12:IMUX.IMUX.19.DELAYGTY_CHANNEL0.DFEH10HOLD_FS
TCELL12:IMUX.IMUX.20.DELAYGTY_CHANNEL0.DFECFOKCFNUM_FS3
TCELL12:IMUX.IMUX.22.DELAYGTY_CHANNEL0.DFEH10OVREN_FS
TCELL12:IMUX.IMUX.23.DELAYGTY_CHANNEL0.LPMKLOVREN_FS
TCELL12:IMUX.IMUX.24.DELAYGTY_CHANNEL0.LOOPRSVD_FS13
TCELL12:IMUX.IMUX.25.DELAYGTY_CHANNEL0.DFEH13HOLD_FS
TCELL12:IMUX.IMUX.26.DELAYGTY_CHANNEL0.LPMKLHOLD_FS
TCELL12:IMUX.IMUX.28.DELAYGTY_CHANNEL0.DFEH13OVREN_FS
TCELL12:IMUX.IMUX.29.DELAYGTY_CHANNEL0.LPMKHHOLD_FS
TCELL12:IMUX.IMUX.30.DELAYGTY_CHANNEL0.LPMGCHOLD_FS
TCELL12:IMUX.IMUX.31.DELAYGTY_CHANNEL0.LOOPRSVD_FS14
TCELL12:IMUX.IMUX.32.DELAYGTY_CHANNEL0.RXDAOVREN_FS
TCELL12:IMUX.IMUX.33.DELAYGTY_CHANNEL0.RXDAALGNEN_FS
TCELL12:IMUX.IMUX.34.DELAYGTY_CHANNEL0.LPMGCOVREN_FS
TCELL12:IMUX.IMUX.35.DELAYGTY_CHANNEL0.RXSLIPPMA_FS
TCELL12:IMUX.IMUX.36.DELAYGTY_CHANNEL0.RXDABYPASS_FS
TCELL12:IMUX.IMUX.37.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS14
TCELL12:IMUX.IMUX.39.DELAYGTY_CHANNEL0.PCIEEQRXEQADAPTDONE_FS
TCELL12:IMUX.IMUX.40.DELAYGTY_CHANNEL0.PCS_RSVD_IN_FS15
TCELL12:IMUX.IMUX.41.DELAYGTY_CHANNEL0.LOOPRSVD_FS15
TCELL12:IMUX.IMUX.42.DELAYGTY_CHANNEL0.RXSLIPOUTCLK_FS
TCELL12:IMUX.IMUX.43.DELAYGTY_CHANNEL0.PINRSRVD_FS14
TCELL12:IMUX.IMUX.45.DELAYGTY_CHANNEL0.CDRSTEPDIR_FS
TCELL12:IMUX.IMUX.46.DELAYGTY_CHANNEL0.PINRSRVD_FS15
TCELL13:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_0_12
TCELL13:OUT.5.TMINGTY_COMMON.DRPDO_SF12
TCELL13:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_0_8
TCELL13:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF0
TCELL13:OUT.13.TMINGTY_COMMON.DRPDO_SF8
TCELL13:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_4
TCELL13:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_4
TCELL13:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_0_4
TCELL13:OUT.21.TMINGTY_COMMON.DRPDO_SF4
TCELL13:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_0
TCELL13:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_0
TCELL13:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_0_0
TCELL13:OUT.29.TMINGTY_COMMON.DRPDO_SF0
TCELL13:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_0_0
TCELL13:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS0
TCELL13:IMUX.CTRL.5GTY_COMMON.HROW_TEST_CKB_FS_0
TCELL13:IMUX.IMUX.0.DELAYBUFG_GT2.RSTMASK
TCELL13:IMUX.IMUX.1.DELAYBUFG_GT2.DIV2
TCELL13:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_0_7
TCELL13:IMUX.IMUX.3.DELAYGTY_COMMON.DADDR_FS7
TCELL13:IMUX.IMUX.4.DELAYGTY_COMMON.DI_FS7
TCELL13:IMUX.IMUX.5.DELAYGTY_COMMON.DWE_FS
TCELL13:IMUX.IMUX.6.DELAYBUFG_GT2.CEMASK
TCELL13:IMUX.IMUX.7.DELAYBUFG_GT2.DIV1
TCELL13:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_0_6
TCELL13:IMUX.IMUX.9.DELAYGTY_COMMON.DADDR_FS6
TCELL13:IMUX.IMUX.10.DELAYGTY_COMMON.DI_FS6
TCELL13:IMUX.IMUX.13.DELAYBUFG_GT2.DIV0
TCELL13:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_0_5
TCELL13:IMUX.IMUX.15.DELAYGTY_COMMON.DADDR_FS5
TCELL13:IMUX.IMUX.16.DELAYGTY_COMMON.DI_FS5
TCELL13:IMUX.IMUX.17.DELAYGTY_COMMON.DEN_FS
TCELL13:IMUX.IMUX.18.DELAYBUFG_GT1.RSTMASK
TCELL13:IMUX.IMUX.19.DELAYBUFG_GT1.DIV2
TCELL13:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_0_4
TCELL13:IMUX.IMUX.21.DELAYGTY_COMMON.DADDR_FS4
TCELL13:IMUX.IMUX.22.DELAYGTY_COMMON.DI_FS4
TCELL13:IMUX.IMUX.24.DELAYBUFG_GT1.CEMASK
TCELL13:IMUX.IMUX.25.DELAYBUFG_GT1.DIV1
TCELL13:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_0_3
TCELL13:IMUX.IMUX.27.DELAYGTY_COMMON.DADDR_FS3
TCELL13:IMUX.IMUX.28.DELAYGTY_COMMON.DI_FS3
TCELL13:IMUX.IMUX.31.DELAYBUFG_GT1.DIV0
TCELL13:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_0_2
TCELL13:IMUX.IMUX.33.DELAYGTY_COMMON.DADDR_FS2
TCELL13:IMUX.IMUX.34.DELAYGTY_COMMON.DI_FS2
TCELL13:IMUX.IMUX.36.DELAYBUFG_GT0.RSTMASK
TCELL13:IMUX.IMUX.37.DELAYBUFG_GT0.DIV2
TCELL13:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_0_1
TCELL13:IMUX.IMUX.39.DELAYGTY_COMMON.DADDR_FS1
TCELL13:IMUX.IMUX.40.DELAYGTY_COMMON.DI_FS1
TCELL13:IMUX.IMUX.42.DELAYBUFG_GT0.CEMASK
TCELL13:IMUX.IMUX.43.DELAYBUFG_GT0.DIV1
TCELL13:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_0_0
TCELL13:IMUX.IMUX.45.DELAYGTY_COMMON.DADDR_FS0
TCELL13:IMUX.IMUX.46.DELAYGTY_COMMON.DI_FS0
TCELL13:IMUX.IMUX.47.DELAYBUFG_GT0.DIV0
TCELL14:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_0_13
TCELL14:OUT.5.TMINGTY_COMMON.DRPDO_SF13
TCELL14:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_0_9
TCELL14:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF1
TCELL14:OUT.13.TMINGTY_COMMON.DRPDO_SF9
TCELL14:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_5
TCELL14:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_5
TCELL14:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_0_5
TCELL14:OUT.21.TMINGTY_COMMON.DRPDO_SF5
TCELL14:OUT.22.TMINGTY_COMMON.QPLREFLOSS_SF_0
TCELL14:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_1
TCELL14:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_1
TCELL14:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_0_1
TCELL14:OUT.29.TMINGTY_COMMON.DRPDO_SF1
TCELL14:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_0_1
TCELL14:IMUX.CTRL.0GTY_COMMON.QPLRESETB_FS_0
TCELL14:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS1
TCELL14:IMUX.IMUX.0.DELAYBUFG_GT5.RSTMASK
TCELL14:IMUX.IMUX.1.DELAYBUFG_GT5.DIV2
TCELL14:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_0_15
TCELL14:IMUX.IMUX.3.DELAYBUFG_GT_SYNC1.CE_IN
TCELL14:IMUX.IMUX.4.DELAYGTY_COMMON.DI_FS15
TCELL14:IMUX.IMUX.5.DELAYBUFG_GT_SYNC0.CE_IN
TCELL14:IMUX.IMUX.6.DELAYBUFG_GT5.CEMASK
TCELL14:IMUX.IMUX.7.DELAYBUFG_GT5.DIV1
TCELL14:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_0_14
TCELL14:IMUX.IMUX.10.DELAYGTY_COMMON.DI_FS14
TCELL14:IMUX.IMUX.11.DELAYGTY_COMMON.QPLPWRDN_FS_0
TCELL14:IMUX.IMUX.13.DELAYBUFG_GT5.DIV0
TCELL14:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_0_13
TCELL14:IMUX.IMUX.15.DELAYGTY_COMMON.SDMWIDTH_FS_0_0
TCELL14:IMUX.IMUX.16.DELAYGTY_COMMON.DI_FS13
TCELL14:IMUX.IMUX.17.DELAYGTY_COMMON.SDMWIDTH_FS_0_1
TCELL14:IMUX.IMUX.18.DELAYBUFG_GT4.RSTMASK
TCELL14:IMUX.IMUX.19.DELAYBUFG_GT4.DIV2
TCELL14:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_0_12
TCELL14:IMUX.IMUX.22.DELAYGTY_COMMON.DI_FS12
TCELL14:IMUX.IMUX.24.DELAYBUFG_GT4.CEMASK
TCELL14:IMUX.IMUX.25.DELAYBUFG_GT4.DIV1
TCELL14:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_0_11
TCELL14:IMUX.IMUX.28.DELAYGTY_COMMON.DI_FS11
TCELL14:IMUX.IMUX.31.DELAYBUFG_GT4.DIV0
TCELL14:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_0_10
TCELL14:IMUX.IMUX.33.DELAYGTY_COMMON.QPLREFDYN_FS_0_2
TCELL14:IMUX.IMUX.34.DELAYGTY_COMMON.DI_FS10
TCELL14:IMUX.IMUX.35.DELAYGTY_COMMON.DADDR_FS9
TCELL14:IMUX.IMUX.36.DELAYBUFG_GT3.RSTMASK
TCELL14:IMUX.IMUX.37.DELAYBUFG_GT3.DIV2
TCELL14:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_0_9
TCELL14:IMUX.IMUX.39.DELAYGTY_COMMON.QPLREFDYN_FS_0_1
TCELL14:IMUX.IMUX.40.DELAYGTY_COMMON.DI_FS9
TCELL14:IMUX.IMUX.41.DELAYGTY_COMMON.DADDR_FS8
TCELL14:IMUX.IMUX.42.DELAYBUFG_GT3.CEMASK
TCELL14:IMUX.IMUX.43.DELAYBUFG_GT3.DIV1
TCELL14:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_0_8
TCELL14:IMUX.IMUX.45.DELAYGTY_COMMON.QPLREFDYN_FS_0_0
TCELL14:IMUX.IMUX.46.DELAYGTY_COMMON.DI_FS8
TCELL14:IMUX.IMUX.47.DELAYBUFG_GT3.DIV0
TCELL15:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_0_14
TCELL15:OUT.5.TMINGTY_COMMON.DRPDO_SF14
TCELL15:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_0_10
TCELL15:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF2
TCELL15:OUT.13.TMINGTY_COMMON.DRPDO_SF10
TCELL15:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_6
TCELL15:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_6
TCELL15:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_0_6
TCELL15:OUT.21.TMINGTY_COMMON.DRPDO_SF6
TCELL15:OUT.22.TMINGTY_COMMON.MGTREFCLKFA_SF_0
TCELL15:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_2
TCELL15:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_2
TCELL15:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_0_2
TCELL15:OUT.29.TMINGTY_COMMON.DRPDO_SF2
TCELL15:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_0_2
TCELL15:IMUX.CTRL.0GTY_COMMON.SDMRESETB_FS_0
TCELL15:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS2
TCELL15:IMUX.CTRL.4GTY_COMMON.QPLLDMONCLKB_FS_0
TCELL15:IMUX.CTRL.5GTY_COMMON.DCLKB_FS
TCELL15:IMUX.IMUX.0.DELAYBUFG_GT8.RSTMASK
TCELL15:IMUX.IMUX.1.DELAYBUFG_GT8.DIV2
TCELL15:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_0_23
TCELL15:IMUX.IMUX.3.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_7
TCELL15:IMUX.IMUX.4.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_7
TCELL15:IMUX.IMUX.6.DELAYBUFG_GT8.CEMASK
TCELL15:IMUX.IMUX.7.DELAYBUFG_GT8.DIV1
TCELL15:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_0_22
TCELL15:IMUX.IMUX.9.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_6
TCELL15:IMUX.IMUX.10.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_6
TCELL15:IMUX.IMUX.13.DELAYBUFG_GT8.DIV0
TCELL15:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_0_21
TCELL15:IMUX.IMUX.15.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_5
TCELL15:IMUX.IMUX.16.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_5
TCELL15:IMUX.IMUX.18.DELAYBUFG_GT7.RSTMASK
TCELL15:IMUX.IMUX.19.DELAYBUFG_GT7.DIV2
TCELL15:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_0_20
TCELL15:IMUX.IMUX.21.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_4
TCELL15:IMUX.IMUX.22.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_4
TCELL15:IMUX.IMUX.24.DELAYBUFG_GT7.CEMASK
TCELL15:IMUX.IMUX.25.DELAYBUFG_GT7.DIV1
TCELL15:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_0_19
TCELL15:IMUX.IMUX.27.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_3
TCELL15:IMUX.IMUX.28.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_3
TCELL15:IMUX.IMUX.29.DELAYGTY_COMMON.QPLLKDETEN_FS_0
TCELL15:IMUX.IMUX.31.DELAYBUFG_GT7.DIV0
TCELL15:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_0_18
TCELL15:IMUX.IMUX.33.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_2
TCELL15:IMUX.IMUX.34.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_2
TCELL15:IMUX.IMUX.36.DELAYBUFG_GT6.RSTMASK
TCELL15:IMUX.IMUX.37.DELAYBUFG_GT6.DIV2
TCELL15:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_0_17
TCELL15:IMUX.IMUX.39.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_1
TCELL15:IMUX.IMUX.40.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_1
TCELL15:IMUX.IMUX.42.DELAYBUFG_GT6.CEMASK
TCELL15:IMUX.IMUX.43.DELAYBUFG_GT6.DIV1
TCELL15:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_0_16
TCELL15:IMUX.IMUX.45.DELAYGTY_COMMON.QDPMAPINRSVD_FS_0_0
TCELL15:IMUX.IMUX.46.DELAYGTY_COMMON.QDCMRSVDPIN_FS_0_0
TCELL15:IMUX.IMUX.47.DELAYBUFG_GT6.DIV0
TCELL16:OUT.3.TMINGTY_COMMON.QPLFREQLOCK_SF_0
TCELL16:OUT.4.TMINGTY_COMMON.DRDY_SF
TCELL16:OUT.5.TMINGTY_COMMON.DRPDO_SF15
TCELL16:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_0_11
TCELL16:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF3
TCELL16:OUT.13.TMINGTY_COMMON.DRPDO_SF11
TCELL16:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_7
TCELL16:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_7
TCELL16:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_0_7
TCELL16:OUT.21.TMINGTY_COMMON.DRPDO_SF7
TCELL16:OUT.22.TMINGTY_COMMON.QPLFBLOSS_SF_0
TCELL16:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_0_3
TCELL16:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_0_3
TCELL16:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_0_3
TCELL16:OUT.29.TMINGTY_COMMON.DRPDO_SF3
TCELL16:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_0_3
TCELL16:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS3
TCELL16:IMUX.CTRL.4GTY_COMMON.QDCLKPINSPRDB1_FS_0
TCELL16:IMUX.CTRL.5GTY_COMMON.QDCLKPINSPRDB0_FS_0
TCELL16:IMUX.IMUX.0.DELAYBUFG_GT11.RSTMASK
TCELL16:IMUX.IMUX.1.DELAYBUFG_GT11.DIV2
TCELL16:IMUX.IMUX.2.DELAYGTY_COMMON.REFCLKPD_FS_0
TCELL16:IMUX.IMUX.3.DELAYBUFG_GT_SYNC4.CE_IN
TCELL16:IMUX.IMUX.4.DELAYBUFG_GT_SYNC3.CE_IN
TCELL16:IMUX.IMUX.5.DELAYBUFG_GT_SYNC2.CE_IN
TCELL16:IMUX.IMUX.6.DELAYBUFG_GT11.CEMASK
TCELL16:IMUX.IMUX.7.DELAYBUFG_GT11.DIV1
TCELL16:IMUX.IMUX.10.DELAYBUFG_GT_SYNC4.RST_IN
TCELL16:IMUX.IMUX.11.DELAYBUFG_GT_SYNC3.RST_IN
TCELL16:IMUX.IMUX.12.DELAYBUFG_GT_SYNC2.RST_IN
TCELL16:IMUX.IMUX.13.DELAYBUFG_GT11.DIV0
TCELL16:IMUX.IMUX.14.DELAYBUFG_GT_SYNC1.RST_IN
TCELL16:IMUX.IMUX.15.DELAYBUFG_GT_SYNC0.RST_IN
TCELL16:IMUX.IMUX.18.DELAYBUFG_GT10.RSTMASK
TCELL16:IMUX.IMUX.19.DELAYBUFG_GT10.DIV2
TCELL16:IMUX.IMUX.20.DELAYGTY_COMMON.QDPMASCANIN_FS3
TCELL16:IMUX.IMUX.21.DELAYGTY_COMMON.QDPINSPRD_FS_0_4
TCELL16:IMUX.IMUX.24.DELAYBUFG_GT10.CEMASK
TCELL16:IMUX.IMUX.25.DELAYBUFG_GT10.DIV1
TCELL16:IMUX.IMUX.26.DELAYGTY_COMMON.QDPMASCANIN_FS2
TCELL16:IMUX.IMUX.27.DELAYGTY_COMMON.QDPINSPRD_FS_0_3
TCELL16:IMUX.IMUX.31.DELAYBUFG_GT10.DIV0
TCELL16:IMUX.IMUX.32.DELAYGTY_COMMON.QDPMASCANIN_FS1
TCELL16:IMUX.IMUX.33.DELAYGTY_COMMON.QDPINSPRD_FS_0_2
TCELL16:IMUX.IMUX.36.DELAYBUFG_GT9.RSTMASK
TCELL16:IMUX.IMUX.37.DELAYBUFG_GT9.DIV2
TCELL16:IMUX.IMUX.38.DELAYGTY_COMMON.QDPMASCANIN_FS0
TCELL16:IMUX.IMUX.39.DELAYGTY_COMMON.QDPINSPRD_FS_0_1
TCELL16:IMUX.IMUX.42.DELAYBUFG_GT9.CEMASK
TCELL16:IMUX.IMUX.43.DELAYBUFG_GT9.DIV1
TCELL16:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_0_24
TCELL16:IMUX.IMUX.45.DELAYGTY_COMMON.QDPINSPRD_FS_0_0
TCELL16:IMUX.IMUX.47.DELAYBUFG_GT9.DIV0
TCELL17:OUT.0.TMINGTY_CHANNEL1.SCANOUT_SF6
TCELL17:OUT.1.TMINGTY_CHANNEL1.BUFGTRESET_SF0
TCELL17:OUT.2.TMINGTY_CHANNEL1.SCANOUT_SF8
TCELL17:OUT.3.TMINGTY_CHANNEL1.BUFGTDIV_SF0
TCELL17:OUT.4.TMINGTY_CHANNEL1.SCANOUT_SF11
TCELL17:OUT.5.TMINGTY_CHANNEL1.BUFGTDIV_SF3
TCELL17:OUT.6.TMINGTY_CHANNEL1.DFEDOUT_SF5
TCELL17:OUT.7.TMINGTY_CHANNEL1.BUFGTDIV_SF6
TCELL17:OUT.8.TMINGTY_CHANNEL1.SCANOUT_SF14
TCELL17:OUT.9.TMINGTY_CHANNEL1.DMONOUT_SF15
TCELL17:OUT.10.TMINGTY_CHANNEL1.BUFGTRESET_SF2
TCELL17:OUT.11.TMINGTY_CHANNEL1.SCANOUT_SF5
TCELL17:OUT.12.TMINGTY_CHANNEL1.BUFGTCEMASK_SF2
TCELL17:OUT.13.TMINGTY_CHANNEL1.DRPDO_SF15
TCELL17:OUT.14.TMINGTY_CHANNEL1.PMASCANOUT_SF8
TCELL17:OUT.15.TMINGTY_CHANNEL1.DMONOUT_SF10
TCELL17:OUT.16.TMINGTY_CHANNEL1.BUFGTCE_SF0
TCELL17:OUT.17.TMINGTY_CHANNEL1.PMASCANOUT_SF5
TCELL17:OUT.18.TMINGTY_CHANNEL1.BUFGTCEMASK_SF0
TCELL17:OUT.19.TMINGTY_CHANNEL1.DRPDO_SF10
TCELL17:OUT.20.TMINGTY_CHANNEL1.PCIERATEQPLLRESET_SF0
TCELL17:OUT.21.TMINGTY_CHANNEL1.DMONOUT_SF5
TCELL17:OUT.23.TMINGTY_CHANNEL1.SCANOUT_SF0
TCELL17:OUT.24.TMINGTY_CHANNEL1.PCIERATEIDLE_SF
TCELL17:OUT.25.TMINGTY_CHANNEL1.DRPDO_SF5
TCELL17:OUT.26.TMINGTY_CHANNEL1.DFEDOUT_SF0
TCELL17:OUT.27.TMINGTY_CHANNEL1.DMONOUT_SF0
TCELL17:OUT.28.TMINGTY_CHANNEL1.MGTREFCLKFA_SF
TCELL17:OUT.29.TMINGTY_CHANNEL1.PMASCANOUT_SF0
TCELL17:OUT.31.TMINGTY_CHANNEL1.DRPDO_SF0
TCELL17:IMUX.CTRL.4GTY_CHANNEL1.DCLKB_FS
TCELL17:IMUX.CTRL.5GTY_CHANNEL1.DMONCLKB_FS
TCELL17:IMUX.IMUX.0.DELAYGTY_CHANNEL1.DEN_FS
TCELL17:IMUX.IMUX.1.DELAYGTY_CHANNEL1.TSTIN_FS0
TCELL17:IMUX.IMUX.2.DELAYGTY_CHANNEL1.DADDR_FS0
TCELL17:IMUX.IMUX.3.DELAYGTY_CHANNEL1.DWE_FS
TCELL17:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TSTIN_FS2
TCELL17:IMUX.IMUX.5.DELAYGTY_CHANNEL1.DI_FS0
TCELL17:IMUX.IMUX.6.DELAYGTY_CHANNEL1.ISERRDETEN_FS
TCELL17:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TSTIN_FS4
TCELL17:IMUX.IMUX.8.DELAYGTY_CHANNEL1.DADDR_FS1
TCELL17:IMUX.IMUX.9.DELAYGTY_CHANNEL1.ISCANRESET_FS
TCELL17:IMUX.IMUX.10.DELAYGTY_CHANNEL1.TSTIN_FS6
TCELL17:IMUX.IMUX.11.DELAYGTY_CHANNEL1.DI_FS1
TCELL17:IMUX.IMUX.12.DELAYGTY_CHANNEL1.EYESCANTRIGGER_FS
TCELL17:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TSTIN_FS8
TCELL17:IMUX.IMUX.14.DELAYGTY_CHANNEL1.DADDR_FS2
TCELL17:IMUX.IMUX.15.DELAYGTY_CHANNEL1.LPBKTXRXSEREN_FS
TCELL17:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TSTIN_FS10
TCELL17:IMUX.IMUX.17.DELAYGTY_CHANNEL1.DI_FS2
TCELL17:IMUX.IMUX.18.DELAYGTY_CHANNEL1.SCANIN_FS11
TCELL17:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TSTIN_FS12
TCELL17:IMUX.IMUX.20.DELAYGTY_CHANNEL1.DADDR_FS3
TCELL17:IMUX.IMUX.21.DELAYGTY_CHANNEL1.SCANIN_FS9
TCELL17:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TSTIN_FS14
TCELL17:IMUX.IMUX.23.DELAYGTY_CHANNEL1.DI_FS3
TCELL17:IMUX.IMUX.24.DELAYGTY_CHANNEL1.SCANIN_FS7
TCELL17:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TSTIN_FS16
TCELL17:IMUX.IMUX.26.DELAYGTY_CHANNEL1.DADDR_FS4
TCELL17:IMUX.IMUX.27.DELAYGTY_CHANNEL1.SCANIN_FS0
TCELL17:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TSTIN_FS18
TCELL17:IMUX.IMUX.29.DELAYGTY_CHANNEL1.DI_FS4
TCELL17:IMUX.IMUX.30.DELAYGTY_CHANNEL1.SCANIN_FS2
TCELL17:IMUX.IMUX.31.DELAYGTY_CHANNEL1.SCANIN_FS12
TCELL17:IMUX.IMUX.32.DELAYGTY_CHANNEL1.DADDR_FS5
TCELL17:IMUX.IMUX.33.DELAYGTY_CHANNEL1.SCANIN_FS4
TCELL17:IMUX.IMUX.34.DELAYGTY_CHANNEL1.PMASCANIN_FS7
TCELL17:IMUX.IMUX.35.DELAYGTY_CHANNEL1.DI_FS5
TCELL17:IMUX.IMUX.36.DELAYGTY_CHANNEL1.PMASCANIN_FS8
TCELL17:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PMASCANRSTEN_FS
TCELL17:IMUX.IMUX.38.DELAYGTY_CHANNEL1.DADDR_FS6
TCELL17:IMUX.IMUX.39.DELAYGTY_CHANNEL1.PMASCANIN_FS9
TCELL17:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PMASCANMODEB_FS
TCELL17:IMUX.IMUX.41.DELAYGTY_CHANNEL1.DI_FS6
TCELL17:IMUX.IMUX.42.DELAYGTY_CHANNEL1.PMASCANIN_FS10
TCELL17:IMUX.IMUX.43.DELAYGTY_CHANNEL1.RXTERMPROG_FS0
TCELL17:IMUX.IMUX.44.DELAYGTY_CHANNEL1.DADDR_FS7
TCELL17:IMUX.IMUX.45.DELAYGTY_CHANNEL1.PMASCANIN_FS11
TCELL17:IMUX.IMUX.46.DELAYGTY_CHANNEL1.RXTERMPROG_FS1
TCELL17:IMUX.IMUX.47.DELAYGTY_CHANNEL1.DI_FS7
TCELL18:OUT.0.TMINGTY_CHANNEL1.SCANOUT_SF7
TCELL18:OUT.1.TMINGTY_CHANNEL1.BUFGTRESET_SF1
TCELL18:OUT.2.TMINGTY_CHANNEL1.SCANOUT_SF9
TCELL18:OUT.3.TMINGTY_CHANNEL1.BUFGTDIV_SF1
TCELL18:OUT.4.TMINGTY_CHANNEL1.SCANOUT_SF12
TCELL18:OUT.5.TMINGTY_CHANNEL1.BUFGTDIV_SF4
TCELL18:OUT.6.TMINGTY_CHANNEL1.DFEDOUT_SF6
TCELL18:OUT.7.TMINGTY_CHANNEL1.BUFGTDIV_SF7
TCELL18:OUT.8.TMINGTY_CHANNEL1.SCANOUT_SF15
TCELL18:OUT.9.TMINGTY_CHANNEL1.PINRSRVDAS_SF0
TCELL18:OUT.10.TMINGTY_CHANNEL1.BUFGTRSTMASK_SF0
TCELL18:OUT.11.TMINGTY_CHANNEL1.DRDY_SF
TCELL18:OUT.12.TMINGTY_CHANNEL1.BUFGTCE_SF2
TCELL18:OUT.13.TMINGTY_CHANNEL1.DMONOUT_SF16
TCELL18:OUT.14.TMINGTY_CHANNEL1.PMASCANOUT_SF9
TCELL18:OUT.15.TMINGTY_CHANNEL1.DMONOUT_SF11
TCELL18:OUT.16.TMINGTY_CHANNEL1.BUFGTCE_SF1
TCELL18:OUT.17.TMINGTY_CHANNEL1.PMASCANOUT_SF6
TCELL18:OUT.18.TMINGTY_CHANNEL1.BUFGTCEMASK_SF1
TCELL18:OUT.19.TMINGTY_CHANNEL1.DRPDO_SF11
TCELL18:OUT.20.TMINGTY_CHANNEL1.PCIERATEQPLLRESET_SF1
TCELL18:OUT.21.TMINGTY_CHANNEL1.DMONOUT_SF6
TCELL18:OUT.23.TMINGTY_CHANNEL1.SCANOUT_SF1
TCELL18:OUT.24.TMINGTY_CHANNEL1.PCIERATEGEN3_SF
TCELL18:OUT.25.TMINGTY_CHANNEL1.DRPDO_SF6
TCELL18:OUT.26.TMINGTY_CHANNEL1.DFEDOUT_SF1
TCELL18:OUT.27.TMINGTY_CHANNEL1.DMONOUT_SF1
TCELL18:OUT.28.TMINGTY_CHANNEL1.EYESCANDATAERROR_SF
TCELL18:OUT.29.TMINGTY_CHANNEL1.PMASCANOUT_SF1
TCELL18:OUT.30.TMINGTY_CHANNEL1.PINRSRVDAS_SF4
TCELL18:OUT.31.TMINGTY_CHANNEL1.DRPDO_SF1
TCELL18:IMUX.CTRL.5GTY_CHANNEL1.COREREFCLKB_FS
TCELL18:IMUX.IMUX.0.DELAYGTY_CHANNEL1.DMONFIFORESET_FS
TCELL18:IMUX.IMUX.1.DELAYGTY_CHANNEL1.TSTIN_FS1
TCELL18:IMUX.IMUX.2.DELAYGTY_CHANNEL1.DADDR_FS8
TCELL18:IMUX.IMUX.3.DELAYGTY_CHANNEL1.TSTPWRDN_FS0
TCELL18:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TSTIN_FS3
TCELL18:IMUX.IMUX.5.DELAYGTY_CHANNEL1.DI_FS8
TCELL18:IMUX.IMUX.6.DELAYGTY_CHANNEL1.TSTPWRDN_FS1
TCELL18:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TSTIN_FS5
TCELL18:IMUX.IMUX.8.DELAYGTY_CHANNEL1.DADDR_FS9
TCELL18:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TSTPWRDN_FS2
TCELL18:IMUX.IMUX.10.DELAYGTY_CHANNEL1.TSTIN_FS7
TCELL18:IMUX.IMUX.11.DELAYGTY_CHANNEL1.DI_FS9
TCELL18:IMUX.IMUX.12.DELAYGTY_CHANNEL1.TSTPWRDN_FS3
TCELL18:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TSTIN_FS9
TCELL18:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TSTPWRDN_FS4
TCELL18:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TSTIN_FS11
TCELL18:IMUX.IMUX.17.DELAYGTY_CHANNEL1.DI_FS10
TCELL18:IMUX.IMUX.18.DELAYGTY_CHANNEL1.SCANIN_FS10
TCELL18:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TSTIN_FS13
TCELL18:IMUX.IMUX.20.DELAYGTY_CHANNEL1.GTRSTSEL_FS
TCELL18:IMUX.IMUX.21.DELAYGTY_CHANNEL1.SCANIN_FS8
TCELL18:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TSTIN_FS15
TCELL18:IMUX.IMUX.23.DELAYGTY_CHANNEL1.DI_FS11
TCELL18:IMUX.IMUX.24.DELAYGTY_CHANNEL1.SCANIN_FS6
TCELL18:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TSTIN_FS17
TCELL18:IMUX.IMUX.26.DELAYGTY_CHANNEL1.LPBKRXTXSEREN_FS
TCELL18:IMUX.IMUX.27.DELAYGTY_CHANNEL1.SCANIN_FS1
TCELL18:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TSTIN_FS19
TCELL18:IMUX.IMUX.29.DELAYGTY_CHANNEL1.DI_FS12
TCELL18:IMUX.IMUX.30.DELAYGTY_CHANNEL1.SCANIN_FS3
TCELL18:IMUX.IMUX.31.DELAYGTY_CHANNEL1.EVODDPHIXWREN_FS
TCELL18:IMUX.IMUX.32.DELAYGTY_CHANNEL1.SCANMODEB_FS
TCELL18:IMUX.IMUX.33.DELAYGTY_CHANNEL1.SCANIN_FS5
TCELL18:IMUX.IMUX.34.DELAYGTY_CHANNEL1.EVODDPHIXRDEN_FS
TCELL18:IMUX.IMUX.35.DELAYGTY_CHANNEL1.DI_FS13
TCELL18:IMUX.IMUX.36.DELAYGTY_CHANNEL1.EVODDPHIDWREN_FS
TCELL18:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PMASCANENB_FS
TCELL18:IMUX.IMUX.38.DELAYGTY_CHANNEL1.SCANENB_FS
TCELL18:IMUX.IMUX.39.DELAYGTY_CHANNEL1.EVODDPHIDRDEN_FS
TCELL18:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PMASCANIN_FS0
TCELL18:IMUX.IMUX.41.DELAYGTY_CHANNEL1.DI_FS14
TCELL18:IMUX.IMUX.42.DELAYGTY_CHANNEL1.EVODDPHICALDONE_FS
TCELL18:IMUX.IMUX.43.DELAYGTY_CHANNEL1.RXTERMPROG_FS2
TCELL18:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TSTPWRDNOVRDB_FS
TCELL18:IMUX.IMUX.45.DELAYGTY_CHANNEL1.EVODDPHICALSTART_FS
TCELL18:IMUX.IMUX.46.DELAYGTY_CHANNEL1.RXTERMPROG_FS3
TCELL18:IMUX.IMUX.47.DELAYGTY_CHANNEL1.DI_FS15
TCELL19:OUT.0.TMINGTY_CHANNEL1.TXBUFSTATUS_SF0
TCELL19:OUT.1.TMINGTY_CHANNEL1.CPLFREQLOCK_SF
TCELL19:OUT.2.TMINGTY_CHANNEL1.SCANOUT_SF10
TCELL19:OUT.3.TMINGTY_CHANNEL1.BUFGTDIV_SF2
TCELL19:OUT.4.TMINGTY_CHANNEL1.SCANOUT_SF13
TCELL19:OUT.5.TMINGTY_CHANNEL1.BUFGTDIV_SF5
TCELL19:OUT.6.TMINGTY_CHANNEL1.TXOUTCLK_SF
TCELL19:OUT.7.TMINGTY_CHANNEL1.BUFGTDIV_SF8
TCELL19:OUT.8.TMINGTY_CHANNEL1.CPLREFLOSS_SF
TCELL19:OUT.9.TMINGTY_CHANNEL1.PINRSRVDAS_SF1
TCELL19:OUT.10.TMINGTY_CHANNEL1.SCANOUT_SF16
TCELL19:OUT.11.TMINGTY_CHANNEL1.TXOUTCLKPCS_SF
TCELL19:OUT.12.TMINGTY_CHANNEL1.RXPHALIGNERR_SF
TCELL19:OUT.13.TMINGTY_CHANNEL1.TXBUFSTATUS_SF1
TCELL19:OUT.14.TMINGTY_CHANNEL1.PMASCANOUT_SF10
TCELL19:OUT.15.TMINGTY_CHANNEL1.DMONOUT_SF12
TCELL19:OUT.16.TMINGTY_CHANNEL1.PMASCANOUT_SF7
TCELL19:OUT.17.TMINGTY_CHANNEL1.PCIESYNCTXSYNCDONE_SF
TCELL19:OUT.18.TMINGTY_CHANNEL1.CPLFBLOSS_SF
TCELL19:OUT.19.TMINGTY_CHANNEL1.DRPDO_SF12
TCELL19:OUT.20.TMINGTY_CHANNEL1.TCOINITDONE_SF
TCELL19:OUT.21.TMINGTY_CHANNEL1.DMONOUT_SF7
TCELL19:OUT.23.TMINGTY_CHANNEL1.SCANOUT_SF2
TCELL19:OUT.24.TMINGTY_CHANNEL1.TXPMARESETDONE_SF
TCELL19:OUT.25.TMINGTY_CHANNEL1.DRPDO_SF7
TCELL19:OUT.26.TMINGTY_CHANNEL1.DFEDOUT_SF2
TCELL19:OUT.27.TMINGTY_CHANNEL1.DMONOUT_SF2
TCELL19:OUT.28.TMINGTY_CHANNEL1.TXCOPIPHDONE_SF
TCELL19:OUT.29.TMINGTY_CHANNEL1.PMASCANOUT_SF2
TCELL19:OUT.30.TMINGTY_CHANNEL1.PINRSRVDAS_SF5
TCELL19:OUT.31.TMINGTY_CHANNEL1.DRPDO_SF2
TCELL19:IMUX.CTRL.0GTY_CHANNEL1.CFGRESETB_FS
TCELL19:IMUX.CTRL.5GTY_CHANNEL1.PMASCANCLK4B_FS
TCELL19:IMUX.CTRL.6GTY_CHANNEL1.PMASCANCLK5B_FS
TCELL19:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS0
TCELL19:IMUX.IMUX.1.DELAYGTY_CHANNEL1.SCANIN_FS13
TCELL19:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS64
TCELL19:IMUX.IMUX.3.DELAYGTY_CHANNEL1.LOOPBACK_FS0
TCELL19:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TXUSRRDY_FS
TCELL19:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS0
TCELL19:IMUX.IMUX.6.DELAYGTY_CHANNEL1.LOOPBACK_FS1
TCELL19:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TXRATEASYNCH_FS
TCELL19:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS65
TCELL19:IMUX.IMUX.9.DELAYGTY_CHANNEL1.LOOPBACK_FS2
TCELL19:IMUX.IMUX.10.DELAYGTY_CHANNEL1.TXDCCSRESET_FS
TCELL19:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS1
TCELL19:IMUX.IMUX.12.DELAYGTY_CHANNEL1.CPLPWRDN_FS
TCELL19:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TXEMPPRE_FS0
TCELL19:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS66
TCELL19:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS0
TCELL19:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TXEMPINVPR_FS
TCELL19:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS2
TCELL19:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS0
TCELL19:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TXPRBSINERR_FS
TCELL19:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS67
TCELL19:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS0
TCELL19:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TXEMPINVPO_FS
TCELL19:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS3
TCELL19:IMUX.IMUX.24.DELAYGTY_CHANNEL1.TXEMPPOS_FS0
TCELL19:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TXPOLARITY_FS
TCELL19:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS68
TCELL19:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXSERPWRDN_FS
TCELL19:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TXPWRDN_FS0
TCELL19:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS4
TCELL19:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS0
TCELL19:IMUX.IMUX.31.DELAYGTY_CHANNEL1.TXHEADER_FS1
TCELL19:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS69
TCELL19:IMUX.IMUX.33.DELAYGTY_CHANNEL1.STEPSIZEPPM_FS0
TCELL19:IMUX.IMUX.34.DELAYGTY_CHANNEL1.TXHEADER_FS0
TCELL19:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS5
TCELL19:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS8
TCELL19:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PMASCANIN_FS1
TCELL19:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS70
TCELL19:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS8
TCELL19:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PMASCANIN_FS2
TCELL19:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS6
TCELL19:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS0
TCELL19:IMUX.IMUX.43.DELAYGTY_CHANNEL1.RXTERMPROG_FS4
TCELL19:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS71
TCELL19:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS0
TCELL19:IMUX.IMUX.46.DELAYGTY_CHANNEL1.RXSIGVALDLY_FS0
TCELL19:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS7
TCELL20:OUT.0.TMINGTY_CHANNEL1.CFOKFORCEDONE_SF
TCELL20:OUT.2.TMINGTY_CHANNEL1.TXSYNCEN2SLV_SF
TCELL20:OUT.3.TMINGTY_CHANNEL1.PCIEUSERPHYSTATUSRST_SF
TCELL20:OUT.4.TMINGTY_CHANNEL1.TXRATEDONE_SF
TCELL20:OUT.5.TMINGTY_CHANNEL1.PCIEUSERGEN3RDY_SF
TCELL20:OUT.6.TMINGTY_CHANNEL1.CFOKDONE_SF
TCELL20:OUT.8.TMINGTY_CHANNEL1.TDASOFTRSTDONE_SF
TCELL20:OUT.9.TMINGTY_CHANNEL1.PINRSRVDAS_SF2
TCELL20:OUT.10.TMINGTY_CHANNEL1.SCANOUT_SF17
TCELL20:OUT.11.TMINGTY_CHANNEL1.TXLINKSYNCDONE_SF
TCELL20:OUT.12.TMINGTY_CHANNEL1.SCANOUT_SF18
TCELL20:OUT.13.TMINGTY_CHANNEL1.TXRESETDONE_SF
TCELL20:OUT.14.TMINGTY_CHANNEL1.PMASCANOUT_SF11
TCELL20:OUT.15.TMINGTY_CHANNEL1.DMONOUT_SF13
TCELL20:OUT.17.TMINGTY_CHANNEL1.CKOKDONE_SF
TCELL20:OUT.18.TMINGTY_CHANNEL1.TXDCCDONE_SF
TCELL20:OUT.19.TMINGTY_CHANNEL1.DRPDO_SF13
TCELL20:OUT.20.TMINGTY_CHANNEL1.RXCDRPHDONE_SF
TCELL20:OUT.21.TMINGTY_CHANNEL1.DMONOUT_SF8
TCELL20:OUT.23.TMINGTY_CHANNEL1.SCANOUT_SF3
TCELL20:OUT.24.TMINGTY_CHANNEL1.RATE_DRP_START_SF
TCELL20:OUT.25.TMINGTY_CHANNEL1.DRPDO_SF8
TCELL20:OUT.26.TMINGTY_CHANNEL1.DFEDOUT_SF3
TCELL20:OUT.27.TMINGTY_CHANNEL1.DMONOUT_SF3
TCELL20:OUT.29.TMINGTY_CHANNEL1.PMASCANOUT_SF3
TCELL20:OUT.30.TMINGTY_CHANNEL1.PINRSRVDAS_SF6
TCELL20:OUT.31.TMINGTY_CHANNEL1.DRPDO_SF3
TCELL20:IMUX.CTRL.0GTY_CHANNEL1.CPLRESETB_FS
TCELL20:IMUX.CTRL.5GTY_CHANNEL1.CPLLDMONCLKB_FS
TCELL20:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS1
TCELL20:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS72
TCELL20:IMUX.IMUX.3.DELAYGTY_CHANNEL1.CPLREFSELDYN_FS2
TCELL20:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TXSLVSYNCEN_FS
TCELL20:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS8
TCELL20:IMUX.IMUX.6.DELAYGTY_CHANNEL1.CPLREFSELDYN_FS1
TCELL20:IMUX.IMUX.7.DELAYGTY_CHANNEL1.RSTCLKENTX_FS
TCELL20:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS73
TCELL20:IMUX.IMUX.9.DELAYGTY_CHANNEL1.CPLREFSELDYN_FS0
TCELL20:IMUX.IMUX.10.DELAYGTY_CHANNEL1.TXPPMSEL_FS
TCELL20:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS9
TCELL20:IMUX.IMUX.12.DELAYGTY_CHANNEL1.CPLLKDETEN_FS
TCELL20:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TXEMPPRE_FS1
TCELL20:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS74
TCELL20:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS1
TCELL20:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TXPIPPMPWDN_FS
TCELL20:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS10
TCELL20:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS1
TCELL20:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TXPPMOVRDEN_FS
TCELL20:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS75
TCELL20:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS1
TCELL20:IMUX.IMUX.22.DELAYGTY_CHANNEL1.ENPPM_FS
TCELL20:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS11
TCELL20:IMUX.IMUX.24.DELAYGTY_CHANNEL1.TXEMPPOS_FS1
TCELL20:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TCOPIOVREN_FS
TCELL20:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS76
TCELL20:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXSYSCKSEL_FS0
TCELL20:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TXPWRDN_FS1
TCELL20:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS12
TCELL20:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS1
TCELL20:IMUX.IMUX.31.DELAYGTY_CHANNEL1.TXHEADER_FS3
TCELL20:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS77
TCELL20:IMUX.IMUX.33.DELAYGTY_CHANNEL1.STEPSIZEPPM_FS1
TCELL20:IMUX.IMUX.34.DELAYGTY_CHANNEL1.TXHEADER_FS2
TCELL20:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS13
TCELL20:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS9
TCELL20:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PMASCANIN_FS3
TCELL20:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS78
TCELL20:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS9
TCELL20:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PMASCANIN_FS4
TCELL20:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS14
TCELL20:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS1
TCELL20:IMUX.IMUX.43.DELAYGTY_CHANNEL1.RXSIGVALDLY_FS1
TCELL20:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS79
TCELL20:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS1
TCELL20:IMUX.IMUX.46.DELAYGTY_CHANNEL1.RXSIGVALDLY_FS2
TCELL20:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS15
TCELL21:OUT.0.TMINGTY_CHANNEL1.CFOKFSTARTED_SF
TCELL21:OUT.2.TMINGTY_CHANNEL1.RXPMARESETDONE_SF
TCELL21:OUT.3.TMINGTY_CHANNEL1.RXSLIPPMARDY_SF
TCELL21:OUT.4.TMINGTY_CHANNEL1.RXSYNCEN2SLV_SF
TCELL21:OUT.5.TMINGTY_CHANNEL1.RXSLIPOUTCLKRDY_SF
TCELL21:OUT.6.TMINGTY_CHANNEL1.CFOKSTART_SF
TCELL21:OUT.8.TMINGTY_CHANNEL1.RXCOPHDONE_SF
TCELL21:OUT.9.TMINGTY_CHANNEL1.PINRSRVDAS_SF3
TCELL21:OUT.10.TMINGTY_CHANNEL1.RXSLIPDONE_SF
TCELL21:OUT.11.TMINGTY_CHANNEL1.BUFGTRSTMASK_SF1
TCELL21:OUT.12.TMINGTY_CHANNEL1.RXSLIDERDY_SF
TCELL21:OUT.13.TMINGTY_CHANNEL1.RXLINKSYNCDONE_SF
TCELL21:OUT.14.TMINGTY_CHANNEL1.BUFGTRSTMASK_SF2
TCELL21:OUT.15.TMINGTY_CHANNEL1.DMONOUT_SF14
TCELL21:OUT.17.TMINGTY_CHANNEL1.TXPRGDIVRSTDONE_SF
TCELL21:OUT.18.TMINGTY_CHANNEL1.RESET_EXCEPTION_SF
TCELL21:OUT.19.TMINGTY_CHANNEL1.DRPDO_SF14
TCELL21:OUT.20.TMINGTY_CHANNEL1.RXPRGDIVRSTDONE_SF
TCELL21:OUT.21.TMINGTY_CHANNEL1.DMONOUT_SF9
TCELL21:OUT.22.TMINGTY_CHANNEL1.GTPOWERGOOD_SF
TCELL21:OUT.23.TMINGTY_CHANNEL1.SCANOUT_SF4
TCELL21:OUT.25.TMINGTY_CHANNEL1.DRPDO_SF9
TCELL21:OUT.26.TMINGTY_CHANNEL1.DFEDOUT_SF4
TCELL21:OUT.27.TMINGTY_CHANNEL1.DMONOUT_SF4
TCELL21:OUT.29.TMINGTY_CHANNEL1.PMASCANOUT_SF4
TCELL21:OUT.30.TMINGTY_CHANNEL1.PINRSRVDAS_SF7
TCELL21:OUT.31.TMINGTY_CHANNEL1.DRPDO_SF4
TCELL21:IMUX.CTRL.0GTY_CHANNEL1.GTTXRSTB_FS
TCELL21:IMUX.CTRL.4GTY_CHANNEL1.PMASCANCLK3B_FS
TCELL21:IMUX.CTRL.5GTY_CHANNEL1.PMASCANCLK2B_FS
TCELL21:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS2
TCELL21:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS80
TCELL21:IMUX.IMUX.3.DELAYGTY_CHANNEL1.TXOUTCKCTL_FS0
TCELL21:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TXMSTRSETPHDONE_FS
TCELL21:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS16
TCELL21:IMUX.IMUX.6.DELAYGTY_CHANNEL1.TXPREAMP_FS0
TCELL21:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TXDEEMPH_FS
TCELL21:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS81
TCELL21:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TXCOMWAKE_FS
TCELL21:IMUX.IMUX.10.DELAYGTY_CHANNEL1.TXCOMSAS_FS
TCELL21:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS17
TCELL21:IMUX.IMUX.12.DELAYGTY_CHANNEL1.TXDRVAMP_FS0
TCELL21:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TXEMPPRE_FS2
TCELL21:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS82
TCELL21:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS2
TCELL21:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TXCOMINIT_FS
TCELL21:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS18
TCELL21:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS2
TCELL21:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TXENC8B10BUSE_FS
TCELL21:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS83
TCELL21:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS2
TCELL21:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TXRATE_FS0
TCELL21:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS19
TCELL21:IMUX.IMUX.24.DELAYGTY_CHANNEL1.TXEMPPOS_FS2
TCELL21:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TXPRBSPTN_FS0
TCELL21:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS84
TCELL21:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXSYSCKSEL_FS1
TCELL21:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TXMARGIN_FS0
TCELL21:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS20
TCELL21:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS2
TCELL21:IMUX.IMUX.31.DELAYGTY_CHANNEL1.TXHEADER_FS5
TCELL21:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS85
TCELL21:IMUX.IMUX.33.DELAYGTY_CHANNEL1.STEPSIZEPPM_FS2
TCELL21:IMUX.IMUX.34.DELAYGTY_CHANNEL1.TXHEADER_FS4
TCELL21:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS21
TCELL21:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS10
TCELL21:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PMASCANIN_FS5
TCELL21:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS86
TCELL21:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS10
TCELL21:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PMASCANIN_FS6
TCELL21:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS22
TCELL21:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS2
TCELL21:IMUX.IMUX.43.DELAYGTY_CHANNEL1.RXSIGVALDLY_FS3
TCELL21:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS87
TCELL21:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS2
TCELL21:IMUX.IMUX.46.DELAYGTY_CHANNEL1.RXSIGVALDLY_FS4
TCELL21:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS23
TCELL22:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF64
TCELL22:OUT.2.TMINGTY_CHANNEL1.RXELECIDLE_SF
TCELL22:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF0
TCELL22:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF0
TCELL22:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF65
TCELL22:OUT.6.TMINGTY_CHANNEL1.RDASOFTRSTDONE_SF
TCELL22:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF1
TCELL22:OUT.8.TMINGTY_CHANNEL1.RXPRBSLOCKED_SF
TCELL22:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF66
TCELL22:OUT.10.TMINGTY_CHANNEL1.PCIERATEQPLLPD_SF0
TCELL22:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF2
TCELL22:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF0
TCELL22:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF67
TCELL22:OUT.14.TMINGTY_CHANNEL1.RXCHBONDO_SF0
TCELL22:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF3
TCELL22:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF0
TCELL22:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF68
TCELL22:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF0
TCELL22:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF4
TCELL22:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF8
TCELL22:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF69
TCELL22:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF0
TCELL22:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF5
TCELL22:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF8
TCELL22:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF70
TCELL22:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF0
TCELL22:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF6
TCELL22:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF8
TCELL22:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF71
TCELL22:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF0
TCELL22:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF7
TCELL22:IMUX.CTRL.0GTY_CHANNEL1.TXPROGDIVRESETB_FS
TCELL22:IMUX.CTRL.4GTY_CHANNEL1.TXUSRCLK2B_FS
TCELL22:IMUX.CTRL.5GTY_CHANNEL1.TXUSRCLKB_FS
TCELL22:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS3
TCELL22:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS88
TCELL22:IMUX.IMUX.3.DELAYGTY_CHANNEL1.TXOUTCKCTL_FS1
TCELL22:IMUX.IMUX.4.DELAYGTY_CHANNEL1.PCIERSTTXSYNCSTART_FS
TCELL22:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS24
TCELL22:IMUX.IMUX.6.DELAYGTY_CHANNEL1.TXPREAMP_FS1
TCELL22:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TXCODAALGNEN_FS
TCELL22:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS89
TCELL22:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TCODABYPASS_FS
TCELL22:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS25
TCELL22:IMUX.IMUX.12.DELAYGTY_CHANNEL1.TXDRVAMP_FS1
TCELL22:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TXEMPPRE_FS3
TCELL22:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS90
TCELL22:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS3
TCELL22:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TXDRVPWRDN_FS
TCELL22:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS26
TCELL22:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS3
TCELL22:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TXDETECTRX_FS
TCELL22:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS91
TCELL22:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS3
TCELL22:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TXRATE_FS1
TCELL22:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS27
TCELL22:IMUX.IMUX.24.DELAYGTY_CHANNEL1.TXEMPPOS_FS3
TCELL22:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TXPRBSPTN_FS1
TCELL22:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS92
TCELL22:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXPLLCKSEL_FS0
TCELL22:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TXMARGIN_FS1
TCELL22:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS28
TCELL22:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS3
TCELL22:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS93
TCELL22:IMUX.IMUX.33.DELAYGTY_CHANNEL1.STEPSIZEPPM_FS3
TCELL22:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS29
TCELL22:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS11
TCELL22:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS0
TCELL22:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS94
TCELL22:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS11
TCELL22:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS1
TCELL22:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS30
TCELL22:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS3
TCELL22:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS0
TCELL22:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS95
TCELL22:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS3
TCELL22:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS1
TCELL22:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS31
TCELL23:OUT.0.TMINGTY_CHANNEL1.COMFINISH_SF
TCELL23:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF72
TCELL23:OUT.2.TMINGTY_CHANNEL1.RXBYTEREALIGN_SF
TCELL23:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF8
TCELL23:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF1
TCELL23:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF73
TCELL23:OUT.6.TMINGTY_CHANNEL1.CDRLOCK_SF
TCELL23:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF9
TCELL23:OUT.8.TMINGTY_CHANNEL1.RXRECCLK_SF
TCELL23:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF74
TCELL23:OUT.10.TMINGTY_CHANNEL1.PCIERATEQPLLPD_SF1
TCELL23:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF10
TCELL23:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF1
TCELL23:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF75
TCELL23:OUT.14.TMINGTY_CHANNEL1.RXCHBONDO_SF1
TCELL23:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF11
TCELL23:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF1
TCELL23:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF76
TCELL23:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF1
TCELL23:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF12
TCELL23:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF9
TCELL23:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF77
TCELL23:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF1
TCELL23:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF13
TCELL23:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF9
TCELL23:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF78
TCELL23:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF1
TCELL23:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF14
TCELL23:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF9
TCELL23:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF79
TCELL23:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF1
TCELL23:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF15
TCELL23:IMUX.CTRL.0GTY_CHANNEL1.TXPMARESETB_FS
TCELL23:IMUX.CTRL.4GTY_CHANNEL1.TXLATCLKB_FS
TCELL23:IMUX.CTRL.5GTY_CHANNEL1.TCOCLKFSMFROUTB_FS
TCELL23:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS4
TCELL23:IMUX.IMUX.1.DELAYGTY_CHANNEL1.TXPRBSPTN_FS3
TCELL23:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS96
TCELL23:IMUX.IMUX.3.DELAYGTY_CHANNEL1.TXOUTCKCTL_FS2
TCELL23:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TX_EL_FORCE_START_FS
TCELL23:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS32
TCELL23:IMUX.IMUX.6.DELAYGTY_CHANNEL1.TXPREAMP_FS2
TCELL23:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS97
TCELL23:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TDASOFTRESET_FS
TCELL23:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS33
TCELL23:IMUX.IMUX.12.DELAYGTY_CHANNEL1.TXDRVAMP_FS2
TCELL23:IMUX.IMUX.13.DELAYGTY_CHANNEL1.TXEMPPRE_FS4
TCELL23:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS98
TCELL23:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS4
TCELL23:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TCODAOVREN_FS
TCELL23:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS34
TCELL23:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS4
TCELL23:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TCOHOLDFROUT_FS
TCELL23:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS99
TCELL23:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS4
TCELL23:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TXRATE_FS2
TCELL23:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS35
TCELL23:IMUX.IMUX.24.DELAYGTY_CHANNEL1.TXEMPPOS_FS4
TCELL23:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TXPRBSPTN_FS2
TCELL23:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS100
TCELL23:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXPLLCKSEL_FS1
TCELL23:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TXMARGIN_FS2
TCELL23:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS36
TCELL23:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS4
TCELL23:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS101
TCELL23:IMUX.IMUX.33.DELAYGTY_CHANNEL1.STEPSIZEPPM_FS4
TCELL23:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS37
TCELL23:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS12
TCELL23:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS2
TCELL23:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS102
TCELL23:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS12
TCELL23:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS3
TCELL23:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS38
TCELL23:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS4
TCELL23:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS2
TCELL23:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS103
TCELL23:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS4
TCELL23:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS3
TCELL23:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS39
TCELL24:OUT.0.TMINGTY_CHANNEL1.PHYSTATUS_SF
TCELL24:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF80
TCELL24:OUT.2.TMINGTY_CHANNEL1.RXBYTEISALIGNED_SF
TCELL24:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF16
TCELL24:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF2
TCELL24:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF81
TCELL24:OUT.6.TMINGTY_CHANNEL1.RXBUFSTATUS_SF0
TCELL24:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF17
TCELL24:OUT.8.TMINGTY_CHANNEL1.RXRECCLKPCS_SF
TCELL24:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF82
TCELL24:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF18
TCELL24:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF2
TCELL24:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF83
TCELL24:OUT.14.TMINGTY_CHANNEL1.RXCHBONDO_SF2
TCELL24:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF19
TCELL24:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF2
TCELL24:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF84
TCELL24:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF2
TCELL24:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF20
TCELL24:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF10
TCELL24:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF85
TCELL24:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF2
TCELL24:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF21
TCELL24:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF10
TCELL24:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF86
TCELL24:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF2
TCELL24:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF22
TCELL24:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF10
TCELL24:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF87
TCELL24:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF2
TCELL24:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF23
TCELL24:IMUX.CTRL.0GTY_CHANNEL1.DFERESETB_FS
TCELL24:IMUX.CTRL.5GTY_CHANNEL1.SCANCLKB_FS
TCELL24:IMUX.CTRL.7GTY_CHANNEL1.RXOOBRESETB_FS
TCELL24:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS5
TCELL24:IMUX.IMUX.1.DELAYGTY_CHANNEL1.RESETOVRD_FS
TCELL24:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS104
TCELL24:IMUX.IMUX.3.DELAYGTY_CHANNEL1.TXDRVAMP_FS4
TCELL24:IMUX.IMUX.4.DELAYGTY_CHANNEL1.TXDCCSTART_FS
TCELL24:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS40
TCELL24:IMUX.IMUX.7.DELAYGTY_CHANNEL1.TCODARESET_FS
TCELL24:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS105
TCELL24:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TCODAPWDN_FS
TCELL24:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS41
TCELL24:IMUX.IMUX.12.DELAYGTY_CHANNEL1.TXDRVAMP_FS3
TCELL24:IMUX.IMUX.13.DELAYGTY_CHANNEL1.RATE_DRP_DONE_EXT_FS
TCELL24:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS106
TCELL24:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS5
TCELL24:IMUX.IMUX.16.DELAYGTY_CHANNEL1.TXCOPIALGNEN_FS
TCELL24:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS42
TCELL24:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS5
TCELL24:IMUX.IMUX.19.DELAYGTY_CHANNEL1.TXCOPISETPHS_FS
TCELL24:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS107
TCELL24:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS5
TCELL24:IMUX.IMUX.22.DELAYGTY_CHANNEL1.TXPDOWNASYNCH_FS
TCELL24:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS43
TCELL24:IMUX.IMUX.25.DELAYGTY_CHANNEL1.TXINHIBIT_FS
TCELL24:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS108
TCELL24:IMUX.IMUX.27.DELAYGTY_CHANNEL1.TXELECIDLE_FS
TCELL24:IMUX.IMUX.28.DELAYGTY_CHANNEL1.TCOUPDNFROUT_FS
TCELL24:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS44
TCELL24:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS5
TCELL24:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS109
TCELL24:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXENCHANSYNC_FS
TCELL24:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS45
TCELL24:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS13
TCELL24:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS4
TCELL24:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS110
TCELL24:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS13
TCELL24:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS5
TCELL24:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS46
TCELL24:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS5
TCELL24:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS4
TCELL24:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS111
TCELL24:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS5
TCELL24:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS5
TCELL24:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS47
TCELL25:OUT.0.TMINGTY_CHANNEL1.COMINITDET_SF
TCELL25:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF88
TCELL25:OUT.2.TMINGTY_CHANNEL1.RXCKCORCNT_SF0
TCELL25:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF24
TCELL25:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF3
TCELL25:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF89
TCELL25:OUT.6.TMINGTY_CHANNEL1.RXBUFSTATUS_SF1
TCELL25:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF25
TCELL25:OUT.8.TMINGTY_CHANNEL1.RXDATAVALID_SF0
TCELL25:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF90
TCELL25:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF26
TCELL25:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF3
TCELL25:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF91
TCELL25:OUT.14.TMINGTY_CHANNEL1.RXCHBONDO_SF3
TCELL25:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF27
TCELL25:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF3
TCELL25:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF92
TCELL25:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF3
TCELL25:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF28
TCELL25:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF11
TCELL25:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF93
TCELL25:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF3
TCELL25:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF29
TCELL25:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF11
TCELL25:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF94
TCELL25:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF3
TCELL25:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF30
TCELL25:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF11
TCELL25:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF95
TCELL25:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF3
TCELL25:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF31
TCELL25:IMUX.CTRL.0GTY_CHANNEL1.CDRFRRESETB_FS
TCELL25:IMUX.CTRL.4GTY_CHANNEL1.TSTCLK1B_FS
TCELL25:IMUX.CTRL.5GTY_CHANNEL1.TSTCLK0B_FS
TCELL25:IMUX.CTRL.7GTY_CHANNEL1.RXPMARESETB_FS
TCELL25:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS6
TCELL25:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS112
TCELL25:IMUX.IMUX.3.DELAYGTY_CHANNEL1.GATERXELECIDLE_FS0
TCELL25:IMUX.IMUX.4.DELAYGTY_CHANNEL1.RXSYSCKSEL_FS1
TCELL25:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS48
TCELL25:IMUX.IMUX.6.DELAYGTY_CHANNEL1.TXSYNCFSMMASTER_FS
TCELL25:IMUX.IMUX.7.DELAYGTY_CHANNEL1.GATERXELECIDLE_FS1
TCELL25:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS113
TCELL25:IMUX.IMUX.9.DELAYGTY_CHANNEL1.TXRESET_FS
TCELL25:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS49
TCELL25:IMUX.IMUX.12.DELAYGTY_CHANNEL1.PRBSCNTRST_FS
TCELL25:IMUX.IMUX.13.DELAYGTY_CHANNEL1.RXPOLARITY_FS
TCELL25:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS114
TCELL25:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS6
TCELL25:IMUX.IMUX.16.DELAYGTY_CHANNEL1.RCOOVREN_FS
TCELL25:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS50
TCELL25:IMUX.IMUX.18.DELAYGTY_CHANNEL1.TXEMPMAIN_FS6
TCELL25:IMUX.IMUX.19.DELAYGTY_CHANNEL1.RCODAPWDN_FS
TCELL25:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS115
TCELL25:IMUX.IMUX.21.DELAYGTY_CHANNEL1.TXSEQUENCE_FS6
TCELL25:IMUX.IMUX.22.DELAYGTY_CHANNEL1.RXCOALGNEN_FS
TCELL25:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS51
TCELL25:IMUX.IMUX.24.DELAYGTY_CHANNEL1.RXCOSETPHS_FS
TCELL25:IMUX.IMUX.25.DELAYGTY_CHANNEL1.RXENPCOMMAALIGN_FS
TCELL25:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS116
TCELL25:IMUX.IMUX.28.DELAYGTY_CHANNEL1.RXOUTCKCTL_FS0
TCELL25:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS52
TCELL25:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS6
TCELL25:IMUX.IMUX.31.DELAYGTY_CHANNEL1.CDRHOLD_FS
TCELL25:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS117
TCELL25:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXCHBONDMASTER_FS
TCELL25:IMUX.IMUX.34.DELAYGTY_CHANNEL1.TCOINITSET_FS
TCELL25:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS53
TCELL25:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS14
TCELL25:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS6
TCELL25:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS118
TCELL25:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS14
TCELL25:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS7
TCELL25:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS54
TCELL25:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS6
TCELL25:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS6
TCELL25:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS119
TCELL25:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS6
TCELL25:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS7
TCELL25:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS55
TCELL26:OUT.0.TMINGTY_CHANNEL1.RXCOMMADET_SF
TCELL26:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF96
TCELL26:OUT.2.TMINGTY_CHANNEL1.RXCKCORCNT_SF1
TCELL26:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF32
TCELL26:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF4
TCELL26:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF97
TCELL26:OUT.6.TMINGTY_CHANNEL1.RXBUFSTATUS_SF2
TCELL26:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF33
TCELL26:OUT.8.TMINGTY_CHANNEL1.RXDATAVALID_SF1
TCELL26:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF98
TCELL26:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF34
TCELL26:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF4
TCELL26:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF99
TCELL26:OUT.14.TMINGTY_CHANNEL1.RXCHBONDO_SF4
TCELL26:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF35
TCELL26:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF4
TCELL26:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF100
TCELL26:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF4
TCELL26:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF36
TCELL26:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF12
TCELL26:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF101
TCELL26:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF4
TCELL26:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF37
TCELL26:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF12
TCELL26:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF102
TCELL26:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF4
TCELL26:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF38
TCELL26:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF12
TCELL26:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF103
TCELL26:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF4
TCELL26:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF39
TCELL26:IMUX.CTRL.0GTY_CHANNEL1.GTRXRSTB_FS
TCELL26:IMUX.CTRL.4GTY_CHANNEL1.RXUSRCLK2B_FS
TCELL26:IMUX.CTRL.5GTY_CHANNEL1.RXUSRCLKB_FS
TCELL26:IMUX.CTRL.7GTY_CHANNEL1.RCODARESETB_FS
TCELL26:IMUX.IMUX.0.DELAYGTY_CHANNEL1.TXCHARISK_FS7
TCELL26:IMUX.IMUX.1.DELAYGTY_CHANNEL1.TXSWING_FS
TCELL26:IMUX.IMUX.2.DELAYGTY_CHANNEL1.TXDATA_FS120
TCELL26:IMUX.IMUX.4.DELAYGTY_CHANNEL1.RXPLLCKSEL_FS0
TCELL26:IMUX.IMUX.5.DELAYGTY_CHANNEL1.TXDATA_FS56
TCELL26:IMUX.IMUX.7.DELAYGTY_CHANNEL1.SCANIN_FS14
TCELL26:IMUX.IMUX.8.DELAYGTY_CHANNEL1.TXDATA_FS121
TCELL26:IMUX.IMUX.10.DELAYGTY_CHANNEL1.SCANIN_FS15
TCELL26:IMUX.IMUX.11.DELAYGTY_CHANNEL1.TXDATA_FS57
TCELL26:IMUX.IMUX.13.DELAYGTY_CHANNEL1.RXRESET_FS
TCELL26:IMUX.IMUX.14.DELAYGTY_CHANNEL1.TXDATA_FS122
TCELL26:IMUX.IMUX.15.DELAYGTY_CHANNEL1.TXBYPASS8B10B_FS7
TCELL26:IMUX.IMUX.16.DELAYGTY_CHANNEL1.OSOVREN_FS
TCELL26:IMUX.IMUX.17.DELAYGTY_CHANNEL1.TXDATA_FS58
TCELL26:IMUX.IMUX.18.DELAYGTY_CHANNEL1.RXRATE_FS0
TCELL26:IMUX.IMUX.19.DELAYGTY_CHANNEL1.DFECFOKOVREN_FS
TCELL26:IMUX.IMUX.20.DELAYGTY_CHANNEL1.TXDATA_FS123
TCELL26:IMUX.IMUX.21.DELAYGTY_CHANNEL1.RXRATE_FS1
TCELL26:IMUX.IMUX.22.DELAYGTY_CHANNEL1.DFECFOKFPULSE_FS
TCELL26:IMUX.IMUX.23.DELAYGTY_CHANNEL1.TXDATA_FS59
TCELL26:IMUX.IMUX.24.DELAYGTY_CHANNEL1.RXRATE_FS2
TCELL26:IMUX.IMUX.25.DELAYGTY_CHANNEL1.DFECFOKFEN_FS
TCELL26:IMUX.IMUX.26.DELAYGTY_CHANNEL1.TXDATA_FS124
TCELL26:IMUX.IMUX.27.DELAYGTY_CHANNEL1.RXSYSCKSEL_FS0
TCELL26:IMUX.IMUX.28.DELAYGTY_CHANNEL1.RXOUTCKCTL_FS1
TCELL26:IMUX.IMUX.29.DELAYGTY_CHANNEL1.TXDATA_FS60
TCELL26:IMUX.IMUX.30.DELAYGTY_CHANNEL1.TXDATAEXTENDRSVD_FS7
TCELL26:IMUX.IMUX.31.DELAYGTY_CHANNEL1.CDROVREN_FS
TCELL26:IMUX.IMUX.32.DELAYGTY_CHANNEL1.TXDATA_FS125
TCELL26:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXCHBONDSLAVE_FS
TCELL26:IMUX.IMUX.34.DELAYGTY_CHANNEL1.RXOUTCKCTL_FS2
TCELL26:IMUX.IMUX.35.DELAYGTY_CHANNEL1.TXDATA_FS61
TCELL26:IMUX.IMUX.36.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS15
TCELL26:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS8
TCELL26:IMUX.IMUX.38.DELAYGTY_CHANNEL1.TXDATA_FS126
TCELL26:IMUX.IMUX.39.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS15
TCELL26:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS9
TCELL26:IMUX.IMUX.41.DELAYGTY_CHANNEL1.TXDATA_FS62
TCELL26:IMUX.IMUX.42.DELAYGTY_CHANNEL1.TXCHARDISPVAL_FS7
TCELL26:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS8
TCELL26:IMUX.IMUX.44.DELAYGTY_CHANNEL1.TXDATA_FS127
TCELL26:IMUX.IMUX.45.DELAYGTY_CHANNEL1.TXCHARDISPMODE_FS7
TCELL26:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS9
TCELL26:IMUX.IMUX.47.DELAYGTY_CHANNEL1.TXDATA_FS63
TCELL27:OUT.0.TMINGTY_CHANNEL1.COMSASDET_SF
TCELL27:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF104
TCELL27:OUT.2.TMINGTY_CHANNEL1.RXCHANBONDSEQ_SF
TCELL27:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF40
TCELL27:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF5
TCELL27:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF105
TCELL27:OUT.6.TMINGTY_CHANNEL1.RXRATEDONE_SF
TCELL27:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF41
TCELL27:OUT.8.TMINGTY_CHANNEL1.RXHEADERVALID_SF0
TCELL27:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF106
TCELL27:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF42
TCELL27:OUT.12.TMINGTY_CHANNEL1.RXHEADER_SF5
TCELL27:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF107
TCELL27:OUT.14.TMINGTY_CHANNEL1.RXSTATUS_SF0
TCELL27:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF43
TCELL27:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF5
TCELL27:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF108
TCELL27:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF5
TCELL27:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF44
TCELL27:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF13
TCELL27:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF109
TCELL27:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF5
TCELL27:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF45
TCELL27:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF13
TCELL27:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF110
TCELL27:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF5
TCELL27:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF46
TCELL27:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF13
TCELL27:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF111
TCELL27:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF5
TCELL27:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF47
TCELL27:IMUX.CTRL.0GTY_CHANNEL1.RXBUFRSTB_FS
TCELL27:IMUX.CTRL.4GTY_CHANNEL1.PMASCANCLK1B_FS
TCELL27:IMUX.CTRL.5GTY_CHANNEL1.PMASCANCLK0B_FS
TCELL27:IMUX.CTRL.7GTY_CHANNEL1.RXPROGDIVRESETB_FS
TCELL27:IMUX.IMUX.1.DELAYGTY_CHANNEL1.SCANIN_FS16
TCELL27:IMUX.IMUX.2.DELAYGTY_CHANNEL1.CKOKRESET_FS
TCELL27:IMUX.IMUX.3.DELAYGTY_CHANNEL1.LOOPRSVD_FS0
TCELL27:IMUX.IMUX.4.DELAYGTY_CHANNEL1.RXPLLCKSEL_FS1
TCELL27:IMUX.IMUX.5.DELAYGTY_CHANNEL1.RX_POST_DCC_START_FS
TCELL27:IMUX.IMUX.6.DELAYGTY_CHANNEL1.LOOPRSVD_FS3
TCELL27:IMUX.IMUX.7.DELAYGTY_CHANNEL1.DFEH2HOLD_FS
TCELL27:IMUX.IMUX.9.DELAYGTY_CHANNEL1.LOOPRSVD_FS6
TCELL27:IMUX.IMUX.10.DELAYGTY_CHANNEL1.DFEH2OVREN_FS
TCELL27:IMUX.IMUX.11.DELAYGTY_CHANNEL1.DFECFOKHOLD_FS
TCELL27:IMUX.IMUX.12.DELAYGTY_CHANNEL1.RXCOMMADETUSE_FS
TCELL27:IMUX.IMUX.13.DELAYGTY_CHANNEL1.DFEH5HOLD_FS
TCELL27:IMUX.IMUX.14.DELAYGTY_CHANNEL1.LOOPRSVD_FS9
TCELL27:IMUX.IMUX.15.DELAYGTY_CHANNEL1.RXCHBONDI_FS0
TCELL27:IMUX.IMUX.16.DELAYGTY_CHANNEL1.DFEH5OVREN_FS
TCELL27:IMUX.IMUX.17.DELAYGTY_CHANNEL1.AFECFOKEN_FS
TCELL27:IMUX.IMUX.18.DELAYGTY_CHANNEL1.RXCHBONDI_FS1
TCELL27:IMUX.IMUX.19.DELAYGTY_CHANNEL1.DFEH8HOLD_FS
TCELL27:IMUX.IMUX.21.DELAYGTY_CHANNEL1.RXCHBONDI_FS2
TCELL27:IMUX.IMUX.22.DELAYGTY_CHANNEL1.DFEH8OVREN_FS
TCELL27:IMUX.IMUX.23.DELAYGTY_CHANNEL1.OSHOLD_FS
TCELL27:IMUX.IMUX.24.DELAYGTY_CHANNEL1.RXCHBONDI_FS3
TCELL27:IMUX.IMUX.25.DELAYGTY_CHANNEL1.DFEH11HOLD_FS
TCELL27:IMUX.IMUX.27.DELAYGTY_CHANNEL1.RXCHBONDI_FS4
TCELL27:IMUX.IMUX.28.DELAYGTY_CHANNEL1.DFEH11OVREN_FS
TCELL27:IMUX.IMUX.29.DELAYGTY_CHANNEL1.CFOKRESET_FS
TCELL27:IMUX.IMUX.30.DELAYGTY_CHANNEL1.RXENMCOMMAALIGN_FS
TCELL27:IMUX.IMUX.31.DELAYGTY_CHANNEL1.DFEH14HOLD_FS
TCELL27:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXSLIDE_FS
TCELL27:IMUX.IMUX.34.DELAYGTY_CHANNEL1.DFEH14OVREN_FS
TCELL27:IMUX.IMUX.36.DELAYGTY_CHANNEL1.RXRATEASYNCH_FS
TCELL27:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS10
TCELL27:IMUX.IMUX.38.DELAYGTY_CHANNEL1.DFEKLOVREN_FS
TCELL27:IMUX.IMUX.39.DELAYGTY_CHANNEL1.DFEUTOVREN_FS
TCELL27:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS11
TCELL27:IMUX.IMUX.41.DELAYGTY_CHANNEL1.DFEKLHOLD_FS
TCELL27:IMUX.IMUX.42.DELAYGTY_CHANNEL1.DFEUTHOLD_FS
TCELL27:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS10
TCELL27:IMUX.IMUX.44.DELAYGTY_CHANNEL1.DFEGCOVREN_FS
TCELL27:IMUX.IMUX.45.DELAYGTY_CHANNEL1.DFEVSEN_FS
TCELL27:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS11
TCELL27:IMUX.IMUX.47.DELAYGTY_CHANNEL1.DFEGCHOLD_FS
TCELL28:OUT.0.TMINGTY_CHANNEL1.COMWAKEDET_SF
TCELL28:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF112
TCELL28:OUT.2.TMINGTY_CHANNEL1.RXCHISALIGNED_SF
TCELL28:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF48
TCELL28:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF6
TCELL28:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF113
TCELL28:OUT.6.TMINGTY_CHANNEL1.RXSTARTOFSEQ_SF0
TCELL28:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF49
TCELL28:OUT.8.TMINGTY_CHANNEL1.RXHEADERVALID_SF1
TCELL28:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF114
TCELL28:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF50
TCELL28:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF115
TCELL28:OUT.14.TMINGTY_CHANNEL1.RXSTATUS_SF1
TCELL28:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF51
TCELL28:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF6
TCELL28:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF116
TCELL28:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF6
TCELL28:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF52
TCELL28:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF14
TCELL28:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF117
TCELL28:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF6
TCELL28:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF53
TCELL28:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF14
TCELL28:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF118
TCELL28:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF6
TCELL28:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF54
TCELL28:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF14
TCELL28:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF119
TCELL28:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF6
TCELL28:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF55
TCELL28:IMUX.CTRL.0GTY_CHANNEL1.CDRPHRESETB_FS
TCELL28:IMUX.CTRL.4GTY_CHANNEL1.RXLATCLKB_FS
TCELL28:IMUX.CTRL.5GTY_CHANNEL1.ALT_SIGVALID_CLKB_FS
TCELL28:IMUX.CTRL.7GTY_CHANNEL1.RXDASOFTRESETB_FS
TCELL28:IMUX.IMUX.1.DELAYGTY_CHANNEL1.SCANIN_FS17
TCELL28:IMUX.IMUX.2.DELAYGTY_CHANNEL1.RXCHBONDLEVEL_FS0
TCELL28:IMUX.IMUX.3.DELAYGTY_CHANNEL1.LOOPRSVD_FS1
TCELL28:IMUX.IMUX.4.DELAYGTY_CHANNEL1.RXPWRDN_FS0
TCELL28:IMUX.IMUX.5.DELAYGTY_CHANNEL1.RXCHBONDLEVEL_FS1
TCELL28:IMUX.IMUX.6.DELAYGTY_CHANNEL1.LOOPRSVD_FS4
TCELL28:IMUX.IMUX.7.DELAYGTY_CHANNEL1.DFEH3HOLD_FS
TCELL28:IMUX.IMUX.8.DELAYGTY_CHANNEL1.RXCHBONDLEVEL_FS2
TCELL28:IMUX.IMUX.9.DELAYGTY_CHANNEL1.LOOPRSVD_FS7
TCELL28:IMUX.IMUX.10.DELAYGTY_CHANNEL1.DFEH3OVREN_FS
TCELL28:IMUX.IMUX.12.DELAYGTY_CHANNEL1.LPMOSHOLD_FS
TCELL28:IMUX.IMUX.13.DELAYGTY_CHANNEL1.DFEH6HOLD_FS
TCELL28:IMUX.IMUX.14.DELAYGTY_CHANNEL1.LOOPRSVD_FS10
TCELL28:IMUX.IMUX.16.DELAYGTY_CHANNEL1.DFEH6OVREN_FS
TCELL28:IMUX.IMUX.17.DELAYGTY_CHANNEL1.LOOPRSVD_FS11
TCELL28:IMUX.IMUX.19.DELAYGTY_CHANNEL1.DFEH9HOLD_FS
TCELL28:IMUX.IMUX.20.DELAYGTY_CHANNEL1.LPMOSOVREN_FS
TCELL28:IMUX.IMUX.21.DELAYGTY_CHANNEL1.LOOPRSVD_FS12
TCELL28:IMUX.IMUX.22.DELAYGTY_CHANNEL1.DFEH9OVREN_FS
TCELL28:IMUX.IMUX.23.DELAYGTY_CHANNEL1.RXSYNCFSMMASTER_FS
TCELL28:IMUX.IMUX.25.DELAYGTY_CHANNEL1.DFEH12HOLD_FS
TCELL28:IMUX.IMUX.26.DELAYGTY_CHANNEL1.RXSLVSYNCEN_FS
TCELL28:IMUX.IMUX.28.DELAYGTY_CHANNEL1.DFEH12OVREN_FS
TCELL28:IMUX.IMUX.29.DELAYGTY_CHANNEL1.RXUSRRDY_FS
TCELL28:IMUX.IMUX.30.DELAYGTY_CHANNEL1.LPMKHOVREN_FS
TCELL28:IMUX.IMUX.31.DELAYGTY_CHANNEL1.DFEH15HOLD_FS
TCELL28:IMUX.IMUX.32.DELAYGTY_CHANNEL1.RXLPMEN_FS
TCELL28:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXGEARBOXSLIP_FS
TCELL28:IMUX.IMUX.34.DELAYGTY_CHANNEL1.DFEH15OVREN_FS
TCELL28:IMUX.IMUX.35.DELAYGTY_CHANNEL1.RXMSTRSETPHDONE_FS
TCELL28:IMUX.IMUX.36.DELAYGTY_CHANNEL1.RXDEC8B10BUSE_FS
TCELL28:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS12
TCELL28:IMUX.IMUX.38.DELAYGTY_CHANNEL1.DFEDOUTMODE_FS0
TCELL28:IMUX.IMUX.39.DELAYGTY_CHANNEL1.DFEVPOVREN_FS
TCELL28:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS13
TCELL28:IMUX.IMUX.41.DELAYGTY_CHANNEL1.PCIERSTIDLE_FS
TCELL28:IMUX.IMUX.42.DELAYGTY_CHANNEL1.DFEVPHOLD_FS
TCELL28:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS12
TCELL28:IMUX.IMUX.44.DELAYGTY_CHANNEL1.DFEDOUTMODE_FS1
TCELL28:IMUX.IMUX.45.DELAYGTY_CHANNEL1.DFEYEN_FS
TCELL28:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS13
TCELL29:OUT.0.TMINGTY_CHANNEL1.RXVALID_SF
TCELL29:OUT.1.TMINGTY_CHANNEL1.RXDATA_SF120
TCELL29:OUT.2.TMINGTY_CHANNEL1.RXCHANREALIGN_SF
TCELL29:OUT.3.TMINGTY_CHANNEL1.RXDATA_SF56
TCELL29:OUT.4.TMINGTY_CHANNEL1.RXDATAEXTENDRSVD_SF7
TCELL29:OUT.5.TMINGTY_CHANNEL1.RXDATA_SF121
TCELL29:OUT.6.TMINGTY_CHANNEL1.RXSTARTOFSEQ_SF1
TCELL29:OUT.7.TMINGTY_CHANNEL1.RXDATA_SF57
TCELL29:OUT.8.TMINGTY_CHANNEL1.RXPRBSERR_SF
TCELL29:OUT.9.TMINGTY_CHANNEL1.RXDATA_SF122
TCELL29:OUT.10.TMINGTY_CHANNEL1.RXRESETDONE_SF
TCELL29:OUT.11.TMINGTY_CHANNEL1.RXDATA_SF58
TCELL29:OUT.13.TMINGTY_CHANNEL1.RXDATA_SF123
TCELL29:OUT.14.TMINGTY_CHANNEL1.RXSTATUS_SF2
TCELL29:OUT.15.TMINGTY_CHANNEL1.RXDATA_SF59
TCELL29:OUT.16.TMINGTY_CHANNEL1.RXNOTINTABLE_SF7
TCELL29:OUT.17.TMINGTY_CHANNEL1.RXDATA_SF124
TCELL29:OUT.18.TMINGTY_CHANNEL1.RXCHARISCOMMA_SF7
TCELL29:OUT.19.TMINGTY_CHANNEL1.RXDATA_SF60
TCELL29:OUT.20.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF15
TCELL29:OUT.21.TMINGTY_CHANNEL1.RXDATA_SF125
TCELL29:OUT.22.TMINGTY_CHANNEL1.PCS_RSVD_OUT_SF7
TCELL29:OUT.23.TMINGTY_CHANNEL1.RXDATA_SF61
TCELL29:OUT.24.TMINGTY_CHANNEL1.RXCHARISK_SF15
TCELL29:OUT.25.TMINGTY_CHANNEL1.RXDATA_SF126
TCELL29:OUT.26.TMINGTY_CHANNEL1.RXCHARISK_SF7
TCELL29:OUT.27.TMINGTY_CHANNEL1.RXDATA_SF62
TCELL29:OUT.28.TMINGTY_CHANNEL1.RXDISPERR_SF15
TCELL29:OUT.29.TMINGTY_CHANNEL1.RXDATA_SF127
TCELL29:OUT.30.TMINGTY_CHANNEL1.RXDISPERR_SF7
TCELL29:OUT.31.TMINGTY_CHANNEL1.RXDATA_SF63
TCELL29:IMUX.CTRL.0GTY_CHANNEL1.CDRRESETB_FS
TCELL29:IMUX.CTRL.4GTY_CHANNEL1.CKPINRSRVD1B_FS
TCELL29:IMUX.CTRL.5GTY_CHANNEL1.CKPINRSRVD0B_FS
TCELL29:IMUX.IMUX.0.DELAYGTY_CHANNEL1.RXPRBSPTN_FS3
TCELL29:IMUX.IMUX.1.DELAYGTY_CHANNEL1.SCANIN_FS18
TCELL29:IMUX.IMUX.2.DELAYGTY_CHANNEL1.RXPRBSPTN_FS0
TCELL29:IMUX.IMUX.3.DELAYGTY_CHANNEL1.LOOPRSVD_FS2
TCELL29:IMUX.IMUX.4.DELAYGTY_CHANNEL1.RXPWRDN_FS1
TCELL29:IMUX.IMUX.5.DELAYGTY_CHANNEL1.RXPRBSPTN_FS1
TCELL29:IMUX.IMUX.6.DELAYGTY_CHANNEL1.LOOPRSVD_FS5
TCELL29:IMUX.IMUX.7.DELAYGTY_CHANNEL1.DFEH4HOLD_FS
TCELL29:IMUX.IMUX.8.DELAYGTY_CHANNEL1.RXPRBSPTN_FS2
TCELL29:IMUX.IMUX.9.DELAYGTY_CHANNEL1.LOOPRSVD_FS8
TCELL29:IMUX.IMUX.10.DELAYGTY_CHANNEL1.DFEH4OVREN_FS
TCELL29:IMUX.IMUX.11.DELAYGTY_CHANNEL1.DFECFOKCFNUM_FS0
TCELL29:IMUX.IMUX.13.DELAYGTY_CHANNEL1.DFEH7HOLD_FS
TCELL29:IMUX.IMUX.14.DELAYGTY_CHANNEL1.DFECFOKCFNUM_FS1
TCELL29:IMUX.IMUX.15.DELAYGTY_CHANNEL1.CDRSTEPSX_FS
TCELL29:IMUX.IMUX.16.DELAYGTY_CHANNEL1.DFEH7OVREN_FS
TCELL29:IMUX.IMUX.17.DELAYGTY_CHANNEL1.DFECFOKCFNUM_FS2
TCELL29:IMUX.IMUX.18.DELAYGTY_CHANNEL1.CDRSTEPSQ_FS
TCELL29:IMUX.IMUX.19.DELAYGTY_CHANNEL1.DFEH10HOLD_FS
TCELL29:IMUX.IMUX.20.DELAYGTY_CHANNEL1.DFECFOKCFNUM_FS3
TCELL29:IMUX.IMUX.22.DELAYGTY_CHANNEL1.DFEH10OVREN_FS
TCELL29:IMUX.IMUX.23.DELAYGTY_CHANNEL1.LPMKLOVREN_FS
TCELL29:IMUX.IMUX.24.DELAYGTY_CHANNEL1.LOOPRSVD_FS13
TCELL29:IMUX.IMUX.25.DELAYGTY_CHANNEL1.DFEH13HOLD_FS
TCELL29:IMUX.IMUX.26.DELAYGTY_CHANNEL1.LPMKLHOLD_FS
TCELL29:IMUX.IMUX.28.DELAYGTY_CHANNEL1.DFEH13OVREN_FS
TCELL29:IMUX.IMUX.29.DELAYGTY_CHANNEL1.LPMKHHOLD_FS
TCELL29:IMUX.IMUX.30.DELAYGTY_CHANNEL1.LPMGCHOLD_FS
TCELL29:IMUX.IMUX.31.DELAYGTY_CHANNEL1.LOOPRSVD_FS14
TCELL29:IMUX.IMUX.32.DELAYGTY_CHANNEL1.RXDAOVREN_FS
TCELL29:IMUX.IMUX.33.DELAYGTY_CHANNEL1.RXDAALGNEN_FS
TCELL29:IMUX.IMUX.34.DELAYGTY_CHANNEL1.LPMGCOVREN_FS
TCELL29:IMUX.IMUX.35.DELAYGTY_CHANNEL1.RXSLIPPMA_FS
TCELL29:IMUX.IMUX.36.DELAYGTY_CHANNEL1.RXDABYPASS_FS
TCELL29:IMUX.IMUX.37.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS14
TCELL29:IMUX.IMUX.39.DELAYGTY_CHANNEL1.PCIEEQRXEQADAPTDONE_FS
TCELL29:IMUX.IMUX.40.DELAYGTY_CHANNEL1.PCS_RSVD_IN_FS15
TCELL29:IMUX.IMUX.41.DELAYGTY_CHANNEL1.LOOPRSVD_FS15
TCELL29:IMUX.IMUX.42.DELAYGTY_CHANNEL1.RXSLIPOUTCLK_FS
TCELL29:IMUX.IMUX.43.DELAYGTY_CHANNEL1.PINRSRVD_FS14
TCELL29:IMUX.IMUX.45.DELAYGTY_CHANNEL1.CDRSTEPDIR_FS
TCELL29:IMUX.IMUX.46.DELAYGTY_CHANNEL1.PINRSRVD_FS15
TCELL30:OUT.0.TMINGTY_CHANNEL2.SCANOUT_SF6
TCELL30:OUT.1.TMINGTY_CHANNEL2.BUFGTRESET_SF0
TCELL30:OUT.2.TMINGTY_CHANNEL2.SCANOUT_SF8
TCELL30:OUT.3.TMINGTY_CHANNEL2.BUFGTDIV_SF0
TCELL30:OUT.4.TMINGTY_CHANNEL2.SCANOUT_SF11
TCELL30:OUT.5.TMINGTY_CHANNEL2.BUFGTDIV_SF3
TCELL30:OUT.6.TMINGTY_CHANNEL2.DFEDOUT_SF5
TCELL30:OUT.7.TMINGTY_CHANNEL2.BUFGTDIV_SF6
TCELL30:OUT.8.TMINGTY_CHANNEL2.SCANOUT_SF14
TCELL30:OUT.9.TMINGTY_CHANNEL2.DMONOUT_SF15
TCELL30:OUT.10.TMINGTY_CHANNEL2.BUFGTRESET_SF2
TCELL30:OUT.11.TMINGTY_CHANNEL2.SCANOUT_SF5
TCELL30:OUT.12.TMINGTY_CHANNEL2.BUFGTCEMASK_SF2
TCELL30:OUT.13.TMINGTY_CHANNEL2.DRPDO_SF15
TCELL30:OUT.14.TMINGTY_CHANNEL2.PMASCANOUT_SF8
TCELL30:OUT.15.TMINGTY_CHANNEL2.DMONOUT_SF10
TCELL30:OUT.16.TMINGTY_CHANNEL2.BUFGTCE_SF0
TCELL30:OUT.17.TMINGTY_CHANNEL2.PMASCANOUT_SF5
TCELL30:OUT.18.TMINGTY_CHANNEL2.BUFGTCEMASK_SF0
TCELL30:OUT.19.TMINGTY_CHANNEL2.DRPDO_SF10
TCELL30:OUT.20.TMINGTY_CHANNEL2.PCIERATEQPLLRESET_SF0
TCELL30:OUT.21.TMINGTY_CHANNEL2.DMONOUT_SF5
TCELL30:OUT.23.TMINGTY_CHANNEL2.SCANOUT_SF0
TCELL30:OUT.24.TMINGTY_CHANNEL2.PCIERATEIDLE_SF
TCELL30:OUT.25.TMINGTY_CHANNEL2.DRPDO_SF5
TCELL30:OUT.26.TMINGTY_CHANNEL2.DFEDOUT_SF0
TCELL30:OUT.27.TMINGTY_CHANNEL2.DMONOUT_SF0
TCELL30:OUT.28.TMINGTY_CHANNEL2.MGTREFCLKFA_SF
TCELL30:OUT.29.TMINGTY_CHANNEL2.PMASCANOUT_SF0
TCELL30:OUT.31.TMINGTY_CHANNEL2.DRPDO_SF0
TCELL30:IMUX.CTRL.4GTY_CHANNEL2.DCLKB_FS
TCELL30:IMUX.CTRL.5GTY_CHANNEL2.DMONCLKB_FS
TCELL30:IMUX.IMUX.0.DELAYGTY_CHANNEL2.DEN_FS
TCELL30:IMUX.IMUX.1.DELAYGTY_CHANNEL2.TSTIN_FS0
TCELL30:IMUX.IMUX.2.DELAYGTY_CHANNEL2.DADDR_FS0
TCELL30:IMUX.IMUX.3.DELAYGTY_CHANNEL2.DWE_FS
TCELL30:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TSTIN_FS2
TCELL30:IMUX.IMUX.5.DELAYGTY_CHANNEL2.DI_FS0
TCELL30:IMUX.IMUX.6.DELAYGTY_CHANNEL2.ISERRDETEN_FS
TCELL30:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TSTIN_FS4
TCELL30:IMUX.IMUX.8.DELAYGTY_CHANNEL2.DADDR_FS1
TCELL30:IMUX.IMUX.9.DELAYGTY_CHANNEL2.ISCANRESET_FS
TCELL30:IMUX.IMUX.10.DELAYGTY_CHANNEL2.TSTIN_FS6
TCELL30:IMUX.IMUX.11.DELAYGTY_CHANNEL2.DI_FS1
TCELL30:IMUX.IMUX.12.DELAYGTY_CHANNEL2.EYESCANTRIGGER_FS
TCELL30:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TSTIN_FS8
TCELL30:IMUX.IMUX.14.DELAYGTY_CHANNEL2.DADDR_FS2
TCELL30:IMUX.IMUX.15.DELAYGTY_CHANNEL2.LPBKTXRXSEREN_FS
TCELL30:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TSTIN_FS10
TCELL30:IMUX.IMUX.17.DELAYGTY_CHANNEL2.DI_FS2
TCELL30:IMUX.IMUX.18.DELAYGTY_CHANNEL2.SCANIN_FS11
TCELL30:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TSTIN_FS12
TCELL30:IMUX.IMUX.20.DELAYGTY_CHANNEL2.DADDR_FS3
TCELL30:IMUX.IMUX.21.DELAYGTY_CHANNEL2.SCANIN_FS9
TCELL30:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TSTIN_FS14
TCELL30:IMUX.IMUX.23.DELAYGTY_CHANNEL2.DI_FS3
TCELL30:IMUX.IMUX.24.DELAYGTY_CHANNEL2.SCANIN_FS7
TCELL30:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TSTIN_FS16
TCELL30:IMUX.IMUX.26.DELAYGTY_CHANNEL2.DADDR_FS4
TCELL30:IMUX.IMUX.27.DELAYGTY_CHANNEL2.SCANIN_FS0
TCELL30:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TSTIN_FS18
TCELL30:IMUX.IMUX.29.DELAYGTY_CHANNEL2.DI_FS4
TCELL30:IMUX.IMUX.30.DELAYGTY_CHANNEL2.SCANIN_FS2
TCELL30:IMUX.IMUX.31.DELAYGTY_CHANNEL2.SCANIN_FS12
TCELL30:IMUX.IMUX.32.DELAYGTY_CHANNEL2.DADDR_FS5
TCELL30:IMUX.IMUX.33.DELAYGTY_CHANNEL2.SCANIN_FS4
TCELL30:IMUX.IMUX.34.DELAYGTY_CHANNEL2.PMASCANIN_FS7
TCELL30:IMUX.IMUX.35.DELAYGTY_CHANNEL2.DI_FS5
TCELL30:IMUX.IMUX.36.DELAYGTY_CHANNEL2.PMASCANIN_FS8
TCELL30:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PMASCANRSTEN_FS
TCELL30:IMUX.IMUX.38.DELAYGTY_CHANNEL2.DADDR_FS6
TCELL30:IMUX.IMUX.39.DELAYGTY_CHANNEL2.PMASCANIN_FS9
TCELL30:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PMASCANMODEB_FS
TCELL30:IMUX.IMUX.41.DELAYGTY_CHANNEL2.DI_FS6
TCELL30:IMUX.IMUX.42.DELAYGTY_CHANNEL2.PMASCANIN_FS10
TCELL30:IMUX.IMUX.43.DELAYGTY_CHANNEL2.RXTERMPROG_FS0
TCELL30:IMUX.IMUX.44.DELAYGTY_CHANNEL2.DADDR_FS7
TCELL30:IMUX.IMUX.45.DELAYGTY_CHANNEL2.PMASCANIN_FS11
TCELL30:IMUX.IMUX.46.DELAYGTY_CHANNEL2.RXTERMPROG_FS1
TCELL30:IMUX.IMUX.47.DELAYGTY_CHANNEL2.DI_FS7
TCELL30:RCLK.IMUX.6BUFG_GT_SYNC10.CLK_IN
TCELL31:OUT.0.TMINGTY_CHANNEL2.SCANOUT_SF7
TCELL31:OUT.1.TMINGTY_CHANNEL2.BUFGTRESET_SF1
TCELL31:OUT.2.TMINGTY_CHANNEL2.SCANOUT_SF9
TCELL31:OUT.3.TMINGTY_CHANNEL2.BUFGTDIV_SF1
TCELL31:OUT.4.TMINGTY_CHANNEL2.SCANOUT_SF12
TCELL31:OUT.5.TMINGTY_CHANNEL2.BUFGTDIV_SF4
TCELL31:OUT.6.TMINGTY_CHANNEL2.DFEDOUT_SF6
TCELL31:OUT.7.TMINGTY_CHANNEL2.BUFGTDIV_SF7
TCELL31:OUT.8.TMINGTY_CHANNEL2.SCANOUT_SF15
TCELL31:OUT.9.TMINGTY_CHANNEL2.PINRSRVDAS_SF0
TCELL31:OUT.10.TMINGTY_CHANNEL2.BUFGTRSTMASK_SF0
TCELL31:OUT.11.TMINGTY_CHANNEL2.DRDY_SF
TCELL31:OUT.12.TMINGTY_CHANNEL2.BUFGTCE_SF2
TCELL31:OUT.13.TMINGTY_CHANNEL2.DMONOUT_SF16
TCELL31:OUT.14.TMINGTY_CHANNEL2.PMASCANOUT_SF9
TCELL31:OUT.15.TMINGTY_CHANNEL2.DMONOUT_SF11
TCELL31:OUT.16.TMINGTY_CHANNEL2.BUFGTCE_SF1
TCELL31:OUT.17.TMINGTY_CHANNEL2.PMASCANOUT_SF6
TCELL31:OUT.18.TMINGTY_CHANNEL2.BUFGTCEMASK_SF1
TCELL31:OUT.19.TMINGTY_CHANNEL2.DRPDO_SF11
TCELL31:OUT.20.TMINGTY_CHANNEL2.PCIERATEQPLLRESET_SF1
TCELL31:OUT.21.TMINGTY_CHANNEL2.DMONOUT_SF6
TCELL31:OUT.23.TMINGTY_CHANNEL2.SCANOUT_SF1
TCELL31:OUT.24.TMINGTY_CHANNEL2.PCIERATEGEN3_SF
TCELL31:OUT.25.TMINGTY_CHANNEL2.DRPDO_SF6
TCELL31:OUT.26.TMINGTY_CHANNEL2.DFEDOUT_SF1
TCELL31:OUT.27.TMINGTY_CHANNEL2.DMONOUT_SF1
TCELL31:OUT.28.TMINGTY_CHANNEL2.EYESCANDATAERROR_SF
TCELL31:OUT.29.TMINGTY_CHANNEL2.PMASCANOUT_SF1
TCELL31:OUT.30.TMINGTY_CHANNEL2.PINRSRVDAS_SF4
TCELL31:OUT.31.TMINGTY_CHANNEL2.DRPDO_SF1
TCELL31:IMUX.CTRL.5GTY_CHANNEL2.COREREFCLKB_FS
TCELL31:IMUX.IMUX.0.DELAYGTY_CHANNEL2.DMONFIFORESET_FS
TCELL31:IMUX.IMUX.1.DELAYGTY_CHANNEL2.TSTIN_FS1
TCELL31:IMUX.IMUX.2.DELAYGTY_CHANNEL2.DADDR_FS8
TCELL31:IMUX.IMUX.3.DELAYGTY_CHANNEL2.TSTPWRDN_FS0
TCELL31:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TSTIN_FS3
TCELL31:IMUX.IMUX.5.DELAYGTY_CHANNEL2.DI_FS8
TCELL31:IMUX.IMUX.6.DELAYGTY_CHANNEL2.TSTPWRDN_FS1
TCELL31:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TSTIN_FS5
TCELL31:IMUX.IMUX.8.DELAYGTY_CHANNEL2.DADDR_FS9
TCELL31:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TSTPWRDN_FS2
TCELL31:IMUX.IMUX.10.DELAYGTY_CHANNEL2.TSTIN_FS7
TCELL31:IMUX.IMUX.11.DELAYGTY_CHANNEL2.DI_FS9
TCELL31:IMUX.IMUX.12.DELAYGTY_CHANNEL2.TSTPWRDN_FS3
TCELL31:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TSTIN_FS9
TCELL31:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TSTPWRDN_FS4
TCELL31:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TSTIN_FS11
TCELL31:IMUX.IMUX.17.DELAYGTY_CHANNEL2.DI_FS10
TCELL31:IMUX.IMUX.18.DELAYGTY_CHANNEL2.SCANIN_FS10
TCELL31:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TSTIN_FS13
TCELL31:IMUX.IMUX.20.DELAYGTY_CHANNEL2.GTRSTSEL_FS
TCELL31:IMUX.IMUX.21.DELAYGTY_CHANNEL2.SCANIN_FS8
TCELL31:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TSTIN_FS15
TCELL31:IMUX.IMUX.23.DELAYGTY_CHANNEL2.DI_FS11
TCELL31:IMUX.IMUX.24.DELAYGTY_CHANNEL2.SCANIN_FS6
TCELL31:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TSTIN_FS17
TCELL31:IMUX.IMUX.26.DELAYGTY_CHANNEL2.LPBKRXTXSEREN_FS
TCELL31:IMUX.IMUX.27.DELAYGTY_CHANNEL2.SCANIN_FS1
TCELL31:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TSTIN_FS19
TCELL31:IMUX.IMUX.29.DELAYGTY_CHANNEL2.DI_FS12
TCELL31:IMUX.IMUX.30.DELAYGTY_CHANNEL2.SCANIN_FS3
TCELL31:IMUX.IMUX.31.DELAYGTY_CHANNEL2.EVODDPHIXWREN_FS
TCELL31:IMUX.IMUX.32.DELAYGTY_CHANNEL2.SCANMODEB_FS
TCELL31:IMUX.IMUX.33.DELAYGTY_CHANNEL2.SCANIN_FS5
TCELL31:IMUX.IMUX.34.DELAYGTY_CHANNEL2.EVODDPHIXRDEN_FS
TCELL31:IMUX.IMUX.35.DELAYGTY_CHANNEL2.DI_FS13
TCELL31:IMUX.IMUX.36.DELAYGTY_CHANNEL2.EVODDPHIDWREN_FS
TCELL31:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PMASCANENB_FS
TCELL31:IMUX.IMUX.38.DELAYGTY_CHANNEL2.SCANENB_FS
TCELL31:IMUX.IMUX.39.DELAYGTY_CHANNEL2.EVODDPHIDRDEN_FS
TCELL31:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PMASCANIN_FS0
TCELL31:IMUX.IMUX.41.DELAYGTY_CHANNEL2.DI_FS14
TCELL31:IMUX.IMUX.42.DELAYGTY_CHANNEL2.EVODDPHICALDONE_FS
TCELL31:IMUX.IMUX.43.DELAYGTY_CHANNEL2.RXTERMPROG_FS2
TCELL31:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TSTPWRDNOVRDB_FS
TCELL31:IMUX.IMUX.45.DELAYGTY_CHANNEL2.EVODDPHICALSTART_FS
TCELL31:IMUX.IMUX.46.DELAYGTY_CHANNEL2.RXTERMPROG_FS3
TCELL31:IMUX.IMUX.47.DELAYGTY_CHANNEL2.DI_FS15
TCELL32:OUT.0.TMINGTY_CHANNEL2.TXBUFSTATUS_SF0
TCELL32:OUT.1.TMINGTY_CHANNEL2.CPLFREQLOCK_SF
TCELL32:OUT.2.TMINGTY_CHANNEL2.SCANOUT_SF10
TCELL32:OUT.3.TMINGTY_CHANNEL2.BUFGTDIV_SF2
TCELL32:OUT.4.TMINGTY_CHANNEL2.SCANOUT_SF13
TCELL32:OUT.5.TMINGTY_CHANNEL2.BUFGTDIV_SF5
TCELL32:OUT.6.TMINGTY_CHANNEL2.TXOUTCLK_SF
TCELL32:OUT.7.TMINGTY_CHANNEL2.BUFGTDIV_SF8
TCELL32:OUT.8.TMINGTY_CHANNEL2.CPLREFLOSS_SF
TCELL32:OUT.9.TMINGTY_CHANNEL2.PINRSRVDAS_SF1
TCELL32:OUT.10.TMINGTY_CHANNEL2.SCANOUT_SF16
TCELL32:OUT.11.TMINGTY_CHANNEL2.TXOUTCLKPCS_SF
TCELL32:OUT.12.TMINGTY_CHANNEL2.RXPHALIGNERR_SF
TCELL32:OUT.13.TMINGTY_CHANNEL2.TXBUFSTATUS_SF1
TCELL32:OUT.14.TMINGTY_CHANNEL2.PMASCANOUT_SF10
TCELL32:OUT.15.TMINGTY_CHANNEL2.DMONOUT_SF12
TCELL32:OUT.16.TMINGTY_CHANNEL2.PMASCANOUT_SF7
TCELL32:OUT.17.TMINGTY_CHANNEL2.PCIESYNCTXSYNCDONE_SF
TCELL32:OUT.18.TMINGTY_CHANNEL2.CPLFBLOSS_SF
TCELL32:OUT.19.TMINGTY_CHANNEL2.DRPDO_SF12
TCELL32:OUT.20.TMINGTY_CHANNEL2.TCOINITDONE_SF
TCELL32:OUT.21.TMINGTY_CHANNEL2.DMONOUT_SF7
TCELL32:OUT.23.TMINGTY_CHANNEL2.SCANOUT_SF2
TCELL32:OUT.24.TMINGTY_CHANNEL2.TXPMARESETDONE_SF
TCELL32:OUT.25.TMINGTY_CHANNEL2.DRPDO_SF7
TCELL32:OUT.26.TMINGTY_CHANNEL2.DFEDOUT_SF2
TCELL32:OUT.27.TMINGTY_CHANNEL2.DMONOUT_SF2
TCELL32:OUT.28.TMINGTY_CHANNEL2.TXCOPIPHDONE_SF
TCELL32:OUT.29.TMINGTY_CHANNEL2.PMASCANOUT_SF2
TCELL32:OUT.30.TMINGTY_CHANNEL2.PINRSRVDAS_SF5
TCELL32:OUT.31.TMINGTY_CHANNEL2.DRPDO_SF2
TCELL32:IMUX.CTRL.0GTY_CHANNEL2.CFGRESETB_FS
TCELL32:IMUX.CTRL.5GTY_CHANNEL2.PMASCANCLK4B_FS
TCELL32:IMUX.CTRL.6GTY_CHANNEL2.PMASCANCLK5B_FS
TCELL32:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS0
TCELL32:IMUX.IMUX.1.DELAYGTY_CHANNEL2.SCANIN_FS13
TCELL32:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS64
TCELL32:IMUX.IMUX.3.DELAYGTY_CHANNEL2.LOOPBACK_FS0
TCELL32:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TXUSRRDY_FS
TCELL32:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS0
TCELL32:IMUX.IMUX.6.DELAYGTY_CHANNEL2.LOOPBACK_FS1
TCELL32:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TXRATEASYNCH_FS
TCELL32:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS65
TCELL32:IMUX.IMUX.9.DELAYGTY_CHANNEL2.LOOPBACK_FS2
TCELL32:IMUX.IMUX.10.DELAYGTY_CHANNEL2.TXDCCSRESET_FS
TCELL32:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS1
TCELL32:IMUX.IMUX.12.DELAYGTY_CHANNEL2.CPLPWRDN_FS
TCELL32:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TXEMPPRE_FS0
TCELL32:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS66
TCELL32:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS0
TCELL32:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TXEMPINVPR_FS
TCELL32:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS2
TCELL32:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS0
TCELL32:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TXPRBSINERR_FS
TCELL32:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS67
TCELL32:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS0
TCELL32:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TXEMPINVPO_FS
TCELL32:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS3
TCELL32:IMUX.IMUX.24.DELAYGTY_CHANNEL2.TXEMPPOS_FS0
TCELL32:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TXPOLARITY_FS
TCELL32:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS68
TCELL32:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXSERPWRDN_FS
TCELL32:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TXPWRDN_FS0
TCELL32:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS4
TCELL32:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS0
TCELL32:IMUX.IMUX.31.DELAYGTY_CHANNEL2.TXHEADER_FS1
TCELL32:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS69
TCELL32:IMUX.IMUX.33.DELAYGTY_CHANNEL2.STEPSIZEPPM_FS0
TCELL32:IMUX.IMUX.34.DELAYGTY_CHANNEL2.TXHEADER_FS0
TCELL32:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS5
TCELL32:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS8
TCELL32:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PMASCANIN_FS1
TCELL32:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS70
TCELL32:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS8
TCELL32:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PMASCANIN_FS2
TCELL32:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS6
TCELL32:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS0
TCELL32:IMUX.IMUX.43.DELAYGTY_CHANNEL2.RXTERMPROG_FS4
TCELL32:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS71
TCELL32:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS0
TCELL32:IMUX.IMUX.46.DELAYGTY_CHANNEL2.RXSIGVALDLY_FS0
TCELL32:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS7
TCELL33:OUT.0.TMINGTY_CHANNEL2.CFOKFORCEDONE_SF
TCELL33:OUT.2.TMINGTY_CHANNEL2.TXSYNCEN2SLV_SF
TCELL33:OUT.3.TMINGTY_CHANNEL2.PCIEUSERPHYSTATUSRST_SF
TCELL33:OUT.4.TMINGTY_CHANNEL2.TXRATEDONE_SF
TCELL33:OUT.5.TMINGTY_CHANNEL2.PCIEUSERGEN3RDY_SF
TCELL33:OUT.6.TMINGTY_CHANNEL2.CFOKDONE_SF
TCELL33:OUT.8.TMINGTY_CHANNEL2.TDASOFTRSTDONE_SF
TCELL33:OUT.9.TMINGTY_CHANNEL2.PINRSRVDAS_SF2
TCELL33:OUT.10.TMINGTY_CHANNEL2.SCANOUT_SF17
TCELL33:OUT.11.TMINGTY_CHANNEL2.TXLINKSYNCDONE_SF
TCELL33:OUT.12.TMINGTY_CHANNEL2.SCANOUT_SF18
TCELL33:OUT.13.TMINGTY_CHANNEL2.TXRESETDONE_SF
TCELL33:OUT.14.TMINGTY_CHANNEL2.PMASCANOUT_SF11
TCELL33:OUT.15.TMINGTY_CHANNEL2.DMONOUT_SF13
TCELL33:OUT.17.TMINGTY_CHANNEL2.CKOKDONE_SF
TCELL33:OUT.18.TMINGTY_CHANNEL2.TXDCCDONE_SF
TCELL33:OUT.19.TMINGTY_CHANNEL2.DRPDO_SF13
TCELL33:OUT.20.TMINGTY_CHANNEL2.RXCDRPHDONE_SF
TCELL33:OUT.21.TMINGTY_CHANNEL2.DMONOUT_SF8
TCELL33:OUT.23.TMINGTY_CHANNEL2.SCANOUT_SF3
TCELL33:OUT.24.TMINGTY_CHANNEL2.RATE_DRP_START_SF
TCELL33:OUT.25.TMINGTY_CHANNEL2.DRPDO_SF8
TCELL33:OUT.26.TMINGTY_CHANNEL2.DFEDOUT_SF3
TCELL33:OUT.27.TMINGTY_CHANNEL2.DMONOUT_SF3
TCELL33:OUT.29.TMINGTY_CHANNEL2.PMASCANOUT_SF3
TCELL33:OUT.30.TMINGTY_CHANNEL2.PINRSRVDAS_SF6
TCELL33:OUT.31.TMINGTY_CHANNEL2.DRPDO_SF3
TCELL33:IMUX.CTRL.0GTY_CHANNEL2.CPLRESETB_FS
TCELL33:IMUX.CTRL.5GTY_CHANNEL2.CPLLDMONCLKB_FS
TCELL33:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS1
TCELL33:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS72
TCELL33:IMUX.IMUX.3.DELAYGTY_CHANNEL2.CPLREFSELDYN_FS2
TCELL33:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TXSLVSYNCEN_FS
TCELL33:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS8
TCELL33:IMUX.IMUX.6.DELAYGTY_CHANNEL2.CPLREFSELDYN_FS1
TCELL33:IMUX.IMUX.7.DELAYGTY_CHANNEL2.RSTCLKENTX_FS
TCELL33:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS73
TCELL33:IMUX.IMUX.9.DELAYGTY_CHANNEL2.CPLREFSELDYN_FS0
TCELL33:IMUX.IMUX.10.DELAYGTY_CHANNEL2.TXPPMSEL_FS
TCELL33:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS9
TCELL33:IMUX.IMUX.12.DELAYGTY_CHANNEL2.CPLLKDETEN_FS
TCELL33:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TXEMPPRE_FS1
TCELL33:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS74
TCELL33:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS1
TCELL33:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TXPIPPMPWDN_FS
TCELL33:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS10
TCELL33:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS1
TCELL33:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TXPPMOVRDEN_FS
TCELL33:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS75
TCELL33:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS1
TCELL33:IMUX.IMUX.22.DELAYGTY_CHANNEL2.ENPPM_FS
TCELL33:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS11
TCELL33:IMUX.IMUX.24.DELAYGTY_CHANNEL2.TXEMPPOS_FS1
TCELL33:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TCOPIOVREN_FS
TCELL33:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS76
TCELL33:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXSYSCKSEL_FS0
TCELL33:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TXPWRDN_FS1
TCELL33:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS12
TCELL33:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS1
TCELL33:IMUX.IMUX.31.DELAYGTY_CHANNEL2.TXHEADER_FS3
TCELL33:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS77
TCELL33:IMUX.IMUX.33.DELAYGTY_CHANNEL2.STEPSIZEPPM_FS1
TCELL33:IMUX.IMUX.34.DELAYGTY_CHANNEL2.TXHEADER_FS2
TCELL33:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS13
TCELL33:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS9
TCELL33:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PMASCANIN_FS3
TCELL33:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS78
TCELL33:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS9
TCELL33:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PMASCANIN_FS4
TCELL33:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS14
TCELL33:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS1
TCELL33:IMUX.IMUX.43.DELAYGTY_CHANNEL2.RXSIGVALDLY_FS1
TCELL33:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS79
TCELL33:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS1
TCELL33:IMUX.IMUX.46.DELAYGTY_CHANNEL2.RXSIGVALDLY_FS2
TCELL33:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS15
TCELL34:OUT.0.TMINGTY_CHANNEL2.CFOKFSTARTED_SF
TCELL34:OUT.2.TMINGTY_CHANNEL2.RXPMARESETDONE_SF
TCELL34:OUT.3.TMINGTY_CHANNEL2.RXSLIPPMARDY_SF
TCELL34:OUT.4.TMINGTY_CHANNEL2.RXSYNCEN2SLV_SF
TCELL34:OUT.5.TMINGTY_CHANNEL2.RXSLIPOUTCLKRDY_SF
TCELL34:OUT.6.TMINGTY_CHANNEL2.CFOKSTART_SF
TCELL34:OUT.8.TMINGTY_CHANNEL2.RXCOPHDONE_SF
TCELL34:OUT.9.TMINGTY_CHANNEL2.PINRSRVDAS_SF3
TCELL34:OUT.10.TMINGTY_CHANNEL2.RXSLIPDONE_SF
TCELL34:OUT.11.TMINGTY_CHANNEL2.BUFGTRSTMASK_SF1
TCELL34:OUT.12.TMINGTY_CHANNEL2.RXSLIDERDY_SF
TCELL34:OUT.13.TMINGTY_CHANNEL2.RXLINKSYNCDONE_SF
TCELL34:OUT.14.TMINGTY_CHANNEL2.BUFGTRSTMASK_SF2
TCELL34:OUT.15.TMINGTY_CHANNEL2.DMONOUT_SF14
TCELL34:OUT.17.TMINGTY_CHANNEL2.TXPRGDIVRSTDONE_SF
TCELL34:OUT.18.TMINGTY_CHANNEL2.RESET_EXCEPTION_SF
TCELL34:OUT.19.TMINGTY_CHANNEL2.DRPDO_SF14
TCELL34:OUT.20.TMINGTY_CHANNEL2.RXPRGDIVRSTDONE_SF
TCELL34:OUT.21.TMINGTY_CHANNEL2.DMONOUT_SF9
TCELL34:OUT.22.TMINGTY_CHANNEL2.GTPOWERGOOD_SF
TCELL34:OUT.23.TMINGTY_CHANNEL2.SCANOUT_SF4
TCELL34:OUT.25.TMINGTY_CHANNEL2.DRPDO_SF9
TCELL34:OUT.26.TMINGTY_CHANNEL2.DFEDOUT_SF4
TCELL34:OUT.27.TMINGTY_CHANNEL2.DMONOUT_SF4
TCELL34:OUT.29.TMINGTY_CHANNEL2.PMASCANOUT_SF4
TCELL34:OUT.30.TMINGTY_CHANNEL2.PINRSRVDAS_SF7
TCELL34:OUT.31.TMINGTY_CHANNEL2.DRPDO_SF4
TCELL34:IMUX.CTRL.0GTY_CHANNEL2.GTTXRSTB_FS
TCELL34:IMUX.CTRL.4GTY_CHANNEL2.PMASCANCLK3B_FS
TCELL34:IMUX.CTRL.5GTY_CHANNEL2.PMASCANCLK2B_FS
TCELL34:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS2
TCELL34:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS80
TCELL34:IMUX.IMUX.3.DELAYGTY_CHANNEL2.TXOUTCKCTL_FS0
TCELL34:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TXMSTRSETPHDONE_FS
TCELL34:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS16
TCELL34:IMUX.IMUX.6.DELAYGTY_CHANNEL2.TXPREAMP_FS0
TCELL34:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TXDEEMPH_FS
TCELL34:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS81
TCELL34:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TXCOMWAKE_FS
TCELL34:IMUX.IMUX.10.DELAYGTY_CHANNEL2.TXCOMSAS_FS
TCELL34:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS17
TCELL34:IMUX.IMUX.12.DELAYGTY_CHANNEL2.TXDRVAMP_FS0
TCELL34:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TXEMPPRE_FS2
TCELL34:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS82
TCELL34:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS2
TCELL34:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TXCOMINIT_FS
TCELL34:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS18
TCELL34:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS2
TCELL34:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TXENC8B10BUSE_FS
TCELL34:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS83
TCELL34:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS2
TCELL34:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TXRATE_FS0
TCELL34:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS19
TCELL34:IMUX.IMUX.24.DELAYGTY_CHANNEL2.TXEMPPOS_FS2
TCELL34:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TXPRBSPTN_FS0
TCELL34:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS84
TCELL34:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXSYSCKSEL_FS1
TCELL34:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TXMARGIN_FS0
TCELL34:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS20
TCELL34:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS2
TCELL34:IMUX.IMUX.31.DELAYGTY_CHANNEL2.TXHEADER_FS5
TCELL34:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS85
TCELL34:IMUX.IMUX.33.DELAYGTY_CHANNEL2.STEPSIZEPPM_FS2
TCELL34:IMUX.IMUX.34.DELAYGTY_CHANNEL2.TXHEADER_FS4
TCELL34:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS21
TCELL34:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS10
TCELL34:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PMASCANIN_FS5
TCELL34:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS86
TCELL34:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS10
TCELL34:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PMASCANIN_FS6
TCELL34:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS22
TCELL34:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS2
TCELL34:IMUX.IMUX.43.DELAYGTY_CHANNEL2.RXSIGVALDLY_FS3
TCELL34:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS87
TCELL34:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS2
TCELL34:IMUX.IMUX.46.DELAYGTY_CHANNEL2.RXSIGVALDLY_FS4
TCELL34:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS23
TCELL35:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF64
TCELL35:OUT.2.TMINGTY_CHANNEL2.RXELECIDLE_SF
TCELL35:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF0
TCELL35:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF0
TCELL35:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF65
TCELL35:OUT.6.TMINGTY_CHANNEL2.RDASOFTRSTDONE_SF
TCELL35:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF1
TCELL35:OUT.8.TMINGTY_CHANNEL2.RXPRBSLOCKED_SF
TCELL35:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF66
TCELL35:OUT.10.TMINGTY_CHANNEL2.PCIERATEQPLLPD_SF0
TCELL35:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF2
TCELL35:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF0
TCELL35:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF67
TCELL35:OUT.14.TMINGTY_CHANNEL2.RXCHBONDO_SF0
TCELL35:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF3
TCELL35:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF0
TCELL35:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF68
TCELL35:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF0
TCELL35:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF4
TCELL35:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF8
TCELL35:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF69
TCELL35:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF0
TCELL35:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF5
TCELL35:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF8
TCELL35:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF70
TCELL35:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF0
TCELL35:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF6
TCELL35:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF8
TCELL35:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF71
TCELL35:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF0
TCELL35:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF7
TCELL35:IMUX.CTRL.0GTY_CHANNEL2.TXPROGDIVRESETB_FS
TCELL35:IMUX.CTRL.4GTY_CHANNEL2.TXUSRCLK2B_FS
TCELL35:IMUX.CTRL.5GTY_CHANNEL2.TXUSRCLKB_FS
TCELL35:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS3
TCELL35:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS88
TCELL35:IMUX.IMUX.3.DELAYGTY_CHANNEL2.TXOUTCKCTL_FS1
TCELL35:IMUX.IMUX.4.DELAYGTY_CHANNEL2.PCIERSTTXSYNCSTART_FS
TCELL35:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS24
TCELL35:IMUX.IMUX.6.DELAYGTY_CHANNEL2.TXPREAMP_FS1
TCELL35:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TXCODAALGNEN_FS
TCELL35:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS89
TCELL35:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TCODABYPASS_FS
TCELL35:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS25
TCELL35:IMUX.IMUX.12.DELAYGTY_CHANNEL2.TXDRVAMP_FS1
TCELL35:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TXEMPPRE_FS3
TCELL35:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS90
TCELL35:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS3
TCELL35:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TXDRVPWRDN_FS
TCELL35:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS26
TCELL35:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS3
TCELL35:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TXDETECTRX_FS
TCELL35:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS91
TCELL35:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS3
TCELL35:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TXRATE_FS1
TCELL35:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS27
TCELL35:IMUX.IMUX.24.DELAYGTY_CHANNEL2.TXEMPPOS_FS3
TCELL35:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TXPRBSPTN_FS1
TCELL35:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS92
TCELL35:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXPLLCKSEL_FS0
TCELL35:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TXMARGIN_FS1
TCELL35:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS28
TCELL35:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS3
TCELL35:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS93
TCELL35:IMUX.IMUX.33.DELAYGTY_CHANNEL2.STEPSIZEPPM_FS3
TCELL35:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS29
TCELL35:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS11
TCELL35:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS0
TCELL35:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS94
TCELL35:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS11
TCELL35:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS1
TCELL35:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS30
TCELL35:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS3
TCELL35:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS0
TCELL35:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS95
TCELL35:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS3
TCELL35:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS1
TCELL35:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS31
TCELL36:OUT.0.TMINGTY_CHANNEL2.COMFINISH_SF
TCELL36:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF72
TCELL36:OUT.2.TMINGTY_CHANNEL2.RXBYTEREALIGN_SF
TCELL36:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF8
TCELL36:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF1
TCELL36:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF73
TCELL36:OUT.6.TMINGTY_CHANNEL2.CDRLOCK_SF
TCELL36:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF9
TCELL36:OUT.8.TMINGTY_CHANNEL2.RXRECCLK_SF
TCELL36:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF74
TCELL36:OUT.10.TMINGTY_CHANNEL2.PCIERATEQPLLPD_SF1
TCELL36:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF10
TCELL36:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF1
TCELL36:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF75
TCELL36:OUT.14.TMINGTY_CHANNEL2.RXCHBONDO_SF1
TCELL36:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF11
TCELL36:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF1
TCELL36:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF76
TCELL36:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF1
TCELL36:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF12
TCELL36:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF9
TCELL36:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF77
TCELL36:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF1
TCELL36:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF13
TCELL36:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF9
TCELL36:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF78
TCELL36:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF1
TCELL36:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF14
TCELL36:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF9
TCELL36:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF79
TCELL36:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF1
TCELL36:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF15
TCELL36:IMUX.CTRL.0GTY_CHANNEL2.TXPMARESETB_FS
TCELL36:IMUX.CTRL.4GTY_CHANNEL2.TXLATCLKB_FS
TCELL36:IMUX.CTRL.5GTY_CHANNEL2.TCOCLKFSMFROUTB_FS
TCELL36:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS4
TCELL36:IMUX.IMUX.1.DELAYGTY_CHANNEL2.TXPRBSPTN_FS3
TCELL36:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS96
TCELL36:IMUX.IMUX.3.DELAYGTY_CHANNEL2.TXOUTCKCTL_FS2
TCELL36:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TX_EL_FORCE_START_FS
TCELL36:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS32
TCELL36:IMUX.IMUX.6.DELAYGTY_CHANNEL2.TXPREAMP_FS2
TCELL36:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS97
TCELL36:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TDASOFTRESET_FS
TCELL36:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS33
TCELL36:IMUX.IMUX.12.DELAYGTY_CHANNEL2.TXDRVAMP_FS2
TCELL36:IMUX.IMUX.13.DELAYGTY_CHANNEL2.TXEMPPRE_FS4
TCELL36:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS98
TCELL36:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS4
TCELL36:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TCODAOVREN_FS
TCELL36:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS34
TCELL36:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS4
TCELL36:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TCOHOLDFROUT_FS
TCELL36:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS99
TCELL36:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS4
TCELL36:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TXRATE_FS2
TCELL36:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS35
TCELL36:IMUX.IMUX.24.DELAYGTY_CHANNEL2.TXEMPPOS_FS4
TCELL36:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TXPRBSPTN_FS2
TCELL36:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS100
TCELL36:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXPLLCKSEL_FS1
TCELL36:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TXMARGIN_FS2
TCELL36:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS36
TCELL36:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS4
TCELL36:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS101
TCELL36:IMUX.IMUX.33.DELAYGTY_CHANNEL2.STEPSIZEPPM_FS4
TCELL36:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS37
TCELL36:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS12
TCELL36:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS2
TCELL36:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS102
TCELL36:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS12
TCELL36:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS3
TCELL36:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS38
TCELL36:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS4
TCELL36:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS2
TCELL36:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS103
TCELL36:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS4
TCELL36:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS3
TCELL36:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS39
TCELL37:OUT.0.TMINGTY_CHANNEL2.PHYSTATUS_SF
TCELL37:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF80
TCELL37:OUT.2.TMINGTY_CHANNEL2.RXBYTEISALIGNED_SF
TCELL37:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF16
TCELL37:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF2
TCELL37:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF81
TCELL37:OUT.6.TMINGTY_CHANNEL2.RXBUFSTATUS_SF0
TCELL37:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF17
TCELL37:OUT.8.TMINGTY_CHANNEL2.RXRECCLKPCS_SF
TCELL37:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF82
TCELL37:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF18
TCELL37:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF2
TCELL37:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF83
TCELL37:OUT.14.TMINGTY_CHANNEL2.RXCHBONDO_SF2
TCELL37:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF19
TCELL37:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF2
TCELL37:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF84
TCELL37:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF2
TCELL37:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF20
TCELL37:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF10
TCELL37:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF85
TCELL37:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF2
TCELL37:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF21
TCELL37:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF10
TCELL37:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF86
TCELL37:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF2
TCELL37:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF22
TCELL37:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF10
TCELL37:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF87
TCELL37:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF2
TCELL37:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF23
TCELL37:IMUX.CTRL.0GTY_CHANNEL2.DFERESETB_FS
TCELL37:IMUX.CTRL.5GTY_CHANNEL2.SCANCLKB_FS
TCELL37:IMUX.CTRL.7GTY_CHANNEL2.RXOOBRESETB_FS
TCELL37:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS5
TCELL37:IMUX.IMUX.1.DELAYGTY_CHANNEL2.RESETOVRD_FS
TCELL37:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS104
TCELL37:IMUX.IMUX.3.DELAYGTY_CHANNEL2.TXDRVAMP_FS4
TCELL37:IMUX.IMUX.4.DELAYGTY_CHANNEL2.TXDCCSTART_FS
TCELL37:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS40
TCELL37:IMUX.IMUX.7.DELAYGTY_CHANNEL2.TCODARESET_FS
TCELL37:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS105
TCELL37:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TCODAPWDN_FS
TCELL37:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS41
TCELL37:IMUX.IMUX.12.DELAYGTY_CHANNEL2.TXDRVAMP_FS3
TCELL37:IMUX.IMUX.13.DELAYGTY_CHANNEL2.RATE_DRP_DONE_EXT_FS
TCELL37:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS106
TCELL37:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS5
TCELL37:IMUX.IMUX.16.DELAYGTY_CHANNEL2.TXCOPIALGNEN_FS
TCELL37:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS42
TCELL37:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS5
TCELL37:IMUX.IMUX.19.DELAYGTY_CHANNEL2.TXCOPISETPHS_FS
TCELL37:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS107
TCELL37:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS5
TCELL37:IMUX.IMUX.22.DELAYGTY_CHANNEL2.TXPDOWNASYNCH_FS
TCELL37:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS43
TCELL37:IMUX.IMUX.25.DELAYGTY_CHANNEL2.TXINHIBIT_FS
TCELL37:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS108
TCELL37:IMUX.IMUX.27.DELAYGTY_CHANNEL2.TXELECIDLE_FS
TCELL37:IMUX.IMUX.28.DELAYGTY_CHANNEL2.TCOUPDNFROUT_FS
TCELL37:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS44
TCELL37:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS5
TCELL37:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS109
TCELL37:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXENCHANSYNC_FS
TCELL37:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS45
TCELL37:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS13
TCELL37:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS4
TCELL37:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS110
TCELL37:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS13
TCELL37:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS5
TCELL37:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS46
TCELL37:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS5
TCELL37:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS4
TCELL37:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS111
TCELL37:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS5
TCELL37:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS5
TCELL37:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS47
TCELL38:OUT.0.TMINGTY_CHANNEL2.COMINITDET_SF
TCELL38:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF88
TCELL38:OUT.2.TMINGTY_CHANNEL2.RXCKCORCNT_SF0
TCELL38:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF24
TCELL38:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF3
TCELL38:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF89
TCELL38:OUT.6.TMINGTY_CHANNEL2.RXBUFSTATUS_SF1
TCELL38:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF25
TCELL38:OUT.8.TMINGTY_CHANNEL2.RXDATAVALID_SF0
TCELL38:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF90
TCELL38:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF26
TCELL38:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF3
TCELL38:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF91
TCELL38:OUT.14.TMINGTY_CHANNEL2.RXCHBONDO_SF3
TCELL38:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF27
TCELL38:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF3
TCELL38:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF92
TCELL38:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF3
TCELL38:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF28
TCELL38:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF11
TCELL38:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF93
TCELL38:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF3
TCELL38:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF29
TCELL38:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF11
TCELL38:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF94
TCELL38:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF3
TCELL38:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF30
TCELL38:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF11
TCELL38:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF95
TCELL38:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF3
TCELL38:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF31
TCELL38:IMUX.CTRL.0GTY_CHANNEL2.CDRFRRESETB_FS
TCELL38:IMUX.CTRL.4GTY_CHANNEL2.TSTCLK1B_FS
TCELL38:IMUX.CTRL.5GTY_CHANNEL2.TSTCLK0B_FS
TCELL38:IMUX.CTRL.7GTY_CHANNEL2.RXPMARESETB_FS
TCELL38:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS6
TCELL38:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS112
TCELL38:IMUX.IMUX.3.DELAYGTY_CHANNEL2.GATERXELECIDLE_FS0
TCELL38:IMUX.IMUX.4.DELAYGTY_CHANNEL2.RXSYSCKSEL_FS1
TCELL38:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS48
TCELL38:IMUX.IMUX.6.DELAYGTY_CHANNEL2.TXSYNCFSMMASTER_FS
TCELL38:IMUX.IMUX.7.DELAYGTY_CHANNEL2.GATERXELECIDLE_FS1
TCELL38:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS113
TCELL38:IMUX.IMUX.9.DELAYGTY_CHANNEL2.TXRESET_FS
TCELL38:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS49
TCELL38:IMUX.IMUX.12.DELAYGTY_CHANNEL2.PRBSCNTRST_FS
TCELL38:IMUX.IMUX.13.DELAYGTY_CHANNEL2.RXPOLARITY_FS
TCELL38:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS114
TCELL38:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS6
TCELL38:IMUX.IMUX.16.DELAYGTY_CHANNEL2.RCOOVREN_FS
TCELL38:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS50
TCELL38:IMUX.IMUX.18.DELAYGTY_CHANNEL2.TXEMPMAIN_FS6
TCELL38:IMUX.IMUX.19.DELAYGTY_CHANNEL2.RCODAPWDN_FS
TCELL38:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS115
TCELL38:IMUX.IMUX.21.DELAYGTY_CHANNEL2.TXSEQUENCE_FS6
TCELL38:IMUX.IMUX.22.DELAYGTY_CHANNEL2.RXCOALGNEN_FS
TCELL38:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS51
TCELL38:IMUX.IMUX.24.DELAYGTY_CHANNEL2.RXCOSETPHS_FS
TCELL38:IMUX.IMUX.25.DELAYGTY_CHANNEL2.RXENPCOMMAALIGN_FS
TCELL38:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS116
TCELL38:IMUX.IMUX.28.DELAYGTY_CHANNEL2.RXOUTCKCTL_FS0
TCELL38:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS52
TCELL38:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS6
TCELL38:IMUX.IMUX.31.DELAYGTY_CHANNEL2.CDRHOLD_FS
TCELL38:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS117
TCELL38:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXCHBONDMASTER_FS
TCELL38:IMUX.IMUX.34.DELAYGTY_CHANNEL2.TCOINITSET_FS
TCELL38:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS53
TCELL38:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS14
TCELL38:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS6
TCELL38:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS118
TCELL38:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS14
TCELL38:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS7
TCELL38:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS54
TCELL38:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS6
TCELL38:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS6
TCELL38:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS119
TCELL38:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS6
TCELL38:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS7
TCELL38:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS55
TCELL39:OUT.0.TMINGTY_CHANNEL2.RXCOMMADET_SF
TCELL39:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF96
TCELL39:OUT.2.TMINGTY_CHANNEL2.RXCKCORCNT_SF1
TCELL39:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF32
TCELL39:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF4
TCELL39:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF97
TCELL39:OUT.6.TMINGTY_CHANNEL2.RXBUFSTATUS_SF2
TCELL39:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF33
TCELL39:OUT.8.TMINGTY_CHANNEL2.RXDATAVALID_SF1
TCELL39:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF98
TCELL39:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF34
TCELL39:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF4
TCELL39:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF99
TCELL39:OUT.14.TMINGTY_CHANNEL2.RXCHBONDO_SF4
TCELL39:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF35
TCELL39:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF4
TCELL39:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF100
TCELL39:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF4
TCELL39:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF36
TCELL39:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF12
TCELL39:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF101
TCELL39:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF4
TCELL39:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF37
TCELL39:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF12
TCELL39:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF102
TCELL39:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF4
TCELL39:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF38
TCELL39:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF12
TCELL39:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF103
TCELL39:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF4
TCELL39:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF39
TCELL39:IMUX.CTRL.0GTY_CHANNEL2.GTRXRSTB_FS
TCELL39:IMUX.CTRL.4GTY_CHANNEL2.RXUSRCLK2B_FS
TCELL39:IMUX.CTRL.5GTY_CHANNEL2.RXUSRCLKB_FS
TCELL39:IMUX.CTRL.7GTY_CHANNEL2.RCODARESETB_FS
TCELL39:IMUX.IMUX.0.DELAYGTY_CHANNEL2.TXCHARISK_FS7
TCELL39:IMUX.IMUX.1.DELAYGTY_CHANNEL2.TXSWING_FS
TCELL39:IMUX.IMUX.2.DELAYGTY_CHANNEL2.TXDATA_FS120
TCELL39:IMUX.IMUX.4.DELAYGTY_CHANNEL2.RXPLLCKSEL_FS0
TCELL39:IMUX.IMUX.5.DELAYGTY_CHANNEL2.TXDATA_FS56
TCELL39:IMUX.IMUX.7.DELAYGTY_CHANNEL2.SCANIN_FS14
TCELL39:IMUX.IMUX.8.DELAYGTY_CHANNEL2.TXDATA_FS121
TCELL39:IMUX.IMUX.10.DELAYGTY_CHANNEL2.SCANIN_FS15
TCELL39:IMUX.IMUX.11.DELAYGTY_CHANNEL2.TXDATA_FS57
TCELL39:IMUX.IMUX.13.DELAYGTY_CHANNEL2.RXRESET_FS
TCELL39:IMUX.IMUX.14.DELAYGTY_CHANNEL2.TXDATA_FS122
TCELL39:IMUX.IMUX.15.DELAYGTY_CHANNEL2.TXBYPASS8B10B_FS7
TCELL39:IMUX.IMUX.16.DELAYGTY_CHANNEL2.OSOVREN_FS
TCELL39:IMUX.IMUX.17.DELAYGTY_CHANNEL2.TXDATA_FS58
TCELL39:IMUX.IMUX.18.DELAYGTY_CHANNEL2.RXRATE_FS0
TCELL39:IMUX.IMUX.19.DELAYGTY_CHANNEL2.DFECFOKOVREN_FS
TCELL39:IMUX.IMUX.20.DELAYGTY_CHANNEL2.TXDATA_FS123
TCELL39:IMUX.IMUX.21.DELAYGTY_CHANNEL2.RXRATE_FS1
TCELL39:IMUX.IMUX.22.DELAYGTY_CHANNEL2.DFECFOKFPULSE_FS
TCELL39:IMUX.IMUX.23.DELAYGTY_CHANNEL2.TXDATA_FS59
TCELL39:IMUX.IMUX.24.DELAYGTY_CHANNEL2.RXRATE_FS2
TCELL39:IMUX.IMUX.25.DELAYGTY_CHANNEL2.DFECFOKFEN_FS
TCELL39:IMUX.IMUX.26.DELAYGTY_CHANNEL2.TXDATA_FS124
TCELL39:IMUX.IMUX.27.DELAYGTY_CHANNEL2.RXSYSCKSEL_FS0
TCELL39:IMUX.IMUX.28.DELAYGTY_CHANNEL2.RXOUTCKCTL_FS1
TCELL39:IMUX.IMUX.29.DELAYGTY_CHANNEL2.TXDATA_FS60
TCELL39:IMUX.IMUX.30.DELAYGTY_CHANNEL2.TXDATAEXTENDRSVD_FS7
TCELL39:IMUX.IMUX.31.DELAYGTY_CHANNEL2.CDROVREN_FS
TCELL39:IMUX.IMUX.32.DELAYGTY_CHANNEL2.TXDATA_FS125
TCELL39:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXCHBONDSLAVE_FS
TCELL39:IMUX.IMUX.34.DELAYGTY_CHANNEL2.RXOUTCKCTL_FS2
TCELL39:IMUX.IMUX.35.DELAYGTY_CHANNEL2.TXDATA_FS61
TCELL39:IMUX.IMUX.36.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS15
TCELL39:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS8
TCELL39:IMUX.IMUX.38.DELAYGTY_CHANNEL2.TXDATA_FS126
TCELL39:IMUX.IMUX.39.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS15
TCELL39:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS9
TCELL39:IMUX.IMUX.41.DELAYGTY_CHANNEL2.TXDATA_FS62
TCELL39:IMUX.IMUX.42.DELAYGTY_CHANNEL2.TXCHARDISPVAL_FS7
TCELL39:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS8
TCELL39:IMUX.IMUX.44.DELAYGTY_CHANNEL2.TXDATA_FS127
TCELL39:IMUX.IMUX.45.DELAYGTY_CHANNEL2.TXCHARDISPMODE_FS7
TCELL39:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS9
TCELL39:IMUX.IMUX.47.DELAYGTY_CHANNEL2.TXDATA_FS63
TCELL40:OUT.0.TMINGTY_CHANNEL2.COMSASDET_SF
TCELL40:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF104
TCELL40:OUT.2.TMINGTY_CHANNEL2.RXCHANBONDSEQ_SF
TCELL40:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF40
TCELL40:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF5
TCELL40:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF105
TCELL40:OUT.6.TMINGTY_CHANNEL2.RXRATEDONE_SF
TCELL40:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF41
TCELL40:OUT.8.TMINGTY_CHANNEL2.RXHEADERVALID_SF0
TCELL40:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF106
TCELL40:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF42
TCELL40:OUT.12.TMINGTY_CHANNEL2.RXHEADER_SF5
TCELL40:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF107
TCELL40:OUT.14.TMINGTY_CHANNEL2.RXSTATUS_SF0
TCELL40:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF43
TCELL40:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF5
TCELL40:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF108
TCELL40:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF5
TCELL40:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF44
TCELL40:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF13
TCELL40:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF109
TCELL40:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF5
TCELL40:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF45
TCELL40:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF13
TCELL40:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF110
TCELL40:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF5
TCELL40:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF46
TCELL40:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF13
TCELL40:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF111
TCELL40:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF5
TCELL40:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF47
TCELL40:IMUX.CTRL.0GTY_CHANNEL2.RXBUFRSTB_FS
TCELL40:IMUX.CTRL.4GTY_CHANNEL2.PMASCANCLK1B_FS
TCELL40:IMUX.CTRL.5GTY_CHANNEL2.PMASCANCLK0B_FS
TCELL40:IMUX.CTRL.7GTY_CHANNEL2.RXPROGDIVRESETB_FS
TCELL40:IMUX.IMUX.1.DELAYGTY_CHANNEL2.SCANIN_FS16
TCELL40:IMUX.IMUX.2.DELAYGTY_CHANNEL2.CKOKRESET_FS
TCELL40:IMUX.IMUX.3.DELAYGTY_CHANNEL2.LOOPRSVD_FS0
TCELL40:IMUX.IMUX.4.DELAYGTY_CHANNEL2.RXPLLCKSEL_FS1
TCELL40:IMUX.IMUX.5.DELAYGTY_CHANNEL2.RX_POST_DCC_START_FS
TCELL40:IMUX.IMUX.6.DELAYGTY_CHANNEL2.LOOPRSVD_FS3
TCELL40:IMUX.IMUX.7.DELAYGTY_CHANNEL2.DFEH2HOLD_FS
TCELL40:IMUX.IMUX.9.DELAYGTY_CHANNEL2.LOOPRSVD_FS6
TCELL40:IMUX.IMUX.10.DELAYGTY_CHANNEL2.DFEH2OVREN_FS
TCELL40:IMUX.IMUX.11.DELAYGTY_CHANNEL2.DFECFOKHOLD_FS
TCELL40:IMUX.IMUX.12.DELAYGTY_CHANNEL2.RXCOMMADETUSE_FS
TCELL40:IMUX.IMUX.13.DELAYGTY_CHANNEL2.DFEH5HOLD_FS
TCELL40:IMUX.IMUX.14.DELAYGTY_CHANNEL2.LOOPRSVD_FS9
TCELL40:IMUX.IMUX.15.DELAYGTY_CHANNEL2.RXCHBONDI_FS0
TCELL40:IMUX.IMUX.16.DELAYGTY_CHANNEL2.DFEH5OVREN_FS
TCELL40:IMUX.IMUX.17.DELAYGTY_CHANNEL2.AFECFOKEN_FS
TCELL40:IMUX.IMUX.18.DELAYGTY_CHANNEL2.RXCHBONDI_FS1
TCELL40:IMUX.IMUX.19.DELAYGTY_CHANNEL2.DFEH8HOLD_FS
TCELL40:IMUX.IMUX.21.DELAYGTY_CHANNEL2.RXCHBONDI_FS2
TCELL40:IMUX.IMUX.22.DELAYGTY_CHANNEL2.DFEH8OVREN_FS
TCELL40:IMUX.IMUX.23.DELAYGTY_CHANNEL2.OSHOLD_FS
TCELL40:IMUX.IMUX.24.DELAYGTY_CHANNEL2.RXCHBONDI_FS3
TCELL40:IMUX.IMUX.25.DELAYGTY_CHANNEL2.DFEH11HOLD_FS
TCELL40:IMUX.IMUX.27.DELAYGTY_CHANNEL2.RXCHBONDI_FS4
TCELL40:IMUX.IMUX.28.DELAYGTY_CHANNEL2.DFEH11OVREN_FS
TCELL40:IMUX.IMUX.29.DELAYGTY_CHANNEL2.CFOKRESET_FS
TCELL40:IMUX.IMUX.30.DELAYGTY_CHANNEL2.RXENMCOMMAALIGN_FS
TCELL40:IMUX.IMUX.31.DELAYGTY_CHANNEL2.DFEH14HOLD_FS
TCELL40:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXSLIDE_FS
TCELL40:IMUX.IMUX.34.DELAYGTY_CHANNEL2.DFEH14OVREN_FS
TCELL40:IMUX.IMUX.36.DELAYGTY_CHANNEL2.RXRATEASYNCH_FS
TCELL40:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS10
TCELL40:IMUX.IMUX.38.DELAYGTY_CHANNEL2.DFEKLOVREN_FS
TCELL40:IMUX.IMUX.39.DELAYGTY_CHANNEL2.DFEUTOVREN_FS
TCELL40:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS11
TCELL40:IMUX.IMUX.41.DELAYGTY_CHANNEL2.DFEKLHOLD_FS
TCELL40:IMUX.IMUX.42.DELAYGTY_CHANNEL2.DFEUTHOLD_FS
TCELL40:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS10
TCELL40:IMUX.IMUX.44.DELAYGTY_CHANNEL2.DFEGCOVREN_FS
TCELL40:IMUX.IMUX.45.DELAYGTY_CHANNEL2.DFEVSEN_FS
TCELL40:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS11
TCELL40:IMUX.IMUX.47.DELAYGTY_CHANNEL2.DFEGCHOLD_FS
TCELL41:OUT.0.TMINGTY_CHANNEL2.COMWAKEDET_SF
TCELL41:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF112
TCELL41:OUT.2.TMINGTY_CHANNEL2.RXCHISALIGNED_SF
TCELL41:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF48
TCELL41:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF6
TCELL41:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF113
TCELL41:OUT.6.TMINGTY_CHANNEL2.RXSTARTOFSEQ_SF0
TCELL41:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF49
TCELL41:OUT.8.TMINGTY_CHANNEL2.RXHEADERVALID_SF1
TCELL41:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF114
TCELL41:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF50
TCELL41:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF115
TCELL41:OUT.14.TMINGTY_CHANNEL2.RXSTATUS_SF1
TCELL41:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF51
TCELL41:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF6
TCELL41:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF116
TCELL41:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF6
TCELL41:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF52
TCELL41:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF14
TCELL41:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF117
TCELL41:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF6
TCELL41:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF53
TCELL41:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF14
TCELL41:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF118
TCELL41:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF6
TCELL41:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF54
TCELL41:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF14
TCELL41:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF119
TCELL41:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF6
TCELL41:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF55
TCELL41:IMUX.CTRL.0GTY_CHANNEL2.CDRPHRESETB_FS
TCELL41:IMUX.CTRL.4GTY_CHANNEL2.RXLATCLKB_FS
TCELL41:IMUX.CTRL.5GTY_CHANNEL2.ALT_SIGVALID_CLKB_FS
TCELL41:IMUX.CTRL.7GTY_CHANNEL2.RXDASOFTRESETB_FS
TCELL41:IMUX.IMUX.1.DELAYGTY_CHANNEL2.SCANIN_FS17
TCELL41:IMUX.IMUX.2.DELAYGTY_CHANNEL2.RXCHBONDLEVEL_FS0
TCELL41:IMUX.IMUX.3.DELAYGTY_CHANNEL2.LOOPRSVD_FS1
TCELL41:IMUX.IMUX.4.DELAYGTY_CHANNEL2.RXPWRDN_FS0
TCELL41:IMUX.IMUX.5.DELAYGTY_CHANNEL2.RXCHBONDLEVEL_FS1
TCELL41:IMUX.IMUX.6.DELAYGTY_CHANNEL2.LOOPRSVD_FS4
TCELL41:IMUX.IMUX.7.DELAYGTY_CHANNEL2.DFEH3HOLD_FS
TCELL41:IMUX.IMUX.8.DELAYGTY_CHANNEL2.RXCHBONDLEVEL_FS2
TCELL41:IMUX.IMUX.9.DELAYGTY_CHANNEL2.LOOPRSVD_FS7
TCELL41:IMUX.IMUX.10.DELAYGTY_CHANNEL2.DFEH3OVREN_FS
TCELL41:IMUX.IMUX.12.DELAYGTY_CHANNEL2.LPMOSHOLD_FS
TCELL41:IMUX.IMUX.13.DELAYGTY_CHANNEL2.DFEH6HOLD_FS
TCELL41:IMUX.IMUX.14.DELAYGTY_CHANNEL2.LOOPRSVD_FS10
TCELL41:IMUX.IMUX.16.DELAYGTY_CHANNEL2.DFEH6OVREN_FS
TCELL41:IMUX.IMUX.17.DELAYGTY_CHANNEL2.LOOPRSVD_FS11
TCELL41:IMUX.IMUX.19.DELAYGTY_CHANNEL2.DFEH9HOLD_FS
TCELL41:IMUX.IMUX.20.DELAYGTY_CHANNEL2.LPMOSOVREN_FS
TCELL41:IMUX.IMUX.21.DELAYGTY_CHANNEL2.LOOPRSVD_FS12
TCELL41:IMUX.IMUX.22.DELAYGTY_CHANNEL2.DFEH9OVREN_FS
TCELL41:IMUX.IMUX.23.DELAYGTY_CHANNEL2.RXSYNCFSMMASTER_FS
TCELL41:IMUX.IMUX.25.DELAYGTY_CHANNEL2.DFEH12HOLD_FS
TCELL41:IMUX.IMUX.26.DELAYGTY_CHANNEL2.RXSLVSYNCEN_FS
TCELL41:IMUX.IMUX.28.DELAYGTY_CHANNEL2.DFEH12OVREN_FS
TCELL41:IMUX.IMUX.29.DELAYGTY_CHANNEL2.RXUSRRDY_FS
TCELL41:IMUX.IMUX.30.DELAYGTY_CHANNEL2.LPMKHOVREN_FS
TCELL41:IMUX.IMUX.31.DELAYGTY_CHANNEL2.DFEH15HOLD_FS
TCELL41:IMUX.IMUX.32.DELAYGTY_CHANNEL2.RXLPMEN_FS
TCELL41:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXGEARBOXSLIP_FS
TCELL41:IMUX.IMUX.34.DELAYGTY_CHANNEL2.DFEH15OVREN_FS
TCELL41:IMUX.IMUX.35.DELAYGTY_CHANNEL2.RXMSTRSETPHDONE_FS
TCELL41:IMUX.IMUX.36.DELAYGTY_CHANNEL2.RXDEC8B10BUSE_FS
TCELL41:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS12
TCELL41:IMUX.IMUX.38.DELAYGTY_CHANNEL2.DFEDOUTMODE_FS0
TCELL41:IMUX.IMUX.39.DELAYGTY_CHANNEL2.DFEVPOVREN_FS
TCELL41:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS13
TCELL41:IMUX.IMUX.41.DELAYGTY_CHANNEL2.PCIERSTIDLE_FS
TCELL41:IMUX.IMUX.42.DELAYGTY_CHANNEL2.DFEVPHOLD_FS
TCELL41:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS12
TCELL41:IMUX.IMUX.44.DELAYGTY_CHANNEL2.DFEDOUTMODE_FS1
TCELL41:IMUX.IMUX.45.DELAYGTY_CHANNEL2.DFEYEN_FS
TCELL41:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS13
TCELL42:OUT.0.TMINGTY_CHANNEL2.RXVALID_SF
TCELL42:OUT.1.TMINGTY_CHANNEL2.RXDATA_SF120
TCELL42:OUT.2.TMINGTY_CHANNEL2.RXCHANREALIGN_SF
TCELL42:OUT.3.TMINGTY_CHANNEL2.RXDATA_SF56
TCELL42:OUT.4.TMINGTY_CHANNEL2.RXDATAEXTENDRSVD_SF7
TCELL42:OUT.5.TMINGTY_CHANNEL2.RXDATA_SF121
TCELL42:OUT.6.TMINGTY_CHANNEL2.RXSTARTOFSEQ_SF1
TCELL42:OUT.7.TMINGTY_CHANNEL2.RXDATA_SF57
TCELL42:OUT.8.TMINGTY_CHANNEL2.RXPRBSERR_SF
TCELL42:OUT.9.TMINGTY_CHANNEL2.RXDATA_SF122
TCELL42:OUT.10.TMINGTY_CHANNEL2.RXRESETDONE_SF
TCELL42:OUT.11.TMINGTY_CHANNEL2.RXDATA_SF58
TCELL42:OUT.13.TMINGTY_CHANNEL2.RXDATA_SF123
TCELL42:OUT.14.TMINGTY_CHANNEL2.RXSTATUS_SF2
TCELL42:OUT.15.TMINGTY_CHANNEL2.RXDATA_SF59
TCELL42:OUT.16.TMINGTY_CHANNEL2.RXNOTINTABLE_SF7
TCELL42:OUT.17.TMINGTY_CHANNEL2.RXDATA_SF124
TCELL42:OUT.18.TMINGTY_CHANNEL2.RXCHARISCOMMA_SF7
TCELL42:OUT.19.TMINGTY_CHANNEL2.RXDATA_SF60
TCELL42:OUT.20.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF15
TCELL42:OUT.21.TMINGTY_CHANNEL2.RXDATA_SF125
TCELL42:OUT.22.TMINGTY_CHANNEL2.PCS_RSVD_OUT_SF7
TCELL42:OUT.23.TMINGTY_CHANNEL2.RXDATA_SF61
TCELL42:OUT.24.TMINGTY_CHANNEL2.RXCHARISK_SF15
TCELL42:OUT.25.TMINGTY_CHANNEL2.RXDATA_SF126
TCELL42:OUT.26.TMINGTY_CHANNEL2.RXCHARISK_SF7
TCELL42:OUT.27.TMINGTY_CHANNEL2.RXDATA_SF62
TCELL42:OUT.28.TMINGTY_CHANNEL2.RXDISPERR_SF15
TCELL42:OUT.29.TMINGTY_CHANNEL2.RXDATA_SF127
TCELL42:OUT.30.TMINGTY_CHANNEL2.RXDISPERR_SF7
TCELL42:OUT.31.TMINGTY_CHANNEL2.RXDATA_SF63
TCELL42:IMUX.CTRL.0GTY_CHANNEL2.CDRRESETB_FS
TCELL42:IMUX.CTRL.4GTY_CHANNEL2.CKPINRSRVD1B_FS
TCELL42:IMUX.CTRL.5GTY_CHANNEL2.CKPINRSRVD0B_FS
TCELL42:IMUX.IMUX.0.DELAYGTY_CHANNEL2.RXPRBSPTN_FS3
TCELL42:IMUX.IMUX.1.DELAYGTY_CHANNEL2.SCANIN_FS18
TCELL42:IMUX.IMUX.2.DELAYGTY_CHANNEL2.RXPRBSPTN_FS0
TCELL42:IMUX.IMUX.3.DELAYGTY_CHANNEL2.LOOPRSVD_FS2
TCELL42:IMUX.IMUX.4.DELAYGTY_CHANNEL2.RXPWRDN_FS1
TCELL42:IMUX.IMUX.5.DELAYGTY_CHANNEL2.RXPRBSPTN_FS1
TCELL42:IMUX.IMUX.6.DELAYGTY_CHANNEL2.LOOPRSVD_FS5
TCELL42:IMUX.IMUX.7.DELAYGTY_CHANNEL2.DFEH4HOLD_FS
TCELL42:IMUX.IMUX.8.DELAYGTY_CHANNEL2.RXPRBSPTN_FS2
TCELL42:IMUX.IMUX.9.DELAYGTY_CHANNEL2.LOOPRSVD_FS8
TCELL42:IMUX.IMUX.10.DELAYGTY_CHANNEL2.DFEH4OVREN_FS
TCELL42:IMUX.IMUX.11.DELAYGTY_CHANNEL2.DFECFOKCFNUM_FS0
TCELL42:IMUX.IMUX.13.DELAYGTY_CHANNEL2.DFEH7HOLD_FS
TCELL42:IMUX.IMUX.14.DELAYGTY_CHANNEL2.DFECFOKCFNUM_FS1
TCELL42:IMUX.IMUX.15.DELAYGTY_CHANNEL2.CDRSTEPSX_FS
TCELL42:IMUX.IMUX.16.DELAYGTY_CHANNEL2.DFEH7OVREN_FS
TCELL42:IMUX.IMUX.17.DELAYGTY_CHANNEL2.DFECFOKCFNUM_FS2
TCELL42:IMUX.IMUX.18.DELAYGTY_CHANNEL2.CDRSTEPSQ_FS
TCELL42:IMUX.IMUX.19.DELAYGTY_CHANNEL2.DFEH10HOLD_FS
TCELL42:IMUX.IMUX.20.DELAYGTY_CHANNEL2.DFECFOKCFNUM_FS3
TCELL42:IMUX.IMUX.22.DELAYGTY_CHANNEL2.DFEH10OVREN_FS
TCELL42:IMUX.IMUX.23.DELAYGTY_CHANNEL2.LPMKLOVREN_FS
TCELL42:IMUX.IMUX.24.DELAYGTY_CHANNEL2.LOOPRSVD_FS13
TCELL42:IMUX.IMUX.25.DELAYGTY_CHANNEL2.DFEH13HOLD_FS
TCELL42:IMUX.IMUX.26.DELAYGTY_CHANNEL2.LPMKLHOLD_FS
TCELL42:IMUX.IMUX.28.DELAYGTY_CHANNEL2.DFEH13OVREN_FS
TCELL42:IMUX.IMUX.29.DELAYGTY_CHANNEL2.LPMKHHOLD_FS
TCELL42:IMUX.IMUX.30.DELAYGTY_CHANNEL2.LPMGCHOLD_FS
TCELL42:IMUX.IMUX.31.DELAYGTY_CHANNEL2.LOOPRSVD_FS14
TCELL42:IMUX.IMUX.32.DELAYGTY_CHANNEL2.RXDAOVREN_FS
TCELL42:IMUX.IMUX.33.DELAYGTY_CHANNEL2.RXDAALGNEN_FS
TCELL42:IMUX.IMUX.34.DELAYGTY_CHANNEL2.LPMGCOVREN_FS
TCELL42:IMUX.IMUX.35.DELAYGTY_CHANNEL2.RXSLIPPMA_FS
TCELL42:IMUX.IMUX.36.DELAYGTY_CHANNEL2.RXDABYPASS_FS
TCELL42:IMUX.IMUX.37.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS14
TCELL42:IMUX.IMUX.39.DELAYGTY_CHANNEL2.PCIEEQRXEQADAPTDONE_FS
TCELL42:IMUX.IMUX.40.DELAYGTY_CHANNEL2.PCS_RSVD_IN_FS15
TCELL42:IMUX.IMUX.41.DELAYGTY_CHANNEL2.LOOPRSVD_FS15
TCELL42:IMUX.IMUX.42.DELAYGTY_CHANNEL2.RXSLIPOUTCLK_FS
TCELL42:IMUX.IMUX.43.DELAYGTY_CHANNEL2.PINRSRVD_FS14
TCELL42:IMUX.IMUX.45.DELAYGTY_CHANNEL2.CDRSTEPDIR_FS
TCELL42:IMUX.IMUX.46.DELAYGTY_CHANNEL2.PINRSRVD_FS15
TCELL43:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_1_12
TCELL43:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_1_8
TCELL43:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF4
TCELL43:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_4
TCELL43:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_4
TCELL43:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_1_4
TCELL43:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_0
TCELL43:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_0
TCELL43:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_1_0
TCELL43:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_1_0
TCELL43:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS4
TCELL43:IMUX.CTRL.5GTY_COMMON.HROW_TEST_CKB_FS_1
TCELL43:IMUX.IMUX.0.DELAYBUFG_GT14.RSTMASK
TCELL43:IMUX.IMUX.1.DELAYBUFG_GT14.DIV2
TCELL43:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_1_7
TCELL43:IMUX.IMUX.3.DELAYGTY_COMMON.RCALENB_FS_1
TCELL43:IMUX.IMUX.6.DELAYBUFG_GT14.CEMASK
TCELL43:IMUX.IMUX.7.DELAYBUFG_GT14.DIV1
TCELL43:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_1_6
TCELL43:IMUX.IMUX.9.DELAYGTY_COMMON.BGTESTEN_FS_1
TCELL43:IMUX.IMUX.13.DELAYBUFG_GT14.DIV0
TCELL43:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_1_5
TCELL43:IMUX.IMUX.15.DELAYGTY_COMMON.BGRCALOVRDENB_FS_1
TCELL43:IMUX.IMUX.18.DELAYBUFG_GT13.RSTMASK
TCELL43:IMUX.IMUX.19.DELAYBUFG_GT13.DIV2
TCELL43:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_1_4
TCELL43:IMUX.IMUX.21.DELAYGTY_COMMON.BGRCALCTL_FS_1_4
TCELL43:IMUX.IMUX.24.DELAYBUFG_GT13.CEMASK
TCELL43:IMUX.IMUX.25.DELAYBUFG_GT13.DIV1
TCELL43:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_1_3
TCELL43:IMUX.IMUX.27.DELAYGTY_COMMON.BGRCALCTL_FS_1_3
TCELL43:IMUX.IMUX.31.DELAYBUFG_GT13.DIV0
TCELL43:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_1_2
TCELL43:IMUX.IMUX.33.DELAYGTY_COMMON.BGRCALCTL_FS_1_2
TCELL43:IMUX.IMUX.36.DELAYBUFG_GT12.RSTMASK
TCELL43:IMUX.IMUX.37.DELAYBUFG_GT12.DIV2
TCELL43:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_1_1
TCELL43:IMUX.IMUX.39.DELAYGTY_COMMON.BGRCALCTL_FS_1_1
TCELL43:IMUX.IMUX.42.DELAYBUFG_GT12.CEMASK
TCELL43:IMUX.IMUX.43.DELAYBUFG_GT12.DIV1
TCELL43:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_1_0
TCELL43:IMUX.IMUX.45.DELAYGTY_COMMON.BGRCALCTL_FS_1_0
TCELL43:IMUX.IMUX.47.DELAYBUFG_GT12.DIV0
TCELL44:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_1_13
TCELL44:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_1_9
TCELL44:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF5
TCELL44:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_5
TCELL44:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_5
TCELL44:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_1_5
TCELL44:OUT.22.TMINGTY_COMMON.QPLREFLOSS_SF_1
TCELL44:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_1
TCELL44:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_1
TCELL44:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_1_1
TCELL44:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_1_1
TCELL44:IMUX.CTRL.0GTY_COMMON.QPLRESETB_FS_1
TCELL44:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS5
TCELL44:IMUX.IMUX.0.DELAYBUFG_GT17.RSTMASK
TCELL44:IMUX.IMUX.1.DELAYBUFG_GT17.DIV2
TCELL44:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_1_15
TCELL44:IMUX.IMUX.3.DELAYBUFG_GT_SYNC6.CE_IN
TCELL44:IMUX.IMUX.4.DELAYGTY_COMMON.PWRDNBGB_FS_1
TCELL44:IMUX.IMUX.5.DELAYBUFG_GT_SYNC5.CE_IN
TCELL44:IMUX.IMUX.6.DELAYBUFG_GT17.CEMASK
TCELL44:IMUX.IMUX.7.DELAYBUFG_GT17.DIV1
TCELL44:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_1_14
TCELL44:IMUX.IMUX.10.DELAYGTY_COMMON.BGBYPASS_FS_1
TCELL44:IMUX.IMUX.11.DELAYGTY_COMMON.QPLPWRDN_FS_1
TCELL44:IMUX.IMUX.13.DELAYBUFG_GT17.DIV0
TCELL44:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_1_13
TCELL44:IMUX.IMUX.15.DELAYGTY_COMMON.SDMWIDTH_FS_1_0
TCELL44:IMUX.IMUX.16.DELAYGTY_COMMON.QDPMASCANENB_FS
TCELL44:IMUX.IMUX.17.DELAYGTY_COMMON.SDMWIDTH_FS_1_1
TCELL44:IMUX.IMUX.18.DELAYBUFG_GT16.RSTMASK
TCELL44:IMUX.IMUX.19.DELAYBUFG_GT16.DIV2
TCELL44:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_1_12
TCELL44:IMUX.IMUX.22.DELAYGTY_COMMON.QDPMASCANRSTEN_FS
TCELL44:IMUX.IMUX.24.DELAYBUFG_GT16.CEMASK
TCELL44:IMUX.IMUX.25.DELAYBUFG_GT16.DIV1
TCELL44:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_1_11
TCELL44:IMUX.IMUX.31.DELAYBUFG_GT16.DIV0
TCELL44:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_1_10
TCELL44:IMUX.IMUX.33.DELAYGTY_COMMON.QPLREFDYN_FS_1_2
TCELL44:IMUX.IMUX.34.DELAYGTY_COMMON.QDPMASCANMODEB_FS
TCELL44:IMUX.IMUX.36.DELAYBUFG_GT15.RSTMASK
TCELL44:IMUX.IMUX.37.DELAYBUFG_GT15.DIV2
TCELL44:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_1_9
TCELL44:IMUX.IMUX.39.DELAYGTY_COMMON.QPLREFDYN_FS_1_1
TCELL44:IMUX.IMUX.42.DELAYBUFG_GT15.CEMASK
TCELL44:IMUX.IMUX.43.DELAYBUFG_GT15.DIV1
TCELL44:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_1_8
TCELL44:IMUX.IMUX.45.DELAYGTY_COMMON.QPLREFDYN_FS_1_0
TCELL44:IMUX.IMUX.47.DELAYBUFG_GT15.DIV0
TCELL45:OUT.3.TMINGTY_COMMON.SDMTESTDATA_SF_1_14
TCELL45:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_1_10
TCELL45:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF6
TCELL45:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_6
TCELL45:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_6
TCELL45:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_1_6
TCELL45:OUT.22.TMINGTY_COMMON.MGTREFCLKFA_SF_1
TCELL45:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_2
TCELL45:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_2
TCELL45:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_1_2
TCELL45:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_1_2
TCELL45:IMUX.CTRL.0GTY_COMMON.SDMRESETB_FS_1
TCELL45:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS6
TCELL45:IMUX.CTRL.4GTY_COMMON.QPLLDMONCLKB_FS_1
TCELL45:IMUX.IMUX.0.DELAYBUFG_GT20.RSTMASK
TCELL45:IMUX.IMUX.1.DELAYBUFG_GT20.DIV2
TCELL45:IMUX.IMUX.2.DELAYGTY_COMMON.SDMDATA_FS_1_23
TCELL45:IMUX.IMUX.3.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_7
TCELL45:IMUX.IMUX.4.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_7
TCELL45:IMUX.IMUX.5.DELAYBUFG_GT_SYNC10.CE_IN
TCELL45:IMUX.IMUX.6.DELAYBUFG_GT20.CEMASK
TCELL45:IMUX.IMUX.7.DELAYBUFG_GT20.DIV1
TCELL45:IMUX.IMUX.8.DELAYGTY_COMMON.SDMDATA_FS_1_22
TCELL45:IMUX.IMUX.9.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_6
TCELL45:IMUX.IMUX.10.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_6
TCELL45:IMUX.IMUX.13.DELAYBUFG_GT20.DIV0
TCELL45:IMUX.IMUX.14.DELAYGTY_COMMON.SDMDATA_FS_1_21
TCELL45:IMUX.IMUX.15.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_5
TCELL45:IMUX.IMUX.16.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_5
TCELL45:IMUX.IMUX.18.DELAYBUFG_GT19.RSTMASK
TCELL45:IMUX.IMUX.19.DELAYBUFG_GT19.DIV2
TCELL45:IMUX.IMUX.20.DELAYGTY_COMMON.SDMDATA_FS_1_20
TCELL45:IMUX.IMUX.21.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_4
TCELL45:IMUX.IMUX.22.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_4
TCELL45:IMUX.IMUX.24.DELAYBUFG_GT19.CEMASK
TCELL45:IMUX.IMUX.25.DELAYBUFG_GT19.DIV1
TCELL45:IMUX.IMUX.26.DELAYGTY_COMMON.SDMDATA_FS_1_19
TCELL45:IMUX.IMUX.27.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_3
TCELL45:IMUX.IMUX.28.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_3
TCELL45:IMUX.IMUX.29.DELAYGTY_COMMON.QPLLKDETEN_FS_1
TCELL45:IMUX.IMUX.31.DELAYBUFG_GT19.DIV0
TCELL45:IMUX.IMUX.32.DELAYGTY_COMMON.SDMDATA_FS_1_18
TCELL45:IMUX.IMUX.33.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_2
TCELL45:IMUX.IMUX.34.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_2
TCELL45:IMUX.IMUX.36.DELAYBUFG_GT18.RSTMASK
TCELL45:IMUX.IMUX.37.DELAYBUFG_GT18.DIV2
TCELL45:IMUX.IMUX.38.DELAYGTY_COMMON.SDMDATA_FS_1_17
TCELL45:IMUX.IMUX.39.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_1
TCELL45:IMUX.IMUX.40.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_1
TCELL45:IMUX.IMUX.42.DELAYBUFG_GT18.CEMASK
TCELL45:IMUX.IMUX.43.DELAYBUFG_GT18.DIV1
TCELL45:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_1_16
TCELL45:IMUX.IMUX.45.DELAYGTY_COMMON.QDPMAPINRSVD_FS_1_0
TCELL45:IMUX.IMUX.46.DELAYGTY_COMMON.QDCMRSVDPIN_FS_1_0
TCELL45:IMUX.IMUX.47.DELAYBUFG_GT18.DIV0
TCELL46:OUT.3.TMINGTY_COMMON.QPLFREQLOCK_SF_1
TCELL46:OUT.11.TMINGTY_COMMON.SDMTESTDATA_SF_1_11
TCELL46:OUT.12.TMINGTY_COMMON.QDPMASCANOUT_SF7
TCELL46:OUT.17.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_7
TCELL46:OUT.18.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_7
TCELL46:OUT.19.TMINGTY_COMMON.SDMTESTDATA_SF_1_7
TCELL46:OUT.22.TMINGTY_COMMON.QPLFBLOSS_SF_1
TCELL46:OUT.25.TMINGTY_COMMON.QDCMRSVDOUT_SF_1_3
TCELL46:OUT.26.TMINGTY_COMMON.DMONOUT_QDCM_SF_1_3
TCELL46:OUT.27.TMINGTY_COMMON.SDMTESTDATA_SF_1_3
TCELL46:OUT.30.TMINGTY_COMMON.SDMFINALOUT_SF_1_3
TCELL46:IMUX.CTRL.3GTY_COMMON.QDPMASCANCLKB_FS7
TCELL46:IMUX.CTRL.4GTY_COMMON.QDCLKPINSPRDB1_FS_1
TCELL46:IMUX.CTRL.5GTY_COMMON.QDCLKPINSPRDB0_FS_1
TCELL46:IMUX.IMUX.0.DELAYBUFG_GT23.RSTMASK
TCELL46:IMUX.IMUX.1.DELAYBUFG_GT23.DIV2
TCELL46:IMUX.IMUX.2.DELAYGTY_COMMON.REFCLKPD_FS_1
TCELL46:IMUX.IMUX.3.DELAYBUFG_GT_SYNC9.CE_IN
TCELL46:IMUX.IMUX.4.DELAYBUFG_GT_SYNC8.CE_IN
TCELL46:IMUX.IMUX.5.DELAYBUFG_GT_SYNC7.CE_IN
TCELL46:IMUX.IMUX.6.DELAYBUFG_GT23.CEMASK
TCELL46:IMUX.IMUX.7.DELAYBUFG_GT23.DIV1
TCELL46:IMUX.IMUX.9.DELAYBUFG_GT_SYNC10.RST_IN
TCELL46:IMUX.IMUX.10.DELAYBUFG_GT_SYNC9.RST_IN
TCELL46:IMUX.IMUX.11.DELAYBUFG_GT_SYNC8.RST_IN
TCELL46:IMUX.IMUX.12.DELAYBUFG_GT_SYNC7.RST_IN
TCELL46:IMUX.IMUX.13.DELAYBUFG_GT23.DIV0
TCELL46:IMUX.IMUX.14.DELAYBUFG_GT_SYNC6.RST_IN
TCELL46:IMUX.IMUX.15.DELAYBUFG_GT_SYNC5.RST_IN
TCELL46:IMUX.IMUX.18.DELAYBUFG_GT22.RSTMASK
TCELL46:IMUX.IMUX.19.DELAYBUFG_GT22.DIV2
TCELL46:IMUX.IMUX.20.DELAYGTY_COMMON.QDPMASCANIN_FS7
TCELL46:IMUX.IMUX.21.DELAYGTY_COMMON.QDPINSPRD_FS_1_4
TCELL46:IMUX.IMUX.24.DELAYBUFG_GT22.CEMASK
TCELL46:IMUX.IMUX.25.DELAYBUFG_GT22.DIV1
TCELL46:IMUX.IMUX.26.DELAYGTY_COMMON.QDPMASCANIN_FS6
TCELL46:IMUX.IMUX.27.DELAYGTY_COMMON.QDPINSPRD_FS_1_3
TCELL46:IMUX.IMUX.31.DELAYBUFG_GT22.DIV0
TCELL46:IMUX.IMUX.32.DELAYGTY_COMMON.QDPMASCANIN_FS5
TCELL46:IMUX.IMUX.33.DELAYGTY_COMMON.QDPINSPRD_FS_1_2
TCELL46:IMUX.IMUX.36.DELAYBUFG_GT21.RSTMASK
TCELL46:IMUX.IMUX.37.DELAYBUFG_GT21.DIV2
TCELL46:IMUX.IMUX.38.DELAYGTY_COMMON.QDPMASCANIN_FS4
TCELL46:IMUX.IMUX.39.DELAYGTY_COMMON.QDPINSPRD_FS_1_1
TCELL46:IMUX.IMUX.42.DELAYBUFG_GT21.CEMASK
TCELL46:IMUX.IMUX.43.DELAYBUFG_GT21.DIV1
TCELL46:IMUX.IMUX.44.DELAYGTY_COMMON.SDMDATA_FS_1_24
TCELL46:IMUX.IMUX.45.DELAYGTY_COMMON.QDPINSPRD_FS_1_0
TCELL46:IMUX.IMUX.47.DELAYBUFG_GT21.DIV0
TCELL47:OUT.0.TMINGTY_CHANNEL3.SCANOUT_SF6
TCELL47:OUT.1.TMINGTY_CHANNEL3.BUFGTRESET_SF0
TCELL47:OUT.2.TMINGTY_CHANNEL3.SCANOUT_SF8
TCELL47:OUT.3.TMINGTY_CHANNEL3.BUFGTDIV_SF0
TCELL47:OUT.4.TMINGTY_CHANNEL3.SCANOUT_SF11
TCELL47:OUT.5.TMINGTY_CHANNEL3.BUFGTDIV_SF3
TCELL47:OUT.6.TMINGTY_CHANNEL3.DFEDOUT_SF5
TCELL47:OUT.7.TMINGTY_CHANNEL3.BUFGTDIV_SF6
TCELL47:OUT.8.TMINGTY_CHANNEL3.SCANOUT_SF14
TCELL47:OUT.9.TMINGTY_CHANNEL3.DMONOUT_SF15
TCELL47:OUT.10.TMINGTY_CHANNEL3.BUFGTRESET_SF2
TCELL47:OUT.11.TMINGTY_CHANNEL3.SCANOUT_SF5
TCELL47:OUT.12.TMINGTY_CHANNEL3.BUFGTCEMASK_SF2
TCELL47:OUT.13.TMINGTY_CHANNEL3.DRPDO_SF15
TCELL47:OUT.14.TMINGTY_CHANNEL3.PMASCANOUT_SF8
TCELL47:OUT.15.TMINGTY_CHANNEL3.DMONOUT_SF10
TCELL47:OUT.16.TMINGTY_CHANNEL3.BUFGTCE_SF0
TCELL47:OUT.17.TMINGTY_CHANNEL3.PMASCANOUT_SF5
TCELL47:OUT.18.TMINGTY_CHANNEL3.BUFGTCEMASK_SF0
TCELL47:OUT.19.TMINGTY_CHANNEL3.DRPDO_SF10
TCELL47:OUT.20.TMINGTY_CHANNEL3.PCIERATEQPLLRESET_SF0
TCELL47:OUT.21.TMINGTY_CHANNEL3.DMONOUT_SF5
TCELL47:OUT.23.TMINGTY_CHANNEL3.SCANOUT_SF0
TCELL47:OUT.24.TMINGTY_CHANNEL3.PCIERATEIDLE_SF
TCELL47:OUT.25.TMINGTY_CHANNEL3.DRPDO_SF5
TCELL47:OUT.26.TMINGTY_CHANNEL3.DFEDOUT_SF0
TCELL47:OUT.27.TMINGTY_CHANNEL3.DMONOUT_SF0
TCELL47:OUT.28.TMINGTY_CHANNEL3.MGTREFCLKFA_SF
TCELL47:OUT.29.TMINGTY_CHANNEL3.PMASCANOUT_SF0
TCELL47:OUT.31.TMINGTY_CHANNEL3.DRPDO_SF0
TCELL47:IMUX.CTRL.4GTY_CHANNEL3.DCLKB_FS
TCELL47:IMUX.CTRL.5GTY_CHANNEL3.DMONCLKB_FS
TCELL47:IMUX.IMUX.0.DELAYGTY_CHANNEL3.DEN_FS
TCELL47:IMUX.IMUX.1.DELAYGTY_CHANNEL3.TSTIN_FS0
TCELL47:IMUX.IMUX.2.DELAYGTY_CHANNEL3.DADDR_FS0
TCELL47:IMUX.IMUX.3.DELAYGTY_CHANNEL3.DWE_FS
TCELL47:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TSTIN_FS2
TCELL47:IMUX.IMUX.5.DELAYGTY_CHANNEL3.DI_FS0
TCELL47:IMUX.IMUX.6.DELAYGTY_CHANNEL3.ISERRDETEN_FS
TCELL47:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TSTIN_FS4
TCELL47:IMUX.IMUX.8.DELAYGTY_CHANNEL3.DADDR_FS1
TCELL47:IMUX.IMUX.9.DELAYGTY_CHANNEL3.ISCANRESET_FS
TCELL47:IMUX.IMUX.10.DELAYGTY_CHANNEL3.TSTIN_FS6
TCELL47:IMUX.IMUX.11.DELAYGTY_CHANNEL3.DI_FS1
TCELL47:IMUX.IMUX.12.DELAYGTY_CHANNEL3.EYESCANTRIGGER_FS
TCELL47:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TSTIN_FS8
TCELL47:IMUX.IMUX.14.DELAYGTY_CHANNEL3.DADDR_FS2
TCELL47:IMUX.IMUX.15.DELAYGTY_CHANNEL3.LPBKTXRXSEREN_FS
TCELL47:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TSTIN_FS10
TCELL47:IMUX.IMUX.17.DELAYGTY_CHANNEL3.DI_FS2
TCELL47:IMUX.IMUX.18.DELAYGTY_CHANNEL3.SCANIN_FS11
TCELL47:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TSTIN_FS12
TCELL47:IMUX.IMUX.20.DELAYGTY_CHANNEL3.DADDR_FS3
TCELL47:IMUX.IMUX.21.DELAYGTY_CHANNEL3.SCANIN_FS9
TCELL47:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TSTIN_FS14
TCELL47:IMUX.IMUX.23.DELAYGTY_CHANNEL3.DI_FS3
TCELL47:IMUX.IMUX.24.DELAYGTY_CHANNEL3.SCANIN_FS7
TCELL47:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TSTIN_FS16
TCELL47:IMUX.IMUX.26.DELAYGTY_CHANNEL3.DADDR_FS4
TCELL47:IMUX.IMUX.27.DELAYGTY_CHANNEL3.SCANIN_FS0
TCELL47:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TSTIN_FS18
TCELL47:IMUX.IMUX.29.DELAYGTY_CHANNEL3.DI_FS4
TCELL47:IMUX.IMUX.30.DELAYGTY_CHANNEL3.SCANIN_FS2
TCELL47:IMUX.IMUX.31.DELAYGTY_CHANNEL3.SCANIN_FS12
TCELL47:IMUX.IMUX.32.DELAYGTY_CHANNEL3.DADDR_FS5
TCELL47:IMUX.IMUX.33.DELAYGTY_CHANNEL3.SCANIN_FS4
TCELL47:IMUX.IMUX.34.DELAYGTY_CHANNEL3.PMASCANIN_FS7
TCELL47:IMUX.IMUX.35.DELAYGTY_CHANNEL3.DI_FS5
TCELL47:IMUX.IMUX.36.DELAYGTY_CHANNEL3.PMASCANIN_FS8
TCELL47:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PMASCANRSTEN_FS
TCELL47:IMUX.IMUX.38.DELAYGTY_CHANNEL3.DADDR_FS6
TCELL47:IMUX.IMUX.39.DELAYGTY_CHANNEL3.PMASCANIN_FS9
TCELL47:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PMASCANMODEB_FS
TCELL47:IMUX.IMUX.41.DELAYGTY_CHANNEL3.DI_FS6
TCELL47:IMUX.IMUX.42.DELAYGTY_CHANNEL3.PMASCANIN_FS10
TCELL47:IMUX.IMUX.43.DELAYGTY_CHANNEL3.RXTERMPROG_FS0
TCELL47:IMUX.IMUX.44.DELAYGTY_CHANNEL3.DADDR_FS7
TCELL47:IMUX.IMUX.45.DELAYGTY_CHANNEL3.PMASCANIN_FS11
TCELL47:IMUX.IMUX.46.DELAYGTY_CHANNEL3.RXTERMPROG_FS1
TCELL47:IMUX.IMUX.47.DELAYGTY_CHANNEL3.DI_FS7
TCELL48:OUT.0.TMINGTY_CHANNEL3.SCANOUT_SF7
TCELL48:OUT.1.TMINGTY_CHANNEL3.BUFGTRESET_SF1
TCELL48:OUT.2.TMINGTY_CHANNEL3.SCANOUT_SF9
TCELL48:OUT.3.TMINGTY_CHANNEL3.BUFGTDIV_SF1
TCELL48:OUT.4.TMINGTY_CHANNEL3.SCANOUT_SF12
TCELL48:OUT.5.TMINGTY_CHANNEL3.BUFGTDIV_SF4
TCELL48:OUT.6.TMINGTY_CHANNEL3.DFEDOUT_SF6
TCELL48:OUT.7.TMINGTY_CHANNEL3.BUFGTDIV_SF7
TCELL48:OUT.8.TMINGTY_CHANNEL3.SCANOUT_SF15
TCELL48:OUT.9.TMINGTY_CHANNEL3.PINRSRVDAS_SF0
TCELL48:OUT.10.TMINGTY_CHANNEL3.BUFGTRSTMASK_SF0
TCELL48:OUT.11.TMINGTY_CHANNEL3.DRDY_SF
TCELL48:OUT.12.TMINGTY_CHANNEL3.BUFGTCE_SF2
TCELL48:OUT.13.TMINGTY_CHANNEL3.DMONOUT_SF16
TCELL48:OUT.14.TMINGTY_CHANNEL3.PMASCANOUT_SF9
TCELL48:OUT.15.TMINGTY_CHANNEL3.DMONOUT_SF11
TCELL48:OUT.16.TMINGTY_CHANNEL3.BUFGTCE_SF1
TCELL48:OUT.17.TMINGTY_CHANNEL3.PMASCANOUT_SF6
TCELL48:OUT.18.TMINGTY_CHANNEL3.BUFGTCEMASK_SF1
TCELL48:OUT.19.TMINGTY_CHANNEL3.DRPDO_SF11
TCELL48:OUT.20.TMINGTY_CHANNEL3.PCIERATEQPLLRESET_SF1
TCELL48:OUT.21.TMINGTY_CHANNEL3.DMONOUT_SF6
TCELL48:OUT.23.TMINGTY_CHANNEL3.SCANOUT_SF1
TCELL48:OUT.24.TMINGTY_CHANNEL3.PCIERATEGEN3_SF
TCELL48:OUT.25.TMINGTY_CHANNEL3.DRPDO_SF6
TCELL48:OUT.26.TMINGTY_CHANNEL3.DFEDOUT_SF1
TCELL48:OUT.27.TMINGTY_CHANNEL3.DMONOUT_SF1
TCELL48:OUT.28.TMINGTY_CHANNEL3.EYESCANDATAERROR_SF
TCELL48:OUT.29.TMINGTY_CHANNEL3.PMASCANOUT_SF1
TCELL48:OUT.30.TMINGTY_CHANNEL3.PINRSRVDAS_SF4
TCELL48:OUT.31.TMINGTY_CHANNEL3.DRPDO_SF1
TCELL48:IMUX.CTRL.5GTY_CHANNEL3.COREREFCLKB_FS
TCELL48:IMUX.IMUX.0.DELAYGTY_CHANNEL3.DMONFIFORESET_FS
TCELL48:IMUX.IMUX.1.DELAYGTY_CHANNEL3.TSTIN_FS1
TCELL48:IMUX.IMUX.2.DELAYGTY_CHANNEL3.DADDR_FS8
TCELL48:IMUX.IMUX.3.DELAYGTY_CHANNEL3.TSTPWRDN_FS0
TCELL48:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TSTIN_FS3
TCELL48:IMUX.IMUX.5.DELAYGTY_CHANNEL3.DI_FS8
TCELL48:IMUX.IMUX.6.DELAYGTY_CHANNEL3.TSTPWRDN_FS1
TCELL48:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TSTIN_FS5
TCELL48:IMUX.IMUX.8.DELAYGTY_CHANNEL3.DADDR_FS9
TCELL48:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TSTPWRDN_FS2
TCELL48:IMUX.IMUX.10.DELAYGTY_CHANNEL3.TSTIN_FS7
TCELL48:IMUX.IMUX.11.DELAYGTY_CHANNEL3.DI_FS9
TCELL48:IMUX.IMUX.12.DELAYGTY_CHANNEL3.TSTPWRDN_FS3
TCELL48:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TSTIN_FS9
TCELL48:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TSTPWRDN_FS4
TCELL48:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TSTIN_FS11
TCELL48:IMUX.IMUX.17.DELAYGTY_CHANNEL3.DI_FS10
TCELL48:IMUX.IMUX.18.DELAYGTY_CHANNEL3.SCANIN_FS10
TCELL48:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TSTIN_FS13
TCELL48:IMUX.IMUX.20.DELAYGTY_CHANNEL3.GTRSTSEL_FS
TCELL48:IMUX.IMUX.21.DELAYGTY_CHANNEL3.SCANIN_FS8
TCELL48:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TSTIN_FS15
TCELL48:IMUX.IMUX.23.DELAYGTY_CHANNEL3.DI_FS11
TCELL48:IMUX.IMUX.24.DELAYGTY_CHANNEL3.SCANIN_FS6
TCELL48:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TSTIN_FS17
TCELL48:IMUX.IMUX.26.DELAYGTY_CHANNEL3.LPBKRXTXSEREN_FS
TCELL48:IMUX.IMUX.27.DELAYGTY_CHANNEL3.SCANIN_FS1
TCELL48:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TSTIN_FS19
TCELL48:IMUX.IMUX.29.DELAYGTY_CHANNEL3.DI_FS12
TCELL48:IMUX.IMUX.30.DELAYGTY_CHANNEL3.SCANIN_FS3
TCELL48:IMUX.IMUX.31.DELAYGTY_CHANNEL3.EVODDPHIXWREN_FS
TCELL48:IMUX.IMUX.32.DELAYGTY_CHANNEL3.SCANMODEB_FS
TCELL48:IMUX.IMUX.33.DELAYGTY_CHANNEL3.SCANIN_FS5
TCELL48:IMUX.IMUX.34.DELAYGTY_CHANNEL3.EVODDPHIXRDEN_FS
TCELL48:IMUX.IMUX.35.DELAYGTY_CHANNEL3.DI_FS13
TCELL48:IMUX.IMUX.36.DELAYGTY_CHANNEL3.EVODDPHIDWREN_FS
TCELL48:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PMASCANENB_FS
TCELL48:IMUX.IMUX.38.DELAYGTY_CHANNEL3.SCANENB_FS
TCELL48:IMUX.IMUX.39.DELAYGTY_CHANNEL3.EVODDPHIDRDEN_FS
TCELL48:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PMASCANIN_FS0
TCELL48:IMUX.IMUX.41.DELAYGTY_CHANNEL3.DI_FS14
TCELL48:IMUX.IMUX.42.DELAYGTY_CHANNEL3.EVODDPHICALDONE_FS
TCELL48:IMUX.IMUX.43.DELAYGTY_CHANNEL3.RXTERMPROG_FS2
TCELL48:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TSTPWRDNOVRDB_FS
TCELL48:IMUX.IMUX.45.DELAYGTY_CHANNEL3.EVODDPHICALSTART_FS
TCELL48:IMUX.IMUX.46.DELAYGTY_CHANNEL3.RXTERMPROG_FS3
TCELL48:IMUX.IMUX.47.DELAYGTY_CHANNEL3.DI_FS15
TCELL49:OUT.0.TMINGTY_CHANNEL3.TXBUFSTATUS_SF0
TCELL49:OUT.1.TMINGTY_CHANNEL3.CPLFREQLOCK_SF
TCELL49:OUT.2.TMINGTY_CHANNEL3.SCANOUT_SF10
TCELL49:OUT.3.TMINGTY_CHANNEL3.BUFGTDIV_SF2
TCELL49:OUT.4.TMINGTY_CHANNEL3.SCANOUT_SF13
TCELL49:OUT.5.TMINGTY_CHANNEL3.BUFGTDIV_SF5
TCELL49:OUT.6.TMINGTY_CHANNEL3.TXOUTCLK_SF
TCELL49:OUT.7.TMINGTY_CHANNEL3.BUFGTDIV_SF8
TCELL49:OUT.8.TMINGTY_CHANNEL3.CPLREFLOSS_SF
TCELL49:OUT.9.TMINGTY_CHANNEL3.PINRSRVDAS_SF1
TCELL49:OUT.10.TMINGTY_CHANNEL3.SCANOUT_SF16
TCELL49:OUT.11.TMINGTY_CHANNEL3.TXOUTCLKPCS_SF
TCELL49:OUT.12.TMINGTY_CHANNEL3.RXPHALIGNERR_SF
TCELL49:OUT.13.TMINGTY_CHANNEL3.TXBUFSTATUS_SF1
TCELL49:OUT.14.TMINGTY_CHANNEL3.PMASCANOUT_SF10
TCELL49:OUT.15.TMINGTY_CHANNEL3.DMONOUT_SF12
TCELL49:OUT.16.TMINGTY_CHANNEL3.PMASCANOUT_SF7
TCELL49:OUT.17.TMINGTY_CHANNEL3.PCIESYNCTXSYNCDONE_SF
TCELL49:OUT.18.TMINGTY_CHANNEL3.CPLFBLOSS_SF
TCELL49:OUT.19.TMINGTY_CHANNEL3.DRPDO_SF12
TCELL49:OUT.20.TMINGTY_CHANNEL3.TCOINITDONE_SF
TCELL49:OUT.21.TMINGTY_CHANNEL3.DMONOUT_SF7
TCELL49:OUT.23.TMINGTY_CHANNEL3.SCANOUT_SF2
TCELL49:OUT.24.TMINGTY_CHANNEL3.TXPMARESETDONE_SF
TCELL49:OUT.25.TMINGTY_CHANNEL3.DRPDO_SF7
TCELL49:OUT.26.TMINGTY_CHANNEL3.DFEDOUT_SF2
TCELL49:OUT.27.TMINGTY_CHANNEL3.DMONOUT_SF2
TCELL49:OUT.28.TMINGTY_CHANNEL3.TXCOPIPHDONE_SF
TCELL49:OUT.29.TMINGTY_CHANNEL3.PMASCANOUT_SF2
TCELL49:OUT.30.TMINGTY_CHANNEL3.PINRSRVDAS_SF5
TCELL49:OUT.31.TMINGTY_CHANNEL3.DRPDO_SF2
TCELL49:IMUX.CTRL.0GTY_CHANNEL3.CFGRESETB_FS
TCELL49:IMUX.CTRL.5GTY_CHANNEL3.PMASCANCLK4B_FS
TCELL49:IMUX.CTRL.6GTY_CHANNEL3.PMASCANCLK5B_FS
TCELL49:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS0
TCELL49:IMUX.IMUX.1.DELAYGTY_CHANNEL3.SCANIN_FS13
TCELL49:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS64
TCELL49:IMUX.IMUX.3.DELAYGTY_CHANNEL3.LOOPBACK_FS0
TCELL49:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TXUSRRDY_FS
TCELL49:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS0
TCELL49:IMUX.IMUX.6.DELAYGTY_CHANNEL3.LOOPBACK_FS1
TCELL49:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TXRATEASYNCH_FS
TCELL49:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS65
TCELL49:IMUX.IMUX.9.DELAYGTY_CHANNEL3.LOOPBACK_FS2
TCELL49:IMUX.IMUX.10.DELAYGTY_CHANNEL3.TXDCCSRESET_FS
TCELL49:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS1
TCELL49:IMUX.IMUX.12.DELAYGTY_CHANNEL3.CPLPWRDN_FS
TCELL49:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TXEMPPRE_FS0
TCELL49:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS66
TCELL49:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS0
TCELL49:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TXEMPINVPR_FS
TCELL49:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS2
TCELL49:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS0
TCELL49:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TXPRBSINERR_FS
TCELL49:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS67
TCELL49:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS0
TCELL49:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TXEMPINVPO_FS
TCELL49:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS3
TCELL49:IMUX.IMUX.24.DELAYGTY_CHANNEL3.TXEMPPOS_FS0
TCELL49:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TXPOLARITY_FS
TCELL49:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS68
TCELL49:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXSERPWRDN_FS
TCELL49:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TXPWRDN_FS0
TCELL49:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS4
TCELL49:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS0
TCELL49:IMUX.IMUX.31.DELAYGTY_CHANNEL3.TXHEADER_FS1
TCELL49:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS69
TCELL49:IMUX.IMUX.33.DELAYGTY_CHANNEL3.STEPSIZEPPM_FS0
TCELL49:IMUX.IMUX.34.DELAYGTY_CHANNEL3.TXHEADER_FS0
TCELL49:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS5
TCELL49:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS8
TCELL49:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PMASCANIN_FS1
TCELL49:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS70
TCELL49:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS8
TCELL49:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PMASCANIN_FS2
TCELL49:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS6
TCELL49:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS0
TCELL49:IMUX.IMUX.43.DELAYGTY_CHANNEL3.RXTERMPROG_FS4
TCELL49:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS71
TCELL49:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS0
TCELL49:IMUX.IMUX.46.DELAYGTY_CHANNEL3.RXSIGVALDLY_FS0
TCELL49:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS7
TCELL50:OUT.0.TMINGTY_CHANNEL3.CFOKFORCEDONE_SF
TCELL50:OUT.2.TMINGTY_CHANNEL3.TXSYNCEN2SLV_SF
TCELL50:OUT.3.TMINGTY_CHANNEL3.PCIEUSERPHYSTATUSRST_SF
TCELL50:OUT.4.TMINGTY_CHANNEL3.TXRATEDONE_SF
TCELL50:OUT.5.TMINGTY_CHANNEL3.PCIEUSERGEN3RDY_SF
TCELL50:OUT.6.TMINGTY_CHANNEL3.CFOKDONE_SF
TCELL50:OUT.8.TMINGTY_CHANNEL3.TDASOFTRSTDONE_SF
TCELL50:OUT.9.TMINGTY_CHANNEL3.PINRSRVDAS_SF2
TCELL50:OUT.10.TMINGTY_CHANNEL3.SCANOUT_SF17
TCELL50:OUT.11.TMINGTY_CHANNEL3.TXLINKSYNCDONE_SF
TCELL50:OUT.12.TMINGTY_CHANNEL3.SCANOUT_SF18
TCELL50:OUT.13.TMINGTY_CHANNEL3.TXRESETDONE_SF
TCELL50:OUT.14.TMINGTY_CHANNEL3.PMASCANOUT_SF11
TCELL50:OUT.15.TMINGTY_CHANNEL3.DMONOUT_SF13
TCELL50:OUT.17.TMINGTY_CHANNEL3.CKOKDONE_SF
TCELL50:OUT.18.TMINGTY_CHANNEL3.TXDCCDONE_SF
TCELL50:OUT.19.TMINGTY_CHANNEL3.DRPDO_SF13
TCELL50:OUT.20.TMINGTY_CHANNEL3.RXCDRPHDONE_SF
TCELL50:OUT.21.TMINGTY_CHANNEL3.DMONOUT_SF8
TCELL50:OUT.23.TMINGTY_CHANNEL3.SCANOUT_SF3
TCELL50:OUT.24.TMINGTY_CHANNEL3.RATE_DRP_START_SF
TCELL50:OUT.25.TMINGTY_CHANNEL3.DRPDO_SF8
TCELL50:OUT.26.TMINGTY_CHANNEL3.DFEDOUT_SF3
TCELL50:OUT.27.TMINGTY_CHANNEL3.DMONOUT_SF3
TCELL50:OUT.29.TMINGTY_CHANNEL3.PMASCANOUT_SF3
TCELL50:OUT.30.TMINGTY_CHANNEL3.PINRSRVDAS_SF6
TCELL50:OUT.31.TMINGTY_CHANNEL3.DRPDO_SF3
TCELL50:IMUX.CTRL.0GTY_CHANNEL3.CPLRESETB_FS
TCELL50:IMUX.CTRL.5GTY_CHANNEL3.CPLLDMONCLKB_FS
TCELL50:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS1
TCELL50:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS72
TCELL50:IMUX.IMUX.3.DELAYGTY_CHANNEL3.CPLREFSELDYN_FS2
TCELL50:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TXSLVSYNCEN_FS
TCELL50:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS8
TCELL50:IMUX.IMUX.6.DELAYGTY_CHANNEL3.CPLREFSELDYN_FS1
TCELL50:IMUX.IMUX.7.DELAYGTY_CHANNEL3.RSTCLKENTX_FS
TCELL50:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS73
TCELL50:IMUX.IMUX.9.DELAYGTY_CHANNEL3.CPLREFSELDYN_FS0
TCELL50:IMUX.IMUX.10.DELAYGTY_CHANNEL3.TXPPMSEL_FS
TCELL50:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS9
TCELL50:IMUX.IMUX.12.DELAYGTY_CHANNEL3.CPLLKDETEN_FS
TCELL50:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TXEMPPRE_FS1
TCELL50:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS74
TCELL50:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS1
TCELL50:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TXPIPPMPWDN_FS
TCELL50:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS10
TCELL50:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS1
TCELL50:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TXPPMOVRDEN_FS
TCELL50:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS75
TCELL50:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS1
TCELL50:IMUX.IMUX.22.DELAYGTY_CHANNEL3.ENPPM_FS
TCELL50:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS11
TCELL50:IMUX.IMUX.24.DELAYGTY_CHANNEL3.TXEMPPOS_FS1
TCELL50:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TCOPIOVREN_FS
TCELL50:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS76
TCELL50:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXSYSCKSEL_FS0
TCELL50:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TXPWRDN_FS1
TCELL50:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS12
TCELL50:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS1
TCELL50:IMUX.IMUX.31.DELAYGTY_CHANNEL3.TXHEADER_FS3
TCELL50:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS77
TCELL50:IMUX.IMUX.33.DELAYGTY_CHANNEL3.STEPSIZEPPM_FS1
TCELL50:IMUX.IMUX.34.DELAYGTY_CHANNEL3.TXHEADER_FS2
TCELL50:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS13
TCELL50:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS9
TCELL50:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PMASCANIN_FS3
TCELL50:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS78
TCELL50:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS9
TCELL50:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PMASCANIN_FS4
TCELL50:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS14
TCELL50:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS1
TCELL50:IMUX.IMUX.43.DELAYGTY_CHANNEL3.RXSIGVALDLY_FS1
TCELL50:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS79
TCELL50:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS1
TCELL50:IMUX.IMUX.46.DELAYGTY_CHANNEL3.RXSIGVALDLY_FS2
TCELL50:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS15
TCELL51:OUT.0.TMINGTY_CHANNEL3.CFOKFSTARTED_SF
TCELL51:OUT.2.TMINGTY_CHANNEL3.RXPMARESETDONE_SF
TCELL51:OUT.3.TMINGTY_CHANNEL3.RXSLIPPMARDY_SF
TCELL51:OUT.4.TMINGTY_CHANNEL3.RXSYNCEN2SLV_SF
TCELL51:OUT.5.TMINGTY_CHANNEL3.RXSLIPOUTCLKRDY_SF
TCELL51:OUT.6.TMINGTY_CHANNEL3.CFOKSTART_SF
TCELL51:OUT.8.TMINGTY_CHANNEL3.RXCOPHDONE_SF
TCELL51:OUT.9.TMINGTY_CHANNEL3.PINRSRVDAS_SF3
TCELL51:OUT.10.TMINGTY_CHANNEL3.RXSLIPDONE_SF
TCELL51:OUT.11.TMINGTY_CHANNEL3.BUFGTRSTMASK_SF1
TCELL51:OUT.12.TMINGTY_CHANNEL3.RXSLIDERDY_SF
TCELL51:OUT.13.TMINGTY_CHANNEL3.RXLINKSYNCDONE_SF
TCELL51:OUT.14.TMINGTY_CHANNEL3.BUFGTRSTMASK_SF2
TCELL51:OUT.15.TMINGTY_CHANNEL3.DMONOUT_SF14
TCELL51:OUT.17.TMINGTY_CHANNEL3.TXPRGDIVRSTDONE_SF
TCELL51:OUT.18.TMINGTY_CHANNEL3.RESET_EXCEPTION_SF
TCELL51:OUT.19.TMINGTY_CHANNEL3.DRPDO_SF14
TCELL51:OUT.20.TMINGTY_CHANNEL3.RXPRGDIVRSTDONE_SF
TCELL51:OUT.21.TMINGTY_CHANNEL3.DMONOUT_SF9
TCELL51:OUT.22.TMINGTY_CHANNEL3.GTPOWERGOOD_SF
TCELL51:OUT.23.TMINGTY_CHANNEL3.SCANOUT_SF4
TCELL51:OUT.25.TMINGTY_CHANNEL3.DRPDO_SF9
TCELL51:OUT.26.TMINGTY_CHANNEL3.DFEDOUT_SF4
TCELL51:OUT.27.TMINGTY_CHANNEL3.DMONOUT_SF4
TCELL51:OUT.29.TMINGTY_CHANNEL3.PMASCANOUT_SF4
TCELL51:OUT.30.TMINGTY_CHANNEL3.PINRSRVDAS_SF7
TCELL51:OUT.31.TMINGTY_CHANNEL3.DRPDO_SF4
TCELL51:IMUX.CTRL.0GTY_CHANNEL3.GTTXRSTB_FS
TCELL51:IMUX.CTRL.4GTY_CHANNEL3.PMASCANCLK3B_FS
TCELL51:IMUX.CTRL.5GTY_CHANNEL3.PMASCANCLK2B_FS
TCELL51:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS2
TCELL51:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS80
TCELL51:IMUX.IMUX.3.DELAYGTY_CHANNEL3.TXOUTCKCTL_FS0
TCELL51:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TXMSTRSETPHDONE_FS
TCELL51:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS16
TCELL51:IMUX.IMUX.6.DELAYGTY_CHANNEL3.TXPREAMP_FS0
TCELL51:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TXDEEMPH_FS
TCELL51:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS81
TCELL51:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TXCOMWAKE_FS
TCELL51:IMUX.IMUX.10.DELAYGTY_CHANNEL3.TXCOMSAS_FS
TCELL51:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS17
TCELL51:IMUX.IMUX.12.DELAYGTY_CHANNEL3.TXDRVAMP_FS0
TCELL51:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TXEMPPRE_FS2
TCELL51:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS82
TCELL51:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS2
TCELL51:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TXCOMINIT_FS
TCELL51:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS18
TCELL51:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS2
TCELL51:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TXENC8B10BUSE_FS
TCELL51:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS83
TCELL51:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS2
TCELL51:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TXRATE_FS0
TCELL51:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS19
TCELL51:IMUX.IMUX.24.DELAYGTY_CHANNEL3.TXEMPPOS_FS2
TCELL51:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TXPRBSPTN_FS0
TCELL51:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS84
TCELL51:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXSYSCKSEL_FS1
TCELL51:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TXMARGIN_FS0
TCELL51:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS20
TCELL51:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS2
TCELL51:IMUX.IMUX.31.DELAYGTY_CHANNEL3.TXHEADER_FS5
TCELL51:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS85
TCELL51:IMUX.IMUX.33.DELAYGTY_CHANNEL3.STEPSIZEPPM_FS2
TCELL51:IMUX.IMUX.34.DELAYGTY_CHANNEL3.TXHEADER_FS4
TCELL51:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS21
TCELL51:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS10
TCELL51:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PMASCANIN_FS5
TCELL51:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS86
TCELL51:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS10
TCELL51:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PMASCANIN_FS6
TCELL51:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS22
TCELL51:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS2
TCELL51:IMUX.IMUX.43.DELAYGTY_CHANNEL3.RXSIGVALDLY_FS3
TCELL51:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS87
TCELL51:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS2
TCELL51:IMUX.IMUX.46.DELAYGTY_CHANNEL3.RXSIGVALDLY_FS4
TCELL51:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS23
TCELL52:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF64
TCELL52:OUT.2.TMINGTY_CHANNEL3.RXELECIDLE_SF
TCELL52:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF0
TCELL52:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF0
TCELL52:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF65
TCELL52:OUT.6.TMINGTY_CHANNEL3.RDASOFTRSTDONE_SF
TCELL52:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF1
TCELL52:OUT.8.TMINGTY_CHANNEL3.RXPRBSLOCKED_SF
TCELL52:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF66
TCELL52:OUT.10.TMINGTY_CHANNEL3.PCIERATEQPLLPD_SF0
TCELL52:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF2
TCELL52:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF0
TCELL52:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF67
TCELL52:OUT.14.TMINGTY_CHANNEL3.RXCHBONDO_SF0
TCELL52:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF3
TCELL52:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF0
TCELL52:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF68
TCELL52:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF0
TCELL52:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF4
TCELL52:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF8
TCELL52:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF69
TCELL52:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF0
TCELL52:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF5
TCELL52:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF8
TCELL52:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF70
TCELL52:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF0
TCELL52:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF6
TCELL52:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF8
TCELL52:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF71
TCELL52:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF0
TCELL52:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF7
TCELL52:IMUX.CTRL.0GTY_CHANNEL3.TXPROGDIVRESETB_FS
TCELL52:IMUX.CTRL.4GTY_CHANNEL3.TXUSRCLK2B_FS
TCELL52:IMUX.CTRL.5GTY_CHANNEL3.TXUSRCLKB_FS
TCELL52:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS3
TCELL52:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS88
TCELL52:IMUX.IMUX.3.DELAYGTY_CHANNEL3.TXOUTCKCTL_FS1
TCELL52:IMUX.IMUX.4.DELAYGTY_CHANNEL3.PCIERSTTXSYNCSTART_FS
TCELL52:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS24
TCELL52:IMUX.IMUX.6.DELAYGTY_CHANNEL3.TXPREAMP_FS1
TCELL52:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TXCODAALGNEN_FS
TCELL52:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS89
TCELL52:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TCODABYPASS_FS
TCELL52:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS25
TCELL52:IMUX.IMUX.12.DELAYGTY_CHANNEL3.TXDRVAMP_FS1
TCELL52:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TXEMPPRE_FS3
TCELL52:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS90
TCELL52:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS3
TCELL52:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TXDRVPWRDN_FS
TCELL52:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS26
TCELL52:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS3
TCELL52:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TXDETECTRX_FS
TCELL52:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS91
TCELL52:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS3
TCELL52:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TXRATE_FS1
TCELL52:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS27
TCELL52:IMUX.IMUX.24.DELAYGTY_CHANNEL3.TXEMPPOS_FS3
TCELL52:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TXPRBSPTN_FS1
TCELL52:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS92
TCELL52:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXPLLCKSEL_FS0
TCELL52:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TXMARGIN_FS1
TCELL52:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS28
TCELL52:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS3
TCELL52:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS93
TCELL52:IMUX.IMUX.33.DELAYGTY_CHANNEL3.STEPSIZEPPM_FS3
TCELL52:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS29
TCELL52:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS11
TCELL52:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS0
TCELL52:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS94
TCELL52:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS11
TCELL52:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS1
TCELL52:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS30
TCELL52:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS3
TCELL52:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS0
TCELL52:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS95
TCELL52:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS3
TCELL52:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS1
TCELL52:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS31
TCELL53:OUT.0.TMINGTY_CHANNEL3.COMFINISH_SF
TCELL53:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF72
TCELL53:OUT.2.TMINGTY_CHANNEL3.RXBYTEREALIGN_SF
TCELL53:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF8
TCELL53:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF1
TCELL53:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF73
TCELL53:OUT.6.TMINGTY_CHANNEL3.CDRLOCK_SF
TCELL53:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF9
TCELL53:OUT.8.TMINGTY_CHANNEL3.RXRECCLK_SF
TCELL53:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF74
TCELL53:OUT.10.TMINGTY_CHANNEL3.PCIERATEQPLLPD_SF1
TCELL53:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF10
TCELL53:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF1
TCELL53:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF75
TCELL53:OUT.14.TMINGTY_CHANNEL3.RXCHBONDO_SF1
TCELL53:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF11
TCELL53:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF1
TCELL53:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF76
TCELL53:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF1
TCELL53:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF12
TCELL53:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF9
TCELL53:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF77
TCELL53:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF1
TCELL53:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF13
TCELL53:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF9
TCELL53:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF78
TCELL53:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF1
TCELL53:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF14
TCELL53:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF9
TCELL53:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF79
TCELL53:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF1
TCELL53:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF15
TCELL53:IMUX.CTRL.0GTY_CHANNEL3.TXPMARESETB_FS
TCELL53:IMUX.CTRL.4GTY_CHANNEL3.TXLATCLKB_FS
TCELL53:IMUX.CTRL.5GTY_CHANNEL3.TCOCLKFSMFROUTB_FS
TCELL53:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS4
TCELL53:IMUX.IMUX.1.DELAYGTY_CHANNEL3.TXPRBSPTN_FS3
TCELL53:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS96
TCELL53:IMUX.IMUX.3.DELAYGTY_CHANNEL3.TXOUTCKCTL_FS2
TCELL53:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TX_EL_FORCE_START_FS
TCELL53:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS32
TCELL53:IMUX.IMUX.6.DELAYGTY_CHANNEL3.TXPREAMP_FS2
TCELL53:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS97
TCELL53:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TDASOFTRESET_FS
TCELL53:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS33
TCELL53:IMUX.IMUX.12.DELAYGTY_CHANNEL3.TXDRVAMP_FS2
TCELL53:IMUX.IMUX.13.DELAYGTY_CHANNEL3.TXEMPPRE_FS4
TCELL53:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS98
TCELL53:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS4
TCELL53:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TCODAOVREN_FS
TCELL53:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS34
TCELL53:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS4
TCELL53:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TCOHOLDFROUT_FS
TCELL53:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS99
TCELL53:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS4
TCELL53:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TXRATE_FS2
TCELL53:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS35
TCELL53:IMUX.IMUX.24.DELAYGTY_CHANNEL3.TXEMPPOS_FS4
TCELL53:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TXPRBSPTN_FS2
TCELL53:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS100
TCELL53:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXPLLCKSEL_FS1
TCELL53:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TXMARGIN_FS2
TCELL53:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS36
TCELL53:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS4
TCELL53:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS101
TCELL53:IMUX.IMUX.33.DELAYGTY_CHANNEL3.STEPSIZEPPM_FS4
TCELL53:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS37
TCELL53:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS12
TCELL53:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS2
TCELL53:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS102
TCELL53:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS12
TCELL53:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS3
TCELL53:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS38
TCELL53:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS4
TCELL53:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS2
TCELL53:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS103
TCELL53:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS4
TCELL53:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS3
TCELL53:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS39
TCELL54:OUT.0.TMINGTY_CHANNEL3.PHYSTATUS_SF
TCELL54:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF80
TCELL54:OUT.2.TMINGTY_CHANNEL3.RXBYTEISALIGNED_SF
TCELL54:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF16
TCELL54:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF2
TCELL54:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF81
TCELL54:OUT.6.TMINGTY_CHANNEL3.RXBUFSTATUS_SF0
TCELL54:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF17
TCELL54:OUT.8.TMINGTY_CHANNEL3.RXRECCLKPCS_SF
TCELL54:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF82
TCELL54:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF18
TCELL54:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF2
TCELL54:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF83
TCELL54:OUT.14.TMINGTY_CHANNEL3.RXCHBONDO_SF2
TCELL54:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF19
TCELL54:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF2
TCELL54:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF84
TCELL54:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF2
TCELL54:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF20
TCELL54:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF10
TCELL54:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF85
TCELL54:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF2
TCELL54:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF21
TCELL54:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF10
TCELL54:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF86
TCELL54:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF2
TCELL54:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF22
TCELL54:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF10
TCELL54:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF87
TCELL54:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF2
TCELL54:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF23
TCELL54:IMUX.CTRL.0GTY_CHANNEL3.DFERESETB_FS
TCELL54:IMUX.CTRL.5GTY_CHANNEL3.SCANCLKB_FS
TCELL54:IMUX.CTRL.7GTY_CHANNEL3.RXOOBRESETB_FS
TCELL54:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS5
TCELL54:IMUX.IMUX.1.DELAYGTY_CHANNEL3.RESETOVRD_FS
TCELL54:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS104
TCELL54:IMUX.IMUX.3.DELAYGTY_CHANNEL3.TXDRVAMP_FS4
TCELL54:IMUX.IMUX.4.DELAYGTY_CHANNEL3.TXDCCSTART_FS
TCELL54:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS40
TCELL54:IMUX.IMUX.7.DELAYGTY_CHANNEL3.TCODARESET_FS
TCELL54:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS105
TCELL54:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TCODAPWDN_FS
TCELL54:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS41
TCELL54:IMUX.IMUX.12.DELAYGTY_CHANNEL3.TXDRVAMP_FS3
TCELL54:IMUX.IMUX.13.DELAYGTY_CHANNEL3.RATE_DRP_DONE_EXT_FS
TCELL54:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS106
TCELL54:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS5
TCELL54:IMUX.IMUX.16.DELAYGTY_CHANNEL3.TXCOPIALGNEN_FS
TCELL54:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS42
TCELL54:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS5
TCELL54:IMUX.IMUX.19.DELAYGTY_CHANNEL3.TXCOPISETPHS_FS
TCELL54:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS107
TCELL54:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS5
TCELL54:IMUX.IMUX.22.DELAYGTY_CHANNEL3.TXPDOWNASYNCH_FS
TCELL54:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS43
TCELL54:IMUX.IMUX.25.DELAYGTY_CHANNEL3.TXINHIBIT_FS
TCELL54:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS108
TCELL54:IMUX.IMUX.27.DELAYGTY_CHANNEL3.TXELECIDLE_FS
TCELL54:IMUX.IMUX.28.DELAYGTY_CHANNEL3.TCOUPDNFROUT_FS
TCELL54:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS44
TCELL54:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS5
TCELL54:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS109
TCELL54:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXENCHANSYNC_FS
TCELL54:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS45
TCELL54:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS13
TCELL54:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS4
TCELL54:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS110
TCELL54:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS13
TCELL54:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS5
TCELL54:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS46
TCELL54:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS5
TCELL54:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS4
TCELL54:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS111
TCELL54:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS5
TCELL54:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS5
TCELL54:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS47
TCELL55:OUT.0.TMINGTY_CHANNEL3.COMINITDET_SF
TCELL55:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF88
TCELL55:OUT.2.TMINGTY_CHANNEL3.RXCKCORCNT_SF0
TCELL55:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF24
TCELL55:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF3
TCELL55:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF89
TCELL55:OUT.6.TMINGTY_CHANNEL3.RXBUFSTATUS_SF1
TCELL55:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF25
TCELL55:OUT.8.TMINGTY_CHANNEL3.RXDATAVALID_SF0
TCELL55:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF90
TCELL55:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF26
TCELL55:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF3
TCELL55:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF91
TCELL55:OUT.14.TMINGTY_CHANNEL3.RXCHBONDO_SF3
TCELL55:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF27
TCELL55:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF3
TCELL55:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF92
TCELL55:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF3
TCELL55:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF28
TCELL55:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF11
TCELL55:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF93
TCELL55:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF3
TCELL55:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF29
TCELL55:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF11
TCELL55:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF94
TCELL55:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF3
TCELL55:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF30
TCELL55:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF11
TCELL55:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF95
TCELL55:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF3
TCELL55:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF31
TCELL55:IMUX.CTRL.0GTY_CHANNEL3.CDRFRRESETB_FS
TCELL55:IMUX.CTRL.4GTY_CHANNEL3.TSTCLK1B_FS
TCELL55:IMUX.CTRL.5GTY_CHANNEL3.TSTCLK0B_FS
TCELL55:IMUX.CTRL.7GTY_CHANNEL3.RXPMARESETB_FS
TCELL55:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS6
TCELL55:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS112
TCELL55:IMUX.IMUX.3.DELAYGTY_CHANNEL3.GATERXELECIDLE_FS0
TCELL55:IMUX.IMUX.4.DELAYGTY_CHANNEL3.RXSYSCKSEL_FS1
TCELL55:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS48
TCELL55:IMUX.IMUX.6.DELAYGTY_CHANNEL3.TXSYNCFSMMASTER_FS
TCELL55:IMUX.IMUX.7.DELAYGTY_CHANNEL3.GATERXELECIDLE_FS1
TCELL55:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS113
TCELL55:IMUX.IMUX.9.DELAYGTY_CHANNEL3.TXRESET_FS
TCELL55:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS49
TCELL55:IMUX.IMUX.12.DELAYGTY_CHANNEL3.PRBSCNTRST_FS
TCELL55:IMUX.IMUX.13.DELAYGTY_CHANNEL3.RXPOLARITY_FS
TCELL55:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS114
TCELL55:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS6
TCELL55:IMUX.IMUX.16.DELAYGTY_CHANNEL3.RCOOVREN_FS
TCELL55:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS50
TCELL55:IMUX.IMUX.18.DELAYGTY_CHANNEL3.TXEMPMAIN_FS6
TCELL55:IMUX.IMUX.19.DELAYGTY_CHANNEL3.RCODAPWDN_FS
TCELL55:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS115
TCELL55:IMUX.IMUX.21.DELAYGTY_CHANNEL3.TXSEQUENCE_FS6
TCELL55:IMUX.IMUX.22.DELAYGTY_CHANNEL3.RXCOALGNEN_FS
TCELL55:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS51
TCELL55:IMUX.IMUX.24.DELAYGTY_CHANNEL3.RXCOSETPHS_FS
TCELL55:IMUX.IMUX.25.DELAYGTY_CHANNEL3.RXENPCOMMAALIGN_FS
TCELL55:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS116
TCELL55:IMUX.IMUX.28.DELAYGTY_CHANNEL3.RXOUTCKCTL_FS0
TCELL55:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS52
TCELL55:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS6
TCELL55:IMUX.IMUX.31.DELAYGTY_CHANNEL3.CDRHOLD_FS
TCELL55:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS117
TCELL55:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXCHBONDMASTER_FS
TCELL55:IMUX.IMUX.34.DELAYGTY_CHANNEL3.TCOINITSET_FS
TCELL55:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS53
TCELL55:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS14
TCELL55:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS6
TCELL55:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS118
TCELL55:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS14
TCELL55:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS7
TCELL55:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS54
TCELL55:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS6
TCELL55:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS6
TCELL55:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS119
TCELL55:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS6
TCELL55:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS7
TCELL55:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS55
TCELL56:OUT.0.TMINGTY_CHANNEL3.RXCOMMADET_SF
TCELL56:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF96
TCELL56:OUT.2.TMINGTY_CHANNEL3.RXCKCORCNT_SF1
TCELL56:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF32
TCELL56:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF4
TCELL56:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF97
TCELL56:OUT.6.TMINGTY_CHANNEL3.RXBUFSTATUS_SF2
TCELL56:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF33
TCELL56:OUT.8.TMINGTY_CHANNEL3.RXDATAVALID_SF1
TCELL56:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF98
TCELL56:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF34
TCELL56:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF4
TCELL56:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF99
TCELL56:OUT.14.TMINGTY_CHANNEL3.RXCHBONDO_SF4
TCELL56:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF35
TCELL56:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF4
TCELL56:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF100
TCELL56:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF4
TCELL56:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF36
TCELL56:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF12
TCELL56:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF101
TCELL56:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF4
TCELL56:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF37
TCELL56:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF12
TCELL56:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF102
TCELL56:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF4
TCELL56:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF38
TCELL56:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF12
TCELL56:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF103
TCELL56:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF4
TCELL56:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF39
TCELL56:IMUX.CTRL.0GTY_CHANNEL3.GTRXRSTB_FS
TCELL56:IMUX.CTRL.4GTY_CHANNEL3.RXUSRCLK2B_FS
TCELL56:IMUX.CTRL.5GTY_CHANNEL3.RXUSRCLKB_FS
TCELL56:IMUX.CTRL.7GTY_CHANNEL3.RCODARESETB_FS
TCELL56:IMUX.IMUX.0.DELAYGTY_CHANNEL3.TXCHARISK_FS7
TCELL56:IMUX.IMUX.1.DELAYGTY_CHANNEL3.TXSWING_FS
TCELL56:IMUX.IMUX.2.DELAYGTY_CHANNEL3.TXDATA_FS120
TCELL56:IMUX.IMUX.4.DELAYGTY_CHANNEL3.RXPLLCKSEL_FS0
TCELL56:IMUX.IMUX.5.DELAYGTY_CHANNEL3.TXDATA_FS56
TCELL56:IMUX.IMUX.7.DELAYGTY_CHANNEL3.SCANIN_FS14
TCELL56:IMUX.IMUX.8.DELAYGTY_CHANNEL3.TXDATA_FS121
TCELL56:IMUX.IMUX.10.DELAYGTY_CHANNEL3.SCANIN_FS15
TCELL56:IMUX.IMUX.11.DELAYGTY_CHANNEL3.TXDATA_FS57
TCELL56:IMUX.IMUX.13.DELAYGTY_CHANNEL3.RXRESET_FS
TCELL56:IMUX.IMUX.14.DELAYGTY_CHANNEL3.TXDATA_FS122
TCELL56:IMUX.IMUX.15.DELAYGTY_CHANNEL3.TXBYPASS8B10B_FS7
TCELL56:IMUX.IMUX.16.DELAYGTY_CHANNEL3.OSOVREN_FS
TCELL56:IMUX.IMUX.17.DELAYGTY_CHANNEL3.TXDATA_FS58
TCELL56:IMUX.IMUX.18.DELAYGTY_CHANNEL3.RXRATE_FS0
TCELL56:IMUX.IMUX.19.DELAYGTY_CHANNEL3.DFECFOKOVREN_FS
TCELL56:IMUX.IMUX.20.DELAYGTY_CHANNEL3.TXDATA_FS123
TCELL56:IMUX.IMUX.21.DELAYGTY_CHANNEL3.RXRATE_FS1
TCELL56:IMUX.IMUX.22.DELAYGTY_CHANNEL3.DFECFOKFPULSE_FS
TCELL56:IMUX.IMUX.23.DELAYGTY_CHANNEL3.TXDATA_FS59
TCELL56:IMUX.IMUX.24.DELAYGTY_CHANNEL3.RXRATE_FS2
TCELL56:IMUX.IMUX.25.DELAYGTY_CHANNEL3.DFECFOKFEN_FS
TCELL56:IMUX.IMUX.26.DELAYGTY_CHANNEL3.TXDATA_FS124
TCELL56:IMUX.IMUX.27.DELAYGTY_CHANNEL3.RXSYSCKSEL_FS0
TCELL56:IMUX.IMUX.28.DELAYGTY_CHANNEL3.RXOUTCKCTL_FS1
TCELL56:IMUX.IMUX.29.DELAYGTY_CHANNEL3.TXDATA_FS60
TCELL56:IMUX.IMUX.30.DELAYGTY_CHANNEL3.TXDATAEXTENDRSVD_FS7
TCELL56:IMUX.IMUX.31.DELAYGTY_CHANNEL3.CDROVREN_FS
TCELL56:IMUX.IMUX.32.DELAYGTY_CHANNEL3.TXDATA_FS125
TCELL56:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXCHBONDSLAVE_FS
TCELL56:IMUX.IMUX.34.DELAYGTY_CHANNEL3.RXOUTCKCTL_FS2
TCELL56:IMUX.IMUX.35.DELAYGTY_CHANNEL3.TXDATA_FS61
TCELL56:IMUX.IMUX.36.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS15
TCELL56:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS8
TCELL56:IMUX.IMUX.38.DELAYGTY_CHANNEL3.TXDATA_FS126
TCELL56:IMUX.IMUX.39.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS15
TCELL56:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS9
TCELL56:IMUX.IMUX.41.DELAYGTY_CHANNEL3.TXDATA_FS62
TCELL56:IMUX.IMUX.42.DELAYGTY_CHANNEL3.TXCHARDISPVAL_FS7
TCELL56:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS8
TCELL56:IMUX.IMUX.44.DELAYGTY_CHANNEL3.TXDATA_FS127
TCELL56:IMUX.IMUX.45.DELAYGTY_CHANNEL3.TXCHARDISPMODE_FS7
TCELL56:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS9
TCELL56:IMUX.IMUX.47.DELAYGTY_CHANNEL3.TXDATA_FS63
TCELL57:OUT.0.TMINGTY_CHANNEL3.COMSASDET_SF
TCELL57:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF104
TCELL57:OUT.2.TMINGTY_CHANNEL3.RXCHANBONDSEQ_SF
TCELL57:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF40
TCELL57:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF5
TCELL57:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF105
TCELL57:OUT.6.TMINGTY_CHANNEL3.RXRATEDONE_SF
TCELL57:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF41
TCELL57:OUT.8.TMINGTY_CHANNEL3.RXHEADERVALID_SF0
TCELL57:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF106
TCELL57:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF42
TCELL57:OUT.12.TMINGTY_CHANNEL3.RXHEADER_SF5
TCELL57:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF107
TCELL57:OUT.14.TMINGTY_CHANNEL3.RXSTATUS_SF0
TCELL57:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF43
TCELL57:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF5
TCELL57:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF108
TCELL57:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF5
TCELL57:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF44
TCELL57:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF13
TCELL57:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF109
TCELL57:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF5
TCELL57:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF45
TCELL57:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF13
TCELL57:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF110
TCELL57:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF5
TCELL57:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF46
TCELL57:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF13
TCELL57:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF111
TCELL57:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF5
TCELL57:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF47
TCELL57:IMUX.CTRL.0GTY_CHANNEL3.RXBUFRSTB_FS
TCELL57:IMUX.CTRL.4GTY_CHANNEL3.PMASCANCLK1B_FS
TCELL57:IMUX.CTRL.5GTY_CHANNEL3.PMASCANCLK0B_FS
TCELL57:IMUX.CTRL.7GTY_CHANNEL3.RXPROGDIVRESETB_FS
TCELL57:IMUX.IMUX.1.DELAYGTY_CHANNEL3.SCANIN_FS16
TCELL57:IMUX.IMUX.2.DELAYGTY_CHANNEL3.CKOKRESET_FS
TCELL57:IMUX.IMUX.3.DELAYGTY_CHANNEL3.LOOPRSVD_FS0
TCELL57:IMUX.IMUX.4.DELAYGTY_CHANNEL3.RXPLLCKSEL_FS1
TCELL57:IMUX.IMUX.5.DELAYGTY_CHANNEL3.RX_POST_DCC_START_FS
TCELL57:IMUX.IMUX.6.DELAYGTY_CHANNEL3.LOOPRSVD_FS3
TCELL57:IMUX.IMUX.7.DELAYGTY_CHANNEL3.DFEH2HOLD_FS
TCELL57:IMUX.IMUX.9.DELAYGTY_CHANNEL3.LOOPRSVD_FS6
TCELL57:IMUX.IMUX.10.DELAYGTY_CHANNEL3.DFEH2OVREN_FS
TCELL57:IMUX.IMUX.11.DELAYGTY_CHANNEL3.DFECFOKHOLD_FS
TCELL57:IMUX.IMUX.12.DELAYGTY_CHANNEL3.RXCOMMADETUSE_FS
TCELL57:IMUX.IMUX.13.DELAYGTY_CHANNEL3.DFEH5HOLD_FS
TCELL57:IMUX.IMUX.14.DELAYGTY_CHANNEL3.LOOPRSVD_FS9
TCELL57:IMUX.IMUX.15.DELAYGTY_CHANNEL3.RXCHBONDI_FS0
TCELL57:IMUX.IMUX.16.DELAYGTY_CHANNEL3.DFEH5OVREN_FS
TCELL57:IMUX.IMUX.17.DELAYGTY_CHANNEL3.AFECFOKEN_FS
TCELL57:IMUX.IMUX.18.DELAYGTY_CHANNEL3.RXCHBONDI_FS1
TCELL57:IMUX.IMUX.19.DELAYGTY_CHANNEL3.DFEH8HOLD_FS
TCELL57:IMUX.IMUX.21.DELAYGTY_CHANNEL3.RXCHBONDI_FS2
TCELL57:IMUX.IMUX.22.DELAYGTY_CHANNEL3.DFEH8OVREN_FS
TCELL57:IMUX.IMUX.23.DELAYGTY_CHANNEL3.OSHOLD_FS
TCELL57:IMUX.IMUX.24.DELAYGTY_CHANNEL3.RXCHBONDI_FS3
TCELL57:IMUX.IMUX.25.DELAYGTY_CHANNEL3.DFEH11HOLD_FS
TCELL57:IMUX.IMUX.27.DELAYGTY_CHANNEL3.RXCHBONDI_FS4
TCELL57:IMUX.IMUX.28.DELAYGTY_CHANNEL3.DFEH11OVREN_FS
TCELL57:IMUX.IMUX.29.DELAYGTY_CHANNEL3.CFOKRESET_FS
TCELL57:IMUX.IMUX.30.DELAYGTY_CHANNEL3.RXENMCOMMAALIGN_FS
TCELL57:IMUX.IMUX.31.DELAYGTY_CHANNEL3.DFEH14HOLD_FS
TCELL57:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXSLIDE_FS
TCELL57:IMUX.IMUX.34.DELAYGTY_CHANNEL3.DFEH14OVREN_FS
TCELL57:IMUX.IMUX.36.DELAYGTY_CHANNEL3.RXRATEASYNCH_FS
TCELL57:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS10
TCELL57:IMUX.IMUX.38.DELAYGTY_CHANNEL3.DFEKLOVREN_FS
TCELL57:IMUX.IMUX.39.DELAYGTY_CHANNEL3.DFEUTOVREN_FS
TCELL57:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS11
TCELL57:IMUX.IMUX.41.DELAYGTY_CHANNEL3.DFEKLHOLD_FS
TCELL57:IMUX.IMUX.42.DELAYGTY_CHANNEL3.DFEUTHOLD_FS
TCELL57:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS10
TCELL57:IMUX.IMUX.44.DELAYGTY_CHANNEL3.DFEGCOVREN_FS
TCELL57:IMUX.IMUX.45.DELAYGTY_CHANNEL3.DFEVSEN_FS
TCELL57:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS11
TCELL57:IMUX.IMUX.47.DELAYGTY_CHANNEL3.DFEGCHOLD_FS
TCELL58:OUT.0.TMINGTY_CHANNEL3.COMWAKEDET_SF
TCELL58:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF112
TCELL58:OUT.2.TMINGTY_CHANNEL3.RXCHISALIGNED_SF
TCELL58:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF48
TCELL58:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF6
TCELL58:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF113
TCELL58:OUT.6.TMINGTY_CHANNEL3.RXSTARTOFSEQ_SF0
TCELL58:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF49
TCELL58:OUT.8.TMINGTY_CHANNEL3.RXHEADERVALID_SF1
TCELL58:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF114
TCELL58:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF50
TCELL58:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF115
TCELL58:OUT.14.TMINGTY_CHANNEL3.RXSTATUS_SF1
TCELL58:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF51
TCELL58:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF6
TCELL58:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF116
TCELL58:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF6
TCELL58:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF52
TCELL58:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF14
TCELL58:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF117
TCELL58:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF6
TCELL58:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF53
TCELL58:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF14
TCELL58:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF118
TCELL58:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF6
TCELL58:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF54
TCELL58:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF14
TCELL58:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF119
TCELL58:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF6
TCELL58:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF55
TCELL58:IMUX.CTRL.0GTY_CHANNEL3.CDRPHRESETB_FS
TCELL58:IMUX.CTRL.4GTY_CHANNEL3.RXLATCLKB_FS
TCELL58:IMUX.CTRL.5GTY_CHANNEL3.ALT_SIGVALID_CLKB_FS
TCELL58:IMUX.CTRL.7GTY_CHANNEL3.RXDASOFTRESETB_FS
TCELL58:IMUX.IMUX.1.DELAYGTY_CHANNEL3.SCANIN_FS17
TCELL58:IMUX.IMUX.2.DELAYGTY_CHANNEL3.RXCHBONDLEVEL_FS0
TCELL58:IMUX.IMUX.3.DELAYGTY_CHANNEL3.LOOPRSVD_FS1
TCELL58:IMUX.IMUX.4.DELAYGTY_CHANNEL3.RXPWRDN_FS0
TCELL58:IMUX.IMUX.5.DELAYGTY_CHANNEL3.RXCHBONDLEVEL_FS1
TCELL58:IMUX.IMUX.6.DELAYGTY_CHANNEL3.LOOPRSVD_FS4
TCELL58:IMUX.IMUX.7.DELAYGTY_CHANNEL3.DFEH3HOLD_FS
TCELL58:IMUX.IMUX.8.DELAYGTY_CHANNEL3.RXCHBONDLEVEL_FS2
TCELL58:IMUX.IMUX.9.DELAYGTY_CHANNEL3.LOOPRSVD_FS7
TCELL58:IMUX.IMUX.10.DELAYGTY_CHANNEL3.DFEH3OVREN_FS
TCELL58:IMUX.IMUX.12.DELAYGTY_CHANNEL3.LPMOSHOLD_FS
TCELL58:IMUX.IMUX.13.DELAYGTY_CHANNEL3.DFEH6HOLD_FS
TCELL58:IMUX.IMUX.14.DELAYGTY_CHANNEL3.LOOPRSVD_FS10
TCELL58:IMUX.IMUX.16.DELAYGTY_CHANNEL3.DFEH6OVREN_FS
TCELL58:IMUX.IMUX.17.DELAYGTY_CHANNEL3.LOOPRSVD_FS11
TCELL58:IMUX.IMUX.19.DELAYGTY_CHANNEL3.DFEH9HOLD_FS
TCELL58:IMUX.IMUX.20.DELAYGTY_CHANNEL3.LPMOSOVREN_FS
TCELL58:IMUX.IMUX.21.DELAYGTY_CHANNEL3.LOOPRSVD_FS12
TCELL58:IMUX.IMUX.22.DELAYGTY_CHANNEL3.DFEH9OVREN_FS
TCELL58:IMUX.IMUX.23.DELAYGTY_CHANNEL3.RXSYNCFSMMASTER_FS
TCELL58:IMUX.IMUX.25.DELAYGTY_CHANNEL3.DFEH12HOLD_FS
TCELL58:IMUX.IMUX.26.DELAYGTY_CHANNEL3.RXSLVSYNCEN_FS
TCELL58:IMUX.IMUX.28.DELAYGTY_CHANNEL3.DFEH12OVREN_FS
TCELL58:IMUX.IMUX.29.DELAYGTY_CHANNEL3.RXUSRRDY_FS
TCELL58:IMUX.IMUX.30.DELAYGTY_CHANNEL3.LPMKHOVREN_FS
TCELL58:IMUX.IMUX.31.DELAYGTY_CHANNEL3.DFEH15HOLD_FS
TCELL58:IMUX.IMUX.32.DELAYGTY_CHANNEL3.RXLPMEN_FS
TCELL58:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXGEARBOXSLIP_FS
TCELL58:IMUX.IMUX.34.DELAYGTY_CHANNEL3.DFEH15OVREN_FS
TCELL58:IMUX.IMUX.35.DELAYGTY_CHANNEL3.RXMSTRSETPHDONE_FS
TCELL58:IMUX.IMUX.36.DELAYGTY_CHANNEL3.RXDEC8B10BUSE_FS
TCELL58:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS12
TCELL58:IMUX.IMUX.38.DELAYGTY_CHANNEL3.DFEDOUTMODE_FS0
TCELL58:IMUX.IMUX.39.DELAYGTY_CHANNEL3.DFEVPOVREN_FS
TCELL58:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS13
TCELL58:IMUX.IMUX.41.DELAYGTY_CHANNEL3.PCIERSTIDLE_FS
TCELL58:IMUX.IMUX.42.DELAYGTY_CHANNEL3.DFEVPHOLD_FS
TCELL58:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS12
TCELL58:IMUX.IMUX.44.DELAYGTY_CHANNEL3.DFEDOUTMODE_FS1
TCELL58:IMUX.IMUX.45.DELAYGTY_CHANNEL3.DFEYEN_FS
TCELL58:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS13
TCELL59:OUT.0.TMINGTY_CHANNEL3.RXVALID_SF
TCELL59:OUT.1.TMINGTY_CHANNEL3.RXDATA_SF120
TCELL59:OUT.2.TMINGTY_CHANNEL3.RXCHANREALIGN_SF
TCELL59:OUT.3.TMINGTY_CHANNEL3.RXDATA_SF56
TCELL59:OUT.4.TMINGTY_CHANNEL3.RXDATAEXTENDRSVD_SF7
TCELL59:OUT.5.TMINGTY_CHANNEL3.RXDATA_SF121
TCELL59:OUT.6.TMINGTY_CHANNEL3.RXSTARTOFSEQ_SF1
TCELL59:OUT.7.TMINGTY_CHANNEL3.RXDATA_SF57
TCELL59:OUT.8.TMINGTY_CHANNEL3.RXPRBSERR_SF
TCELL59:OUT.9.TMINGTY_CHANNEL3.RXDATA_SF122
TCELL59:OUT.10.TMINGTY_CHANNEL3.RXRESETDONE_SF
TCELL59:OUT.11.TMINGTY_CHANNEL3.RXDATA_SF58
TCELL59:OUT.13.TMINGTY_CHANNEL3.RXDATA_SF123
TCELL59:OUT.14.TMINGTY_CHANNEL3.RXSTATUS_SF2
TCELL59:OUT.15.TMINGTY_CHANNEL3.RXDATA_SF59
TCELL59:OUT.16.TMINGTY_CHANNEL3.RXNOTINTABLE_SF7
TCELL59:OUT.17.TMINGTY_CHANNEL3.RXDATA_SF124
TCELL59:OUT.18.TMINGTY_CHANNEL3.RXCHARISCOMMA_SF7
TCELL59:OUT.19.TMINGTY_CHANNEL3.RXDATA_SF60
TCELL59:OUT.20.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF15
TCELL59:OUT.21.TMINGTY_CHANNEL3.RXDATA_SF125
TCELL59:OUT.22.TMINGTY_CHANNEL3.PCS_RSVD_OUT_SF7
TCELL59:OUT.23.TMINGTY_CHANNEL3.RXDATA_SF61
TCELL59:OUT.24.TMINGTY_CHANNEL3.RXCHARISK_SF15
TCELL59:OUT.25.TMINGTY_CHANNEL3.RXDATA_SF126
TCELL59:OUT.26.TMINGTY_CHANNEL3.RXCHARISK_SF7
TCELL59:OUT.27.TMINGTY_CHANNEL3.RXDATA_SF62
TCELL59:OUT.28.TMINGTY_CHANNEL3.RXDISPERR_SF15
TCELL59:OUT.29.TMINGTY_CHANNEL3.RXDATA_SF127
TCELL59:OUT.30.TMINGTY_CHANNEL3.RXDISPERR_SF7
TCELL59:OUT.31.TMINGTY_CHANNEL3.RXDATA_SF63
TCELL59:IMUX.CTRL.0GTY_CHANNEL3.CDRRESETB_FS
TCELL59:IMUX.CTRL.4GTY_CHANNEL3.CKPINRSRVD1B_FS
TCELL59:IMUX.CTRL.5GTY_CHANNEL3.CKPINRSRVD0B_FS
TCELL59:IMUX.IMUX.0.DELAYGTY_CHANNEL3.RXPRBSPTN_FS3
TCELL59:IMUX.IMUX.1.DELAYGTY_CHANNEL3.SCANIN_FS18
TCELL59:IMUX.IMUX.2.DELAYGTY_CHANNEL3.RXPRBSPTN_FS0
TCELL59:IMUX.IMUX.3.DELAYGTY_CHANNEL3.LOOPRSVD_FS2
TCELL59:IMUX.IMUX.4.DELAYGTY_CHANNEL3.RXPWRDN_FS1
TCELL59:IMUX.IMUX.5.DELAYGTY_CHANNEL3.RXPRBSPTN_FS1
TCELL59:IMUX.IMUX.6.DELAYGTY_CHANNEL3.LOOPRSVD_FS5
TCELL59:IMUX.IMUX.7.DELAYGTY_CHANNEL3.DFEH4HOLD_FS
TCELL59:IMUX.IMUX.8.DELAYGTY_CHANNEL3.RXPRBSPTN_FS2
TCELL59:IMUX.IMUX.9.DELAYGTY_CHANNEL3.LOOPRSVD_FS8
TCELL59:IMUX.IMUX.10.DELAYGTY_CHANNEL3.DFEH4OVREN_FS
TCELL59:IMUX.IMUX.11.DELAYGTY_CHANNEL3.DFECFOKCFNUM_FS0
TCELL59:IMUX.IMUX.13.DELAYGTY_CHANNEL3.DFEH7HOLD_FS
TCELL59:IMUX.IMUX.14.DELAYGTY_CHANNEL3.DFECFOKCFNUM_FS1
TCELL59:IMUX.IMUX.15.DELAYGTY_CHANNEL3.CDRSTEPSX_FS
TCELL59:IMUX.IMUX.16.DELAYGTY_CHANNEL3.DFEH7OVREN_FS
TCELL59:IMUX.IMUX.17.DELAYGTY_CHANNEL3.DFECFOKCFNUM_FS2
TCELL59:IMUX.IMUX.18.DELAYGTY_CHANNEL3.CDRSTEPSQ_FS
TCELL59:IMUX.IMUX.19.DELAYGTY_CHANNEL3.DFEH10HOLD_FS
TCELL59:IMUX.IMUX.20.DELAYGTY_CHANNEL3.DFECFOKCFNUM_FS3
TCELL59:IMUX.IMUX.22.DELAYGTY_CHANNEL3.DFEH10OVREN_FS
TCELL59:IMUX.IMUX.23.DELAYGTY_CHANNEL3.LPMKLOVREN_FS
TCELL59:IMUX.IMUX.24.DELAYGTY_CHANNEL3.LOOPRSVD_FS13
TCELL59:IMUX.IMUX.25.DELAYGTY_CHANNEL3.DFEH13HOLD_FS
TCELL59:IMUX.IMUX.26.DELAYGTY_CHANNEL3.LPMKLHOLD_FS
TCELL59:IMUX.IMUX.28.DELAYGTY_CHANNEL3.DFEH13OVREN_FS
TCELL59:IMUX.IMUX.29.DELAYGTY_CHANNEL3.LPMKHHOLD_FS
TCELL59:IMUX.IMUX.30.DELAYGTY_CHANNEL3.LPMGCHOLD_FS
TCELL59:IMUX.IMUX.31.DELAYGTY_CHANNEL3.LOOPRSVD_FS14
TCELL59:IMUX.IMUX.32.DELAYGTY_CHANNEL3.RXDAOVREN_FS
TCELL59:IMUX.IMUX.33.DELAYGTY_CHANNEL3.RXDAALGNEN_FS
TCELL59:IMUX.IMUX.34.DELAYGTY_CHANNEL3.LPMGCOVREN_FS
TCELL59:IMUX.IMUX.35.DELAYGTY_CHANNEL3.RXSLIPPMA_FS
TCELL59:IMUX.IMUX.36.DELAYGTY_CHANNEL3.RXDABYPASS_FS
TCELL59:IMUX.IMUX.37.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS14
TCELL59:IMUX.IMUX.39.DELAYGTY_CHANNEL3.PCIEEQRXEQADAPTDONE_FS
TCELL59:IMUX.IMUX.40.DELAYGTY_CHANNEL3.PCS_RSVD_IN_FS15
TCELL59:IMUX.IMUX.41.DELAYGTY_CHANNEL3.LOOPRSVD_FS15
TCELL59:IMUX.IMUX.42.DELAYGTY_CHANNEL3.RXSLIPOUTCLK_FS
TCELL59:IMUX.IMUX.43.DELAYGTY_CHANNEL3.PINRSRVD_FS14
TCELL59:IMUX.IMUX.45.DELAYGTY_CHANNEL3.CDRSTEPDIR_FS
TCELL59:IMUX.IMUX.46.DELAYGTY_CHANNEL3.PINRSRVD_FS15