Cells: 1
ultrascale LAGUNA bel LAGUNA[0]
| Pin | Direction | Wires |
|---|
| RXOUT0 | output | OUT[0] |
| RXOUT1 | output | OUT[6] |
| RXOUT2 | output | OUT[13] |
| RXOUT3 | output | OUT[20] |
| RXOUT4 | output | OUT[27] |
| RXOUT5 | output | OUT[28] |
| RX_CE | input | IMUX_IMUX[11] |
| RX_CLK_B | input | IMUX_CTRL[5] |
| RX_SR | input | IMUX_IMUX[10] |
| TXD0 | input | IMUX_IMUX[16] |
| TXD1 | input | IMUX_IMUX[23] |
| TXD2 | input | IMUX_IMUX[30] |
| TXD3 | input | IMUX_IMUX[36] |
| TXD4 | input | IMUX_IMUX[43] |
| TXD5 | input | IMUX_IMUX[44] |
| TX_CE | input | IMUX_IMUX[9] |
| TX_CLK_B | input | IMUX_CTRL[4] |
| TX_SR | input | IMUX_IMUX[8] |
ultrascale LAGUNA bel LAGUNA[1]
| Pin | Direction | Wires |
|---|
| RXOUT0 | output | OUT[21] |
| RXOUT1 | output | OUT[14] |
| RXOUT2 | output | OUT[8] |
| RXOUT3 | output | OUT[1] |
| RXOUT4 | output | OUT[3] |
| RXOUT5 | output | OUT[9] |
| RX_CE | input | IMUX_IMUX[3] |
| RX_CLK_B | input | IMUX_CTRL[1] |
| RX_SR | input | IMUX_IMUX[2] |
| TXD0 | input | IMUX_IMUX[38] |
| TXD1 | input | IMUX_IMUX[31] |
| TXD2 | input | IMUX_IMUX[24] |
| TXD3 | input | IMUX_IMUX[18] |
| TXD4 | input | IMUX_IMUX[19] |
| TXD5 | input | IMUX_IMUX[26] |
| TX_CE | input | IMUX_IMUX[1] |
| TX_CLK_B | input | IMUX_CTRL[0] |
| TX_SR | input | IMUX_IMUX[0] |
ultrascale LAGUNA bel LAGUNA[2]
| Pin | Direction | Wires |
|---|
| RXOUT0 | output | OUT[16] |
| RXOUT1 | output | OUT[22] |
| RXOUT2 | output | OUT[29] |
| RXOUT3 | output | OUT[30] |
| RXOUT4 | output | OUT[24] |
| RXOUT5 | output | OUT[17] |
| RX_CE | input | IMUX_IMUX[15] |
| RX_CLK_B | input | IMUX_CTRL[7] |
| RX_SR | input | IMUX_IMUX[14] |
| TXD0 | input | IMUX_IMUX[32] |
| TXD1 | input | IMUX_IMUX[39] |
| TXD2 | input | IMUX_IMUX[46] |
| TXD3 | input | IMUX_IMUX[47] |
| TXD4 | input | IMUX_IMUX[40] |
| TXD5 | input | IMUX_IMUX[34] |
| TX_CE | input | IMUX_IMUX[13] |
| TX_CLK_B | input | IMUX_CTRL[6] |
| TX_SR | input | IMUX_IMUX[12] |
ultrascale LAGUNA bel LAGUNA[3]
| Pin | Direction | Wires |
|---|
| RXOUT0 | output | OUT[11] |
| RXOUT1 | output | OUT[4] |
| RXOUT2 | output | OUT[5] |
| RXOUT3 | output | OUT[12] |
| RXOUT4 | output | OUT[19] |
| RXOUT5 | output | OUT[25] |
| RX_CE | input | IMUX_IMUX[7] |
| RX_CLK_B | input | IMUX_CTRL[3] |
| RX_SR | input | IMUX_IMUX[6] |
| TXD0 | input | IMUX_IMUX[27] |
| TXD1 | input | IMUX_IMUX[20] |
| TXD2 | input | IMUX_IMUX[22] |
| TXD3 | input | IMUX_IMUX[28] |
| TXD4 | input | IMUX_IMUX[35] |
| TXD5 | input | IMUX_IMUX[42] |
| TX_CE | input | IMUX_IMUX[5] |
| TX_CLK_B | input | IMUX_CTRL[2] |
| TX_SR | input | IMUX_IMUX[4] |
ultrascale LAGUNA bel LAGUNA_EXTRA
| Pin | Direction | Wires |
|---|
ultrascale LAGUNA bel VCC_LAGUNA
| Pin | Direction | Wires |
|---|
ultrascale LAGUNA bel wires
| Wire | Pins |
|---|
| OUT[0] | LAGUNA[0].RXOUT0 |
| OUT[1] | LAGUNA[1].RXOUT3 |
| OUT[3] | LAGUNA[1].RXOUT4 |
| OUT[4] | LAGUNA[3].RXOUT1 |
| OUT[5] | LAGUNA[3].RXOUT2 |
| OUT[6] | LAGUNA[0].RXOUT1 |
| OUT[8] | LAGUNA[1].RXOUT2 |
| OUT[9] | LAGUNA[1].RXOUT5 |
| OUT[11] | LAGUNA[3].RXOUT0 |
| OUT[12] | LAGUNA[3].RXOUT3 |
| OUT[13] | LAGUNA[0].RXOUT2 |
| OUT[14] | LAGUNA[1].RXOUT1 |
| OUT[16] | LAGUNA[2].RXOUT0 |
| OUT[17] | LAGUNA[2].RXOUT5 |
| OUT[19] | LAGUNA[3].RXOUT4 |
| OUT[20] | LAGUNA[0].RXOUT3 |
| OUT[21] | LAGUNA[1].RXOUT0 |
| OUT[22] | LAGUNA[2].RXOUT1 |
| OUT[24] | LAGUNA[2].RXOUT4 |
| OUT[25] | LAGUNA[3].RXOUT5 |
| OUT[27] | LAGUNA[0].RXOUT4 |
| OUT[28] | LAGUNA[0].RXOUT5 |
| OUT[29] | LAGUNA[2].RXOUT2 |
| OUT[30] | LAGUNA[2].RXOUT3 |
| IMUX_CTRL[0] | LAGUNA[1].TX_CLK_B |
| IMUX_CTRL[1] | LAGUNA[1].RX_CLK_B |
| IMUX_CTRL[2] | LAGUNA[3].TX_CLK_B |
| IMUX_CTRL[3] | LAGUNA[3].RX_CLK_B |
| IMUX_CTRL[4] | LAGUNA[0].TX_CLK_B |
| IMUX_CTRL[5] | LAGUNA[0].RX_CLK_B |
| IMUX_CTRL[6] | LAGUNA[2].TX_CLK_B |
| IMUX_CTRL[7] | LAGUNA[2].RX_CLK_B |
| IMUX_IMUX[0] | LAGUNA[1].TX_SR |
| IMUX_IMUX[1] | LAGUNA[1].TX_CE |
| IMUX_IMUX[2] | LAGUNA[1].RX_SR |
| IMUX_IMUX[3] | LAGUNA[1].RX_CE |
| IMUX_IMUX[4] | LAGUNA[3].TX_SR |
| IMUX_IMUX[5] | LAGUNA[3].TX_CE |
| IMUX_IMUX[6] | LAGUNA[3].RX_SR |
| IMUX_IMUX[7] | LAGUNA[3].RX_CE |
| IMUX_IMUX[8] | LAGUNA[0].TX_SR |
| IMUX_IMUX[9] | LAGUNA[0].TX_CE |
| IMUX_IMUX[10] | LAGUNA[0].RX_SR |
| IMUX_IMUX[11] | LAGUNA[0].RX_CE |
| IMUX_IMUX[12] | LAGUNA[2].TX_SR |
| IMUX_IMUX[13] | LAGUNA[2].TX_CE |
| IMUX_IMUX[14] | LAGUNA[2].RX_SR |
| IMUX_IMUX[15] | LAGUNA[2].RX_CE |
| IMUX_IMUX[16] | LAGUNA[0].TXD0 |
| IMUX_IMUX[18] | LAGUNA[1].TXD3 |
| IMUX_IMUX[19] | LAGUNA[1].TXD4 |
| IMUX_IMUX[20] | LAGUNA[3].TXD1 |
| IMUX_IMUX[22] | LAGUNA[3].TXD2 |
| IMUX_IMUX[23] | LAGUNA[0].TXD1 |
| IMUX_IMUX[24] | LAGUNA[1].TXD2 |
| IMUX_IMUX[26] | LAGUNA[1].TXD5 |
| IMUX_IMUX[27] | LAGUNA[3].TXD0 |
| IMUX_IMUX[28] | LAGUNA[3].TXD3 |
| IMUX_IMUX[30] | LAGUNA[0].TXD2 |
| IMUX_IMUX[31] | LAGUNA[1].TXD1 |
| IMUX_IMUX[32] | LAGUNA[2].TXD0 |
| IMUX_IMUX[34] | LAGUNA[2].TXD5 |
| IMUX_IMUX[35] | LAGUNA[3].TXD4 |
| IMUX_IMUX[36] | LAGUNA[0].TXD3 |
| IMUX_IMUX[38] | LAGUNA[1].TXD0 |
| IMUX_IMUX[39] | LAGUNA[2].TXD1 |
| IMUX_IMUX[40] | LAGUNA[2].TXD4 |
| IMUX_IMUX[42] | LAGUNA[3].TXD5 |
| IMUX_IMUX[43] | LAGUNA[0].TXD4 |
| IMUX_IMUX[44] | LAGUNA[0].TXD5 |
| IMUX_IMUX[46] | LAGUNA[2].TXD2 |
| IMUX_IMUX[47] | LAGUNA[2].TXD3 |