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HPIO XIPHY

Tile XIPHY

Cells: 15

Bel BITSLICE[0]

ultrascaleplus XIPHY bel BITSLICE[0]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[0].IMUX_IMUX_DELAY[9]
DYN_DCI_OUT_INTinputCELL[0].IMUX_BYP_DELAY[15]
PHY2CLB_FIFO_EMPTYoutputCELL[0].OUT_BEL[4]
RX_CE_IDELAYinputCELL[0].IMUX_BYP_DELAY[14]
RX_CE_IFDinputCELL[0].IMUX_IMUX_DELAY[7]
RX_CNTVALUEIN0inputCELL[2].IMUX_IMUX_DELAY[18]
RX_CNTVALUEIN1inputCELL[2].IMUX_IMUX_DELAY[19]
RX_CNTVALUEIN2inputCELL[2].IMUX_IMUX_DELAY[20]
RX_CNTVALUEIN3inputCELL[2].IMUX_IMUX_DELAY[21]
RX_CNTVALUEIN4inputCELL[2].IMUX_IMUX_DELAY[22]
RX_CNTVALUEIN5inputCELL[2].IMUX_IMUX_DELAY[23]
RX_CNTVALUEIN6inputCELL[2].IMUX_IMUX_DELAY[24]
RX_CNTVALUEIN7inputCELL[2].IMUX_IMUX_DELAY[25]
RX_CNTVALUEIN8inputCELL[2].IMUX_IMUX_DELAY[28]
RX_CNTVALUEOUT0outputCELL[0].OUT_BEL[20]
RX_CNTVALUEOUT1outputCELL[0].OUT_BEL[21]
RX_CNTVALUEOUT2outputCELL[0].OUT_BEL[24]
RX_CNTVALUEOUT3outputCELL[0].OUT_BEL[25]
RX_CNTVALUEOUT4outputCELL[0].OUT_BEL[26]
RX_CNTVALUEOUT5outputCELL[0].OUT_BEL[27]
RX_CNTVALUEOUT6outputCELL[0].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[0].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[0].OUT_BEL[31]
RX_DATAIN1inputCELL[0].IMUX_IMUX_DELAY[8]
RX_EN_VTCinputCELL[0].IMUX_BYP_DELAY[13]
RX_INCinputCELL[0].IMUX_BYP_DELAY[12]
RX_LDinputCELL[0].IMUX_BYP_DELAY[11]
RX_Q0outputCELL[0].OUT_BEL[5]
RX_Q1outputCELL[0].OUT_BEL[10]
RX_Q2outputCELL[0].OUT_BEL[11]
RX_Q3outputCELL[0].OUT_BEL[16]
RX_Q4outputCELL[0].OUT_BEL[17]
RX_Q5outputCELL[0].OUT_BEL[22]
RX_Q6outputCELL[0].OUT_BEL[23]
RX_Q7outputCELL[0].OUT_BEL[28]
TX_CE_ODELAYinputCELL[0].IMUX_BYP_DELAY[10]
TX_CE_OFDinputCELL[0].IMUX_IMUX_DELAY[6]
TX_CNTVALUEIN0inputCELL[1].IMUX_IMUX_DELAY[7]
TX_CNTVALUEIN1inputCELL[1].IMUX_IMUX_DELAY[8]
TX_CNTVALUEIN2inputCELL[1].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN3inputCELL[1].IMUX_IMUX_DELAY[10]
TX_CNTVALUEIN4inputCELL[1].IMUX_IMUX_DELAY[11]
TX_CNTVALUEIN5inputCELL[1].IMUX_IMUX_DELAY[12]
TX_CNTVALUEIN6inputCELL[1].IMUX_IMUX_DELAY[13]
TX_CNTVALUEIN7inputCELL[1].IMUX_IMUX_DELAY[14]
TX_CNTVALUEIN8inputCELL[1].IMUX_IMUX_DELAY[15]
TX_CNTVALUEOUT0outputCELL[0].OUT_BEL[6]
TX_CNTVALUEOUT1outputCELL[0].OUT_BEL[7]
TX_CNTVALUEOUT2outputCELL[0].OUT_BEL[8]
TX_CNTVALUEOUT3outputCELL[0].OUT_BEL[9]
TX_CNTVALUEOUT4outputCELL[0].OUT_BEL[12]
TX_CNTVALUEOUT5outputCELL[0].OUT_BEL[13]
TX_CNTVALUEOUT6outputCELL[0].OUT_BEL[14]
TX_CNTVALUEOUT7outputCELL[0].OUT_BEL[15]
TX_CNTVALUEOUT8outputCELL[0].OUT_BEL[18]
TX_D0inputCELL[1].IMUX_IMUX_DELAY[16]
TX_D1inputCELL[1].IMUX_IMUX_DELAY[6]
TX_D2inputCELL[0].IMUX_IMUX_DELAY[15]
TX_D3inputCELL[0].IMUX_IMUX_DELAY[14]
TX_D4inputCELL[0].IMUX_IMUX_DELAY[13]
TX_D5inputCELL[0].IMUX_IMUX_DELAY[12]
TX_D6inputCELL[0].IMUX_IMUX_DELAY[11]
TX_D7inputCELL[0].IMUX_IMUX_DELAY[10]
TX_EN_VTCinputCELL[0].IMUX_BYP_DELAY[9]
TX_INCinputCELL[0].IMUX_BYP_DELAY[8]
TX_LDinputCELL[0].IMUX_BYP_DELAY[7]
TX_TinputCELL[0].IMUX_IMUX_DELAY[16]
TX_T_OUToutputCELL[0].OUT_BEL[19]

Bel BITSLICE[1]

ultrascaleplus XIPHY bel BITSLICE[1]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[2].IMUX_IMUX_DELAY[7]
DYN_DCI_OUT_INTinputCELL[1].IMUX_BYP_DELAY[15]
PHY2CLB_FIFO_EMPTYoutputCELL[1].OUT_BEL[4]
RX_CE_IDELAYinputCELL[1].IMUX_BYP_DELAY[14]
RX_CE_IFDinputCELL[2].IMUX_IMUX_DELAY[6]
RX_CNTVALUEIN0inputCELL[2].IMUX_IMUX_DELAY[11]
RX_CNTVALUEIN1inputCELL[2].IMUX_IMUX_DELAY[42]
RX_CNTVALUEIN2inputCELL[2].IMUX_IMUX_DELAY[12]
RX_CNTVALUEIN3inputCELL[2].IMUX_IMUX_DELAY[43]
RX_CNTVALUEIN4inputCELL[2].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN5inputCELL[2].IMUX_IMUX_DELAY[44]
RX_CNTVALUEIN6inputCELL[2].IMUX_IMUX_DELAY[45]
RX_CNTVALUEIN7inputCELL[2].IMUX_IMUX_DELAY[46]
RX_CNTVALUEIN8inputCELL[2].IMUX_IMUX_DELAY[14]
RX_CNTVALUEOUT0outputCELL[1].OUT_BEL[20]
RX_CNTVALUEOUT1outputCELL[1].OUT_BEL[21]
RX_CNTVALUEOUT2outputCELL[1].OUT_BEL[24]
RX_CNTVALUEOUT3outputCELL[1].OUT_BEL[25]
RX_CNTVALUEOUT4outputCELL[1].OUT_BEL[26]
RX_CNTVALUEOUT5outputCELL[1].OUT_BEL[27]
RX_CNTVALUEOUT6outputCELL[1].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[1].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[1].OUT_BEL[31]
RX_DATAIN1inputCELL[2].IMUX_IMUX_DELAY[31]
RX_EN_VTCinputCELL[1].IMUX_BYP_DELAY[13]
RX_INCinputCELL[1].IMUX_BYP_DELAY[12]
RX_LDinputCELL[1].IMUX_BYP_DELAY[11]
RX_Q0outputCELL[1].OUT_BEL[5]
RX_Q1outputCELL[1].OUT_BEL[10]
RX_Q2outputCELL[1].OUT_BEL[11]
RX_Q3outputCELL[1].OUT_BEL[16]
RX_Q4outputCELL[1].OUT_BEL[17]
RX_Q5outputCELL[1].OUT_BEL[22]
RX_Q6outputCELL[1].OUT_BEL[23]
RX_Q7outputCELL[1].OUT_BEL[28]
TX_CE_ODELAYinputCELL[1].IMUX_BYP_DELAY[10]
TX_CE_OFDinputCELL[2].IMUX_IMUX_DELAY[30]
TX_CNTVALUEIN0inputCELL[2].IMUX_IMUX_DELAY[32]
TX_CNTVALUEIN1inputCELL[2].IMUX_IMUX_DELAY[33]
TX_CNTVALUEIN2inputCELL[2].IMUX_IMUX_DELAY[35]
TX_CNTVALUEIN3inputCELL[2].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN4inputCELL[2].IMUX_IMUX_DELAY[36]
TX_CNTVALUEIN5inputCELL[2].IMUX_IMUX_DELAY[37]
TX_CNTVALUEIN6inputCELL[2].IMUX_IMUX_DELAY[38]
TX_CNTVALUEIN7inputCELL[2].IMUX_IMUX_DELAY[10]
TX_CNTVALUEIN8inputCELL[2].IMUX_IMUX_DELAY[39]
TX_CNTVALUEOUT0outputCELL[1].OUT_BEL[6]
TX_CNTVALUEOUT1outputCELL[1].OUT_BEL[7]
TX_CNTVALUEOUT2outputCELL[1].OUT_BEL[8]
TX_CNTVALUEOUT3outputCELL[1].OUT_BEL[9]
TX_CNTVALUEOUT4outputCELL[1].OUT_BEL[12]
TX_CNTVALUEOUT5outputCELL[1].OUT_BEL[13]
TX_CNTVALUEOUT6outputCELL[1].OUT_BEL[14]
TX_CNTVALUEOUT7outputCELL[1].OUT_BEL[15]
TX_CNTVALUEOUT8outputCELL[1].OUT_BEL[18]
TX_D0inputCELL[2].IMUX_IMUX_DELAY[16]
TX_D1inputCELL[2].IMUX_IMUX_DELAY[17]
TX_D2inputCELL[2].IMUX_IMUX_DELAY[26]
TX_D3inputCELL[2].IMUX_IMUX_DELAY[27]
TX_D4inputCELL[2].IMUX_IMUX_DELAY[34]
TX_D5inputCELL[2].IMUX_IMUX_DELAY[8]
TX_D6inputCELL[2].IMUX_IMUX_DELAY[40]
TX_D7inputCELL[2].IMUX_IMUX_DELAY[41]
TX_EN_VTCinputCELL[1].IMUX_BYP_DELAY[9]
TX_INCinputCELL[1].IMUX_BYP_DELAY[8]
TX_LDinputCELL[1].IMUX_BYP_DELAY[7]
TX_TinputCELL[2].IMUX_IMUX_DELAY[29]
TX_T_OUToutputCELL[1].OUT_BEL[19]

Bel BITSLICE[2]

ultrascaleplus XIPHY bel BITSLICE[2]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[3].IMUX_IMUX_DELAY[18]
DYN_DCI_OUT_INTinputCELL[2].IMUX_BYP_DELAY[14]
PHY2CLB_FIFO_EMPTYoutputCELL[2].OUT_BEL[4]
RX_CE_IDELAYinputCELL[2].IMUX_BYP_DELAY[13]
RX_CE_IFDinputCELL[3].IMUX_IMUX_DELAY[16]
RX_CNTVALUEIN0inputCELL[3].IMUX_IMUX_DELAY[6]
RX_CNTVALUEIN1inputCELL[3].IMUX_IMUX_DELAY[31]
RX_CNTVALUEIN2inputCELL[3].IMUX_IMUX_DELAY[7]
RX_CNTVALUEIN3inputCELL[3].IMUX_IMUX_DELAY[34]
RX_CNTVALUEIN4inputCELL[3].IMUX_IMUX_DELAY[8]
RX_CNTVALUEIN5inputCELL[3].IMUX_IMUX_DELAY[35]
RX_CNTVALUEIN6inputCELL[3].IMUX_IMUX_DELAY[9]
RX_CNTVALUEIN7inputCELL[3].IMUX_IMUX_DELAY[36]
RX_CNTVALUEIN8inputCELL[3].IMUX_IMUX_DELAY[37]
RX_CNTVALUEOUT0outputCELL[2].OUT_BEL[20]
RX_CNTVALUEOUT1outputCELL[2].OUT_BEL[21]
RX_CNTVALUEOUT2outputCELL[2].OUT_BEL[24]
RX_CNTVALUEOUT3outputCELL[2].OUT_BEL[25]
RX_CNTVALUEOUT4outputCELL[2].OUT_BEL[26]
RX_CNTVALUEOUT5outputCELL[2].OUT_BEL[27]
RX_CNTVALUEOUT6outputCELL[2].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[2].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[2].OUT_BEL[31]
RX_DATAIN1inputCELL[3].IMUX_IMUX_DELAY[17]
RX_EN_VTCinputCELL[2].IMUX_BYP_DELAY[12]
RX_INCinputCELL[2].IMUX_BYP_DELAY[11]
RX_LDinputCELL[2].IMUX_BYP_DELAY[10]
RX_Q0outputCELL[2].OUT_BEL[5]
RX_Q1outputCELL[2].OUT_BEL[10]
RX_Q2outputCELL[2].OUT_BEL[11]
RX_Q3outputCELL[2].OUT_BEL[16]
RX_Q4outputCELL[2].OUT_BEL[17]
RX_Q5outputCELL[2].OUT_BEL[22]
RX_Q6outputCELL[2].OUT_BEL[23]
RX_Q7outputCELL[2].OUT_BEL[28]
TX_CE_ODELAYinputCELL[2].IMUX_BYP_DELAY[9]
TX_CE_OFDinputCELL[2].IMUX_IMUX_DELAY[15]
TX_CNTVALUEIN0inputCELL[3].IMUX_IMUX_DELAY[20]
TX_CNTVALUEIN1inputCELL[3].IMUX_IMUX_DELAY[21]
TX_CNTVALUEIN2inputCELL[3].IMUX_IMUX_DELAY[22]
TX_CNTVALUEIN3inputCELL[3].IMUX_IMUX_DELAY[23]
TX_CNTVALUEIN4inputCELL[3].IMUX_IMUX_DELAY[26]
TX_CNTVALUEIN5inputCELL[3].IMUX_IMUX_DELAY[27]
TX_CNTVALUEIN6inputCELL[3].IMUX_IMUX_DELAY[28]
TX_CNTVALUEIN7inputCELL[3].IMUX_IMUX_DELAY[29]
TX_CNTVALUEIN8inputCELL[3].IMUX_IMUX_DELAY[30]
TX_CNTVALUEOUT0outputCELL[2].OUT_BEL[6]
TX_CNTVALUEOUT1outputCELL[2].OUT_BEL[7]
TX_CNTVALUEOUT2outputCELL[2].OUT_BEL[8]
TX_CNTVALUEOUT3outputCELL[2].OUT_BEL[9]
TX_CNTVALUEOUT4outputCELL[2].OUT_BEL[12]
TX_CNTVALUEOUT5outputCELL[2].OUT_BEL[13]
TX_CNTVALUEOUT6outputCELL[2].OUT_BEL[14]
TX_CNTVALUEOUT7outputCELL[2].OUT_BEL[15]
TX_CNTVALUEOUT8outputCELL[2].OUT_BEL[18]
TX_D0inputCELL[3].IMUX_IMUX_DELAY[24]
TX_D1inputCELL[3].IMUX_IMUX_DELAY[25]
TX_D2inputCELL[3].IMUX_IMUX_DELAY[32]
TX_D3inputCELL[3].IMUX_IMUX_DELAY[33]
TX_D4inputCELL[3].IMUX_IMUX_DELAY[39]
TX_D5inputCELL[3].IMUX_IMUX_DELAY[11]
TX_D6inputCELL[3].IMUX_IMUX_DELAY[45]
TX_D7inputCELL[3].IMUX_IMUX_DELAY[46]
TX_EN_VTCinputCELL[2].IMUX_BYP_DELAY[8]
TX_INCinputCELL[2].IMUX_BYP_DELAY[7]
TX_LDinputCELL[2].IMUX_BYP_DELAY[6]
TX_TinputCELL[2].IMUX_IMUX_DELAY[47]
TX_T_OUToutputCELL[2].OUT_BEL[19]

Bel BITSLICE[3]

ultrascaleplus XIPHY bel BITSLICE[3]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[4].IMUX_IMUX_DELAY[38]
DYN_DCI_OUT_INTinputCELL[4].IMUX_BYP_DELAY[10]
PHY2CLB_FIFO_EMPTYoutputCELL[3].OUT_BEL[4]
RX_CE_IDELAYinputCELL[4].IMUX_BYP_DELAY[9]
RX_CE_IFDinputCELL[4].IMUX_IMUX_DELAY[36]
RX_CNTVALUEIN0inputCELL[5].IMUX_IMUX_DELAY[19]
RX_CNTVALUEIN1inputCELL[5].IMUX_IMUX_DELAY[20]
RX_CNTVALUEIN2inputCELL[5].IMUX_IMUX_DELAY[21]
RX_CNTVALUEIN3inputCELL[5].IMUX_IMUX_DELAY[22]
RX_CNTVALUEIN4inputCELL[5].IMUX_IMUX_DELAY[23]
RX_CNTVALUEIN5inputCELL[5].IMUX_IMUX_DELAY[26]
RX_CNTVALUEIN6inputCELL[5].IMUX_IMUX_DELAY[27]
RX_CNTVALUEIN7inputCELL[5].IMUX_IMUX_DELAY[28]
RX_CNTVALUEIN8inputCELL[5].IMUX_IMUX_DELAY[29]
RX_CNTVALUEOUT0outputCELL[4].OUT_BEL[13]
RX_CNTVALUEOUT1outputCELL[4].OUT_BEL[14]
RX_CNTVALUEOUT2outputCELL[4].OUT_BEL[15]
RX_CNTVALUEOUT3outputCELL[4].OUT_BEL[16]
RX_CNTVALUEOUT4outputCELL[4].OUT_BEL[19]
RX_CNTVALUEOUT5outputCELL[4].OUT_BEL[20]
RX_CNTVALUEOUT6outputCELL[4].OUT_BEL[21]
RX_CNTVALUEOUT7outputCELL[4].OUT_BEL[22]
RX_CNTVALUEOUT8outputCELL[4].OUT_BEL[25]
RX_DATAIN1inputCELL[4].IMUX_IMUX_DELAY[37]
RX_EN_VTCinputCELL[4].IMUX_BYP_DELAY[8]
RX_INCinputCELL[4].IMUX_BYP_DELAY[7]
RX_LDinputCELL[4].IMUX_BYP_DELAY[6]
RX_Q0outputCELL[3].OUT_BEL[5]
RX_Q1outputCELL[3].OUT_BEL[10]
RX_Q2outputCELL[3].OUT_BEL[11]
RX_Q3outputCELL[3].OUT_BEL[16]
RX_Q4outputCELL[3].OUT_BEL[17]
RX_Q5outputCELL[3].OUT_BEL[25]
RX_Q6outputCELL[3].OUT_BEL[26]
RX_Q7outputCELL[3].OUT_BEL[31]
TX_CE_ODELAYinputCELL[3].IMUX_BYP_DELAY[15]
TX_CE_OFDinputCELL[4].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN0inputCELL[4].IMUX_IMUX_DELAY[11]
TX_CNTVALUEIN1inputCELL[4].IMUX_IMUX_DELAY[40]
TX_CNTVALUEIN2inputCELL[4].IMUX_IMUX_DELAY[12]
TX_CNTVALUEIN3inputCELL[4].IMUX_IMUX_DELAY[45]
TX_CNTVALUEIN4inputCELL[4].IMUX_IMUX_DELAY[46]
TX_CNTVALUEIN5inputCELL[4].IMUX_IMUX_DELAY[15]
TX_CNTVALUEIN6inputCELL[5].IMUX_IMUX_DELAY[16]
TX_CNTVALUEIN7inputCELL[5].IMUX_IMUX_DELAY[17]
TX_CNTVALUEIN8inputCELL[5].IMUX_IMUX_DELAY[18]
TX_CNTVALUEOUT0outputCELL[3].OUT_BEL[24]
TX_CNTVALUEOUT1outputCELL[3].OUT_BEL[27]
TX_CNTVALUEOUT2outputCELL[3].OUT_BEL[28]
TX_CNTVALUEOUT3outputCELL[3].OUT_BEL[29]
TX_CNTVALUEOUT4outputCELL[3].OUT_BEL[30]
TX_CNTVALUEOUT5outputCELL[4].OUT_BEL[6]
TX_CNTVALUEOUT6outputCELL[4].OUT_BEL[7]
TX_CNTVALUEOUT7outputCELL[4].OUT_BEL[8]
TX_CNTVALUEOUT8outputCELL[4].OUT_BEL[9]
TX_D0inputCELL[4].IMUX_IMUX_DELAY[10]
TX_D1inputCELL[4].IMUX_IMUX_DELAY[39]
TX_D2inputCELL[4].IMUX_IMUX_DELAY[41]
TX_D3inputCELL[4].IMUX_IMUX_DELAY[42]
TX_D4inputCELL[4].IMUX_IMUX_DELAY[13]
TX_D5inputCELL[4].IMUX_IMUX_DELAY[44]
TX_D6inputCELL[4].IMUX_IMUX_DELAY[14]
TX_D7inputCELL[4].IMUX_IMUX_DELAY[47]
TX_EN_VTCinputCELL[3].IMUX_BYP_DELAY[14]
TX_INCinputCELL[3].IMUX_BYP_DELAY[13]
TX_LDinputCELL[3].IMUX_BYP_DELAY[12]
TX_TinputCELL[4].IMUX_IMUX_DELAY[35]
TX_T_OUToutputCELL[3].OUT_BEL[19]

Bel BITSLICE[4]

ultrascaleplus XIPHY bel BITSLICE[4]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[5].IMUX_IMUX_DELAY[32]
DYN_DCI_OUT_INTinputCELL[5].IMUX_BYP_DELAY[9]
PHY2CLB_FIFO_EMPTYoutputCELL[4].OUT_BEL[4]
RX_CE_IDELAYinputCELL[5].IMUX_BYP_DELAY[8]
RX_CE_IFDinputCELL[5].IMUX_IMUX_DELAY[31]
RX_CNTVALUEIN0inputCELL[5].IMUX_IMUX_DELAY[42]
RX_CNTVALUEIN1inputCELL[5].IMUX_IMUX_DELAY[12]
RX_CNTVALUEIN2inputCELL[5].IMUX_IMUX_DELAY[43]
RX_CNTVALUEIN3inputCELL[5].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN4inputCELL[5].IMUX_IMUX_DELAY[44]
RX_CNTVALUEIN5inputCELL[5].IMUX_IMUX_DELAY[45]
RX_CNTVALUEIN6inputCELL[5].IMUX_IMUX_DELAY[47]
RX_CNTVALUEIN7inputCELL[5].IMUX_IMUX_DELAY[15]
RX_CNTVALUEIN8inputCELL[6].IMUX_IMUX_DELAY[16]
RX_CNTVALUEOUT0outputCELL[5].OUT_BEL[13]
RX_CNTVALUEOUT1outputCELL[5].OUT_BEL[14]
RX_CNTVALUEOUT2outputCELL[5].OUT_BEL[15]
RX_CNTVALUEOUT3outputCELL[5].OUT_BEL[18]
RX_CNTVALUEOUT4outputCELL[5].OUT_BEL[19]
RX_CNTVALUEOUT5outputCELL[5].OUT_BEL[20]
RX_CNTVALUEOUT6outputCELL[5].OUT_BEL[21]
RX_CNTVALUEOUT7outputCELL[5].OUT_BEL[24]
RX_CNTVALUEOUT8outputCELL[5].OUT_BEL[25]
RX_DATAIN1inputCELL[5].IMUX_IMUX_DELAY[7]
RX_EN_VTCinputCELL[5].IMUX_BYP_DELAY[7]
RX_INCinputCELL[5].IMUX_BYP_DELAY[6]
RX_LDinputCELL[4].IMUX_BYP_DELAY[15]
RX_Q0outputCELL[4].OUT_BEL[5]
RX_Q1outputCELL[4].OUT_BEL[10]
RX_Q2outputCELL[4].OUT_BEL[11]
RX_Q3outputCELL[4].OUT_BEL[17]
RX_Q4outputCELL[4].OUT_BEL[18]
RX_Q5outputCELL[4].OUT_BEL[23]
RX_Q6outputCELL[4].OUT_BEL[24]
RX_Q7outputCELL[4].OUT_BEL[29]
TX_CE_ODELAYinputCELL[4].IMUX_BYP_DELAY[14]
TX_CE_OFDinputCELL[5].IMUX_IMUX_DELAY[6]
TX_CNTVALUEIN0inputCELL[5].IMUX_IMUX_DELAY[8]
TX_CNTVALUEIN1inputCELL[5].IMUX_IMUX_DELAY[35]
TX_CNTVALUEIN2inputCELL[5].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN3inputCELL[5].IMUX_IMUX_DELAY[36]
TX_CNTVALUEIN4inputCELL[5].IMUX_IMUX_DELAY[37]
TX_CNTVALUEIN5inputCELL[5].IMUX_IMUX_DELAY[38]
TX_CNTVALUEIN6inputCELL[5].IMUX_IMUX_DELAY[10]
TX_CNTVALUEIN7inputCELL[5].IMUX_IMUX_DELAY[39]
TX_CNTVALUEIN8inputCELL[5].IMUX_IMUX_DELAY[41]
TX_CNTVALUEOUT0outputCELL[4].OUT_BEL[26]
TX_CNTVALUEOUT1outputCELL[4].OUT_BEL[27]
TX_CNTVALUEOUT2outputCELL[4].OUT_BEL[28]
TX_CNTVALUEOUT3outputCELL[4].OUT_BEL[30]
TX_CNTVALUEOUT4outputCELL[4].OUT_BEL[31]
TX_CNTVALUEOUT5outputCELL[5].OUT_BEL[6]
TX_CNTVALUEOUT6outputCELL[5].OUT_BEL[7]
TX_CNTVALUEOUT7outputCELL[5].OUT_BEL[8]
TX_CNTVALUEOUT8outputCELL[5].OUT_BEL[9]
TX_D0inputCELL[5].IMUX_IMUX_DELAY[24]
TX_D1inputCELL[5].IMUX_IMUX_DELAY[25]
TX_D2inputCELL[5].IMUX_IMUX_DELAY[33]
TX_D3inputCELL[5].IMUX_IMUX_DELAY[34]
TX_D4inputCELL[5].IMUX_IMUX_DELAY[11]
TX_D5inputCELL[5].IMUX_IMUX_DELAY[40]
TX_D6inputCELL[5].IMUX_IMUX_DELAY[46]
TX_D7inputCELL[5].IMUX_IMUX_DELAY[14]
TX_EN_VTCinputCELL[4].IMUX_BYP_DELAY[13]
TX_INCinputCELL[4].IMUX_BYP_DELAY[12]
TX_LDinputCELL[4].IMUX_BYP_DELAY[11]
TX_TinputCELL[5].IMUX_IMUX_DELAY[30]
TX_T_OUToutputCELL[4].OUT_BEL[12]

Bel BITSLICE[5]

ultrascaleplus XIPHY bel BITSLICE[5]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[6].IMUX_IMUX_DELAY[21]
DYN_DCI_OUT_INTinputCELL[6].IMUX_BYP_DELAY[8]
PHY2CLB_FIFO_EMPTYoutputCELL[5].OUT_BEL[4]
RX_CE_IDELAYinputCELL[6].IMUX_BYP_DELAY[7]
RX_CE_IFDinputCELL[6].IMUX_IMUX_DELAY[19]
RX_CNTVALUEIN0inputCELL[6].IMUX_IMUX_DELAY[33]
RX_CNTVALUEIN1inputCELL[6].IMUX_IMUX_DELAY[34]
RX_CNTVALUEIN2inputCELL[6].IMUX_IMUX_DELAY[36]
RX_CNTVALUEIN3inputCELL[6].IMUX_IMUX_DELAY[37]
RX_CNTVALUEIN4inputCELL[6].IMUX_IMUX_DELAY[38]
RX_CNTVALUEIN5inputCELL[6].IMUX_IMUX_DELAY[10]
RX_CNTVALUEIN6inputCELL[6].IMUX_IMUX_DELAY[40]
RX_CNTVALUEIN7inputCELL[6].IMUX_IMUX_DELAY[41]
RX_CNTVALUEIN8inputCELL[6].IMUX_IMUX_DELAY[42]
RX_CNTVALUEOUT0outputCELL[6].OUT_BEL[13]
RX_CNTVALUEOUT1outputCELL[6].OUT_BEL[16]
RX_CNTVALUEOUT2outputCELL[6].OUT_BEL[17]
RX_CNTVALUEOUT3outputCELL[6].OUT_BEL[18]
RX_CNTVALUEOUT4outputCELL[6].OUT_BEL[21]
RX_CNTVALUEOUT5outputCELL[6].OUT_BEL[22]
RX_CNTVALUEOUT6outputCELL[6].OUT_BEL[23]
RX_CNTVALUEOUT7outputCELL[6].OUT_BEL[26]
RX_CNTVALUEOUT8outputCELL[6].OUT_BEL[27]
RX_DATAIN1inputCELL[6].IMUX_IMUX_DELAY[20]
RX_EN_VTCinputCELL[6].IMUX_BYP_DELAY[6]
RX_INCinputCELL[5].IMUX_BYP_DELAY[15]
RX_LDinputCELL[5].IMUX_BYP_DELAY[14]
RX_Q0outputCELL[5].OUT_BEL[5]
RX_Q1outputCELL[5].OUT_BEL[10]
RX_Q2outputCELL[5].OUT_BEL[11]
RX_Q3outputCELL[5].OUT_BEL[16]
RX_Q4outputCELL[5].OUT_BEL[17]
RX_Q5outputCELL[5].OUT_BEL[22]
RX_Q6outputCELL[5].OUT_BEL[23]
RX_Q7outputCELL[5].OUT_BEL[28]
TX_CE_ODELAYinputCELL[5].IMUX_BYP_DELAY[13]
TX_CE_OFDinputCELL[6].IMUX_IMUX_DELAY[18]
TX_CNTVALUEIN0inputCELL[6].IMUX_IMUX_DELAY[22]
TX_CNTVALUEIN1inputCELL[6].IMUX_IMUX_DELAY[23]
TX_CNTVALUEIN2inputCELL[6].IMUX_IMUX_DELAY[24]
TX_CNTVALUEIN3inputCELL[6].IMUX_IMUX_DELAY[25]
TX_CNTVALUEIN4inputCELL[6].IMUX_IMUX_DELAY[28]
TX_CNTVALUEIN5inputCELL[6].IMUX_IMUX_DELAY[29]
TX_CNTVALUEIN6inputCELL[6].IMUX_IMUX_DELAY[30]
TX_CNTVALUEIN7inputCELL[6].IMUX_IMUX_DELAY[6]
TX_CNTVALUEIN8inputCELL[6].IMUX_IMUX_DELAY[32]
TX_CNTVALUEOUT0outputCELL[5].OUT_BEL[26]
TX_CNTVALUEOUT1outputCELL[5].OUT_BEL[27]
TX_CNTVALUEOUT2outputCELL[5].OUT_BEL[29]
TX_CNTVALUEOUT3outputCELL[5].OUT_BEL[30]
TX_CNTVALUEOUT4outputCELL[5].OUT_BEL[31]
TX_CNTVALUEOUT5outputCELL[6].OUT_BEL[6]
TX_CNTVALUEOUT6outputCELL[6].OUT_BEL[7]
TX_CNTVALUEOUT7outputCELL[6].OUT_BEL[8]
TX_CNTVALUEOUT8outputCELL[6].OUT_BEL[11]
TX_D0inputCELL[6].IMUX_IMUX_DELAY[26]
TX_D1inputCELL[6].IMUX_IMUX_DELAY[27]
TX_D2inputCELL[6].IMUX_IMUX_DELAY[31]
TX_D3inputCELL[6].IMUX_IMUX_DELAY[7]
TX_D4inputCELL[6].IMUX_IMUX_DELAY[8]
TX_D5inputCELL[6].IMUX_IMUX_DELAY[35]
TX_D6inputCELL[6].IMUX_IMUX_DELAY[39]
TX_D7inputCELL[6].IMUX_IMUX_DELAY[11]
TX_EN_VTCinputCELL[5].IMUX_BYP_DELAY[12]
TX_INCinputCELL[5].IMUX_BYP_DELAY[11]
TX_LDinputCELL[5].IMUX_BYP_DELAY[10]
TX_TinputCELL[6].IMUX_IMUX_DELAY[17]
TX_T_OUToutputCELL[5].OUT_BEL[12]

Bel BITSLICE[6]

ultrascaleplus XIPHY bel BITSLICE[6]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[8].IMUX_IMUX_DELAY[32]
DYN_DCI_OUT_INTinputCELL[9].IMUX_BYP_DELAY[12]
PHY2CLB_FIFO_EMPTYoutputCELL[8].OUT_BEL[4]
RX_CE_IDELAYinputCELL[9].IMUX_BYP_DELAY[11]
RX_CE_IFDinputCELL[8].IMUX_IMUX_DELAY[6]
RX_CNTVALUEIN0inputCELL[8].IMUX_IMUX_DELAY[42]
RX_CNTVALUEIN1inputCELL[8].IMUX_IMUX_DELAY[12]
RX_CNTVALUEIN2inputCELL[8].IMUX_IMUX_DELAY[43]
RX_CNTVALUEIN3inputCELL[8].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN4inputCELL[8].IMUX_IMUX_DELAY[44]
RX_CNTVALUEIN5inputCELL[8].IMUX_IMUX_DELAY[45]
RX_CNTVALUEIN6inputCELL[8].IMUX_IMUX_DELAY[46]
RX_CNTVALUEIN7inputCELL[8].IMUX_IMUX_DELAY[14]
RX_CNTVALUEIN8inputCELL[8].IMUX_IMUX_DELAY[47]
RX_CNTVALUEOUT0outputCELL[9].OUT_BEL[14]
RX_CNTVALUEOUT1outputCELL[9].OUT_BEL[15]
RX_CNTVALUEOUT2outputCELL[9].OUT_BEL[16]
RX_CNTVALUEOUT3outputCELL[9].OUT_BEL[17]
RX_CNTVALUEOUT4outputCELL[9].OUT_BEL[20]
RX_CNTVALUEOUT5outputCELL[9].OUT_BEL[21]
RX_CNTVALUEOUT6outputCELL[9].OUT_BEL[22]
RX_CNTVALUEOUT7outputCELL[9].OUT_BEL[23]
RX_CNTVALUEOUT8outputCELL[9].OUT_BEL[24]
RX_DATAIN1inputCELL[8].IMUX_IMUX_DELAY[7]
RX_EN_VTCinputCELL[9].IMUX_BYP_DELAY[10]
RX_INCinputCELL[9].IMUX_BYP_DELAY[9]
RX_LDinputCELL[9].IMUX_BYP_DELAY[8]
RX_Q0outputCELL[8].OUT_BEL[5]
RX_Q1outputCELL[8].OUT_BEL[6]
RX_Q2outputCELL[8].OUT_BEL[11]
RX_Q3outputCELL[8].OUT_BEL[12]
RX_Q4outputCELL[8].OUT_BEL[18]
RX_Q5outputCELL[8].OUT_BEL[19]
RX_Q6outputCELL[8].OUT_BEL[25]
RX_Q7outputCELL[8].OUT_BEL[26]
TX_CE_ODELAYinputCELL[9].IMUX_BYP_DELAY[7]
TX_CE_OFDinputCELL[8].IMUX_IMUX_DELAY[30]
TX_CNTVALUEIN0inputCELL[8].IMUX_IMUX_DELAY[33]
TX_CNTVALUEIN1inputCELL[8].IMUX_IMUX_DELAY[35]
TX_CNTVALUEIN2inputCELL[8].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN3inputCELL[8].IMUX_IMUX_DELAY[36]
TX_CNTVALUEIN4inputCELL[8].IMUX_IMUX_DELAY[37]
TX_CNTVALUEIN5inputCELL[8].IMUX_IMUX_DELAY[38]
TX_CNTVALUEIN6inputCELL[8].IMUX_IMUX_DELAY[10]
TX_CNTVALUEIN7inputCELL[8].IMUX_IMUX_DELAY[39]
TX_CNTVALUEIN8inputCELL[8].IMUX_IMUX_DELAY[11]
TX_CNTVALUEOUT0outputCELL[8].OUT_BEL[27]
TX_CNTVALUEOUT1outputCELL[8].OUT_BEL[28]
TX_CNTVALUEOUT2outputCELL[8].OUT_BEL[29]
TX_CNTVALUEOUT3outputCELL[8].OUT_BEL[30]
TX_CNTVALUEOUT4outputCELL[8].OUT_BEL[31]
TX_CNTVALUEOUT5outputCELL[9].OUT_BEL[7]
TX_CNTVALUEOUT6outputCELL[9].OUT_BEL[8]
TX_CNTVALUEOUT7outputCELL[9].OUT_BEL[9]
TX_CNTVALUEOUT8outputCELL[9].OUT_BEL[10]
TX_D0inputCELL[8].IMUX_IMUX_DELAY[16]
TX_D1inputCELL[8].IMUX_IMUX_DELAY[17]
TX_D2inputCELL[8].IMUX_IMUX_DELAY[26]
TX_D3inputCELL[8].IMUX_IMUX_DELAY[27]
TX_D4inputCELL[8].IMUX_IMUX_DELAY[34]
TX_D5inputCELL[8].IMUX_IMUX_DELAY[8]
TX_D6inputCELL[8].IMUX_IMUX_DELAY[40]
TX_D7inputCELL[8].IMUX_IMUX_DELAY[41]
TX_EN_VTCinputCELL[9].IMUX_BYP_DELAY[6]
TX_INCinputCELL[8].IMUX_BYP_DELAY[15]
TX_LDinputCELL[8].IMUX_BYP_DELAY[14]
TX_TinputCELL[8].IMUX_IMUX_DELAY[29]
TX_T_OUToutputCELL[6].OUT_BEL[12]

Bel BITSLICE[7]

ultrascaleplus XIPHY bel BITSLICE[7]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[9].IMUX_IMUX_DELAY[19]
DYN_DCI_OUT_INTinputCELL[10].IMUX_BYP_DELAY[12]
PHY2CLB_FIFO_EMPTYoutputCELL[9].OUT_BEL[4]
RX_CE_IDELAYinputCELL[10].IMUX_BYP_DELAY[11]
RX_CE_IFDinputCELL[9].IMUX_IMUX_DELAY[17]
RX_CNTVALUEIN0inputCELL[9].IMUX_IMUX_DELAY[7]
RX_CNTVALUEIN1inputCELL[9].IMUX_IMUX_DELAY[32]
RX_CNTVALUEIN2inputCELL[9].IMUX_IMUX_DELAY[33]
RX_CNTVALUEIN3inputCELL[9].IMUX_IMUX_DELAY[35]
RX_CNTVALUEIN4inputCELL[9].IMUX_IMUX_DELAY[9]
RX_CNTVALUEIN5inputCELL[9].IMUX_IMUX_DELAY[36]
RX_CNTVALUEIN6inputCELL[9].IMUX_IMUX_DELAY[37]
RX_CNTVALUEIN7inputCELL[9].IMUX_IMUX_DELAY[39]
RX_CNTVALUEIN8inputCELL[9].IMUX_IMUX_DELAY[11]
RX_CNTVALUEOUT0outputCELL[10].OUT_BEL[14]
RX_CNTVALUEOUT1outputCELL[10].OUT_BEL[15]
RX_CNTVALUEOUT2outputCELL[10].OUT_BEL[16]
RX_CNTVALUEOUT3outputCELL[10].OUT_BEL[17]
RX_CNTVALUEOUT4outputCELL[10].OUT_BEL[20]
RX_CNTVALUEOUT5outputCELL[10].OUT_BEL[21]
RX_CNTVALUEOUT6outputCELL[10].OUT_BEL[22]
RX_CNTVALUEOUT7outputCELL[10].OUT_BEL[23]
RX_CNTVALUEOUT8outputCELL[10].OUT_BEL[24]
RX_DATAIN1inputCELL[9].IMUX_IMUX_DELAY[18]
RX_EN_VTCinputCELL[10].IMUX_BYP_DELAY[10]
RX_INCinputCELL[10].IMUX_BYP_DELAY[9]
RX_LDinputCELL[10].IMUX_BYP_DELAY[8]
RX_Q0outputCELL[9].OUT_BEL[5]
RX_Q1outputCELL[9].OUT_BEL[6]
RX_Q2outputCELL[9].OUT_BEL[11]
RX_Q3outputCELL[9].OUT_BEL[12]
RX_Q4outputCELL[9].OUT_BEL[18]
RX_Q5outputCELL[9].OUT_BEL[19]
RX_Q6outputCELL[9].OUT_BEL[25]
RX_Q7outputCELL[9].OUT_BEL[26]
TX_CE_ODELAYinputCELL[10].IMUX_BYP_DELAY[7]
TX_CE_OFDinputCELL[9].IMUX_IMUX_DELAY[16]
TX_CNTVALUEIN0inputCELL[9].IMUX_IMUX_DELAY[20]
TX_CNTVALUEIN1inputCELL[9].IMUX_IMUX_DELAY[21]
TX_CNTVALUEIN2inputCELL[9].IMUX_IMUX_DELAY[22]
TX_CNTVALUEIN3inputCELL[9].IMUX_IMUX_DELAY[23]
TX_CNTVALUEIN4inputCELL[9].IMUX_IMUX_DELAY[26]
TX_CNTVALUEIN5inputCELL[9].IMUX_IMUX_DELAY[27]
TX_CNTVALUEIN6inputCELL[9].IMUX_IMUX_DELAY[28]
TX_CNTVALUEIN7inputCELL[9].IMUX_IMUX_DELAY[29]
TX_CNTVALUEIN8inputCELL[9].IMUX_IMUX_DELAY[31]
TX_CNTVALUEOUT0outputCELL[9].OUT_BEL[27]
TX_CNTVALUEOUT1outputCELL[9].OUT_BEL[28]
TX_CNTVALUEOUT2outputCELL[9].OUT_BEL[29]
TX_CNTVALUEOUT3outputCELL[9].OUT_BEL[30]
TX_CNTVALUEOUT4outputCELL[9].OUT_BEL[31]
TX_CNTVALUEOUT5outputCELL[10].OUT_BEL[7]
TX_CNTVALUEOUT6outputCELL[10].OUT_BEL[8]
TX_CNTVALUEOUT7outputCELL[10].OUT_BEL[9]
TX_CNTVALUEOUT8outputCELL[10].OUT_BEL[10]
TX_D0inputCELL[9].IMUX_IMUX_DELAY[24]
TX_D1inputCELL[9].IMUX_IMUX_DELAY[25]
TX_D2inputCELL[9].IMUX_IMUX_DELAY[30]
TX_D3inputCELL[9].IMUX_IMUX_DELAY[6]
TX_D4inputCELL[9].IMUX_IMUX_DELAY[34]
TX_D5inputCELL[9].IMUX_IMUX_DELAY[8]
TX_D6inputCELL[9].IMUX_IMUX_DELAY[38]
TX_D7inputCELL[9].IMUX_IMUX_DELAY[10]
TX_EN_VTCinputCELL[10].IMUX_BYP_DELAY[6]
TX_INCinputCELL[9].IMUX_BYP_DELAY[15]
TX_LDinputCELL[9].IMUX_BYP_DELAY[14]
TX_TinputCELL[8].IMUX_IMUX_DELAY[15]
TX_T_OUToutputCELL[8].OUT_BEL[13]

Bel BITSLICE[8]

ultrascaleplus XIPHY bel BITSLICE[8]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[9].IMUX_IMUX_DELAY[43]
DYN_DCI_OUT_INTinputCELL[11].IMUX_BYP_DELAY[12]
PHY2CLB_FIFO_EMPTYoutputCELL[10].OUT_BEL[4]
RX_CE_IDELAYinputCELL[11].IMUX_BYP_DELAY[11]
RX_CE_IFDinputCELL[9].IMUX_IMUX_DELAY[42]
RX_CNTVALUEIN0inputCELL[10].IMUX_IMUX_DELAY[27]
RX_CNTVALUEIN1inputCELL[10].IMUX_IMUX_DELAY[28]
RX_CNTVALUEIN2inputCELL[10].IMUX_IMUX_DELAY[29]
RX_CNTVALUEIN3inputCELL[10].IMUX_IMUX_DELAY[30]
RX_CNTVALUEIN4inputCELL[10].IMUX_IMUX_DELAY[6]
RX_CNTVALUEIN5inputCELL[10].IMUX_IMUX_DELAY[31]
RX_CNTVALUEIN6inputCELL[10].IMUX_IMUX_DELAY[7]
RX_CNTVALUEIN7inputCELL[10].IMUX_IMUX_DELAY[32]
RX_CNTVALUEIN8inputCELL[10].IMUX_IMUX_DELAY[33]
RX_CNTVALUEOUT0outputCELL[11].OUT_BEL[9]
RX_CNTVALUEOUT1outputCELL[11].OUT_BEL[10]
RX_CNTVALUEOUT2outputCELL[11].OUT_BEL[11]
RX_CNTVALUEOUT3outputCELL[11].OUT_BEL[12]
RX_CNTVALUEOUT4outputCELL[11].OUT_BEL[13]
RX_CNTVALUEOUT5outputCELL[11].OUT_BEL[14]
RX_CNTVALUEOUT6outputCELL[11].OUT_BEL[15]
RX_CNTVALUEOUT7outputCELL[11].OUT_BEL[16]
RX_CNTVALUEOUT8outputCELL[11].OUT_BEL[17]
RX_DATAIN1inputCELL[9].IMUX_IMUX_DELAY[12]
RX_EN_VTCinputCELL[11].IMUX_BYP_DELAY[10]
RX_INCinputCELL[11].IMUX_BYP_DELAY[9]
RX_LDinputCELL[11].IMUX_BYP_DELAY[8]
RX_Q0outputCELL[10].OUT_BEL[5]
RX_Q1outputCELL[10].OUT_BEL[6]
RX_Q2outputCELL[10].OUT_BEL[11]
RX_Q3outputCELL[10].OUT_BEL[12]
RX_Q4outputCELL[10].OUT_BEL[18]
RX_Q5outputCELL[10].OUT_BEL[19]
RX_Q6outputCELL[10].OUT_BEL[25]
RX_Q7outputCELL[10].OUT_BEL[26]
TX_CE_ODELAYinputCELL[11].IMUX_BYP_DELAY[6]
TX_CE_OFDinputCELL[9].IMUX_IMUX_DELAY[41]
TX_CNTVALUEIN0inputCELL[10].IMUX_IMUX_DELAY[18]
TX_CNTVALUEIN1inputCELL[10].IMUX_IMUX_DELAY[19]
TX_CNTVALUEIN2inputCELL[10].IMUX_IMUX_DELAY[20]
TX_CNTVALUEIN3inputCELL[10].IMUX_IMUX_DELAY[21]
TX_CNTVALUEIN4inputCELL[10].IMUX_IMUX_DELAY[22]
TX_CNTVALUEIN5inputCELL[10].IMUX_IMUX_DELAY[23]
TX_CNTVALUEIN6inputCELL[10].IMUX_IMUX_DELAY[24]
TX_CNTVALUEIN7inputCELL[10].IMUX_IMUX_DELAY[25]
TX_CNTVALUEIN8inputCELL[10].IMUX_IMUX_DELAY[26]
TX_CNTVALUEOUT0outputCELL[10].OUT_BEL[27]
TX_CNTVALUEOUT1outputCELL[10].OUT_BEL[28]
TX_CNTVALUEOUT2outputCELL[10].OUT_BEL[29]
TX_CNTVALUEOUT3outputCELL[10].OUT_BEL[30]
TX_CNTVALUEOUT4outputCELL[10].OUT_BEL[31]
TX_CNTVALUEOUT5outputCELL[11].OUT_BEL[4]
TX_CNTVALUEOUT6outputCELL[11].OUT_BEL[5]
TX_CNTVALUEOUT7outputCELL[11].OUT_BEL[6]
TX_CNTVALUEOUT8outputCELL[11].OUT_BEL[7]
TX_D0inputCELL[9].IMUX_IMUX_DELAY[13]
TX_D1inputCELL[9].IMUX_IMUX_DELAY[44]
TX_D2inputCELL[9].IMUX_IMUX_DELAY[45]
TX_D3inputCELL[9].IMUX_IMUX_DELAY[46]
TX_D4inputCELL[9].IMUX_IMUX_DELAY[14]
TX_D5inputCELL[9].IMUX_IMUX_DELAY[47]
TX_D6inputCELL[9].IMUX_IMUX_DELAY[15]
TX_D7inputCELL[10].IMUX_IMUX_DELAY[16]
TX_EN_VTCinputCELL[10].IMUX_BYP_DELAY[15]
TX_INCinputCELL[10].IMUX_BYP_DELAY[14]
TX_LDinputCELL[10].IMUX_BYP_DELAY[13]
TX_TinputCELL[9].IMUX_IMUX_DELAY[40]
TX_T_OUToutputCELL[9].OUT_BEL[13]

Bel BITSLICE[9]

ultrascaleplus XIPHY bel BITSLICE[9]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[11].IMUX_IMUX_DELAY[31]
DYN_DCI_OUT_INTinputCELL[13].IMUX_BYP_DELAY[7]
PHY2CLB_FIFO_EMPTYoutputCELL[12].OUT_BEL[4]
RX_CE_IDELAYinputCELL[13].IMUX_BYP_DELAY[6]
RX_CE_IFDinputCELL[11].IMUX_IMUX_DELAY[30]
RX_CNTVALUEIN0inputCELL[11].IMUX_IMUX_DELAY[40]
RX_CNTVALUEIN1inputCELL[11].IMUX_IMUX_DELAY[41]
RX_CNTVALUEIN2inputCELL[11].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN3inputCELL[11].IMUX_IMUX_DELAY[44]
RX_CNTVALUEIN4inputCELL[11].IMUX_IMUX_DELAY[45]
RX_CNTVALUEIN5inputCELL[11].IMUX_IMUX_DELAY[46]
RX_CNTVALUEIN6inputCELL[11].IMUX_IMUX_DELAY[15]
RX_CNTVALUEIN7inputCELL[12].IMUX_IMUX_DELAY[16]
RX_CNTVALUEIN8inputCELL[12].IMUX_IMUX_DELAY[17]
RX_CNTVALUEOUT0outputCELL[12].OUT_BEL[21]
RX_CNTVALUEOUT1outputCELL[12].OUT_BEL[22]
RX_CNTVALUEOUT2outputCELL[12].OUT_BEL[23]
RX_CNTVALUEOUT3outputCELL[12].OUT_BEL[26]
RX_CNTVALUEOUT4outputCELL[12].OUT_BEL[27]
RX_CNTVALUEOUT5outputCELL[12].OUT_BEL[28]
RX_CNTVALUEOUT6outputCELL[12].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[12].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[12].OUT_BEL[31]
RX_DATAIN1inputCELL[11].IMUX_IMUX_DELAY[6]
RX_EN_VTCinputCELL[12].IMUX_BYP_DELAY[15]
RX_INCinputCELL[12].IMUX_BYP_DELAY[14]
RX_LDinputCELL[12].IMUX_BYP_DELAY[13]
RX_Q0outputCELL[12].OUT_BEL[5]
RX_Q1outputCELL[12].OUT_BEL[6]
RX_Q2outputCELL[12].OUT_BEL[11]
RX_Q3outputCELL[12].OUT_BEL[12]
RX_Q4outputCELL[12].OUT_BEL[17]
RX_Q5outputCELL[12].OUT_BEL[18]
RX_Q6outputCELL[12].OUT_BEL[24]
RX_Q7outputCELL[12].OUT_BEL[25]
TX_CE_ODELAYinputCELL[12].IMUX_BYP_DELAY[12]
TX_CE_OFDinputCELL[11].IMUX_IMUX_DELAY[29]
TX_CNTVALUEIN0inputCELL[11].IMUX_IMUX_DELAY[7]
TX_CNTVALUEIN1inputCELL[11].IMUX_IMUX_DELAY[32]
TX_CNTVALUEIN2inputCELL[11].IMUX_IMUX_DELAY[33]
TX_CNTVALUEIN3inputCELL[11].IMUX_IMUX_DELAY[34]
TX_CNTVALUEIN4inputCELL[11].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN5inputCELL[11].IMUX_IMUX_DELAY[36]
TX_CNTVALUEIN6inputCELL[11].IMUX_IMUX_DELAY[37]
TX_CNTVALUEIN7inputCELL[11].IMUX_IMUX_DELAY[38]
TX_CNTVALUEIN8inputCELL[11].IMUX_IMUX_DELAY[11]
TX_CNTVALUEOUT0outputCELL[12].OUT_BEL[7]
TX_CNTVALUEOUT1outputCELL[12].OUT_BEL[8]
TX_CNTVALUEOUT2outputCELL[12].OUT_BEL[9]
TX_CNTVALUEOUT3outputCELL[12].OUT_BEL[10]
TX_CNTVALUEOUT4outputCELL[12].OUT_BEL[13]
TX_CNTVALUEOUT5outputCELL[12].OUT_BEL[14]
TX_CNTVALUEOUT6outputCELL[12].OUT_BEL[15]
TX_CNTVALUEOUT7outputCELL[12].OUT_BEL[16]
TX_CNTVALUEOUT8outputCELL[12].OUT_BEL[19]
TX_D0inputCELL[11].IMUX_IMUX_DELAY[8]
TX_D1inputCELL[11].IMUX_IMUX_DELAY[35]
TX_D2inputCELL[11].IMUX_IMUX_DELAY[10]
TX_D3inputCELL[11].IMUX_IMUX_DELAY[39]
TX_D4inputCELL[11].IMUX_IMUX_DELAY[12]
TX_D5inputCELL[11].IMUX_IMUX_DELAY[43]
TX_D6inputCELL[11].IMUX_IMUX_DELAY[14]
TX_D7inputCELL[11].IMUX_IMUX_DELAY[47]
TX_EN_VTCinputCELL[12].IMUX_BYP_DELAY[11]
TX_INCinputCELL[12].IMUX_BYP_DELAY[10]
TX_LDinputCELL[12].IMUX_BYP_DELAY[9]
TX_TinputCELL[11].IMUX_IMUX_DELAY[28]
TX_T_OUToutputCELL[10].OUT_BEL[13]

Bel BITSLICE[10]

ultrascaleplus XIPHY bel BITSLICE[10]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[12].IMUX_IMUX_DELAY[22]
DYN_DCI_OUT_INTinputCELL[14].IMUX_BYP_DELAY[6]
PHY2CLB_FIFO_EMPTYoutputCELL[13].OUT_BEL[4]
RX_CE_IDELAYinputCELL[13].IMUX_BYP_DELAY[15]
RX_CE_IFDinputCELL[12].IMUX_IMUX_DELAY[20]
RX_CNTVALUEIN0inputCELL[12].IMUX_IMUX_DELAY[34]
RX_CNTVALUEIN1inputCELL[12].IMUX_IMUX_DELAY[8]
RX_CNTVALUEIN2inputCELL[12].IMUX_IMUX_DELAY[35]
RX_CNTVALUEIN3inputCELL[12].IMUX_IMUX_DELAY[37]
RX_CNTVALUEIN4inputCELL[12].IMUX_IMUX_DELAY[38]
RX_CNTVALUEIN5inputCELL[12].IMUX_IMUX_DELAY[10]
RX_CNTVALUEIN6inputCELL[12].IMUX_IMUX_DELAY[39]
RX_CNTVALUEIN7inputCELL[12].IMUX_IMUX_DELAY[41]
RX_CNTVALUEIN8inputCELL[12].IMUX_IMUX_DELAY[42]
RX_CNTVALUEOUT0outputCELL[13].OUT_BEL[21]
RX_CNTVALUEOUT1outputCELL[13].OUT_BEL[22]
RX_CNTVALUEOUT2outputCELL[13].OUT_BEL[23]
RX_CNTVALUEOUT3outputCELL[13].OUT_BEL[26]
RX_CNTVALUEOUT4outputCELL[13].OUT_BEL[27]
RX_CNTVALUEOUT5outputCELL[13].OUT_BEL[28]
RX_CNTVALUEOUT6outputCELL[13].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[13].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[13].OUT_BEL[31]
RX_DATAIN1inputCELL[12].IMUX_IMUX_DELAY[21]
RX_EN_VTCinputCELL[13].IMUX_BYP_DELAY[14]
RX_INCinputCELL[13].IMUX_BYP_DELAY[13]
RX_LDinputCELL[13].IMUX_BYP_DELAY[12]
RX_Q0outputCELL[13].OUT_BEL[5]
RX_Q1outputCELL[13].OUT_BEL[6]
RX_Q2outputCELL[13].OUT_BEL[11]
RX_Q3outputCELL[13].OUT_BEL[12]
RX_Q4outputCELL[13].OUT_BEL[17]
RX_Q5outputCELL[13].OUT_BEL[18]
RX_Q6outputCELL[13].OUT_BEL[24]
RX_Q7outputCELL[13].OUT_BEL[25]
TX_CE_ODELAYinputCELL[13].IMUX_BYP_DELAY[11]
TX_CE_OFDinputCELL[12].IMUX_IMUX_DELAY[19]
TX_CNTVALUEIN0inputCELL[12].IMUX_IMUX_DELAY[23]
TX_CNTVALUEIN1inputCELL[12].IMUX_IMUX_DELAY[24]
TX_CNTVALUEIN2inputCELL[12].IMUX_IMUX_DELAY[25]
TX_CNTVALUEIN3inputCELL[12].IMUX_IMUX_DELAY[26]
TX_CNTVALUEIN4inputCELL[12].IMUX_IMUX_DELAY[29]
TX_CNTVALUEIN5inputCELL[12].IMUX_IMUX_DELAY[30]
TX_CNTVALUEIN6inputCELL[12].IMUX_IMUX_DELAY[6]
TX_CNTVALUEIN7inputCELL[12].IMUX_IMUX_DELAY[31]
TX_CNTVALUEIN8inputCELL[12].IMUX_IMUX_DELAY[33]
TX_CNTVALUEOUT0outputCELL[13].OUT_BEL[7]
TX_CNTVALUEOUT1outputCELL[13].OUT_BEL[8]
TX_CNTVALUEOUT2outputCELL[13].OUT_BEL[9]
TX_CNTVALUEOUT3outputCELL[13].OUT_BEL[10]
TX_CNTVALUEOUT4outputCELL[13].OUT_BEL[13]
TX_CNTVALUEOUT5outputCELL[13].OUT_BEL[14]
TX_CNTVALUEOUT6outputCELL[13].OUT_BEL[15]
TX_CNTVALUEOUT7outputCELL[13].OUT_BEL[16]
TX_CNTVALUEOUT8outputCELL[13].OUT_BEL[19]
TX_D0inputCELL[12].IMUX_IMUX_DELAY[36]
TX_D1inputCELL[12].IMUX_IMUX_DELAY[9]
TX_D2inputCELL[12].IMUX_IMUX_DELAY[32]
TX_D3inputCELL[12].IMUX_IMUX_DELAY[7]
TX_D4inputCELL[12].IMUX_IMUX_DELAY[28]
TX_D5inputCELL[12].IMUX_IMUX_DELAY[27]
TX_D6inputCELL[12].IMUX_IMUX_DELAY[11]
TX_D7inputCELL[12].IMUX_IMUX_DELAY[40]
TX_EN_VTCinputCELL[13].IMUX_BYP_DELAY[10]
TX_INCinputCELL[13].IMUX_BYP_DELAY[9]
TX_LDinputCELL[13].IMUX_BYP_DELAY[8]
TX_TinputCELL[12].IMUX_IMUX_DELAY[18]
TX_T_OUToutputCELL[11].OUT_BEL[8]

Bel BITSLICE[11]

ultrascaleplus XIPHY bel BITSLICE[11]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[12].IMUX_IMUX_DELAY[45]
DYN_DCI_OUT_INTinputCELL[14].IMUX_BYP_DELAY[15]
PHY2CLB_FIFO_EMPTYoutputCELL[14].OUT_BEL[4]
RX_CE_IDELAYinputCELL[14].IMUX_BYP_DELAY[14]
RX_CE_IFDinputCELL[12].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN0inputCELL[14].IMUX_IMUX_DELAY[7]
RX_CNTVALUEIN1inputCELL[14].IMUX_IMUX_DELAY[8]
RX_CNTVALUEIN2inputCELL[14].IMUX_IMUX_DELAY[9]
RX_CNTVALUEIN3inputCELL[14].IMUX_IMUX_DELAY[10]
RX_CNTVALUEIN4inputCELL[14].IMUX_IMUX_DELAY[11]
RX_CNTVALUEIN5inputCELL[14].IMUX_IMUX_DELAY[12]
RX_CNTVALUEIN6inputCELL[14].IMUX_IMUX_DELAY[13]
RX_CNTVALUEIN7inputCELL[14].IMUX_IMUX_DELAY[14]
RX_CNTVALUEIN8inputCELL[14].IMUX_IMUX_DELAY[15]
RX_CNTVALUEOUT0outputCELL[14].OUT_BEL[21]
RX_CNTVALUEOUT1outputCELL[14].OUT_BEL[22]
RX_CNTVALUEOUT2outputCELL[14].OUT_BEL[23]
RX_CNTVALUEOUT3outputCELL[14].OUT_BEL[24]
RX_CNTVALUEOUT4outputCELL[14].OUT_BEL[27]
RX_CNTVALUEOUT5outputCELL[14].OUT_BEL[28]
RX_CNTVALUEOUT6outputCELL[14].OUT_BEL[29]
RX_CNTVALUEOUT7outputCELL[14].OUT_BEL[30]
RX_CNTVALUEOUT8outputCELL[14].OUT_BEL[31]
RX_DATAIN1inputCELL[12].IMUX_IMUX_DELAY[44]
RX_EN_VTCinputCELL[14].IMUX_BYP_DELAY[13]
RX_INCinputCELL[14].IMUX_BYP_DELAY[12]
RX_LDinputCELL[14].IMUX_BYP_DELAY[11]
RX_Q0outputCELL[14].OUT_BEL[5]
RX_Q1outputCELL[14].OUT_BEL[6]
RX_Q2outputCELL[14].OUT_BEL[11]
RX_Q3outputCELL[14].OUT_BEL[12]
RX_Q4outputCELL[14].OUT_BEL[17]
RX_Q5outputCELL[14].OUT_BEL[18]
RX_Q6outputCELL[14].OUT_BEL[25]
RX_Q7outputCELL[14].OUT_BEL[26]
TX_CE_ODELAYinputCELL[14].IMUX_BYP_DELAY[10]
TX_CE_OFDinputCELL[12].IMUX_IMUX_DELAY[43]
TX_CNTVALUEIN0inputCELL[13].IMUX_IMUX_DELAY[7]
TX_CNTVALUEIN1inputCELL[13].IMUX_IMUX_DELAY[8]
TX_CNTVALUEIN2inputCELL[13].IMUX_IMUX_DELAY[9]
TX_CNTVALUEIN3inputCELL[13].IMUX_IMUX_DELAY[10]
TX_CNTVALUEIN4inputCELL[13].IMUX_IMUX_DELAY[13]
TX_CNTVALUEIN5inputCELL[13].IMUX_IMUX_DELAY[14]
TX_CNTVALUEIN6inputCELL[13].IMUX_IMUX_DELAY[15]
TX_CNTVALUEIN7inputCELL[14].IMUX_IMUX_DELAY[16]
TX_CNTVALUEIN8inputCELL[14].IMUX_IMUX_DELAY[6]
TX_CNTVALUEOUT0outputCELL[14].OUT_BEL[7]
TX_CNTVALUEOUT1outputCELL[14].OUT_BEL[8]
TX_CNTVALUEOUT2outputCELL[14].OUT_BEL[9]
TX_CNTVALUEOUT3outputCELL[14].OUT_BEL[10]
TX_CNTVALUEOUT4outputCELL[14].OUT_BEL[13]
TX_CNTVALUEOUT5outputCELL[14].OUT_BEL[14]
TX_CNTVALUEOUT6outputCELL[14].OUT_BEL[15]
TX_CNTVALUEOUT7outputCELL[14].OUT_BEL[16]
TX_CNTVALUEOUT8outputCELL[14].OUT_BEL[19]
TX_D0inputCELL[12].IMUX_IMUX_DELAY[46]
TX_D1inputCELL[12].IMUX_IMUX_DELAY[14]
TX_D2inputCELL[12].IMUX_IMUX_DELAY[47]
TX_D3inputCELL[12].IMUX_IMUX_DELAY[15]
TX_D4inputCELL[13].IMUX_IMUX_DELAY[16]
TX_D5inputCELL[13].IMUX_IMUX_DELAY[6]
TX_D6inputCELL[13].IMUX_IMUX_DELAY[11]
TX_D7inputCELL[13].IMUX_IMUX_DELAY[12]
TX_EN_VTCinputCELL[14].IMUX_BYP_DELAY[9]
TX_INCinputCELL[14].IMUX_BYP_DELAY[8]
TX_LDinputCELL[14].IMUX_BYP_DELAY[7]
TX_TinputCELL[12].IMUX_IMUX_DELAY[12]
TX_T_OUToutputCELL[11].OUT_BEL[31]

Bel BITSLICE[12]

ultrascaleplus XIPHY bel BITSLICE[12]
PinDirectionWires
CLB2PHY_FIFO_RDENinputCELL[7].IMUX_IMUX_DELAY[36]
DYN_DCI_OUT_INTinputCELL[8].IMUX_BYP_DELAY[13]
PHY2CLB_FIFO_EMPTYoutputCELL[7].OUT_BEL[18]
RX_CE_IDELAYinputCELL[8].IMUX_BYP_DELAY[12]
RX_CE_IFDinputCELL[7].IMUX_IMUX_DELAY[35]
RX_CNTVALUEIN0inputCELL[8].IMUX_IMUX_DELAY[18]
RX_CNTVALUEIN1inputCELL[8].IMUX_IMUX_DELAY[19]
RX_CNTVALUEIN2inputCELL[8].IMUX_IMUX_DELAY[20]
RX_CNTVALUEIN3inputCELL[8].IMUX_IMUX_DELAY[21]
RX_CNTVALUEIN4inputCELL[8].IMUX_IMUX_DELAY[22]
RX_CNTVALUEIN5inputCELL[8].IMUX_IMUX_DELAY[23]
RX_CNTVALUEIN6inputCELL[8].IMUX_IMUX_DELAY[24]
RX_CNTVALUEIN7inputCELL[8].IMUX_IMUX_DELAY[25]
RX_CNTVALUEIN8inputCELL[8].IMUX_IMUX_DELAY[31]
RX_CNTVALUEOUT0outputCELL[8].OUT_BEL[14]
RX_CNTVALUEOUT1outputCELL[8].OUT_BEL[15]
RX_CNTVALUEOUT2outputCELL[8].OUT_BEL[16]
RX_CNTVALUEOUT3outputCELL[8].OUT_BEL[17]
RX_CNTVALUEOUT4outputCELL[8].OUT_BEL[20]
RX_CNTVALUEOUT5outputCELL[8].OUT_BEL[21]
RX_CNTVALUEOUT6outputCELL[8].OUT_BEL[22]
RX_CNTVALUEOUT7outputCELL[8].OUT_BEL[23]
RX_CNTVALUEOUT8outputCELL[8].OUT_BEL[24]
RX_DATAIN1inputCELL[7].IMUX_IMUX_DELAY[9]
RX_EN_VTCinputCELL[8].IMUX_BYP_DELAY[11]
RX_INCinputCELL[8].IMUX_BYP_DELAY[10]
RX_LDinputCELL[8].IMUX_BYP_DELAY[9]
RX_Q0outputCELL[7].OUT_BEL[19]
RX_Q1outputCELL[7].OUT_BEL[20]
RX_Q2outputCELL[7].OUT_BEL[23]
RX_Q3outputCELL[7].OUT_BEL[24]
RX_Q4outputCELL[7].OUT_BEL[25]
RX_Q5outputCELL[7].OUT_BEL[29]
RX_Q6outputCELL[7].OUT_BEL[30]
RX_Q7outputCELL[7].OUT_BEL[31]
TX_CE_ODELAYinputCELL[8].IMUX_BYP_DELAY[8]
TX_CE_OFDinputCELL[7].IMUX_IMUX_DELAY[8]
TX_CNTVALUEIN0inputCELL[7].IMUX_IMUX_DELAY[37]
TX_CNTVALUEIN1inputCELL[7].IMUX_IMUX_DELAY[38]
TX_CNTVALUEIN2inputCELL[7].IMUX_IMUX_DELAY[11]
TX_CNTVALUEIN3inputCELL[7].IMUX_IMUX_DELAY[40]
TX_CNTVALUEIN4inputCELL[7].IMUX_IMUX_DELAY[12]
TX_CNTVALUEIN5inputCELL[7].IMUX_IMUX_DELAY[43]
TX_CNTVALUEIN6inputCELL[7].IMUX_IMUX_DELAY[45]
TX_CNTVALUEIN7inputCELL[7].IMUX_IMUX_DELAY[46]
TX_CNTVALUEIN8inputCELL[7].IMUX_IMUX_DELAY[15]
TX_CNTVALUEOUT0outputCELL[7].OUT_BEL[21]
TX_CNTVALUEOUT1outputCELL[7].OUT_BEL[22]
TX_CNTVALUEOUT2outputCELL[7].OUT_BEL[26]
TX_CNTVALUEOUT3outputCELL[7].OUT_BEL[27]
TX_CNTVALUEOUT4outputCELL[7].OUT_BEL[28]
TX_CNTVALUEOUT5outputCELL[8].OUT_BEL[7]
TX_CNTVALUEOUT6outputCELL[8].OUT_BEL[8]
TX_CNTVALUEOUT7outputCELL[8].OUT_BEL[9]
TX_CNTVALUEOUT8outputCELL[8].OUT_BEL[10]
TX_D0inputCELL[7].IMUX_IMUX_DELAY[10]
TX_D1inputCELL[7].IMUX_IMUX_DELAY[39]
TX_D2inputCELL[7].IMUX_IMUX_DELAY[41]
TX_D3inputCELL[7].IMUX_IMUX_DELAY[42]
TX_D4inputCELL[7].IMUX_IMUX_DELAY[13]
TX_D5inputCELL[7].IMUX_IMUX_DELAY[44]
TX_D6inputCELL[7].IMUX_IMUX_DELAY[14]
TX_D7inputCELL[7].IMUX_IMUX_DELAY[47]
TX_EN_VTCinputCELL[8].IMUX_BYP_DELAY[7]
TX_INCinputCELL[8].IMUX_BYP_DELAY[6]
TX_LDinputCELL[7].IMUX_BYP_DELAY[15]
TX_TinputCELL[7].IMUX_IMUX_DELAY[34]
TX_T_OUToutputCELL[12].OUT_BEL[20]

Bel BITSLICE_T[0]

ultrascaleplus XIPHY bel BITSLICE_T[0]
PinDirectionWires
CE_ODELAYinputCELL[3].IMUX_BYP_DELAY[8]
CE_OFDinputCELL[2].IMUX_BYP_DELAY[15]
CNTVALUEIN0inputCELL[3].IMUX_IMUX_DELAY[38]
CNTVALUEIN1inputCELL[3].IMUX_IMUX_DELAY[10]
CNTVALUEIN2inputCELL[3].IMUX_IMUX_DELAY[40]
CNTVALUEIN3inputCELL[3].IMUX_IMUX_DELAY[41]
CNTVALUEIN4inputCELL[3].IMUX_IMUX_DELAY[42]
CNTVALUEIN5inputCELL[3].IMUX_IMUX_DELAY[12]
CNTVALUEIN6inputCELL[3].IMUX_IMUX_DELAY[43]
CNTVALUEIN7inputCELL[3].IMUX_IMUX_DELAY[13]
CNTVALUEIN8inputCELL[3].IMUX_IMUX_DELAY[44]
CNTVALUEOUT0outputCELL[3].OUT_BEL[6]
CNTVALUEOUT1outputCELL[3].OUT_BEL[7]
CNTVALUEOUT2outputCELL[3].OUT_BEL[8]
CNTVALUEOUT3outputCELL[3].OUT_BEL[9]
CNTVALUEOUT4outputCELL[3].OUT_BEL[12]
CNTVALUEOUT5outputCELL[3].OUT_BEL[13]
CNTVALUEOUT6outputCELL[3].OUT_BEL[14]
CNTVALUEOUT7outputCELL[3].OUT_BEL[15]
CNTVALUEOUT8outputCELL[3].OUT_BEL[18]
EN_VTCinputCELL[0].IMUX_BYP_DELAY[6]
INCinputCELL[3].IMUX_BYP_DELAY[7]
LDinputCELL[3].IMUX_BYP_DELAY[6]

Bel BITSLICE_T[1]

ultrascaleplus XIPHY bel BITSLICE_T[1]
PinDirectionWires
CE_ODELAYinputCELL[12].IMUX_BYP_DELAY[6]
CE_OFDinputCELL[11].IMUX_BYP_DELAY[13]
CNTVALUEIN0inputCELL[10].IMUX_IMUX_DELAY[34]
CNTVALUEIN1inputCELL[10].IMUX_IMUX_DELAY[8]
CNTVALUEIN2inputCELL[10].IMUX_IMUX_DELAY[35]
CNTVALUEIN3inputCELL[10].IMUX_IMUX_DELAY[9]
CNTVALUEIN4inputCELL[10].IMUX_IMUX_DELAY[36]
CNTVALUEIN5inputCELL[10].IMUX_IMUX_DELAY[37]
CNTVALUEIN6inputCELL[10].IMUX_IMUX_DELAY[38]
CNTVALUEIN7inputCELL[10].IMUX_IMUX_DELAY[10]
CNTVALUEIN8inputCELL[10].IMUX_IMUX_DELAY[39]
CNTVALUEOUT0outputCELL[11].OUT_BEL[18]
CNTVALUEOUT1outputCELL[11].OUT_BEL[19]
CNTVALUEOUT2outputCELL[11].OUT_BEL[20]
CNTVALUEOUT3outputCELL[11].OUT_BEL[21]
CNTVALUEOUT4outputCELL[11].OUT_BEL[22]
CNTVALUEOUT5outputCELL[11].OUT_BEL[23]
CNTVALUEOUT6outputCELL[11].OUT_BEL[24]
CNTVALUEOUT7outputCELL[11].OUT_BEL[25]
CNTVALUEOUT8outputCELL[11].OUT_BEL[26]
EN_VTCinputCELL[1].IMUX_BYP_DELAY[6]
INCinputCELL[11].IMUX_BYP_DELAY[15]
LDinputCELL[11].IMUX_BYP_DELAY[14]

Bel BITSLICE_CONTROL[0]

ultrascaleplus XIPHY bel BITSLICE_CONTROL[0]
PinDirectionWires
CLB2PHY_RDCS0_0inputCELL[4].IMUX_IMUX_DELAY[32]
CLB2PHY_RDCS0_1inputCELL[4].IMUX_IMUX_DELAY[33]
CLB2PHY_RDCS0_2inputCELL[4].IMUX_IMUX_DELAY[34]
CLB2PHY_RDCS0_3inputCELL[4].IMUX_IMUX_DELAY[8]
CLB2PHY_RDCS1_0inputCELL[4].IMUX_IMUX_DELAY[30]
CLB2PHY_RDCS1_1inputCELL[4].IMUX_IMUX_DELAY[6]
CLB2PHY_RDCS1_2inputCELL[4].IMUX_IMUX_DELAY[31]
CLB2PHY_RDCS1_3inputCELL[4].IMUX_IMUX_DELAY[7]
CLB2PHY_RDEN0inputCELL[4].IMUX_IMUX_DELAY[26]
CLB2PHY_RDEN1inputCELL[4].IMUX_IMUX_DELAY[27]
CLB2PHY_RDEN2inputCELL[4].IMUX_IMUX_DELAY[28]
CLB2PHY_RDEN3inputCELL[4].IMUX_IMUX_DELAY[29]
CLB2PHY_T_B0inputCELL[4].IMUX_IMUX_DELAY[22]
CLB2PHY_T_B1inputCELL[4].IMUX_IMUX_DELAY[23]
CLB2PHY_T_B2inputCELL[4].IMUX_IMUX_DELAY[24]
CLB2PHY_T_B3inputCELL[4].IMUX_IMUX_DELAY[25]
CLB2PHY_WRCS0_0inputCELL[4].IMUX_IMUX_DELAY[18]
CLB2PHY_WRCS0_1inputCELL[4].IMUX_IMUX_DELAY[19]
CLB2PHY_WRCS0_2inputCELL[4].IMUX_IMUX_DELAY[20]
CLB2PHY_WRCS0_3inputCELL[4].IMUX_IMUX_DELAY[21]
CLB2PHY_WRCS1_0inputCELL[3].IMUX_IMUX_DELAY[47]
CLB2PHY_WRCS1_1inputCELL[3].IMUX_IMUX_DELAY[15]
CLB2PHY_WRCS1_2inputCELL[4].IMUX_IMUX_DELAY[16]
CLB2PHY_WRCS1_3inputCELL[4].IMUX_IMUX_DELAY[17]
CLB2RIU_ADDR0inputCELL[7].IMUX_IMUX_DELAY[24]
CLB2RIU_ADDR1inputCELL[7].IMUX_IMUX_DELAY[25]
CLB2RIU_ADDR2inputCELL[7].IMUX_IMUX_DELAY[26]
CLB2RIU_ADDR3inputCELL[7].IMUX_IMUX_DELAY[27]
CLB2RIU_ADDR4inputCELL[7].IMUX_IMUX_DELAY[28]
CLB2RIU_ADDR5inputCELL[7].IMUX_IMUX_DELAY[29]
CLB2RIU_NIBBLE_SELinputCELL[3].IMUX_IMUX_DELAY[14]
CLB2RIU_WR_DATA0inputCELL[6].IMUX_IMUX_DELAY[43]
CLB2RIU_WR_DATA1inputCELL[6].IMUX_IMUX_DELAY[13]
CLB2RIU_WR_DATA10inputCELL[7].IMUX_IMUX_DELAY[18]
CLB2RIU_WR_DATA11inputCELL[7].IMUX_IMUX_DELAY[19]
CLB2RIU_WR_DATA12inputCELL[7].IMUX_IMUX_DELAY[20]
CLB2RIU_WR_DATA13inputCELL[7].IMUX_IMUX_DELAY[21]
CLB2RIU_WR_DATA14inputCELL[7].IMUX_IMUX_DELAY[22]
CLB2RIU_WR_DATA15inputCELL[7].IMUX_IMUX_DELAY[23]
CLB2RIU_WR_DATA2inputCELL[6].IMUX_IMUX_DELAY[44]
CLB2RIU_WR_DATA3inputCELL[6].IMUX_IMUX_DELAY[45]
CLB2RIU_WR_DATA4inputCELL[6].IMUX_IMUX_DELAY[46]
CLB2RIU_WR_DATA5inputCELL[6].IMUX_IMUX_DELAY[14]
CLB2RIU_WR_DATA6inputCELL[6].IMUX_IMUX_DELAY[47]
CLB2RIU_WR_DATA7inputCELL[6].IMUX_IMUX_DELAY[15]
CLB2RIU_WR_DATA8inputCELL[7].IMUX_IMUX_DELAY[16]
CLB2RIU_WR_DATA9inputCELL[7].IMUX_IMUX_DELAY[17]
CLB2RIU_WR_ENinputCELL[6].IMUX_IMUX_DELAY[12]
CTRL_DLY_TEST_INinputCELL[3].IMUX_BYP_DELAY[10]
CTRL_DLY_TEST_OUToutputCELL[3].OUT_BEL[23]
EN_VTCinputCELL[3].IMUX_BYP_DELAY[9]
MASTER_PD_OUToutputCELL[3].OUT_BEL[21]
PHY2CLB_FIXDLY_RDYoutputCELL[3].OUT_BEL[22]
PHY2CLB_PHY_RDYoutputCELL[3].OUT_BEL[20]
REFCLKinputCELL[3].IMUX_CTRL[5]
RIU_CLKinputCELL[3].IMUX_CTRL[7]

Bel BITSLICE_CONTROL[1]

ultrascaleplus XIPHY bel BITSLICE_CONTROL[1]
PinDirectionWires
CLB2PHY_RDCS0_0inputCELL[11].IMUX_IMUX_DELAY[24]
CLB2PHY_RDCS0_1inputCELL[11].IMUX_IMUX_DELAY[25]
CLB2PHY_RDCS0_2inputCELL[11].IMUX_IMUX_DELAY[26]
CLB2PHY_RDCS0_3inputCELL[11].IMUX_IMUX_DELAY[27]
CLB2PHY_RDCS1_0inputCELL[11].IMUX_IMUX_DELAY[20]
CLB2PHY_RDCS1_1inputCELL[11].IMUX_IMUX_DELAY[21]
CLB2PHY_RDCS1_2inputCELL[11].IMUX_IMUX_DELAY[22]
CLB2PHY_RDCS1_3inputCELL[11].IMUX_IMUX_DELAY[23]
CLB2PHY_RDEN0inputCELL[11].IMUX_IMUX_DELAY[16]
CLB2PHY_RDEN1inputCELL[11].IMUX_IMUX_DELAY[17]
CLB2PHY_RDEN2inputCELL[11].IMUX_IMUX_DELAY[18]
CLB2PHY_RDEN3inputCELL[11].IMUX_IMUX_DELAY[19]
CLB2PHY_T_B0inputCELL[10].IMUX_IMUX_DELAY[46]
CLB2PHY_T_B1inputCELL[10].IMUX_IMUX_DELAY[14]
CLB2PHY_T_B2inputCELL[10].IMUX_IMUX_DELAY[47]
CLB2PHY_T_B3inputCELL[10].IMUX_IMUX_DELAY[15]
CLB2PHY_WRCS0_0inputCELL[10].IMUX_IMUX_DELAY[43]
CLB2PHY_WRCS0_1inputCELL[10].IMUX_IMUX_DELAY[13]
CLB2PHY_WRCS0_2inputCELL[10].IMUX_IMUX_DELAY[44]
CLB2PHY_WRCS0_3inputCELL[10].IMUX_IMUX_DELAY[45]
CLB2PHY_WRCS1_0inputCELL[10].IMUX_IMUX_DELAY[40]
CLB2PHY_WRCS1_1inputCELL[10].IMUX_IMUX_DELAY[41]
CLB2PHY_WRCS1_2inputCELL[10].IMUX_IMUX_DELAY[42]
CLB2PHY_WRCS1_3inputCELL[10].IMUX_IMUX_DELAY[12]
CLB2RIU_ADDR0inputCELL[7].IMUX_IMUX_DELAY[24]
CLB2RIU_ADDR1inputCELL[7].IMUX_IMUX_DELAY[25]
CLB2RIU_ADDR2inputCELL[7].IMUX_IMUX_DELAY[26]
CLB2RIU_ADDR3inputCELL[7].IMUX_IMUX_DELAY[27]
CLB2RIU_ADDR4inputCELL[7].IMUX_IMUX_DELAY[28]
CLB2RIU_ADDR5inputCELL[7].IMUX_IMUX_DELAY[29]
CLB2RIU_NIBBLE_SELinputCELL[10].IMUX_IMUX_DELAY[11]
CLB2RIU_WR_DATA0inputCELL[6].IMUX_IMUX_DELAY[43]
CLB2RIU_WR_DATA1inputCELL[6].IMUX_IMUX_DELAY[13]
CLB2RIU_WR_DATA10inputCELL[7].IMUX_IMUX_DELAY[18]
CLB2RIU_WR_DATA11inputCELL[7].IMUX_IMUX_DELAY[19]
CLB2RIU_WR_DATA12inputCELL[7].IMUX_IMUX_DELAY[20]
CLB2RIU_WR_DATA13inputCELL[7].IMUX_IMUX_DELAY[21]
CLB2RIU_WR_DATA14inputCELL[7].IMUX_IMUX_DELAY[22]
CLB2RIU_WR_DATA15inputCELL[7].IMUX_IMUX_DELAY[23]
CLB2RIU_WR_DATA2inputCELL[6].IMUX_IMUX_DELAY[44]
CLB2RIU_WR_DATA3inputCELL[6].IMUX_IMUX_DELAY[45]
CLB2RIU_WR_DATA4inputCELL[6].IMUX_IMUX_DELAY[46]
CLB2RIU_WR_DATA5inputCELL[6].IMUX_IMUX_DELAY[14]
CLB2RIU_WR_DATA6inputCELL[6].IMUX_IMUX_DELAY[47]
CLB2RIU_WR_DATA7inputCELL[6].IMUX_IMUX_DELAY[15]
CLB2RIU_WR_DATA8inputCELL[7].IMUX_IMUX_DELAY[16]
CLB2RIU_WR_DATA9inputCELL[7].IMUX_IMUX_DELAY[17]
CLB2RIU_WR_ENinputCELL[6].IMUX_IMUX_DELAY[12]
CTRL_DLY_TEST_INinputCELL[12].IMUX_BYP_DELAY[8]
CTRL_DLY_TEST_OUToutputCELL[11].OUT_BEL[30]
EN_VTCinputCELL[12].IMUX_BYP_DELAY[7]
MASTER_PD_OUToutputCELL[11].OUT_BEL[28]
PHY2CLB_FIXDLY_RDYoutputCELL[11].OUT_BEL[29]
PHY2CLB_PHY_RDYoutputCELL[11].OUT_BEL[27]
REFCLKinputCELL[11].IMUX_CTRL[6]
RIU_CLKinputCELL[12].IMUX_CTRL[4]

Bel PLL_SELECT[0]

ultrascaleplus XIPHY bel PLL_SELECT[0]
PinDirectionWires

Bel PLL_SELECT[1]

ultrascaleplus XIPHY bel PLL_SELECT[1]
PinDirectionWires

Bel RIU_OR[0]

ultrascaleplus XIPHY bel RIU_OR[0]
PinDirectionWires
RIU_RD_DATA0outputCELL[6].OUT_BEL[4]
RIU_RD_DATA1outputCELL[6].OUT_BEL[5]
RIU_RD_DATA10outputCELL[6].OUT_BEL[29]
RIU_RD_DATA11outputCELL[6].OUT_BEL[30]
RIU_RD_DATA12outputCELL[6].OUT_BEL[31]
RIU_RD_DATA13outputCELL[7].OUT_BEL[4]
RIU_RD_DATA14outputCELL[7].OUT_BEL[5]
RIU_RD_DATA15outputCELL[7].OUT_BEL[6]
RIU_RD_DATA2outputCELL[6].OUT_BEL[9]
RIU_RD_DATA3outputCELL[6].OUT_BEL[10]
RIU_RD_DATA4outputCELL[6].OUT_BEL[14]
RIU_RD_DATA5outputCELL[6].OUT_BEL[15]
RIU_RD_DATA6outputCELL[6].OUT_BEL[19]
RIU_RD_DATA7outputCELL[6].OUT_BEL[20]
RIU_RD_DATA8outputCELL[6].OUT_BEL[24]
RIU_RD_DATA9outputCELL[6].OUT_BEL[25]
RIU_RD_VALIDoutputCELL[6].OUT_BEL[28]

Bel XIPHY_FEEDTHROUGH[0]

ultrascaleplus XIPHY bel XIPHY_FEEDTHROUGH[0]
PinDirectionWires
CLB2PHY_CTRL_CLK_LOWinputCELL[3].IMUX_CTRL[7]
CLB2PHY_CTRL_CLK_UPPinputCELL[12].IMUX_CTRL[4]
CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUTinputCELL[7].IMUX_IMUX_DELAY[33]
CLB2PHY_DBG_CLK_STOP_FLG_OUTinputCELL[7].IMUX_IMUX_DELAY[32]
CLB2PHY_DBG_CT_START_ENinputCELL[7].IMUX_IMUX_DELAY[7]
CLB2PHY_FIFO_CLK0inputCELL[1].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK1inputCELL[2].IMUX_CTRL[5]
CLB2PHY_FIFO_CLK10inputCELL[14].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK11inputCELL[14].IMUX_CTRL[5]
CLB2PHY_FIFO_CLK12inputCELL[8].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK2inputCELL[3].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK3inputCELL[4].IMUX_CTRL[5]
CLB2PHY_FIFO_CLK4inputCELL[5].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK5inputCELL[6].IMUX_CTRL[5]
CLB2PHY_FIFO_CLK6inputCELL[9].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK7inputCELL[10].IMUX_CTRL[4]
CLB2PHY_FIFO_CLK8inputCELL[11].IMUX_CTRL[5]
CLB2PHY_FIFO_CLK9inputCELL[13].IMUX_CTRL[5]
CLB2PHY_SCAN_CLK_DIV2inputCELL[7].IMUX_CTRL[5]
CLB2PHY_SCAN_CLK_DIV4inputCELL[7].IMUX_CTRL[4]
CLB2PHY_SCAN_CLK_SDRinputCELL[7].IMUX_CTRL[3]
CLB2PHY_SCAN_EN_BinputCELL[7].IMUX_BYP_DELAY[14]
CLB2PHY_SCAN_IN0inputCELL[6].IMUX_BYP_DELAY[15]
CLB2PHY_SCAN_IN1inputCELL[7].IMUX_BYP_DELAY[6]
CLB2PHY_SCAN_IN2inputCELL[7].IMUX_BYP_DELAY[7]
CLB2PHY_SCAN_IN3inputCELL[7].IMUX_BYP_DELAY[8]
CLB2PHY_SCAN_IN4inputCELL[7].IMUX_BYP_DELAY[10]
CLB2PHY_SCAN_IN5inputCELL[7].IMUX_BYP_DELAY[11]
CLB2PHY_SCAN_IN6inputCELL[7].IMUX_BYP_DELAY[12]
CLB2PHY_SCAN_IN7inputCELL[7].IMUX_BYP_DELAY[13]
CLB2PHY_SCAN_MODE_BinputCELL[6].IMUX_BYP_DELAY[14]
CLB2PHY_SCAN_RST_MASK_BinputCELL[6].IMUX_BYP_DELAY[13]
CLB2PHY_TEST_DIV2_CLK_SEL_BinputCELL[7].IMUX_IMUX_DELAY[31]
CLB2PHY_TEST_DIV4_CLK_SEL_BinputCELL[7].IMUX_IMUX_DELAY[6]
CLB2PHY_TEST_SDR_CLK_SEL_BinputCELL[7].IMUX_IMUX_DELAY[30]
CLB2PHY_TEST_SPARE_B0inputCELL[6].IMUX_BYP_DELAY[9]
CLB2PHY_TEST_SPARE_B1inputCELL[6].IMUX_BYP_DELAY[10]
CLB2PHY_TEST_SPARE_B2inputCELL[6].IMUX_BYP_DELAY[11]
CLB2PHY_TEST_SPARE_B3inputCELL[6].IMUX_BYP_DELAY[12]
CTRL_RST_LOWinputCELL[3].IMUX_CTRL[6]
CTRL_RST_UPPinputCELL[11].IMUX_CTRL[7]
IDELAY_RST0inputCELL[0].IMUX_CTRL[6]
IDELAY_RST1inputCELL[1].IMUX_CTRL[7]
IDELAY_RST10inputCELL[13].IMUX_CTRL[7]
IDELAY_RST11inputCELL[14].IMUX_CTRL[7]
IDELAY_RST12inputCELL[8].IMUX_CTRL[3]
IDELAY_RST2inputCELL[2].IMUX_CTRL[7]
IDELAY_RST3inputCELL[4].IMUX_CTRL[7]
IDELAY_RST4inputCELL[5].IMUX_CTRL[7]
IDELAY_RST5inputCELL[6].IMUX_CTRL[7]
IDELAY_RST6inputCELL[9].IMUX_CTRL[3]
IDELAY_RST7inputCELL[10].IMUX_CTRL[2]
IDELAY_RST8inputCELL[11].IMUX_CTRL[2]
IDELAY_RST9inputCELL[12].IMUX_CTRL[7]
ODELAY_RST0inputCELL[0].IMUX_CTRL[5]
ODELAY_RST1inputCELL[1].IMUX_CTRL[6]
ODELAY_RST10inputCELL[13].IMUX_CTRL[2]
ODELAY_RST11inputCELL[14].IMUX_CTRL[6]
ODELAY_RST12inputCELL[8].IMUX_CTRL[2]
ODELAY_RST2inputCELL[2].IMUX_CTRL[6]
ODELAY_RST3inputCELL[4].IMUX_CTRL[6]
ODELAY_RST4inputCELL[5].IMUX_CTRL[6]
ODELAY_RST5inputCELL[6].IMUX_CTRL[4]
ODELAY_RST6inputCELL[8].IMUX_CTRL[7]
ODELAY_RST7inputCELL[9].IMUX_CTRL[7]
ODELAY_RST8inputCELL[10].IMUX_CTRL[7]
ODELAY_RST9inputCELL[12].IMUX_CTRL[6]
PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUToutputCELL[7].OUT_BEL[17]
PHY2CLB_DBG_CLK_STOP_FLG_OUToutputCELL[7].OUT_BEL[16]
PHY2CLB_DBG_CLK_STOP_OUToutputCELL[7].OUT_BEL[15]
PHY2CLB_SCAN_OUT0outputCELL[7].OUT_BEL[7]
PHY2CLB_SCAN_OUT1outputCELL[7].OUT_BEL[8]
PHY2CLB_SCAN_OUT2outputCELL[7].OUT_BEL[9]
PHY2CLB_SCAN_OUT3outputCELL[7].OUT_BEL[10]
PHY2CLB_SCAN_OUT4outputCELL[7].OUT_BEL[11]
PHY2CLB_SCAN_OUT5outputCELL[7].OUT_BEL[12]
PHY2CLB_SCAN_OUT6outputCELL[7].OUT_BEL[13]
PHY2CLB_SCAN_OUT7outputCELL[7].OUT_BEL[14]
RXBIT_RST0inputCELL[0].IMUX_CTRL[4]
RXBIT_RST1inputCELL[1].IMUX_CTRL[5]
RXBIT_RST10inputCELL[13].IMUX_CTRL[4]
RXBIT_RST11inputCELL[14].IMUX_CTRL[3]
RXBIT_RST12inputCELL[7].IMUX_CTRL[2]
RXBIT_RST2inputCELL[2].IMUX_CTRL[4]
RXBIT_RST3inputCELL[4].IMUX_CTRL[3]
RXBIT_RST4inputCELL[5].IMUX_CTRL[3]
RXBIT_RST5inputCELL[6].IMUX_CTRL[3]
RXBIT_RST6inputCELL[8].IMUX_CTRL[6]
RXBIT_RST7inputCELL[9].IMUX_CTRL[6]
RXBIT_RST8inputCELL[10].IMUX_CTRL[6]
RXBIT_RST9inputCELL[12].IMUX_CTRL[3]
TRISTATE_ODELAY_RST0inputCELL[3].IMUX_CTRL[2]
TRISTATE_ODELAY_RST1inputCELL[11].IMUX_CTRL[3]
TXBIT_RST0inputCELL[0].IMUX_CTRL[3]
TXBIT_RST1inputCELL[1].IMUX_CTRL[3]
TXBIT_RST10inputCELL[13].IMUX_CTRL[3]
TXBIT_RST11inputCELL[14].IMUX_CTRL[2]
TXBIT_RST12inputCELL[7].IMUX_CTRL[6]
TXBIT_RST2inputCELL[2].IMUX_CTRL[3]
TXBIT_RST3inputCELL[4].IMUX_CTRL[2]
TXBIT_RST4inputCELL[5].IMUX_CTRL[2]
TXBIT_RST5inputCELL[6].IMUX_CTRL[2]
TXBIT_RST6inputCELL[8].IMUX_CTRL[5]
TXBIT_RST7inputCELL[9].IMUX_CTRL[5]
TXBIT_RST8inputCELL[10].IMUX_CTRL[5]
TXBIT_RST9inputCELL[12].IMUX_CTRL[2]
TXBIT_TRI_RST0inputCELL[0].IMUX_CTRL[2]
TXBIT_TRI_RST1inputCELL[1].IMUX_CTRL[2]

Bel XIPHY_BYTE

ultrascaleplus XIPHY bel XIPHY_BYTE
PinDirectionWires

Bel wires

ultrascaleplus XIPHY bel wires
WirePins
CELL[0].OUT_BEL[4]BITSLICE[0].PHY2CLB_FIFO_EMPTY
CELL[0].OUT_BEL[5]BITSLICE[0].RX_Q0
CELL[0].OUT_BEL[6]BITSLICE[0].TX_CNTVALUEOUT0
CELL[0].OUT_BEL[7]BITSLICE[0].TX_CNTVALUEOUT1
CELL[0].OUT_BEL[8]BITSLICE[0].TX_CNTVALUEOUT2
CELL[0].OUT_BEL[9]BITSLICE[0].TX_CNTVALUEOUT3
CELL[0].OUT_BEL[10]BITSLICE[0].RX_Q1
CELL[0].OUT_BEL[11]BITSLICE[0].RX_Q2
CELL[0].OUT_BEL[12]BITSLICE[0].TX_CNTVALUEOUT4
CELL[0].OUT_BEL[13]BITSLICE[0].TX_CNTVALUEOUT5
CELL[0].OUT_BEL[14]BITSLICE[0].TX_CNTVALUEOUT6
CELL[0].OUT_BEL[15]BITSLICE[0].TX_CNTVALUEOUT7
CELL[0].OUT_BEL[16]BITSLICE[0].RX_Q3
CELL[0].OUT_BEL[17]BITSLICE[0].RX_Q4
CELL[0].OUT_BEL[18]BITSLICE[0].TX_CNTVALUEOUT8
CELL[0].OUT_BEL[19]BITSLICE[0].TX_T_OUT
CELL[0].OUT_BEL[20]BITSLICE[0].RX_CNTVALUEOUT0
CELL[0].OUT_BEL[21]BITSLICE[0].RX_CNTVALUEOUT1
CELL[0].OUT_BEL[22]BITSLICE[0].RX_Q5
CELL[0].OUT_BEL[23]BITSLICE[0].RX_Q6
CELL[0].OUT_BEL[24]BITSLICE[0].RX_CNTVALUEOUT2
CELL[0].OUT_BEL[25]BITSLICE[0].RX_CNTVALUEOUT3
CELL[0].OUT_BEL[26]BITSLICE[0].RX_CNTVALUEOUT4
CELL[0].OUT_BEL[27]BITSLICE[0].RX_CNTVALUEOUT5
CELL[0].OUT_BEL[28]BITSLICE[0].RX_Q7
CELL[0].OUT_BEL[29]BITSLICE[0].RX_CNTVALUEOUT6
CELL[0].OUT_BEL[30]BITSLICE[0].RX_CNTVALUEOUT7
CELL[0].OUT_BEL[31]BITSLICE[0].RX_CNTVALUEOUT8
CELL[0].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_TRI_RST0
CELL[0].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].TXBIT_RST0
CELL[0].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].RXBIT_RST0
CELL[0].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].ODELAY_RST0
CELL[0].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].IDELAY_RST0
CELL[0].IMUX_BYP_DELAY[6]BITSLICE_T[0].EN_VTC
CELL[0].IMUX_BYP_DELAY[7]BITSLICE[0].TX_LD
CELL[0].IMUX_BYP_DELAY[8]BITSLICE[0].TX_INC
CELL[0].IMUX_BYP_DELAY[9]BITSLICE[0].TX_EN_VTC
CELL[0].IMUX_BYP_DELAY[10]BITSLICE[0].TX_CE_ODELAY
CELL[0].IMUX_BYP_DELAY[11]BITSLICE[0].RX_LD
CELL[0].IMUX_BYP_DELAY[12]BITSLICE[0].RX_INC
CELL[0].IMUX_BYP_DELAY[13]BITSLICE[0].RX_EN_VTC
CELL[0].IMUX_BYP_DELAY[14]BITSLICE[0].RX_CE_IDELAY
CELL[0].IMUX_BYP_DELAY[15]BITSLICE[0].DYN_DCI_OUT_INT
CELL[0].IMUX_IMUX_DELAY[6]BITSLICE[0].TX_CE_OFD
CELL[0].IMUX_IMUX_DELAY[7]BITSLICE[0].RX_CE_IFD
CELL[0].IMUX_IMUX_DELAY[8]BITSLICE[0].RX_DATAIN1
CELL[0].IMUX_IMUX_DELAY[9]BITSLICE[0].CLB2PHY_FIFO_RDEN
CELL[0].IMUX_IMUX_DELAY[10]BITSLICE[0].TX_D7
CELL[0].IMUX_IMUX_DELAY[11]BITSLICE[0].TX_D6
CELL[0].IMUX_IMUX_DELAY[12]BITSLICE[0].TX_D5
CELL[0].IMUX_IMUX_DELAY[13]BITSLICE[0].TX_D4
CELL[0].IMUX_IMUX_DELAY[14]BITSLICE[0].TX_D3
CELL[0].IMUX_IMUX_DELAY[15]BITSLICE[0].TX_D2
CELL[0].IMUX_IMUX_DELAY[16]BITSLICE[0].TX_T
CELL[1].OUT_BEL[4]BITSLICE[1].PHY2CLB_FIFO_EMPTY
CELL[1].OUT_BEL[5]BITSLICE[1].RX_Q0
CELL[1].OUT_BEL[6]BITSLICE[1].TX_CNTVALUEOUT0
CELL[1].OUT_BEL[7]BITSLICE[1].TX_CNTVALUEOUT1
CELL[1].OUT_BEL[8]BITSLICE[1].TX_CNTVALUEOUT2
CELL[1].OUT_BEL[9]BITSLICE[1].TX_CNTVALUEOUT3
CELL[1].OUT_BEL[10]BITSLICE[1].RX_Q1
CELL[1].OUT_BEL[11]BITSLICE[1].RX_Q2
CELL[1].OUT_BEL[12]BITSLICE[1].TX_CNTVALUEOUT4
CELL[1].OUT_BEL[13]BITSLICE[1].TX_CNTVALUEOUT5
CELL[1].OUT_BEL[14]BITSLICE[1].TX_CNTVALUEOUT6
CELL[1].OUT_BEL[15]BITSLICE[1].TX_CNTVALUEOUT7
CELL[1].OUT_BEL[16]BITSLICE[1].RX_Q3
CELL[1].OUT_BEL[17]BITSLICE[1].RX_Q4
CELL[1].OUT_BEL[18]BITSLICE[1].TX_CNTVALUEOUT8
CELL[1].OUT_BEL[19]BITSLICE[1].TX_T_OUT
CELL[1].OUT_BEL[20]BITSLICE[1].RX_CNTVALUEOUT0
CELL[1].OUT_BEL[21]BITSLICE[1].RX_CNTVALUEOUT1
CELL[1].OUT_BEL[22]BITSLICE[1].RX_Q5
CELL[1].OUT_BEL[23]BITSLICE[1].RX_Q6
CELL[1].OUT_BEL[24]BITSLICE[1].RX_CNTVALUEOUT2
CELL[1].OUT_BEL[25]BITSLICE[1].RX_CNTVALUEOUT3
CELL[1].OUT_BEL[26]BITSLICE[1].RX_CNTVALUEOUT4
CELL[1].OUT_BEL[27]BITSLICE[1].RX_CNTVALUEOUT5
CELL[1].OUT_BEL[28]BITSLICE[1].RX_Q7
CELL[1].OUT_BEL[29]BITSLICE[1].RX_CNTVALUEOUT6
CELL[1].OUT_BEL[30]BITSLICE[1].RX_CNTVALUEOUT7
CELL[1].OUT_BEL[31]BITSLICE[1].RX_CNTVALUEOUT8
CELL[1].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_TRI_RST1
CELL[1].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].TXBIT_RST1
CELL[1].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK0
CELL[1].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].RXBIT_RST1
CELL[1].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST1
CELL[1].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST1
CELL[1].IMUX_BYP_DELAY[6]BITSLICE_T[1].EN_VTC
CELL[1].IMUX_BYP_DELAY[7]BITSLICE[1].TX_LD
CELL[1].IMUX_BYP_DELAY[8]BITSLICE[1].TX_INC
CELL[1].IMUX_BYP_DELAY[9]BITSLICE[1].TX_EN_VTC
CELL[1].IMUX_BYP_DELAY[10]BITSLICE[1].TX_CE_ODELAY
CELL[1].IMUX_BYP_DELAY[11]BITSLICE[1].RX_LD
CELL[1].IMUX_BYP_DELAY[12]BITSLICE[1].RX_INC
CELL[1].IMUX_BYP_DELAY[13]BITSLICE[1].RX_EN_VTC
CELL[1].IMUX_BYP_DELAY[14]BITSLICE[1].RX_CE_IDELAY
CELL[1].IMUX_BYP_DELAY[15]BITSLICE[1].DYN_DCI_OUT_INT
CELL[1].IMUX_IMUX_DELAY[6]BITSLICE[0].TX_D1
CELL[1].IMUX_IMUX_DELAY[7]BITSLICE[0].TX_CNTVALUEIN0
CELL[1].IMUX_IMUX_DELAY[8]BITSLICE[0].TX_CNTVALUEIN1
CELL[1].IMUX_IMUX_DELAY[9]BITSLICE[0].TX_CNTVALUEIN2
CELL[1].IMUX_IMUX_DELAY[10]BITSLICE[0].TX_CNTVALUEIN3
CELL[1].IMUX_IMUX_DELAY[11]BITSLICE[0].TX_CNTVALUEIN4
CELL[1].IMUX_IMUX_DELAY[12]BITSLICE[0].TX_CNTVALUEIN5
CELL[1].IMUX_IMUX_DELAY[13]BITSLICE[0].TX_CNTVALUEIN6
CELL[1].IMUX_IMUX_DELAY[14]BITSLICE[0].TX_CNTVALUEIN7
CELL[1].IMUX_IMUX_DELAY[15]BITSLICE[0].TX_CNTVALUEIN8
CELL[1].IMUX_IMUX_DELAY[16]BITSLICE[0].TX_D0
CELL[2].OUT_BEL[4]BITSLICE[2].PHY2CLB_FIFO_EMPTY
CELL[2].OUT_BEL[5]BITSLICE[2].RX_Q0
CELL[2].OUT_BEL[6]BITSLICE[2].TX_CNTVALUEOUT0
CELL[2].OUT_BEL[7]BITSLICE[2].TX_CNTVALUEOUT1
CELL[2].OUT_BEL[8]BITSLICE[2].TX_CNTVALUEOUT2
CELL[2].OUT_BEL[9]BITSLICE[2].TX_CNTVALUEOUT3
CELL[2].OUT_BEL[10]BITSLICE[2].RX_Q1
CELL[2].OUT_BEL[11]BITSLICE[2].RX_Q2
CELL[2].OUT_BEL[12]BITSLICE[2].TX_CNTVALUEOUT4
CELL[2].OUT_BEL[13]BITSLICE[2].TX_CNTVALUEOUT5
CELL[2].OUT_BEL[14]BITSLICE[2].TX_CNTVALUEOUT6
CELL[2].OUT_BEL[15]BITSLICE[2].TX_CNTVALUEOUT7
CELL[2].OUT_BEL[16]BITSLICE[2].RX_Q3
CELL[2].OUT_BEL[17]BITSLICE[2].RX_Q4
CELL[2].OUT_BEL[18]BITSLICE[2].TX_CNTVALUEOUT8
CELL[2].OUT_BEL[19]BITSLICE[2].TX_T_OUT
CELL[2].OUT_BEL[20]BITSLICE[2].RX_CNTVALUEOUT0
CELL[2].OUT_BEL[21]BITSLICE[2].RX_CNTVALUEOUT1
CELL[2].OUT_BEL[22]BITSLICE[2].RX_Q5
CELL[2].OUT_BEL[23]BITSLICE[2].RX_Q6
CELL[2].OUT_BEL[24]BITSLICE[2].RX_CNTVALUEOUT2
CELL[2].OUT_BEL[25]BITSLICE[2].RX_CNTVALUEOUT3
CELL[2].OUT_BEL[26]BITSLICE[2].RX_CNTVALUEOUT4
CELL[2].OUT_BEL[27]BITSLICE[2].RX_CNTVALUEOUT5
CELL[2].OUT_BEL[28]BITSLICE[2].RX_Q7
CELL[2].OUT_BEL[29]BITSLICE[2].RX_CNTVALUEOUT6
CELL[2].OUT_BEL[30]BITSLICE[2].RX_CNTVALUEOUT7
CELL[2].OUT_BEL[31]BITSLICE[2].RX_CNTVALUEOUT8
CELL[2].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].TXBIT_RST2
CELL[2].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].RXBIT_RST2
CELL[2].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK1
CELL[2].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST2
CELL[2].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST2
CELL[2].IMUX_BYP_DELAY[6]BITSLICE[2].TX_LD
CELL[2].IMUX_BYP_DELAY[7]BITSLICE[2].TX_INC
CELL[2].IMUX_BYP_DELAY[8]BITSLICE[2].TX_EN_VTC
CELL[2].IMUX_BYP_DELAY[9]BITSLICE[2].TX_CE_ODELAY
CELL[2].IMUX_BYP_DELAY[10]BITSLICE[2].RX_LD
CELL[2].IMUX_BYP_DELAY[11]BITSLICE[2].RX_INC
CELL[2].IMUX_BYP_DELAY[12]BITSLICE[2].RX_EN_VTC
CELL[2].IMUX_BYP_DELAY[13]BITSLICE[2].RX_CE_IDELAY
CELL[2].IMUX_BYP_DELAY[14]BITSLICE[2].DYN_DCI_OUT_INT
CELL[2].IMUX_BYP_DELAY[15]BITSLICE_T[0].CE_OFD
CELL[2].IMUX_IMUX_DELAY[6]BITSLICE[1].RX_CE_IFD
CELL[2].IMUX_IMUX_DELAY[7]BITSLICE[1].CLB2PHY_FIFO_RDEN
CELL[2].IMUX_IMUX_DELAY[8]BITSLICE[1].TX_D5
CELL[2].IMUX_IMUX_DELAY[9]BITSLICE[1].TX_CNTVALUEIN3
CELL[2].IMUX_IMUX_DELAY[10]BITSLICE[1].TX_CNTVALUEIN7
CELL[2].IMUX_IMUX_DELAY[11]BITSLICE[1].RX_CNTVALUEIN0
CELL[2].IMUX_IMUX_DELAY[12]BITSLICE[1].RX_CNTVALUEIN2
CELL[2].IMUX_IMUX_DELAY[13]BITSLICE[1].RX_CNTVALUEIN4
CELL[2].IMUX_IMUX_DELAY[14]BITSLICE[1].RX_CNTVALUEIN8
CELL[2].IMUX_IMUX_DELAY[15]BITSLICE[2].TX_CE_OFD
CELL[2].IMUX_IMUX_DELAY[16]BITSLICE[1].TX_D0
CELL[2].IMUX_IMUX_DELAY[17]BITSLICE[1].TX_D1
CELL[2].IMUX_IMUX_DELAY[18]BITSLICE[0].RX_CNTVALUEIN0
CELL[2].IMUX_IMUX_DELAY[19]BITSLICE[0].RX_CNTVALUEIN1
CELL[2].IMUX_IMUX_DELAY[20]BITSLICE[0].RX_CNTVALUEIN2
CELL[2].IMUX_IMUX_DELAY[21]BITSLICE[0].RX_CNTVALUEIN3
CELL[2].IMUX_IMUX_DELAY[22]BITSLICE[0].RX_CNTVALUEIN4
CELL[2].IMUX_IMUX_DELAY[23]BITSLICE[0].RX_CNTVALUEIN5
CELL[2].IMUX_IMUX_DELAY[24]BITSLICE[0].RX_CNTVALUEIN6
CELL[2].IMUX_IMUX_DELAY[25]BITSLICE[0].RX_CNTVALUEIN7
CELL[2].IMUX_IMUX_DELAY[26]BITSLICE[1].TX_D2
CELL[2].IMUX_IMUX_DELAY[27]BITSLICE[1].TX_D3
CELL[2].IMUX_IMUX_DELAY[28]BITSLICE[0].RX_CNTVALUEIN8
CELL[2].IMUX_IMUX_DELAY[29]BITSLICE[1].TX_T
CELL[2].IMUX_IMUX_DELAY[30]BITSLICE[1].TX_CE_OFD
CELL[2].IMUX_IMUX_DELAY[31]BITSLICE[1].RX_DATAIN1
CELL[2].IMUX_IMUX_DELAY[32]BITSLICE[1].TX_CNTVALUEIN0
CELL[2].IMUX_IMUX_DELAY[33]BITSLICE[1].TX_CNTVALUEIN1
CELL[2].IMUX_IMUX_DELAY[34]BITSLICE[1].TX_D4
CELL[2].IMUX_IMUX_DELAY[35]BITSLICE[1].TX_CNTVALUEIN2
CELL[2].IMUX_IMUX_DELAY[36]BITSLICE[1].TX_CNTVALUEIN4
CELL[2].IMUX_IMUX_DELAY[37]BITSLICE[1].TX_CNTVALUEIN5
CELL[2].IMUX_IMUX_DELAY[38]BITSLICE[1].TX_CNTVALUEIN6
CELL[2].IMUX_IMUX_DELAY[39]BITSLICE[1].TX_CNTVALUEIN8
CELL[2].IMUX_IMUX_DELAY[40]BITSLICE[1].TX_D6
CELL[2].IMUX_IMUX_DELAY[41]BITSLICE[1].TX_D7
CELL[2].IMUX_IMUX_DELAY[42]BITSLICE[1].RX_CNTVALUEIN1
CELL[2].IMUX_IMUX_DELAY[43]BITSLICE[1].RX_CNTVALUEIN3
CELL[2].IMUX_IMUX_DELAY[44]BITSLICE[1].RX_CNTVALUEIN5
CELL[2].IMUX_IMUX_DELAY[45]BITSLICE[1].RX_CNTVALUEIN6
CELL[2].IMUX_IMUX_DELAY[46]BITSLICE[1].RX_CNTVALUEIN7
CELL[2].IMUX_IMUX_DELAY[47]BITSLICE[2].TX_T
CELL[3].OUT_BEL[4]BITSLICE[3].PHY2CLB_FIFO_EMPTY
CELL[3].OUT_BEL[5]BITSLICE[3].RX_Q0
CELL[3].OUT_BEL[6]BITSLICE_T[0].CNTVALUEOUT0
CELL[3].OUT_BEL[7]BITSLICE_T[0].CNTVALUEOUT1
CELL[3].OUT_BEL[8]BITSLICE_T[0].CNTVALUEOUT2
CELL[3].OUT_BEL[9]BITSLICE_T[0].CNTVALUEOUT3
CELL[3].OUT_BEL[10]BITSLICE[3].RX_Q1
CELL[3].OUT_BEL[11]BITSLICE[3].RX_Q2
CELL[3].OUT_BEL[12]BITSLICE_T[0].CNTVALUEOUT4
CELL[3].OUT_BEL[13]BITSLICE_T[0].CNTVALUEOUT5
CELL[3].OUT_BEL[14]BITSLICE_T[0].CNTVALUEOUT6
CELL[3].OUT_BEL[15]BITSLICE_T[0].CNTVALUEOUT7
CELL[3].OUT_BEL[16]BITSLICE[3].RX_Q3
CELL[3].OUT_BEL[17]BITSLICE[3].RX_Q4
CELL[3].OUT_BEL[18]BITSLICE_T[0].CNTVALUEOUT8
CELL[3].OUT_BEL[19]BITSLICE[3].TX_T_OUT
CELL[3].OUT_BEL[20]BITSLICE_CONTROL[0].PHY2CLB_PHY_RDY
CELL[3].OUT_BEL[21]BITSLICE_CONTROL[0].MASTER_PD_OUT
CELL[3].OUT_BEL[22]BITSLICE_CONTROL[0].PHY2CLB_FIXDLY_RDY
CELL[3].OUT_BEL[23]BITSLICE_CONTROL[0].CTRL_DLY_TEST_OUT
CELL[3].OUT_BEL[24]BITSLICE[3].TX_CNTVALUEOUT0
CELL[3].OUT_BEL[25]BITSLICE[3].RX_Q5
CELL[3].OUT_BEL[26]BITSLICE[3].RX_Q6
CELL[3].OUT_BEL[27]BITSLICE[3].TX_CNTVALUEOUT1
CELL[3].OUT_BEL[28]BITSLICE[3].TX_CNTVALUEOUT2
CELL[3].OUT_BEL[29]BITSLICE[3].TX_CNTVALUEOUT3
CELL[3].OUT_BEL[30]BITSLICE[3].TX_CNTVALUEOUT4
CELL[3].OUT_BEL[31]BITSLICE[3].RX_Q7
CELL[3].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TRISTATE_ODELAY_RST0
CELL[3].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK2
CELL[3].IMUX_CTRL[5]BITSLICE_CONTROL[0].REFCLK
CELL[3].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].CTRL_RST_LOW
CELL[3].IMUX_CTRL[7]BITSLICE_CONTROL[0].RIU_CLK, XIPHY_FEEDTHROUGH[0].CLB2PHY_CTRL_CLK_LOW
CELL[3].IMUX_BYP_DELAY[6]BITSLICE_T[0].LD
CELL[3].IMUX_BYP_DELAY[7]BITSLICE_T[0].INC
CELL[3].IMUX_BYP_DELAY[8]BITSLICE_T[0].CE_ODELAY
CELL[3].IMUX_BYP_DELAY[9]BITSLICE_CONTROL[0].EN_VTC
CELL[3].IMUX_BYP_DELAY[10]BITSLICE_CONTROL[0].CTRL_DLY_TEST_IN
CELL[3].IMUX_BYP_DELAY[12]BITSLICE[3].TX_LD
CELL[3].IMUX_BYP_DELAY[13]BITSLICE[3].TX_INC
CELL[3].IMUX_BYP_DELAY[14]BITSLICE[3].TX_EN_VTC
CELL[3].IMUX_BYP_DELAY[15]BITSLICE[3].TX_CE_ODELAY
CELL[3].IMUX_IMUX_DELAY[6]BITSLICE[2].RX_CNTVALUEIN0
CELL[3].IMUX_IMUX_DELAY[7]BITSLICE[2].RX_CNTVALUEIN2
CELL[3].IMUX_IMUX_DELAY[8]BITSLICE[2].RX_CNTVALUEIN4
CELL[3].IMUX_IMUX_DELAY[9]BITSLICE[2].RX_CNTVALUEIN6
CELL[3].IMUX_IMUX_DELAY[10]BITSLICE_T[0].CNTVALUEIN1
CELL[3].IMUX_IMUX_DELAY[11]BITSLICE[2].TX_D5
CELL[3].IMUX_IMUX_DELAY[12]BITSLICE_T[0].CNTVALUEIN5
CELL[3].IMUX_IMUX_DELAY[13]BITSLICE_T[0].CNTVALUEIN7
CELL[3].IMUX_IMUX_DELAY[14]BITSLICE_CONTROL[0].CLB2RIU_NIBBLE_SEL
CELL[3].IMUX_IMUX_DELAY[15]BITSLICE_CONTROL[0].CLB2PHY_WRCS1_1
CELL[3].IMUX_IMUX_DELAY[16]BITSLICE[2].RX_CE_IFD
CELL[3].IMUX_IMUX_DELAY[17]BITSLICE[2].RX_DATAIN1
CELL[3].IMUX_IMUX_DELAY[18]BITSLICE[2].CLB2PHY_FIFO_RDEN
CELL[3].IMUX_IMUX_DELAY[20]BITSLICE[2].TX_CNTVALUEIN0
CELL[3].IMUX_IMUX_DELAY[21]BITSLICE[2].TX_CNTVALUEIN1
CELL[3].IMUX_IMUX_DELAY[22]BITSLICE[2].TX_CNTVALUEIN2
CELL[3].IMUX_IMUX_DELAY[23]BITSLICE[2].TX_CNTVALUEIN3
CELL[3].IMUX_IMUX_DELAY[24]BITSLICE[2].TX_D0
CELL[3].IMUX_IMUX_DELAY[25]BITSLICE[2].TX_D1
CELL[3].IMUX_IMUX_DELAY[26]BITSLICE[2].TX_CNTVALUEIN4
CELL[3].IMUX_IMUX_DELAY[27]BITSLICE[2].TX_CNTVALUEIN5
CELL[3].IMUX_IMUX_DELAY[28]BITSLICE[2].TX_CNTVALUEIN6
CELL[3].IMUX_IMUX_DELAY[29]BITSLICE[2].TX_CNTVALUEIN7
CELL[3].IMUX_IMUX_DELAY[30]BITSLICE[2].TX_CNTVALUEIN8
CELL[3].IMUX_IMUX_DELAY[31]BITSLICE[2].RX_CNTVALUEIN1
CELL[3].IMUX_IMUX_DELAY[32]BITSLICE[2].TX_D2
CELL[3].IMUX_IMUX_DELAY[33]BITSLICE[2].TX_D3
CELL[3].IMUX_IMUX_DELAY[34]BITSLICE[2].RX_CNTVALUEIN3
CELL[3].IMUX_IMUX_DELAY[35]BITSLICE[2].RX_CNTVALUEIN5
CELL[3].IMUX_IMUX_DELAY[36]BITSLICE[2].RX_CNTVALUEIN7
CELL[3].IMUX_IMUX_DELAY[37]BITSLICE[2].RX_CNTVALUEIN8
CELL[3].IMUX_IMUX_DELAY[38]BITSLICE_T[0].CNTVALUEIN0
CELL[3].IMUX_IMUX_DELAY[39]BITSLICE[2].TX_D4
CELL[3].IMUX_IMUX_DELAY[40]BITSLICE_T[0].CNTVALUEIN2
CELL[3].IMUX_IMUX_DELAY[41]BITSLICE_T[0].CNTVALUEIN3
CELL[3].IMUX_IMUX_DELAY[42]BITSLICE_T[0].CNTVALUEIN4
CELL[3].IMUX_IMUX_DELAY[43]BITSLICE_T[0].CNTVALUEIN6
CELL[3].IMUX_IMUX_DELAY[44]BITSLICE_T[0].CNTVALUEIN8
CELL[3].IMUX_IMUX_DELAY[45]BITSLICE[2].TX_D6
CELL[3].IMUX_IMUX_DELAY[46]BITSLICE[2].TX_D7
CELL[3].IMUX_IMUX_DELAY[47]BITSLICE_CONTROL[0].CLB2PHY_WRCS1_0
CELL[4].OUT_BEL[4]BITSLICE[4].PHY2CLB_FIFO_EMPTY
CELL[4].OUT_BEL[5]BITSLICE[4].RX_Q0
CELL[4].OUT_BEL[6]BITSLICE[3].TX_CNTVALUEOUT5
CELL[4].OUT_BEL[7]BITSLICE[3].TX_CNTVALUEOUT6
CELL[4].OUT_BEL[8]BITSLICE[3].TX_CNTVALUEOUT7
CELL[4].OUT_BEL[9]BITSLICE[3].TX_CNTVALUEOUT8
CELL[4].OUT_BEL[10]BITSLICE[4].RX_Q1
CELL[4].OUT_BEL[11]BITSLICE[4].RX_Q2
CELL[4].OUT_BEL[12]BITSLICE[4].TX_T_OUT
CELL[4].OUT_BEL[13]BITSLICE[3].RX_CNTVALUEOUT0
CELL[4].OUT_BEL[14]BITSLICE[3].RX_CNTVALUEOUT1
CELL[4].OUT_BEL[15]BITSLICE[3].RX_CNTVALUEOUT2
CELL[4].OUT_BEL[16]BITSLICE[3].RX_CNTVALUEOUT3
CELL[4].OUT_BEL[17]BITSLICE[4].RX_Q3
CELL[4].OUT_BEL[18]BITSLICE[4].RX_Q4
CELL[4].OUT_BEL[19]BITSLICE[3].RX_CNTVALUEOUT4
CELL[4].OUT_BEL[20]BITSLICE[3].RX_CNTVALUEOUT5
CELL[4].OUT_BEL[21]BITSLICE[3].RX_CNTVALUEOUT6
CELL[4].OUT_BEL[22]BITSLICE[3].RX_CNTVALUEOUT7
CELL[4].OUT_BEL[23]BITSLICE[4].RX_Q5
CELL[4].OUT_BEL[24]BITSLICE[4].RX_Q6
CELL[4].OUT_BEL[25]BITSLICE[3].RX_CNTVALUEOUT8
CELL[4].OUT_BEL[26]BITSLICE[4].TX_CNTVALUEOUT0
CELL[4].OUT_BEL[27]BITSLICE[4].TX_CNTVALUEOUT1
CELL[4].OUT_BEL[28]BITSLICE[4].TX_CNTVALUEOUT2
CELL[4].OUT_BEL[29]BITSLICE[4].RX_Q7
CELL[4].OUT_BEL[30]BITSLICE[4].TX_CNTVALUEOUT3
CELL[4].OUT_BEL[31]BITSLICE[4].TX_CNTVALUEOUT4
CELL[4].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_RST3
CELL[4].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].RXBIT_RST3
CELL[4].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK3
CELL[4].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST3
CELL[4].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST3
CELL[4].IMUX_BYP_DELAY[6]BITSLICE[3].RX_LD
CELL[4].IMUX_BYP_DELAY[7]BITSLICE[3].RX_INC
CELL[4].IMUX_BYP_DELAY[8]BITSLICE[3].RX_EN_VTC
CELL[4].IMUX_BYP_DELAY[9]BITSLICE[3].RX_CE_IDELAY
CELL[4].IMUX_BYP_DELAY[10]BITSLICE[3].DYN_DCI_OUT_INT
CELL[4].IMUX_BYP_DELAY[11]BITSLICE[4].TX_LD
CELL[4].IMUX_BYP_DELAY[12]BITSLICE[4].TX_INC
CELL[4].IMUX_BYP_DELAY[13]BITSLICE[4].TX_EN_VTC
CELL[4].IMUX_BYP_DELAY[14]BITSLICE[4].TX_CE_ODELAY
CELL[4].IMUX_BYP_DELAY[15]BITSLICE[4].RX_LD
CELL[4].IMUX_IMUX_DELAY[6]BITSLICE_CONTROL[0].CLB2PHY_RDCS1_1
CELL[4].IMUX_IMUX_DELAY[7]BITSLICE_CONTROL[0].CLB2PHY_RDCS1_3
CELL[4].IMUX_IMUX_DELAY[8]BITSLICE_CONTROL[0].CLB2PHY_RDCS0_3
CELL[4].IMUX_IMUX_DELAY[9]BITSLICE[3].TX_CE_OFD
CELL[4].IMUX_IMUX_DELAY[10]BITSLICE[3].TX_D0
CELL[4].IMUX_IMUX_DELAY[11]BITSLICE[3].TX_CNTVALUEIN0
CELL[4].IMUX_IMUX_DELAY[12]BITSLICE[3].TX_CNTVALUEIN2
CELL[4].IMUX_IMUX_DELAY[13]BITSLICE[3].TX_D4
CELL[4].IMUX_IMUX_DELAY[14]BITSLICE[3].TX_D6
CELL[4].IMUX_IMUX_DELAY[15]BITSLICE[3].TX_CNTVALUEIN5
CELL[4].IMUX_IMUX_DELAY[16]BITSLICE_CONTROL[0].CLB2PHY_WRCS1_2
CELL[4].IMUX_IMUX_DELAY[17]BITSLICE_CONTROL[0].CLB2PHY_WRCS1_3
CELL[4].IMUX_IMUX_DELAY[18]BITSLICE_CONTROL[0].CLB2PHY_WRCS0_0
CELL[4].IMUX_IMUX_DELAY[19]BITSLICE_CONTROL[0].CLB2PHY_WRCS0_1
CELL[4].IMUX_IMUX_DELAY[20]BITSLICE_CONTROL[0].CLB2PHY_WRCS0_2
CELL[4].IMUX_IMUX_DELAY[21]BITSLICE_CONTROL[0].CLB2PHY_WRCS0_3
CELL[4].IMUX_IMUX_DELAY[22]BITSLICE_CONTROL[0].CLB2PHY_T_B0
CELL[4].IMUX_IMUX_DELAY[23]BITSLICE_CONTROL[0].CLB2PHY_T_B1
CELL[4].IMUX_IMUX_DELAY[24]BITSLICE_CONTROL[0].CLB2PHY_T_B2
CELL[4].IMUX_IMUX_DELAY[25]BITSLICE_CONTROL[0].CLB2PHY_T_B3
CELL[4].IMUX_IMUX_DELAY[26]BITSLICE_CONTROL[0].CLB2PHY_RDEN0
CELL[4].IMUX_IMUX_DELAY[27]BITSLICE_CONTROL[0].CLB2PHY_RDEN1
CELL[4].IMUX_IMUX_DELAY[28]BITSLICE_CONTROL[0].CLB2PHY_RDEN2
CELL[4].IMUX_IMUX_DELAY[29]BITSLICE_CONTROL[0].CLB2PHY_RDEN3
CELL[4].IMUX_IMUX_DELAY[30]BITSLICE_CONTROL[0].CLB2PHY_RDCS1_0
CELL[4].IMUX_IMUX_DELAY[31]BITSLICE_CONTROL[0].CLB2PHY_RDCS1_2
CELL[4].IMUX_IMUX_DELAY[32]BITSLICE_CONTROL[0].CLB2PHY_RDCS0_0
CELL[4].IMUX_IMUX_DELAY[33]BITSLICE_CONTROL[0].CLB2PHY_RDCS0_1
CELL[4].IMUX_IMUX_DELAY[34]BITSLICE_CONTROL[0].CLB2PHY_RDCS0_2
CELL[4].IMUX_IMUX_DELAY[35]BITSLICE[3].TX_T
CELL[4].IMUX_IMUX_DELAY[36]BITSLICE[3].RX_CE_IFD
CELL[4].IMUX_IMUX_DELAY[37]BITSLICE[3].RX_DATAIN1
CELL[4].IMUX_IMUX_DELAY[38]BITSLICE[3].CLB2PHY_FIFO_RDEN
CELL[4].IMUX_IMUX_DELAY[39]BITSLICE[3].TX_D1
CELL[4].IMUX_IMUX_DELAY[40]BITSLICE[3].TX_CNTVALUEIN1
CELL[4].IMUX_IMUX_DELAY[41]BITSLICE[3].TX_D2
CELL[4].IMUX_IMUX_DELAY[42]BITSLICE[3].TX_D3
CELL[4].IMUX_IMUX_DELAY[44]BITSLICE[3].TX_D5
CELL[4].IMUX_IMUX_DELAY[45]BITSLICE[3].TX_CNTVALUEIN3
CELL[4].IMUX_IMUX_DELAY[46]BITSLICE[3].TX_CNTVALUEIN4
CELL[4].IMUX_IMUX_DELAY[47]BITSLICE[3].TX_D7
CELL[5].OUT_BEL[4]BITSLICE[5].PHY2CLB_FIFO_EMPTY
CELL[5].OUT_BEL[5]BITSLICE[5].RX_Q0
CELL[5].OUT_BEL[6]BITSLICE[4].TX_CNTVALUEOUT5
CELL[5].OUT_BEL[7]BITSLICE[4].TX_CNTVALUEOUT6
CELL[5].OUT_BEL[8]BITSLICE[4].TX_CNTVALUEOUT7
CELL[5].OUT_BEL[9]BITSLICE[4].TX_CNTVALUEOUT8
CELL[5].OUT_BEL[10]BITSLICE[5].RX_Q1
CELL[5].OUT_BEL[11]BITSLICE[5].RX_Q2
CELL[5].OUT_BEL[12]BITSLICE[5].TX_T_OUT
CELL[5].OUT_BEL[13]BITSLICE[4].RX_CNTVALUEOUT0
CELL[5].OUT_BEL[14]BITSLICE[4].RX_CNTVALUEOUT1
CELL[5].OUT_BEL[15]BITSLICE[4].RX_CNTVALUEOUT2
CELL[5].OUT_BEL[16]BITSLICE[5].RX_Q3
CELL[5].OUT_BEL[17]BITSLICE[5].RX_Q4
CELL[5].OUT_BEL[18]BITSLICE[4].RX_CNTVALUEOUT3
CELL[5].OUT_BEL[19]BITSLICE[4].RX_CNTVALUEOUT4
CELL[5].OUT_BEL[20]BITSLICE[4].RX_CNTVALUEOUT5
CELL[5].OUT_BEL[21]BITSLICE[4].RX_CNTVALUEOUT6
CELL[5].OUT_BEL[22]BITSLICE[5].RX_Q5
CELL[5].OUT_BEL[23]BITSLICE[5].RX_Q6
CELL[5].OUT_BEL[24]BITSLICE[4].RX_CNTVALUEOUT7
CELL[5].OUT_BEL[25]BITSLICE[4].RX_CNTVALUEOUT8
CELL[5].OUT_BEL[26]BITSLICE[5].TX_CNTVALUEOUT0
CELL[5].OUT_BEL[27]BITSLICE[5].TX_CNTVALUEOUT1
CELL[5].OUT_BEL[28]BITSLICE[5].RX_Q7
CELL[5].OUT_BEL[29]BITSLICE[5].TX_CNTVALUEOUT2
CELL[5].OUT_BEL[30]BITSLICE[5].TX_CNTVALUEOUT3
CELL[5].OUT_BEL[31]BITSLICE[5].TX_CNTVALUEOUT4
CELL[5].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_RST4
CELL[5].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].RXBIT_RST4
CELL[5].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK4
CELL[5].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST4
CELL[5].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST4
CELL[5].IMUX_BYP_DELAY[6]BITSLICE[4].RX_INC
CELL[5].IMUX_BYP_DELAY[7]BITSLICE[4].RX_EN_VTC
CELL[5].IMUX_BYP_DELAY[8]BITSLICE[4].RX_CE_IDELAY
CELL[5].IMUX_BYP_DELAY[9]BITSLICE[4].DYN_DCI_OUT_INT
CELL[5].IMUX_BYP_DELAY[10]BITSLICE[5].TX_LD
CELL[5].IMUX_BYP_DELAY[11]BITSLICE[5].TX_INC
CELL[5].IMUX_BYP_DELAY[12]BITSLICE[5].TX_EN_VTC
CELL[5].IMUX_BYP_DELAY[13]BITSLICE[5].TX_CE_ODELAY
CELL[5].IMUX_BYP_DELAY[14]BITSLICE[5].RX_LD
CELL[5].IMUX_BYP_DELAY[15]BITSLICE[5].RX_INC
CELL[5].IMUX_IMUX_DELAY[6]BITSLICE[4].TX_CE_OFD
CELL[5].IMUX_IMUX_DELAY[7]BITSLICE[4].RX_DATAIN1
CELL[5].IMUX_IMUX_DELAY[8]BITSLICE[4].TX_CNTVALUEIN0
CELL[5].IMUX_IMUX_DELAY[9]BITSLICE[4].TX_CNTVALUEIN2
CELL[5].IMUX_IMUX_DELAY[10]BITSLICE[4].TX_CNTVALUEIN6
CELL[5].IMUX_IMUX_DELAY[11]BITSLICE[4].TX_D4
CELL[5].IMUX_IMUX_DELAY[12]BITSLICE[4].RX_CNTVALUEIN1
CELL[5].IMUX_IMUX_DELAY[13]BITSLICE[4].RX_CNTVALUEIN3
CELL[5].IMUX_IMUX_DELAY[14]BITSLICE[4].TX_D7
CELL[5].IMUX_IMUX_DELAY[15]BITSLICE[4].RX_CNTVALUEIN7
CELL[5].IMUX_IMUX_DELAY[16]BITSLICE[3].TX_CNTVALUEIN6
CELL[5].IMUX_IMUX_DELAY[17]BITSLICE[3].TX_CNTVALUEIN7
CELL[5].IMUX_IMUX_DELAY[18]BITSLICE[3].TX_CNTVALUEIN8
CELL[5].IMUX_IMUX_DELAY[19]BITSLICE[3].RX_CNTVALUEIN0
CELL[5].IMUX_IMUX_DELAY[20]BITSLICE[3].RX_CNTVALUEIN1
CELL[5].IMUX_IMUX_DELAY[21]BITSLICE[3].RX_CNTVALUEIN2
CELL[5].IMUX_IMUX_DELAY[22]BITSLICE[3].RX_CNTVALUEIN3
CELL[5].IMUX_IMUX_DELAY[23]BITSLICE[3].RX_CNTVALUEIN4
CELL[5].IMUX_IMUX_DELAY[24]BITSLICE[4].TX_D0
CELL[5].IMUX_IMUX_DELAY[25]BITSLICE[4].TX_D1
CELL[5].IMUX_IMUX_DELAY[26]BITSLICE[3].RX_CNTVALUEIN5
CELL[5].IMUX_IMUX_DELAY[27]BITSLICE[3].RX_CNTVALUEIN6
CELL[5].IMUX_IMUX_DELAY[28]BITSLICE[3].RX_CNTVALUEIN7
CELL[5].IMUX_IMUX_DELAY[29]BITSLICE[3].RX_CNTVALUEIN8
CELL[5].IMUX_IMUX_DELAY[30]BITSLICE[4].TX_T
CELL[5].IMUX_IMUX_DELAY[31]BITSLICE[4].RX_CE_IFD
CELL[5].IMUX_IMUX_DELAY[32]BITSLICE[4].CLB2PHY_FIFO_RDEN
CELL[5].IMUX_IMUX_DELAY[33]BITSLICE[4].TX_D2
CELL[5].IMUX_IMUX_DELAY[34]BITSLICE[4].TX_D3
CELL[5].IMUX_IMUX_DELAY[35]BITSLICE[4].TX_CNTVALUEIN1
CELL[5].IMUX_IMUX_DELAY[36]BITSLICE[4].TX_CNTVALUEIN3
CELL[5].IMUX_IMUX_DELAY[37]BITSLICE[4].TX_CNTVALUEIN4
CELL[5].IMUX_IMUX_DELAY[38]BITSLICE[4].TX_CNTVALUEIN5
CELL[5].IMUX_IMUX_DELAY[39]BITSLICE[4].TX_CNTVALUEIN7
CELL[5].IMUX_IMUX_DELAY[40]BITSLICE[4].TX_D5
CELL[5].IMUX_IMUX_DELAY[41]BITSLICE[4].TX_CNTVALUEIN8
CELL[5].IMUX_IMUX_DELAY[42]BITSLICE[4].RX_CNTVALUEIN0
CELL[5].IMUX_IMUX_DELAY[43]BITSLICE[4].RX_CNTVALUEIN2
CELL[5].IMUX_IMUX_DELAY[44]BITSLICE[4].RX_CNTVALUEIN4
CELL[5].IMUX_IMUX_DELAY[45]BITSLICE[4].RX_CNTVALUEIN5
CELL[5].IMUX_IMUX_DELAY[46]BITSLICE[4].TX_D6
CELL[5].IMUX_IMUX_DELAY[47]BITSLICE[4].RX_CNTVALUEIN6
CELL[6].OUT_BEL[4]RIU_OR[0].RIU_RD_DATA0
CELL[6].OUT_BEL[5]RIU_OR[0].RIU_RD_DATA1
CELL[6].OUT_BEL[6]BITSLICE[5].TX_CNTVALUEOUT5
CELL[6].OUT_BEL[7]BITSLICE[5].TX_CNTVALUEOUT6
CELL[6].OUT_BEL[8]BITSLICE[5].TX_CNTVALUEOUT7
CELL[6].OUT_BEL[9]RIU_OR[0].RIU_RD_DATA2
CELL[6].OUT_BEL[10]RIU_OR[0].RIU_RD_DATA3
CELL[6].OUT_BEL[11]BITSLICE[5].TX_CNTVALUEOUT8
CELL[6].OUT_BEL[12]BITSLICE[6].TX_T_OUT
CELL[6].OUT_BEL[13]BITSLICE[5].RX_CNTVALUEOUT0
CELL[6].OUT_BEL[14]RIU_OR[0].RIU_RD_DATA4
CELL[6].OUT_BEL[15]RIU_OR[0].RIU_RD_DATA5
CELL[6].OUT_BEL[16]BITSLICE[5].RX_CNTVALUEOUT1
CELL[6].OUT_BEL[17]BITSLICE[5].RX_CNTVALUEOUT2
CELL[6].OUT_BEL[18]BITSLICE[5].RX_CNTVALUEOUT3
CELL[6].OUT_BEL[19]RIU_OR[0].RIU_RD_DATA6
CELL[6].OUT_BEL[20]RIU_OR[0].RIU_RD_DATA7
CELL[6].OUT_BEL[21]BITSLICE[5].RX_CNTVALUEOUT4
CELL[6].OUT_BEL[22]BITSLICE[5].RX_CNTVALUEOUT5
CELL[6].OUT_BEL[23]BITSLICE[5].RX_CNTVALUEOUT6
CELL[6].OUT_BEL[24]RIU_OR[0].RIU_RD_DATA8
CELL[6].OUT_BEL[25]RIU_OR[0].RIU_RD_DATA9
CELL[6].OUT_BEL[26]BITSLICE[5].RX_CNTVALUEOUT7
CELL[6].OUT_BEL[27]BITSLICE[5].RX_CNTVALUEOUT8
CELL[6].OUT_BEL[28]RIU_OR[0].RIU_RD_VALID
CELL[6].OUT_BEL[29]RIU_OR[0].RIU_RD_DATA10
CELL[6].OUT_BEL[30]RIU_OR[0].RIU_RD_DATA11
CELL[6].OUT_BEL[31]RIU_OR[0].RIU_RD_DATA12
CELL[6].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_RST5
CELL[6].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].RXBIT_RST5
CELL[6].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].ODELAY_RST5
CELL[6].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK5
CELL[6].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST5
CELL[6].IMUX_BYP_DELAY[6]BITSLICE[5].RX_EN_VTC
CELL[6].IMUX_BYP_DELAY[7]BITSLICE[5].RX_CE_IDELAY
CELL[6].IMUX_BYP_DELAY[8]BITSLICE[5].DYN_DCI_OUT_INT
CELL[6].IMUX_BYP_DELAY[9]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B0
CELL[6].IMUX_BYP_DELAY[10]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B1
CELL[6].IMUX_BYP_DELAY[11]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B2
CELL[6].IMUX_BYP_DELAY[12]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B3
CELL[6].IMUX_BYP_DELAY[13]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_RST_MASK_B
CELL[6].IMUX_BYP_DELAY[14]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_MODE_B
CELL[6].IMUX_BYP_DELAY[15]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN0
CELL[6].IMUX_IMUX_DELAY[6]BITSLICE[5].TX_CNTVALUEIN7
CELL[6].IMUX_IMUX_DELAY[7]BITSLICE[5].TX_D3
CELL[6].IMUX_IMUX_DELAY[8]BITSLICE[5].TX_D4
CELL[6].IMUX_IMUX_DELAY[10]BITSLICE[5].RX_CNTVALUEIN5
CELL[6].IMUX_IMUX_DELAY[11]BITSLICE[5].TX_D7
CELL[6].IMUX_IMUX_DELAY[12]BITSLICE_CONTROL[0].CLB2RIU_WR_EN, BITSLICE_CONTROL[1].CLB2RIU_WR_EN
CELL[6].IMUX_IMUX_DELAY[13]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA1, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA1
CELL[6].IMUX_IMUX_DELAY[14]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA5, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA5
CELL[6].IMUX_IMUX_DELAY[15]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA7, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA7
CELL[6].IMUX_IMUX_DELAY[16]BITSLICE[4].RX_CNTVALUEIN8
CELL[6].IMUX_IMUX_DELAY[17]BITSLICE[5].TX_T
CELL[6].IMUX_IMUX_DELAY[18]BITSLICE[5].TX_CE_OFD
CELL[6].IMUX_IMUX_DELAY[19]BITSLICE[5].RX_CE_IFD
CELL[6].IMUX_IMUX_DELAY[20]BITSLICE[5].RX_DATAIN1
CELL[6].IMUX_IMUX_DELAY[21]BITSLICE[5].CLB2PHY_FIFO_RDEN
CELL[6].IMUX_IMUX_DELAY[22]BITSLICE[5].TX_CNTVALUEIN0
CELL[6].IMUX_IMUX_DELAY[23]BITSLICE[5].TX_CNTVALUEIN1
CELL[6].IMUX_IMUX_DELAY[24]BITSLICE[5].TX_CNTVALUEIN2
CELL[6].IMUX_IMUX_DELAY[25]BITSLICE[5].TX_CNTVALUEIN3
CELL[6].IMUX_IMUX_DELAY[26]BITSLICE[5].TX_D0
CELL[6].IMUX_IMUX_DELAY[27]BITSLICE[5].TX_D1
CELL[6].IMUX_IMUX_DELAY[28]BITSLICE[5].TX_CNTVALUEIN4
CELL[6].IMUX_IMUX_DELAY[29]BITSLICE[5].TX_CNTVALUEIN5
CELL[6].IMUX_IMUX_DELAY[30]BITSLICE[5].TX_CNTVALUEIN6
CELL[6].IMUX_IMUX_DELAY[31]BITSLICE[5].TX_D2
CELL[6].IMUX_IMUX_DELAY[32]BITSLICE[5].TX_CNTVALUEIN8
CELL[6].IMUX_IMUX_DELAY[33]BITSLICE[5].RX_CNTVALUEIN0
CELL[6].IMUX_IMUX_DELAY[34]BITSLICE[5].RX_CNTVALUEIN1
CELL[6].IMUX_IMUX_DELAY[35]BITSLICE[5].TX_D5
CELL[6].IMUX_IMUX_DELAY[36]BITSLICE[5].RX_CNTVALUEIN2
CELL[6].IMUX_IMUX_DELAY[37]BITSLICE[5].RX_CNTVALUEIN3
CELL[6].IMUX_IMUX_DELAY[38]BITSLICE[5].RX_CNTVALUEIN4
CELL[6].IMUX_IMUX_DELAY[39]BITSLICE[5].TX_D6
CELL[6].IMUX_IMUX_DELAY[40]BITSLICE[5].RX_CNTVALUEIN6
CELL[6].IMUX_IMUX_DELAY[41]BITSLICE[5].RX_CNTVALUEIN7
CELL[6].IMUX_IMUX_DELAY[42]BITSLICE[5].RX_CNTVALUEIN8
CELL[6].IMUX_IMUX_DELAY[43]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA0, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA0
CELL[6].IMUX_IMUX_DELAY[44]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA2, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA2
CELL[6].IMUX_IMUX_DELAY[45]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA3, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA3
CELL[6].IMUX_IMUX_DELAY[46]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA4, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA4
CELL[6].IMUX_IMUX_DELAY[47]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA6, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA6
CELL[7].OUT_BEL[4]RIU_OR[0].RIU_RD_DATA13
CELL[7].OUT_BEL[5]RIU_OR[0].RIU_RD_DATA14
CELL[7].OUT_BEL[6]RIU_OR[0].RIU_RD_DATA15
CELL[7].OUT_BEL[7]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT0
CELL[7].OUT_BEL[8]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT1
CELL[7].OUT_BEL[9]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT2
CELL[7].OUT_BEL[10]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT3
CELL[7].OUT_BEL[11]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT4
CELL[7].OUT_BEL[12]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT5
CELL[7].OUT_BEL[13]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT6
CELL[7].OUT_BEL[14]XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT7
CELL[7].OUT_BEL[15]XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_OUT
CELL[7].OUT_BEL[16]XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_FLG_OUT
CELL[7].OUT_BEL[17]XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUT
CELL[7].OUT_BEL[18]BITSLICE[12].PHY2CLB_FIFO_EMPTY
CELL[7].OUT_BEL[19]BITSLICE[12].RX_Q0
CELL[7].OUT_BEL[20]BITSLICE[12].RX_Q1
CELL[7].OUT_BEL[21]BITSLICE[12].TX_CNTVALUEOUT0
CELL[7].OUT_BEL[22]BITSLICE[12].TX_CNTVALUEOUT1
CELL[7].OUT_BEL[23]BITSLICE[12].RX_Q2
CELL[7].OUT_BEL[24]BITSLICE[12].RX_Q3
CELL[7].OUT_BEL[25]BITSLICE[12].RX_Q4
CELL[7].OUT_BEL[26]BITSLICE[12].TX_CNTVALUEOUT2
CELL[7].OUT_BEL[27]BITSLICE[12].TX_CNTVALUEOUT3
CELL[7].OUT_BEL[28]BITSLICE[12].TX_CNTVALUEOUT4
CELL[7].OUT_BEL[29]BITSLICE[12].RX_Q5
CELL[7].OUT_BEL[30]BITSLICE[12].RX_Q6
CELL[7].OUT_BEL[31]BITSLICE[12].RX_Q7
CELL[7].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].RXBIT_RST12
CELL[7].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_SDR
CELL[7].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_DIV4
CELL[7].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_DIV2
CELL[7].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].TXBIT_RST12
CELL[7].IMUX_BYP_DELAY[6]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN1
CELL[7].IMUX_BYP_DELAY[7]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN2
CELL[7].IMUX_BYP_DELAY[8]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN3
CELL[7].IMUX_BYP_DELAY[10]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN4
CELL[7].IMUX_BYP_DELAY[11]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN5
CELL[7].IMUX_BYP_DELAY[12]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN6
CELL[7].IMUX_BYP_DELAY[13]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN7
CELL[7].IMUX_BYP_DELAY[14]XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_EN_B
CELL[7].IMUX_BYP_DELAY[15]BITSLICE[12].TX_LD
CELL[7].IMUX_IMUX_DELAY[6]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_DIV4_CLK_SEL_B
CELL[7].IMUX_IMUX_DELAY[7]XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CT_START_EN
CELL[7].IMUX_IMUX_DELAY[8]BITSLICE[12].TX_CE_OFD
CELL[7].IMUX_IMUX_DELAY[9]BITSLICE[12].RX_DATAIN1
CELL[7].IMUX_IMUX_DELAY[10]BITSLICE[12].TX_D0
CELL[7].IMUX_IMUX_DELAY[11]BITSLICE[12].TX_CNTVALUEIN2
CELL[7].IMUX_IMUX_DELAY[12]BITSLICE[12].TX_CNTVALUEIN4
CELL[7].IMUX_IMUX_DELAY[13]BITSLICE[12].TX_D4
CELL[7].IMUX_IMUX_DELAY[14]BITSLICE[12].TX_D6
CELL[7].IMUX_IMUX_DELAY[15]BITSLICE[12].TX_CNTVALUEIN8
CELL[7].IMUX_IMUX_DELAY[16]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA8, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA8
CELL[7].IMUX_IMUX_DELAY[17]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA9, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA9
CELL[7].IMUX_IMUX_DELAY[18]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA10, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA10
CELL[7].IMUX_IMUX_DELAY[19]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA11, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA11
CELL[7].IMUX_IMUX_DELAY[20]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA12, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA12
CELL[7].IMUX_IMUX_DELAY[21]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA13, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA13
CELL[7].IMUX_IMUX_DELAY[22]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA14, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA14
CELL[7].IMUX_IMUX_DELAY[23]BITSLICE_CONTROL[0].CLB2RIU_WR_DATA15, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA15
CELL[7].IMUX_IMUX_DELAY[24]BITSLICE_CONTROL[0].CLB2RIU_ADDR0, BITSLICE_CONTROL[1].CLB2RIU_ADDR0
CELL[7].IMUX_IMUX_DELAY[25]BITSLICE_CONTROL[0].CLB2RIU_ADDR1, BITSLICE_CONTROL[1].CLB2RIU_ADDR1
CELL[7].IMUX_IMUX_DELAY[26]BITSLICE_CONTROL[0].CLB2RIU_ADDR2, BITSLICE_CONTROL[1].CLB2RIU_ADDR2
CELL[7].IMUX_IMUX_DELAY[27]BITSLICE_CONTROL[0].CLB2RIU_ADDR3, BITSLICE_CONTROL[1].CLB2RIU_ADDR3
CELL[7].IMUX_IMUX_DELAY[28]BITSLICE_CONTROL[0].CLB2RIU_ADDR4, BITSLICE_CONTROL[1].CLB2RIU_ADDR4
CELL[7].IMUX_IMUX_DELAY[29]BITSLICE_CONTROL[0].CLB2RIU_ADDR5, BITSLICE_CONTROL[1].CLB2RIU_ADDR5
CELL[7].IMUX_IMUX_DELAY[30]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SDR_CLK_SEL_B
CELL[7].IMUX_IMUX_DELAY[31]XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_DIV2_CLK_SEL_B
CELL[7].IMUX_IMUX_DELAY[32]XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CLK_STOP_FLG_OUT
CELL[7].IMUX_IMUX_DELAY[33]XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUT
CELL[7].IMUX_IMUX_DELAY[34]BITSLICE[12].TX_T
CELL[7].IMUX_IMUX_DELAY[35]BITSLICE[12].RX_CE_IFD
CELL[7].IMUX_IMUX_DELAY[36]BITSLICE[12].CLB2PHY_FIFO_RDEN
CELL[7].IMUX_IMUX_DELAY[37]BITSLICE[12].TX_CNTVALUEIN0
CELL[7].IMUX_IMUX_DELAY[38]BITSLICE[12].TX_CNTVALUEIN1
CELL[7].IMUX_IMUX_DELAY[39]BITSLICE[12].TX_D1
CELL[7].IMUX_IMUX_DELAY[40]BITSLICE[12].TX_CNTVALUEIN3
CELL[7].IMUX_IMUX_DELAY[41]BITSLICE[12].TX_D2
CELL[7].IMUX_IMUX_DELAY[42]BITSLICE[12].TX_D3
CELL[7].IMUX_IMUX_DELAY[43]BITSLICE[12].TX_CNTVALUEIN5
CELL[7].IMUX_IMUX_DELAY[44]BITSLICE[12].TX_D5
CELL[7].IMUX_IMUX_DELAY[45]BITSLICE[12].TX_CNTVALUEIN6
CELL[7].IMUX_IMUX_DELAY[46]BITSLICE[12].TX_CNTVALUEIN7
CELL[7].IMUX_IMUX_DELAY[47]BITSLICE[12].TX_D7
CELL[8].OUT_BEL[4]BITSLICE[6].PHY2CLB_FIFO_EMPTY
CELL[8].OUT_BEL[5]BITSLICE[6].RX_Q0
CELL[8].OUT_BEL[6]BITSLICE[6].RX_Q1
CELL[8].OUT_BEL[7]BITSLICE[12].TX_CNTVALUEOUT5
CELL[8].OUT_BEL[8]BITSLICE[12].TX_CNTVALUEOUT6
CELL[8].OUT_BEL[9]BITSLICE[12].TX_CNTVALUEOUT7
CELL[8].OUT_BEL[10]BITSLICE[12].TX_CNTVALUEOUT8
CELL[8].OUT_BEL[11]BITSLICE[6].RX_Q2
CELL[8].OUT_BEL[12]BITSLICE[6].RX_Q3
CELL[8].OUT_BEL[13]BITSLICE[7].TX_T_OUT
CELL[8].OUT_BEL[14]BITSLICE[12].RX_CNTVALUEOUT0
CELL[8].OUT_BEL[15]BITSLICE[12].RX_CNTVALUEOUT1
CELL[8].OUT_BEL[16]BITSLICE[12].RX_CNTVALUEOUT2
CELL[8].OUT_BEL[17]BITSLICE[12].RX_CNTVALUEOUT3
CELL[8].OUT_BEL[18]BITSLICE[6].RX_Q4
CELL[8].OUT_BEL[19]BITSLICE[6].RX_Q5
CELL[8].OUT_BEL[20]BITSLICE[12].RX_CNTVALUEOUT4
CELL[8].OUT_BEL[21]BITSLICE[12].RX_CNTVALUEOUT5
CELL[8].OUT_BEL[22]BITSLICE[12].RX_CNTVALUEOUT6
CELL[8].OUT_BEL[23]BITSLICE[12].RX_CNTVALUEOUT7
CELL[8].OUT_BEL[24]BITSLICE[12].RX_CNTVALUEOUT8
CELL[8].OUT_BEL[25]BITSLICE[6].RX_Q6
CELL[8].OUT_BEL[26]BITSLICE[6].RX_Q7
CELL[8].OUT_BEL[27]BITSLICE[6].TX_CNTVALUEOUT0
CELL[8].OUT_BEL[28]BITSLICE[6].TX_CNTVALUEOUT1
CELL[8].OUT_BEL[29]BITSLICE[6].TX_CNTVALUEOUT2
CELL[8].OUT_BEL[30]BITSLICE[6].TX_CNTVALUEOUT3
CELL[8].OUT_BEL[31]BITSLICE[6].TX_CNTVALUEOUT4
CELL[8].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].ODELAY_RST12
CELL[8].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].IDELAY_RST12
CELL[8].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK12
CELL[8].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].TXBIT_RST6
CELL[8].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].RXBIT_RST6
CELL[8].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].ODELAY_RST6
CELL[8].IMUX_BYP_DELAY[6]BITSLICE[12].TX_INC
CELL[8].IMUX_BYP_DELAY[7]BITSLICE[12].TX_EN_VTC
CELL[8].IMUX_BYP_DELAY[8]BITSLICE[12].TX_CE_ODELAY
CELL[8].IMUX_BYP_DELAY[9]BITSLICE[12].RX_LD
CELL[8].IMUX_BYP_DELAY[10]BITSLICE[12].RX_INC
CELL[8].IMUX_BYP_DELAY[11]BITSLICE[12].RX_EN_VTC
CELL[8].IMUX_BYP_DELAY[12]BITSLICE[12].RX_CE_IDELAY
CELL[8].IMUX_BYP_DELAY[13]BITSLICE[12].DYN_DCI_OUT_INT
CELL[8].IMUX_BYP_DELAY[14]BITSLICE[6].TX_LD
CELL[8].IMUX_BYP_DELAY[15]BITSLICE[6].TX_INC
CELL[8].IMUX_IMUX_DELAY[6]BITSLICE[6].RX_CE_IFD
CELL[8].IMUX_IMUX_DELAY[7]BITSLICE[6].RX_DATAIN1
CELL[8].IMUX_IMUX_DELAY[8]BITSLICE[6].TX_D5
CELL[8].IMUX_IMUX_DELAY[9]BITSLICE[6].TX_CNTVALUEIN2
CELL[8].IMUX_IMUX_DELAY[10]BITSLICE[6].TX_CNTVALUEIN6
CELL[8].IMUX_IMUX_DELAY[11]BITSLICE[6].TX_CNTVALUEIN8
CELL[8].IMUX_IMUX_DELAY[12]BITSLICE[6].RX_CNTVALUEIN1
CELL[8].IMUX_IMUX_DELAY[13]BITSLICE[6].RX_CNTVALUEIN3
CELL[8].IMUX_IMUX_DELAY[14]BITSLICE[6].RX_CNTVALUEIN7
CELL[8].IMUX_IMUX_DELAY[15]BITSLICE[7].TX_T
CELL[8].IMUX_IMUX_DELAY[16]BITSLICE[6].TX_D0
CELL[8].IMUX_IMUX_DELAY[17]BITSLICE[6].TX_D1
CELL[8].IMUX_IMUX_DELAY[18]BITSLICE[12].RX_CNTVALUEIN0
CELL[8].IMUX_IMUX_DELAY[19]BITSLICE[12].RX_CNTVALUEIN1
CELL[8].IMUX_IMUX_DELAY[20]BITSLICE[12].RX_CNTVALUEIN2
CELL[8].IMUX_IMUX_DELAY[21]BITSLICE[12].RX_CNTVALUEIN3
CELL[8].IMUX_IMUX_DELAY[22]BITSLICE[12].RX_CNTVALUEIN4
CELL[8].IMUX_IMUX_DELAY[23]BITSLICE[12].RX_CNTVALUEIN5
CELL[8].IMUX_IMUX_DELAY[24]BITSLICE[12].RX_CNTVALUEIN6
CELL[8].IMUX_IMUX_DELAY[25]BITSLICE[12].RX_CNTVALUEIN7
CELL[8].IMUX_IMUX_DELAY[26]BITSLICE[6].TX_D2
CELL[8].IMUX_IMUX_DELAY[27]BITSLICE[6].TX_D3
CELL[8].IMUX_IMUX_DELAY[29]BITSLICE[6].TX_T
CELL[8].IMUX_IMUX_DELAY[30]BITSLICE[6].TX_CE_OFD
CELL[8].IMUX_IMUX_DELAY[31]BITSLICE[12].RX_CNTVALUEIN8
CELL[8].IMUX_IMUX_DELAY[32]BITSLICE[6].CLB2PHY_FIFO_RDEN
CELL[8].IMUX_IMUX_DELAY[33]BITSLICE[6].TX_CNTVALUEIN0
CELL[8].IMUX_IMUX_DELAY[34]BITSLICE[6].TX_D4
CELL[8].IMUX_IMUX_DELAY[35]BITSLICE[6].TX_CNTVALUEIN1
CELL[8].IMUX_IMUX_DELAY[36]BITSLICE[6].TX_CNTVALUEIN3
CELL[8].IMUX_IMUX_DELAY[37]BITSLICE[6].TX_CNTVALUEIN4
CELL[8].IMUX_IMUX_DELAY[38]BITSLICE[6].TX_CNTVALUEIN5
CELL[8].IMUX_IMUX_DELAY[39]BITSLICE[6].TX_CNTVALUEIN7
CELL[8].IMUX_IMUX_DELAY[40]BITSLICE[6].TX_D6
CELL[8].IMUX_IMUX_DELAY[41]BITSLICE[6].TX_D7
CELL[8].IMUX_IMUX_DELAY[42]BITSLICE[6].RX_CNTVALUEIN0
CELL[8].IMUX_IMUX_DELAY[43]BITSLICE[6].RX_CNTVALUEIN2
CELL[8].IMUX_IMUX_DELAY[44]BITSLICE[6].RX_CNTVALUEIN4
CELL[8].IMUX_IMUX_DELAY[45]BITSLICE[6].RX_CNTVALUEIN5
CELL[8].IMUX_IMUX_DELAY[46]BITSLICE[6].RX_CNTVALUEIN6
CELL[8].IMUX_IMUX_DELAY[47]BITSLICE[6].RX_CNTVALUEIN8
CELL[9].OUT_BEL[4]BITSLICE[7].PHY2CLB_FIFO_EMPTY
CELL[9].OUT_BEL[5]BITSLICE[7].RX_Q0
CELL[9].OUT_BEL[6]BITSLICE[7].RX_Q1
CELL[9].OUT_BEL[7]BITSLICE[6].TX_CNTVALUEOUT5
CELL[9].OUT_BEL[8]BITSLICE[6].TX_CNTVALUEOUT6
CELL[9].OUT_BEL[9]BITSLICE[6].TX_CNTVALUEOUT7
CELL[9].OUT_BEL[10]BITSLICE[6].TX_CNTVALUEOUT8
CELL[9].OUT_BEL[11]BITSLICE[7].RX_Q2
CELL[9].OUT_BEL[12]BITSLICE[7].RX_Q3
CELL[9].OUT_BEL[13]BITSLICE[8].TX_T_OUT
CELL[9].OUT_BEL[14]BITSLICE[6].RX_CNTVALUEOUT0
CELL[9].OUT_BEL[15]BITSLICE[6].RX_CNTVALUEOUT1
CELL[9].OUT_BEL[16]BITSLICE[6].RX_CNTVALUEOUT2
CELL[9].OUT_BEL[17]BITSLICE[6].RX_CNTVALUEOUT3
CELL[9].OUT_BEL[18]BITSLICE[7].RX_Q4
CELL[9].OUT_BEL[19]BITSLICE[7].RX_Q5
CELL[9].OUT_BEL[20]BITSLICE[6].RX_CNTVALUEOUT4
CELL[9].OUT_BEL[21]BITSLICE[6].RX_CNTVALUEOUT5
CELL[9].OUT_BEL[22]BITSLICE[6].RX_CNTVALUEOUT6
CELL[9].OUT_BEL[23]BITSLICE[6].RX_CNTVALUEOUT7
CELL[9].OUT_BEL[24]BITSLICE[6].RX_CNTVALUEOUT8
CELL[9].OUT_BEL[25]BITSLICE[7].RX_Q6
CELL[9].OUT_BEL[26]BITSLICE[7].RX_Q7
CELL[9].OUT_BEL[27]BITSLICE[7].TX_CNTVALUEOUT0
CELL[9].OUT_BEL[28]BITSLICE[7].TX_CNTVALUEOUT1
CELL[9].OUT_BEL[29]BITSLICE[7].TX_CNTVALUEOUT2
CELL[9].OUT_BEL[30]BITSLICE[7].TX_CNTVALUEOUT3
CELL[9].OUT_BEL[31]BITSLICE[7].TX_CNTVALUEOUT4
CELL[9].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].IDELAY_RST6
CELL[9].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK6
CELL[9].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].TXBIT_RST7
CELL[9].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].RXBIT_RST7
CELL[9].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].ODELAY_RST7
CELL[9].IMUX_BYP_DELAY[6]BITSLICE[6].TX_EN_VTC
CELL[9].IMUX_BYP_DELAY[7]BITSLICE[6].TX_CE_ODELAY
CELL[9].IMUX_BYP_DELAY[8]BITSLICE[6].RX_LD
CELL[9].IMUX_BYP_DELAY[9]BITSLICE[6].RX_INC
CELL[9].IMUX_BYP_DELAY[10]BITSLICE[6].RX_EN_VTC
CELL[9].IMUX_BYP_DELAY[11]BITSLICE[6].RX_CE_IDELAY
CELL[9].IMUX_BYP_DELAY[12]BITSLICE[6].DYN_DCI_OUT_INT
CELL[9].IMUX_BYP_DELAY[14]BITSLICE[7].TX_LD
CELL[9].IMUX_BYP_DELAY[15]BITSLICE[7].TX_INC
CELL[9].IMUX_IMUX_DELAY[6]BITSLICE[7].TX_D3
CELL[9].IMUX_IMUX_DELAY[7]BITSLICE[7].RX_CNTVALUEIN0
CELL[9].IMUX_IMUX_DELAY[8]BITSLICE[7].TX_D5
CELL[9].IMUX_IMUX_DELAY[9]BITSLICE[7].RX_CNTVALUEIN4
CELL[9].IMUX_IMUX_DELAY[10]BITSLICE[7].TX_D7
CELL[9].IMUX_IMUX_DELAY[11]BITSLICE[7].RX_CNTVALUEIN8
CELL[9].IMUX_IMUX_DELAY[12]BITSLICE[8].RX_DATAIN1
CELL[9].IMUX_IMUX_DELAY[13]BITSLICE[8].TX_D0
CELL[9].IMUX_IMUX_DELAY[14]BITSLICE[8].TX_D4
CELL[9].IMUX_IMUX_DELAY[15]BITSLICE[8].TX_D6
CELL[9].IMUX_IMUX_DELAY[16]BITSLICE[7].TX_CE_OFD
CELL[9].IMUX_IMUX_DELAY[17]BITSLICE[7].RX_CE_IFD
CELL[9].IMUX_IMUX_DELAY[18]BITSLICE[7].RX_DATAIN1
CELL[9].IMUX_IMUX_DELAY[19]BITSLICE[7].CLB2PHY_FIFO_RDEN
CELL[9].IMUX_IMUX_DELAY[20]BITSLICE[7].TX_CNTVALUEIN0
CELL[9].IMUX_IMUX_DELAY[21]BITSLICE[7].TX_CNTVALUEIN1
CELL[9].IMUX_IMUX_DELAY[22]BITSLICE[7].TX_CNTVALUEIN2
CELL[9].IMUX_IMUX_DELAY[23]BITSLICE[7].TX_CNTVALUEIN3
CELL[9].IMUX_IMUX_DELAY[24]BITSLICE[7].TX_D0
CELL[9].IMUX_IMUX_DELAY[25]BITSLICE[7].TX_D1
CELL[9].IMUX_IMUX_DELAY[26]BITSLICE[7].TX_CNTVALUEIN4
CELL[9].IMUX_IMUX_DELAY[27]BITSLICE[7].TX_CNTVALUEIN5
CELL[9].IMUX_IMUX_DELAY[28]BITSLICE[7].TX_CNTVALUEIN6
CELL[9].IMUX_IMUX_DELAY[29]BITSLICE[7].TX_CNTVALUEIN7
CELL[9].IMUX_IMUX_DELAY[30]BITSLICE[7].TX_D2
CELL[9].IMUX_IMUX_DELAY[31]BITSLICE[7].TX_CNTVALUEIN8
CELL[9].IMUX_IMUX_DELAY[32]BITSLICE[7].RX_CNTVALUEIN1
CELL[9].IMUX_IMUX_DELAY[33]BITSLICE[7].RX_CNTVALUEIN2
CELL[9].IMUX_IMUX_DELAY[34]BITSLICE[7].TX_D4
CELL[9].IMUX_IMUX_DELAY[35]BITSLICE[7].RX_CNTVALUEIN3
CELL[9].IMUX_IMUX_DELAY[36]BITSLICE[7].RX_CNTVALUEIN5
CELL[9].IMUX_IMUX_DELAY[37]BITSLICE[7].RX_CNTVALUEIN6
CELL[9].IMUX_IMUX_DELAY[38]BITSLICE[7].TX_D6
CELL[9].IMUX_IMUX_DELAY[39]BITSLICE[7].RX_CNTVALUEIN7
CELL[9].IMUX_IMUX_DELAY[40]BITSLICE[8].TX_T
CELL[9].IMUX_IMUX_DELAY[41]BITSLICE[8].TX_CE_OFD
CELL[9].IMUX_IMUX_DELAY[42]BITSLICE[8].RX_CE_IFD
CELL[9].IMUX_IMUX_DELAY[43]BITSLICE[8].CLB2PHY_FIFO_RDEN
CELL[9].IMUX_IMUX_DELAY[44]BITSLICE[8].TX_D1
CELL[9].IMUX_IMUX_DELAY[45]BITSLICE[8].TX_D2
CELL[9].IMUX_IMUX_DELAY[46]BITSLICE[8].TX_D3
CELL[9].IMUX_IMUX_DELAY[47]BITSLICE[8].TX_D5
CELL[10].OUT_BEL[4]BITSLICE[8].PHY2CLB_FIFO_EMPTY
CELL[10].OUT_BEL[5]BITSLICE[8].RX_Q0
CELL[10].OUT_BEL[6]BITSLICE[8].RX_Q1
CELL[10].OUT_BEL[7]BITSLICE[7].TX_CNTVALUEOUT5
CELL[10].OUT_BEL[8]BITSLICE[7].TX_CNTVALUEOUT6
CELL[10].OUT_BEL[9]BITSLICE[7].TX_CNTVALUEOUT7
CELL[10].OUT_BEL[10]BITSLICE[7].TX_CNTVALUEOUT8
CELL[10].OUT_BEL[11]BITSLICE[8].RX_Q2
CELL[10].OUT_BEL[12]BITSLICE[8].RX_Q3
CELL[10].OUT_BEL[13]BITSLICE[9].TX_T_OUT
CELL[10].OUT_BEL[14]BITSLICE[7].RX_CNTVALUEOUT0
CELL[10].OUT_BEL[15]BITSLICE[7].RX_CNTVALUEOUT1
CELL[10].OUT_BEL[16]BITSLICE[7].RX_CNTVALUEOUT2
CELL[10].OUT_BEL[17]BITSLICE[7].RX_CNTVALUEOUT3
CELL[10].OUT_BEL[18]BITSLICE[8].RX_Q4
CELL[10].OUT_BEL[19]BITSLICE[8].RX_Q5
CELL[10].OUT_BEL[20]BITSLICE[7].RX_CNTVALUEOUT4
CELL[10].OUT_BEL[21]BITSLICE[7].RX_CNTVALUEOUT5
CELL[10].OUT_BEL[22]BITSLICE[7].RX_CNTVALUEOUT6
CELL[10].OUT_BEL[23]BITSLICE[7].RX_CNTVALUEOUT7
CELL[10].OUT_BEL[24]BITSLICE[7].RX_CNTVALUEOUT8
CELL[10].OUT_BEL[25]BITSLICE[8].RX_Q6
CELL[10].OUT_BEL[26]BITSLICE[8].RX_Q7
CELL[10].OUT_BEL[27]BITSLICE[8].TX_CNTVALUEOUT0
CELL[10].OUT_BEL[28]BITSLICE[8].TX_CNTVALUEOUT1
CELL[10].OUT_BEL[29]BITSLICE[8].TX_CNTVALUEOUT2
CELL[10].OUT_BEL[30]BITSLICE[8].TX_CNTVALUEOUT3
CELL[10].OUT_BEL[31]BITSLICE[8].TX_CNTVALUEOUT4
CELL[10].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].IDELAY_RST7
CELL[10].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK7
CELL[10].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].TXBIT_RST8
CELL[10].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].RXBIT_RST8
CELL[10].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].ODELAY_RST8
CELL[10].IMUX_BYP_DELAY[6]BITSLICE[7].TX_EN_VTC
CELL[10].IMUX_BYP_DELAY[7]BITSLICE[7].TX_CE_ODELAY
CELL[10].IMUX_BYP_DELAY[8]BITSLICE[7].RX_LD
CELL[10].IMUX_BYP_DELAY[9]BITSLICE[7].RX_INC
CELL[10].IMUX_BYP_DELAY[10]BITSLICE[7].RX_EN_VTC
CELL[10].IMUX_BYP_DELAY[11]BITSLICE[7].RX_CE_IDELAY
CELL[10].IMUX_BYP_DELAY[12]BITSLICE[7].DYN_DCI_OUT_INT
CELL[10].IMUX_BYP_DELAY[13]BITSLICE[8].TX_LD
CELL[10].IMUX_BYP_DELAY[14]BITSLICE[8].TX_INC
CELL[10].IMUX_BYP_DELAY[15]BITSLICE[8].TX_EN_VTC
CELL[10].IMUX_IMUX_DELAY[6]BITSLICE[8].RX_CNTVALUEIN4
CELL[10].IMUX_IMUX_DELAY[7]BITSLICE[8].RX_CNTVALUEIN6
CELL[10].IMUX_IMUX_DELAY[8]BITSLICE_T[1].CNTVALUEIN1
CELL[10].IMUX_IMUX_DELAY[9]BITSLICE_T[1].CNTVALUEIN3
CELL[10].IMUX_IMUX_DELAY[10]BITSLICE_T[1].CNTVALUEIN7
CELL[10].IMUX_IMUX_DELAY[11]BITSLICE_CONTROL[1].CLB2RIU_NIBBLE_SEL
CELL[10].IMUX_IMUX_DELAY[12]BITSLICE_CONTROL[1].CLB2PHY_WRCS1_3
CELL[10].IMUX_IMUX_DELAY[13]BITSLICE_CONTROL[1].CLB2PHY_WRCS0_1
CELL[10].IMUX_IMUX_DELAY[14]BITSLICE_CONTROL[1].CLB2PHY_T_B1
CELL[10].IMUX_IMUX_DELAY[15]BITSLICE_CONTROL[1].CLB2PHY_T_B3
CELL[10].IMUX_IMUX_DELAY[16]BITSLICE[8].TX_D7
CELL[10].IMUX_IMUX_DELAY[18]BITSLICE[8].TX_CNTVALUEIN0
CELL[10].IMUX_IMUX_DELAY[19]BITSLICE[8].TX_CNTVALUEIN1
CELL[10].IMUX_IMUX_DELAY[20]BITSLICE[8].TX_CNTVALUEIN2
CELL[10].IMUX_IMUX_DELAY[21]BITSLICE[8].TX_CNTVALUEIN3
CELL[10].IMUX_IMUX_DELAY[22]BITSLICE[8].TX_CNTVALUEIN4
CELL[10].IMUX_IMUX_DELAY[23]BITSLICE[8].TX_CNTVALUEIN5
CELL[10].IMUX_IMUX_DELAY[24]BITSLICE[8].TX_CNTVALUEIN6
CELL[10].IMUX_IMUX_DELAY[25]BITSLICE[8].TX_CNTVALUEIN7
CELL[10].IMUX_IMUX_DELAY[26]BITSLICE[8].TX_CNTVALUEIN8
CELL[10].IMUX_IMUX_DELAY[27]BITSLICE[8].RX_CNTVALUEIN0
CELL[10].IMUX_IMUX_DELAY[28]BITSLICE[8].RX_CNTVALUEIN1
CELL[10].IMUX_IMUX_DELAY[29]BITSLICE[8].RX_CNTVALUEIN2
CELL[10].IMUX_IMUX_DELAY[30]BITSLICE[8].RX_CNTVALUEIN3
CELL[10].IMUX_IMUX_DELAY[31]BITSLICE[8].RX_CNTVALUEIN5
CELL[10].IMUX_IMUX_DELAY[32]BITSLICE[8].RX_CNTVALUEIN7
CELL[10].IMUX_IMUX_DELAY[33]BITSLICE[8].RX_CNTVALUEIN8
CELL[10].IMUX_IMUX_DELAY[34]BITSLICE_T[1].CNTVALUEIN0
CELL[10].IMUX_IMUX_DELAY[35]BITSLICE_T[1].CNTVALUEIN2
CELL[10].IMUX_IMUX_DELAY[36]BITSLICE_T[1].CNTVALUEIN4
CELL[10].IMUX_IMUX_DELAY[37]BITSLICE_T[1].CNTVALUEIN5
CELL[10].IMUX_IMUX_DELAY[38]BITSLICE_T[1].CNTVALUEIN6
CELL[10].IMUX_IMUX_DELAY[39]BITSLICE_T[1].CNTVALUEIN8
CELL[10].IMUX_IMUX_DELAY[40]BITSLICE_CONTROL[1].CLB2PHY_WRCS1_0
CELL[10].IMUX_IMUX_DELAY[41]BITSLICE_CONTROL[1].CLB2PHY_WRCS1_1
CELL[10].IMUX_IMUX_DELAY[42]BITSLICE_CONTROL[1].CLB2PHY_WRCS1_2
CELL[10].IMUX_IMUX_DELAY[43]BITSLICE_CONTROL[1].CLB2PHY_WRCS0_0
CELL[10].IMUX_IMUX_DELAY[44]BITSLICE_CONTROL[1].CLB2PHY_WRCS0_2
CELL[10].IMUX_IMUX_DELAY[45]BITSLICE_CONTROL[1].CLB2PHY_WRCS0_3
CELL[10].IMUX_IMUX_DELAY[46]BITSLICE_CONTROL[1].CLB2PHY_T_B0
CELL[10].IMUX_IMUX_DELAY[47]BITSLICE_CONTROL[1].CLB2PHY_T_B2
CELL[11].OUT_BEL[4]BITSLICE[8].TX_CNTVALUEOUT5
CELL[11].OUT_BEL[5]BITSLICE[8].TX_CNTVALUEOUT6
CELL[11].OUT_BEL[6]BITSLICE[8].TX_CNTVALUEOUT7
CELL[11].OUT_BEL[7]BITSLICE[8].TX_CNTVALUEOUT8
CELL[11].OUT_BEL[8]BITSLICE[10].TX_T_OUT
CELL[11].OUT_BEL[9]BITSLICE[8].RX_CNTVALUEOUT0
CELL[11].OUT_BEL[10]BITSLICE[8].RX_CNTVALUEOUT1
CELL[11].OUT_BEL[11]BITSLICE[8].RX_CNTVALUEOUT2
CELL[11].OUT_BEL[12]BITSLICE[8].RX_CNTVALUEOUT3
CELL[11].OUT_BEL[13]BITSLICE[8].RX_CNTVALUEOUT4
CELL[11].OUT_BEL[14]BITSLICE[8].RX_CNTVALUEOUT5
CELL[11].OUT_BEL[15]BITSLICE[8].RX_CNTVALUEOUT6
CELL[11].OUT_BEL[16]BITSLICE[8].RX_CNTVALUEOUT7
CELL[11].OUT_BEL[17]BITSLICE[8].RX_CNTVALUEOUT8
CELL[11].OUT_BEL[18]BITSLICE_T[1].CNTVALUEOUT0
CELL[11].OUT_BEL[19]BITSLICE_T[1].CNTVALUEOUT1
CELL[11].OUT_BEL[20]BITSLICE_T[1].CNTVALUEOUT2
CELL[11].OUT_BEL[21]BITSLICE_T[1].CNTVALUEOUT3
CELL[11].OUT_BEL[22]BITSLICE_T[1].CNTVALUEOUT4
CELL[11].OUT_BEL[23]BITSLICE_T[1].CNTVALUEOUT5
CELL[11].OUT_BEL[24]BITSLICE_T[1].CNTVALUEOUT6
CELL[11].OUT_BEL[25]BITSLICE_T[1].CNTVALUEOUT7
CELL[11].OUT_BEL[26]BITSLICE_T[1].CNTVALUEOUT8
CELL[11].OUT_BEL[27]BITSLICE_CONTROL[1].PHY2CLB_PHY_RDY
CELL[11].OUT_BEL[28]BITSLICE_CONTROL[1].MASTER_PD_OUT
CELL[11].OUT_BEL[29]BITSLICE_CONTROL[1].PHY2CLB_FIXDLY_RDY
CELL[11].OUT_BEL[30]BITSLICE_CONTROL[1].CTRL_DLY_TEST_OUT
CELL[11].OUT_BEL[31]BITSLICE[11].TX_T_OUT
CELL[11].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].IDELAY_RST8
CELL[11].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].TRISTATE_ODELAY_RST1
CELL[11].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK8
CELL[11].IMUX_CTRL[6]BITSLICE_CONTROL[1].REFCLK
CELL[11].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].CTRL_RST_UPP
CELL[11].IMUX_BYP_DELAY[6]BITSLICE[8].TX_CE_ODELAY
CELL[11].IMUX_BYP_DELAY[8]BITSLICE[8].RX_LD
CELL[11].IMUX_BYP_DELAY[9]BITSLICE[8].RX_INC
CELL[11].IMUX_BYP_DELAY[10]BITSLICE[8].RX_EN_VTC
CELL[11].IMUX_BYP_DELAY[11]BITSLICE[8].RX_CE_IDELAY
CELL[11].IMUX_BYP_DELAY[12]BITSLICE[8].DYN_DCI_OUT_INT
CELL[11].IMUX_BYP_DELAY[13]BITSLICE_T[1].CE_OFD
CELL[11].IMUX_BYP_DELAY[14]BITSLICE_T[1].LD
CELL[11].IMUX_BYP_DELAY[15]BITSLICE_T[1].INC
CELL[11].IMUX_IMUX_DELAY[6]BITSLICE[9].RX_DATAIN1
CELL[11].IMUX_IMUX_DELAY[7]BITSLICE[9].TX_CNTVALUEIN0
CELL[11].IMUX_IMUX_DELAY[8]BITSLICE[9].TX_D0
CELL[11].IMUX_IMUX_DELAY[9]BITSLICE[9].TX_CNTVALUEIN4
CELL[11].IMUX_IMUX_DELAY[10]BITSLICE[9].TX_D2
CELL[11].IMUX_IMUX_DELAY[11]BITSLICE[9].TX_CNTVALUEIN8
CELL[11].IMUX_IMUX_DELAY[12]BITSLICE[9].TX_D4
CELL[11].IMUX_IMUX_DELAY[13]BITSLICE[9].RX_CNTVALUEIN2
CELL[11].IMUX_IMUX_DELAY[14]BITSLICE[9].TX_D6
CELL[11].IMUX_IMUX_DELAY[15]BITSLICE[9].RX_CNTVALUEIN6
CELL[11].IMUX_IMUX_DELAY[16]BITSLICE_CONTROL[1].CLB2PHY_RDEN0
CELL[11].IMUX_IMUX_DELAY[17]BITSLICE_CONTROL[1].CLB2PHY_RDEN1
CELL[11].IMUX_IMUX_DELAY[18]BITSLICE_CONTROL[1].CLB2PHY_RDEN2
CELL[11].IMUX_IMUX_DELAY[19]BITSLICE_CONTROL[1].CLB2PHY_RDEN3
CELL[11].IMUX_IMUX_DELAY[20]BITSLICE_CONTROL[1].CLB2PHY_RDCS1_0
CELL[11].IMUX_IMUX_DELAY[21]BITSLICE_CONTROL[1].CLB2PHY_RDCS1_1
CELL[11].IMUX_IMUX_DELAY[22]BITSLICE_CONTROL[1].CLB2PHY_RDCS1_2
CELL[11].IMUX_IMUX_DELAY[23]BITSLICE_CONTROL[1].CLB2PHY_RDCS1_3
CELL[11].IMUX_IMUX_DELAY[24]BITSLICE_CONTROL[1].CLB2PHY_RDCS0_0
CELL[11].IMUX_IMUX_DELAY[25]BITSLICE_CONTROL[1].CLB2PHY_RDCS0_1
CELL[11].IMUX_IMUX_DELAY[26]BITSLICE_CONTROL[1].CLB2PHY_RDCS0_2
CELL[11].IMUX_IMUX_DELAY[27]BITSLICE_CONTROL[1].CLB2PHY_RDCS0_3
CELL[11].IMUX_IMUX_DELAY[28]BITSLICE[9].TX_T
CELL[11].IMUX_IMUX_DELAY[29]BITSLICE[9].TX_CE_OFD
CELL[11].IMUX_IMUX_DELAY[30]BITSLICE[9].RX_CE_IFD
CELL[11].IMUX_IMUX_DELAY[31]BITSLICE[9].CLB2PHY_FIFO_RDEN
CELL[11].IMUX_IMUX_DELAY[32]BITSLICE[9].TX_CNTVALUEIN1
CELL[11].IMUX_IMUX_DELAY[33]BITSLICE[9].TX_CNTVALUEIN2
CELL[11].IMUX_IMUX_DELAY[34]BITSLICE[9].TX_CNTVALUEIN3
CELL[11].IMUX_IMUX_DELAY[35]BITSLICE[9].TX_D1
CELL[11].IMUX_IMUX_DELAY[36]BITSLICE[9].TX_CNTVALUEIN5
CELL[11].IMUX_IMUX_DELAY[37]BITSLICE[9].TX_CNTVALUEIN6
CELL[11].IMUX_IMUX_DELAY[38]BITSLICE[9].TX_CNTVALUEIN7
CELL[11].IMUX_IMUX_DELAY[39]BITSLICE[9].TX_D3
CELL[11].IMUX_IMUX_DELAY[40]BITSLICE[9].RX_CNTVALUEIN0
CELL[11].IMUX_IMUX_DELAY[41]BITSLICE[9].RX_CNTVALUEIN1
CELL[11].IMUX_IMUX_DELAY[43]BITSLICE[9].TX_D5
CELL[11].IMUX_IMUX_DELAY[44]BITSLICE[9].RX_CNTVALUEIN3
CELL[11].IMUX_IMUX_DELAY[45]BITSLICE[9].RX_CNTVALUEIN4
CELL[11].IMUX_IMUX_DELAY[46]BITSLICE[9].RX_CNTVALUEIN5
CELL[11].IMUX_IMUX_DELAY[47]BITSLICE[9].TX_D7
CELL[12].OUT_BEL[4]BITSLICE[9].PHY2CLB_FIFO_EMPTY
CELL[12].OUT_BEL[5]BITSLICE[9].RX_Q0
CELL[12].OUT_BEL[6]BITSLICE[9].RX_Q1
CELL[12].OUT_BEL[7]BITSLICE[9].TX_CNTVALUEOUT0
CELL[12].OUT_BEL[8]BITSLICE[9].TX_CNTVALUEOUT1
CELL[12].OUT_BEL[9]BITSLICE[9].TX_CNTVALUEOUT2
CELL[12].OUT_BEL[10]BITSLICE[9].TX_CNTVALUEOUT3
CELL[12].OUT_BEL[11]BITSLICE[9].RX_Q2
CELL[12].OUT_BEL[12]BITSLICE[9].RX_Q3
CELL[12].OUT_BEL[13]BITSLICE[9].TX_CNTVALUEOUT4
CELL[12].OUT_BEL[14]BITSLICE[9].TX_CNTVALUEOUT5
CELL[12].OUT_BEL[15]BITSLICE[9].TX_CNTVALUEOUT6
CELL[12].OUT_BEL[16]BITSLICE[9].TX_CNTVALUEOUT7
CELL[12].OUT_BEL[17]BITSLICE[9].RX_Q4
CELL[12].OUT_BEL[18]BITSLICE[9].RX_Q5
CELL[12].OUT_BEL[19]BITSLICE[9].TX_CNTVALUEOUT8
CELL[12].OUT_BEL[20]BITSLICE[12].TX_T_OUT
CELL[12].OUT_BEL[21]BITSLICE[9].RX_CNTVALUEOUT0
CELL[12].OUT_BEL[22]BITSLICE[9].RX_CNTVALUEOUT1
CELL[12].OUT_BEL[23]BITSLICE[9].RX_CNTVALUEOUT2
CELL[12].OUT_BEL[24]BITSLICE[9].RX_Q6
CELL[12].OUT_BEL[25]BITSLICE[9].RX_Q7
CELL[12].OUT_BEL[26]BITSLICE[9].RX_CNTVALUEOUT3
CELL[12].OUT_BEL[27]BITSLICE[9].RX_CNTVALUEOUT4
CELL[12].OUT_BEL[28]BITSLICE[9].RX_CNTVALUEOUT5
CELL[12].OUT_BEL[29]BITSLICE[9].RX_CNTVALUEOUT6
CELL[12].OUT_BEL[30]BITSLICE[9].RX_CNTVALUEOUT7
CELL[12].OUT_BEL[31]BITSLICE[9].RX_CNTVALUEOUT8
CELL[12].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_RST9
CELL[12].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].RXBIT_RST9
CELL[12].IMUX_CTRL[4]BITSLICE_CONTROL[1].RIU_CLK, XIPHY_FEEDTHROUGH[0].CLB2PHY_CTRL_CLK_UPP
CELL[12].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST9
CELL[12].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST9
CELL[12].IMUX_BYP_DELAY[6]BITSLICE_T[1].CE_ODELAY
CELL[12].IMUX_BYP_DELAY[7]BITSLICE_CONTROL[1].EN_VTC
CELL[12].IMUX_BYP_DELAY[8]BITSLICE_CONTROL[1].CTRL_DLY_TEST_IN
CELL[12].IMUX_BYP_DELAY[9]BITSLICE[9].TX_LD
CELL[12].IMUX_BYP_DELAY[10]BITSLICE[9].TX_INC
CELL[12].IMUX_BYP_DELAY[11]BITSLICE[9].TX_EN_VTC
CELL[12].IMUX_BYP_DELAY[12]BITSLICE[9].TX_CE_ODELAY
CELL[12].IMUX_BYP_DELAY[13]BITSLICE[9].RX_LD
CELL[12].IMUX_BYP_DELAY[14]BITSLICE[9].RX_INC
CELL[12].IMUX_BYP_DELAY[15]BITSLICE[9].RX_EN_VTC
CELL[12].IMUX_IMUX_DELAY[6]BITSLICE[10].TX_CNTVALUEIN6
CELL[12].IMUX_IMUX_DELAY[7]BITSLICE[10].TX_D3
CELL[12].IMUX_IMUX_DELAY[8]BITSLICE[10].RX_CNTVALUEIN1
CELL[12].IMUX_IMUX_DELAY[9]BITSLICE[10].TX_D1
CELL[12].IMUX_IMUX_DELAY[10]BITSLICE[10].RX_CNTVALUEIN5
CELL[12].IMUX_IMUX_DELAY[11]BITSLICE[10].TX_D6
CELL[12].IMUX_IMUX_DELAY[12]BITSLICE[11].TX_T
CELL[12].IMUX_IMUX_DELAY[13]BITSLICE[11].RX_CE_IFD
CELL[12].IMUX_IMUX_DELAY[14]BITSLICE[11].TX_D1
CELL[12].IMUX_IMUX_DELAY[15]BITSLICE[11].TX_D3
CELL[12].IMUX_IMUX_DELAY[16]BITSLICE[9].RX_CNTVALUEIN7
CELL[12].IMUX_IMUX_DELAY[17]BITSLICE[9].RX_CNTVALUEIN8
CELL[12].IMUX_IMUX_DELAY[18]BITSLICE[10].TX_T
CELL[12].IMUX_IMUX_DELAY[19]BITSLICE[10].TX_CE_OFD
CELL[12].IMUX_IMUX_DELAY[20]BITSLICE[10].RX_CE_IFD
CELL[12].IMUX_IMUX_DELAY[21]BITSLICE[10].RX_DATAIN1
CELL[12].IMUX_IMUX_DELAY[22]BITSLICE[10].CLB2PHY_FIFO_RDEN
CELL[12].IMUX_IMUX_DELAY[23]BITSLICE[10].TX_CNTVALUEIN0
CELL[12].IMUX_IMUX_DELAY[24]BITSLICE[10].TX_CNTVALUEIN1
CELL[12].IMUX_IMUX_DELAY[25]BITSLICE[10].TX_CNTVALUEIN2
CELL[12].IMUX_IMUX_DELAY[26]BITSLICE[10].TX_CNTVALUEIN3
CELL[12].IMUX_IMUX_DELAY[27]BITSLICE[10].TX_D5
CELL[12].IMUX_IMUX_DELAY[28]BITSLICE[10].TX_D4
CELL[12].IMUX_IMUX_DELAY[29]BITSLICE[10].TX_CNTVALUEIN4
CELL[12].IMUX_IMUX_DELAY[30]BITSLICE[10].TX_CNTVALUEIN5
CELL[12].IMUX_IMUX_DELAY[31]BITSLICE[10].TX_CNTVALUEIN7
CELL[12].IMUX_IMUX_DELAY[32]BITSLICE[10].TX_D2
CELL[12].IMUX_IMUX_DELAY[33]BITSLICE[10].TX_CNTVALUEIN8
CELL[12].IMUX_IMUX_DELAY[34]BITSLICE[10].RX_CNTVALUEIN0
CELL[12].IMUX_IMUX_DELAY[35]BITSLICE[10].RX_CNTVALUEIN2
CELL[12].IMUX_IMUX_DELAY[36]BITSLICE[10].TX_D0
CELL[12].IMUX_IMUX_DELAY[37]BITSLICE[10].RX_CNTVALUEIN3
CELL[12].IMUX_IMUX_DELAY[38]BITSLICE[10].RX_CNTVALUEIN4
CELL[12].IMUX_IMUX_DELAY[39]BITSLICE[10].RX_CNTVALUEIN6
CELL[12].IMUX_IMUX_DELAY[40]BITSLICE[10].TX_D7
CELL[12].IMUX_IMUX_DELAY[41]BITSLICE[10].RX_CNTVALUEIN7
CELL[12].IMUX_IMUX_DELAY[42]BITSLICE[10].RX_CNTVALUEIN8
CELL[12].IMUX_IMUX_DELAY[43]BITSLICE[11].TX_CE_OFD
CELL[12].IMUX_IMUX_DELAY[44]BITSLICE[11].RX_DATAIN1
CELL[12].IMUX_IMUX_DELAY[45]BITSLICE[11].CLB2PHY_FIFO_RDEN
CELL[12].IMUX_IMUX_DELAY[46]BITSLICE[11].TX_D0
CELL[12].IMUX_IMUX_DELAY[47]BITSLICE[11].TX_D2
CELL[13].OUT_BEL[4]BITSLICE[10].PHY2CLB_FIFO_EMPTY
CELL[13].OUT_BEL[5]BITSLICE[10].RX_Q0
CELL[13].OUT_BEL[6]BITSLICE[10].RX_Q1
CELL[13].OUT_BEL[7]BITSLICE[10].TX_CNTVALUEOUT0
CELL[13].OUT_BEL[8]BITSLICE[10].TX_CNTVALUEOUT1
CELL[13].OUT_BEL[9]BITSLICE[10].TX_CNTVALUEOUT2
CELL[13].OUT_BEL[10]BITSLICE[10].TX_CNTVALUEOUT3
CELL[13].OUT_BEL[11]BITSLICE[10].RX_Q2
CELL[13].OUT_BEL[12]BITSLICE[10].RX_Q3
CELL[13].OUT_BEL[13]BITSLICE[10].TX_CNTVALUEOUT4
CELL[13].OUT_BEL[14]BITSLICE[10].TX_CNTVALUEOUT5
CELL[13].OUT_BEL[15]BITSLICE[10].TX_CNTVALUEOUT6
CELL[13].OUT_BEL[16]BITSLICE[10].TX_CNTVALUEOUT7
CELL[13].OUT_BEL[17]BITSLICE[10].RX_Q4
CELL[13].OUT_BEL[18]BITSLICE[10].RX_Q5
CELL[13].OUT_BEL[19]BITSLICE[10].TX_CNTVALUEOUT8
CELL[13].OUT_BEL[21]BITSLICE[10].RX_CNTVALUEOUT0
CELL[13].OUT_BEL[22]BITSLICE[10].RX_CNTVALUEOUT1
CELL[13].OUT_BEL[23]BITSLICE[10].RX_CNTVALUEOUT2
CELL[13].OUT_BEL[24]BITSLICE[10].RX_Q6
CELL[13].OUT_BEL[25]BITSLICE[10].RX_Q7
CELL[13].OUT_BEL[26]BITSLICE[10].RX_CNTVALUEOUT3
CELL[13].OUT_BEL[27]BITSLICE[10].RX_CNTVALUEOUT4
CELL[13].OUT_BEL[28]BITSLICE[10].RX_CNTVALUEOUT5
CELL[13].OUT_BEL[29]BITSLICE[10].RX_CNTVALUEOUT6
CELL[13].OUT_BEL[30]BITSLICE[10].RX_CNTVALUEOUT7
CELL[13].OUT_BEL[31]BITSLICE[10].RX_CNTVALUEOUT8
CELL[13].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].ODELAY_RST10
CELL[13].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].TXBIT_RST10
CELL[13].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].RXBIT_RST10
CELL[13].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK9
CELL[13].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST10
CELL[13].IMUX_BYP_DELAY[6]BITSLICE[9].RX_CE_IDELAY
CELL[13].IMUX_BYP_DELAY[7]BITSLICE[9].DYN_DCI_OUT_INT
CELL[13].IMUX_BYP_DELAY[8]BITSLICE[10].TX_LD
CELL[13].IMUX_BYP_DELAY[9]BITSLICE[10].TX_INC
CELL[13].IMUX_BYP_DELAY[10]BITSLICE[10].TX_EN_VTC
CELL[13].IMUX_BYP_DELAY[11]BITSLICE[10].TX_CE_ODELAY
CELL[13].IMUX_BYP_DELAY[12]BITSLICE[10].RX_LD
CELL[13].IMUX_BYP_DELAY[13]BITSLICE[10].RX_INC
CELL[13].IMUX_BYP_DELAY[14]BITSLICE[10].RX_EN_VTC
CELL[13].IMUX_BYP_DELAY[15]BITSLICE[10].RX_CE_IDELAY
CELL[13].IMUX_IMUX_DELAY[6]BITSLICE[11].TX_D5
CELL[13].IMUX_IMUX_DELAY[7]BITSLICE[11].TX_CNTVALUEIN0
CELL[13].IMUX_IMUX_DELAY[8]BITSLICE[11].TX_CNTVALUEIN1
CELL[13].IMUX_IMUX_DELAY[9]BITSLICE[11].TX_CNTVALUEIN2
CELL[13].IMUX_IMUX_DELAY[10]BITSLICE[11].TX_CNTVALUEIN3
CELL[13].IMUX_IMUX_DELAY[11]BITSLICE[11].TX_D6
CELL[13].IMUX_IMUX_DELAY[12]BITSLICE[11].TX_D7
CELL[13].IMUX_IMUX_DELAY[13]BITSLICE[11].TX_CNTVALUEIN4
CELL[13].IMUX_IMUX_DELAY[14]BITSLICE[11].TX_CNTVALUEIN5
CELL[13].IMUX_IMUX_DELAY[15]BITSLICE[11].TX_CNTVALUEIN6
CELL[13].IMUX_IMUX_DELAY[16]BITSLICE[11].TX_D4
CELL[14].OUT_BEL[4]BITSLICE[11].PHY2CLB_FIFO_EMPTY
CELL[14].OUT_BEL[5]BITSLICE[11].RX_Q0
CELL[14].OUT_BEL[6]BITSLICE[11].RX_Q1
CELL[14].OUT_BEL[7]BITSLICE[11].TX_CNTVALUEOUT0
CELL[14].OUT_BEL[8]BITSLICE[11].TX_CNTVALUEOUT1
CELL[14].OUT_BEL[9]BITSLICE[11].TX_CNTVALUEOUT2
CELL[14].OUT_BEL[10]BITSLICE[11].TX_CNTVALUEOUT3
CELL[14].OUT_BEL[11]BITSLICE[11].RX_Q2
CELL[14].OUT_BEL[12]BITSLICE[11].RX_Q3
CELL[14].OUT_BEL[13]BITSLICE[11].TX_CNTVALUEOUT4
CELL[14].OUT_BEL[14]BITSLICE[11].TX_CNTVALUEOUT5
CELL[14].OUT_BEL[15]BITSLICE[11].TX_CNTVALUEOUT6
CELL[14].OUT_BEL[16]BITSLICE[11].TX_CNTVALUEOUT7
CELL[14].OUT_BEL[17]BITSLICE[11].RX_Q4
CELL[14].OUT_BEL[18]BITSLICE[11].RX_Q5
CELL[14].OUT_BEL[19]BITSLICE[11].TX_CNTVALUEOUT8
CELL[14].OUT_BEL[21]BITSLICE[11].RX_CNTVALUEOUT0
CELL[14].OUT_BEL[22]BITSLICE[11].RX_CNTVALUEOUT1
CELL[14].OUT_BEL[23]BITSLICE[11].RX_CNTVALUEOUT2
CELL[14].OUT_BEL[24]BITSLICE[11].RX_CNTVALUEOUT3
CELL[14].OUT_BEL[25]BITSLICE[11].RX_Q6
CELL[14].OUT_BEL[26]BITSLICE[11].RX_Q7
CELL[14].OUT_BEL[27]BITSLICE[11].RX_CNTVALUEOUT4
CELL[14].OUT_BEL[28]BITSLICE[11].RX_CNTVALUEOUT5
CELL[14].OUT_BEL[29]BITSLICE[11].RX_CNTVALUEOUT6
CELL[14].OUT_BEL[30]BITSLICE[11].RX_CNTVALUEOUT7
CELL[14].OUT_BEL[31]BITSLICE[11].RX_CNTVALUEOUT8
CELL[14].IMUX_CTRL[2]XIPHY_FEEDTHROUGH[0].TXBIT_RST11
CELL[14].IMUX_CTRL[3]XIPHY_FEEDTHROUGH[0].RXBIT_RST11
CELL[14].IMUX_CTRL[4]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK10
CELL[14].IMUX_CTRL[5]XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK11
CELL[14].IMUX_CTRL[6]XIPHY_FEEDTHROUGH[0].ODELAY_RST11
CELL[14].IMUX_CTRL[7]XIPHY_FEEDTHROUGH[0].IDELAY_RST11
CELL[14].IMUX_BYP_DELAY[6]BITSLICE[10].DYN_DCI_OUT_INT
CELL[14].IMUX_BYP_DELAY[7]BITSLICE[11].TX_LD
CELL[14].IMUX_BYP_DELAY[8]BITSLICE[11].TX_INC
CELL[14].IMUX_BYP_DELAY[9]BITSLICE[11].TX_EN_VTC
CELL[14].IMUX_BYP_DELAY[10]BITSLICE[11].TX_CE_ODELAY
CELL[14].IMUX_BYP_DELAY[11]BITSLICE[11].RX_LD
CELL[14].IMUX_BYP_DELAY[12]BITSLICE[11].RX_INC
CELL[14].IMUX_BYP_DELAY[13]BITSLICE[11].RX_EN_VTC
CELL[14].IMUX_BYP_DELAY[14]BITSLICE[11].RX_CE_IDELAY
CELL[14].IMUX_BYP_DELAY[15]BITSLICE[11].DYN_DCI_OUT_INT
CELL[14].IMUX_IMUX_DELAY[6]BITSLICE[11].TX_CNTVALUEIN8
CELL[14].IMUX_IMUX_DELAY[7]BITSLICE[11].RX_CNTVALUEIN0
CELL[14].IMUX_IMUX_DELAY[8]BITSLICE[11].RX_CNTVALUEIN1
CELL[14].IMUX_IMUX_DELAY[9]BITSLICE[11].RX_CNTVALUEIN2
CELL[14].IMUX_IMUX_DELAY[10]BITSLICE[11].RX_CNTVALUEIN3
CELL[14].IMUX_IMUX_DELAY[11]BITSLICE[11].RX_CNTVALUEIN4
CELL[14].IMUX_IMUX_DELAY[12]BITSLICE[11].RX_CNTVALUEIN5
CELL[14].IMUX_IMUX_DELAY[13]BITSLICE[11].RX_CNTVALUEIN6
CELL[14].IMUX_IMUX_DELAY[14]BITSLICE[11].RX_CNTVALUEIN7
CELL[14].IMUX_IMUX_DELAY[15]BITSLICE[11].RX_CNTVALUEIN8
CELL[14].IMUX_IMUX_DELAY[16]BITSLICE[11].TX_CNTVALUEIN7

Tile RCLK_XIPHY

Cells: 0

Bel RCLK_XIPHY

ultrascaleplus RCLK_XIPHY bel RCLK_XIPHY
PinDirectionWires

Bel VCC_RCLK_XIPHY

ultrascaleplus RCLK_XIPHY bel VCC_RCLK_XIPHY
PinDirectionWires