General interconnect
Tile slots
| Slot | Tiles | Bel slots |
|---|---|---|
| MAIN | CLB, CLB_W, CLB_E, CLB_S, CLB_SW, CLB_SE, CLB_N, CLB_NW, CLB_NE, IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W, CNR_SW, CNR_SE, CNR_NW, CNR_NE | INT, CLB, TBUF[0], TBUF[1], IO[0], IO[1], HIO[0], HIO[1], HIO[2], HIO[3], DEC[0], DEC[1], DEC[2], PULLUP_TBUF[0], PULLUP_TBUF[1], CIN, COUT, MISC_W, PULLUP_DEC_H[0], PULLUP_DEC_H[1], PULLUP_DEC_H[2], PULLUP_DEC_H[3], PULLUP_DEC_V[0], PULLUP_DEC_V[1], PULLUP_DEC_V[2], PULLUP_DEC_V[3], BUFG_H, BUFG_V, STARTUP, READCLK, UPDATE, OSC, TDO, MD0, MD1, MD2, RDBK, BSCAN, MISC_SW, MISC_SE, MISC_NW, MISC_NE |
| LLH | LLH_CLB, LLH_CLB_S, LLH_IO_S, LLH_IO_N, LLHC_CLB, LLHC_CLB_S, LLHC_IO_S, LLHC_IO_N, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N, LLHQ_IO_S, LLHQ_IO_N | LLH, PULLUP_TBUF_W[0], PULLUP_TBUF_W[1], PULLUP_TBUF_E[0], PULLUP_TBUF_E[1], TBUF_SPLITTER[0], TBUF_SPLITTER[1], PULLUP_DEC_W[0], PULLUP_DEC_W[1], PULLUP_DEC_W[2], PULLUP_DEC_W[3], PULLUP_DEC_E[0], PULLUP_DEC_E[1], PULLUP_DEC_E[2], PULLUP_DEC_E[3] |
| LLV | LLV_CLB, LLV_IO_W, LLV_IO_E, LLVC_CLB, LLVC_IO_W, LLVC_IO_E, LLVQ_CLB, LLVQ_IO_SW, LLVQ_IO_NW, LLVQ_IO_SE, LLVQ_IO_NE | LLV, BUFF, PULLUP_DEC_S[0], PULLUP_DEC_S[1], PULLUP_DEC_S[2], PULLUP_DEC_S[3], PULLUP_DEC_N[0], PULLUP_DEC_N[1], PULLUP_DEC_N[2], PULLUP_DEC_N[3], MISC_E |
| CLKQ | CLKQC, CLKQ | CLKQC, CLKQ |
Bel slots
| Slot | Class | Tile slot | Tiles |
|---|---|---|---|
| INT | routing | MAIN | CLB, CLB_W, CLB_E, CLB_S, CLB_SW, CLB_SE, CLB_N, CLB_NW, CLB_NE, IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W, CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| CLB | CLB | MAIN | CLB, CLB_W, CLB_E, CLB_S, CLB_SW, CLB_SE, CLB_N, CLB_NW, CLB_NE |
| TBUF[0] | TBUF | MAIN | CLB, CLB_W, CLB_E, CLB_S, CLB_SW, CLB_SE, CLB_N, CLB_NW, CLB_NE, IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1 |
| TBUF[1] | TBUF | MAIN | CLB, CLB_W, CLB_E, CLB_S, CLB_SW, CLB_SE, CLB_N, CLB_NW, CLB_NE, IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1 |
| IO[0] | IO | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| IO[1] | IO | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| HIO[0] | HIO | MAIN | |
| HIO[1] | HIO | MAIN | |
| HIO[2] | HIO | MAIN | |
| HIO[3] | HIO | MAIN | |
| DEC[0] | DEC | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| DEC[1] | DEC | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| DEC[2] | DEC | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1, IO_S0, IO_S1, IO_S0_E, IO_S1_W, IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| PULLUP_TBUF[0] | PULLUP | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1 |
| PULLUP_TBUF[1] | PULLUP | MAIN | IO_W0, IO_W1, IO_W0_N, IO_W1_S, IO_W0_F0, IO_W1_F0, IO_W0_F1, IO_W1_F1, IO_E0, IO_E1, IO_E0_N, IO_E1_S, IO_E0_F0, IO_E1_F0, IO_E0_F1, IO_E1_F1 |
| CIN | CIN | MAIN | IO_S0, IO_S1, IO_S0_E, IO_S1_W |
| COUT | COUT | MAIN | IO_N0, IO_N1, IO_N0_E, IO_N1_W |
| MISC_W | MISC_W | MAIN | |
| PULLUP_DEC_H[0] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_H[1] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_H[2] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_H[3] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_V[0] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_V[1] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_V[2] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| PULLUP_DEC_V[3] | PULLUP | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| BUFG_H | BUFG | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| BUFG_V | BUFG | MAIN | CNR_SW, CNR_SE, CNR_NW, CNR_NE |
| STARTUP | STARTUP | MAIN | CNR_SE |
| READCLK | READCLK | MAIN | CNR_SE |
| UPDATE | UPDATE | MAIN | CNR_NE |
| OSC | OSC | MAIN | CNR_NE |
| TDO | TDO | MAIN | CNR_NE |
| MD0 | IBUF | MAIN | CNR_SW |
| MD1 | MD1 | MAIN | CNR_SW |
| MD2 | IBUF | MAIN | CNR_SW |
| RDBK | RDBK | MAIN | CNR_SW |
| BSCAN | BSCAN | MAIN | CNR_NW |
| MISC_SW | MISC_SW | MAIN | CNR_SW |
| MISC_SE | MISC_SE | MAIN | CNR_SE |
| MISC_NW | MISC_NW | MAIN | CNR_NW |
| MISC_NE | MISC_NE | MAIN | CNR_NE |
| LLH | routing | LLH | LLH_CLB, LLH_CLB_S, LLH_IO_S, LLH_IO_N, LLHC_CLB, LLHC_CLB_S, LLHC_IO_S, LLHC_IO_N, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N, LLHQ_IO_S, LLHQ_IO_N |
| PULLUP_TBUF_W[0] | PULLUP | LLH | LLHC_CLB, LLHC_CLB_S, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N |
| PULLUP_TBUF_W[1] | PULLUP | LLH | LLHC_CLB, LLHC_CLB_S, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N |
| PULLUP_TBUF_E[0] | PULLUP | LLH | LLHC_CLB, LLHC_CLB_S, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N |
| PULLUP_TBUF_E[1] | PULLUP | LLH | LLHC_CLB, LLHC_CLB_S, LLHQ_CLB, LLHQ_CLB_S, LLHQ_CLB_N |
| TBUF_SPLITTER[0] | TBUF_SPLITTER | LLH | LLHC_CLB, LLHC_CLB_S |
| TBUF_SPLITTER[1] | TBUF_SPLITTER | LLH | LLHC_CLB, LLHC_CLB_S |
| PULLUP_DEC_W[0] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_W[1] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_W[2] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_W[3] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_E[0] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_E[1] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_E[2] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| PULLUP_DEC_E[3] | PULLUP | LLH | LLHC_IO_S, LLHC_IO_N |
| LLV | routing | LLV | LLV_CLB, LLV_IO_W, LLV_IO_E, LLVC_CLB, LLVC_IO_W, LLVC_IO_E, LLVQ_CLB, LLVQ_IO_SW, LLVQ_IO_NW, LLVQ_IO_SE, LLVQ_IO_NE |
| BUFF | BUFF | LLV | LLVQ_IO_SW, LLVQ_IO_NW, LLVQ_IO_SE, LLVQ_IO_NE |
| PULLUP_DEC_S[0] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_S[1] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_S[2] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_S[3] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_N[0] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_N[1] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_N[2] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| PULLUP_DEC_N[3] | PULLUP | LLV | LLVC_IO_W, LLVC_IO_E |
| MISC_E | MISC_E | LLV | LLV_IO_E, LLVC_IO_E |
| CLKQC | routing | CLKQ | CLKQC |
| CLKQ | routing | CLKQ | CLKQ |
Connector slots
| Slot | Opposite | Connectors |
|---|---|---|
| W | E | PASS_W, PASS_CLB_W_W, CNR_SW |
| E | W | PASS_E, CNR_NE |
| S | N | PASS_S, CNR_SE |
| N | S | PASS_N, PASS_CLB_N_N, CNR_NW |
Region slots
| Slot | Wires |
|---|---|
| GLOBAL | BUFGLS[0], BUFGLS[1], BUFGLS[2], BUFGLS[3], BUFGLS[4], BUFGLS[5], BUFGLS[6], BUFGLS[7] |
| LONG_H | LONG_H[0], LONG_H[1], LONG_H[4], LONG_H[5], LONG_IO_H[0], LONG_IO_H[1], LONG_IO_H[2], LONG_IO_H[3] |
| LONG_H_TBUF | LONG_H[2], LONG_H[3] |
| DEC_H | DEC_H[0], DEC_H[1], DEC_H[2], DEC_H[3], ECLK_H, BUFGE_H |
| LONG_V | LONG_V[0], LONG_V[1], LONG_V[2], LONG_V[3], LONG_V[4], LONG_V[5], LONG_V[6], LONG_V[7], LONG_V[8], LONG_V[9], LONG_IO_V[0], LONG_IO_V[1], LONG_IO_V[2], LONG_IO_V[3], VCLK, ECLK_V |
| DEC_V | DEC_V[0], DEC_V[1], DEC_V[2], DEC_V[3] |
| GCLK | GCLK[0], GCLK[1], GCLK[2], GCLK[3], GCLK[4], GCLK[5], GCLK[6], GCLK[7] |
| BUFGE_V | BUFGE_V[0], BUFGE_V[1] |
| BUFGLS_H | BUFGLS_H[0], BUFGLS_H[1], BUFGLS_H[2], BUFGLS_H[3], BUFGLS_H[4], BUFGLS_H[5], BUFGLS_H[6], BUFGLS_H[7] |
Wires
| Wire | Kind |
|---|---|
| TIE_0 | tie 0 |
| TIE_1 | tie 1 |
| SPECIAL_CLB_CIN | special |
| SPECIAL_CLB_COUT0 | special |
| SINGLE_H[0] | multi_root |
| SINGLE_H[1] | multi_root |
| SINGLE_H[2] | multi_root |
| SINGLE_H[3] | multi_root |
| SINGLE_H[4] | multi_root |
| SINGLE_H[5] | multi_root |
| SINGLE_H[6] | multi_root |
| SINGLE_H[7] | multi_root |
| SINGLE_H_E[0] | multi_branch W |
| SINGLE_H_E[1] | multi_branch W |
| SINGLE_H_E[2] | multi_branch W |
| SINGLE_H_E[3] | multi_branch W |
| SINGLE_H_E[4] | multi_branch W |
| SINGLE_H_E[5] | multi_branch W |
| SINGLE_H_E[6] | multi_branch W |
| SINGLE_H_E[7] | multi_branch W |
| SINGLE_V[0] | multi_root |
| SINGLE_V[1] | multi_root |
| SINGLE_V[2] | multi_root |
| SINGLE_V[3] | multi_root |
| SINGLE_V[4] | multi_root |
| SINGLE_V[5] | multi_root |
| SINGLE_V[6] | multi_root |
| SINGLE_V[7] | multi_root |
| SINGLE_V_S[0] | multi_branch N |
| SINGLE_V_S[1] | multi_branch N |
| SINGLE_V_S[2] | multi_branch N |
| SINGLE_V_S[3] | multi_branch N |
| SINGLE_V_S[4] | multi_branch N |
| SINGLE_V_S[5] | multi_branch N |
| SINGLE_V_S[6] | multi_branch N |
| SINGLE_V_S[7] | multi_branch N |
| DOUBLE_H0[0] | multi_root |
| DOUBLE_H0[1] | multi_root |
| DOUBLE_H1[0] | multi_branch W |
| DOUBLE_H1[1] | multi_branch W |
| DOUBLE_H2[0] | multi_branch W |
| DOUBLE_H2[1] | multi_branch W |
| DOUBLE_V0[0] | multi_root |
| DOUBLE_V0[1] | multi_root |
| DOUBLE_V1[0] | multi_branch N |
| DOUBLE_V1[1] | multi_branch N |
| DOUBLE_V2[0] | multi_branch N |
| DOUBLE_V2[1] | multi_branch N |
| DOUBLE_IO_S0[0] | multi_branch W |
| DOUBLE_IO_S0[1] | multi_branch W |
| DOUBLE_IO_S0[2] | multi_branch W |
| DOUBLE_IO_S0[3] | multi_branch W |
| DOUBLE_IO_S1[0] | multi_branch W |
| DOUBLE_IO_S1[1] | multi_branch W |
| DOUBLE_IO_S1[2] | multi_branch W |
| DOUBLE_IO_S1[3] | multi_branch W |
| DOUBLE_IO_S2[0] | multi_branch W |
| DOUBLE_IO_S2[1] | multi_branch W |
| DOUBLE_IO_S2[2] | multi_branch W |
| DOUBLE_IO_S2[3] | multi_branch W |
| DOUBLE_IO_E0[0] | multi_branch S |
| DOUBLE_IO_E0[1] | multi_branch S |
| DOUBLE_IO_E0[2] | multi_branch S |
| DOUBLE_IO_E0[3] | multi_branch S |
| DOUBLE_IO_E1[0] | multi_branch S |
| DOUBLE_IO_E1[1] | multi_branch S |
| DOUBLE_IO_E1[2] | multi_branch S |
| DOUBLE_IO_E1[3] | multi_branch S |
| DOUBLE_IO_E2[0] | multi_branch S |
| DOUBLE_IO_E2[1] | multi_branch S |
| DOUBLE_IO_E2[2] | multi_branch S |
| DOUBLE_IO_E2[3] | multi_branch S |
| DOUBLE_IO_N0[0] | multi_branch E |
| DOUBLE_IO_N0[1] | multi_branch E |
| DOUBLE_IO_N0[2] | multi_branch E |
| DOUBLE_IO_N0[3] | multi_branch E |
| DOUBLE_IO_N1[0] | multi_branch E |
| DOUBLE_IO_N1[1] | multi_branch E |
| DOUBLE_IO_N1[2] | multi_branch E |
| DOUBLE_IO_N1[3] | multi_branch E |
| DOUBLE_IO_N2[0] | multi_branch E |
| DOUBLE_IO_N2[1] | multi_branch E |
| DOUBLE_IO_N2[2] | multi_branch E |
| DOUBLE_IO_N2[3] | multi_branch E |
| DOUBLE_IO_W0[0] | multi_branch N |
| DOUBLE_IO_W0[1] | multi_branch N |
| DOUBLE_IO_W0[2] | multi_branch N |
| DOUBLE_IO_W0[3] | multi_branch N |
| DOUBLE_IO_W1[0] | multi_branch N |
| DOUBLE_IO_W1[1] | multi_branch N |
| DOUBLE_IO_W1[2] | multi_branch N |
| DOUBLE_IO_W1[3] | multi_branch N |
| DOUBLE_IO_W2[0] | multi_branch N |
| DOUBLE_IO_W2[1] | multi_branch N |
| DOUBLE_IO_W2[2] | multi_branch N |
| DOUBLE_IO_W2[3] | multi_branch N |
| DBUF_IO_H[0] | mux |
| DBUF_IO_H[1] | mux |
| DBUF_IO_V[0] | mux |
| DBUF_IO_V[1] | mux |
| QUAD_H0[0] | multi_root |
| QUAD_H0[1] | multi_root |
| QUAD_H0[2] | multi_root |
| QUAD_H1[0] | multi_branch W |
| QUAD_H1[1] | multi_branch W |
| QUAD_H1[2] | multi_branch W |
| QUAD_H2[0] | multi_branch W |
| QUAD_H2[1] | multi_branch W |
| QUAD_H2[2] | multi_branch W |
| QUAD_H3[0] | multi_branch W |
| QUAD_H3[1] | multi_branch W |
| QUAD_H3[2] | multi_branch W |
| QUAD_H4[0] | multi_branch W |
| QUAD_H4[1] | multi_branch W |
| QUAD_H4[2] | multi_branch W |
| QUAD_V0[0] | multi_root |
| QUAD_V0[1] | multi_root |
| QUAD_V0[2] | multi_root |
| QUAD_V1[0] | multi_branch N |
| QUAD_V1[1] | multi_branch N |
| QUAD_V1[2] | multi_branch N |
| QUAD_V2[0] | multi_branch N |
| QUAD_V2[1] | multi_branch N |
| QUAD_V2[2] | multi_branch N |
| QUAD_V3[0] | multi_branch N |
| QUAD_V3[1] | multi_branch N |
| QUAD_V3[2] | multi_branch N |
| QUAD_V4[0] | multi_branch N |
| QUAD_V4[1] | multi_branch N |
| QUAD_V4[2] | multi_branch N |
| QBUF[0] | mux |
| QBUF[1] | mux |
| QBUF[2] | mux |
| OCTAL_H[0] | multi_root |
| OCTAL_H[1] | multi_branch W |
| OCTAL_H[2] | multi_branch W |
| OCTAL_H[3] | multi_branch W |
| OCTAL_H[4] | multi_branch W |
| OCTAL_H[5] | multi_branch W |
| OCTAL_H[6] | multi_branch W |
| OCTAL_H[7] | multi_branch W |
| OCTAL_H[8] | multi_branch W |
| OCTAL_V[0] | multi_root |
| OCTAL_V[1] | multi_branch N |
| OCTAL_V[2] | multi_branch N |
| OCTAL_V[3] | multi_branch N |
| OCTAL_V[4] | multi_branch N |
| OCTAL_V[5] | multi_branch N |
| OCTAL_V[6] | multi_branch N |
| OCTAL_V[7] | multi_branch N |
| OCTAL_V[8] | multi_branch N |
| OCTAL_IO_S[0] | multi_branch W |
| OCTAL_IO_S[1] | multi_branch W |
| OCTAL_IO_S[2] | multi_branch W |
| OCTAL_IO_S[3] | multi_branch W |
| OCTAL_IO_S[4] | multi_branch W |
| OCTAL_IO_S[5] | multi_branch W |
| OCTAL_IO_S[6] | multi_branch W |
| OCTAL_IO_S[7] | multi_branch W |
| OCTAL_IO_S[8] | multi_branch W |
| OCTAL_IO_E[0] | multi_branch S |
| OCTAL_IO_E[1] | multi_branch S |
| OCTAL_IO_E[2] | multi_branch S |
| OCTAL_IO_E[3] | multi_branch S |
| OCTAL_IO_E[4] | multi_branch S |
| OCTAL_IO_E[5] | multi_branch S |
| OCTAL_IO_E[6] | multi_branch S |
| OCTAL_IO_E[7] | multi_branch S |
| OCTAL_IO_E[8] | multi_branch S |
| OCTAL_IO_N[0] | multi_branch E |
| OCTAL_IO_N[1] | multi_branch E |
| OCTAL_IO_N[2] | multi_branch E |
| OCTAL_IO_N[3] | multi_branch E |
| OCTAL_IO_N[4] | multi_branch E |
| OCTAL_IO_N[5] | multi_branch E |
| OCTAL_IO_N[6] | multi_branch E |
| OCTAL_IO_N[7] | multi_branch E |
| OCTAL_IO_N[8] | multi_branch E |
| OCTAL_IO_W[0] | multi_branch N |
| OCTAL_IO_W[1] | multi_branch N |
| OCTAL_IO_W[2] | multi_branch N |
| OCTAL_IO_W[3] | multi_branch N |
| OCTAL_IO_W[4] | multi_branch N |
| OCTAL_IO_W[5] | multi_branch N |
| OCTAL_IO_W[6] | multi_branch N |
| OCTAL_IO_W[7] | multi_branch N |
| OCTAL_IO_W[8] | multi_branch N |
| OBUF | mux |
| LONG_H[0] | regional LONG_H |
| LONG_H[1] | regional LONG_H |
| LONG_H[2] | regional LONG_H_TBUF |
| LONG_H[3] | regional LONG_H_TBUF |
| LONG_H[4] | regional LONG_H |
| LONG_H[5] | regional LONG_H |
| LONG_H_BUF[0] | mux |
| LONG_H_BUF[1] | mux |
| LONG_H_BUF[2] | mux |
| LONG_H_BUF[3] | mux |
| LONG_H_BUF[4] | mux |
| LONG_H_BUF[5] | mux |
| LONG_V[0] | regional LONG_V |
| LONG_V[1] | regional LONG_V |
| LONG_V[2] | regional LONG_V |
| LONG_V[3] | regional LONG_V |
| LONG_V[4] | regional LONG_V |
| LONG_V[5] | regional LONG_V |
| LONG_V[6] | regional LONG_V |
| LONG_V[7] | regional LONG_V |
| LONG_V[8] | regional LONG_V |
| LONG_V[9] | regional LONG_V |
| LONG_IO_H[0] | regional LONG_H |
| LONG_IO_H[1] | regional LONG_H |
| LONG_IO_H[2] | regional LONG_H |
| LONG_IO_H[3] | regional LONG_H |
| LONG_IO_V[0] | regional LONG_V |
| LONG_IO_V[1] | regional LONG_V |
| LONG_IO_V[2] | regional LONG_V |
| LONG_IO_V[3] | regional LONG_V |
| DEC_H[0] | regional DEC_H |
| DEC_H[1] | regional DEC_H |
| DEC_H[2] | regional DEC_H |
| DEC_H[3] | regional DEC_H |
| DEC_V[0] | regional DEC_V |
| DEC_V[1] | regional DEC_V |
| DEC_V[2] | regional DEC_V |
| DEC_V[3] | regional DEC_V |
| GCLK[0] | regional GCLK |
| GCLK[1] | regional GCLK |
| GCLK[2] | regional GCLK |
| GCLK[3] | regional GCLK |
| GCLK[4] | regional GCLK |
| GCLK[5] | regional GCLK |
| GCLK[6] | regional GCLK |
| GCLK[7] | regional GCLK |
| VCLK | regional LONG_V |
| ECLK_H | regional DEC_H |
| ECLK_V | regional LONG_V |
| BUFGE_H | regional DEC_H |
| BUFGE_V[0] | regional BUFGE_V |
| BUFGE_V[1] | regional BUFGE_V |
| BUFGLS[0] | regional GLOBAL |
| BUFGLS[1] | regional GLOBAL |
| BUFGLS[2] | regional GLOBAL |
| BUFGLS[3] | regional GLOBAL |
| BUFGLS[4] | regional GLOBAL |
| BUFGLS[5] | regional GLOBAL |
| BUFGLS[6] | regional GLOBAL |
| BUFGLS[7] | regional GLOBAL |
| BUFGLS_H[0] | regional BUFGLS_H |
| BUFGLS_H[1] | regional BUFGLS_H |
| BUFGLS_H[2] | regional BUFGLS_H |
| BUFGLS_H[3] | regional BUFGLS_H |
| BUFGLS_H[4] | regional BUFGLS_H |
| BUFGLS_H[5] | regional BUFGLS_H |
| BUFGLS_H[6] | regional BUFGLS_H |
| BUFGLS_H[7] | regional BUFGLS_H |
| IMUX_CLB_F1 | mux |
| IMUX_CLB_F2 | mux |
| IMUX_CLB_F3 | mux |
| IMUX_CLB_F4 | mux |
| IMUX_CLB_G1 | mux |
| IMUX_CLB_G2 | mux |
| IMUX_CLB_G3 | mux |
| IMUX_CLB_G4 | mux |
| IMUX_CLB_C1 | mux |
| IMUX_CLB_C2 | mux |
| IMUX_CLB_C3 | mux |
| IMUX_CLB_C4 | mux |
| IMUX_CLB_F2_N | branch S |
| IMUX_CLB_G2_N | branch S |
| IMUX_CLB_C2_N | branch S |
| IMUX_CLB_F3_W | branch E |
| IMUX_CLB_G3_W | branch E |
| IMUX_CLB_C3_W | branch E |
| IMUX_CLB_K | mux |
| IMUX_TBUF_I[0] | mux |
| IMUX_TBUF_I[1] | mux |
| IMUX_TBUF_T[0] | mux |
| IMUX_TBUF_T[1] | mux |
| IMUX_IO_O1[0] | mux |
| IMUX_IO_O1[1] | mux |
| IMUX_IO_OK[0] | mux |
| IMUX_IO_OK[1] | mux |
| IMUX_IO_IK[0] | mux |
| IMUX_IO_IK[1] | mux |
| IMUX_IO_T[0] | mux |
| IMUX_IO_T[1] | mux |
| IMUX_HIO_O[0] | mux |
| IMUX_HIO_O[1] | mux |
| IMUX_HIO_O[2] | mux |
| IMUX_HIO_O[3] | mux |
| IMUX_HIO_T[0] | mux |
| IMUX_HIO_T[1] | mux |
| IMUX_HIO_T[2] | mux |
| IMUX_HIO_T[3] | mux |
| IMUX_CIN | mux |
| IMUX_STARTUP_CLK | mux |
| IMUX_STARTUP_GSR | mux |
| IMUX_STARTUP_GTS | mux |
| IMUX_READCLK_I | mux |
| IMUX_BUFG_H | mux |
| IMUX_BUFG_V | mux |
| IMUX_TDO_O | mux |
| IMUX_TDO_T | mux |
| IMUX_RDBK_TRIG | mux |
| IMUX_BSCAN_TDO1 | mux |
| IMUX_BSCAN_TDO2 | mux |
| OUT_CLB_X | bel |
| OUT_CLB_XQ | bel |
| OUT_CLB_Y | bel |
| OUT_CLB_YQ | bel |
| OUT_CLB_X_H | mux |
| OUT_CLB_XQ_H | mux |
| OUT_CLB_Y_H | mux |
| OUT_CLB_YQ_H | mux |
| OUT_CLB_X_V | mux |
| OUT_CLB_XQ_V | mux |
| OUT_CLB_Y_V | mux |
| OUT_CLB_YQ_V | mux |
| OUT_CLB_X_S | branch N |
| OUT_CLB_XQ_S | branch N |
| OUT_CLB_Y_E | branch W |
| OUT_CLB_YQ_E | branch W |
| OUT_IO_SN_I1[0] | bel |
| OUT_IO_SN_I1[1] | bel |
| OUT_IO_SN_I2[0] | bel |
| OUT_IO_SN_I2[1] | bel |
| OUT_IO_SN_I1_E1 | branch W |
| OUT_IO_SN_I2_E1 | branch W |
| OUT_IO_WE_I1[0] | bel |
| OUT_IO_WE_I1[1] | bel |
| OUT_IO_WE_I2[0] | bel |
| OUT_IO_WE_I2[1] | bel |
| OUT_IO_WE_I1_S1 | branch N |
| OUT_IO_WE_I2_S1 | branch N |
| OUT_HIO_I[0] | bel |
| OUT_HIO_I[1] | bel |
| OUT_HIO_I[2] | bel |
| OUT_HIO_I[3] | bel |
| OUT_IO_CLKIN | bel |
| OUT_IO_CLKIN_W | branch E |
| OUT_IO_CLKIN_E | branch W |
| OUT_IO_CLKIN_S | branch N |
| OUT_IO_CLKIN_N | branch S |
| OUT_OSC_MUX1 | bel |
| OUT_STARTUP_DONEIN | bel |
| OUT_STARTUP_Q1Q4 | bel |
| OUT_STARTUP_Q2 | bel |
| OUT_STARTUP_Q3 | bel |
| OUT_UPDATE_O | bel |
| OUT_MD0_I | bel |
| OUT_RDBK_DATA | bel |
| OUT_COUT | bel |
| OUT_COUT_E | branch W |
| OUT_BUFGE_H | mux |
| OUT_BUFGE_V | mux |
| OUT_BUFF | mux |
Connectors — W
| Wire | PASS_W | PASS_CLB_W_W | CNR_SW |
|---|---|---|---|
| SINGLE_H_E[0] | → SINGLE_H[0] | → SINGLE_H[0] | - |
| SINGLE_H_E[1] | → SINGLE_H[1] | → SINGLE_H[1] | - |
| SINGLE_H_E[2] | → SINGLE_H[2] | → SINGLE_H[2] | - |
| SINGLE_H_E[3] | → SINGLE_H[3] | → SINGLE_H[3] | - |
| SINGLE_H_E[4] | → SINGLE_H[4] | → SINGLE_H[4] | - |
| SINGLE_H_E[5] | → SINGLE_H[5] | → SINGLE_H[5] | - |
| SINGLE_H_E[6] | → SINGLE_H[6] | → SINGLE_H[6] | - |
| SINGLE_H_E[7] | → SINGLE_H[7] | → SINGLE_H[7] | - |
| DOUBLE_H1[0] | → DOUBLE_H0[0] | → DOUBLE_H0[0] | - |
| DOUBLE_H1[1] | → DOUBLE_H0[1] | → DOUBLE_H0[1] | - |
| DOUBLE_H2[0] | → DOUBLE_H1[0] | → DOUBLE_H1[0] | - |
| DOUBLE_H2[1] | → DOUBLE_H1[1] | → DOUBLE_H1[1] | - |
| DOUBLE_IO_S0[0] | - | - | - |
| DOUBLE_IO_S0[1] | - | - | - |
| DOUBLE_IO_S0[2] | - | - | - |
| DOUBLE_IO_S0[3] | - | - | - |
| DOUBLE_IO_S1[0] | → DOUBLE_IO_S0[0] | → DOUBLE_IO_S0[0] | ← DOUBLE_IO_W1[0] |
| DOUBLE_IO_S1[1] | → DOUBLE_IO_S0[1] | → DOUBLE_IO_S0[1] | ← DOUBLE_IO_W1[1] |
| DOUBLE_IO_S1[2] | → DOUBLE_IO_S0[2] | → DOUBLE_IO_S0[2] | ← DOUBLE_IO_W1[2] |
| DOUBLE_IO_S1[3] | → DOUBLE_IO_S0[3] | → DOUBLE_IO_S0[3] | ← DOUBLE_IO_W1[3] |
| DOUBLE_IO_S2[0] | → DOUBLE_IO_S1[0] | → DOUBLE_IO_S1[0] | - |
| DOUBLE_IO_S2[1] | → DOUBLE_IO_S1[1] | → DOUBLE_IO_S1[1] | - |
| DOUBLE_IO_S2[2] | → DOUBLE_IO_S1[2] | → DOUBLE_IO_S1[2] | - |
| DOUBLE_IO_S2[3] | → DOUBLE_IO_S1[3] | → DOUBLE_IO_S1[3] | - |
| QUAD_H1[0] | → QUAD_H0[0] | → QUAD_H0[0] | - |
| QUAD_H1[1] | → QUAD_H0[1] | → QUAD_H0[1] | - |
| QUAD_H1[2] | → QUAD_H0[2] | → QUAD_H0[2] | - |
| QUAD_H2[0] | → QUAD_H1[0] | → QUAD_H1[0] | - |
| QUAD_H2[1] | → QUAD_H1[1] | → QUAD_H1[1] | - |
| QUAD_H2[2] | → QUAD_H1[2] | → QUAD_H1[2] | - |
| QUAD_H3[0] | → QUAD_H2[0] | → QUAD_H2[0] | - |
| QUAD_H3[1] | → QUAD_H2[1] | → QUAD_H2[1] | - |
| QUAD_H3[2] | → QUAD_H2[2] | → QUAD_H2[2] | - |
| QUAD_H4[0] | → QUAD_H3[0] | → QUAD_H3[0] | - |
| QUAD_H4[1] | → QUAD_H3[1] | → QUAD_H3[1] | - |
| QUAD_H4[2] | → QUAD_H3[2] | → QUAD_H3[2] | - |
| OCTAL_H[1] | → OCTAL_H[0] | → OCTAL_H[0] | - |
| OCTAL_H[2] | → OCTAL_H[1] | → OCTAL_H[1] | - |
| OCTAL_H[3] | → OCTAL_H[2] | → OCTAL_H[2] | - |
| OCTAL_H[4] | → OCTAL_H[3] | → OCTAL_H[3] | - |
| OCTAL_H[5] | → OCTAL_H[4] | → OCTAL_H[4] | - |
| OCTAL_H[6] | → OCTAL_H[5] | → OCTAL_H[5] | - |
| OCTAL_H[7] | → OCTAL_H[6] | → OCTAL_H[6] | - |
| OCTAL_H[8] | → OCTAL_H[7] | → OCTAL_H[7] | - |
| OCTAL_IO_S[0] | - | - | ← OCTAL_IO_W[1] |
| OCTAL_IO_S[1] | → OCTAL_IO_S[0] | → OCTAL_IO_S[0] | ← OCTAL_IO_W[2] |
| OCTAL_IO_S[2] | → OCTAL_IO_S[1] | → OCTAL_IO_S[1] | ← OCTAL_IO_W[3] |
| OCTAL_IO_S[3] | → OCTAL_IO_S[2] | → OCTAL_IO_S[2] | ← OCTAL_IO_W[4] |
| OCTAL_IO_S[4] | → OCTAL_IO_S[3] | → OCTAL_IO_S[3] | ← OCTAL_IO_W[5] |
| OCTAL_IO_S[5] | → OCTAL_IO_S[4] | → OCTAL_IO_S[4] | ← OCTAL_IO_W[6] |
| OCTAL_IO_S[6] | → OCTAL_IO_S[5] | → OCTAL_IO_S[5] | ← OCTAL_IO_W[7] |
| OCTAL_IO_S[7] | → OCTAL_IO_S[6] | → OCTAL_IO_S[6] | ← OCTAL_IO_W[8] |
| OCTAL_IO_S[8] | → OCTAL_IO_S[7] | → OCTAL_IO_S[7] | - |
| OUT_CLB_Y_E | → OUT_CLB_Y_H | → OUT_IO_WE_I2[1] | - |
| OUT_CLB_YQ_E | → OUT_CLB_YQ_H | → OUT_IO_WE_I2[0] | - |
| OUT_IO_SN_I1_E1 | → OUT_IO_SN_I1[1] | → OUT_IO_SN_I1[1] | - |
| OUT_IO_SN_I2_E1 | → OUT_IO_SN_I2[1] | → OUT_IO_SN_I2[1] | - |
| OUT_IO_CLKIN_E | → OUT_IO_CLKIN | → OUT_IO_CLKIN | - |
| OUT_COUT_E | → OUT_COUT | → OUT_COUT | - |
Connectors — E
| Wire | PASS_E | CNR_NE |
|---|---|---|
| DOUBLE_IO_N0[0] | - | - |
| DOUBLE_IO_N0[1] | - | - |
| DOUBLE_IO_N0[2] | - | - |
| DOUBLE_IO_N0[3] | - | - |
| DOUBLE_IO_N1[0] | → DOUBLE_IO_N0[0] | ← DOUBLE_IO_E1[0] |
| DOUBLE_IO_N1[1] | → DOUBLE_IO_N0[1] | ← DOUBLE_IO_E1[1] |
| DOUBLE_IO_N1[2] | → DOUBLE_IO_N0[2] | ← DOUBLE_IO_E1[2] |
| DOUBLE_IO_N1[3] | → DOUBLE_IO_N0[3] | ← DOUBLE_IO_E1[3] |
| DOUBLE_IO_N2[0] | → DOUBLE_IO_N1[0] | - |
| DOUBLE_IO_N2[1] | → DOUBLE_IO_N1[1] | - |
| DOUBLE_IO_N2[2] | → DOUBLE_IO_N1[2] | - |
| DOUBLE_IO_N2[3] | → DOUBLE_IO_N1[3] | - |
| OCTAL_IO_N[0] | - | ← OCTAL_IO_E[1] |
| OCTAL_IO_N[1] | → OCTAL_IO_N[0] | ← OCTAL_IO_E[2] |
| OCTAL_IO_N[2] | → OCTAL_IO_N[1] | ← OCTAL_IO_E[3] |
| OCTAL_IO_N[3] | → OCTAL_IO_N[2] | ← OCTAL_IO_E[4] |
| OCTAL_IO_N[4] | → OCTAL_IO_N[3] | ← OCTAL_IO_E[5] |
| OCTAL_IO_N[5] | → OCTAL_IO_N[4] | ← OCTAL_IO_E[6] |
| OCTAL_IO_N[6] | → OCTAL_IO_N[5] | ← OCTAL_IO_E[7] |
| OCTAL_IO_N[7] | → OCTAL_IO_N[6] | ← OCTAL_IO_E[8] |
| OCTAL_IO_N[8] | → OCTAL_IO_N[7] | - |
| IMUX_CLB_F3_W | → IMUX_CLB_F3 | - |
| IMUX_CLB_G3_W | → IMUX_CLB_G3 | - |
| IMUX_CLB_C3_W | → IMUX_CLB_C3 | - |
| OUT_IO_CLKIN_W | → OUT_IO_CLKIN | - |
Connectors — S
| Wire | PASS_S | CNR_SE |
|---|---|---|
| DOUBLE_IO_E0[0] | - | - |
| DOUBLE_IO_E0[1] | - | - |
| DOUBLE_IO_E0[2] | - | - |
| DOUBLE_IO_E0[3] | - | - |
| DOUBLE_IO_E1[0] | → DOUBLE_IO_E0[0] | - |
| DOUBLE_IO_E1[1] | → DOUBLE_IO_E0[1] | - |
| DOUBLE_IO_E1[2] | → DOUBLE_IO_E0[2] | - |
| DOUBLE_IO_E1[3] | → DOUBLE_IO_E0[3] | - |
| DOUBLE_IO_E2[0] | → DOUBLE_IO_E1[0] | - |
| DOUBLE_IO_E2[1] | → DOUBLE_IO_E1[1] | - |
| DOUBLE_IO_E2[2] | → DOUBLE_IO_E1[2] | - |
| DOUBLE_IO_E2[3] | → DOUBLE_IO_E1[3] | - |
| OCTAL_IO_E[0] | - | ← OCTAL_IO_S[1] |
| OCTAL_IO_E[1] | → OCTAL_IO_E[0] | ← OCTAL_IO_S[2] |
| OCTAL_IO_E[2] | → OCTAL_IO_E[1] | ← OCTAL_IO_S[3] |
| OCTAL_IO_E[3] | → OCTAL_IO_E[2] | ← OCTAL_IO_S[4] |
| OCTAL_IO_E[4] | → OCTAL_IO_E[3] | ← OCTAL_IO_S[5] |
| OCTAL_IO_E[5] | → OCTAL_IO_E[4] | ← OCTAL_IO_S[6] |
| OCTAL_IO_E[6] | → OCTAL_IO_E[5] | ← OCTAL_IO_S[7] |
| OCTAL_IO_E[7] | → OCTAL_IO_E[6] | ← OCTAL_IO_S[8] |
| OCTAL_IO_E[8] | → OCTAL_IO_E[7] | - |
| IMUX_CLB_F2_N | → IMUX_CLB_F2 | - |
| IMUX_CLB_G2_N | → IMUX_CLB_G2 | - |
| IMUX_CLB_C2_N | → IMUX_CLB_C2 | - |
| OUT_IO_CLKIN_N | → OUT_IO_CLKIN | - |
Connectors — N
| Wire | PASS_N | PASS_CLB_N_N | CNR_NW |
|---|---|---|---|
| SINGLE_V_S[0] | → SINGLE_V[0] | → SINGLE_V[0] | - |
| SINGLE_V_S[1] | → SINGLE_V[1] | → SINGLE_V[1] | - |
| SINGLE_V_S[2] | → SINGLE_V[2] | → SINGLE_V[2] | - |
| SINGLE_V_S[3] | → SINGLE_V[3] | → SINGLE_V[3] | - |
| SINGLE_V_S[4] | → SINGLE_V[4] | → SINGLE_V[4] | - |
| SINGLE_V_S[5] | → SINGLE_V[5] | → SINGLE_V[5] | - |
| SINGLE_V_S[6] | → SINGLE_V[6] | → SINGLE_V[6] | - |
| SINGLE_V_S[7] | → SINGLE_V[7] | → SINGLE_V[7] | - |
| DOUBLE_V1[0] | → DOUBLE_V0[0] | → DOUBLE_V0[0] | - |
| DOUBLE_V1[1] | → DOUBLE_V0[1] | → DOUBLE_V0[1] | - |
| DOUBLE_V2[0] | → DOUBLE_V1[0] | → DOUBLE_V1[0] | - |
| DOUBLE_V2[1] | → DOUBLE_V1[1] | → DOUBLE_V1[1] | - |
| DOUBLE_IO_W0[0] | - | - | ← DOUBLE_IO_N1[0] |
| DOUBLE_IO_W0[1] | - | - | ← DOUBLE_IO_N1[1] |
| DOUBLE_IO_W0[2] | - | - | ← DOUBLE_IO_N1[2] |
| DOUBLE_IO_W0[3] | - | - | ← DOUBLE_IO_N1[3] |
| DOUBLE_IO_W1[0] | → DOUBLE_IO_W0[0] | → DOUBLE_IO_W0[0] | ← DOUBLE_IO_N2[0] |
| DOUBLE_IO_W1[1] | → DOUBLE_IO_W0[1] | → DOUBLE_IO_W0[1] | ← DOUBLE_IO_N2[1] |
| DOUBLE_IO_W1[2] | → DOUBLE_IO_W0[2] | → DOUBLE_IO_W0[2] | ← DOUBLE_IO_N2[2] |
| DOUBLE_IO_W1[3] | → DOUBLE_IO_W0[3] | → DOUBLE_IO_W0[3] | ← DOUBLE_IO_N2[3] |
| DOUBLE_IO_W2[0] | → DOUBLE_IO_W1[0] | → DOUBLE_IO_W1[0] | - |
| DOUBLE_IO_W2[1] | → DOUBLE_IO_W1[1] | → DOUBLE_IO_W1[1] | - |
| DOUBLE_IO_W2[2] | → DOUBLE_IO_W1[2] | → DOUBLE_IO_W1[2] | - |
| DOUBLE_IO_W2[3] | → DOUBLE_IO_W1[3] | → DOUBLE_IO_W1[3] | - |
| QUAD_V1[0] | → QUAD_V0[0] | → QUAD_V0[0] | - |
| QUAD_V1[1] | → QUAD_V0[1] | → QUAD_V0[1] | - |
| QUAD_V1[2] | → QUAD_V0[2] | → QUAD_V0[2] | - |
| QUAD_V2[0] | → QUAD_V1[0] | → QUAD_V1[0] | - |
| QUAD_V2[1] | → QUAD_V1[1] | → QUAD_V1[1] | - |
| QUAD_V2[2] | → QUAD_V1[2] | → QUAD_V1[2] | - |
| QUAD_V3[0] | → QUAD_V2[0] | → QUAD_V2[0] | - |
| QUAD_V3[1] | → QUAD_V2[1] | → QUAD_V2[1] | - |
| QUAD_V3[2] | → QUAD_V2[2] | → QUAD_V2[2] | - |
| QUAD_V4[0] | → QUAD_V3[0] | → QUAD_V3[0] | - |
| QUAD_V4[1] | → QUAD_V3[1] | → QUAD_V3[1] | - |
| QUAD_V4[2] | → QUAD_V3[2] | → QUAD_V3[2] | - |
| OCTAL_V[1] | → OCTAL_V[0] | → OCTAL_V[0] | - |
| OCTAL_V[2] | → OCTAL_V[1] | → OCTAL_V[1] | - |
| OCTAL_V[3] | → OCTAL_V[2] | → OCTAL_V[2] | - |
| OCTAL_V[4] | → OCTAL_V[3] | → OCTAL_V[3] | - |
| OCTAL_V[5] | → OCTAL_V[4] | → OCTAL_V[4] | - |
| OCTAL_V[6] | → OCTAL_V[5] | → OCTAL_V[5] | - |
| OCTAL_V[7] | → OCTAL_V[6] | → OCTAL_V[6] | - |
| OCTAL_V[8] | → OCTAL_V[7] | → OCTAL_V[7] | - |
| OCTAL_IO_W[0] | - | - | ← OCTAL_IO_N[1] |
| OCTAL_IO_W[1] | → OCTAL_IO_W[0] | → OCTAL_IO_W[0] | ← OCTAL_IO_N[2] |
| OCTAL_IO_W[2] | → OCTAL_IO_W[1] | → OCTAL_IO_W[1] | ← OCTAL_IO_N[3] |
| OCTAL_IO_W[3] | → OCTAL_IO_W[2] | → OCTAL_IO_W[2] | ← OCTAL_IO_N[4] |
| OCTAL_IO_W[4] | → OCTAL_IO_W[3] | → OCTAL_IO_W[3] | ← OCTAL_IO_N[5] |
| OCTAL_IO_W[5] | → OCTAL_IO_W[4] | → OCTAL_IO_W[4] | ← OCTAL_IO_N[6] |
| OCTAL_IO_W[6] | → OCTAL_IO_W[5] | → OCTAL_IO_W[5] | ← OCTAL_IO_N[7] |
| OCTAL_IO_W[7] | → OCTAL_IO_W[6] | → OCTAL_IO_W[6] | ← OCTAL_IO_N[8] |
| OCTAL_IO_W[8] | → OCTAL_IO_W[7] | → OCTAL_IO_W[7] | - |
| OUT_CLB_X_S | → OUT_CLB_X_V | → OUT_IO_SN_I2[0] | - |
| OUT_CLB_XQ_S | → OUT_CLB_XQ_V | → OUT_IO_SN_I2[1] | - |
| OUT_IO_WE_I1_S1 | → OUT_IO_WE_I1[1] | → OUT_IO_WE_I1[1] | - |
| OUT_IO_WE_I2_S1 | → OUT_IO_WE_I2[1] | → OUT_IO_WE_I2[1] | - |
| OUT_IO_CLKIN_S | → OUT_IO_CLKIN | → OUT_IO_CLKIN | - |