Bitstream structure

The raw XPLA3 bitstream is a three-dimensional array of bits. The bitstream is arranged into:

  • fb_rows * 52 + 2 rows

  • 2 planes

  • bs_cols columns

The fb_rows and bs_cols variables are per-device and can be obtained from the database.

The bitstream is roughly divided into areas as follows:

  • the last row is used to store the UES (user electronic signature)

  • the second to last row is used to store the READ_PROT and ISP_DISABLE bits, which should generally be programmed last in the sequence

  • all other rows are used to store (mostly) per-FB data, with 52 bitstream rows per FB row

    • each FB column has three ranges of columns, the start of each range is stored in the database:

      • IMUX bits (includes per-FB input multiplexers and the per-column ZIA_GCLK*_ENABLE bits)

      • PT bits (includes product term bits and PLA sum term bits)

      • MC bits (includes per-MC config bits and misc per-FB config bits; also includes global bits configuring UCT muxes)

JED structure

XPLA3 bitstreams are commonly stored in JED files. Bits in JED files are stored in a logical order completely unrelated to the physical structure of a bitstream. The order of bits in a JED file is as follows:

  • per-FB bits, for every FB i in order:

    • IMUX bits, for every j < 40:

      • every bit of FB[i].IM[j].MUX in order

    • for every product term j < 48, in order:

      • for every FB input k < 40, in order:

        • FB[i].PT[i].IM[k].P

        • FB[i].PT[i].IM[k].N

      • for every feedback term k < 8, in order:

        • FB[i].PT[i].FBN[k]

    • for every product term j < 48, in order:

      • for every macrocell k < 16, in order:

        • FB[i].MC[k].SUM.PT[j]

    • misc per-FB bits, in order given below

    • for every macrocell with an IOB, in order (which macrocells have a IOB can be checked in the database io_mcs field):

    • for every macrocell without an IOB, in order:

  • all global bits, in order given in the per-device database

Note that the UES bits and read protection bit are not included in the JED file, and must be provided out of band.

Fuses — IMUX bits

The size of every FB[i].IM[j].MUX fuse set in the device is the same, and is given by the database imux_width field. The position of bit k of FB[i].IM[j].MUX in the fuse array can be computed as follows:

  • row is: - if j < 20: fb_row(i) * 52 + 2 + j - if j >= 20: fb_row(i) * 52 + 2 + j + 8

  • plane is: (i & 1) ^ 1

  • column is fb_cols[fb_col(i)].imux_col + imux_width - 1 - k

Fuses — product and sum terms

The position of FB[i].PT[j].IM[k].P and FB[i].PT[j].IM[k].N can be computed as follows:

  • row is: - if k < 20: fb_row(i) * 52 + 2 + k - if k >= 20: fb_row(i) * 52 + 2 + k + 8

  • plane is 0 for .P bit, 1 for .N bit

  • column is: - if i is even: fb_cols[fb_col(i)].pt_col + j - if i is odd: fb_cols[fb_col(i)].pt_col + 95 - j

The position of FB[i].PT[j].FBN[k] can be computed as follows:

  • row is fb_row(i) * 52 + dr, where dr is given in the table below

  • plane is given in the table below

  • column is: - if i is even: fb_cols[fb_col(i)].pt_col + j - if i is odd: fb_cols[fb_col(i)].pt_col + 95 - j

k

dr

plane

0

0

1

1

0

0

2

1

1

3

1

0

4

50

0

5

50

1

6

51

0

7

51

1

The position of FB[i].MC[j].SUM.PT[k] can be computed as follows:

  • row is fb_row(i) * 52 + 22 + (j // 2)

  • plane is 1 - (j % 2)

  • column is: - if i is even: fb_cols[fb_col(i)].pt_col + k - if i is odd: fb_cols[fb_col(i)].pt_col + 95 - k

Fuses — macrocells

The per-MC bits are listed in the table below. The per-MC coordinates should be translated to global coordinates as follows:

  • row is: if mc < 8: fb_row(fb) * 52 + mc * 3 + table_row if mc >= 8: fb_row(fb) * 52 + 4 + mc * 3 + table_row

  • plane is: table_plane

  • column is: - if fb is even: fb_cols[fb_col(fb)].mc_col + table_column - if fb is odd: fb_cols[fb_col(fb)].mc_col + 9 - table_column

RowPlaneColumn
01234
00 XXXX-
01 XXXXX
10 XXXX-
11 XXXXX
20 XXXX-
21 XXXXX
IOB_SLEW[0, 0, 0]
FAST0
SLOW1
OE_MUX[0, 0, 3][0, 0, 2][0, 0, 1]
GND000
LCT0001
LCT1010
LCT2011
LCT6100
UCT0101
VCC110
PULLUP111
LUT[0, 1, 3][0, 1, 2][0, 1, 1][0, 1, 0]
Non-inverted[3][2][1][0]
MC_IOB_MUX[0, 1, 4]
REG0
LUT1
REG_D_IREG[1, 0, 0]
Non-inverted[0]
REG_D_SHIFT_DIR[1, 0, 1]
UP0
DOWN1
IOB_ZIA_MUX[1, 0, 2]
REG0
IBUF1
REG_D_SHIFT[1, 0, 3]
Non-inverted[0]
CLK_MUX[1, 1, 2][1, 1, 1][1, 1, 0]
FCLK0000
FCLK1001
PT010
LCT4011
LCT5100
LCT6101
LCT7110
UCT3111
CE_MUX[1, 1, 3]
LCT40
PT1
CLK_INV[1, 1, 4]
Non-inverted[0]
SET_MUX[2, 0, 2][2, 0, 1][2, 0, 0]
LCT0000
LCT1001
LCT2010
LCT3011
LCT4100
LCT5101
UCT2110
GND111
MC_ZIA_MUX[2, 0, 3]
REG0
LUT1
RST_MUX[2, 1, 2][2, 1, 1][2, 1, 0]
LCT0000
LCT1001
LCT2010
LCT3011
LCT4100
LCT5101
UCT1110
GND111
REG_MODE[2, 1, 4][2, 1, 3]
DFF00
TFF01
LATCH10
DFFCE11

JED mapping — macrocells with IOB

JED offsetBit
0MC_IOB_MUX
1LUT[0]
2LUT[1]
3LUT[2]
4LUT[3]
5IOB_SLEW
6OE_MUX[0]
7OE_MUX[1]
8OE_MUX[2]
9CE_MUX
10CLK_INV
11CLK_MUX[0]
12CLK_MUX[1]
13CLK_MUX[2]
14REG_D_IREG
15REG_D_SHIFT_DIR
16REG_D_SHIFT
17IOB_ZIA_MUX
18RST_MUX[0]
19RST_MUX[1]
20RST_MUX[2]
21SET_MUX[0]
22SET_MUX[1]
23SET_MUX[2]
24REG_MODE[0]
25REG_MODE[1]
26MC_ZIA_MUX

JED mapping — macrocells without IOB

JED offsetBit
0LUT[0]
1LUT[1]
2LUT[2]
3LUT[3]
4CE_MUX
5CLK_INV
6CLK_MUX[0]
7CLK_MUX[1]
8CLK_MUX[2]
9REG_D_IREG
10REG_D_SHIFT_DIR
11REG_D_SHIFT
12RST_MUX[0]
13RST_MUX[1]
14RST_MUX[2]
15SET_MUX[0]
16SET_MUX[1]
17SET_MUX[2]
18REG_MODE[0]
19REG_MODE[1]
20MC_ZIA_MUX

Fuses — FBs

The per-FB bits are listed in the table below. The per-FB coordinates should be translated to global coordinates as follows:

  • row is: fb_row(fb) * 52 + 24 + table_row

  • plane is: table_plane

  • column is: - if fb is even: fb_cols[fb_col(fb)].mc_col + table_column - if fb is odd: fb_cols[fb_col(fb)].mc_col + 9 - table_column

RowPlaneColumn
0123
00 XXXX
10 XXXX
20 XXXX
LCT0_INV[0, 0, 0]
Inverted~[0]
LCT1_INV[0, 0, 1]
Inverted~[0]
LCT2_INV[0, 0, 2]
Inverted~[0]
LCT3_INV[0, 0, 3]
Inverted~[0]
LCT4_INV[1, 0, 0]
Inverted~[0]
LCT5_INV[1, 0, 1]
Inverted~[0]
LCT6_INV[1, 0, 2]
Inverted~[0]
LCT7_INV[1, 0, 3]
Inverted~[0]
FCLK_MUX[2, 0, 3][2, 0, 2][2, 0, 1][2, 0, 0]
GCLK0_GCLK10000
GCLK0_GCLK20001
GCLK0_NONE0010
GCLK0_GCLK30011
NONE_GCLK10100
GCLK1_GCLK20101
NONE0110
GCLK1_GCLK30111
NONE_GCLK31011
GCLK2_NONE1101
GCLK2_GCLK31111

JED mapping

JED offsetBit
0FCLK_MUX[0]
1FCLK_MUX[1]
2FCLK_MUX[2]
3FCLK_MUX[3]
4LCT0_INV
5LCT1_INV
6LCT2_INV
7LCT3_INV
8LCT4_INV
9LCT5_INV
10LCT6_INV
11LCT7_INV

Fuses — global bits

The global bits are given by their raw position in the per-device database.