Cells: 9
crosslink EBR bel EBR0
| Pin | Direction | Wires |
|---|
| ADA0 | input | TCELL0:IMUX_B2 |
| ADA1 | input | TCELL0:IMUX_B4 |
| ADA10 | input | TCELL0:IMUX_D5 |
| ADA11 | input | TCELL0:IMUX_B6 |
| ADA12 | input | TCELL0:IMUX_C7 |
| ADA2 | input | TCELL0:IMUX_D7 |
| ADA3 | input | TCELL0:IMUX_A7 |
| ADA4 | input | TCELL0:IMUX_C0 |
| ADA5 | input | TCELL0:IMUX_A1 |
| ADA6 | input | TCELL0:IMUX_C2 |
| ADA7 | input | TCELL0:IMUX_A3 |
| ADA8 | input | TCELL0:IMUX_D1 |
| ADA9 | input | TCELL0:IMUX_B0 |
| ADB0 | input | TCELL1:IMUX_D3 |
| ADB1 | input | TCELL1:IMUX_D7 |
| ADB10 | input | TCELL1:IMUX_D5 |
| ADB11 | input | TCELL1:IMUX_B6 |
| ADB12 | input | TCELL1:IMUX_C7 |
| ADB2 | input | TCELL1:IMUX_B4 |
| ADB3 | input | TCELL1:IMUX_A7 |
| ADB4 | input | TCELL1:IMUX_C0 |
| ADB5 | input | TCELL1:IMUX_A0 |
| ADB6 | input | TCELL1:IMUX_C4 |
| ADB7 | input | TCELL1:IMUX_A4 |
| ADB8 | input | TCELL1:IMUX_D1 |
| ADB9 | input | TCELL1:IMUX_B0 |
| CEA | input | TCELL0:IMUX_CE1 |
| CEB | input | TCELL1:IMUX_CE1 |
| CLKA | input | TCELL0:IMUX_CLK0 |
| CLKB | input | TCELL1:IMUX_CLK0 |
| CSA0 | input | TCELL0:IMUX_CE2 |
| CSA1 | input | TCELL0:IMUX_CE3 |
| CSA2 | input | TCELL1:IMUX_CE3 |
| CSB0 | input | TCELL1:IMUX_CE2 |
| CSB1 | input | TCELL2:IMUX_CE2 |
| CSB2 | input | TCELL2:IMUX_CE3 |
| DIA0 | input | TCELL0:IMUX_D0 |
| DIA1 | input | TCELL0:IMUX_B1 |
| DIA2 | input | TCELL0:IMUX_D2 |
| DIA3 | input | TCELL0:IMUX_B3 |
| DIA4 | input | TCELL0:IMUX_D4 |
| DIA5 | input | TCELL0:IMUX_B5 |
| DIA6 | input | TCELL0:IMUX_D6 |
| DIA7 | input | TCELL0:IMUX_B7 |
| DIA8 | input | TCELL1:IMUX_D0 |
| DIB0 | input | TCELL1:IMUX_B1 |
| DIB1 | input | TCELL1:IMUX_D2 |
| DIB2 | input | TCELL1:IMUX_B3 |
| DIB3 | input | TCELL1:IMUX_D4 |
| DIB4 | input | TCELL1:IMUX_B5 |
| DIB5 | input | TCELL1:IMUX_D6 |
| DIB6 | input | TCELL1:IMUX_B7 |
| DIB7 | input | TCELL2:IMUX_D0 |
| DIB8 | input | TCELL2:IMUX_B1 |
| DOA0 | output | TCELL0:OUT_F0 |
| DOA1 | output | TCELL0:OUT_F1 |
| DOA2 | output | TCELL0:OUT_F2 |
| DOA3 | output | TCELL0:OUT_F3 |
| DOA4 | output | TCELL0:OUT_F4 |
| DOA5 | output | TCELL0:OUT_F5 |
| DOA6 | output | TCELL0:OUT_F6 |
| DOA7 | output | TCELL0:OUT_F7 |
| DOA8 | output | TCELL1:OUT_F0 |
| DOB0 | output | TCELL1:OUT_F1 |
| DOB1 | output | TCELL1:OUT_F2 |
| DOB2 | output | TCELL1:OUT_F3 |
| DOB3 | output | TCELL1:OUT_F4 |
| DOB4 | output | TCELL1:OUT_F5 |
| DOB5 | output | TCELL1:OUT_F6 |
| DOB6 | output | TCELL1:OUT_F7 |
| DOB7 | output | TCELL2:OUT_F0 |
| DOB8 | output | TCELL2:OUT_F1 |
| OCEA | input | TCELL0:IMUX_CE0 |
| OCEB | input | TCELL1:IMUX_CE0 |
| RSTA | input | TCELL0:IMUX_LSR0 |
| RSTB | input | TCELL1:IMUX_LSR0 |
| WEA | input | TCELL0:IMUX_LSR1 |
| WEB | input | TCELL1:IMUX_LSR1 |
crosslink EBR bel EBR1
| Pin | Direction | Wires |
|---|
| ADA0 | input | TCELL2:IMUX_B2 |
| ADA1 | input | TCELL2:IMUX_B4 |
| ADA10 | input | TCELL2:IMUX_D5 |
| ADA11 | input | TCELL2:IMUX_B6 |
| ADA12 | input | TCELL2:IMUX_C7 |
| ADA2 | input | TCELL2:IMUX_D7 |
| ADA3 | input | TCELL2:IMUX_A7 |
| ADA4 | input | TCELL2:IMUX_C0 |
| ADA5 | input | TCELL2:IMUX_A1 |
| ADA6 | input | TCELL2:IMUX_C2 |
| ADA7 | input | TCELL2:IMUX_A3 |
| ADA8 | input | TCELL2:IMUX_D1 |
| ADA9 | input | TCELL2:IMUX_B0 |
| ADB0 | input | TCELL4:IMUX_D3 |
| ADB1 | input | TCELL4:IMUX_D7 |
| ADB10 | input | TCELL3:IMUX_D5 |
| ADB11 | input | TCELL3:IMUX_B6 |
| ADB12 | input | TCELL3:IMUX_C7 |
| ADB2 | input | TCELL4:IMUX_B2 |
| ADB3 | input | TCELL4:IMUX_A7 |
| ADB4 | input | TCELL3:IMUX_C0 |
| ADB5 | input | TCELL3:IMUX_A0 |
| ADB6 | input | TCELL3:IMUX_C4 |
| ADB7 | input | TCELL3:IMUX_A4 |
| ADB8 | input | TCELL3:IMUX_D1 |
| ADB9 | input | TCELL3:IMUX_B0 |
| CEA | input | TCELL2:IMUX_CE1 |
| CEB | input | TCELL3:IMUX_CE1 |
| CLKA | input | TCELL2:IMUX_CLK0 |
| CLKB | input | TCELL3:IMUX_CLK0 |
| CSA0 | input | TCELL3:IMUX_CE2 |
| CSA1 | input | TCELL3:IMUX_CE3 |
| CSA2 | input | TCELL4:IMUX_CLK0 |
| CSB0 | input | TCELL4:IMUX_CE0 |
| CSB1 | input | TCELL4:IMUX_CE1 |
| CSB2 | input | TCELL4:IMUX_LSR0 |
| DIA0 | input | TCELL2:IMUX_D2 |
| DIA1 | input | TCELL2:IMUX_B3 |
| DIA2 | input | TCELL2:IMUX_D4 |
| DIA3 | input | TCELL2:IMUX_B5 |
| DIA4 | input | TCELL2:IMUX_D6 |
| DIA5 | input | TCELL2:IMUX_B7 |
| DIA6 | input | TCELL3:IMUX_D0 |
| DIA7 | input | TCELL3:IMUX_B1 |
| DIA8 | input | TCELL3:IMUX_D2 |
| DIB0 | input | TCELL3:IMUX_B3 |
| DIB1 | input | TCELL3:IMUX_D4 |
| DIB2 | input | TCELL3:IMUX_B5 |
| DIB3 | input | TCELL3:IMUX_D6 |
| DIB4 | input | TCELL3:IMUX_B7 |
| DIB5 | input | TCELL4:IMUX_D0 |
| DIB6 | input | TCELL4:IMUX_B1 |
| DIB7 | input | TCELL4:IMUX_D2 |
| DIB8 | input | TCELL4:IMUX_B3 |
| DOA0 | output | TCELL2:OUT_F2 |
| DOA1 | output | TCELL2:OUT_F3 |
| DOA2 | output | TCELL2:OUT_F4 |
| DOA3 | output | TCELL2:OUT_F5 |
| DOA4 | output | TCELL2:OUT_F6 |
| DOA5 | output | TCELL2:OUT_F7 |
| DOA6 | output | TCELL3:OUT_F0 |
| DOA7 | output | TCELL3:OUT_F1 |
| DOA8 | output | TCELL3:OUT_F2 |
| DOB0 | output | TCELL3:OUT_F3 |
| DOB1 | output | TCELL3:OUT_F4 |
| DOB2 | output | TCELL3:OUT_F5 |
| DOB3 | output | TCELL3:OUT_F6 |
| DOB4 | output | TCELL3:OUT_F7 |
| DOB5 | output | TCELL4:OUT_F0 |
| DOB6 | output | TCELL4:OUT_F1 |
| DOB7 | output | TCELL4:OUT_F2 |
| DOB8 | output | TCELL4:OUT_F3 |
| OCEA | input | TCELL2:IMUX_CE0 |
| OCEB | input | TCELL3:IMUX_CE0 |
| RSTA | input | TCELL2:IMUX_LSR0 |
| RSTB | input | TCELL3:IMUX_LSR0 |
| WEA | input | TCELL2:IMUX_LSR1 |
| WEB | input | TCELL3:IMUX_LSR1 |
crosslink EBR bel EBR2
| Pin | Direction | Wires |
|---|
| ADA0 | input | TCELL5:IMUX_D3 |
| ADA1 | input | TCELL5:IMUX_B4 |
| ADA10 | input | TCELL5:IMUX_D5 |
| ADA11 | input | TCELL5:IMUX_B6 |
| ADA12 | input | TCELL5:IMUX_C7 |
| ADA2 | input | TCELL5:IMUX_D7 |
| ADA3 | input | TCELL5:IMUX_A7 |
| ADA4 | input | TCELL5:IMUX_C0 |
| ADA5 | input | TCELL5:IMUX_A1 |
| ADA6 | input | TCELL5:IMUX_C2 |
| ADA7 | input | TCELL5:IMUX_A3 |
| ADA8 | input | TCELL5:IMUX_D1 |
| ADA9 | input | TCELL5:IMUX_B1 |
| ADB0 | input | TCELL6:IMUX_D3 |
| ADB1 | input | TCELL6:IMUX_D7 |
| ADB10 | input | TCELL6:IMUX_D5 |
| ADB11 | input | TCELL6:IMUX_B6 |
| ADB12 | input | TCELL6:IMUX_C7 |
| ADB2 | input | TCELL6:IMUX_B4 |
| ADB3 | input | TCELL6:IMUX_A7 |
| ADB4 | input | TCELL6:IMUX_C0 |
| ADB5 | input | TCELL6:IMUX_A0 |
| ADB6 | input | TCELL6:IMUX_C4 |
| ADB7 | input | TCELL6:IMUX_A4 |
| ADB8 | input | TCELL6:IMUX_D1 |
| ADB9 | input | TCELL6:IMUX_B0 |
| CEA | input | TCELL5:IMUX_CE1 |
| CEB | input | TCELL6:IMUX_CE1 |
| CLKA | input | TCELL5:IMUX_CLK0 |
| CLKB | input | TCELL6:IMUX_CLK0 |
| CSA0 | input | TCELL4:IMUX_CE2 |
| CSA1 | input | TCELL4:IMUX_CE3 |
| CSA2 | input | TCELL4:IMUX_CLK1 |
| CSB0 | input | TCELL5:IMUX_CE2 |
| CSB1 | input | TCELL5:IMUX_CE3 |
| CSB2 | input | TCELL4:IMUX_LSR1 |
| DIA0 | input | TCELL4:IMUX_D4 |
| DIA1 | input | TCELL4:IMUX_B5 |
| DIA2 | input | TCELL4:IMUX_D6 |
| DIA3 | input | TCELL4:IMUX_B7 |
| DIA4 | input | TCELL5:IMUX_D0 |
| DIA5 | input | TCELL5:IMUX_B0 |
| DIA6 | input | TCELL5:IMUX_D2 |
| DIA7 | input | TCELL5:IMUX_B2 |
| DIA8 | input | TCELL5:IMUX_D4 |
| DIB0 | input | TCELL5:IMUX_B5 |
| DIB1 | input | TCELL5:IMUX_D6 |
| DIB2 | input | TCELL5:IMUX_B7 |
| DIB3 | input | TCELL6:IMUX_D0 |
| DIB4 | input | TCELL6:IMUX_B1 |
| DIB5 | input | TCELL6:IMUX_D2 |
| DIB6 | input | TCELL6:IMUX_B3 |
| DIB7 | input | TCELL6:IMUX_D4 |
| DIB8 | input | TCELL6:IMUX_B5 |
| DOA0 | output | TCELL4:OUT_F4 |
| DOA1 | output | TCELL4:OUT_F5 |
| DOA2 | output | TCELL4:OUT_F6 |
| DOA3 | output | TCELL4:OUT_F7 |
| DOA4 | output | TCELL5:OUT_F0 |
| DOA5 | output | TCELL5:OUT_F1 |
| DOA6 | output | TCELL5:OUT_F2 |
| DOA7 | output | TCELL5:OUT_F3 |
| DOA8 | output | TCELL5:OUT_F4 |
| DOB0 | output | TCELL5:OUT_F5 |
| DOB1 | output | TCELL5:OUT_F6 |
| DOB2 | output | TCELL5:OUT_F7 |
| DOB3 | output | TCELL6:OUT_F0 |
| DOB4 | output | TCELL6:OUT_F1 |
| DOB5 | output | TCELL6:OUT_F2 |
| DOB6 | output | TCELL6:OUT_F3 |
| DOB7 | output | TCELL6:OUT_F4 |
| DOB8 | output | TCELL6:OUT_F5 |
| OCEA | input | TCELL5:IMUX_CE0 |
| OCEB | input | TCELL6:IMUX_CE0 |
| RSTA | input | TCELL5:IMUX_LSR0 |
| RSTB | input | TCELL6:IMUX_LSR0 |
| WEA | input | TCELL5:IMUX_LSR1 |
| WEB | input | TCELL6:IMUX_LSR1 |
crosslink EBR bel EBR3
| Pin | Direction | Wires |
|---|
| ADA0 | input | TCELL7:IMUX_B2 |
| ADA1 | input | TCELL7:IMUX_B4 |
| ADA10 | input | TCELL7:IMUX_D5 |
| ADA11 | input | TCELL7:IMUX_B6 |
| ADA12 | input | TCELL7:IMUX_C7 |
| ADA2 | input | TCELL7:IMUX_D7 |
| ADA3 | input | TCELL7:IMUX_A7 |
| ADA4 | input | TCELL7:IMUX_C0 |
| ADA5 | input | TCELL7:IMUX_A1 |
| ADA6 | input | TCELL7:IMUX_C2 |
| ADA7 | input | TCELL7:IMUX_A3 |
| ADA8 | input | TCELL7:IMUX_D1 |
| ADA9 | input | TCELL7:IMUX_B0 |
| ADB0 | input | TCELL8:IMUX_D3 |
| ADB1 | input | TCELL8:IMUX_D7 |
| ADB10 | input | TCELL8:IMUX_D5 |
| ADB11 | input | TCELL8:IMUX_B6 |
| ADB12 | input | TCELL8:IMUX_C7 |
| ADB2 | input | TCELL8:IMUX_B4 |
| ADB3 | input | TCELL8:IMUX_A7 |
| ADB4 | input | TCELL8:IMUX_C0 |
| ADB5 | input | TCELL8:IMUX_A0 |
| ADB6 | input | TCELL8:IMUX_C4 |
| ADB7 | input | TCELL8:IMUX_A4 |
| ADB8 | input | TCELL8:IMUX_D1 |
| ADB9 | input | TCELL8:IMUX_B0 |
| CEA | input | TCELL7:IMUX_CE1 |
| CEB | input | TCELL8:IMUX_CE1 |
| CLKA | input | TCELL7:IMUX_CLK0 |
| CLKB | input | TCELL8:IMUX_CLK0 |
| CSA0 | input | TCELL7:IMUX_CE2 |
| CSA1 | input | TCELL6:IMUX_CE2 |
| CSA2 | input | TCELL6:IMUX_CE3 |
| CSB0 | input | TCELL8:IMUX_CE2 |
| CSB1 | input | TCELL8:IMUX_CE3 |
| CSB2 | input | TCELL7:IMUX_CE3 |
| DIA0 | input | TCELL6:IMUX_D6 |
| DIA1 | input | TCELL6:IMUX_B7 |
| DIA2 | input | TCELL7:IMUX_D0 |
| DIA3 | input | TCELL7:IMUX_B1 |
| DIA4 | input | TCELL7:IMUX_D2 |
| DIA5 | input | TCELL7:IMUX_B3 |
| DIA6 | input | TCELL7:IMUX_D4 |
| DIA7 | input | TCELL7:IMUX_B5 |
| DIA8 | input | TCELL7:IMUX_D6 |
| DIB0 | input | TCELL7:IMUX_B7 |
| DIB1 | input | TCELL8:IMUX_D0 |
| DIB2 | input | TCELL8:IMUX_B1 |
| DIB3 | input | TCELL8:IMUX_D2 |
| DIB4 | input | TCELL8:IMUX_B3 |
| DIB5 | input | TCELL8:IMUX_D4 |
| DIB6 | input | TCELL8:IMUX_B5 |
| DIB7 | input | TCELL8:IMUX_D6 |
| DIB8 | input | TCELL8:IMUX_B7 |
| DOA0 | output | TCELL6:OUT_F6 |
| DOA1 | output | TCELL6:OUT_F7 |
| DOA2 | output | TCELL7:OUT_F0 |
| DOA3 | output | TCELL7:OUT_F1 |
| DOA4 | output | TCELL7:OUT_F2 |
| DOA5 | output | TCELL7:OUT_F3 |
| DOA6 | output | TCELL7:OUT_F4 |
| DOA7 | output | TCELL7:OUT_F5 |
| DOA8 | output | TCELL7:OUT_F6 |
| DOB0 | output | TCELL7:OUT_F7 |
| DOB1 | output | TCELL8:OUT_F0 |
| DOB2 | output | TCELL8:OUT_F1 |
| DOB3 | output | TCELL8:OUT_F2 |
| DOB4 | output | TCELL8:OUT_F3 |
| DOB5 | output | TCELL8:OUT_F4 |
| DOB6 | output | TCELL8:OUT_F5 |
| DOB7 | output | TCELL8:OUT_F6 |
| DOB8 | output | TCELL8:OUT_F7 |
| OCEA | input | TCELL7:IMUX_CE0 |
| OCEB | input | TCELL8:IMUX_CE0 |
| RSTA | input | TCELL7:IMUX_LSR0 |
| RSTB | input | TCELL8:IMUX_LSR0 |
| WEA | input | TCELL7:IMUX_LSR1 |
| WEB | input | TCELL8:IMUX_LSR1 |
crosslink EBR bel wires
| Wire | Pins |
|---|
| TCELL0:IMUX_A1 | EBR0.ADA5 |
| TCELL0:IMUX_A3 | EBR0.ADA7 |
| TCELL0:IMUX_A7 | EBR0.ADA3 |
| TCELL0:IMUX_B0 | EBR0.ADA9 |
| TCELL0:IMUX_B1 | EBR0.DIA1 |
| TCELL0:IMUX_B2 | EBR0.ADA0 |
| TCELL0:IMUX_B3 | EBR0.DIA3 |
| TCELL0:IMUX_B4 | EBR0.ADA1 |
| TCELL0:IMUX_B5 | EBR0.DIA5 |
| TCELL0:IMUX_B6 | EBR0.ADA11 |
| TCELL0:IMUX_B7 | EBR0.DIA7 |
| TCELL0:IMUX_C0 | EBR0.ADA4 |
| TCELL0:IMUX_C2 | EBR0.ADA6 |
| TCELL0:IMUX_C7 | EBR0.ADA12 |
| TCELL0:IMUX_D0 | EBR0.DIA0 |
| TCELL0:IMUX_D1 | EBR0.ADA8 |
| TCELL0:IMUX_D2 | EBR0.DIA2 |
| TCELL0:IMUX_D4 | EBR0.DIA4 |
| TCELL0:IMUX_D5 | EBR0.ADA10 |
| TCELL0:IMUX_D6 | EBR0.DIA6 |
| TCELL0:IMUX_D7 | EBR0.ADA2 |
| TCELL0:IMUX_CLK0 | EBR0.CLKA |
| TCELL0:IMUX_LSR0 | EBR0.RSTA |
| TCELL0:IMUX_LSR1 | EBR0.WEA |
| TCELL0:IMUX_CE0 | EBR0.OCEA |
| TCELL0:IMUX_CE1 | EBR0.CEA |
| TCELL0:IMUX_CE2 | EBR0.CSA0 |
| TCELL0:IMUX_CE3 | EBR0.CSA1 |
| TCELL0:OUT_F0 | EBR0.DOA0 |
| TCELL0:OUT_F1 | EBR0.DOA1 |
| TCELL0:OUT_F2 | EBR0.DOA2 |
| TCELL0:OUT_F3 | EBR0.DOA3 |
| TCELL0:OUT_F4 | EBR0.DOA4 |
| TCELL0:OUT_F5 | EBR0.DOA5 |
| TCELL0:OUT_F6 | EBR0.DOA6 |
| TCELL0:OUT_F7 | EBR0.DOA7 |
| TCELL1:IMUX_A0 | EBR0.ADB5 |
| TCELL1:IMUX_A4 | EBR0.ADB7 |
| TCELL1:IMUX_A7 | EBR0.ADB3 |
| TCELL1:IMUX_B0 | EBR0.ADB9 |
| TCELL1:IMUX_B1 | EBR0.DIB0 |
| TCELL1:IMUX_B3 | EBR0.DIB2 |
| TCELL1:IMUX_B4 | EBR0.ADB2 |
| TCELL1:IMUX_B5 | EBR0.DIB4 |
| TCELL1:IMUX_B6 | EBR0.ADB11 |
| TCELL1:IMUX_B7 | EBR0.DIB6 |
| TCELL1:IMUX_C0 | EBR0.ADB4 |
| TCELL1:IMUX_C4 | EBR0.ADB6 |
| TCELL1:IMUX_C7 | EBR0.ADB12 |
| TCELL1:IMUX_D0 | EBR0.DIA8 |
| TCELL1:IMUX_D1 | EBR0.ADB8 |
| TCELL1:IMUX_D2 | EBR0.DIB1 |
| TCELL1:IMUX_D3 | EBR0.ADB0 |
| TCELL1:IMUX_D4 | EBR0.DIB3 |
| TCELL1:IMUX_D5 | EBR0.ADB10 |
| TCELL1:IMUX_D6 | EBR0.DIB5 |
| TCELL1:IMUX_D7 | EBR0.ADB1 |
| TCELL1:IMUX_CLK0 | EBR0.CLKB |
| TCELL1:IMUX_LSR0 | EBR0.RSTB |
| TCELL1:IMUX_LSR1 | EBR0.WEB |
| TCELL1:IMUX_CE0 | EBR0.OCEB |
| TCELL1:IMUX_CE1 | EBR0.CEB |
| TCELL1:IMUX_CE2 | EBR0.CSB0 |
| TCELL1:IMUX_CE3 | EBR0.CSA2 |
| TCELL1:OUT_F0 | EBR0.DOA8 |
| TCELL1:OUT_F1 | EBR0.DOB0 |
| TCELL1:OUT_F2 | EBR0.DOB1 |
| TCELL1:OUT_F3 | EBR0.DOB2 |
| TCELL1:OUT_F4 | EBR0.DOB3 |
| TCELL1:OUT_F5 | EBR0.DOB4 |
| TCELL1:OUT_F6 | EBR0.DOB5 |
| TCELL1:OUT_F7 | EBR0.DOB6 |
| TCELL2:IMUX_A1 | EBR1.ADA5 |
| TCELL2:IMUX_A3 | EBR1.ADA7 |
| TCELL2:IMUX_A7 | EBR1.ADA3 |
| TCELL2:IMUX_B0 | EBR1.ADA9 |
| TCELL2:IMUX_B1 | EBR0.DIB8 |
| TCELL2:IMUX_B2 | EBR1.ADA0 |
| TCELL2:IMUX_B3 | EBR1.DIA1 |
| TCELL2:IMUX_B4 | EBR1.ADA1 |
| TCELL2:IMUX_B5 | EBR1.DIA3 |
| TCELL2:IMUX_B6 | EBR1.ADA11 |
| TCELL2:IMUX_B7 | EBR1.DIA5 |
| TCELL2:IMUX_C0 | EBR1.ADA4 |
| TCELL2:IMUX_C2 | EBR1.ADA6 |
| TCELL2:IMUX_C7 | EBR1.ADA12 |
| TCELL2:IMUX_D0 | EBR0.DIB7 |
| TCELL2:IMUX_D1 | EBR1.ADA8 |
| TCELL2:IMUX_D2 | EBR1.DIA0 |
| TCELL2:IMUX_D4 | EBR1.DIA2 |
| TCELL2:IMUX_D5 | EBR1.ADA10 |
| TCELL2:IMUX_D6 | EBR1.DIA4 |
| TCELL2:IMUX_D7 | EBR1.ADA2 |
| TCELL2:IMUX_CLK0 | EBR1.CLKA |
| TCELL2:IMUX_LSR0 | EBR1.RSTA |
| TCELL2:IMUX_LSR1 | EBR1.WEA |
| TCELL2:IMUX_CE0 | EBR1.OCEA |
| TCELL2:IMUX_CE1 | EBR1.CEA |
| TCELL2:IMUX_CE2 | EBR0.CSB1 |
| TCELL2:IMUX_CE3 | EBR0.CSB2 |
| TCELL2:OUT_F0 | EBR0.DOB7 |
| TCELL2:OUT_F1 | EBR0.DOB8 |
| TCELL2:OUT_F2 | EBR1.DOA0 |
| TCELL2:OUT_F3 | EBR1.DOA1 |
| TCELL2:OUT_F4 | EBR1.DOA2 |
| TCELL2:OUT_F5 | EBR1.DOA3 |
| TCELL2:OUT_F6 | EBR1.DOA4 |
| TCELL2:OUT_F7 | EBR1.DOA5 |
| TCELL3:IMUX_A0 | EBR1.ADB5 |
| TCELL3:IMUX_A4 | EBR1.ADB7 |
| TCELL3:IMUX_B0 | EBR1.ADB9 |
| TCELL3:IMUX_B1 | EBR1.DIA7 |
| TCELL3:IMUX_B3 | EBR1.DIB0 |
| TCELL3:IMUX_B5 | EBR1.DIB2 |
| TCELL3:IMUX_B6 | EBR1.ADB11 |
| TCELL3:IMUX_B7 | EBR1.DIB4 |
| TCELL3:IMUX_C0 | EBR1.ADB4 |
| TCELL3:IMUX_C4 | EBR1.ADB6 |
| TCELL3:IMUX_C7 | EBR1.ADB12 |
| TCELL3:IMUX_D0 | EBR1.DIA6 |
| TCELL3:IMUX_D1 | EBR1.ADB8 |
| TCELL3:IMUX_D2 | EBR1.DIA8 |
| TCELL3:IMUX_D4 | EBR1.DIB1 |
| TCELL3:IMUX_D5 | EBR1.ADB10 |
| TCELL3:IMUX_D6 | EBR1.DIB3 |
| TCELL3:IMUX_CLK0 | EBR1.CLKB |
| TCELL3:IMUX_LSR0 | EBR1.RSTB |
| TCELL3:IMUX_LSR1 | EBR1.WEB |
| TCELL3:IMUX_CE0 | EBR1.OCEB |
| TCELL3:IMUX_CE1 | EBR1.CEB |
| TCELL3:IMUX_CE2 | EBR1.CSA0 |
| TCELL3:IMUX_CE3 | EBR1.CSA1 |
| TCELL3:OUT_F0 | EBR1.DOA6 |
| TCELL3:OUT_F1 | EBR1.DOA7 |
| TCELL3:OUT_F2 | EBR1.DOA8 |
| TCELL3:OUT_F3 | EBR1.DOB0 |
| TCELL3:OUT_F4 | EBR1.DOB1 |
| TCELL3:OUT_F5 | EBR1.DOB2 |
| TCELL3:OUT_F6 | EBR1.DOB3 |
| TCELL3:OUT_F7 | EBR1.DOB4 |
| TCELL4:IMUX_A7 | EBR1.ADB3 |
| TCELL4:IMUX_B1 | EBR1.DIB6 |
| TCELL4:IMUX_B2 | EBR1.ADB2 |
| TCELL4:IMUX_B3 | EBR1.DIB8 |
| TCELL4:IMUX_B5 | EBR2.DIA1 |
| TCELL4:IMUX_B7 | EBR2.DIA3 |
| TCELL4:IMUX_D0 | EBR1.DIB5 |
| TCELL4:IMUX_D2 | EBR1.DIB7 |
| TCELL4:IMUX_D3 | EBR1.ADB0 |
| TCELL4:IMUX_D4 | EBR2.DIA0 |
| TCELL4:IMUX_D6 | EBR2.DIA2 |
| TCELL4:IMUX_D7 | EBR1.ADB1 |
| TCELL4:IMUX_CLK0 | EBR1.CSA2 |
| TCELL4:IMUX_CLK1 | EBR2.CSA2 |
| TCELL4:IMUX_LSR0 | EBR1.CSB2 |
| TCELL4:IMUX_LSR1 | EBR2.CSB2 |
| TCELL4:IMUX_CE0 | EBR1.CSB0 |
| TCELL4:IMUX_CE1 | EBR1.CSB1 |
| TCELL4:IMUX_CE2 | EBR2.CSA0 |
| TCELL4:IMUX_CE3 | EBR2.CSA1 |
| TCELL4:OUT_F0 | EBR1.DOB5 |
| TCELL4:OUT_F1 | EBR1.DOB6 |
| TCELL4:OUT_F2 | EBR1.DOB7 |
| TCELL4:OUT_F3 | EBR1.DOB8 |
| TCELL4:OUT_F4 | EBR2.DOA0 |
| TCELL4:OUT_F5 | EBR2.DOA1 |
| TCELL4:OUT_F6 | EBR2.DOA2 |
| TCELL4:OUT_F7 | EBR2.DOA3 |
| TCELL5:IMUX_A1 | EBR2.ADA5 |
| TCELL5:IMUX_A3 | EBR2.ADA7 |
| TCELL5:IMUX_A7 | EBR2.ADA3 |
| TCELL5:IMUX_B0 | EBR2.DIA5 |
| TCELL5:IMUX_B1 | EBR2.ADA9 |
| TCELL5:IMUX_B2 | EBR2.DIA7 |
| TCELL5:IMUX_B4 | EBR2.ADA1 |
| TCELL5:IMUX_B5 | EBR2.DIB0 |
| TCELL5:IMUX_B6 | EBR2.ADA11 |
| TCELL5:IMUX_B7 | EBR2.DIB2 |
| TCELL5:IMUX_C0 | EBR2.ADA4 |
| TCELL5:IMUX_C2 | EBR2.ADA6 |
| TCELL5:IMUX_C7 | EBR2.ADA12 |
| TCELL5:IMUX_D0 | EBR2.DIA4 |
| TCELL5:IMUX_D1 | EBR2.ADA8 |
| TCELL5:IMUX_D2 | EBR2.DIA6 |
| TCELL5:IMUX_D3 | EBR2.ADA0 |
| TCELL5:IMUX_D4 | EBR2.DIA8 |
| TCELL5:IMUX_D5 | EBR2.ADA10 |
| TCELL5:IMUX_D6 | EBR2.DIB1 |
| TCELL5:IMUX_D7 | EBR2.ADA2 |
| TCELL5:IMUX_CLK0 | EBR2.CLKA |
| TCELL5:IMUX_LSR0 | EBR2.RSTA |
| TCELL5:IMUX_LSR1 | EBR2.WEA |
| TCELL5:IMUX_CE0 | EBR2.OCEA |
| TCELL5:IMUX_CE1 | EBR2.CEA |
| TCELL5:IMUX_CE2 | EBR2.CSB0 |
| TCELL5:IMUX_CE3 | EBR2.CSB1 |
| TCELL5:OUT_F0 | EBR2.DOA4 |
| TCELL5:OUT_F1 | EBR2.DOA5 |
| TCELL5:OUT_F2 | EBR2.DOA6 |
| TCELL5:OUT_F3 | EBR2.DOA7 |
| TCELL5:OUT_F4 | EBR2.DOA8 |
| TCELL5:OUT_F5 | EBR2.DOB0 |
| TCELL5:OUT_F6 | EBR2.DOB1 |
| TCELL5:OUT_F7 | EBR2.DOB2 |
| TCELL6:IMUX_A0 | EBR2.ADB5 |
| TCELL6:IMUX_A4 | EBR2.ADB7 |
| TCELL6:IMUX_A7 | EBR2.ADB3 |
| TCELL6:IMUX_B0 | EBR2.ADB9 |
| TCELL6:IMUX_B1 | EBR2.DIB4 |
| TCELL6:IMUX_B3 | EBR2.DIB6 |
| TCELL6:IMUX_B4 | EBR2.ADB2 |
| TCELL6:IMUX_B5 | EBR2.DIB8 |
| TCELL6:IMUX_B6 | EBR2.ADB11 |
| TCELL6:IMUX_B7 | EBR3.DIA1 |
| TCELL6:IMUX_C0 | EBR2.ADB4 |
| TCELL6:IMUX_C4 | EBR2.ADB6 |
| TCELL6:IMUX_C7 | EBR2.ADB12 |
| TCELL6:IMUX_D0 | EBR2.DIB3 |
| TCELL6:IMUX_D1 | EBR2.ADB8 |
| TCELL6:IMUX_D2 | EBR2.DIB5 |
| TCELL6:IMUX_D3 | EBR2.ADB0 |
| TCELL6:IMUX_D4 | EBR2.DIB7 |
| TCELL6:IMUX_D5 | EBR2.ADB10 |
| TCELL6:IMUX_D6 | EBR3.DIA0 |
| TCELL6:IMUX_D7 | EBR2.ADB1 |
| TCELL6:IMUX_CLK0 | EBR2.CLKB |
| TCELL6:IMUX_LSR0 | EBR2.RSTB |
| TCELL6:IMUX_LSR1 | EBR2.WEB |
| TCELL6:IMUX_CE0 | EBR2.OCEB |
| TCELL6:IMUX_CE1 | EBR2.CEB |
| TCELL6:IMUX_CE2 | EBR3.CSA1 |
| TCELL6:IMUX_CE3 | EBR3.CSA2 |
| TCELL6:OUT_F0 | EBR2.DOB3 |
| TCELL6:OUT_F1 | EBR2.DOB4 |
| TCELL6:OUT_F2 | EBR2.DOB5 |
| TCELL6:OUT_F3 | EBR2.DOB6 |
| TCELL6:OUT_F4 | EBR2.DOB7 |
| TCELL6:OUT_F5 | EBR2.DOB8 |
| TCELL6:OUT_F6 | EBR3.DOA0 |
| TCELL6:OUT_F7 | EBR3.DOA1 |
| TCELL7:IMUX_A1 | EBR3.ADA5 |
| TCELL7:IMUX_A3 | EBR3.ADA7 |
| TCELL7:IMUX_A7 | EBR3.ADA3 |
| TCELL7:IMUX_B0 | EBR3.ADA9 |
| TCELL7:IMUX_B1 | EBR3.DIA3 |
| TCELL7:IMUX_B2 | EBR3.ADA0 |
| TCELL7:IMUX_B3 | EBR3.DIA5 |
| TCELL7:IMUX_B4 | EBR3.ADA1 |
| TCELL7:IMUX_B5 | EBR3.DIA7 |
| TCELL7:IMUX_B6 | EBR3.ADA11 |
| TCELL7:IMUX_B7 | EBR3.DIB0 |
| TCELL7:IMUX_C0 | EBR3.ADA4 |
| TCELL7:IMUX_C2 | EBR3.ADA6 |
| TCELL7:IMUX_C7 | EBR3.ADA12 |
| TCELL7:IMUX_D0 | EBR3.DIA2 |
| TCELL7:IMUX_D1 | EBR3.ADA8 |
| TCELL7:IMUX_D2 | EBR3.DIA4 |
| TCELL7:IMUX_D4 | EBR3.DIA6 |
| TCELL7:IMUX_D5 | EBR3.ADA10 |
| TCELL7:IMUX_D6 | EBR3.DIA8 |
| TCELL7:IMUX_D7 | EBR3.ADA2 |
| TCELL7:IMUX_CLK0 | EBR3.CLKA |
| TCELL7:IMUX_LSR0 | EBR3.RSTA |
| TCELL7:IMUX_LSR1 | EBR3.WEA |
| TCELL7:IMUX_CE0 | EBR3.OCEA |
| TCELL7:IMUX_CE1 | EBR3.CEA |
| TCELL7:IMUX_CE2 | EBR3.CSA0 |
| TCELL7:IMUX_CE3 | EBR3.CSB2 |
| TCELL7:OUT_F0 | EBR3.DOA2 |
| TCELL7:OUT_F1 | EBR3.DOA3 |
| TCELL7:OUT_F2 | EBR3.DOA4 |
| TCELL7:OUT_F3 | EBR3.DOA5 |
| TCELL7:OUT_F4 | EBR3.DOA6 |
| TCELL7:OUT_F5 | EBR3.DOA7 |
| TCELL7:OUT_F6 | EBR3.DOA8 |
| TCELL7:OUT_F7 | EBR3.DOB0 |
| TCELL8:IMUX_A0 | EBR3.ADB5 |
| TCELL8:IMUX_A4 | EBR3.ADB7 |
| TCELL8:IMUX_A7 | EBR3.ADB3 |
| TCELL8:IMUX_B0 | EBR3.ADB9 |
| TCELL8:IMUX_B1 | EBR3.DIB2 |
| TCELL8:IMUX_B3 | EBR3.DIB4 |
| TCELL8:IMUX_B4 | EBR3.ADB2 |
| TCELL8:IMUX_B5 | EBR3.DIB6 |
| TCELL8:IMUX_B6 | EBR3.ADB11 |
| TCELL8:IMUX_B7 | EBR3.DIB8 |
| TCELL8:IMUX_C0 | EBR3.ADB4 |
| TCELL8:IMUX_C4 | EBR3.ADB6 |
| TCELL8:IMUX_C7 | EBR3.ADB12 |
| TCELL8:IMUX_D0 | EBR3.DIB1 |
| TCELL8:IMUX_D1 | EBR3.ADB8 |
| TCELL8:IMUX_D2 | EBR3.DIB3 |
| TCELL8:IMUX_D3 | EBR3.ADB0 |
| TCELL8:IMUX_D4 | EBR3.DIB5 |
| TCELL8:IMUX_D5 | EBR3.ADB10 |
| TCELL8:IMUX_D6 | EBR3.DIB7 |
| TCELL8:IMUX_D7 | EBR3.ADB1 |
| TCELL8:IMUX_CLK0 | EBR3.CLKB |
| TCELL8:IMUX_LSR0 | EBR3.RSTB |
| TCELL8:IMUX_LSR1 | EBR3.WEB |
| TCELL8:IMUX_CE0 | EBR3.OCEB |
| TCELL8:IMUX_CE1 | EBR3.CEB |
| TCELL8:IMUX_CE2 | EBR3.CSB0 |
| TCELL8:IMUX_CE3 | EBR3.CSB1 |
| TCELL8:OUT_F0 | EBR3.DOB1 |
| TCELL8:OUT_F1 | EBR3.DOB2 |
| TCELL8:OUT_F2 | EBR3.DOB3 |
| TCELL8:OUT_F3 | EBR3.DOB4 |
| TCELL8:OUT_F4 | EBR3.DOB5 |
| TCELL8:OUT_F5 | EBR3.DOB6 |
| TCELL8:OUT_F6 | EBR3.DOB7 |
| TCELL8:OUT_F7 | EBR3.DOB8 |