Cells: 1
ecp PLL_W bel PLL
Pin | Direction | Wires |
CLKFB0 | input | IMUX_C0 |
CLKFB1 | input | IMUX_CLK1 |
CLKI0 | input | IMUX_B0 |
CLKI1 | input | IMUX_A0 |
CLKI2 | input | IMUX_CLK0 |
CLKOK | output | OUT_F7 |
CLKOP | output | OUT_F5 |
CLKOS | output | OUT_F6 |
CNTRST | input | IMUX_D0 |
DDAIDEL0 | input | IMUX_D2 |
DDAIDEL1 | input | IMUX_C2 |
DDAIDEL2 | input | IMUX_B2 |
DDAILAG | input | IMUX_A3 |
DDAIZR | input | IMUX_A2 |
DDAMODE | input | IMUX_B3 |
DDAODEL0 | output | OUT_F3 |
DDAODEL1 | output | OUT_F2 |
DDAODEL2 | output | OUT_F1 |
DDAOLAG | output | OUT_F4 |
DDAOZR | output | OUT_F0 |
DNLOCK | output | OUT_Q3 |
LOCK | output | OUT_Q0 |
PWD | input | IMUX_C1 |
RESETK | input | IMUX_B1 |
RESETM | input | IMUX_A1 |
TCLKI | input | IMUX_D1 |
TESTOUT | output | OUT_Q1 |
UPLOCK | output | OUT_Q2 |
ecp PLL_W bel wires
Wire | Pins |
IMUX_A0 | PLL.CLKI1 |
IMUX_A1 | PLL.RESETM |
IMUX_A2 | PLL.DDAIZR |
IMUX_A3 | PLL.DDAILAG |
IMUX_B0 | PLL.CLKI0 |
IMUX_B1 | PLL.RESETK |
IMUX_B2 | PLL.DDAIDEL2 |
IMUX_B3 | PLL.DDAMODE |
IMUX_C0 | PLL.CLKFB0 |
IMUX_C1 | PLL.PWD |
IMUX_C2 | PLL.DDAIDEL1 |
IMUX_D0 | PLL.CNTRST |
IMUX_D1 | PLL.TCLKI |
IMUX_D2 | PLL.DDAIDEL0 |
IMUX_CLK0 | PLL.CLKI2 |
IMUX_CLK1 | PLL.CLKFB1 |
OUT_F0 | PLL.DDAOZR |
OUT_F1 | PLL.DDAODEL2 |
OUT_F2 | PLL.DDAODEL1 |
OUT_F3 | PLL.DDAODEL0 |
OUT_F4 | PLL.DDAOLAG |
OUT_F5 | PLL.CLKOP |
OUT_F6 | PLL.CLKOS |
OUT_F7 | PLL.CLKOK |
OUT_Q0 | PLL.LOCK |
OUT_Q1 | PLL.TESTOUT |
OUT_Q2 | PLL.UPLOCK |
OUT_Q3 | PLL.DNLOCK |
Cells: 1
ecp PLL_E bel PLL
Pin | Direction | Wires |
CLKFB0 | input | IMUX_C0 |
CLKFB1 | input | IMUX_CLK1 |
CLKI0 | input | IMUX_B0 |
CLKI1 | input | IMUX_A0 |
CLKI2 | input | IMUX_CLK0 |
CLKOK | output | OUT_F7 |
CLKOP | output | OUT_F5 |
CLKOS | output | OUT_F6 |
CNTRST | input | IMUX_D0 |
DDAIDEL0 | input | IMUX_D2 |
DDAIDEL1 | input | IMUX_C2 |
DDAIDEL2 | input | IMUX_B2 |
DDAILAG | input | IMUX_A3 |
DDAIZR | input | IMUX_A2 |
DDAMODE | input | IMUX_B3 |
DDAODEL0 | output | OUT_F3 |
DDAODEL1 | output | OUT_F2 |
DDAODEL2 | output | OUT_F1 |
DDAOLAG | output | OUT_F4 |
DDAOZR | output | OUT_F0 |
DNLOCK | output | OUT_Q3 |
LOCK | output | OUT_Q0 |
PWD | input | IMUX_C1 |
RESETK | input | IMUX_B1 |
RESETM | input | IMUX_A1 |
TCLKI | input | IMUX_D1 |
TESTOUT | output | OUT_Q1 |
UPLOCK | output | OUT_Q2 |
ecp PLL_E bel wires
Wire | Pins |
IMUX_A0 | PLL.CLKI1 |
IMUX_A1 | PLL.RESETM |
IMUX_A2 | PLL.DDAIZR |
IMUX_A3 | PLL.DDAILAG |
IMUX_B0 | PLL.CLKI0 |
IMUX_B1 | PLL.RESETK |
IMUX_B2 | PLL.DDAIDEL2 |
IMUX_B3 | PLL.DDAMODE |
IMUX_C0 | PLL.CLKFB0 |
IMUX_C1 | PLL.PWD |
IMUX_C2 | PLL.DDAIDEL1 |
IMUX_D0 | PLL.CNTRST |
IMUX_D1 | PLL.TCLKI |
IMUX_D2 | PLL.DDAIDEL0 |
IMUX_CLK0 | PLL.CLKI2 |
IMUX_CLK1 | PLL.CLKFB1 |
OUT_F0 | PLL.DDAOZR |
OUT_F1 | PLL.DDAODEL2 |
OUT_F2 | PLL.DDAODEL1 |
OUT_F3 | PLL.DDAODEL0 |
OUT_F4 | PLL.DDAOLAG |
OUT_F5 | PLL.CLKOP |
OUT_F6 | PLL.CLKOS |
OUT_F7 | PLL.CLKOK |
OUT_Q0 | PLL.LOCK |
OUT_Q1 | PLL.TESTOUT |
OUT_Q2 | PLL.UPLOCK |
OUT_Q3 | PLL.DNLOCK |