South-west
TODO: document
Tile LL.FC
Cells: 1
Bel MISR
| Pin | Direction | Wires |
|---|---|---|
| CLK | input | IMUX.CLK3 |
Bel wires
| Wire | Pins |
|---|---|
| IMUX.CLK3 | MISR.CLK |
Bitstream
| Bit | Frame | |
|---|---|---|
| 0 | 1 | |
| 13 | - | MISC:VGG_ENABLE_OFFCHIP |
| 12 | - | MISC:VGG_SENDMAX |
| 11 | - | MISC:SEND_VGG[3] |
| 10 | - | MISC:SEND_VGG[2] |
| 9 | - | MISC:SEND_VGG[1] |
| 8 | - | MISC:SEND_VGG[0] |
| 7 | - | - |
| 6 | - | - |
| 5 | - | - |
| 4 | - | - |
| 3 | - | - |
| 2 | - | - |
| 1 | MISC:MISR_CLOCK | - |
| 0 | MISC:MISR_RESET | - |
| MISC:MISR_CLOCK | 0.0.1 |
|---|---|
| MISC:MISR_RESET | 0.0.0 |
| MISC:VGG_ENABLE_OFFCHIP | 0.1.13 |
| MISC:VGG_SENDMAX | 0.1.12 |
| non-inverted | [0] |
| MISC:SEND_VGG | 0.1.11 | 0.1.10 | 0.1.9 | 0.1.8 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |