Configuration center
Tile CONFIG
Cells: 13
Bel SERDES_CENTER
| Pin | Direction | Wires |
|---|---|---|
| FFC_CK_CORE_TX | input | TCELL11:IMUX_CLK0 |
Bel SYSBUS
| Pin | Direction | Wires |
|---|---|---|
| DMARDDATA0 | input | TCELL4:IMUX_A0 |
| DMARDDATA1 | input | TCELL4:IMUX_A1 |
| DMARDDATA10 | input | TCELL4:IMUX_B2 |
| DMARDDATA11 | input | TCELL4:IMUX_B3 |
| DMARDDATA12 | input | TCELL4:IMUX_B4 |
| DMARDDATA13 | input | TCELL4:IMUX_B5 |
| DMARDDATA14 | input | TCELL4:IMUX_B6 |
| DMARDDATA15 | input | TCELL4:IMUX_B7 |
| DMARDDATA16 | input | TCELL4:IMUX_C0 |
| DMARDDATA17 | input | TCELL4:IMUX_C1 |
| DMARDDATA18 | input | TCELL4:IMUX_C2 |
| DMARDDATA19 | input | TCELL4:IMUX_C3 |
| DMARDDATA2 | input | TCELL4:IMUX_A2 |
| DMARDDATA20 | input | TCELL4:IMUX_C4 |
| DMARDDATA21 | input | TCELL4:IMUX_C5 |
| DMARDDATA22 | input | TCELL4:IMUX_C6 |
| DMARDDATA23 | input | TCELL4:IMUX_C7 |
| DMARDDATA24 | input | TCELL4:IMUX_D0 |
| DMARDDATA25 | input | TCELL4:IMUX_D1 |
| DMARDDATA26 | input | TCELL4:IMUX_D2 |
| DMARDDATA27 | input | TCELL4:IMUX_D3 |
| DMARDDATA28 | input | TCELL5:IMUX_A0 |
| DMARDDATA29 | input | TCELL5:IMUX_A1 |
| DMARDDATA3 | input | TCELL4:IMUX_A3 |
| DMARDDATA30 | input | TCELL5:IMUX_A2 |
| DMARDDATA31 | input | TCELL5:IMUX_A3 |
| DMARDDATA4 | input | TCELL4:IMUX_A4 |
| DMARDDATA5 | input | TCELL4:IMUX_A5 |
| DMARDDATA6 | input | TCELL4:IMUX_A6 |
| DMARDDATA7 | input | TCELL4:IMUX_A7 |
| DMARDDATA8 | input | TCELL4:IMUX_B0 |
| DMARDDATA9 | input | TCELL4:IMUX_B1 |
| DMARDPARITY0 | input | TCELL5:IMUX_A4 |
| DMARDPARITY1 | input | TCELL5:IMUX_A5 |
| DMARDPARITY2 | input | TCELL5:IMUX_A6 |
| DMARDPARITY3 | input | TCELL5:IMUX_A7 |
| DMARETRY | input | TCELL5:IMUX_B0 |
| DMATA | input | TCELL5:IMUX_B1 |
| DMATEA | input | TCELL5:IMUX_B2 |
| DMATRICTL | input | TCELL5:IMUX_B3 |
| DMATRIDATA | input | TCELL5:IMUX_B4 |
| FMACK | output | TCELL4:OUT_F1 |
| FMADDR0 | input | TCELL6:IMUX_A2 |
| FMADDR1 | input | TCELL6:IMUX_A1 |
| FMADDR10 | input | TCELL5:IMUX_C4 |
| FMADDR11 | input | TCELL5:IMUX_C3 |
| FMADDR12 | input | TCELL5:IMUX_C2 |
| FMADDR13 | input | TCELL5:IMUX_C1 |
| FMADDR14 | input | TCELL5:IMUX_C0 |
| FMADDR15 | input | TCELL5:IMUX_B7 |
| FMADDR16 | input | TCELL5:IMUX_B6 |
| FMADDR17 | input | TCELL5:IMUX_B5 |
| FMADDR2 | input | TCELL6:IMUX_A0 |
| FMADDR3 | input | TCELL5:IMUX_D3 |
| FMADDR4 | input | TCELL5:IMUX_D2 |
| FMADDR5 | input | TCELL5:IMUX_D1 |
| FMADDR6 | input | TCELL5:IMUX_D0 |
| FMADDR7 | input | TCELL5:IMUX_C7 |
| FMADDR8 | input | TCELL5:IMUX_C6 |
| FMADDR9 | input | TCELL5:IMUX_C5 |
| FMBURST | input | TCELL6:IMUX_A3 |
| FMCLK | input | TCELL4:IMUX_CLK0 |
| FMERR | output | TCELL4:OUT_F2 |
| FMIRQ | input | TCELL4:IMUX_LSR0 |
| FMLOCK | input | TCELL6:IMUX_A4 |
| FMRDATA0 | output | TCELL5:OUT_Q7 |
| FMRDATA1 | output | TCELL5:OUT_Q6 |
| FMRDATA10 | output | TCELL5:OUT_F5 |
| FMRDATA11 | output | TCELL5:OUT_F4 |
| FMRDATA12 | output | TCELL5:OUT_F3 |
| FMRDATA13 | output | TCELL5:OUT_F2 |
| FMRDATA14 | output | TCELL5:OUT_F1 |
| FMRDATA15 | output | TCELL5:OUT_F0 |
| FMRDATA16 | output | TCELL4:OUT_OFX6 |
| FMRDATA17 | output | TCELL4:OUT_OFX5 |
| FMRDATA18 | output | TCELL4:OUT_OFX4 |
| FMRDATA19 | output | TCELL4:OUT_OFX3 |
| FMRDATA2 | output | TCELL5:OUT_Q5 |
| FMRDATA20 | output | TCELL4:OUT_OFX2 |
| FMRDATA21 | output | TCELL4:OUT_OFX1 |
| FMRDATA22 | output | TCELL4:OUT_OFX0 |
| FMRDATA23 | output | TCELL4:OUT_Q7 |
| FMRDATA24 | output | TCELL4:OUT_Q6 |
| FMRDATA25 | output | TCELL4:OUT_Q5 |
| FMRDATA26 | output | TCELL4:OUT_Q4 |
| FMRDATA27 | output | TCELL4:OUT_Q3 |
| FMRDATA28 | output | TCELL4:OUT_Q2 |
| FMRDATA29 | output | TCELL4:OUT_Q1 |
| FMRDATA3 | output | TCELL5:OUT_Q4 |
| FMRDATA30 | output | TCELL4:OUT_Q0 |
| FMRDATA31 | output | TCELL4:OUT_F7 |
| FMRDATA32 | output | TCELL4:OUT_F6 |
| FMRDATA33 | output | TCELL4:OUT_F5 |
| FMRDATA34 | output | TCELL4:OUT_F4 |
| FMRDATA35 | output | TCELL4:OUT_F3 |
| FMRDATA4 | output | TCELL5:OUT_Q3 |
| FMRDATA5 | output | TCELL5:OUT_Q2 |
| FMRDATA6 | output | TCELL5:OUT_Q1 |
| FMRDATA7 | output | TCELL5:OUT_Q0 |
| FMRDATA8 | output | TCELL5:OUT_F7 |
| FMRDATA9 | output | TCELL5:OUT_F6 |
| FMRDY | input | TCELL6:IMUX_A5 |
| FMRETRY | output | TCELL5:OUT_OFX0 |
| FMRSTN | input | TCELL4:IMUX_LSR2 |
| FMSIZE0 | input | TCELL6:IMUX_A7 |
| FMSIZE1 | input | TCELL6:IMUX_A6 |
| FMWDATA0 | input | TCELL7:IMUX_B7 |
| FMWDATA1 | input | TCELL7:IMUX_B6 |
| FMWDATA10 | input | TCELL7:IMUX_A5 |
| FMWDATA11 | input | TCELL7:IMUX_A4 |
| FMWDATA12 | input | TCELL7:IMUX_A3 |
| FMWDATA13 | input | TCELL7:IMUX_A2 |
| FMWDATA14 | input | TCELL7:IMUX_A1 |
| FMWDATA15 | input | TCELL7:IMUX_A0 |
| FMWDATA16 | input | TCELL6:IMUX_D3 |
| FMWDATA17 | input | TCELL6:IMUX_D2 |
| FMWDATA18 | input | TCELL6:IMUX_D1 |
| FMWDATA19 | input | TCELL6:IMUX_D0 |
| FMWDATA2 | input | TCELL7:IMUX_B5 |
| FMWDATA20 | input | TCELL6:IMUX_C7 |
| FMWDATA21 | input | TCELL6:IMUX_C6 |
| FMWDATA22 | input | TCELL6:IMUX_C5 |
| FMWDATA23 | input | TCELL6:IMUX_C4 |
| FMWDATA24 | input | TCELL6:IMUX_C3 |
| FMWDATA25 | input | TCELL6:IMUX_C2 |
| FMWDATA26 | input | TCELL6:IMUX_C1 |
| FMWDATA27 | input | TCELL6:IMUX_C0 |
| FMWDATA28 | input | TCELL6:IMUX_B7 |
| FMWDATA29 | input | TCELL6:IMUX_B6 |
| FMWDATA3 | input | TCELL7:IMUX_B4 |
| FMWDATA30 | input | TCELL6:IMUX_B5 |
| FMWDATA31 | input | TCELL6:IMUX_B4 |
| FMWDATA32 | input | TCELL6:IMUX_B3 |
| FMWDATA33 | input | TCELL6:IMUX_B2 |
| FMWDATA34 | input | TCELL6:IMUX_B1 |
| FMWDATA35 | input | TCELL6:IMUX_B0 |
| FMWDATA4 | input | TCELL7:IMUX_B3 |
| FMWDATA5 | input | TCELL7:IMUX_B2 |
| FMWDATA6 | input | TCELL7:IMUX_B1 |
| FMWDATA7 | input | TCELL7:IMUX_B0 |
| FMWDATA8 | input | TCELL7:IMUX_A7 |
| FMWDATA9 | input | TCELL7:IMUX_A6 |
| FMWRN | input | TCELL7:IMUX_C0 |
| FSACK | input | TCELL7:IMUX_C1 |
| FSADDR0 | output | TCELL6:OUT_Q3 |
| FSADDR1 | output | TCELL6:OUT_Q2 |
| FSADDR10 | output | TCELL6:OUT_F1 |
| FSADDR11 | output | TCELL6:OUT_F0 |
| FSADDR12 | output | TCELL5:OUT_OFX6 |
| FSADDR13 | output | TCELL5:OUT_OFX5 |
| FSADDR14 | output | TCELL5:OUT_OFX4 |
| FSADDR15 | output | TCELL5:OUT_OFX3 |
| FSADDR16 | output | TCELL5:OUT_OFX2 |
| FSADDR17 | output | TCELL5:OUT_OFX1 |
| FSADDR2 | output | TCELL6:OUT_Q1 |
| FSADDR3 | output | TCELL6:OUT_Q0 |
| FSADDR4 | output | TCELL6:OUT_F7 |
| FSADDR5 | output | TCELL6:OUT_F6 |
| FSADDR6 | output | TCELL6:OUT_F5 |
| FSADDR7 | output | TCELL6:OUT_F4 |
| FSADDR8 | output | TCELL6:OUT_F3 |
| FSADDR9 | output | TCELL6:OUT_F2 |
| FSCLK | input | TCELL5:IMUX_CLK0 |
| FSERR | input | TCELL7:IMUX_C2 |
| FSIRQ | input | TCELL5:IMUX_LSR0 |
| FSRDATA0 | input | TCELL8:IMUX_D2 |
| FSRDATA1 | input | TCELL8:IMUX_D1 |
| FSRDATA10 | input | TCELL8:IMUX_C0 |
| FSRDATA11 | input | TCELL8:IMUX_B7 |
| FSRDATA12 | input | TCELL8:IMUX_B6 |
| FSRDATA13 | input | TCELL8:IMUX_B5 |
| FSRDATA14 | input | TCELL8:IMUX_B4 |
| FSRDATA15 | input | TCELL8:IMUX_B3 |
| FSRDATA16 | input | TCELL8:IMUX_B2 |
| FSRDATA17 | input | TCELL8:IMUX_B1 |
| FSRDATA18 | input | TCELL8:IMUX_B0 |
| FSRDATA19 | input | TCELL8:IMUX_A7 |
| FSRDATA2 | input | TCELL8:IMUX_D0 |
| FSRDATA20 | input | TCELL8:IMUX_A6 |
| FSRDATA21 | input | TCELL8:IMUX_A5 |
| FSRDATA22 | input | TCELL8:IMUX_A4 |
| FSRDATA23 | input | TCELL8:IMUX_A3 |
| FSRDATA24 | input | TCELL8:IMUX_A2 |
| FSRDATA25 | input | TCELL8:IMUX_A1 |
| FSRDATA26 | input | TCELL8:IMUX_A0 |
| FSRDATA27 | input | TCELL7:IMUX_D3 |
| FSRDATA28 | input | TCELL7:IMUX_D2 |
| FSRDATA29 | input | TCELL7:IMUX_D1 |
| FSRDATA3 | input | TCELL8:IMUX_C7 |
| FSRDATA30 | input | TCELL7:IMUX_D0 |
| FSRDATA31 | input | TCELL7:IMUX_C7 |
| FSRDATA32 | input | TCELL7:IMUX_C6 |
| FSRDATA33 | input | TCELL7:IMUX_C5 |
| FSRDATA34 | input | TCELL7:IMUX_C4 |
| FSRDATA35 | input | TCELL7:IMUX_C3 |
| FSRDATA4 | input | TCELL8:IMUX_C6 |
| FSRDATA5 | input | TCELL8:IMUX_C5 |
| FSRDATA6 | input | TCELL8:IMUX_C4 |
| FSRDATA7 | input | TCELL8:IMUX_C3 |
| FSRDATA8 | input | TCELL8:IMUX_C2 |
| FSRDATA9 | input | TCELL8:IMUX_C1 |
| FSRDY | output | TCELL6:OUT_Q4 |
| FSRETRY | input | TCELL8:IMUX_D3 |
| FSRSTN | input | TCELL5:IMUX_LSR2 |
| FSSIZE0 | output | TCELL6:OUT_Q6 |
| FSSIZE1 | output | TCELL6:OUT_Q5 |
| FSWDATA0 | output | TCELL8:OUT_F4 |
| FSWDATA1 | output | TCELL8:OUT_F3 |
| FSWDATA10 | output | TCELL7:OUT_OFX1 |
| FSWDATA11 | output | TCELL7:OUT_OFX0 |
| FSWDATA12 | output | TCELL7:OUT_Q7 |
| FSWDATA13 | output | TCELL7:OUT_Q6 |
| FSWDATA14 | output | TCELL7:OUT_Q5 |
| FSWDATA15 | output | TCELL7:OUT_Q4 |
| FSWDATA16 | output | TCELL7:OUT_Q3 |
| FSWDATA17 | output | TCELL7:OUT_Q2 |
| FSWDATA18 | output | TCELL7:OUT_Q1 |
| FSWDATA19 | output | TCELL7:OUT_Q0 |
| FSWDATA2 | output | TCELL8:OUT_F2 |
| FSWDATA20 | output | TCELL7:OUT_F7 |
| FSWDATA21 | output | TCELL7:OUT_F6 |
| FSWDATA22 | output | TCELL7:OUT_F5 |
| FSWDATA23 | output | TCELL7:OUT_F4 |
| FSWDATA24 | output | TCELL7:OUT_F3 |
| FSWDATA25 | output | TCELL7:OUT_F2 |
| FSWDATA26 | output | TCELL7:OUT_F1 |
| FSWDATA27 | output | TCELL7:OUT_F0 |
| FSWDATA28 | output | TCELL6:OUT_OFX6 |
| FSWDATA29 | output | TCELL6:OUT_OFX5 |
| FSWDATA3 | output | TCELL8:OUT_F1 |
| FSWDATA30 | output | TCELL6:OUT_OFX4 |
| FSWDATA31 | output | TCELL6:OUT_OFX3 |
| FSWDATA32 | output | TCELL6:OUT_OFX2 |
| FSWDATA33 | output | TCELL6:OUT_OFX1 |
| FSWDATA34 | output | TCELL6:OUT_OFX0 |
| FSWDATA35 | output | TCELL6:OUT_Q7 |
| FSWDATA4 | output | TCELL8:OUT_F0 |
| FSWDATA5 | output | TCELL7:OUT_OFX6 |
| FSWDATA6 | output | TCELL7:OUT_OFX5 |
| FSWDATA7 | output | TCELL7:OUT_OFX4 |
| FSWDATA8 | output | TCELL7:OUT_OFX3 |
| FSWDATA9 | output | TCELL7:OUT_OFX2 |
| FSWRN | output | TCELL8:OUT_F5 |
| HCLKCIB | output | TCELL8:OUT_F6 |
| MPIRSTN | input | TCELL6:IMUX_LSR0 |
| SMIADDR0 | output | TCELL10:OUT_F7 |
| SMIADDR1 | output | TCELL10:OUT_F6 |
| SMIADDR2 | output | TCELL10:OUT_F5 |
| SMIADDR3 | output | TCELL10:OUT_F4 |
| SMIADDR4 | output | TCELL10:OUT_F3 |
| SMIADDR5 | output | TCELL10:OUT_F2 |
| SMIADDR6 | output | TCELL10:OUT_F1 |
| SMIADDR7 | output | TCELL10:OUT_F0 |
| SMIADDR8 | output | TCELL9:OUT_OFX6 |
| SMIADDR9 | output | TCELL9:OUT_OFX5 |
| SMICLK | output | TCELL10:OUT_Q0 |
| SMIRD | output | TCELL10:OUT_Q1 |
| SMIRDATA0 | input | TCELL11:IMUX_C2 |
| SMIRDATA1 | input | TCELL11:IMUX_C1 |
| SMIRDATA10 | input | TCELL11:IMUX_B0 |
| SMIRDATA11 | input | TCELL11:IMUX_A7 |
| SMIRDATA12 | input | TCELL11:IMUX_A6 |
| SMIRDATA13 | input | TCELL11:IMUX_A5 |
| SMIRDATA14 | input | TCELL11:IMUX_A4 |
| SMIRDATA15 | input | TCELL11:IMUX_A3 |
| SMIRDATA16 | input | TCELL11:IMUX_A2 |
| SMIRDATA17 | input | TCELL11:IMUX_A1 |
| SMIRDATA18 | input | TCELL11:IMUX_A0 |
| SMIRDATA19 | input | TCELL10:IMUX_D3 |
| SMIRDATA2 | input | TCELL11:IMUX_C0 |
| SMIRDATA20 | input | TCELL10:IMUX_D2 |
| SMIRDATA21 | input | TCELL10:IMUX_D1 |
| SMIRDATA22 | input | TCELL10:IMUX_D0 |
| SMIRDATA23 | input | TCELL10:IMUX_C7 |
| SMIRDATA24 | input | TCELL10:IMUX_C6 |
| SMIRDATA25 | input | TCELL10:IMUX_C5 |
| SMIRDATA26 | input | TCELL10:IMUX_C4 |
| SMIRDATA27 | input | TCELL10:IMUX_C3 |
| SMIRDATA28 | input | TCELL10:IMUX_C2 |
| SMIRDATA29 | input | TCELL10:IMUX_C1 |
| SMIRDATA3 | input | TCELL11:IMUX_B7 |
| SMIRDATA30 | input | TCELL10:IMUX_C0 |
| SMIRDATA31 | input | TCELL10:IMUX_B7 |
| SMIRDATA32 | input | TCELL10:IMUX_B6 |
| SMIRDATA33 | input | TCELL10:IMUX_B5 |
| SMIRDATA34 | input | TCELL10:IMUX_B4 |
| SMIRDATA35 | input | TCELL10:IMUX_B3 |
| SMIRDATA36 | input | TCELL10:IMUX_B2 |
| SMIRDATA37 | input | TCELL10:IMUX_B1 |
| SMIRDATA38 | input | TCELL10:IMUX_B0 |
| SMIRDATA39 | input | TCELL10:IMUX_A7 |
| SMIRDATA4 | input | TCELL11:IMUX_B6 |
| SMIRDATA40 | input | TCELL10:IMUX_A6 |
| SMIRDATA41 | input | TCELL10:IMUX_A5 |
| SMIRDATA42 | input | TCELL10:IMUX_A4 |
| SMIRDATA43 | input | TCELL10:IMUX_A3 |
| SMIRDATA44 | input | TCELL10:IMUX_A2 |
| SMIRDATA45 | input | TCELL10:IMUX_A1 |
| SMIRDATA46 | input | TCELL10:IMUX_A0 |
| SMIRDATA47 | input | TCELL9:IMUX_D3 |
| SMIRDATA48 | input | TCELL9:IMUX_D2 |
| SMIRDATA49 | input | TCELL9:IMUX_D1 |
| SMIRDATA5 | input | TCELL11:IMUX_B5 |
| SMIRDATA50 | input | TCELL9:IMUX_D0 |
| SMIRDATA51 | input | TCELL9:IMUX_C7 |
| SMIRDATA52 | input | TCELL9:IMUX_C6 |
| SMIRDATA53 | input | TCELL9:IMUX_C5 |
| SMIRDATA54 | input | TCELL9:IMUX_C4 |
| SMIRDATA55 | input | TCELL9:IMUX_C3 |
| SMIRDATA56 | input | TCELL9:IMUX_C2 |
| SMIRDATA57 | input | TCELL9:IMUX_C1 |
| SMIRDATA58 | input | TCELL9:IMUX_C0 |
| SMIRDATA59 | input | TCELL9:IMUX_B7 |
| SMIRDATA6 | input | TCELL11:IMUX_B4 |
| SMIRDATA60 | input | TCELL9:IMUX_B6 |
| SMIRDATA61 | input | TCELL9:IMUX_B5 |
| SMIRDATA62 | input | TCELL9:IMUX_B4 |
| SMIRDATA63 | input | TCELL9:IMUX_B3 |
| SMIRDATA7 | input | TCELL11:IMUX_B3 |
| SMIRDATA8 | input | TCELL11:IMUX_B2 |
| SMIRDATA9 | input | TCELL11:IMUX_B1 |
| SMIRSTN | output | TCELL10:OUT_Q2 |
| SMIWDATA | output | TCELL10:OUT_Q3 |
| SMIWR | output | TCELL10:OUT_Q4 |
| SYSBDEBUG0 | output | TCELL11:OUT_Q5 |
| SYSBDEBUG1 | output | TCELL11:OUT_Q4 |
| SYSBDEBUG10 | output | TCELL11:OUT_F3 |
| SYSBDEBUG11 | output | TCELL11:OUT_F2 |
| SYSBDEBUG12 | output | TCELL11:OUT_F1 |
| SYSBDEBUG13 | output | TCELL11:OUT_F0 |
| SYSBDEBUG14 | output | TCELL10:OUT_OFX6 |
| SYSBDEBUG15 | output | TCELL10:OUT_OFX5 |
| SYSBDEBUG16 | output | TCELL10:OUT_OFX4 |
| SYSBDEBUG17 | output | TCELL10:OUT_OFX3 |
| SYSBDEBUG18 | output | TCELL10:OUT_OFX2 |
| SYSBDEBUG19 | output | TCELL10:OUT_OFX1 |
| SYSBDEBUG2 | output | TCELL11:OUT_Q3 |
| SYSBDEBUG20 | output | TCELL10:OUT_OFX0 |
| SYSBDEBUG21 | output | TCELL10:OUT_Q7 |
| SYSBDEBUG22 | output | TCELL10:OUT_Q6 |
| SYSBDEBUG23 | output | TCELL10:OUT_Q5 |
| SYSBDEBUG3 | output | TCELL11:OUT_Q2 |
| SYSBDEBUG4 | output | TCELL11:OUT_Q1 |
| SYSBDEBUG5 | output | TCELL11:OUT_Q0 |
| SYSBDEBUG6 | output | TCELL11:OUT_F7 |
| SYSBDEBUG7 | output | TCELL11:OUT_F6 |
| SYSBDEBUG8 | output | TCELL11:OUT_F5 |
| SYSBDEBUG9 | output | TCELL11:OUT_F4 |
| SYSRSTN | input | TCELL7:IMUX_LSR0 |
| USERIRQI | input | TCELL11:IMUX_LSR0 |
| USERIRQO | output | TCELL11:OUT_OFX1 |
| USRCLK | input | TCELL6:IMUX_CLK0 |
Bel START
| Pin | Direction | Wires |
|---|---|---|
| STARTCLK | input | TCELL7:IMUX_CLK0 |
Bel OSC
| Pin | Direction | Wires |
|---|---|---|
| CFGCLK | output | TCELL4:OUT_F0 |
Bel JTAG
| Pin | Direction | Wires |
|---|---|---|
| JCE1 | output | TCELL8:OUT_Q6 |
| JCE2 | output | TCELL8:OUT_Q5 |
| JCE3 | output | TCELL8:OUT_Q4 |
| JCE4 | output | TCELL8:OUT_Q3 |
| JCE5 | output | TCELL8:OUT_Q2 |
| JCE6 | output | TCELL8:OUT_Q1 |
| JCE7 | output | TCELL8:OUT_Q0 |
| JCE8 | output | TCELL8:OUT_F7 |
| JRSTN | output | TCELL8:OUT_Q7 |
| JRTI1 | output | TCELL9:OUT_F0 |
| JRTI2 | output | TCELL8:OUT_OFX6 |
| JRTI3 | output | TCELL8:OUT_OFX5 |
| JRTI4 | output | TCELL8:OUT_OFX4 |
| JRTI5 | output | TCELL8:OUT_OFX3 |
| JRTI6 | output | TCELL8:OUT_OFX2 |
| JRTI7 | output | TCELL8:OUT_OFX1 |
| JRTI8 | output | TCELL8:OUT_OFX0 |
| JSHIFT | output | TCELL9:OUT_Q2 |
| JTCK | output | TCELL9:OUT_Q3 |
| JTDI | output | TCELL9:OUT_Q4 |
| JTDO1 | input | TCELL9:IMUX_A7 |
| JTDO2 | input | TCELL9:IMUX_A6 |
| JTDO3 | input | TCELL9:IMUX_A5 |
| JTDO4 | input | TCELL9:IMUX_A4 |
| JTDO5 | input | TCELL9:IMUX_A3 |
| JTDO6 | input | TCELL9:IMUX_A2 |
| JTDO7 | input | TCELL9:IMUX_A1 |
| JTDO8 | input | TCELL9:IMUX_A0 |
| JUPDATE | output | TCELL9:OUT_Q5 |
| PSRCAP | output | TCELL9:OUT_Q6 |
| PSRENABLE1 | output | TCELL9:OUT_Q7 |
| PSRENABLE2 | output | TCELL9:OUT_OFX0 |
| PSRENABLE3 | output | TCELL9:OUT_OFX1 |
| PSROUT1 | input | TCELL9:IMUX_B0 |
| PSROUT2 | input | TCELL9:IMUX_B1 |
| PSROUT3 | input | TCELL9:IMUX_B2 |
| PSRSFTN | output | TCELL9:OUT_OFX2 |
| SCANENABLE1 | output | TCELL9:OUT_Q0 |
| SCANENABLE2 | output | TCELL9:OUT_F7 |
| SCANENABLE3 | output | TCELL9:OUT_F6 |
| SCANENABLE4 | output | TCELL9:OUT_F5 |
| SCANENABLE5 | output | TCELL9:OUT_F4 |
| SCANENABLE6 | output | TCELL9:OUT_F3 |
| SCANENABLE7 | output | TCELL9:OUT_F2 |
| SCANENABLE8 | output | TCELL9:OUT_F1 |
| SCANI | output | TCELL9:OUT_Q1 |
| TCK | output | TCELL11:OUT_Q6 |
| TDI | output | TCELL11:OUT_Q7 |
| TDO | input | TCELL11:IMUX_C4 |
| TMS | output | TCELL11:OUT_OFX0 |
| TRESET | output | TCELL9:OUT_OFX3 |
Bel RDBK
| Pin | Direction | Wires |
|---|---|---|
| FFRDCFG | input | TCELL9:IMUX_LSR0 |
| FFRDCFGCLK | input | TCELL9:IMUX_CLK0 |
| RDDATA | output | TCELL9:OUT_OFX4 |
Bel GSR
| Pin | Direction | Wires |
|---|---|---|
| CLK | input | TCELL12:IMUX_CLK1 |
| USR | input | TCELL6:IMUX_D7 |
Bel wires
| Wire | Pins |
|---|---|
| TCELL4:IMUX_A0 | SYSBUS.DMARDDATA0 |
| TCELL4:IMUX_A1 | SYSBUS.DMARDDATA1 |
| TCELL4:IMUX_A2 | SYSBUS.DMARDDATA2 |
| TCELL4:IMUX_A3 | SYSBUS.DMARDDATA3 |
| TCELL4:IMUX_A4 | SYSBUS.DMARDDATA4 |
| TCELL4:IMUX_A5 | SYSBUS.DMARDDATA5 |
| TCELL4:IMUX_A6 | SYSBUS.DMARDDATA6 |
| TCELL4:IMUX_A7 | SYSBUS.DMARDDATA7 |
| TCELL4:IMUX_B0 | SYSBUS.DMARDDATA8 |
| TCELL4:IMUX_B1 | SYSBUS.DMARDDATA9 |
| TCELL4:IMUX_B2 | SYSBUS.DMARDDATA10 |
| TCELL4:IMUX_B3 | SYSBUS.DMARDDATA11 |
| TCELL4:IMUX_B4 | SYSBUS.DMARDDATA12 |
| TCELL4:IMUX_B5 | SYSBUS.DMARDDATA13 |
| TCELL4:IMUX_B6 | SYSBUS.DMARDDATA14 |
| TCELL4:IMUX_B7 | SYSBUS.DMARDDATA15 |
| TCELL4:IMUX_C0 | SYSBUS.DMARDDATA16 |
| TCELL4:IMUX_C1 | SYSBUS.DMARDDATA17 |
| TCELL4:IMUX_C2 | SYSBUS.DMARDDATA18 |
| TCELL4:IMUX_C3 | SYSBUS.DMARDDATA19 |
| TCELL4:IMUX_C4 | SYSBUS.DMARDDATA20 |
| TCELL4:IMUX_C5 | SYSBUS.DMARDDATA21 |
| TCELL4:IMUX_C6 | SYSBUS.DMARDDATA22 |
| TCELL4:IMUX_C7 | SYSBUS.DMARDDATA23 |
| TCELL4:IMUX_D0 | SYSBUS.DMARDDATA24 |
| TCELL4:IMUX_D1 | SYSBUS.DMARDDATA25 |
| TCELL4:IMUX_D2 | SYSBUS.DMARDDATA26 |
| TCELL4:IMUX_D3 | SYSBUS.DMARDDATA27 |
| TCELL4:IMUX_CLK0 | SYSBUS.FMCLK |
| TCELL4:IMUX_LSR0 | SYSBUS.FMIRQ |
| TCELL4:IMUX_LSR2 | SYSBUS.FMRSTN |
| TCELL4:OUT_F0 | OSC.CFGCLK |
| TCELL4:OUT_F1 | SYSBUS.FMACK |
| TCELL4:OUT_F2 | SYSBUS.FMERR |
| TCELL4:OUT_F3 | SYSBUS.FMRDATA35 |
| TCELL4:OUT_F4 | SYSBUS.FMRDATA34 |
| TCELL4:OUT_F5 | SYSBUS.FMRDATA33 |
| TCELL4:OUT_F6 | SYSBUS.FMRDATA32 |
| TCELL4:OUT_F7 | SYSBUS.FMRDATA31 |
| TCELL4:OUT_Q0 | SYSBUS.FMRDATA30 |
| TCELL4:OUT_Q1 | SYSBUS.FMRDATA29 |
| TCELL4:OUT_Q2 | SYSBUS.FMRDATA28 |
| TCELL4:OUT_Q3 | SYSBUS.FMRDATA27 |
| TCELL4:OUT_Q4 | SYSBUS.FMRDATA26 |
| TCELL4:OUT_Q5 | SYSBUS.FMRDATA25 |
| TCELL4:OUT_Q6 | SYSBUS.FMRDATA24 |
| TCELL4:OUT_Q7 | SYSBUS.FMRDATA23 |
| TCELL4:OUT_OFX0 | SYSBUS.FMRDATA22 |
| TCELL4:OUT_OFX1 | SYSBUS.FMRDATA21 |
| TCELL4:OUT_OFX2 | SYSBUS.FMRDATA20 |
| TCELL4:OUT_OFX3 | SYSBUS.FMRDATA19 |
| TCELL4:OUT_OFX4 | SYSBUS.FMRDATA18 |
| TCELL4:OUT_OFX5 | SYSBUS.FMRDATA17 |
| TCELL4:OUT_OFX6 | SYSBUS.FMRDATA16 |
| TCELL5:IMUX_A0 | SYSBUS.DMARDDATA28 |
| TCELL5:IMUX_A1 | SYSBUS.DMARDDATA29 |
| TCELL5:IMUX_A2 | SYSBUS.DMARDDATA30 |
| TCELL5:IMUX_A3 | SYSBUS.DMARDDATA31 |
| TCELL5:IMUX_A4 | SYSBUS.DMARDPARITY0 |
| TCELL5:IMUX_A5 | SYSBUS.DMARDPARITY1 |
| TCELL5:IMUX_A6 | SYSBUS.DMARDPARITY2 |
| TCELL5:IMUX_A7 | SYSBUS.DMARDPARITY3 |
| TCELL5:IMUX_B0 | SYSBUS.DMARETRY |
| TCELL5:IMUX_B1 | SYSBUS.DMATA |
| TCELL5:IMUX_B2 | SYSBUS.DMATEA |
| TCELL5:IMUX_B3 | SYSBUS.DMATRICTL |
| TCELL5:IMUX_B4 | SYSBUS.DMATRIDATA |
| TCELL5:IMUX_B5 | SYSBUS.FMADDR17 |
| TCELL5:IMUX_B6 | SYSBUS.FMADDR16 |
| TCELL5:IMUX_B7 | SYSBUS.FMADDR15 |
| TCELL5:IMUX_C0 | SYSBUS.FMADDR14 |
| TCELL5:IMUX_C1 | SYSBUS.FMADDR13 |
| TCELL5:IMUX_C2 | SYSBUS.FMADDR12 |
| TCELL5:IMUX_C3 | SYSBUS.FMADDR11 |
| TCELL5:IMUX_C4 | SYSBUS.FMADDR10 |
| TCELL5:IMUX_C5 | SYSBUS.FMADDR9 |
| TCELL5:IMUX_C6 | SYSBUS.FMADDR8 |
| TCELL5:IMUX_C7 | SYSBUS.FMADDR7 |
| TCELL5:IMUX_D0 | SYSBUS.FMADDR6 |
| TCELL5:IMUX_D1 | SYSBUS.FMADDR5 |
| TCELL5:IMUX_D2 | SYSBUS.FMADDR4 |
| TCELL5:IMUX_D3 | SYSBUS.FMADDR3 |
| TCELL5:IMUX_CLK0 | SYSBUS.FSCLK |
| TCELL5:IMUX_LSR0 | SYSBUS.FSIRQ |
| TCELL5:IMUX_LSR2 | SYSBUS.FSRSTN |
| TCELL5:OUT_F0 | SYSBUS.FMRDATA15 |
| TCELL5:OUT_F1 | SYSBUS.FMRDATA14 |
| TCELL5:OUT_F2 | SYSBUS.FMRDATA13 |
| TCELL5:OUT_F3 | SYSBUS.FMRDATA12 |
| TCELL5:OUT_F4 | SYSBUS.FMRDATA11 |
| TCELL5:OUT_F5 | SYSBUS.FMRDATA10 |
| TCELL5:OUT_F6 | SYSBUS.FMRDATA9 |
| TCELL5:OUT_F7 | SYSBUS.FMRDATA8 |
| TCELL5:OUT_Q0 | SYSBUS.FMRDATA7 |
| TCELL5:OUT_Q1 | SYSBUS.FMRDATA6 |
| TCELL5:OUT_Q2 | SYSBUS.FMRDATA5 |
| TCELL5:OUT_Q3 | SYSBUS.FMRDATA4 |
| TCELL5:OUT_Q4 | SYSBUS.FMRDATA3 |
| TCELL5:OUT_Q5 | SYSBUS.FMRDATA2 |
| TCELL5:OUT_Q6 | SYSBUS.FMRDATA1 |
| TCELL5:OUT_Q7 | SYSBUS.FMRDATA0 |
| TCELL5:OUT_OFX0 | SYSBUS.FMRETRY |
| TCELL5:OUT_OFX1 | SYSBUS.FSADDR17 |
| TCELL5:OUT_OFX2 | SYSBUS.FSADDR16 |
| TCELL5:OUT_OFX3 | SYSBUS.FSADDR15 |
| TCELL5:OUT_OFX4 | SYSBUS.FSADDR14 |
| TCELL5:OUT_OFX5 | SYSBUS.FSADDR13 |
| TCELL5:OUT_OFX6 | SYSBUS.FSADDR12 |
| TCELL6:IMUX_A0 | SYSBUS.FMADDR2 |
| TCELL6:IMUX_A1 | SYSBUS.FMADDR1 |
| TCELL6:IMUX_A2 | SYSBUS.FMADDR0 |
| TCELL6:IMUX_A3 | SYSBUS.FMBURST |
| TCELL6:IMUX_A4 | SYSBUS.FMLOCK |
| TCELL6:IMUX_A5 | SYSBUS.FMRDY |
| TCELL6:IMUX_A6 | SYSBUS.FMSIZE1 |
| TCELL6:IMUX_A7 | SYSBUS.FMSIZE0 |
| TCELL6:IMUX_B0 | SYSBUS.FMWDATA35 |
| TCELL6:IMUX_B1 | SYSBUS.FMWDATA34 |
| TCELL6:IMUX_B2 | SYSBUS.FMWDATA33 |
| TCELL6:IMUX_B3 | SYSBUS.FMWDATA32 |
| TCELL6:IMUX_B4 | SYSBUS.FMWDATA31 |
| TCELL6:IMUX_B5 | SYSBUS.FMWDATA30 |
| TCELL6:IMUX_B6 | SYSBUS.FMWDATA29 |
| TCELL6:IMUX_B7 | SYSBUS.FMWDATA28 |
| TCELL6:IMUX_C0 | SYSBUS.FMWDATA27 |
| TCELL6:IMUX_C1 | SYSBUS.FMWDATA26 |
| TCELL6:IMUX_C2 | SYSBUS.FMWDATA25 |
| TCELL6:IMUX_C3 | SYSBUS.FMWDATA24 |
| TCELL6:IMUX_C4 | SYSBUS.FMWDATA23 |
| TCELL6:IMUX_C5 | SYSBUS.FMWDATA22 |
| TCELL6:IMUX_C6 | SYSBUS.FMWDATA21 |
| TCELL6:IMUX_C7 | SYSBUS.FMWDATA20 |
| TCELL6:IMUX_D0 | SYSBUS.FMWDATA19 |
| TCELL6:IMUX_D1 | SYSBUS.FMWDATA18 |
| TCELL6:IMUX_D2 | SYSBUS.FMWDATA17 |
| TCELL6:IMUX_D3 | SYSBUS.FMWDATA16 |
| TCELL6:IMUX_D7 | GSR.USR |
| TCELL6:IMUX_CLK0 | SYSBUS.USRCLK |
| TCELL6:IMUX_LSR0 | SYSBUS.MPIRSTN |
| TCELL6:OUT_F0 | SYSBUS.FSADDR11 |
| TCELL6:OUT_F1 | SYSBUS.FSADDR10 |
| TCELL6:OUT_F2 | SYSBUS.FSADDR9 |
| TCELL6:OUT_F3 | SYSBUS.FSADDR8 |
| TCELL6:OUT_F4 | SYSBUS.FSADDR7 |
| TCELL6:OUT_F5 | SYSBUS.FSADDR6 |
| TCELL6:OUT_F6 | SYSBUS.FSADDR5 |
| TCELL6:OUT_F7 | SYSBUS.FSADDR4 |
| TCELL6:OUT_Q0 | SYSBUS.FSADDR3 |
| TCELL6:OUT_Q1 | SYSBUS.FSADDR2 |
| TCELL6:OUT_Q2 | SYSBUS.FSADDR1 |
| TCELL6:OUT_Q3 | SYSBUS.FSADDR0 |
| TCELL6:OUT_Q4 | SYSBUS.FSRDY |
| TCELL6:OUT_Q5 | SYSBUS.FSSIZE1 |
| TCELL6:OUT_Q6 | SYSBUS.FSSIZE0 |
| TCELL6:OUT_Q7 | SYSBUS.FSWDATA35 |
| TCELL6:OUT_OFX0 | SYSBUS.FSWDATA34 |
| TCELL6:OUT_OFX1 | SYSBUS.FSWDATA33 |
| TCELL6:OUT_OFX2 | SYSBUS.FSWDATA32 |
| TCELL6:OUT_OFX3 | SYSBUS.FSWDATA31 |
| TCELL6:OUT_OFX4 | SYSBUS.FSWDATA30 |
| TCELL6:OUT_OFX5 | SYSBUS.FSWDATA29 |
| TCELL6:OUT_OFX6 | SYSBUS.FSWDATA28 |
| TCELL7:IMUX_A0 | SYSBUS.FMWDATA15 |
| TCELL7:IMUX_A1 | SYSBUS.FMWDATA14 |
| TCELL7:IMUX_A2 | SYSBUS.FMWDATA13 |
| TCELL7:IMUX_A3 | SYSBUS.FMWDATA12 |
| TCELL7:IMUX_A4 | SYSBUS.FMWDATA11 |
| TCELL7:IMUX_A5 | SYSBUS.FMWDATA10 |
| TCELL7:IMUX_A6 | SYSBUS.FMWDATA9 |
| TCELL7:IMUX_A7 | SYSBUS.FMWDATA8 |
| TCELL7:IMUX_B0 | SYSBUS.FMWDATA7 |
| TCELL7:IMUX_B1 | SYSBUS.FMWDATA6 |
| TCELL7:IMUX_B2 | SYSBUS.FMWDATA5 |
| TCELL7:IMUX_B3 | SYSBUS.FMWDATA4 |
| TCELL7:IMUX_B4 | SYSBUS.FMWDATA3 |
| TCELL7:IMUX_B5 | SYSBUS.FMWDATA2 |
| TCELL7:IMUX_B6 | SYSBUS.FMWDATA1 |
| TCELL7:IMUX_B7 | SYSBUS.FMWDATA0 |
| TCELL7:IMUX_C0 | SYSBUS.FMWRN |
| TCELL7:IMUX_C1 | SYSBUS.FSACK |
| TCELL7:IMUX_C2 | SYSBUS.FSERR |
| TCELL7:IMUX_C3 | SYSBUS.FSRDATA35 |
| TCELL7:IMUX_C4 | SYSBUS.FSRDATA34 |
| TCELL7:IMUX_C5 | SYSBUS.FSRDATA33 |
| TCELL7:IMUX_C6 | SYSBUS.FSRDATA32 |
| TCELL7:IMUX_C7 | SYSBUS.FSRDATA31 |
| TCELL7:IMUX_D0 | SYSBUS.FSRDATA30 |
| TCELL7:IMUX_D1 | SYSBUS.FSRDATA29 |
| TCELL7:IMUX_D2 | SYSBUS.FSRDATA28 |
| TCELL7:IMUX_D3 | SYSBUS.FSRDATA27 |
| TCELL7:IMUX_CLK0 | START.STARTCLK |
| TCELL7:IMUX_LSR0 | SYSBUS.SYSRSTN |
| TCELL7:OUT_F0 | SYSBUS.FSWDATA27 |
| TCELL7:OUT_F1 | SYSBUS.FSWDATA26 |
| TCELL7:OUT_F2 | SYSBUS.FSWDATA25 |
| TCELL7:OUT_F3 | SYSBUS.FSWDATA24 |
| TCELL7:OUT_F4 | SYSBUS.FSWDATA23 |
| TCELL7:OUT_F5 | SYSBUS.FSWDATA22 |
| TCELL7:OUT_F6 | SYSBUS.FSWDATA21 |
| TCELL7:OUT_F7 | SYSBUS.FSWDATA20 |
| TCELL7:OUT_Q0 | SYSBUS.FSWDATA19 |
| TCELL7:OUT_Q1 | SYSBUS.FSWDATA18 |
| TCELL7:OUT_Q2 | SYSBUS.FSWDATA17 |
| TCELL7:OUT_Q3 | SYSBUS.FSWDATA16 |
| TCELL7:OUT_Q4 | SYSBUS.FSWDATA15 |
| TCELL7:OUT_Q5 | SYSBUS.FSWDATA14 |
| TCELL7:OUT_Q6 | SYSBUS.FSWDATA13 |
| TCELL7:OUT_Q7 | SYSBUS.FSWDATA12 |
| TCELL7:OUT_OFX0 | SYSBUS.FSWDATA11 |
| TCELL7:OUT_OFX1 | SYSBUS.FSWDATA10 |
| TCELL7:OUT_OFX2 | SYSBUS.FSWDATA9 |
| TCELL7:OUT_OFX3 | SYSBUS.FSWDATA8 |
| TCELL7:OUT_OFX4 | SYSBUS.FSWDATA7 |
| TCELL7:OUT_OFX5 | SYSBUS.FSWDATA6 |
| TCELL7:OUT_OFX6 | SYSBUS.FSWDATA5 |
| TCELL8:IMUX_A0 | SYSBUS.FSRDATA26 |
| TCELL8:IMUX_A1 | SYSBUS.FSRDATA25 |
| TCELL8:IMUX_A2 | SYSBUS.FSRDATA24 |
| TCELL8:IMUX_A3 | SYSBUS.FSRDATA23 |
| TCELL8:IMUX_A4 | SYSBUS.FSRDATA22 |
| TCELL8:IMUX_A5 | SYSBUS.FSRDATA21 |
| TCELL8:IMUX_A6 | SYSBUS.FSRDATA20 |
| TCELL8:IMUX_A7 | SYSBUS.FSRDATA19 |
| TCELL8:IMUX_B0 | SYSBUS.FSRDATA18 |
| TCELL8:IMUX_B1 | SYSBUS.FSRDATA17 |
| TCELL8:IMUX_B2 | SYSBUS.FSRDATA16 |
| TCELL8:IMUX_B3 | SYSBUS.FSRDATA15 |
| TCELL8:IMUX_B4 | SYSBUS.FSRDATA14 |
| TCELL8:IMUX_B5 | SYSBUS.FSRDATA13 |
| TCELL8:IMUX_B6 | SYSBUS.FSRDATA12 |
| TCELL8:IMUX_B7 | SYSBUS.FSRDATA11 |
| TCELL8:IMUX_C0 | SYSBUS.FSRDATA10 |
| TCELL8:IMUX_C1 | SYSBUS.FSRDATA9 |
| TCELL8:IMUX_C2 | SYSBUS.FSRDATA8 |
| TCELL8:IMUX_C3 | SYSBUS.FSRDATA7 |
| TCELL8:IMUX_C4 | SYSBUS.FSRDATA6 |
| TCELL8:IMUX_C5 | SYSBUS.FSRDATA5 |
| TCELL8:IMUX_C6 | SYSBUS.FSRDATA4 |
| TCELL8:IMUX_C7 | SYSBUS.FSRDATA3 |
| TCELL8:IMUX_D0 | SYSBUS.FSRDATA2 |
| TCELL8:IMUX_D1 | SYSBUS.FSRDATA1 |
| TCELL8:IMUX_D2 | SYSBUS.FSRDATA0 |
| TCELL8:IMUX_D3 | SYSBUS.FSRETRY |
| TCELL8:OUT_F0 | SYSBUS.FSWDATA4 |
| TCELL8:OUT_F1 | SYSBUS.FSWDATA3 |
| TCELL8:OUT_F2 | SYSBUS.FSWDATA2 |
| TCELL8:OUT_F3 | SYSBUS.FSWDATA1 |
| TCELL8:OUT_F4 | SYSBUS.FSWDATA0 |
| TCELL8:OUT_F5 | SYSBUS.FSWRN |
| TCELL8:OUT_F6 | SYSBUS.HCLKCIB |
| TCELL8:OUT_F7 | JTAG.JCE8 |
| TCELL8:OUT_Q0 | JTAG.JCE7 |
| TCELL8:OUT_Q1 | JTAG.JCE6 |
| TCELL8:OUT_Q2 | JTAG.JCE5 |
| TCELL8:OUT_Q3 | JTAG.JCE4 |
| TCELL8:OUT_Q4 | JTAG.JCE3 |
| TCELL8:OUT_Q5 | JTAG.JCE2 |
| TCELL8:OUT_Q6 | JTAG.JCE1 |
| TCELL8:OUT_Q7 | JTAG.JRSTN |
| TCELL8:OUT_OFX0 | JTAG.JRTI8 |
| TCELL8:OUT_OFX1 | JTAG.JRTI7 |
| TCELL8:OUT_OFX2 | JTAG.JRTI6 |
| TCELL8:OUT_OFX3 | JTAG.JRTI5 |
| TCELL8:OUT_OFX4 | JTAG.JRTI4 |
| TCELL8:OUT_OFX5 | JTAG.JRTI3 |
| TCELL8:OUT_OFX6 | JTAG.JRTI2 |
| TCELL9:IMUX_A0 | JTAG.JTDO8 |
| TCELL9:IMUX_A1 | JTAG.JTDO7 |
| TCELL9:IMUX_A2 | JTAG.JTDO6 |
| TCELL9:IMUX_A3 | JTAG.JTDO5 |
| TCELL9:IMUX_A4 | JTAG.JTDO4 |
| TCELL9:IMUX_A5 | JTAG.JTDO3 |
| TCELL9:IMUX_A6 | JTAG.JTDO2 |
| TCELL9:IMUX_A7 | JTAG.JTDO1 |
| TCELL9:IMUX_B0 | JTAG.PSROUT1 |
| TCELL9:IMUX_B1 | JTAG.PSROUT2 |
| TCELL9:IMUX_B2 | JTAG.PSROUT3 |
| TCELL9:IMUX_B3 | SYSBUS.SMIRDATA63 |
| TCELL9:IMUX_B4 | SYSBUS.SMIRDATA62 |
| TCELL9:IMUX_B5 | SYSBUS.SMIRDATA61 |
| TCELL9:IMUX_B6 | SYSBUS.SMIRDATA60 |
| TCELL9:IMUX_B7 | SYSBUS.SMIRDATA59 |
| TCELL9:IMUX_C0 | SYSBUS.SMIRDATA58 |
| TCELL9:IMUX_C1 | SYSBUS.SMIRDATA57 |
| TCELL9:IMUX_C2 | SYSBUS.SMIRDATA56 |
| TCELL9:IMUX_C3 | SYSBUS.SMIRDATA55 |
| TCELL9:IMUX_C4 | SYSBUS.SMIRDATA54 |
| TCELL9:IMUX_C5 | SYSBUS.SMIRDATA53 |
| TCELL9:IMUX_C6 | SYSBUS.SMIRDATA52 |
| TCELL9:IMUX_C7 | SYSBUS.SMIRDATA51 |
| TCELL9:IMUX_D0 | SYSBUS.SMIRDATA50 |
| TCELL9:IMUX_D1 | SYSBUS.SMIRDATA49 |
| TCELL9:IMUX_D2 | SYSBUS.SMIRDATA48 |
| TCELL9:IMUX_D3 | SYSBUS.SMIRDATA47 |
| TCELL9:IMUX_CLK0 | RDBK.FFRDCFGCLK |
| TCELL9:IMUX_LSR0 | RDBK.FFRDCFG |
| TCELL9:OUT_F0 | JTAG.JRTI1 |
| TCELL9:OUT_F1 | JTAG.SCANENABLE8 |
| TCELL9:OUT_F2 | JTAG.SCANENABLE7 |
| TCELL9:OUT_F3 | JTAG.SCANENABLE6 |
| TCELL9:OUT_F4 | JTAG.SCANENABLE5 |
| TCELL9:OUT_F5 | JTAG.SCANENABLE4 |
| TCELL9:OUT_F6 | JTAG.SCANENABLE3 |
| TCELL9:OUT_F7 | JTAG.SCANENABLE2 |
| TCELL9:OUT_Q0 | JTAG.SCANENABLE1 |
| TCELL9:OUT_Q1 | JTAG.SCANI |
| TCELL9:OUT_Q2 | JTAG.JSHIFT |
| TCELL9:OUT_Q3 | JTAG.JTCK |
| TCELL9:OUT_Q4 | JTAG.JTDI |
| TCELL9:OUT_Q5 | JTAG.JUPDATE |
| TCELL9:OUT_Q6 | JTAG.PSRCAP |
| TCELL9:OUT_Q7 | JTAG.PSRENABLE1 |
| TCELL9:OUT_OFX0 | JTAG.PSRENABLE2 |
| TCELL9:OUT_OFX1 | JTAG.PSRENABLE3 |
| TCELL9:OUT_OFX2 | JTAG.PSRSFTN |
| TCELL9:OUT_OFX3 | JTAG.TRESET |
| TCELL9:OUT_OFX4 | RDBK.RDDATA |
| TCELL9:OUT_OFX5 | SYSBUS.SMIADDR9 |
| TCELL9:OUT_OFX6 | SYSBUS.SMIADDR8 |
| TCELL10:IMUX_A0 | SYSBUS.SMIRDATA46 |
| TCELL10:IMUX_A1 | SYSBUS.SMIRDATA45 |
| TCELL10:IMUX_A2 | SYSBUS.SMIRDATA44 |
| TCELL10:IMUX_A3 | SYSBUS.SMIRDATA43 |
| TCELL10:IMUX_A4 | SYSBUS.SMIRDATA42 |
| TCELL10:IMUX_A5 | SYSBUS.SMIRDATA41 |
| TCELL10:IMUX_A6 | SYSBUS.SMIRDATA40 |
| TCELL10:IMUX_A7 | SYSBUS.SMIRDATA39 |
| TCELL10:IMUX_B0 | SYSBUS.SMIRDATA38 |
| TCELL10:IMUX_B1 | SYSBUS.SMIRDATA37 |
| TCELL10:IMUX_B2 | SYSBUS.SMIRDATA36 |
| TCELL10:IMUX_B3 | SYSBUS.SMIRDATA35 |
| TCELL10:IMUX_B4 | SYSBUS.SMIRDATA34 |
| TCELL10:IMUX_B5 | SYSBUS.SMIRDATA33 |
| TCELL10:IMUX_B6 | SYSBUS.SMIRDATA32 |
| TCELL10:IMUX_B7 | SYSBUS.SMIRDATA31 |
| TCELL10:IMUX_C0 | SYSBUS.SMIRDATA30 |
| TCELL10:IMUX_C1 | SYSBUS.SMIRDATA29 |
| TCELL10:IMUX_C2 | SYSBUS.SMIRDATA28 |
| TCELL10:IMUX_C3 | SYSBUS.SMIRDATA27 |
| TCELL10:IMUX_C4 | SYSBUS.SMIRDATA26 |
| TCELL10:IMUX_C5 | SYSBUS.SMIRDATA25 |
| TCELL10:IMUX_C6 | SYSBUS.SMIRDATA24 |
| TCELL10:IMUX_C7 | SYSBUS.SMIRDATA23 |
| TCELL10:IMUX_D0 | SYSBUS.SMIRDATA22 |
| TCELL10:IMUX_D1 | SYSBUS.SMIRDATA21 |
| TCELL10:IMUX_D2 | SYSBUS.SMIRDATA20 |
| TCELL10:IMUX_D3 | SYSBUS.SMIRDATA19 |
| TCELL10:OUT_F0 | SYSBUS.SMIADDR7 |
| TCELL10:OUT_F1 | SYSBUS.SMIADDR6 |
| TCELL10:OUT_F2 | SYSBUS.SMIADDR5 |
| TCELL10:OUT_F3 | SYSBUS.SMIADDR4 |
| TCELL10:OUT_F4 | SYSBUS.SMIADDR3 |
| TCELL10:OUT_F5 | SYSBUS.SMIADDR2 |
| TCELL10:OUT_F6 | SYSBUS.SMIADDR1 |
| TCELL10:OUT_F7 | SYSBUS.SMIADDR0 |
| TCELL10:OUT_Q0 | SYSBUS.SMICLK |
| TCELL10:OUT_Q1 | SYSBUS.SMIRD |
| TCELL10:OUT_Q2 | SYSBUS.SMIRSTN |
| TCELL10:OUT_Q3 | SYSBUS.SMIWDATA |
| TCELL10:OUT_Q4 | SYSBUS.SMIWR |
| TCELL10:OUT_Q5 | SYSBUS.SYSBDEBUG23 |
| TCELL10:OUT_Q6 | SYSBUS.SYSBDEBUG22 |
| TCELL10:OUT_Q7 | SYSBUS.SYSBDEBUG21 |
| TCELL10:OUT_OFX0 | SYSBUS.SYSBDEBUG20 |
| TCELL10:OUT_OFX1 | SYSBUS.SYSBDEBUG19 |
| TCELL10:OUT_OFX2 | SYSBUS.SYSBDEBUG18 |
| TCELL10:OUT_OFX3 | SYSBUS.SYSBDEBUG17 |
| TCELL10:OUT_OFX4 | SYSBUS.SYSBDEBUG16 |
| TCELL10:OUT_OFX5 | SYSBUS.SYSBDEBUG15 |
| TCELL10:OUT_OFX6 | SYSBUS.SYSBDEBUG14 |
| TCELL11:IMUX_A0 | SYSBUS.SMIRDATA18 |
| TCELL11:IMUX_A1 | SYSBUS.SMIRDATA17 |
| TCELL11:IMUX_A2 | SYSBUS.SMIRDATA16 |
| TCELL11:IMUX_A3 | SYSBUS.SMIRDATA15 |
| TCELL11:IMUX_A4 | SYSBUS.SMIRDATA14 |
| TCELL11:IMUX_A5 | SYSBUS.SMIRDATA13 |
| TCELL11:IMUX_A6 | SYSBUS.SMIRDATA12 |
| TCELL11:IMUX_A7 | SYSBUS.SMIRDATA11 |
| TCELL11:IMUX_B0 | SYSBUS.SMIRDATA10 |
| TCELL11:IMUX_B1 | SYSBUS.SMIRDATA9 |
| TCELL11:IMUX_B2 | SYSBUS.SMIRDATA8 |
| TCELL11:IMUX_B3 | SYSBUS.SMIRDATA7 |
| TCELL11:IMUX_B4 | SYSBUS.SMIRDATA6 |
| TCELL11:IMUX_B5 | SYSBUS.SMIRDATA5 |
| TCELL11:IMUX_B6 | SYSBUS.SMIRDATA4 |
| TCELL11:IMUX_B7 | SYSBUS.SMIRDATA3 |
| TCELL11:IMUX_C0 | SYSBUS.SMIRDATA2 |
| TCELL11:IMUX_C1 | SYSBUS.SMIRDATA1 |
| TCELL11:IMUX_C2 | SYSBUS.SMIRDATA0 |
| TCELL11:IMUX_C4 | JTAG.TDO |
| TCELL11:IMUX_CLK0 | SERDES_CENTER.FFC_CK_CORE_TX |
| TCELL11:IMUX_LSR0 | SYSBUS.USERIRQI |
| TCELL11:OUT_F0 | SYSBUS.SYSBDEBUG13 |
| TCELL11:OUT_F1 | SYSBUS.SYSBDEBUG12 |
| TCELL11:OUT_F2 | SYSBUS.SYSBDEBUG11 |
| TCELL11:OUT_F3 | SYSBUS.SYSBDEBUG10 |
| TCELL11:OUT_F4 | SYSBUS.SYSBDEBUG9 |
| TCELL11:OUT_F5 | SYSBUS.SYSBDEBUG8 |
| TCELL11:OUT_F6 | SYSBUS.SYSBDEBUG7 |
| TCELL11:OUT_F7 | SYSBUS.SYSBDEBUG6 |
| TCELL11:OUT_Q0 | SYSBUS.SYSBDEBUG5 |
| TCELL11:OUT_Q1 | SYSBUS.SYSBDEBUG4 |
| TCELL11:OUT_Q2 | SYSBUS.SYSBDEBUG3 |
| TCELL11:OUT_Q3 | SYSBUS.SYSBDEBUG2 |
| TCELL11:OUT_Q4 | SYSBUS.SYSBDEBUG1 |
| TCELL11:OUT_Q5 | SYSBUS.SYSBDEBUG0 |
| TCELL11:OUT_Q6 | JTAG.TCK |
| TCELL11:OUT_Q7 | JTAG.TDI |
| TCELL11:OUT_OFX0 | JTAG.TMS |
| TCELL11:OUT_OFX1 | SYSBUS.USERIRQO |
| TCELL12:IMUX_CLK1 | GSR.CLK |