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Bitstream format

CREG

siliconblue CREG bittile 0
FrameBit
0 1 2 3 4 5
0 ~MISC:LOW_POWER - - - MISC:COLD_BOOT MISC:WARM_BOOT
MISC:COLD_BOOT 0.0.4
MISC:WARM_BOOT 0.0.5
non-inverted [0]
MISC:LOW_POWER 0.0.0
inverted ~[0]

SPEED

siliconblue SPEED bittile 0
FrameBit
0 1
0 SPEED:SPEED[0] SPEED:SPEED[1]
SPEED:SPEED 0.0.1 0.0.0
LOW 0 0
MEDIUM 0 1
HIGH 1 0