Cells: 2
IRIs: 0
siliconblue I3C bel IO0_I3C
Pin | Direction | Wires |
PU_ENB | input | TCELL0:IMUX.LC6.I0 |
WEAK_PU_ENB | input | TCELL0:IMUX.LC4.I0 |
siliconblue I3C bel IO1_I3C
Pin | Direction | Wires |
PU_ENB | input | TCELL0:IMUX.LC7.I0 |
WEAK_PU_ENB | input | TCELL0:IMUX.LC5.I0 |
siliconblue I3C bel FILTER0
Pin | Direction | Wires |
FILTERIN | input | TCELL0:IMUX.LC1.I0 |
FILTEROUT | output | TCELL0:OUT.LC2 |
siliconblue I3C bel FILTER1
Pin | Direction | Wires |
FILTERIN | input | TCELL0:IMUX.LC0.I0 |
FILTEROUT | output | TCELL0:OUT.LC1 |
siliconblue I3C bel wires
Wire | Pins |
TCELL0:IMUX.LC0.I0 | FILTER1.FILTERIN |
TCELL0:IMUX.LC1.I0 | FILTER0.FILTERIN |
TCELL0:IMUX.LC4.I0 | IO0_I3C.WEAK_PU_ENB |
TCELL0:IMUX.LC5.I0 | IO1_I3C.WEAK_PU_ENB |
TCELL0:IMUX.LC6.I0 | IO0_I3C.PU_ENB |
TCELL0:IMUX.LC7.I0 | IO1_I3C.PU_ENB |
TCELL0:OUT.LC1 | FILTER1.FILTEROUT |
TCELL0:OUT.LC2 | FILTER0.FILTEROUT |
siliconblue I3C bittile 0
Frame | Bit |
FILTER0:ENABLE |
1.5.7 |
1.3.7 |
1.2.7 |
FILTER1:ENABLE |
1.7.7 |
1.6.7 |
1.4.7 |
non-inverted
|
[2] |
[1] |
[0] |