Internal oscillators
Tile LSOSC
Cells: 2 IRIs: 0
Bel LSOSC
Pin | Direction | Wires |
---|---|---|
CLKK | output | TCELL1:OUT.LC0, TCELL1:OUT.LC4 |
ENACLKK | input | TCELL0:IMUX.IO.EXTRA |
Bel wires
Wire | Pins |
---|---|
TCELL0:IMUX.IO.EXTRA | LSOSC.ENACLKK |
TCELL1:OUT.LC0 | LSOSC.CLKK |
TCELL1:OUT.LC4 | LSOSC.CLKK |
Tile HSOSC
Cells: 2 IRIs: 0
Bel HSOSC
Pin | Direction | Wires |
---|---|---|
CLKM | output | TCELL1:OUT.LC0, TCELL1:OUT.LC4 |
ENACLKM | input | TCELL0:IMUX.IO.EXTRA |
Bel wires
Wire | Pins |
---|---|
TCELL0:IMUX.IO.EXTRA | HSOSC.ENACLKM |
TCELL1:OUT.LC0 | HSOSC.CLKM |
TCELL1:OUT.LC4 | HSOSC.CLKM |
Tile LFOSC_T04
Cells: 2 IRIs: 0
Bel LFOSC
Pin | Direction | Wires |
---|---|---|
CLKLF | output | TCELL1:OUT.LC0 |
CLKLFEN | input | TCELL1:IMUX.LC7.I3 |
CLKLFPU | input | TCELL1:IMUX.LC0.I1 |
TRIM0 | input | TCELL0:IMUX.LC2.I1 |
TRIM1 | input | TCELL0:IMUX.LC3.I1 |
TRIM2 | input | TCELL0:IMUX.LC4.I1 |
TRIM3 | input | TCELL0:IMUX.LC5.I1 |
TRIM4 | input | TCELL0:IMUX.LC6.I1 |
TRIM5 | input | TCELL0:IMUX.LC7.I1 |
TRIM6 | input | TCELL0:IMUX.LC0.I0 |
TRIM7 | input | TCELL0:IMUX.LC1.I0 |
TRIM8 | input | TCELL0:IMUX.LC2.I0 |
TRIM9 | input | TCELL0:IMUX.LC3.I0 |
Bel wires
Wire | Pins |
---|---|
TCELL0:IMUX.LC0.I0 | LFOSC.TRIM6 |
TCELL0:IMUX.LC1.I0 | LFOSC.TRIM7 |
TCELL0:IMUX.LC2.I0 | LFOSC.TRIM8 |
TCELL0:IMUX.LC2.I1 | LFOSC.TRIM0 |
TCELL0:IMUX.LC3.I0 | LFOSC.TRIM9 |
TCELL0:IMUX.LC3.I1 | LFOSC.TRIM1 |
TCELL0:IMUX.LC4.I1 | LFOSC.TRIM2 |
TCELL0:IMUX.LC5.I1 | LFOSC.TRIM3 |
TCELL0:IMUX.LC6.I1 | LFOSC.TRIM4 |
TCELL0:IMUX.LC7.I1 | LFOSC.TRIM5 |
TCELL1:IMUX.LC0.I1 | LFOSC.CLKLFPU |
TCELL1:IMUX.LC7.I3 | LFOSC.CLKLFEN |
TCELL1:OUT.LC0 | LFOSC.CLKLF |
Tile LFOSC_T01
Cells: 2 IRIs: 0
Bel LFOSC
Pin | Direction | Wires |
---|---|---|
CLKLF | output | TCELL0:OUT.LC4 |
CLKLFEN | input | TCELL1:IMUX.LC4.I3 |
CLKLFPU | input | TCELL1:IMUX.LC3.I3 |
TRIM0 | input | TCELL1:IMUX.LC6.I3 |
TRIM1 | input | TCELL1:IMUX.LC7.I3 |
TRIM2 | input | TCELL1:IMUX.LC0.I1 |
TRIM3 | input | TCELL1:IMUX.LC1.I1 |
TRIM4 | input | TCELL1:IMUX.LC2.I1 |
TRIM5 | input | TCELL1:IMUX.LC3.I1 |
TRIM6 | input | TCELL1:IMUX.LC4.I1 |
TRIM7 | input | TCELL1:IMUX.LC5.I1 |
TRIM8 | input | TCELL1:IMUX.LC6.I1 |
TRIM9 | input | TCELL1:IMUX.LC7.I1 |
Bel wires
Wire | Pins |
---|---|
TCELL0:OUT.LC4 | LFOSC.CLKLF |
TCELL1:IMUX.LC0.I1 | LFOSC.TRIM2 |
TCELL1:IMUX.LC1.I1 | LFOSC.TRIM3 |
TCELL1:IMUX.LC2.I1 | LFOSC.TRIM4 |
TCELL1:IMUX.LC3.I1 | LFOSC.TRIM5 |
TCELL1:IMUX.LC3.I3 | LFOSC.CLKLFPU |
TCELL1:IMUX.LC4.I1 | LFOSC.TRIM6 |
TCELL1:IMUX.LC4.I3 | LFOSC.CLKLFEN |
TCELL1:IMUX.LC5.I1 | LFOSC.TRIM7 |
TCELL1:IMUX.LC6.I1 | LFOSC.TRIM8 |
TCELL1:IMUX.LC6.I3 | LFOSC.TRIM0 |
TCELL1:IMUX.LC7.I1 | LFOSC.TRIM9 |
TCELL1:IMUX.LC7.I3 | LFOSC.TRIM1 |
Tile HFOSC_T04
Cells: 4 IRIs: 0
Bel HFOSC
Pin | Direction | Wires |
---|---|---|
CLKHF | output | TCELL0:OUT.LC7 |
CLKHFEN | input | TCELL1:IMUX.LC7.I3 |
CLKHFPU | input | TCELL1:IMUX.LC0.I1 |
TRIM0 | input | TCELL2:IMUX.LC4.I0 |
TRIM1 | input | TCELL2:IMUX.LC5.I0 |
TRIM2 | input | TCELL2:IMUX.LC6.I0 |
TRIM3 | input | TCELL2:IMUX.LC7.I0 |
TRIM4 | input | TCELL3:IMUX.LC0.I3 |
TRIM5 | input | TCELL3:IMUX.LC1.I3 |
TRIM6 | input | TCELL3:IMUX.LC2.I3 |
TRIM7 | input | TCELL3:IMUX.LC3.I3 |
TRIM8 | input | TCELL3:IMUX.LC4.I3 |
TRIM9 | input | TCELL3:IMUX.LC5.I3 |
Bel wires
Wire | Pins |
---|---|
TCELL0:OUT.LC7 | HFOSC.CLKHF |
TCELL1:IMUX.LC0.I1 | HFOSC.CLKHFPU |
TCELL1:IMUX.LC7.I3 | HFOSC.CLKHFEN |
TCELL2:IMUX.LC4.I0 | HFOSC.TRIM0 |
TCELL2:IMUX.LC5.I0 | HFOSC.TRIM1 |
TCELL2:IMUX.LC6.I0 | HFOSC.TRIM2 |
TCELL2:IMUX.LC7.I0 | HFOSC.TRIM3 |
TCELL3:IMUX.LC0.I3 | HFOSC.TRIM4 |
TCELL3:IMUX.LC1.I3 | HFOSC.TRIM5 |
TCELL3:IMUX.LC2.I3 | HFOSC.TRIM6 |
TCELL3:IMUX.LC3.I3 | HFOSC.TRIM7 |
TCELL3:IMUX.LC4.I3 | HFOSC.TRIM8 |
TCELL3:IMUX.LC5.I3 | HFOSC.TRIM9 |
Tile HFOSC_T01
Cells: 2 IRIs: 0
Bel HFOSC
Pin | Direction | Wires |
---|---|---|
CLKHF | output | TCELL0:OUT.LC4 |
CLKHFEN | input | TCELL1:IMUX.LC4.I1 |
CLKHFPU | input | TCELL1:IMUX.LC5.I1 |
TRIM0 | input | TCELL1:IMUX.LC2.I3 |
TRIM1 | input | TCELL1:IMUX.LC3.I3 |
TRIM2 | input | TCELL1:IMUX.LC4.I3 |
TRIM3 | input | TCELL1:IMUX.LC5.I3 |
TRIM4 | input | TCELL1:IMUX.LC6.I3 |
TRIM5 | input | TCELL1:IMUX.LC7.I3 |
TRIM6 | input | TCELL1:IMUX.LC0.I1 |
TRIM7 | input | TCELL1:IMUX.LC1.I1 |
TRIM8 | input | TCELL1:IMUX.LC2.I1 |
TRIM9 | input | TCELL1:IMUX.LC3.I1 |
Bel wires
Wire | Pins |
---|---|
TCELL0:OUT.LC4 | HFOSC.CLKHF |
TCELL1:IMUX.LC0.I1 | HFOSC.TRIM6 |
TCELL1:IMUX.LC1.I1 | HFOSC.TRIM7 |
TCELL1:IMUX.LC2.I1 | HFOSC.TRIM8 |
TCELL1:IMUX.LC2.I3 | HFOSC.TRIM0 |
TCELL1:IMUX.LC3.I1 | HFOSC.TRIM9 |
TCELL1:IMUX.LC3.I3 | HFOSC.TRIM1 |
TCELL1:IMUX.LC4.I1 | HFOSC.CLKHFEN |
TCELL1:IMUX.LC4.I3 | HFOSC.TRIM2 |
TCELL1:IMUX.LC5.I1 | HFOSC.CLKHFPU |
TCELL1:IMUX.LC5.I3 | HFOSC.TRIM3 |
TCELL1:IMUX.LC6.I3 | HFOSC.TRIM4 |
TCELL1:IMUX.LC7.I3 | HFOSC.TRIM5 |
Tile TRIM_T04
Cells: 1 IRIs: 0
Bitstream
Frame | Bit | |||||||
---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | |
0 | - | - | - | - | - | - | - | LED_DRV_CUR:TRIM_FABRIC |
1 | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | HFOSC:CLKHF_DIV[0] |
3 | - | - | - | - | - | - | - | LFOSC:TRIM_FABRIC |
4 | - | - | - | - | - | - | - | HFOSC:TRIM_FABRIC |
5 | - | - | - | - | - | - | - | HFOSC:CLKHF_DIV[1] |
HFOSC:CLKHF_DIV | 0.5.7 | 0.2.7 |
---|---|---|
non-inverted | [1] | [0] |
HFOSC:TRIM_FABRIC | 0.4.7 |
---|---|
LED_DRV_CUR:TRIM_FABRIC | 0.0.7 |
LFOSC:TRIM_FABRIC | 0.3.7 |
non-inverted | [0] |
Tile TRIM_T01
Cells: 1 IRIs: 0
Bitstream
Frame | Bit | |||||||
---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | |
0 | - | - | - | - | - | - | - | LFOSC:TRIM_FABRIC |
1 | - | - | - | - | - | - | - | LED_DRV_CUR:TRIM_FABRIC |
2 | - | - | - | - | - | - | - | HFOSC:CLKHF_DIV[1] |
3 | - | - | - | - | - | - | - | HFOSC:CLKHF_DIV[0] |
4 | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | HFOSC:TRIM_FABRIC |
HFOSC:CLKHF_DIV | 0.2.7 | 0.3.7 |
---|---|---|
non-inverted | [1] | [0] |
HFOSC:TRIM_FABRIC | 0.5.7 |
---|---|
LED_DRV_CUR:TRIM_FABRIC | 0.1.7 |
LFOSC:TRIM_FABRIC | 0.0.7 |
non-inverted | [0] |