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SPI controller

Tile SPI_R04

Cells: 15

Bel SPI

siliconblue SPI_R04 bel SPI
PinDirectionWires
MCSNO0outputTCELL13:OUT.LC0, TCELL13:OUT.LC4
MCSNO1outputTCELL14:OUT.LC0, TCELL14:OUT.LC4
MCSNO2outputTCELL6:OUT.LC0, TCELL6:OUT.LC4
MCSNO3outputTCELL7:OUT.LC0, TCELL7:OUT.LC4
MCSNOE0outputTCELL13:OUT.LC2, TCELL13:OUT.LC6
MCSNOE1outputTCELL14:OUT.LC2, TCELL14:OUT.LC6
MCSNOE2outputTCELL6:OUT.LC2, TCELL6:OUT.LC6
MCSNOE3outputTCELL7:OUT.LC2, TCELL7:OUT.LC6
MIinputTCELL11:IMUX.IO0.DOUT0
MOoutputTCELL11:OUT.LC0, TCELL11:OUT.LC4
MOEoutputTCELL11:OUT.LC2, TCELL11:OUT.LC6
SBACKOoutputTCELL4:OUT.LC0, TCELL4:OUT.LC4
SBADRI0inputTCELL5:IMUX.IO1.DOUT0
SBADRI1inputTCELL6:IMUX.IO0.DOUT0
SBADRI2inputTCELL6:IMUX.IO1.DOUT0
SBADRI3inputTCELL7:IMUX.IO0.DOUT0
SBADRI4inputTCELL7:IMUX.IO1.DOUT0
SBADRI5inputTCELL8:IMUX.IO0.DOUT0
SBADRI6inputTCELL8:IMUX.IO1.DOUT0
SBADRI7inputTCELL9:IMUX.IO0.DOUT0
SBCLKIinputTCELL0:IMUX.IO0.DOUT0
SBDATI0inputTCELL1:IMUX.IO1.DOUT0
SBDATI1inputTCELL2:IMUX.IO0.DOUT0
SBDATI2inputTCELL2:IMUX.IO1.DOUT0
SBDATI3inputTCELL3:IMUX.IO0.DOUT0
SBDATI4inputTCELL3:IMUX.IO1.DOUT0
SBDATI5inputTCELL4:IMUX.IO0.DOUT0
SBDATI6inputTCELL4:IMUX.IO1.DOUT0
SBDATI7inputTCELL5:IMUX.IO0.DOUT0
SBDATO0outputTCELL0:OUT.LC0, TCELL0:OUT.LC4
SBDATO1outputTCELL0:OUT.LC2, TCELL0:OUT.LC6
SBDATO2outputTCELL1:OUT.LC0, TCELL1:OUT.LC4
SBDATO3outputTCELL1:OUT.LC2, TCELL1:OUT.LC6
SBDATO4outputTCELL2:OUT.LC0, TCELL2:OUT.LC4
SBDATO5outputTCELL2:OUT.LC2, TCELL2:OUT.LC6
SBDATO6outputTCELL3:OUT.LC0, TCELL3:OUT.LC4
SBDATO7outputTCELL3:OUT.LC2, TCELL3:OUT.LC6
SBRWIinputTCELL1:IMUX.IO0.DOUT0
SBSTBIinputTCELL9:IMUX.IO1.DOUT0
SCKIinputTCELL12:IMUX.IO0.DOUT0
SCKOoutputTCELL12:OUT.LC0, TCELL12:OUT.LC4
SCKOEoutputTCELL12:OUT.LC2, TCELL12:OUT.LC6
SCSNIinputTCELL13:IMUX.IO0.DOUT0
SIinputTCELL10:IMUX.IO0.DOUT0
SOoutputTCELL10:OUT.LC0, TCELL10:OUT.LC4
SOEoutputTCELL10:OUT.LC2, TCELL10:OUT.LC6
SPIIRQoutputTCELL4:OUT.LC2, TCELL4:OUT.LC6
SPIWKUPoutputTCELL5:OUT.LC0, TCELL5:OUT.LC4

Bel wires

siliconblue SPI_R04 bel wires
WirePins
TCELL0:IMUX.IO0.DOUT0SPI.SBCLKI
TCELL0:OUT.LC0SPI.SBDATO0
TCELL0:OUT.LC2SPI.SBDATO1
TCELL0:OUT.LC4SPI.SBDATO0
TCELL0:OUT.LC6SPI.SBDATO1
TCELL1:IMUX.IO0.DOUT0SPI.SBRWI
TCELL1:IMUX.IO1.DOUT0SPI.SBDATI0
TCELL1:OUT.LC0SPI.SBDATO2
TCELL1:OUT.LC2SPI.SBDATO3
TCELL1:OUT.LC4SPI.SBDATO2
TCELL1:OUT.LC6SPI.SBDATO3
TCELL2:IMUX.IO0.DOUT0SPI.SBDATI1
TCELL2:IMUX.IO1.DOUT0SPI.SBDATI2
TCELL2:OUT.LC0SPI.SBDATO4
TCELL2:OUT.LC2SPI.SBDATO5
TCELL2:OUT.LC4SPI.SBDATO4
TCELL2:OUT.LC6SPI.SBDATO5
TCELL3:IMUX.IO0.DOUT0SPI.SBDATI3
TCELL3:IMUX.IO1.DOUT0SPI.SBDATI4
TCELL3:OUT.LC0SPI.SBDATO6
TCELL3:OUT.LC2SPI.SBDATO7
TCELL3:OUT.LC4SPI.SBDATO6
TCELL3:OUT.LC6SPI.SBDATO7
TCELL4:IMUX.IO0.DOUT0SPI.SBDATI5
TCELL4:IMUX.IO1.DOUT0SPI.SBDATI6
TCELL4:OUT.LC0SPI.SBACKO
TCELL4:OUT.LC2SPI.SPIIRQ
TCELL4:OUT.LC4SPI.SBACKO
TCELL4:OUT.LC6SPI.SPIIRQ
TCELL5:IMUX.IO0.DOUT0SPI.SBDATI7
TCELL5:IMUX.IO1.DOUT0SPI.SBADRI0
TCELL5:OUT.LC0SPI.SPIWKUP
TCELL5:OUT.LC4SPI.SPIWKUP
TCELL6:IMUX.IO0.DOUT0SPI.SBADRI1
TCELL6:IMUX.IO1.DOUT0SPI.SBADRI2
TCELL6:OUT.LC0SPI.MCSNO2
TCELL6:OUT.LC2SPI.MCSNOE2
TCELL6:OUT.LC4SPI.MCSNO2
TCELL6:OUT.LC6SPI.MCSNOE2
TCELL7:IMUX.IO0.DOUT0SPI.SBADRI3
TCELL7:IMUX.IO1.DOUT0SPI.SBADRI4
TCELL7:OUT.LC0SPI.MCSNO3
TCELL7:OUT.LC2SPI.MCSNOE3
TCELL7:OUT.LC4SPI.MCSNO3
TCELL7:OUT.LC6SPI.MCSNOE3
TCELL8:IMUX.IO0.DOUT0SPI.SBADRI5
TCELL8:IMUX.IO1.DOUT0SPI.SBADRI6
TCELL9:IMUX.IO0.DOUT0SPI.SBADRI7
TCELL9:IMUX.IO1.DOUT0SPI.SBSTBI
TCELL10:IMUX.IO0.DOUT0SPI.SI
TCELL10:OUT.LC0SPI.SO
TCELL10:OUT.LC2SPI.SOE
TCELL10:OUT.LC4SPI.SO
TCELL10:OUT.LC6SPI.SOE
TCELL11:IMUX.IO0.DOUT0SPI.MI
TCELL11:OUT.LC0SPI.MO
TCELL11:OUT.LC2SPI.MOE
TCELL11:OUT.LC4SPI.MO
TCELL11:OUT.LC6SPI.MOE
TCELL12:IMUX.IO0.DOUT0SPI.SCKI
TCELL12:OUT.LC0SPI.SCKO
TCELL12:OUT.LC2SPI.SCKOE
TCELL12:OUT.LC4SPI.SCKO
TCELL12:OUT.LC6SPI.SCKOE
TCELL13:IMUX.IO0.DOUT0SPI.SCSNI
TCELL13:OUT.LC0SPI.MCSNO0
TCELL13:OUT.LC2SPI.MCSNOE0
TCELL13:OUT.LC4SPI.MCSNO0
TCELL13:OUT.LC6SPI.MCSNOE0
TCELL14:OUT.LC0SPI.MCSNO1
TCELL14:OUT.LC2SPI.MCSNOE1
TCELL14:OUT.LC4SPI.MCSNO1
TCELL14:OUT.LC6SPI.MCSNOE1

Tile SPI_T04

Cells: 4

Bel SPI

siliconblue SPI_T04 bel SPI
PinDirectionWires
MCSNO0outputTCELL2:OUT.LC1
MCSNO1outputTCELL2:OUT.LC3
MCSNO2outputTCELL2:OUT.LC6
MCSNO3outputTCELL3:OUT.LC0
MCSNOE0outputTCELL2:OUT.LC2
MCSNOE1outputTCELL2:OUT.LC4
MCSNOE2outputTCELL2:OUT.LC7
MCSNOE3outputTCELL3:OUT.LC1
MIinputTCELL1:IMUX.LC0.I1
MOoutputTCELL1:OUT.LC5
MOEoutputTCELL1:OUT.LC6
SBACKOoutputTCELL1:OUT.LC0
SBADRI0inputTCELL0:IMUX.LC1.I1
SBADRI1inputTCELL0:IMUX.LC2.I1
SBADRI2inputTCELL1:IMUX.LC0.I3
SBADRI3inputTCELL1:IMUX.LC1.I3
SBADRI4inputTCELL1:IMUX.LC2.I3
SBADRI5inputTCELL1:IMUX.LC3.I3
SBADRI6inputTCELL1:IMUX.LC4.I3
SBADRI7inputTCELL1:IMUX.LC5.I3
SBCLKIinputTCELL0:IMUX.CLK.OPTINV
SBDATI0inputTCELL0:IMUX.LC1.I3
SBDATI1inputTCELL0:IMUX.LC2.I3
SBDATI2inputTCELL0:IMUX.LC3.I3
SBDATI3inputTCELL0:IMUX.LC4.I3
SBDATI4inputTCELL0:IMUX.LC5.I3
SBDATI5inputTCELL0:IMUX.LC6.I3
SBDATI6inputTCELL0:IMUX.LC7.I3
SBDATI7inputTCELL0:IMUX.LC0.I1
SBDATO0outputTCELL0:OUT.LC0
SBDATO1outputTCELL0:OUT.LC1
SBDATO2outputTCELL0:OUT.LC2
SBDATO3outputTCELL0:OUT.LC3
SBDATO4outputTCELL0:OUT.LC4
SBDATO5outputTCELL0:OUT.LC5
SBDATO6outputTCELL0:OUT.LC6
SBDATO7outputTCELL0:OUT.LC7
SBRWIinputTCELL0:IMUX.LC0.I3
SBSTBIinputTCELL1:IMUX.LC6.I3
SCKIinputTCELL1:IMUX.LC1.I1
SCKOoutputTCELL1:OUT.LC7
SCKOEoutputTCELL2:OUT.LC0
SCSNIinputTCELL1:IMUX.LC2.I1
SIinputTCELL1:IMUX.LC7.I3
SOoutputTCELL1:OUT.LC3
SOEoutputTCELL1:OUT.LC4
SPIIRQoutputTCELL1:OUT.LC1
SPIWKUPoutputTCELL1:OUT.LC2

Bel wires

siliconblue SPI_T04 bel wires
WirePins
TCELL0:IMUX.LC0.I1SPI.SBDATI7
TCELL0:IMUX.LC0.I3SPI.SBRWI
TCELL0:IMUX.LC1.I1SPI.SBADRI0
TCELL0:IMUX.LC1.I3SPI.SBDATI0
TCELL0:IMUX.LC2.I1SPI.SBADRI1
TCELL0:IMUX.LC2.I3SPI.SBDATI1
TCELL0:IMUX.LC3.I3SPI.SBDATI2
TCELL0:IMUX.LC4.I3SPI.SBDATI3
TCELL0:IMUX.LC5.I3SPI.SBDATI4
TCELL0:IMUX.LC6.I3SPI.SBDATI5
TCELL0:IMUX.LC7.I3SPI.SBDATI6
TCELL0:IMUX.CLK.OPTINVSPI.SBCLKI
TCELL0:OUT.LC0SPI.SBDATO0
TCELL0:OUT.LC1SPI.SBDATO1
TCELL0:OUT.LC2SPI.SBDATO2
TCELL0:OUT.LC3SPI.SBDATO3
TCELL0:OUT.LC4SPI.SBDATO4
TCELL0:OUT.LC5SPI.SBDATO5
TCELL0:OUT.LC6SPI.SBDATO6
TCELL0:OUT.LC7SPI.SBDATO7
TCELL1:IMUX.LC0.I1SPI.MI
TCELL1:IMUX.LC0.I3SPI.SBADRI2
TCELL1:IMUX.LC1.I1SPI.SCKI
TCELL1:IMUX.LC1.I3SPI.SBADRI3
TCELL1:IMUX.LC2.I1SPI.SCSNI
TCELL1:IMUX.LC2.I3SPI.SBADRI4
TCELL1:IMUX.LC3.I3SPI.SBADRI5
TCELL1:IMUX.LC4.I3SPI.SBADRI6
TCELL1:IMUX.LC5.I3SPI.SBADRI7
TCELL1:IMUX.LC6.I3SPI.SBSTBI
TCELL1:IMUX.LC7.I3SPI.SI
TCELL1:OUT.LC0SPI.SBACKO
TCELL1:OUT.LC1SPI.SPIIRQ
TCELL1:OUT.LC2SPI.SPIWKUP
TCELL1:OUT.LC3SPI.SO
TCELL1:OUT.LC4SPI.SOE
TCELL1:OUT.LC5SPI.MO
TCELL1:OUT.LC6SPI.MOE
TCELL1:OUT.LC7SPI.SCKO
TCELL2:OUT.LC0SPI.SCKOE
TCELL2:OUT.LC1SPI.MCSNO0
TCELL2:OUT.LC2SPI.MCSNOE0
TCELL2:OUT.LC3SPI.MCSNO1
TCELL2:OUT.LC4SPI.MCSNOE1
TCELL2:OUT.LC6SPI.MCSNO2
TCELL2:OUT.LC7SPI.MCSNOE2
TCELL3:OUT.LC0SPI.MCSNO3
TCELL3:OUT.LC1SPI.MCSNOE3

Tile SPI_T05

Cells: 4

Bel SPI

siliconblue SPI_T05 bel SPI
PinDirectionWires
MCSNO0outputTCELL2:OUT.LC2
MCSNO1outputTCELL2:OUT.LC4
MCSNO2outputTCELL2:OUT.LC7
MCSNO3outputTCELL3:OUT.LC1
MCSNOE0outputTCELL2:OUT.LC3
MCSNOE1outputTCELL2:OUT.LC5
MCSNOE2outputTCELL3:OUT.LC0
MCSNOE3outputTCELL3:OUT.LC2
MIinputTCELL3:IMUX.LC0.I1
MOoutputTCELL1:OUT.LC6
MOEoutputTCELL1:OUT.LC7
SBACKOoutputTCELL1:OUT.LC1
SBADRI0inputTCELL0:IMUX.LC1.I1
SBADRI1inputTCELL0:IMUX.LC2.I1
SBADRI2inputTCELL1:IMUX.LC0.I3
SBADRI3inputTCELL1:IMUX.LC1.I3
SBADRI4inputTCELL1:IMUX.LC2.I3
SBADRI5inputTCELL1:IMUX.LC3.I3
SBADRI6inputTCELL1:IMUX.LC4.I3
SBADRI7inputTCELL1:IMUX.LC5.I3
SBCLKIinputTCELL1:IMUX.CLK.OPTINV
SBDATI0inputTCELL0:IMUX.LC1.I3
SBDATI1inputTCELL0:IMUX.LC2.I3
SBDATI2inputTCELL0:IMUX.LC3.I3
SBDATI3inputTCELL0:IMUX.LC4.I3
SBDATI4inputTCELL0:IMUX.LC5.I3
SBDATI5inputTCELL0:IMUX.LC6.I3
SBDATI6inputTCELL0:IMUX.LC7.I3
SBDATI7inputTCELL0:IMUX.LC0.I1
SBDATO0outputTCELL0:OUT.LC1
SBDATO1outputTCELL0:OUT.LC2
SBDATO2outputTCELL0:OUT.LC3
SBDATO3outputTCELL0:OUT.LC4
SBDATO4outputTCELL0:OUT.LC5
SBDATO5outputTCELL0:OUT.LC6
SBDATO6outputTCELL0:OUT.LC7
SBDATO7outputTCELL1:OUT.LC0
SBRWIinputTCELL0:IMUX.LC0.I3
SBSTBIinputTCELL1:IMUX.LC6.I3
SCKIinputTCELL3:IMUX.LC1.I1
SCKOoutputTCELL2:OUT.LC0
SCKOEoutputTCELL2:OUT.LC1
SCSNIinputTCELL3:IMUX.LC2.I1
SIinputTCELL3:IMUX.LC7.I3
SOoutputTCELL1:OUT.LC4
SOEoutputTCELL1:OUT.LC5
SPIIRQoutputTCELL1:OUT.LC2
SPIWKUPoutputTCELL1:OUT.LC3

Bel wires

siliconblue SPI_T05 bel wires
WirePins
TCELL0:IMUX.LC0.I1SPI.SBDATI7
TCELL0:IMUX.LC0.I3SPI.SBRWI
TCELL0:IMUX.LC1.I1SPI.SBADRI0
TCELL0:IMUX.LC1.I3SPI.SBDATI0
TCELL0:IMUX.LC2.I1SPI.SBADRI1
TCELL0:IMUX.LC2.I3SPI.SBDATI1
TCELL0:IMUX.LC3.I3SPI.SBDATI2
TCELL0:IMUX.LC4.I3SPI.SBDATI3
TCELL0:IMUX.LC5.I3SPI.SBDATI4
TCELL0:IMUX.LC6.I3SPI.SBDATI5
TCELL0:IMUX.LC7.I3SPI.SBDATI6
TCELL0:OUT.LC1SPI.SBDATO0
TCELL0:OUT.LC2SPI.SBDATO1
TCELL0:OUT.LC3SPI.SBDATO2
TCELL0:OUT.LC4SPI.SBDATO3
TCELL0:OUT.LC5SPI.SBDATO4
TCELL0:OUT.LC6SPI.SBDATO5
TCELL0:OUT.LC7SPI.SBDATO6
TCELL1:IMUX.LC0.I3SPI.SBADRI2
TCELL1:IMUX.LC1.I3SPI.SBADRI3
TCELL1:IMUX.LC2.I3SPI.SBADRI4
TCELL1:IMUX.LC3.I3SPI.SBADRI5
TCELL1:IMUX.LC4.I3SPI.SBADRI6
TCELL1:IMUX.LC5.I3SPI.SBADRI7
TCELL1:IMUX.LC6.I3SPI.SBSTBI
TCELL1:IMUX.CLK.OPTINVSPI.SBCLKI
TCELL1:OUT.LC0SPI.SBDATO7
TCELL1:OUT.LC1SPI.SBACKO
TCELL1:OUT.LC2SPI.SPIIRQ
TCELL1:OUT.LC3SPI.SPIWKUP
TCELL1:OUT.LC4SPI.SO
TCELL1:OUT.LC5SPI.SOE
TCELL1:OUT.LC6SPI.MO
TCELL1:OUT.LC7SPI.MOE
TCELL2:OUT.LC0SPI.SCKO
TCELL2:OUT.LC1SPI.SCKOE
TCELL2:OUT.LC2SPI.MCSNO0
TCELL2:OUT.LC3SPI.MCSNOE0
TCELL2:OUT.LC4SPI.MCSNO1
TCELL2:OUT.LC5SPI.MCSNOE1
TCELL2:OUT.LC7SPI.MCSNO2
TCELL3:IMUX.LC0.I1SPI.MI
TCELL3:IMUX.LC1.I1SPI.SCKI
TCELL3:IMUX.LC2.I1SPI.SCSNI
TCELL3:IMUX.LC7.I3SPI.SI
TCELL3:OUT.LC0SPI.MCSNOE2
TCELL3:OUT.LC1SPI.MCSNO3
TCELL3:OUT.LC2SPI.MCSNOE3