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I/O Buffers (FPGAcore)

TODO: document

Tile IOB_FC_N

Cells: 1

Bels IBUF

spartan3 IOB_FC_N bel IBUF pins
PinDirectionIBUF[0]IBUF[1]IBUF[2]IBUF[3]
spartan3 IOB_FC_N bel IBUF attribute bits
AttributeIBUF[0]IBUF[1]IBUF[2]IBUF[3]
ENABLETERM[3][4]TERM[6][4]TERM[11][4]TERM[14][4]
O2IPAD_ENABLETERM[4][4]TERM[5][4]TERM[12][4]TERM[13][4]

Bels OBUF

spartan3 IOB_FC_N bel OBUF pins
PinDirectionOBUF[0]OBUF[1]OBUF[2]OBUF[3]
spartan3 IOB_FC_N bel OBUF attribute bits
AttributeOBUF[0]OBUF[1]OBUF[2]OBUF[3]
ENABLE bit 0TERM[4][0]TERM[5][0]TERM[12][0]TERM[13][0]
ENABLE bit 1TERM[4][1]TERM[5][1]TERM[12][1]TERM[13][1]
MISR_ENABLETERM[3][1]TERM[6][1]TERM[11][1]TERM[14][1]

Bitstream

spartan3 IOB_FC_N rect TERM
BitFrame
F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 F0
B4 - - - - IBUF[3]: ENABLE IBUF[3]: O2IPAD_ENABLE IBUF[2]: O2IPAD_ENABLE IBUF[2]: ENABLE - - - - IBUF[1]: ENABLE IBUF[1]: O2IPAD_ENABLE IBUF[0]: O2IPAD_ENABLE IBUF[0]: ENABLE - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - OBUF[3]: MISR_ENABLE OBUF[3]: ENABLE bit 1 OBUF[2]: ENABLE bit 1 OBUF[2]: MISR_ENABLE - - - - OBUF[1]: MISR_ENABLE OBUF[1]: ENABLE bit 1 OBUF[0]: ENABLE bit 1 OBUF[0]: MISR_ENABLE - - -
B0 - - - - - OBUF[3]: ENABLE bit 0 OBUF[2]: ENABLE bit 0 - - - - - - OBUF[1]: ENABLE bit 0 OBUF[0]: ENABLE bit 0 - - - -

Tile IOB_FC_E

Cells: 1

Bels IBUF

spartan3 IOB_FC_E bel IBUF pins
PinDirectionIBUF[0]IBUF[1]IBUF[2]IBUF[3]
spartan3 IOB_FC_E bel IBUF attribute bits
AttributeIBUF[0]IBUF[1]IBUF[2]IBUF[3]
ENABLETERM[0][13]TERM[0][24]TERM[0][43]TERM[0][54]
O2IPAD_ENABLETERM[0][18]TERM[0][19]TERM[0][48]TERM[0][49]

Bels OBUF

spartan3 IOB_FC_E bel OBUF pins
PinDirectionOBUF[0]OBUF[1]OBUF[2]OBUF[3]
spartan3 IOB_FC_E bel OBUF attribute bits
AttributeOBUF[0]OBUF[1]OBUF[2]OBUF[3]
ENABLE bit 0TERM[0][14]TERM[0][22]TERM[0][44]TERM[0][52]
ENABLE bit 1TERM[0][15]TERM[0][23]TERM[0][45]TERM[0][53]
MISR_ENABLETERM[0][10]TERM[0][27]TERM[0][40]TERM[0][57]

Bitstream

spartan3 IOB_FC_E rect TERM
BitFrame
F1 F0
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - OBUF[3]: MISR_ENABLE
B56 - -
B55 - -
B54 - IBUF[3]: ENABLE
B53 - OBUF[3]: ENABLE bit 1
B52 - OBUF[3]: ENABLE bit 0
B51 - -
B50 - -
B49 - IBUF[3]: O2IPAD_ENABLE
B48 - IBUF[2]: O2IPAD_ENABLE
B47 - -
B46 - -
B45 - OBUF[2]: ENABLE bit 1
B44 - OBUF[2]: ENABLE bit 0
B43 - IBUF[2]: ENABLE
B42 - -
B41 - -
B40 - OBUF[2]: MISR_ENABLE
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - OBUF[1]: MISR_ENABLE
B26 - -
B25 - -
B24 - IBUF[1]: ENABLE
B23 - OBUF[1]: ENABLE bit 1
B22 - OBUF[1]: ENABLE bit 0
B21 - -
B20 - -
B19 - IBUF[1]: O2IPAD_ENABLE
B18 - IBUF[0]: O2IPAD_ENABLE
B17 - -
B16 - -
B15 - OBUF[0]: ENABLE bit 1
B14 - OBUF[0]: ENABLE bit 0
B13 - IBUF[0]: ENABLE
B12 - -
B11 - -
B10 - OBUF[0]: MISR_ENABLE
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -

Tile IOB_FC_S

Cells: 1

Bels IBUF

spartan3 IOB_FC_S bel IBUF pins
PinDirectionIBUF[0]IBUF[1]IBUF[2]IBUF[3]
spartan3 IOB_FC_S bel IBUF attribute bits
AttributeIBUF[0]IBUF[1]IBUF[2]IBUF[3]
ENABLETERM[14][4]TERM[11][4]TERM[6][4]TERM[3][4]
O2IPAD_ENABLETERM[13][4]TERM[12][4]TERM[5][4]TERM[4][4]

Bels OBUF

spartan3 IOB_FC_S bel OBUF pins
PinDirectionOBUF[0]OBUF[1]OBUF[2]OBUF[3]
spartan3 IOB_FC_S bel OBUF attribute bits
AttributeOBUF[0]OBUF[1]OBUF[2]OBUF[3]
ENABLE bit 0TERM[13][0]TERM[12][0]TERM[5][0]TERM[4][0]
ENABLE bit 1TERM[13][1]TERM[12][1]TERM[5][1]TERM[4][1]
MISR_ENABLETERM[14][1]TERM[11][1]TERM[6][1]TERM[3][1]

Bitstream

spartan3 IOB_FC_S rect TERM
BitFrame
F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 F0
B4 - - - - IBUF[0]: ENABLE IBUF[0]: O2IPAD_ENABLE IBUF[1]: O2IPAD_ENABLE IBUF[1]: ENABLE - - - - IBUF[2]: ENABLE IBUF[2]: O2IPAD_ENABLE IBUF[3]: O2IPAD_ENABLE IBUF[3]: ENABLE - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - OBUF[0]: MISR_ENABLE OBUF[0]: ENABLE bit 1 OBUF[1]: ENABLE bit 1 OBUF[1]: MISR_ENABLE - - - - OBUF[2]: MISR_ENABLE OBUF[2]: ENABLE bit 1 OBUF[3]: ENABLE bit 1 OBUF[3]: MISR_ENABLE - - -
B0 - - - - - OBUF[0]: ENABLE bit 0 OBUF[1]: ENABLE bit 0 - - - - - - OBUF[2]: ENABLE bit 0 OBUF[3]: ENABLE bit 0 - - - -

Tile IOB_FC_W

Cells: 1

Bels IBUF

spartan3 IOB_FC_W bel IBUF pins
PinDirectionIBUF[0]IBUF[1]IBUF[2]IBUF[3]
spartan3 IOB_FC_W bel IBUF attribute bits
AttributeIBUF[0]IBUF[1]IBUF[2]IBUF[3]
ENABLETERM[0][13]TERM[0][24]TERM[0][43]TERM[0][54]
O2IPAD_ENABLETERM[0][18]TERM[0][19]TERM[0][48]TERM[0][49]

Bels OBUF

spartan3 IOB_FC_W bel OBUF pins
PinDirectionOBUF[0]OBUF[1]OBUF[2]OBUF[3]
spartan3 IOB_FC_W bel OBUF attribute bits
AttributeOBUF[0]OBUF[1]OBUF[2]OBUF[3]
ENABLE bit 0TERM[0][14]TERM[0][22]TERM[0][44]TERM[0][52]
ENABLE bit 1TERM[0][15]TERM[0][23]TERM[0][45]TERM[0][53]
MISR_ENABLETERM[0][10]TERM[0][27]TERM[0][40]TERM[0][57]

Bitstream

spartan3 IOB_FC_W rect TERM
BitFrame
F1 F0
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - OBUF[3]: MISR_ENABLE
B56 - -
B55 - -
B54 - IBUF[3]: ENABLE
B53 - OBUF[3]: ENABLE bit 1
B52 - OBUF[3]: ENABLE bit 0
B51 - -
B50 - -
B49 - IBUF[3]: O2IPAD_ENABLE
B48 - IBUF[2]: O2IPAD_ENABLE
B47 - -
B46 - -
B45 - OBUF[2]: ENABLE bit 1
B44 - OBUF[2]: ENABLE bit 0
B43 - IBUF[2]: ENABLE
B42 - -
B41 - -
B40 - OBUF[2]: MISR_ENABLE
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - OBUF[1]: MISR_ENABLE
B26 - -
B25 - -
B24 - IBUF[1]: ENABLE
B23 - OBUF[1]: ENABLE bit 1
B22 - OBUF[1]: ENABLE bit 0
B21 - -
B20 - -
B19 - IBUF[1]: O2IPAD_ENABLE
B18 - IBUF[0]: O2IPAD_ENABLE
B17 - -
B16 - -
B15 - OBUF[0]: ENABLE bit 1
B14 - OBUF[0]: ENABLE bit 0
B13 - IBUF[0]: ENABLE
B12 - -
B11 - -
B10 - OBUF[0]: MISR_ENABLE
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -