I/O Buffers (Spartan 3A)
TODO: document
| Name | IOSTD:S3A.TB:PDRIVE | IOSTD:S3A.TB:NDRIVE | ||||
|---|---|---|---|---|---|---|
| [2] | [1] | [0] | [2] | [1] | [0] | |
| BLVDS_25 | 1 | 1 | 1 | 1 | 1 | 1 |
| HSTL_III_18 | 1 | 1 | 1 | 1 | 0 | 1 |
| HSTL_I_18 | 1 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS12.2 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS15.2 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS15.4 | 1 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS15.6 | 1 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS18.2 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS18.4 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS18.6 | 1 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS18.8 | 1 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS25.12 | 1 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS25.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS25.4 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS25.6 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS25.8 | 1 | 0 | 1 | 0 | 1 | 0 |
| LVCMOS33.12 | 1 | 1 | 0 | 0 | 1 | 1 |
| LVCMOS33.16 | 1 | 1 | 1 | 0 | 1 | 1 |
| LVCMOS33.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS33.4 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS33.6 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS33.8 | 0 | 1 | 1 | 0 | 1 | 0 |
| LVTTL.12 | 1 | 0 | 1 | 0 | 1 | 0 |
| LVTTL.16 | 1 | 1 | 0 | 0 | 1 | 1 |
| LVTTL.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVTTL.24 | 1 | 1 | 1 | 1 | 0 | 1 |
| LVTTL.4 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVTTL.6 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVTTL.8 | 0 | 1 | 1 | 0 | 1 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 |
| PCI33_3 | 1 | 1 | 1 | 1 | 1 | 0 |
| PCI66_3 | 1 | 1 | 1 | 1 | 1 | 0 |
| PCIX | 1 | 1 | 1 | 1 | 1 | 0 |
| SSTL18_I | 1 | 1 | 1 | 0 | 1 | 0 |
| SSTL2_I | 0 | 1 | 1 | 0 | 0 | 1 |
| SSTL3_I | 0 | 1 | 0 | 0 | 0 | 1 |
| SSTL3_II | 0 | 1 | 1 | 0 | 1 | 1 |
| Name | IOSTD:S3A.TB:PSLEW | IOSTD:S3A.TB:NSLEW | ||||||
|---|---|---|---|---|---|---|---|---|
| [3] | [2] | [1] | [0] | [3] | [2] | [1] | [0] | |
| BLVDS_25.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| BLVDS_25.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_18.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_18.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I_18.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I_18.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS12.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS12.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS12.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS15.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS15.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS15.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS15.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS15.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS15.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS18.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS18.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS18.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS18.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS18.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS18.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS25.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS25.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS25.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS25.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS25.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS25.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS33.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS33.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS33.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS33.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS33.SLOW.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| LVCMOS33.SLOW.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| LVTTL.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVTTL.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVTTL.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVTTL.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVTTL.SLOW.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| LVTTL.SLOW.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| PCI33_3.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| PCI33_3.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| PCI66_3.2.5 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
| PCI66_3.3.3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| PCIX.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| PCIX.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| SSTL18_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL18_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_II.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_II.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| Name | IOSTD:S3A.TB:OUTPUT_DIFF | |||
|---|---|---|---|---|
| [3] | [2] | [1] | [0] | |
| LVDS_25 | 0 | 1 | 1 | 1 |
| LVDS_33 | 0 | 1 | 1 | 1 |
| MINI_LVDS_25 | 0 | 1 | 1 | 1 |
| MINI_LVDS_33 | 0 | 1 | 1 | 1 |
| OFF | 0 | 0 | 0 | 0 |
| PPDS_25 | 0 | 1 | 1 | 1 |
| PPDS_33 | 0 | 1 | 1 | 1 |
| RSDS_25 | 0 | 1 | 1 | 1 |
| RSDS_33 | 0 | 1 | 1 | 1 |
| TERM | 0 | 0 | 0 | 1 |
| TMDS_33 | 1 | 1 | 1 | 0 |
| Name | IOSTD:S3A.LR:PDRIVE | IOSTD:S3A.LR:NDRIVE | ||||
|---|---|---|---|---|---|---|
| [2] | [1] | [0] | [2] | [1] | [0] | |
| BLVDS_25 | 1 | 0 | 0 | 1 | 1 | 1 |
| HSTL_I | 1 | 0 | 1 | 0 | 1 | 0 |
| HSTL_III | 1 | 0 | 1 | 1 | 0 | 1 |
| HSTL_III_18 | 0 | 1 | 1 | 1 | 0 | 1 |
| HSTL_II_18 | 1 | 1 | 1 | 0 | 1 | 1 |
| HSTL_I_18 | 0 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS12.2 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS12.4 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS12.6 | 1 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS15.12 | 1 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS15.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS15.4 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS15.6 | 0 | 1 | 1 | 0 | 0 | 1 |
| LVCMOS15.8 | 1 | 0 | 1 | 0 | 1 | 0 |
| LVCMOS18.12 | 1 | 0 | 1 | 0 | 1 | 0 |
| LVCMOS18.16 | 1 | 1 | 1 | 0 | 1 | 1 |
| LVCMOS18.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS18.4 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS18.6 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS18.8 | 0 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS25.12 | 0 | 1 | 1 | 0 | 1 | 0 |
| LVCMOS25.16 | 1 | 0 | 1 | 0 | 1 | 1 |
| LVCMOS25.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS25.24 | 1 | 1 | 1 | 1 | 0 | 1 |
| LVCMOS25.4 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS25.6 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS25.8 | 0 | 1 | 0 | 0 | 1 | 0 |
| LVCMOS33.12 | 0 | 1 | 1 | 0 | 1 | 1 |
| LVCMOS33.16 | 0 | 1 | 1 | 0 | 1 | 1 |
| LVCMOS33.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS33.24 | 1 | 1 | 0 | 1 | 0 | 1 |
| LVCMOS33.4 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVCMOS33.6 | 0 | 1 | 0 | 0 | 0 | 1 |
| LVCMOS33.8 | 0 | 1 | 0 | 0 | 1 | 0 |
| LVTTL.12 | 0 | 1 | 0 | 0 | 1 | 0 |
| LVTTL.16 | 0 | 1 | 1 | 0 | 1 | 1 |
| LVTTL.2 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVTTL.24 | 1 | 0 | 1 | 1 | 0 | 1 |
| LVTTL.4 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVTTL.6 | 0 | 0 | 1 | 0 | 0 | 1 |
| LVTTL.8 | 0 | 1 | 0 | 0 | 1 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 |
| PCI33_3 | 1 | 0 | 0 | 1 | 1 | 0 |
| PCI66_3 | 1 | 0 | 0 | 1 | 1 | 0 |
| PCIX | 1 | 0 | 0 | 1 | 1 | 0 |
| SSTL18_I | 1 | 0 | 0 | 0 | 1 | 0 |
| SSTL18_II | 1 | 1 | 1 | 0 | 1 | 1 |
| SSTL2_I | 0 | 1 | 0 | 0 | 0 | 1 |
| SSTL2_II | 1 | 1 | 0 | 0 | 1 | 1 |
| SSTL3_I | 0 | 0 | 1 | 0 | 0 | 1 |
| SSTL3_II | 0 | 1 | 0 | 0 | 1 | 1 |
| Name | IOSTD:S3A.LR:PSLEW | IOSTD:S3A.LR:NSLEW | ||||||
|---|---|---|---|---|---|---|---|---|
| [3] | [2] | [1] | [0] | [3] | [2] | [1] | [0] | |
| BLVDS_25.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| BLVDS_25.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_18.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_18.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_II_18.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_II_18.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I_18.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_I_18.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS12.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS12.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS12.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS12.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS15.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS15.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS15.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS15.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS15.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS15.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS18.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS18.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS18.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS18.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS18.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS18.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS25.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS25.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS25.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS25.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS25.SLOW.2.5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVCMOS25.SLOW.3.3 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| LVCMOS33.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS33.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS33.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS33.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS33.SLOW.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| LVCMOS33.SLOW.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| LVTTL.FAST.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVTTL.FAST.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVTTL.QUIETIO.2.5 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVTTL.QUIETIO.3.3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVTTL.SLOW.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| LVTTL.SLOW.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| PCI33_3.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| PCI33_3.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| PCI66_3.2.5 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
| PCI66_3.3.3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| PCIX.2.5 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| PCIX.3.3 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| SSTL18_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL18_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL18_II.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL18_II.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_II.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL2_II.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_I.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_I.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_II.2.5 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL3_II.3.3 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| Name | IOSTD:S3A.TB:LVDSBIAS | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] | |
| LVDS_25 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| LVDS_33 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| MINI_LVDS_25 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
| MINI_LVDS_33 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| PPDS_25 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
| PPDS_33 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
| RSDS_25 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| RSDS_33 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| TMDS_33 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 |
Tile IOBS.S3A.T2
Cells: 2
Bitstream
| IOB0:DELAY_COMMON | 0.18.5 |
|---|---|
| IOB1:DELAY_COMMON | 0.7.5 |
| IOB2:DELAY_COMMON | 0.6.5 |
| IOB3:DELAY_COMMON | 1.18.5 |
| IOB4:DELAY_COMMON | 1.7.5 |
| inverted | ~[0] |
| IOB0:DELAY_VARIABLE | 0.15.3 |
|---|---|
| IOB0:PCI_CLAMP | 0.12.3 |
| IOB0:PCI_INPUT | 0.18.3 |
| IOB0:VREF | 0.15.0 |
| IOB1:DELAY_VARIABLE | 0.2.3 |
| IOB1:PCI_CLAMP | 0.6.0 |
| IOB1:PCI_INPUT | 0.1.3 |
| IOB1:VREF | 0.3.2 |
| IOB2:DELAY_VARIABLE | 0.4.0 |
| IOB2:PCI_INPUT | 1.17.4 |
| IOB2:VREF | 1.18.0 |
| IOB3:DELAY_VARIABLE | 1.15.4 |
| IOB3:PCI_CLAMP | 1.9.3 |
| IOB3:PCI_INPUT | 1.16.1 |
| IOB4:DELAY_VARIABLE | 1.2.3 |
| IOB4:PCI_CLAMP | 1.6.3 |
| IOB4:PCI_INPUT | 1.10.1 |
| non-inverted | [0] |
| IOB0:IBUF_MODE | 0.12.1 | 0.14.3 | 0.14.1 |
|---|---|---|---|
| IOB1:IBUF_MODE | 0.5.4 | 0.4.3 | 0.4.1 |
| IOB3:IBUF_MODE | 1.9.1 | 1.11.4 | 1.9.4 |
| IOB4:IBUF_MODE | 1.8.5 | 1.5.5 | 1.13.4 |
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| DIFF | 1 | 1 | 0 |
| CMOS_VCCAUX | 1 | 1 | 1 |
| IOB0:IFF_DELAY | 0.15.5 | 0.16.5 |
|---|---|---|
| IOB1:IFF_DELAY | 0.11.5 | 0.9.5 |
| IOB2:IFF_DELAY | 0.4.5 | 0.3.5 |
| IOB3:IFF_DELAY | 1.16.5 | 1.17.5 |
| IOB4:IFF_DELAY | 1.11.5 | 1.9.5 |
| inverted | ~[1] | ~[0] |
| IOB0:I_DELAY | 0.14.5 | 0.14.4 | 0.15.1 |
|---|---|---|---|
| IOB1:I_DELAY | 0.8.0 | 0.5.0 | 0.2.5 |
| IOB2:I_DELAY | 0.2.1 | 0.6.1 | 0.3.0 |
| IOB3:I_DELAY | 1.14.5 | 1.15.0 | 1.14.0 |
| IOB4:I_DELAY | 1.12.5 | 1.12.3 | 1.12.2 |
| inverted | ~[2] | ~[1] | ~[0] |
| IOB0:NDRIVE | 0.13.3 | 0.13.4 | 0.12.2 |
|---|---|---|---|
| IOB0:PDRIVE | 0.11.3 | 0.13.1 | 0.13.2 |
| IOB1:NDRIVE | 0.6.4 | 0.7.4 | 0.5.3 |
| IOB1:PDRIVE | 0.7.2 | 0.6.2 | 0.6.3 |
| IOB3:NDRIVE | 1.11.3 | 1.8.0 | 1.9.2 |
| IOB3:PDRIVE | 1.8.3 | 1.8.1 | 1.8.2 |
| IOB4:NDRIVE | 1.3.1 | 1.3.2 | 1.6.0 |
| IOB4:PDRIVE | 1.3.3 | 1.4.2 | 1.4.1 |
| mixed inversion | [2] | ~[1] | [0] |
| IOB0:NSLEW | 0.17.4 | 0.17.2 | 0.16.2 | 0.16.3 |
|---|---|---|---|---|
| IOB0:PSLEW | 0.18.1 | 0.18.4 | 0.18.2 | 0.17.1 |
| IOB1:NSLEW | 0.1.5 | 0.2.0 | 0.2.2 | 0.5.5 |
| IOB1:OUTPUT_DIFF | 0.8.2 | 0.11.4 | 0.7.3 | 0.8.1 |
| IOB1:PSLEW | 0.1.4 | 0.1.0 | 0.1.2 | 0.1.1 |
| IOB3:NSLEW | 1.15.1 | 1.15.2 | 1.14.3 | 1.14.1 |
| IOB3:PSLEW | 1.16.3 | 1.16.4 | 1.16.2 | 1.15.3 |
| IOB4:NSLEW | 1.1.0 | 1.1.1 | 1.1.2 | 1.1.3 |
| IOB4:OUTPUT_DIFF | 1.5.0 | 1.7.4 | 1.4.4 | 1.5.3 |
| IOB4:PSLEW | 1.10.0 | 1.10.4 | 1.10.2 | 1.10.3 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB0:OUTPUT_ENABLE | 0.16.1 | 0.15.4 |
|---|---|---|
| IOB1:OUTPUT_DIFF_GROUP | 0.11.2 | 0.8.4 |
| IOB1:OUTPUT_ENABLE | 0.3.1 | 0.2.4 |
| IOB3:OUTPUT_ENABLE | 1.14.2 | 1.12.4 |
| IOB4:OUTPUT_DIFF_GROUP | 1.7.3 | 1.5.4 |
| IOB4:OUTPUT_ENABLE | 1.2.2 | 1.1.5 |
| non-inverted | [1] | [0] |
| IOB0:PULL | 0.12.5 | 0.11.1 | 0.9.3 |
|---|---|---|---|
| IOB1:PULL | 0.5.1 | 0.7.0 | 0.8.3 |
| IOB2:PULL | 1.18.4 | 0.10.2 | 0.10.1 |
| IOB3:PULL | 1.9.0 | 1.7.1 | 1.7.2 |
| IOB4:PULL | 1.13.1 | 1.4.3 | 1.4.0 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB0:SUSPEND | 0.14.0 | 0.16.4 | 0.14.2 | 0.12.4 |
|---|---|---|---|---|
| IOB1:SUSPEND | 0.4.4 | 0.3.3 | 0.4.2 | 0.5.2 |
| IOB3:SUSPEND | 1.11.2 | 1.14.4 | 1.13.3 | 1.8.4 |
| IOB4:SUSPEND | 1.2.4 | 1.1.4 | 1.13.0 | 1.13.2 |
| 3STATE | 0 | 0 | 0 | 0 |
| DRIVE_LAST_VALUE | 0 | 0 | 0 | 1 |
| 3STATE_PULLUP | 0 | 0 | 1 | 0 |
| 3STATE_PULLDOWN | 0 | 1 | 0 | 0 |
| 3STATE_KEEPER | 1 | 0 | 0 | 0 |
| IOB2:IBUF_MODE | 1.18.3 | 1.18.2 | 1.18.1 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| CMOS_VCCAUX | 1 | 1 | 1 |
Tile IOBS.S3A.R4
Cells: 4
Bitstream
| Bit | Frame | |
|---|---|---|
| 0 | 1 | |
| 56 | IOB0:PULL[0] | - |
| 55 | IOB0:PULL[1] | - |
| 54 | - | - |
| 53 | - | - |
| 52 | IOB0:IBUF_MODE[0] | IOB0:PULL[2] |
| 51 | IOB0:IBUF_MODE[1] | - |
| 50 | IOB0:IBUF_MODE[2] | - |
| 49 | IOB0:VREF | - |
| 48 | - | - |
| 47 | - | - |
| 46 | IOB0:PCI_INPUT | - |
| 45 | - | - |
| 44 | - | - |
| 43 | - | - |
| 42 | - | - |
| 41 | - | - |
| 40 | - | - |
| 39 | - | - |
| 38 | IOB1:PCI_INPUT | - |
| 37 | - | - |
| 36 | IOB1:IBUF_MODE[2] | - |
| 35 | - | - |
| 34 | IOB1:VREF | - |
| 33 | IOB1:IBUF_MODE[1] | - |
| 32 | IOB1:IBUF_MODE[0] | - |
| 31 | IOB1:PULL[2] | - |
| 30 | - | - |
| 29 | - | - |
| 28 | - | - |
| 27 | IOB1:PULL[1] | - |
| 26 | - | - |
| 25 | IOB1:PULL[0] | - |
| 24 | - | - |
| 23 | - | - |
| 22 | - | - |
| 21 | IOB2:PSLEW[3] | - |
| 20 | IOB2:PSLEW[2] | - |
| 19 | IOB2:PCI_INPUT | - |
| 18 | IOB2:PSLEW[1] | - |
| 17 | IOB2:PSLEW[0] | IOB2:SUSPEND[0] |
| 16 | - | - |
| 15 | IOB2:PULL[1] | - |
| 14 | - | - |
| 13 | IOB2:NSLEW[3] | - |
| 12 | IOB2:NSLEW[2] | - |
| 11 | - | IOB2:NSLEW[1] |
| 10 | IOB2:NSLEW[0] | - |
| 9 | IOB2:SUSPEND[2] | - |
| 8 | IOB2:OUTPUT_ENABLE[1] | - |
| 7 | IOB2:OUTPUT_ENABLE[0] | - |
| 6 | - | - |
| 5 | - | - |
| 4 | IOB2:VREF | - |
| 3 | IOB2:SUSPEND[1] | - |
| 2 | IOB2:SUSPEND[3] | - |
| 1 | IOB2:IBUF_MODE[0] | - |
| 0 | IOB2:IBUF_MODE[1] | - |
| IOB0:IBUF_MODE | 3.0.50 | 3.0.51 | 3.0.52 |
|---|---|---|---|
| IOB1:IBUF_MODE | 3.0.36 | 3.0.33 | 3.0.32 |
| IOB2:IBUF_MODE | 2.0.57 | 3.0.0 | 3.0.1 |
| IOB3:IBUF_MODE | 2.0.42 | 2.0.39 | 2.0.38 |
| IOB4:IBUF_MODE | 1.1.56 | 1.0.56 | 1.0.57 |
| IOB5:IBUF_MODE | 1.0.34 | 1.0.30 | 1.0.29 |
| IOB6:IBUF_MODE | 0.0.45 | 0.0.49 | 0.1.49 |
| IOB7:IBUF_MODE | 0.0.25 | 0.0.21 | 0.0.22 |
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| DIFF | 1 | 1 | 0 |
| CMOS_VCCAUX | 1 | 1 | 1 |
| IOB0:PCI_INPUT | 3.0.46 |
|---|---|
| IOB0:VREF | 3.0.49 |
| IOB1:PCI_INPUT | 3.0.38 |
| IOB1:VREF | 3.0.34 |
| IOB2:PCI_CLAMP | 2.0.62 |
| IOB2:PCI_INPUT | 3.0.19 |
| IOB2:VREF | 3.0.4 |
| IOB3:PCI_CLAMP | 2.0.41 |
| IOB3:PCI_INPUT | 2.0.19 |
| IOB3:VREF | 2.0.35 |
| IOB4:PCI_CLAMP | 1.0.54 |
| IOB4:PCI_INPUT | 2.0.11 |
| IOB5:PCI_CLAMP | 1.0.33 |
| IOB5:PCI_INPUT | 1.0.11 |
| IOB6:PCI_CLAMP | 0.0.48 |
| IOB6:PCI_INPUT | 1.0.4 |
| IOB6:VREF | 0.0.51 |
| IOB7:PCI_CLAMP | 0.1.24 |
| IOB7:PCI_INPUT | 0.0.8 |
| non-inverted | [0] |
| IOB0:PULL | 3.1.52 | 3.0.55 | 3.0.56 |
|---|---|---|---|
| IOB1:PULL | 3.0.31 | 3.0.27 | 3.0.25 |
| IOB2:PULL | 2.0.63 | 3.0.15 | 2.0.52 |
| IOB3:PULL | 2.0.40 | 2.0.23 | 2.0.22 |
| IOB4:PULL | 1.0.55 | 2.0.7 | 2.0.8 |
| IOB5:PULL | 1.0.32 | 1.1.43 | 1.0.62 |
| IOB6:PULL | 0.0.46 | 0.0.63 | 1.0.0 |
| IOB7:PULL | 0.0.16 | 0.0.58 | 0.0.62 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB2:NDRIVE | 2.0.58 | 2.0.60 | 2.0.61 |
|---|---|---|---|
| IOB2:PDRIVE | 2.1.56 | 2.0.51 | 2.0.59 |
| IOB3:NDRIVE | 2.0.45 | 2.1.43 | 2.0.34 |
| IOB3:PDRIVE | 2.0.46 | 2.0.44 | 2.0.43 |
| IOB4:NDRIVE | 1.0.49 | 1.0.52 | 1.0.53 |
| IOB4:PDRIVE | 1.1.49 | 1.0.50 | 1.0.51 |
| IOB5:NDRIVE | 1.0.35 | 1.0.15 | 1.0.31 |
| IOB5:PDRIVE | 1.0.37 | 1.0.36 | 1.1.37 |
| IOB6:NDRIVE | 0.1.43 | 0.0.44 | 0.0.47 |
| IOB6:PDRIVE | 0.0.40 | 0.0.42 | 0.0.43 |
| IOB7:NDRIVE | 0.0.29 | 0.0.26 | 0.0.23 |
| IOB7:PDRIVE | 0.0.30 | 0.0.28 | 0.0.27 |
| mixed inversion | [2] | ~[1] | [0] |
| IOB2:NSLEW | 3.0.13 | 3.0.12 | 3.1.11 | 3.0.10 |
|---|---|---|---|---|
| IOB2:PSLEW | 3.0.21 | 3.0.20 | 3.0.18 | 3.0.17 |
| IOB3:NSLEW | 2.0.25 | 2.0.26 | 2.0.28 | 2.0.29 |
| IOB3:PSLEW | 2.0.17 | 2.0.18 | 2.0.20 | 2.0.21 |
| IOB4:NSLEW | 2.0.5 | 2.1.5 | 2.0.3 | 2.0.2 |
| IOB4:PSLEW | 2.0.13 | 2.0.12 | 2.0.9 | 2.0.10 |
| IOB5:NSLEW | 1.0.17 | 1.0.18 | 1.0.19 | 1.0.21 |
| IOB5:PSLEW | 1.0.10 | 1.1.11 | 1.0.12 | 1.0.13 |
| IOB6:NSLEW | 0.0.61 | 0.0.60 | 1.0.8 | 0.0.57 |
| IOB6:PSLEW | 1.0.5 | 1.1.5 | 1.0.3 | 1.0.2 |
| IOB7:NSLEW | 0.0.10 | 0.1.11 | 0.0.12 | 0.0.13 |
| IOB7:PSLEW | 0.0.6 | 0.0.9 | 0.0.11 | 0.0.7 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB2:OUTPUT_ENABLE | 3.0.8 | 3.0.7 |
|---|---|---|
| IOB3:OUTPUT_ENABLE | 2.0.33 | 2.0.31 |
| IOB4:OUTPUT_ENABLE | 2.0.0 | 1.0.63 |
| IOB5:OUTPUT_ENABLE | 1.0.24 | 1.0.23 |
| IOB6:OUTPUT_ENABLE | 0.0.56 | 0.0.55 |
| IOB7:OUTPUT_ENABLE | 0.1.17 | 0.0.15 |
| non-inverted | [1] | [0] |
| IOB2:SUSPEND | 3.0.2 | 3.0.9 | 3.0.3 | 3.1.17 |
|---|---|---|---|---|
| IOB3:SUSPEND | 2.0.37 | 2.0.30 | 2.1.37 | 2.1.17 |
| IOB4:SUSPEND | 1.0.61 | 2.0.1 | 1.0.58 | 2.1.11 |
| IOB5:SUSPEND | 1.1.24 | 1.0.22 | 1.0.28 | 1.0.20 |
| IOB6:SUSPEND | 0.0.52 | 0.1.56 | 0.0.50 | 0.0.54 |
| IOB7:SUSPEND | 0.0.18 | 0.0.14 | 0.0.20 | 0.0.24 |
| 3STATE | 0 | 0 | 0 | 0 |
| DRIVE_LAST_VALUE | 0 | 0 | 0 | 1 |
| 3STATE_PULLUP | 0 | 0 | 1 | 0 |
| 3STATE_PULLDOWN | 0 | 1 | 0 | 0 |
| 3STATE_KEEPER | 1 | 0 | 0 | 0 |
Tile IOBS.S3A.B2
Cells: 2
Bitstream
| IOB0:DELAY_COMMON | 1.11.0 |
|---|---|
| IOB1:DELAY_COMMON | 1.16.0 |
| IOB2:DELAY_COMMON | 0.2.0 |
| IOB3:DELAY_COMMON | 0.11.0 |
| IOB4:DELAY_COMMON | 0.16.0 |
| inverted | ~[0] |
| IOB0:DELAY_VARIABLE | 1.8.2 |
|---|---|
| IOB0:PCI_CLAMP | 1.4.1 |
| IOB0:PCI_INPUT | 1.18.1 |
| IOB1:DELAY_VARIABLE | 1.16.2 |
| IOB1:PCI_CLAMP | 1.11.1 |
| IOB1:PCI_INPUT | 1.16.3 |
| IOB2:DELAY_VARIABLE | 0.3.2 |
| IOB2:PCI_INPUT | 0.1.3 |
| IOB2:VREF | 0.18.0 |
| IOB3:DELAY_VARIABLE | 0.8.2 |
| IOB3:PCI_CLAMP | 0.6.4 |
| IOB3:PCI_INPUT | 0.1.0 |
| IOB4:DELAY_VARIABLE | 0.16.2 |
| IOB4:PCI_CLAMP | 0.12.5 |
| IOB4:PCI_INPUT | 0.17.3 |
| non-inverted | [0] |
| IOB0:IBUF_MODE | 1.5.2 | 1.6.5 | 1.6.4 |
|---|---|---|---|
| IOB1:IBUF_MODE | 1.10.3 | 1.13.5 | 1.13.4 |
| IOB3:IBUF_MODE | 0.6.0 | 0.5.4 | 0.5.3 |
| IOB4:IBUF_MODE | 0.13.5 | 0.14.2 | 0.14.3 |
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| DIFF | 1 | 1 | 0 |
| CMOS_VCCAUX | 1 | 1 | 1 |
| IOB0:IFF_DELAY | 1.8.0 | 1.9.0 |
|---|---|---|
| IOB1:IFF_DELAY | 1.17.0 | 1.15.0 |
| IOB2:IFF_DELAY | 0.3.0 | 0.4.0 |
| IOB3:IFF_DELAY | 0.8.0 | 0.9.0 |
| IOB4:IFF_DELAY | 0.17.0 | 0.15.0 |
| inverted | ~[1] | ~[0] |
| IOB0:I_DELAY | 1.9.5 | 1.9.2 | 1.9.1 |
|---|---|---|---|
| IOB1:I_DELAY | 1.17.5 | 1.17.2 | 1.17.1 |
| IOB2:I_DELAY | 0.2.5 | 0.2.2 | 0.2.1 |
| IOB3:I_DELAY | 0.9.5 | 0.9.2 | 0.9.1 |
| IOB4:I_DELAY | 0.17.5 | 0.17.2 | 0.17.1 |
| inverted | ~[2] | ~[1] | ~[0] |
| IOB0:NDRIVE | 1.5.0 | 1.5.1 | 1.5.5 |
|---|---|---|---|
| IOB0:PDRIVE | 1.6.2 | 1.5.3 | 1.5.4 |
| IOB1:NDRIVE | 1.10.5 | 1.10.4 | 1.10.1 |
| IOB1:PDRIVE | 1.11.4 | 1.11.2 | 1.11.3 |
| IOB3:NDRIVE | 0.6.1 | 0.6.2 | 0.6.3 |
| IOB3:PDRIVE | 0.7.4 | 0.7.1 | 0.7.2 |
| IOB4:NDRIVE | 0.13.0 | 0.13.2 | 0.12.2 |
| IOB4:PDRIVE | 0.10.4 | 0.10.2 | 0.13.1 |
| mixed inversion | [2] | ~[1] | [0] |
| IOB0:NSLEW | 1.18.3 | 1.1.3 | 1.1.4 | 1.1.5 |
|---|---|---|---|---|
| IOB0:PSLEW | 1.18.5 | 1.18.0 | 1.18.2 | 1.18.4 |
| IOB1:NSLEW | 1.14.1 | 1.14.0 | 1.12.4 | 1.12.3 |
| IOB1:OUTPUT_DIFF | 1.7.4 | 1.9.4 | 1.4.3 | 1.7.3 |
| IOB1:PSLEW | 1.15.1 | 1.15.2 | 1.15.4 | 1.15.3 |
| IOB3:NSLEW | 0.3.4 | 0.3.3 | 0.4.5 | 0.4.4 |
| IOB3:PSLEW | 0.1.2 | 0.1.1 | 0.2.4 | 0.2.3 |
| IOB4:NSLEW | 0.16.4 | 0.16.3 | 0.15.3 | 0.15.2 |
| IOB4:OUTPUT_DIFF | 0.11.5 | 0.11.4 | 0.8.4 | 0.11.2 |
| IOB4:PSLEW | 0.16.5 | 0.13.4 | 0.13.3 | 0.17.4 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB0:OUTPUT_ENABLE | 1.1.1 | 1.1.0 |
|---|---|---|
| IOB1:OUTPUT_DIFF_GROUP | 1.8.4 | 1.4.4 |
| IOB1:OUTPUT_ENABLE | 1.12.1 | 1.12.0 |
| IOB3:OUTPUT_ENABLE | 0.4.2 | 0.4.1 |
| IOB4:OUTPUT_DIFF_GROUP | 0.12.3 | 0.8.3 |
| IOB4:OUTPUT_ENABLE | 0.15.5 | 0.15.1 |
| non-inverted | [1] | [0] |
| IOB0:PULL | 1.6.3 | 1.6.0 | 1.4.5 |
|---|---|---|---|
| IOB1:PULL | 1.10.2 | 1.9.3 | 1.8.3 |
| IOB2:PULL | 0.18.4 | 1.16.1 | 1.16.5 |
| IOB3:PULL | 0.7.5 | 0.7.3 | 0.9.4 |
| IOB4:PULL | 0.12.0 | 0.12.4 | 0.11.3 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB0:SUSPEND | 1.3.4 | 1.1.2 | 1.3.3 | 1.4.2 |
|---|---|---|---|---|
| IOB1:SUSPEND | 1.13.3 | 1.12.2 | 1.13.2 | 1.10.0 |
| IOB3:SUSPEND | 0.5.5 | 0.4.3 | 0.5.2 | 0.6.5 |
| IOB4:SUSPEND | 0.14.1 | 0.15.4 | 0.14.0 | 0.12.1 |
| 3STATE | 0 | 0 | 0 | 0 |
| DRIVE_LAST_VALUE | 0 | 0 | 0 | 1 |
| 3STATE_PULLUP | 0 | 0 | 1 | 0 |
| 3STATE_PULLDOWN | 0 | 1 | 0 | 0 |
| 3STATE_KEEPER | 1 | 0 | 0 | 0 |
| IOB2:IBUF_MODE | 0.18.1 | 0.18.2 | 0.18.3 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| CMOS_VCCAUX | 1 | 1 | 1 |
Tile IOBS.S3A.L4
Cells: 4
Bitstream
| Bit | Frame | |
|---|---|---|
| 0 | 1 | |
| 63 | IOB2:IBUF_MODE[1] | - |
| 62 | IOB2:IBUF_MODE[0] | - |
| 61 | IOB2:SUSPEND[3] | - |
| 60 | IOB2:SUSPEND[1] | - |
| 59 | - | - |
| 58 | - | - |
| 57 | - | - |
| 56 | IOB2:OUTPUT_ENABLE[1] | - |
| 55 | IOB2:OUTPUT_ENABLE[0] | - |
| 54 | IOB2:SUSPEND[2] | - |
| 53 | IOB2:NSLEW[0] | - |
| 52 | - | IOB2:NSLEW[1] |
| 51 | IOB2:NSLEW[2] | - |
| 50 | IOB2:NSLEW[3] | - |
| 49 | - | - |
| 48 | IOB2:PULL[1] | - |
| 47 | - | - |
| 46 | IOB2:PSLEW[0] | IOB2:SUSPEND[0] |
| 45 | IOB2:PSLEW[1] | - |
| 44 | IOB2:PCI_INPUT | - |
| 43 | IOB2:PSLEW[2] | - |
| 42 | IOB2:PSLEW[3] | - |
| 41 | - | - |
| 40 | - | - |
| 39 | - | - |
| 38 | IOB1:PULL[0] | - |
| 37 | - | - |
| 36 | IOB1:PULL[1] | - |
| 35 | - | - |
| 34 | - | - |
| 33 | - | - |
| 32 | IOB1:PULL[2] | - |
| 31 | IOB1:IBUF_MODE[0] | - |
| 30 | IOB1:IBUF_MODE[1] | - |
| 29 | - | - |
| 28 | - | - |
| 27 | IOB1:IBUF_MODE[2] | - |
| 26 | - | - |
| 25 | IOB1:PCI_INPUT | - |
| 24 | - | - |
| 23 | - | - |
| 22 | - | - |
| 21 | - | - |
| 20 | - | - |
| 19 | - | - |
| 18 | - | - |
| 17 | IOB0:PCI_INPUT | - |
| 16 | - | - |
| 15 | - | - |
| 14 | IOB0:VREF | - |
| 13 | IOB0:IBUF_MODE[2] | - |
| 12 | IOB0:IBUF_MODE[1] | - |
| 11 | IOB0:IBUF_MODE[0] | IOB0:PULL[2] |
| 10 | - | - |
| 9 | - | - |
| 8 | IOB0:PULL[1] | - |
| 7 | IOB0:PULL[0] | - |
| 6 | - | - |
| 5 | - | - |
| 4 | - | - |
| 3 | - | - |
| 2 | - | - |
| 1 | - | - |
| 0 | - | - |
| IOB0:IBUF_MODE | 0.0.13 | 0.0.12 | 0.0.11 |
|---|---|---|---|
| IOB1:IBUF_MODE | 0.0.27 | 0.0.30 | 0.0.31 |
| IOB2:IBUF_MODE | 1.0.6 | 0.0.63 | 0.0.62 |
| IOB3:IBUF_MODE | 1.0.21 | 1.0.24 | 1.0.25 |
| IOB4:IBUF_MODE | 2.1.7 | 2.0.7 | 2.0.6 |
| IOB5:IBUF_MODE | 2.0.29 | 2.0.33 | 2.0.34 |
| IOB6:IBUF_MODE | 3.0.18 | 3.0.14 | 3.1.14 |
| IOB7:IBUF_MODE | 3.0.38 | 3.0.42 | 3.0.41 |
| NONE | 0 | 0 | 0 |
| TMUX | 0 | 0 | 1 |
| OMUX | 0 | 1 | 0 |
| CMOS_VCCINT | 0 | 1 | 1 |
| CMOS_VCCO | 1 | 0 | 0 |
| VREF | 1 | 0 | 1 |
| DIFF | 1 | 1 | 0 |
| CMOS_VCCAUX | 1 | 1 | 1 |
| IOB0:PCI_INPUT | 0.0.17 |
|---|---|
| IOB0:VREF | 0.0.14 |
| IOB1:PCI_INPUT | 0.0.25 |
| IOB2:PCI_CLAMP | 1.0.1 |
| IOB2:PCI_INPUT | 0.0.44 |
| IOB3:PCI_CLAMP | 1.0.22 |
| IOB3:PCI_INPUT | 1.0.44 |
| IOB3:VREF | 1.0.28 |
| IOB4:PCI_CLAMP | 2.0.9 |
| IOB4:PCI_INPUT | 1.0.52 |
| IOB4:VREF | 2.0.3 |
| IOB5:PCI_CLAMP | 2.0.30 |
| IOB5:PCI_INPUT | 2.0.52 |
| IOB6:PCI_CLAMP | 3.0.15 |
| IOB6:PCI_INPUT | 2.0.59 |
| IOB6:VREF | 3.0.12 |
| IOB7:PCI_CLAMP | 3.1.39 |
| IOB7:PCI_INPUT | 3.0.55 |
| IOB7:VREF | 3.0.44 |
| non-inverted | [0] |
| IOB0:PULL | 0.1.11 | 0.0.8 | 0.0.7 |
|---|---|---|---|
| IOB1:PULL | 0.0.32 | 0.0.36 | 0.0.38 |
| IOB2:PULL | 1.0.0 | 0.0.48 | 1.0.11 |
| IOB3:PULL | 1.0.23 | 1.0.40 | 1.0.41 |
| IOB4:PULL | 2.0.8 | 1.0.56 | 1.0.55 |
| IOB5:PULL | 2.0.31 | 2.1.20 | 2.0.1 |
| IOB6:PULL | 3.0.17 | 3.0.0 | 2.0.63 |
| IOB7:PULL | 3.0.47 | 3.0.5 | 3.0.1 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB2:NDRIVE | 1.0.5 | 1.0.3 | 1.0.2 |
|---|---|---|---|
| IOB2:PDRIVE | 1.1.7 | 1.0.12 | 1.0.4 |
| IOB3:NDRIVE | 1.0.18 | 1.1.20 | 1.0.29 |
| IOB3:PDRIVE | 1.0.17 | 1.0.19 | 1.0.20 |
| IOB4:NDRIVE | 2.0.14 | 2.0.11 | 2.0.10 |
| IOB4:PDRIVE | 2.1.14 | 2.0.13 | 2.0.12 |
| IOB5:NDRIVE | 2.0.28 | 2.0.48 | 2.0.32 |
| IOB5:PDRIVE | 2.0.26 | 2.0.27 | 2.1.26 |
| IOB6:NDRIVE | 3.1.20 | 3.0.19 | 3.0.16 |
| IOB6:PDRIVE | 3.0.23 | 3.0.21 | 3.0.20 |
| IOB7:NDRIVE | 3.0.34 | 3.0.37 | 3.0.40 |
| IOB7:PDRIVE | 3.0.33 | 3.0.35 | 3.0.36 |
| mixed inversion | [2] | ~[1] | [0] |
| IOB2:NSLEW | 0.0.50 | 0.0.51 | 0.1.52 | 0.0.53 |
|---|---|---|---|---|
| IOB2:PSLEW | 0.0.42 | 0.0.43 | 0.0.45 | 0.0.46 |
| IOB3:NSLEW | 1.0.38 | 1.0.37 | 1.0.35 | 1.0.34 |
| IOB3:PSLEW | 1.0.46 | 1.0.45 | 1.0.43 | 1.0.42 |
| IOB4:NSLEW | 1.0.58 | 1.1.58 | 1.0.60 | 1.0.61 |
| IOB4:PSLEW | 1.0.50 | 1.0.51 | 1.0.54 | 1.0.53 |
| IOB5:NSLEW | 2.0.46 | 2.0.45 | 2.0.44 | 2.0.42 |
| IOB5:PSLEW | 2.0.53 | 2.1.52 | 2.0.51 | 2.0.50 |
| IOB6:NSLEW | 3.0.2 | 3.0.3 | 2.0.55 | 3.0.6 |
| IOB6:PSLEW | 2.0.58 | 2.1.58 | 2.0.60 | 2.0.61 |
| IOB7:NSLEW | 3.0.53 | 3.1.52 | 3.0.51 | 3.0.50 |
| IOB7:PSLEW | 3.0.57 | 3.0.54 | 3.0.52 | 3.0.56 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB2:OUTPUT_ENABLE | 0.0.56 | 0.0.55 |
|---|---|---|
| IOB3:OUTPUT_ENABLE | 1.0.32 | 1.0.30 |
| IOB4:OUTPUT_ENABLE | 2.0.0 | 1.0.63 |
| IOB5:OUTPUT_ENABLE | 2.0.40 | 2.0.39 |
| IOB6:OUTPUT_ENABLE | 3.0.8 | 3.0.7 |
| IOB7:OUTPUT_ENABLE | 3.1.46 | 3.0.48 |
| non-inverted | [1] | [0] |
| IOB2:SUSPEND | 0.0.61 | 0.0.54 | 0.0.60 | 0.1.46 |
|---|---|---|---|---|
| IOB3:SUSPEND | 1.0.26 | 1.0.33 | 1.1.26 | 1.1.46 |
| IOB4:SUSPEND | 2.0.2 | 1.0.62 | 2.0.5 | 1.1.52 |
| IOB5:SUSPEND | 2.1.39 | 2.0.41 | 2.0.35 | 2.0.43 |
| IOB6:SUSPEND | 3.0.11 | 3.1.7 | 3.0.13 | 3.0.9 |
| IOB7:SUSPEND | 3.0.45 | 3.0.49 | 3.0.43 | 3.0.39 |
| 3STATE | 0 | 0 | 0 | 0 |
| DRIVE_LAST_VALUE | 0 | 0 | 0 | 1 |
| 3STATE_PULLUP | 0 | 0 | 1 | 0 |
| 3STATE_PULLDOWN | 0 | 1 | 0 | 0 |
| 3STATE_KEEPER | 1 | 0 | 0 | 0 |