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I/O Buffers (Spartan 3A)

TODO: document

Name IOSTD:S3A.TB:PDRIVE IOSTD:S3A.TB:NDRIVE
[2] [1] [0] [2] [1] [0]
BLVDS_25 1 1 1 1 1 1
HSTL_III_18 1 1 1 1 0 1
HSTL_I_18 1 1 1 0 1 0
LVCMOS12.2 0 1 1 0 0 1
LVCMOS15.2 0 1 0 0 0 1
LVCMOS15.4 1 0 1 0 0 1
LVCMOS15.6 1 1 1 0 0 1
LVCMOS18.2 0 1 0 0 0 1
LVCMOS18.4 0 1 1 0 0 1
LVCMOS18.6 1 0 1 0 0 1
LVCMOS18.8 1 1 1 0 1 0
LVCMOS25.12 1 1 1 0 1 0
LVCMOS25.2 0 0 1 0 0 1
LVCMOS25.4 0 1 0 0 0 1
LVCMOS25.6 0 1 1 0 0 1
LVCMOS25.8 1 0 1 0 1 0
LVCMOS33.12 1 1 0 0 1 1
LVCMOS33.16 1 1 1 0 1 1
LVCMOS33.2 0 0 1 0 0 1
LVCMOS33.4 0 1 0 0 0 1
LVCMOS33.6 0 1 1 0 0 1
LVCMOS33.8 0 1 1 0 1 0
LVTTL.12 1 0 1 0 1 0
LVTTL.16 1 1 0 0 1 1
LVTTL.2 0 0 1 0 0 1
LVTTL.24 1 1 1 1 0 1
LVTTL.4 0 1 0 0 0 1
LVTTL.6 0 1 0 0 0 1
LVTTL.8 0 1 1 0 1 0
OFF 0 0 0 0 0 0
PCI33_3 1 1 1 1 1 0
PCI66_3 1 1 1 1 1 0
PCIX 1 1 1 1 1 0
SSTL18_I 1 1 1 0 1 0
SSTL2_I 0 1 1 0 0 1
SSTL3_I 0 1 0 0 0 1
SSTL3_II 0 1 1 0 1 1
Name IOSTD:S3A.TB:PSLEW IOSTD:S3A.TB:NSLEW
[3] [2] [1] [0] [3] [2] [1] [0]
BLVDS_25.2.5 1 1 0 0 1 1 0 0
BLVDS_25.3.3 1 1 0 0 1 1 0 0
HSTL_III_18.2.5 1 1 0 0 1 1 0 0
HSTL_III_18.3.3 1 1 0 0 1 1 0 0
HSTL_I_18.2.5 1 1 0 0 1 1 0 0
HSTL_I_18.3.3 1 1 0 0 1 1 0 0
LVCMOS12.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS12.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS12.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS12.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS12.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS12.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS15.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS15.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS15.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS15.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS15.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS15.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS18.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS18.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS18.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS18.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS18.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS18.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS25.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS25.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS25.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS25.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS25.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS25.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS33.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS33.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS33.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS33.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS33.SLOW.2.5 0 1 0 1 0 0 0 0
LVCMOS33.SLOW.3.3 0 1 0 1 0 1 0 1
LVTTL.FAST.2.5 1 1 0 0 1 1 0 0
LVTTL.FAST.3.3 1 1 0 0 1 1 0 0
LVTTL.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVTTL.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVTTL.SLOW.2.5 0 1 0 1 0 0 0 0
LVTTL.SLOW.3.3 0 1 0 1 0 1 0 1
PCI33_3.2.5 0 1 0 1 0 0 0 0
PCI33_3.3.3 0 1 0 1 0 1 0 1
PCI66_3.2.5 0 0 0 0 1 1 0 0
PCI66_3.3.3 0 0 0 0 0 0 0 0
PCIX.2.5 0 1 0 1 0 0 0 0
PCIX.3.3 0 1 0 1 0 1 0 1
SSTL18_I.2.5 1 1 0 0 1 1 0 0
SSTL18_I.3.3 1 1 0 0 1 1 0 0
SSTL2_I.2.5 1 1 0 0 1 1 0 0
SSTL2_I.3.3 1 1 0 0 1 1 0 0
SSTL3_I.2.5 1 1 0 0 1 1 0 0
SSTL3_I.3.3 1 1 0 0 1 1 0 0
SSTL3_II.2.5 1 1 0 0 1 1 0 0
SSTL3_II.3.3 1 1 0 0 1 1 0 0
Name IOSTD:S3A.TB:OUTPUT_DIFF
[3] [2] [1] [0]
LVDS_25 0 1 1 1
LVDS_33 0 1 1 1
MINI_LVDS_25 0 1 1 1
MINI_LVDS_33 0 1 1 1
OFF 0 0 0 0
PPDS_25 0 1 1 1
PPDS_33 0 1 1 1
RSDS_25 0 1 1 1
RSDS_33 0 1 1 1
TERM 0 0 0 1
TMDS_33 1 1 1 0
Name IOSTD:S3A.LR:PDRIVE IOSTD:S3A.LR:NDRIVE
[2] [1] [0] [2] [1] [0]
BLVDS_25 1 0 0 1 1 1
HSTL_I 1 0 1 0 1 0
HSTL_III 1 0 1 1 0 1
HSTL_III_18 0 1 1 1 0 1
HSTL_II_18 1 1 1 0 1 1
HSTL_I_18 0 1 1 0 1 0
LVCMOS12.2 0 1 0 0 0 1
LVCMOS12.4 0 1 1 0 0 1
LVCMOS12.6 1 1 0 0 0 1
LVCMOS15.12 1 1 1 0 1 0
LVCMOS15.2 0 0 1 0 0 1
LVCMOS15.4 0 1 0 0 0 1
LVCMOS15.6 0 1 1 0 0 1
LVCMOS15.8 1 0 1 0 1 0
LVCMOS18.12 1 0 1 0 1 0
LVCMOS18.16 1 1 1 0 1 1
LVCMOS18.2 0 0 1 0 0 1
LVCMOS18.4 0 1 0 0 0 1
LVCMOS18.6 0 1 0 0 0 1
LVCMOS18.8 0 1 1 0 1 0
LVCMOS25.12 0 1 1 0 1 0
LVCMOS25.16 1 0 1 0 1 1
LVCMOS25.2 0 0 1 0 0 1
LVCMOS25.24 1 1 1 1 0 1
LVCMOS25.4 0 0 1 0 0 1
LVCMOS25.6 0 1 0 0 0 1
LVCMOS25.8 0 1 0 0 1 0
LVCMOS33.12 0 1 1 0 1 1
LVCMOS33.16 0 1 1 0 1 1
LVCMOS33.2 0 0 1 0 0 1
LVCMOS33.24 1 1 0 1 0 1
LVCMOS33.4 0 0 1 0 0 1
LVCMOS33.6 0 1 0 0 0 1
LVCMOS33.8 0 1 0 0 1 0
LVTTL.12 0 1 0 0 1 0
LVTTL.16 0 1 1 0 1 1
LVTTL.2 0 0 1 0 0 1
LVTTL.24 1 0 1 1 0 1
LVTTL.4 0 0 1 0 0 1
LVTTL.6 0 0 1 0 0 1
LVTTL.8 0 1 0 0 1 0
OFF 0 0 0 0 0 0
PCI33_3 1 0 0 1 1 0
PCI66_3 1 0 0 1 1 0
PCIX 1 0 0 1 1 0
SSTL18_I 1 0 0 0 1 0
SSTL18_II 1 1 1 0 1 1
SSTL2_I 0 1 0 0 0 1
SSTL2_II 1 1 0 0 1 1
SSTL3_I 0 0 1 0 0 1
SSTL3_II 0 1 0 0 1 1
Name IOSTD:S3A.LR:PSLEW IOSTD:S3A.LR:NSLEW
[3] [2] [1] [0] [3] [2] [1] [0]
BLVDS_25.2.5 1 1 0 0 1 1 0 0
BLVDS_25.3.3 1 1 0 0 1 1 0 0
HSTL_I.2.5 1 1 0 0 1 1 0 0
HSTL_I.3.3 1 1 0 0 1 1 0 0
HSTL_III.2.5 1 1 0 0 1 1 0 0
HSTL_III.3.3 1 1 0 0 1 1 0 0
HSTL_III_18.2.5 1 1 0 0 1 1 0 0
HSTL_III_18.3.3 1 1 0 0 1 1 0 0
HSTL_II_18.2.5 1 1 0 0 1 1 0 0
HSTL_II_18.3.3 1 1 0 0 1 1 0 0
HSTL_I_18.2.5 1 1 0 0 1 1 0 0
HSTL_I_18.3.3 1 1 0 0 1 1 0 0
LVCMOS12.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS12.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS12.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS12.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS12.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS12.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS15.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS15.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS15.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS15.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS15.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS15.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS18.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS18.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS18.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS18.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS18.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS18.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS25.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS25.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS25.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS25.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS25.SLOW.2.5 0 0 0 0 0 0 0 0
LVCMOS25.SLOW.3.3 0 0 0 0 0 1 0 1
LVCMOS33.FAST.2.5 1 1 0 0 1 1 0 0
LVCMOS33.FAST.3.3 1 1 0 0 1 1 0 0
LVCMOS33.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVCMOS33.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVCMOS33.SLOW.2.5 0 1 0 1 0 0 0 0
LVCMOS33.SLOW.3.3 0 1 0 1 0 1 0 1
LVTTL.FAST.2.5 1 1 0 0 1 1 0 0
LVTTL.FAST.3.3 1 1 0 0 1 1 0 0
LVTTL.QUIETIO.2.5 0 1 1 0 0 1 1 0
LVTTL.QUIETIO.3.3 0 1 1 0 0 1 1 0
LVTTL.SLOW.2.5 0 1 0 1 0 0 0 0
LVTTL.SLOW.3.3 0 1 0 1 0 1 0 1
PCI33_3.2.5 0 1 0 1 0 0 0 0
PCI33_3.3.3 0 1 0 1 0 1 0 1
PCI66_3.2.5 0 0 0 0 1 1 0 0
PCI66_3.3.3 0 0 0 0 0 0 0 0
PCIX.2.5 0 1 0 1 0 0 0 0
PCIX.3.3 0 1 0 1 0 1 0 1
SSTL18_I.2.5 1 1 0 0 1 1 0 0
SSTL18_I.3.3 1 1 0 0 1 1 0 0
SSTL18_II.2.5 1 1 0 0 1 1 0 0
SSTL18_II.3.3 1 1 0 0 1 1 0 0
SSTL2_I.2.5 1 1 0 0 1 1 0 0
SSTL2_I.3.3 1 1 0 0 1 1 0 0
SSTL2_II.2.5 1 1 0 0 1 1 0 0
SSTL2_II.3.3 1 1 0 0 1 1 0 0
SSTL3_I.2.5 1 1 0 0 1 1 0 0
SSTL3_I.3.3 1 1 0 0 1 1 0 0
SSTL3_II.2.5 1 1 0 0 1 1 0 0
SSTL3_II.3.3 1 1 0 0 1 1 0 0
Name IOSTD:S3A.TB:LVDSBIAS
[11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
LVDS_25 1 1 0 0 0 1 1 0 0 0 1 0
LVDS_33 1 1 0 0 0 1 1 0 0 0 1 0
MINI_LVDS_25 0 1 0 0 0 1 0 0 0 0 1 0
MINI_LVDS_33 0 1 0 0 0 1 0 0 0 0 1 0
OFF 0 0 0 0 0 0 0 0 0 0 0 0
PPDS_25 0 0 1 0 0 1 0 0 0 1 1 1
PPDS_33 0 0 1 0 0 1 0 0 0 1 1 1
RSDS_25 0 0 0 1 1 0 1 0 0 0 1 0
RSDS_33 0 0 0 1 1 0 1 0 0 0 1 0
TMDS_33 1 0 1 0 0 1 0 0 1 0 1 0

Tile IOB_S3A_N2

Cells: 2

Bitstream

spartan3 IOB_S3A_N2 rect TERM[0]
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - -
spartan3 IOB_S3A_N2 rect TERM[1]
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - -
### Bitstream
spartan3 IOB_S3A_N2 rect R0
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - IOB[1]:NSLEW[3] ~IOB[1]:I_DELAY[0] ~IOB[2]:IFF_DELAY[0] ~IOB[2]:IFF_DELAY[1] IOB[1]:NSLEW[0] ~IOB[2]:DELAY_COMMON ~IOB[1]:DELAY_COMMON - ~IOB[1]:IFF_DELAY[0] - ~IOB[1]:IFF_DELAY[1] IOB[0]:PULL[2] - ~IOB[0]:I_DELAY[2] ~IOB[0]:IFF_DELAY[1] ~IOB[0]:IFF_DELAY[0] - ~IOB[0]:DELAY_COMMON
B4 - IOB[1]:PSLEW[3] IOB[1]:OUTPUT_ENABLE[0] - IOB[1]:SUSPEND[3] IOB[1]:IBUF_MODE[2] IOB[1]:NDRIVE[2] ~IOB[1]:NDRIVE[1] IOB[1]:OUTPUT_DIFF_GROUP[0] - - IOB[1]:OUTPUT_DIFF[2] IOB[0]:SUSPEND[0] ~IOB[0]:NDRIVE[1] ~IOB[0]:I_DELAY[1] IOB[0]:OUTPUT_ENABLE[0] IOB[0]:SUSPEND[2] IOB[0]:NSLEW[3] IOB[0]:PSLEW[2]
B3 - IOB[1]:PCI_INPUT IOB[1]:DELAY_VARIABLE IOB[1]:SUSPEND[2] IOB[1]:IBUF_MODE[1] IOB[1]:NDRIVE[0] IOB[1]:PDRIVE[0] IOB[1]:OUTPUT_DIFF[1] IOB[1]:PULL[0] IOB[0]:PULL[0] - IOB[0]:PDRIVE[2] IOB[0]:PCI_CLAMP IOB[0]:NDRIVE[2] IOB[0]:IBUF_MODE[1] IOB[0]:DELAY_VARIABLE IOB[0]:NSLEW[0] - IOB[0]:PCI_INPUT
B2 - IOB[1]:PSLEW[1] IOB[1]:NSLEW[1] IOB[1]:VREF IOB[1]:SUSPEND[1] IOB[1]:SUSPEND[0] ~IOB[1]:PDRIVE[1] IOB[1]:PDRIVE[2] IOB[1]:OUTPUT_DIFF[3] - IOB[2]:PULL[1] IOB[1]:OUTPUT_DIFF_GROUP[1] IOB[0]:NDRIVE[0] IOB[0]:PDRIVE[0] IOB[0]:SUSPEND[1] - IOB[0]:NSLEW[1] IOB[0]:NSLEW[2] IOB[0]:PSLEW[1]
B1 - IOB[1]:PSLEW[0] ~IOB[2]:I_DELAY[2] IOB[1]:OUTPUT_ENABLE[1] IOB[1]:IBUF_MODE[0] IOB[1]:PULL[2] ~IOB[2]:I_DELAY[1] - IOB[1]:OUTPUT_DIFF[0] - IOB[2]:PULL[0] IOB[0]:PULL[1] IOB[0]:IBUF_MODE[2] ~IOB[0]:PDRIVE[1] IOB[0]:IBUF_MODE[0] ~IOB[0]:I_DELAY[0] IOB[0]:OUTPUT_ENABLE[1] IOB[0]:PSLEW[0] IOB[0]:PSLEW[3]
B0 - IOB[1]:PSLEW[2] IOB[1]:NSLEW[2] ~IOB[2]:I_DELAY[0] IOB[2]:DELAY_VARIABLE ~IOB[1]:I_DELAY[1] IOB[1]:PCI_CLAMP IOB[1]:PULL[1] ~IOB[1]:I_DELAY[2] - - - - - IOB[0]:SUSPEND[3] IOB[0]:VREF - - -
spartan3 IOB_S3A_N2 rect R1
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - IOB[4]:OUTPUT_ENABLE[0] - - - IOB[4]:IBUF_MODE[1] - ~IOB[4]:DELAY_COMMON IOB[4]:IBUF_MODE[2] ~IOB[4]:IFF_DELAY[0] - ~IOB[4]:IFF_DELAY[1] ~IOB[4]:I_DELAY[2] - ~IOB[3]:I_DELAY[2] - ~IOB[3]:IFF_DELAY[1] ~IOB[3]:IFF_DELAY[0] ~IOB[3]:DELAY_COMMON
B4 - IOB[4]:SUSPEND[2] IOB[4]:SUSPEND[3] - IOB[4]:OUTPUT_DIFF[1] IOB[4]:OUTPUT_DIFF_GROUP[0] - IOB[4]:OUTPUT_DIFF[2] IOB[3]:SUSPEND[0] IOB[3]:IBUF_MODE[0] IOB[4]:PSLEW[2] IOB[3]:IBUF_MODE[1] IOB[3]:OUTPUT_ENABLE[0] IOB[4]:IBUF_MODE[0] IOB[3]:SUSPEND[2] IOB[3]:DELAY_VARIABLE IOB[3]:PSLEW[2] IOB[2]:PCI_INPUT IOB[2]:PULL[2]
B3 - IOB[4]:NSLEW[0] IOB[4]:DELAY_VARIABLE IOB[4]:PDRIVE[2] IOB[4]:PULL[1] IOB[4]:OUTPUT_DIFF[0] IOB[4]:PCI_CLAMP IOB[4]:OUTPUT_DIFF_GROUP[1] IOB[3]:PDRIVE[2] IOB[3]:PCI_CLAMP IOB[4]:PSLEW[0] IOB[3]:NDRIVE[2] ~IOB[4]:I_DELAY[1] IOB[3]:SUSPEND[1] IOB[3]:NSLEW[1] IOB[3]:PSLEW[0] IOB[3]:PSLEW[3] - IOB[2]:IBUF_MODE[2]
B2 - IOB[4]:NSLEW[1] IOB[4]:OUTPUT_ENABLE[1] ~IOB[4]:NDRIVE[1] ~IOB[4]:PDRIVE[1] - - IOB[3]:PULL[0] IOB[3]:PDRIVE[0] IOB[3]:NDRIVE[0] IOB[4]:PSLEW[1] IOB[3]:SUSPEND[3] ~IOB[4]:I_DELAY[0] IOB[4]:SUSPEND[0] IOB[3]:OUTPUT_ENABLE[1] IOB[3]:NSLEW[2] IOB[3]:PSLEW[1] - IOB[2]:IBUF_MODE[1]
B1 - IOB[4]:NSLEW[2] - IOB[4]:NDRIVE[2] IOB[4]:PDRIVE[0] - - IOB[3]:PULL[1] ~IOB[3]:PDRIVE[1] IOB[3]:IBUF_MODE[2] IOB[4]:PCI_INPUT - - IOB[4]:PULL[2] IOB[3]:NSLEW[0] IOB[3]:NSLEW[3] IOB[3]:PCI_INPUT - IOB[2]:IBUF_MODE[0]
B0 - IOB[4]:NSLEW[3] - - IOB[4]:PULL[0] IOB[4]:OUTPUT_DIFF[3] IOB[4]:NDRIVE[0] - ~IOB[3]:NDRIVE[1] IOB[3]:PULL[2] IOB[4]:PSLEW[3] - - IOB[4]:SUSPEND[1] ~IOB[3]:I_DELAY[0] ~IOB[3]:I_DELAY[1] - - IOB[2]:VREF
IOB[0]:DELAY_COMMON 0.F18.B5
IOB[1]:DELAY_COMMON 0.F7.B5
IOB[2]:DELAY_COMMON 0.F6.B5
IOB[3]:DELAY_COMMON 1.F18.B5
IOB[4]:DELAY_COMMON 1.F7.B5
inverted ~[0]
IOB[0]:DELAY_VARIABLE 0.F15.B3
IOB[0]:PCI_CLAMP 0.F12.B3
IOB[0]:PCI_INPUT 0.F18.B3
IOB[0]:VREF 0.F15.B0
IOB[1]:DELAY_VARIABLE 0.F2.B3
IOB[1]:PCI_CLAMP 0.F6.B0
IOB[1]:PCI_INPUT 0.F1.B3
IOB[1]:VREF 0.F3.B2
IOB[2]:DELAY_VARIABLE 0.F4.B0
IOB[2]:PCI_INPUT 1.F17.B4
IOB[2]:VREF 1.F18.B0
IOB[3]:DELAY_VARIABLE 1.F15.B4
IOB[3]:PCI_CLAMP 1.F9.B3
IOB[3]:PCI_INPUT 1.F16.B1
IOB[4]:DELAY_VARIABLE 1.F2.B3
IOB[4]:PCI_CLAMP 1.F6.B3
IOB[4]:PCI_INPUT 1.F10.B1
non-inverted [0]
IOB[0]:IBUF_MODE 0.F12.B1 0.F14.B3 0.F14.B1
IOB[1]:IBUF_MODE 0.F5.B4 0.F4.B3 0.F4.B1
IOB[3]:IBUF_MODE 1.F9.B1 1.F11.B4 1.F9.B4
IOB[4]:IBUF_MODE 1.F8.B5 1.F5.B5 1.F13.B4
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
DIFF 1 1 0
CMOS_VCCAUX 1 1 1
IOB[0]:IFF_DELAY 0.F15.B5 0.F16.B5
IOB[1]:IFF_DELAY 0.F11.B5 0.F9.B5
IOB[2]:IFF_DELAY 0.F4.B5 0.F3.B5
IOB[3]:IFF_DELAY 1.F16.B5 1.F17.B5
IOB[4]:IFF_DELAY 1.F11.B5 1.F9.B5
inverted ~[1] ~[0]
IOB[0]:I_DELAY 0.F14.B5 0.F14.B4 0.F15.B1
IOB[1]:I_DELAY 0.F8.B0 0.F5.B0 0.F2.B5
IOB[2]:I_DELAY 0.F2.B1 0.F6.B1 0.F3.B0
IOB[3]:I_DELAY 1.F14.B5 1.F15.B0 1.F14.B0
IOB[4]:I_DELAY 1.F12.B5 1.F12.B3 1.F12.B2
inverted ~[2] ~[1] ~[0]
IOB[0]:NDRIVE 0.F13.B3 0.F13.B4 0.F12.B2
IOB[0]:PDRIVE 0.F11.B3 0.F13.B1 0.F13.B2
IOB[1]:NDRIVE 0.F6.B4 0.F7.B4 0.F5.B3
IOB[1]:PDRIVE 0.F7.B2 0.F6.B2 0.F6.B3
IOB[3]:NDRIVE 1.F11.B3 1.F8.B0 1.F9.B2
IOB[3]:PDRIVE 1.F8.B3 1.F8.B1 1.F8.B2
IOB[4]:NDRIVE 1.F3.B1 1.F3.B2 1.F6.B0
IOB[4]:PDRIVE 1.F3.B3 1.F4.B2 1.F4.B1
mixed inversion [2] ~[1] [0]
IOB[0]:NSLEW 0.F17.B4 0.F17.B2 0.F16.B2 0.F16.B3
IOB[0]:PSLEW 0.F18.B1 0.F18.B4 0.F18.B2 0.F17.B1
IOB[1]:NSLEW 0.F1.B5 0.F2.B0 0.F2.B2 0.F5.B5
IOB[1]:OUTPUT_DIFF 0.F8.B2 0.F11.B4 0.F7.B3 0.F8.B1
IOB[1]:PSLEW 0.F1.B4 0.F1.B0 0.F1.B2 0.F1.B1
IOB[3]:NSLEW 1.F15.B1 1.F15.B2 1.F14.B3 1.F14.B1
IOB[3]:PSLEW 1.F16.B3 1.F16.B4 1.F16.B2 1.F15.B3
IOB[4]:NSLEW 1.F1.B0 1.F1.B1 1.F1.B2 1.F1.B3
IOB[4]:OUTPUT_DIFF 1.F5.B0 1.F7.B4 1.F4.B4 1.F5.B3
IOB[4]:PSLEW 1.F10.B0 1.F10.B4 1.F10.B2 1.F10.B3
non-inverted [3] [2] [1] [0]
IOB[0]:OUTPUT_ENABLE 0.F16.B1 0.F15.B4
IOB[1]:OUTPUT_DIFF_GROUP 0.F11.B2 0.F8.B4
IOB[1]:OUTPUT_ENABLE 0.F3.B1 0.F2.B4
IOB[3]:OUTPUT_ENABLE 1.F14.B2 1.F12.B4
IOB[4]:OUTPUT_DIFF_GROUP 1.F7.B3 1.F5.B4
IOB[4]:OUTPUT_ENABLE 1.F2.B2 1.F1.B5
non-inverted [1] [0]
IOB[0]:PULL 0.F12.B5 0.F11.B1 0.F9.B3
IOB[1]:PULL 0.F5.B1 0.F7.B0 0.F8.B3
IOB[2]:PULL 1.F18.B4 0.F10.B2 0.F10.B1
IOB[3]:PULL 1.F9.B0 1.F7.B1 1.F7.B2
IOB[4]:PULL 1.F13.B1 1.F4.B3 1.F4.B0
PULLDOWN 0 0 0
NONE 0 0 1
PULLUP 0 1 1
KEEPER 1 0 1
IOB[0]:SUSPEND 0.F14.B0 0.F16.B4 0.F14.B2 0.F12.B4
IOB[1]:SUSPEND 0.F4.B4 0.F3.B3 0.F4.B2 0.F5.B2
IOB[3]:SUSPEND 1.F11.B2 1.F14.B4 1.F13.B3 1.F8.B4
IOB[4]:SUSPEND 1.F2.B4 1.F1.B4 1.F13.B0 1.F13.B2
3STATE 0 0 0 0
DRIVE_LAST_VALUE 0 0 0 1
3STATE_PULLUP 0 0 1 0
3STATE_PULLDOWN 0 1 0 0
3STATE_KEEPER 1 0 0 0
IOB[2]:IBUF_MODE 1.F18.B3 1.F18.B2 1.F18.B1
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
CMOS_VCCAUX 1 1 1

Tile IOB_S3A_E4

Cells: 4

Bitstream

spartan3 IOB_S3A_E4 rect TERM[0]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_E4 rect TERM[1]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_E4 rect TERM[2]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_E4 rect TERM[3]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 IOB_S3A_E4 rect R3
BitFrame
F0 F1
B56 IOB[0]:PULL[0] -
B55 IOB[0]:PULL[1] -
B54 - -
B53 - -
B52 IOB[0]:IBUF_MODE[0] IOB[0]:PULL[2]
B51 IOB[0]:IBUF_MODE[1] -
B50 IOB[0]:IBUF_MODE[2] -
B49 IOB[0]:VREF -
B48 - -
B47 - -
B46 IOB[0]:PCI_INPUT -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 IOB[1]:PCI_INPUT -
B37 - -
B36 IOB[1]:IBUF_MODE[2] -
B35 - -
B34 IOB[1]:VREF -
B33 IOB[1]:IBUF_MODE[1] -
B32 IOB[1]:IBUF_MODE[0] -
B31 IOB[1]:PULL[2] -
B30 - -
B29 - -
B28 - -
B27 IOB[1]:PULL[1] -
B26 - -
B25 IOB[1]:PULL[0] -
B24 - -
B23 - -
B22 - -
B21 IOB[2]:PSLEW[3] -
B20 IOB[2]:PSLEW[2] -
B19 IOB[2]:PCI_INPUT -
B18 IOB[2]:PSLEW[1] -
B17 IOB[2]:PSLEW[0] IOB[2]:SUSPEND[0]
B16 - -
B15 IOB[2]:PULL[1] -
B14 - -
B13 IOB[2]:NSLEW[3] -
B12 IOB[2]:NSLEW[2] -
B11 - IOB[2]:NSLEW[1]
B10 IOB[2]:NSLEW[0] -
B9 IOB[2]:SUSPEND[2] -
B8 IOB[2]:OUTPUT_ENABLE[1] -
B7 IOB[2]:OUTPUT_ENABLE[0] -
B6 - -
B5 - -
B4 IOB[2]:VREF -
B3 IOB[2]:SUSPEND[1] -
B2 IOB[2]:SUSPEND[3] -
B1 IOB[2]:IBUF_MODE[0] -
B0 IOB[2]:IBUF_MODE[1] -
IOB[0]:IBUF_MODE 3.F0.B50 3.F0.B51 3.F0.B52
IOB[1]:IBUF_MODE 3.F0.B36 3.F0.B33 3.F0.B32
IOB[2]:IBUF_MODE 2.F0.B57 3.F0.B0 3.F0.B1
IOB[3]:IBUF_MODE 2.F0.B42 2.F0.B39 2.F0.B38
IOB[4]:IBUF_MODE 1.F1.B56 1.F0.B56 1.F0.B57
IOB[5]:IBUF_MODE 1.F0.B34 1.F0.B30 1.F0.B29
IOB[6]:IBUF_MODE 0.F0.B45 0.F0.B49 0.F1.B49
IOB[7]:IBUF_MODE 0.F0.B25 0.F0.B21 0.F0.B22
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
DIFF 1 1 0
CMOS_VCCAUX 1 1 1
IOB[0]:PCI_INPUT 3.F0.B46
IOB[0]:VREF 3.F0.B49
IOB[1]:PCI_INPUT 3.F0.B38
IOB[1]:VREF 3.F0.B34
IOB[2]:PCI_CLAMP 2.F0.B62
IOB[2]:PCI_INPUT 3.F0.B19
IOB[2]:VREF 3.F0.B4
IOB[3]:PCI_CLAMP 2.F0.B41
IOB[3]:PCI_INPUT 2.F0.B19
IOB[3]:VREF 2.F0.B35
IOB[4]:PCI_CLAMP 1.F0.B54
IOB[4]:PCI_INPUT 2.F0.B11
IOB[5]:PCI_CLAMP 1.F0.B33
IOB[5]:PCI_INPUT 1.F0.B11
IOB[6]:PCI_CLAMP 0.F0.B48
IOB[6]:PCI_INPUT 1.F0.B4
IOB[6]:VREF 0.F0.B51
IOB[7]:PCI_CLAMP 0.F1.B24
IOB[7]:PCI_INPUT 0.F0.B8
non-inverted [0]
IOB[0]:PULL 3.F1.B52 3.F0.B55 3.F0.B56
IOB[1]:PULL 3.F0.B31 3.F0.B27 3.F0.B25
IOB[2]:PULL 2.F0.B63 3.F0.B15 2.F0.B52
IOB[3]:PULL 2.F0.B40 2.F0.B23 2.F0.B22
IOB[4]:PULL 1.F0.B55 2.F0.B7 2.F0.B8
IOB[5]:PULL 1.F0.B32 1.F1.B43 1.F0.B62
IOB[6]:PULL 0.F0.B46 0.F0.B63 1.F0.B0
IOB[7]:PULL 0.F0.B16 0.F0.B58 0.F0.B62
PULLDOWN 0 0 0
NONE 0 0 1
PULLUP 0 1 1
KEEPER 1 0 1
IOB[2]:NDRIVE 2.F0.B58 2.F0.B60 2.F0.B61
IOB[2]:PDRIVE 2.F1.B56 2.F0.B51 2.F0.B59
IOB[3]:NDRIVE 2.F0.B45 2.F1.B43 2.F0.B34
IOB[3]:PDRIVE 2.F0.B46 2.F0.B44 2.F0.B43
IOB[4]:NDRIVE 1.F0.B49 1.F0.B52 1.F0.B53
IOB[4]:PDRIVE 1.F1.B49 1.F0.B50 1.F0.B51
IOB[5]:NDRIVE 1.F0.B35 1.F0.B15 1.F0.B31
IOB[5]:PDRIVE 1.F0.B37 1.F0.B36 1.F1.B37
IOB[6]:NDRIVE 0.F1.B43 0.F0.B44 0.F0.B47
IOB[6]:PDRIVE 0.F0.B40 0.F0.B42 0.F0.B43
IOB[7]:NDRIVE 0.F0.B29 0.F0.B26 0.F0.B23
IOB[7]:PDRIVE 0.F0.B30 0.F0.B28 0.F0.B27
mixed inversion [2] ~[1] [0]
IOB[2]:NSLEW 3.F0.B13 3.F0.B12 3.F1.B11 3.F0.B10
IOB[2]:PSLEW 3.F0.B21 3.F0.B20 3.F0.B18 3.F0.B17
IOB[3]:NSLEW 2.F0.B25 2.F0.B26 2.F0.B28 2.F0.B29
IOB[3]:PSLEW 2.F0.B17 2.F0.B18 2.F0.B20 2.F0.B21
IOB[4]:NSLEW 2.F0.B5 2.F1.B5 2.F0.B3 2.F0.B2
IOB[4]:PSLEW 2.F0.B13 2.F0.B12 2.F0.B9 2.F0.B10
IOB[5]:NSLEW 1.F0.B17 1.F0.B18 1.F0.B19 1.F0.B21
IOB[5]:PSLEW 1.F0.B10 1.F1.B11 1.F0.B12 1.F0.B13
IOB[6]:NSLEW 0.F0.B61 0.F0.B60 1.F0.B8 0.F0.B57
IOB[6]:PSLEW 1.F0.B5 1.F1.B5 1.F0.B3 1.F0.B2
IOB[7]:NSLEW 0.F0.B10 0.F1.B11 0.F0.B12 0.F0.B13
IOB[7]:PSLEW 0.F0.B6 0.F0.B9 0.F0.B11 0.F0.B7
non-inverted [3] [2] [1] [0]
IOB[2]:OUTPUT_ENABLE 3.F0.B8 3.F0.B7
IOB[3]:OUTPUT_ENABLE 2.F0.B33 2.F0.B31
IOB[4]:OUTPUT_ENABLE 2.F0.B0 1.F0.B63
IOB[5]:OUTPUT_ENABLE 1.F0.B24 1.F0.B23
IOB[6]:OUTPUT_ENABLE 0.F0.B56 0.F0.B55
IOB[7]:OUTPUT_ENABLE 0.F1.B17 0.F0.B15
non-inverted [1] [0]
IOB[2]:SUSPEND 3.F0.B2 3.F0.B9 3.F0.B3 3.F1.B17
IOB[3]:SUSPEND 2.F0.B37 2.F0.B30 2.F1.B37 2.F1.B17
IOB[4]:SUSPEND 1.F0.B61 2.F0.B1 1.F0.B58 2.F1.B11
IOB[5]:SUSPEND 1.F1.B24 1.F0.B22 1.F0.B28 1.F0.B20
IOB[6]:SUSPEND 0.F0.B52 0.F1.B56 0.F0.B50 0.F0.B54
IOB[7]:SUSPEND 0.F0.B18 0.F0.B14 0.F0.B20 0.F0.B24
3STATE 0 0 0 0
DRIVE_LAST_VALUE 0 0 0 1
3STATE_PULLUP 0 0 1 0
3STATE_PULLDOWN 0 1 0 0
3STATE_KEEPER 1 0 0 0

Tile IOB_S3A_S2

Cells: 2

Bitstream

spartan3 IOB_S3A_S2 rect TERM[0]
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - -
spartan3 IOB_S3A_S2 rect TERM[1]
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - -
### Bitstream
spartan3 IOB_S3A_S2 rect R0
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - - ~IOB[2]:I_DELAY[2] - IOB[3]:NSLEW[1] IOB[3]:SUSPEND[3] IOB[3]:SUSPEND[0] IOB[3]:PULL[2] - ~IOB[3]:I_DELAY[2] - IOB[4]:OUTPUT_DIFF[3] IOB[4]:PCI_CLAMP IOB[4]:IBUF_MODE[2] - IOB[4]:OUTPUT_ENABLE[1] IOB[4]:PSLEW[3] ~IOB[4]:I_DELAY[2] -
B4 - - IOB[3]:PSLEW[1] IOB[3]:NSLEW[3] IOB[3]:NSLEW[0] IOB[3]:IBUF_MODE[1] IOB[3]:PCI_CLAMP IOB[3]:PDRIVE[2] IOB[4]:OUTPUT_DIFF[1] IOB[3]:PULL[0] IOB[4]:PDRIVE[2] IOB[4]:OUTPUT_DIFF[2] IOB[4]:PULL[1] IOB[4]:PSLEW[2] - IOB[4]:SUSPEND[2] IOB[4]:NSLEW[3] IOB[4]:PSLEW[0] IOB[2]:PULL[2]
B3 - IOB[2]:PCI_INPUT IOB[3]:PSLEW[0] IOB[3]:NSLEW[2] IOB[3]:SUSPEND[2] IOB[3]:IBUF_MODE[0] IOB[3]:NDRIVE[0] IOB[3]:PULL[1] IOB[4]:OUTPUT_DIFF_GROUP[0] - - IOB[4]:PULL[0] IOB[4]:OUTPUT_DIFF_GROUP[1] IOB[4]:PSLEW[1] IOB[4]:IBUF_MODE[0] IOB[4]:NSLEW[1] IOB[4]:NSLEW[2] IOB[4]:PCI_INPUT IOB[2]:IBUF_MODE[0]
B2 - IOB[3]:PSLEW[3] ~IOB[2]:I_DELAY[1] IOB[2]:DELAY_VARIABLE IOB[3]:OUTPUT_ENABLE[1] IOB[3]:SUSPEND[1] ~IOB[3]:NDRIVE[1] IOB[3]:PDRIVE[0] IOB[3]:DELAY_VARIABLE ~IOB[3]:I_DELAY[1] ~IOB[4]:PDRIVE[1] IOB[4]:OUTPUT_DIFF[0] IOB[4]:NDRIVE[0] ~IOB[4]:NDRIVE[1] IOB[4]:IBUF_MODE[1] IOB[4]:NSLEW[0] IOB[4]:DELAY_VARIABLE ~IOB[4]:I_DELAY[1] IOB[2]:IBUF_MODE[1]
B1 - IOB[3]:PSLEW[2] ~IOB[2]:I_DELAY[0] - IOB[3]:OUTPUT_ENABLE[0] - IOB[3]:NDRIVE[2] ~IOB[3]:PDRIVE[1] - ~IOB[3]:I_DELAY[0] - - IOB[4]:SUSPEND[0] IOB[4]:PDRIVE[0] IOB[4]:SUSPEND[3] IOB[4]:OUTPUT_ENABLE[0] - ~IOB[4]:I_DELAY[0] IOB[2]:IBUF_MODE[2]
B0 - IOB[3]:PCI_INPUT ~IOB[2]:DELAY_COMMON ~IOB[2]:IFF_DELAY[1] ~IOB[2]:IFF_DELAY[0] - IOB[3]:IBUF_MODE[2] - ~IOB[3]:IFF_DELAY[1] ~IOB[3]:IFF_DELAY[0] - ~IOB[3]:DELAY_COMMON IOB[4]:PULL[2] IOB[4]:NDRIVE[2] IOB[4]:SUSPEND[1] ~IOB[4]:IFF_DELAY[0] ~IOB[4]:DELAY_COMMON ~IOB[4]:IFF_DELAY[1] IOB[2]:VREF
spartan3 IOB_S3A_S2 rect R1
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B5 - IOB[0]:NSLEW[0] - - IOB[0]:PULL[0] IOB[0]:NDRIVE[0] IOB[0]:IBUF_MODE[1] - - ~IOB[0]:I_DELAY[2] IOB[1]:NDRIVE[2] - - IOB[1]:IBUF_MODE[1] - - IOB[2]:PULL[0] ~IOB[1]:I_DELAY[2] IOB[0]:PSLEW[3]
B4 - IOB[0]:NSLEW[1] - IOB[0]:SUSPEND[3] IOB[1]:OUTPUT_DIFF_GROUP[0] IOB[0]:PDRIVE[0] IOB[0]:IBUF_MODE[0] IOB[1]:OUTPUT_DIFF[3] IOB[1]:OUTPUT_DIFF_GROUP[1] IOB[1]:OUTPUT_DIFF[2] ~IOB[1]:NDRIVE[1] IOB[1]:PDRIVE[2] IOB[1]:NSLEW[1] IOB[1]:IBUF_MODE[0] - IOB[1]:PSLEW[1] - - IOB[0]:PSLEW[0]
B3 - IOB[0]:NSLEW[2] - IOB[0]:SUSPEND[1] IOB[1]:OUTPUT_DIFF[1] ~IOB[0]:PDRIVE[1] IOB[0]:PULL[2] IOB[1]:OUTPUT_DIFF[0] IOB[1]:PULL[0] IOB[1]:PULL[1] IOB[1]:IBUF_MODE[2] IOB[1]:PDRIVE[0] IOB[1]:NSLEW[0] IOB[1]:SUSPEND[3] - IOB[1]:PSLEW[0] IOB[1]:PCI_INPUT - IOB[0]:NSLEW[3]
B2 - IOB[0]:SUSPEND[2] - - IOB[0]:SUSPEND[0] IOB[0]:IBUF_MODE[2] IOB[0]:PDRIVE[2] - IOB[0]:DELAY_VARIABLE ~IOB[0]:I_DELAY[1] IOB[1]:PULL[2] ~IOB[1]:PDRIVE[1] IOB[1]:SUSPEND[2] IOB[1]:SUSPEND[1] - IOB[1]:PSLEW[2] IOB[1]:DELAY_VARIABLE ~IOB[1]:I_DELAY[1] IOB[0]:PSLEW[1]
B1 - IOB[0]:OUTPUT_ENABLE[1] - - IOB[0]:PCI_CLAMP ~IOB[0]:NDRIVE[1] - - - ~IOB[0]:I_DELAY[0] IOB[1]:NDRIVE[0] IOB[1]:PCI_CLAMP IOB[1]:OUTPUT_ENABLE[1] - IOB[1]:NSLEW[3] IOB[1]:PSLEW[3] IOB[2]:PULL[1] ~IOB[1]:I_DELAY[0] IOB[0]:PCI_INPUT
B0 - IOB[0]:OUTPUT_ENABLE[0] - - - IOB[0]:NDRIVE[2] IOB[0]:PULL[1] - ~IOB[0]:IFF_DELAY[1] ~IOB[0]:IFF_DELAY[0] IOB[1]:SUSPEND[0] ~IOB[0]:DELAY_COMMON IOB[1]:OUTPUT_ENABLE[0] - IOB[1]:NSLEW[2] ~IOB[1]:IFF_DELAY[0] ~IOB[1]:DELAY_COMMON ~IOB[1]:IFF_DELAY[1] IOB[0]:PSLEW[2]
IOB[0]:DELAY_COMMON 1.F11.B0
IOB[1]:DELAY_COMMON 1.F16.B0
IOB[2]:DELAY_COMMON 0.F2.B0
IOB[3]:DELAY_COMMON 0.F11.B0
IOB[4]:DELAY_COMMON 0.F16.B0
inverted ~[0]
IOB[0]:DELAY_VARIABLE 1.F8.B2
IOB[0]:PCI_CLAMP 1.F4.B1
IOB[0]:PCI_INPUT 1.F18.B1
IOB[1]:DELAY_VARIABLE 1.F16.B2
IOB[1]:PCI_CLAMP 1.F11.B1
IOB[1]:PCI_INPUT 1.F16.B3
IOB[2]:DELAY_VARIABLE 0.F3.B2
IOB[2]:PCI_INPUT 0.F1.B3
IOB[2]:VREF 0.F18.B0
IOB[3]:DELAY_VARIABLE 0.F8.B2
IOB[3]:PCI_CLAMP 0.F6.B4
IOB[3]:PCI_INPUT 0.F1.B0
IOB[4]:DELAY_VARIABLE 0.F16.B2
IOB[4]:PCI_CLAMP 0.F12.B5
IOB[4]:PCI_INPUT 0.F17.B3
non-inverted [0]
IOB[0]:IBUF_MODE 1.F5.B2 1.F6.B5 1.F6.B4
IOB[1]:IBUF_MODE 1.F10.B3 1.F13.B5 1.F13.B4
IOB[3]:IBUF_MODE 0.F6.B0 0.F5.B4 0.F5.B3
IOB[4]:IBUF_MODE 0.F13.B5 0.F14.B2 0.F14.B3
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
DIFF 1 1 0
CMOS_VCCAUX 1 1 1
IOB[0]:IFF_DELAY 1.F8.B0 1.F9.B0
IOB[1]:IFF_DELAY 1.F17.B0 1.F15.B0
IOB[2]:IFF_DELAY 0.F3.B0 0.F4.B0
IOB[3]:IFF_DELAY 0.F8.B0 0.F9.B0
IOB[4]:IFF_DELAY 0.F17.B0 0.F15.B0
inverted ~[1] ~[0]
IOB[0]:I_DELAY 1.F9.B5 1.F9.B2 1.F9.B1
IOB[1]:I_DELAY 1.F17.B5 1.F17.B2 1.F17.B1
IOB[2]:I_DELAY 0.F2.B5 0.F2.B2 0.F2.B1
IOB[3]:I_DELAY 0.F9.B5 0.F9.B2 0.F9.B1
IOB[4]:I_DELAY 0.F17.B5 0.F17.B2 0.F17.B1
inverted ~[2] ~[1] ~[0]
IOB[0]:NDRIVE 1.F5.B0 1.F5.B1 1.F5.B5
IOB[0]:PDRIVE 1.F6.B2 1.F5.B3 1.F5.B4
IOB[1]:NDRIVE 1.F10.B5 1.F10.B4 1.F10.B1
IOB[1]:PDRIVE 1.F11.B4 1.F11.B2 1.F11.B3
IOB[3]:NDRIVE 0.F6.B1 0.F6.B2 0.F6.B3
IOB[3]:PDRIVE 0.F7.B4 0.F7.B1 0.F7.B2
IOB[4]:NDRIVE 0.F13.B0 0.F13.B2 0.F12.B2
IOB[4]:PDRIVE 0.F10.B4 0.F10.B2 0.F13.B1
mixed inversion [2] ~[1] [0]
IOB[0]:NSLEW 1.F18.B3 1.F1.B3 1.F1.B4 1.F1.B5
IOB[0]:PSLEW 1.F18.B5 1.F18.B0 1.F18.B2 1.F18.B4
IOB[1]:NSLEW 1.F14.B1 1.F14.B0 1.F12.B4 1.F12.B3
IOB[1]:OUTPUT_DIFF 1.F7.B4 1.F9.B4 1.F4.B3 1.F7.B3
IOB[1]:PSLEW 1.F15.B1 1.F15.B2 1.F15.B4 1.F15.B3
IOB[3]:NSLEW 0.F3.B4 0.F3.B3 0.F4.B5 0.F4.B4
IOB[3]:PSLEW 0.F1.B2 0.F1.B1 0.F2.B4 0.F2.B3
IOB[4]:NSLEW 0.F16.B4 0.F16.B3 0.F15.B3 0.F15.B2
IOB[4]:OUTPUT_DIFF 0.F11.B5 0.F11.B4 0.F8.B4 0.F11.B2
IOB[4]:PSLEW 0.F16.B5 0.F13.B4 0.F13.B3 0.F17.B4
non-inverted [3] [2] [1] [0]
IOB[0]:OUTPUT_ENABLE 1.F1.B1 1.F1.B0
IOB[1]:OUTPUT_DIFF_GROUP 1.F8.B4 1.F4.B4
IOB[1]:OUTPUT_ENABLE 1.F12.B1 1.F12.B0
IOB[3]:OUTPUT_ENABLE 0.F4.B2 0.F4.B1
IOB[4]:OUTPUT_DIFF_GROUP 0.F12.B3 0.F8.B3
IOB[4]:OUTPUT_ENABLE 0.F15.B5 0.F15.B1
non-inverted [1] [0]
IOB[0]:PULL 1.F6.B3 1.F6.B0 1.F4.B5
IOB[1]:PULL 1.F10.B2 1.F9.B3 1.F8.B3
IOB[2]:PULL 0.F18.B4 1.F16.B1 1.F16.B5
IOB[3]:PULL 0.F7.B5 0.F7.B3 0.F9.B4
IOB[4]:PULL 0.F12.B0 0.F12.B4 0.F11.B3
PULLDOWN 0 0 0
NONE 0 0 1
PULLUP 0 1 1
KEEPER 1 0 1
IOB[0]:SUSPEND 1.F3.B4 1.F1.B2 1.F3.B3 1.F4.B2
IOB[1]:SUSPEND 1.F13.B3 1.F12.B2 1.F13.B2 1.F10.B0
IOB[3]:SUSPEND 0.F5.B5 0.F4.B3 0.F5.B2 0.F6.B5
IOB[4]:SUSPEND 0.F14.B1 0.F15.B4 0.F14.B0 0.F12.B1
3STATE 0 0 0 0
DRIVE_LAST_VALUE 0 0 0 1
3STATE_PULLUP 0 0 1 0
3STATE_PULLDOWN 0 1 0 0
3STATE_KEEPER 1 0 0 0
IOB[2]:IBUF_MODE 0.F18.B1 0.F18.B2 0.F18.B3
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
CMOS_VCCAUX 1 1 1

Tile IOB_S3A_W4

Cells: 4

Bitstream

spartan3 IOB_S3A_W4 rect TERM[0]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_W4 rect TERM[1]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_W4 rect TERM[2]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
spartan3 IOB_S3A_W4 rect TERM[3]
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 IOB_S3A_W4 rect R0
BitFrame
F0 F1
B63 IOB[2]:IBUF_MODE[1] -
B62 IOB[2]:IBUF_MODE[0] -
B61 IOB[2]:SUSPEND[3] -
B60 IOB[2]:SUSPEND[1] -
B59 - -
B58 - -
B57 - -
B56 IOB[2]:OUTPUT_ENABLE[1] -
B55 IOB[2]:OUTPUT_ENABLE[0] -
B54 IOB[2]:SUSPEND[2] -
B53 IOB[2]:NSLEW[0] -
B52 - IOB[2]:NSLEW[1]
B51 IOB[2]:NSLEW[2] -
B50 IOB[2]:NSLEW[3] -
B49 - -
B48 IOB[2]:PULL[1] -
B47 - -
B46 IOB[2]:PSLEW[0] IOB[2]:SUSPEND[0]
B45 IOB[2]:PSLEW[1] -
B44 IOB[2]:PCI_INPUT -
B43 IOB[2]:PSLEW[2] -
B42 IOB[2]:PSLEW[3] -
B41 - -
B40 - -
B39 - -
B38 IOB[1]:PULL[0] -
B37 - -
B36 IOB[1]:PULL[1] -
B35 - -
B34 - -
B33 - -
B32 IOB[1]:PULL[2] -
B31 IOB[1]:IBUF_MODE[0] -
B30 IOB[1]:IBUF_MODE[1] -
B29 - -
B28 - -
B27 IOB[1]:IBUF_MODE[2] -
B26 - -
B25 IOB[1]:PCI_INPUT -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 IOB[0]:PCI_INPUT -
B16 - -
B15 - -
B14 IOB[0]:VREF -
B13 IOB[0]:IBUF_MODE[2] -
B12 IOB[0]:IBUF_MODE[1] -
B11 IOB[0]:IBUF_MODE[0] IOB[0]:PULL[2]
B10 - -
B9 - -
B8 IOB[0]:PULL[1] -
B7 IOB[0]:PULL[0] -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
IOB[0]:IBUF_MODE 0.F0.B13 0.F0.B12 0.F0.B11
IOB[1]:IBUF_MODE 0.F0.B27 0.F0.B30 0.F0.B31
IOB[2]:IBUF_MODE 1.F0.B6 0.F0.B63 0.F0.B62
IOB[3]:IBUF_MODE 1.F0.B21 1.F0.B24 1.F0.B25
IOB[4]:IBUF_MODE 2.F1.B7 2.F0.B7 2.F0.B6
IOB[5]:IBUF_MODE 2.F0.B29 2.F0.B33 2.F0.B34
IOB[6]:IBUF_MODE 3.F0.B18 3.F0.B14 3.F1.B14
IOB[7]:IBUF_MODE 3.F0.B38 3.F0.B42 3.F0.B41
NONE 0 0 0
TMUX 0 0 1
OMUX 0 1 0
CMOS_VCCINT 0 1 1
CMOS_VCCO 1 0 0
VREF 1 0 1
DIFF 1 1 0
CMOS_VCCAUX 1 1 1
IOB[0]:PCI_INPUT 0.F0.B17
IOB[0]:VREF 0.F0.B14
IOB[1]:PCI_INPUT 0.F0.B25
IOB[2]:PCI_CLAMP 1.F0.B1
IOB[2]:PCI_INPUT 0.F0.B44
IOB[3]:PCI_CLAMP 1.F0.B22
IOB[3]:PCI_INPUT 1.F0.B44
IOB[3]:VREF 1.F0.B28
IOB[4]:PCI_CLAMP 2.F0.B9
IOB[4]:PCI_INPUT 1.F0.B52
IOB[4]:VREF 2.F0.B3
IOB[5]:PCI_CLAMP 2.F0.B30
IOB[5]:PCI_INPUT 2.F0.B52
IOB[6]:PCI_CLAMP 3.F0.B15
IOB[6]:PCI_INPUT 2.F0.B59
IOB[6]:VREF 3.F0.B12
IOB[7]:PCI_CLAMP 3.F1.B39
IOB[7]:PCI_INPUT 3.F0.B55
IOB[7]:VREF 3.F0.B44
non-inverted [0]
IOB[0]:PULL 0.F1.B11 0.F0.B8 0.F0.B7
IOB[1]:PULL 0.F0.B32 0.F0.B36 0.F0.B38
IOB[2]:PULL 1.F0.B0 0.F0.B48 1.F0.B11
IOB[3]:PULL 1.F0.B23 1.F0.B40 1.F0.B41
IOB[4]:PULL 2.F0.B8 1.F0.B56 1.F0.B55
IOB[5]:PULL 2.F0.B31 2.F1.B20 2.F0.B1
IOB[6]:PULL 3.F0.B17 3.F0.B0 2.F0.B63
IOB[7]:PULL 3.F0.B47 3.F0.B5 3.F0.B1
PULLDOWN 0 0 0
NONE 0 0 1
PULLUP 0 1 1
KEEPER 1 0 1
IOB[2]:NDRIVE 1.F0.B5 1.F0.B3 1.F0.B2
IOB[2]:PDRIVE 1.F1.B7 1.F0.B12 1.F0.B4
IOB[3]:NDRIVE 1.F0.B18 1.F1.B20 1.F0.B29
IOB[3]:PDRIVE 1.F0.B17 1.F0.B19 1.F0.B20
IOB[4]:NDRIVE 2.F0.B14 2.F0.B11 2.F0.B10
IOB[4]:PDRIVE 2.F1.B14 2.F0.B13 2.F0.B12
IOB[5]:NDRIVE 2.F0.B28 2.F0.B48 2.F0.B32
IOB[5]:PDRIVE 2.F0.B26 2.F0.B27 2.F1.B26
IOB[6]:NDRIVE 3.F1.B20 3.F0.B19 3.F0.B16
IOB[6]:PDRIVE 3.F0.B23 3.F0.B21 3.F0.B20
IOB[7]:NDRIVE 3.F0.B34 3.F0.B37 3.F0.B40
IOB[7]:PDRIVE 3.F0.B33 3.F0.B35 3.F0.B36
mixed inversion [2] ~[1] [0]
IOB[2]:NSLEW 0.F0.B50 0.F0.B51 0.F1.B52 0.F0.B53
IOB[2]:PSLEW 0.F0.B42 0.F0.B43 0.F0.B45 0.F0.B46
IOB[3]:NSLEW 1.F0.B38 1.F0.B37 1.F0.B35 1.F0.B34
IOB[3]:PSLEW 1.F0.B46 1.F0.B45 1.F0.B43 1.F0.B42
IOB[4]:NSLEW 1.F0.B58 1.F1.B58 1.F0.B60 1.F0.B61
IOB[4]:PSLEW 1.F0.B50 1.F0.B51 1.F0.B54 1.F0.B53
IOB[5]:NSLEW 2.F0.B46 2.F0.B45 2.F0.B44 2.F0.B42
IOB[5]:PSLEW 2.F0.B53 2.F1.B52 2.F0.B51 2.F0.B50
IOB[6]:NSLEW 3.F0.B2 3.F0.B3 2.F0.B55 3.F0.B6
IOB[6]:PSLEW 2.F0.B58 2.F1.B58 2.F0.B60 2.F0.B61
IOB[7]:NSLEW 3.F0.B53 3.F1.B52 3.F0.B51 3.F0.B50
IOB[7]:PSLEW 3.F0.B57 3.F0.B54 3.F0.B52 3.F0.B56
non-inverted [3] [2] [1] [0]
IOB[2]:OUTPUT_ENABLE 0.F0.B56 0.F0.B55
IOB[3]:OUTPUT_ENABLE 1.F0.B32 1.F0.B30
IOB[4]:OUTPUT_ENABLE 2.F0.B0 1.F0.B63
IOB[5]:OUTPUT_ENABLE 2.F0.B40 2.F0.B39
IOB[6]:OUTPUT_ENABLE 3.F0.B8 3.F0.B7
IOB[7]:OUTPUT_ENABLE 3.F1.B46 3.F0.B48
non-inverted [1] [0]
IOB[2]:SUSPEND 0.F0.B61 0.F0.B54 0.F0.B60 0.F1.B46
IOB[3]:SUSPEND 1.F0.B26 1.F0.B33 1.F1.B26 1.F1.B46
IOB[4]:SUSPEND 2.F0.B2 1.F0.B62 2.F0.B5 1.F1.B52
IOB[5]:SUSPEND 2.F1.B39 2.F0.B41 2.F0.B35 2.F0.B43
IOB[6]:SUSPEND 3.F0.B11 3.F1.B7 3.F0.B13 3.F0.B9
IOB[7]:SUSPEND 3.F0.B45 3.F0.B49 3.F0.B43 3.F0.B39
3STATE 0 0 0 0
DRIVE_LAST_VALUE 0 0 0 1
3STATE_PULLUP 0 0 1 0
3STATE_PULLDOWN 0 1 0 0
3STATE_KEEPER 1 0 0 0