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Digital Clock Managers (Spartan 3)

TODO: reverse, document

Tile DCM_S3

Cells: 1

Bel DCM

spartan3 DCM_S3 bel DCM
PinDirectionWires
CLK0outputOUT_FAN[3]
CLK180outputOUT_FAN[1]
CLK270outputOUT_FAN[0]
CLK2XoutputOUT_FAN[7]
CLK2X180outputOUT_FAN[6]
CLK90outputOUT_FAN[2]
CLKDVoutputOUT_SEC[3]
CLKFBinputIMUX_CLK[3]
CLKFXoutputOUT_FAN[5]
CLKFX180outputOUT_FAN[4]
CLKINinputIMUX_CLK[2]
CONCURoutputOUT_SEC[1]
CTLGOinputIMUX_DATA[31]
CTLMODEinputIMUX_DATA[24]
CTLOSC1inputIMUX_DATA[30]
CTLOSC2inputIMUX_DATA[29]
CTLSEL0inputIMUX_DATA[2]
CTLSEL1inputIMUX_DATA[3]
CTLSEL2inputIMUX_DATA[28]
DSSENinputIMUX_DATA[16]
FREEZEDFSinputIMUX_DATA[26]
FREEZEDLLinputIMUX_DATA[25]
LOCKEDoutputOUT_SEC[2]
PSCLKinputIMUX_CLK[1]
PSDONEoutputOUT_SEC[0]
PSENinputIMUX_DATA[17]
PSINCDECinputIMUX_DATA[18]
RSTinputIMUX_DATA[19]
STATUS0outputOUT_SEC[8]
STATUS1outputOUT_SEC[9]
STATUS2outputOUT_SEC[10]
STATUS3outputOUT_SEC[11]
STATUS4outputOUT_SEC[4]
STATUS5outputOUT_SEC[5]
STATUS6outputOUT_SEC[6]
STATUS7outputOUT_SEC[7]
STSADRS0inputIMUX_DATA[27]
STSADRS1inputIMUX_DATA[20]
STSADRS2inputIMUX_DATA[21]
STSADRS3inputIMUX_DATA[22]
STSADRS4inputIMUX_DATA[23]

Bel wires

spartan3 DCM_S3 bel wires
WirePins
IMUX_CLK[1]DCM.PSCLK
IMUX_CLK[2]DCM.CLKIN
IMUX_CLK[3]DCM.CLKFB
IMUX_DATA[2]DCM.CTLSEL0
IMUX_DATA[3]DCM.CTLSEL1
IMUX_DATA[16]DCM.DSSEN
IMUX_DATA[17]DCM.PSEN
IMUX_DATA[18]DCM.PSINCDEC
IMUX_DATA[19]DCM.RST
IMUX_DATA[20]DCM.STSADRS1
IMUX_DATA[21]DCM.STSADRS2
IMUX_DATA[22]DCM.STSADRS3
IMUX_DATA[23]DCM.STSADRS4
IMUX_DATA[24]DCM.CTLMODE
IMUX_DATA[25]DCM.FREEZEDLL
IMUX_DATA[26]DCM.FREEZEDFS
IMUX_DATA[27]DCM.STSADRS0
IMUX_DATA[28]DCM.CTLSEL2
IMUX_DATA[29]DCM.CTLOSC2
IMUX_DATA[30]DCM.CTLOSC1
IMUX_DATA[31]DCM.CTLGO
OUT_FAN[0]DCM.CLK270
OUT_FAN[1]DCM.CLK180
OUT_FAN[2]DCM.CLK90
OUT_FAN[3]DCM.CLK0
OUT_FAN[4]DCM.CLKFX180
OUT_FAN[5]DCM.CLKFX
OUT_FAN[6]DCM.CLK2X180
OUT_FAN[7]DCM.CLK2X
OUT_SEC[0]DCM.PSDONE
OUT_SEC[1]DCM.CONCUR
OUT_SEC[2]DCM.LOCKED
OUT_SEC[3]DCM.CLKDV
OUT_SEC[4]DCM.STATUS4
OUT_SEC[5]DCM.STATUS5
OUT_SEC[6]DCM.STATUS6
OUT_SEC[7]DCM.STATUS7
OUT_SEC[8]DCM.STATUS0
OUT_SEC[9]DCM.STATUS1
OUT_SEC[10]DCM.STATUS2
OUT_SEC[11]DCM.STATUS3

Bitstream

spartan3 DCM_S3 rect MAIN
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18
B63 - - - - - - - - - - - - - - - - - - -
B62 - - - - - - - - - - - - - - - - - - -
B61 - - - - - - - - - - - - - - - - - - -
B60 - - - - - - - - - - - - - - - - - - -
B59 - - - - - - - - - - - - - - - - - - -
B58 - - - - - - - - - - - - - - - - - - -
B57 - - - - - - - - - - - - - - - - - - -
B56 - - - - - - - - - - - - - - - - - - -
B55 - - - - - - - - - - - - - - - - - - -
B54 - - - - - - - - - - - - - - - - - - -
B53 - - - - - - - - - - - - - - - - - - -
B52 - - - - - - - - - - - - - - - - - - -
B51 - - - - - - - - - - - - - - - - - - -
B50 - - - - - - - - - - - - - - - - - - -
B49 - - - - - - - - - - - - - - - - - - -
B48 - - - - - - - - - - - - - - - - - - -
B47 - - - - - - - - - - - - - - - - - - -
B46 - - - - - - - - - - - - - - - - - - -
B45 - - - - - - - - - - - - - - - - - - -
B44 - - - - - - - - - - - - - - - - - - -
B43 - - - - - - - - - - - - - - - - - - -
B42 - - - - - - - - - - - - - - - - - - -
B41 - - - - - - - - - - - - - - - - - - -
B40 - - - - - - - - - - - - - - - - - - -
B39 - - - - - - - - - - - - - - - - - - -
B38 - - - - - - - - - - - - - - - - - - -
B37 - - - - - - - - - - - - - - - - - - -
B36 - - - - - - - - - - - - - - - - - - -
B35 - - - - - - - - - - - - - - - - - - -
B34 - - - - - - - - - - - - - - - - - - -
B33 - - - - - - - - - - - - - - - - - - -
B32 - - - - - - - - - - - - - - - - - - -
B31 - - - - - - - - - - - - - - - - - - -
B30 - - - - - - - - - - - - - - - - - - -
B29 - - - - - - - - - - - - - - - - - - -
B28 - - - - - - - - - - - - - - - - - - -
B27 - - - - - - - - - - - - - - - - - - -
B26 - - - - - - - - - - - - - - - - - - -
B25 - - - - - - - - - - - - - - - - - - -
B24 - - - - - - - - - - - - - - - - - - -
B23 - - - - - - - - - - - - - - - - - - -
B22 - - - - - - - - - - - - - - - - - - -
B21 - - - - - - - - - - - - - - - - - - -
B20 - - - - - - - - - - - - - - - - - - -
B19 - - - - - - - - - - - - - - - - - - -
B18 - - - - - - - - - - - - - - - - - - -
B17 - - - - - - - - - - - - - - - - - - -
B16 - - - - - - - - - - - - - - - - - - -
B15 - - - - - - - - - - - - - - - - - - -
B14 - - - - - - - - - - - - - - - - - - -
B13 - - - - - - - - - - - - - - - - - - -
B12 - - - - - - - - - - - - - - - - - - -
B11 - - - - - - - - - - - - - - - - - - -
B10 - - - - - - - - - - - - - - - - - - -
B9 - - - - - - - - - - - - - - - - - - -
B8 - - - - - - - - - - - - - - - - - - -
B7 - - - - - - - - - - - - - - - - - - -
B6 - - - - - - - - - - - - - - - - - - -
B5 - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - -
### Bitstream
spartan3 DCM_S3 rect R0
BitFrame
F0 F1 F2 F3
B63 - - - ~DCM:INV.STSADRS4
B62 - DCM:CLKFX_MULTIPLY[2] DCM:DFS[14] DCM:DFS[30] DCM:SEL_PL_DLY[1] ~DCM:INV.CTLGO
B61 - DCM:CLKFX_MULTIPLY[1] DCM:DFS[13] DCM:DFS[29] DCM:SEL_PL_DLY[0] -
B60 - DCM:CLKFX_MULTIPLY[0] DCM:DFS[12] DCM:DFS[28] DCM:DFS_FREQUENCY_MODE[0] DCM:DFS[31] DCM:PL_CENTERED
B59 - DCM:CLKFX_DIVIDE[11] DCM:DFS[11] DCM:DFS[27] DCM:DFS_FEEDBACK DCM:CLKFX_MULTIPLY[3] DCM:DFS[15]
B58 - DCM:CLKFX_DIVIDE[10] DCM:DFS[10] DCM:DFS[26] -
B57 - DCM:CLKFX_DIVIDE[9] DCM:DFS[9] DCM:DFS[25] ~DCM:INV.FREEZEDFS
B56 - DCM:CLKFX_DIVIDE[8] DCM:DFS[8] DCM:DFS[24] ~DCM:INV.PSINCDEC
B55 - DCM:CLKFX_DIVIDE[7] DCM:DFS[7] DCM:CLKFX_MULTIPLY[11] DCM:DFS[23] DCM:VREG_PROBE[0]
B54 - DCM:CLKFX_DIVIDE[6] DCM:DFS[6] DCM:CLKFX_MULTIPLY[10] DCM:DFS[22] DCM:VREG_PROBE[1]
B53 - DCM:CLKFX_DIVIDE[5] DCM:DFS[5] DCM:CLKFX_MULTIPLY[9] DCM:DFS[21] ~DCM:INV.CTLSEL0
B52 - DCM:CLKFX_DIVIDE[4] DCM:DFS[4] DCM:CLKFX_MULTIPLY[8] DCM:DFS[20] ~DCM:INV.CTLOSC2
B51 - DCM:CLKFX_DIVIDE[3] DCM:DFS[3] DCM:CLKFX_MULTIPLY[7] DCM:DFS[19] ~DCM:INV.STSADRS2
B50 - DCM:CLKFX_DIVIDE[2] DCM:DFS[2] DCM:CLKFX_MULTIPLY[6] DCM:DFS[18] -
B49 - DCM:CLKFX_DIVIDE[1] DCM:DFS[1] DCM:CLKFX_MULTIPLY[5] DCM:DFS[17] -
B48 - DCM:CLKFX_DIVIDE[0] DCM:DFS[0] DCM:CLKFX_MULTIPLY[4] DCM:DFS[16] -
B47 - DCM:DLLS[31] DCM:COM[31] DCM:NON_STOP DCM:VREG_PROBE[2]
B46 DCM:SPLY_IDC[1] DCM:DLLS[30] DCM:COIN_WINDOW[1] DCM:COM[30] DCM:VREG_PROBE[3]
B45 DCM:SPLY_IDC[0] DCM:DLLS[29] DCM:PHASE_SHIFT[7] DCM:COIN_WINDOW[0] DCM:COM[29] -
B44 DCM:EN_OSC_COARSE DCM:DLLS[28] DCM:PHASE_SHIFT[6] DCM:COM[28] DCM:VBG_PD[1] ~DCM:INV.CTLMODE
B43 DCM:EXTENDED_FLUSH_TIME DCM:DLLS[27] DCM:PHASE_SHIFT[5] DCM:COM[27] DCM:VBG_PD[0] -
B42 DCM:EXTENDED_HALT_TIME DCM:DLLS[26] DCM:PHASE_SHIFT[4] DCM:COM[26] DCM:VBG_SEL[2] -
B41 DCM:EXTENDED_RUN_TIME DCM:DLLS[25] DCM:PHASE_SHIFT[3] DCM:COM[25] DCM:VBG_SEL[1] -
B40 DCM:EN_DUMMY_OSC DCM:DLLS[24] DCM:PHASE_SHIFT[2] DCM:COM[24] DCM:VBG_SEL[0] -
B39 DCM:ZD2_BY1 DCM:DLLS[23] DCM:PHASE_SHIFT[1] DCM:COM[23] -
B38 DCM:ZD1_BY1 DCM:DLLS[22] DCM:PHASE_SHIFT[0] DCM:CLKFB_IOB DCM:COM[22] -
B37 DCM:RESET_PS_SEL DCM:DLLS[21] DCM:PHASE_SHIFT_NEGATIVE DCM:CLKIN_IOB DCM:COM[21] DCM:MISC[0]
B36 DCM:CFG_DLL_PS[8] DCM:DLLS[20] DCM:COM[20] DCM:DESKEW_ADJUST[3] DCM:ENABLE.CLK0 DCM:MISC[1]
B35 DCM:CFG_DLL_PS[7] DCM:DLLS[19] DCM:PS_ENABLE DCM:COM[19] DCM:DESKEW_ADJUST[2] DCM:ENABLE.CLK90 DCM:MISC[2]
B34 DCM:CFG_DLL_PS[6] DCM:DLLS[18] DCM:ENABLE.CLKFB DCM:COM[18] DCM:DESKEW_ADJUST[1] DCM:ENABLE.CLK180 DCM:MISC[3]
B33 DCM:CFG_DLL_PS[5] DCM:DLLS[17] DCM:DLL_ENABLE DCM:COM[17] DCM:DESKEW_ADJUST[0] DCM:ENABLE.CLK270 DCM:MISC[4]
B32 DCM:CFG_DLL_PS[4] DCM:DFS_ENABLE DCM:DLLS[16] DCM:CLKIN_DIVIDE_BY_2 DCM:COM[16] DCM:ENABLE.CLK2X DCM:MISC[5]
B31 DCM:CFG_DLL_PS[3] DCM:DLLS[15] DCM:FACTORY_JF1[7] DCM:COM[15] DCM:ENABLE.CLK2X180 DCM:MISC[6]
B30 DCM:CFG_DLL_PS[2] DCM:DLLS[14] DCM:FACTORY_JF1[6] DCM:COM[14] DCM:ENABLE.CLKDV DCM:MISC[7]
B29 DCM:CFG_DLL_PS[1] DCM:DLLS[13] DCM:FACTORY_JF1[5] DCM:COM[13] DCM:ENABLE.CLKFX180 DCM:MISC[8]
B28 DCM:CFG_DLL_PS[0] DCM:DLLS[12] DCM:FACTORY_JF1[4] DCM:COM[12] DCM:ENABLE.CLKFX DCM:MISC[9]
B27 DCM:CFG_DLL_LP[2] DCM:DLLS[11] DCM:FACTORY_JF1[3] DCM:COM[11] DCM:ENABLE.CONCUR DCM:MISC[10]
B26 DCM:CFG_DLL_LP[1] DCM:DLLS[10] DCM:FACTORY_JF1[2] DCM:COM[10] DCM:MISC[11] DCM:STARTUP_WAIT
B25 DCM:CFG_DLL_LP[0] DCM:DLLS[9] DCM:FACTORY_JF1[1] DCM:COM[9] -
B24 DCM:SEL_HSYNC_B[0] DCM:DLLS[8] DCM:FACTORY_JF1[0] DCM:COM[8] ~DCM:INV.STSADRS0
B23 DCM:M1D1 DCM:DLLS[7] DCM:FACTORY_JF2[7] DCM:COM[7] -
B22 DCM:MIS1 DCM:DLLS[6] DCM:FACTORY_JF2[6] DCM:COM[6] -
B21 DCM:SEL_HSYNC_B[1] DCM:DLLS[5] DCM:FACTORY_JF2[5] DCM:COM[5] -
B20 DCM:EN_PWCTL DCM:DLLS[4] DCM:FACTORY_JF2[4] DCM:COM[4] ~DCM:INV.RST
B19 DCM:LPON_B_DFS[1] DCM:DLLS[3] DCM:FACTORY_JF2[3] DCM:COM[3] ~DCM:INV.CTLSEL1
B18 DCM:LPON_B_DFS[0] DCM:DLLS[2] DCM:FACTORY_JF2[2] DCM:COM[2] -
B17 DCM:EN_RELRST_B DCM:DLLS[1] DCM:FACTORY_JF2[1] DCM:COM[1] -
B16 DCM:EN_OLD_OSCCTL DCM:DLLS[0] DCM:FACTORY_JF2[0] DCM:COM[0] -
B15 DCM:TRIM_LP_B DCM:CLKDV_COUNT_FALL_2[3] DCM:DLLC[15] DCM:DLLC[31] ~DCM:INV.STSADRS3
B14 DCM:INVERT_ZD1_CUSTOM DCM:CLKDV_COUNT_FALL_2[2] DCM:DLLC[14] DCM:DLLC[30] DCM:VREG_PROBE[4]
B13 - DCM:CLKDV_COUNT_FALL_2[1] DCM:DLLC[13] DCM:DLLC[29] ~DCM:INV.CTLOSC1
B12 - DCM:CLKDV_COUNT_FALL_2[0] DCM:DLLC[12] DCM:DLLC[28] DCM:STATUS1 ~DCM:INV.PSEN
B11 - DCM:CLKDV_COUNT_FALL[3] DCM:DLLC[11] DCM:DLLC[27] DCM:STATUS7 ~DCM:INV.FREEZEDLL
B10 - DCM:CLKDV_COUNT_FALL[2] DCM:DLLC[10] DCM:DLLC[26] DCM:PS_MODE[0] -
B9 - DCM:CLKDV_COUNT_FALL[1] DCM:DLLC[9] DCM:DLLC[25] DCM:PS_CENTERED -
B8 - DCM:CLKDV_COUNT_FALL[0] DCM:DLLC[8] DCM:DLLC[24] DCM:DLL_FREQUENCY_MODE[0] -
B7 - DCM:CLKDV_COUNT_MAX[3] DCM:DLLC[7] DCM:CLK_FEEDBACK[0] DCM:DLLC[23] -
B6 - DCM:CLKDV_COUNT_MAX[2] DCM:DLLC[6] DCM:DLLC[22] DCM:TEST_OSC[1] -
B5 - DCM:CLKDV_COUNT_MAX[1] DCM:DLLC[5] DCM:DLLC[21] DCM:TEST_OSC[0] ~DCM:INV.CTLSEL2
B4 - DCM:CLKDV_COUNT_MAX[0] DCM:DLLC[4] DCM:CLKDV_MODE[0] DCM:DLLC[20] ~DCM:INV.STSADRS1
B3 - DCM:DLLC[3] DCM:DUTY_CYCLE_CORRECTION[2] DCM:CLKDV_PHASE_FALL[1] DCM:DLLC[19] -
B2 - DCM:DLLC[2] DCM:DUTY_CYCLE_CORRECTION[1] DCM:CLKDV_PHASE_FALL[0] DCM:DLLC[18] DCM:CLKDV_PHASE_RISE[0] DCM:DLLC[16]
B1 - DCM:DLLC[1] DCM:DUTY_CYCLE_CORRECTION[0] DCM:CLKDV_PHASE_RISE[1] DCM:DLLC[17] DCM:DLLC[0] DCM:DUTY_CYCLE_CORRECTION[3]
B0 - - - -
DCM:CFG_DLL_LP 0.F0.B27 0.F0.B26 0.F0.B25
DCM:VBG_SEL 0.F2.B42 0.F2.B41 0.F2.B40
non-inverted [2] [1] [0]
DCM:CFG_DLL_PS 0.F0.B36 0.F0.B35 0.F0.B34 0.F0.B33 0.F0.B32 0.F0.B31 0.F0.B30 0.F0.B29 0.F0.B28
non-inverted [8] [7] [6] [5] [4] [3] [2] [1] [0]
DCM:CLKDV_COUNT_FALL 0.F1.B11 0.F1.B10 0.F1.B9 0.F1.B8
DCM:CLKDV_COUNT_FALL_2 0.F1.B15 0.F1.B14 0.F1.B13 0.F1.B12
DCM:CLKDV_COUNT_MAX 0.F1.B7 0.F1.B6 0.F1.B5 0.F1.B4
DCM:DESKEW_ADJUST 0.F2.B36 0.F2.B35 0.F2.B34 0.F2.B33
DCM:DUTY_CYCLE_CORRECTION 0.F3.B1 0.F1.B3 0.F1.B2 0.F1.B1
non-inverted [3] [2] [1] [0]
DCM:CLKDV_MODE 0.F2.B4
HALF 0
INT 1
DCM:CLKDV_PHASE_FALL 0.F2.B3 0.F2.B2
DCM:CLKDV_PHASE_RISE 0.F2.B1 0.F3.B2
DCM:LPON_B_DFS 0.F0.B19 0.F0.B18
DCM:SEL_HSYNC_B 0.F0.B21 0.F0.B24
DCM:SPLY_IDC 0.F0.B46 0.F0.B45
DCM:VBG_PD 0.F2.B44 0.F2.B43
non-inverted [1] [0]
DCM:CLKFB_IOB 0.F2.B38
DCM:CLKIN_DIVIDE_BY_2 0.F2.B32
DCM:CLKIN_IOB 0.F2.B37
DCM:DFS_ENABLE 0.F1.B32
DCM:DFS_FEEDBACK 0.F2.B59
DCM:DLL_ENABLE 0.F1.B33
DCM:ENABLE.CLK0 0.F3.B36
DCM:ENABLE.CLK180 0.F3.B34
DCM:ENABLE.CLK270 0.F3.B33
DCM:ENABLE.CLK2X 0.F3.B32
DCM:ENABLE.CLK2X180 0.F3.B31
DCM:ENABLE.CLK90 0.F3.B35
DCM:ENABLE.CLKDV 0.F3.B30
DCM:ENABLE.CLKFB 0.F1.B34
DCM:ENABLE.CLKFX 0.F3.B28
DCM:ENABLE.CLKFX180 0.F3.B29
DCM:ENABLE.CONCUR 0.F3.B27
DCM:EN_DUMMY_OSC 0.F0.B40
DCM:EN_OLD_OSCCTL 0.F0.B16
DCM:EN_OSC_COARSE 0.F0.B44
DCM:EN_PWCTL 0.F0.B20
DCM:EN_RELRST_B 0.F0.B17
DCM:EXTENDED_FLUSH_TIME 0.F0.B43
DCM:EXTENDED_HALT_TIME 0.F0.B42
DCM:EXTENDED_RUN_TIME 0.F0.B41
DCM:INVERT_ZD1_CUSTOM 0.F0.B14
DCM:M1D1 0.F0.B23
DCM:MIS1 0.F0.B22
DCM:NON_STOP 0.F2.B47
DCM:PHASE_SHIFT_NEGATIVE 0.F1.B37
DCM:PL_CENTERED 0.F3.B60
DCM:PS_CENTERED 0.F2.B9
DCM:PS_ENABLE 0.F1.B35
DCM:RESET_PS_SEL 0.F0.B37
DCM:STARTUP_WAIT 0.F3.B26
DCM:STATUS1 0.F2.B12
DCM:STATUS7 0.F2.B11
DCM:TRIM_LP_B 0.F0.B15
DCM:ZD1_BY1 0.F0.B38
DCM:ZD2_BY1 0.F0.B39
non-inverted [0]
DCM:CLKFX_DIVIDE 0.F1.B59 0.F1.B58 0.F1.B57 0.F1.B56 0.F1.B55 0.F1.B54 0.F1.B53 0.F1.B52 0.F1.B51 0.F1.B50 0.F1.B49 0.F1.B48
DCM:CLKFX_MULTIPLY 0.F2.B55 0.F2.B54 0.F2.B53 0.F2.B52 0.F2.B51 0.F2.B50 0.F2.B49 0.F2.B48 0.F3.B59 0.F1.B62 0.F1.B61 0.F1.B60
DCM:MISC 0.F3.B26 0.F3.B27 0.F3.B28 0.F3.B29 0.F3.B30 0.F3.B31 0.F3.B32 0.F3.B33 0.F3.B34 0.F3.B35 0.F3.B36 0.F3.B37
non-inverted [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
DCM:CLK_FEEDBACK 0.F2.B7
1X 0
2X 1
DCM:COIN_WINDOW 0.F2.B46 0.F2.B45
DCM:SEL_PL_DLY 0.F2.B62 0.F2.B61
0 0 0
1 0 1
2 1 0
3 1 1
DCM:COM 0.F2.B47 0.F2.B46 0.F2.B45 0.F2.B44 0.F2.B43 0.F2.B42 0.F2.B41 0.F2.B40 0.F2.B39 0.F2.B38 0.F2.B37 0.F2.B36 0.F2.B35 0.F2.B34 0.F2.B33 0.F2.B32 0.F2.B31 0.F2.B30 0.F2.B29 0.F2.B28 0.F2.B27 0.F2.B26 0.F2.B25 0.F2.B24 0.F2.B23 0.F2.B22 0.F2.B21 0.F2.B20 0.F2.B19 0.F2.B18 0.F2.B17 0.F2.B16
DCM:DFS 0.F3.B60 0.F2.B62 0.F2.B61 0.F2.B60 0.F2.B59 0.F2.B58 0.F2.B57 0.F2.B56 0.F2.B55 0.F2.B54 0.F2.B53 0.F2.B52 0.F2.B51 0.F2.B50 0.F2.B49 0.F2.B48 0.F3.B59 0.F1.B62 0.F1.B61 0.F1.B60 0.F1.B59 0.F1.B58 0.F1.B57 0.F1.B56 0.F1.B55 0.F1.B54 0.F1.B53 0.F1.B52 0.F1.B51 0.F1.B50 0.F1.B49 0.F1.B48
DCM:DLLC 0.F2.B15 0.F2.B14 0.F2.B13 0.F2.B12 0.F2.B11 0.F2.B10 0.F2.B9 0.F2.B8 0.F2.B7 0.F2.B6 0.F2.B5 0.F2.B4 0.F2.B3 0.F2.B2 0.F2.B1 0.F3.B2 0.F1.B15 0.F1.B14 0.F1.B13 0.F1.B12 0.F1.B11 0.F1.B10 0.F1.B9 0.F1.B8 0.F1.B7 0.F1.B6 0.F1.B5 0.F1.B4 0.F1.B3 0.F1.B2 0.F1.B1 0.F3.B1
DCM:DLLS 0.F1.B47 0.F1.B46 0.F1.B45 0.F1.B44 0.F1.B43 0.F1.B42 0.F1.B41 0.F1.B40 0.F1.B39 0.F1.B38 0.F1.B37 0.F1.B36 0.F1.B35 0.F1.B34 0.F1.B33 0.F1.B32 0.F1.B31 0.F1.B30 0.F1.B29 0.F1.B28 0.F1.B27 0.F1.B26 0.F1.B25 0.F1.B24 0.F1.B23 0.F1.B22 0.F1.B21 0.F1.B20 0.F1.B19 0.F1.B18 0.F1.B17 0.F1.B16
non-inverted [31] [30] [29] [28] [27] [26] [25] [24] [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
DCM:DFS_FREQUENCY_MODE 0.F2.B60
DCM:DLL_FREQUENCY_MODE 0.F2.B8
LOW 0
HIGH 1
DCM:FACTORY_JF1 0.F1.B31 0.F1.B30 0.F1.B29 0.F1.B28 0.F1.B27 0.F1.B26 0.F1.B25 0.F1.B24
DCM:FACTORY_JF2 0.F1.B23 0.F1.B22 0.F1.B21 0.F1.B20 0.F1.B19 0.F1.B18 0.F1.B17 0.F1.B16
DCM:PHASE_SHIFT 0.F1.B45 0.F1.B44 0.F1.B43 0.F1.B42 0.F1.B41 0.F1.B40 0.F1.B39 0.F1.B38
non-inverted [7] [6] [5] [4] [3] [2] [1] [0]
DCM:INV.CTLGO 0.F3.B62
DCM:INV.CTLMODE 0.F3.B44
DCM:INV.CTLOSC1 0.F3.B13
DCM:INV.CTLOSC2 0.F3.B52
DCM:INV.CTLSEL0 0.F3.B53
DCM:INV.CTLSEL1 0.F3.B19
DCM:INV.CTLSEL2 0.F3.B5
DCM:INV.FREEZEDFS 0.F3.B57
DCM:INV.FREEZEDLL 0.F3.B11
DCM:INV.PSEN 0.F3.B12
DCM:INV.PSINCDEC 0.F3.B56
DCM:INV.RST 0.F3.B20
DCM:INV.STSADRS0 0.F3.B24
DCM:INV.STSADRS1 0.F3.B4
DCM:INV.STSADRS2 0.F3.B51
DCM:INV.STSADRS3 0.F3.B15
DCM:INV.STSADRS4 0.F3.B63
inverted ~[0]
DCM:PS_MODE 0.F2.B10
CLKFB 0
CLKIN 1
DCM:TEST_OSC 0.F2.B6 0.F2.B5
90 0 0
180 0 1
270 1 0
360 1 1
DCM:VREG_PROBE 0.F3.B14 0.F3.B46 0.F3.B47 0.F3.B54 0.F3.B55
non-inverted [4] [3] [2] [1] [0]

Tile DCMCONN_S

Cells: 1

Bel DCMCONN

spartan3 DCMCONN_S bel DCMCONN
PinDirectionWires
CLKPAD0outputDCM_CLKPAD[0]
CLKPAD1outputDCM_CLKPAD[1]
CLKPAD2outputDCM_CLKPAD[2]
CLKPAD3outputDCM_CLKPAD[3]
OUT0inputOMUX[0]
OUT1inputOMUX[3]
OUT2inputOMUX[4]
OUT3inputOMUX[5]

Bel wires

spartan3 DCMCONN_S bel wires
WirePins
DCM_CLKPAD[0]DCMCONN.CLKPAD0
DCM_CLKPAD[1]DCMCONN.CLKPAD1
DCM_CLKPAD[2]DCMCONN.CLKPAD2
DCM_CLKPAD[3]DCMCONN.CLKPAD3
OMUX[0]DCMCONN.OUT0
OMUX[3]DCMCONN.OUT1
OMUX[4]DCMCONN.OUT2
OMUX[5]DCMCONN.OUT3

Tile DCMCONN_N

Cells: 1

Bel DCMCONN

spartan3 DCMCONN_N bel DCMCONN
PinDirectionWires
CLKPAD0outputDCM_CLKPAD[0]
CLKPAD1outputDCM_CLKPAD[1]
CLKPAD2outputDCM_CLKPAD[2]
CLKPAD3outputDCM_CLKPAD[3]
OUT0inputOMUX[10]
OUT1inputOMUX[11]
OUT2inputOMUX[12]
OUT3inputOMUX[15]

Bel wires

spartan3 DCMCONN_N bel wires
WirePins
DCM_CLKPAD[0]DCMCONN.CLKPAD0
DCM_CLKPAD[1]DCMCONN.CLKPAD1
DCM_CLKPAD[2]DCMCONN.CLKPAD2
DCM_CLKPAD[3]DCMCONN.CLKPAD3
OMUX[10]DCMCONN.OUT0
OMUX[11]DCMCONN.OUT1
OMUX[12]DCMCONN.OUT2
OMUX[15]DCMCONN.OUT3

Device data

Device DCM:DESKEW_ADJUST DCM:VBG_PD DCM:VBG_SEL
[3] [2] [1] [0] [1] [0] [2] [1] [0]
xc3s50 0 1 1 1 1 0 1 0 0
xa3s50 0 1 1 1 1 0 1 0 0
xc3s200 0 1 1 1 1 0 1 0 0
xa3s200 0 1 1 1 1 0 1 0 0
xc3s400 0 1 1 1 1 0 1 0 0
xa3s400 0 1 1 1 1 0 1 0 0
xc3s1000 1 0 0 0 1 0 1 0 0
xa3s1000 1 0 0 0 1 0 1 0 0
xc3s1000l 1 0 0 0 1 0 1 0 0
xc3s1500 1 0 0 0 1 0 1 0 0
xa3s1500 1 0 0 0 1 0 1 0 0
xc3s1500l 1 0 0 0 1 0 1 0 0
xc3s2000 1 0 0 0 1 0 1 0 0
xc3s4000 1 0 0 0 1 0 1 0 0
xc3s4000l 1 0 0 0 1 0 1 0 0
xc3s5000 1 0 0 0 1 0 1 0 0
xcexf10 - - - - - - - - -
xcexf20 - - - - - - - - -
xcexf40 - - - - - - - - -
xc3s100e 0 1 1 0 - - - - -
xa3s100e 0 1 1 0 - - - - -
xc3s250e 0 1 1 1 - - - - -
xa3s250e 0 1 1 1 - - - - -
xc3s500e 0 1 1 0 - - - - -
xa3s500e 0 1 1 0 - - - - -
xc3s1200e 0 1 1 1 - - - - -
xa3s1200e 0 1 1 1 - - - - -
xc3s1600e 0 1 1 1 - - - - -
xa3s1600e 0 1 1 1 - - - - -
xc3s50a 1 0 1 1 - - - - -
xc3s50an 1 0 1 1 - - - - -
xc3s200a 1 0 1 1 - - - - -
xa3s200a 1 0 1 1 - - - - -
xc3s200an 1 0 1 1 - - - - -
xc3s400a 1 0 1 1 - - - - -
xa3s400a 1 0 1 1 - - - - -
xc3s400an 1 0 1 1 - - - - -
xc3s700a 1 0 1 1 - - - - -
xa3s700a 1 0 1 1 - - - - -
xc3s700an 1 0 1 1 - - - - -
xc3s1400a 1 0 1 1 - - - - -
xa3s1400a 1 0 1 1 - - - - -
xc3s1400an 1 0 1 1 - - - - -
xc3sd1800a 1 0 1 1 - - - - -
xa3sd1800a 1 0 1 1 - - - - -
xc3sd3400a 1 0 1 1 - - - - -
xa3sd3400a 1 0 1 1 - - - - -