spartan6 tile slots

Slot	Tiles	Bel slots
INT	INT, INT_IOI	INT
INTF	INTF, INTF_IOI, INTF_CMT, INTF_CMT_IOI	INTF_TESTMUX
BEL	CLEXL, CLEXM, BRAM, DSP, IOI_WE, IOI_SN, CMT_DCM, CMT_PLL, MCB, PCIE, GTP, PCILOGICSE, CNR_SW, CNR_NW, CNR_SE, CNR_NE, CLKC	SLICE[0], SLICE[1], BRAM_F, BRAM_H[0], BRAM_H[1], DSP, ILOGIC[0], ILOGIC[1], OLOGIC[0], OLOGIC[1], IODELAY[0], IODELAY[1], IOICLK[0], IOICLK[1], IOI, DCM[0], DCM[1], PLL, CMT, MCB, PCIE, GTP, BUFDS[0], BUFDS[1], PCILOGICSE, OCT_CAL[0], OCT_CAL[1], OCT_CAL[2], OCT_CAL[3], OCT_CAL[4], OCT_CAL[5], PMV, DNA_PORT, ICAP, SPI_ACCESS, SUSPEND_SYNC, POST_CRC_INTERNAL, STARTUP, SLAVE_SPI, BSCAN[0], BSCAN[1], BSCAN[2], BSCAN[3], BUFGMUX[0], BUFGMUX[1], BUFGMUX[2], BUFGMUX[3], BUFGMUX[4], BUFGMUX[5], BUFGMUX[6], BUFGMUX[7], BUFGMUX[8], BUFGMUX[9], BUFGMUX[10], BUFGMUX[11], BUFGMUX[12], BUFGMUX[13], BUFGMUX[14], BUFGMUX[15], CLKC, CLKC_BUFPLL, MCB_TIE_CLK, MCB_TIE_DQS0, MCB_TIE_DQS1, TIEOFF_IOI, TIEOFF_PLL, TIEOFF_CLK, TIEOFF_DQS0, TIEOFF_DQS1, IPAD_CLKP[0], IPAD_CLKP[1], IPAD_CLKN[0], IPAD_CLKN[1], IPAD_RXP[0], IPAD_RXP[1], IPAD_RXN[0], IPAD_RXN[1], OPAD_TXP[0], OPAD_TXP[1], OPAD_TXN[0], OPAD_TXN[1], GTP_BUF
IOB	IOB	IOB[0], IOB[1]
HCLK	HCLK	HCLK
HCLK_BEL	HCLK_CLEXL, HCLK_CLEXM, HCLK_IOI, HCLK_GTP
HCLK_ROW	HCLK_ROW	BUFH_W[0], BUFH_W[1], BUFH_W[2], BUFH_W[3], BUFH_W[4], BUFH_W[5], BUFH_W[6], BUFH_W[7], BUFH_W[8], BUFH_W[9], BUFH_W[10], BUFH_W[11], BUFH_W[12], BUFH_W[13], BUFH_W[14], BUFH_W[15], BUFH_E[0], BUFH_E[1], BUFH_E[2], BUFH_E[3], BUFH_E[4], BUFH_E[5], BUFH_E[6], BUFH_E[7], BUFH_E[8], BUFH_E[9], BUFH_E[10], BUFH_E[11], BUFH_E[12], BUFH_E[13], BUFH_E[14], BUFH_E[15], HCLK_ROW
CLK	CLK_W, CLK_E, CLK_S, CLK_N	REG_INT, BUFIO2[0], BUFIO2[1], BUFIO2[2], BUFIO2[3], BUFIO2[4], BUFIO2[5], BUFIO2[6], BUFIO2[7], BUFIO2FB[0], BUFIO2FB[1], BUFIO2FB[2], BUFIO2FB[3], BUFIO2FB[4], BUFIO2FB[5], BUFIO2FB[6], BUFIO2FB[7], BUFPLL[0], BUFPLL[1], BUFPLL_MCB, BUFPLL_OUT, BUFPLL_INS_WE, BUFPLL_INS_SN, BUFIO2_INS, BUFIO2_CKPIN, BUFPLL_BUF, GTP_H_BUF, TIEOFF_REG
CMT_BUF	DCM_BUFPLL_BUF_S, DCM_BUFPLL_BUF_S_MID, DCM_BUFPLL_BUF_N, DCM_BUFPLL_BUF_N_MID, PLL_BUFPLL_OUT0, PLL_BUFPLL_OUT1, PLL_BUFPLL_S, PLL_BUFPLL_N	DCM_BUFPLL_BUF_S, DCM_BUFPLL_BUF_S_MID, DCM_BUFPLL_BUF_N, DCM_BUFPLL_BUF_N_MID, PLL_BUFPLL
IOI_CLK	IOI_CLK_SN, IOI_CLK_WE	IOI_CLK_SN, IOI_CLK_WE, IOI_CLK_WE_TERM
CLK_BUF	HCLK_V_MIDBUF, HCLK_H_MIDBUF, CKPIN_V_MIDBUF, CKPIN_H_MIDBUF, CLKPIN_BUF	HCLK_V_MIDBUF, HCLK_H_MIDBUF, CKPIN_V_MIDBUF, CKPIN_H_MIDBUF, CLKPIN_BUF
PCI_CE_TRUNK_BUF	PCI_CE_TRUNK_BUF	PCI_CE_TRUNK_BUF
PCI_CE_BUF	PCI_CE_V_BUF, PCI_CE_H_BUF, PCI_CE_SPLIT	PCI_CE_V_BUF, PCI_CE_H_BUF, PCI_CE_SPLIT

spartan6 bel slots

Slot	Class	Tile slot	Tiles
INT	routing	INT	INT, INT_IOI
INTF_TESTMUX	routing	INTF	INTF, INTF_IOI, INTF_CMT, INTF_CMT_IOI
SLICE[0]	legacy	BEL	CLEXL, CLEXM
SLICE[1]	legacy	BEL	CLEXL, CLEXM
BRAM_F	legacy	BEL	BRAM
BRAM_H[0]	legacy	BEL	BRAM
BRAM_H[1]	legacy	BEL	BRAM
DSP	legacy	BEL	DSP
ILOGIC[0]	legacy	BEL	IOI_WE, IOI_SN
ILOGIC[1]	legacy	BEL	IOI_WE, IOI_SN
OLOGIC[0]	legacy	BEL	IOI_WE, IOI_SN
OLOGIC[1]	legacy	BEL	IOI_WE, IOI_SN
IODELAY[0]	legacy	BEL	IOI_WE, IOI_SN
IODELAY[1]	legacy	BEL	IOI_WE, IOI_SN
IOICLK[0]	legacy	BEL	IOI_WE, IOI_SN
IOICLK[1]	legacy	BEL	IOI_WE, IOI_SN
IOI	legacy	BEL	IOI_WE, IOI_SN
DCM[0]	legacy	BEL	CMT_DCM
DCM[1]	legacy	BEL	CMT_DCM
PLL	legacy	BEL	CMT_PLL
CMT	legacy	BEL	CMT_DCM, CMT_PLL
MCB	legacy	BEL	MCB
PCIE	legacy	BEL	PCIE
GTP	legacy	BEL	GTP
BUFDS[0]	legacy	BEL	GTP
BUFDS[1]	legacy	BEL	GTP
PCILOGICSE	legacy	BEL	PCILOGICSE
OCT_CAL[0]	legacy	BEL	CNR_NW
OCT_CAL[1]	legacy	BEL	CNR_SE
OCT_CAL[2]	legacy	BEL	CNR_SW
OCT_CAL[3]	legacy	BEL	CNR_SW
OCT_CAL[4]	legacy	BEL	CNR_NW
OCT_CAL[5]	legacy	BEL	CNR_NE
PMV	legacy	BEL	CNR_NW
DNA_PORT	legacy	BEL	CNR_NW
ICAP	legacy	BEL	CNR_SE
SPI_ACCESS	legacy	BEL	CNR_SE
SUSPEND_SYNC	legacy	BEL	CNR_SE
POST_CRC_INTERNAL	legacy	BEL	CNR_SE
STARTUP	legacy	BEL	CNR_SE
SLAVE_SPI	legacy	BEL	CNR_SE
BSCAN[0]	legacy	BEL	CNR_NE
BSCAN[1]	legacy	BEL	CNR_NE
BSCAN[2]	legacy	BEL	CNR_NE
BSCAN[3]	legacy	BEL	CNR_NE
BUFGMUX[0]	legacy	BEL	CLKC
BUFGMUX[1]	legacy	BEL	CLKC
BUFGMUX[2]	legacy	BEL	CLKC
BUFGMUX[3]	legacy	BEL	CLKC
BUFGMUX[4]	legacy	BEL	CLKC
BUFGMUX[5]	legacy	BEL	CLKC
BUFGMUX[6]	legacy	BEL	CLKC
BUFGMUX[7]	legacy	BEL	CLKC
BUFGMUX[8]	legacy	BEL	CLKC
BUFGMUX[9]	legacy	BEL	CLKC
BUFGMUX[10]	legacy	BEL	CLKC
BUFGMUX[11]	legacy	BEL	CLKC
BUFGMUX[12]	legacy	BEL	CLKC
BUFGMUX[13]	legacy	BEL	CLKC
BUFGMUX[14]	legacy	BEL	CLKC
BUFGMUX[15]	legacy	BEL	CLKC
CLKC	legacy	BEL	CLKC
CLKC_BUFPLL	legacy	BEL	CLKC
MCB_TIE_CLK	legacy	BEL	MCB
MCB_TIE_DQS0	legacy	BEL	MCB
MCB_TIE_DQS1	legacy	BEL	MCB
TIEOFF_IOI	legacy	BEL	IOI_WE, IOI_SN
TIEOFF_PLL	legacy	BEL	CMT_PLL
TIEOFF_CLK	legacy	BEL	MCB
TIEOFF_DQS0	legacy	BEL	MCB
TIEOFF_DQS1	legacy	BEL	MCB
IPAD_CLKP[0]	legacy	BEL	GTP
IPAD_CLKP[1]	legacy	BEL	GTP
IPAD_CLKN[0]	legacy	BEL	GTP
IPAD_CLKN[1]	legacy	BEL	GTP
IPAD_RXP[0]	legacy	BEL	GTP
IPAD_RXP[1]	legacy	BEL	GTP
IPAD_RXN[0]	legacy	BEL	GTP
IPAD_RXN[1]	legacy	BEL	GTP
OPAD_TXP[0]	legacy	BEL	GTP
OPAD_TXP[1]	legacy	BEL	GTP
OPAD_TXN[0]	legacy	BEL	GTP
OPAD_TXN[1]	legacy	BEL	GTP
GTP_BUF	legacy	BEL	GTP
IOB[0]	legacy	IOB	IOB
IOB[1]	legacy	IOB	IOB
HCLK	legacy	HCLK	HCLK
BUFH_W[0]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[1]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[2]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[3]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[4]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[5]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[6]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[7]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[8]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[9]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[10]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[11]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[12]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[13]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[14]	legacy	HCLK_ROW	HCLK_ROW
BUFH_W[15]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[0]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[1]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[2]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[3]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[4]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[5]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[6]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[7]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[8]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[9]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[10]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[11]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[12]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[13]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[14]	legacy	HCLK_ROW	HCLK_ROW
BUFH_E[15]	legacy	HCLK_ROW	HCLK_ROW
HCLK_ROW	legacy	HCLK_ROW	HCLK_ROW
REG_INT	routing	CLK	CLK_S, CLK_N
BUFIO2[0]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[1]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[2]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[3]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[4]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[5]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[6]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2[7]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[0]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[1]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[2]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[3]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[4]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[5]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[6]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2FB[7]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL[0]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL[1]	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL_MCB	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL_OUT	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL_INS_WE	legacy	CLK	CLK_W, CLK_E
BUFPLL_INS_SN	legacy	CLK	CLK_S, CLK_N
BUFIO2_INS	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFIO2_CKPIN	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
BUFPLL_BUF	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
GTP_H_BUF	legacy	CLK	CLK_S, CLK_N
TIEOFF_REG	legacy	CLK	CLK_W, CLK_E, CLK_S, CLK_N
DCM_BUFPLL_BUF_S	legacy	CMT_BUF	DCM_BUFPLL_BUF_S
DCM_BUFPLL_BUF_S_MID	legacy	CMT_BUF	DCM_BUFPLL_BUF_S_MID
DCM_BUFPLL_BUF_N	legacy	CMT_BUF	DCM_BUFPLL_BUF_N
DCM_BUFPLL_BUF_N_MID	legacy	CMT_BUF	DCM_BUFPLL_BUF_N_MID
PLL_BUFPLL	legacy	CMT_BUF	PLL_BUFPLL_OUT0, PLL_BUFPLL_OUT1
IOI_CLK_SN	legacy	IOI_CLK	IOI_CLK_SN
IOI_CLK_WE	legacy	IOI_CLK	IOI_CLK_WE
IOI_CLK_WE_TERM	legacy	IOI_CLK	IOI_CLK_WE
HCLK_V_MIDBUF	legacy	CLK_BUF	HCLK_V_MIDBUF
HCLK_H_MIDBUF	legacy	CLK_BUF	HCLK_H_MIDBUF
CKPIN_V_MIDBUF	legacy	CLK_BUF	CKPIN_V_MIDBUF
CKPIN_H_MIDBUF	legacy	CLK_BUF	CKPIN_H_MIDBUF
CLKPIN_BUF	legacy	CLK_BUF	CLKPIN_BUF
PCI_CE_TRUNK_BUF	legacy	PCI_CE_TRUNK_BUF	PCI_CE_TRUNK_BUF
PCI_CE_V_BUF	legacy	PCI_CE_BUF	PCI_CE_V_BUF
PCI_CE_H_BUF	legacy	PCI_CE_BUF	PCI_CE_H_BUF
PCI_CE_SPLIT	legacy	PCI_CE_BUF	PCI_CE_SPLIT

spartan6 connector slots

Slot	Opposite	Connectors
W	E	PASS_W, TERM_W
E	W	PASS_E, TERM_E
S	N	PASS_S, TERM_S
N	S	PASS_N, TERM_N

spartan6 region slots

Slot	Wires
HCLK
LEAF	GCLK[0], GCLK[1], GCLK[2], GCLK[3], GCLK[4], GCLK[5], GCLK[6], GCLK[7], GCLK[8], GCLK[9], GCLK[10], GCLK[11], GCLK[12], GCLK[13], GCLK[14], GCLK[15]

spartan6 wires

Wire	Kind
PULLUP	pullup
TIE_0	tie 0
TIE_1	tie 1
GCLK[0]	regional LEAF
GCLK[1]	regional LEAF
GCLK[2]	regional LEAF
GCLK[3]	regional LEAF
GCLK[4]	regional LEAF
GCLK[5]	regional LEAF
GCLK[6]	regional LEAF
GCLK[7]	regional LEAF
GCLK[8]	regional LEAF
GCLK[9]	regional LEAF
GCLK[10]	regional LEAF
GCLK[11]	regional LEAF
GCLK[12]	regional LEAF
GCLK[13]	regional LEAF
GCLK[14]	regional LEAF
GCLK[15]	regional LEAF
SNG_W0[0]	mux
SNG_W0[1]	mux
SNG_W0[2]	mux
SNG_W0[3]	mux
SNG_W0[4]	mux
SNG_W0[5]	mux
SNG_W0[6]	mux
SNG_W0[7]	mux
SNG_W1[0]	branch E
SNG_W1[1]	branch E
SNG_W1[2]	branch E
SNG_W1[3]	branch E
SNG_W1[4]	branch E
SNG_W1[5]	branch E
SNG_W1[6]	branch E
SNG_W1[7]	branch E
SNG_W1_N3	branch S
SNG_W1_S4	branch N
SNG_E0[0]	mux
SNG_E0[1]	mux
SNG_E0[2]	mux
SNG_E0[3]	mux
SNG_E0[4]	mux
SNG_E0[5]	mux
SNG_E0[6]	mux
SNG_E0[7]	mux
SNG_E1[0]	branch W
SNG_E1[1]	branch W
SNG_E1[2]	branch W
SNG_E1[3]	branch W
SNG_E1[4]	branch W
SNG_E1[5]	branch W
SNG_E1[6]	branch W
SNG_E1[7]	branch W
SNG_E1_S0	branch N
SNG_E1_N7	branch S
SNG_S0[0]	mux
SNG_S0[1]	mux
SNG_S0[2]	mux
SNG_S0[3]	mux
SNG_S0[4]	mux
SNG_S0[5]	mux
SNG_S0[6]	mux
SNG_S0[7]	mux
SNG_S1[0]	branch N
SNG_S1[1]	branch N
SNG_S1[2]	branch N
SNG_S1[3]	branch N
SNG_S1[4]	branch N
SNG_S1[5]	branch N
SNG_S1[6]	branch N
SNG_S1[7]	branch N
SNG_S1_N7	branch S
SNG_N0[0]	mux
SNG_N0[1]	mux
SNG_N0[2]	mux
SNG_N0[3]	mux
SNG_N0[4]	mux
SNG_N0[5]	mux
SNG_N0[6]	mux
SNG_N0[7]	mux
SNG_N1[0]	branch S
SNG_N1[1]	branch S
SNG_N1[2]	branch S
SNG_N1[3]	branch S
SNG_N1[4]	branch S
SNG_N1[5]	branch S
SNG_N1[6]	branch S
SNG_N1[7]	branch S
SNG_N1_S0	branch N
DBL_WW0[0]	mux
DBL_WW0[1]	mux
DBL_WW0[2]	mux
DBL_WW0[3]	mux
DBL_WW1[0]	branch E
DBL_WW1[1]	branch E
DBL_WW1[2]	branch E
DBL_WW1[3]	branch E
DBL_WW2[0]	branch E
DBL_WW2[1]	branch E
DBL_WW2[2]	branch E
DBL_WW2[3]	branch E
DBL_WW2_N3	branch S
DBL_EE0[0]	mux
DBL_EE0[1]	mux
DBL_EE0[2]	mux
DBL_EE0[3]	mux
DBL_EE1[0]	branch W
DBL_EE1[1]	branch W
DBL_EE1[2]	branch W
DBL_EE1[3]	branch W
DBL_EE2[0]	branch W
DBL_EE2[1]	branch W
DBL_EE2[2]	branch W
DBL_EE2[3]	branch W
DBL_SS0[0]	mux
DBL_SS0[1]	mux
DBL_SS0[2]	mux
DBL_SS0[3]	mux
DBL_SS1[0]	branch N
DBL_SS1[1]	branch N
DBL_SS1[2]	branch N
DBL_SS1[3]	branch N
DBL_SS2[0]	branch N
DBL_SS2[1]	branch N
DBL_SS2[2]	branch N
DBL_SS2[3]	branch N
DBL_SS2_N3	branch S
DBL_SW0[0]	mux
DBL_SW0[1]	mux
DBL_SW0[2]	mux
DBL_SW0[3]	mux
DBL_SW1[0]	branch N
DBL_SW1[1]	branch N
DBL_SW1[2]	branch N
DBL_SW1[3]	branch N
DBL_SW2[0]	branch E
DBL_SW2[1]	branch E
DBL_SW2[2]	branch E
DBL_SW2[3]	branch E
DBL_SW2_N3	branch S
DBL_SE0[0]	mux
DBL_SE0[1]	mux
DBL_SE0[2]	mux
DBL_SE0[3]	mux
DBL_SE1[0]	branch N
DBL_SE1[1]	branch N
DBL_SE1[2]	branch N
DBL_SE1[3]	branch N
DBL_SE2[0]	branch W
DBL_SE2[1]	branch W
DBL_SE2[2]	branch W
DBL_SE2[3]	branch W
DBL_NN0[0]	mux
DBL_NN0[1]	mux
DBL_NN0[2]	mux
DBL_NN0[3]	mux
DBL_NN1[0]	branch S
DBL_NN1[1]	branch S
DBL_NN1[2]	branch S
DBL_NN1[3]	branch S
DBL_NN2[0]	branch S
DBL_NN2[1]	branch S
DBL_NN2[2]	branch S
DBL_NN2[3]	branch S
DBL_NN2_S0	branch N
DBL_NW0[0]	mux
DBL_NW0[1]	mux
DBL_NW0[2]	mux
DBL_NW0[3]	mux
DBL_NW1[0]	branch S
DBL_NW1[1]	branch S
DBL_NW1[2]	branch S
DBL_NW1[3]	branch S
DBL_NW2[0]	branch E
DBL_NW2[1]	branch E
DBL_NW2[2]	branch E
DBL_NW2[3]	branch E
DBL_NW2_S0	branch N
DBL_NE0[0]	mux
DBL_NE0[1]	mux
DBL_NE0[2]	mux
DBL_NE0[3]	mux
DBL_NE1[0]	branch S
DBL_NE1[1]	branch S
DBL_NE1[2]	branch S
DBL_NE1[3]	branch S
DBL_NE2[0]	branch W
DBL_NE2[1]	branch W
DBL_NE2[2]	branch W
DBL_NE2[3]	branch W
DBL_NE2_S0	branch N
QUAD_WW0[0]	mux
QUAD_WW0[1]	mux
QUAD_WW0[2]	mux
QUAD_WW0[3]	mux
QUAD_WW1[0]	branch E
QUAD_WW1[1]	branch E
QUAD_WW1[2]	branch E
QUAD_WW1[3]	branch E
QUAD_WW2[0]	branch E
QUAD_WW2[1]	branch E
QUAD_WW2[2]	branch E
QUAD_WW2[3]	branch E
QUAD_WW3[0]	branch E
QUAD_WW3[1]	branch E
QUAD_WW3[2]	branch E
QUAD_WW3[3]	branch E
QUAD_WW4[0]	branch E
QUAD_WW4[1]	branch E
QUAD_WW4[2]	branch E
QUAD_WW4[3]	branch E
QUAD_WW4_S0	branch N
QUAD_EE0[0]	mux
QUAD_EE0[1]	mux
QUAD_EE0[2]	mux
QUAD_EE0[3]	mux
QUAD_EE1[0]	branch W
QUAD_EE1[1]	branch W
QUAD_EE1[2]	branch W
QUAD_EE1[3]	branch W
QUAD_EE2[0]	branch W
QUAD_EE2[1]	branch W
QUAD_EE2[2]	branch W
QUAD_EE2[3]	branch W
QUAD_EE3[0]	branch W
QUAD_EE3[1]	branch W
QUAD_EE3[2]	branch W
QUAD_EE3[3]	branch W
QUAD_EE4[0]	branch W
QUAD_EE4[1]	branch W
QUAD_EE4[2]	branch W
QUAD_EE4[3]	branch W
QUAD_SS0[0]	mux
QUAD_SS0[1]	mux
QUAD_SS0[2]	mux
QUAD_SS0[3]	mux
QUAD_SS1[0]	branch N
QUAD_SS1[1]	branch N
QUAD_SS1[2]	branch N
QUAD_SS1[3]	branch N
QUAD_SS2[0]	branch N
QUAD_SS2[1]	branch N
QUAD_SS2[2]	branch N
QUAD_SS2[3]	branch N
QUAD_SS3[0]	branch N
QUAD_SS3[1]	branch N
QUAD_SS3[2]	branch N
QUAD_SS3[3]	branch N
QUAD_SS4[0]	branch N
QUAD_SS4[1]	branch N
QUAD_SS4[2]	branch N
QUAD_SS4[3]	branch N
QUAD_SS4_N3	branch S
QUAD_SW0[0]	mux
QUAD_SW0[1]	mux
QUAD_SW0[2]	mux
QUAD_SW0[3]	mux
QUAD_SW1[0]	branch N
QUAD_SW1[1]	branch N
QUAD_SW1[2]	branch N
QUAD_SW1[3]	branch N
QUAD_SW2[0]	branch N
QUAD_SW2[1]	branch N
QUAD_SW2[2]	branch N
QUAD_SW2[3]	branch N
QUAD_SW3[0]	branch E
QUAD_SW3[1]	branch E
QUAD_SW3[2]	branch E
QUAD_SW3[3]	branch E
QUAD_SW4[0]	branch E
QUAD_SW4[1]	branch E
QUAD_SW4[2]	branch E
QUAD_SW4[3]	branch E
QUAD_SW4_N3	branch S
QUAD_SE0[0]	mux
QUAD_SE0[1]	mux
QUAD_SE0[2]	mux
QUAD_SE0[3]	mux
QUAD_SE1[0]	branch N
QUAD_SE1[1]	branch N
QUAD_SE1[2]	branch N
QUAD_SE1[3]	branch N
QUAD_SE2[0]	branch N
QUAD_SE2[1]	branch N
QUAD_SE2[2]	branch N
QUAD_SE2[3]	branch N
QUAD_SE3[0]	branch W
QUAD_SE3[1]	branch W
QUAD_SE3[2]	branch W
QUAD_SE3[3]	branch W
QUAD_SE4[0]	branch W
QUAD_SE4[1]	branch W
QUAD_SE4[2]	branch W
QUAD_SE4[3]	branch W
QUAD_NN0[0]	mux
QUAD_NN0[1]	mux
QUAD_NN0[2]	mux
QUAD_NN0[3]	mux
QUAD_NN1[0]	branch S
QUAD_NN1[1]	branch S
QUAD_NN1[2]	branch S
QUAD_NN1[3]	branch S
QUAD_NN2[0]	branch S
QUAD_NN2[1]	branch S
QUAD_NN2[2]	branch S
QUAD_NN2[3]	branch S
QUAD_NN3[0]	branch S
QUAD_NN3[1]	branch S
QUAD_NN3[2]	branch S
QUAD_NN3[3]	branch S
QUAD_NN4[0]	branch S
QUAD_NN4[1]	branch S
QUAD_NN4[2]	branch S
QUAD_NN4[3]	branch S
QUAD_NW0[0]	mux
QUAD_NW0[1]	mux
QUAD_NW0[2]	mux
QUAD_NW0[3]	mux
QUAD_NW1[0]	branch S
QUAD_NW1[1]	branch S
QUAD_NW1[2]	branch S
QUAD_NW1[3]	branch S
QUAD_NW2[0]	branch S
QUAD_NW2[1]	branch S
QUAD_NW2[2]	branch S
QUAD_NW2[3]	branch S
QUAD_NW3[0]	branch E
QUAD_NW3[1]	branch E
QUAD_NW3[2]	branch E
QUAD_NW3[3]	branch E
QUAD_NW4[0]	branch E
QUAD_NW4[1]	branch E
QUAD_NW4[2]	branch E
QUAD_NW4[3]	branch E
QUAD_NW4_S0	branch N
QUAD_NE0[0]	mux
QUAD_NE0[1]	mux
QUAD_NE0[2]	mux
QUAD_NE0[3]	mux
QUAD_NE1[0]	branch S
QUAD_NE1[1]	branch S
QUAD_NE1[2]	branch S
QUAD_NE1[3]	branch S
QUAD_NE2[0]	branch S
QUAD_NE2[1]	branch S
QUAD_NE2[2]	branch S
QUAD_NE2[3]	branch S
QUAD_NE3[0]	branch W
QUAD_NE3[1]	branch W
QUAD_NE3[2]	branch W
QUAD_NE3[3]	branch W
QUAD_NE4[0]	branch W
QUAD_NE4[1]	branch W
QUAD_NE4[2]	branch W
QUAD_NE4[3]	branch W
IMUX_GFAN[0]	mux
IMUX_GFAN[1]	mux
IMUX_CLK[0]	mux
IMUX_CLK[1]	mux
IMUX_SR[0]	mux
IMUX_SR[1]	mux
IMUX_LOGICIN[0]	mux
IMUX_LOGICIN[1]	mux
IMUX_LOGICIN[2]	mux
IMUX_LOGICIN[3]	mux
IMUX_LOGICIN[4]	mux
IMUX_LOGICIN[5]	mux
IMUX_LOGICIN[6]	mux
IMUX_LOGICIN[7]	mux
IMUX_LOGICIN[8]	mux
IMUX_LOGICIN[9]	mux
IMUX_LOGICIN[10]	mux
IMUX_LOGICIN[11]	mux
IMUX_LOGICIN[12]	mux
IMUX_LOGICIN[13]	mux
IMUX_LOGICIN[14]	mux
IMUX_LOGICIN[15]	mux
IMUX_LOGICIN[16]	mux
IMUX_LOGICIN[17]	mux
IMUX_LOGICIN[18]	mux
IMUX_LOGICIN[19]	mux
IMUX_LOGICIN[20]	mux
IMUX_LOGICIN[21]	mux
IMUX_LOGICIN[22]	mux
IMUX_LOGICIN[23]	mux
IMUX_LOGICIN[24]	mux
IMUX_LOGICIN[25]	mux
IMUX_LOGICIN[26]	mux
IMUX_LOGICIN[27]	mux
IMUX_LOGICIN[28]	mux
IMUX_LOGICIN[29]	mux
IMUX_LOGICIN[30]	mux
IMUX_LOGICIN[31]	mux
IMUX_LOGICIN[32]	mux
IMUX_LOGICIN[33]	mux
IMUX_LOGICIN[34]	mux
IMUX_LOGICIN[35]	mux
IMUX_LOGICIN[36]	mux
IMUX_LOGICIN[37]	mux
IMUX_LOGICIN[38]	mux
IMUX_LOGICIN[39]	mux
IMUX_LOGICIN[40]	mux
IMUX_LOGICIN[41]	mux
IMUX_LOGICIN[42]	mux
IMUX_LOGICIN[43]	mux
IMUX_LOGICIN[44]	mux
IMUX_LOGICIN[45]	mux
IMUX_LOGICIN[46]	mux
IMUX_LOGICIN[47]	mux
IMUX_LOGICIN[48]	mux
IMUX_LOGICIN[49]	mux
IMUX_LOGICIN[50]	mux
IMUX_LOGICIN[51]	mux
IMUX_LOGICIN[52]	mux
IMUX_LOGICIN[53]	mux
IMUX_LOGICIN[54]	mux
IMUX_LOGICIN[55]	mux
IMUX_LOGICIN[56]	mux
IMUX_LOGICIN[57]	mux
IMUX_LOGICIN[58]	mux
IMUX_LOGICIN[59]	mux
IMUX_LOGICIN[60]	mux
IMUX_LOGICIN[61]	mux
IMUX_LOGICIN[62]	mux
IMUX_LOGICIN[63]	mux
IMUX_LOGICIN20_BOUNCE	mux
IMUX_LOGICIN36_BOUNCE	mux
IMUX_LOGICIN44_BOUNCE	mux
IMUX_LOGICIN62_BOUNCE	mux
IMUX_LOGICIN21_BOUNCE	mux
IMUX_LOGICIN28_BOUNCE	mux
IMUX_LOGICIN52_BOUNCE	mux
IMUX_LOGICIN60_BOUNCE	mux
IMUX_LOGICIN20_S	branch N
IMUX_LOGICIN36_S	branch N
IMUX_LOGICIN44_S	branch N
IMUX_LOGICIN62_S	branch N
IMUX_LOGICIN21_N	branch S
IMUX_LOGICIN28_N	branch S
IMUX_LOGICIN52_N	branch S
IMUX_LOGICIN60_N	branch S
OUT[0]	bel
OUT[1]	bel
OUT[2]	bel
OUT[3]	bel
OUT[4]	bel
OUT[5]	bel
OUT[6]	bel
OUT[7]	bel
OUT[8]	bel
OUT[9]	bel
OUT[10]	bel
OUT[11]	bel
OUT[12]	bel
OUT[13]	bel
OUT[14]	bel
OUT[15]	bel
OUT[16]	bel
OUT[17]	bel
OUT[18]	bel
OUT[19]	bel
OUT[20]	bel
OUT[21]	bel
OUT[22]	bel
OUT[23]	bel
OUT_TMIN[0]	bel
OUT_TMIN[1]	bel
OUT_TMIN[2]	bel
OUT_TMIN[3]	bel
OUT_TMIN[4]	bel
OUT_TMIN[5]	bel
OUT_TMIN[6]	bel
OUT_TMIN[7]	bel
OUT_TMIN[8]	bel
OUT_TMIN[9]	bel
OUT_TMIN[10]	bel
OUT_TMIN[11]	bel
OUT_TMIN[12]	bel
OUT_TMIN[13]	bel
OUT_TMIN[14]	bel
OUT_TMIN[15]	bel
OUT_TMIN[16]	bel
OUT_TMIN[17]	bel
OUT_TMIN[18]	bel
OUT_TMIN[19]	bel
OUT_TMIN[20]	bel
OUT_TMIN[21]	bel
OUT_TMIN[22]	bel
OUT_TMIN[23]	bel
IMUX_CLK_GCLK[0]	mux
IMUX_CLK_GCLK[1]	mux

spartan6 wires

Wire	PASS_W	TERM_W
SNG_E1[0]	→ SNG_E0[0]	← SNG_W0[0]
SNG_E1[1]	→ SNG_E0[1]	← SNG_W0[1]
SNG_E1[2]	→ SNG_E0[2]	← SNG_W0[2]
SNG_E1[3]	→ SNG_E0[3]	← SNG_W0[3]
SNG_E1[4]	→ SNG_E0[4]	← SNG_W0[4]
SNG_E1[5]	→ SNG_E0[5]	← SNG_W0[5]
SNG_E1[6]	→ SNG_E0[6]	← SNG_W0[6]
SNG_E1[7]	→ SNG_E0[7]	← SNG_W0[7]
DBL_EE1[0]	→ DBL_EE0[0]	← DBL_WW0[0]
DBL_EE1[1]	→ DBL_EE0[1]	← DBL_WW0[1]
DBL_EE1[2]	→ DBL_EE0[2]	← DBL_WW0[2]
DBL_EE1[3]	→ DBL_EE0[3]	← DBL_WW0[3]
DBL_EE2[0]	→ DBL_EE1[0]	← DBL_WW1[0]
DBL_EE2[1]	→ DBL_EE1[1]	← DBL_WW1[1]
DBL_EE2[2]	→ DBL_EE1[2]	← DBL_WW1[2]
DBL_EE2[3]	→ DBL_EE1[3]	← DBL_WW1[3]
DBL_SE2[0]	→ DBL_SE1[0]	← DBL_SW1[0]
DBL_SE2[1]	→ DBL_SE1[1]	← DBL_SW1[1]
DBL_SE2[2]	→ DBL_SE1[2]	← DBL_SW1[2]
DBL_SE2[3]	→ DBL_SE1[3]	← DBL_SW1[3]
DBL_NE2[0]	→ DBL_NE1[0]	← DBL_NW1[0]
DBL_NE2[1]	→ DBL_NE1[1]	← DBL_NW1[1]
DBL_NE2[2]	→ DBL_NE1[2]	← DBL_NW1[2]
DBL_NE2[3]	→ DBL_NE1[3]	← DBL_NW1[3]
QUAD_EE1[0]	→ QUAD_EE0[0]	← QUAD_WW0[0]
QUAD_EE1[1]	→ QUAD_EE0[1]	← QUAD_WW0[1]
QUAD_EE1[2]	→ QUAD_EE0[2]	← QUAD_WW0[2]
QUAD_EE1[3]	→ QUAD_EE0[3]	← QUAD_WW0[3]
QUAD_EE2[0]	→ QUAD_EE1[0]	← QUAD_WW1[0]
QUAD_EE2[1]	→ QUAD_EE1[1]	← QUAD_WW1[1]
QUAD_EE2[2]	→ QUAD_EE1[2]	← QUAD_WW1[2]
QUAD_EE2[3]	→ QUAD_EE1[3]	← QUAD_WW1[3]
QUAD_EE3[0]	→ QUAD_EE2[0]	← QUAD_WW2[0]
QUAD_EE3[1]	→ QUAD_EE2[1]	← QUAD_WW2[1]
QUAD_EE3[2]	→ QUAD_EE2[2]	← QUAD_WW2[2]
QUAD_EE3[3]	→ QUAD_EE2[3]	← QUAD_WW2[3]
QUAD_EE4[0]	→ QUAD_EE3[0]	← QUAD_WW3[0]
QUAD_EE4[1]	→ QUAD_EE3[1]	← QUAD_WW3[1]
QUAD_EE4[2]	→ QUAD_EE3[2]	← QUAD_WW3[2]
QUAD_EE4[3]	→ QUAD_EE3[3]	← QUAD_WW3[3]
QUAD_SE3[0]	→ QUAD_SE2[0]	← QUAD_SW2[0]
QUAD_SE3[1]	→ QUAD_SE2[1]	← QUAD_SW2[1]
QUAD_SE3[2]	→ QUAD_SE2[2]	← QUAD_SW2[2]
QUAD_SE3[3]	→ QUAD_SE2[3]	← QUAD_SW2[3]
QUAD_SE4[0]	→ QUAD_SE3[0]	← QUAD_SW3[0]
QUAD_SE4[1]	→ QUAD_SE3[1]	← QUAD_SW3[1]
QUAD_SE4[2]	→ QUAD_SE3[2]	← QUAD_SW3[2]
QUAD_SE4[3]	→ QUAD_SE3[3]	← QUAD_SW3[3]
QUAD_NE3[0]	→ QUAD_NE2[0]	-
QUAD_NE3[1]	→ QUAD_NE2[1]	-
QUAD_NE3[2]	→ QUAD_NE2[2]	-
QUAD_NE3[3]	→ QUAD_NE2[3]	-
QUAD_NE4[0]	→ QUAD_NE3[0]	← QUAD_NW3[0]
QUAD_NE4[1]	→ QUAD_NE3[1]	← QUAD_NW3[1]
QUAD_NE4[2]	→ QUAD_NE3[2]	← QUAD_NW3[2]
QUAD_NE4[3]	→ QUAD_NE3[3]	← QUAD_NW3[3]

spartan6 wires

Wire	PASS_E	TERM_E
SNG_W1[0]	→ SNG_W0[0]	← SNG_E0[0]
SNG_W1[1]	→ SNG_W0[1]	← SNG_E0[1]
SNG_W1[2]	→ SNG_W0[2]	← SNG_E0[2]
SNG_W1[3]	→ SNG_W0[3]	← SNG_E0[3]
SNG_W1[4]	→ SNG_W0[4]	← SNG_E0[4]
SNG_W1[5]	→ SNG_W0[5]	← SNG_E0[5]
SNG_W1[6]	→ SNG_W0[6]	← SNG_E0[6]
SNG_W1[7]	→ SNG_W0[7]	← SNG_E0[7]
DBL_WW1[0]	→ DBL_WW0[0]	← DBL_EE0[0]
DBL_WW1[1]	→ DBL_WW0[1]	← DBL_EE0[1]
DBL_WW1[2]	→ DBL_WW0[2]	← DBL_EE0[2]
DBL_WW1[3]	→ DBL_WW0[3]	← DBL_EE0[3]
DBL_WW2[0]	→ DBL_WW1[0]	← DBL_EE1[0]
DBL_WW2[1]	→ DBL_WW1[1]	← DBL_EE1[1]
DBL_WW2[2]	→ DBL_WW1[2]	← DBL_EE1[2]
DBL_WW2[3]	→ DBL_WW1[3]	← DBL_EE1[3]
DBL_SW2[0]	→ DBL_SW1[0]	← DBL_SE1[0]
DBL_SW2[1]	→ DBL_SW1[1]	← DBL_SE1[1]
DBL_SW2[2]	→ DBL_SW1[2]	← DBL_SE1[2]
DBL_SW2[3]	→ DBL_SW1[3]	← DBL_SE1[3]
DBL_NW2[0]	→ DBL_NW1[0]	← DBL_NE1[0]
DBL_NW2[1]	→ DBL_NW1[1]	← DBL_NE1[1]
DBL_NW2[2]	→ DBL_NW1[2]	← DBL_NE1[2]
DBL_NW2[3]	→ DBL_NW1[3]	← DBL_NE1[3]
QUAD_WW1[0]	→ QUAD_WW0[0]	← QUAD_EE0[0]
QUAD_WW1[1]	→ QUAD_WW0[1]	← QUAD_EE0[1]
QUAD_WW1[2]	→ QUAD_WW0[2]	← QUAD_EE0[2]
QUAD_WW1[3]	→ QUAD_WW0[3]	← QUAD_EE0[3]
QUAD_WW2[0]	→ QUAD_WW1[0]	← QUAD_EE1[0]
QUAD_WW2[1]	→ QUAD_WW1[1]	← QUAD_EE1[1]
QUAD_WW2[2]	→ QUAD_WW1[2]	← QUAD_EE1[2]
QUAD_WW2[3]	→ QUAD_WW1[3]	← QUAD_EE1[3]
QUAD_WW3[0]	→ QUAD_WW2[0]	← QUAD_EE2[0]
QUAD_WW3[1]	→ QUAD_WW2[1]	← QUAD_EE2[1]
QUAD_WW3[2]	→ QUAD_WW2[2]	← QUAD_EE2[2]
QUAD_WW3[3]	→ QUAD_WW2[3]	← QUAD_EE2[3]
QUAD_WW4[0]	→ QUAD_WW3[0]	← QUAD_EE3[0]
QUAD_WW4[1]	→ QUAD_WW3[1]	← QUAD_EE3[1]
QUAD_WW4[2]	→ QUAD_WW3[2]	← QUAD_EE3[2]
QUAD_WW4[3]	→ QUAD_WW3[3]	← QUAD_EE3[3]
QUAD_SW3[0]	→ QUAD_SW2[0]	← QUAD_SE2[0]
QUAD_SW3[1]	→ QUAD_SW2[1]	← QUAD_SE2[1]
QUAD_SW3[2]	→ QUAD_SW2[2]	← QUAD_SE2[2]
QUAD_SW3[3]	→ QUAD_SW2[3]	← QUAD_SE2[3]
QUAD_SW4[0]	→ QUAD_SW3[0]	← QUAD_SE3[0]
QUAD_SW4[1]	→ QUAD_SW3[1]	← QUAD_SE3[1]
QUAD_SW4[2]	→ QUAD_SW3[2]	← QUAD_SE3[2]
QUAD_SW4[3]	→ QUAD_SW3[3]	← QUAD_SE3[3]
QUAD_NW3[0]	→ QUAD_NW2[0]	← QUAD_NE2[0]
QUAD_NW3[1]	→ QUAD_NW2[1]	← QUAD_NE2[1]
QUAD_NW3[2]	→ QUAD_NW2[2]	← QUAD_NE2[2]
QUAD_NW3[3]	→ QUAD_NW2[3]	← QUAD_NE2[3]
QUAD_NW4[0]	→ QUAD_NW3[0]	← QUAD_NE3[0]
QUAD_NW4[1]	→ QUAD_NW3[1]	← QUAD_NE3[1]
QUAD_NW4[2]	→ QUAD_NW3[2]	← QUAD_NE3[2]
QUAD_NW4[3]	→ QUAD_NW3[3]	← QUAD_NE3[3]

spartan6 wires

Wire	PASS_S	TERM_S
SNG_W1_N3	→ SNG_W1[3]	← SNG_W1[4]
SNG_E1_N7	→ SNG_E1[7]	← SNG_E1[0]
SNG_S1_N7	→ SNG_S1[7]	← SNG_N1[0]
SNG_N1[0]	→ SNG_N0[0]	-
SNG_N1[1]	→ SNG_N0[1]	-
SNG_N1[2]	→ SNG_N0[2]	-
SNG_N1[3]	→ SNG_N0[3]	-
SNG_N1[4]	→ SNG_N0[4]	← SNG_S0[4]
SNG_N1[5]	→ SNG_N0[5]	← SNG_S0[5]
SNG_N1[6]	→ SNG_N0[6]	← SNG_S0[6]
SNG_N1[7]	→ SNG_N0[7]	← SNG_S0[7]
DBL_WW2_N3	→ DBL_WW2[3]	← DBL_NW2[0]
DBL_SS2_N3	→ DBL_SS2[3]	← DBL_NN2[0]
DBL_SW2_N3	→ DBL_SW2[3]	← DBL_NE2[0]
DBL_NN1[0]	→ DBL_NN0[0]	← DBL_SS0[0]
DBL_NN1[1]	→ DBL_NN0[1]	← DBL_SS0[1]
DBL_NN1[2]	→ DBL_NN0[2]	← DBL_SS0[2]
DBL_NN1[3]	→ DBL_NN0[3]	← DBL_SS0[3]
DBL_NN2[0]	→ DBL_NN1[0]	← DBL_SS1[0]
DBL_NN2[1]	→ DBL_NN1[1]	← DBL_SS1[1]
DBL_NN2[2]	→ DBL_NN1[2]	← DBL_SS1[2]
DBL_NN2[3]	→ DBL_NN1[3]	← DBL_SS1[3]
DBL_NW1[0]	→ DBL_NW0[0]	← DBL_SW0[0]
DBL_NW1[1]	→ DBL_NW0[1]	← DBL_SW0[1]
DBL_NW1[2]	→ DBL_NW0[2]	← DBL_SW0[2]
DBL_NW1[3]	→ DBL_NW0[3]	← DBL_SW0[3]
DBL_NE1[0]	→ DBL_NE0[0]	← DBL_SE0[0]
DBL_NE1[1]	→ DBL_NE0[1]	← DBL_SE0[1]
DBL_NE1[2]	→ DBL_NE0[2]	← DBL_SE0[2]
DBL_NE1[3]	→ DBL_NE0[3]	← DBL_SE0[3]
QUAD_SS4_N3	→ QUAD_SS4[3]	← QUAD_NW4[0]
QUAD_SW4_N3	→ QUAD_SW4[3]	← QUAD_WW4[0]
QUAD_NN1[0]	→ QUAD_NN0[0]	← QUAD_SS0[0]
QUAD_NN1[1]	→ QUAD_NN0[1]	← QUAD_SS0[1]
QUAD_NN1[2]	→ QUAD_NN0[2]	← QUAD_SS0[2]
QUAD_NN1[3]	→ QUAD_NN0[3]	← QUAD_SS0[3]
QUAD_NN2[0]	→ QUAD_NN1[0]	← QUAD_SS1[0]
QUAD_NN2[1]	→ QUAD_NN1[1]	← QUAD_SS1[1]
QUAD_NN2[2]	→ QUAD_NN1[2]	← QUAD_SS1[2]
QUAD_NN2[3]	→ QUAD_NN1[3]	← QUAD_SS1[3]
QUAD_NN3[0]	→ QUAD_NN2[0]	← QUAD_SS2[0]
QUAD_NN3[1]	→ QUAD_NN2[1]	← QUAD_SS2[1]
QUAD_NN3[2]	→ QUAD_NN2[2]	← QUAD_SS2[2]
QUAD_NN3[3]	→ QUAD_NN2[3]	← QUAD_SS2[3]
QUAD_NN4[0]	→ QUAD_NN3[0]	← QUAD_SS3[0]
QUAD_NN4[1]	→ QUAD_NN3[1]	← QUAD_SS3[1]
QUAD_NN4[2]	→ QUAD_NN3[2]	← QUAD_SS3[2]
QUAD_NN4[3]	→ QUAD_NN3[3]	← QUAD_SS3[3]
QUAD_NW1[0]	→ QUAD_NW0[0]	← QUAD_SW0[0]
QUAD_NW1[1]	→ QUAD_NW0[1]	← QUAD_SW0[1]
QUAD_NW1[2]	→ QUAD_NW0[2]	← QUAD_SW0[2]
QUAD_NW1[3]	→ QUAD_NW0[3]	← QUAD_SW0[3]
QUAD_NW2[0]	→ QUAD_NW1[0]	← QUAD_SW1[0]
QUAD_NW2[1]	→ QUAD_NW1[1]	← QUAD_SW1[1]
QUAD_NW2[2]	→ QUAD_NW1[2]	← QUAD_SW1[2]
QUAD_NW2[3]	→ QUAD_NW1[3]	← QUAD_SW1[3]
QUAD_NE1[0]	→ QUAD_NE0[0]	← QUAD_SE0[0]
QUAD_NE1[1]	→ QUAD_NE0[1]	← QUAD_SE0[1]
QUAD_NE1[2]	→ QUAD_NE0[2]	← QUAD_SE0[2]
QUAD_NE1[3]	→ QUAD_NE0[3]	← QUAD_SE0[3]
QUAD_NE2[0]	→ QUAD_NE1[0]	← QUAD_SE1[0]
QUAD_NE2[1]	→ QUAD_NE1[1]	← QUAD_SE1[1]
QUAD_NE2[2]	→ QUAD_NE1[2]	← QUAD_SE1[2]
QUAD_NE2[3]	→ QUAD_NE1[3]	← QUAD_SE1[3]
IMUX_LOGICIN21_N	→ IMUX_LOGICIN21_BOUNCE	← IMUX_LOGICIN20_BOUNCE
IMUX_LOGICIN28_N	→ IMUX_LOGICIN28_BOUNCE	← IMUX_LOGICIN36_BOUNCE
IMUX_LOGICIN52_N	→ IMUX_LOGICIN52_BOUNCE	← IMUX_LOGICIN44_BOUNCE
IMUX_LOGICIN60_N	→ IMUX_LOGICIN60_BOUNCE	← IMUX_LOGICIN62_BOUNCE

spartan6 wires

Wire	PASS_N	TERM_N
SNG_W1_S4	→ SNG_W1[4]	← SNG_W1[3]
SNG_E1_S0	→ SNG_E1[0]	← SNG_E1[7]
SNG_S1[0]	→ SNG_S0[0]	← SNG_N0[0]
SNG_S1[1]	→ SNG_S0[1]	← SNG_N0[1]
SNG_S1[2]	→ SNG_S0[2]	← SNG_N0[2]
SNG_S1[3]	→ SNG_S0[3]	← SNG_N0[3]
SNG_S1[4]	→ SNG_S0[4]	← SNG_N0[4]
SNG_S1[5]	→ SNG_S0[5]	← SNG_N0[5]
SNG_S1[6]	→ SNG_S0[6]	← SNG_N0[6]
SNG_S1[7]	→ SNG_S0[7]	← SNG_N0[7]
SNG_N1_S0	→ SNG_N1[0]	← SNG_S1[7]
DBL_SS1[0]	→ DBL_SS0[0]	← DBL_NN0[0]
DBL_SS1[1]	→ DBL_SS0[1]	← DBL_NN0[1]
DBL_SS1[2]	→ DBL_SS0[2]	← DBL_NN0[2]
DBL_SS1[3]	→ DBL_SS0[3]	← DBL_NN0[3]
DBL_SS2[0]	→ DBL_SS1[0]	← DBL_NN1[0]
DBL_SS2[1]	→ DBL_SS1[1]	← DBL_NN1[1]
DBL_SS2[2]	→ DBL_SS1[2]	← DBL_NN1[2]
DBL_SS2[3]	→ DBL_SS1[3]	← DBL_NN1[3]
DBL_SW1[0]	→ DBL_SW0[0]	← DBL_NW0[0]
DBL_SW1[1]	→ DBL_SW0[1]	← DBL_NW0[1]
DBL_SW1[2]	→ DBL_SW0[2]	← DBL_NW0[2]
DBL_SW1[3]	→ DBL_SW0[3]	← DBL_NW0[3]
DBL_SE1[0]	→ DBL_SE0[0]	← DBL_NE0[0]
DBL_SE1[1]	→ DBL_SE0[1]	← DBL_NE0[1]
DBL_SE1[2]	→ DBL_SE0[2]	← DBL_NE0[2]
DBL_SE1[3]	→ DBL_SE0[3]	← DBL_NE0[3]
DBL_NN2_S0	→ DBL_NN2[0]	← DBL_SS2[3]
DBL_NW2_S0	→ DBL_NW2[0]	← DBL_WW2[3]
DBL_NE2_S0	→ DBL_NE2[0]	← DBL_SW2[3]
QUAD_WW4_S0	→ QUAD_WW4[0]	← QUAD_SW4[3]
QUAD_SS1[0]	→ QUAD_SS0[0]	← QUAD_NN0[0]
QUAD_SS1[1]	→ QUAD_SS0[1]	← QUAD_NN0[1]
QUAD_SS1[2]	→ QUAD_SS0[2]	← QUAD_NN0[2]
QUAD_SS1[3]	→ QUAD_SS0[3]	← QUAD_NN0[3]
QUAD_SS2[0]	→ QUAD_SS1[0]	← QUAD_NN1[0]
QUAD_SS2[1]	→ QUAD_SS1[1]	← QUAD_NN1[1]
QUAD_SS2[2]	→ QUAD_SS1[2]	← QUAD_NN1[2]
QUAD_SS2[3]	→ QUAD_SS1[3]	← QUAD_NN1[3]
QUAD_SS3[0]	→ QUAD_SS2[0]	← QUAD_NN2[0]
QUAD_SS3[1]	→ QUAD_SS2[1]	← QUAD_NN2[1]
QUAD_SS3[2]	→ QUAD_SS2[2]	← QUAD_NN2[2]
QUAD_SS3[3]	→ QUAD_SS2[3]	← QUAD_NN2[3]
QUAD_SS4[0]	→ QUAD_SS3[0]	← QUAD_NN3[0]
QUAD_SS4[1]	→ QUAD_SS3[1]	← QUAD_NN3[1]
QUAD_SS4[2]	→ QUAD_SS3[2]	← QUAD_NN3[2]
QUAD_SS4[3]	→ QUAD_SS3[3]	← QUAD_NN3[3]
QUAD_SW1[0]	→ QUAD_SW0[0]	← QUAD_NW0[0]
QUAD_SW1[1]	→ QUAD_SW0[1]	← QUAD_NW0[1]
QUAD_SW1[2]	→ QUAD_SW0[2]	← QUAD_NW0[2]
QUAD_SW1[3]	→ QUAD_SW0[3]	← QUAD_NW0[3]
QUAD_SW2[0]	→ QUAD_SW1[0]	← QUAD_NW1[0]
QUAD_SW2[1]	→ QUAD_SW1[1]	← QUAD_NW1[1]
QUAD_SW2[2]	→ QUAD_SW1[2]	← QUAD_NW1[2]
QUAD_SW2[3]	→ QUAD_SW1[3]	← QUAD_NW1[3]
QUAD_SE1[0]	→ QUAD_SE0[0]	← QUAD_NE0[0]
QUAD_SE1[1]	→ QUAD_SE0[1]	← QUAD_NE0[1]
QUAD_SE1[2]	→ QUAD_SE0[2]	← QUAD_NE0[2]
QUAD_SE1[3]	→ QUAD_SE0[3]	← QUAD_NE0[3]
QUAD_SE2[0]	→ QUAD_SE1[0]	← QUAD_NE1[0]
QUAD_SE2[1]	→ QUAD_SE1[1]	← QUAD_NE1[1]
QUAD_SE2[2]	→ QUAD_SE1[2]	← QUAD_NE1[2]
QUAD_SE2[3]	→ QUAD_SE1[3]	← QUAD_NE1[3]
QUAD_NW4_S0	→ QUAD_NW4[0]	← QUAD_SS4[3]
IMUX_LOGICIN20_S	→ IMUX_LOGICIN20_BOUNCE	← IMUX_LOGICIN21_BOUNCE
IMUX_LOGICIN36_S	→ IMUX_LOGICIN36_BOUNCE	← IMUX_LOGICIN28_BOUNCE
IMUX_LOGICIN44_S	→ IMUX_LOGICIN44_BOUNCE	← IMUX_LOGICIN52_BOUNCE
IMUX_LOGICIN62_S	→ IMUX_LOGICIN62_BOUNCE	← IMUX_LOGICIN60_BOUNCE