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Interconnect tiles

Tile INT

Cells: 1

Switchbox INT

spartan6 INT switchbox INT permanent buffers
DestinationSource
IMUX_LOGICIN20_BOUNCEIMUX_LOGICIN[20]
IMUX_LOGICIN36_BOUNCEIMUX_LOGICIN[36]
IMUX_LOGICIN44_BOUNCEIMUX_LOGICIN[44]
IMUX_LOGICIN62_BOUNCEIMUX_LOGICIN[62]
IMUX_LOGICIN21_BOUNCEIMUX_LOGICIN[21]
IMUX_LOGICIN28_BOUNCEIMUX_LOGICIN[28]
IMUX_LOGICIN52_BOUNCEIMUX_LOGICIN[52]
IMUX_LOGICIN60_BOUNCEIMUX_LOGICIN[60]
spartan6 INT switchbox INT muxes SNG_W0[0]
BitsDestination
SNG_W0[0]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_W0[1]
BitsDestination
SNG_W0[1]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_W0[2]
BitsDestination
SNG_W0[2]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_W0[3]
BitsDestination
SNG_W0[3]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_W0[4]
BitsDestination
SNG_W0[4]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_W0[5]
BitsDestination
SNG_W0[5]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_W0[6]
BitsDestination
SNG_W0[6]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_W0[7]
BitsDestination
SNG_W0[7]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_E0[0]
BitsDestination
SNG_E0[0]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_E0[1]
BitsDestination
SNG_E0[1]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_E0[2]
BitsDestination
SNG_E0[2]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_E0[3]
BitsDestination
SNG_E0[3]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_E0[4]
BitsDestination
SNG_E0[4]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_E0[5]
BitsDestination
SNG_E0[5]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_E0[6]
BitsDestination
SNG_E0[6]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_E0[7]
BitsDestination
SNG_E0[7]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_S0[0]
BitsDestination
SNG_S0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_S0[1]
BitsDestination
SNG_S0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_S0[2]
BitsDestination
SNG_S0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_S0[3]
BitsDestination
SNG_S0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_S0[4]
BitsDestination
SNG_S0[4]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_S0[5]
BitsDestination
SNG_S0[5]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_S0[6]
BitsDestination
SNG_S0[6]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_S0[7]
BitsDestination
SNG_S0[7]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_N0[0]
BitsDestination
SNG_N0[0]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_N0[1]
BitsDestination
SNG_N0[1]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_N0[2]
BitsDestination
SNG_N0[2]
Source
OUT[23]
spartan6 INT switchbox INT muxes SNG_N0[3]
BitsDestination
SNG_N0[3]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_N0[4]
BitsDestination
SNG_N0[4]
Source
OUT[19]
spartan6 INT switchbox INT muxes SNG_N0[5]
BitsDestination
SNG_N0[5]
Source
OUT[22]
spartan6 INT switchbox INT muxes SNG_N0[6]
BitsDestination
SNG_N0[6]
Source
OUT[20]
spartan6 INT switchbox INT muxes SNG_N0[7]
BitsDestination
SNG_N0[7]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_WW0[0]
BitsDestination
DBL_WW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_WW0[1]
BitsDestination
DBL_WW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_WW0[2]
BitsDestination
DBL_WW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_WW0[3]
BitsDestination
DBL_WW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_EE0[0]
BitsDestination
DBL_EE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_EE0[1]
BitsDestination
DBL_EE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_EE0[2]
BitsDestination
DBL_EE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_EE0[3]
BitsDestination
DBL_EE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_SS0[0]
BitsDestination
DBL_SS0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_SS0[1]
BitsDestination
DBL_SS0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_SS0[2]
BitsDestination
DBL_SS0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_SS0[3]
BitsDestination
DBL_SS0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_SW0[0]
BitsDestination
DBL_SW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_SW0[1]
BitsDestination
DBL_SW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_SW0[2]
BitsDestination
DBL_SW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_SW0[3]
BitsDestination
DBL_SW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_SE0[0]
BitsDestination
DBL_SE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_SE0[1]
BitsDestination
DBL_SE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_SE0[2]
BitsDestination
DBL_SE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_SE0[3]
BitsDestination
DBL_SE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_NN0[0]
BitsDestination
DBL_NN0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_NN0[1]
BitsDestination
DBL_NN0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_NN0[2]
BitsDestination
DBL_NN0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_NN0[3]
BitsDestination
DBL_NN0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_NW0[0]
BitsDestination
DBL_NW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_NW0[1]
BitsDestination
DBL_NW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_NW0[2]
BitsDestination
DBL_NW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_NW0[3]
BitsDestination
DBL_NW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes DBL_NE0[0]
BitsDestination
DBL_NE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes DBL_NE0[1]
BitsDestination
DBL_NE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes DBL_NE0[2]
BitsDestination
DBL_NE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes DBL_NE0[3]
BitsDestination
DBL_NE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_WW0[0]
BitsDestination
QUAD_WW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_WW0[1]
BitsDestination
QUAD_WW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_WW0[2]
BitsDestination
QUAD_WW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_WW0[3]
BitsDestination
QUAD_WW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_EE0[0]
BitsDestination
QUAD_EE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_EE0[1]
BitsDestination
QUAD_EE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_EE0[2]
BitsDestination
QUAD_EE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_EE0[3]
BitsDestination
QUAD_EE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_SS0[0]
BitsDestination
QUAD_SS0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_SS0[1]
BitsDestination
QUAD_SS0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_SS0[2]
BitsDestination
QUAD_SS0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_SS0[3]
BitsDestination
QUAD_SS0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_SW0[0]
BitsDestination
QUAD_SW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_SW0[1]
BitsDestination
QUAD_SW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_SW0[2]
BitsDestination
QUAD_SW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_SW0[3]
BitsDestination
QUAD_SW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_SE0[0]
BitsDestination
QUAD_SE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_SE0[1]
BitsDestination
QUAD_SE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_SE0[2]
BitsDestination
QUAD_SE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_SE0[3]
BitsDestination
QUAD_SE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_NN0[0]
BitsDestination
QUAD_NN0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_NN0[1]
BitsDestination
QUAD_NN0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_NN0[2]
BitsDestination
QUAD_NN0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_NN0[3]
BitsDestination
QUAD_NN0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_NW0[0]
BitsDestination
QUAD_NW0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_NW0[1]
BitsDestination
QUAD_NW0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_NW0[2]
BitsDestination
QUAD_NW0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_NW0[3]
BitsDestination
QUAD_NW0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes QUAD_NE0[0]
BitsDestination
QUAD_NE0[0]
Source
OUT[19]
spartan6 INT switchbox INT muxes QUAD_NE0[1]
BitsDestination
QUAD_NE0[1]
Source
OUT[22]
spartan6 INT switchbox INT muxes QUAD_NE0[2]
BitsDestination
QUAD_NE0[2]
Source
OUT[20]
spartan6 INT switchbox INT muxes QUAD_NE0[3]
BitsDestination
QUAD_NE0[3]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_GFAN[0]
BitsDestination
IMUX_GFAN[0]
Source
IMUX_LOGICIN[53]
spartan6 INT switchbox INT muxes IMUX_GFAN[1]
BitsDestination
IMUX_GFAN[1]
Source
IMUX_LOGICIN[53]
spartan6 INT switchbox INT muxes IMUX_CLK[0]
BitsDestination
IMUX_CLK[0]
Source
IMUX_LOGICIN[53]
spartan6 INT switchbox INT muxes IMUX_CLK[1]
BitsDestination
IMUX_CLK[1]
Source
IMUX_LOGICIN[53]
spartan6 INT switchbox INT muxes IMUX_SR[0]
BitsDestination
IMUX_SR[0]
Source
IMUX_LOGICIN[63]
spartan6 INT switchbox INT muxes IMUX_SR[1]
BitsDestination
IMUX_SR[1]
Source
IMUX_LOGICIN[63]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[0]
BitsDestination
IMUX_LOGICIN[0]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[1]
BitsDestination
IMUX_LOGICIN[1]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[2]
BitsDestination
IMUX_LOGICIN[2]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[3]
BitsDestination
IMUX_LOGICIN[3]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[4]
BitsDestination
IMUX_LOGICIN[4]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[5]
BitsDestination
IMUX_LOGICIN[5]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[6]
BitsDestination
IMUX_LOGICIN[6]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[7]
BitsDestination
IMUX_LOGICIN[7]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[8]
BitsDestination
IMUX_LOGICIN[8]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[9]
BitsDestination
IMUX_LOGICIN[9]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[10]
BitsDestination
IMUX_LOGICIN[10]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[11]
BitsDestination
IMUX_LOGICIN[11]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[12]
BitsDestination
IMUX_LOGICIN[12]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[13]
BitsDestination
IMUX_LOGICIN[13]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[14]
BitsDestination
IMUX_LOGICIN[14]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[15]
BitsDestination
IMUX_LOGICIN[15]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[16]
BitsDestination
IMUX_LOGICIN[16]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[17]
BitsDestination
IMUX_LOGICIN[17]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[18]
BitsDestination
IMUX_LOGICIN[18]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[19]
BitsDestination
IMUX_LOGICIN[19]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[20]
BitsDestination
IMUX_LOGICIN[20]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[21]
BitsDestination
IMUX_LOGICIN[21]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[22]
BitsDestination
IMUX_LOGICIN[22]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[23]
BitsDestination
IMUX_LOGICIN[23]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[24]
BitsDestination
IMUX_LOGICIN[24]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[25]
BitsDestination
IMUX_LOGICIN[25]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[26]
BitsDestination
IMUX_LOGICIN[26]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[27]
BitsDestination
IMUX_LOGICIN[27]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[28]
BitsDestination
IMUX_LOGICIN[28]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[29]
BitsDestination
IMUX_LOGICIN[29]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[30]
BitsDestination
IMUX_LOGICIN[30]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[31]
BitsDestination
IMUX_LOGICIN[31]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[32]
BitsDestination
IMUX_LOGICIN[32]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[33]
BitsDestination
IMUX_LOGICIN[33]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[34]
BitsDestination
IMUX_LOGICIN[34]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[35]
BitsDestination
IMUX_LOGICIN[35]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[36]
BitsDestination
IMUX_LOGICIN[36]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[37]
BitsDestination
IMUX_LOGICIN[37]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[38]
BitsDestination
IMUX_LOGICIN[38]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[39]
BitsDestination
IMUX_LOGICIN[39]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[40]
BitsDestination
IMUX_LOGICIN[40]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[41]
BitsDestination
IMUX_LOGICIN[41]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[42]
BitsDestination
IMUX_LOGICIN[42]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[43]
BitsDestination
IMUX_LOGICIN[43]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[44]
BitsDestination
IMUX_LOGICIN[44]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[45]
BitsDestination
IMUX_LOGICIN[45]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[46]
BitsDestination
IMUX_LOGICIN[46]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[47]
BitsDestination
IMUX_LOGICIN[47]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[48]
BitsDestination
IMUX_LOGICIN[48]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[49]
BitsDestination
IMUX_LOGICIN[49]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[50]
BitsDestination
IMUX_LOGICIN[50]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[51]
BitsDestination
IMUX_LOGICIN[51]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[52]
BitsDestination
IMUX_LOGICIN[52]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[53]
BitsDestination
IMUX_LOGICIN[53]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[54]
BitsDestination
IMUX_LOGICIN[54]
Source
OUT[22]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[55]
BitsDestination
IMUX_LOGICIN[55]
Source
OUT[20]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[56]
BitsDestination
IMUX_LOGICIN[56]
Source
OUT[19]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[57]
BitsDestination
IMUX_LOGICIN[57]
Source
OUT[17]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[58]
BitsDestination
IMUX_LOGICIN[58]
Source
OUT[18]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[59]
BitsDestination
IMUX_LOGICIN[59]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[60]
BitsDestination
IMUX_LOGICIN[60]
Source
OUT[23]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[61]
BitsDestination
IMUX_LOGICIN[61]
Source
OUT[21]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[62]
BitsDestination
IMUX_LOGICIN[62]
Source
OUT[14]
spartan6 INT switchbox INT muxes IMUX_LOGICIN[63]
BitsDestination
IMUX_LOGICIN[63]
Source
OUT[23]

Bitstream

spartan6 INT rect MAIN
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21
B63 - - - - - - - - - - - - - - - - - - - - - -
B62 - - - - - - - - - - - - - - - - - - - - - -
B61 - - - - - - - - - - - - - - - - - - - - - -
B60 - - - - - - - - - - - - - - - - - - - - - -
B59 - - - - - - - - - - - - - - - - - - - - - -
B58 - - - - - - - - - - - - - - - - - - - - - -
B57 - - - - - - - - - - - - - - - - - - - - - -
B56 - - - - - - - - - - - - - - - - - - - - - -
B55 - - - - - - - - - - - - - - - - - - - - - -
B54 - - - - - - - - - - - - - - - - - - - - - -
B53 - - - - - - - - - - - - - - - - - - - - - -
B52 - - - - - - - - - - - - - - - - - - - - - -
B51 - - - - - - - - - - - - - - - - - - - - - -
B50 - - - - - - - - - - - - - - - - - - - - - -
B49 - - - - - - - - - - - - - - - - - - - - - -
B48 - - - - - - - - - - - - - - - - - - - - - -
B47 - - - - - - - - - - - - - - - - - - - - - -
B46 - - - - - - - - - - - - - - - - - - - - - -
B45 - - - - - - - - - - - - - - - - - - - - - -
B44 - - - - - - - - - - - - - - - - - - - - - -
B43 - - - - - - - - - - - - - - - - - - - - - -
B42 - - - - - - - - - - - - - - - - - - - - - -
B41 - - - - - - - - - - - - - - - - - - - - - -
B40 - - - - - - - - - - - - - - - - - - - - - -
B39 - - - - - - - - - - - - - - - - - - - - - -
B38 - - - - - - - - - - - - - - - - - - - - - -
B37 - - - - - - - - - - - - - - - - - - - - - -
B36 - - - - - - - - - - - - - - - - - - - - - -
B35 - - - - - - - - - - - - - - - - - - - - - -
B34 - - - - - - - - - - - - - - - - - - - - - -
B33 - - - - - - - - - - - - - - - - - - - - - -
B32 - - - - - - - - - - - - - - - - - - - - - -
B31 - - - - - - - - - - - - - - - - - - - - - -
B30 - - - - - - - - - - - - - - - - - - - - - -
B29 - - - - - - - - - - - - - - - - - - - - - -
B28 - - - - - - - - - - - - - - - - - - - - - -
B27 - - - - - - - - - - - - - - - - - - - - - -
B26 - - - - - - - - - - - - - - - - - - - - - -
B25 - - - - - - - - - - - - - - - - - - - - - -
B24 - - - - - - - - - - - - - - - - - - - - - -
B23 - - - - - - - - - - - - - - - - - - - - - -
B22 - - - - - - - - - - - - - - - - - - - - - -
B21 - - - - - - - - - - - - - - - - - - - - - -
B20 - - - - - - - - - - - - - - - - - - - - - -
B19 - - - - - - - - - - - - - - - - - - - - - -
B18 - - - - - - - - - - - - - - - - - - - - - -
B17 - - - - - - - - - - - - - - - - - - - - - -
B16 - - - - - - - - - - - - - - - - - - - - - -
B15 - - - - - - - - - - - - - - - - - - - - - -
B14 - - - - - - - - - - - - - - - - - - - - - -
B13 - - - - - - - - - - - - - - - - - - - - - -
B12 - - - - - - - - - - - - - - - - - - - - - -
B11 - - - - - - - - - - - - - - - - - - - - - -
B10 - - - - - - - - - - - - - - - - - - - - - -
B9 - - - - - - - - - - - - - - - - - - - - - -
B8 - - - - - - - - - - - - - - - - - - - - - -
B7 - - - - - - - - - - - - - - - - - - - - - -
B6 - - - - - - - - - - - - - - - - - - - - - -
B5 - - - - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - - - - -
### Bitstream
spartan6 INT rect R0
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20
B63 INT:MUX.QUAD_SS0[3][6] INT:MUX.QUAD_SS0[3][7] INT:MUX.QUAD_EE0[3][6] INT:MUX.QUAD_EE0[3][7] INT:MUX.DBL_WW0[3][6] INT:MUX.DBL_WW0[3][7] INT:MUX.DBL_SS0[3][6] INT:MUX.DBL_SS0[3][7] INT:MUX.SNG_S0[4][6] INT:MUX.SNG_S0[4][7] INT:MUX.SNG_S0[3][6] INT:MUX.SNG_S0[3][7] INT:MUX.IMUX_LOGICIN[37][6] INT:MUX.IMUX_LOGICIN[37][7] INT:MUX.IMUX_LOGICIN[31][7] INT:MUX.IMUX_LOGICIN[31][6] INT:MUX.IMUX_LOGICIN[46][6] INT:MUX.IMUX_LOGICIN[46][7] INT:MUX.IMUX_LOGICIN[59][7] INT:MUX.IMUX_LOGICIN[59][6] INT:MUX.IMUX_SR[0][7]
B62 INT:MUX.QUAD_SS0[3][3] INT:MUX.QUAD_SW0[3][3] INT:MUX.QUAD_EE0[3][2] INT:MUX.QUAD_SE0[3][2] INT:MUX.DBL_WW0[3][3] INT:MUX.DBL_SW0[3][3] INT:MUX.DBL_SS0[3][3] INT:MUX.DBL_SE0[3][3] INT:MUX.SNG_S0[4][3] INT:MUX.SNG_W0[2][3] INT:MUX.SNG_S0[3][3] INT:MUX.SNG_E0[4][3] INT:MUX.IMUX_LOGICIN[37][2] INT:MUX.IMUX_LOGICIN[61][2] INT:MUX.IMUX_LOGICIN[9][0] INT:MUX.IMUX_LOGICIN[31][0] INT:MUX.IMUX_LOGICIN[46][2] INT:MUX.IMUX_LOGICIN[60][2] INT:MUX.IMUX_LOGICIN[19][0] INT:MUX.IMUX_LOGICIN[59][0] INT:MUX.IMUX_SR[0][6]
B61 INT:MUX.QUAD_SS0[3][0] INT:MUX.QUAD_SW0[3][0] INT:MUX.QUAD_EE0[3][4] INT:MUX.QUAD_SE0[3][4] INT:MUX.DBL_WW0[3][2] INT:MUX.DBL_SW0[3][2] INT:MUX.DBL_SS0[3][2] INT:MUX.DBL_SE0[3][2] INT:MUX.SNG_S0[4][2] INT:MUX.SNG_W0[2][2] INT:MUX.SNG_S0[3][2] INT:MUX.SNG_E0[4][2] INT:MUX.IMUX_LOGICIN[37][3] INT:MUX.IMUX_LOGICIN[61][3] INT:MUX.IMUX_LOGICIN[9][3] INT:MUX.IMUX_LOGICIN[31][3] INT:MUX.IMUX_LOGICIN[46][3] INT:MUX.IMUX_LOGICIN[60][3] INT:MUX.IMUX_LOGICIN[19][3] INT:MUX.IMUX_LOGICIN[59][3] INT:MUX.IMUX_SR[0][2]
B60 INT:MUX.QUAD_SS0[3][5] INT:MUX.QUAD_SW0[3][5] INT:MUX.QUAD_EE0[3][5] INT:MUX.QUAD_SE0[3][5] INT:MUX.DBL_WW0[3][1] INT:MUX.DBL_SW0[3][1] INT:MUX.DBL_SS0[3][1] INT:MUX.DBL_SE0[3][1] INT:MUX.SNG_S0[4][1] INT:MUX.SNG_W0[2][1] INT:MUX.SNG_S0[3][1] INT:MUX.SNG_E0[4][1] INT:MUX.IMUX_LOGICIN[37][0] INT:MUX.IMUX_LOGICIN[61][0] INT:MUX.IMUX_LOGICIN[9][1] INT:MUX.IMUX_LOGICIN[31][1] INT:MUX.IMUX_LOGICIN[46][0] INT:MUX.IMUX_LOGICIN[60][0] INT:MUX.IMUX_LOGICIN[19][1] INT:MUX.IMUX_LOGICIN[59][1] INT:MUX.IMUX_SR[0][3]
B59 INT:MUX.QUAD_SS0[3][2] INT:MUX.QUAD_SW0[3][2] INT:MUX.QUAD_EE0[3][1] INT:MUX.QUAD_SE0[3][1] INT:MUX.DBL_WW0[3][0] INT:MUX.DBL_SW0[3][0] INT:MUX.DBL_SS0[3][0] INT:MUX.DBL_SE0[3][0] INT:MUX.SNG_S0[4][0] INT:MUX.SNG_W0[2][0] INT:MUX.SNG_S0[3][0] INT:MUX.SNG_E0[4][0] INT:MUX.IMUX_LOGICIN[37][1] INT:MUX.IMUX_LOGICIN[61][1] INT:MUX.IMUX_LOGICIN[9][2] INT:MUX.IMUX_LOGICIN[31][2] INT:MUX.IMUX_LOGICIN[46][1] INT:MUX.IMUX_LOGICIN[60][1] INT:MUX.IMUX_LOGICIN[19][2] INT:MUX.IMUX_LOGICIN[59][2] INT:MUX.IMUX_SR[0][4]
B58 INT:MUX.QUAD_SS0[3][4] INT:MUX.QUAD_SW0[3][4] INT:MUX.QUAD_EE0[3][3] INT:MUX.QUAD_SE0[3][3] INT:MUX.DBL_WW0[3][5] INT:MUX.DBL_SW0[3][5] INT:MUX.DBL_SS0[3][5] INT:MUX.DBL_SE0[3][5] INT:MUX.SNG_S0[4][5] INT:MUX.SNG_W0[2][5] INT:MUX.SNG_S0[3][5] INT:MUX.SNG_E0[4][5] INT:MUX.IMUX_LOGICIN[37][4] INT:MUX.IMUX_LOGICIN[61][4] INT:MUX.IMUX_LOGICIN[9][4] INT:MUX.IMUX_LOGICIN[31][4] INT:MUX.IMUX_LOGICIN[46][4] INT:MUX.IMUX_LOGICIN[60][4] INT:MUX.IMUX_LOGICIN[19][4] INT:MUX.IMUX_LOGICIN[59][4] INT:MUX.IMUX_SR[0][1]
B57 INT:MUX.QUAD_SS0[3][1] INT:MUX.QUAD_SW0[3][1] INT:MUX.QUAD_EE0[3][0] INT:MUX.QUAD_SE0[3][0] INT:MUX.DBL_WW0[3][4] INT:MUX.DBL_SW0[3][4] INT:MUX.DBL_SS0[3][4] INT:MUX.DBL_SE0[3][4] INT:MUX.SNG_S0[4][4] INT:MUX.SNG_W0[2][4] INT:MUX.SNG_S0[3][4] INT:MUX.SNG_E0[4][4] INT:MUX.IMUX_LOGICIN[37][5] INT:MUX.IMUX_LOGICIN[61][5] INT:MUX.IMUX_LOGICIN[9][5] INT:MUX.IMUX_LOGICIN[31][5] INT:MUX.IMUX_LOGICIN[46][5] INT:MUX.IMUX_LOGICIN[60][5] INT:MUX.IMUX_LOGICIN[19][5] INT:MUX.IMUX_LOGICIN[59][5] INT:MUX.IMUX_SR[0][0]
B56 INT:MUX.QUAD_SW0[3][7] INT:MUX.QUAD_SW0[3][6] INT:MUX.QUAD_SE0[3][7] INT:MUX.QUAD_SE0[3][6] INT:MUX.DBL_SW0[3][7] INT:MUX.DBL_SW0[3][6] INT:MUX.DBL_SE0[3][7] INT:MUX.DBL_SE0[3][6] INT:MUX.SNG_W0[2][7] INT:MUX.SNG_W0[2][6] INT:MUX.SNG_E0[4][7] INT:MUX.SNG_E0[4][6] INT:MUX.IMUX_LOGICIN[61][6] INT:MUX.IMUX_LOGICIN[61][7] INT:MUX.IMUX_LOGICIN[9][7] INT:MUX.IMUX_LOGICIN[9][6] INT:MUX.IMUX_LOGICIN[60][6] INT:MUX.IMUX_LOGICIN[60][7] INT:MUX.IMUX_LOGICIN[19][7] INT:MUX.IMUX_LOGICIN[19][6] INT:MUX.IMUX_SR[0][5]
B55 INT:MUX.QUAD_WW0[3][7] INT:MUX.QUAD_WW0[3][6] INT:MUX.QUAD_NN0[3][7] INT:MUX.QUAD_NN0[3][6] INT:MUX.DBL_NW0[3][7] INT:MUX.DBL_NW0[3][6] INT:MUX.DBL_NE0[3][7] INT:MUX.DBL_NE0[3][6] INT:MUX.SNG_W0[4][7] INT:MUX.SNG_W0[4][6] INT:MUX.SNG_E0[2][7] INT:MUX.SNG_E0[2][6] INT:MUX.IMUX_LOGICIN[50][6] INT:MUX.IMUX_LOGICIN[50][7] INT:MUX.IMUX_LOGICIN[14][7] INT:MUX.IMUX_LOGICIN[14][6] INT:MUX.IMUX_LOGICIN[39][6] INT:MUX.IMUX_LOGICIN[39][7] INT:MUX.IMUX_LOGICIN[8][7] INT:MUX.IMUX_LOGICIN[8][6] INT:MUX.IMUX_SR[1][5]
B54 INT:MUX.QUAD_NW0[3][2] INT:MUX.QUAD_WW0[3][2] INT:MUX.QUAD_NE0[3][1] INT:MUX.QUAD_NN0[3][1] INT:MUX.DBL_NN0[3][5] INT:MUX.DBL_NW0[3][5] INT:MUX.DBL_EE0[3][5] INT:MUX.DBL_NE0[3][5] INT:MUX.SNG_N0[2][5] INT:MUX.SNG_W0[4][5] INT:MUX.SNG_N0[7][5] INT:MUX.SNG_E0[2][5] INT:MUX.IMUX_LOGICIN[50][0] INT:MUX.IMUX_LOGICIN[27][0] INT:MUX.IMUX_LOGICIN[28][3] INT:MUX.IMUX_LOGICIN[14][3] INT:MUX.IMUX_LOGICIN[39][0] INT:MUX.IMUX_LOGICIN[2][0] INT:MUX.IMUX_LOGICIN[63][2] INT:MUX.IMUX_LOGICIN[8][2] INT:MUX.IMUX_SR[1][4]
B53 INT:MUX.QUAD_NW0[3][1] INT:MUX.QUAD_WW0[3][1] INT:MUX.QUAD_NE0[3][2] INT:MUX.QUAD_NN0[3][2] INT:MUX.DBL_NN0[3][4] INT:MUX.DBL_NW0[3][4] INT:MUX.DBL_EE0[3][4] INT:MUX.DBL_NE0[3][4] INT:MUX.SNG_N0[2][4] INT:MUX.SNG_W0[4][4] INT:MUX.SNG_N0[7][4] INT:MUX.SNG_E0[2][4] INT:MUX.IMUX_LOGICIN[50][3] INT:MUX.IMUX_LOGICIN[27][3] INT:MUX.IMUX_LOGICIN[28][2] INT:MUX.IMUX_LOGICIN[14][2] INT:MUX.IMUX_LOGICIN[39][3] INT:MUX.IMUX_LOGICIN[2][3] INT:MUX.IMUX_LOGICIN[63][3] INT:MUX.IMUX_LOGICIN[8][3] INT:MUX.IMUX_SR[1][1]
B52 INT:MUX.QUAD_NW0[3][0] INT:MUX.QUAD_WW0[3][0] INT:MUX.QUAD_NE0[3][0] INT:MUX.QUAD_NN0[3][0] INT:MUX.DBL_NN0[3][0] INT:MUX.DBL_NW0[3][0] INT:MUX.DBL_EE0[3][0] INT:MUX.DBL_NE0[3][0] INT:MUX.SNG_N0[2][0] INT:MUX.SNG_W0[4][0] INT:MUX.SNG_N0[7][0] INT:MUX.SNG_E0[2][0] INT:MUX.IMUX_LOGICIN[50][1] INT:MUX.IMUX_LOGICIN[27][1] INT:MUX.IMUX_LOGICIN[28][0] INT:MUX.IMUX_LOGICIN[14][0] INT:MUX.IMUX_LOGICIN[39][1] INT:MUX.IMUX_LOGICIN[2][1] INT:MUX.IMUX_LOGICIN[63][0] INT:MUX.IMUX_LOGICIN[8][0] INT:MUX.IMUX_SR[1][0]
B51 INT:MUX.QUAD_NW0[3][5] INT:MUX.QUAD_WW0[3][5] INT:MUX.QUAD_NE0[3][5] INT:MUX.QUAD_NN0[3][5] INT:MUX.DBL_NN0[3][1] INT:MUX.DBL_NW0[3][1] INT:MUX.DBL_EE0[3][1] INT:MUX.DBL_NE0[3][1] INT:MUX.SNG_N0[2][1] INT:MUX.SNG_W0[4][1] INT:MUX.SNG_N0[7][1] INT:MUX.SNG_E0[2][1] INT:MUX.IMUX_LOGICIN[50][2] INT:MUX.IMUX_LOGICIN[27][2] INT:MUX.IMUX_LOGICIN[28][1] INT:MUX.IMUX_LOGICIN[14][1] INT:MUX.IMUX_LOGICIN[39][2] INT:MUX.IMUX_LOGICIN[2][2] INT:MUX.IMUX_LOGICIN[63][1] INT:MUX.IMUX_LOGICIN[8][1] INT:MUX.IMUX_SR[1][3]
B50 INT:MUX.QUAD_NW0[3][3] INT:MUX.QUAD_WW0[3][3] INT:MUX.QUAD_NE0[3][3] INT:MUX.QUAD_NN0[3][3] INT:MUX.DBL_NN0[3][3] INT:MUX.DBL_NW0[3][3] INT:MUX.DBL_EE0[3][3] INT:MUX.DBL_NE0[3][3] INT:MUX.SNG_N0[2][3] INT:MUX.SNG_W0[4][3] INT:MUX.SNG_N0[7][3] INT:MUX.SNG_E0[2][3] INT:MUX.IMUX_LOGICIN[50][4] INT:MUX.IMUX_LOGICIN[27][4] INT:MUX.IMUX_LOGICIN[28][4] INT:MUX.IMUX_LOGICIN[14][4] INT:MUX.IMUX_LOGICIN[39][4] INT:MUX.IMUX_LOGICIN[2][4] INT:MUX.IMUX_LOGICIN[63][4] INT:MUX.IMUX_LOGICIN[8][4] INT:MUX.IMUX_SR[1][2]
B49 INT:MUX.QUAD_NW0[3][4] INT:MUX.QUAD_WW0[3][4] INT:MUX.QUAD_NE0[3][4] INT:MUX.QUAD_NN0[3][4] INT:MUX.DBL_NN0[3][2] INT:MUX.DBL_NW0[3][2] INT:MUX.DBL_EE0[3][2] INT:MUX.DBL_NE0[3][2] INT:MUX.SNG_N0[2][2] INT:MUX.SNG_W0[4][2] INT:MUX.SNG_N0[7][2] INT:MUX.SNG_E0[2][2] INT:MUX.IMUX_LOGICIN[50][5] INT:MUX.IMUX_LOGICIN[27][5] INT:MUX.IMUX_LOGICIN[28][5] INT:MUX.IMUX_LOGICIN[14][5] INT:MUX.IMUX_LOGICIN[39][5] INT:MUX.IMUX_LOGICIN[2][5] INT:MUX.IMUX_LOGICIN[63][5] INT:MUX.IMUX_LOGICIN[8][5] INT:MUX.IMUX_SR[1][6]
B48 INT:MUX.QUAD_NW0[3][6] INT:MUX.QUAD_NW0[3][7] INT:MUX.QUAD_NE0[3][6] INT:MUX.QUAD_NE0[3][7] INT:MUX.DBL_NN0[3][6] INT:MUX.DBL_NN0[3][7] INT:MUX.DBL_EE0[3][6] INT:MUX.DBL_EE0[3][7] INT:MUX.SNG_N0[2][6] INT:MUX.SNG_N0[2][7] INT:MUX.SNG_N0[7][6] INT:MUX.SNG_N0[7][7] INT:MUX.IMUX_LOGICIN[27][6] INT:MUX.IMUX_LOGICIN[27][7] INT:MUX.IMUX_LOGICIN[28][7] INT:MUX.IMUX_LOGICIN[28][6] INT:MUX.IMUX_LOGICIN[2][6] INT:MUX.IMUX_LOGICIN[2][7] INT:MUX.IMUX_LOGICIN[63][7] INT:MUX.IMUX_LOGICIN[63][6] INT:MUX.IMUX_SR[1][7]
B47 INT:MUX.QUAD_SS0[2][6] INT:MUX.QUAD_SS0[2][7] INT:MUX.QUAD_EE0[2][6] INT:MUX.QUAD_EE0[2][7] INT:MUX.DBL_WW0[2][6] INT:MUX.DBL_WW0[2][7] INT:MUX.DBL_SS0[2][6] INT:MUX.DBL_SS0[2][7] INT:MUX.SNG_S0[7][6] INT:MUX.SNG_S0[7][7] INT:MUX.SNG_S0[2][6] INT:MUX.SNG_S0[2][7] INT:MUX.IMUX_LOGICIN[53][6] INT:MUX.IMUX_LOGICIN[53][7] INT:MUX.IMUX_LOGICIN[32][7] INT:MUX.IMUX_LOGICIN[32][6] INT:MUX.IMUX_LOGICIN[21][6] INT:MUX.IMUX_LOGICIN[21][7] INT:MUX.IMUX_LOGICIN[58][7] INT:MUX.IMUX_LOGICIN[58][6] -
B46 INT:MUX.QUAD_SS0[2][3] INT:MUX.QUAD_SW0[2][3] INT:MUX.QUAD_EE0[2][2] INT:MUX.QUAD_SE0[2][2] INT:MUX.DBL_WW0[2][3] INT:MUX.DBL_SW0[2][3] INT:MUX.DBL_SS0[2][3] INT:MUX.DBL_SE0[2][3] INT:MUX.SNG_S0[7][3] INT:MUX.SNG_W0[1][3] INT:MUX.SNG_S0[2][3] INT:MUX.SNG_E0[7][3] INT:MUX.IMUX_LOGICIN[53][2] INT:MUX.IMUX_LOGICIN[1][2] INT:MUX.IMUX_LOGICIN[10][0] INT:MUX.IMUX_LOGICIN[32][0] INT:MUX.IMUX_LOGICIN[21][2] INT:MUX.IMUX_LOGICIN[22][2] INT:MUX.IMUX_LOGICIN[18][0] INT:MUX.IMUX_LOGICIN[58][0] -
B45 INT:MUX.QUAD_SS0[2][0] INT:MUX.QUAD_SW0[2][0] INT:MUX.QUAD_EE0[2][4] INT:MUX.QUAD_SE0[2][4] INT:MUX.DBL_WW0[2][2] INT:MUX.DBL_SW0[2][2] INT:MUX.DBL_SS0[2][2] INT:MUX.DBL_SE0[2][2] INT:MUX.SNG_S0[7][2] INT:MUX.SNG_W0[1][2] INT:MUX.SNG_S0[2][2] INT:MUX.SNG_E0[7][2] INT:MUX.IMUX_LOGICIN[53][3] INT:MUX.IMUX_LOGICIN[1][3] INT:MUX.IMUX_LOGICIN[10][3] INT:MUX.IMUX_LOGICIN[32][3] INT:MUX.IMUX_LOGICIN[21][3] INT:MUX.IMUX_LOGICIN[22][3] INT:MUX.IMUX_LOGICIN[18][3] INT:MUX.IMUX_LOGICIN[58][3] -
B44 INT:MUX.QUAD_SS0[2][5] INT:MUX.QUAD_SW0[2][5] INT:MUX.QUAD_EE0[2][5] INT:MUX.QUAD_SE0[2][5] INT:MUX.DBL_WW0[2][1] INT:MUX.DBL_SW0[2][1] INT:MUX.DBL_SS0[2][1] INT:MUX.DBL_SE0[2][1] INT:MUX.SNG_S0[7][1] INT:MUX.SNG_W0[1][1] INT:MUX.SNG_S0[2][1] INT:MUX.SNG_E0[7][1] INT:MUX.IMUX_LOGICIN[53][0] INT:MUX.IMUX_LOGICIN[1][0] INT:MUX.IMUX_LOGICIN[10][1] INT:MUX.IMUX_LOGICIN[32][1] INT:MUX.IMUX_LOGICIN[21][0] INT:MUX.IMUX_LOGICIN[22][0] INT:MUX.IMUX_LOGICIN[18][1] INT:MUX.IMUX_LOGICIN[58][1] -
B43 INT:MUX.QUAD_SS0[2][2] INT:MUX.QUAD_SW0[2][2] INT:MUX.QUAD_EE0[2][1] INT:MUX.QUAD_SE0[2][1] INT:MUX.DBL_WW0[2][0] INT:MUX.DBL_SW0[2][0] INT:MUX.DBL_SS0[2][0] INT:MUX.DBL_SE0[2][0] INT:MUX.SNG_S0[7][0] INT:MUX.SNG_W0[1][0] INT:MUX.SNG_S0[2][0] INT:MUX.SNG_E0[7][0] INT:MUX.IMUX_LOGICIN[53][1] INT:MUX.IMUX_LOGICIN[1][1] INT:MUX.IMUX_LOGICIN[10][2] INT:MUX.IMUX_LOGICIN[32][2] INT:MUX.IMUX_LOGICIN[21][1] INT:MUX.IMUX_LOGICIN[22][1] INT:MUX.IMUX_LOGICIN[18][2] INT:MUX.IMUX_LOGICIN[58][2] -
B42 INT:MUX.QUAD_SS0[2][4] INT:MUX.QUAD_SW0[2][4] INT:MUX.QUAD_EE0[2][3] INT:MUX.QUAD_SE0[2][3] INT:MUX.DBL_WW0[2][5] INT:MUX.DBL_SW0[2][5] INT:MUX.DBL_SS0[2][5] INT:MUX.DBL_SE0[2][5] INT:MUX.SNG_S0[7][5] INT:MUX.SNG_W0[1][5] INT:MUX.SNG_S0[2][5] INT:MUX.SNG_E0[7][5] INT:MUX.IMUX_LOGICIN[53][4] INT:MUX.IMUX_LOGICIN[1][4] INT:MUX.IMUX_LOGICIN[10][4] INT:MUX.IMUX_LOGICIN[32][4] INT:MUX.IMUX_LOGICIN[21][4] INT:MUX.IMUX_LOGICIN[22][4] INT:MUX.IMUX_LOGICIN[18][4] INT:MUX.IMUX_LOGICIN[58][4] -
B41 INT:MUX.QUAD_SS0[2][1] INT:MUX.QUAD_SW0[2][1] INT:MUX.QUAD_EE0[2][0] INT:MUX.QUAD_SE0[2][0] INT:MUX.DBL_WW0[2][4] INT:MUX.DBL_SW0[2][4] INT:MUX.DBL_SS0[2][4] INT:MUX.DBL_SE0[2][4] INT:MUX.SNG_S0[7][4] INT:MUX.SNG_W0[1][4] INT:MUX.SNG_S0[2][4] INT:MUX.SNG_E0[7][4] INT:MUX.IMUX_LOGICIN[53][5] INT:MUX.IMUX_LOGICIN[1][5] INT:MUX.IMUX_LOGICIN[10][5] INT:MUX.IMUX_LOGICIN[32][5] INT:MUX.IMUX_LOGICIN[21][5] INT:MUX.IMUX_LOGICIN[22][5] INT:MUX.IMUX_LOGICIN[18][5] INT:MUX.IMUX_LOGICIN[58][5] -
B40 INT:MUX.QUAD_SW0[2][7] INT:MUX.QUAD_SW0[2][6] INT:MUX.QUAD_SE0[2][7] INT:MUX.QUAD_SE0[2][6] INT:MUX.DBL_SW0[2][7] INT:MUX.DBL_SW0[2][6] INT:MUX.DBL_SE0[2][7] INT:MUX.DBL_SE0[2][6] INT:MUX.SNG_W0[1][7] INT:MUX.SNG_W0[1][6] INT:MUX.SNG_E0[7][7] INT:MUX.SNG_E0[7][6] INT:MUX.IMUX_LOGICIN[1][6] INT:MUX.IMUX_LOGICIN[1][7] INT:MUX.IMUX_LOGICIN[10][7] INT:MUX.IMUX_LOGICIN[10][6] INT:MUX.IMUX_LOGICIN[22][6] INT:MUX.IMUX_LOGICIN[22][7] INT:MUX.IMUX_LOGICIN[18][7] INT:MUX.IMUX_LOGICIN[18][6] -
B39 INT:MUX.QUAD_WW0[2][7] INT:MUX.QUAD_WW0[2][6] INT:MUX.QUAD_NN0[2][7] INT:MUX.QUAD_NN0[2][6] INT:MUX.DBL_NW0[2][7] INT:MUX.DBL_NW0[2][6] INT:MUX.DBL_NE0[2][7] INT:MUX.DBL_NE0[2][6] INT:MUX.SNG_W0[7][7] INT:MUX.SNG_W0[7][6] INT:MUX.SNG_E0[1][7] INT:MUX.SNG_E0[1][6] INT:MUX.IMUX_LOGICIN[49][6] INT:MUX.IMUX_LOGICIN[49][7] INT:MUX.IMUX_LOGICIN[52][7] INT:MUX.IMUX_LOGICIN[52][6] INT:MUX.IMUX_LOGICIN[40][6] INT:MUX.IMUX_LOGICIN[40][7] INT:MUX.IMUX_LOGICIN[29][7] INT:MUX.IMUX_LOGICIN[29][6] INT:MUX.IMUX_CLK[0][6]
B38 INT:MUX.QUAD_NW0[2][2] INT:MUX.QUAD_WW0[2][2] INT:MUX.QUAD_NE0[2][1] INT:MUX.QUAD_NN0[2][1] INT:MUX.DBL_NN0[2][5] INT:MUX.DBL_NW0[2][5] INT:MUX.DBL_EE0[2][5] INT:MUX.DBL_NE0[2][5] INT:MUX.SNG_N0[1][5] INT:MUX.SNG_W0[7][5] INT:MUX.SNG_N0[6][5] INT:MUX.SNG_E0[1][5] INT:MUX.IMUX_LOGICIN[49][0] INT:MUX.IMUX_LOGICIN[26][0] INT:MUX.IMUX_LOGICIN[55][2] INT:MUX.IMUX_LOGICIN[52][2] INT:MUX.IMUX_LOGICIN[40][0] INT:MUX.IMUX_LOGICIN[3][0] INT:MUX.IMUX_LOGICIN[51][2] INT:MUX.IMUX_LOGICIN[29][2] INT:MUX.IMUX_CLK[0][7]
B37 INT:MUX.QUAD_NW0[2][1] INT:MUX.QUAD_WW0[2][1] INT:MUX.QUAD_NE0[2][2] INT:MUX.QUAD_NN0[2][2] INT:MUX.DBL_NN0[2][4] INT:MUX.DBL_NW0[2][4] INT:MUX.DBL_EE0[2][4] INT:MUX.DBL_NE0[2][4] INT:MUX.SNG_N0[1][4] INT:MUX.SNG_W0[7][4] INT:MUX.SNG_N0[6][4] INT:MUX.SNG_E0[1][4] INT:MUX.IMUX_LOGICIN[49][3] INT:MUX.IMUX_LOGICIN[26][3] INT:MUX.IMUX_LOGICIN[55][3] INT:MUX.IMUX_LOGICIN[52][3] INT:MUX.IMUX_LOGICIN[40][3] INT:MUX.IMUX_LOGICIN[3][3] INT:MUX.IMUX_LOGICIN[51][3] INT:MUX.IMUX_LOGICIN[29][3] INT:MUX.IMUX_CLK[0][2]
B36 INT:MUX.QUAD_NW0[2][0] INT:MUX.QUAD_WW0[2][0] INT:MUX.QUAD_NE0[2][0] INT:MUX.QUAD_NN0[2][0] INT:MUX.DBL_NN0[2][0] INT:MUX.DBL_NW0[2][0] INT:MUX.DBL_EE0[2][0] INT:MUX.DBL_NE0[2][0] INT:MUX.SNG_N0[1][0] INT:MUX.SNG_W0[7][0] INT:MUX.SNG_N0[6][0] INT:MUX.SNG_E0[1][0] INT:MUX.IMUX_LOGICIN[49][1] INT:MUX.IMUX_LOGICIN[26][1] INT:MUX.IMUX_LOGICIN[55][0] INT:MUX.IMUX_LOGICIN[52][0] INT:MUX.IMUX_LOGICIN[40][1] INT:MUX.IMUX_LOGICIN[3][1] INT:MUX.IMUX_LOGICIN[51][0] INT:MUX.IMUX_LOGICIN[29][0] INT:MUX.IMUX_CLK[0][3]
B35 INT:MUX.QUAD_NW0[2][5] INT:MUX.QUAD_WW0[2][5] INT:MUX.QUAD_NE0[2][5] INT:MUX.QUAD_NN0[2][5] INT:MUX.DBL_NN0[2][1] INT:MUX.DBL_NW0[2][1] INT:MUX.DBL_EE0[2][1] INT:MUX.DBL_NE0[2][1] INT:MUX.SNG_N0[1][1] INT:MUX.SNG_W0[7][1] INT:MUX.SNG_N0[6][1] INT:MUX.SNG_E0[1][1] INT:MUX.IMUX_LOGICIN[49][2] INT:MUX.IMUX_LOGICIN[26][2] INT:MUX.IMUX_LOGICIN[55][1] INT:MUX.IMUX_LOGICIN[52][1] INT:MUX.IMUX_LOGICIN[40][2] INT:MUX.IMUX_LOGICIN[3][2] INT:MUX.IMUX_LOGICIN[51][1] INT:MUX.IMUX_LOGICIN[29][1] INT:MUX.IMUX_CLK[0][4]
B34 INT:MUX.QUAD_NW0[2][3] INT:MUX.QUAD_WW0[2][3] INT:MUX.QUAD_NE0[2][3] INT:MUX.QUAD_NN0[2][3] INT:MUX.DBL_NN0[2][3] INT:MUX.DBL_NW0[2][3] INT:MUX.DBL_EE0[2][3] INT:MUX.DBL_NE0[2][3] INT:MUX.SNG_N0[1][3] INT:MUX.SNG_W0[7][3] INT:MUX.SNG_N0[6][3] INT:MUX.SNG_E0[1][3] INT:MUX.IMUX_LOGICIN[49][4] INT:MUX.IMUX_LOGICIN[26][4] INT:MUX.IMUX_LOGICIN[55][4] INT:MUX.IMUX_LOGICIN[52][4] INT:MUX.IMUX_LOGICIN[40][4] INT:MUX.IMUX_LOGICIN[3][4] INT:MUX.IMUX_LOGICIN[51][4] INT:MUX.IMUX_LOGICIN[29][4] INT:MUX.IMUX_CLK[0][1]
B33 INT:MUX.QUAD_NW0[2][4] INT:MUX.QUAD_WW0[2][4] INT:MUX.QUAD_NE0[2][4] INT:MUX.QUAD_NN0[2][4] INT:MUX.DBL_NN0[2][2] INT:MUX.DBL_NW0[2][2] INT:MUX.DBL_EE0[2][2] INT:MUX.DBL_NE0[2][2] INT:MUX.SNG_N0[1][2] INT:MUX.SNG_W0[7][2] INT:MUX.SNG_N0[6][2] INT:MUX.SNG_E0[1][2] INT:MUX.IMUX_LOGICIN[49][5] INT:MUX.IMUX_LOGICIN[26][5] INT:MUX.IMUX_LOGICIN[55][5] INT:MUX.IMUX_LOGICIN[52][5] INT:MUX.IMUX_LOGICIN[40][5] INT:MUX.IMUX_LOGICIN[3][5] INT:MUX.IMUX_LOGICIN[51][5] INT:MUX.IMUX_LOGICIN[29][5] INT:MUX.IMUX_CLK[0][0]
B32 INT:MUX.QUAD_NW0[2][6] INT:MUX.QUAD_NW0[2][7] INT:MUX.QUAD_NE0[2][6] INT:MUX.QUAD_NE0[2][7] INT:MUX.DBL_NN0[2][6] INT:MUX.DBL_NN0[2][7] INT:MUX.DBL_EE0[2][6] INT:MUX.DBL_EE0[2][7] INT:MUX.SNG_N0[1][6] INT:MUX.SNG_N0[1][7] INT:MUX.SNG_N0[6][6] INT:MUX.SNG_N0[6][7] INT:MUX.IMUX_LOGICIN[26][6] INT:MUX.IMUX_LOGICIN[26][7] INT:MUX.IMUX_LOGICIN[55][7] INT:MUX.IMUX_LOGICIN[55][6] INT:MUX.IMUX_LOGICIN[3][6] INT:MUX.IMUX_LOGICIN[3][7] INT:MUX.IMUX_LOGICIN[51][7] INT:MUX.IMUX_LOGICIN[51][6] INT:MUX.IMUX_CLK[0][5]
B31 INT:MUX.QUAD_SS0[1][6] INT:MUX.QUAD_SS0[1][7] INT:MUX.QUAD_EE0[1][6] INT:MUX.QUAD_EE0[1][7] INT:MUX.DBL_WW0[1][6] INT:MUX.DBL_WW0[1][7] INT:MUX.DBL_SS0[1][6] INT:MUX.DBL_SS0[1][7] INT:MUX.SNG_S0[6][6] INT:MUX.SNG_S0[6][7] INT:MUX.SNG_S0[1][6] INT:MUX.SNG_S0[1][7] INT:MUX.IMUX_LOGICIN[0][6] INT:MUX.IMUX_LOGICIN[0][7] INT:MUX.IMUX_LOGICIN[33][7] INT:MUX.IMUX_LOGICIN[33][6] INT:MUX.IMUX_LOGICIN[43][6] INT:MUX.IMUX_LOGICIN[43][7] INT:MUX.IMUX_LOGICIN[57][7] INT:MUX.IMUX_LOGICIN[57][6] INT:MUX.IMUX_CLK[1][5]
B30 INT:MUX.QUAD_SS0[1][3] INT:MUX.QUAD_SW0[1][3] INT:MUX.QUAD_EE0[1][2] INT:MUX.QUAD_SE0[1][2] INT:MUX.DBL_WW0[1][3] INT:MUX.DBL_SW0[1][3] INT:MUX.DBL_SS0[1][3] INT:MUX.DBL_SE0[1][3] INT:MUX.SNG_S0[6][3] INT:MUX.SNG_W0[0][3] INT:MUX.SNG_S0[1][3] INT:MUX.SNG_E0[6][3] INT:MUX.IMUX_LOGICIN[0][2] INT:MUX.IMUX_LOGICIN[20][2] INT:MUX.IMUX_LOGICIN[11][0] INT:MUX.IMUX_LOGICIN[33][0] INT:MUX.IMUX_LOGICIN[43][2] INT:MUX.IMUX_LOGICIN[23][2] INT:MUX.IMUX_LOGICIN[17][0] INT:MUX.IMUX_LOGICIN[57][0] INT:MUX.IMUX_CLK[1][4]
B29 INT:MUX.QUAD_SS0[1][0] INT:MUX.QUAD_SW0[1][0] INT:MUX.QUAD_EE0[1][4] INT:MUX.QUAD_SE0[1][4] INT:MUX.DBL_WW0[1][2] INT:MUX.DBL_SW0[1][2] INT:MUX.DBL_SS0[1][2] INT:MUX.DBL_SE0[1][2] INT:MUX.SNG_S0[6][2] INT:MUX.SNG_W0[0][2] INT:MUX.SNG_S0[1][2] INT:MUX.SNG_E0[6][2] INT:MUX.IMUX_LOGICIN[0][3] INT:MUX.IMUX_LOGICIN[20][3] INT:MUX.IMUX_LOGICIN[11][3] INT:MUX.IMUX_LOGICIN[33][3] INT:MUX.IMUX_LOGICIN[43][3] INT:MUX.IMUX_LOGICIN[23][3] INT:MUX.IMUX_LOGICIN[17][3] INT:MUX.IMUX_LOGICIN[57][3] INT:MUX.IMUX_CLK[1][1]
B28 INT:MUX.QUAD_SS0[1][5] INT:MUX.QUAD_SW0[1][5] INT:MUX.QUAD_EE0[1][5] INT:MUX.QUAD_SE0[1][5] INT:MUX.DBL_WW0[1][1] INT:MUX.DBL_SW0[1][1] INT:MUX.DBL_SS0[1][1] INT:MUX.DBL_SE0[1][1] INT:MUX.SNG_S0[6][1] INT:MUX.SNG_W0[0][1] INT:MUX.SNG_S0[1][1] INT:MUX.SNG_E0[6][1] INT:MUX.IMUX_LOGICIN[0][0] INT:MUX.IMUX_LOGICIN[20][0] INT:MUX.IMUX_LOGICIN[11][1] INT:MUX.IMUX_LOGICIN[33][1] INT:MUX.IMUX_LOGICIN[43][0] INT:MUX.IMUX_LOGICIN[23][0] INT:MUX.IMUX_LOGICIN[17][1] INT:MUX.IMUX_LOGICIN[57][1] INT:MUX.IMUX_CLK[1][0]
B27 INT:MUX.QUAD_SS0[1][2] INT:MUX.QUAD_SW0[1][2] INT:MUX.QUAD_EE0[1][1] INT:MUX.QUAD_SE0[1][1] INT:MUX.DBL_WW0[1][0] INT:MUX.DBL_SW0[1][0] INT:MUX.DBL_SS0[1][0] INT:MUX.DBL_SE0[1][0] INT:MUX.SNG_S0[6][0] INT:MUX.SNG_W0[0][0] INT:MUX.SNG_S0[1][0] INT:MUX.SNG_E0[6][0] INT:MUX.IMUX_LOGICIN[0][1] INT:MUX.IMUX_LOGICIN[20][1] INT:MUX.IMUX_LOGICIN[11][2] INT:MUX.IMUX_LOGICIN[33][2] INT:MUX.IMUX_LOGICIN[43][1] INT:MUX.IMUX_LOGICIN[23][1] INT:MUX.IMUX_LOGICIN[17][2] INT:MUX.IMUX_LOGICIN[57][2] INT:MUX.IMUX_CLK[1][3]
B26 INT:MUX.QUAD_SS0[1][4] INT:MUX.QUAD_SW0[1][4] INT:MUX.QUAD_EE0[1][3] INT:MUX.QUAD_SE0[1][3] INT:MUX.DBL_WW0[1][5] INT:MUX.DBL_SW0[1][5] INT:MUX.DBL_SS0[1][5] INT:MUX.DBL_SE0[1][5] INT:MUX.SNG_S0[6][5] INT:MUX.SNG_W0[0][5] INT:MUX.SNG_S0[1][5] INT:MUX.SNG_E0[6][5] INT:MUX.IMUX_LOGICIN[0][4] INT:MUX.IMUX_LOGICIN[20][4] INT:MUX.IMUX_LOGICIN[11][4] INT:MUX.IMUX_LOGICIN[33][4] INT:MUX.IMUX_LOGICIN[43][4] INT:MUX.IMUX_LOGICIN[23][4] INT:MUX.IMUX_LOGICIN[17][4] INT:MUX.IMUX_LOGICIN[57][4] INT:MUX.IMUX_CLK[1][2]
B25 INT:MUX.QUAD_SS0[1][1] INT:MUX.QUAD_SW0[1][1] INT:MUX.QUAD_EE0[1][0] INT:MUX.QUAD_SE0[1][0] INT:MUX.DBL_WW0[1][4] INT:MUX.DBL_SW0[1][4] INT:MUX.DBL_SS0[1][4] INT:MUX.DBL_SE0[1][4] INT:MUX.SNG_S0[6][4] INT:MUX.SNG_W0[0][4] INT:MUX.SNG_S0[1][4] INT:MUX.SNG_E0[6][4] INT:MUX.IMUX_LOGICIN[0][5] INT:MUX.IMUX_LOGICIN[20][5] INT:MUX.IMUX_LOGICIN[11][5] INT:MUX.IMUX_LOGICIN[33][5] INT:MUX.IMUX_LOGICIN[43][5] INT:MUX.IMUX_LOGICIN[23][5] INT:MUX.IMUX_LOGICIN[17][5] INT:MUX.IMUX_LOGICIN[57][5] INT:MUX.IMUX_CLK[1][7]
B24 INT:MUX.QUAD_SW0[1][7] INT:MUX.QUAD_SW0[1][6] INT:MUX.QUAD_SE0[1][7] INT:MUX.QUAD_SE0[1][6] INT:MUX.DBL_SW0[1][7] INT:MUX.DBL_SW0[1][6] INT:MUX.DBL_SE0[1][7] INT:MUX.DBL_SE0[1][6] INT:MUX.SNG_W0[0][7] INT:MUX.SNG_W0[0][6] INT:MUX.SNG_E0[6][7] INT:MUX.SNG_E0[6][6] INT:MUX.IMUX_LOGICIN[20][6] INT:MUX.IMUX_LOGICIN[20][7] INT:MUX.IMUX_LOGICIN[11][7] INT:MUX.IMUX_LOGICIN[11][6] INT:MUX.IMUX_LOGICIN[23][6] INT:MUX.IMUX_LOGICIN[23][7] INT:MUX.IMUX_LOGICIN[17][7] INT:MUX.IMUX_LOGICIN[17][6] INT:MUX.IMUX_CLK[1][6]
B23 INT:MUX.QUAD_WW0[1][7] INT:MUX.QUAD_WW0[1][6] INT:MUX.QUAD_NN0[1][7] INT:MUX.QUAD_NN0[1][6] INT:MUX.DBL_NW0[1][7] INT:MUX.DBL_NW0[1][6] INT:MUX.DBL_NE0[1][7] INT:MUX.DBL_NE0[1][6] INT:MUX.SNG_W0[6][7] INT:MUX.SNG_W0[6][6] INT:MUX.SNG_E0[0][7] INT:MUX.SNG_E0[0][6] INT:MUX.IMUX_LOGICIN[48][6] INT:MUX.IMUX_LOGICIN[48][7] INT:MUX.IMUX_LOGICIN[54][7] INT:MUX.IMUX_LOGICIN[54][6] INT:MUX.IMUX_LOGICIN[41][6] INT:MUX.IMUX_LOGICIN[41][7] INT:MUX.IMUX_LOGICIN[30][7] INT:MUX.IMUX_LOGICIN[30][6] -
B22 INT:MUX.QUAD_NW0[1][2] INT:MUX.QUAD_WW0[1][2] INT:MUX.QUAD_NE0[1][1] INT:MUX.QUAD_NN0[1][1] INT:MUX.DBL_NN0[1][5] INT:MUX.DBL_NW0[1][5] INT:MUX.DBL_EE0[1][5] INT:MUX.DBL_NE0[1][5] INT:MUX.SNG_N0[0][5] INT:MUX.SNG_W0[6][5] INT:MUX.SNG_N0[5][5] INT:MUX.SNG_E0[0][5] INT:MUX.IMUX_LOGICIN[48][0] INT:MUX.IMUX_LOGICIN[25][0] INT:MUX.IMUX_LOGICIN[13][2] INT:MUX.IMUX_LOGICIN[54][2] INT:MUX.IMUX_LOGICIN[41][0] INT:MUX.IMUX_LOGICIN[4][0] INT:MUX.IMUX_LOGICIN[44][2] INT:MUX.IMUX_LOGICIN[30][2] -
B21 INT:MUX.QUAD_NW0[1][1] INT:MUX.QUAD_WW0[1][1] INT:MUX.QUAD_NE0[1][2] INT:MUX.QUAD_NN0[1][2] INT:MUX.DBL_NN0[1][4] INT:MUX.DBL_NW0[1][4] INT:MUX.DBL_EE0[1][4] INT:MUX.DBL_NE0[1][4] INT:MUX.SNG_N0[0][4] INT:MUX.SNG_W0[6][4] INT:MUX.SNG_N0[5][4] INT:MUX.SNG_E0[0][4] INT:MUX.IMUX_LOGICIN[48][3] INT:MUX.IMUX_LOGICIN[25][3] INT:MUX.IMUX_LOGICIN[13][3] INT:MUX.IMUX_LOGICIN[54][3] INT:MUX.IMUX_LOGICIN[41][3] INT:MUX.IMUX_LOGICIN[4][3] INT:MUX.IMUX_LOGICIN[44][3] INT:MUX.IMUX_LOGICIN[30][3] -
B20 INT:MUX.QUAD_NW0[1][0] INT:MUX.QUAD_WW0[1][0] INT:MUX.QUAD_NE0[1][0] INT:MUX.QUAD_NN0[1][0] INT:MUX.DBL_NN0[1][0] INT:MUX.DBL_NW0[1][0] INT:MUX.DBL_EE0[1][0] INT:MUX.DBL_NE0[1][0] INT:MUX.SNG_N0[0][0] INT:MUX.SNG_W0[6][0] INT:MUX.SNG_N0[5][0] INT:MUX.SNG_E0[0][0] INT:MUX.IMUX_LOGICIN[48][1] INT:MUX.IMUX_LOGICIN[25][1] INT:MUX.IMUX_LOGICIN[13][0] INT:MUX.IMUX_LOGICIN[54][0] INT:MUX.IMUX_LOGICIN[41][1] INT:MUX.IMUX_LOGICIN[4][1] INT:MUX.IMUX_LOGICIN[44][0] INT:MUX.IMUX_LOGICIN[30][0] -
B19 INT:MUX.QUAD_NW0[1][5] INT:MUX.QUAD_WW0[1][5] INT:MUX.QUAD_NE0[1][5] INT:MUX.QUAD_NN0[1][5] INT:MUX.DBL_NN0[1][1] INT:MUX.DBL_NW0[1][1] INT:MUX.DBL_EE0[1][1] INT:MUX.DBL_NE0[1][1] INT:MUX.SNG_N0[0][1] INT:MUX.SNG_W0[6][1] INT:MUX.SNG_N0[5][1] INT:MUX.SNG_E0[0][1] INT:MUX.IMUX_LOGICIN[48][2] INT:MUX.IMUX_LOGICIN[25][2] INT:MUX.IMUX_LOGICIN[13][1] INT:MUX.IMUX_LOGICIN[54][1] INT:MUX.IMUX_LOGICIN[41][2] INT:MUX.IMUX_LOGICIN[4][2] INT:MUX.IMUX_LOGICIN[44][1] INT:MUX.IMUX_LOGICIN[30][1] -
B18 INT:MUX.QUAD_NW0[1][3] INT:MUX.QUAD_WW0[1][3] INT:MUX.QUAD_NE0[1][3] INT:MUX.QUAD_NN0[1][3] INT:MUX.DBL_NN0[1][3] INT:MUX.DBL_NW0[1][3] INT:MUX.DBL_EE0[1][3] INT:MUX.DBL_NE0[1][3] INT:MUX.SNG_N0[0][3] INT:MUX.SNG_W0[6][3] INT:MUX.SNG_N0[5][3] INT:MUX.SNG_E0[0][3] INT:MUX.IMUX_LOGICIN[48][4] INT:MUX.IMUX_LOGICIN[25][4] INT:MUX.IMUX_LOGICIN[13][4] INT:MUX.IMUX_LOGICIN[54][4] INT:MUX.IMUX_LOGICIN[41][4] INT:MUX.IMUX_LOGICIN[4][4] INT:MUX.IMUX_LOGICIN[44][4] INT:MUX.IMUX_LOGICIN[30][4] -
B17 INT:MUX.QUAD_NW0[1][4] INT:MUX.QUAD_WW0[1][4] INT:MUX.QUAD_NE0[1][4] INT:MUX.QUAD_NN0[1][4] INT:MUX.DBL_NN0[1][2] INT:MUX.DBL_NW0[1][2] INT:MUX.DBL_EE0[1][2] INT:MUX.DBL_NE0[1][2] INT:MUX.SNG_N0[0][2] INT:MUX.SNG_W0[6][2] INT:MUX.SNG_N0[5][2] INT:MUX.SNG_E0[0][2] INT:MUX.IMUX_LOGICIN[48][5] INT:MUX.IMUX_LOGICIN[25][5] INT:MUX.IMUX_LOGICIN[13][5] INT:MUX.IMUX_LOGICIN[54][5] INT:MUX.IMUX_LOGICIN[41][5] INT:MUX.IMUX_LOGICIN[4][5] INT:MUX.IMUX_LOGICIN[44][5] INT:MUX.IMUX_LOGICIN[30][5] -
B16 INT:MUX.QUAD_NW0[1][6] INT:MUX.QUAD_NW0[1][7] INT:MUX.QUAD_NE0[1][6] INT:MUX.QUAD_NE0[1][7] INT:MUX.DBL_NN0[1][6] INT:MUX.DBL_NN0[1][7] INT:MUX.DBL_EE0[1][6] INT:MUX.DBL_EE0[1][7] INT:MUX.SNG_N0[0][6] INT:MUX.SNG_N0[0][7] INT:MUX.SNG_N0[5][6] INT:MUX.SNG_N0[5][7] INT:MUX.IMUX_LOGICIN[25][6] INT:MUX.IMUX_LOGICIN[25][7] INT:MUX.IMUX_LOGICIN[13][7] INT:MUX.IMUX_LOGICIN[13][6] INT:MUX.IMUX_LOGICIN[4][6] INT:MUX.IMUX_LOGICIN[4][7] INT:MUX.IMUX_LOGICIN[44][7] INT:MUX.IMUX_LOGICIN[44][6] -
B15 INT:MUX.QUAD_SS0[0][6] INT:MUX.QUAD_SS0[0][7] INT:MUX.QUAD_EE0[0][6] INT:MUX.QUAD_EE0[0][7] INT:MUX.DBL_WW0[0][6] INT:MUX.DBL_WW0[0][7] INT:MUX.DBL_SS0[0][6] INT:MUX.DBL_SS0[0][7] INT:MUX.SNG_S0[5][6] INT:MUX.SNG_S0[5][7] INT:MUX.SNG_S0[0][6] INT:MUX.SNG_S0[0][7] INT:MUX.IMUX_LOGICIN[38][6] INT:MUX.IMUX_LOGICIN[38][7] INT:MUX.IMUX_LOGICIN[34][7] INT:MUX.IMUX_LOGICIN[34][6] INT:MUX.IMUX_LOGICIN[45][6] INT:MUX.IMUX_LOGICIN[45][7] INT:MUX.IMUX_LOGICIN[56][7] INT:MUX.IMUX_LOGICIN[56][6] INT:MUX.IMUX_GFAN[1][7]
B14 INT:MUX.QUAD_SS0[0][3] INT:MUX.QUAD_SW0[0][3] INT:MUX.QUAD_EE0[0][2] INT:MUX.QUAD_SE0[0][2] INT:MUX.DBL_WW0[0][3] INT:MUX.DBL_SW0[0][3] INT:MUX.DBL_SS0[0][3] INT:MUX.DBL_SE0[0][3] INT:MUX.SNG_S0[5][3] INT:MUX.SNG_W0[3][3] INT:MUX.SNG_S0[0][3] INT:MUX.SNG_E0[5][3] INT:MUX.IMUX_LOGICIN[38][2] INT:MUX.IMUX_LOGICIN[62][2] INT:MUX.IMUX_LOGICIN[12][0] INT:MUX.IMUX_LOGICIN[34][0] INT:MUX.IMUX_LOGICIN[45][2] INT:MUX.IMUX_LOGICIN[6][2] INT:MUX.IMUX_LOGICIN[16][0] INT:MUX.IMUX_LOGICIN[56][0] INT:MUX.IMUX_GFAN[1][6]
B13 INT:MUX.QUAD_SS0[0][0] INT:MUX.QUAD_SW0[0][0] INT:MUX.QUAD_EE0[0][4] INT:MUX.QUAD_SE0[0][4] INT:MUX.DBL_WW0[0][2] INT:MUX.DBL_SW0[0][2] INT:MUX.DBL_SS0[0][2] INT:MUX.DBL_SE0[0][2] INT:MUX.SNG_S0[5][2] INT:MUX.SNG_W0[3][2] INT:MUX.SNG_S0[0][2] INT:MUX.SNG_E0[5][2] INT:MUX.IMUX_LOGICIN[38][3] INT:MUX.IMUX_LOGICIN[62][3] INT:MUX.IMUX_LOGICIN[12][3] INT:MUX.IMUX_LOGICIN[34][3] INT:MUX.IMUX_LOGICIN[45][3] INT:MUX.IMUX_LOGICIN[6][3] INT:MUX.IMUX_LOGICIN[16][3] INT:MUX.IMUX_LOGICIN[56][3] INT:MUX.IMUX_GFAN[1][2]
B12 INT:MUX.QUAD_SS0[0][5] INT:MUX.QUAD_SW0[0][5] INT:MUX.QUAD_EE0[0][5] INT:MUX.QUAD_SE0[0][5] INT:MUX.DBL_WW0[0][1] INT:MUX.DBL_SW0[0][1] INT:MUX.DBL_SS0[0][1] INT:MUX.DBL_SE0[0][1] INT:MUX.SNG_S0[5][1] INT:MUX.SNG_W0[3][1] INT:MUX.SNG_S0[0][1] INT:MUX.SNG_E0[5][1] INT:MUX.IMUX_LOGICIN[38][0] INT:MUX.IMUX_LOGICIN[62][0] INT:MUX.IMUX_LOGICIN[12][1] INT:MUX.IMUX_LOGICIN[34][1] INT:MUX.IMUX_LOGICIN[45][0] INT:MUX.IMUX_LOGICIN[6][0] INT:MUX.IMUX_LOGICIN[16][2] INT:MUX.IMUX_LOGICIN[56][2] INT:MUX.IMUX_GFAN[1][3]
B11 INT:MUX.QUAD_SS0[0][2] INT:MUX.QUAD_SW0[0][2] INT:MUX.QUAD_EE0[0][1] INT:MUX.QUAD_SE0[0][1] INT:MUX.DBL_WW0[0][0] INT:MUX.DBL_SW0[0][0] INT:MUX.DBL_SS0[0][0] INT:MUX.DBL_SE0[0][0] INT:MUX.SNG_S0[5][0] INT:MUX.SNG_W0[3][0] INT:MUX.SNG_S0[0][0] INT:MUX.SNG_E0[5][0] INT:MUX.IMUX_LOGICIN[38][1] INT:MUX.IMUX_LOGICIN[62][1] INT:MUX.IMUX_LOGICIN[12][2] INT:MUX.IMUX_LOGICIN[34][2] INT:MUX.IMUX_LOGICIN[45][1] INT:MUX.IMUX_LOGICIN[6][1] INT:MUX.IMUX_LOGICIN[16][1] INT:MUX.IMUX_LOGICIN[56][1] INT:MUX.IMUX_GFAN[1][0]
B10 INT:MUX.QUAD_SS0[0][4] INT:MUX.QUAD_SW0[0][4] INT:MUX.QUAD_EE0[0][3] INT:MUX.QUAD_SE0[0][3] INT:MUX.DBL_WW0[0][5] INT:MUX.DBL_SW0[0][5] INT:MUX.DBL_SS0[0][5] INT:MUX.DBL_SE0[0][5] INT:MUX.SNG_S0[5][5] INT:MUX.SNG_W0[3][5] INT:MUX.SNG_S0[0][5] INT:MUX.SNG_E0[5][5] INT:MUX.IMUX_LOGICIN[38][4] INT:MUX.IMUX_LOGICIN[62][4] INT:MUX.IMUX_LOGICIN[12][4] INT:MUX.IMUX_LOGICIN[34][4] INT:MUX.IMUX_LOGICIN[45][4] INT:MUX.IMUX_LOGICIN[6][4] INT:MUX.IMUX_LOGICIN[16][4] INT:MUX.IMUX_LOGICIN[56][4] INT:MUX.IMUX_GFAN[1][1]
B9 INT:MUX.QUAD_SS0[0][1] INT:MUX.QUAD_SW0[0][1] INT:MUX.QUAD_EE0[0][0] INT:MUX.QUAD_SE0[0][0] INT:MUX.DBL_WW0[0][4] INT:MUX.DBL_SW0[0][4] INT:MUX.DBL_SS0[0][4] INT:MUX.DBL_SE0[0][4] INT:MUX.SNG_S0[5][4] INT:MUX.SNG_W0[3][4] INT:MUX.SNG_S0[0][4] INT:MUX.SNG_E0[5][4] INT:MUX.IMUX_LOGICIN[38][5] INT:MUX.IMUX_LOGICIN[62][5] INT:MUX.IMUX_LOGICIN[12][5] INT:MUX.IMUX_LOGICIN[34][5] INT:MUX.IMUX_LOGICIN[45][5] INT:MUX.IMUX_LOGICIN[6][5] INT:MUX.IMUX_LOGICIN[16][5] INT:MUX.IMUX_LOGICIN[56][5] INT:MUX.IMUX_GFAN[1][4]
B8 INT:MUX.QUAD_SW0[0][7] INT:MUX.QUAD_SW0[0][6] INT:MUX.QUAD_SE0[0][7] INT:MUX.QUAD_SE0[0][6] INT:MUX.DBL_SW0[0][7] INT:MUX.DBL_SW0[0][6] INT:MUX.DBL_SE0[0][7] INT:MUX.DBL_SE0[0][6] INT:MUX.SNG_W0[3][7] INT:MUX.SNG_W0[3][6] INT:MUX.SNG_E0[5][7] INT:MUX.SNG_E0[5][6] INT:MUX.IMUX_LOGICIN[62][6] INT:MUX.IMUX_LOGICIN[62][7] INT:MUX.IMUX_LOGICIN[12][7] INT:MUX.IMUX_LOGICIN[12][6] INT:MUX.IMUX_LOGICIN[6][6] INT:MUX.IMUX_LOGICIN[6][7] INT:MUX.IMUX_LOGICIN[16][7] INT:MUX.IMUX_LOGICIN[16][6] INT:MUX.IMUX_GFAN[1][5]
B7 INT:MUX.QUAD_WW0[0][7] INT:MUX.QUAD_WW0[0][6] INT:MUX.QUAD_NN0[0][7] INT:MUX.QUAD_NN0[0][6] INT:MUX.DBL_NW0[0][7] INT:MUX.DBL_NW0[0][6] INT:MUX.DBL_NE0[0][7] INT:MUX.DBL_NE0[0][6] INT:MUX.SNG_W0[5][7] INT:MUX.SNG_W0[5][6] INT:MUX.SNG_E0[3][7] INT:MUX.SNG_E0[3][6] INT:MUX.IMUX_LOGICIN[47][6] INT:MUX.IMUX_LOGICIN[47][7] INT:MUX.IMUX_LOGICIN[35][7] INT:MUX.IMUX_LOGICIN[35][6] INT:MUX.IMUX_LOGICIN[42][6] INT:MUX.IMUX_LOGICIN[42][7] INT:MUX.IMUX_LOGICIN[36][7] INT:MUX.IMUX_LOGICIN[36][6] INT:MUX.IMUX_GFAN[0][5]
B6 INT:MUX.QUAD_NW0[0][2] INT:MUX.QUAD_WW0[0][2] INT:MUX.QUAD_NE0[0][1] INT:MUX.QUAD_NN0[0][1] INT:MUX.DBL_NN0[0][5] INT:MUX.DBL_NW0[0][5] INT:MUX.DBL_EE0[0][5] INT:MUX.DBL_NE0[0][5] INT:MUX.SNG_N0[3][5] INT:MUX.SNG_W0[5][5] INT:MUX.SNG_N0[4][5] INT:MUX.SNG_E0[3][5] INT:MUX.IMUX_LOGICIN[47][0] INT:MUX.IMUX_LOGICIN[24][0] INT:MUX.IMUX_LOGICIN[15][2] INT:MUX.IMUX_LOGICIN[35][2] INT:MUX.IMUX_LOGICIN[42][0] INT:MUX.IMUX_LOGICIN[5][0] INT:MUX.IMUX_LOGICIN[7][2] INT:MUX.IMUX_LOGICIN[36][2] INT:MUX.IMUX_GFAN[0][0]
B5 INT:MUX.QUAD_NW0[0][1] INT:MUX.QUAD_WW0[0][1] INT:MUX.QUAD_NE0[0][2] INT:MUX.QUAD_NN0[0][2] INT:MUX.DBL_NN0[0][4] INT:MUX.DBL_NW0[0][4] INT:MUX.DBL_EE0[0][4] INT:MUX.DBL_NE0[0][4] INT:MUX.SNG_N0[3][4] INT:MUX.SNG_W0[5][4] INT:MUX.SNG_N0[4][4] INT:MUX.SNG_E0[3][4] INT:MUX.IMUX_LOGICIN[47][3] INT:MUX.IMUX_LOGICIN[24][3] INT:MUX.IMUX_LOGICIN[15][3] INT:MUX.IMUX_LOGICIN[35][3] INT:MUX.IMUX_LOGICIN[42][3] INT:MUX.IMUX_LOGICIN[5][3] INT:MUX.IMUX_LOGICIN[7][3] INT:MUX.IMUX_LOGICIN[36][3] INT:MUX.IMUX_GFAN[0][1]
B4 INT:MUX.QUAD_NW0[0][0] INT:MUX.QUAD_WW0[0][0] INT:MUX.QUAD_NE0[0][0] INT:MUX.QUAD_NN0[0][0] INT:MUX.DBL_NN0[0][1] INT:MUX.DBL_NW0[0][1] INT:MUX.DBL_EE0[0][0] INT:MUX.DBL_NE0[0][0] INT:MUX.SNG_N0[3][1] INT:MUX.SNG_W0[5][1] INT:MUX.SNG_N0[4][0] INT:MUX.SNG_E0[3][0] INT:MUX.IMUX_LOGICIN[47][1] INT:MUX.IMUX_LOGICIN[24][1] INT:MUX.IMUX_LOGICIN[15][0] INT:MUX.IMUX_LOGICIN[35][0] INT:MUX.IMUX_LOGICIN[42][1] INT:MUX.IMUX_LOGICIN[5][1] INT:MUX.IMUX_LOGICIN[7][1] INT:MUX.IMUX_LOGICIN[36][1] INT:MUX.IMUX_GFAN[0][4]
B3 INT:MUX.QUAD_NW0[0][5] INT:MUX.QUAD_WW0[0][5] INT:MUX.QUAD_NE0[0][5] INT:MUX.QUAD_NN0[0][5] INT:MUX.DBL_NN0[0][0] INT:MUX.DBL_NW0[0][0] INT:MUX.DBL_EE0[0][1] INT:MUX.DBL_NE0[0][1] INT:MUX.SNG_N0[3][0] INT:MUX.SNG_W0[5][0] INT:MUX.SNG_N0[4][1] INT:MUX.SNG_E0[3][1] INT:MUX.IMUX_LOGICIN[47][2] INT:MUX.IMUX_LOGICIN[24][2] INT:MUX.IMUX_LOGICIN[15][1] INT:MUX.IMUX_LOGICIN[35][1] INT:MUX.IMUX_LOGICIN[42][2] INT:MUX.IMUX_LOGICIN[5][2] INT:MUX.IMUX_LOGICIN[7][0] INT:MUX.IMUX_LOGICIN[36][0] INT:MUX.IMUX_GFAN[0][3]
B2 INT:MUX.QUAD_NW0[0][3] INT:MUX.QUAD_WW0[0][3] INT:MUX.QUAD_NE0[0][3] INT:MUX.QUAD_NN0[0][3] INT:MUX.DBL_NN0[0][3] INT:MUX.DBL_NW0[0][3] INT:MUX.DBL_EE0[0][3] INT:MUX.DBL_NE0[0][3] INT:MUX.SNG_N0[3][3] INT:MUX.SNG_W0[5][3] INT:MUX.SNG_N0[4][3] INT:MUX.SNG_E0[3][3] INT:MUX.IMUX_LOGICIN[47][4] INT:MUX.IMUX_LOGICIN[24][4] INT:MUX.IMUX_LOGICIN[15][4] INT:MUX.IMUX_LOGICIN[35][4] INT:MUX.IMUX_LOGICIN[42][4] INT:MUX.IMUX_LOGICIN[5][4] INT:MUX.IMUX_LOGICIN[7][4] INT:MUX.IMUX_LOGICIN[36][4] INT:MUX.IMUX_GFAN[0][2]
B1 INT:MUX.QUAD_NW0[0][4] INT:MUX.QUAD_WW0[0][4] INT:MUX.QUAD_NE0[0][4] INT:MUX.QUAD_NN0[0][4] INT:MUX.DBL_NN0[0][2] INT:MUX.DBL_NW0[0][2] INT:MUX.DBL_EE0[0][2] INT:MUX.DBL_NE0[0][2] INT:MUX.SNG_N0[3][2] INT:MUX.SNG_W0[5][2] INT:MUX.SNG_N0[4][2] INT:MUX.SNG_E0[3][2] INT:MUX.IMUX_LOGICIN[47][5] INT:MUX.IMUX_LOGICIN[24][5] INT:MUX.IMUX_LOGICIN[15][5] INT:MUX.IMUX_LOGICIN[35][5] INT:MUX.IMUX_LOGICIN[42][5] INT:MUX.IMUX_LOGICIN[5][5] INT:MUX.IMUX_LOGICIN[7][5] INT:MUX.IMUX_LOGICIN[36][5] INT:MUX.IMUX_GFAN[0][6]
B0 INT:MUX.QUAD_NW0[0][6] INT:MUX.QUAD_NW0[0][7] INT:MUX.QUAD_NE0[0][6] INT:MUX.QUAD_NE0[0][7] INT:MUX.DBL_NN0[0][6] INT:MUX.DBL_NN0[0][7] INT:MUX.DBL_EE0[0][6] INT:MUX.DBL_EE0[0][7] INT:MUX.SNG_N0[3][6] INT:MUX.SNG_N0[3][7] INT:MUX.SNG_N0[4][6] INT:MUX.SNG_N0[4][7] INT:MUX.IMUX_LOGICIN[24][6] INT:MUX.IMUX_LOGICIN[24][7] INT:MUX.IMUX_LOGICIN[15][7] INT:MUX.IMUX_LOGICIN[15][6] INT:MUX.IMUX_LOGICIN[5][6] INT:MUX.IMUX_LOGICIN[5][7] INT:MUX.IMUX_LOGICIN[7][7] INT:MUX.IMUX_LOGICIN[7][6] INT:MUX.IMUX_GFAN[0][7]
INT:MUX.DBL_EE0[0] 0.F7.B0 0.F6.B0 0.F6.B6 0.F6.B5 0.F6.B2 0.F6.B1 0.F6.B3 0.F6.B4
INT:MUX.DBL_NE0[0] 0.F6.B7 0.F7.B7 0.F7.B6 0.F7.B5 0.F7.B2 0.F7.B1 0.F7.B3 0.F7.B4
INT:MUX.SNG_E0[3] 0.F10.B7 0.F11.B7 0.F11.B6 0.F11.B5 0.F11.B2 0.F11.B1 0.F11.B3 0.F11.B4
INT:MUX.SNG_N0[4] 0.F11.B0 0.F10.B0 0.F10.B6 0.F10.B5 0.F10.B2 0.F10.B1 0.F10.B3 0.F10.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_NN4[0] 0 0 0 0 0 0 1 0
DBL_SE2[0] 0 0 0 0 0 1 0 0
DBL_EE2[0] 0 0 0 0 1 0 0 0
QUAD_SE4[0] 0 0 0 1 0 0 0 0
QUAD_EE4[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_E1[4] 0 1 0 0 0 0 1 0
SNG_N1[0] 0 1 0 0 0 1 0 0
SNG_N1[4] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[19] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[1] 0.F7.B16 0.F6.B16 0.F6.B22 0.F6.B21 0.F6.B18 0.F6.B17 0.F6.B19 0.F6.B20
INT:MUX.DBL_NE0[1] 0.F6.B23 0.F7.B23 0.F7.B22 0.F7.B21 0.F7.B18 0.F7.B17 0.F7.B19 0.F7.B20
INT:MUX.SNG_E0[0] 0.F10.B23 0.F11.B23 0.F11.B22 0.F11.B21 0.F11.B18 0.F11.B17 0.F11.B19 0.F11.B20
INT:MUX.SNG_N0[5] 0.F11.B16 0.F10.B16 0.F10.B22 0.F10.B21 0.F10.B18 0.F10.B17 0.F10.B19 0.F10.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_NN4[1] 0 0 0 0 0 0 1 0
DBL_SE2[1] 0 0 0 0 0 1 0 0
DBL_EE2[1] 0 0 0 0 1 0 0 0
QUAD_SE4[1] 0 0 0 1 0 0 0 0
QUAD_EE4[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_E1[5] 0 1 0 0 0 0 1 0
SNG_N1[1] 0 1 0 0 0 1 0 0
SNG_N1[5] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[22] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[2] 0.F7.B32 0.F6.B32 0.F6.B38 0.F6.B37 0.F6.B34 0.F6.B33 0.F6.B35 0.F6.B36
INT:MUX.DBL_NE0[2] 0.F6.B39 0.F7.B39 0.F7.B38 0.F7.B37 0.F7.B34 0.F7.B33 0.F7.B35 0.F7.B36
INT:MUX.SNG_E0[1] 0.F10.B39 0.F11.B39 0.F11.B38 0.F11.B37 0.F11.B34 0.F11.B33 0.F11.B35 0.F11.B36
INT:MUX.SNG_N0[6] 0.F11.B32 0.F10.B32 0.F10.B38 0.F10.B37 0.F10.B34 0.F10.B33 0.F10.B35 0.F10.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_NN4[2] 0 0 0 0 0 0 1 0
DBL_SE2[2] 0 0 0 0 0 1 0 0
DBL_EE2[2] 0 0 0 0 1 0 0 0
QUAD_SE4[2] 0 0 0 1 0 0 0 0
QUAD_EE4[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_E1[6] 0 1 0 0 0 0 1 0
SNG_N1[2] 0 1 0 0 0 1 0 0
SNG_N1[6] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[13] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[3] 0.F7.B48 0.F6.B48 0.F6.B54 0.F6.B53 0.F6.B50 0.F6.B49 0.F6.B51 0.F6.B52
INT:MUX.DBL_NE0[3] 0.F6.B55 0.F7.B55 0.F7.B54 0.F7.B53 0.F7.B50 0.F7.B49 0.F7.B51 0.F7.B52
INT:MUX.SNG_E0[2] 0.F10.B55 0.F11.B55 0.F11.B54 0.F11.B53 0.F11.B50 0.F11.B49 0.F11.B51 0.F11.B52
INT:MUX.SNG_N0[7] 0.F11.B48 0.F10.B48 0.F10.B54 0.F10.B53 0.F10.B50 0.F10.B49 0.F10.B51 0.F10.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_NN4[3] 0 0 0 0 0 0 1 0
DBL_SE2[3] 0 0 0 0 0 1 0 0
DBL_EE2[3] 0 0 0 0 1 0 0 0
QUAD_SE4[3] 0 0 0 1 0 0 0 0
QUAD_EE4[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_E1[7] 0 1 0 0 0 0 1 0
SNG_N1[3] 0 1 0 0 0 1 0 0
SNG_N1[7] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[16] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[0] 0.F5.B0 0.F4.B0 0.F4.B6 0.F4.B5 0.F4.B2 0.F4.B1 0.F4.B4 0.F4.B3
INT:MUX.DBL_NW0[0] 0.F4.B7 0.F5.B7 0.F5.B6 0.F5.B5 0.F5.B2 0.F5.B1 0.F5.B4 0.F5.B3
INT:MUX.SNG_N0[3] 0.F9.B0 0.F8.B0 0.F8.B6 0.F8.B5 0.F8.B2 0.F8.B1 0.F8.B4 0.F8.B3
INT:MUX.SNG_W0[5] 0.F8.B7 0.F9.B7 0.F9.B6 0.F9.B5 0.F9.B2 0.F9.B1 0.F9.B4 0.F9.B3
NONE 0 0 0 0 0 0 0 0
QUAD_NN4[0] 0 0 0 0 0 0 0 1
QUAD_NE4[0] 0 0 0 0 0 0 1 0
DBL_NW2[0] 0 0 0 0 0 1 0 0
DBL_WW2_N3 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NW4[0] 0 0 1 0 0 0 0 0
SNG_W1[4] 0 1 0 0 0 0 0 1
SNG_W1_N3 0 1 0 0 0 0 1 0
SNG_N1[0] 0 1 0 0 0 1 0 0
SNG_N1[4] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[7] 1 0 0 0 0 0 0 1
OUT[12] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[19] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[1] 0.F5.B16 0.F4.B16 0.F4.B22 0.F4.B21 0.F4.B18 0.F4.B17 0.F4.B19 0.F4.B20
INT:MUX.DBL_NW0[1] 0.F4.B23 0.F5.B23 0.F5.B22 0.F5.B21 0.F5.B18 0.F5.B17 0.F5.B19 0.F5.B20
INT:MUX.SNG_N0[0] 0.F9.B16 0.F8.B16 0.F8.B22 0.F8.B21 0.F8.B18 0.F8.B17 0.F8.B19 0.F8.B20
INT:MUX.SNG_W0[6] 0.F8.B23 0.F9.B23 0.F9.B22 0.F9.B21 0.F9.B18 0.F9.B17 0.F9.B19 0.F9.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_NN4[1] 0 0 0 0 0 0 1 0
DBL_NW2[1] 0 0 0 0 0 1 0 0
DBL_WW2[0] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NW4[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_N1[1] 0 1 0 0 0 1 0 0
SNG_N1[5] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[22] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[2] 0.F5.B32 0.F4.B32 0.F4.B38 0.F4.B37 0.F4.B34 0.F4.B33 0.F4.B35 0.F4.B36
INT:MUX.DBL_NW0[2] 0.F4.B39 0.F5.B39 0.F5.B38 0.F5.B37 0.F5.B34 0.F5.B33 0.F5.B35 0.F5.B36
INT:MUX.SNG_N0[1] 0.F9.B32 0.F8.B32 0.F8.B38 0.F8.B37 0.F8.B34 0.F8.B33 0.F8.B35 0.F8.B36
INT:MUX.SNG_W0[7] 0.F8.B39 0.F9.B39 0.F9.B38 0.F9.B37 0.F9.B34 0.F9.B33 0.F9.B35 0.F9.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_NN4[2] 0 0 0 0 0 0 1 0
DBL_NW2[2] 0 0 0 0 0 1 0 0
DBL_WW2[1] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NW4[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_N1[2] 0 1 0 0 0 1 0 0
SNG_N1[6] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[13] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[3] 0.F5.B48 0.F4.B48 0.F4.B54 0.F4.B53 0.F4.B50 0.F4.B49 0.F4.B51 0.F4.B52
INT:MUX.DBL_NW0[3] 0.F4.B55 0.F5.B55 0.F5.B54 0.F5.B53 0.F5.B50 0.F5.B49 0.F5.B51 0.F5.B52
INT:MUX.SNG_N0[2] 0.F9.B48 0.F8.B48 0.F8.B54 0.F8.B53 0.F8.B50 0.F8.B49 0.F8.B51 0.F8.B52
INT:MUX.SNG_W0[4] 0.F8.B55 0.F9.B55 0.F9.B54 0.F9.B53 0.F9.B50 0.F9.B49 0.F9.B51 0.F9.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_NN4[3] 0 0 0 0 0 0 1 0
DBL_NW2[3] 0 0 0 0 0 1 0 0
DBL_WW2[2] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NW4[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_N1[3] 0 1 0 0 0 1 0 0
SNG_N1[7] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[16] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[0] 0.F6.B8 0.F7.B8 0.F7.B10 0.F7.B9 0.F7.B14 0.F7.B13 0.F7.B12 0.F7.B11
INT:MUX.DBL_SS0[0] 0.F7.B15 0.F6.B15 0.F6.B10 0.F6.B9 0.F6.B14 0.F6.B13 0.F6.B12 0.F6.B11
INT:MUX.SNG_E0[5] 0.F10.B8 0.F11.B8 0.F11.B10 0.F11.B9 0.F11.B14 0.F11.B13 0.F11.B12 0.F11.B11
INT:MUX.SNG_S0[0] 0.F11.B15 0.F10.B15 0.F10.B10 0.F10.B9 0.F10.B14 0.F10.B13 0.F10.B12 0.F10.B11
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_SW4[0] 0 0 0 0 0 0 1 0
DBL_EE2[0] 0 0 0 0 0 1 0 0
DBL_SE2[0] 0 0 0 0 1 0 0 0
QUAD_EE4[0] 0 0 0 1 0 0 0 0
QUAD_SE4[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_E1[4] 0 1 0 0 0 0 1 0
SNG_S1[0] 0 1 0 0 0 1 0 0
SNG_S1[4] 0 1 0 0 1 0 0 0
DBL_SS2[0] 0 1 0 1 0 0 0 0
DBL_SW2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[2] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[19] 1 0 0 1 0 0 0 0
OUT[14] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[1] 0.F6.B24 0.F7.B24 0.F7.B26 0.F7.B25 0.F7.B30 0.F7.B29 0.F7.B28 0.F7.B27
INT:MUX.DBL_SS0[1] 0.F7.B31 0.F6.B31 0.F6.B26 0.F6.B25 0.F6.B30 0.F6.B29 0.F6.B28 0.F6.B27
INT:MUX.SNG_E0[6] 0.F10.B24 0.F11.B24 0.F11.B26 0.F11.B25 0.F11.B30 0.F11.B29 0.F11.B28 0.F11.B27
INT:MUX.SNG_S0[1] 0.F11.B31 0.F10.B31 0.F10.B26 0.F10.B25 0.F10.B30 0.F10.B29 0.F10.B28 0.F10.B27
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_SW4[1] 0 0 0 0 0 0 1 0
DBL_EE2[1] 0 0 0 0 0 1 0 0
DBL_SE2[1] 0 0 0 0 1 0 0 0
QUAD_EE4[1] 0 0 0 1 0 0 0 0
QUAD_SE4[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_E1[5] 0 1 0 0 0 0 1 0
SNG_S1[1] 0 1 0 0 0 1 0 0
SNG_S1[5] 0 1 0 0 1 0 0 0
DBL_SS2[1] 0 1 0 1 0 0 0 0
DBL_SW2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[5] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[22] 1 0 0 1 0 0 0 0
OUT[17] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[2] 0.F6.B40 0.F7.B40 0.F7.B42 0.F7.B41 0.F7.B46 0.F7.B45 0.F7.B44 0.F7.B43
INT:MUX.DBL_SS0[2] 0.F7.B47 0.F6.B47 0.F6.B42 0.F6.B41 0.F6.B46 0.F6.B45 0.F6.B44 0.F6.B43
INT:MUX.SNG_E0[7] 0.F10.B40 0.F11.B40 0.F11.B42 0.F11.B41 0.F11.B46 0.F11.B45 0.F11.B44 0.F11.B43
INT:MUX.SNG_S0[2] 0.F11.B47 0.F10.B47 0.F10.B42 0.F10.B41 0.F10.B46 0.F10.B45 0.F10.B44 0.F10.B43
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_SW4[2] 0 0 0 0 0 0 1 0
DBL_EE2[2] 0 0 0 0 0 1 0 0
DBL_SE2[2] 0 0 0 0 1 0 0 0
QUAD_EE4[2] 0 0 0 1 0 0 0 0
QUAD_SE4[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_E1[6] 0 1 0 0 0 0 1 0
SNG_S1[2] 0 1 0 0 0 1 0 0
SNG_S1[6] 0 1 0 0 1 0 0 0
DBL_SS2[2] 0 1 0 1 0 0 0 0
DBL_SW2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[8] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[13] 1 0 0 1 0 0 0 0
OUT[20] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[3] 0.F6.B56 0.F7.B56 0.F7.B58 0.F7.B57 0.F7.B62 0.F7.B61 0.F7.B60 0.F7.B59
INT:MUX.DBL_SS0[3] 0.F7.B63 0.F6.B63 0.F6.B58 0.F6.B57 0.F6.B62 0.F6.B61 0.F6.B60 0.F6.B59
INT:MUX.SNG_E0[4] 0.F10.B56 0.F11.B56 0.F11.B58 0.F11.B57 0.F11.B62 0.F11.B61 0.F11.B60 0.F11.B59
INT:MUX.SNG_S0[3] 0.F11.B63 0.F10.B63 0.F10.B58 0.F10.B57 0.F10.B62 0.F10.B61 0.F10.B60 0.F10.B59
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_SW4[3] 0 0 0 0 0 0 1 0
DBL_EE2[3] 0 0 0 0 0 1 0 0
DBL_SE2[3] 0 0 0 0 1 0 0 0
QUAD_EE4[3] 0 0 0 1 0 0 0 0
QUAD_SE4[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_E1[7] 0 1 0 0 0 0 1 0
SNG_S1[3] 0 1 0 0 0 1 0 0
SNG_S1[7] 0 1 0 0 1 0 0 0
DBL_SS2[3] 0 1 0 1 0 0 0 0
DBL_SW2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[11] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[16] 1 0 0 1 0 0 0 0
OUT[23] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[0] 0.F4.B8 0.F5.B8 0.F5.B10 0.F5.B9 0.F5.B14 0.F5.B13 0.F5.B12 0.F5.B11
INT:MUX.DBL_WW0[0] 0.F5.B15 0.F4.B15 0.F4.B10 0.F4.B9 0.F4.B14 0.F4.B13 0.F4.B12 0.F4.B11
INT:MUX.SNG_S0[5] 0.F9.B15 0.F8.B15 0.F8.B10 0.F8.B9 0.F8.B14 0.F8.B13 0.F8.B12 0.F8.B11
INT:MUX.SNG_W0[3] 0.F8.B8 0.F9.B8 0.F9.B10 0.F9.B9 0.F9.B14 0.F9.B13 0.F9.B12 0.F9.B11
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_SW4[0] 0 0 0 0 0 0 1 0
DBL_NW2[1] 0 0 0 0 0 1 0 0
DBL_WW2[0] 0 0 0 0 1 0 0 0
QUAD_NW4[1] 0 0 0 1 0 0 0 0
QUAD_WW4[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_S1[0] 0 1 0 0 0 1 0 0
SNG_S1[4] 0 1 0 0 1 0 0 0
DBL_SS2[0] 0 1 0 1 0 0 0 0
DBL_SW2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[2] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[19] 1 0 0 1 0 0 0 0
OUT[14] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[1] 0.F4.B24 0.F5.B24 0.F5.B26 0.F5.B25 0.F5.B30 0.F5.B29 0.F5.B28 0.F5.B27
INT:MUX.DBL_WW0[1] 0.F5.B31 0.F4.B31 0.F4.B26 0.F4.B25 0.F4.B30 0.F4.B29 0.F4.B28 0.F4.B27
INT:MUX.SNG_S0[6] 0.F9.B31 0.F8.B31 0.F8.B26 0.F8.B25 0.F8.B30 0.F8.B29 0.F8.B28 0.F8.B27
INT:MUX.SNG_W0[0] 0.F8.B24 0.F9.B24 0.F9.B26 0.F9.B25 0.F9.B30 0.F9.B29 0.F9.B28 0.F9.B27
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_SW4[1] 0 0 0 0 0 0 1 0
DBL_NW2[2] 0 0 0 0 0 1 0 0
DBL_WW2[1] 0 0 0 0 1 0 0 0
QUAD_NW4[2] 0 0 0 1 0 0 0 0
QUAD_WW4[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_S1[1] 0 1 0 0 0 1 0 0
SNG_S1[5] 0 1 0 0 1 0 0 0
DBL_SS2[1] 0 1 0 1 0 0 0 0
DBL_SW2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[5] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[22] 1 0 0 1 0 0 0 0
OUT[17] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[2] 0.F4.B40 0.F5.B40 0.F5.B42 0.F5.B41 0.F5.B46 0.F5.B45 0.F5.B44 0.F5.B43
INT:MUX.DBL_WW0[2] 0.F5.B47 0.F4.B47 0.F4.B42 0.F4.B41 0.F4.B46 0.F4.B45 0.F4.B44 0.F4.B43
INT:MUX.SNG_S0[7] 0.F9.B47 0.F8.B47 0.F8.B42 0.F8.B41 0.F8.B46 0.F8.B45 0.F8.B44 0.F8.B43
INT:MUX.SNG_W0[1] 0.F8.B40 0.F9.B40 0.F9.B42 0.F9.B41 0.F9.B46 0.F9.B45 0.F9.B44 0.F9.B43
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_SW4[2] 0 0 0 0 0 0 1 0
DBL_NW2[3] 0 0 0 0 0 1 0 0
DBL_WW2[2] 0 0 0 0 1 0 0 0
QUAD_NW4[3] 0 0 0 1 0 0 0 0
QUAD_WW4[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_S1[2] 0 1 0 0 0 1 0 0
SNG_S1[6] 0 1 0 0 1 0 0 0
DBL_SS2[2] 0 1 0 1 0 0 0 0
DBL_SW2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[8] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[13] 1 0 0 1 0 0 0 0
OUT[20] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[3] 0.F4.B56 0.F5.B56 0.F5.B58 0.F5.B57 0.F5.B62 0.F5.B61 0.F5.B60 0.F5.B59
INT:MUX.DBL_WW0[3] 0.F5.B63 0.F4.B63 0.F4.B58 0.F4.B57 0.F4.B62 0.F4.B61 0.F4.B60 0.F4.B59
INT:MUX.SNG_S0[4] 0.F9.B63 0.F8.B63 0.F8.B58 0.F8.B57 0.F8.B62 0.F8.B61 0.F8.B60 0.F8.B59
INT:MUX.SNG_W0[2] 0.F8.B56 0.F9.B56 0.F9.B58 0.F9.B57 0.F9.B62 0.F9.B61 0.F9.B60 0.F9.B59
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_SW4[3] 0 0 0 0 0 0 1 0
DBL_NW2_S0 0 0 0 0 0 1 0 0
DBL_WW2[3] 0 0 0 0 1 0 0 0
QUAD_NW4_S0 0 0 0 1 0 0 0 0
QUAD_WW4_S0 0 0 1 0 0 0 0 0
SNG_W1[3] 0 1 0 0 0 0 0 1
SNG_W1_S4 0 1 0 0 0 0 1 0
SNG_S1[3] 0 1 0 0 0 1 0 0
SNG_S1[7] 0 1 0 0 1 0 0 0
DBL_SS2[3] 0 1 0 1 0 0 0 0
DBL_SW2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[11] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[16] 1 0 0 1 0 0 0 0
OUT[23] 1 0 1 0 0 0 0 0
INT:MUX.IMUX_CLK[0] 0.F20.B38 0.F20.B39 0.F20.B32 0.F20.B35 0.F20.B36 0.F20.B37 0.F20.B34 0.F20.B33
INT:MUX.IMUX_CLK[1] 0.F20.B25 0.F20.B24 0.F20.B31 0.F20.B30 0.F20.B27 0.F20.B26 0.F20.B29 0.F20.B28
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 0 0 0 0 0 0 1
TIE_1 0 0 0 0 0 0 1 0
SNG_N1[6] 0 0 0 0 0 1 0 0
SNG_W1[6] 0 0 0 0 1 0 0 0
SNG_S1[5] 0 0 0 1 0 0 0 0
SNG_E1[5] 0 0 1 0 0 0 0 0
GCLK[10] 0 1 0 0 0 0 0 1
GCLK[11] 0 1 0 0 0 0 1 0
GCLK[6] 0 1 0 0 0 1 0 0
GCLK[7] 0 1 0 0 1 0 0 0
GCLK[8] 0 1 0 1 0 0 0 0
GCLK[9] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[53] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[43] 1 0 0 0 0 0 1 0
GCLK[12] 1 0 0 0 0 1 0 0
GCLK[13] 1 0 0 0 1 0 0 0
GCLK[14] 1 0 0 1 0 0 0 0
GCLK[15] 1 0 1 0 0 0 0 0
GCLK[4] 1 1 0 0 0 0 0 1
GCLK[5] 1 1 0 0 0 0 1 0
GCLK[0] 1 1 0 0 0 1 0 0
GCLK[1] 1 1 0 0 1 0 0 0
GCLK[2] 1 1 0 1 0 0 0 0
GCLK[3] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_GFAN[0] 0.F20.B0 0.F20.B1 0.F20.B7 0.F20.B4 0.F20.B3 0.F20.B2 0.F20.B5 0.F20.B6
INT:MUX.IMUX_GFAN[1] 0.F20.B15 0.F20.B14 0.F20.B8 0.F20.B9 0.F20.B12 0.F20.B13 0.F20.B10 0.F20.B11
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 1 0 0 0 0 0 1
TIE_1 0 1 0 0 0 0 1 0
SNG_S1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
SNG_N1[5] 0 1 0 1 0 0 0 0
SNG_W1[5] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[35] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[6] 1 0 0 0 0 0 1 0
GCLK[6] 1 0 0 0 0 1 0 0
GCLK[7] 1 0 0 0 1 0 0 0
IMUX_LOGICIN[53] 1 0 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 0 1 0 0 0 0 0
GCLK[4] 1 1 0 0 0 0 0 1
GCLK[5] 1 1 0 0 0 0 1 0
GCLK[0] 1 1 0 0 0 1 0 0
GCLK[1] 1 1 0 0 1 0 0 0
GCLK[2] 1 1 0 1 0 0 0 0
GCLK[3] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[0] 0.F13.B31 0.F12.B31 0.F12.B25 0.F12.B26 0.F12.B29 0.F12.B30 0.F12.B27 0.F12.B28
INT:MUX.IMUX_LOGICIN[20] 0.F13.B24 0.F12.B24 0.F13.B25 0.F13.B26 0.F13.B29 0.F13.B30 0.F13.B27 0.F13.B28
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[2] 0 0 0 0 0 0 0 1
DBL_WW2[1] 0 0 0 0 0 0 1 0
DBL_SS2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_E1[1] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
SNG_N1[2] 1 0 0 0 0 0 0 1
SNG_N1[5] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[61] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
OUT[5] 1 1 0 0 0 0 0 1
OUT[22] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[10] 0.F14.B40 0.F15.B40 0.F14.B41 0.F14.B42 0.F14.B45 0.F14.B43 0.F14.B44 0.F14.B46
INT:MUX.IMUX_LOGICIN[32] 0.F14.B47 0.F15.B47 0.F15.B41 0.F15.B42 0.F15.B45 0.F15.B43 0.F15.B44 0.F15.B46
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[20] 1 1 0 0 0 0 1 0
OUT[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[11] 0.F14.B24 0.F15.B24 0.F14.B25 0.F14.B26 0.F14.B29 0.F14.B27 0.F14.B28 0.F14.B30
INT:MUX.IMUX_LOGICIN[33] 0.F14.B31 0.F15.B31 0.F15.B25 0.F15.B26 0.F15.B29 0.F15.B27 0.F15.B28 0.F15.B30
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[61] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[5] 1 1 0 0 0 0 1 0
OUT[22] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[12] 0.F14.B8 0.F15.B8 0.F14.B9 0.F14.B10 0.F14.B13 0.F14.B11 0.F14.B12 0.F14.B14
INT:MUX.IMUX_LOGICIN[34] 0.F14.B15 0.F15.B15 0.F15.B9 0.F15.B10 0.F15.B13 0.F15.B11 0.F15.B12 0.F15.B14
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN52_N 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[14] 1 1 0 0 0 0 1 0
OUT[7] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[13] 0.F14.B16 0.F15.B16 0.F14.B17 0.F14.B18 0.F14.B21 0.F14.B22 0.F14.B19 0.F14.B20
INT:MUX.IMUX_LOGICIN[54] 0.F14.B23 0.F15.B23 0.F15.B17 0.F15.B18 0.F15.B21 0.F15.B22 0.F15.B19 0.F15.B20
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[2] 0 0 0 0 0 0 0 1
DBL_WW2[1] 0 0 0 0 0 0 1 0
DBL_SS2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_E1[2] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
SNG_N1[2] 1 0 0 0 0 0 0 1
SNG_N1[5] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[61] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
OUT[5] 1 1 0 0 0 0 0 1
OUT[22] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[14] 0.F14.B55 0.F15.B55 0.F15.B49 0.F15.B50 0.F15.B54 0.F15.B53 0.F15.B51 0.F15.B52
INT:MUX.IMUX_LOGICIN[28] 0.F14.B48 0.F15.B48 0.F14.B49 0.F14.B50 0.F14.B54 0.F14.B53 0.F14.B51 0.F14.B52
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2_S0 0 0 0 0 0 0 0 1
DBL_WW2[3] 0 0 0 0 0 0 1 0
DBL_SW2[3] 0 0 0 0 0 1 0 0
DBL_SS2[3] 0 0 0 0 1 0 0 0
DBL_NE2_S0 0 0 0 1 0 0 0 0
DBL_NN2_S0 0 0 1 0 0 0 0 0
SNG_W1[3] 0 1 0 0 0 0 0 1
SNG_W1_S4 0 1 0 0 0 0 1 0
SNG_E1[7] 0 1 0 0 0 1 0 0
SNG_E1_S0 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
SNG_N1_S0 1 0 0 0 0 0 0 1
SNG_N1[7] 1 0 0 0 0 0 1 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 0 1 0 0
IMUX_LOGICIN[13] 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
OUT[11] 1 1 0 0 0 0 0 1
OUT[16] 1 1 0 0 0 0 1 0
OUT[21] 1 1 0 0 0 1 0 0
IMUX_GFAN[1] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[15] 0.F14.B0 0.F15.B0 0.F14.B1 0.F14.B2 0.F14.B5 0.F14.B6 0.F14.B3 0.F14.B4
INT:MUX.IMUX_LOGICIN[35] 0.F14.B7 0.F15.B7 0.F15.B1 0.F15.B2 0.F15.B5 0.F15.B6 0.F15.B3 0.F15.B4
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[1] 0 0 0 0 0 0 0 1
DBL_WW2[0] 0 0 0 0 0 0 1 0
DBL_SS2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_E1[1] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
SNG_N1[1] 1 0 0 0 0 0 0 1
SNG_N1[4] 1 0 0 0 0 0 1 0
IMUX_LOGICIN52_N 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
OUT[14] 1 1 0 0 0 0 0 1
OUT[7] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[16] 0.F18.B8 0.F19.B8 0.F18.B9 0.F18.B10 0.F18.B13 0.F18.B12 0.F18.B11 0.F18.B14
INT:MUX.IMUX_LOGICIN[56] 0.F18.B15 0.F19.B15 0.F19.B9 0.F19.B10 0.F19.B13 0.F19.B12 0.F19.B11 0.F19.B14
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2_N3 0 0 0 0 0 0 0 1
DBL_WW2_N3 0 0 0 0 0 0 1 0
DBL_NW2[0] 0 0 0 0 0 1 0 0
DBL_SW2_N3 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[4] 0 1 0 0 0 0 1 0
SNG_W1_N3 0 1 0 0 0 1 0 0
SNG_E1_N7 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN21_N 1 0 0 0 0 0 0 1
SNG_N1[4] 1 0 0 0 0 0 1 0
SNG_N1[0] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[19] 1 1 0 0 0 0 1 0
OUT[2] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[17] 0.F18.B24 0.F19.B24 0.F18.B25 0.F18.B26 0.F18.B29 0.F18.B27 0.F18.B28 0.F18.B30
INT:MUX.IMUX_LOGICIN[57] 0.F18.B31 0.F19.B31 0.F19.B25 0.F19.B26 0.F19.B29 0.F19.B27 0.F19.B28 0.F19.B30
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[63] 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[17] 1 1 0 0 0 0 1 0
OUT[10] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[18] 0.F18.B40 0.F19.B40 0.F18.B41 0.F18.B42 0.F18.B45 0.F18.B43 0.F18.B44 0.F18.B46
INT:MUX.IMUX_LOGICIN[58] 0.F18.B47 0.F19.B47 0.F19.B41 0.F19.B42 0.F19.B45 0.F19.B43 0.F19.B44 0.F19.B46
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[8] 1 1 0 0 0 0 1 0
OUT[13] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[19] 0.F18.B56 0.F19.B56 0.F18.B57 0.F18.B58 0.F18.B61 0.F18.B59 0.F18.B60 0.F18.B62
INT:MUX.IMUX_LOGICIN[59] 0.F18.B63 0.F19.B63 0.F19.B57 0.F19.B58 0.F19.B61 0.F19.B59 0.F19.B60 0.F19.B62
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[23] 1 1 0 0 0 0 1 0
OUT[4] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[1] 0.F13.B40 0.F12.B40 0.F13.B41 0.F13.B42 0.F13.B45 0.F13.B46 0.F13.B43 0.F13.B44
INT:MUX.IMUX_LOGICIN[53] 0.F13.B47 0.F12.B47 0.F12.B41 0.F12.B42 0.F12.B45 0.F12.B46 0.F12.B43 0.F12.B44
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[3] 0 0 0 0 0 0 0 1
DBL_WW2[2] 0 0 0 0 0 0 1 0
DBL_SS2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_E1[2] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
SNG_N1[3] 1 0 0 0 0 0 0 1
SNG_N1[6] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[13] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
OUT[20] 1 1 0 0 0 0 0 1
OUT[1] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[21] 0.F17.B47 0.F16.B47 0.F16.B41 0.F16.B42 0.F16.B45 0.F16.B46 0.F16.B43 0.F16.B44
INT:MUX.IMUX_LOGICIN[22] 0.F17.B40 0.F16.B40 0.F17.B41 0.F17.B42 0.F17.B45 0.F17.B46 0.F17.B43 0.F17.B44
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[2] 0 0 0 0 0 0 0 1
DBL_WW2[1] 0 0 0 0 0 0 1 0
DBL_SS2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_E1[2] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
SNG_N1[2] 1 0 0 0 0 0 0 1
SNG_N1[6] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[43] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
OUT[8] 1 1 0 0 0 0 0 1
OUT[13] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[23] 0.F17.B24 0.F16.B24 0.F17.B25 0.F17.B26 0.F17.B29 0.F17.B30 0.F17.B27 0.F17.B28
INT:MUX.IMUX_LOGICIN[43] 0.F17.B31 0.F16.B31 0.F16.B25 0.F16.B26 0.F16.B29 0.F16.B30 0.F16.B27 0.F16.B28
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[1] 0 0 0 0 0 0 0 1
DBL_WW2[0] 0 0 0 0 0 0 1 0
DBL_SS2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_E1[1] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
SNG_N1[1] 1 0 0 0 0 0 0 1
SNG_N1[5] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[63] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
OUT[17] 1 1 0 0 0 0 0 1
OUT[10] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[24] 0.F13.B0 0.F12.B0 0.F13.B1 0.F13.B2 0.F13.B5 0.F13.B3 0.F13.B4 0.F13.B6
INT:MUX.IMUX_LOGICIN[47] 0.F13.B7 0.F12.B7 0.F12.B1 0.F12.B2 0.F12.B5 0.F12.B3 0.F12.B4 0.F12.B6
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[4] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN52_N 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[14] 1 1 0 0 0 0 1 0
OUT[7] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[25] 0.F13.B16 0.F12.B16 0.F13.B17 0.F13.B18 0.F13.B21 0.F13.B19 0.F13.B20 0.F13.B22
INT:MUX.IMUX_LOGICIN[48] 0.F13.B23 0.F12.B23 0.F12.B17 0.F12.B18 0.F12.B21 0.F12.B19 0.F12.B20 0.F12.B22
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[61] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[5] 1 1 0 0 0 0 1 0
OUT[22] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[26] 0.F13.B32 0.F12.B32 0.F13.B33 0.F13.B34 0.F13.B37 0.F13.B35 0.F13.B36 0.F13.B38
INT:MUX.IMUX_LOGICIN[49] 0.F13.B39 0.F12.B39 0.F12.B33 0.F12.B34 0.F12.B37 0.F12.B35 0.F12.B36 0.F12.B38
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[20] 1 1 0 0 0 0 1 0
OUT[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[27] 0.F13.B48 0.F12.B48 0.F13.B49 0.F13.B50 0.F13.B53 0.F13.B51 0.F13.B52 0.F13.B54
INT:MUX.IMUX_LOGICIN[50] 0.F13.B55 0.F12.B55 0.F12.B49 0.F12.B50 0.F12.B53 0.F12.B51 0.F12.B52 0.F12.B54
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2_S0 0 0 0 0 0 0 1 0
DBL_WW2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1_S0 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[11] 1 1 0 0 0 0 1 0
OUT[16] 1 1 0 0 0 1 0 0
OUT[21] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[29] 0.F18.B39 0.F19.B39 0.F19.B33 0.F19.B34 0.F19.B37 0.F19.B38 0.F19.B35 0.F19.B36
INT:MUX.IMUX_LOGICIN[51] 0.F18.B32 0.F19.B32 0.F18.B33 0.F18.B34 0.F18.B37 0.F18.B38 0.F18.B35 0.F18.B36
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[2] 0 0 0 0 0 0 0 1
DBL_WW2[1] 0 0 0 0 0 0 1 0
DBL_SS2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_E1[2] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
SNG_N1[2] 1 0 0 0 0 0 0 1
SNG_N1[6] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[43] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
OUT[8] 1 1 0 0 0 0 0 1
OUT[13] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[2] 0.F17.B48 0.F16.B48 0.F17.B49 0.F17.B50 0.F17.B53 0.F17.B51 0.F17.B52 0.F17.B54
INT:MUX.IMUX_LOGICIN[39] 0.F17.B55 0.F16.B55 0.F16.B49 0.F16.B50 0.F16.B53 0.F16.B51 0.F16.B52 0.F16.B54
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[23] 1 1 0 0 0 0 1 0
OUT[4] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[30] 0.F18.B23 0.F19.B23 0.F19.B17 0.F19.B18 0.F19.B21 0.F19.B22 0.F19.B19 0.F19.B20
INT:MUX.IMUX_LOGICIN[44] 0.F18.B16 0.F19.B16 0.F18.B17 0.F18.B18 0.F18.B21 0.F18.B22 0.F18.B19 0.F18.B20
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[1] 0 0 0 0 0 0 0 1
DBL_WW2[0] 0 0 0 0 0 0 1 0
DBL_SS2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_E1[1] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
SNG_N1[1] 1 0 0 0 0 0 0 1
SNG_N1[5] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[63] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
OUT[17] 1 1 0 0 0 0 0 1
OUT[10] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[31] 0.F14.B63 0.F15.B63 0.F15.B57 0.F15.B58 0.F15.B61 0.F15.B59 0.F15.B60 0.F15.B62
INT:MUX.IMUX_LOGICIN[9] 0.F14.B56 0.F15.B56 0.F14.B57 0.F14.B58 0.F14.B61 0.F14.B59 0.F14.B60 0.F14.B62
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2_S0 0 0 0 0 0 0 1 0
DBL_WW2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2_S0 0 0 0 1 0 0 0 0
DBL_NN2_S0 0 0 1 0 0 0 0 0
SNG_E1_S0 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1_S4 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1_S0 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[11] 1 1 0 0 0 0 1 0
OUT[16] 1 1 0 0 0 1 0 0
OUT[21] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[36] 0.F18.B7 0.F19.B7 0.F19.B1 0.F19.B2 0.F19.B5 0.F19.B6 0.F19.B4 0.F19.B3
INT:MUX.IMUX_LOGICIN[7] 0.F18.B0 0.F19.B0 0.F18.B1 0.F18.B2 0.F18.B5 0.F18.B6 0.F18.B4 0.F18.B3
PULLUP 0 0 0 0 0 0 0 0
DBL_WW2_N3 0 0 0 0 0 0 0 1
DBL_NW2[0] 0 0 0 0 0 0 1 0
DBL_SS2_N3 0 0 0 0 0 1 0 0
DBL_SW2_N3 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_W1[4] 0 1 0 0 0 0 0 1
SNG_W1_N3 0 1 0 0 0 0 1 0
SNG_E1[0] 0 1 0 0 0 1 0 0
SNG_E1_N7 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
SNG_N1[4] 1 0 0 0 0 0 0 1
SNG_N1[0] 1 0 0 0 0 0 1 0
IMUX_LOGICIN21_N 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
OUT[19] 1 1 0 0 0 0 0 1
OUT[2] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[37] 0.F13.B63 0.F12.B63 0.F12.B57 0.F12.B58 0.F12.B61 0.F12.B62 0.F12.B59 0.F12.B60
INT:MUX.IMUX_LOGICIN[61] 0.F13.B56 0.F12.B56 0.F13.B57 0.F13.B58 0.F13.B61 0.F13.B62 0.F13.B59 0.F13.B60
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2_S0 0 0 0 0 0 0 0 1
DBL_WW2[3] 0 0 0 0 0 0 1 0
DBL_SS2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_W1[3] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_E1[3] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
SNG_N1_S0 1 0 0 0 0 0 0 1
SNG_N1[7] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[13] 1 0 0 0 0 1 0 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
OUT[11] 1 1 0 0 0 0 0 1
OUT[16] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[21] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[38] 0.F13.B15 0.F12.B15 0.F12.B9 0.F12.B10 0.F12.B13 0.F12.B14 0.F12.B11 0.F12.B12
INT:MUX.IMUX_LOGICIN[62] 0.F13.B8 0.F12.B8 0.F13.B9 0.F13.B10 0.F13.B13 0.F13.B14 0.F13.B11 0.F13.B12
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[1] 0 0 0 0 0 0 0 1
DBL_WW2[0] 0 0 0 0 0 0 1 0
DBL_SS2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[4] 0 1 0 0 0 0 1 0
SNG_E1[0] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
SNG_N1[1] 1 0 0 0 0 0 0 1
SNG_N1[4] 1 0 0 0 0 0 1 0
IMUX_LOGICIN52_N 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
OUT[14] 1 1 0 0 0 0 0 1
OUT[7] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[3] 0.F17.B32 0.F16.B32 0.F17.B33 0.F17.B34 0.F17.B37 0.F17.B35 0.F17.B36 0.F17.B38
INT:MUX.IMUX_LOGICIN[40] 0.F17.B39 0.F16.B39 0.F16.B33 0.F16.B34 0.F16.B37 0.F16.B35 0.F16.B36 0.F16.B38
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[8] 1 1 0 0 0 0 1 0
OUT[13] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[41] 0.F17.B23 0.F16.B23 0.F16.B17 0.F16.B18 0.F16.B21 0.F16.B19 0.F16.B20 0.F16.B22
INT:MUX.IMUX_LOGICIN[4] 0.F17.B16 0.F16.B16 0.F17.B17 0.F17.B18 0.F17.B21 0.F17.B19 0.F17.B20 0.F17.B22
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[63] 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[17] 1 1 0 0 0 0 1 0
OUT[10] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[42] 0.F17.B7 0.F16.B7 0.F16.B1 0.F16.B2 0.F16.B5 0.F16.B3 0.F16.B4 0.F16.B6
INT:MUX.IMUX_LOGICIN[5] 0.F17.B0 0.F16.B0 0.F17.B1 0.F17.B2 0.F17.B5 0.F17.B3 0.F17.B4 0.F17.B6
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[0] 0 0 0 0 0 0 1 0
DBL_WW2_N3 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[4] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN21_N 1 0 0 0 0 0 0 1
SNG_N1[0] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[2] 1 1 0 0 0 0 1 0
OUT[19] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[45] 0.F17.B15 0.F16.B15 0.F16.B9 0.F16.B10 0.F16.B13 0.F16.B14 0.F16.B11 0.F16.B12
INT:MUX.IMUX_LOGICIN[6] 0.F17.B8 0.F16.B8 0.F17.B9 0.F17.B10 0.F17.B13 0.F17.B14 0.F17.B11 0.F17.B12
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[0] 0 0 0 0 0 0 0 1
DBL_WW2_N3 0 0 0 0 0 0 1 0
DBL_SS2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[4] 0 1 0 0 0 0 1 0
SNG_E1[0] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
SNG_N1[0] 1 0 0 0 0 0 0 1
SNG_N1[4] 1 0 0 0 0 0 1 0
IMUX_LOGICIN21_N 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
OUT[2] 1 1 0 0 0 0 0 1
OUT[19] 1 1 0 0 0 0 1 0
IMUX_GFAN[0] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[46] 0.F17.B63 0.F16.B63 0.F16.B57 0.F16.B58 0.F16.B61 0.F16.B62 0.F16.B59 0.F16.B60
INT:MUX.IMUX_LOGICIN[60] 0.F17.B56 0.F16.B56 0.F17.B57 0.F17.B58 0.F17.B61 0.F17.B62 0.F17.B59 0.F17.B60
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[3] 0 0 0 0 0 0 0 1
DBL_WW2[2] 0 0 0 0 0 0 1 0
DBL_SS2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_W1[3] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_E1[3] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
SNG_N1[3] 1 0 0 0 0 0 0 1
SNG_N1[7] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[43] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
OUT[23] 1 1 0 0 0 0 0 1
OUT[4] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[52] 0.F14.B39 0.F15.B39 0.F15.B33 0.F15.B34 0.F15.B37 0.F15.B38 0.F15.B35 0.F15.B36
INT:MUX.IMUX_LOGICIN[55] 0.F14.B32 0.F15.B32 0.F14.B33 0.F14.B34 0.F14.B37 0.F14.B38 0.F14.B35 0.F14.B36
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[3] 0 0 0 0 0 0 0 1
DBL_WW2[2] 0 0 0 0 0 0 1 0
DBL_SS2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_E1[3] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
SNG_N1[3] 1 0 0 0 0 0 0 1
SNG_N1[6] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[13] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
OUT[20] 1 1 0 0 0 0 0 1
OUT[1] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[63] 0.F18.B48 0.F19.B48 0.F18.B49 0.F18.B50 0.F18.B53 0.F18.B54 0.F18.B51 0.F18.B52
INT:MUX.IMUX_LOGICIN[8] 0.F18.B55 0.F19.B55 0.F19.B49 0.F19.B50 0.F19.B53 0.F19.B54 0.F19.B51 0.F19.B52
PULLUP 0 0 0 0 0 0 0 0
DBL_NW2[3] 0 0 0 0 0 0 0 1
DBL_WW2[2] 0 0 0 0 0 0 1 0
DBL_SS2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_E1[3] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
SNG_N1[3] 1 0 0 0 0 0 0 1
SNG_N1[7] 1 0 0 0 0 0 1 0
IMUX_LOGICIN[43] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
OUT[23] 1 1 0 0 0 0 0 1
OUT[4] 1 1 0 0 0 0 1 0
IMUX_GFAN[1] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_SR[0] 0.F20.B63 0.F20.B62 0.F20.B56 0.F20.B59 0.F20.B60 0.F20.B61 0.F20.B58 0.F20.B57
INT:MUX.IMUX_SR[1] 0.F20.B48 0.F20.B49 0.F20.B55 0.F20.B54 0.F20.B51 0.F20.B50 0.F20.B53 0.F20.B52
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 1 0 0 0 0 0 1
TIE_1 0 1 0 0 0 0 1 0
SNG_S1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
SNG_N1[6] 0 1 0 1 0 0 0 0
SNG_W1[6] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[43] 1 0 0 0 0 0 1 0
GCLK[14] 1 0 0 0 0 1 0 0
GCLK[15] 1 0 0 0 1 0 0 0
IMUX_LOGICIN[61] 1 0 0 1 0 0 0 0
IMUX_LOGICIN[63] 1 0 1 0 0 0 0 0
GCLK[12] 1 1 0 0 0 0 0 1
GCLK[13] 1 1 0 0 0 0 1 0
GCLK[8] 1 1 0 0 0 1 0 0
GCLK[9] 1 1 0 0 1 0 0 0
GCLK[10] 1 1 0 1 0 0 0 0
GCLK[11] 1 1 1 0 0 0 0 0
INT:MUX.QUAD_EE0[0] 0.F3.B15 0.F2.B15 0.F2.B12 0.F2.B13 0.F2.B10 0.F2.B14 0.F2.B11 0.F2.B9
INT:MUX.QUAD_SE0[0] 0.F2.B8 0.F3.B8 0.F3.B12 0.F3.B13 0.F3.B10 0.F3.B14 0.F3.B11 0.F3.B9
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[0] 0 0 0 0 0 0 0 1
QUAD_NE4[0] 0 0 0 0 0 0 1 0
QUAD_SW4[0] 0 0 0 0 0 1 0 0
QUAD_SE4[0] 0 0 0 0 1 0 0 0
QUAD_SS4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_EE2[0] 0 1 0 0 0 0 0 1
DBL_SS2[0] 0 1 0 0 0 0 1 0
DBL_SW2[0] 0 1 0 0 0 1 0 0
DBL_SE2[0] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[19] 1 0 0 0 0 0 0 1
OUT[12] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[14] 1 0 0 0 1 0 0 0
OUT[2] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[1] 0.F3.B31 0.F2.B31 0.F2.B28 0.F2.B29 0.F2.B26 0.F2.B30 0.F2.B27 0.F2.B25
INT:MUX.QUAD_SE0[1] 0.F2.B24 0.F3.B24 0.F3.B28 0.F3.B29 0.F3.B26 0.F3.B30 0.F3.B27 0.F3.B25
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[1] 0 0 0 0 0 0 0 1
QUAD_NE4[1] 0 0 0 0 0 0 1 0
QUAD_SW4[1] 0 0 0 0 0 1 0 0
QUAD_SE4[1] 0 0 0 0 1 0 0 0
QUAD_SS4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_EE2[1] 0 1 0 0 0 0 0 1
DBL_SS2[1] 0 1 0 0 0 0 1 0
DBL_SW2[1] 0 1 0 0 0 1 0 0
DBL_SE2[1] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[22] 1 0 0 0 0 0 0 1
OUT[15] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[17] 1 0 0 0 1 0 0 0
OUT[5] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[2] 0.F3.B47 0.F2.B47 0.F2.B44 0.F2.B45 0.F2.B42 0.F2.B46 0.F2.B43 0.F2.B41
INT:MUX.QUAD_SE0[2] 0.F2.B40 0.F3.B40 0.F3.B44 0.F3.B45 0.F3.B42 0.F3.B46 0.F3.B43 0.F3.B41
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[2] 0 0 0 0 0 0 0 1
QUAD_NE4[2] 0 0 0 0 0 0 1 0
QUAD_SW4[2] 0 0 0 0 0 1 0 0
QUAD_SE4[2] 0 0 0 0 1 0 0 0
QUAD_SS4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_EE2[2] 0 1 0 0 0 0 0 1
DBL_SS2[2] 0 1 0 0 0 0 1 0
DBL_SW2[2] 0 1 0 0 0 1 0 0
DBL_SE2[2] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[13] 1 0 0 0 0 0 0 1
OUT[18] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[20] 1 0 0 0 1 0 0 0
OUT[8] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[3] 0.F3.B63 0.F2.B63 0.F2.B60 0.F2.B61 0.F2.B58 0.F2.B62 0.F2.B59 0.F2.B57
INT:MUX.QUAD_SE0[3] 0.F2.B56 0.F3.B56 0.F3.B60 0.F3.B61 0.F3.B58 0.F3.B62 0.F3.B59 0.F3.B57
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[3] 0 0 0 0 0 0 0 1
QUAD_NE4[3] 0 0 0 0 0 0 1 0
QUAD_SW4[3] 0 0 0 0 0 1 0 0
QUAD_SE4[3] 0 0 0 0 1 0 0 0
QUAD_SS4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_EE2[3] 0 1 0 0 0 0 0 1
DBL_SS2[3] 0 1 0 0 0 0 1 0
DBL_SW2[3] 0 1 0 0 0 1 0 0
DBL_SE2[3] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[16] 1 0 0 0 0 0 0 1
OUT[21] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[23] 1 0 0 0 1 0 0 0
OUT[11] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[0] 0.F3.B0 0.F2.B0 0.F2.B3 0.F2.B1 0.F2.B2 0.F2.B5 0.F2.B6 0.F2.B4
INT:MUX.QUAD_NN0[0] 0.F2.B7 0.F3.B7 0.F3.B3 0.F3.B1 0.F3.B2 0.F3.B5 0.F3.B6 0.F3.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_EE4[0] 0 0 0 0 0 0 1 0
QUAD_SE4[0] 0 0 0 0 0 1 0 0
QUAD_NW4[0] 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_WW2_N3 0 1 0 0 0 0 0 1
DBL_EE2[0] 0 1 0 0 0 0 1 0
DBL_SE2[0] 0 1 0 0 0 1 0 0
DBL_NN2[0] 0 1 0 0 1 0 0 0
DBL_NW2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[19] 1 0 0 0 0 0 1 0
OUT[14] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[0] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[1] 0.F3.B16 0.F2.B16 0.F2.B19 0.F2.B17 0.F2.B18 0.F2.B21 0.F2.B22 0.F2.B20
INT:MUX.QUAD_NN0[1] 0.F2.B23 0.F3.B23 0.F3.B19 0.F3.B17 0.F3.B18 0.F3.B21 0.F3.B22 0.F3.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_EE4[1] 0 0 0 0 0 0 1 0
QUAD_SE4[1] 0 0 0 0 0 1 0 0
QUAD_NW4[1] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_EE2[1] 0 1 0 0 0 0 1 0
DBL_SE2[1] 0 1 0 0 0 1 0 0
DBL_NN2[1] 0 1 0 0 1 0 0 0
DBL_NW2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[22] 1 0 0 0 0 0 1 0
OUT[17] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[3] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[2] 0.F3.B32 0.F2.B32 0.F2.B35 0.F2.B33 0.F2.B34 0.F2.B37 0.F2.B38 0.F2.B36
INT:MUX.QUAD_NN0[2] 0.F2.B39 0.F3.B39 0.F3.B35 0.F3.B33 0.F3.B34 0.F3.B37 0.F3.B38 0.F3.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_EE4[2] 0 0 0 0 0 0 1 0
QUAD_SE4[2] 0 0 0 0 0 1 0 0
QUAD_NW4[2] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_EE2[2] 0 1 0 0 0 0 1 0
DBL_SE2[2] 0 1 0 0 0 1 0 0
DBL_NN2[2] 0 1 0 0 1 0 0 0
DBL_NW2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[13] 1 0 0 0 0 0 1 0
OUT[20] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[6] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[3] 0.F3.B48 0.F2.B48 0.F2.B51 0.F2.B49 0.F2.B50 0.F2.B53 0.F2.B54 0.F2.B52
INT:MUX.QUAD_NN0[3] 0.F2.B55 0.F3.B55 0.F3.B51 0.F3.B49 0.F3.B50 0.F3.B53 0.F3.B54 0.F3.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_EE4[3] 0 0 0 0 0 0 1 0
QUAD_SE4[3] 0 0 0 0 0 1 0 0
QUAD_NW4[3] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_EE2[3] 0 1 0 0 0 0 1 0
DBL_SE2[3] 0 1 0 0 0 1 0 0
DBL_NN2[3] 0 1 0 0 1 0 0 0
DBL_NW2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[16] 1 0 0 0 0 0 1 0
OUT[23] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[9] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[0] 0.F1.B0 0.F0.B0 0.F0.B3 0.F0.B1 0.F0.B2 0.F0.B6 0.F0.B5 0.F0.B4
INT:MUX.QUAD_WW0[0] 0.F0.B7 0.F1.B7 0.F1.B3 0.F1.B1 0.F1.B2 0.F1.B6 0.F1.B5 0.F1.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_SS4_N3 0 0 0 0 0 0 1 0
QUAD_SW4_N3 0 0 0 0 0 1 0 0
QUAD_NW4[0] 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_WW2_N3 0 1 0 0 0 0 0 1
DBL_SS2_N3 0 1 0 0 0 0 1 0
DBL_SW2_N3 0 1 0 0 0 1 0 0
DBL_NN2[0] 0 1 0 0 1 0 0 0
DBL_NW2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[14] 1 0 0 0 0 0 1 0
OUT[19] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[0] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[1] 0.F1.B16 0.F0.B16 0.F0.B19 0.F0.B17 0.F0.B18 0.F0.B22 0.F0.B21 0.F0.B20
INT:MUX.QUAD_WW0[1] 0.F0.B23 0.F1.B23 0.F1.B19 0.F1.B17 0.F1.B18 0.F1.B22 0.F1.B21 0.F1.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_SS4[0] 0 0 0 0 0 0 1 0
QUAD_SW4[0] 0 0 0 0 0 1 0 0
QUAD_NW4[1] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_SS2[0] 0 1 0 0 0 0 1 0
DBL_SW2[0] 0 1 0 0 0 1 0 0
DBL_NN2[1] 0 1 0 0 1 0 0 0
DBL_NW2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[17] 1 0 0 0 0 0 1 0
OUT[22] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[3] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[2] 0.F1.B32 0.F0.B32 0.F0.B35 0.F0.B33 0.F0.B34 0.F0.B38 0.F0.B37 0.F0.B36
INT:MUX.QUAD_WW0[2] 0.F0.B39 0.F1.B39 0.F1.B35 0.F1.B33 0.F1.B34 0.F1.B38 0.F1.B37 0.F1.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_SS4[1] 0 0 0 0 0 0 1 0
QUAD_SW4[1] 0 0 0 0 0 1 0 0
QUAD_NW4[2] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_SS2[1] 0 1 0 0 0 0 1 0
DBL_SW2[1] 0 1 0 0 0 1 0 0
DBL_NN2[2] 0 1 0 0 1 0 0 0
DBL_NW2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[20] 1 0 0 0 0 0 1 0
OUT[13] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[6] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[3] 0.F1.B48 0.F0.B48 0.F0.B51 0.F0.B49 0.F0.B50 0.F0.B54 0.F0.B53 0.F0.B52
INT:MUX.QUAD_WW0[3] 0.F0.B55 0.F1.B55 0.F1.B51 0.F1.B49 0.F1.B50 0.F1.B54 0.F1.B53 0.F1.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_SS4[2] 0 0 0 0 0 0 1 0
QUAD_SW4[2] 0 0 0 0 0 1 0 0
QUAD_NW4[3] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_SS2[2] 0 1 0 0 0 0 1 0
DBL_SW2[2] 0 1 0 0 0 1 0 0
DBL_NN2[3] 0 1 0 0 1 0 0 0
DBL_NW2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[23] 1 0 0 0 0 0 1 0
OUT[16] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[9] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[0] 0.F1.B15 0.F0.B15 0.F0.B12 0.F0.B10 0.F0.B14 0.F0.B11 0.F0.B9 0.F0.B13
INT:MUX.QUAD_SW0[0] 0.F0.B8 0.F1.B8 0.F1.B12 0.F1.B10 0.F1.B14 0.F1.B11 0.F1.B9 0.F1.B13
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_EE4[0] 0 0 0 0 0 0 1 0
QUAD_NW4[1] 0 0 0 0 0 1 0 0
QUAD_SW4[0] 0 0 0 0 1 0 0 0
QUAD_SE4[0] 0 0 0 1 0 0 0 0
QUAD_WW4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_EE2[0] 0 1 0 0 0 0 1 0
DBL_SS2[0] 0 1 0 0 0 1 0 0
DBL_SW2[0] 0 1 0 0 1 0 0 0
DBL_SE2[0] 0 1 0 1 0 0 0 0
DBL_NW2[1] 0 1 1 0 0 0 0 0
OUT[2] 1 0 0 0 0 0 0 1
OUT[19] 1 0 0 0 0 0 1 0
OUT[12] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[1] 0.F1.B31 0.F0.B31 0.F0.B28 0.F0.B26 0.F0.B30 0.F0.B27 0.F0.B25 0.F0.B29
INT:MUX.QUAD_SW0[1] 0.F0.B24 0.F1.B24 0.F1.B28 0.F1.B26 0.F1.B30 0.F1.B27 0.F1.B25 0.F1.B29
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_EE4[1] 0 0 0 0 0 0 1 0
QUAD_NW4[2] 0 0 0 0 0 1 0 0
QUAD_SW4[1] 0 0 0 0 1 0 0 0
QUAD_SE4[1] 0 0 0 1 0 0 0 0
QUAD_WW4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_EE2[1] 0 1 0 0 0 0 1 0
DBL_SS2[1] 0 1 0 0 0 1 0 0
DBL_SW2[1] 0 1 0 0 1 0 0 0
DBL_SE2[1] 0 1 0 1 0 0 0 0
DBL_NW2[2] 0 1 1 0 0 0 0 0
OUT[5] 1 0 0 0 0 0 0 1
OUT[22] 1 0 0 0 0 0 1 0
OUT[15] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[2] 0.F1.B47 0.F0.B47 0.F0.B44 0.F0.B42 0.F0.B46 0.F0.B43 0.F0.B41 0.F0.B45
INT:MUX.QUAD_SW0[2] 0.F0.B40 0.F1.B40 0.F1.B44 0.F1.B42 0.F1.B46 0.F1.B43 0.F1.B41 0.F1.B45
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_EE4[2] 0 0 0 0 0 0 1 0
QUAD_NW4[3] 0 0 0 0 0 1 0 0
QUAD_SW4[2] 0 0 0 0 1 0 0 0
QUAD_SE4[2] 0 0 0 1 0 0 0 0
QUAD_WW4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_EE2[2] 0 1 0 0 0 0 1 0
DBL_SS2[2] 0 1 0 0 0 1 0 0
DBL_SW2[2] 0 1 0 0 1 0 0 0
DBL_SE2[2] 0 1 0 1 0 0 0 0
DBL_NW2[3] 0 1 1 0 0 0 0 0
OUT[8] 1 0 0 0 0 0 0 1
OUT[13] 1 0 0 0 0 0 1 0
OUT[18] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[3] 0.F1.B63 0.F0.B63 0.F0.B60 0.F0.B58 0.F0.B62 0.F0.B59 0.F0.B57 0.F0.B61
INT:MUX.QUAD_SW0[3] 0.F0.B56 0.F1.B56 0.F1.B60 0.F1.B58 0.F1.B62 0.F1.B59 0.F1.B57 0.F1.B61
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_EE4[3] 0 0 0 0 0 0 1 0
QUAD_NW4_S0 0 0 0 0 0 1 0 0
QUAD_SW4[3] 0 0 0 0 1 0 0 0
QUAD_SE4[3] 0 0 0 1 0 0 0 0
QUAD_WW4_S0 0 0 1 0 0 0 0 0
DBL_WW2[3] 0 1 0 0 0 0 0 1
DBL_EE2[3] 0 1 0 0 0 0 1 0
DBL_SS2[3] 0 1 0 0 0 1 0 0
DBL_SW2[3] 0 1 0 0 1 0 0 0
DBL_SE2[3] 0 1 0 1 0 0 0 0
DBL_NW2_S0 0 1 1 0 0 0 0 0
OUT[11] 1 0 0 0 0 0 0 1
OUT[16] 1 0 0 0 0 0 1 0
OUT[21] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0

Tile INT_IOI

Cells: 1

Switchbox INT

spartan6 INT_IOI switchbox INT permanent buffers
DestinationSource
IMUX_LOGICIN20_BOUNCEIMUX_LOGICIN[20]
IMUX_LOGICIN36_BOUNCEIMUX_LOGICIN[36]
IMUX_LOGICIN44_BOUNCEIMUX_LOGICIN[44]
IMUX_LOGICIN62_BOUNCEIMUX_LOGICIN[62]
IMUX_LOGICIN21_BOUNCEIMUX_LOGICIN[21]
IMUX_LOGICIN28_BOUNCEIMUX_LOGICIN[28]
IMUX_LOGICIN52_BOUNCEIMUX_LOGICIN[52]
IMUX_LOGICIN60_BOUNCEIMUX_LOGICIN[60]
spartan6 INT_IOI switchbox INT muxes SNG_W0[0]
BitsDestination
SNG_W0[0]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_W0[1]
BitsDestination
SNG_W0[1]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_W0[2]
BitsDestination
SNG_W0[2]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_W0[3]
BitsDestination
SNG_W0[3]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_W0[4]
BitsDestination
SNG_W0[4]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_W0[5]
BitsDestination
SNG_W0[5]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_W0[6]
BitsDestination
SNG_W0[6]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_W0[7]
BitsDestination
SNG_W0[7]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_E0[0]
BitsDestination
SNG_E0[0]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_E0[1]
BitsDestination
SNG_E0[1]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_E0[2]
BitsDestination
SNG_E0[2]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_E0[3]
BitsDestination
SNG_E0[3]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_E0[4]
BitsDestination
SNG_E0[4]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_E0[5]
BitsDestination
SNG_E0[5]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_E0[6]
BitsDestination
SNG_E0[6]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_E0[7]
BitsDestination
SNG_E0[7]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_S0[0]
BitsDestination
SNG_S0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_S0[1]
BitsDestination
SNG_S0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_S0[2]
BitsDestination
SNG_S0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_S0[3]
BitsDestination
SNG_S0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_S0[4]
BitsDestination
SNG_S0[4]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_S0[5]
BitsDestination
SNG_S0[5]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_S0[6]
BitsDestination
SNG_S0[6]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_S0[7]
BitsDestination
SNG_S0[7]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_N0[0]
BitsDestination
SNG_N0[0]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_N0[1]
BitsDestination
SNG_N0[1]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_N0[2]
BitsDestination
SNG_N0[2]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes SNG_N0[3]
BitsDestination
SNG_N0[3]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_N0[4]
BitsDestination
SNG_N0[4]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes SNG_N0[5]
BitsDestination
SNG_N0[5]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes SNG_N0[6]
BitsDestination
SNG_N0[6]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes SNG_N0[7]
BitsDestination
SNG_N0[7]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_WW0[0]
BitsDestination
DBL_WW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_WW0[1]
BitsDestination
DBL_WW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_WW0[2]
BitsDestination
DBL_WW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_WW0[3]
BitsDestination
DBL_WW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_EE0[0]
BitsDestination
DBL_EE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_EE0[1]
BitsDestination
DBL_EE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_EE0[2]
BitsDestination
DBL_EE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_EE0[3]
BitsDestination
DBL_EE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_SS0[0]
BitsDestination
DBL_SS0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_SS0[1]
BitsDestination
DBL_SS0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_SS0[2]
BitsDestination
DBL_SS0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_SS0[3]
BitsDestination
DBL_SS0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_SW0[0]
BitsDestination
DBL_SW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_SW0[1]
BitsDestination
DBL_SW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_SW0[2]
BitsDestination
DBL_SW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_SW0[3]
BitsDestination
DBL_SW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_SE0[0]
BitsDestination
DBL_SE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_SE0[1]
BitsDestination
DBL_SE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_SE0[2]
BitsDestination
DBL_SE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_SE0[3]
BitsDestination
DBL_SE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_NN0[0]
BitsDestination
DBL_NN0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_NN0[1]
BitsDestination
DBL_NN0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_NN0[2]
BitsDestination
DBL_NN0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_NN0[3]
BitsDestination
DBL_NN0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_NW0[0]
BitsDestination
DBL_NW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_NW0[1]
BitsDestination
DBL_NW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_NW0[2]
BitsDestination
DBL_NW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_NW0[3]
BitsDestination
DBL_NW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes DBL_NE0[0]
BitsDestination
DBL_NE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes DBL_NE0[1]
BitsDestination
DBL_NE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes DBL_NE0[2]
BitsDestination
DBL_NE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes DBL_NE0[3]
BitsDestination
DBL_NE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_WW0[0]
BitsDestination
QUAD_WW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_WW0[1]
BitsDestination
QUAD_WW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_WW0[2]
BitsDestination
QUAD_WW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_WW0[3]
BitsDestination
QUAD_WW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_EE0[0]
BitsDestination
QUAD_EE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_EE0[1]
BitsDestination
QUAD_EE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_EE0[2]
BitsDestination
QUAD_EE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_EE0[3]
BitsDestination
QUAD_EE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_SS0[0]
BitsDestination
QUAD_SS0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_SS0[1]
BitsDestination
QUAD_SS0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_SS0[2]
BitsDestination
QUAD_SS0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_SS0[3]
BitsDestination
QUAD_SS0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_SW0[0]
BitsDestination
QUAD_SW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_SW0[1]
BitsDestination
QUAD_SW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_SW0[2]
BitsDestination
QUAD_SW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_SW0[3]
BitsDestination
QUAD_SW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_SE0[0]
BitsDestination
QUAD_SE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_SE0[1]
BitsDestination
QUAD_SE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_SE0[2]
BitsDestination
QUAD_SE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_SE0[3]
BitsDestination
QUAD_SE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_NN0[0]
BitsDestination
QUAD_NN0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_NN0[1]
BitsDestination
QUAD_NN0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_NN0[2]
BitsDestination
QUAD_NN0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_NN0[3]
BitsDestination
QUAD_NN0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_NW0[0]
BitsDestination
QUAD_NW0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_NW0[1]
BitsDestination
QUAD_NW0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_NW0[2]
BitsDestination
QUAD_NW0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_NW0[3]
BitsDestination
QUAD_NW0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes QUAD_NE0[0]
BitsDestination
QUAD_NE0[0]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes QUAD_NE0[1]
BitsDestination
QUAD_NE0[1]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes QUAD_NE0[2]
BitsDestination
QUAD_NE0[2]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes QUAD_NE0[3]
BitsDestination
QUAD_NE0[3]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_GFAN[0]
BitsDestination
IMUX_GFAN[0]
Source
IMUX_LOGICIN[53]
spartan6 INT_IOI switchbox INT muxes IMUX_GFAN[1]
BitsDestination
IMUX_GFAN[1]
Source
IMUX_LOGICIN[53]
spartan6 INT_IOI switchbox INT muxes IMUX_CLK[0]
BitsDestination
IMUX_CLK[0]
Source
IMUX_LOGICIN[53]
spartan6 INT_IOI switchbox INT muxes IMUX_CLK[1]
BitsDestination
IMUX_CLK[1]
Source
IMUX_LOGICIN[53]
spartan6 INT_IOI switchbox INT muxes IMUX_SR[0]
BitsDestination
IMUX_SR[0]
Source
IMUX_LOGICIN[63]
spartan6 INT_IOI switchbox INT muxes IMUX_SR[1]
BitsDestination
IMUX_SR[1]
Source
IMUX_LOGICIN[63]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[0]
BitsDestination
IMUX_LOGICIN[0]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[1]
BitsDestination
IMUX_LOGICIN[1]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[2]
BitsDestination
IMUX_LOGICIN[2]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[3]
BitsDestination
IMUX_LOGICIN[3]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[5]
BitsDestination
IMUX_LOGICIN[5]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[6]
BitsDestination
IMUX_LOGICIN[6]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[7]
BitsDestination
IMUX_LOGICIN[7]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[8]
BitsDestination
IMUX_LOGICIN[8]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[9]
BitsDestination
IMUX_LOGICIN[9]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[11]
BitsDestination
IMUX_LOGICIN[11]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[12]
BitsDestination
IMUX_LOGICIN[12]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[13]
BitsDestination
IMUX_LOGICIN[13]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[14]
BitsDestination
IMUX_LOGICIN[14]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[15]
BitsDestination
IMUX_LOGICIN[15]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[16]
BitsDestination
IMUX_LOGICIN[16]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[17]
BitsDestination
IMUX_LOGICIN[17]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[18]
BitsDestination
IMUX_LOGICIN[18]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[19]
BitsDestination
IMUX_LOGICIN[19]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[20]
BitsDestination
IMUX_LOGICIN[20]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[21]
BitsDestination
IMUX_LOGICIN[21]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[22]
BitsDestination
IMUX_LOGICIN[22]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[23]
BitsDestination
IMUX_LOGICIN[23]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[24]
BitsDestination
IMUX_LOGICIN[24]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[25]
BitsDestination
IMUX_LOGICIN[25]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[26]
BitsDestination
IMUX_LOGICIN[26]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[27]
BitsDestination
IMUX_LOGICIN[27]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[28]
BitsDestination
IMUX_LOGICIN[28]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[29]
BitsDestination
IMUX_LOGICIN[29]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[30]
BitsDestination
IMUX_LOGICIN[30]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[31]
BitsDestination
IMUX_LOGICIN[31]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[32]
BitsDestination
IMUX_LOGICIN[32]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[33]
BitsDestination
IMUX_LOGICIN[33]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[34]
BitsDestination
IMUX_LOGICIN[34]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[35]
BitsDestination
IMUX_LOGICIN[35]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[36]
BitsDestination
IMUX_LOGICIN[36]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[37]
BitsDestination
IMUX_LOGICIN[37]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[38]
BitsDestination
IMUX_LOGICIN[38]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[39]
BitsDestination
IMUX_LOGICIN[39]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[40]
BitsDestination
IMUX_LOGICIN[40]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[41]
BitsDestination
IMUX_LOGICIN[41]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[42]
BitsDestination
IMUX_LOGICIN[42]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[43]
BitsDestination
IMUX_LOGICIN[43]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[44]
BitsDestination
IMUX_LOGICIN[44]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[45]
BitsDestination
IMUX_LOGICIN[45]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[46]
BitsDestination
IMUX_LOGICIN[46]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[47]
BitsDestination
IMUX_LOGICIN[47]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[48]
BitsDestination
IMUX_LOGICIN[48]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[49]
BitsDestination
IMUX_LOGICIN[49]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[50]
BitsDestination
IMUX_LOGICIN[50]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[51]
BitsDestination
IMUX_LOGICIN[51]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[52]
BitsDestination
IMUX_LOGICIN[52]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[53]
BitsDestination
IMUX_LOGICIN[53]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[54]
BitsDestination
IMUX_LOGICIN[54]
Source
OUT[22]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[55]
BitsDestination
IMUX_LOGICIN[55]
Source
OUT[20]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[56]
BitsDestination
IMUX_LOGICIN[56]
Source
OUT[19]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[57]
BitsDestination
IMUX_LOGICIN[57]
Source
OUT[17]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[58]
BitsDestination
IMUX_LOGICIN[58]
Source
OUT[18]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[59]
BitsDestination
IMUX_LOGICIN[59]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[60]
BitsDestination
IMUX_LOGICIN[60]
Source
OUT[23]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[61]
BitsDestination
IMUX_LOGICIN[61]
Source
OUT[21]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[62]
BitsDestination
IMUX_LOGICIN[62]
Source
OUT[14]
spartan6 INT_IOI switchbox INT muxes IMUX_LOGICIN[63]
BitsDestination
IMUX_LOGICIN[63]
Source
OUT[23]

Bitstream

spartan6 INT_IOI rect MAIN
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21
B63 - - - - - - - - - - - - - - - - - - - - - -
B62 - - - - - - - - - - - - - - - - - - - - - -
B61 - - - - - - - - - - - - - - - - - - - - - -
B60 - - - - - - - - - - - - - - - - - - - - - -
B59 - - - - - - - - - - - - - - - - - - - - - -
B58 - - - - - - - - - - - - - - - - - - - - - -
B57 - - - - - - - - - - - - - - - - - - - - - -
B56 - - - - - - - - - - - - - - - - - - - - - -
B55 - - - - - - - - - - - - - - - - - - - - - -
B54 - - - - - - - - - - - - - - - - - - - - - -
B53 - - - - - - - - - - - - - - - - - - - - - -
B52 - - - - - - - - - - - - - - - - - - - - - -
B51 - - - - - - - - - - - - - - - - - - - - - -
B50 - - - - - - - - - - - - - - - - - - - - - -
B49 - - - - - - - - - - - - - - - - - - - - - -
B48 - - - - - - - - - - - - - - - - - - - - - -
B47 - - - - - - - - - - - - - - - - - - - - - -
B46 - - - - - - - - - - - - - - - - - - - - - -
B45 - - - - - - - - - - - - - - - - - - - - - -
B44 - - - - - - - - - - - - - - - - - - - - - -
B43 - - - - - - - - - - - - - - - - - - - - - -
B42 - - - - - - - - - - - - - - - - - - - - - -
B41 - - - - - - - - - - - - - - - - - - - - - -
B40 - - - - - - - - - - - - - - - - - - - - - -
B39 - - - - - - - - - - - - - - - - - - - - - -
B38 - - - - - - - - - - - - - - - - - - - - - -
B37 - - - - - - - - - - - - - - - - - - - - - -
B36 - - - - - - - - - - - - - - - - - - - - - -
B35 - - - - - - - - - - - - - - - - - - - - - -
B34 - - - - - - - - - - - - - - - - - - - - - -
B33 - - - - - - - - - - - - - - - - - - - - - -
B32 - - - - - - - - - - - - - - - - - - - - - -
B31 - - - - - - - - - - - - - - - - - - - - - -
B30 - - - - - - - - - - - - - - - - - - - - - -
B29 - - - - - - - - - - - - - - - - - - - - - -
B28 - - - - - - - - - - - - - - - - - - - - - -
B27 - - - - - - - - - - - - - - - - - - - - - -
B26 - - - - - - - - - - - - - - - - - - - - - -
B25 - - - - - - - - - - - - - - - - - - - - - -
B24 - - - - - - - - - - - - - - - - - - - - - -
B23 - - - - - - - - - - - - - - - - - - - - - -
B22 - - - - - - - - - - - - - - - - - - - - - -
B21 - - - - - - - - - - - - - - - - - - - - - -
B20 - - - - - - - - - - - - - - - - - - - - - -
B19 - - - - - - - - - - - - - - - - - - - - - -
B18 - - - - - - - - - - - - - - - - - - - - - -
B17 - - - - - - - - - - - - - - - - - - - - - -
B16 - - - - - - - - - - - - - - - - - - - - - -
B15 - - - - - - - - - - - - - - - - - - - - - -
B14 - - - - - - - - - - - - - - - - - - - - - -
B13 - - - - - - - - - - - - - - - - - - - - - -
B12 - - - - - - - - - - - - - - - - - - - - - -
B11 - - - - - - - - - - - - - - - - - - - - - -
B10 - - - - - - - - - - - - - - - - - - - - - -
B9 - - - - - - - - - - - - - - - - - - - - - -
B8 - - - - - - - - - - - - - - - - - - - - - -
B7 - - - - - - - - - - - - - - - - - - - - - -
B6 - - - - - - - - - - - - - - - - - - - - - -
B5 - - - - - - - - - - - - - - - - - - - - - -
B4 - - - - - - - - - - - - - - - - - - - - - -
B3 - - - - - - - - - - - - - - - - - - - - - -
B2 - - - - - - - - - - - - - - - - - - - - - -
B1 - - - - - - - - - - - - - - - - - - - - - -
B0 - - - - - - - - - - - - - - - - - - - - - -
### Bitstream
spartan6 INT_IOI rect R0
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20
B63 INT:MUX.QUAD_SS0[3][6] INT:MUX.QUAD_SS0[3][7] INT:MUX.QUAD_EE0[3][6] INT:MUX.QUAD_EE0[3][7] INT:MUX.DBL_WW0[3][6] INT:MUX.DBL_WW0[3][7] INT:MUX.DBL_SS0[3][6] INT:MUX.DBL_SS0[3][7] INT:MUX.SNG_S0[4][6] INT:MUX.SNG_S0[4][7] INT:MUX.SNG_S0[3][6] INT:MUX.SNG_S0[3][7] INT:MUX.IMUX_LOGICIN[37][6] INT:MUX.IMUX_LOGICIN[37][7] INT:MUX.IMUX_LOGICIN[31][7] INT:MUX.IMUX_LOGICIN[31][6] INT:MUX.IMUX_LOGICIN[46][6] INT:MUX.IMUX_LOGICIN[46][7] INT:MUX.IMUX_LOGICIN[59][7] INT:MUX.IMUX_LOGICIN[59][6] INT:MUX.IMUX_SR[0][7]
B62 INT:MUX.QUAD_SS0[3][3] INT:MUX.QUAD_SW0[3][3] INT:MUX.QUAD_EE0[3][2] INT:MUX.QUAD_SE0[3][2] INT:MUX.DBL_WW0[3][3] INT:MUX.DBL_SW0[3][3] INT:MUX.DBL_SS0[3][3] INT:MUX.DBL_SE0[3][3] INT:MUX.SNG_S0[4][3] INT:MUX.SNG_W0[2][3] INT:MUX.SNG_S0[3][3] INT:MUX.SNG_E0[4][3] INT:MUX.IMUX_LOGICIN[37][0] INT:MUX.IMUX_LOGICIN[61][0] INT:MUX.IMUX_LOGICIN[9][0] INT:MUX.IMUX_LOGICIN[31][0] INT:MUX.IMUX_LOGICIN[46][0] INT:MUX.IMUX_LOGICIN[60][0] INT:MUX.IMUX_LOGICIN[19][0] INT:MUX.IMUX_LOGICIN[59][0] INT:MUX.IMUX_SR[0][6]
B61 INT:MUX.QUAD_SS0[3][0] INT:MUX.QUAD_SW0[3][0] INT:MUX.QUAD_EE0[3][4] INT:MUX.QUAD_SE0[3][4] INT:MUX.DBL_WW0[3][2] INT:MUX.DBL_SW0[3][2] INT:MUX.DBL_SS0[3][2] INT:MUX.DBL_SE0[3][2] INT:MUX.SNG_S0[4][2] INT:MUX.SNG_W0[2][2] INT:MUX.SNG_S0[3][2] INT:MUX.SNG_E0[4][2] INT:MUX.IMUX_LOGICIN[37][3] INT:MUX.IMUX_LOGICIN[61][3] INT:MUX.IMUX_LOGICIN[9][3] INT:MUX.IMUX_LOGICIN[31][3] INT:MUX.IMUX_LOGICIN[46][3] INT:MUX.IMUX_LOGICIN[60][3] INT:MUX.IMUX_LOGICIN[19][3] INT:MUX.IMUX_LOGICIN[59][3] INT:MUX.IMUX_SR[0][2]
B60 INT:MUX.QUAD_SS0[3][5] INT:MUX.QUAD_SW0[3][5] INT:MUX.QUAD_EE0[3][5] INT:MUX.QUAD_SE0[3][5] INT:MUX.DBL_WW0[3][1] INT:MUX.DBL_SW0[3][1] INT:MUX.DBL_SS0[3][1] INT:MUX.DBL_SE0[3][1] INT:MUX.SNG_S0[4][1] INT:MUX.SNG_W0[2][1] INT:MUX.SNG_S0[3][1] INT:MUX.SNG_E0[4][1] INT:MUX.IMUX_LOGICIN[37][1] INT:MUX.IMUX_LOGICIN[61][1] INT:MUX.IMUX_LOGICIN[9][1] INT:MUX.IMUX_LOGICIN[31][1] INT:MUX.IMUX_LOGICIN[46][1] INT:MUX.IMUX_LOGICIN[60][1] INT:MUX.IMUX_LOGICIN[19][1] INT:MUX.IMUX_LOGICIN[59][1] INT:MUX.IMUX_SR[0][3]
B59 INT:MUX.QUAD_SS0[3][2] INT:MUX.QUAD_SW0[3][2] INT:MUX.QUAD_EE0[3][1] INT:MUX.QUAD_SE0[3][1] INT:MUX.DBL_WW0[3][0] INT:MUX.DBL_SW0[3][0] INT:MUX.DBL_SS0[3][0] INT:MUX.DBL_SE0[3][0] INT:MUX.SNG_S0[4][0] INT:MUX.SNG_W0[2][0] INT:MUX.SNG_S0[3][0] INT:MUX.SNG_E0[4][0] INT:MUX.IMUX_LOGICIN[37][2] INT:MUX.IMUX_LOGICIN[61][2] INT:MUX.IMUX_LOGICIN[9][2] INT:MUX.IMUX_LOGICIN[31][2] INT:MUX.IMUX_LOGICIN[46][2] INT:MUX.IMUX_LOGICIN[60][2] INT:MUX.IMUX_LOGICIN[19][2] INT:MUX.IMUX_LOGICIN[59][2] INT:MUX.IMUX_SR[0][4]
B58 INT:MUX.QUAD_SS0[3][4] INT:MUX.QUAD_SW0[3][4] INT:MUX.QUAD_EE0[3][3] INT:MUX.QUAD_SE0[3][3] INT:MUX.DBL_WW0[3][5] INT:MUX.DBL_SW0[3][5] INT:MUX.DBL_SS0[3][5] INT:MUX.DBL_SE0[3][5] INT:MUX.SNG_S0[4][5] INT:MUX.SNG_W0[2][5] INT:MUX.SNG_S0[3][5] INT:MUX.SNG_E0[4][5] INT:MUX.IMUX_LOGICIN[37][4] INT:MUX.IMUX_LOGICIN[61][4] INT:MUX.IMUX_LOGICIN[9][4] INT:MUX.IMUX_LOGICIN[31][4] INT:MUX.IMUX_LOGICIN[46][4] INT:MUX.IMUX_LOGICIN[60][4] INT:MUX.IMUX_LOGICIN[19][4] INT:MUX.IMUX_LOGICIN[59][4] INT:MUX.IMUX_SR[0][1]
B57 INT:MUX.QUAD_SS0[3][1] INT:MUX.QUAD_SW0[3][1] INT:MUX.QUAD_EE0[3][0] INT:MUX.QUAD_SE0[3][0] INT:MUX.DBL_WW0[3][4] INT:MUX.DBL_SW0[3][4] INT:MUX.DBL_SS0[3][4] INT:MUX.DBL_SE0[3][4] INT:MUX.SNG_S0[4][4] INT:MUX.SNG_W0[2][4] INT:MUX.SNG_S0[3][4] INT:MUX.SNG_E0[4][4] INT:MUX.IMUX_LOGICIN[37][5] INT:MUX.IMUX_LOGICIN[61][5] INT:MUX.IMUX_LOGICIN[9][5] INT:MUX.IMUX_LOGICIN[31][5] INT:MUX.IMUX_LOGICIN[46][5] INT:MUX.IMUX_LOGICIN[60][5] INT:MUX.IMUX_LOGICIN[19][5] INT:MUX.IMUX_LOGICIN[59][5] INT:MUX.IMUX_SR[0][0]
B56 INT:MUX.QUAD_SW0[3][7] INT:MUX.QUAD_SW0[3][6] INT:MUX.QUAD_SE0[3][7] INT:MUX.QUAD_SE0[3][6] INT:MUX.DBL_SW0[3][7] INT:MUX.DBL_SW0[3][6] INT:MUX.DBL_SE0[3][7] INT:MUX.DBL_SE0[3][6] INT:MUX.SNG_W0[2][7] INT:MUX.SNG_W0[2][6] INT:MUX.SNG_E0[4][7] INT:MUX.SNG_E0[4][6] INT:MUX.IMUX_LOGICIN[61][6] INT:MUX.IMUX_LOGICIN[61][7] INT:MUX.IMUX_LOGICIN[9][7] INT:MUX.IMUX_LOGICIN[9][6] INT:MUX.IMUX_LOGICIN[60][6] INT:MUX.IMUX_LOGICIN[60][7] INT:MUX.IMUX_LOGICIN[19][7] INT:MUX.IMUX_LOGICIN[19][6] INT:MUX.IMUX_SR[0][5]
B55 INT:MUX.QUAD_WW0[3][7] INT:MUX.QUAD_WW0[3][6] INT:MUX.QUAD_NN0[3][7] INT:MUX.QUAD_NN0[3][6] INT:MUX.DBL_NW0[3][7] INT:MUX.DBL_NW0[3][6] INT:MUX.DBL_NE0[3][7] INT:MUX.DBL_NE0[3][6] INT:MUX.SNG_W0[4][7] INT:MUX.SNG_W0[4][6] INT:MUX.SNG_E0[2][7] INT:MUX.SNG_E0[2][6] INT:MUX.IMUX_LOGICIN[50][6] INT:MUX.IMUX_LOGICIN[50][7] INT:MUX.IMUX_LOGICIN[14][7] INT:MUX.IMUX_LOGICIN[14][6] INT:MUX.IMUX_LOGICIN[39][6] INT:MUX.IMUX_LOGICIN[39][7] INT:MUX.IMUX_LOGICIN[8][7] INT:MUX.IMUX_LOGICIN[8][6] INT:MUX.IMUX_SR[1][5]
B54 INT:MUX.QUAD_NW0[3][2] INT:MUX.QUAD_WW0[3][2] INT:MUX.QUAD_NE0[3][1] INT:MUX.QUAD_NN0[3][1] INT:MUX.DBL_NN0[3][5] INT:MUX.DBL_NW0[3][5] INT:MUX.DBL_EE0[3][5] INT:MUX.DBL_NE0[3][5] INT:MUX.SNG_N0[2][5] INT:MUX.SNG_W0[4][5] INT:MUX.SNG_N0[7][5] INT:MUX.SNG_E0[2][5] INT:MUX.IMUX_LOGICIN[50][0] INT:MUX.IMUX_LOGICIN[27][0] INT:MUX.IMUX_LOGICIN[28][0] INT:MUX.IMUX_LOGICIN[14][0] INT:MUX.IMUX_LOGICIN[39][0] INT:MUX.IMUX_LOGICIN[2][0] INT:MUX.IMUX_LOGICIN[63][0] INT:MUX.IMUX_LOGICIN[8][0] INT:MUX.IMUX_SR[1][4]
B53 INT:MUX.QUAD_NW0[3][1] INT:MUX.QUAD_WW0[3][1] INT:MUX.QUAD_NE0[3][2] INT:MUX.QUAD_NN0[3][2] INT:MUX.DBL_NN0[3][4] INT:MUX.DBL_NW0[3][4] INT:MUX.DBL_EE0[3][4] INT:MUX.DBL_NE0[3][4] INT:MUX.SNG_N0[2][4] INT:MUX.SNG_W0[4][4] INT:MUX.SNG_N0[7][4] INT:MUX.SNG_E0[2][4] INT:MUX.IMUX_LOGICIN[50][3] INT:MUX.IMUX_LOGICIN[27][3] INT:MUX.IMUX_LOGICIN[28][3] INT:MUX.IMUX_LOGICIN[14][3] INT:MUX.IMUX_LOGICIN[39][3] INT:MUX.IMUX_LOGICIN[2][3] INT:MUX.IMUX_LOGICIN[63][3] INT:MUX.IMUX_LOGICIN[8][3] INT:MUX.IMUX_SR[1][1]
B52 INT:MUX.QUAD_NW0[3][0] INT:MUX.QUAD_WW0[3][0] INT:MUX.QUAD_NE0[3][0] INT:MUX.QUAD_NN0[3][0] INT:MUX.DBL_NN0[3][0] INT:MUX.DBL_NW0[3][0] INT:MUX.DBL_EE0[3][0] INT:MUX.DBL_NE0[3][0] INT:MUX.SNG_N0[2][0] INT:MUX.SNG_W0[4][0] INT:MUX.SNG_N0[7][0] INT:MUX.SNG_E0[2][0] INT:MUX.IMUX_LOGICIN[50][1] INT:MUX.IMUX_LOGICIN[27][1] INT:MUX.IMUX_LOGICIN[28][1] INT:MUX.IMUX_LOGICIN[14][1] INT:MUX.IMUX_LOGICIN[39][1] INT:MUX.IMUX_LOGICIN[2][1] INT:MUX.IMUX_LOGICIN[63][1] INT:MUX.IMUX_LOGICIN[8][1] INT:MUX.IMUX_SR[1][0]
B51 INT:MUX.QUAD_NW0[3][5] INT:MUX.QUAD_WW0[3][5] INT:MUX.QUAD_NE0[3][5] INT:MUX.QUAD_NN0[3][5] INT:MUX.DBL_NN0[3][1] INT:MUX.DBL_NW0[3][1] INT:MUX.DBL_EE0[3][1] INT:MUX.DBL_NE0[3][1] INT:MUX.SNG_N0[2][1] INT:MUX.SNG_W0[4][1] INT:MUX.SNG_N0[7][1] INT:MUX.SNG_E0[2][1] INT:MUX.IMUX_LOGICIN[50][2] INT:MUX.IMUX_LOGICIN[27][2] INT:MUX.IMUX_LOGICIN[28][2] INT:MUX.IMUX_LOGICIN[14][2] INT:MUX.IMUX_LOGICIN[39][2] INT:MUX.IMUX_LOGICIN[2][2] INT:MUX.IMUX_LOGICIN[63][2] INT:MUX.IMUX_LOGICIN[8][2] INT:MUX.IMUX_SR[1][3]
B50 INT:MUX.QUAD_NW0[3][3] INT:MUX.QUAD_WW0[3][3] INT:MUX.QUAD_NE0[3][3] INT:MUX.QUAD_NN0[3][3] INT:MUX.DBL_NN0[3][3] INT:MUX.DBL_NW0[3][3] INT:MUX.DBL_EE0[3][3] INT:MUX.DBL_NE0[3][3] INT:MUX.SNG_N0[2][3] INT:MUX.SNG_W0[4][3] INT:MUX.SNG_N0[7][3] INT:MUX.SNG_E0[2][3] INT:MUX.IMUX_LOGICIN[50][4] INT:MUX.IMUX_LOGICIN[27][4] INT:MUX.IMUX_LOGICIN[28][4] INT:MUX.IMUX_LOGICIN[14][4] INT:MUX.IMUX_LOGICIN[39][4] INT:MUX.IMUX_LOGICIN[2][4] INT:MUX.IMUX_LOGICIN[63][4] INT:MUX.IMUX_LOGICIN[8][4] INT:MUX.IMUX_SR[1][2]
B49 INT:MUX.QUAD_NW0[3][4] INT:MUX.QUAD_WW0[3][4] INT:MUX.QUAD_NE0[3][4] INT:MUX.QUAD_NN0[3][4] INT:MUX.DBL_NN0[3][2] INT:MUX.DBL_NW0[3][2] INT:MUX.DBL_EE0[3][2] INT:MUX.DBL_NE0[3][2] INT:MUX.SNG_N0[2][2] INT:MUX.SNG_W0[4][2] INT:MUX.SNG_N0[7][2] INT:MUX.SNG_E0[2][2] INT:MUX.IMUX_LOGICIN[50][5] INT:MUX.IMUX_LOGICIN[27][5] INT:MUX.IMUX_LOGICIN[28][5] INT:MUX.IMUX_LOGICIN[14][5] INT:MUX.IMUX_LOGICIN[39][5] INT:MUX.IMUX_LOGICIN[2][5] INT:MUX.IMUX_LOGICIN[63][5] INT:MUX.IMUX_LOGICIN[8][5] INT:MUX.IMUX_SR[1][6]
B48 INT:MUX.QUAD_NW0[3][6] INT:MUX.QUAD_NW0[3][7] INT:MUX.QUAD_NE0[3][6] INT:MUX.QUAD_NE0[3][7] INT:MUX.DBL_NN0[3][6] INT:MUX.DBL_NN0[3][7] INT:MUX.DBL_EE0[3][6] INT:MUX.DBL_EE0[3][7] INT:MUX.SNG_N0[2][6] INT:MUX.SNG_N0[2][7] INT:MUX.SNG_N0[7][6] INT:MUX.SNG_N0[7][7] INT:MUX.IMUX_LOGICIN[27][6] INT:MUX.IMUX_LOGICIN[27][7] INT:MUX.IMUX_LOGICIN[28][7] INT:MUX.IMUX_LOGICIN[28][6] INT:MUX.IMUX_LOGICIN[2][6] INT:MUX.IMUX_LOGICIN[2][7] INT:MUX.IMUX_LOGICIN[63][7] INT:MUX.IMUX_LOGICIN[63][6] INT:MUX.IMUX_SR[1][7]
B47 INT:MUX.QUAD_SS0[2][6] INT:MUX.QUAD_SS0[2][7] INT:MUX.QUAD_EE0[2][6] INT:MUX.QUAD_EE0[2][7] INT:MUX.DBL_WW0[2][6] INT:MUX.DBL_WW0[2][7] INT:MUX.DBL_SS0[2][6] INT:MUX.DBL_SS0[2][7] INT:MUX.SNG_S0[7][6] INT:MUX.SNG_S0[7][7] INT:MUX.SNG_S0[2][6] INT:MUX.SNG_S0[2][7] INT:MUX.IMUX_LOGICIN[53][6] INT:MUX.IMUX_LOGICIN[53][7] INT:MUX.IMUX_LOGICIN[32][7] INT:MUX.IMUX_LOGICIN[32][6] INT:MUX.IMUX_LOGICIN[21][6] INT:MUX.IMUX_LOGICIN[21][7] INT:MUX.IMUX_LOGICIN[58][7] INT:MUX.IMUX_LOGICIN[58][6] -
B46 INT:MUX.QUAD_SS0[2][3] INT:MUX.QUAD_SW0[2][3] INT:MUX.QUAD_EE0[2][2] INT:MUX.QUAD_SE0[2][2] INT:MUX.DBL_WW0[2][3] INT:MUX.DBL_SW0[2][3] INT:MUX.DBL_SS0[2][3] INT:MUX.DBL_SE0[2][3] INT:MUX.SNG_S0[7][3] INT:MUX.SNG_W0[1][3] INT:MUX.SNG_S0[2][3] INT:MUX.SNG_E0[7][3] INT:MUX.IMUX_LOGICIN[53][0] INT:MUX.IMUX_LOGICIN[1][0] - INT:MUX.IMUX_LOGICIN[32][0] INT:MUX.IMUX_LOGICIN[21][0] INT:MUX.IMUX_LOGICIN[22][0] INT:MUX.IMUX_LOGICIN[18][0] INT:MUX.IMUX_LOGICIN[58][0] -
B45 INT:MUX.QUAD_SS0[2][0] INT:MUX.QUAD_SW0[2][0] INT:MUX.QUAD_EE0[2][4] INT:MUX.QUAD_SE0[2][4] INT:MUX.DBL_WW0[2][2] INT:MUX.DBL_SW0[2][2] INT:MUX.DBL_SS0[2][2] INT:MUX.DBL_SE0[2][2] INT:MUX.SNG_S0[7][2] INT:MUX.SNG_W0[1][2] INT:MUX.SNG_S0[2][2] INT:MUX.SNG_E0[7][2] INT:MUX.IMUX_LOGICIN[53][3] INT:MUX.IMUX_LOGICIN[1][3] - INT:MUX.IMUX_LOGICIN[32][3] INT:MUX.IMUX_LOGICIN[21][3] INT:MUX.IMUX_LOGICIN[22][3] INT:MUX.IMUX_LOGICIN[18][3] INT:MUX.IMUX_LOGICIN[58][3] -
B44 INT:MUX.QUAD_SS0[2][5] INT:MUX.QUAD_SW0[2][5] INT:MUX.QUAD_EE0[2][5] INT:MUX.QUAD_SE0[2][5] INT:MUX.DBL_WW0[2][1] INT:MUX.DBL_SW0[2][1] INT:MUX.DBL_SS0[2][1] INT:MUX.DBL_SE0[2][1] INT:MUX.SNG_S0[7][1] INT:MUX.SNG_W0[1][1] INT:MUX.SNG_S0[2][1] INT:MUX.SNG_E0[7][1] INT:MUX.IMUX_LOGICIN[53][1] INT:MUX.IMUX_LOGICIN[1][1] - INT:MUX.IMUX_LOGICIN[32][1] INT:MUX.IMUX_LOGICIN[21][1] INT:MUX.IMUX_LOGICIN[22][1] INT:MUX.IMUX_LOGICIN[18][1] INT:MUX.IMUX_LOGICIN[58][1] -
B43 INT:MUX.QUAD_SS0[2][2] INT:MUX.QUAD_SW0[2][2] INT:MUX.QUAD_EE0[2][1] INT:MUX.QUAD_SE0[2][1] INT:MUX.DBL_WW0[2][0] INT:MUX.DBL_SW0[2][0] INT:MUX.DBL_SS0[2][0] INT:MUX.DBL_SE0[2][0] INT:MUX.SNG_S0[7][0] INT:MUX.SNG_W0[1][0] INT:MUX.SNG_S0[2][0] INT:MUX.SNG_E0[7][0] INT:MUX.IMUX_LOGICIN[53][2] INT:MUX.IMUX_LOGICIN[1][2] - INT:MUX.IMUX_LOGICIN[32][2] INT:MUX.IMUX_LOGICIN[21][2] INT:MUX.IMUX_LOGICIN[22][2] INT:MUX.IMUX_LOGICIN[18][2] INT:MUX.IMUX_LOGICIN[58][2] -
B42 INT:MUX.QUAD_SS0[2][4] INT:MUX.QUAD_SW0[2][4] INT:MUX.QUAD_EE0[2][3] INT:MUX.QUAD_SE0[2][3] INT:MUX.DBL_WW0[2][5] INT:MUX.DBL_SW0[2][5] INT:MUX.DBL_SS0[2][5] INT:MUX.DBL_SE0[2][5] INT:MUX.SNG_S0[7][5] INT:MUX.SNG_W0[1][5] INT:MUX.SNG_S0[2][5] INT:MUX.SNG_E0[7][5] INT:MUX.IMUX_LOGICIN[53][4] INT:MUX.IMUX_LOGICIN[1][4] - INT:MUX.IMUX_LOGICIN[32][4] INT:MUX.IMUX_LOGICIN[21][4] INT:MUX.IMUX_LOGICIN[22][4] INT:MUX.IMUX_LOGICIN[18][4] INT:MUX.IMUX_LOGICIN[58][4] -
B41 INT:MUX.QUAD_SS0[2][1] INT:MUX.QUAD_SW0[2][1] INT:MUX.QUAD_EE0[2][0] INT:MUX.QUAD_SE0[2][0] INT:MUX.DBL_WW0[2][4] INT:MUX.DBL_SW0[2][4] INT:MUX.DBL_SS0[2][4] INT:MUX.DBL_SE0[2][4] INT:MUX.SNG_S0[7][4] INT:MUX.SNG_W0[1][4] INT:MUX.SNG_S0[2][4] INT:MUX.SNG_E0[7][4] INT:MUX.IMUX_LOGICIN[53][5] INT:MUX.IMUX_LOGICIN[1][5] - INT:MUX.IMUX_LOGICIN[32][5] INT:MUX.IMUX_LOGICIN[21][5] INT:MUX.IMUX_LOGICIN[22][5] INT:MUX.IMUX_LOGICIN[18][5] INT:MUX.IMUX_LOGICIN[58][5] -
B40 INT:MUX.QUAD_SW0[2][7] INT:MUX.QUAD_SW0[2][6] INT:MUX.QUAD_SE0[2][7] INT:MUX.QUAD_SE0[2][6] INT:MUX.DBL_SW0[2][7] INT:MUX.DBL_SW0[2][6] INT:MUX.DBL_SE0[2][7] INT:MUX.DBL_SE0[2][6] INT:MUX.SNG_W0[1][7] INT:MUX.SNG_W0[1][6] INT:MUX.SNG_E0[7][7] INT:MUX.SNG_E0[7][6] INT:MUX.IMUX_LOGICIN[1][6] INT:MUX.IMUX_LOGICIN[1][7] - - INT:MUX.IMUX_LOGICIN[22][6] INT:MUX.IMUX_LOGICIN[22][7] INT:MUX.IMUX_LOGICIN[18][7] INT:MUX.IMUX_LOGICIN[18][6] -
B39 INT:MUX.QUAD_WW0[2][7] INT:MUX.QUAD_WW0[2][6] INT:MUX.QUAD_NN0[2][7] INT:MUX.QUAD_NN0[2][6] INT:MUX.DBL_NW0[2][7] INT:MUX.DBL_NW0[2][6] INT:MUX.DBL_NE0[2][7] INT:MUX.DBL_NE0[2][6] INT:MUX.SNG_W0[7][7] INT:MUX.SNG_W0[7][6] INT:MUX.SNG_E0[1][7] INT:MUX.SNG_E0[1][6] INT:MUX.IMUX_LOGICIN[49][6] INT:MUX.IMUX_LOGICIN[49][7] INT:MUX.IMUX_LOGICIN[52][7] INT:MUX.IMUX_LOGICIN[52][6] INT:MUX.IMUX_LOGICIN[40][6] INT:MUX.IMUX_LOGICIN[40][7] INT:MUX.IMUX_LOGICIN[29][7] INT:MUX.IMUX_LOGICIN[29][6] INT:MUX.IMUX_CLK[0][6]
B38 INT:MUX.QUAD_NW0[2][2] INT:MUX.QUAD_WW0[2][2] INT:MUX.QUAD_NE0[2][1] INT:MUX.QUAD_NN0[2][1] INT:MUX.DBL_NN0[2][5] INT:MUX.DBL_NW0[2][5] INT:MUX.DBL_EE0[2][5] INT:MUX.DBL_NE0[2][5] INT:MUX.SNG_N0[1][5] INT:MUX.SNG_W0[7][5] INT:MUX.SNG_N0[6][5] INT:MUX.SNG_E0[1][5] INT:MUX.IMUX_LOGICIN[49][0] INT:MUX.IMUX_LOGICIN[26][0] INT:MUX.IMUX_LOGICIN[55][0] INT:MUX.IMUX_LOGICIN[52][0] INT:MUX.IMUX_LOGICIN[40][0] INT:MUX.IMUX_LOGICIN[3][0] INT:MUX.IMUX_LOGICIN[51][0] INT:MUX.IMUX_LOGICIN[29][0] INT:MUX.IMUX_CLK[0][7]
B37 INT:MUX.QUAD_NW0[2][1] INT:MUX.QUAD_WW0[2][1] INT:MUX.QUAD_NE0[2][2] INT:MUX.QUAD_NN0[2][2] INT:MUX.DBL_NN0[2][4] INT:MUX.DBL_NW0[2][4] INT:MUX.DBL_EE0[2][4] INT:MUX.DBL_NE0[2][4] INT:MUX.SNG_N0[1][4] INT:MUX.SNG_W0[7][4] INT:MUX.SNG_N0[6][4] INT:MUX.SNG_E0[1][4] INT:MUX.IMUX_LOGICIN[49][3] INT:MUX.IMUX_LOGICIN[26][3] INT:MUX.IMUX_LOGICIN[55][3] INT:MUX.IMUX_LOGICIN[52][3] INT:MUX.IMUX_LOGICIN[40][3] INT:MUX.IMUX_LOGICIN[3][3] INT:MUX.IMUX_LOGICIN[51][3] INT:MUX.IMUX_LOGICIN[29][3] INT:MUX.IMUX_CLK[0][2]
B36 INT:MUX.QUAD_NW0[2][0] INT:MUX.QUAD_WW0[2][0] INT:MUX.QUAD_NE0[2][0] INT:MUX.QUAD_NN0[2][0] INT:MUX.DBL_NN0[2][0] INT:MUX.DBL_NW0[2][0] INT:MUX.DBL_EE0[2][0] INT:MUX.DBL_NE0[2][0] INT:MUX.SNG_N0[1][0] INT:MUX.SNG_W0[7][0] INT:MUX.SNG_N0[6][0] INT:MUX.SNG_E0[1][0] INT:MUX.IMUX_LOGICIN[49][1] INT:MUX.IMUX_LOGICIN[26][1] INT:MUX.IMUX_LOGICIN[55][1] INT:MUX.IMUX_LOGICIN[52][1] INT:MUX.IMUX_LOGICIN[40][1] INT:MUX.IMUX_LOGICIN[3][1] INT:MUX.IMUX_LOGICIN[51][1] INT:MUX.IMUX_LOGICIN[29][1] INT:MUX.IMUX_CLK[0][3]
B35 INT:MUX.QUAD_NW0[2][5] INT:MUX.QUAD_WW0[2][5] INT:MUX.QUAD_NE0[2][5] INT:MUX.QUAD_NN0[2][5] INT:MUX.DBL_NN0[2][1] INT:MUX.DBL_NW0[2][1] INT:MUX.DBL_EE0[2][1] INT:MUX.DBL_NE0[2][1] INT:MUX.SNG_N0[1][1] INT:MUX.SNG_W0[7][1] INT:MUX.SNG_N0[6][1] INT:MUX.SNG_E0[1][1] INT:MUX.IMUX_LOGICIN[49][2] INT:MUX.IMUX_LOGICIN[26][2] INT:MUX.IMUX_LOGICIN[55][2] INT:MUX.IMUX_LOGICIN[52][2] INT:MUX.IMUX_LOGICIN[40][2] INT:MUX.IMUX_LOGICIN[3][2] INT:MUX.IMUX_LOGICIN[51][2] INT:MUX.IMUX_LOGICIN[29][2] INT:MUX.IMUX_CLK[0][4]
B34 INT:MUX.QUAD_NW0[2][3] INT:MUX.QUAD_WW0[2][3] INT:MUX.QUAD_NE0[2][3] INT:MUX.QUAD_NN0[2][3] INT:MUX.DBL_NN0[2][3] INT:MUX.DBL_NW0[2][3] INT:MUX.DBL_EE0[2][3] INT:MUX.DBL_NE0[2][3] INT:MUX.SNG_N0[1][3] INT:MUX.SNG_W0[7][3] INT:MUX.SNG_N0[6][3] INT:MUX.SNG_E0[1][3] INT:MUX.IMUX_LOGICIN[49][4] INT:MUX.IMUX_LOGICIN[26][4] INT:MUX.IMUX_LOGICIN[55][4] INT:MUX.IMUX_LOGICIN[52][4] INT:MUX.IMUX_LOGICIN[40][4] INT:MUX.IMUX_LOGICIN[3][4] INT:MUX.IMUX_LOGICIN[51][4] INT:MUX.IMUX_LOGICIN[29][4] INT:MUX.IMUX_CLK[0][1]
B33 INT:MUX.QUAD_NW0[2][4] INT:MUX.QUAD_WW0[2][4] INT:MUX.QUAD_NE0[2][4] INT:MUX.QUAD_NN0[2][4] INT:MUX.DBL_NN0[2][2] INT:MUX.DBL_NW0[2][2] INT:MUX.DBL_EE0[2][2] INT:MUX.DBL_NE0[2][2] INT:MUX.SNG_N0[1][2] INT:MUX.SNG_W0[7][2] INT:MUX.SNG_N0[6][2] INT:MUX.SNG_E0[1][2] INT:MUX.IMUX_LOGICIN[49][5] INT:MUX.IMUX_LOGICIN[26][5] INT:MUX.IMUX_LOGICIN[55][5] INT:MUX.IMUX_LOGICIN[52][5] INT:MUX.IMUX_LOGICIN[40][5] INT:MUX.IMUX_LOGICIN[3][5] INT:MUX.IMUX_LOGICIN[51][5] INT:MUX.IMUX_LOGICIN[29][5] INT:MUX.IMUX_CLK[0][0]
B32 INT:MUX.QUAD_NW0[2][6] INT:MUX.QUAD_NW0[2][7] INT:MUX.QUAD_NE0[2][6] INT:MUX.QUAD_NE0[2][7] INT:MUX.DBL_NN0[2][6] INT:MUX.DBL_NN0[2][7] INT:MUX.DBL_EE0[2][6] INT:MUX.DBL_EE0[2][7] INT:MUX.SNG_N0[1][6] INT:MUX.SNG_N0[1][7] INT:MUX.SNG_N0[6][6] INT:MUX.SNG_N0[6][7] INT:MUX.IMUX_LOGICIN[26][6] INT:MUX.IMUX_LOGICIN[26][7] INT:MUX.IMUX_LOGICIN[55][7] INT:MUX.IMUX_LOGICIN[55][6] INT:MUX.IMUX_LOGICIN[3][6] INT:MUX.IMUX_LOGICIN[3][7] INT:MUX.IMUX_LOGICIN[51][7] INT:MUX.IMUX_LOGICIN[51][6] INT:MUX.IMUX_CLK[0][5]
B31 INT:MUX.QUAD_SS0[1][6] INT:MUX.QUAD_SS0[1][7] INT:MUX.QUAD_EE0[1][6] INT:MUX.QUAD_EE0[1][7] INT:MUX.DBL_WW0[1][6] INT:MUX.DBL_WW0[1][7] INT:MUX.DBL_SS0[1][6] INT:MUX.DBL_SS0[1][7] INT:MUX.SNG_S0[6][6] INT:MUX.SNG_S0[6][7] INT:MUX.SNG_S0[1][6] INT:MUX.SNG_S0[1][7] INT:MUX.IMUX_LOGICIN[0][6] INT:MUX.IMUX_LOGICIN[0][7] INT:MUX.IMUX_LOGICIN[33][7] INT:MUX.IMUX_LOGICIN[33][6] INT:MUX.IMUX_LOGICIN[43][6] INT:MUX.IMUX_LOGICIN[43][7] INT:MUX.IMUX_LOGICIN[57][7] INT:MUX.IMUX_LOGICIN[57][6] INT:MUX.IMUX_CLK[1][5]
B30 INT:MUX.QUAD_SS0[1][3] INT:MUX.QUAD_SW0[1][3] INT:MUX.QUAD_EE0[1][2] INT:MUX.QUAD_SE0[1][2] INT:MUX.DBL_WW0[1][3] INT:MUX.DBL_SW0[1][3] INT:MUX.DBL_SS0[1][3] INT:MUX.DBL_SE0[1][3] INT:MUX.SNG_S0[6][3] INT:MUX.SNG_W0[0][3] INT:MUX.SNG_S0[1][3] INT:MUX.SNG_E0[6][3] INT:MUX.IMUX_LOGICIN[0][0] INT:MUX.IMUX_LOGICIN[20][0] INT:MUX.IMUX_LOGICIN[11][0] INT:MUX.IMUX_LOGICIN[33][0] INT:MUX.IMUX_LOGICIN[43][0] INT:MUX.IMUX_LOGICIN[23][0] INT:MUX.IMUX_LOGICIN[17][0] INT:MUX.IMUX_LOGICIN[57][0] INT:MUX.IMUX_CLK[1][4]
B29 INT:MUX.QUAD_SS0[1][0] INT:MUX.QUAD_SW0[1][0] INT:MUX.QUAD_EE0[1][4] INT:MUX.QUAD_SE0[1][4] INT:MUX.DBL_WW0[1][2] INT:MUX.DBL_SW0[1][2] INT:MUX.DBL_SS0[1][2] INT:MUX.DBL_SE0[1][2] INT:MUX.SNG_S0[6][2] INT:MUX.SNG_W0[0][2] INT:MUX.SNG_S0[1][2] INT:MUX.SNG_E0[6][2] INT:MUX.IMUX_LOGICIN[0][3] INT:MUX.IMUX_LOGICIN[20][3] INT:MUX.IMUX_LOGICIN[11][3] INT:MUX.IMUX_LOGICIN[33][3] INT:MUX.IMUX_LOGICIN[43][3] INT:MUX.IMUX_LOGICIN[23][3] INT:MUX.IMUX_LOGICIN[17][3] INT:MUX.IMUX_LOGICIN[57][3] INT:MUX.IMUX_CLK[1][1]
B28 INT:MUX.QUAD_SS0[1][5] INT:MUX.QUAD_SW0[1][5] INT:MUX.QUAD_EE0[1][5] INT:MUX.QUAD_SE0[1][5] INT:MUX.DBL_WW0[1][1] INT:MUX.DBL_SW0[1][1] INT:MUX.DBL_SS0[1][1] INT:MUX.DBL_SE0[1][1] INT:MUX.SNG_S0[6][1] INT:MUX.SNG_W0[0][1] INT:MUX.SNG_S0[1][1] INT:MUX.SNG_E0[6][1] INT:MUX.IMUX_LOGICIN[0][1] INT:MUX.IMUX_LOGICIN[20][1] INT:MUX.IMUX_LOGICIN[11][1] INT:MUX.IMUX_LOGICIN[33][1] INT:MUX.IMUX_LOGICIN[43][1] INT:MUX.IMUX_LOGICIN[23][1] INT:MUX.IMUX_LOGICIN[17][1] INT:MUX.IMUX_LOGICIN[57][1] INT:MUX.IMUX_CLK[1][0]
B27 INT:MUX.QUAD_SS0[1][2] INT:MUX.QUAD_SW0[1][2] INT:MUX.QUAD_EE0[1][1] INT:MUX.QUAD_SE0[1][1] INT:MUX.DBL_WW0[1][0] INT:MUX.DBL_SW0[1][0] INT:MUX.DBL_SS0[1][0] INT:MUX.DBL_SE0[1][0] INT:MUX.SNG_S0[6][0] INT:MUX.SNG_W0[0][0] INT:MUX.SNG_S0[1][0] INT:MUX.SNG_E0[6][0] INT:MUX.IMUX_LOGICIN[0][2] INT:MUX.IMUX_LOGICIN[20][2] INT:MUX.IMUX_LOGICIN[11][2] INT:MUX.IMUX_LOGICIN[33][2] INT:MUX.IMUX_LOGICIN[43][2] INT:MUX.IMUX_LOGICIN[23][2] INT:MUX.IMUX_LOGICIN[17][2] INT:MUX.IMUX_LOGICIN[57][2] INT:MUX.IMUX_CLK[1][3]
B26 INT:MUX.QUAD_SS0[1][4] INT:MUX.QUAD_SW0[1][4] INT:MUX.QUAD_EE0[1][3] INT:MUX.QUAD_SE0[1][3] INT:MUX.DBL_WW0[1][5] INT:MUX.DBL_SW0[1][5] INT:MUX.DBL_SS0[1][5] INT:MUX.DBL_SE0[1][5] INT:MUX.SNG_S0[6][5] INT:MUX.SNG_W0[0][5] INT:MUX.SNG_S0[1][5] INT:MUX.SNG_E0[6][5] INT:MUX.IMUX_LOGICIN[0][4] INT:MUX.IMUX_LOGICIN[20][4] INT:MUX.IMUX_LOGICIN[11][4] INT:MUX.IMUX_LOGICIN[33][4] INT:MUX.IMUX_LOGICIN[43][4] INT:MUX.IMUX_LOGICIN[23][4] INT:MUX.IMUX_LOGICIN[17][4] INT:MUX.IMUX_LOGICIN[57][4] INT:MUX.IMUX_CLK[1][2]
B25 INT:MUX.QUAD_SS0[1][1] INT:MUX.QUAD_SW0[1][1] INT:MUX.QUAD_EE0[1][0] INT:MUX.QUAD_SE0[1][0] INT:MUX.DBL_WW0[1][4] INT:MUX.DBL_SW0[1][4] INT:MUX.DBL_SS0[1][4] INT:MUX.DBL_SE0[1][4] INT:MUX.SNG_S0[6][4] INT:MUX.SNG_W0[0][4] INT:MUX.SNG_S0[1][4] INT:MUX.SNG_E0[6][4] INT:MUX.IMUX_LOGICIN[0][5] INT:MUX.IMUX_LOGICIN[20][5] INT:MUX.IMUX_LOGICIN[11][5] INT:MUX.IMUX_LOGICIN[33][5] INT:MUX.IMUX_LOGICIN[43][5] INT:MUX.IMUX_LOGICIN[23][5] INT:MUX.IMUX_LOGICIN[17][5] INT:MUX.IMUX_LOGICIN[57][5] INT:MUX.IMUX_CLK[1][7]
B24 INT:MUX.QUAD_SW0[1][7] INT:MUX.QUAD_SW0[1][6] INT:MUX.QUAD_SE0[1][7] INT:MUX.QUAD_SE0[1][6] INT:MUX.DBL_SW0[1][7] INT:MUX.DBL_SW0[1][6] INT:MUX.DBL_SE0[1][7] INT:MUX.DBL_SE0[1][6] INT:MUX.SNG_W0[0][7] INT:MUX.SNG_W0[0][6] INT:MUX.SNG_E0[6][7] INT:MUX.SNG_E0[6][6] INT:MUX.IMUX_LOGICIN[20][6] INT:MUX.IMUX_LOGICIN[20][7] INT:MUX.IMUX_LOGICIN[11][7] INT:MUX.IMUX_LOGICIN[11][6] INT:MUX.IMUX_LOGICIN[23][6] INT:MUX.IMUX_LOGICIN[23][7] INT:MUX.IMUX_LOGICIN[17][7] INT:MUX.IMUX_LOGICIN[17][6] INT:MUX.IMUX_CLK[1][6]
B23 INT:MUX.QUAD_WW0[1][7] INT:MUX.QUAD_WW0[1][6] INT:MUX.QUAD_NN0[1][7] INT:MUX.QUAD_NN0[1][6] INT:MUX.DBL_NW0[1][7] INT:MUX.DBL_NW0[1][6] INT:MUX.DBL_NE0[1][7] INT:MUX.DBL_NE0[1][6] INT:MUX.SNG_W0[6][7] INT:MUX.SNG_W0[6][6] INT:MUX.SNG_E0[0][7] INT:MUX.SNG_E0[0][6] INT:MUX.IMUX_LOGICIN[48][6] INT:MUX.IMUX_LOGICIN[48][7] INT:MUX.IMUX_LOGICIN[54][7] INT:MUX.IMUX_LOGICIN[54][6] INT:MUX.IMUX_LOGICIN[41][6] INT:MUX.IMUX_LOGICIN[41][7] INT:MUX.IMUX_LOGICIN[30][7] INT:MUX.IMUX_LOGICIN[30][6] -
B22 INT:MUX.QUAD_NW0[1][2] INT:MUX.QUAD_WW0[1][2] INT:MUX.QUAD_NE0[1][1] INT:MUX.QUAD_NN0[1][1] INT:MUX.DBL_NN0[1][5] INT:MUX.DBL_NW0[1][5] INT:MUX.DBL_EE0[1][5] INT:MUX.DBL_NE0[1][5] INT:MUX.SNG_N0[0][5] INT:MUX.SNG_W0[6][5] INT:MUX.SNG_N0[5][5] INT:MUX.SNG_E0[0][5] INT:MUX.IMUX_LOGICIN[48][0] INT:MUX.IMUX_LOGICIN[25][0] INT:MUX.IMUX_LOGICIN[13][0] INT:MUX.IMUX_LOGICIN[54][0] INT:MUX.IMUX_LOGICIN[41][0] - INT:MUX.IMUX_LOGICIN[44][0] INT:MUX.IMUX_LOGICIN[30][0] -
B21 INT:MUX.QUAD_NW0[1][1] INT:MUX.QUAD_WW0[1][1] INT:MUX.QUAD_NE0[1][2] INT:MUX.QUAD_NN0[1][2] INT:MUX.DBL_NN0[1][4] INT:MUX.DBL_NW0[1][4] INT:MUX.DBL_EE0[1][4] INT:MUX.DBL_NE0[1][4] INT:MUX.SNG_N0[0][4] INT:MUX.SNG_W0[6][4] INT:MUX.SNG_N0[5][4] INT:MUX.SNG_E0[0][4] INT:MUX.IMUX_LOGICIN[48][3] INT:MUX.IMUX_LOGICIN[25][3] INT:MUX.IMUX_LOGICIN[13][3] INT:MUX.IMUX_LOGICIN[54][3] INT:MUX.IMUX_LOGICIN[41][3] - INT:MUX.IMUX_LOGICIN[44][3] INT:MUX.IMUX_LOGICIN[30][3] -
B20 INT:MUX.QUAD_NW0[1][0] INT:MUX.QUAD_WW0[1][0] INT:MUX.QUAD_NE0[1][0] INT:MUX.QUAD_NN0[1][0] INT:MUX.DBL_NN0[1][0] INT:MUX.DBL_NW0[1][0] INT:MUX.DBL_EE0[1][0] INT:MUX.DBL_NE0[1][0] INT:MUX.SNG_N0[0][0] INT:MUX.SNG_W0[6][0] INT:MUX.SNG_N0[5][0] INT:MUX.SNG_E0[0][0] INT:MUX.IMUX_LOGICIN[48][1] INT:MUX.IMUX_LOGICIN[25][1] INT:MUX.IMUX_LOGICIN[13][1] INT:MUX.IMUX_LOGICIN[54][1] INT:MUX.IMUX_LOGICIN[41][1] - INT:MUX.IMUX_LOGICIN[44][1] INT:MUX.IMUX_LOGICIN[30][1] -
B19 INT:MUX.QUAD_NW0[1][5] INT:MUX.QUAD_WW0[1][5] INT:MUX.QUAD_NE0[1][5] INT:MUX.QUAD_NN0[1][5] INT:MUX.DBL_NN0[1][1] INT:MUX.DBL_NW0[1][1] INT:MUX.DBL_EE0[1][1] INT:MUX.DBL_NE0[1][1] INT:MUX.SNG_N0[0][1] INT:MUX.SNG_W0[6][1] INT:MUX.SNG_N0[5][1] INT:MUX.SNG_E0[0][1] INT:MUX.IMUX_LOGICIN[48][2] INT:MUX.IMUX_LOGICIN[25][2] INT:MUX.IMUX_LOGICIN[13][2] INT:MUX.IMUX_LOGICIN[54][2] INT:MUX.IMUX_LOGICIN[41][2] - INT:MUX.IMUX_LOGICIN[44][2] INT:MUX.IMUX_LOGICIN[30][2] -
B18 INT:MUX.QUAD_NW0[1][3] INT:MUX.QUAD_WW0[1][3] INT:MUX.QUAD_NE0[1][3] INT:MUX.QUAD_NN0[1][3] INT:MUX.DBL_NN0[1][3] INT:MUX.DBL_NW0[1][3] INT:MUX.DBL_EE0[1][3] INT:MUX.DBL_NE0[1][3] INT:MUX.SNG_N0[0][3] INT:MUX.SNG_W0[6][3] INT:MUX.SNG_N0[5][3] INT:MUX.SNG_E0[0][3] INT:MUX.IMUX_LOGICIN[48][4] INT:MUX.IMUX_LOGICIN[25][4] INT:MUX.IMUX_LOGICIN[13][4] INT:MUX.IMUX_LOGICIN[54][4] INT:MUX.IMUX_LOGICIN[41][4] - INT:MUX.IMUX_LOGICIN[44][4] INT:MUX.IMUX_LOGICIN[30][4] -
B17 INT:MUX.QUAD_NW0[1][4] INT:MUX.QUAD_WW0[1][4] INT:MUX.QUAD_NE0[1][4] INT:MUX.QUAD_NN0[1][4] INT:MUX.DBL_NN0[1][2] INT:MUX.DBL_NW0[1][2] INT:MUX.DBL_EE0[1][2] INT:MUX.DBL_NE0[1][2] INT:MUX.SNG_N0[0][2] INT:MUX.SNG_W0[6][2] INT:MUX.SNG_N0[5][2] INT:MUX.SNG_E0[0][2] INT:MUX.IMUX_LOGICIN[48][5] INT:MUX.IMUX_LOGICIN[25][5] INT:MUX.IMUX_LOGICIN[13][5] INT:MUX.IMUX_LOGICIN[54][5] INT:MUX.IMUX_LOGICIN[41][5] - INT:MUX.IMUX_LOGICIN[44][5] INT:MUX.IMUX_LOGICIN[30][5] -
B16 INT:MUX.QUAD_NW0[1][6] INT:MUX.QUAD_NW0[1][7] INT:MUX.QUAD_NE0[1][6] INT:MUX.QUAD_NE0[1][7] INT:MUX.DBL_NN0[1][6] INT:MUX.DBL_NN0[1][7] INT:MUX.DBL_EE0[1][6] INT:MUX.DBL_EE0[1][7] INT:MUX.SNG_N0[0][6] INT:MUX.SNG_N0[0][7] INT:MUX.SNG_N0[5][6] INT:MUX.SNG_N0[5][7] INT:MUX.IMUX_LOGICIN[25][6] INT:MUX.IMUX_LOGICIN[25][7] INT:MUX.IMUX_LOGICIN[13][7] INT:MUX.IMUX_LOGICIN[13][6] - - INT:MUX.IMUX_LOGICIN[44][7] INT:MUX.IMUX_LOGICIN[44][6] -
B15 INT:MUX.QUAD_SS0[0][6] INT:MUX.QUAD_SS0[0][7] INT:MUX.QUAD_EE0[0][6] INT:MUX.QUAD_EE0[0][7] INT:MUX.DBL_WW0[0][6] INT:MUX.DBL_WW0[0][7] INT:MUX.DBL_SS0[0][6] INT:MUX.DBL_SS0[0][7] INT:MUX.SNG_S0[5][6] INT:MUX.SNG_S0[5][7] INT:MUX.SNG_S0[0][6] INT:MUX.SNG_S0[0][7] INT:MUX.IMUX_LOGICIN[38][6] INT:MUX.IMUX_LOGICIN[38][7] INT:MUX.IMUX_LOGICIN[34][7] INT:MUX.IMUX_LOGICIN[34][6] INT:MUX.IMUX_LOGICIN[45][6] INT:MUX.IMUX_LOGICIN[45][7] INT:MUX.IMUX_LOGICIN[56][7] INT:MUX.IMUX_LOGICIN[56][6] INT:MUX.IMUX_GFAN[1][7]
B14 INT:MUX.QUAD_SS0[0][3] INT:MUX.QUAD_SW0[0][3] INT:MUX.QUAD_EE0[0][2] INT:MUX.QUAD_SE0[0][2] INT:MUX.DBL_WW0[0][3] INT:MUX.DBL_SW0[0][3] INT:MUX.DBL_SS0[0][3] INT:MUX.DBL_SE0[0][3] INT:MUX.SNG_S0[5][3] INT:MUX.SNG_W0[3][3] INT:MUX.SNG_S0[0][3] INT:MUX.SNG_E0[5][3] INT:MUX.IMUX_LOGICIN[38][0] INT:MUX.IMUX_LOGICIN[62][0] INT:MUX.IMUX_LOGICIN[12][0] INT:MUX.IMUX_LOGICIN[34][0] INT:MUX.IMUX_LOGICIN[45][0] INT:MUX.IMUX_LOGICIN[6][0] INT:MUX.IMUX_LOGICIN[16][0] INT:MUX.IMUX_LOGICIN[56][0] INT:MUX.IMUX_GFAN[1][6]
B13 INT:MUX.QUAD_SS0[0][0] INT:MUX.QUAD_SW0[0][0] INT:MUX.QUAD_EE0[0][4] INT:MUX.QUAD_SE0[0][4] INT:MUX.DBL_WW0[0][2] INT:MUX.DBL_SW0[0][2] INT:MUX.DBL_SS0[0][2] INT:MUX.DBL_SE0[0][2] INT:MUX.SNG_S0[5][2] INT:MUX.SNG_W0[3][2] INT:MUX.SNG_S0[0][2] INT:MUX.SNG_E0[5][2] INT:MUX.IMUX_LOGICIN[38][3] INT:MUX.IMUX_LOGICIN[62][3] INT:MUX.IMUX_LOGICIN[12][3] INT:MUX.IMUX_LOGICIN[34][3] INT:MUX.IMUX_LOGICIN[45][3] INT:MUX.IMUX_LOGICIN[6][3] INT:MUX.IMUX_LOGICIN[16][3] INT:MUX.IMUX_LOGICIN[56][3] INT:MUX.IMUX_GFAN[1][2]
B12 INT:MUX.QUAD_SS0[0][5] INT:MUX.QUAD_SW0[0][5] INT:MUX.QUAD_EE0[0][5] INT:MUX.QUAD_SE0[0][5] INT:MUX.DBL_WW0[0][1] INT:MUX.DBL_SW0[0][1] INT:MUX.DBL_SS0[0][1] INT:MUX.DBL_SE0[0][1] INT:MUX.SNG_S0[5][1] INT:MUX.SNG_W0[3][1] INT:MUX.SNG_S0[0][1] INT:MUX.SNG_E0[5][1] INT:MUX.IMUX_LOGICIN[38][1] INT:MUX.IMUX_LOGICIN[62][1] INT:MUX.IMUX_LOGICIN[12][1] INT:MUX.IMUX_LOGICIN[34][1] INT:MUX.IMUX_LOGICIN[45][1] INT:MUX.IMUX_LOGICIN[6][1] INT:MUX.IMUX_LOGICIN[16][2] INT:MUX.IMUX_LOGICIN[56][2] INT:MUX.IMUX_GFAN[1][3]
B11 INT:MUX.QUAD_SS0[0][2] INT:MUX.QUAD_SW0[0][2] INT:MUX.QUAD_EE0[0][1] INT:MUX.QUAD_SE0[0][1] INT:MUX.DBL_WW0[0][0] INT:MUX.DBL_SW0[0][0] INT:MUX.DBL_SS0[0][0] INT:MUX.DBL_SE0[0][0] INT:MUX.SNG_S0[5][0] INT:MUX.SNG_W0[3][0] INT:MUX.SNG_S0[0][0] INT:MUX.SNG_E0[5][0] INT:MUX.IMUX_LOGICIN[38][2] INT:MUX.IMUX_LOGICIN[62][2] INT:MUX.IMUX_LOGICIN[12][2] INT:MUX.IMUX_LOGICIN[34][2] INT:MUX.IMUX_LOGICIN[45][2] INT:MUX.IMUX_LOGICIN[6][2] INT:MUX.IMUX_LOGICIN[16][1] INT:MUX.IMUX_LOGICIN[56][1] INT:MUX.IMUX_GFAN[1][0]
B10 INT:MUX.QUAD_SS0[0][4] INT:MUX.QUAD_SW0[0][4] INT:MUX.QUAD_EE0[0][3] INT:MUX.QUAD_SE0[0][3] INT:MUX.DBL_WW0[0][5] INT:MUX.DBL_SW0[0][5] INT:MUX.DBL_SS0[0][5] INT:MUX.DBL_SE0[0][5] INT:MUX.SNG_S0[5][5] INT:MUX.SNG_W0[3][5] INT:MUX.SNG_S0[0][5] INT:MUX.SNG_E0[5][5] INT:MUX.IMUX_LOGICIN[38][4] INT:MUX.IMUX_LOGICIN[62][4] INT:MUX.IMUX_LOGICIN[12][4] INT:MUX.IMUX_LOGICIN[34][4] INT:MUX.IMUX_LOGICIN[45][4] INT:MUX.IMUX_LOGICIN[6][4] INT:MUX.IMUX_LOGICIN[16][4] INT:MUX.IMUX_LOGICIN[56][4] INT:MUX.IMUX_GFAN[1][1]
B9 INT:MUX.QUAD_SS0[0][1] INT:MUX.QUAD_SW0[0][1] INT:MUX.QUAD_EE0[0][0] INT:MUX.QUAD_SE0[0][0] INT:MUX.DBL_WW0[0][4] INT:MUX.DBL_SW0[0][4] INT:MUX.DBL_SS0[0][4] INT:MUX.DBL_SE0[0][4] INT:MUX.SNG_S0[5][4] INT:MUX.SNG_W0[3][4] INT:MUX.SNG_S0[0][4] INT:MUX.SNG_E0[5][4] INT:MUX.IMUX_LOGICIN[38][5] INT:MUX.IMUX_LOGICIN[62][5] INT:MUX.IMUX_LOGICIN[12][5] INT:MUX.IMUX_LOGICIN[34][5] INT:MUX.IMUX_LOGICIN[45][5] INT:MUX.IMUX_LOGICIN[6][5] INT:MUX.IMUX_LOGICIN[16][5] INT:MUX.IMUX_LOGICIN[56][5] INT:MUX.IMUX_GFAN[1][4]
B8 INT:MUX.QUAD_SW0[0][7] INT:MUX.QUAD_SW0[0][6] INT:MUX.QUAD_SE0[0][7] INT:MUX.QUAD_SE0[0][6] INT:MUX.DBL_SW0[0][7] INT:MUX.DBL_SW0[0][6] INT:MUX.DBL_SE0[0][7] INT:MUX.DBL_SE0[0][6] INT:MUX.SNG_W0[3][7] INT:MUX.SNG_W0[3][6] INT:MUX.SNG_E0[5][7] INT:MUX.SNG_E0[5][6] INT:MUX.IMUX_LOGICIN[62][6] INT:MUX.IMUX_LOGICIN[62][7] INT:MUX.IMUX_LOGICIN[12][7] INT:MUX.IMUX_LOGICIN[12][6] INT:MUX.IMUX_LOGICIN[6][6] INT:MUX.IMUX_LOGICIN[6][7] INT:MUX.IMUX_LOGICIN[16][7] INT:MUX.IMUX_LOGICIN[16][6] INT:MUX.IMUX_GFAN[1][5]
B7 INT:MUX.QUAD_WW0[0][7] INT:MUX.QUAD_WW0[0][6] INT:MUX.QUAD_NN0[0][7] INT:MUX.QUAD_NN0[0][6] INT:MUX.DBL_NW0[0][7] INT:MUX.DBL_NW0[0][6] INT:MUX.DBL_NE0[0][7] INT:MUX.DBL_NE0[0][6] INT:MUX.SNG_W0[5][7] INT:MUX.SNG_W0[5][6] INT:MUX.SNG_E0[3][7] INT:MUX.SNG_E0[3][6] INT:MUX.IMUX_LOGICIN[47][6] INT:MUX.IMUX_LOGICIN[47][7] INT:MUX.IMUX_LOGICIN[35][7] INT:MUX.IMUX_LOGICIN[35][6] INT:MUX.IMUX_LOGICIN[42][6] INT:MUX.IMUX_LOGICIN[42][7] INT:MUX.IMUX_LOGICIN[36][7] INT:MUX.IMUX_LOGICIN[36][6] INT:MUX.IMUX_GFAN[0][5]
B6 INT:MUX.QUAD_NW0[0][2] INT:MUX.QUAD_WW0[0][2] INT:MUX.QUAD_NE0[0][1] INT:MUX.QUAD_NN0[0][1] INT:MUX.DBL_NN0[0][5] INT:MUX.DBL_NW0[0][5] INT:MUX.DBL_EE0[0][5] INT:MUX.DBL_NE0[0][5] INT:MUX.SNG_N0[3][5] INT:MUX.SNG_W0[5][5] INT:MUX.SNG_N0[4][5] INT:MUX.SNG_E0[3][5] INT:MUX.IMUX_LOGICIN[47][0] INT:MUX.IMUX_LOGICIN[24][0] INT:MUX.IMUX_LOGICIN[15][0] INT:MUX.IMUX_LOGICIN[35][0] INT:MUX.IMUX_LOGICIN[42][0] INT:MUX.IMUX_LOGICIN[5][0] INT:MUX.IMUX_LOGICIN[7][0] INT:MUX.IMUX_LOGICIN[36][0] INT:MUX.IMUX_GFAN[0][0]
B5 INT:MUX.QUAD_NW0[0][1] INT:MUX.QUAD_WW0[0][1] INT:MUX.QUAD_NE0[0][2] INT:MUX.QUAD_NN0[0][2] INT:MUX.DBL_NN0[0][4] INT:MUX.DBL_NW0[0][4] INT:MUX.DBL_EE0[0][4] INT:MUX.DBL_NE0[0][4] INT:MUX.SNG_N0[3][4] INT:MUX.SNG_W0[5][4] INT:MUX.SNG_N0[4][4] INT:MUX.SNG_E0[3][4] INT:MUX.IMUX_LOGICIN[47][3] INT:MUX.IMUX_LOGICIN[24][3] INT:MUX.IMUX_LOGICIN[15][3] INT:MUX.IMUX_LOGICIN[35][3] INT:MUX.IMUX_LOGICIN[42][3] INT:MUX.IMUX_LOGICIN[5][3] INT:MUX.IMUX_LOGICIN[7][3] INT:MUX.IMUX_LOGICIN[36][3] INT:MUX.IMUX_GFAN[0][1]
B4 INT:MUX.QUAD_NW0[0][0] INT:MUX.QUAD_WW0[0][0] INT:MUX.QUAD_NE0[0][0] INT:MUX.QUAD_NN0[0][0] INT:MUX.DBL_NN0[0][1] INT:MUX.DBL_NW0[0][1] INT:MUX.DBL_EE0[0][0] INT:MUX.DBL_NE0[0][0] INT:MUX.SNG_N0[3][1] INT:MUX.SNG_W0[5][1] INT:MUX.SNG_N0[4][0] INT:MUX.SNG_E0[3][0] INT:MUX.IMUX_LOGICIN[47][1] INT:MUX.IMUX_LOGICIN[24][1] INT:MUX.IMUX_LOGICIN[15][1] INT:MUX.IMUX_LOGICIN[35][1] INT:MUX.IMUX_LOGICIN[42][1] INT:MUX.IMUX_LOGICIN[5][1] INT:MUX.IMUX_LOGICIN[7][2] INT:MUX.IMUX_LOGICIN[36][2] INT:MUX.IMUX_GFAN[0][4]
B3 INT:MUX.QUAD_NW0[0][5] INT:MUX.QUAD_WW0[0][5] INT:MUX.QUAD_NE0[0][5] INT:MUX.QUAD_NN0[0][5] INT:MUX.DBL_NN0[0][0] INT:MUX.DBL_NW0[0][0] INT:MUX.DBL_EE0[0][1] INT:MUX.DBL_NE0[0][1] INT:MUX.SNG_N0[3][0] INT:MUX.SNG_W0[5][0] INT:MUX.SNG_N0[4][1] INT:MUX.SNG_E0[3][1] INT:MUX.IMUX_LOGICIN[47][2] INT:MUX.IMUX_LOGICIN[24][2] INT:MUX.IMUX_LOGICIN[15][2] INT:MUX.IMUX_LOGICIN[35][2] INT:MUX.IMUX_LOGICIN[42][2] INT:MUX.IMUX_LOGICIN[5][2] INT:MUX.IMUX_LOGICIN[7][1] INT:MUX.IMUX_LOGICIN[36][1] INT:MUX.IMUX_GFAN[0][3]
B2 INT:MUX.QUAD_NW0[0][3] INT:MUX.QUAD_WW0[0][3] INT:MUX.QUAD_NE0[0][3] INT:MUX.QUAD_NN0[0][3] INT:MUX.DBL_NN0[0][3] INT:MUX.DBL_NW0[0][3] INT:MUX.DBL_EE0[0][3] INT:MUX.DBL_NE0[0][3] INT:MUX.SNG_N0[3][3] INT:MUX.SNG_W0[5][3] INT:MUX.SNG_N0[4][3] INT:MUX.SNG_E0[3][3] INT:MUX.IMUX_LOGICIN[47][4] INT:MUX.IMUX_LOGICIN[24][4] INT:MUX.IMUX_LOGICIN[15][4] INT:MUX.IMUX_LOGICIN[35][4] INT:MUX.IMUX_LOGICIN[42][4] INT:MUX.IMUX_LOGICIN[5][4] INT:MUX.IMUX_LOGICIN[7][4] INT:MUX.IMUX_LOGICIN[36][4] INT:MUX.IMUX_GFAN[0][2]
B1 INT:MUX.QUAD_NW0[0][4] INT:MUX.QUAD_WW0[0][4] INT:MUX.QUAD_NE0[0][4] INT:MUX.QUAD_NN0[0][4] INT:MUX.DBL_NN0[0][2] INT:MUX.DBL_NW0[0][2] INT:MUX.DBL_EE0[0][2] INT:MUX.DBL_NE0[0][2] INT:MUX.SNG_N0[3][2] INT:MUX.SNG_W0[5][2] INT:MUX.SNG_N0[4][2] INT:MUX.SNG_E0[3][2] INT:MUX.IMUX_LOGICIN[47][5] INT:MUX.IMUX_LOGICIN[24][5] INT:MUX.IMUX_LOGICIN[15][5] INT:MUX.IMUX_LOGICIN[35][5] INT:MUX.IMUX_LOGICIN[42][5] INT:MUX.IMUX_LOGICIN[5][5] INT:MUX.IMUX_LOGICIN[7][5] INT:MUX.IMUX_LOGICIN[36][5] INT:MUX.IMUX_GFAN[0][6]
B0 INT:MUX.QUAD_NW0[0][6] INT:MUX.QUAD_NW0[0][7] INT:MUX.QUAD_NE0[0][6] INT:MUX.QUAD_NE0[0][7] INT:MUX.DBL_NN0[0][6] INT:MUX.DBL_NN0[0][7] INT:MUX.DBL_EE0[0][6] INT:MUX.DBL_EE0[0][7] INT:MUX.SNG_N0[3][6] INT:MUX.SNG_N0[3][7] INT:MUX.SNG_N0[4][6] INT:MUX.SNG_N0[4][7] INT:MUX.IMUX_LOGICIN[24][6] INT:MUX.IMUX_LOGICIN[24][7] INT:MUX.IMUX_LOGICIN[15][7] INT:MUX.IMUX_LOGICIN[15][6] INT:MUX.IMUX_LOGICIN[5][6] INT:MUX.IMUX_LOGICIN[5][7] INT:MUX.IMUX_LOGICIN[7][7] INT:MUX.IMUX_LOGICIN[7][6] INT:MUX.IMUX_GFAN[0][7]
INT:MUX.DBL_EE0[0] 0.F7.B0 0.F6.B0 0.F6.B6 0.F6.B5 0.F6.B2 0.F6.B1 0.F6.B3 0.F6.B4
INT:MUX.DBL_NE0[0] 0.F6.B7 0.F7.B7 0.F7.B6 0.F7.B5 0.F7.B2 0.F7.B1 0.F7.B3 0.F7.B4
INT:MUX.SNG_E0[3] 0.F10.B7 0.F11.B7 0.F11.B6 0.F11.B5 0.F11.B2 0.F11.B1 0.F11.B3 0.F11.B4
INT:MUX.SNG_N0[4] 0.F11.B0 0.F10.B0 0.F10.B6 0.F10.B5 0.F10.B2 0.F10.B1 0.F10.B3 0.F10.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_NN4[0] 0 0 0 0 0 0 1 0
DBL_SE2[0] 0 0 0 0 0 1 0 0
DBL_EE2[0] 0 0 0 0 1 0 0 0
QUAD_SE4[0] 0 0 0 1 0 0 0 0
QUAD_EE4[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_E1[4] 0 1 0 0 0 0 1 0
SNG_N1[0] 0 1 0 0 0 1 0 0
SNG_N1[4] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[19] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[1] 0.F7.B16 0.F6.B16 0.F6.B22 0.F6.B21 0.F6.B18 0.F6.B17 0.F6.B19 0.F6.B20
INT:MUX.DBL_NE0[1] 0.F6.B23 0.F7.B23 0.F7.B22 0.F7.B21 0.F7.B18 0.F7.B17 0.F7.B19 0.F7.B20
INT:MUX.SNG_E0[0] 0.F10.B23 0.F11.B23 0.F11.B22 0.F11.B21 0.F11.B18 0.F11.B17 0.F11.B19 0.F11.B20
INT:MUX.SNG_N0[5] 0.F11.B16 0.F10.B16 0.F10.B22 0.F10.B21 0.F10.B18 0.F10.B17 0.F10.B19 0.F10.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_NN4[1] 0 0 0 0 0 0 1 0
DBL_SE2[1] 0 0 0 0 0 1 0 0
DBL_EE2[1] 0 0 0 0 1 0 0 0
QUAD_SE4[1] 0 0 0 1 0 0 0 0
QUAD_EE4[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_E1[5] 0 1 0 0 0 0 1 0
SNG_N1[1] 0 1 0 0 0 1 0 0
SNG_N1[5] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[22] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[2] 0.F7.B32 0.F6.B32 0.F6.B38 0.F6.B37 0.F6.B34 0.F6.B33 0.F6.B35 0.F6.B36
INT:MUX.DBL_NE0[2] 0.F6.B39 0.F7.B39 0.F7.B38 0.F7.B37 0.F7.B34 0.F7.B33 0.F7.B35 0.F7.B36
INT:MUX.SNG_E0[1] 0.F10.B39 0.F11.B39 0.F11.B38 0.F11.B37 0.F11.B34 0.F11.B33 0.F11.B35 0.F11.B36
INT:MUX.SNG_N0[6] 0.F11.B32 0.F10.B32 0.F10.B38 0.F10.B37 0.F10.B34 0.F10.B33 0.F10.B35 0.F10.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_NN4[2] 0 0 0 0 0 0 1 0
DBL_SE2[2] 0 0 0 0 0 1 0 0
DBL_EE2[2] 0 0 0 0 1 0 0 0
QUAD_SE4[2] 0 0 0 1 0 0 0 0
QUAD_EE4[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_E1[6] 0 1 0 0 0 0 1 0
SNG_N1[2] 0 1 0 0 0 1 0 0
SNG_N1[6] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[13] 1 0 1 0 0 0 0 0
INT:MUX.DBL_EE0[3] 0.F7.B48 0.F6.B48 0.F6.B54 0.F6.B53 0.F6.B50 0.F6.B49 0.F6.B51 0.F6.B52
INT:MUX.DBL_NE0[3] 0.F6.B55 0.F7.B55 0.F7.B54 0.F7.B53 0.F7.B50 0.F7.B49 0.F7.B51 0.F7.B52
INT:MUX.SNG_E0[2] 0.F10.B55 0.F11.B55 0.F11.B54 0.F11.B53 0.F11.B50 0.F11.B49 0.F11.B51 0.F11.B52
INT:MUX.SNG_N0[7] 0.F11.B48 0.F10.B48 0.F10.B54 0.F10.B53 0.F10.B50 0.F10.B49 0.F10.B51 0.F10.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_NN4[3] 0 0 0 0 0 0 1 0
DBL_SE2[3] 0 0 0 0 0 1 0 0
DBL_EE2[3] 0 0 0 0 1 0 0 0
QUAD_SE4[3] 0 0 0 1 0 0 0 0
QUAD_EE4[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_E1[7] 0 1 0 0 0 0 1 0
SNG_N1[3] 0 1 0 0 0 1 0 0
SNG_N1[7] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[16] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[0] 0.F5.B0 0.F4.B0 0.F4.B6 0.F4.B5 0.F4.B2 0.F4.B1 0.F4.B4 0.F4.B3
INT:MUX.DBL_NW0[0] 0.F4.B7 0.F5.B7 0.F5.B6 0.F5.B5 0.F5.B2 0.F5.B1 0.F5.B4 0.F5.B3
INT:MUX.SNG_N0[3] 0.F9.B0 0.F8.B0 0.F8.B6 0.F8.B5 0.F8.B2 0.F8.B1 0.F8.B4 0.F8.B3
INT:MUX.SNG_W0[5] 0.F8.B7 0.F9.B7 0.F9.B6 0.F9.B5 0.F9.B2 0.F9.B1 0.F9.B4 0.F9.B3
NONE 0 0 0 0 0 0 0 0
QUAD_NN4[0] 0 0 0 0 0 0 0 1
QUAD_NE4[0] 0 0 0 0 0 0 1 0
DBL_NW2[0] 0 0 0 0 0 1 0 0
DBL_WW2_N3 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NW4[0] 0 0 1 0 0 0 0 0
SNG_W1[4] 0 1 0 0 0 0 0 1
SNG_W1_N3 0 1 0 0 0 0 1 0
SNG_N1[0] 0 1 0 0 0 1 0 0
SNG_N1[4] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[7] 1 0 0 0 0 0 0 1
OUT[12] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[19] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[1] 0.F5.B16 0.F4.B16 0.F4.B22 0.F4.B21 0.F4.B18 0.F4.B17 0.F4.B19 0.F4.B20
INT:MUX.DBL_NW0[1] 0.F4.B23 0.F5.B23 0.F5.B22 0.F5.B21 0.F5.B18 0.F5.B17 0.F5.B19 0.F5.B20
INT:MUX.SNG_N0[0] 0.F9.B16 0.F8.B16 0.F8.B22 0.F8.B21 0.F8.B18 0.F8.B17 0.F8.B19 0.F8.B20
INT:MUX.SNG_W0[6] 0.F8.B23 0.F9.B23 0.F9.B22 0.F9.B21 0.F9.B18 0.F9.B17 0.F9.B19 0.F9.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_NN4[1] 0 0 0 0 0 0 1 0
DBL_NW2[1] 0 0 0 0 0 1 0 0
DBL_WW2[0] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NW4[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_N1[1] 0 1 0 0 0 1 0 0
SNG_N1[5] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[22] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[2] 0.F5.B32 0.F4.B32 0.F4.B38 0.F4.B37 0.F4.B34 0.F4.B33 0.F4.B35 0.F4.B36
INT:MUX.DBL_NW0[2] 0.F4.B39 0.F5.B39 0.F5.B38 0.F5.B37 0.F5.B34 0.F5.B33 0.F5.B35 0.F5.B36
INT:MUX.SNG_N0[1] 0.F9.B32 0.F8.B32 0.F8.B38 0.F8.B37 0.F8.B34 0.F8.B33 0.F8.B35 0.F8.B36
INT:MUX.SNG_W0[7] 0.F8.B39 0.F9.B39 0.F9.B38 0.F9.B37 0.F9.B34 0.F9.B33 0.F9.B35 0.F9.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_NN4[2] 0 0 0 0 0 0 1 0
DBL_NW2[2] 0 0 0 0 0 1 0 0
DBL_WW2[1] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NW4[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_N1[2] 0 1 0 0 0 1 0 0
SNG_N1[6] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[13] 1 0 1 0 0 0 0 0
INT:MUX.DBL_NN0[3] 0.F5.B48 0.F4.B48 0.F4.B54 0.F4.B53 0.F4.B50 0.F4.B49 0.F4.B51 0.F4.B52
INT:MUX.DBL_NW0[3] 0.F4.B55 0.F5.B55 0.F5.B54 0.F5.B53 0.F5.B50 0.F5.B49 0.F5.B51 0.F5.B52
INT:MUX.SNG_N0[2] 0.F9.B48 0.F8.B48 0.F8.B54 0.F8.B53 0.F8.B50 0.F8.B49 0.F8.B51 0.F8.B52
INT:MUX.SNG_W0[4] 0.F8.B55 0.F9.B55 0.F9.B54 0.F9.B53 0.F9.B50 0.F9.B49 0.F9.B51 0.F9.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_NN4[3] 0 0 0 0 0 0 1 0
DBL_NW2[3] 0 0 0 0 0 1 0 0
DBL_WW2[2] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NW4[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_N1[3] 0 1 0 0 0 1 0 0
SNG_N1[7] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[16] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[0] 0.F6.B8 0.F7.B8 0.F7.B10 0.F7.B9 0.F7.B14 0.F7.B13 0.F7.B12 0.F7.B11
INT:MUX.DBL_SS0[0] 0.F7.B15 0.F6.B15 0.F6.B10 0.F6.B9 0.F6.B14 0.F6.B13 0.F6.B12 0.F6.B11
INT:MUX.SNG_E0[5] 0.F10.B8 0.F11.B8 0.F11.B10 0.F11.B9 0.F11.B14 0.F11.B13 0.F11.B12 0.F11.B11
INT:MUX.SNG_S0[0] 0.F11.B15 0.F10.B15 0.F10.B10 0.F10.B9 0.F10.B14 0.F10.B13 0.F10.B12 0.F10.B11
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_SW4[0] 0 0 0 0 0 0 1 0
DBL_EE2[0] 0 0 0 0 0 1 0 0
DBL_SE2[0] 0 0 0 0 1 0 0 0
QUAD_EE4[0] 0 0 0 1 0 0 0 0
QUAD_SE4[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_E1[4] 0 1 0 0 0 0 1 0
SNG_S1[0] 0 1 0 0 0 1 0 0
SNG_S1[4] 0 1 0 0 1 0 0 0
DBL_SS2[0] 0 1 0 1 0 0 0 0
DBL_SW2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[2] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[19] 1 0 0 1 0 0 0 0
OUT[14] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[1] 0.F6.B24 0.F7.B24 0.F7.B26 0.F7.B25 0.F7.B30 0.F7.B29 0.F7.B28 0.F7.B27
INT:MUX.DBL_SS0[1] 0.F7.B31 0.F6.B31 0.F6.B26 0.F6.B25 0.F6.B30 0.F6.B29 0.F6.B28 0.F6.B27
INT:MUX.SNG_E0[6] 0.F10.B24 0.F11.B24 0.F11.B26 0.F11.B25 0.F11.B30 0.F11.B29 0.F11.B28 0.F11.B27
INT:MUX.SNG_S0[1] 0.F11.B31 0.F10.B31 0.F10.B26 0.F10.B25 0.F10.B30 0.F10.B29 0.F10.B28 0.F10.B27
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_SW4[1] 0 0 0 0 0 0 1 0
DBL_EE2[1] 0 0 0 0 0 1 0 0
DBL_SE2[1] 0 0 0 0 1 0 0 0
QUAD_EE4[1] 0 0 0 1 0 0 0 0
QUAD_SE4[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_E1[5] 0 1 0 0 0 0 1 0
SNG_S1[1] 0 1 0 0 0 1 0 0
SNG_S1[5] 0 1 0 0 1 0 0 0
DBL_SS2[1] 0 1 0 1 0 0 0 0
DBL_SW2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[5] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[22] 1 0 0 1 0 0 0 0
OUT[17] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[2] 0.F6.B40 0.F7.B40 0.F7.B42 0.F7.B41 0.F7.B46 0.F7.B45 0.F7.B44 0.F7.B43
INT:MUX.DBL_SS0[2] 0.F7.B47 0.F6.B47 0.F6.B42 0.F6.B41 0.F6.B46 0.F6.B45 0.F6.B44 0.F6.B43
INT:MUX.SNG_E0[7] 0.F10.B40 0.F11.B40 0.F11.B42 0.F11.B41 0.F11.B46 0.F11.B45 0.F11.B44 0.F11.B43
INT:MUX.SNG_S0[2] 0.F11.B47 0.F10.B47 0.F10.B42 0.F10.B41 0.F10.B46 0.F10.B45 0.F10.B44 0.F10.B43
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_SW4[2] 0 0 0 0 0 0 1 0
DBL_EE2[2] 0 0 0 0 0 1 0 0
DBL_SE2[2] 0 0 0 0 1 0 0 0
QUAD_EE4[2] 0 0 0 1 0 0 0 0
QUAD_SE4[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_E1[6] 0 1 0 0 0 0 1 0
SNG_S1[2] 0 1 0 0 0 1 0 0
SNG_S1[6] 0 1 0 0 1 0 0 0
DBL_SS2[2] 0 1 0 1 0 0 0 0
DBL_SW2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[8] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[13] 1 0 0 1 0 0 0 0
OUT[20] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SE0[3] 0.F6.B56 0.F7.B56 0.F7.B58 0.F7.B57 0.F7.B62 0.F7.B61 0.F7.B60 0.F7.B59
INT:MUX.DBL_SS0[3] 0.F7.B63 0.F6.B63 0.F6.B58 0.F6.B57 0.F6.B62 0.F6.B61 0.F6.B60 0.F6.B59
INT:MUX.SNG_E0[4] 0.F10.B56 0.F11.B56 0.F11.B58 0.F11.B57 0.F11.B62 0.F11.B61 0.F11.B60 0.F11.B59
INT:MUX.SNG_S0[3] 0.F11.B63 0.F10.B63 0.F10.B58 0.F10.B57 0.F10.B62 0.F10.B61 0.F10.B60 0.F10.B59
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_SW4[3] 0 0 0 0 0 0 1 0
DBL_EE2[3] 0 0 0 0 0 1 0 0
DBL_SE2[3] 0 0 0 0 1 0 0 0
QUAD_EE4[3] 0 0 0 1 0 0 0 0
QUAD_SE4[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_E1[7] 0 1 0 0 0 0 1 0
SNG_S1[3] 0 1 0 0 0 1 0 0
SNG_S1[7] 0 1 0 0 1 0 0 0
DBL_SS2[3] 0 1 0 1 0 0 0 0
DBL_SW2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[11] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[16] 1 0 0 1 0 0 0 0
OUT[23] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[0] 0.F4.B8 0.F5.B8 0.F5.B10 0.F5.B9 0.F5.B14 0.F5.B13 0.F5.B12 0.F5.B11
INT:MUX.DBL_WW0[0] 0.F5.B15 0.F4.B15 0.F4.B10 0.F4.B9 0.F4.B14 0.F4.B13 0.F4.B12 0.F4.B11
INT:MUX.SNG_S0[5] 0.F9.B15 0.F8.B15 0.F8.B10 0.F8.B9 0.F8.B14 0.F8.B13 0.F8.B12 0.F8.B11
INT:MUX.SNG_W0[3] 0.F8.B8 0.F9.B8 0.F9.B10 0.F9.B9 0.F9.B14 0.F9.B13 0.F9.B12 0.F9.B11
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_SW4[0] 0 0 0 0 0 0 1 0
DBL_NW2[1] 0 0 0 0 0 1 0 0
DBL_WW2[0] 0 0 0 0 1 0 0 0
QUAD_NW4[1] 0 0 0 1 0 0 0 0
QUAD_WW4[1] 0 0 1 0 0 0 0 0
SNG_W1[0] 0 1 0 0 0 0 0 1
SNG_W1[5] 0 1 0 0 0 0 1 0
SNG_S1[0] 0 1 0 0 0 1 0 0
SNG_S1[4] 0 1 0 0 1 0 0 0
DBL_SS2[0] 0 1 0 1 0 0 0 0
DBL_SW2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[7] 1 0 0 0 0 0 1 0
OUT[2] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[19] 1 0 0 1 0 0 0 0
OUT[14] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[1] 0.F4.B24 0.F5.B24 0.F5.B26 0.F5.B25 0.F5.B30 0.F5.B29 0.F5.B28 0.F5.B27
INT:MUX.DBL_WW0[1] 0.F5.B31 0.F4.B31 0.F4.B26 0.F4.B25 0.F4.B30 0.F4.B29 0.F4.B28 0.F4.B27
INT:MUX.SNG_S0[6] 0.F9.B31 0.F8.B31 0.F8.B26 0.F8.B25 0.F8.B30 0.F8.B29 0.F8.B28 0.F8.B27
INT:MUX.SNG_W0[0] 0.F8.B24 0.F9.B24 0.F9.B26 0.F9.B25 0.F9.B30 0.F9.B29 0.F9.B28 0.F9.B27
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_SW4[1] 0 0 0 0 0 0 1 0
DBL_NW2[2] 0 0 0 0 0 1 0 0
DBL_WW2[1] 0 0 0 0 1 0 0 0
QUAD_NW4[2] 0 0 0 1 0 0 0 0
QUAD_WW4[2] 0 0 1 0 0 0 0 0
SNG_W1[1] 0 1 0 0 0 0 0 1
SNG_W1[6] 0 1 0 0 0 0 1 0
SNG_S1[1] 0 1 0 0 0 1 0 0
SNG_S1[5] 0 1 0 0 1 0 0 0
DBL_SS2[1] 0 1 0 1 0 0 0 0
DBL_SW2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[10] 1 0 0 0 0 0 1 0
OUT[5] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[22] 1 0 0 1 0 0 0 0
OUT[17] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[2] 0.F4.B40 0.F5.B40 0.F5.B42 0.F5.B41 0.F5.B46 0.F5.B45 0.F5.B44 0.F5.B43
INT:MUX.DBL_WW0[2] 0.F5.B47 0.F4.B47 0.F4.B42 0.F4.B41 0.F4.B46 0.F4.B45 0.F4.B44 0.F4.B43
INT:MUX.SNG_S0[7] 0.F9.B47 0.F8.B47 0.F8.B42 0.F8.B41 0.F8.B46 0.F8.B45 0.F8.B44 0.F8.B43
INT:MUX.SNG_W0[1] 0.F8.B40 0.F9.B40 0.F9.B42 0.F9.B41 0.F9.B46 0.F9.B45 0.F9.B44 0.F9.B43
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_SW4[2] 0 0 0 0 0 0 1 0
DBL_NW2[3] 0 0 0 0 0 1 0 0
DBL_WW2[2] 0 0 0 0 1 0 0 0
QUAD_NW4[3] 0 0 0 1 0 0 0 0
QUAD_WW4[3] 0 0 1 0 0 0 0 0
SNG_W1[2] 0 1 0 0 0 0 0 1
SNG_W1[7] 0 1 0 0 0 0 1 0
SNG_S1[2] 0 1 0 0 0 1 0 0
SNG_S1[6] 0 1 0 0 1 0 0 0
DBL_SS2[2] 0 1 0 1 0 0 0 0
DBL_SW2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[1] 1 0 0 0 0 0 1 0
OUT[8] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[13] 1 0 0 1 0 0 0 0
OUT[20] 1 0 1 0 0 0 0 0
INT:MUX.DBL_SW0[3] 0.F4.B56 0.F5.B56 0.F5.B58 0.F5.B57 0.F5.B62 0.F5.B61 0.F5.B60 0.F5.B59
INT:MUX.DBL_WW0[3] 0.F5.B63 0.F4.B63 0.F4.B58 0.F4.B57 0.F4.B62 0.F4.B61 0.F4.B60 0.F4.B59
INT:MUX.SNG_S0[4] 0.F9.B63 0.F8.B63 0.F8.B58 0.F8.B57 0.F8.B62 0.F8.B61 0.F8.B60 0.F8.B59
INT:MUX.SNG_W0[2] 0.F8.B56 0.F9.B56 0.F9.B58 0.F9.B57 0.F9.B62 0.F9.B61 0.F9.B60 0.F9.B59
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_SW4[3] 0 0 0 0 0 0 1 0
DBL_NW2_S0 0 0 0 0 0 1 0 0
DBL_WW2[3] 0 0 0 0 1 0 0 0
QUAD_NW4_S0 0 0 0 1 0 0 0 0
QUAD_WW4_S0 0 0 1 0 0 0 0 0
SNG_W1[3] 0 1 0 0 0 0 0 1
SNG_W1_S4 0 1 0 0 0 0 1 0
SNG_S1[3] 0 1 0 0 0 1 0 0
SNG_S1[7] 0 1 0 0 1 0 0 0
DBL_SS2[3] 0 1 0 1 0 0 0 0
DBL_SW2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[4] 1 0 0 0 0 0 1 0
OUT[11] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[16] 1 0 0 1 0 0 0 0
OUT[23] 1 0 1 0 0 0 0 0
INT:MUX.IMUX_CLK[0] 0.F20.B38 0.F20.B39 0.F20.B32 0.F20.B35 0.F20.B36 0.F20.B37 0.F20.B34 0.F20.B33
INT:MUX.IMUX_CLK[1] 0.F20.B25 0.F20.B24 0.F20.B31 0.F20.B30 0.F20.B27 0.F20.B26 0.F20.B29 0.F20.B28
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 0 0 0 0 0 0 1
TIE_1 0 0 0 0 0 0 1 0
SNG_N1[6] 0 0 0 0 0 1 0 0
SNG_W1[6] 0 0 0 0 1 0 0 0
SNG_S1[5] 0 0 0 1 0 0 0 0
SNG_E1[5] 0 0 1 0 0 0 0 0
GCLK[10] 0 1 0 0 0 0 0 1
GCLK[11] 0 1 0 0 0 0 1 0
GCLK[6] 0 1 0 0 0 1 0 0
GCLK[7] 0 1 0 0 1 0 0 0
GCLK[8] 0 1 0 1 0 0 0 0
GCLK[9] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[53] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[43] 1 0 0 0 0 0 1 0
GCLK[12] 1 0 0 0 0 1 0 0
GCLK[13] 1 0 0 0 1 0 0 0
GCLK[14] 1 0 0 1 0 0 0 0
GCLK[15] 1 0 1 0 0 0 0 0
GCLK[4] 1 1 0 0 0 0 0 1
GCLK[5] 1 1 0 0 0 0 1 0
GCLK[0] 1 1 0 0 0 1 0 0
GCLK[1] 1 1 0 0 1 0 0 0
GCLK[2] 1 1 0 1 0 0 0 0
GCLK[3] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_GFAN[0] 0.F20.B0 0.F20.B1 0.F20.B7 0.F20.B4 0.F20.B3 0.F20.B2 0.F20.B5 0.F20.B6
INT:MUX.IMUX_GFAN[1] 0.F20.B15 0.F20.B14 0.F20.B8 0.F20.B9 0.F20.B12 0.F20.B13 0.F20.B10 0.F20.B11
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 1 0 0 0 0 0 1
TIE_1 0 1 0 0 0 0 1 0
SNG_S1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
SNG_N1[5] 0 1 0 1 0 0 0 0
SNG_W1[5] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[35] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[6] 1 0 0 0 0 0 1 0
GCLK[6] 1 0 0 0 0 1 0 0
GCLK[7] 1 0 0 0 1 0 0 0
IMUX_LOGICIN[53] 1 0 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 0 1 0 0 0 0 0
GCLK[4] 1 1 0 0 0 0 0 1
GCLK[5] 1 1 0 0 0 0 1 0
GCLK[0] 1 1 0 0 0 1 0 0
GCLK[1] 1 1 0 0 1 0 0 0
GCLK[2] 1 1 0 1 0 0 0 0
GCLK[3] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[0] 0.F13.B31 0.F12.B31 0.F12.B25 0.F12.B26 0.F12.B29 0.F12.B27 0.F12.B28 0.F12.B30
INT:MUX.IMUX_LOGICIN[20] 0.F13.B24 0.F12.B24 0.F13.B25 0.F13.B26 0.F13.B29 0.F13.B27 0.F13.B28 0.F13.B30
INT:MUX.IMUX_LOGICIN[25] 0.F13.B16 0.F12.B16 0.F13.B17 0.F13.B18 0.F13.B21 0.F13.B19 0.F13.B20 0.F13.B22
INT:MUX.IMUX_LOGICIN[48] 0.F13.B23 0.F12.B23 0.F12.B17 0.F12.B18 0.F12.B21 0.F12.B19 0.F12.B20 0.F12.B22
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[61] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[5] 1 1 0 0 0 0 1 0
OUT[22] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[11] 0.F14.B24 0.F15.B24 0.F14.B25 0.F14.B26 0.F14.B29 0.F14.B27 0.F14.B28 0.F14.B30
INT:MUX.IMUX_LOGICIN[13] 0.F14.B16 0.F15.B16 0.F14.B17 0.F14.B18 0.F14.B21 0.F14.B19 0.F14.B20 0.F14.B22
INT:MUX.IMUX_LOGICIN[33] 0.F14.B31 0.F15.B31 0.F15.B25 0.F15.B26 0.F15.B29 0.F15.B27 0.F15.B28 0.F15.B30
INT:MUX.IMUX_LOGICIN[54] 0.F14.B23 0.F15.B23 0.F15.B17 0.F15.B18 0.F15.B21 0.F15.B19 0.F15.B20 0.F15.B22
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[61] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[5] 1 1 0 0 0 0 1 0
OUT[22] 1 1 0 0 0 1 0 0
OUT[15] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[35] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[12] 0.F14.B8 0.F15.B8 0.F14.B9 0.F14.B10 0.F14.B13 0.F14.B11 0.F14.B12 0.F14.B14
INT:MUX.IMUX_LOGICIN[15] 0.F14.B0 0.F15.B0 0.F14.B1 0.F14.B2 0.F14.B5 0.F14.B3 0.F14.B4 0.F14.B6
INT:MUX.IMUX_LOGICIN[34] 0.F14.B15 0.F15.B15 0.F15.B9 0.F15.B10 0.F15.B13 0.F15.B11 0.F15.B12 0.F15.B14
INT:MUX.IMUX_LOGICIN[35] 0.F14.B7 0.F15.B7 0.F15.B1 0.F15.B2 0.F15.B5 0.F15.B3 0.F15.B4 0.F15.B6
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN52_N 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[14] 1 1 0 0 0 0 1 0
OUT[7] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[14] 0.F14.B55 0.F15.B55 0.F15.B49 0.F15.B50 0.F15.B53 0.F15.B51 0.F15.B52 0.F15.B54
INT:MUX.IMUX_LOGICIN[28] 0.F14.B48 0.F15.B48 0.F14.B49 0.F14.B50 0.F14.B53 0.F14.B51 0.F14.B52 0.F14.B54
INT:MUX.IMUX_LOGICIN[31] 0.F14.B63 0.F15.B63 0.F15.B57 0.F15.B58 0.F15.B61 0.F15.B59 0.F15.B60 0.F15.B62
INT:MUX.IMUX_LOGICIN[9] 0.F14.B56 0.F15.B56 0.F14.B57 0.F14.B58 0.F14.B61 0.F14.B59 0.F14.B60 0.F14.B62
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2_S0 0 0 0 0 0 0 1 0
DBL_WW2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2_S0 0 0 0 1 0 0 0 0
DBL_NN2_S0 0 0 1 0 0 0 0 0
SNG_E1_S0 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1_S4 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1_S0 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[11] 1 1 0 0 0 0 1 0
OUT[16] 1 1 0 0 0 1 0 0
OUT[21] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[16] 0.F18.B8 0.F19.B8 0.F18.B9 0.F18.B10 0.F18.B13 0.F18.B12 0.F18.B11 0.F18.B14
INT:MUX.IMUX_LOGICIN[36] 0.F18.B7 0.F19.B7 0.F19.B1 0.F19.B2 0.F19.B5 0.F19.B4 0.F19.B3 0.F19.B6
INT:MUX.IMUX_LOGICIN[56] 0.F18.B15 0.F19.B15 0.F19.B9 0.F19.B10 0.F19.B13 0.F19.B12 0.F19.B11 0.F19.B14
INT:MUX.IMUX_LOGICIN[7] 0.F18.B0 0.F19.B0 0.F18.B1 0.F18.B2 0.F18.B5 0.F18.B4 0.F18.B3 0.F18.B6
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2_N3 0 0 0 0 0 0 0 1
DBL_WW2_N3 0 0 0 0 0 0 1 0
DBL_NW2[0] 0 0 0 0 0 1 0 0
DBL_SW2_N3 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[4] 0 1 0 0 0 0 1 0
SNG_W1_N3 0 1 0 0 0 1 0 0
SNG_E1_N7 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN21_N 1 0 0 0 0 0 0 1
SNG_N1[4] 1 0 0 0 0 0 1 0
SNG_N1[0] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[19] 1 1 0 0 0 0 1 0
OUT[2] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[17] 0.F18.B24 0.F19.B24 0.F18.B25 0.F18.B26 0.F18.B29 0.F18.B27 0.F18.B28 0.F18.B30
INT:MUX.IMUX_LOGICIN[30] 0.F18.B23 0.F19.B23 0.F19.B17 0.F19.B18 0.F19.B21 0.F19.B19 0.F19.B20 0.F19.B22
INT:MUX.IMUX_LOGICIN[44] 0.F18.B16 0.F19.B16 0.F18.B17 0.F18.B18 0.F18.B21 0.F18.B19 0.F18.B20 0.F18.B22
INT:MUX.IMUX_LOGICIN[57] 0.F18.B31 0.F19.B31 0.F19.B25 0.F19.B26 0.F19.B29 0.F19.B27 0.F19.B28 0.F19.B30
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[63] 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[17] 1 1 0 0 0 0 1 0
OUT[10] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[18] 0.F18.B40 0.F19.B40 0.F18.B41 0.F18.B42 0.F18.B45 0.F18.B43 0.F18.B44 0.F18.B46
INT:MUX.IMUX_LOGICIN[29] 0.F18.B39 0.F19.B39 0.F19.B33 0.F19.B34 0.F19.B37 0.F19.B35 0.F19.B36 0.F19.B38
INT:MUX.IMUX_LOGICIN[51] 0.F18.B32 0.F19.B32 0.F18.B33 0.F18.B34 0.F18.B37 0.F18.B35 0.F18.B36 0.F18.B38
INT:MUX.IMUX_LOGICIN[58] 0.F18.B47 0.F19.B47 0.F19.B41 0.F19.B42 0.F19.B45 0.F19.B43 0.F19.B44 0.F19.B46
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[8] 1 1 0 0 0 0 1 0
OUT[13] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[19] 0.F18.B56 0.F19.B56 0.F18.B57 0.F18.B58 0.F18.B61 0.F18.B59 0.F18.B60 0.F18.B62
INT:MUX.IMUX_LOGICIN[59] 0.F18.B63 0.F19.B63 0.F19.B57 0.F19.B58 0.F19.B61 0.F19.B59 0.F19.B60 0.F19.B62
INT:MUX.IMUX_LOGICIN[63] 0.F18.B48 0.F19.B48 0.F18.B49 0.F18.B50 0.F18.B53 0.F18.B51 0.F18.B52 0.F18.B54
INT:MUX.IMUX_LOGICIN[8] 0.F18.B55 0.F19.B55 0.F19.B49 0.F19.B50 0.F19.B53 0.F19.B51 0.F19.B52 0.F19.B54
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[23] 1 1 0 0 0 0 1 0
OUT[4] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[1] 0.F13.B40 0.F12.B40 0.F13.B41 0.F13.B42 0.F13.B45 0.F13.B43 0.F13.B44 0.F13.B46
INT:MUX.IMUX_LOGICIN[26] 0.F13.B32 0.F12.B32 0.F13.B33 0.F13.B34 0.F13.B37 0.F13.B35 0.F13.B36 0.F13.B38
INT:MUX.IMUX_LOGICIN[49] 0.F13.B39 0.F12.B39 0.F12.B33 0.F12.B34 0.F12.B37 0.F12.B35 0.F12.B36 0.F12.B38
INT:MUX.IMUX_LOGICIN[53] 0.F13.B47 0.F12.B47 0.F12.B41 0.F12.B42 0.F12.B45 0.F12.B43 0.F12.B44 0.F12.B46
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[20] 1 1 0 0 0 0 1 0
OUT[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[21] 0.F17.B47 0.F16.B47 0.F16.B41 0.F16.B42 0.F16.B45 0.F16.B43 0.F16.B44 0.F16.B46
INT:MUX.IMUX_LOGICIN[22] 0.F17.B40 0.F16.B40 0.F17.B41 0.F17.B42 0.F17.B45 0.F17.B43 0.F17.B44 0.F17.B46
INT:MUX.IMUX_LOGICIN[3] 0.F17.B32 0.F16.B32 0.F17.B33 0.F17.B34 0.F17.B37 0.F17.B35 0.F17.B36 0.F17.B38
INT:MUX.IMUX_LOGICIN[40] 0.F17.B39 0.F16.B39 0.F16.B33 0.F16.B34 0.F16.B37 0.F16.B35 0.F16.B36 0.F16.B38
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[2] 0 0 0 0 0 0 1 0
DBL_WW2[1] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[2] 0 0 0 1 0 0 0 0
DBL_NN2[2] 0 0 1 0 0 0 0 0
SNG_E1[2] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[2] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[63] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[5] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[8] 1 1 0 0 0 0 1 0
OUT[13] 1 1 0 0 0 1 0 0
OUT[18] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[6] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[23] 0.F17.B24 0.F16.B24 0.F17.B25 0.F17.B26 0.F17.B29 0.F17.B27 0.F17.B28 0.F17.B30
INT:MUX.IMUX_LOGICIN[41] 0.F17.B23 0.F16.B23 0.F16.B17 0.F16.B18 0.F16.B21 0.F16.B19 0.F16.B20 0.F16.B22
INT:MUX.IMUX_LOGICIN[43] 0.F17.B31 0.F16.B31 0.F16.B25 0.F16.B26 0.F16.B29 0.F16.B27 0.F16.B28 0.F16.B30
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[1] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[1] 0 0 0 0 1 0 0 0
DBL_NE2[1] 0 0 0 1 0 0 0 0
DBL_NN2[1] 0 0 1 0 0 0 0 0
SNG_E1[1] 0 1 0 0 0 0 0 1
SNG_W1[1] 0 1 0 0 0 0 1 0
SNG_W1[5] 0 1 0 0 0 1 0 0
SNG_E1[5] 0 1 0 0 1 0 0 0
DBL_EE2[1] 0 1 0 1 0 0 0 0
DBL_SE2[1] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[63] 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[5] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[1] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[17] 1 1 0 0 0 0 1 0
OUT[10] 1 1 0 0 0 1 0 0
OUT[3] 1 1 0 0 1 0 0 0
IMUX_LOGICIN[6] 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[24] 0.F13.B0 0.F12.B0 0.F13.B1 0.F13.B2 0.F13.B5 0.F13.B3 0.F13.B4 0.F13.B6
INT:MUX.IMUX_LOGICIN[38] 0.F13.B15 0.F12.B15 0.F12.B9 0.F12.B10 0.F12.B13 0.F12.B11 0.F12.B12 0.F12.B14
INT:MUX.IMUX_LOGICIN[47] 0.F13.B7 0.F12.B7 0.F12.B1 0.F12.B2 0.F12.B5 0.F12.B3 0.F12.B4 0.F12.B6
INT:MUX.IMUX_LOGICIN[62] 0.F13.B8 0.F12.B8 0.F13.B9 0.F13.B10 0.F13.B13 0.F13.B11 0.F13.B12 0.F13.B14
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[1] 0 0 0 0 0 0 1 0
DBL_WW2[0] 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[4] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN52_N 1 0 0 0 0 0 0 1
SNG_N1[1] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN28_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1[4] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[14] 1 1 0 0 0 0 1 0
OUT[7] 1 1 0 0 0 1 0 0
OUT[0] 1 1 0 0 1 0 0 0
IMUX_LOGICIN20_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[53] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[27] 0.F13.B48 0.F12.B48 0.F13.B49 0.F13.B50 0.F13.B53 0.F13.B51 0.F13.B52 0.F13.B54
INT:MUX.IMUX_LOGICIN[37] 0.F13.B63 0.F12.B63 0.F12.B57 0.F12.B58 0.F12.B61 0.F12.B59 0.F12.B60 0.F12.B62
INT:MUX.IMUX_LOGICIN[50] 0.F13.B55 0.F12.B55 0.F12.B49 0.F12.B50 0.F12.B53 0.F12.B51 0.F12.B52 0.F12.B54
INT:MUX.IMUX_LOGICIN[61] 0.F13.B56 0.F12.B56 0.F13.B57 0.F13.B58 0.F13.B61 0.F13.B59 0.F13.B60 0.F13.B62
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2_S0 0 0 0 0 0 0 1 0
DBL_WW2[3] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1_S0 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN52_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[7] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[11] 1 1 0 0 0 0 1 0
OUT[16] 1 1 0 0 0 1 0 0
OUT[21] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN20_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[2] 0.F17.B48 0.F16.B48 0.F17.B49 0.F17.B50 0.F17.B53 0.F17.B51 0.F17.B52 0.F17.B54
INT:MUX.IMUX_LOGICIN[39] 0.F17.B55 0.F16.B55 0.F16.B49 0.F16.B50 0.F16.B53 0.F16.B51 0.F16.B52 0.F16.B54
INT:MUX.IMUX_LOGICIN[46] 0.F17.B63 0.F16.B63 0.F16.B57 0.F16.B58 0.F16.B61 0.F16.B59 0.F16.B60 0.F16.B62
INT:MUX.IMUX_LOGICIN[60] 0.F17.B56 0.F16.B56 0.F17.B57 0.F17.B58 0.F17.B61 0.F17.B59 0.F17.B60 0.F17.B62
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[3] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[3] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[3] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[7] 0 1 0 0 1 0 0 0
DBL_EE2[3] 0 1 0 1 0 0 0 0
DBL_SE2[3] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[43] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[7] 1 0 0 0 0 1 0 0
IMUX_LOGICIN21_BOUNCE 1 0 0 0 1 0 0 0
SNG_S1[3] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[23] 1 1 0 0 0 0 1 0
OUT[4] 1 1 0 0 0 1 0 0
OUT[9] 1 1 0 0 1 0 0 0
IMUX_LOGICIN36_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN44_S 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[32] 0.F14.B47 0.F15.B47 0.F15.B41 0.F15.B42 0.F15.B45 0.F15.B43 0.F15.B44 0.F15.B46
INT:MUX.IMUX_LOGICIN[52] 0.F14.B39 0.F15.B39 0.F15.B33 0.F15.B34 0.F15.B37 0.F15.B35 0.F15.B36 0.F15.B38
INT:MUX.IMUX_LOGICIN[55] 0.F14.B32 0.F15.B32 0.F14.B33 0.F14.B34 0.F14.B37 0.F14.B35 0.F14.B36 0.F14.B38
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[2] 0 0 0 0 0 0 0 1
DBL_NW2[3] 0 0 0 0 0 0 1 0
DBL_WW2[2] 0 0 0 0 0 1 0 0
DBL_SW2[2] 0 0 0 0 1 0 0 0
DBL_NE2[3] 0 0 0 1 0 0 0 0
DBL_NN2[3] 0 0 1 0 0 0 0 0
SNG_E1[3] 0 1 0 0 0 0 0 1
SNG_W1[2] 0 1 0 0 0 0 1 0
SNG_W1[7] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
DBL_EE2[2] 0 1 0 1 0 0 0 0
DBL_SE2[2] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
SNG_N1[3] 1 0 0 0 0 0 1 0
SNG_N1[6] 1 0 0 0 0 1 0 0
IMUX_LOGICIN[61] 1 0 0 0 1 0 0 0
SNG_S1[2] 1 0 0 1 0 0 0 0
SNG_S1[6] 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[20] 1 1 0 0 0 0 1 0
OUT[1] 1 1 0 0 0 1 0 0
OUT[6] 1 1 0 0 1 0 0 0
IMUX_LOGICIN62_S 1 1 0 1 0 0 0 0
IMUX_LOGICIN[35] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_LOGICIN[42] 0.F17.B7 0.F16.B7 0.F16.B1 0.F16.B2 0.F16.B5 0.F16.B3 0.F16.B4 0.F16.B6
INT:MUX.IMUX_LOGICIN[45] 0.F17.B15 0.F16.B15 0.F16.B9 0.F16.B10 0.F16.B13 0.F16.B11 0.F16.B12 0.F16.B14
INT:MUX.IMUX_LOGICIN[5] 0.F17.B0 0.F16.B0 0.F17.B1 0.F17.B2 0.F17.B5 0.F17.B3 0.F17.B4 0.F17.B6
INT:MUX.IMUX_LOGICIN[6] 0.F17.B8 0.F16.B8 0.F17.B9 0.F17.B10 0.F17.B13 0.F17.B11 0.F17.B12 0.F17.B14
PULLUP 0 0 0 0 0 0 0 0
DBL_SS2[0] 0 0 0 0 0 0 0 1
DBL_NW2[0] 0 0 0 0 0 0 1 0
DBL_WW2_N3 0 0 0 0 0 1 0 0
DBL_SW2[0] 0 0 0 0 1 0 0 0
DBL_NE2[0] 0 0 0 1 0 0 0 0
DBL_NN2[0] 0 0 1 0 0 0 0 0
SNG_E1[0] 0 1 0 0 0 0 0 1
SNG_W1[0] 0 1 0 0 0 0 1 0
SNG_W1[4] 0 1 0 0 0 1 0 0
SNG_E1[4] 0 1 0 0 1 0 0 0
DBL_EE2[0] 0 1 0 1 0 0 0 0
DBL_SE2[0] 0 1 1 0 0 0 0 0
IMUX_LOGICIN21_N 1 0 0 0 0 0 0 1
SNG_N1[0] 1 0 0 0 0 0 1 0
SNG_N1[4] 1 0 0 0 0 1 0 0
IMUX_LOGICIN60_N 1 0 0 0 1 0 0 0
SNG_S1[0] 1 0 0 1 0 0 0 0
SNG_S1_N7 1 0 1 0 0 0 0 0
TIE_1 1 1 0 0 0 0 0 1
OUT[2] 1 1 0 0 0 0 1 0
OUT[19] 1 1 0 0 0 1 0 0
OUT[12] 1 1 0 0 1 0 0 0
IMUX_LOGICIN44_BOUNCE 1 1 0 1 0 0 0 0
IMUX_LOGICIN[51] 1 1 1 0 0 0 0 0
INT:MUX.IMUX_SR[0] 0.F20.B63 0.F20.B62 0.F20.B56 0.F20.B59 0.F20.B60 0.F20.B61 0.F20.B58 0.F20.B57
INT:MUX.IMUX_SR[1] 0.F20.B48 0.F20.B49 0.F20.B55 0.F20.B54 0.F20.B51 0.F20.B50 0.F20.B53 0.F20.B52
PULLUP 0 0 0 0 0 0 0 0
TIE_0 0 1 0 0 0 0 0 1
TIE_1 0 1 0 0 0 0 1 0
SNG_S1[6] 0 1 0 0 0 1 0 0
SNG_E1[6] 0 1 0 0 1 0 0 0
SNG_N1[6] 0 1 0 1 0 0 0 0
SNG_W1[6] 0 1 1 0 0 0 0 0
IMUX_LOGICIN[13] 1 0 0 0 0 0 0 1
IMUX_LOGICIN[43] 1 0 0 0 0 0 1 0
GCLK[14] 1 0 0 0 0 1 0 0
GCLK[15] 1 0 0 0 1 0 0 0
IMUX_LOGICIN[61] 1 0 0 1 0 0 0 0
IMUX_LOGICIN[63] 1 0 1 0 0 0 0 0
GCLK[12] 1 1 0 0 0 0 0 1
GCLK[13] 1 1 0 0 0 0 1 0
GCLK[8] 1 1 0 0 0 1 0 0
GCLK[9] 1 1 0 0 1 0 0 0
GCLK[10] 1 1 0 1 0 0 0 0
GCLK[11] 1 1 1 0 0 0 0 0
INT:MUX.QUAD_EE0[0] 0.F3.B15 0.F2.B15 0.F2.B12 0.F2.B13 0.F2.B10 0.F2.B14 0.F2.B11 0.F2.B9
INT:MUX.QUAD_SE0[0] 0.F2.B8 0.F3.B8 0.F3.B12 0.F3.B13 0.F3.B10 0.F3.B14 0.F3.B11 0.F3.B9
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[0] 0 0 0 0 0 0 0 1
QUAD_NE4[0] 0 0 0 0 0 0 1 0
QUAD_SW4[0] 0 0 0 0 0 1 0 0
QUAD_SE4[0] 0 0 0 0 1 0 0 0
QUAD_SS4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_EE2[0] 0 1 0 0 0 0 0 1
DBL_SS2[0] 0 1 0 0 0 0 1 0
DBL_SW2[0] 0 1 0 0 0 1 0 0
DBL_SE2[0] 0 1 0 0 1 0 0 0
DBL_NN2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[19] 1 0 0 0 0 0 0 1
OUT[12] 1 0 0 0 0 0 1 0
OUT[0] 1 0 0 0 0 1 0 0
OUT[14] 1 0 0 0 1 0 0 0
OUT[2] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[1] 0.F3.B31 0.F2.B31 0.F2.B28 0.F2.B29 0.F2.B26 0.F2.B30 0.F2.B27 0.F2.B25
INT:MUX.QUAD_SE0[1] 0.F2.B24 0.F3.B24 0.F3.B28 0.F3.B29 0.F3.B26 0.F3.B30 0.F3.B27 0.F3.B25
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[1] 0 0 0 0 0 0 0 1
QUAD_NE4[1] 0 0 0 0 0 0 1 0
QUAD_SW4[1] 0 0 0 0 0 1 0 0
QUAD_SE4[1] 0 0 0 0 1 0 0 0
QUAD_SS4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_EE2[1] 0 1 0 0 0 0 0 1
DBL_SS2[1] 0 1 0 0 0 0 1 0
DBL_SW2[1] 0 1 0 0 0 1 0 0
DBL_SE2[1] 0 1 0 0 1 0 0 0
DBL_NN2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[22] 1 0 0 0 0 0 0 1
OUT[15] 1 0 0 0 0 0 1 0
OUT[3] 1 0 0 0 0 1 0 0
OUT[17] 1 0 0 0 1 0 0 0
OUT[5] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[2] 0.F3.B47 0.F2.B47 0.F2.B44 0.F2.B45 0.F2.B42 0.F2.B46 0.F2.B43 0.F2.B41
INT:MUX.QUAD_SE0[2] 0.F2.B40 0.F3.B40 0.F3.B44 0.F3.B45 0.F3.B42 0.F3.B46 0.F3.B43 0.F3.B41
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[2] 0 0 0 0 0 0 0 1
QUAD_NE4[2] 0 0 0 0 0 0 1 0
QUAD_SW4[2] 0 0 0 0 0 1 0 0
QUAD_SE4[2] 0 0 0 0 1 0 0 0
QUAD_SS4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_EE2[2] 0 1 0 0 0 0 0 1
DBL_SS2[2] 0 1 0 0 0 0 1 0
DBL_SW2[2] 0 1 0 0 0 1 0 0
DBL_SE2[2] 0 1 0 0 1 0 0 0
DBL_NN2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[13] 1 0 0 0 0 0 0 1
OUT[18] 1 0 0 0 0 0 1 0
OUT[6] 1 0 0 0 0 1 0 0
OUT[20] 1 0 0 0 1 0 0 0
OUT[8] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_EE0[3] 0.F3.B63 0.F2.B63 0.F2.B60 0.F2.B61 0.F2.B58 0.F2.B62 0.F2.B59 0.F2.B57
INT:MUX.QUAD_SE0[3] 0.F2.B56 0.F3.B56 0.F3.B60 0.F3.B61 0.F3.B58 0.F3.B62 0.F3.B59 0.F3.B57
NONE 0 0 0 0 0 0 0 0
QUAD_EE4[3] 0 0 0 0 0 0 0 1
QUAD_NE4[3] 0 0 0 0 0 0 1 0
QUAD_SW4[3] 0 0 0 0 0 1 0 0
QUAD_SE4[3] 0 0 0 0 1 0 0 0
QUAD_SS4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_EE2[3] 0 1 0 0 0 0 0 1
DBL_SS2[3] 0 1 0 0 0 0 1 0
DBL_SW2[3] 0 1 0 0 0 1 0 0
DBL_SE2[3] 0 1 0 0 1 0 0 0
DBL_NN2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[16] 1 0 0 0 0 0 0 1
OUT[21] 1 0 0 0 0 0 1 0
OUT[9] 1 0 0 0 0 1 0 0
OUT[23] 1 0 0 0 1 0 0 0
OUT[11] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[0] 0.F3.B0 0.F2.B0 0.F2.B3 0.F2.B1 0.F2.B2 0.F2.B5 0.F2.B6 0.F2.B4
INT:MUX.QUAD_NN0[0] 0.F2.B7 0.F3.B7 0.F3.B3 0.F3.B1 0.F3.B2 0.F3.B5 0.F3.B6 0.F3.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_EE4[0] 0 0 0 0 0 0 1 0
QUAD_SE4[0] 0 0 0 0 0 1 0 0
QUAD_NW4[0] 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_WW2_N3 0 1 0 0 0 0 0 1
DBL_EE2[0] 0 1 0 0 0 0 1 0
DBL_SE2[0] 0 1 0 0 0 1 0 0
DBL_NN2[0] 0 1 0 0 1 0 0 0
DBL_NW2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[19] 1 0 0 0 0 0 1 0
OUT[14] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[0] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[1] 0.F3.B16 0.F2.B16 0.F2.B19 0.F2.B17 0.F2.B18 0.F2.B21 0.F2.B22 0.F2.B20
INT:MUX.QUAD_NN0[1] 0.F2.B23 0.F3.B23 0.F3.B19 0.F3.B17 0.F3.B18 0.F3.B21 0.F3.B22 0.F3.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_EE4[1] 0 0 0 0 0 0 1 0
QUAD_SE4[1] 0 0 0 0 0 1 0 0
QUAD_NW4[1] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_EE2[1] 0 1 0 0 0 0 1 0
DBL_SE2[1] 0 1 0 0 0 1 0 0
DBL_NN2[1] 0 1 0 0 1 0 0 0
DBL_NW2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[22] 1 0 0 0 0 0 1 0
OUT[17] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[3] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[2] 0.F3.B32 0.F2.B32 0.F2.B35 0.F2.B33 0.F2.B34 0.F2.B37 0.F2.B38 0.F2.B36
INT:MUX.QUAD_NN0[2] 0.F2.B39 0.F3.B39 0.F3.B35 0.F3.B33 0.F3.B34 0.F3.B37 0.F3.B38 0.F3.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_EE4[2] 0 0 0 0 0 0 1 0
QUAD_SE4[2] 0 0 0 0 0 1 0 0
QUAD_NW4[2] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_EE2[2] 0 1 0 0 0 0 1 0
DBL_SE2[2] 0 1 0 0 0 1 0 0
DBL_NN2[2] 0 1 0 0 1 0 0 0
DBL_NW2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[13] 1 0 0 0 0 0 1 0
OUT[20] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[6] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NE0[3] 0.F3.B48 0.F2.B48 0.F2.B51 0.F2.B49 0.F2.B50 0.F2.B53 0.F2.B54 0.F2.B52
INT:MUX.QUAD_NN0[3] 0.F2.B55 0.F3.B55 0.F3.B51 0.F3.B49 0.F3.B50 0.F3.B53 0.F3.B54 0.F3.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_EE4[3] 0 0 0 0 0 0 1 0
QUAD_SE4[3] 0 0 0 0 0 1 0 0
QUAD_NW4[3] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_EE2[3] 0 1 0 0 0 0 1 0
DBL_SE2[3] 0 1 0 0 0 1 0 0
DBL_NN2[3] 0 1 0 0 1 0 0 0
DBL_NW2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[16] 1 0 0 0 0 0 1 0
OUT[23] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[9] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[0] 0.F1.B0 0.F0.B0 0.F0.B3 0.F0.B1 0.F0.B2 0.F0.B6 0.F0.B5 0.F0.B4
INT:MUX.QUAD_WW0[0] 0.F0.B7 0.F1.B7 0.F1.B3 0.F1.B1 0.F1.B2 0.F1.B6 0.F1.B5 0.F1.B4
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[0] 0 0 0 0 0 0 0 1
QUAD_SS4_N3 0 0 0 0 0 0 1 0
QUAD_SW4_N3 0 0 0 0 0 1 0 0
QUAD_NW4[0] 0 0 0 0 1 0 0 0
QUAD_WW4[0] 0 0 0 1 0 0 0 0
QUAD_NN4[0] 0 0 1 0 0 0 0 0
DBL_WW2_N3 0 1 0 0 0 0 0 1
DBL_SS2_N3 0 1 0 0 0 0 1 0
DBL_SW2_N3 0 1 0 0 0 1 0 0
DBL_NN2[0] 0 1 0 0 1 0 0 0
DBL_NW2[0] 0 1 0 1 0 0 0 0
DBL_NE2[0] 0 1 1 0 0 0 0 0
OUT[12] 1 0 0 0 0 0 0 1
OUT[14] 1 0 0 0 0 0 1 0
OUT[19] 1 0 0 0 0 1 0 0
OUT[2] 1 0 0 0 1 0 0 0
OUT[0] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[1] 0.F1.B16 0.F0.B16 0.F0.B19 0.F0.B17 0.F0.B18 0.F0.B22 0.F0.B21 0.F0.B20
INT:MUX.QUAD_WW0[1] 0.F0.B23 0.F1.B23 0.F1.B19 0.F1.B17 0.F1.B18 0.F1.B22 0.F1.B21 0.F1.B20
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[1] 0 0 0 0 0 0 0 1
QUAD_SS4[0] 0 0 0 0 0 0 1 0
QUAD_SW4[0] 0 0 0 0 0 1 0 0
QUAD_NW4[1] 0 0 0 0 1 0 0 0
QUAD_WW4[1] 0 0 0 1 0 0 0 0
QUAD_NN4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_SS2[0] 0 1 0 0 0 0 1 0
DBL_SW2[0] 0 1 0 0 0 1 0 0
DBL_NN2[1] 0 1 0 0 1 0 0 0
DBL_NW2[1] 0 1 0 1 0 0 0 0
DBL_NE2[1] 0 1 1 0 0 0 0 0
OUT[15] 1 0 0 0 0 0 0 1
OUT[17] 1 0 0 0 0 0 1 0
OUT[22] 1 0 0 0 0 1 0 0
OUT[5] 1 0 0 0 1 0 0 0
OUT[3] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[2] 0.F1.B32 0.F0.B32 0.F0.B35 0.F0.B33 0.F0.B34 0.F0.B38 0.F0.B37 0.F0.B36
INT:MUX.QUAD_WW0[2] 0.F0.B39 0.F1.B39 0.F1.B35 0.F1.B33 0.F1.B34 0.F1.B38 0.F1.B37 0.F1.B36
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[2] 0 0 0 0 0 0 0 1
QUAD_SS4[1] 0 0 0 0 0 0 1 0
QUAD_SW4[1] 0 0 0 0 0 1 0 0
QUAD_NW4[2] 0 0 0 0 1 0 0 0
QUAD_WW4[2] 0 0 0 1 0 0 0 0
QUAD_NN4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_SS2[1] 0 1 0 0 0 0 1 0
DBL_SW2[1] 0 1 0 0 0 1 0 0
DBL_NN2[2] 0 1 0 0 1 0 0 0
DBL_NW2[2] 0 1 0 1 0 0 0 0
DBL_NE2[2] 0 1 1 0 0 0 0 0
OUT[18] 1 0 0 0 0 0 0 1
OUT[20] 1 0 0 0 0 0 1 0
OUT[13] 1 0 0 0 0 1 0 0
OUT[8] 1 0 0 0 1 0 0 0
OUT[6] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_NW0[3] 0.F1.B48 0.F0.B48 0.F0.B51 0.F0.B49 0.F0.B50 0.F0.B54 0.F0.B53 0.F0.B52
INT:MUX.QUAD_WW0[3] 0.F0.B55 0.F1.B55 0.F1.B51 0.F1.B49 0.F1.B50 0.F1.B54 0.F1.B53 0.F1.B52
NONE 0 0 0 0 0 0 0 0
QUAD_NE4[3] 0 0 0 0 0 0 0 1
QUAD_SS4[2] 0 0 0 0 0 0 1 0
QUAD_SW4[2] 0 0 0 0 0 1 0 0
QUAD_NW4[3] 0 0 0 0 1 0 0 0
QUAD_WW4[3] 0 0 0 1 0 0 0 0
QUAD_NN4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_SS2[2] 0 1 0 0 0 0 1 0
DBL_SW2[2] 0 1 0 0 0 1 0 0
DBL_NN2[3] 0 1 0 0 1 0 0 0
DBL_NW2[3] 0 1 0 1 0 0 0 0
DBL_NE2[3] 0 1 1 0 0 0 0 0
OUT[21] 1 0 0 0 0 0 0 1
OUT[23] 1 0 0 0 0 0 1 0
OUT[16] 1 0 0 0 0 1 0 0
OUT[11] 1 0 0 0 1 0 0 0
OUT[9] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[0] 0.F1.B15 0.F0.B15 0.F0.B12 0.F0.B10 0.F0.B14 0.F0.B11 0.F0.B9 0.F0.B13
INT:MUX.QUAD_SW0[0] 0.F0.B8 0.F1.B8 0.F1.B12 0.F1.B10 0.F1.B14 0.F1.B11 0.F1.B9 0.F1.B13
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[0] 0 0 0 0 0 0 0 1
QUAD_EE4[0] 0 0 0 0 0 0 1 0
QUAD_NW4[1] 0 0 0 0 0 1 0 0
QUAD_SW4[0] 0 0 0 0 1 0 0 0
QUAD_SE4[0] 0 0 0 1 0 0 0 0
QUAD_WW4[1] 0 0 1 0 0 0 0 0
DBL_WW2[0] 0 1 0 0 0 0 0 1
DBL_EE2[0] 0 1 0 0 0 0 1 0
DBL_SS2[0] 0 1 0 0 0 1 0 0
DBL_SW2[0] 0 1 0 0 1 0 0 0
DBL_SE2[0] 0 1 0 1 0 0 0 0
DBL_NW2[1] 0 1 1 0 0 0 0 0
OUT[2] 1 0 0 0 0 0 0 1
OUT[19] 1 0 0 0 0 0 1 0
OUT[12] 1 0 0 0 0 1 0 0
OUT[0] 1 0 0 0 1 0 0 0
OUT[14] 1 0 0 1 0 0 0 0
OUT[7] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[1] 0.F1.B31 0.F0.B31 0.F0.B28 0.F0.B26 0.F0.B30 0.F0.B27 0.F0.B25 0.F0.B29
INT:MUX.QUAD_SW0[1] 0.F0.B24 0.F1.B24 0.F1.B28 0.F1.B26 0.F1.B30 0.F1.B27 0.F1.B25 0.F1.B29
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[1] 0 0 0 0 0 0 0 1
QUAD_EE4[1] 0 0 0 0 0 0 1 0
QUAD_NW4[2] 0 0 0 0 0 1 0 0
QUAD_SW4[1] 0 0 0 0 1 0 0 0
QUAD_SE4[1] 0 0 0 1 0 0 0 0
QUAD_WW4[2] 0 0 1 0 0 0 0 0
DBL_WW2[1] 0 1 0 0 0 0 0 1
DBL_EE2[1] 0 1 0 0 0 0 1 0
DBL_SS2[1] 0 1 0 0 0 1 0 0
DBL_SW2[1] 0 1 0 0 1 0 0 0
DBL_SE2[1] 0 1 0 1 0 0 0 0
DBL_NW2[2] 0 1 1 0 0 0 0 0
OUT[5] 1 0 0 0 0 0 0 1
OUT[22] 1 0 0 0 0 0 1 0
OUT[15] 1 0 0 0 0 1 0 0
OUT[3] 1 0 0 0 1 0 0 0
OUT[17] 1 0 0 1 0 0 0 0
OUT[10] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[2] 0.F1.B47 0.F0.B47 0.F0.B44 0.F0.B42 0.F0.B46 0.F0.B43 0.F0.B41 0.F0.B45
INT:MUX.QUAD_SW0[2] 0.F0.B40 0.F1.B40 0.F1.B44 0.F1.B42 0.F1.B46 0.F1.B43 0.F1.B41 0.F1.B45
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[2] 0 0 0 0 0 0 0 1
QUAD_EE4[2] 0 0 0 0 0 0 1 0
QUAD_NW4[3] 0 0 0 0 0 1 0 0
QUAD_SW4[2] 0 0 0 0 1 0 0 0
QUAD_SE4[2] 0 0 0 1 0 0 0 0
QUAD_WW4[3] 0 0 1 0 0 0 0 0
DBL_WW2[2] 0 1 0 0 0 0 0 1
DBL_EE2[2] 0 1 0 0 0 0 1 0
DBL_SS2[2] 0 1 0 0 0 1 0 0
DBL_SW2[2] 0 1 0 0 1 0 0 0
DBL_SE2[2] 0 1 0 1 0 0 0 0
DBL_NW2[3] 0 1 1 0 0 0 0 0
OUT[8] 1 0 0 0 0 0 0 1
OUT[13] 1 0 0 0 0 0 1 0
OUT[18] 1 0 0 0 0 1 0 0
OUT[6] 1 0 0 0 1 0 0 0
OUT[20] 1 0 0 1 0 0 0 0
OUT[1] 1 0 1 0 0 0 0 0
INT:MUX.QUAD_SS0[3] 0.F1.B63 0.F0.B63 0.F0.B60 0.F0.B58 0.F0.B62 0.F0.B59 0.F0.B57 0.F0.B61
INT:MUX.QUAD_SW0[3] 0.F0.B56 0.F1.B56 0.F1.B60 0.F1.B58 0.F1.B62 0.F1.B59 0.F1.B57 0.F1.B61
NONE 0 0 0 0 0 0 0 0
QUAD_SS4[3] 0 0 0 0 0 0 0 1
QUAD_EE4[3] 0 0 0 0 0 0 1 0
QUAD_NW4_S0 0 0 0 0 0 1 0 0
QUAD_SW4[3] 0 0 0 0 1 0 0 0
QUAD_SE4[3] 0 0 0 1 0 0 0 0
QUAD_WW4_S0 0 0 1 0 0 0 0 0
DBL_WW2[3] 0 1 0 0 0 0 0 1
DBL_EE2[3] 0 1 0 0 0 0 1 0
DBL_SS2[3] 0 1 0 0 0 1 0 0
DBL_SW2[3] 0 1 0 0 1 0 0 0
DBL_SE2[3] 0 1 0 1 0 0 0 0
DBL_NW2_S0 0 1 1 0 0 0 0 0
OUT[11] 1 0 0 0 0 0 0 1
OUT[16] 1 0 0 0 0 0 1 0
OUT[21] 1 0 0 0 0 1 0 0
OUT[9] 1 0 0 0 1 0 0 0
OUT[23] 1 0 0 1 0 0 0 0
OUT[4] 1 0 1 0 0 0 0 0