Clock column buffers
Tile RCLK_INT
Cells: 4
Switchbox RCLK_INT
| Destination | Source | Kind | 
|---|---|---|
| TCELL0_RCLK.IMUX.0 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.1 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.2 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.3 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.4 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.5 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.1 | mux | |
| TCELL0_RCLK.INODE.8 | mux | |
| TCELL0_RCLK.INODE.10 | mux | |
| TCELL0_RCLK.INODE.14 | mux | |
| TCELL0_RCLK.INODE.21 | mux | |
| TCELL0_RCLK.INODE.23 | mux | |
| TCELL0_RCLK.IMUX.6 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.7 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.8 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.9 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.10 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.11 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.3 | mux | |
| TCELL0_RCLK.INODE.5 | mux | |
| TCELL0_RCLK.INODE.7 | mux | |
| TCELL0_RCLK.INODE.12 | mux | |
| TCELL0_RCLK.INODE.16 | mux | |
| TCELL0_RCLK.INODE.18 | mux | |
| TCELL0_RCLK.IMUX.12 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.13 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.14 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.15 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.16 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.17 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.0 | mux | |
| TCELL0_RCLK.INODE.4 | mux | |
| TCELL0_RCLK.INODE.6 | mux | |
| TCELL0_RCLK.INODE.15 | mux | |
| TCELL0_RCLK.INODE.17 | mux | |
| TCELL0_RCLK.INODE.19 | mux | |
| TCELL0_RCLK.IMUX.18 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.IMUX.19 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.IMUX.20 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.IMUX.21 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.IMUX.22 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.IMUX.23 | TCELL0_VCC | mux | 
| TCELL0_RCLK.INODE.2 | mux | |
| TCELL0_RCLK.INODE.9 | mux | |
| TCELL0_RCLK.INODE.11 | mux | |
| TCELL0_RCLK.INODE.13 | mux | |
| TCELL0_RCLK.INODE.20 | mux | |
| TCELL0_RCLK.INODE.22 | mux | |
| TCELL0_RCLK.INODE.0 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.3.0 | mux | |
| TCELL0_SNG.S.6.0 | mux | |
| TCELL0_DBL.S.1.1 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.7.1 | mux | |
| TCELL0_RCLK.INODE.1 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.3.0 | mux | |
| TCELL0_SNG.S.6.0 | mux | |
| TCELL0_DBL.S.1.1 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.7.1 | mux | |
| TCELL0_RCLK.INODE.2 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.3.0 | mux | |
| TCELL0_SNG.S.6.0 | mux | |
| TCELL0_DBL.S.1.1 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.7.1 | mux | |
| TCELL0_RCLK.INODE.3 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.3.0 | mux | |
| TCELL0_SNG.S.6.0 | mux | |
| TCELL0_DBL.S.1.1 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.7.1 | mux | |
| TCELL0_RCLK.INODE.4 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.2.0 | mux | |
| TCELL0_SNG.S.5.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.3.1 | mux | |
| TCELL0_DBL.S.7.0 | mux | |
| TCELL0_RCLK.INODE.5 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.2.0 | mux | |
| TCELL0_SNG.S.5.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.3.1 | mux | |
| TCELL0_DBL.S.7.0 | mux | |
| TCELL0_RCLK.INODE.6 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.4.0 | mux | |
| TCELL0_SNG.S.7.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.2.0 | mux | |
| TCELL0_DBL.S.5.1 | mux | |
| TCELL0_RCLK.INODE.7 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.4.0 | mux | |
| TCELL0_SNG.S.7.0 | mux | |
| TCELL0_DBL.S.2.0 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.5.1 | mux | |
| TCELL0_RCLK.INODE.8 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.4.0 | mux | |
| TCELL0_SNG.S.7.0 | mux | |
| TCELL0_DBL.S.2.0 | mux | |
| TCELL0_DBL.S.4.0 | mux | |
| TCELL0_DBL.S.5.1 | mux | |
| TCELL0_RCLK.INODE.9 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.4.0 | mux | |
| TCELL0_SNG.S.7.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.2.0 | mux | |
| TCELL0_DBL.S.5.1 | mux | |
| TCELL0_RCLK.INODE.10 | TCELL0_SNG.S.1.0 | mux | 
| TCELL0_SNG.S.2.0 | mux | |
| TCELL0_SNG.S.5.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.3.1 | mux | |
| TCELL0_DBL.S.7.0 | mux | |
| TCELL0_RCLK.INODE.11 | TCELL0_SNG.S.0.0 | mux | 
| TCELL0_SNG.S.2.0 | mux | |
| TCELL0_SNG.S.5.0 | mux | |
| TCELL0_DBL.S.0.0 | mux | |
| TCELL0_DBL.S.3.1 | mux | |
| TCELL0_DBL.S.7.0 | mux | |
| TCELL0_RCLK.INODE.12 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.6.1 | mux | |
| TCELL0_DBL.N.1.2 | mux | |
| TCELL0_DBL.N.4.1 | mux | |
| TCELL0_DBL.N.7.2 | mux | |
| TCELL0_RCLK.INODE.13 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.6.1 | mux | |
| TCELL0_DBL.N.1.2 | mux | |
| TCELL0_DBL.N.4.1 | mux | |
| TCELL0_DBL.N.7.2 | mux | |
| TCELL0_RCLK.INODE.14 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.6.1 | mux | |
| TCELL0_DBL.N.1.2 | mux | |
| TCELL0_DBL.N.4.1 | mux | |
| TCELL0_DBL.N.7.2 | mux | |
| TCELL0_RCLK.INODE.15 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.6.1 | mux | |
| TCELL0_DBL.N.1.2 | mux | |
| TCELL0_DBL.N.4.1 | mux | |
| TCELL0_DBL.N.7.2 | mux | |
| TCELL0_RCLK.INODE.16 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.2.1 | mux | |
| TCELL0_SNG.N.5.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.3.2 | mux | |
| TCELL0_DBL.N.7.1 | mux | |
| TCELL0_RCLK.INODE.17 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.2.1 | mux | |
| TCELL0_SNG.N.5.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.3.2 | mux | |
| TCELL0_DBL.N.7.1 | mux | |
| TCELL0_RCLK.INODE.18 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.4.1 | mux | |
| TCELL0_SNG.N.7.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.2.1 | mux | |
| TCELL0_DBL.N.5.2 | mux | |
| TCELL0_RCLK.INODE.19 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.4.1 | mux | |
| TCELL0_SNG.N.7.1 | mux | |
| TCELL0_DBL.N.2.1 | mux | |
| TCELL0_DBL.N.5.2 | mux | |
| TCELL0_RCLK.INODE.20 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.3.1 | mux | |
| TCELL0_SNG.N.4.1 | mux | |
| TCELL0_SNG.N.7.1 | mux | |
| TCELL0_DBL.N.2.1 | mux | |
| TCELL0_DBL.N.5.2 | mux | |
| TCELL0_RCLK.INODE.21 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.4.1 | mux | |
| TCELL0_SNG.N.7.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.2.1 | mux | |
| TCELL0_DBL.N.5.2 | mux | |
| TCELL0_RCLK.INODE.22 | TCELL0_SNG.N.1.1 | mux | 
| TCELL0_SNG.N.2.1 | mux | |
| TCELL0_SNG.N.5.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.3.2 | mux | |
| TCELL0_DBL.N.7.1 | mux | |
| TCELL0_RCLK.INODE.23 | TCELL0_SNG.N.0.1 | mux | 
| TCELL0_SNG.N.2.1 | mux | |
| TCELL0_SNG.N.5.1 | mux | |
| TCELL0_DBL.N.0.1 | mux | |
| TCELL0_DBL.N.3.2 | mux | |
| TCELL0_DBL.N.7.1 | mux | |
| TCELL1_RCLK.IMUX.0 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.1 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.2 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.3 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.4 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.5 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.1 | mux | |
| TCELL1_RCLK.INODE.8 | mux | |
| TCELL1_RCLK.INODE.10 | mux | |
| TCELL1_RCLK.INODE.14 | mux | |
| TCELL1_RCLK.INODE.21 | mux | |
| TCELL1_RCLK.INODE.23 | mux | |
| TCELL1_RCLK.IMUX.6 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.7 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.8 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.9 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.10 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.11 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.3 | mux | |
| TCELL1_RCLK.INODE.5 | mux | |
| TCELL1_RCLK.INODE.7 | mux | |
| TCELL1_RCLK.INODE.12 | mux | |
| TCELL1_RCLK.INODE.16 | mux | |
| TCELL1_RCLK.INODE.18 | mux | |
| TCELL1_RCLK.IMUX.12 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.13 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.14 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.15 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.16 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.17 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.0 | mux | |
| TCELL1_RCLK.INODE.4 | mux | |
| TCELL1_RCLK.INODE.6 | mux | |
| TCELL1_RCLK.INODE.15 | mux | |
| TCELL1_RCLK.INODE.17 | mux | |
| TCELL1_RCLK.INODE.19 | mux | |
| TCELL1_RCLK.IMUX.18 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.IMUX.19 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.IMUX.20 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.IMUX.21 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.IMUX.22 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.IMUX.23 | TCELL0_VCC | mux | 
| TCELL1_RCLK.INODE.2 | mux | |
| TCELL1_RCLK.INODE.9 | mux | |
| TCELL1_RCLK.INODE.11 | mux | |
| TCELL1_RCLK.INODE.13 | mux | |
| TCELL1_RCLK.INODE.20 | mux | |
| TCELL1_RCLK.INODE.22 | mux | |
| TCELL1_RCLK.INODE.0 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.3.0 | mux | |
| TCELL1_SNG.S.6.0 | mux | |
| TCELL1_DBL.S.1.1 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.7.1 | mux | |
| TCELL1_RCLK.INODE.1 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.3.0 | mux | |
| TCELL1_SNG.S.6.0 | mux | |
| TCELL1_DBL.S.1.1 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.7.1 | mux | |
| TCELL1_RCLK.INODE.2 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.3.0 | mux | |
| TCELL1_SNG.S.6.0 | mux | |
| TCELL1_DBL.S.1.1 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.7.1 | mux | |
| TCELL1_RCLK.INODE.3 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.3.0 | mux | |
| TCELL1_SNG.S.6.0 | mux | |
| TCELL1_DBL.S.1.1 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.7.1 | mux | |
| TCELL1_RCLK.INODE.4 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.2.0 | mux | |
| TCELL1_SNG.S.5.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.3.1 | mux | |
| TCELL1_DBL.S.6.0 | mux | |
| TCELL1_RCLK.INODE.5 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.2.0 | mux | |
| TCELL1_SNG.S.5.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.3.1 | mux | |
| TCELL1_DBL.S.6.0 | mux | |
| TCELL1_RCLK.INODE.6 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.4.0 | mux | |
| TCELL1_SNG.S.7.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.2.0 | mux | |
| TCELL1_DBL.S.5.1 | mux | |
| TCELL1_RCLK.INODE.7 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.4.0 | mux | |
| TCELL1_SNG.S.7.0 | mux | |
| TCELL1_DBL.S.2.0 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.5.1 | mux | |
| TCELL1_RCLK.INODE.8 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.4.0 | mux | |
| TCELL1_SNG.S.7.0 | mux | |
| TCELL1_DBL.S.2.0 | mux | |
| TCELL1_DBL.S.4.0 | mux | |
| TCELL1_DBL.S.5.1 | mux | |
| TCELL1_RCLK.INODE.9 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.4.0 | mux | |
| TCELL1_SNG.S.7.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.2.0 | mux | |
| TCELL1_DBL.S.5.1 | mux | |
| TCELL1_RCLK.INODE.10 | TCELL1_SNG.S.1.0 | mux | 
| TCELL1_SNG.S.2.0 | mux | |
| TCELL1_SNG.S.5.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.3.1 | mux | |
| TCELL1_DBL.S.6.0 | mux | |
| TCELL1_RCLK.INODE.11 | TCELL1_SNG.S.0.0 | mux | 
| TCELL1_SNG.S.2.0 | mux | |
| TCELL1_SNG.S.5.0 | mux | |
| TCELL1_DBL.S.0.0 | mux | |
| TCELL1_DBL.S.3.1 | mux | |
| TCELL1_DBL.S.6.0 | mux | |
| TCELL1_RCLK.INODE.12 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.6.1 | mux | |
| TCELL1_DBL.N.1.2 | mux | |
| TCELL1_DBL.N.4.1 | mux | |
| TCELL1_DBL.N.7.2 | mux | |
| TCELL1_RCLK.INODE.13 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.6.1 | mux | |
| TCELL1_DBL.N.1.2 | mux | |
| TCELL1_DBL.N.4.1 | mux | |
| TCELL1_DBL.N.7.2 | mux | |
| TCELL1_RCLK.INODE.14 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.6.1 | mux | |
| TCELL1_DBL.N.1.2 | mux | |
| TCELL1_DBL.N.4.1 | mux | |
| TCELL1_DBL.N.7.2 | mux | |
| TCELL1_RCLK.INODE.15 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.6.1 | mux | |
| TCELL1_DBL.N.1.2 | mux | |
| TCELL1_DBL.N.4.1 | mux | |
| TCELL1_DBL.N.7.2 | mux | |
| TCELL1_RCLK.INODE.16 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.2.1 | mux | |
| TCELL1_SNG.N.5.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.3.2 | mux | |
| TCELL1_DBL.N.6.1 | mux | |
| TCELL1_RCLK.INODE.17 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.2.1 | mux | |
| TCELL1_SNG.N.5.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.3.2 | mux | |
| TCELL1_DBL.N.6.1 | mux | |
| TCELL1_RCLK.INODE.18 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.4.1 | mux | |
| TCELL1_SNG.N.7.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.2.1 | mux | |
| TCELL1_DBL.N.5.2 | mux | |
| TCELL1_RCLK.INODE.19 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.4.1 | mux | |
| TCELL1_SNG.N.7.1 | mux | |
| TCELL1_DBL.N.2.1 | mux | |
| TCELL1_DBL.N.5.2 | mux | |
| TCELL1_RCLK.INODE.20 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.3.1 | mux | |
| TCELL1_SNG.N.4.1 | mux | |
| TCELL1_SNG.N.7.1 | mux | |
| TCELL1_DBL.N.2.1 | mux | |
| TCELL1_DBL.N.5.2 | mux | |
| TCELL1_RCLK.INODE.21 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.4.1 | mux | |
| TCELL1_SNG.N.7.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.2.1 | mux | |
| TCELL1_DBL.N.5.2 | mux | |
| TCELL1_RCLK.INODE.22 | TCELL1_SNG.N.1.1 | mux | 
| TCELL1_SNG.N.2.1 | mux | |
| TCELL1_SNG.N.5.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.3.2 | mux | |
| TCELL1_DBL.N.6.1 | mux | |
| TCELL1_RCLK.INODE.23 | TCELL1_SNG.N.0.1 | mux | 
| TCELL1_SNG.N.2.1 | mux | |
| TCELL1_SNG.N.5.1 | mux | |
| TCELL1_DBL.N.0.1 | mux | |
| TCELL1_DBL.N.3.2 | mux | |
| TCELL1_DBL.N.6.1 | mux | 
Bel BUFCE_LEAF_X16_S
| Pin | Direction | Wires | 
|---|---|---|
| CE_INT0 | input | TCELL0:RCLK.IMUX.12 | 
| CE_INT1 | input | TCELL1:RCLK.IMUX.12 | 
| CE_INT10 | input | TCELL0:RCLK.IMUX.19 | 
| CE_INT11 | input | TCELL1:RCLK.IMUX.19 | 
| CE_INT12 | input | TCELL0:RCLK.IMUX.15 | 
| CE_INT13 | input | TCELL1:RCLK.IMUX.15 | 
| CE_INT14 | input | TCELL0:RCLK.IMUX.20 | 
| CE_INT15 | input | TCELL1:RCLK.IMUX.20 | 
| CE_INT2 | input | TCELL0:RCLK.IMUX.18 | 
| CE_INT3 | input | TCELL1:RCLK.IMUX.18 | 
| CE_INT4 | input | TCELL0:RCLK.IMUX.13 | 
| CE_INT5 | input | TCELL1:RCLK.IMUX.13 | 
| CE_INT6 | input | TCELL0:RCLK.IMUX.14 | 
| CE_INT7 | input | TCELL1:RCLK.IMUX.10 | 
| CE_INT8 | input | TCELL1:RCLK.IMUX.14 | 
| CE_INT9 | input | TCELL0:RCLK.IMUX.10 | 
| CLK_OUT0 | output | TCELL2:GCLK0 | 
| CLK_OUT1 | output | TCELL2:GCLK2 | 
| CLK_OUT10 | output | TCELL2:GCLK5 | 
| CLK_OUT11 | output | TCELL2:GCLK7 | 
| CLK_OUT12 | output | TCELL2:GCLK9 | 
| CLK_OUT13 | output | TCELL2:GCLK11 | 
| CLK_OUT14 | output | TCELL2:GCLK13 | 
| CLK_OUT15 | output | TCELL2:GCLK15 | 
| CLK_OUT2 | output | TCELL2:GCLK4 | 
| CLK_OUT3 | output | TCELL2:GCLK6 | 
| CLK_OUT4 | output | TCELL2:GCLK8 | 
| CLK_OUT5 | output | TCELL2:GCLK10 | 
| CLK_OUT6 | output | TCELL2:GCLK12 | 
| CLK_OUT7 | output | TCELL2:GCLK14 | 
| CLK_OUT8 | output | TCELL2:GCLK1 | 
| CLK_OUT9 | output | TCELL2:GCLK3 | 
Bel BUFCE_LEAF_X16_N
| Pin | Direction | Wires | 
|---|---|---|
| CE_INT0 | input | TCELL1:RCLK.IMUX.21 | 
| CE_INT1 | input | TCELL0:RCLK.IMUX.21 | 
| CE_INT10 | input | TCELL1:RCLK.IMUX.16 | 
| CE_INT11 | input | TCELL0:RCLK.IMUX.11 | 
| CE_INT12 | input | TCELL1:RCLK.IMUX.23 | 
| CE_INT13 | input | TCELL0:RCLK.IMUX.5 | 
| CE_INT14 | input | TCELL1:RCLK.IMUX.17 | 
| CE_INT15 | input | TCELL0:RCLK.IMUX.17 | 
| CE_INT2 | input | TCELL1:RCLK.IMUX.11 | 
| CE_INT3 | input | TCELL0:RCLK.IMUX.16 | 
| CE_INT4 | input | TCELL1:RCLK.IMUX.4 | 
| CE_INT5 | input | TCELL0:RCLK.IMUX.22 | 
| CE_INT6 | input | TCELL1:RCLK.IMUX.5 | 
| CE_INT7 | input | TCELL0:RCLK.IMUX.23 | 
| CE_INT8 | input | TCELL0:RCLK.IMUX.4 | 
| CE_INT9 | input | TCELL1:RCLK.IMUX.22 | 
| CLK_OUT0 | output | TCELL0:GCLK0 | 
| CLK_OUT1 | output | TCELL0:GCLK2 | 
| CLK_OUT10 | output | TCELL0:GCLK5 | 
| CLK_OUT11 | output | TCELL0:GCLK7 | 
| CLK_OUT12 | output | TCELL0:GCLK9 | 
| CLK_OUT13 | output | TCELL0:GCLK11 | 
| CLK_OUT14 | output | TCELL0:GCLK13 | 
| CLK_OUT15 | output | TCELL0:GCLK15 | 
| CLK_OUT2 | output | TCELL0:GCLK4 | 
| CLK_OUT3 | output | TCELL0:GCLK6 | 
| CLK_OUT4 | output | TCELL0:GCLK8 | 
| CLK_OUT5 | output | TCELL0:GCLK10 | 
| CLK_OUT6 | output | TCELL0:GCLK12 | 
| CLK_OUT7 | output | TCELL0:GCLK14 | 
| CLK_OUT8 | output | TCELL0:GCLK1 | 
| CLK_OUT9 | output | TCELL0:GCLK3 | 
Bel RCLK_INT_CLK
| Pin | Direction | Wires | 
|---|
Bel wires
| Wire | Pins | 
|---|---|
| TCELL0:GCLK0 | BUFCE_LEAF_X16_N.CLK_OUT0 | 
| TCELL0:GCLK1 | BUFCE_LEAF_X16_N.CLK_OUT8 | 
| TCELL0:GCLK2 | BUFCE_LEAF_X16_N.CLK_OUT1 | 
| TCELL0:GCLK3 | BUFCE_LEAF_X16_N.CLK_OUT9 | 
| TCELL0:GCLK4 | BUFCE_LEAF_X16_N.CLK_OUT2 | 
| TCELL0:GCLK5 | BUFCE_LEAF_X16_N.CLK_OUT10 | 
| TCELL0:GCLK6 | BUFCE_LEAF_X16_N.CLK_OUT3 | 
| TCELL0:GCLK7 | BUFCE_LEAF_X16_N.CLK_OUT11 | 
| TCELL0:GCLK8 | BUFCE_LEAF_X16_N.CLK_OUT4 | 
| TCELL0:GCLK9 | BUFCE_LEAF_X16_N.CLK_OUT12 | 
| TCELL0:GCLK10 | BUFCE_LEAF_X16_N.CLK_OUT5 | 
| TCELL0:GCLK11 | BUFCE_LEAF_X16_N.CLK_OUT13 | 
| TCELL0:GCLK12 | BUFCE_LEAF_X16_N.CLK_OUT6 | 
| TCELL0:GCLK13 | BUFCE_LEAF_X16_N.CLK_OUT14 | 
| TCELL0:GCLK14 | BUFCE_LEAF_X16_N.CLK_OUT7 | 
| TCELL0:GCLK15 | BUFCE_LEAF_X16_N.CLK_OUT15 | 
| TCELL0:RCLK.IMUX.4 | BUFCE_LEAF_X16_N.CE_INT8 | 
| TCELL0:RCLK.IMUX.5 | BUFCE_LEAF_X16_N.CE_INT13 | 
| TCELL0:RCLK.IMUX.10 | BUFCE_LEAF_X16_S.CE_INT9 | 
| TCELL0:RCLK.IMUX.11 | BUFCE_LEAF_X16_N.CE_INT11 | 
| TCELL0:RCLK.IMUX.12 | BUFCE_LEAF_X16_S.CE_INT0 | 
| TCELL0:RCLK.IMUX.13 | BUFCE_LEAF_X16_S.CE_INT4 | 
| TCELL0:RCLK.IMUX.14 | BUFCE_LEAF_X16_S.CE_INT6 | 
| TCELL0:RCLK.IMUX.15 | BUFCE_LEAF_X16_S.CE_INT12 | 
| TCELL0:RCLK.IMUX.16 | BUFCE_LEAF_X16_N.CE_INT3 | 
| TCELL0:RCLK.IMUX.17 | BUFCE_LEAF_X16_N.CE_INT15 | 
| TCELL0:RCLK.IMUX.18 | BUFCE_LEAF_X16_S.CE_INT2 | 
| TCELL0:RCLK.IMUX.19 | BUFCE_LEAF_X16_S.CE_INT10 | 
| TCELL0:RCLK.IMUX.20 | BUFCE_LEAF_X16_S.CE_INT14 | 
| TCELL0:RCLK.IMUX.21 | BUFCE_LEAF_X16_N.CE_INT1 | 
| TCELL0:RCLK.IMUX.22 | BUFCE_LEAF_X16_N.CE_INT5 | 
| TCELL0:RCLK.IMUX.23 | BUFCE_LEAF_X16_N.CE_INT7 | 
| TCELL1:RCLK.IMUX.4 | BUFCE_LEAF_X16_N.CE_INT4 | 
| TCELL1:RCLK.IMUX.5 | BUFCE_LEAF_X16_N.CE_INT6 | 
| TCELL1:RCLK.IMUX.10 | BUFCE_LEAF_X16_S.CE_INT7 | 
| TCELL1:RCLK.IMUX.11 | BUFCE_LEAF_X16_N.CE_INT2 | 
| TCELL1:RCLK.IMUX.12 | BUFCE_LEAF_X16_S.CE_INT1 | 
| TCELL1:RCLK.IMUX.13 | BUFCE_LEAF_X16_S.CE_INT5 | 
| TCELL1:RCLK.IMUX.14 | BUFCE_LEAF_X16_S.CE_INT8 | 
| TCELL1:RCLK.IMUX.15 | BUFCE_LEAF_X16_S.CE_INT13 | 
| TCELL1:RCLK.IMUX.16 | BUFCE_LEAF_X16_N.CE_INT10 | 
| TCELL1:RCLK.IMUX.17 | BUFCE_LEAF_X16_N.CE_INT14 | 
| TCELL1:RCLK.IMUX.18 | BUFCE_LEAF_X16_S.CE_INT3 | 
| TCELL1:RCLK.IMUX.19 | BUFCE_LEAF_X16_S.CE_INT11 | 
| TCELL1:RCLK.IMUX.20 | BUFCE_LEAF_X16_S.CE_INT15 | 
| TCELL1:RCLK.IMUX.21 | BUFCE_LEAF_X16_N.CE_INT0 | 
| TCELL1:RCLK.IMUX.22 | BUFCE_LEAF_X16_N.CE_INT9 | 
| TCELL1:RCLK.IMUX.23 | BUFCE_LEAF_X16_N.CE_INT12 | 
| TCELL2:GCLK0 | BUFCE_LEAF_X16_S.CLK_OUT0 | 
| TCELL2:GCLK1 | BUFCE_LEAF_X16_S.CLK_OUT8 | 
| TCELL2:GCLK2 | BUFCE_LEAF_X16_S.CLK_OUT1 | 
| TCELL2:GCLK3 | BUFCE_LEAF_X16_S.CLK_OUT9 | 
| TCELL2:GCLK4 | BUFCE_LEAF_X16_S.CLK_OUT2 | 
| TCELL2:GCLK5 | BUFCE_LEAF_X16_S.CLK_OUT10 | 
| TCELL2:GCLK6 | BUFCE_LEAF_X16_S.CLK_OUT3 | 
| TCELL2:GCLK7 | BUFCE_LEAF_X16_S.CLK_OUT11 | 
| TCELL2:GCLK8 | BUFCE_LEAF_X16_S.CLK_OUT4 | 
| TCELL2:GCLK9 | BUFCE_LEAF_X16_S.CLK_OUT12 | 
| TCELL2:GCLK10 | BUFCE_LEAF_X16_S.CLK_OUT5 | 
| TCELL2:GCLK11 | BUFCE_LEAF_X16_S.CLK_OUT13 | 
| TCELL2:GCLK12 | BUFCE_LEAF_X16_S.CLK_OUT6 | 
| TCELL2:GCLK13 | BUFCE_LEAF_X16_S.CLK_OUT14 | 
| TCELL2:GCLK14 | BUFCE_LEAF_X16_S.CLK_OUT7 | 
| TCELL2:GCLK15 | BUFCE_LEAF_X16_S.CLK_OUT15 |