| CELL[0].OUT_BEL[4] | BITSLICE[0].PHY2CLB_FIFO_EMPTY |
| CELL[0].OUT_BEL[5] | BITSLICE[0].RX_Q0 |
| CELL[0].OUT_BEL[6] | BITSLICE[0].RX_Q1 |
| CELL[0].OUT_BEL[7] | BITSLICE[0].RX_Q2 |
| CELL[0].OUT_BEL[8] | BITSLICE[0].RX_Q3 |
| CELL[0].OUT_BEL[9] | BITSLICE[0].RX_Q4 |
| CELL[0].OUT_BEL[10] | BITSLICE[0].RX_Q5 |
| CELL[0].OUT_BEL[11] | BITSLICE[0].RX_Q6 |
| CELL[0].OUT_BEL[12] | BITSLICE[0].RX_Q7 |
| CELL[0].OUT_BEL[13] | BITSLICE[0].TX_CNTVALUEOUT0 |
| CELL[0].OUT_BEL[14] | BITSLICE[0].TX_CNTVALUEOUT1 |
| CELL[0].OUT_BEL[15] | BITSLICE[0].TX_CNTVALUEOUT2 |
| CELL[0].OUT_BEL[16] | BITSLICE[0].TX_CNTVALUEOUT3 |
| CELL[0].OUT_BEL[17] | BITSLICE[0].TX_CNTVALUEOUT4 |
| CELL[0].OUT_BEL[18] | BITSLICE[0].TX_CNTVALUEOUT5 |
| CELL[0].OUT_BEL[19] | BITSLICE[0].TX_CNTVALUEOUT6 |
| CELL[0].OUT_BEL[20] | BITSLICE[0].TX_CNTVALUEOUT7 |
| CELL[0].OUT_BEL[21] | BITSLICE[0].TX_CNTVALUEOUT8 |
| CELL[0].OUT_BEL[22] | BITSLICE[0].TX_T_OUT |
| CELL[0].OUT_BEL[23] | BITSLICE[0].RX_CNTVALUEOUT0 |
| CELL[0].OUT_BEL[24] | BITSLICE[0].RX_CNTVALUEOUT1 |
| CELL[0].OUT_BEL[25] | BITSLICE[0].RX_CNTVALUEOUT2 |
| CELL[0].OUT_BEL[26] | BITSLICE[0].RX_CNTVALUEOUT3 |
| CELL[0].OUT_BEL[27] | BITSLICE[0].RX_CNTVALUEOUT4 |
| CELL[0].OUT_BEL[28] | BITSLICE[0].RX_CNTVALUEOUT5 |
| CELL[0].OUT_BEL[29] | BITSLICE[0].RX_CNTVALUEOUT6 |
| CELL[0].OUT_BEL[30] | BITSLICE[0].RX_CNTVALUEOUT7 |
| CELL[0].OUT_BEL[31] | BITSLICE[0].RX_CNTVALUEOUT8 |
| CELL[0].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].TXBIT_TRI_RST_B0 |
| CELL[0].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B0 |
| CELL[0].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B0 |
| CELL[0].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B0 |
| CELL[0].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B0 |
| CELL[0].IMUX_BYP[6] | BITSLICE_T[0].EN_VTC |
| CELL[0].IMUX_BYP[7] | BITSLICE[0].TX_LD |
| CELL[0].IMUX_BYP[8] | BITSLICE[0].TX_INC |
| CELL[0].IMUX_BYP[9] | BITSLICE[0].TX_EN_VTC |
| CELL[0].IMUX_BYP[10] | BITSLICE[0].TX_CE_ODELAY |
| CELL[0].IMUX_BYP[11] | BITSLICE[0].RX_LD |
| CELL[0].IMUX_BYP[12] | BITSLICE[0].RX_INC |
| CELL[0].IMUX_BYP[13] | BITSLICE[0].RX_EN_VTC |
| CELL[0].IMUX_BYP[14] | BITSLICE[0].RX_CE_IDELAY |
| CELL[0].IMUX_BYP[15] | BITSLICE[0].DYN_DCI_OUT_INT |
| CELL[0].IMUX_IMUX_DELAY[6] | BITSLICE[0].TX_CE_OFD |
| CELL[0].IMUX_IMUX_DELAY[7] | BITSLICE[0].RX_CE_IFD |
| CELL[0].IMUX_IMUX_DELAY[8] | BITSLICE[0].RX_DATAIN1 |
| CELL[0].IMUX_IMUX_DELAY[9] | BITSLICE[0].CLB2PHY_FIFO_RDEN |
| CELL[0].IMUX_IMUX_DELAY[10] | BITSLICE[0].TX_D7 |
| CELL[0].IMUX_IMUX_DELAY[11] | BITSLICE[0].TX_D6 |
| CELL[0].IMUX_IMUX_DELAY[12] | BITSLICE[0].TX_D5 |
| CELL[0].IMUX_IMUX_DELAY[13] | BITSLICE[0].TX_D4 |
| CELL[0].IMUX_IMUX_DELAY[14] | BITSLICE[0].TX_D3 |
| CELL[0].IMUX_IMUX_DELAY[15] | BITSLICE[0].TX_D2 |
| CELL[0].IMUX_IMUX_DELAY[16] | BITSLICE[0].TX_T |
| CELL[1].OUT_BEL[4] | BITSLICE[1].PHY2CLB_FIFO_EMPTY |
| CELL[1].OUT_BEL[5] | BITSLICE[1].RX_Q0 |
| CELL[1].OUT_BEL[6] | BITSLICE[1].RX_Q1 |
| CELL[1].OUT_BEL[7] | BITSLICE[1].RX_Q2 |
| CELL[1].OUT_BEL[8] | BITSLICE[1].RX_Q3 |
| CELL[1].OUT_BEL[9] | BITSLICE[1].RX_Q4 |
| CELL[1].OUT_BEL[10] | BITSLICE[1].RX_Q5 |
| CELL[1].OUT_BEL[11] | BITSLICE[1].RX_Q6 |
| CELL[1].OUT_BEL[12] | BITSLICE[1].RX_Q7 |
| CELL[1].OUT_BEL[13] | BITSLICE[1].TX_CNTVALUEOUT0 |
| CELL[1].OUT_BEL[14] | BITSLICE[1].TX_CNTVALUEOUT1 |
| CELL[1].OUT_BEL[15] | BITSLICE[1].TX_CNTVALUEOUT2 |
| CELL[1].OUT_BEL[16] | BITSLICE[1].TX_CNTVALUEOUT3 |
| CELL[1].OUT_BEL[17] | BITSLICE[1].TX_CNTVALUEOUT4 |
| CELL[1].OUT_BEL[18] | BITSLICE[1].TX_CNTVALUEOUT5 |
| CELL[1].OUT_BEL[19] | BITSLICE[1].TX_CNTVALUEOUT6 |
| CELL[1].OUT_BEL[20] | BITSLICE[1].TX_CNTVALUEOUT7 |
| CELL[1].OUT_BEL[21] | BITSLICE[1].TX_CNTVALUEOUT8 |
| CELL[1].OUT_BEL[22] | BITSLICE[1].TX_T_OUT |
| CELL[1].OUT_BEL[23] | BITSLICE[1].RX_CNTVALUEOUT0 |
| CELL[1].OUT_BEL[24] | BITSLICE[1].RX_CNTVALUEOUT1 |
| CELL[1].OUT_BEL[25] | BITSLICE[1].RX_CNTVALUEOUT2 |
| CELL[1].OUT_BEL[26] | BITSLICE[1].RX_CNTVALUEOUT3 |
| CELL[1].OUT_BEL[27] | BITSLICE[1].RX_CNTVALUEOUT4 |
| CELL[1].OUT_BEL[28] | BITSLICE[1].RX_CNTVALUEOUT5 |
| CELL[1].OUT_BEL[29] | BITSLICE[1].RX_CNTVALUEOUT6 |
| CELL[1].OUT_BEL[30] | BITSLICE[1].RX_CNTVALUEOUT7 |
| CELL[1].OUT_BEL[31] | BITSLICE[1].RX_CNTVALUEOUT8 |
| CELL[1].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK0 |
| CELL[1].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].TXBIT_TRI_RST_B1 |
| CELL[1].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B1 |
| CELL[1].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B1 |
| CELL[1].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B1 |
| CELL[1].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B1 |
| CELL[1].IMUX_BYP[6] | BITSLICE_T[1].EN_VTC |
| CELL[1].IMUX_BYP[7] | BITSLICE[1].TX_LD |
| CELL[1].IMUX_BYP[8] | BITSLICE[1].TX_INC |
| CELL[1].IMUX_BYP[9] | BITSLICE[1].TX_EN_VTC |
| CELL[1].IMUX_BYP[10] | BITSLICE[1].TX_CE_ODELAY |
| CELL[1].IMUX_BYP[11] | BITSLICE[1].RX_LD |
| CELL[1].IMUX_BYP[12] | BITSLICE[1].RX_INC |
| CELL[1].IMUX_BYP[13] | BITSLICE[1].RX_EN_VTC |
| CELL[1].IMUX_BYP[14] | BITSLICE[1].RX_CE_IDELAY |
| CELL[1].IMUX_BYP[15] | BITSLICE[1].DYN_DCI_OUT_INT |
| CELL[1].IMUX_IMUX_DELAY[6] | BITSLICE[0].TX_D1 |
| CELL[1].IMUX_IMUX_DELAY[7] | BITSLICE[0].TX_CNTVALUEIN0 |
| CELL[1].IMUX_IMUX_DELAY[8] | BITSLICE[0].TX_CNTVALUEIN1 |
| CELL[1].IMUX_IMUX_DELAY[9] | BITSLICE[0].TX_CNTVALUEIN2 |
| CELL[1].IMUX_IMUX_DELAY[10] | BITSLICE[0].TX_CNTVALUEIN3 |
| CELL[1].IMUX_IMUX_DELAY[11] | BITSLICE[0].TX_CNTVALUEIN4 |
| CELL[1].IMUX_IMUX_DELAY[12] | BITSLICE[0].TX_CNTVALUEIN5 |
| CELL[1].IMUX_IMUX_DELAY[13] | BITSLICE[0].TX_CNTVALUEIN6 |
| CELL[1].IMUX_IMUX_DELAY[14] | BITSLICE[0].TX_CNTVALUEIN7 |
| CELL[1].IMUX_IMUX_DELAY[15] | BITSLICE[0].TX_CNTVALUEIN8 |
| CELL[1].IMUX_IMUX_DELAY[16] | BITSLICE[0].TX_D0 |
| CELL[2].OUT_BEL[4] | BITSLICE[2].PHY2CLB_FIFO_EMPTY |
| CELL[2].OUT_BEL[5] | BITSLICE[2].RX_Q0 |
| CELL[2].OUT_BEL[6] | BITSLICE[2].RX_Q1 |
| CELL[2].OUT_BEL[7] | BITSLICE[2].RX_Q2 |
| CELL[2].OUT_BEL[8] | BITSLICE[2].RX_Q3 |
| CELL[2].OUT_BEL[9] | BITSLICE[2].RX_Q4 |
| CELL[2].OUT_BEL[10] | BITSLICE[2].RX_Q5 |
| CELL[2].OUT_BEL[11] | BITSLICE[2].RX_Q6 |
| CELL[2].OUT_BEL[12] | BITSLICE[2].RX_Q7 |
| CELL[2].OUT_BEL[13] | BITSLICE[2].TX_CNTVALUEOUT0 |
| CELL[2].OUT_BEL[14] | BITSLICE[2].TX_CNTVALUEOUT1 |
| CELL[2].OUT_BEL[15] | BITSLICE[2].TX_CNTVALUEOUT2 |
| CELL[2].OUT_BEL[16] | BITSLICE[2].TX_CNTVALUEOUT3 |
| CELL[2].OUT_BEL[17] | BITSLICE[2].TX_CNTVALUEOUT4 |
| CELL[2].OUT_BEL[18] | BITSLICE[2].TX_CNTVALUEOUT5 |
| CELL[2].OUT_BEL[19] | BITSLICE[2].TX_CNTVALUEOUT6 |
| CELL[2].OUT_BEL[20] | BITSLICE[2].TX_CNTVALUEOUT7 |
| CELL[2].OUT_BEL[21] | BITSLICE[2].TX_CNTVALUEOUT8 |
| CELL[2].OUT_BEL[22] | BITSLICE[2].TX_T_OUT |
| CELL[2].OUT_BEL[23] | BITSLICE[2].RX_CNTVALUEOUT0 |
| CELL[2].OUT_BEL[24] | BITSLICE[2].RX_CNTVALUEOUT1 |
| CELL[2].OUT_BEL[25] | BITSLICE[2].RX_CNTVALUEOUT2 |
| CELL[2].OUT_BEL[26] | BITSLICE[2].RX_CNTVALUEOUT3 |
| CELL[2].OUT_BEL[27] | BITSLICE[2].RX_CNTVALUEOUT4 |
| CELL[2].OUT_BEL[28] | BITSLICE[2].RX_CNTVALUEOUT5 |
| CELL[2].OUT_BEL[29] | BITSLICE[2].RX_CNTVALUEOUT6 |
| CELL[2].OUT_BEL[30] | BITSLICE[2].RX_CNTVALUEOUT7 |
| CELL[2].OUT_BEL[31] | BITSLICE[2].RX_CNTVALUEOUT8 |
| CELL[2].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK1 |
| CELL[2].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B2 |
| CELL[2].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B2 |
| CELL[2].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B2 |
| CELL[2].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B2 |
| CELL[2].IMUX_BYP[6] | BITSLICE[2].TX_LD |
| CELL[2].IMUX_BYP[7] | BITSLICE[2].TX_INC |
| CELL[2].IMUX_BYP[8] | BITSLICE[2].TX_EN_VTC |
| CELL[2].IMUX_BYP[9] | BITSLICE[2].TX_CE_ODELAY |
| CELL[2].IMUX_BYP[10] | BITSLICE[2].RX_LD |
| CELL[2].IMUX_BYP[11] | BITSLICE[2].RX_INC |
| CELL[2].IMUX_BYP[12] | BITSLICE[2].RX_EN_VTC |
| CELL[2].IMUX_BYP[13] | BITSLICE[2].RX_CE_IDELAY |
| CELL[2].IMUX_BYP[14] | BITSLICE[2].DYN_DCI_OUT_INT |
| CELL[2].IMUX_BYP[15] | BITSLICE_T[0].CE_OFD |
| CELL[2].IMUX_IMUX_DELAY[6] | BITSLICE[1].TX_D1 |
| CELL[2].IMUX_IMUX_DELAY[7] | BITSLICE[1].TX_D3 |
| CELL[2].IMUX_IMUX_DELAY[8] | BITSLICE[1].TX_D7 |
| CELL[2].IMUX_IMUX_DELAY[9] | BITSLICE[1].TX_CNTVALUEIN1 |
| CELL[2].IMUX_IMUX_DELAY[10] | BITSLICE[1].TX_CNTVALUEIN5 |
| CELL[2].IMUX_IMUX_DELAY[11] | BITSLICE[1].TX_CNTVALUEIN7 |
| CELL[2].IMUX_IMUX_DELAY[12] | BITSLICE[1].RX_CNTVALUEIN2 |
| CELL[2].IMUX_IMUX_DELAY[13] | BITSLICE[1].RX_CNTVALUEIN4 |
| CELL[2].IMUX_IMUX_DELAY[14] | BITSLICE[1].RX_CNTVALUEIN8 |
| CELL[2].IMUX_IMUX_DELAY[15] | BITSLICE[2].TX_CE_OFD |
| CELL[2].IMUX_IMUX_DELAY[16] | BITSLICE[0].RX_CNTVALUEIN0 |
| CELL[2].IMUX_IMUX_DELAY[17] | BITSLICE[0].RX_CNTVALUEIN1 |
| CELL[2].IMUX_IMUX_DELAY[18] | BITSLICE[0].RX_CNTVALUEIN2 |
| CELL[2].IMUX_IMUX_DELAY[19] | BITSLICE[0].RX_CNTVALUEIN3 |
| CELL[2].IMUX_IMUX_DELAY[20] | BITSLICE[0].RX_CNTVALUEIN4 |
| CELL[2].IMUX_IMUX_DELAY[21] | BITSLICE[0].RX_CNTVALUEIN5 |
| CELL[2].IMUX_IMUX_DELAY[22] | BITSLICE[0].RX_CNTVALUEIN6 |
| CELL[2].IMUX_IMUX_DELAY[23] | BITSLICE[0].RX_CNTVALUEIN7 |
| CELL[2].IMUX_IMUX_DELAY[24] | BITSLICE[0].RX_CNTVALUEIN8 |
| CELL[2].IMUX_IMUX_DELAY[25] | BITSLICE[1].TX_T |
| CELL[2].IMUX_IMUX_DELAY[26] | BITSLICE[1].TX_CE_OFD |
| CELL[2].IMUX_IMUX_DELAY[27] | BITSLICE[1].RX_CE_IFD |
| CELL[2].IMUX_IMUX_DELAY[28] | BITSLICE[1].RX_DATAIN1 |
| CELL[2].IMUX_IMUX_DELAY[29] | BITSLICE[1].CLB2PHY_FIFO_RDEN |
| CELL[2].IMUX_IMUX_DELAY[30] | BITSLICE[1].TX_D0 |
| CELL[2].IMUX_IMUX_DELAY[31] | BITSLICE[1].TX_D2 |
| CELL[2].IMUX_IMUX_DELAY[32] | BITSLICE[1].TX_D4 |
| CELL[2].IMUX_IMUX_DELAY[33] | BITSLICE[1].TX_D5 |
| CELL[2].IMUX_IMUX_DELAY[34] | BITSLICE[1].TX_D6 |
| CELL[2].IMUX_IMUX_DELAY[35] | BITSLICE[1].TX_CNTVALUEIN0 |
| CELL[2].IMUX_IMUX_DELAY[36] | BITSLICE[1].TX_CNTVALUEIN2 |
| CELL[2].IMUX_IMUX_DELAY[37] | BITSLICE[1].TX_CNTVALUEIN3 |
| CELL[2].IMUX_IMUX_DELAY[38] | BITSLICE[1].TX_CNTVALUEIN4 |
| CELL[2].IMUX_IMUX_DELAY[39] | BITSLICE[1].TX_CNTVALUEIN6 |
| CELL[2].IMUX_IMUX_DELAY[40] | BITSLICE[1].TX_CNTVALUEIN8 |
| CELL[2].IMUX_IMUX_DELAY[41] | BITSLICE[1].RX_CNTVALUEIN0 |
| CELL[2].IMUX_IMUX_DELAY[42] | BITSLICE[1].RX_CNTVALUEIN1 |
| CELL[2].IMUX_IMUX_DELAY[43] | BITSLICE[1].RX_CNTVALUEIN3 |
| CELL[2].IMUX_IMUX_DELAY[44] | BITSLICE[1].RX_CNTVALUEIN5 |
| CELL[2].IMUX_IMUX_DELAY[45] | BITSLICE[1].RX_CNTVALUEIN6 |
| CELL[2].IMUX_IMUX_DELAY[46] | BITSLICE[1].RX_CNTVALUEIN7 |
| CELL[2].IMUX_IMUX_DELAY[47] | BITSLICE[2].TX_T |
| CELL[3].OUT_BEL[4] | BITSLICE_T[0].CNTVALUEOUT0 |
| CELL[3].OUT_BEL[5] | BITSLICE_T[0].CNTVALUEOUT1 |
| CELL[3].OUT_BEL[6] | BITSLICE_T[0].CNTVALUEOUT2 |
| CELL[3].OUT_BEL[7] | BITSLICE_T[0].CNTVALUEOUT3 |
| CELL[3].OUT_BEL[8] | BITSLICE_T[0].CNTVALUEOUT4 |
| CELL[3].OUT_BEL[9] | BITSLICE_T[0].CNTVALUEOUT5 |
| CELL[3].OUT_BEL[10] | BITSLICE_T[0].CNTVALUEOUT6 |
| CELL[3].OUT_BEL[11] | BITSLICE_T[0].CNTVALUEOUT7 |
| CELL[3].OUT_BEL[12] | BITSLICE_T[0].CNTVALUEOUT8 |
| CELL[3].OUT_BEL[13] | BITSLICE[3].TX_T_OUT |
| CELL[3].OUT_BEL[14] | BITSLICE_CONTROL[0].PHY2CLB_PHY_RDY |
| CELL[3].OUT_BEL[15] | BITSLICE_CONTROL[0].MASTER_PD_OUT |
| CELL[3].OUT_BEL[16] | BITSLICE_CONTROL[0].PHY2CLB_FIXDLY_RDY |
| CELL[3].OUT_BEL[17] | BITSLICE_CONTROL[0].CTRL_DLY_TEST_OUT |
| CELL[3].OUT_BEL[18] | BITSLICE[3].PHY2CLB_FIFO_EMPTY |
| CELL[3].OUT_BEL[19] | BITSLICE[3].RX_Q0 |
| CELL[3].OUT_BEL[20] | BITSLICE[3].RX_Q1 |
| CELL[3].OUT_BEL[21] | BITSLICE[3].RX_Q2 |
| CELL[3].OUT_BEL[22] | BITSLICE[3].RX_Q3 |
| CELL[3].OUT_BEL[23] | BITSLICE[3].RX_Q4 |
| CELL[3].OUT_BEL[24] | BITSLICE[3].RX_Q5 |
| CELL[3].OUT_BEL[25] | BITSLICE[3].RX_Q6 |
| CELL[3].OUT_BEL[26] | BITSLICE[3].RX_Q7 |
| CELL[3].OUT_BEL[27] | BITSLICE[3].TX_CNTVALUEOUT0 |
| CELL[3].OUT_BEL[28] | BITSLICE[3].TX_CNTVALUEOUT1 |
| CELL[3].OUT_BEL[29] | BITSLICE[3].TX_CNTVALUEOUT2 |
| CELL[3].OUT_BEL[30] | BITSLICE[3].TX_CNTVALUEOUT3 |
| CELL[3].OUT_BEL[31] | BITSLICE[3].TX_CNTVALUEOUT4 |
| CELL[3].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK2 |
| CELL[3].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].TRISTATE_ODELAY_RST_B0 |
| CELL[3].IMUX_CTRL[5] | BITSLICE_CONTROL[0].REFCLK |
| CELL[3].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].CTRL_RST_B_LOW |
| CELL[3].IMUX_CTRL[7] | BITSLICE_CONTROL[0].RIU_CLK, XIPHY_FEEDTHROUGH[0].CLB2PHY_CTRL_CLK_LOW |
| CELL[3].IMUX_BYP[6] | BITSLICE_T[0].LD |
| CELL[3].IMUX_BYP[7] | BITSLICE_T[0].INC |
| CELL[3].IMUX_BYP[8] | BITSLICE_T[0].CE_ODELAY |
| CELL[3].IMUX_BYP[9] | BITSLICE_CONTROL[0].EN_VTC |
| CELL[3].IMUX_BYP[10] | BITSLICE_CONTROL[0].CTRL_DLY_TEST_IN |
| CELL[3].IMUX_BYP[12] | BITSLICE[3].TX_LD |
| CELL[3].IMUX_BYP[13] | BITSLICE[3].TX_INC |
| CELL[3].IMUX_BYP[14] | BITSLICE[3].TX_EN_VTC |
| CELL[3].IMUX_BYP[15] | BITSLICE[3].TX_CE_ODELAY |
| CELL[3].IMUX_IMUX_DELAY[6] | BITSLICE[2].TX_CNTVALUEIN3 |
| CELL[3].IMUX_IMUX_DELAY[7] | BITSLICE[2].TX_CNTVALUEIN5 |
| CELL[3].IMUX_IMUX_DELAY[8] | BITSLICE[2].RX_CNTVALUEIN0 |
| CELL[3].IMUX_IMUX_DELAY[9] | BITSLICE[2].RX_CNTVALUEIN2 |
| CELL[3].IMUX_IMUX_DELAY[10] | BITSLICE[2].RX_CNTVALUEIN6 |
| CELL[3].IMUX_IMUX_DELAY[11] | BITSLICE[2].RX_CNTVALUEIN8 |
| CELL[3].IMUX_IMUX_DELAY[12] | BITSLICE_T[0].CNTVALUEIN3 |
| CELL[3].IMUX_IMUX_DELAY[13] | BITSLICE_T[0].CNTVALUEIN5 |
| CELL[3].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[0].CLB2RIU_NIBBLE_SEL |
| CELL[3].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[0].CLB2PHY_WRCS1_1 |
| CELL[3].IMUX_IMUX_DELAY[16] | BITSLICE[2].RX_CE_IFD |
| CELL[3].IMUX_IMUX_DELAY[17] | BITSLICE[2].RX_DATAIN1 |
| CELL[3].IMUX_IMUX_DELAY[18] | BITSLICE[2].CLB2PHY_FIFO_RDEN |
| CELL[3].IMUX_IMUX_DELAY[20] | BITSLICE[2].TX_D0 |
| CELL[3].IMUX_IMUX_DELAY[21] | BITSLICE[2].TX_D1 |
| CELL[3].IMUX_IMUX_DELAY[22] | BITSLICE[2].TX_D2 |
| CELL[3].IMUX_IMUX_DELAY[23] | BITSLICE[2].TX_D3 |
| CELL[3].IMUX_IMUX_DELAY[24] | BITSLICE[2].TX_D4 |
| CELL[3].IMUX_IMUX_DELAY[25] | BITSLICE[2].TX_D5 |
| CELL[3].IMUX_IMUX_DELAY[26] | BITSLICE[2].TX_D6 |
| CELL[3].IMUX_IMUX_DELAY[27] | BITSLICE[2].TX_D7 |
| CELL[3].IMUX_IMUX_DELAY[28] | BITSLICE[2].TX_CNTVALUEIN0 |
| CELL[3].IMUX_IMUX_DELAY[29] | BITSLICE[2].TX_CNTVALUEIN1 |
| CELL[3].IMUX_IMUX_DELAY[30] | BITSLICE[2].TX_CNTVALUEIN2 |
| CELL[3].IMUX_IMUX_DELAY[31] | BITSLICE[2].TX_CNTVALUEIN4 |
| CELL[3].IMUX_IMUX_DELAY[32] | BITSLICE[2].TX_CNTVALUEIN6 |
| CELL[3].IMUX_IMUX_DELAY[33] | BITSLICE[2].TX_CNTVALUEIN7 |
| CELL[3].IMUX_IMUX_DELAY[34] | BITSLICE[2].TX_CNTVALUEIN8 |
| CELL[3].IMUX_IMUX_DELAY[35] | BITSLICE[2].RX_CNTVALUEIN1 |
| CELL[3].IMUX_IMUX_DELAY[36] | BITSLICE[2].RX_CNTVALUEIN3 |
| CELL[3].IMUX_IMUX_DELAY[37] | BITSLICE[2].RX_CNTVALUEIN4 |
| CELL[3].IMUX_IMUX_DELAY[38] | BITSLICE[2].RX_CNTVALUEIN5 |
| CELL[3].IMUX_IMUX_DELAY[39] | BITSLICE[2].RX_CNTVALUEIN7 |
| CELL[3].IMUX_IMUX_DELAY[40] | BITSLICE_T[0].CNTVALUEIN0 |
| CELL[3].IMUX_IMUX_DELAY[41] | BITSLICE_T[0].CNTVALUEIN1 |
| CELL[3].IMUX_IMUX_DELAY[42] | BITSLICE_T[0].CNTVALUEIN2 |
| CELL[3].IMUX_IMUX_DELAY[43] | BITSLICE_T[0].CNTVALUEIN4 |
| CELL[3].IMUX_IMUX_DELAY[44] | BITSLICE_T[0].CNTVALUEIN6 |
| CELL[3].IMUX_IMUX_DELAY[45] | BITSLICE_T[0].CNTVALUEIN7 |
| CELL[3].IMUX_IMUX_DELAY[46] | BITSLICE_T[0].CNTVALUEIN8 |
| CELL[3].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[0].CLB2PHY_WRCS1_0 |
| CELL[4].OUT_BEL[4] | BITSLICE[3].TX_CNTVALUEOUT5 |
| CELL[4].OUT_BEL[5] | BITSLICE[3].TX_CNTVALUEOUT6 |
| CELL[4].OUT_BEL[6] | BITSLICE[3].TX_CNTVALUEOUT7 |
| CELL[4].OUT_BEL[7] | BITSLICE[3].TX_CNTVALUEOUT8 |
| CELL[4].OUT_BEL[8] | BITSLICE[4].TX_T_OUT |
| CELL[4].OUT_BEL[9] | BITSLICE[3].RX_CNTVALUEOUT0 |
| CELL[4].OUT_BEL[10] | BITSLICE[3].RX_CNTVALUEOUT1 |
| CELL[4].OUT_BEL[11] | BITSLICE[3].RX_CNTVALUEOUT2 |
| CELL[4].OUT_BEL[12] | BITSLICE[3].RX_CNTVALUEOUT3 |
| CELL[4].OUT_BEL[13] | BITSLICE[3].RX_CNTVALUEOUT4 |
| CELL[4].OUT_BEL[14] | BITSLICE[3].RX_CNTVALUEOUT5 |
| CELL[4].OUT_BEL[15] | BITSLICE[3].RX_CNTVALUEOUT6 |
| CELL[4].OUT_BEL[16] | BITSLICE[3].RX_CNTVALUEOUT7 |
| CELL[4].OUT_BEL[17] | BITSLICE[3].RX_CNTVALUEOUT8 |
| CELL[4].OUT_BEL[18] | BITSLICE[4].PHY2CLB_FIFO_EMPTY |
| CELL[4].OUT_BEL[19] | BITSLICE[4].RX_Q0 |
| CELL[4].OUT_BEL[20] | BITSLICE[4].RX_Q1 |
| CELL[4].OUT_BEL[21] | BITSLICE[4].RX_Q2 |
| CELL[4].OUT_BEL[22] | BITSLICE[4].RX_Q3 |
| CELL[4].OUT_BEL[23] | BITSLICE[4].RX_Q4 |
| CELL[4].OUT_BEL[24] | BITSLICE[4].RX_Q5 |
| CELL[4].OUT_BEL[25] | BITSLICE[4].RX_Q6 |
| CELL[4].OUT_BEL[26] | BITSLICE[4].RX_Q7 |
| CELL[4].OUT_BEL[27] | BITSLICE[4].TX_CNTVALUEOUT0 |
| CELL[4].OUT_BEL[28] | BITSLICE[4].TX_CNTVALUEOUT1 |
| CELL[4].OUT_BEL[29] | BITSLICE[4].TX_CNTVALUEOUT2 |
| CELL[4].OUT_BEL[30] | BITSLICE[4].TX_CNTVALUEOUT3 |
| CELL[4].OUT_BEL[31] | BITSLICE[4].TX_CNTVALUEOUT4 |
| CELL[4].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B3 |
| CELL[4].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B3 |
| CELL[4].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B3 |
| CELL[4].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B3 |
| CELL[4].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK3 |
| CELL[4].IMUX_BYP[6] | BITSLICE[3].RX_LD |
| CELL[4].IMUX_BYP[7] | BITSLICE[3].RX_INC |
| CELL[4].IMUX_BYP[8] | BITSLICE[3].RX_EN_VTC |
| CELL[4].IMUX_BYP[9] | BITSLICE[3].RX_CE_IDELAY |
| CELL[4].IMUX_BYP[10] | BITSLICE[3].DYN_DCI_OUT_INT |
| CELL[4].IMUX_BYP[11] | BITSLICE[4].TX_LD |
| CELL[4].IMUX_BYP[12] | BITSLICE[4].TX_INC |
| CELL[4].IMUX_BYP[13] | BITSLICE[4].TX_EN_VTC |
| CELL[4].IMUX_BYP[14] | BITSLICE[4].TX_CE_ODELAY |
| CELL[4].IMUX_BYP[15] | BITSLICE[4].RX_LD |
| CELL[4].IMUX_IMUX_DELAY[6] | BITSLICE_CONTROL[0].CLB2PHY_RDCS1_1 |
| CELL[4].IMUX_IMUX_DELAY[7] | BITSLICE_CONTROL[0].CLB2PHY_RDCS1_3 |
| CELL[4].IMUX_IMUX_DELAY[8] | BITSLICE_CONTROL[0].CLB2PHY_RDCS0_3 |
| CELL[4].IMUX_IMUX_DELAY[9] | BITSLICE[3].TX_CE_OFD |
| CELL[4].IMUX_IMUX_DELAY[10] | BITSLICE[3].TX_D0 |
| CELL[4].IMUX_IMUX_DELAY[11] | BITSLICE[3].TX_D2 |
| CELL[4].IMUX_IMUX_DELAY[12] | BITSLICE[3].TX_D6 |
| CELL[4].IMUX_IMUX_DELAY[13] | BITSLICE[3].TX_D7 |
| CELL[4].IMUX_IMUX_DELAY[14] | BITSLICE[3].TX_CNTVALUEIN3 |
| CELL[4].IMUX_IMUX_DELAY[15] | BITSLICE[3].TX_CNTVALUEIN5 |
| CELL[4].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[0].CLB2PHY_WRCS1_2 |
| CELL[4].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[0].CLB2PHY_WRCS1_3 |
| CELL[4].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[0].CLB2PHY_WRCS0_0 |
| CELL[4].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[0].CLB2PHY_WRCS0_1 |
| CELL[4].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[0].CLB2PHY_WRCS0_2 |
| CELL[4].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[0].CLB2PHY_WRCS0_3 |
| CELL[4].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[0].CLB2PHY_T_B0 |
| CELL[4].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[0].CLB2PHY_T_B1 |
| CELL[4].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[0].CLB2PHY_T_B2 |
| CELL[4].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[0].CLB2PHY_T_B3 |
| CELL[4].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[0].CLB2PHY_RDEN0 |
| CELL[4].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[0].CLB2PHY_RDEN1 |
| CELL[4].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[0].CLB2PHY_RDEN2 |
| CELL[4].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[0].CLB2PHY_RDEN3 |
| CELL[4].IMUX_IMUX_DELAY[30] | BITSLICE_CONTROL[0].CLB2PHY_RDCS1_0 |
| CELL[4].IMUX_IMUX_DELAY[31] | BITSLICE_CONTROL[0].CLB2PHY_RDCS1_2 |
| CELL[4].IMUX_IMUX_DELAY[32] | BITSLICE_CONTROL[0].CLB2PHY_RDCS0_0 |
| CELL[4].IMUX_IMUX_DELAY[33] | BITSLICE_CONTROL[0].CLB2PHY_RDCS0_1 |
| CELL[4].IMUX_IMUX_DELAY[34] | BITSLICE_CONTROL[0].CLB2PHY_RDCS0_2 |
| CELL[4].IMUX_IMUX_DELAY[35] | BITSLICE[3].TX_T |
| CELL[4].IMUX_IMUX_DELAY[36] | BITSLICE[3].RX_CE_IFD |
| CELL[4].IMUX_IMUX_DELAY[37] | BITSLICE[3].RX_DATAIN1 |
| CELL[4].IMUX_IMUX_DELAY[38] | BITSLICE[3].CLB2PHY_FIFO_RDEN |
| CELL[4].IMUX_IMUX_DELAY[39] | BITSLICE[3].TX_D1 |
| CELL[4].IMUX_IMUX_DELAY[40] | BITSLICE[3].TX_D3 |
| CELL[4].IMUX_IMUX_DELAY[41] | BITSLICE[3].TX_D4 |
| CELL[4].IMUX_IMUX_DELAY[42] | BITSLICE[3].TX_D5 |
| CELL[4].IMUX_IMUX_DELAY[44] | BITSLICE[3].TX_CNTVALUEIN0 |
| CELL[4].IMUX_IMUX_DELAY[45] | BITSLICE[3].TX_CNTVALUEIN1 |
| CELL[4].IMUX_IMUX_DELAY[46] | BITSLICE[3].TX_CNTVALUEIN2 |
| CELL[4].IMUX_IMUX_DELAY[47] | BITSLICE[3].TX_CNTVALUEIN4 |
| CELL[5].OUT_BEL[4] | BITSLICE[4].TX_CNTVALUEOUT5 |
| CELL[5].OUT_BEL[5] | BITSLICE[4].TX_CNTVALUEOUT6 |
| CELL[5].OUT_BEL[6] | BITSLICE[4].TX_CNTVALUEOUT7 |
| CELL[5].OUT_BEL[7] | BITSLICE[4].TX_CNTVALUEOUT8 |
| CELL[5].OUT_BEL[8] | BITSLICE[5].TX_T_OUT |
| CELL[5].OUT_BEL[9] | BITSLICE[4].RX_CNTVALUEOUT0 |
| CELL[5].OUT_BEL[10] | BITSLICE[4].RX_CNTVALUEOUT1 |
| CELL[5].OUT_BEL[11] | BITSLICE[4].RX_CNTVALUEOUT2 |
| CELL[5].OUT_BEL[12] | BITSLICE[4].RX_CNTVALUEOUT3 |
| CELL[5].OUT_BEL[13] | BITSLICE[4].RX_CNTVALUEOUT4 |
| CELL[5].OUT_BEL[14] | BITSLICE[4].RX_CNTVALUEOUT5 |
| CELL[5].OUT_BEL[15] | BITSLICE[4].RX_CNTVALUEOUT6 |
| CELL[5].OUT_BEL[16] | BITSLICE[4].RX_CNTVALUEOUT7 |
| CELL[5].OUT_BEL[17] | BITSLICE[4].RX_CNTVALUEOUT8 |
| CELL[5].OUT_BEL[18] | BITSLICE[5].PHY2CLB_FIFO_EMPTY |
| CELL[5].OUT_BEL[19] | BITSLICE[5].RX_Q0 |
| CELL[5].OUT_BEL[20] | BITSLICE[5].RX_Q1 |
| CELL[5].OUT_BEL[21] | BITSLICE[5].RX_Q2 |
| CELL[5].OUT_BEL[22] | BITSLICE[5].RX_Q3 |
| CELL[5].OUT_BEL[23] | BITSLICE[5].RX_Q4 |
| CELL[5].OUT_BEL[24] | BITSLICE[5].RX_Q5 |
| CELL[5].OUT_BEL[25] | BITSLICE[5].RX_Q6 |
| CELL[5].OUT_BEL[26] | BITSLICE[5].RX_Q7 |
| CELL[5].OUT_BEL[27] | BITSLICE[5].TX_CNTVALUEOUT0 |
| CELL[5].OUT_BEL[28] | BITSLICE[5].TX_CNTVALUEOUT1 |
| CELL[5].OUT_BEL[29] | BITSLICE[5].TX_CNTVALUEOUT2 |
| CELL[5].OUT_BEL[30] | BITSLICE[5].TX_CNTVALUEOUT3 |
| CELL[5].OUT_BEL[31] | BITSLICE[5].TX_CNTVALUEOUT4 |
| CELL[5].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B4 |
| CELL[5].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B4 |
| CELL[5].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B4 |
| CELL[5].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B4 |
| CELL[5].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK4 |
| CELL[5].IMUX_BYP[6] | BITSLICE[4].RX_INC |
| CELL[5].IMUX_BYP[7] | BITSLICE[4].RX_EN_VTC |
| CELL[5].IMUX_BYP[8] | BITSLICE[4].RX_CE_IDELAY |
| CELL[5].IMUX_BYP[9] | BITSLICE[4].DYN_DCI_OUT_INT |
| CELL[5].IMUX_BYP[10] | BITSLICE[5].TX_LD |
| CELL[5].IMUX_BYP[11] | BITSLICE[5].TX_INC |
| CELL[5].IMUX_BYP[12] | BITSLICE[5].TX_EN_VTC |
| CELL[5].IMUX_BYP[13] | BITSLICE[5].TX_CE_ODELAY |
| CELL[5].IMUX_BYP[14] | BITSLICE[5].RX_LD |
| CELL[5].IMUX_BYP[15] | BITSLICE[5].RX_INC |
| CELL[5].IMUX_IMUX_DELAY[6] | BITSLICE[4].RX_DATAIN1 |
| CELL[5].IMUX_IMUX_DELAY[7] | BITSLICE[4].TX_D0 |
| CELL[5].IMUX_IMUX_DELAY[8] | BITSLICE[4].TX_D4 |
| CELL[5].IMUX_IMUX_DELAY[9] | BITSLICE[4].TX_D6 |
| CELL[5].IMUX_IMUX_DELAY[10] | BITSLICE[4].TX_CNTVALUEIN2 |
| CELL[5].IMUX_IMUX_DELAY[11] | BITSLICE[4].TX_CNTVALUEIN4 |
| CELL[5].IMUX_IMUX_DELAY[12] | BITSLICE[4].TX_CNTVALUEIN8 |
| CELL[5].IMUX_IMUX_DELAY[13] | BITSLICE[4].RX_CNTVALUEIN1 |
| CELL[5].IMUX_IMUX_DELAY[14] | BITSLICE[4].RX_CNTVALUEIN5 |
| CELL[5].IMUX_IMUX_DELAY[15] | BITSLICE[4].RX_CNTVALUEIN7 |
| CELL[5].IMUX_IMUX_DELAY[16] | BITSLICE[3].TX_CNTVALUEIN6 |
| CELL[5].IMUX_IMUX_DELAY[17] | BITSLICE[3].TX_CNTVALUEIN7 |
| CELL[5].IMUX_IMUX_DELAY[18] | BITSLICE[3].TX_CNTVALUEIN8 |
| CELL[5].IMUX_IMUX_DELAY[19] | BITSLICE[3].RX_CNTVALUEIN0 |
| CELL[5].IMUX_IMUX_DELAY[20] | BITSLICE[3].RX_CNTVALUEIN1 |
| CELL[5].IMUX_IMUX_DELAY[21] | BITSLICE[3].RX_CNTVALUEIN2 |
| CELL[5].IMUX_IMUX_DELAY[22] | BITSLICE[3].RX_CNTVALUEIN3 |
| CELL[5].IMUX_IMUX_DELAY[23] | BITSLICE[3].RX_CNTVALUEIN4 |
| CELL[5].IMUX_IMUX_DELAY[24] | BITSLICE[3].RX_CNTVALUEIN5 |
| CELL[5].IMUX_IMUX_DELAY[25] | BITSLICE[3].RX_CNTVALUEIN6 |
| CELL[5].IMUX_IMUX_DELAY[26] | BITSLICE[3].RX_CNTVALUEIN7 |
| CELL[5].IMUX_IMUX_DELAY[27] | BITSLICE[3].RX_CNTVALUEIN8 |
| CELL[5].IMUX_IMUX_DELAY[28] | BITSLICE[4].TX_T |
| CELL[5].IMUX_IMUX_DELAY[29] | BITSLICE[4].TX_CE_OFD |
| CELL[5].IMUX_IMUX_DELAY[30] | BITSLICE[4].RX_CE_IFD |
| CELL[5].IMUX_IMUX_DELAY[31] | BITSLICE[4].CLB2PHY_FIFO_RDEN |
| CELL[5].IMUX_IMUX_DELAY[32] | BITSLICE[4].TX_D1 |
| CELL[5].IMUX_IMUX_DELAY[33] | BITSLICE[4].TX_D2 |
| CELL[5].IMUX_IMUX_DELAY[34] | BITSLICE[4].TX_D3 |
| CELL[5].IMUX_IMUX_DELAY[35] | BITSLICE[4].TX_D5 |
| CELL[5].IMUX_IMUX_DELAY[36] | BITSLICE[4].TX_D7 |
| CELL[5].IMUX_IMUX_DELAY[37] | BITSLICE[4].TX_CNTVALUEIN0 |
| CELL[5].IMUX_IMUX_DELAY[38] | BITSLICE[4].TX_CNTVALUEIN1 |
| CELL[5].IMUX_IMUX_DELAY[39] | BITSLICE[4].TX_CNTVALUEIN3 |
| CELL[5].IMUX_IMUX_DELAY[40] | BITSLICE[4].TX_CNTVALUEIN5 |
| CELL[5].IMUX_IMUX_DELAY[41] | BITSLICE[4].TX_CNTVALUEIN6 |
| CELL[5].IMUX_IMUX_DELAY[42] | BITSLICE[4].TX_CNTVALUEIN7 |
| CELL[5].IMUX_IMUX_DELAY[43] | BITSLICE[4].RX_CNTVALUEIN0 |
| CELL[5].IMUX_IMUX_DELAY[44] | BITSLICE[4].RX_CNTVALUEIN2 |
| CELL[5].IMUX_IMUX_DELAY[45] | BITSLICE[4].RX_CNTVALUEIN3 |
| CELL[5].IMUX_IMUX_DELAY[46] | BITSLICE[4].RX_CNTVALUEIN4 |
| CELL[5].IMUX_IMUX_DELAY[47] | BITSLICE[4].RX_CNTVALUEIN6 |
| CELL[6].OUT_BEL[4] | BITSLICE[5].TX_CNTVALUEOUT5 |
| CELL[6].OUT_BEL[5] | BITSLICE[5].TX_CNTVALUEOUT6 |
| CELL[6].OUT_BEL[6] | BITSLICE[5].TX_CNTVALUEOUT7 |
| CELL[6].OUT_BEL[7] | BITSLICE[5].TX_CNTVALUEOUT8 |
| CELL[6].OUT_BEL[8] | BITSLICE[6].TX_T_OUT |
| CELL[6].OUT_BEL[9] | BITSLICE[5].RX_CNTVALUEOUT0 |
| CELL[6].OUT_BEL[10] | BITSLICE[5].RX_CNTVALUEOUT1 |
| CELL[6].OUT_BEL[11] | BITSLICE[5].RX_CNTVALUEOUT2 |
| CELL[6].OUT_BEL[12] | BITSLICE[5].RX_CNTVALUEOUT3 |
| CELL[6].OUT_BEL[13] | BITSLICE[5].RX_CNTVALUEOUT4 |
| CELL[6].OUT_BEL[14] | BITSLICE[5].RX_CNTVALUEOUT5 |
| CELL[6].OUT_BEL[15] | BITSLICE[5].RX_CNTVALUEOUT6 |
| CELL[6].OUT_BEL[16] | BITSLICE[5].RX_CNTVALUEOUT7 |
| CELL[6].OUT_BEL[17] | BITSLICE[5].RX_CNTVALUEOUT8 |
| CELL[6].OUT_BEL[18] | RIU_OR[0].RIU_RD_VALID |
| CELL[6].OUT_BEL[19] | RIU_OR[0].RIU_RD_DATA0 |
| CELL[6].OUT_BEL[20] | RIU_OR[0].RIU_RD_DATA1 |
| CELL[6].OUT_BEL[21] | RIU_OR[0].RIU_RD_DATA2 |
| CELL[6].OUT_BEL[22] | RIU_OR[0].RIU_RD_DATA3 |
| CELL[6].OUT_BEL[23] | RIU_OR[0].RIU_RD_DATA4 |
| CELL[6].OUT_BEL[24] | RIU_OR[0].RIU_RD_DATA5 |
| CELL[6].OUT_BEL[25] | RIU_OR[0].RIU_RD_DATA6 |
| CELL[6].OUT_BEL[26] | RIU_OR[0].RIU_RD_DATA7 |
| CELL[6].OUT_BEL[27] | RIU_OR[0].RIU_RD_DATA8 |
| CELL[6].OUT_BEL[28] | RIU_OR[0].RIU_RD_DATA9 |
| CELL[6].OUT_BEL[29] | RIU_OR[0].RIU_RD_DATA10 |
| CELL[6].OUT_BEL[30] | RIU_OR[0].RIU_RD_DATA11 |
| CELL[6].OUT_BEL[31] | RIU_OR[0].RIU_RD_DATA12 |
| CELL[6].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B5 |
| CELL[6].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B5 |
| CELL[6].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B5 |
| CELL[6].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B5 |
| CELL[6].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK5 |
| CELL[6].IMUX_BYP[6] | BITSLICE[5].RX_EN_VTC |
| CELL[6].IMUX_BYP[7] | BITSLICE[5].RX_CE_IDELAY |
| CELL[6].IMUX_BYP[8] | BITSLICE[5].DYN_DCI_OUT_INT |
| CELL[6].IMUX_BYP[9] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B0 |
| CELL[6].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B1 |
| CELL[6].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B2 |
| CELL[6].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SPARE_B3 |
| CELL[6].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_RST_MASK_B |
| CELL[6].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_MODE_B |
| CELL[6].IMUX_BYP[15] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN0 |
| CELL[6].IMUX_IMUX_DELAY[6] | BITSLICE[5].TX_CNTVALUEIN1 |
| CELL[6].IMUX_IMUX_DELAY[7] | BITSLICE[5].TX_CNTVALUEIN3 |
| CELL[6].IMUX_IMUX_DELAY[8] | BITSLICE[5].TX_CNTVALUEIN7 |
| CELL[6].IMUX_IMUX_DELAY[10] | BITSLICE[5].RX_CNTVALUEIN3 |
| CELL[6].IMUX_IMUX_DELAY[11] | BITSLICE[5].RX_CNTVALUEIN5 |
| CELL[6].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[0].CLB2RIU_WR_EN, BITSLICE_CONTROL[1].CLB2RIU_WR_EN |
| CELL[6].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA1, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA1 |
| CELL[6].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA5, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA5 |
| CELL[6].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA7, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA7 |
| CELL[6].IMUX_IMUX_DELAY[16] | BITSLICE[4].RX_CNTVALUEIN8 |
| CELL[6].IMUX_IMUX_DELAY[17] | BITSLICE[5].TX_T |
| CELL[6].IMUX_IMUX_DELAY[18] | BITSLICE[5].TX_CE_OFD |
| CELL[6].IMUX_IMUX_DELAY[19] | BITSLICE[5].RX_CE_IFD |
| CELL[6].IMUX_IMUX_DELAY[20] | BITSLICE[5].RX_DATAIN1 |
| CELL[6].IMUX_IMUX_DELAY[21] | BITSLICE[5].CLB2PHY_FIFO_RDEN |
| CELL[6].IMUX_IMUX_DELAY[22] | BITSLICE[5].TX_D0 |
| CELL[6].IMUX_IMUX_DELAY[23] | BITSLICE[5].TX_D1 |
| CELL[6].IMUX_IMUX_DELAY[24] | BITSLICE[5].TX_D2 |
| CELL[6].IMUX_IMUX_DELAY[25] | BITSLICE[5].TX_D3 |
| CELL[6].IMUX_IMUX_DELAY[26] | BITSLICE[5].TX_D4 |
| CELL[6].IMUX_IMUX_DELAY[27] | BITSLICE[5].TX_D5 |
| CELL[6].IMUX_IMUX_DELAY[28] | BITSLICE[5].TX_D6 |
| CELL[6].IMUX_IMUX_DELAY[29] | BITSLICE[5].TX_D7 |
| CELL[6].IMUX_IMUX_DELAY[30] | BITSLICE[5].TX_CNTVALUEIN0 |
| CELL[6].IMUX_IMUX_DELAY[31] | BITSLICE[5].TX_CNTVALUEIN2 |
| CELL[6].IMUX_IMUX_DELAY[32] | BITSLICE[5].TX_CNTVALUEIN4 |
| CELL[6].IMUX_IMUX_DELAY[33] | BITSLICE[5].TX_CNTVALUEIN5 |
| CELL[6].IMUX_IMUX_DELAY[34] | BITSLICE[5].TX_CNTVALUEIN6 |
| CELL[6].IMUX_IMUX_DELAY[35] | BITSLICE[5].TX_CNTVALUEIN8 |
| CELL[6].IMUX_IMUX_DELAY[36] | BITSLICE[5].RX_CNTVALUEIN0 |
| CELL[6].IMUX_IMUX_DELAY[37] | BITSLICE[5].RX_CNTVALUEIN1 |
| CELL[6].IMUX_IMUX_DELAY[38] | BITSLICE[5].RX_CNTVALUEIN2 |
| CELL[6].IMUX_IMUX_DELAY[39] | BITSLICE[5].RX_CNTVALUEIN4 |
| CELL[6].IMUX_IMUX_DELAY[40] | BITSLICE[5].RX_CNTVALUEIN6 |
| CELL[6].IMUX_IMUX_DELAY[41] | BITSLICE[5].RX_CNTVALUEIN7 |
| CELL[6].IMUX_IMUX_DELAY[42] | BITSLICE[5].RX_CNTVALUEIN8 |
| CELL[6].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA0, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA0 |
| CELL[6].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA2, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA2 |
| CELL[6].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA3, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA3 |
| CELL[6].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA4, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA4 |
| CELL[6].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA6, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA6 |
| CELL[7].OUT_BEL[4] | RIU_OR[0].RIU_RD_DATA13 |
| CELL[7].OUT_BEL[5] | RIU_OR[0].RIU_RD_DATA14 |
| CELL[7].OUT_BEL[6] | RIU_OR[0].RIU_RD_DATA15 |
| CELL[7].OUT_BEL[7] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT0 |
| CELL[7].OUT_BEL[8] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT1 |
| CELL[7].OUT_BEL[9] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT2 |
| CELL[7].OUT_BEL[10] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT3 |
| CELL[7].OUT_BEL[11] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT4 |
| CELL[7].OUT_BEL[12] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT5 |
| CELL[7].OUT_BEL[13] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT6 |
| CELL[7].OUT_BEL[14] | XIPHY_FEEDTHROUGH[0].PHY2CLB_SCAN_OUT7 |
| CELL[7].OUT_BEL[15] | XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_OUT |
| CELL[7].OUT_BEL[16] | XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_FLG_OUT |
| CELL[7].OUT_BEL[17] | XIPHY_FEEDTHROUGH[0].PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[7].OUT_BEL[18] | BITSLICE[12].PHY2CLB_FIFO_EMPTY |
| CELL[7].OUT_BEL[19] | BITSLICE[12].RX_Q0 |
| CELL[7].OUT_BEL[20] | BITSLICE[12].RX_Q1 |
| CELL[7].OUT_BEL[21] | BITSLICE[12].RX_Q2 |
| CELL[7].OUT_BEL[22] | BITSLICE[12].RX_Q3 |
| CELL[7].OUT_BEL[23] | BITSLICE[12].RX_Q4 |
| CELL[7].OUT_BEL[24] | BITSLICE[12].RX_Q5 |
| CELL[7].OUT_BEL[25] | BITSLICE[12].RX_Q6 |
| CELL[7].OUT_BEL[26] | BITSLICE[12].RX_Q7 |
| CELL[7].OUT_BEL[27] | BITSLICE[12].TX_CNTVALUEOUT0 |
| CELL[7].OUT_BEL[28] | BITSLICE[12].TX_CNTVALUEOUT1 |
| CELL[7].OUT_BEL[29] | BITSLICE[12].TX_CNTVALUEOUT2 |
| CELL[7].OUT_BEL[30] | BITSLICE[12].TX_CNTVALUEOUT3 |
| CELL[7].OUT_BEL[31] | BITSLICE[12].TX_CNTVALUEOUT4 |
| CELL[7].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_SDR |
| CELL[7].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_DIV4 |
| CELL[7].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_CLK_DIV2 |
| CELL[7].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B12 |
| CELL[7].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B12 |
| CELL[7].IMUX_BYP[6] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN1 |
| CELL[7].IMUX_BYP[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN2 |
| CELL[7].IMUX_BYP[8] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN3 |
| CELL[7].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN4 |
| CELL[7].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN5 |
| CELL[7].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN6 |
| CELL[7].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_IN7 |
| CELL[7].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[0].CLB2PHY_SCAN_EN_B |
| CELL[7].IMUX_BYP[15] | BITSLICE[12].TX_LD |
| CELL[7].IMUX_IMUX_DELAY[6] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_DIV4_CLK_SEL_B |
| CELL[7].IMUX_IMUX_DELAY[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CT_START_EN |
| CELL[7].IMUX_IMUX_DELAY[8] | BITSLICE[12].TX_CE_OFD |
| CELL[7].IMUX_IMUX_DELAY[9] | BITSLICE[12].RX_DATAIN1 |
| CELL[7].IMUX_IMUX_DELAY[10] | BITSLICE[12].TX_D2 |
| CELL[7].IMUX_IMUX_DELAY[11] | BITSLICE[12].TX_D4 |
| CELL[7].IMUX_IMUX_DELAY[12] | BITSLICE[12].TX_CNTVALUEIN0 |
| CELL[7].IMUX_IMUX_DELAY[13] | BITSLICE[12].TX_CNTVALUEIN2 |
| CELL[7].IMUX_IMUX_DELAY[14] | BITSLICE[12].TX_CNTVALUEIN6 |
| CELL[7].IMUX_IMUX_DELAY[15] | BITSLICE[12].TX_CNTVALUEIN8 |
| CELL[7].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA8, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA8 |
| CELL[7].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA9, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA9 |
| CELL[7].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA10, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA10 |
| CELL[7].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA11, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA11 |
| CELL[7].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA12, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA12 |
| CELL[7].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA13, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA13 |
| CELL[7].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA14, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA14 |
| CELL[7].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[0].CLB2RIU_WR_DATA15, BITSLICE_CONTROL[1].CLB2RIU_WR_DATA15 |
| CELL[7].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[0].CLB2RIU_ADDR0, BITSLICE_CONTROL[1].CLB2RIU_ADDR0 |
| CELL[7].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[0].CLB2RIU_ADDR1, BITSLICE_CONTROL[1].CLB2RIU_ADDR1 |
| CELL[7].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[0].CLB2RIU_ADDR2, BITSLICE_CONTROL[1].CLB2RIU_ADDR2 |
| CELL[7].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[0].CLB2RIU_ADDR3, BITSLICE_CONTROL[1].CLB2RIU_ADDR3 |
| CELL[7].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[0].CLB2RIU_ADDR4, BITSLICE_CONTROL[1].CLB2RIU_ADDR4 |
| CELL[7].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[0].CLB2RIU_ADDR5, BITSLICE_CONTROL[1].CLB2RIU_ADDR5 |
| CELL[7].IMUX_IMUX_DELAY[30] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_SDR_CLK_SEL_B |
| CELL[7].IMUX_IMUX_DELAY[31] | XIPHY_FEEDTHROUGH[0].CLB2PHY_TEST_DIV2_CLK_SEL_B |
| CELL[7].IMUX_IMUX_DELAY[32] | XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CLK_STOP_FLG_OUT |
| CELL[7].IMUX_IMUX_DELAY[33] | XIPHY_FEEDTHROUGH[0].CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[7].IMUX_IMUX_DELAY[34] | BITSLICE[12].TX_T |
| CELL[7].IMUX_IMUX_DELAY[35] | BITSLICE[12].RX_CE_IFD |
| CELL[7].IMUX_IMUX_DELAY[36] | BITSLICE[12].CLB2PHY_FIFO_RDEN |
| CELL[7].IMUX_IMUX_DELAY[37] | BITSLICE[12].TX_D0 |
| CELL[7].IMUX_IMUX_DELAY[38] | BITSLICE[12].TX_D1 |
| CELL[7].IMUX_IMUX_DELAY[39] | BITSLICE[12].TX_D3 |
| CELL[7].IMUX_IMUX_DELAY[40] | BITSLICE[12].TX_D5 |
| CELL[7].IMUX_IMUX_DELAY[41] | BITSLICE[12].TX_D6 |
| CELL[7].IMUX_IMUX_DELAY[42] | BITSLICE[12].TX_D7 |
| CELL[7].IMUX_IMUX_DELAY[43] | BITSLICE[12].TX_CNTVALUEIN1 |
| CELL[7].IMUX_IMUX_DELAY[44] | BITSLICE[12].TX_CNTVALUEIN3 |
| CELL[7].IMUX_IMUX_DELAY[45] | BITSLICE[12].TX_CNTVALUEIN4 |
| CELL[7].IMUX_IMUX_DELAY[46] | BITSLICE[12].TX_CNTVALUEIN5 |
| CELL[7].IMUX_IMUX_DELAY[47] | BITSLICE[12].TX_CNTVALUEIN7 |
| CELL[8].OUT_BEL[4] | BITSLICE[12].TX_CNTVALUEOUT5 |
| CELL[8].OUT_BEL[5] | BITSLICE[12].TX_CNTVALUEOUT6 |
| CELL[8].OUT_BEL[6] | BITSLICE[12].TX_CNTVALUEOUT7 |
| CELL[8].OUT_BEL[7] | BITSLICE[12].TX_CNTVALUEOUT8 |
| CELL[8].OUT_BEL[8] | BITSLICE[7].TX_T_OUT |
| CELL[8].OUT_BEL[9] | BITSLICE[12].RX_CNTVALUEOUT0 |
| CELL[8].OUT_BEL[10] | BITSLICE[12].RX_CNTVALUEOUT1 |
| CELL[8].OUT_BEL[11] | BITSLICE[12].RX_CNTVALUEOUT2 |
| CELL[8].OUT_BEL[12] | BITSLICE[12].RX_CNTVALUEOUT3 |
| CELL[8].OUT_BEL[13] | BITSLICE[12].RX_CNTVALUEOUT4 |
| CELL[8].OUT_BEL[14] | BITSLICE[12].RX_CNTVALUEOUT5 |
| CELL[8].OUT_BEL[15] | BITSLICE[12].RX_CNTVALUEOUT6 |
| CELL[8].OUT_BEL[16] | BITSLICE[12].RX_CNTVALUEOUT7 |
| CELL[8].OUT_BEL[17] | BITSLICE[12].RX_CNTVALUEOUT8 |
| CELL[8].OUT_BEL[18] | BITSLICE[6].PHY2CLB_FIFO_EMPTY |
| CELL[8].OUT_BEL[19] | BITSLICE[6].RX_Q0 |
| CELL[8].OUT_BEL[20] | BITSLICE[6].RX_Q1 |
| CELL[8].OUT_BEL[21] | BITSLICE[6].RX_Q2 |
| CELL[8].OUT_BEL[22] | BITSLICE[6].RX_Q3 |
| CELL[8].OUT_BEL[23] | BITSLICE[6].RX_Q4 |
| CELL[8].OUT_BEL[24] | BITSLICE[6].RX_Q5 |
| CELL[8].OUT_BEL[25] | BITSLICE[6].RX_Q6 |
| CELL[8].OUT_BEL[26] | BITSLICE[6].RX_Q7 |
| CELL[8].OUT_BEL[27] | BITSLICE[6].TX_CNTVALUEOUT0 |
| CELL[8].OUT_BEL[28] | BITSLICE[6].TX_CNTVALUEOUT1 |
| CELL[8].OUT_BEL[29] | BITSLICE[6].TX_CNTVALUEOUT2 |
| CELL[8].OUT_BEL[30] | BITSLICE[6].TX_CNTVALUEOUT3 |
| CELL[8].OUT_BEL[31] | BITSLICE[6].TX_CNTVALUEOUT4 |
| CELL[8].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B12 |
| CELL[8].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B12 |
| CELL[8].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK12 |
| CELL[8].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B6 |
| CELL[8].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B6 |
| CELL[8].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B6 |
| CELL[8].IMUX_BYP[6] | BITSLICE[12].TX_INC |
| CELL[8].IMUX_BYP[7] | BITSLICE[12].TX_EN_VTC |
| CELL[8].IMUX_BYP[8] | BITSLICE[12].TX_CE_ODELAY |
| CELL[8].IMUX_BYP[9] | BITSLICE[12].RX_LD |
| CELL[8].IMUX_BYP[10] | BITSLICE[12].RX_INC |
| CELL[8].IMUX_BYP[11] | BITSLICE[12].RX_EN_VTC |
| CELL[8].IMUX_BYP[12] | BITSLICE[12].RX_CE_IDELAY |
| CELL[8].IMUX_BYP[13] | BITSLICE[12].DYN_DCI_OUT_INT |
| CELL[8].IMUX_BYP[14] | BITSLICE[6].TX_LD |
| CELL[8].IMUX_BYP[15] | BITSLICE[6].TX_INC |
| CELL[8].IMUX_IMUX_DELAY[6] | BITSLICE[6].TX_D0 |
| CELL[8].IMUX_IMUX_DELAY[7] | BITSLICE[6].TX_D2 |
| CELL[8].IMUX_IMUX_DELAY[8] | BITSLICE[6].TX_D6 |
| CELL[8].IMUX_IMUX_DELAY[9] | BITSLICE[6].TX_CNTVALUEIN0 |
| CELL[8].IMUX_IMUX_DELAY[10] | BITSLICE[6].TX_CNTVALUEIN4 |
| CELL[8].IMUX_IMUX_DELAY[11] | BITSLICE[6].TX_CNTVALUEIN6 |
| CELL[8].IMUX_IMUX_DELAY[12] | BITSLICE[6].RX_CNTVALUEIN1 |
| CELL[8].IMUX_IMUX_DELAY[13] | BITSLICE[6].RX_CNTVALUEIN3 |
| CELL[8].IMUX_IMUX_DELAY[14] | BITSLICE[6].RX_CNTVALUEIN7 |
| CELL[8].IMUX_IMUX_DELAY[15] | BITSLICE[7].TX_T |
| CELL[8].IMUX_IMUX_DELAY[16] | BITSLICE[12].RX_CNTVALUEIN0 |
| CELL[8].IMUX_IMUX_DELAY[17] | BITSLICE[12].RX_CNTVALUEIN1 |
| CELL[8].IMUX_IMUX_DELAY[18] | BITSLICE[12].RX_CNTVALUEIN2 |
| CELL[8].IMUX_IMUX_DELAY[19] | BITSLICE[12].RX_CNTVALUEIN3 |
| CELL[8].IMUX_IMUX_DELAY[20] | BITSLICE[12].RX_CNTVALUEIN4 |
| CELL[8].IMUX_IMUX_DELAY[21] | BITSLICE[12].RX_CNTVALUEIN5 |
| CELL[8].IMUX_IMUX_DELAY[22] | BITSLICE[12].RX_CNTVALUEIN6 |
| CELL[8].IMUX_IMUX_DELAY[23] | BITSLICE[12].RX_CNTVALUEIN7 |
| CELL[8].IMUX_IMUX_DELAY[24] | BITSLICE[12].RX_CNTVALUEIN8 |
| CELL[8].IMUX_IMUX_DELAY[25] | BITSLICE[6].TX_T |
| CELL[8].IMUX_IMUX_DELAY[26] | BITSLICE[6].TX_CE_OFD |
| CELL[8].IMUX_IMUX_DELAY[27] | BITSLICE[6].RX_CE_IFD |
| CELL[8].IMUX_IMUX_DELAY[29] | BITSLICE[6].RX_DATAIN1 |
| CELL[8].IMUX_IMUX_DELAY[30] | BITSLICE[6].CLB2PHY_FIFO_RDEN |
| CELL[8].IMUX_IMUX_DELAY[31] | BITSLICE[6].TX_D1 |
| CELL[8].IMUX_IMUX_DELAY[32] | BITSLICE[6].TX_D3 |
| CELL[8].IMUX_IMUX_DELAY[33] | BITSLICE[6].TX_D4 |
| CELL[8].IMUX_IMUX_DELAY[34] | BITSLICE[6].TX_D5 |
| CELL[8].IMUX_IMUX_DELAY[35] | BITSLICE[6].TX_D7 |
| CELL[8].IMUX_IMUX_DELAY[36] | BITSLICE[6].TX_CNTVALUEIN1 |
| CELL[8].IMUX_IMUX_DELAY[37] | BITSLICE[6].TX_CNTVALUEIN2 |
| CELL[8].IMUX_IMUX_DELAY[38] | BITSLICE[6].TX_CNTVALUEIN3 |
| CELL[8].IMUX_IMUX_DELAY[39] | BITSLICE[6].TX_CNTVALUEIN5 |
| CELL[8].IMUX_IMUX_DELAY[40] | BITSLICE[6].TX_CNTVALUEIN7 |
| CELL[8].IMUX_IMUX_DELAY[41] | BITSLICE[6].TX_CNTVALUEIN8 |
| CELL[8].IMUX_IMUX_DELAY[42] | BITSLICE[6].RX_CNTVALUEIN0 |
| CELL[8].IMUX_IMUX_DELAY[43] | BITSLICE[6].RX_CNTVALUEIN2 |
| CELL[8].IMUX_IMUX_DELAY[44] | BITSLICE[6].RX_CNTVALUEIN4 |
| CELL[8].IMUX_IMUX_DELAY[45] | BITSLICE[6].RX_CNTVALUEIN5 |
| CELL[8].IMUX_IMUX_DELAY[46] | BITSLICE[6].RX_CNTVALUEIN6 |
| CELL[8].IMUX_IMUX_DELAY[47] | BITSLICE[6].RX_CNTVALUEIN8 |
| CELL[9].OUT_BEL[4] | BITSLICE[6].TX_CNTVALUEOUT5 |
| CELL[9].OUT_BEL[5] | BITSLICE[6].TX_CNTVALUEOUT6 |
| CELL[9].OUT_BEL[6] | BITSLICE[6].TX_CNTVALUEOUT7 |
| CELL[9].OUT_BEL[7] | BITSLICE[6].TX_CNTVALUEOUT8 |
| CELL[9].OUT_BEL[8] | BITSLICE[8].TX_T_OUT |
| CELL[9].OUT_BEL[9] | BITSLICE[6].RX_CNTVALUEOUT0 |
| CELL[9].OUT_BEL[10] | BITSLICE[6].RX_CNTVALUEOUT1 |
| CELL[9].OUT_BEL[11] | BITSLICE[6].RX_CNTVALUEOUT2 |
| CELL[9].OUT_BEL[12] | BITSLICE[6].RX_CNTVALUEOUT3 |
| CELL[9].OUT_BEL[13] | BITSLICE[6].RX_CNTVALUEOUT4 |
| CELL[9].OUT_BEL[14] | BITSLICE[6].RX_CNTVALUEOUT5 |
| CELL[9].OUT_BEL[15] | BITSLICE[6].RX_CNTVALUEOUT6 |
| CELL[9].OUT_BEL[16] | BITSLICE[6].RX_CNTVALUEOUT7 |
| CELL[9].OUT_BEL[17] | BITSLICE[6].RX_CNTVALUEOUT8 |
| CELL[9].OUT_BEL[18] | BITSLICE[7].PHY2CLB_FIFO_EMPTY |
| CELL[9].OUT_BEL[19] | BITSLICE[7].RX_Q0 |
| CELL[9].OUT_BEL[20] | BITSLICE[7].RX_Q1 |
| CELL[9].OUT_BEL[21] | BITSLICE[7].RX_Q2 |
| CELL[9].OUT_BEL[22] | BITSLICE[7].RX_Q3 |
| CELL[9].OUT_BEL[23] | BITSLICE[7].RX_Q4 |
| CELL[9].OUT_BEL[24] | BITSLICE[7].RX_Q5 |
| CELL[9].OUT_BEL[25] | BITSLICE[7].RX_Q6 |
| CELL[9].OUT_BEL[26] | BITSLICE[7].RX_Q7 |
| CELL[9].OUT_BEL[27] | BITSLICE[7].TX_CNTVALUEOUT0 |
| CELL[9].OUT_BEL[28] | BITSLICE[7].TX_CNTVALUEOUT1 |
| CELL[9].OUT_BEL[29] | BITSLICE[7].TX_CNTVALUEOUT2 |
| CELL[9].OUT_BEL[30] | BITSLICE[7].TX_CNTVALUEOUT3 |
| CELL[9].OUT_BEL[31] | BITSLICE[7].TX_CNTVALUEOUT4 |
| CELL[9].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B6 |
| CELL[9].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK6 |
| CELL[9].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B7 |
| CELL[9].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B7 |
| CELL[9].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B7 |
| CELL[9].IMUX_BYP[6] | BITSLICE[6].TX_EN_VTC |
| CELL[9].IMUX_BYP[7] | BITSLICE[6].TX_CE_ODELAY |
| CELL[9].IMUX_BYP[8] | BITSLICE[6].RX_LD |
| CELL[9].IMUX_BYP[9] | BITSLICE[6].RX_INC |
| CELL[9].IMUX_BYP[10] | BITSLICE[6].RX_EN_VTC |
| CELL[9].IMUX_BYP[11] | BITSLICE[6].RX_CE_IDELAY |
| CELL[9].IMUX_BYP[12] | BITSLICE[6].DYN_DCI_OUT_INT |
| CELL[9].IMUX_BYP[14] | BITSLICE[7].TX_LD |
| CELL[9].IMUX_BYP[15] | BITSLICE[7].TX_INC |
| CELL[9].IMUX_IMUX_DELAY[6] | BITSLICE[7].TX_CNTVALUEIN3 |
| CELL[9].IMUX_IMUX_DELAY[7] | BITSLICE[7].TX_CNTVALUEIN5 |
| CELL[9].IMUX_IMUX_DELAY[8] | BITSLICE[7].RX_CNTVALUEIN0 |
| CELL[9].IMUX_IMUX_DELAY[9] | BITSLICE[7].RX_CNTVALUEIN2 |
| CELL[9].IMUX_IMUX_DELAY[10] | BITSLICE[7].RX_CNTVALUEIN6 |
| CELL[9].IMUX_IMUX_DELAY[11] | BITSLICE[7].RX_CNTVALUEIN8 |
| CELL[9].IMUX_IMUX_DELAY[12] | BITSLICE[8].RX_DATAIN1 |
| CELL[9].IMUX_IMUX_DELAY[13] | BITSLICE[8].TX_D0 |
| CELL[9].IMUX_IMUX_DELAY[14] | BITSLICE[8].TX_D4 |
| CELL[9].IMUX_IMUX_DELAY[15] | BITSLICE[8].TX_D6 |
| CELL[9].IMUX_IMUX_DELAY[16] | BITSLICE[7].TX_CE_OFD |
| CELL[9].IMUX_IMUX_DELAY[17] | BITSLICE[7].RX_CE_IFD |
| CELL[9].IMUX_IMUX_DELAY[18] | BITSLICE[7].RX_DATAIN1 |
| CELL[9].IMUX_IMUX_DELAY[19] | BITSLICE[7].CLB2PHY_FIFO_RDEN |
| CELL[9].IMUX_IMUX_DELAY[20] | BITSLICE[7].TX_D0 |
| CELL[9].IMUX_IMUX_DELAY[21] | BITSLICE[7].TX_D1 |
| CELL[9].IMUX_IMUX_DELAY[22] | BITSLICE[7].TX_D2 |
| CELL[9].IMUX_IMUX_DELAY[23] | BITSLICE[7].TX_D3 |
| CELL[9].IMUX_IMUX_DELAY[24] | BITSLICE[7].TX_D4 |
| CELL[9].IMUX_IMUX_DELAY[25] | BITSLICE[7].TX_D5 |
| CELL[9].IMUX_IMUX_DELAY[26] | BITSLICE[7].TX_D6 |
| CELL[9].IMUX_IMUX_DELAY[27] | BITSLICE[7].TX_D7 |
| CELL[9].IMUX_IMUX_DELAY[28] | BITSLICE[7].TX_CNTVALUEIN0 |
| CELL[9].IMUX_IMUX_DELAY[29] | BITSLICE[7].TX_CNTVALUEIN1 |
| CELL[9].IMUX_IMUX_DELAY[30] | BITSLICE[7].TX_CNTVALUEIN2 |
| CELL[9].IMUX_IMUX_DELAY[31] | BITSLICE[7].TX_CNTVALUEIN4 |
| CELL[9].IMUX_IMUX_DELAY[32] | BITSLICE[7].TX_CNTVALUEIN6 |
| CELL[9].IMUX_IMUX_DELAY[33] | BITSLICE[7].TX_CNTVALUEIN7 |
| CELL[9].IMUX_IMUX_DELAY[34] | BITSLICE[7].TX_CNTVALUEIN8 |
| CELL[9].IMUX_IMUX_DELAY[35] | BITSLICE[7].RX_CNTVALUEIN1 |
| CELL[9].IMUX_IMUX_DELAY[36] | BITSLICE[7].RX_CNTVALUEIN3 |
| CELL[9].IMUX_IMUX_DELAY[37] | BITSLICE[7].RX_CNTVALUEIN4 |
| CELL[9].IMUX_IMUX_DELAY[38] | BITSLICE[7].RX_CNTVALUEIN5 |
| CELL[9].IMUX_IMUX_DELAY[39] | BITSLICE[7].RX_CNTVALUEIN7 |
| CELL[9].IMUX_IMUX_DELAY[40] | BITSLICE[8].TX_T |
| CELL[9].IMUX_IMUX_DELAY[41] | BITSLICE[8].TX_CE_OFD |
| CELL[9].IMUX_IMUX_DELAY[42] | BITSLICE[8].RX_CE_IFD |
| CELL[9].IMUX_IMUX_DELAY[43] | BITSLICE[8].CLB2PHY_FIFO_RDEN |
| CELL[9].IMUX_IMUX_DELAY[44] | BITSLICE[8].TX_D1 |
| CELL[9].IMUX_IMUX_DELAY[45] | BITSLICE[8].TX_D2 |
| CELL[9].IMUX_IMUX_DELAY[46] | BITSLICE[8].TX_D3 |
| CELL[9].IMUX_IMUX_DELAY[47] | BITSLICE[8].TX_D5 |
| CELL[10].OUT_BEL[4] | BITSLICE[7].TX_CNTVALUEOUT5 |
| CELL[10].OUT_BEL[5] | BITSLICE[7].TX_CNTVALUEOUT6 |
| CELL[10].OUT_BEL[6] | BITSLICE[7].TX_CNTVALUEOUT7 |
| CELL[10].OUT_BEL[7] | BITSLICE[7].TX_CNTVALUEOUT8 |
| CELL[10].OUT_BEL[8] | BITSLICE[9].TX_T_OUT |
| CELL[10].OUT_BEL[9] | BITSLICE[7].RX_CNTVALUEOUT0 |
| CELL[10].OUT_BEL[10] | BITSLICE[7].RX_CNTVALUEOUT1 |
| CELL[10].OUT_BEL[11] | BITSLICE[7].RX_CNTVALUEOUT2 |
| CELL[10].OUT_BEL[12] | BITSLICE[7].RX_CNTVALUEOUT3 |
| CELL[10].OUT_BEL[13] | BITSLICE[7].RX_CNTVALUEOUT4 |
| CELL[10].OUT_BEL[14] | BITSLICE[7].RX_CNTVALUEOUT5 |
| CELL[10].OUT_BEL[15] | BITSLICE[7].RX_CNTVALUEOUT6 |
| CELL[10].OUT_BEL[16] | BITSLICE[7].RX_CNTVALUEOUT7 |
| CELL[10].OUT_BEL[17] | BITSLICE[7].RX_CNTVALUEOUT8 |
| CELL[10].OUT_BEL[18] | BITSLICE[8].PHY2CLB_FIFO_EMPTY |
| CELL[10].OUT_BEL[19] | BITSLICE[8].RX_Q0 |
| CELL[10].OUT_BEL[20] | BITSLICE[8].RX_Q1 |
| CELL[10].OUT_BEL[21] | BITSLICE[8].RX_Q2 |
| CELL[10].OUT_BEL[22] | BITSLICE[8].RX_Q3 |
| CELL[10].OUT_BEL[23] | BITSLICE[8].RX_Q4 |
| CELL[10].OUT_BEL[24] | BITSLICE[8].RX_Q5 |
| CELL[10].OUT_BEL[25] | BITSLICE[8].RX_Q6 |
| CELL[10].OUT_BEL[26] | BITSLICE[8].RX_Q7 |
| CELL[10].OUT_BEL[27] | BITSLICE[8].TX_CNTVALUEOUT0 |
| CELL[10].OUT_BEL[28] | BITSLICE[8].TX_CNTVALUEOUT1 |
| CELL[10].OUT_BEL[29] | BITSLICE[8].TX_CNTVALUEOUT2 |
| CELL[10].OUT_BEL[30] | BITSLICE[8].TX_CNTVALUEOUT3 |
| CELL[10].OUT_BEL[31] | BITSLICE[8].TX_CNTVALUEOUT4 |
| CELL[10].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B7 |
| CELL[10].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK7 |
| CELL[10].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B8 |
| CELL[10].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B8 |
| CELL[10].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B8 |
| CELL[10].IMUX_BYP[6] | BITSLICE[7].TX_EN_VTC |
| CELL[10].IMUX_BYP[7] | BITSLICE[7].TX_CE_ODELAY |
| CELL[10].IMUX_BYP[8] | BITSLICE[7].RX_LD |
| CELL[10].IMUX_BYP[9] | BITSLICE[7].RX_INC |
| CELL[10].IMUX_BYP[10] | BITSLICE[7].RX_EN_VTC |
| CELL[10].IMUX_BYP[11] | BITSLICE[7].RX_CE_IDELAY |
| CELL[10].IMUX_BYP[12] | BITSLICE[7].DYN_DCI_OUT_INT |
| CELL[10].IMUX_BYP[13] | BITSLICE[8].TX_LD |
| CELL[10].IMUX_BYP[14] | BITSLICE[8].TX_INC |
| CELL[10].IMUX_BYP[15] | BITSLICE[8].TX_EN_VTC |
| CELL[10].IMUX_IMUX_DELAY[6] | BITSLICE[8].RX_CNTVALUEIN4 |
| CELL[10].IMUX_IMUX_DELAY[7] | BITSLICE[8].RX_CNTVALUEIN6 |
| CELL[10].IMUX_IMUX_DELAY[8] | BITSLICE_T[1].CNTVALUEIN1 |
| CELL[10].IMUX_IMUX_DELAY[9] | BITSLICE_T[1].CNTVALUEIN3 |
| CELL[10].IMUX_IMUX_DELAY[10] | BITSLICE_T[1].CNTVALUEIN7 |
| CELL[10].IMUX_IMUX_DELAY[11] | BITSLICE_CONTROL[1].CLB2RIU_NIBBLE_SEL |
| CELL[10].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[1].CLB2PHY_WRCS1_3 |
| CELL[10].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[1].CLB2PHY_WRCS0_1 |
| CELL[10].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[1].CLB2PHY_T_B1 |
| CELL[10].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[1].CLB2PHY_T_B3 |
| CELL[10].IMUX_IMUX_DELAY[16] | BITSLICE[8].TX_D7 |
| CELL[10].IMUX_IMUX_DELAY[18] | BITSLICE[8].TX_CNTVALUEIN0 |
| CELL[10].IMUX_IMUX_DELAY[19] | BITSLICE[8].TX_CNTVALUEIN1 |
| CELL[10].IMUX_IMUX_DELAY[20] | BITSLICE[8].TX_CNTVALUEIN2 |
| CELL[10].IMUX_IMUX_DELAY[21] | BITSLICE[8].TX_CNTVALUEIN3 |
| CELL[10].IMUX_IMUX_DELAY[22] | BITSLICE[8].TX_CNTVALUEIN4 |
| CELL[10].IMUX_IMUX_DELAY[23] | BITSLICE[8].TX_CNTVALUEIN5 |
| CELL[10].IMUX_IMUX_DELAY[24] | BITSLICE[8].TX_CNTVALUEIN6 |
| CELL[10].IMUX_IMUX_DELAY[25] | BITSLICE[8].TX_CNTVALUEIN7 |
| CELL[10].IMUX_IMUX_DELAY[26] | BITSLICE[8].TX_CNTVALUEIN8 |
| CELL[10].IMUX_IMUX_DELAY[27] | BITSLICE[8].RX_CNTVALUEIN0 |
| CELL[10].IMUX_IMUX_DELAY[28] | BITSLICE[8].RX_CNTVALUEIN1 |
| CELL[10].IMUX_IMUX_DELAY[29] | BITSLICE[8].RX_CNTVALUEIN2 |
| CELL[10].IMUX_IMUX_DELAY[30] | BITSLICE[8].RX_CNTVALUEIN3 |
| CELL[10].IMUX_IMUX_DELAY[31] | BITSLICE[8].RX_CNTVALUEIN5 |
| CELL[10].IMUX_IMUX_DELAY[32] | BITSLICE[8].RX_CNTVALUEIN7 |
| CELL[10].IMUX_IMUX_DELAY[33] | BITSLICE[8].RX_CNTVALUEIN8 |
| CELL[10].IMUX_IMUX_DELAY[34] | BITSLICE_T[1].CNTVALUEIN0 |
| CELL[10].IMUX_IMUX_DELAY[35] | BITSLICE_T[1].CNTVALUEIN2 |
| CELL[10].IMUX_IMUX_DELAY[36] | BITSLICE_T[1].CNTVALUEIN4 |
| CELL[10].IMUX_IMUX_DELAY[37] | BITSLICE_T[1].CNTVALUEIN5 |
| CELL[10].IMUX_IMUX_DELAY[38] | BITSLICE_T[1].CNTVALUEIN6 |
| CELL[10].IMUX_IMUX_DELAY[39] | BITSLICE_T[1].CNTVALUEIN8 |
| CELL[10].IMUX_IMUX_DELAY[40] | BITSLICE_CONTROL[1].CLB2PHY_WRCS1_0 |
| CELL[10].IMUX_IMUX_DELAY[41] | BITSLICE_CONTROL[1].CLB2PHY_WRCS1_1 |
| CELL[10].IMUX_IMUX_DELAY[42] | BITSLICE_CONTROL[1].CLB2PHY_WRCS1_2 |
| CELL[10].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[1].CLB2PHY_WRCS0_0 |
| CELL[10].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[1].CLB2PHY_WRCS0_2 |
| CELL[10].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[1].CLB2PHY_WRCS0_3 |
| CELL[10].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[1].CLB2PHY_T_B0 |
| CELL[10].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[1].CLB2PHY_T_B2 |
| CELL[11].OUT_BEL[4] | BITSLICE[8].TX_CNTVALUEOUT5 |
| CELL[11].OUT_BEL[5] | BITSLICE[8].TX_CNTVALUEOUT6 |
| CELL[11].OUT_BEL[6] | BITSLICE[8].TX_CNTVALUEOUT7 |
| CELL[11].OUT_BEL[7] | BITSLICE[8].TX_CNTVALUEOUT8 |
| CELL[11].OUT_BEL[8] | BITSLICE[10].TX_T_OUT |
| CELL[11].OUT_BEL[9] | BITSLICE[8].RX_CNTVALUEOUT0 |
| CELL[11].OUT_BEL[10] | BITSLICE[8].RX_CNTVALUEOUT1 |
| CELL[11].OUT_BEL[11] | BITSLICE[8].RX_CNTVALUEOUT2 |
| CELL[11].OUT_BEL[12] | BITSLICE[8].RX_CNTVALUEOUT3 |
| CELL[11].OUT_BEL[13] | BITSLICE[8].RX_CNTVALUEOUT4 |
| CELL[11].OUT_BEL[14] | BITSLICE[8].RX_CNTVALUEOUT5 |
| CELL[11].OUT_BEL[15] | BITSLICE[8].RX_CNTVALUEOUT6 |
| CELL[11].OUT_BEL[16] | BITSLICE[8].RX_CNTVALUEOUT7 |
| CELL[11].OUT_BEL[17] | BITSLICE[8].RX_CNTVALUEOUT8 |
| CELL[11].OUT_BEL[18] | BITSLICE_T[1].CNTVALUEOUT0 |
| CELL[11].OUT_BEL[19] | BITSLICE_T[1].CNTVALUEOUT1 |
| CELL[11].OUT_BEL[20] | BITSLICE_T[1].CNTVALUEOUT2 |
| CELL[11].OUT_BEL[21] | BITSLICE_T[1].CNTVALUEOUT3 |
| CELL[11].OUT_BEL[22] | BITSLICE_T[1].CNTVALUEOUT4 |
| CELL[11].OUT_BEL[23] | BITSLICE_T[1].CNTVALUEOUT5 |
| CELL[11].OUT_BEL[24] | BITSLICE_T[1].CNTVALUEOUT6 |
| CELL[11].OUT_BEL[25] | BITSLICE_T[1].CNTVALUEOUT7 |
| CELL[11].OUT_BEL[26] | BITSLICE_T[1].CNTVALUEOUT8 |
| CELL[11].OUT_BEL[27] | BITSLICE_CONTROL[1].PHY2CLB_PHY_RDY |
| CELL[11].OUT_BEL[28] | BITSLICE_CONTROL[1].MASTER_PD_OUT |
| CELL[11].OUT_BEL[29] | BITSLICE_CONTROL[1].PHY2CLB_FIXDLY_RDY |
| CELL[11].OUT_BEL[30] | BITSLICE_CONTROL[1].CTRL_DLY_TEST_OUT |
| CELL[11].OUT_BEL[31] | BITSLICE[11].TX_T_OUT |
| CELL[11].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B8 |
| CELL[11].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK8 |
| CELL[11].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].TRISTATE_ODELAY_RST_B1 |
| CELL[11].IMUX_CTRL[6] | BITSLICE_CONTROL[1].REFCLK |
| CELL[11].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].CTRL_RST_B_UPP |
| CELL[11].IMUX_BYP[6] | BITSLICE[8].TX_CE_ODELAY |
| CELL[11].IMUX_BYP[8] | BITSLICE[8].RX_LD |
| CELL[11].IMUX_BYP[9] | BITSLICE[8].RX_INC |
| CELL[11].IMUX_BYP[10] | BITSLICE[8].RX_EN_VTC |
| CELL[11].IMUX_BYP[11] | BITSLICE[8].RX_CE_IDELAY |
| CELL[11].IMUX_BYP[12] | BITSLICE[8].DYN_DCI_OUT_INT |
| CELL[11].IMUX_BYP[13] | BITSLICE_T[1].CE_OFD |
| CELL[11].IMUX_BYP[14] | BITSLICE_T[1].LD |
| CELL[11].IMUX_BYP[15] | BITSLICE_T[1].INC |
| CELL[11].IMUX_IMUX_DELAY[6] | BITSLICE[9].RX_DATAIN1 |
| CELL[11].IMUX_IMUX_DELAY[7] | BITSLICE[9].TX_D0 |
| CELL[11].IMUX_IMUX_DELAY[8] | BITSLICE[9].TX_D4 |
| CELL[11].IMUX_IMUX_DELAY[9] | BITSLICE[9].TX_D6 |
| CELL[11].IMUX_IMUX_DELAY[10] | BITSLICE[9].TX_CNTVALUEIN2 |
| CELL[11].IMUX_IMUX_DELAY[11] | BITSLICE[9].TX_CNTVALUEIN4 |
| CELL[11].IMUX_IMUX_DELAY[12] | BITSLICE[9].TX_CNTVALUEIN7 |
| CELL[11].IMUX_IMUX_DELAY[13] | BITSLICE[9].RX_CNTVALUEIN0 |
| CELL[11].IMUX_IMUX_DELAY[14] | BITSLICE[9].RX_CNTVALUEIN4 |
| CELL[11].IMUX_IMUX_DELAY[15] | BITSLICE[9].RX_CNTVALUEIN6 |
| CELL[11].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[1].CLB2PHY_RDEN0 |
| CELL[11].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[1].CLB2PHY_RDEN1 |
| CELL[11].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[1].CLB2PHY_RDEN2 |
| CELL[11].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[1].CLB2PHY_RDEN3 |
| CELL[11].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[1].CLB2PHY_RDCS1_0 |
| CELL[11].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[1].CLB2PHY_RDCS1_1 |
| CELL[11].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[1].CLB2PHY_RDCS1_2 |
| CELL[11].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[1].CLB2PHY_RDCS1_3 |
| CELL[11].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[1].CLB2PHY_RDCS0_0 |
| CELL[11].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[1].CLB2PHY_RDCS0_1 |
| CELL[11].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[1].CLB2PHY_RDCS0_2 |
| CELL[11].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[1].CLB2PHY_RDCS0_3 |
| CELL[11].IMUX_IMUX_DELAY[28] | BITSLICE[9].TX_T |
| CELL[11].IMUX_IMUX_DELAY[29] | BITSLICE[9].TX_CE_OFD |
| CELL[11].IMUX_IMUX_DELAY[30] | BITSLICE[9].RX_CE_IFD |
| CELL[11].IMUX_IMUX_DELAY[31] | BITSLICE[9].CLB2PHY_FIFO_RDEN |
| CELL[11].IMUX_IMUX_DELAY[32] | BITSLICE[9].TX_D1 |
| CELL[11].IMUX_IMUX_DELAY[33] | BITSLICE[9].TX_D2 |
| CELL[11].IMUX_IMUX_DELAY[34] | BITSLICE[9].TX_D3 |
| CELL[11].IMUX_IMUX_DELAY[35] | BITSLICE[9].TX_D5 |
| CELL[11].IMUX_IMUX_DELAY[36] | BITSLICE[9].TX_D7 |
| CELL[11].IMUX_IMUX_DELAY[37] | BITSLICE[9].TX_CNTVALUEIN0 |
| CELL[11].IMUX_IMUX_DELAY[38] | BITSLICE[9].TX_CNTVALUEIN1 |
| CELL[11].IMUX_IMUX_DELAY[39] | BITSLICE[9].TX_CNTVALUEIN3 |
| CELL[11].IMUX_IMUX_DELAY[40] | BITSLICE[9].TX_CNTVALUEIN5 |
| CELL[11].IMUX_IMUX_DELAY[41] | BITSLICE[9].TX_CNTVALUEIN6 |
| CELL[11].IMUX_IMUX_DELAY[43] | BITSLICE[9].TX_CNTVALUEIN8 |
| CELL[11].IMUX_IMUX_DELAY[44] | BITSLICE[9].RX_CNTVALUEIN1 |
| CELL[11].IMUX_IMUX_DELAY[45] | BITSLICE[9].RX_CNTVALUEIN2 |
| CELL[11].IMUX_IMUX_DELAY[46] | BITSLICE[9].RX_CNTVALUEIN3 |
| CELL[11].IMUX_IMUX_DELAY[47] | BITSLICE[9].RX_CNTVALUEIN5 |
| CELL[12].OUT_BEL[4] | BITSLICE[9].PHY2CLB_FIFO_EMPTY |
| CELL[12].OUT_BEL[5] | BITSLICE[9].RX_Q0 |
| CELL[12].OUT_BEL[6] | BITSLICE[9].RX_Q1 |
| CELL[12].OUT_BEL[7] | BITSLICE[9].RX_Q2 |
| CELL[12].OUT_BEL[8] | BITSLICE[9].RX_Q3 |
| CELL[12].OUT_BEL[9] | BITSLICE[9].RX_Q4 |
| CELL[12].OUT_BEL[10] | BITSLICE[9].RX_Q5 |
| CELL[12].OUT_BEL[11] | BITSLICE[9].RX_Q6 |
| CELL[12].OUT_BEL[12] | BITSLICE[9].RX_Q7 |
| CELL[12].OUT_BEL[13] | BITSLICE[9].TX_CNTVALUEOUT0 |
| CELL[12].OUT_BEL[14] | BITSLICE[9].TX_CNTVALUEOUT1 |
| CELL[12].OUT_BEL[15] | BITSLICE[9].TX_CNTVALUEOUT2 |
| CELL[12].OUT_BEL[16] | BITSLICE[9].TX_CNTVALUEOUT3 |
| CELL[12].OUT_BEL[17] | BITSLICE[9].TX_CNTVALUEOUT4 |
| CELL[12].OUT_BEL[18] | BITSLICE[9].TX_CNTVALUEOUT5 |
| CELL[12].OUT_BEL[19] | BITSLICE[9].TX_CNTVALUEOUT6 |
| CELL[12].OUT_BEL[20] | BITSLICE[9].TX_CNTVALUEOUT7 |
| CELL[12].OUT_BEL[21] | BITSLICE[9].TX_CNTVALUEOUT8 |
| CELL[12].OUT_BEL[22] | BITSLICE[12].TX_T_OUT |
| CELL[12].OUT_BEL[23] | BITSLICE[9].RX_CNTVALUEOUT0 |
| CELL[12].OUT_BEL[24] | BITSLICE[9].RX_CNTVALUEOUT1 |
| CELL[12].OUT_BEL[25] | BITSLICE[9].RX_CNTVALUEOUT2 |
| CELL[12].OUT_BEL[26] | BITSLICE[9].RX_CNTVALUEOUT3 |
| CELL[12].OUT_BEL[27] | BITSLICE[9].RX_CNTVALUEOUT4 |
| CELL[12].OUT_BEL[28] | BITSLICE[9].RX_CNTVALUEOUT5 |
| CELL[12].OUT_BEL[29] | BITSLICE[9].RX_CNTVALUEOUT6 |
| CELL[12].OUT_BEL[30] | BITSLICE[9].RX_CNTVALUEOUT7 |
| CELL[12].OUT_BEL[31] | BITSLICE[9].RX_CNTVALUEOUT8 |
| CELL[12].IMUX_CTRL[2] | BITSLICE_CONTROL[1].RIU_CLK, XIPHY_FEEDTHROUGH[0].CLB2PHY_CTRL_CLK_UPP |
| CELL[12].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B9 |
| CELL[12].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B9 |
| CELL[12].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B9 |
| CELL[12].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B9 |
| CELL[12].IMUX_BYP[6] | BITSLICE_T[1].CE_ODELAY |
| CELL[12].IMUX_BYP[7] | BITSLICE_CONTROL[1].EN_VTC |
| CELL[12].IMUX_BYP[8] | BITSLICE_CONTROL[1].CTRL_DLY_TEST_IN |
| CELL[12].IMUX_BYP[9] | BITSLICE[9].TX_LD |
| CELL[12].IMUX_BYP[10] | BITSLICE[9].TX_INC |
| CELL[12].IMUX_BYP[11] | BITSLICE[9].TX_EN_VTC |
| CELL[12].IMUX_BYP[12] | BITSLICE[9].TX_CE_ODELAY |
| CELL[12].IMUX_BYP[13] | BITSLICE[9].RX_LD |
| CELL[12].IMUX_BYP[14] | BITSLICE[9].RX_INC |
| CELL[12].IMUX_BYP[15] | BITSLICE[9].RX_EN_VTC |
| CELL[12].IMUX_IMUX_DELAY[6] | BITSLICE[10].TX_CNTVALUEIN0 |
| CELL[12].IMUX_IMUX_DELAY[7] | BITSLICE[10].TX_CNTVALUEIN2 |
| CELL[12].IMUX_IMUX_DELAY[8] | BITSLICE[10].TX_CNTVALUEIN6 |
| CELL[12].IMUX_IMUX_DELAY[9] | BITSLICE[10].TX_CNTVALUEIN8 |
| CELL[12].IMUX_IMUX_DELAY[10] | BITSLICE[10].RX_CNTVALUEIN3 |
| CELL[12].IMUX_IMUX_DELAY[11] | BITSLICE[10].RX_CNTVALUEIN5 |
| CELL[12].IMUX_IMUX_DELAY[12] | BITSLICE[11].TX_T |
| CELL[12].IMUX_IMUX_DELAY[13] | BITSLICE[11].RX_CE_IFD |
| CELL[12].IMUX_IMUX_DELAY[14] | BITSLICE[11].TX_D1 |
| CELL[12].IMUX_IMUX_DELAY[15] | BITSLICE[11].TX_D3 |
| CELL[12].IMUX_IMUX_DELAY[16] | BITSLICE[9].RX_CNTVALUEIN7 |
| CELL[12].IMUX_IMUX_DELAY[17] | BITSLICE[9].RX_CNTVALUEIN8 |
| CELL[12].IMUX_IMUX_DELAY[18] | BITSLICE[10].TX_T |
| CELL[12].IMUX_IMUX_DELAY[19] | BITSLICE[10].TX_CE_OFD |
| CELL[12].IMUX_IMUX_DELAY[20] | BITSLICE[10].RX_CE_IFD |
| CELL[12].IMUX_IMUX_DELAY[21] | BITSLICE[10].RX_DATAIN1 |
| CELL[12].IMUX_IMUX_DELAY[22] | BITSLICE[10].CLB2PHY_FIFO_RDEN |
| CELL[12].IMUX_IMUX_DELAY[23] | BITSLICE[10].TX_D5 |
| CELL[12].IMUX_IMUX_DELAY[24] | BITSLICE[10].TX_D4 |
| CELL[12].IMUX_IMUX_DELAY[25] | BITSLICE[10].TX_D3 |
| CELL[12].IMUX_IMUX_DELAY[26] | BITSLICE[10].TX_D2 |
| CELL[12].IMUX_IMUX_DELAY[27] | BITSLICE[10].TX_D1 |
| CELL[12].IMUX_IMUX_DELAY[28] | BITSLICE[10].TX_D0 |
| CELL[12].IMUX_IMUX_DELAY[29] | BITSLICE[10].TX_D6 |
| CELL[12].IMUX_IMUX_DELAY[30] | BITSLICE[10].TX_D7 |
| CELL[12].IMUX_IMUX_DELAY[31] | BITSLICE[10].TX_CNTVALUEIN1 |
| CELL[12].IMUX_IMUX_DELAY[32] | BITSLICE[10].TX_CNTVALUEIN3 |
| CELL[12].IMUX_IMUX_DELAY[33] | BITSLICE[10].TX_CNTVALUEIN4 |
| CELL[12].IMUX_IMUX_DELAY[34] | BITSLICE[10].TX_CNTVALUEIN5 |
| CELL[12].IMUX_IMUX_DELAY[35] | BITSLICE[10].TX_CNTVALUEIN7 |
| CELL[12].IMUX_IMUX_DELAY[36] | BITSLICE[10].RX_CNTVALUEIN0 |
| CELL[12].IMUX_IMUX_DELAY[37] | BITSLICE[10].RX_CNTVALUEIN1 |
| CELL[12].IMUX_IMUX_DELAY[38] | BITSLICE[10].RX_CNTVALUEIN2 |
| CELL[12].IMUX_IMUX_DELAY[39] | BITSLICE[10].RX_CNTVALUEIN4 |
| CELL[12].IMUX_IMUX_DELAY[40] | BITSLICE[10].RX_CNTVALUEIN6 |
| CELL[12].IMUX_IMUX_DELAY[41] | BITSLICE[10].RX_CNTVALUEIN7 |
| CELL[12].IMUX_IMUX_DELAY[42] | BITSLICE[10].RX_CNTVALUEIN8 |
| CELL[12].IMUX_IMUX_DELAY[43] | BITSLICE[11].TX_CE_OFD |
| CELL[12].IMUX_IMUX_DELAY[44] | BITSLICE[11].RX_DATAIN1 |
| CELL[12].IMUX_IMUX_DELAY[45] | BITSLICE[11].CLB2PHY_FIFO_RDEN |
| CELL[12].IMUX_IMUX_DELAY[46] | BITSLICE[11].TX_D0 |
| CELL[12].IMUX_IMUX_DELAY[47] | BITSLICE[11].TX_D2 |
| CELL[13].OUT_BEL[4] | BITSLICE[10].PHY2CLB_FIFO_EMPTY |
| CELL[13].OUT_BEL[5] | BITSLICE[10].RX_Q0 |
| CELL[13].OUT_BEL[6] | BITSLICE[10].RX_Q1 |
| CELL[13].OUT_BEL[7] | BITSLICE[10].RX_Q2 |
| CELL[13].OUT_BEL[8] | BITSLICE[10].RX_Q3 |
| CELL[13].OUT_BEL[9] | BITSLICE[10].RX_Q4 |
| CELL[13].OUT_BEL[10] | BITSLICE[10].RX_Q5 |
| CELL[13].OUT_BEL[11] | BITSLICE[10].RX_Q6 |
| CELL[13].OUT_BEL[12] | BITSLICE[10].RX_Q7 |
| CELL[13].OUT_BEL[13] | BITSLICE[10].TX_CNTVALUEOUT0 |
| CELL[13].OUT_BEL[14] | BITSLICE[10].TX_CNTVALUEOUT1 |
| CELL[13].OUT_BEL[15] | BITSLICE[10].TX_CNTVALUEOUT2 |
| CELL[13].OUT_BEL[16] | BITSLICE[10].TX_CNTVALUEOUT3 |
| CELL[13].OUT_BEL[17] | BITSLICE[10].TX_CNTVALUEOUT4 |
| CELL[13].OUT_BEL[18] | BITSLICE[10].TX_CNTVALUEOUT5 |
| CELL[13].OUT_BEL[19] | BITSLICE[10].TX_CNTVALUEOUT6 |
| CELL[13].OUT_BEL[20] | BITSLICE[10].TX_CNTVALUEOUT7 |
| CELL[13].OUT_BEL[21] | BITSLICE[10].TX_CNTVALUEOUT8 |
| CELL[13].OUT_BEL[23] | BITSLICE[10].RX_CNTVALUEOUT0 |
| CELL[13].OUT_BEL[24] | BITSLICE[10].RX_CNTVALUEOUT1 |
| CELL[13].OUT_BEL[25] | BITSLICE[10].RX_CNTVALUEOUT2 |
| CELL[13].OUT_BEL[26] | BITSLICE[10].RX_CNTVALUEOUT3 |
| CELL[13].OUT_BEL[27] | BITSLICE[10].RX_CNTVALUEOUT4 |
| CELL[13].OUT_BEL[28] | BITSLICE[10].RX_CNTVALUEOUT5 |
| CELL[13].OUT_BEL[29] | BITSLICE[10].RX_CNTVALUEOUT6 |
| CELL[13].OUT_BEL[30] | BITSLICE[10].RX_CNTVALUEOUT7 |
| CELL[13].OUT_BEL[31] | BITSLICE[10].RX_CNTVALUEOUT8 |
| CELL[13].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK9 |
| CELL[13].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B10 |
| CELL[13].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B10 |
| CELL[13].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B10 |
| CELL[13].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B10 |
| CELL[13].IMUX_BYP[6] | BITSLICE[9].RX_CE_IDELAY |
| CELL[13].IMUX_BYP[7] | BITSLICE[9].DYN_DCI_OUT_INT |
| CELL[13].IMUX_BYP[8] | BITSLICE[10].TX_LD |
| CELL[13].IMUX_BYP[9] | BITSLICE[10].TX_INC |
| CELL[13].IMUX_BYP[10] | BITSLICE[10].TX_EN_VTC |
| CELL[13].IMUX_BYP[11] | BITSLICE[10].TX_CE_ODELAY |
| CELL[13].IMUX_BYP[12] | BITSLICE[10].RX_LD |
| CELL[13].IMUX_BYP[13] | BITSLICE[10].RX_INC |
| CELL[13].IMUX_BYP[14] | BITSLICE[10].RX_EN_VTC |
| CELL[13].IMUX_BYP[15] | BITSLICE[10].RX_CE_IDELAY |
| CELL[13].IMUX_IMUX_DELAY[6] | BITSLICE[11].TX_D5 |
| CELL[13].IMUX_IMUX_DELAY[7] | BITSLICE[11].TX_D6 |
| CELL[13].IMUX_IMUX_DELAY[8] | BITSLICE[11].TX_D7 |
| CELL[13].IMUX_IMUX_DELAY[9] | BITSLICE[11].TX_CNTVALUEIN0 |
| CELL[13].IMUX_IMUX_DELAY[10] | BITSLICE[11].TX_CNTVALUEIN1 |
| CELL[13].IMUX_IMUX_DELAY[11] | BITSLICE[11].TX_CNTVALUEIN2 |
| CELL[13].IMUX_IMUX_DELAY[12] | BITSLICE[11].TX_CNTVALUEIN3 |
| CELL[13].IMUX_IMUX_DELAY[13] | BITSLICE[11].TX_CNTVALUEIN4 |
| CELL[13].IMUX_IMUX_DELAY[14] | BITSLICE[11].TX_CNTVALUEIN5 |
| CELL[13].IMUX_IMUX_DELAY[15] | BITSLICE[11].TX_CNTVALUEIN6 |
| CELL[13].IMUX_IMUX_DELAY[16] | BITSLICE[11].TX_D4 |
| CELL[14].OUT_BEL[4] | BITSLICE[11].PHY2CLB_FIFO_EMPTY |
| CELL[14].OUT_BEL[5] | BITSLICE[11].RX_Q0 |
| CELL[14].OUT_BEL[6] | BITSLICE[11].RX_Q1 |
| CELL[14].OUT_BEL[7] | BITSLICE[11].RX_Q2 |
| CELL[14].OUT_BEL[8] | BITSLICE[11].RX_Q3 |
| CELL[14].OUT_BEL[9] | BITSLICE[11].RX_Q4 |
| CELL[14].OUT_BEL[10] | BITSLICE[11].RX_Q5 |
| CELL[14].OUT_BEL[11] | BITSLICE[11].RX_Q6 |
| CELL[14].OUT_BEL[12] | BITSLICE[11].RX_Q7 |
| CELL[14].OUT_BEL[13] | BITSLICE[11].TX_CNTVALUEOUT0 |
| CELL[14].OUT_BEL[14] | BITSLICE[11].TX_CNTVALUEOUT1 |
| CELL[14].OUT_BEL[15] | BITSLICE[11].TX_CNTVALUEOUT2 |
| CELL[14].OUT_BEL[16] | BITSLICE[11].TX_CNTVALUEOUT3 |
| CELL[14].OUT_BEL[17] | BITSLICE[11].TX_CNTVALUEOUT4 |
| CELL[14].OUT_BEL[18] | BITSLICE[11].TX_CNTVALUEOUT5 |
| CELL[14].OUT_BEL[19] | BITSLICE[11].TX_CNTVALUEOUT6 |
| CELL[14].OUT_BEL[20] | BITSLICE[11].TX_CNTVALUEOUT7 |
| CELL[14].OUT_BEL[21] | BITSLICE[11].TX_CNTVALUEOUT8 |
| CELL[14].OUT_BEL[23] | BITSLICE[11].RX_CNTVALUEOUT0 |
| CELL[14].OUT_BEL[24] | BITSLICE[11].RX_CNTVALUEOUT1 |
| CELL[14].OUT_BEL[25] | BITSLICE[11].RX_CNTVALUEOUT2 |
| CELL[14].OUT_BEL[26] | BITSLICE[11].RX_CNTVALUEOUT3 |
| CELL[14].OUT_BEL[27] | BITSLICE[11].RX_CNTVALUEOUT4 |
| CELL[14].OUT_BEL[28] | BITSLICE[11].RX_CNTVALUEOUT5 |
| CELL[14].OUT_BEL[29] | BITSLICE[11].RX_CNTVALUEOUT6 |
| CELL[14].OUT_BEL[30] | BITSLICE[11].RX_CNTVALUEOUT7 |
| CELL[14].OUT_BEL[31] | BITSLICE[11].RX_CNTVALUEOUT8 |
| CELL[14].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK10 |
| CELL[14].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[0].TXBIT_RST_B11 |
| CELL[14].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[0].RXBIT_RST_B11 |
| CELL[14].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[0].ODELAY_RST_B11 |
| CELL[14].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[0].IDELAY_RST_B11 |
| CELL[14].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[0].CLB2PHY_FIFO_CLK11 |
| CELL[14].IMUX_BYP[6] | BITSLICE[10].DYN_DCI_OUT_INT |
| CELL[14].IMUX_BYP[7] | BITSLICE[11].TX_LD |
| CELL[14].IMUX_BYP[8] | BITSLICE[11].TX_INC |
| CELL[14].IMUX_BYP[9] | BITSLICE[11].TX_EN_VTC |
| CELL[14].IMUX_BYP[10] | BITSLICE[11].TX_CE_ODELAY |
| CELL[14].IMUX_BYP[11] | BITSLICE[11].RX_LD |
| CELL[14].IMUX_BYP[12] | BITSLICE[11].RX_INC |
| CELL[14].IMUX_BYP[13] | BITSLICE[11].RX_EN_VTC |
| CELL[14].IMUX_BYP[14] | BITSLICE[11].RX_CE_IDELAY |
| CELL[14].IMUX_BYP[15] | BITSLICE[11].DYN_DCI_OUT_INT |
| CELL[14].IMUX_IMUX_DELAY[6] | BITSLICE[11].TX_CNTVALUEIN8 |
| CELL[14].IMUX_IMUX_DELAY[7] | BITSLICE[11].RX_CNTVALUEIN0 |
| CELL[14].IMUX_IMUX_DELAY[8] | BITSLICE[11].RX_CNTVALUEIN1 |
| CELL[14].IMUX_IMUX_DELAY[9] | BITSLICE[11].RX_CNTVALUEIN2 |
| CELL[14].IMUX_IMUX_DELAY[10] | BITSLICE[11].RX_CNTVALUEIN3 |
| CELL[14].IMUX_IMUX_DELAY[11] | BITSLICE[11].RX_CNTVALUEIN4 |
| CELL[14].IMUX_IMUX_DELAY[12] | BITSLICE[11].RX_CNTVALUEIN5 |
| CELL[14].IMUX_IMUX_DELAY[13] | BITSLICE[11].RX_CNTVALUEIN6 |
| CELL[14].IMUX_IMUX_DELAY[14] | BITSLICE[11].RX_CNTVALUEIN7 |
| CELL[14].IMUX_IMUX_DELAY[15] | BITSLICE[11].RX_CNTVALUEIN8 |
| CELL[14].IMUX_IMUX_DELAY[16] | BITSLICE[11].TX_CNTVALUEIN7 |
| CELL[15].OUT_BEL[4] | BITSLICE[13].PHY2CLB_FIFO_EMPTY |
| CELL[15].OUT_BEL[5] | BITSLICE[13].RX_Q0 |
| CELL[15].OUT_BEL[6] | BITSLICE[13].RX_Q1 |
| CELL[15].OUT_BEL[7] | BITSLICE[13].RX_Q2 |
| CELL[15].OUT_BEL[8] | BITSLICE[13].RX_Q3 |
| CELL[15].OUT_BEL[9] | BITSLICE[13].RX_Q4 |
| CELL[15].OUT_BEL[10] | BITSLICE[13].RX_Q5 |
| CELL[15].OUT_BEL[11] | BITSLICE[13].RX_Q6 |
| CELL[15].OUT_BEL[12] | BITSLICE[13].RX_Q7 |
| CELL[15].OUT_BEL[13] | BITSLICE[13].TX_CNTVALUEOUT0 |
| CELL[15].OUT_BEL[14] | BITSLICE[13].TX_CNTVALUEOUT1 |
| CELL[15].OUT_BEL[15] | BITSLICE[13].TX_CNTVALUEOUT2 |
| CELL[15].OUT_BEL[16] | BITSLICE[13].TX_CNTVALUEOUT3 |
| CELL[15].OUT_BEL[17] | BITSLICE[13].TX_CNTVALUEOUT4 |
| CELL[15].OUT_BEL[18] | BITSLICE[13].TX_CNTVALUEOUT5 |
| CELL[15].OUT_BEL[19] | BITSLICE[13].TX_CNTVALUEOUT6 |
| CELL[15].OUT_BEL[20] | BITSLICE[13].TX_CNTVALUEOUT7 |
| CELL[15].OUT_BEL[21] | BITSLICE[13].TX_CNTVALUEOUT8 |
| CELL[15].OUT_BEL[22] | BITSLICE[13].TX_T_OUT |
| CELL[15].OUT_BEL[23] | BITSLICE[13].RX_CNTVALUEOUT0 |
| CELL[15].OUT_BEL[24] | BITSLICE[13].RX_CNTVALUEOUT1 |
| CELL[15].OUT_BEL[25] | BITSLICE[13].RX_CNTVALUEOUT2 |
| CELL[15].OUT_BEL[26] | BITSLICE[13].RX_CNTVALUEOUT3 |
| CELL[15].OUT_BEL[27] | BITSLICE[13].RX_CNTVALUEOUT4 |
| CELL[15].OUT_BEL[28] | BITSLICE[13].RX_CNTVALUEOUT5 |
| CELL[15].OUT_BEL[29] | BITSLICE[13].RX_CNTVALUEOUT6 |
| CELL[15].OUT_BEL[30] | BITSLICE[13].RX_CNTVALUEOUT7 |
| CELL[15].OUT_BEL[31] | BITSLICE[13].RX_CNTVALUEOUT8 |
| CELL[15].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].TXBIT_TRI_RST_B0 |
| CELL[15].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B0 |
| CELL[15].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B0 |
| CELL[15].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B0 |
| CELL[15].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B0 |
| CELL[15].IMUX_BYP[6] | BITSLICE_T[2].EN_VTC |
| CELL[15].IMUX_BYP[7] | BITSLICE[13].TX_LD |
| CELL[15].IMUX_BYP[8] | BITSLICE[13].TX_INC |
| CELL[15].IMUX_BYP[9] | BITSLICE[13].TX_EN_VTC |
| CELL[15].IMUX_BYP[10] | BITSLICE[13].TX_CE_ODELAY |
| CELL[15].IMUX_BYP[11] | BITSLICE[13].RX_LD |
| CELL[15].IMUX_BYP[12] | BITSLICE[13].RX_INC |
| CELL[15].IMUX_BYP[13] | BITSLICE[13].RX_EN_VTC |
| CELL[15].IMUX_BYP[14] | BITSLICE[13].RX_CE_IDELAY |
| CELL[15].IMUX_BYP[15] | BITSLICE[13].DYN_DCI_OUT_INT |
| CELL[15].IMUX_IMUX_DELAY[6] | BITSLICE[13].TX_CE_OFD |
| CELL[15].IMUX_IMUX_DELAY[7] | BITSLICE[13].RX_CE_IFD |
| CELL[15].IMUX_IMUX_DELAY[8] | BITSLICE[13].RX_DATAIN1 |
| CELL[15].IMUX_IMUX_DELAY[9] | BITSLICE[13].CLB2PHY_FIFO_RDEN |
| CELL[15].IMUX_IMUX_DELAY[10] | BITSLICE[13].TX_D7 |
| CELL[15].IMUX_IMUX_DELAY[11] | BITSLICE[13].TX_D6 |
| CELL[15].IMUX_IMUX_DELAY[12] | BITSLICE[13].TX_D5 |
| CELL[15].IMUX_IMUX_DELAY[13] | BITSLICE[13].TX_D4 |
| CELL[15].IMUX_IMUX_DELAY[14] | BITSLICE[13].TX_D3 |
| CELL[15].IMUX_IMUX_DELAY[15] | BITSLICE[13].TX_D2 |
| CELL[15].IMUX_IMUX_DELAY[16] | BITSLICE[13].TX_T |
| CELL[16].OUT_BEL[4] | BITSLICE[14].PHY2CLB_FIFO_EMPTY |
| CELL[16].OUT_BEL[5] | BITSLICE[14].RX_Q0 |
| CELL[16].OUT_BEL[6] | BITSLICE[14].RX_Q1 |
| CELL[16].OUT_BEL[7] | BITSLICE[14].RX_Q2 |
| CELL[16].OUT_BEL[8] | BITSLICE[14].RX_Q3 |
| CELL[16].OUT_BEL[9] | BITSLICE[14].RX_Q4 |
| CELL[16].OUT_BEL[10] | BITSLICE[14].RX_Q5 |
| CELL[16].OUT_BEL[11] | BITSLICE[14].RX_Q6 |
| CELL[16].OUT_BEL[12] | BITSLICE[14].RX_Q7 |
| CELL[16].OUT_BEL[13] | BITSLICE[14].TX_CNTVALUEOUT0 |
| CELL[16].OUT_BEL[14] | BITSLICE[14].TX_CNTVALUEOUT1 |
| CELL[16].OUT_BEL[15] | BITSLICE[14].TX_CNTVALUEOUT2 |
| CELL[16].OUT_BEL[16] | BITSLICE[14].TX_CNTVALUEOUT3 |
| CELL[16].OUT_BEL[17] | BITSLICE[14].TX_CNTVALUEOUT4 |
| CELL[16].OUT_BEL[18] | BITSLICE[14].TX_CNTVALUEOUT5 |
| CELL[16].OUT_BEL[19] | BITSLICE[14].TX_CNTVALUEOUT6 |
| CELL[16].OUT_BEL[20] | BITSLICE[14].TX_CNTVALUEOUT7 |
| CELL[16].OUT_BEL[21] | BITSLICE[14].TX_CNTVALUEOUT8 |
| CELL[16].OUT_BEL[22] | BITSLICE[14].TX_T_OUT |
| CELL[16].OUT_BEL[23] | BITSLICE[14].RX_CNTVALUEOUT0 |
| CELL[16].OUT_BEL[24] | BITSLICE[14].RX_CNTVALUEOUT1 |
| CELL[16].OUT_BEL[25] | BITSLICE[14].RX_CNTVALUEOUT2 |
| CELL[16].OUT_BEL[26] | BITSLICE[14].RX_CNTVALUEOUT3 |
| CELL[16].OUT_BEL[27] | BITSLICE[14].RX_CNTVALUEOUT4 |
| CELL[16].OUT_BEL[28] | BITSLICE[14].RX_CNTVALUEOUT5 |
| CELL[16].OUT_BEL[29] | BITSLICE[14].RX_CNTVALUEOUT6 |
| CELL[16].OUT_BEL[30] | BITSLICE[14].RX_CNTVALUEOUT7 |
| CELL[16].OUT_BEL[31] | BITSLICE[14].RX_CNTVALUEOUT8 |
| CELL[16].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK0 |
| CELL[16].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].TXBIT_TRI_RST_B1 |
| CELL[16].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B1 |
| CELL[16].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B1 |
| CELL[16].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B1 |
| CELL[16].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B1 |
| CELL[16].IMUX_BYP[6] | BITSLICE_T[3].EN_VTC |
| CELL[16].IMUX_BYP[7] | BITSLICE[14].TX_LD |
| CELL[16].IMUX_BYP[8] | BITSLICE[14].TX_INC |
| CELL[16].IMUX_BYP[9] | BITSLICE[14].TX_EN_VTC |
| CELL[16].IMUX_BYP[10] | BITSLICE[14].TX_CE_ODELAY |
| CELL[16].IMUX_BYP[11] | BITSLICE[14].RX_LD |
| CELL[16].IMUX_BYP[12] | BITSLICE[14].RX_INC |
| CELL[16].IMUX_BYP[13] | BITSLICE[14].RX_EN_VTC |
| CELL[16].IMUX_BYP[14] | BITSLICE[14].RX_CE_IDELAY |
| CELL[16].IMUX_BYP[15] | BITSLICE[14].DYN_DCI_OUT_INT |
| CELL[16].IMUX_IMUX_DELAY[6] | BITSLICE[13].TX_D1 |
| CELL[16].IMUX_IMUX_DELAY[7] | BITSLICE[13].TX_CNTVALUEIN0 |
| CELL[16].IMUX_IMUX_DELAY[8] | BITSLICE[13].TX_CNTVALUEIN1 |
| CELL[16].IMUX_IMUX_DELAY[9] | BITSLICE[13].TX_CNTVALUEIN2 |
| CELL[16].IMUX_IMUX_DELAY[10] | BITSLICE[13].TX_CNTVALUEIN3 |
| CELL[16].IMUX_IMUX_DELAY[11] | BITSLICE[13].TX_CNTVALUEIN4 |
| CELL[16].IMUX_IMUX_DELAY[12] | BITSLICE[13].TX_CNTVALUEIN5 |
| CELL[16].IMUX_IMUX_DELAY[13] | BITSLICE[13].TX_CNTVALUEIN6 |
| CELL[16].IMUX_IMUX_DELAY[14] | BITSLICE[13].TX_CNTVALUEIN7 |
| CELL[16].IMUX_IMUX_DELAY[15] | BITSLICE[13].TX_CNTVALUEIN8 |
| CELL[16].IMUX_IMUX_DELAY[16] | BITSLICE[13].TX_D0 |
| CELL[17].OUT_BEL[4] | BITSLICE[15].PHY2CLB_FIFO_EMPTY |
| CELL[17].OUT_BEL[5] | BITSLICE[15].RX_Q0 |
| CELL[17].OUT_BEL[6] | BITSLICE[15].RX_Q1 |
| CELL[17].OUT_BEL[7] | BITSLICE[15].RX_Q2 |
| CELL[17].OUT_BEL[8] | BITSLICE[15].RX_Q3 |
| CELL[17].OUT_BEL[9] | BITSLICE[15].RX_Q4 |
| CELL[17].OUT_BEL[10] | BITSLICE[15].RX_Q5 |
| CELL[17].OUT_BEL[11] | BITSLICE[15].RX_Q6 |
| CELL[17].OUT_BEL[12] | BITSLICE[15].RX_Q7 |
| CELL[17].OUT_BEL[13] | BITSLICE[15].TX_CNTVALUEOUT0 |
| CELL[17].OUT_BEL[14] | BITSLICE[15].TX_CNTVALUEOUT1 |
| CELL[17].OUT_BEL[15] | BITSLICE[15].TX_CNTVALUEOUT2 |
| CELL[17].OUT_BEL[16] | BITSLICE[15].TX_CNTVALUEOUT3 |
| CELL[17].OUT_BEL[17] | BITSLICE[15].TX_CNTVALUEOUT4 |
| CELL[17].OUT_BEL[18] | BITSLICE[15].TX_CNTVALUEOUT5 |
| CELL[17].OUT_BEL[19] | BITSLICE[15].TX_CNTVALUEOUT6 |
| CELL[17].OUT_BEL[20] | BITSLICE[15].TX_CNTVALUEOUT7 |
| CELL[17].OUT_BEL[21] | BITSLICE[15].TX_CNTVALUEOUT8 |
| CELL[17].OUT_BEL[22] | BITSLICE[15].TX_T_OUT |
| CELL[17].OUT_BEL[23] | BITSLICE[15].RX_CNTVALUEOUT0 |
| CELL[17].OUT_BEL[24] | BITSLICE[15].RX_CNTVALUEOUT1 |
| CELL[17].OUT_BEL[25] | BITSLICE[15].RX_CNTVALUEOUT2 |
| CELL[17].OUT_BEL[26] | BITSLICE[15].RX_CNTVALUEOUT3 |
| CELL[17].OUT_BEL[27] | BITSLICE[15].RX_CNTVALUEOUT4 |
| CELL[17].OUT_BEL[28] | BITSLICE[15].RX_CNTVALUEOUT5 |
| CELL[17].OUT_BEL[29] | BITSLICE[15].RX_CNTVALUEOUT6 |
| CELL[17].OUT_BEL[30] | BITSLICE[15].RX_CNTVALUEOUT7 |
| CELL[17].OUT_BEL[31] | BITSLICE[15].RX_CNTVALUEOUT8 |
| CELL[17].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK1 |
| CELL[17].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B2 |
| CELL[17].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B2 |
| CELL[17].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B2 |
| CELL[17].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B2 |
| CELL[17].IMUX_BYP[6] | BITSLICE[15].TX_LD |
| CELL[17].IMUX_BYP[7] | BITSLICE[15].TX_INC |
| CELL[17].IMUX_BYP[8] | BITSLICE[15].TX_EN_VTC |
| CELL[17].IMUX_BYP[9] | BITSLICE[15].TX_CE_ODELAY |
| CELL[17].IMUX_BYP[10] | BITSLICE[15].RX_LD |
| CELL[17].IMUX_BYP[11] | BITSLICE[15].RX_INC |
| CELL[17].IMUX_BYP[12] | BITSLICE[15].RX_EN_VTC |
| CELL[17].IMUX_BYP[13] | BITSLICE[15].RX_CE_IDELAY |
| CELL[17].IMUX_BYP[14] | BITSLICE[15].DYN_DCI_OUT_INT |
| CELL[17].IMUX_BYP[15] | BITSLICE_T[2].CE_OFD |
| CELL[17].IMUX_IMUX_DELAY[6] | BITSLICE[14].TX_D1 |
| CELL[17].IMUX_IMUX_DELAY[7] | BITSLICE[14].TX_D3 |
| CELL[17].IMUX_IMUX_DELAY[8] | BITSLICE[14].TX_D7 |
| CELL[17].IMUX_IMUX_DELAY[9] | BITSLICE[14].TX_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[10] | BITSLICE[14].TX_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[11] | BITSLICE[14].TX_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[12] | BITSLICE[14].RX_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[13] | BITSLICE[14].RX_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[14] | BITSLICE[14].RX_CNTVALUEIN8 |
| CELL[17].IMUX_IMUX_DELAY[15] | BITSLICE[15].TX_CE_OFD |
| CELL[17].IMUX_IMUX_DELAY[16] | BITSLICE[13].RX_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[17] | BITSLICE[13].RX_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[18] | BITSLICE[13].RX_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[19] | BITSLICE[13].RX_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[20] | BITSLICE[13].RX_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[21] | BITSLICE[13].RX_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[22] | BITSLICE[13].RX_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[23] | BITSLICE[13].RX_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[24] | BITSLICE[13].RX_CNTVALUEIN8 |
| CELL[17].IMUX_IMUX_DELAY[25] | BITSLICE[14].TX_T |
| CELL[17].IMUX_IMUX_DELAY[26] | BITSLICE[14].TX_CE_OFD |
| CELL[17].IMUX_IMUX_DELAY[27] | BITSLICE[14].RX_CE_IFD |
| CELL[17].IMUX_IMUX_DELAY[28] | BITSLICE[14].RX_DATAIN1 |
| CELL[17].IMUX_IMUX_DELAY[29] | BITSLICE[14].CLB2PHY_FIFO_RDEN |
| CELL[17].IMUX_IMUX_DELAY[30] | BITSLICE[14].TX_D0 |
| CELL[17].IMUX_IMUX_DELAY[31] | BITSLICE[14].TX_D2 |
| CELL[17].IMUX_IMUX_DELAY[32] | BITSLICE[14].TX_D4 |
| CELL[17].IMUX_IMUX_DELAY[33] | BITSLICE[14].TX_D5 |
| CELL[17].IMUX_IMUX_DELAY[34] | BITSLICE[14].TX_D6 |
| CELL[17].IMUX_IMUX_DELAY[35] | BITSLICE[14].TX_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[36] | BITSLICE[14].TX_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[37] | BITSLICE[14].TX_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[38] | BITSLICE[14].TX_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[39] | BITSLICE[14].TX_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[40] | BITSLICE[14].TX_CNTVALUEIN8 |
| CELL[17].IMUX_IMUX_DELAY[41] | BITSLICE[14].RX_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[42] | BITSLICE[14].RX_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[43] | BITSLICE[14].RX_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[44] | BITSLICE[14].RX_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[45] | BITSLICE[14].RX_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[46] | BITSLICE[14].RX_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[47] | BITSLICE[15].TX_T |
| CELL[18].OUT_BEL[4] | BITSLICE_T[2].CNTVALUEOUT0 |
| CELL[18].OUT_BEL[5] | BITSLICE_T[2].CNTVALUEOUT1 |
| CELL[18].OUT_BEL[6] | BITSLICE_T[2].CNTVALUEOUT2 |
| CELL[18].OUT_BEL[7] | BITSLICE_T[2].CNTVALUEOUT3 |
| CELL[18].OUT_BEL[8] | BITSLICE_T[2].CNTVALUEOUT4 |
| CELL[18].OUT_BEL[9] | BITSLICE_T[2].CNTVALUEOUT5 |
| CELL[18].OUT_BEL[10] | BITSLICE_T[2].CNTVALUEOUT6 |
| CELL[18].OUT_BEL[11] | BITSLICE_T[2].CNTVALUEOUT7 |
| CELL[18].OUT_BEL[12] | BITSLICE_T[2].CNTVALUEOUT8 |
| CELL[18].OUT_BEL[13] | BITSLICE[16].TX_T_OUT |
| CELL[18].OUT_BEL[14] | BITSLICE_CONTROL[2].PHY2CLB_PHY_RDY |
| CELL[18].OUT_BEL[15] | BITSLICE_CONTROL[2].MASTER_PD_OUT |
| CELL[18].OUT_BEL[16] | BITSLICE_CONTROL[2].PHY2CLB_FIXDLY_RDY |
| CELL[18].OUT_BEL[17] | BITSLICE_CONTROL[2].CTRL_DLY_TEST_OUT |
| CELL[18].OUT_BEL[18] | BITSLICE[16].PHY2CLB_FIFO_EMPTY |
| CELL[18].OUT_BEL[19] | BITSLICE[16].RX_Q0 |
| CELL[18].OUT_BEL[20] | BITSLICE[16].RX_Q1 |
| CELL[18].OUT_BEL[21] | BITSLICE[16].RX_Q2 |
| CELL[18].OUT_BEL[22] | BITSLICE[16].RX_Q3 |
| CELL[18].OUT_BEL[23] | BITSLICE[16].RX_Q4 |
| CELL[18].OUT_BEL[24] | BITSLICE[16].RX_Q5 |
| CELL[18].OUT_BEL[25] | BITSLICE[16].RX_Q6 |
| CELL[18].OUT_BEL[26] | BITSLICE[16].RX_Q7 |
| CELL[18].OUT_BEL[27] | BITSLICE[16].TX_CNTVALUEOUT0 |
| CELL[18].OUT_BEL[28] | BITSLICE[16].TX_CNTVALUEOUT1 |
| CELL[18].OUT_BEL[29] | BITSLICE[16].TX_CNTVALUEOUT2 |
| CELL[18].OUT_BEL[30] | BITSLICE[16].TX_CNTVALUEOUT3 |
| CELL[18].OUT_BEL[31] | BITSLICE[16].TX_CNTVALUEOUT4 |
| CELL[18].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK2 |
| CELL[18].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].TRISTATE_ODELAY_RST_B0 |
| CELL[18].IMUX_CTRL[5] | BITSLICE_CONTROL[2].REFCLK |
| CELL[18].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].CTRL_RST_B_LOW |
| CELL[18].IMUX_CTRL[7] | BITSLICE_CONTROL[2].RIU_CLK, XIPHY_FEEDTHROUGH[1].CLB2PHY_CTRL_CLK_LOW |
| CELL[18].IMUX_BYP[6] | BITSLICE_T[2].LD |
| CELL[18].IMUX_BYP[7] | BITSLICE_T[2].INC |
| CELL[18].IMUX_BYP[8] | BITSLICE_T[2].CE_ODELAY |
| CELL[18].IMUX_BYP[9] | BITSLICE_CONTROL[2].EN_VTC |
| CELL[18].IMUX_BYP[10] | BITSLICE_CONTROL[2].CTRL_DLY_TEST_IN |
| CELL[18].IMUX_BYP[12] | BITSLICE[16].TX_LD |
| CELL[18].IMUX_BYP[13] | BITSLICE[16].TX_INC |
| CELL[18].IMUX_BYP[14] | BITSLICE[16].TX_EN_VTC |
| CELL[18].IMUX_BYP[15] | BITSLICE[16].TX_CE_ODELAY |
| CELL[18].IMUX_IMUX_DELAY[6] | BITSLICE[15].TX_CNTVALUEIN3 |
| CELL[18].IMUX_IMUX_DELAY[7] | BITSLICE[15].TX_CNTVALUEIN5 |
| CELL[18].IMUX_IMUX_DELAY[8] | BITSLICE[15].RX_CNTVALUEIN0 |
| CELL[18].IMUX_IMUX_DELAY[9] | BITSLICE[15].RX_CNTVALUEIN2 |
| CELL[18].IMUX_IMUX_DELAY[10] | BITSLICE[15].RX_CNTVALUEIN6 |
| CELL[18].IMUX_IMUX_DELAY[11] | BITSLICE[15].RX_CNTVALUEIN8 |
| CELL[18].IMUX_IMUX_DELAY[12] | BITSLICE_T[2].CNTVALUEIN3 |
| CELL[18].IMUX_IMUX_DELAY[13] | BITSLICE_T[2].CNTVALUEIN5 |
| CELL[18].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[2].CLB2RIU_NIBBLE_SEL |
| CELL[18].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[2].CLB2PHY_WRCS1_1 |
| CELL[18].IMUX_IMUX_DELAY[16] | BITSLICE[15].RX_CE_IFD |
| CELL[18].IMUX_IMUX_DELAY[17] | BITSLICE[15].RX_DATAIN1 |
| CELL[18].IMUX_IMUX_DELAY[18] | BITSLICE[15].CLB2PHY_FIFO_RDEN |
| CELL[18].IMUX_IMUX_DELAY[20] | BITSLICE[15].TX_D0 |
| CELL[18].IMUX_IMUX_DELAY[21] | BITSLICE[15].TX_D1 |
| CELL[18].IMUX_IMUX_DELAY[22] | BITSLICE[15].TX_D2 |
| CELL[18].IMUX_IMUX_DELAY[23] | BITSLICE[15].TX_D3 |
| CELL[18].IMUX_IMUX_DELAY[24] | BITSLICE[15].TX_D4 |
| CELL[18].IMUX_IMUX_DELAY[25] | BITSLICE[15].TX_D5 |
| CELL[18].IMUX_IMUX_DELAY[26] | BITSLICE[15].TX_D6 |
| CELL[18].IMUX_IMUX_DELAY[27] | BITSLICE[15].TX_D7 |
| CELL[18].IMUX_IMUX_DELAY[28] | BITSLICE[15].TX_CNTVALUEIN0 |
| CELL[18].IMUX_IMUX_DELAY[29] | BITSLICE[15].TX_CNTVALUEIN1 |
| CELL[18].IMUX_IMUX_DELAY[30] | BITSLICE[15].TX_CNTVALUEIN2 |
| CELL[18].IMUX_IMUX_DELAY[31] | BITSLICE[15].TX_CNTVALUEIN4 |
| CELL[18].IMUX_IMUX_DELAY[32] | BITSLICE[15].TX_CNTVALUEIN6 |
| CELL[18].IMUX_IMUX_DELAY[33] | BITSLICE[15].TX_CNTVALUEIN7 |
| CELL[18].IMUX_IMUX_DELAY[34] | BITSLICE[15].TX_CNTVALUEIN8 |
| CELL[18].IMUX_IMUX_DELAY[35] | BITSLICE[15].RX_CNTVALUEIN1 |
| CELL[18].IMUX_IMUX_DELAY[36] | BITSLICE[15].RX_CNTVALUEIN3 |
| CELL[18].IMUX_IMUX_DELAY[37] | BITSLICE[15].RX_CNTVALUEIN4 |
| CELL[18].IMUX_IMUX_DELAY[38] | BITSLICE[15].RX_CNTVALUEIN5 |
| CELL[18].IMUX_IMUX_DELAY[39] | BITSLICE[15].RX_CNTVALUEIN7 |
| CELL[18].IMUX_IMUX_DELAY[40] | BITSLICE_T[2].CNTVALUEIN0 |
| CELL[18].IMUX_IMUX_DELAY[41] | BITSLICE_T[2].CNTVALUEIN1 |
| CELL[18].IMUX_IMUX_DELAY[42] | BITSLICE_T[2].CNTVALUEIN2 |
| CELL[18].IMUX_IMUX_DELAY[43] | BITSLICE_T[2].CNTVALUEIN4 |
| CELL[18].IMUX_IMUX_DELAY[44] | BITSLICE_T[2].CNTVALUEIN6 |
| CELL[18].IMUX_IMUX_DELAY[45] | BITSLICE_T[2].CNTVALUEIN7 |
| CELL[18].IMUX_IMUX_DELAY[46] | BITSLICE_T[2].CNTVALUEIN8 |
| CELL[18].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[2].CLB2PHY_WRCS1_0 |
| CELL[19].OUT_BEL[4] | BITSLICE[16].TX_CNTVALUEOUT5 |
| CELL[19].OUT_BEL[5] | BITSLICE[16].TX_CNTVALUEOUT6 |
| CELL[19].OUT_BEL[6] | BITSLICE[16].TX_CNTVALUEOUT7 |
| CELL[19].OUT_BEL[7] | BITSLICE[16].TX_CNTVALUEOUT8 |
| CELL[19].OUT_BEL[8] | BITSLICE[17].TX_T_OUT |
| CELL[19].OUT_BEL[9] | BITSLICE[16].RX_CNTVALUEOUT0 |
| CELL[19].OUT_BEL[10] | BITSLICE[16].RX_CNTVALUEOUT1 |
| CELL[19].OUT_BEL[11] | BITSLICE[16].RX_CNTVALUEOUT2 |
| CELL[19].OUT_BEL[12] | BITSLICE[16].RX_CNTVALUEOUT3 |
| CELL[19].OUT_BEL[13] | BITSLICE[16].RX_CNTVALUEOUT4 |
| CELL[19].OUT_BEL[14] | BITSLICE[16].RX_CNTVALUEOUT5 |
| CELL[19].OUT_BEL[15] | BITSLICE[16].RX_CNTVALUEOUT6 |
| CELL[19].OUT_BEL[16] | BITSLICE[16].RX_CNTVALUEOUT7 |
| CELL[19].OUT_BEL[17] | BITSLICE[16].RX_CNTVALUEOUT8 |
| CELL[19].OUT_BEL[18] | BITSLICE[17].PHY2CLB_FIFO_EMPTY |
| CELL[19].OUT_BEL[19] | BITSLICE[17].RX_Q0 |
| CELL[19].OUT_BEL[20] | BITSLICE[17].RX_Q1 |
| CELL[19].OUT_BEL[21] | BITSLICE[17].RX_Q2 |
| CELL[19].OUT_BEL[22] | BITSLICE[17].RX_Q3 |
| CELL[19].OUT_BEL[23] | BITSLICE[17].RX_Q4 |
| CELL[19].OUT_BEL[24] | BITSLICE[17].RX_Q5 |
| CELL[19].OUT_BEL[25] | BITSLICE[17].RX_Q6 |
| CELL[19].OUT_BEL[26] | BITSLICE[17].RX_Q7 |
| CELL[19].OUT_BEL[27] | BITSLICE[17].TX_CNTVALUEOUT0 |
| CELL[19].OUT_BEL[28] | BITSLICE[17].TX_CNTVALUEOUT1 |
| CELL[19].OUT_BEL[29] | BITSLICE[17].TX_CNTVALUEOUT2 |
| CELL[19].OUT_BEL[30] | BITSLICE[17].TX_CNTVALUEOUT3 |
| CELL[19].OUT_BEL[31] | BITSLICE[17].TX_CNTVALUEOUT4 |
| CELL[19].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B3 |
| CELL[19].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B3 |
| CELL[19].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B3 |
| CELL[19].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B3 |
| CELL[19].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK3 |
| CELL[19].IMUX_BYP[6] | BITSLICE[16].RX_LD |
| CELL[19].IMUX_BYP[7] | BITSLICE[16].RX_INC |
| CELL[19].IMUX_BYP[8] | BITSLICE[16].RX_EN_VTC |
| CELL[19].IMUX_BYP[9] | BITSLICE[16].RX_CE_IDELAY |
| CELL[19].IMUX_BYP[10] | BITSLICE[16].DYN_DCI_OUT_INT |
| CELL[19].IMUX_BYP[11] | BITSLICE[17].TX_LD |
| CELL[19].IMUX_BYP[12] | BITSLICE[17].TX_INC |
| CELL[19].IMUX_BYP[13] | BITSLICE[17].TX_EN_VTC |
| CELL[19].IMUX_BYP[14] | BITSLICE[17].TX_CE_ODELAY |
| CELL[19].IMUX_BYP[15] | BITSLICE[17].RX_LD |
| CELL[19].IMUX_IMUX_DELAY[6] | BITSLICE_CONTROL[2].CLB2PHY_RDCS1_1 |
| CELL[19].IMUX_IMUX_DELAY[7] | BITSLICE_CONTROL[2].CLB2PHY_RDCS1_3 |
| CELL[19].IMUX_IMUX_DELAY[8] | BITSLICE_CONTROL[2].CLB2PHY_RDCS0_3 |
| CELL[19].IMUX_IMUX_DELAY[9] | BITSLICE[16].TX_CE_OFD |
| CELL[19].IMUX_IMUX_DELAY[10] | BITSLICE[16].TX_D0 |
| CELL[19].IMUX_IMUX_DELAY[11] | BITSLICE[16].TX_D2 |
| CELL[19].IMUX_IMUX_DELAY[12] | BITSLICE[16].TX_D6 |
| CELL[19].IMUX_IMUX_DELAY[13] | BITSLICE[16].TX_D7 |
| CELL[19].IMUX_IMUX_DELAY[14] | BITSLICE[16].TX_CNTVALUEIN3 |
| CELL[19].IMUX_IMUX_DELAY[15] | BITSLICE[16].TX_CNTVALUEIN5 |
| CELL[19].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[2].CLB2PHY_WRCS1_2 |
| CELL[19].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[2].CLB2PHY_WRCS1_3 |
| CELL[19].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[2].CLB2PHY_WRCS0_0 |
| CELL[19].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[2].CLB2PHY_WRCS0_1 |
| CELL[19].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[2].CLB2PHY_WRCS0_2 |
| CELL[19].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[2].CLB2PHY_WRCS0_3 |
| CELL[19].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[2].CLB2PHY_T_B0 |
| CELL[19].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[2].CLB2PHY_T_B1 |
| CELL[19].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[2].CLB2PHY_T_B2 |
| CELL[19].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[2].CLB2PHY_T_B3 |
| CELL[19].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[2].CLB2PHY_RDEN0 |
| CELL[19].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[2].CLB2PHY_RDEN1 |
| CELL[19].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[2].CLB2PHY_RDEN2 |
| CELL[19].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[2].CLB2PHY_RDEN3 |
| CELL[19].IMUX_IMUX_DELAY[30] | BITSLICE_CONTROL[2].CLB2PHY_RDCS1_0 |
| CELL[19].IMUX_IMUX_DELAY[31] | BITSLICE_CONTROL[2].CLB2PHY_RDCS1_2 |
| CELL[19].IMUX_IMUX_DELAY[32] | BITSLICE_CONTROL[2].CLB2PHY_RDCS0_0 |
| CELL[19].IMUX_IMUX_DELAY[33] | BITSLICE_CONTROL[2].CLB2PHY_RDCS0_1 |
| CELL[19].IMUX_IMUX_DELAY[34] | BITSLICE_CONTROL[2].CLB2PHY_RDCS0_2 |
| CELL[19].IMUX_IMUX_DELAY[35] | BITSLICE[16].TX_T |
| CELL[19].IMUX_IMUX_DELAY[36] | BITSLICE[16].RX_CE_IFD |
| CELL[19].IMUX_IMUX_DELAY[37] | BITSLICE[16].RX_DATAIN1 |
| CELL[19].IMUX_IMUX_DELAY[38] | BITSLICE[16].CLB2PHY_FIFO_RDEN |
| CELL[19].IMUX_IMUX_DELAY[39] | BITSLICE[16].TX_D1 |
| CELL[19].IMUX_IMUX_DELAY[40] | BITSLICE[16].TX_D3 |
| CELL[19].IMUX_IMUX_DELAY[41] | BITSLICE[16].TX_D4 |
| CELL[19].IMUX_IMUX_DELAY[42] | BITSLICE[16].TX_D5 |
| CELL[19].IMUX_IMUX_DELAY[44] | BITSLICE[16].TX_CNTVALUEIN0 |
| CELL[19].IMUX_IMUX_DELAY[45] | BITSLICE[16].TX_CNTVALUEIN1 |
| CELL[19].IMUX_IMUX_DELAY[46] | BITSLICE[16].TX_CNTVALUEIN2 |
| CELL[19].IMUX_IMUX_DELAY[47] | BITSLICE[16].TX_CNTVALUEIN4 |
| CELL[20].OUT_BEL[4] | BITSLICE[17].TX_CNTVALUEOUT5 |
| CELL[20].OUT_BEL[5] | BITSLICE[17].TX_CNTVALUEOUT6 |
| CELL[20].OUT_BEL[6] | BITSLICE[17].TX_CNTVALUEOUT7 |
| CELL[20].OUT_BEL[7] | BITSLICE[17].TX_CNTVALUEOUT8 |
| CELL[20].OUT_BEL[8] | BITSLICE[18].TX_T_OUT |
| CELL[20].OUT_BEL[9] | BITSLICE[17].RX_CNTVALUEOUT0 |
| CELL[20].OUT_BEL[10] | BITSLICE[17].RX_CNTVALUEOUT1 |
| CELL[20].OUT_BEL[11] | BITSLICE[17].RX_CNTVALUEOUT2 |
| CELL[20].OUT_BEL[12] | BITSLICE[17].RX_CNTVALUEOUT3 |
| CELL[20].OUT_BEL[13] | BITSLICE[17].RX_CNTVALUEOUT4 |
| CELL[20].OUT_BEL[14] | BITSLICE[17].RX_CNTVALUEOUT5 |
| CELL[20].OUT_BEL[15] | BITSLICE[17].RX_CNTVALUEOUT6 |
| CELL[20].OUT_BEL[16] | BITSLICE[17].RX_CNTVALUEOUT7 |
| CELL[20].OUT_BEL[17] | BITSLICE[17].RX_CNTVALUEOUT8 |
| CELL[20].OUT_BEL[18] | BITSLICE[18].PHY2CLB_FIFO_EMPTY |
| CELL[20].OUT_BEL[19] | BITSLICE[18].RX_Q0 |
| CELL[20].OUT_BEL[20] | BITSLICE[18].RX_Q1 |
| CELL[20].OUT_BEL[21] | BITSLICE[18].RX_Q2 |
| CELL[20].OUT_BEL[22] | BITSLICE[18].RX_Q3 |
| CELL[20].OUT_BEL[23] | BITSLICE[18].RX_Q4 |
| CELL[20].OUT_BEL[24] | BITSLICE[18].RX_Q5 |
| CELL[20].OUT_BEL[25] | BITSLICE[18].RX_Q6 |
| CELL[20].OUT_BEL[26] | BITSLICE[18].RX_Q7 |
| CELL[20].OUT_BEL[27] | BITSLICE[18].TX_CNTVALUEOUT0 |
| CELL[20].OUT_BEL[28] | BITSLICE[18].TX_CNTVALUEOUT1 |
| CELL[20].OUT_BEL[29] | BITSLICE[18].TX_CNTVALUEOUT2 |
| CELL[20].OUT_BEL[30] | BITSLICE[18].TX_CNTVALUEOUT3 |
| CELL[20].OUT_BEL[31] | BITSLICE[18].TX_CNTVALUEOUT4 |
| CELL[20].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B4 |
| CELL[20].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B4 |
| CELL[20].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B4 |
| CELL[20].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B4 |
| CELL[20].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK4 |
| CELL[20].IMUX_BYP[6] | BITSLICE[17].RX_INC |
| CELL[20].IMUX_BYP[7] | BITSLICE[17].RX_EN_VTC |
| CELL[20].IMUX_BYP[8] | BITSLICE[17].RX_CE_IDELAY |
| CELL[20].IMUX_BYP[9] | BITSLICE[17].DYN_DCI_OUT_INT |
| CELL[20].IMUX_BYP[10] | BITSLICE[18].TX_LD |
| CELL[20].IMUX_BYP[11] | BITSLICE[18].TX_INC |
| CELL[20].IMUX_BYP[12] | BITSLICE[18].TX_EN_VTC |
| CELL[20].IMUX_BYP[13] | BITSLICE[18].TX_CE_ODELAY |
| CELL[20].IMUX_BYP[14] | BITSLICE[18].RX_LD |
| CELL[20].IMUX_BYP[15] | BITSLICE[18].RX_INC |
| CELL[20].IMUX_IMUX_DELAY[6] | BITSLICE[17].RX_DATAIN1 |
| CELL[20].IMUX_IMUX_DELAY[7] | BITSLICE[17].TX_D0 |
| CELL[20].IMUX_IMUX_DELAY[8] | BITSLICE[17].TX_D4 |
| CELL[20].IMUX_IMUX_DELAY[9] | BITSLICE[17].TX_D6 |
| CELL[20].IMUX_IMUX_DELAY[10] | BITSLICE[17].TX_CNTVALUEIN2 |
| CELL[20].IMUX_IMUX_DELAY[11] | BITSLICE[17].TX_CNTVALUEIN4 |
| CELL[20].IMUX_IMUX_DELAY[12] | BITSLICE[17].TX_CNTVALUEIN8 |
| CELL[20].IMUX_IMUX_DELAY[13] | BITSLICE[17].RX_CNTVALUEIN1 |
| CELL[20].IMUX_IMUX_DELAY[14] | BITSLICE[17].RX_CNTVALUEIN5 |
| CELL[20].IMUX_IMUX_DELAY[15] | BITSLICE[17].RX_CNTVALUEIN7 |
| CELL[20].IMUX_IMUX_DELAY[16] | BITSLICE[16].TX_CNTVALUEIN6 |
| CELL[20].IMUX_IMUX_DELAY[17] | BITSLICE[16].TX_CNTVALUEIN7 |
| CELL[20].IMUX_IMUX_DELAY[18] | BITSLICE[16].TX_CNTVALUEIN8 |
| CELL[20].IMUX_IMUX_DELAY[19] | BITSLICE[16].RX_CNTVALUEIN0 |
| CELL[20].IMUX_IMUX_DELAY[20] | BITSLICE[16].RX_CNTVALUEIN1 |
| CELL[20].IMUX_IMUX_DELAY[21] | BITSLICE[16].RX_CNTVALUEIN2 |
| CELL[20].IMUX_IMUX_DELAY[22] | BITSLICE[16].RX_CNTVALUEIN3 |
| CELL[20].IMUX_IMUX_DELAY[23] | BITSLICE[16].RX_CNTVALUEIN4 |
| CELL[20].IMUX_IMUX_DELAY[24] | BITSLICE[16].RX_CNTVALUEIN5 |
| CELL[20].IMUX_IMUX_DELAY[25] | BITSLICE[16].RX_CNTVALUEIN6 |
| CELL[20].IMUX_IMUX_DELAY[26] | BITSLICE[16].RX_CNTVALUEIN7 |
| CELL[20].IMUX_IMUX_DELAY[27] | BITSLICE[16].RX_CNTVALUEIN8 |
| CELL[20].IMUX_IMUX_DELAY[28] | BITSLICE[17].TX_T |
| CELL[20].IMUX_IMUX_DELAY[29] | BITSLICE[17].TX_CE_OFD |
| CELL[20].IMUX_IMUX_DELAY[30] | BITSLICE[17].RX_CE_IFD |
| CELL[20].IMUX_IMUX_DELAY[31] | BITSLICE[17].CLB2PHY_FIFO_RDEN |
| CELL[20].IMUX_IMUX_DELAY[32] | BITSLICE[17].TX_D1 |
| CELL[20].IMUX_IMUX_DELAY[33] | BITSLICE[17].TX_D2 |
| CELL[20].IMUX_IMUX_DELAY[34] | BITSLICE[17].TX_D3 |
| CELL[20].IMUX_IMUX_DELAY[35] | BITSLICE[17].TX_D5 |
| CELL[20].IMUX_IMUX_DELAY[36] | BITSLICE[17].TX_D7 |
| CELL[20].IMUX_IMUX_DELAY[37] | BITSLICE[17].TX_CNTVALUEIN0 |
| CELL[20].IMUX_IMUX_DELAY[38] | BITSLICE[17].TX_CNTVALUEIN1 |
| CELL[20].IMUX_IMUX_DELAY[39] | BITSLICE[17].TX_CNTVALUEIN3 |
| CELL[20].IMUX_IMUX_DELAY[40] | BITSLICE[17].TX_CNTVALUEIN5 |
| CELL[20].IMUX_IMUX_DELAY[41] | BITSLICE[17].TX_CNTVALUEIN6 |
| CELL[20].IMUX_IMUX_DELAY[42] | BITSLICE[17].TX_CNTVALUEIN7 |
| CELL[20].IMUX_IMUX_DELAY[43] | BITSLICE[17].RX_CNTVALUEIN0 |
| CELL[20].IMUX_IMUX_DELAY[44] | BITSLICE[17].RX_CNTVALUEIN2 |
| CELL[20].IMUX_IMUX_DELAY[45] | BITSLICE[17].RX_CNTVALUEIN3 |
| CELL[20].IMUX_IMUX_DELAY[46] | BITSLICE[17].RX_CNTVALUEIN4 |
| CELL[20].IMUX_IMUX_DELAY[47] | BITSLICE[17].RX_CNTVALUEIN6 |
| CELL[21].OUT_BEL[4] | BITSLICE[18].TX_CNTVALUEOUT5 |
| CELL[21].OUT_BEL[5] | BITSLICE[18].TX_CNTVALUEOUT6 |
| CELL[21].OUT_BEL[6] | BITSLICE[18].TX_CNTVALUEOUT7 |
| CELL[21].OUT_BEL[7] | BITSLICE[18].TX_CNTVALUEOUT8 |
| CELL[21].OUT_BEL[8] | BITSLICE[19].TX_T_OUT |
| CELL[21].OUT_BEL[9] | BITSLICE[18].RX_CNTVALUEOUT0 |
| CELL[21].OUT_BEL[10] | BITSLICE[18].RX_CNTVALUEOUT1 |
| CELL[21].OUT_BEL[11] | BITSLICE[18].RX_CNTVALUEOUT2 |
| CELL[21].OUT_BEL[12] | BITSLICE[18].RX_CNTVALUEOUT3 |
| CELL[21].OUT_BEL[13] | BITSLICE[18].RX_CNTVALUEOUT4 |
| CELL[21].OUT_BEL[14] | BITSLICE[18].RX_CNTVALUEOUT5 |
| CELL[21].OUT_BEL[15] | BITSLICE[18].RX_CNTVALUEOUT6 |
| CELL[21].OUT_BEL[16] | BITSLICE[18].RX_CNTVALUEOUT7 |
| CELL[21].OUT_BEL[17] | BITSLICE[18].RX_CNTVALUEOUT8 |
| CELL[21].OUT_BEL[18] | RIU_OR[1].RIU_RD_VALID |
| CELL[21].OUT_BEL[19] | RIU_OR[1].RIU_RD_DATA0 |
| CELL[21].OUT_BEL[20] | RIU_OR[1].RIU_RD_DATA1 |
| CELL[21].OUT_BEL[21] | RIU_OR[1].RIU_RD_DATA2 |
| CELL[21].OUT_BEL[22] | RIU_OR[1].RIU_RD_DATA3 |
| CELL[21].OUT_BEL[23] | RIU_OR[1].RIU_RD_DATA4 |
| CELL[21].OUT_BEL[24] | RIU_OR[1].RIU_RD_DATA5 |
| CELL[21].OUT_BEL[25] | RIU_OR[1].RIU_RD_DATA6 |
| CELL[21].OUT_BEL[26] | RIU_OR[1].RIU_RD_DATA7 |
| CELL[21].OUT_BEL[27] | RIU_OR[1].RIU_RD_DATA8 |
| CELL[21].OUT_BEL[28] | RIU_OR[1].RIU_RD_DATA9 |
| CELL[21].OUT_BEL[29] | RIU_OR[1].RIU_RD_DATA10 |
| CELL[21].OUT_BEL[30] | RIU_OR[1].RIU_RD_DATA11 |
| CELL[21].OUT_BEL[31] | RIU_OR[1].RIU_RD_DATA12 |
| CELL[21].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B5 |
| CELL[21].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B5 |
| CELL[21].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B5 |
| CELL[21].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B5 |
| CELL[21].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK5 |
| CELL[21].IMUX_BYP[6] | BITSLICE[18].RX_EN_VTC |
| CELL[21].IMUX_BYP[7] | BITSLICE[18].RX_CE_IDELAY |
| CELL[21].IMUX_BYP[8] | BITSLICE[18].DYN_DCI_OUT_INT |
| CELL[21].IMUX_BYP[9] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_SPARE_B0 |
| CELL[21].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_SPARE_B1 |
| CELL[21].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_SPARE_B2 |
| CELL[21].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_SPARE_B3 |
| CELL[21].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_RST_MASK_B |
| CELL[21].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_MODE_B |
| CELL[21].IMUX_BYP[15] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN0 |
| CELL[21].IMUX_IMUX_DELAY[6] | BITSLICE[18].TX_CNTVALUEIN1 |
| CELL[21].IMUX_IMUX_DELAY[7] | BITSLICE[18].TX_CNTVALUEIN3 |
| CELL[21].IMUX_IMUX_DELAY[8] | BITSLICE[18].TX_CNTVALUEIN7 |
| CELL[21].IMUX_IMUX_DELAY[10] | BITSLICE[18].RX_CNTVALUEIN3 |
| CELL[21].IMUX_IMUX_DELAY[11] | BITSLICE[18].RX_CNTVALUEIN5 |
| CELL[21].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[2].CLB2RIU_WR_EN, BITSLICE_CONTROL[3].CLB2RIU_WR_EN |
| CELL[21].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA1, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA1 |
| CELL[21].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA5, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA5 |
| CELL[21].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA7, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA7 |
| CELL[21].IMUX_IMUX_DELAY[16] | BITSLICE[17].RX_CNTVALUEIN8 |
| CELL[21].IMUX_IMUX_DELAY[17] | BITSLICE[18].TX_T |
| CELL[21].IMUX_IMUX_DELAY[18] | BITSLICE[18].TX_CE_OFD |
| CELL[21].IMUX_IMUX_DELAY[19] | BITSLICE[18].RX_CE_IFD |
| CELL[21].IMUX_IMUX_DELAY[20] | BITSLICE[18].RX_DATAIN1 |
| CELL[21].IMUX_IMUX_DELAY[21] | BITSLICE[18].CLB2PHY_FIFO_RDEN |
| CELL[21].IMUX_IMUX_DELAY[22] | BITSLICE[18].TX_D0 |
| CELL[21].IMUX_IMUX_DELAY[23] | BITSLICE[18].TX_D1 |
| CELL[21].IMUX_IMUX_DELAY[24] | BITSLICE[18].TX_D2 |
| CELL[21].IMUX_IMUX_DELAY[25] | BITSLICE[18].TX_D3 |
| CELL[21].IMUX_IMUX_DELAY[26] | BITSLICE[18].TX_D4 |
| CELL[21].IMUX_IMUX_DELAY[27] | BITSLICE[18].TX_D5 |
| CELL[21].IMUX_IMUX_DELAY[28] | BITSLICE[18].TX_D6 |
| CELL[21].IMUX_IMUX_DELAY[29] | BITSLICE[18].TX_D7 |
| CELL[21].IMUX_IMUX_DELAY[30] | BITSLICE[18].TX_CNTVALUEIN0 |
| CELL[21].IMUX_IMUX_DELAY[31] | BITSLICE[18].TX_CNTVALUEIN2 |
| CELL[21].IMUX_IMUX_DELAY[32] | BITSLICE[18].TX_CNTVALUEIN4 |
| CELL[21].IMUX_IMUX_DELAY[33] | BITSLICE[18].TX_CNTVALUEIN5 |
| CELL[21].IMUX_IMUX_DELAY[34] | BITSLICE[18].TX_CNTVALUEIN6 |
| CELL[21].IMUX_IMUX_DELAY[35] | BITSLICE[18].TX_CNTVALUEIN8 |
| CELL[21].IMUX_IMUX_DELAY[36] | BITSLICE[18].RX_CNTVALUEIN0 |
| CELL[21].IMUX_IMUX_DELAY[37] | BITSLICE[18].RX_CNTVALUEIN1 |
| CELL[21].IMUX_IMUX_DELAY[38] | BITSLICE[18].RX_CNTVALUEIN2 |
| CELL[21].IMUX_IMUX_DELAY[39] | BITSLICE[18].RX_CNTVALUEIN4 |
| CELL[21].IMUX_IMUX_DELAY[40] | BITSLICE[18].RX_CNTVALUEIN6 |
| CELL[21].IMUX_IMUX_DELAY[41] | BITSLICE[18].RX_CNTVALUEIN7 |
| CELL[21].IMUX_IMUX_DELAY[42] | BITSLICE[18].RX_CNTVALUEIN8 |
| CELL[21].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA0, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA0 |
| CELL[21].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA2, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA2 |
| CELL[21].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA3, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA3 |
| CELL[21].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA4, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA4 |
| CELL[21].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA6, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA6 |
| CELL[22].OUT_BEL[4] | RIU_OR[1].RIU_RD_DATA13 |
| CELL[22].OUT_BEL[5] | RIU_OR[1].RIU_RD_DATA14 |
| CELL[22].OUT_BEL[6] | RIU_OR[1].RIU_RD_DATA15 |
| CELL[22].OUT_BEL[7] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT0 |
| CELL[22].OUT_BEL[8] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT1 |
| CELL[22].OUT_BEL[9] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT2 |
| CELL[22].OUT_BEL[10] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT3 |
| CELL[22].OUT_BEL[11] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT4 |
| CELL[22].OUT_BEL[12] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT5 |
| CELL[22].OUT_BEL[13] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT6 |
| CELL[22].OUT_BEL[14] | XIPHY_FEEDTHROUGH[1].PHY2CLB_SCAN_OUT7 |
| CELL[22].OUT_BEL[15] | XIPHY_FEEDTHROUGH[1].PHY2CLB_DBG_CLK_STOP_OUT |
| CELL[22].OUT_BEL[16] | XIPHY_FEEDTHROUGH[1].PHY2CLB_DBG_CLK_STOP_FLG_OUT |
| CELL[22].OUT_BEL[17] | XIPHY_FEEDTHROUGH[1].PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[22].OUT_BEL[18] | BITSLICE[25].PHY2CLB_FIFO_EMPTY |
| CELL[22].OUT_BEL[19] | BITSLICE[25].RX_Q0 |
| CELL[22].OUT_BEL[20] | BITSLICE[25].RX_Q1 |
| CELL[22].OUT_BEL[21] | BITSLICE[25].RX_Q2 |
| CELL[22].OUT_BEL[22] | BITSLICE[25].RX_Q3 |
| CELL[22].OUT_BEL[23] | BITSLICE[25].RX_Q4 |
| CELL[22].OUT_BEL[24] | BITSLICE[25].RX_Q5 |
| CELL[22].OUT_BEL[25] | BITSLICE[25].RX_Q6 |
| CELL[22].OUT_BEL[26] | BITSLICE[25].RX_Q7 |
| CELL[22].OUT_BEL[27] | BITSLICE[25].TX_CNTVALUEOUT0 |
| CELL[22].OUT_BEL[28] | BITSLICE[25].TX_CNTVALUEOUT1 |
| CELL[22].OUT_BEL[29] | BITSLICE[25].TX_CNTVALUEOUT2 |
| CELL[22].OUT_BEL[30] | BITSLICE[25].TX_CNTVALUEOUT3 |
| CELL[22].OUT_BEL[31] | BITSLICE[25].TX_CNTVALUEOUT4 |
| CELL[22].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_CLK_SDR |
| CELL[22].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_CLK_DIV4 |
| CELL[22].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_CLK_DIV2 |
| CELL[22].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B12 |
| CELL[22].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B12 |
| CELL[22].IMUX_BYP[6] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN1 |
| CELL[22].IMUX_BYP[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN2 |
| CELL[22].IMUX_BYP[8] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN3 |
| CELL[22].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN4 |
| CELL[22].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN5 |
| CELL[22].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN6 |
| CELL[22].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_IN7 |
| CELL[22].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[1].CLB2PHY_SCAN_EN_B |
| CELL[22].IMUX_BYP[15] | BITSLICE[25].TX_LD |
| CELL[22].IMUX_IMUX_DELAY[6] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_DIV4_CLK_SEL_B |
| CELL[22].IMUX_IMUX_DELAY[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_DBG_CT_START_EN |
| CELL[22].IMUX_IMUX_DELAY[8] | BITSLICE[25].TX_CE_OFD |
| CELL[22].IMUX_IMUX_DELAY[9] | BITSLICE[25].RX_DATAIN1 |
| CELL[22].IMUX_IMUX_DELAY[10] | BITSLICE[25].TX_D2 |
| CELL[22].IMUX_IMUX_DELAY[11] | BITSLICE[25].TX_D4 |
| CELL[22].IMUX_IMUX_DELAY[12] | BITSLICE[25].TX_CNTVALUEIN0 |
| CELL[22].IMUX_IMUX_DELAY[13] | BITSLICE[25].TX_CNTVALUEIN2 |
| CELL[22].IMUX_IMUX_DELAY[14] | BITSLICE[25].TX_CNTVALUEIN6 |
| CELL[22].IMUX_IMUX_DELAY[15] | BITSLICE[25].TX_CNTVALUEIN8 |
| CELL[22].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA8, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA8 |
| CELL[22].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA9, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA9 |
| CELL[22].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA10, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA10 |
| CELL[22].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA11, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA11 |
| CELL[22].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA12, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA12 |
| CELL[22].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA13, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA13 |
| CELL[22].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA14, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA14 |
| CELL[22].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[2].CLB2RIU_WR_DATA15, BITSLICE_CONTROL[3].CLB2RIU_WR_DATA15 |
| CELL[22].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[2].CLB2RIU_ADDR0, BITSLICE_CONTROL[3].CLB2RIU_ADDR0 |
| CELL[22].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[2].CLB2RIU_ADDR1, BITSLICE_CONTROL[3].CLB2RIU_ADDR1 |
| CELL[22].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[2].CLB2RIU_ADDR2, BITSLICE_CONTROL[3].CLB2RIU_ADDR2 |
| CELL[22].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[2].CLB2RIU_ADDR3, BITSLICE_CONTROL[3].CLB2RIU_ADDR3 |
| CELL[22].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[2].CLB2RIU_ADDR4, BITSLICE_CONTROL[3].CLB2RIU_ADDR4 |
| CELL[22].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[2].CLB2RIU_ADDR5, BITSLICE_CONTROL[3].CLB2RIU_ADDR5 |
| CELL[22].IMUX_IMUX_DELAY[30] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_SDR_CLK_SEL_B |
| CELL[22].IMUX_IMUX_DELAY[31] | XIPHY_FEEDTHROUGH[1].CLB2PHY_TEST_DIV2_CLK_SEL_B |
| CELL[22].IMUX_IMUX_DELAY[32] | XIPHY_FEEDTHROUGH[1].CLB2PHY_DBG_CLK_STOP_FLG_OUT |
| CELL[22].IMUX_IMUX_DELAY[33] | XIPHY_FEEDTHROUGH[1].CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[22].IMUX_IMUX_DELAY[34] | BITSLICE[25].TX_T |
| CELL[22].IMUX_IMUX_DELAY[35] | BITSLICE[25].RX_CE_IFD |
| CELL[22].IMUX_IMUX_DELAY[36] | BITSLICE[25].CLB2PHY_FIFO_RDEN |
| CELL[22].IMUX_IMUX_DELAY[37] | BITSLICE[25].TX_D0 |
| CELL[22].IMUX_IMUX_DELAY[38] | BITSLICE[25].TX_D1 |
| CELL[22].IMUX_IMUX_DELAY[39] | BITSLICE[25].TX_D3 |
| CELL[22].IMUX_IMUX_DELAY[40] | BITSLICE[25].TX_D5 |
| CELL[22].IMUX_IMUX_DELAY[41] | BITSLICE[25].TX_D6 |
| CELL[22].IMUX_IMUX_DELAY[42] | BITSLICE[25].TX_D7 |
| CELL[22].IMUX_IMUX_DELAY[43] | BITSLICE[25].TX_CNTVALUEIN1 |
| CELL[22].IMUX_IMUX_DELAY[44] | BITSLICE[25].TX_CNTVALUEIN3 |
| CELL[22].IMUX_IMUX_DELAY[45] | BITSLICE[25].TX_CNTVALUEIN4 |
| CELL[22].IMUX_IMUX_DELAY[46] | BITSLICE[25].TX_CNTVALUEIN5 |
| CELL[22].IMUX_IMUX_DELAY[47] | BITSLICE[25].TX_CNTVALUEIN7 |
| CELL[23].OUT_BEL[4] | BITSLICE[25].TX_CNTVALUEOUT5 |
| CELL[23].OUT_BEL[5] | BITSLICE[25].TX_CNTVALUEOUT6 |
| CELL[23].OUT_BEL[6] | BITSLICE[25].TX_CNTVALUEOUT7 |
| CELL[23].OUT_BEL[7] | BITSLICE[25].TX_CNTVALUEOUT8 |
| CELL[23].OUT_BEL[8] | BITSLICE[20].TX_T_OUT |
| CELL[23].OUT_BEL[9] | BITSLICE[25].RX_CNTVALUEOUT0 |
| CELL[23].OUT_BEL[10] | BITSLICE[25].RX_CNTVALUEOUT1 |
| CELL[23].OUT_BEL[11] | BITSLICE[25].RX_CNTVALUEOUT2 |
| CELL[23].OUT_BEL[12] | BITSLICE[25].RX_CNTVALUEOUT3 |
| CELL[23].OUT_BEL[13] | BITSLICE[25].RX_CNTVALUEOUT4 |
| CELL[23].OUT_BEL[14] | BITSLICE[25].RX_CNTVALUEOUT5 |
| CELL[23].OUT_BEL[15] | BITSLICE[25].RX_CNTVALUEOUT6 |
| CELL[23].OUT_BEL[16] | BITSLICE[25].RX_CNTVALUEOUT7 |
| CELL[23].OUT_BEL[17] | BITSLICE[25].RX_CNTVALUEOUT8 |
| CELL[23].OUT_BEL[18] | BITSLICE[19].PHY2CLB_FIFO_EMPTY |
| CELL[23].OUT_BEL[19] | BITSLICE[19].RX_Q0 |
| CELL[23].OUT_BEL[20] | BITSLICE[19].RX_Q1 |
| CELL[23].OUT_BEL[21] | BITSLICE[19].RX_Q2 |
| CELL[23].OUT_BEL[22] | BITSLICE[19].RX_Q3 |
| CELL[23].OUT_BEL[23] | BITSLICE[19].RX_Q4 |
| CELL[23].OUT_BEL[24] | BITSLICE[19].RX_Q5 |
| CELL[23].OUT_BEL[25] | BITSLICE[19].RX_Q6 |
| CELL[23].OUT_BEL[26] | BITSLICE[19].RX_Q7 |
| CELL[23].OUT_BEL[27] | BITSLICE[19].TX_CNTVALUEOUT0 |
| CELL[23].OUT_BEL[28] | BITSLICE[19].TX_CNTVALUEOUT1 |
| CELL[23].OUT_BEL[29] | BITSLICE[19].TX_CNTVALUEOUT2 |
| CELL[23].OUT_BEL[30] | BITSLICE[19].TX_CNTVALUEOUT3 |
| CELL[23].OUT_BEL[31] | BITSLICE[19].TX_CNTVALUEOUT4 |
| CELL[23].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B12 |
| CELL[23].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B12 |
| CELL[23].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK12 |
| CELL[23].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B6 |
| CELL[23].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B6 |
| CELL[23].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B6 |
| CELL[23].IMUX_BYP[6] | BITSLICE[25].TX_INC |
| CELL[23].IMUX_BYP[7] | BITSLICE[25].TX_EN_VTC |
| CELL[23].IMUX_BYP[8] | BITSLICE[25].TX_CE_ODELAY |
| CELL[23].IMUX_BYP[9] | BITSLICE[25].RX_LD |
| CELL[23].IMUX_BYP[10] | BITSLICE[25].RX_INC |
| CELL[23].IMUX_BYP[11] | BITSLICE[25].RX_EN_VTC |
| CELL[23].IMUX_BYP[12] | BITSLICE[25].RX_CE_IDELAY |
| CELL[23].IMUX_BYP[13] | BITSLICE[25].DYN_DCI_OUT_INT |
| CELL[23].IMUX_BYP[14] | BITSLICE[19].TX_LD |
| CELL[23].IMUX_BYP[15] | BITSLICE[19].TX_INC |
| CELL[23].IMUX_IMUX_DELAY[6] | BITSLICE[19].TX_D0 |
| CELL[23].IMUX_IMUX_DELAY[7] | BITSLICE[19].TX_D2 |
| CELL[23].IMUX_IMUX_DELAY[8] | BITSLICE[19].TX_D6 |
| CELL[23].IMUX_IMUX_DELAY[9] | BITSLICE[19].TX_CNTVALUEIN0 |
| CELL[23].IMUX_IMUX_DELAY[10] | BITSLICE[19].TX_CNTVALUEIN4 |
| CELL[23].IMUX_IMUX_DELAY[11] | BITSLICE[19].TX_CNTVALUEIN6 |
| CELL[23].IMUX_IMUX_DELAY[12] | BITSLICE[19].RX_CNTVALUEIN1 |
| CELL[23].IMUX_IMUX_DELAY[13] | BITSLICE[19].RX_CNTVALUEIN3 |
| CELL[23].IMUX_IMUX_DELAY[14] | BITSLICE[19].RX_CNTVALUEIN7 |
| CELL[23].IMUX_IMUX_DELAY[15] | BITSLICE[20].TX_T |
| CELL[23].IMUX_IMUX_DELAY[16] | BITSLICE[25].RX_CNTVALUEIN0 |
| CELL[23].IMUX_IMUX_DELAY[17] | BITSLICE[25].RX_CNTVALUEIN1 |
| CELL[23].IMUX_IMUX_DELAY[18] | BITSLICE[25].RX_CNTVALUEIN2 |
| CELL[23].IMUX_IMUX_DELAY[19] | BITSLICE[25].RX_CNTVALUEIN3 |
| CELL[23].IMUX_IMUX_DELAY[20] | BITSLICE[25].RX_CNTVALUEIN4 |
| CELL[23].IMUX_IMUX_DELAY[21] | BITSLICE[25].RX_CNTVALUEIN5 |
| CELL[23].IMUX_IMUX_DELAY[22] | BITSLICE[25].RX_CNTVALUEIN6 |
| CELL[23].IMUX_IMUX_DELAY[23] | BITSLICE[25].RX_CNTVALUEIN7 |
| CELL[23].IMUX_IMUX_DELAY[24] | BITSLICE[25].RX_CNTVALUEIN8 |
| CELL[23].IMUX_IMUX_DELAY[25] | BITSLICE[19].TX_T |
| CELL[23].IMUX_IMUX_DELAY[26] | BITSLICE[19].TX_CE_OFD |
| CELL[23].IMUX_IMUX_DELAY[27] | BITSLICE[19].RX_CE_IFD |
| CELL[23].IMUX_IMUX_DELAY[29] | BITSLICE[19].RX_DATAIN1 |
| CELL[23].IMUX_IMUX_DELAY[30] | BITSLICE[19].CLB2PHY_FIFO_RDEN |
| CELL[23].IMUX_IMUX_DELAY[31] | BITSLICE[19].TX_D1 |
| CELL[23].IMUX_IMUX_DELAY[32] | BITSLICE[19].TX_D3 |
| CELL[23].IMUX_IMUX_DELAY[33] | BITSLICE[19].TX_D4 |
| CELL[23].IMUX_IMUX_DELAY[34] | BITSLICE[19].TX_D5 |
| CELL[23].IMUX_IMUX_DELAY[35] | BITSLICE[19].TX_D7 |
| CELL[23].IMUX_IMUX_DELAY[36] | BITSLICE[19].TX_CNTVALUEIN1 |
| CELL[23].IMUX_IMUX_DELAY[37] | BITSLICE[19].TX_CNTVALUEIN2 |
| CELL[23].IMUX_IMUX_DELAY[38] | BITSLICE[19].TX_CNTVALUEIN3 |
| CELL[23].IMUX_IMUX_DELAY[39] | BITSLICE[19].TX_CNTVALUEIN5 |
| CELL[23].IMUX_IMUX_DELAY[40] | BITSLICE[19].TX_CNTVALUEIN7 |
| CELL[23].IMUX_IMUX_DELAY[41] | BITSLICE[19].TX_CNTVALUEIN8 |
| CELL[23].IMUX_IMUX_DELAY[42] | BITSLICE[19].RX_CNTVALUEIN0 |
| CELL[23].IMUX_IMUX_DELAY[43] | BITSLICE[19].RX_CNTVALUEIN2 |
| CELL[23].IMUX_IMUX_DELAY[44] | BITSLICE[19].RX_CNTVALUEIN4 |
| CELL[23].IMUX_IMUX_DELAY[45] | BITSLICE[19].RX_CNTVALUEIN5 |
| CELL[23].IMUX_IMUX_DELAY[46] | BITSLICE[19].RX_CNTVALUEIN6 |
| CELL[23].IMUX_IMUX_DELAY[47] | BITSLICE[19].RX_CNTVALUEIN8 |
| CELL[24].OUT_BEL[4] | BITSLICE[19].TX_CNTVALUEOUT5 |
| CELL[24].OUT_BEL[5] | BITSLICE[19].TX_CNTVALUEOUT6 |
| CELL[24].OUT_BEL[6] | BITSLICE[19].TX_CNTVALUEOUT7 |
| CELL[24].OUT_BEL[7] | BITSLICE[19].TX_CNTVALUEOUT8 |
| CELL[24].OUT_BEL[8] | BITSLICE[21].TX_T_OUT |
| CELL[24].OUT_BEL[9] | BITSLICE[19].RX_CNTVALUEOUT0 |
| CELL[24].OUT_BEL[10] | BITSLICE[19].RX_CNTVALUEOUT1 |
| CELL[24].OUT_BEL[11] | BITSLICE[19].RX_CNTVALUEOUT2 |
| CELL[24].OUT_BEL[12] | BITSLICE[19].RX_CNTVALUEOUT3 |
| CELL[24].OUT_BEL[13] | BITSLICE[19].RX_CNTVALUEOUT4 |
| CELL[24].OUT_BEL[14] | BITSLICE[19].RX_CNTVALUEOUT5 |
| CELL[24].OUT_BEL[15] | BITSLICE[19].RX_CNTVALUEOUT6 |
| CELL[24].OUT_BEL[16] | BITSLICE[19].RX_CNTVALUEOUT7 |
| CELL[24].OUT_BEL[17] | BITSLICE[19].RX_CNTVALUEOUT8 |
| CELL[24].OUT_BEL[18] | BITSLICE[20].PHY2CLB_FIFO_EMPTY |
| CELL[24].OUT_BEL[19] | BITSLICE[20].RX_Q0 |
| CELL[24].OUT_BEL[20] | BITSLICE[20].RX_Q1 |
| CELL[24].OUT_BEL[21] | BITSLICE[20].RX_Q2 |
| CELL[24].OUT_BEL[22] | BITSLICE[20].RX_Q3 |
| CELL[24].OUT_BEL[23] | BITSLICE[20].RX_Q4 |
| CELL[24].OUT_BEL[24] | BITSLICE[20].RX_Q5 |
| CELL[24].OUT_BEL[25] | BITSLICE[20].RX_Q6 |
| CELL[24].OUT_BEL[26] | BITSLICE[20].RX_Q7 |
| CELL[24].OUT_BEL[27] | BITSLICE[20].TX_CNTVALUEOUT0 |
| CELL[24].OUT_BEL[28] | BITSLICE[20].TX_CNTVALUEOUT1 |
| CELL[24].OUT_BEL[29] | BITSLICE[20].TX_CNTVALUEOUT2 |
| CELL[24].OUT_BEL[30] | BITSLICE[20].TX_CNTVALUEOUT3 |
| CELL[24].OUT_BEL[31] | BITSLICE[20].TX_CNTVALUEOUT4 |
| CELL[24].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B6 |
| CELL[24].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK6 |
| CELL[24].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B7 |
| CELL[24].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B7 |
| CELL[24].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B7 |
| CELL[24].IMUX_BYP[6] | BITSLICE[19].TX_EN_VTC |
| CELL[24].IMUX_BYP[7] | BITSLICE[19].TX_CE_ODELAY |
| CELL[24].IMUX_BYP[8] | BITSLICE[19].RX_LD |
| CELL[24].IMUX_BYP[9] | BITSLICE[19].RX_INC |
| CELL[24].IMUX_BYP[10] | BITSLICE[19].RX_EN_VTC |
| CELL[24].IMUX_BYP[11] | BITSLICE[19].RX_CE_IDELAY |
| CELL[24].IMUX_BYP[12] | BITSLICE[19].DYN_DCI_OUT_INT |
| CELL[24].IMUX_BYP[14] | BITSLICE[20].TX_LD |
| CELL[24].IMUX_BYP[15] | BITSLICE[20].TX_INC |
| CELL[24].IMUX_IMUX_DELAY[6] | BITSLICE[20].TX_CNTVALUEIN3 |
| CELL[24].IMUX_IMUX_DELAY[7] | BITSLICE[20].TX_CNTVALUEIN5 |
| CELL[24].IMUX_IMUX_DELAY[8] | BITSLICE[20].RX_CNTVALUEIN0 |
| CELL[24].IMUX_IMUX_DELAY[9] | BITSLICE[20].RX_CNTVALUEIN2 |
| CELL[24].IMUX_IMUX_DELAY[10] | BITSLICE[20].RX_CNTVALUEIN6 |
| CELL[24].IMUX_IMUX_DELAY[11] | BITSLICE[20].RX_CNTVALUEIN8 |
| CELL[24].IMUX_IMUX_DELAY[12] | BITSLICE[21].RX_DATAIN1 |
| CELL[24].IMUX_IMUX_DELAY[13] | BITSLICE[21].TX_D0 |
| CELL[24].IMUX_IMUX_DELAY[14] | BITSLICE[21].TX_D4 |
| CELL[24].IMUX_IMUX_DELAY[15] | BITSLICE[21].TX_D6 |
| CELL[24].IMUX_IMUX_DELAY[16] | BITSLICE[20].TX_CE_OFD |
| CELL[24].IMUX_IMUX_DELAY[17] | BITSLICE[20].RX_CE_IFD |
| CELL[24].IMUX_IMUX_DELAY[18] | BITSLICE[20].RX_DATAIN1 |
| CELL[24].IMUX_IMUX_DELAY[19] | BITSLICE[20].CLB2PHY_FIFO_RDEN |
| CELL[24].IMUX_IMUX_DELAY[20] | BITSLICE[20].TX_D0 |
| CELL[24].IMUX_IMUX_DELAY[21] | BITSLICE[20].TX_D1 |
| CELL[24].IMUX_IMUX_DELAY[22] | BITSLICE[20].TX_D2 |
| CELL[24].IMUX_IMUX_DELAY[23] | BITSLICE[20].TX_D3 |
| CELL[24].IMUX_IMUX_DELAY[24] | BITSLICE[20].TX_D4 |
| CELL[24].IMUX_IMUX_DELAY[25] | BITSLICE[20].TX_D5 |
| CELL[24].IMUX_IMUX_DELAY[26] | BITSLICE[20].TX_D6 |
| CELL[24].IMUX_IMUX_DELAY[27] | BITSLICE[20].TX_D7 |
| CELL[24].IMUX_IMUX_DELAY[28] | BITSLICE[20].TX_CNTVALUEIN0 |
| CELL[24].IMUX_IMUX_DELAY[29] | BITSLICE[20].TX_CNTVALUEIN1 |
| CELL[24].IMUX_IMUX_DELAY[30] | BITSLICE[20].TX_CNTVALUEIN2 |
| CELL[24].IMUX_IMUX_DELAY[31] | BITSLICE[20].TX_CNTVALUEIN4 |
| CELL[24].IMUX_IMUX_DELAY[32] | BITSLICE[20].TX_CNTVALUEIN6 |
| CELL[24].IMUX_IMUX_DELAY[33] | BITSLICE[20].TX_CNTVALUEIN7 |
| CELL[24].IMUX_IMUX_DELAY[34] | BITSLICE[20].TX_CNTVALUEIN8 |
| CELL[24].IMUX_IMUX_DELAY[35] | BITSLICE[20].RX_CNTVALUEIN1 |
| CELL[24].IMUX_IMUX_DELAY[36] | BITSLICE[20].RX_CNTVALUEIN3 |
| CELL[24].IMUX_IMUX_DELAY[37] | BITSLICE[20].RX_CNTVALUEIN4 |
| CELL[24].IMUX_IMUX_DELAY[38] | BITSLICE[20].RX_CNTVALUEIN5 |
| CELL[24].IMUX_IMUX_DELAY[39] | BITSLICE[20].RX_CNTVALUEIN7 |
| CELL[24].IMUX_IMUX_DELAY[40] | BITSLICE[21].TX_T |
| CELL[24].IMUX_IMUX_DELAY[41] | BITSLICE[21].TX_CE_OFD |
| CELL[24].IMUX_IMUX_DELAY[42] | BITSLICE[21].RX_CE_IFD |
| CELL[24].IMUX_IMUX_DELAY[43] | BITSLICE[21].CLB2PHY_FIFO_RDEN |
| CELL[24].IMUX_IMUX_DELAY[44] | BITSLICE[21].TX_D1 |
| CELL[24].IMUX_IMUX_DELAY[45] | BITSLICE[21].TX_D2 |
| CELL[24].IMUX_IMUX_DELAY[46] | BITSLICE[21].TX_D3 |
| CELL[24].IMUX_IMUX_DELAY[47] | BITSLICE[21].TX_D5 |
| CELL[25].OUT_BEL[4] | BITSLICE[20].TX_CNTVALUEOUT5 |
| CELL[25].OUT_BEL[5] | BITSLICE[20].TX_CNTVALUEOUT6 |
| CELL[25].OUT_BEL[6] | BITSLICE[20].TX_CNTVALUEOUT7 |
| CELL[25].OUT_BEL[7] | BITSLICE[20].TX_CNTVALUEOUT8 |
| CELL[25].OUT_BEL[8] | BITSLICE[22].TX_T_OUT |
| CELL[25].OUT_BEL[9] | BITSLICE[20].RX_CNTVALUEOUT0 |
| CELL[25].OUT_BEL[10] | BITSLICE[20].RX_CNTVALUEOUT1 |
| CELL[25].OUT_BEL[11] | BITSLICE[20].RX_CNTVALUEOUT2 |
| CELL[25].OUT_BEL[12] | BITSLICE[20].RX_CNTVALUEOUT3 |
| CELL[25].OUT_BEL[13] | BITSLICE[20].RX_CNTVALUEOUT4 |
| CELL[25].OUT_BEL[14] | BITSLICE[20].RX_CNTVALUEOUT5 |
| CELL[25].OUT_BEL[15] | BITSLICE[20].RX_CNTVALUEOUT6 |
| CELL[25].OUT_BEL[16] | BITSLICE[20].RX_CNTVALUEOUT7 |
| CELL[25].OUT_BEL[17] | BITSLICE[20].RX_CNTVALUEOUT8 |
| CELL[25].OUT_BEL[18] | BITSLICE[21].PHY2CLB_FIFO_EMPTY |
| CELL[25].OUT_BEL[19] | BITSLICE[21].RX_Q0 |
| CELL[25].OUT_BEL[20] | BITSLICE[21].RX_Q1 |
| CELL[25].OUT_BEL[21] | BITSLICE[21].RX_Q2 |
| CELL[25].OUT_BEL[22] | BITSLICE[21].RX_Q3 |
| CELL[25].OUT_BEL[23] | BITSLICE[21].RX_Q4 |
| CELL[25].OUT_BEL[24] | BITSLICE[21].RX_Q5 |
| CELL[25].OUT_BEL[25] | BITSLICE[21].RX_Q6 |
| CELL[25].OUT_BEL[26] | BITSLICE[21].RX_Q7 |
| CELL[25].OUT_BEL[27] | BITSLICE[21].TX_CNTVALUEOUT0 |
| CELL[25].OUT_BEL[28] | BITSLICE[21].TX_CNTVALUEOUT1 |
| CELL[25].OUT_BEL[29] | BITSLICE[21].TX_CNTVALUEOUT2 |
| CELL[25].OUT_BEL[30] | BITSLICE[21].TX_CNTVALUEOUT3 |
| CELL[25].OUT_BEL[31] | BITSLICE[21].TX_CNTVALUEOUT4 |
| CELL[25].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B7 |
| CELL[25].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK7 |
| CELL[25].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B8 |
| CELL[25].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B8 |
| CELL[25].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B8 |
| CELL[25].IMUX_BYP[6] | BITSLICE[20].TX_EN_VTC |
| CELL[25].IMUX_BYP[7] | BITSLICE[20].TX_CE_ODELAY |
| CELL[25].IMUX_BYP[8] | BITSLICE[20].RX_LD |
| CELL[25].IMUX_BYP[9] | BITSLICE[20].RX_INC |
| CELL[25].IMUX_BYP[10] | BITSLICE[20].RX_EN_VTC |
| CELL[25].IMUX_BYP[11] | BITSLICE[20].RX_CE_IDELAY |
| CELL[25].IMUX_BYP[12] | BITSLICE[20].DYN_DCI_OUT_INT |
| CELL[25].IMUX_BYP[13] | BITSLICE[21].TX_LD |
| CELL[25].IMUX_BYP[14] | BITSLICE[21].TX_INC |
| CELL[25].IMUX_BYP[15] | BITSLICE[21].TX_EN_VTC |
| CELL[25].IMUX_IMUX_DELAY[6] | BITSLICE[21].RX_CNTVALUEIN4 |
| CELL[25].IMUX_IMUX_DELAY[7] | BITSLICE[21].RX_CNTVALUEIN6 |
| CELL[25].IMUX_IMUX_DELAY[8] | BITSLICE_T[3].CNTVALUEIN1 |
| CELL[25].IMUX_IMUX_DELAY[9] | BITSLICE_T[3].CNTVALUEIN3 |
| CELL[25].IMUX_IMUX_DELAY[10] | BITSLICE_T[3].CNTVALUEIN7 |
| CELL[25].IMUX_IMUX_DELAY[11] | BITSLICE_CONTROL[3].CLB2RIU_NIBBLE_SEL |
| CELL[25].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[3].CLB2PHY_WRCS1_3 |
| CELL[25].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[3].CLB2PHY_WRCS0_1 |
| CELL[25].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[3].CLB2PHY_T_B1 |
| CELL[25].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[3].CLB2PHY_T_B3 |
| CELL[25].IMUX_IMUX_DELAY[16] | BITSLICE[21].TX_D7 |
| CELL[25].IMUX_IMUX_DELAY[18] | BITSLICE[21].TX_CNTVALUEIN0 |
| CELL[25].IMUX_IMUX_DELAY[19] | BITSLICE[21].TX_CNTVALUEIN1 |
| CELL[25].IMUX_IMUX_DELAY[20] | BITSLICE[21].TX_CNTVALUEIN2 |
| CELL[25].IMUX_IMUX_DELAY[21] | BITSLICE[21].TX_CNTVALUEIN3 |
| CELL[25].IMUX_IMUX_DELAY[22] | BITSLICE[21].TX_CNTVALUEIN4 |
| CELL[25].IMUX_IMUX_DELAY[23] | BITSLICE[21].TX_CNTVALUEIN5 |
| CELL[25].IMUX_IMUX_DELAY[24] | BITSLICE[21].TX_CNTVALUEIN6 |
| CELL[25].IMUX_IMUX_DELAY[25] | BITSLICE[21].TX_CNTVALUEIN7 |
| CELL[25].IMUX_IMUX_DELAY[26] | BITSLICE[21].TX_CNTVALUEIN8 |
| CELL[25].IMUX_IMUX_DELAY[27] | BITSLICE[21].RX_CNTVALUEIN0 |
| CELL[25].IMUX_IMUX_DELAY[28] | BITSLICE[21].RX_CNTVALUEIN1 |
| CELL[25].IMUX_IMUX_DELAY[29] | BITSLICE[21].RX_CNTVALUEIN2 |
| CELL[25].IMUX_IMUX_DELAY[30] | BITSLICE[21].RX_CNTVALUEIN3 |
| CELL[25].IMUX_IMUX_DELAY[31] | BITSLICE[21].RX_CNTVALUEIN5 |
| CELL[25].IMUX_IMUX_DELAY[32] | BITSLICE[21].RX_CNTVALUEIN7 |
| CELL[25].IMUX_IMUX_DELAY[33] | BITSLICE[21].RX_CNTVALUEIN8 |
| CELL[25].IMUX_IMUX_DELAY[34] | BITSLICE_T[3].CNTVALUEIN0 |
| CELL[25].IMUX_IMUX_DELAY[35] | BITSLICE_T[3].CNTVALUEIN2 |
| CELL[25].IMUX_IMUX_DELAY[36] | BITSLICE_T[3].CNTVALUEIN4 |
| CELL[25].IMUX_IMUX_DELAY[37] | BITSLICE_T[3].CNTVALUEIN5 |
| CELL[25].IMUX_IMUX_DELAY[38] | BITSLICE_T[3].CNTVALUEIN6 |
| CELL[25].IMUX_IMUX_DELAY[39] | BITSLICE_T[3].CNTVALUEIN8 |
| CELL[25].IMUX_IMUX_DELAY[40] | BITSLICE_CONTROL[3].CLB2PHY_WRCS1_0 |
| CELL[25].IMUX_IMUX_DELAY[41] | BITSLICE_CONTROL[3].CLB2PHY_WRCS1_1 |
| CELL[25].IMUX_IMUX_DELAY[42] | BITSLICE_CONTROL[3].CLB2PHY_WRCS1_2 |
| CELL[25].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[3].CLB2PHY_WRCS0_0 |
| CELL[25].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[3].CLB2PHY_WRCS0_2 |
| CELL[25].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[3].CLB2PHY_WRCS0_3 |
| CELL[25].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[3].CLB2PHY_T_B0 |
| CELL[25].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[3].CLB2PHY_T_B2 |
| CELL[26].OUT_BEL[4] | BITSLICE[21].TX_CNTVALUEOUT5 |
| CELL[26].OUT_BEL[5] | BITSLICE[21].TX_CNTVALUEOUT6 |
| CELL[26].OUT_BEL[6] | BITSLICE[21].TX_CNTVALUEOUT7 |
| CELL[26].OUT_BEL[7] | BITSLICE[21].TX_CNTVALUEOUT8 |
| CELL[26].OUT_BEL[8] | BITSLICE[23].TX_T_OUT |
| CELL[26].OUT_BEL[9] | BITSLICE[21].RX_CNTVALUEOUT0 |
| CELL[26].OUT_BEL[10] | BITSLICE[21].RX_CNTVALUEOUT1 |
| CELL[26].OUT_BEL[11] | BITSLICE[21].RX_CNTVALUEOUT2 |
| CELL[26].OUT_BEL[12] | BITSLICE[21].RX_CNTVALUEOUT3 |
| CELL[26].OUT_BEL[13] | BITSLICE[21].RX_CNTVALUEOUT4 |
| CELL[26].OUT_BEL[14] | BITSLICE[21].RX_CNTVALUEOUT5 |
| CELL[26].OUT_BEL[15] | BITSLICE[21].RX_CNTVALUEOUT6 |
| CELL[26].OUT_BEL[16] | BITSLICE[21].RX_CNTVALUEOUT7 |
| CELL[26].OUT_BEL[17] | BITSLICE[21].RX_CNTVALUEOUT8 |
| CELL[26].OUT_BEL[18] | BITSLICE_T[3].CNTVALUEOUT0 |
| CELL[26].OUT_BEL[19] | BITSLICE_T[3].CNTVALUEOUT1 |
| CELL[26].OUT_BEL[20] | BITSLICE_T[3].CNTVALUEOUT2 |
| CELL[26].OUT_BEL[21] | BITSLICE_T[3].CNTVALUEOUT3 |
| CELL[26].OUT_BEL[22] | BITSLICE_T[3].CNTVALUEOUT4 |
| CELL[26].OUT_BEL[23] | BITSLICE_T[3].CNTVALUEOUT5 |
| CELL[26].OUT_BEL[24] | BITSLICE_T[3].CNTVALUEOUT6 |
| CELL[26].OUT_BEL[25] | BITSLICE_T[3].CNTVALUEOUT7 |
| CELL[26].OUT_BEL[26] | BITSLICE_T[3].CNTVALUEOUT8 |
| CELL[26].OUT_BEL[27] | BITSLICE_CONTROL[3].PHY2CLB_PHY_RDY |
| CELL[26].OUT_BEL[28] | BITSLICE_CONTROL[3].MASTER_PD_OUT |
| CELL[26].OUT_BEL[29] | BITSLICE_CONTROL[3].PHY2CLB_FIXDLY_RDY |
| CELL[26].OUT_BEL[30] | BITSLICE_CONTROL[3].CTRL_DLY_TEST_OUT |
| CELL[26].OUT_BEL[31] | BITSLICE[24].TX_T_OUT |
| CELL[26].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B8 |
| CELL[26].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK8 |
| CELL[26].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].TRISTATE_ODELAY_RST_B1 |
| CELL[26].IMUX_CTRL[6] | BITSLICE_CONTROL[3].REFCLK |
| CELL[26].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].CTRL_RST_B_UPP |
| CELL[26].IMUX_BYP[6] | BITSLICE[21].TX_CE_ODELAY |
| CELL[26].IMUX_BYP[8] | BITSLICE[21].RX_LD |
| CELL[26].IMUX_BYP[9] | BITSLICE[21].RX_INC |
| CELL[26].IMUX_BYP[10] | BITSLICE[21].RX_EN_VTC |
| CELL[26].IMUX_BYP[11] | BITSLICE[21].RX_CE_IDELAY |
| CELL[26].IMUX_BYP[12] | BITSLICE[21].DYN_DCI_OUT_INT |
| CELL[26].IMUX_BYP[13] | BITSLICE_T[3].CE_OFD |
| CELL[26].IMUX_BYP[14] | BITSLICE_T[3].LD |
| CELL[26].IMUX_BYP[15] | BITSLICE_T[3].INC |
| CELL[26].IMUX_IMUX_DELAY[6] | BITSLICE[22].RX_DATAIN1 |
| CELL[26].IMUX_IMUX_DELAY[7] | BITSLICE[22].TX_D0 |
| CELL[26].IMUX_IMUX_DELAY[8] | BITSLICE[22].TX_D4 |
| CELL[26].IMUX_IMUX_DELAY[9] | BITSLICE[22].TX_D6 |
| CELL[26].IMUX_IMUX_DELAY[10] | BITSLICE[22].TX_CNTVALUEIN2 |
| CELL[26].IMUX_IMUX_DELAY[11] | BITSLICE[22].TX_CNTVALUEIN4 |
| CELL[26].IMUX_IMUX_DELAY[12] | BITSLICE[22].TX_CNTVALUEIN7 |
| CELL[26].IMUX_IMUX_DELAY[13] | BITSLICE[22].RX_CNTVALUEIN0 |
| CELL[26].IMUX_IMUX_DELAY[14] | BITSLICE[22].RX_CNTVALUEIN4 |
| CELL[26].IMUX_IMUX_DELAY[15] | BITSLICE[22].RX_CNTVALUEIN6 |
| CELL[26].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[3].CLB2PHY_RDEN0 |
| CELL[26].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[3].CLB2PHY_RDEN1 |
| CELL[26].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[3].CLB2PHY_RDEN2 |
| CELL[26].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[3].CLB2PHY_RDEN3 |
| CELL[26].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[3].CLB2PHY_RDCS1_0 |
| CELL[26].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[3].CLB2PHY_RDCS1_1 |
| CELL[26].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[3].CLB2PHY_RDCS1_2 |
| CELL[26].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[3].CLB2PHY_RDCS1_3 |
| CELL[26].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[3].CLB2PHY_RDCS0_0 |
| CELL[26].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[3].CLB2PHY_RDCS0_1 |
| CELL[26].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[3].CLB2PHY_RDCS0_2 |
| CELL[26].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[3].CLB2PHY_RDCS0_3 |
| CELL[26].IMUX_IMUX_DELAY[28] | BITSLICE[22].TX_T |
| CELL[26].IMUX_IMUX_DELAY[29] | BITSLICE[22].TX_CE_OFD |
| CELL[26].IMUX_IMUX_DELAY[30] | BITSLICE[22].RX_CE_IFD |
| CELL[26].IMUX_IMUX_DELAY[31] | BITSLICE[22].CLB2PHY_FIFO_RDEN |
| CELL[26].IMUX_IMUX_DELAY[32] | BITSLICE[22].TX_D1 |
| CELL[26].IMUX_IMUX_DELAY[33] | BITSLICE[22].TX_D2 |
| CELL[26].IMUX_IMUX_DELAY[34] | BITSLICE[22].TX_D3 |
| CELL[26].IMUX_IMUX_DELAY[35] | BITSLICE[22].TX_D5 |
| CELL[26].IMUX_IMUX_DELAY[36] | BITSLICE[22].TX_D7 |
| CELL[26].IMUX_IMUX_DELAY[37] | BITSLICE[22].TX_CNTVALUEIN0 |
| CELL[26].IMUX_IMUX_DELAY[38] | BITSLICE[22].TX_CNTVALUEIN1 |
| CELL[26].IMUX_IMUX_DELAY[39] | BITSLICE[22].TX_CNTVALUEIN3 |
| CELL[26].IMUX_IMUX_DELAY[40] | BITSLICE[22].TX_CNTVALUEIN5 |
| CELL[26].IMUX_IMUX_DELAY[41] | BITSLICE[22].TX_CNTVALUEIN6 |
| CELL[26].IMUX_IMUX_DELAY[43] | BITSLICE[22].TX_CNTVALUEIN8 |
| CELL[26].IMUX_IMUX_DELAY[44] | BITSLICE[22].RX_CNTVALUEIN1 |
| CELL[26].IMUX_IMUX_DELAY[45] | BITSLICE[22].RX_CNTVALUEIN2 |
| CELL[26].IMUX_IMUX_DELAY[46] | BITSLICE[22].RX_CNTVALUEIN3 |
| CELL[26].IMUX_IMUX_DELAY[47] | BITSLICE[22].RX_CNTVALUEIN5 |
| CELL[27].OUT_BEL[4] | BITSLICE[22].PHY2CLB_FIFO_EMPTY |
| CELL[27].OUT_BEL[5] | BITSLICE[22].RX_Q0 |
| CELL[27].OUT_BEL[6] | BITSLICE[22].RX_Q1 |
| CELL[27].OUT_BEL[7] | BITSLICE[22].RX_Q2 |
| CELL[27].OUT_BEL[8] | BITSLICE[22].RX_Q3 |
| CELL[27].OUT_BEL[9] | BITSLICE[22].RX_Q4 |
| CELL[27].OUT_BEL[10] | BITSLICE[22].RX_Q5 |
| CELL[27].OUT_BEL[11] | BITSLICE[22].RX_Q6 |
| CELL[27].OUT_BEL[12] | BITSLICE[22].RX_Q7 |
| CELL[27].OUT_BEL[13] | BITSLICE[22].TX_CNTVALUEOUT0 |
| CELL[27].OUT_BEL[14] | BITSLICE[22].TX_CNTVALUEOUT1 |
| CELL[27].OUT_BEL[15] | BITSLICE[22].TX_CNTVALUEOUT2 |
| CELL[27].OUT_BEL[16] | BITSLICE[22].TX_CNTVALUEOUT3 |
| CELL[27].OUT_BEL[17] | BITSLICE[22].TX_CNTVALUEOUT4 |
| CELL[27].OUT_BEL[18] | BITSLICE[22].TX_CNTVALUEOUT5 |
| CELL[27].OUT_BEL[19] | BITSLICE[22].TX_CNTVALUEOUT6 |
| CELL[27].OUT_BEL[20] | BITSLICE[22].TX_CNTVALUEOUT7 |
| CELL[27].OUT_BEL[21] | BITSLICE[22].TX_CNTVALUEOUT8 |
| CELL[27].OUT_BEL[22] | BITSLICE[25].TX_T_OUT |
| CELL[27].OUT_BEL[23] | BITSLICE[22].RX_CNTVALUEOUT0 |
| CELL[27].OUT_BEL[24] | BITSLICE[22].RX_CNTVALUEOUT1 |
| CELL[27].OUT_BEL[25] | BITSLICE[22].RX_CNTVALUEOUT2 |
| CELL[27].OUT_BEL[26] | BITSLICE[22].RX_CNTVALUEOUT3 |
| CELL[27].OUT_BEL[27] | BITSLICE[22].RX_CNTVALUEOUT4 |
| CELL[27].OUT_BEL[28] | BITSLICE[22].RX_CNTVALUEOUT5 |
| CELL[27].OUT_BEL[29] | BITSLICE[22].RX_CNTVALUEOUT6 |
| CELL[27].OUT_BEL[30] | BITSLICE[22].RX_CNTVALUEOUT7 |
| CELL[27].OUT_BEL[31] | BITSLICE[22].RX_CNTVALUEOUT8 |
| CELL[27].IMUX_CTRL[2] | BITSLICE_CONTROL[3].RIU_CLK, XIPHY_FEEDTHROUGH[1].CLB2PHY_CTRL_CLK_UPP |
| CELL[27].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B9 |
| CELL[27].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B9 |
| CELL[27].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B9 |
| CELL[27].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B9 |
| CELL[27].IMUX_BYP[6] | BITSLICE_T[3].CE_ODELAY |
| CELL[27].IMUX_BYP[7] | BITSLICE_CONTROL[3].EN_VTC |
| CELL[27].IMUX_BYP[8] | BITSLICE_CONTROL[3].CTRL_DLY_TEST_IN |
| CELL[27].IMUX_BYP[9] | BITSLICE[22].TX_LD |
| CELL[27].IMUX_BYP[10] | BITSLICE[22].TX_INC |
| CELL[27].IMUX_BYP[11] | BITSLICE[22].TX_EN_VTC |
| CELL[27].IMUX_BYP[12] | BITSLICE[22].TX_CE_ODELAY |
| CELL[27].IMUX_BYP[13] | BITSLICE[22].RX_LD |
| CELL[27].IMUX_BYP[14] | BITSLICE[22].RX_INC |
| CELL[27].IMUX_BYP[15] | BITSLICE[22].RX_EN_VTC |
| CELL[27].IMUX_IMUX_DELAY[6] | BITSLICE[23].TX_CNTVALUEIN0 |
| CELL[27].IMUX_IMUX_DELAY[7] | BITSLICE[23].TX_CNTVALUEIN2 |
| CELL[27].IMUX_IMUX_DELAY[8] | BITSLICE[23].TX_CNTVALUEIN6 |
| CELL[27].IMUX_IMUX_DELAY[9] | BITSLICE[23].TX_CNTVALUEIN8 |
| CELL[27].IMUX_IMUX_DELAY[10] | BITSLICE[23].RX_CNTVALUEIN3 |
| CELL[27].IMUX_IMUX_DELAY[11] | BITSLICE[23].RX_CNTVALUEIN5 |
| CELL[27].IMUX_IMUX_DELAY[12] | BITSLICE[24].TX_T |
| CELL[27].IMUX_IMUX_DELAY[13] | BITSLICE[24].RX_CE_IFD |
| CELL[27].IMUX_IMUX_DELAY[14] | BITSLICE[24].TX_D1 |
| CELL[27].IMUX_IMUX_DELAY[15] | BITSLICE[24].TX_D3 |
| CELL[27].IMUX_IMUX_DELAY[16] | BITSLICE[22].RX_CNTVALUEIN7 |
| CELL[27].IMUX_IMUX_DELAY[17] | BITSLICE[22].RX_CNTVALUEIN8 |
| CELL[27].IMUX_IMUX_DELAY[18] | BITSLICE[23].TX_T |
| CELL[27].IMUX_IMUX_DELAY[19] | BITSLICE[23].TX_CE_OFD |
| CELL[27].IMUX_IMUX_DELAY[20] | BITSLICE[23].RX_CE_IFD |
| CELL[27].IMUX_IMUX_DELAY[21] | BITSLICE[23].RX_DATAIN1 |
| CELL[27].IMUX_IMUX_DELAY[22] | BITSLICE[23].CLB2PHY_FIFO_RDEN |
| CELL[27].IMUX_IMUX_DELAY[23] | BITSLICE[23].TX_D5 |
| CELL[27].IMUX_IMUX_DELAY[24] | BITSLICE[23].TX_D4 |
| CELL[27].IMUX_IMUX_DELAY[25] | BITSLICE[23].TX_D3 |
| CELL[27].IMUX_IMUX_DELAY[26] | BITSLICE[23].TX_D2 |
| CELL[27].IMUX_IMUX_DELAY[27] | BITSLICE[23].TX_D1 |
| CELL[27].IMUX_IMUX_DELAY[28] | BITSLICE[23].TX_D0 |
| CELL[27].IMUX_IMUX_DELAY[29] | BITSLICE[23].TX_D6 |
| CELL[27].IMUX_IMUX_DELAY[30] | BITSLICE[23].TX_D7 |
| CELL[27].IMUX_IMUX_DELAY[31] | BITSLICE[23].TX_CNTVALUEIN1 |
| CELL[27].IMUX_IMUX_DELAY[32] | BITSLICE[23].TX_CNTVALUEIN3 |
| CELL[27].IMUX_IMUX_DELAY[33] | BITSLICE[23].TX_CNTVALUEIN4 |
| CELL[27].IMUX_IMUX_DELAY[34] | BITSLICE[23].TX_CNTVALUEIN5 |
| CELL[27].IMUX_IMUX_DELAY[35] | BITSLICE[23].TX_CNTVALUEIN7 |
| CELL[27].IMUX_IMUX_DELAY[36] | BITSLICE[23].RX_CNTVALUEIN0 |
| CELL[27].IMUX_IMUX_DELAY[37] | BITSLICE[23].RX_CNTVALUEIN1 |
| CELL[27].IMUX_IMUX_DELAY[38] | BITSLICE[23].RX_CNTVALUEIN2 |
| CELL[27].IMUX_IMUX_DELAY[39] | BITSLICE[23].RX_CNTVALUEIN4 |
| CELL[27].IMUX_IMUX_DELAY[40] | BITSLICE[23].RX_CNTVALUEIN6 |
| CELL[27].IMUX_IMUX_DELAY[41] | BITSLICE[23].RX_CNTVALUEIN7 |
| CELL[27].IMUX_IMUX_DELAY[42] | BITSLICE[23].RX_CNTVALUEIN8 |
| CELL[27].IMUX_IMUX_DELAY[43] | BITSLICE[24].TX_CE_OFD |
| CELL[27].IMUX_IMUX_DELAY[44] | BITSLICE[24].RX_DATAIN1 |
| CELL[27].IMUX_IMUX_DELAY[45] | BITSLICE[24].CLB2PHY_FIFO_RDEN |
| CELL[27].IMUX_IMUX_DELAY[46] | BITSLICE[24].TX_D0 |
| CELL[27].IMUX_IMUX_DELAY[47] | BITSLICE[24].TX_D2 |
| CELL[28].OUT_BEL[4] | BITSLICE[23].PHY2CLB_FIFO_EMPTY |
| CELL[28].OUT_BEL[5] | BITSLICE[23].RX_Q0 |
| CELL[28].OUT_BEL[6] | BITSLICE[23].RX_Q1 |
| CELL[28].OUT_BEL[7] | BITSLICE[23].RX_Q2 |
| CELL[28].OUT_BEL[8] | BITSLICE[23].RX_Q3 |
| CELL[28].OUT_BEL[9] | BITSLICE[23].RX_Q4 |
| CELL[28].OUT_BEL[10] | BITSLICE[23].RX_Q5 |
| CELL[28].OUT_BEL[11] | BITSLICE[23].RX_Q6 |
| CELL[28].OUT_BEL[12] | BITSLICE[23].RX_Q7 |
| CELL[28].OUT_BEL[13] | BITSLICE[23].TX_CNTVALUEOUT0 |
| CELL[28].OUT_BEL[14] | BITSLICE[23].TX_CNTVALUEOUT1 |
| CELL[28].OUT_BEL[15] | BITSLICE[23].TX_CNTVALUEOUT2 |
| CELL[28].OUT_BEL[16] | BITSLICE[23].TX_CNTVALUEOUT3 |
| CELL[28].OUT_BEL[17] | BITSLICE[23].TX_CNTVALUEOUT4 |
| CELL[28].OUT_BEL[18] | BITSLICE[23].TX_CNTVALUEOUT5 |
| CELL[28].OUT_BEL[19] | BITSLICE[23].TX_CNTVALUEOUT6 |
| CELL[28].OUT_BEL[20] | BITSLICE[23].TX_CNTVALUEOUT7 |
| CELL[28].OUT_BEL[21] | BITSLICE[23].TX_CNTVALUEOUT8 |
| CELL[28].OUT_BEL[23] | BITSLICE[23].RX_CNTVALUEOUT0 |
| CELL[28].OUT_BEL[24] | BITSLICE[23].RX_CNTVALUEOUT1 |
| CELL[28].OUT_BEL[25] | BITSLICE[23].RX_CNTVALUEOUT2 |
| CELL[28].OUT_BEL[26] | BITSLICE[23].RX_CNTVALUEOUT3 |
| CELL[28].OUT_BEL[27] | BITSLICE[23].RX_CNTVALUEOUT4 |
| CELL[28].OUT_BEL[28] | BITSLICE[23].RX_CNTVALUEOUT5 |
| CELL[28].OUT_BEL[29] | BITSLICE[23].RX_CNTVALUEOUT6 |
| CELL[28].OUT_BEL[30] | BITSLICE[23].RX_CNTVALUEOUT7 |
| CELL[28].OUT_BEL[31] | BITSLICE[23].RX_CNTVALUEOUT8 |
| CELL[28].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK9 |
| CELL[28].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B10 |
| CELL[28].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B10 |
| CELL[28].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B10 |
| CELL[28].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B10 |
| CELL[28].IMUX_BYP[6] | BITSLICE[22].RX_CE_IDELAY |
| CELL[28].IMUX_BYP[7] | BITSLICE[22].DYN_DCI_OUT_INT |
| CELL[28].IMUX_BYP[8] | BITSLICE[23].TX_LD |
| CELL[28].IMUX_BYP[9] | BITSLICE[23].TX_INC |
| CELL[28].IMUX_BYP[10] | BITSLICE[23].TX_EN_VTC |
| CELL[28].IMUX_BYP[11] | BITSLICE[23].TX_CE_ODELAY |
| CELL[28].IMUX_BYP[12] | BITSLICE[23].RX_LD |
| CELL[28].IMUX_BYP[13] | BITSLICE[23].RX_INC |
| CELL[28].IMUX_BYP[14] | BITSLICE[23].RX_EN_VTC |
| CELL[28].IMUX_BYP[15] | BITSLICE[23].RX_CE_IDELAY |
| CELL[28].IMUX_IMUX_DELAY[6] | BITSLICE[24].TX_D5 |
| CELL[28].IMUX_IMUX_DELAY[7] | BITSLICE[24].TX_D6 |
| CELL[28].IMUX_IMUX_DELAY[8] | BITSLICE[24].TX_D7 |
| CELL[28].IMUX_IMUX_DELAY[9] | BITSLICE[24].TX_CNTVALUEIN0 |
| CELL[28].IMUX_IMUX_DELAY[10] | BITSLICE[24].TX_CNTVALUEIN1 |
| CELL[28].IMUX_IMUX_DELAY[11] | BITSLICE[24].TX_CNTVALUEIN2 |
| CELL[28].IMUX_IMUX_DELAY[12] | BITSLICE[24].TX_CNTVALUEIN3 |
| CELL[28].IMUX_IMUX_DELAY[13] | BITSLICE[24].TX_CNTVALUEIN4 |
| CELL[28].IMUX_IMUX_DELAY[14] | BITSLICE[24].TX_CNTVALUEIN5 |
| CELL[28].IMUX_IMUX_DELAY[15] | BITSLICE[24].TX_CNTVALUEIN6 |
| CELL[28].IMUX_IMUX_DELAY[16] | BITSLICE[24].TX_D4 |
| CELL[29].OUT_BEL[4] | BITSLICE[24].PHY2CLB_FIFO_EMPTY |
| CELL[29].OUT_BEL[5] | BITSLICE[24].RX_Q0 |
| CELL[29].OUT_BEL[6] | BITSLICE[24].RX_Q1 |
| CELL[29].OUT_BEL[7] | BITSLICE[24].RX_Q2 |
| CELL[29].OUT_BEL[8] | BITSLICE[24].RX_Q3 |
| CELL[29].OUT_BEL[9] | BITSLICE[24].RX_Q4 |
| CELL[29].OUT_BEL[10] | BITSLICE[24].RX_Q5 |
| CELL[29].OUT_BEL[11] | BITSLICE[24].RX_Q6 |
| CELL[29].OUT_BEL[12] | BITSLICE[24].RX_Q7 |
| CELL[29].OUT_BEL[13] | BITSLICE[24].TX_CNTVALUEOUT0 |
| CELL[29].OUT_BEL[14] | BITSLICE[24].TX_CNTVALUEOUT1 |
| CELL[29].OUT_BEL[15] | BITSLICE[24].TX_CNTVALUEOUT2 |
| CELL[29].OUT_BEL[16] | BITSLICE[24].TX_CNTVALUEOUT3 |
| CELL[29].OUT_BEL[17] | BITSLICE[24].TX_CNTVALUEOUT4 |
| CELL[29].OUT_BEL[18] | BITSLICE[24].TX_CNTVALUEOUT5 |
| CELL[29].OUT_BEL[19] | BITSLICE[24].TX_CNTVALUEOUT6 |
| CELL[29].OUT_BEL[20] | BITSLICE[24].TX_CNTVALUEOUT7 |
| CELL[29].OUT_BEL[21] | BITSLICE[24].TX_CNTVALUEOUT8 |
| CELL[29].OUT_BEL[23] | BITSLICE[24].RX_CNTVALUEOUT0 |
| CELL[29].OUT_BEL[24] | BITSLICE[24].RX_CNTVALUEOUT1 |
| CELL[29].OUT_BEL[25] | BITSLICE[24].RX_CNTVALUEOUT2 |
| CELL[29].OUT_BEL[26] | BITSLICE[24].RX_CNTVALUEOUT3 |
| CELL[29].OUT_BEL[27] | BITSLICE[24].RX_CNTVALUEOUT4 |
| CELL[29].OUT_BEL[28] | BITSLICE[24].RX_CNTVALUEOUT5 |
| CELL[29].OUT_BEL[29] | BITSLICE[24].RX_CNTVALUEOUT6 |
| CELL[29].OUT_BEL[30] | BITSLICE[24].RX_CNTVALUEOUT7 |
| CELL[29].OUT_BEL[31] | BITSLICE[24].RX_CNTVALUEOUT8 |
| CELL[29].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK10 |
| CELL[29].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[1].TXBIT_RST_B11 |
| CELL[29].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[1].RXBIT_RST_B11 |
| CELL[29].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[1].ODELAY_RST_B11 |
| CELL[29].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[1].IDELAY_RST_B11 |
| CELL[29].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[1].CLB2PHY_FIFO_CLK11 |
| CELL[29].IMUX_BYP[6] | BITSLICE[23].DYN_DCI_OUT_INT |
| CELL[29].IMUX_BYP[7] | BITSLICE[24].TX_LD |
| CELL[29].IMUX_BYP[8] | BITSLICE[24].TX_INC |
| CELL[29].IMUX_BYP[9] | BITSLICE[24].TX_EN_VTC |
| CELL[29].IMUX_BYP[10] | BITSLICE[24].TX_CE_ODELAY |
| CELL[29].IMUX_BYP[11] | BITSLICE[24].RX_LD |
| CELL[29].IMUX_BYP[12] | BITSLICE[24].RX_INC |
| CELL[29].IMUX_BYP[13] | BITSLICE[24].RX_EN_VTC |
| CELL[29].IMUX_BYP[14] | BITSLICE[24].RX_CE_IDELAY |
| CELL[29].IMUX_BYP[15] | BITSLICE[24].DYN_DCI_OUT_INT |
| CELL[29].IMUX_IMUX_DELAY[6] | BITSLICE[24].TX_CNTVALUEIN8 |
| CELL[29].IMUX_IMUX_DELAY[7] | BITSLICE[24].RX_CNTVALUEIN0 |
| CELL[29].IMUX_IMUX_DELAY[8] | BITSLICE[24].RX_CNTVALUEIN1 |
| CELL[29].IMUX_IMUX_DELAY[9] | BITSLICE[24].RX_CNTVALUEIN2 |
| CELL[29].IMUX_IMUX_DELAY[10] | BITSLICE[24].RX_CNTVALUEIN3 |
| CELL[29].IMUX_IMUX_DELAY[11] | BITSLICE[24].RX_CNTVALUEIN4 |
| CELL[29].IMUX_IMUX_DELAY[12] | BITSLICE[24].RX_CNTVALUEIN5 |
| CELL[29].IMUX_IMUX_DELAY[13] | BITSLICE[24].RX_CNTVALUEIN6 |
| CELL[29].IMUX_IMUX_DELAY[14] | BITSLICE[24].RX_CNTVALUEIN7 |
| CELL[29].IMUX_IMUX_DELAY[15] | BITSLICE[24].RX_CNTVALUEIN8 |
| CELL[29].IMUX_IMUX_DELAY[16] | BITSLICE[24].TX_CNTVALUEIN7 |
| CELL[30].OUT_BEL[4] | BITSLICE[26].PHY2CLB_FIFO_EMPTY |
| CELL[30].OUT_BEL[5] | BITSLICE[26].RX_Q0 |
| CELL[30].OUT_BEL[6] | BITSLICE[26].RX_Q1 |
| CELL[30].OUT_BEL[7] | BITSLICE[26].RX_Q2 |
| CELL[30].OUT_BEL[8] | BITSLICE[26].RX_Q3 |
| CELL[30].OUT_BEL[9] | BITSLICE[26].RX_Q4 |
| CELL[30].OUT_BEL[10] | BITSLICE[26].RX_Q5 |
| CELL[30].OUT_BEL[11] | BITSLICE[26].RX_Q6 |
| CELL[30].OUT_BEL[12] | BITSLICE[26].RX_Q7 |
| CELL[30].OUT_BEL[13] | BITSLICE[26].TX_CNTVALUEOUT0 |
| CELL[30].OUT_BEL[14] | BITSLICE[26].TX_CNTVALUEOUT1 |
| CELL[30].OUT_BEL[15] | BITSLICE[26].TX_CNTVALUEOUT2 |
| CELL[30].OUT_BEL[16] | BITSLICE[26].TX_CNTVALUEOUT3 |
| CELL[30].OUT_BEL[17] | BITSLICE[26].TX_CNTVALUEOUT4 |
| CELL[30].OUT_BEL[18] | BITSLICE[26].TX_CNTVALUEOUT5 |
| CELL[30].OUT_BEL[19] | BITSLICE[26].TX_CNTVALUEOUT6 |
| CELL[30].OUT_BEL[20] | BITSLICE[26].TX_CNTVALUEOUT7 |
| CELL[30].OUT_BEL[21] | BITSLICE[26].TX_CNTVALUEOUT8 |
| CELL[30].OUT_BEL[22] | BITSLICE[26].TX_T_OUT |
| CELL[30].OUT_BEL[23] | BITSLICE[26].RX_CNTVALUEOUT0 |
| CELL[30].OUT_BEL[24] | BITSLICE[26].RX_CNTVALUEOUT1 |
| CELL[30].OUT_BEL[25] | BITSLICE[26].RX_CNTVALUEOUT2 |
| CELL[30].OUT_BEL[26] | BITSLICE[26].RX_CNTVALUEOUT3 |
| CELL[30].OUT_BEL[27] | BITSLICE[26].RX_CNTVALUEOUT4 |
| CELL[30].OUT_BEL[28] | BITSLICE[26].RX_CNTVALUEOUT5 |
| CELL[30].OUT_BEL[29] | BITSLICE[26].RX_CNTVALUEOUT6 |
| CELL[30].OUT_BEL[30] | BITSLICE[26].RX_CNTVALUEOUT7 |
| CELL[30].OUT_BEL[31] | BITSLICE[26].RX_CNTVALUEOUT8 |
| CELL[30].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].TXBIT_TRI_RST_B0 |
| CELL[30].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B0 |
| CELL[30].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B0 |
| CELL[30].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B0 |
| CELL[30].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B0 |
| CELL[30].IMUX_BYP[6] | BITSLICE_T[4].EN_VTC |
| CELL[30].IMUX_BYP[7] | BITSLICE[26].TX_LD |
| CELL[30].IMUX_BYP[8] | BITSLICE[26].TX_INC |
| CELL[30].IMUX_BYP[9] | BITSLICE[26].TX_EN_VTC |
| CELL[30].IMUX_BYP[10] | BITSLICE[26].TX_CE_ODELAY |
| CELL[30].IMUX_BYP[11] | BITSLICE[26].RX_LD |
| CELL[30].IMUX_BYP[12] | BITSLICE[26].RX_INC |
| CELL[30].IMUX_BYP[13] | BITSLICE[26].RX_EN_VTC |
| CELL[30].IMUX_BYP[14] | BITSLICE[26].RX_CE_IDELAY |
| CELL[30].IMUX_BYP[15] | BITSLICE[26].DYN_DCI_OUT_INT |
| CELL[30].IMUX_IMUX_DELAY[6] | BITSLICE[26].TX_CE_OFD |
| CELL[30].IMUX_IMUX_DELAY[7] | BITSLICE[26].RX_CE_IFD |
| CELL[30].IMUX_IMUX_DELAY[8] | BITSLICE[26].RX_DATAIN1 |
| CELL[30].IMUX_IMUX_DELAY[9] | BITSLICE[26].CLB2PHY_FIFO_RDEN |
| CELL[30].IMUX_IMUX_DELAY[10] | BITSLICE[26].TX_D7 |
| CELL[30].IMUX_IMUX_DELAY[11] | BITSLICE[26].TX_D6 |
| CELL[30].IMUX_IMUX_DELAY[12] | BITSLICE[26].TX_D5 |
| CELL[30].IMUX_IMUX_DELAY[13] | BITSLICE[26].TX_D4 |
| CELL[30].IMUX_IMUX_DELAY[14] | BITSLICE[26].TX_D3 |
| CELL[30].IMUX_IMUX_DELAY[15] | BITSLICE[26].TX_D2 |
| CELL[30].IMUX_IMUX_DELAY[16] | BITSLICE[26].TX_T |
| CELL[31].OUT_BEL[4] | BITSLICE[27].PHY2CLB_FIFO_EMPTY |
| CELL[31].OUT_BEL[5] | BITSLICE[27].RX_Q0 |
| CELL[31].OUT_BEL[6] | BITSLICE[27].RX_Q1 |
| CELL[31].OUT_BEL[7] | BITSLICE[27].RX_Q2 |
| CELL[31].OUT_BEL[8] | BITSLICE[27].RX_Q3 |
| CELL[31].OUT_BEL[9] | BITSLICE[27].RX_Q4 |
| CELL[31].OUT_BEL[10] | BITSLICE[27].RX_Q5 |
| CELL[31].OUT_BEL[11] | BITSLICE[27].RX_Q6 |
| CELL[31].OUT_BEL[12] | BITSLICE[27].RX_Q7 |
| CELL[31].OUT_BEL[13] | BITSLICE[27].TX_CNTVALUEOUT0 |
| CELL[31].OUT_BEL[14] | BITSLICE[27].TX_CNTVALUEOUT1 |
| CELL[31].OUT_BEL[15] | BITSLICE[27].TX_CNTVALUEOUT2 |
| CELL[31].OUT_BEL[16] | BITSLICE[27].TX_CNTVALUEOUT3 |
| CELL[31].OUT_BEL[17] | BITSLICE[27].TX_CNTVALUEOUT4 |
| CELL[31].OUT_BEL[18] | BITSLICE[27].TX_CNTVALUEOUT5 |
| CELL[31].OUT_BEL[19] | BITSLICE[27].TX_CNTVALUEOUT6 |
| CELL[31].OUT_BEL[20] | BITSLICE[27].TX_CNTVALUEOUT7 |
| CELL[31].OUT_BEL[21] | BITSLICE[27].TX_CNTVALUEOUT8 |
| CELL[31].OUT_BEL[22] | BITSLICE[27].TX_T_OUT |
| CELL[31].OUT_BEL[23] | BITSLICE[27].RX_CNTVALUEOUT0 |
| CELL[31].OUT_BEL[24] | BITSLICE[27].RX_CNTVALUEOUT1 |
| CELL[31].OUT_BEL[25] | BITSLICE[27].RX_CNTVALUEOUT2 |
| CELL[31].OUT_BEL[26] | BITSLICE[27].RX_CNTVALUEOUT3 |
| CELL[31].OUT_BEL[27] | BITSLICE[27].RX_CNTVALUEOUT4 |
| CELL[31].OUT_BEL[28] | BITSLICE[27].RX_CNTVALUEOUT5 |
| CELL[31].OUT_BEL[29] | BITSLICE[27].RX_CNTVALUEOUT6 |
| CELL[31].OUT_BEL[30] | BITSLICE[27].RX_CNTVALUEOUT7 |
| CELL[31].OUT_BEL[31] | BITSLICE[27].RX_CNTVALUEOUT8 |
| CELL[31].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK0 |
| CELL[31].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].TXBIT_TRI_RST_B1 |
| CELL[31].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B1 |
| CELL[31].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B1 |
| CELL[31].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B1 |
| CELL[31].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B1 |
| CELL[31].IMUX_BYP[6] | BITSLICE_T[5].EN_VTC |
| CELL[31].IMUX_BYP[7] | BITSLICE[27].TX_LD |
| CELL[31].IMUX_BYP[8] | BITSLICE[27].TX_INC |
| CELL[31].IMUX_BYP[9] | BITSLICE[27].TX_EN_VTC |
| CELL[31].IMUX_BYP[10] | BITSLICE[27].TX_CE_ODELAY |
| CELL[31].IMUX_BYP[11] | BITSLICE[27].RX_LD |
| CELL[31].IMUX_BYP[12] | BITSLICE[27].RX_INC |
| CELL[31].IMUX_BYP[13] | BITSLICE[27].RX_EN_VTC |
| CELL[31].IMUX_BYP[14] | BITSLICE[27].RX_CE_IDELAY |
| CELL[31].IMUX_BYP[15] | BITSLICE[27].DYN_DCI_OUT_INT |
| CELL[31].IMUX_IMUX_DELAY[6] | BITSLICE[26].TX_D1 |
| CELL[31].IMUX_IMUX_DELAY[7] | BITSLICE[26].TX_CNTVALUEIN0 |
| CELL[31].IMUX_IMUX_DELAY[8] | BITSLICE[26].TX_CNTVALUEIN1 |
| CELL[31].IMUX_IMUX_DELAY[9] | BITSLICE[26].TX_CNTVALUEIN2 |
| CELL[31].IMUX_IMUX_DELAY[10] | BITSLICE[26].TX_CNTVALUEIN3 |
| CELL[31].IMUX_IMUX_DELAY[11] | BITSLICE[26].TX_CNTVALUEIN4 |
| CELL[31].IMUX_IMUX_DELAY[12] | BITSLICE[26].TX_CNTVALUEIN5 |
| CELL[31].IMUX_IMUX_DELAY[13] | BITSLICE[26].TX_CNTVALUEIN6 |
| CELL[31].IMUX_IMUX_DELAY[14] | BITSLICE[26].TX_CNTVALUEIN7 |
| CELL[31].IMUX_IMUX_DELAY[15] | BITSLICE[26].TX_CNTVALUEIN8 |
| CELL[31].IMUX_IMUX_DELAY[16] | BITSLICE[26].TX_D0 |
| CELL[32].OUT_BEL[4] | BITSLICE[28].PHY2CLB_FIFO_EMPTY |
| CELL[32].OUT_BEL[5] | BITSLICE[28].RX_Q0 |
| CELL[32].OUT_BEL[6] | BITSLICE[28].RX_Q1 |
| CELL[32].OUT_BEL[7] | BITSLICE[28].RX_Q2 |
| CELL[32].OUT_BEL[8] | BITSLICE[28].RX_Q3 |
| CELL[32].OUT_BEL[9] | BITSLICE[28].RX_Q4 |
| CELL[32].OUT_BEL[10] | BITSLICE[28].RX_Q5 |
| CELL[32].OUT_BEL[11] | BITSLICE[28].RX_Q6 |
| CELL[32].OUT_BEL[12] | BITSLICE[28].RX_Q7 |
| CELL[32].OUT_BEL[13] | BITSLICE[28].TX_CNTVALUEOUT0 |
| CELL[32].OUT_BEL[14] | BITSLICE[28].TX_CNTVALUEOUT1 |
| CELL[32].OUT_BEL[15] | BITSLICE[28].TX_CNTVALUEOUT2 |
| CELL[32].OUT_BEL[16] | BITSLICE[28].TX_CNTVALUEOUT3 |
| CELL[32].OUT_BEL[17] | BITSLICE[28].TX_CNTVALUEOUT4 |
| CELL[32].OUT_BEL[18] | BITSLICE[28].TX_CNTVALUEOUT5 |
| CELL[32].OUT_BEL[19] | BITSLICE[28].TX_CNTVALUEOUT6 |
| CELL[32].OUT_BEL[20] | BITSLICE[28].TX_CNTVALUEOUT7 |
| CELL[32].OUT_BEL[21] | BITSLICE[28].TX_CNTVALUEOUT8 |
| CELL[32].OUT_BEL[22] | BITSLICE[28].TX_T_OUT |
| CELL[32].OUT_BEL[23] | BITSLICE[28].RX_CNTVALUEOUT0 |
| CELL[32].OUT_BEL[24] | BITSLICE[28].RX_CNTVALUEOUT1 |
| CELL[32].OUT_BEL[25] | BITSLICE[28].RX_CNTVALUEOUT2 |
| CELL[32].OUT_BEL[26] | BITSLICE[28].RX_CNTVALUEOUT3 |
| CELL[32].OUT_BEL[27] | BITSLICE[28].RX_CNTVALUEOUT4 |
| CELL[32].OUT_BEL[28] | BITSLICE[28].RX_CNTVALUEOUT5 |
| CELL[32].OUT_BEL[29] | BITSLICE[28].RX_CNTVALUEOUT6 |
| CELL[32].OUT_BEL[30] | BITSLICE[28].RX_CNTVALUEOUT7 |
| CELL[32].OUT_BEL[31] | BITSLICE[28].RX_CNTVALUEOUT8 |
| CELL[32].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK1 |
| CELL[32].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B2 |
| CELL[32].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B2 |
| CELL[32].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B2 |
| CELL[32].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B2 |
| CELL[32].IMUX_BYP[6] | BITSLICE[28].TX_LD |
| CELL[32].IMUX_BYP[7] | BITSLICE[28].TX_INC |
| CELL[32].IMUX_BYP[8] | BITSLICE[28].TX_EN_VTC |
| CELL[32].IMUX_BYP[9] | BITSLICE[28].TX_CE_ODELAY |
| CELL[32].IMUX_BYP[10] | BITSLICE[28].RX_LD |
| CELL[32].IMUX_BYP[11] | BITSLICE[28].RX_INC |
| CELL[32].IMUX_BYP[12] | BITSLICE[28].RX_EN_VTC |
| CELL[32].IMUX_BYP[13] | BITSLICE[28].RX_CE_IDELAY |
| CELL[32].IMUX_BYP[14] | BITSLICE[28].DYN_DCI_OUT_INT |
| CELL[32].IMUX_BYP[15] | BITSLICE_T[4].CE_OFD |
| CELL[32].IMUX_IMUX_DELAY[6] | BITSLICE[27].TX_D1 |
| CELL[32].IMUX_IMUX_DELAY[7] | BITSLICE[27].TX_D3 |
| CELL[32].IMUX_IMUX_DELAY[8] | BITSLICE[27].TX_D7 |
| CELL[32].IMUX_IMUX_DELAY[9] | BITSLICE[27].TX_CNTVALUEIN1 |
| CELL[32].IMUX_IMUX_DELAY[10] | BITSLICE[27].TX_CNTVALUEIN5 |
| CELL[32].IMUX_IMUX_DELAY[11] | BITSLICE[27].TX_CNTVALUEIN7 |
| CELL[32].IMUX_IMUX_DELAY[12] | BITSLICE[27].RX_CNTVALUEIN2 |
| CELL[32].IMUX_IMUX_DELAY[13] | BITSLICE[27].RX_CNTVALUEIN4 |
| CELL[32].IMUX_IMUX_DELAY[14] | BITSLICE[27].RX_CNTVALUEIN8 |
| CELL[32].IMUX_IMUX_DELAY[15] | BITSLICE[28].TX_CE_OFD |
| CELL[32].IMUX_IMUX_DELAY[16] | BITSLICE[26].RX_CNTVALUEIN0 |
| CELL[32].IMUX_IMUX_DELAY[17] | BITSLICE[26].RX_CNTVALUEIN1 |
| CELL[32].IMUX_IMUX_DELAY[18] | BITSLICE[26].RX_CNTVALUEIN2 |
| CELL[32].IMUX_IMUX_DELAY[19] | BITSLICE[26].RX_CNTVALUEIN3 |
| CELL[32].IMUX_IMUX_DELAY[20] | BITSLICE[26].RX_CNTVALUEIN4 |
| CELL[32].IMUX_IMUX_DELAY[21] | BITSLICE[26].RX_CNTVALUEIN5 |
| CELL[32].IMUX_IMUX_DELAY[22] | BITSLICE[26].RX_CNTVALUEIN6 |
| CELL[32].IMUX_IMUX_DELAY[23] | BITSLICE[26].RX_CNTVALUEIN7 |
| CELL[32].IMUX_IMUX_DELAY[24] | BITSLICE[26].RX_CNTVALUEIN8 |
| CELL[32].IMUX_IMUX_DELAY[25] | BITSLICE[27].TX_T |
| CELL[32].IMUX_IMUX_DELAY[26] | BITSLICE[27].TX_CE_OFD |
| CELL[32].IMUX_IMUX_DELAY[27] | BITSLICE[27].RX_CE_IFD |
| CELL[32].IMUX_IMUX_DELAY[28] | BITSLICE[27].RX_DATAIN1 |
| CELL[32].IMUX_IMUX_DELAY[29] | BITSLICE[27].CLB2PHY_FIFO_RDEN |
| CELL[32].IMUX_IMUX_DELAY[30] | BITSLICE[27].TX_D0 |
| CELL[32].IMUX_IMUX_DELAY[31] | BITSLICE[27].TX_D2 |
| CELL[32].IMUX_IMUX_DELAY[32] | BITSLICE[27].TX_D4 |
| CELL[32].IMUX_IMUX_DELAY[33] | BITSLICE[27].TX_D5 |
| CELL[32].IMUX_IMUX_DELAY[34] | BITSLICE[27].TX_D6 |
| CELL[32].IMUX_IMUX_DELAY[35] | BITSLICE[27].TX_CNTVALUEIN0 |
| CELL[32].IMUX_IMUX_DELAY[36] | BITSLICE[27].TX_CNTVALUEIN2 |
| CELL[32].IMUX_IMUX_DELAY[37] | BITSLICE[27].TX_CNTVALUEIN3 |
| CELL[32].IMUX_IMUX_DELAY[38] | BITSLICE[27].TX_CNTVALUEIN4 |
| CELL[32].IMUX_IMUX_DELAY[39] | BITSLICE[27].TX_CNTVALUEIN6 |
| CELL[32].IMUX_IMUX_DELAY[40] | BITSLICE[27].TX_CNTVALUEIN8 |
| CELL[32].IMUX_IMUX_DELAY[41] | BITSLICE[27].RX_CNTVALUEIN0 |
| CELL[32].IMUX_IMUX_DELAY[42] | BITSLICE[27].RX_CNTVALUEIN1 |
| CELL[32].IMUX_IMUX_DELAY[43] | BITSLICE[27].RX_CNTVALUEIN3 |
| CELL[32].IMUX_IMUX_DELAY[44] | BITSLICE[27].RX_CNTVALUEIN5 |
| CELL[32].IMUX_IMUX_DELAY[45] | BITSLICE[27].RX_CNTVALUEIN6 |
| CELL[32].IMUX_IMUX_DELAY[46] | BITSLICE[27].RX_CNTVALUEIN7 |
| CELL[32].IMUX_IMUX_DELAY[47] | BITSLICE[28].TX_T |
| CELL[33].OUT_BEL[4] | BITSLICE_T[4].CNTVALUEOUT0 |
| CELL[33].OUT_BEL[5] | BITSLICE_T[4].CNTVALUEOUT1 |
| CELL[33].OUT_BEL[6] | BITSLICE_T[4].CNTVALUEOUT2 |
| CELL[33].OUT_BEL[7] | BITSLICE_T[4].CNTVALUEOUT3 |
| CELL[33].OUT_BEL[8] | BITSLICE_T[4].CNTVALUEOUT4 |
| CELL[33].OUT_BEL[9] | BITSLICE_T[4].CNTVALUEOUT5 |
| CELL[33].OUT_BEL[10] | BITSLICE_T[4].CNTVALUEOUT6 |
| CELL[33].OUT_BEL[11] | BITSLICE_T[4].CNTVALUEOUT7 |
| CELL[33].OUT_BEL[12] | BITSLICE_T[4].CNTVALUEOUT8 |
| CELL[33].OUT_BEL[13] | BITSLICE[29].TX_T_OUT |
| CELL[33].OUT_BEL[14] | BITSLICE_CONTROL[4].PHY2CLB_PHY_RDY |
| CELL[33].OUT_BEL[15] | BITSLICE_CONTROL[4].MASTER_PD_OUT |
| CELL[33].OUT_BEL[16] | BITSLICE_CONTROL[4].PHY2CLB_FIXDLY_RDY |
| CELL[33].OUT_BEL[17] | BITSLICE_CONTROL[4].CTRL_DLY_TEST_OUT |
| CELL[33].OUT_BEL[18] | BITSLICE[29].PHY2CLB_FIFO_EMPTY |
| CELL[33].OUT_BEL[19] | BITSLICE[29].RX_Q0 |
| CELL[33].OUT_BEL[20] | BITSLICE[29].RX_Q1 |
| CELL[33].OUT_BEL[21] | BITSLICE[29].RX_Q2 |
| CELL[33].OUT_BEL[22] | BITSLICE[29].RX_Q3 |
| CELL[33].OUT_BEL[23] | BITSLICE[29].RX_Q4 |
| CELL[33].OUT_BEL[24] | BITSLICE[29].RX_Q5 |
| CELL[33].OUT_BEL[25] | BITSLICE[29].RX_Q6 |
| CELL[33].OUT_BEL[26] | BITSLICE[29].RX_Q7 |
| CELL[33].OUT_BEL[27] | BITSLICE[29].TX_CNTVALUEOUT0 |
| CELL[33].OUT_BEL[28] | BITSLICE[29].TX_CNTVALUEOUT1 |
| CELL[33].OUT_BEL[29] | BITSLICE[29].TX_CNTVALUEOUT2 |
| CELL[33].OUT_BEL[30] | BITSLICE[29].TX_CNTVALUEOUT3 |
| CELL[33].OUT_BEL[31] | BITSLICE[29].TX_CNTVALUEOUT4 |
| CELL[33].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK2 |
| CELL[33].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].TRISTATE_ODELAY_RST_B0 |
| CELL[33].IMUX_CTRL[5] | BITSLICE_CONTROL[4].REFCLK |
| CELL[33].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].CTRL_RST_B_LOW |
| CELL[33].IMUX_CTRL[7] | BITSLICE_CONTROL[4].RIU_CLK, XIPHY_FEEDTHROUGH[2].CLB2PHY_CTRL_CLK_LOW |
| CELL[33].IMUX_BYP[6] | BITSLICE_T[4].LD |
| CELL[33].IMUX_BYP[7] | BITSLICE_T[4].INC |
| CELL[33].IMUX_BYP[8] | BITSLICE_T[4].CE_ODELAY |
| CELL[33].IMUX_BYP[9] | BITSLICE_CONTROL[4].EN_VTC |
| CELL[33].IMUX_BYP[10] | BITSLICE_CONTROL[4].CTRL_DLY_TEST_IN |
| CELL[33].IMUX_BYP[12] | BITSLICE[29].TX_LD |
| CELL[33].IMUX_BYP[13] | BITSLICE[29].TX_INC |
| CELL[33].IMUX_BYP[14] | BITSLICE[29].TX_EN_VTC |
| CELL[33].IMUX_BYP[15] | BITSLICE[29].TX_CE_ODELAY |
| CELL[33].IMUX_IMUX_DELAY[6] | BITSLICE[28].TX_CNTVALUEIN3 |
| CELL[33].IMUX_IMUX_DELAY[7] | BITSLICE[28].TX_CNTVALUEIN5 |
| CELL[33].IMUX_IMUX_DELAY[8] | BITSLICE[28].RX_CNTVALUEIN0 |
| CELL[33].IMUX_IMUX_DELAY[9] | BITSLICE[28].RX_CNTVALUEIN2 |
| CELL[33].IMUX_IMUX_DELAY[10] | BITSLICE[28].RX_CNTVALUEIN6 |
| CELL[33].IMUX_IMUX_DELAY[11] | BITSLICE[28].RX_CNTVALUEIN8 |
| CELL[33].IMUX_IMUX_DELAY[12] | BITSLICE_T[4].CNTVALUEIN3 |
| CELL[33].IMUX_IMUX_DELAY[13] | BITSLICE_T[4].CNTVALUEIN5 |
| CELL[33].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[4].CLB2RIU_NIBBLE_SEL |
| CELL[33].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[4].CLB2PHY_WRCS1_1 |
| CELL[33].IMUX_IMUX_DELAY[16] | BITSLICE[28].RX_CE_IFD |
| CELL[33].IMUX_IMUX_DELAY[17] | BITSLICE[28].RX_DATAIN1 |
| CELL[33].IMUX_IMUX_DELAY[18] | BITSLICE[28].CLB2PHY_FIFO_RDEN |
| CELL[33].IMUX_IMUX_DELAY[20] | BITSLICE[28].TX_D0 |
| CELL[33].IMUX_IMUX_DELAY[21] | BITSLICE[28].TX_D1 |
| CELL[33].IMUX_IMUX_DELAY[22] | BITSLICE[28].TX_D2 |
| CELL[33].IMUX_IMUX_DELAY[23] | BITSLICE[28].TX_D3 |
| CELL[33].IMUX_IMUX_DELAY[24] | BITSLICE[28].TX_D4 |
| CELL[33].IMUX_IMUX_DELAY[25] | BITSLICE[28].TX_D5 |
| CELL[33].IMUX_IMUX_DELAY[26] | BITSLICE[28].TX_D6 |
| CELL[33].IMUX_IMUX_DELAY[27] | BITSLICE[28].TX_D7 |
| CELL[33].IMUX_IMUX_DELAY[28] | BITSLICE[28].TX_CNTVALUEIN0 |
| CELL[33].IMUX_IMUX_DELAY[29] | BITSLICE[28].TX_CNTVALUEIN1 |
| CELL[33].IMUX_IMUX_DELAY[30] | BITSLICE[28].TX_CNTVALUEIN2 |
| CELL[33].IMUX_IMUX_DELAY[31] | BITSLICE[28].TX_CNTVALUEIN4 |
| CELL[33].IMUX_IMUX_DELAY[32] | BITSLICE[28].TX_CNTVALUEIN6 |
| CELL[33].IMUX_IMUX_DELAY[33] | BITSLICE[28].TX_CNTVALUEIN7 |
| CELL[33].IMUX_IMUX_DELAY[34] | BITSLICE[28].TX_CNTVALUEIN8 |
| CELL[33].IMUX_IMUX_DELAY[35] | BITSLICE[28].RX_CNTVALUEIN1 |
| CELL[33].IMUX_IMUX_DELAY[36] | BITSLICE[28].RX_CNTVALUEIN3 |
| CELL[33].IMUX_IMUX_DELAY[37] | BITSLICE[28].RX_CNTVALUEIN4 |
| CELL[33].IMUX_IMUX_DELAY[38] | BITSLICE[28].RX_CNTVALUEIN5 |
| CELL[33].IMUX_IMUX_DELAY[39] | BITSLICE[28].RX_CNTVALUEIN7 |
| CELL[33].IMUX_IMUX_DELAY[40] | BITSLICE_T[4].CNTVALUEIN0 |
| CELL[33].IMUX_IMUX_DELAY[41] | BITSLICE_T[4].CNTVALUEIN1 |
| CELL[33].IMUX_IMUX_DELAY[42] | BITSLICE_T[4].CNTVALUEIN2 |
| CELL[33].IMUX_IMUX_DELAY[43] | BITSLICE_T[4].CNTVALUEIN4 |
| CELL[33].IMUX_IMUX_DELAY[44] | BITSLICE_T[4].CNTVALUEIN6 |
| CELL[33].IMUX_IMUX_DELAY[45] | BITSLICE_T[4].CNTVALUEIN7 |
| CELL[33].IMUX_IMUX_DELAY[46] | BITSLICE_T[4].CNTVALUEIN8 |
| CELL[33].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[4].CLB2PHY_WRCS1_0 |
| CELL[34].OUT_BEL[4] | BITSLICE[29].TX_CNTVALUEOUT5 |
| CELL[34].OUT_BEL[5] | BITSLICE[29].TX_CNTVALUEOUT6 |
| CELL[34].OUT_BEL[6] | BITSLICE[29].TX_CNTVALUEOUT7 |
| CELL[34].OUT_BEL[7] | BITSLICE[29].TX_CNTVALUEOUT8 |
| CELL[34].OUT_BEL[8] | BITSLICE[30].TX_T_OUT |
| CELL[34].OUT_BEL[9] | BITSLICE[29].RX_CNTVALUEOUT0 |
| CELL[34].OUT_BEL[10] | BITSLICE[29].RX_CNTVALUEOUT1 |
| CELL[34].OUT_BEL[11] | BITSLICE[29].RX_CNTVALUEOUT2 |
| CELL[34].OUT_BEL[12] | BITSLICE[29].RX_CNTVALUEOUT3 |
| CELL[34].OUT_BEL[13] | BITSLICE[29].RX_CNTVALUEOUT4 |
| CELL[34].OUT_BEL[14] | BITSLICE[29].RX_CNTVALUEOUT5 |
| CELL[34].OUT_BEL[15] | BITSLICE[29].RX_CNTVALUEOUT6 |
| CELL[34].OUT_BEL[16] | BITSLICE[29].RX_CNTVALUEOUT7 |
| CELL[34].OUT_BEL[17] | BITSLICE[29].RX_CNTVALUEOUT8 |
| CELL[34].OUT_BEL[18] | BITSLICE[30].PHY2CLB_FIFO_EMPTY |
| CELL[34].OUT_BEL[19] | BITSLICE[30].RX_Q0 |
| CELL[34].OUT_BEL[20] | BITSLICE[30].RX_Q1 |
| CELL[34].OUT_BEL[21] | BITSLICE[30].RX_Q2 |
| CELL[34].OUT_BEL[22] | BITSLICE[30].RX_Q3 |
| CELL[34].OUT_BEL[23] | BITSLICE[30].RX_Q4 |
| CELL[34].OUT_BEL[24] | BITSLICE[30].RX_Q5 |
| CELL[34].OUT_BEL[25] | BITSLICE[30].RX_Q6 |
| CELL[34].OUT_BEL[26] | BITSLICE[30].RX_Q7 |
| CELL[34].OUT_BEL[27] | BITSLICE[30].TX_CNTVALUEOUT0 |
| CELL[34].OUT_BEL[28] | BITSLICE[30].TX_CNTVALUEOUT1 |
| CELL[34].OUT_BEL[29] | BITSLICE[30].TX_CNTVALUEOUT2 |
| CELL[34].OUT_BEL[30] | BITSLICE[30].TX_CNTVALUEOUT3 |
| CELL[34].OUT_BEL[31] | BITSLICE[30].TX_CNTVALUEOUT4 |
| CELL[34].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B3 |
| CELL[34].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B3 |
| CELL[34].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B3 |
| CELL[34].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B3 |
| CELL[34].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK3 |
| CELL[34].IMUX_BYP[6] | BITSLICE[29].RX_LD |
| CELL[34].IMUX_BYP[7] | BITSLICE[29].RX_INC |
| CELL[34].IMUX_BYP[8] | BITSLICE[29].RX_EN_VTC |
| CELL[34].IMUX_BYP[9] | BITSLICE[29].RX_CE_IDELAY |
| CELL[34].IMUX_BYP[10] | BITSLICE[29].DYN_DCI_OUT_INT |
| CELL[34].IMUX_BYP[11] | BITSLICE[30].TX_LD |
| CELL[34].IMUX_BYP[12] | BITSLICE[30].TX_INC |
| CELL[34].IMUX_BYP[13] | BITSLICE[30].TX_EN_VTC |
| CELL[34].IMUX_BYP[14] | BITSLICE[30].TX_CE_ODELAY |
| CELL[34].IMUX_BYP[15] | BITSLICE[30].RX_LD |
| CELL[34].IMUX_IMUX_DELAY[6] | BITSLICE_CONTROL[4].CLB2PHY_RDCS1_1 |
| CELL[34].IMUX_IMUX_DELAY[7] | BITSLICE_CONTROL[4].CLB2PHY_RDCS1_3 |
| CELL[34].IMUX_IMUX_DELAY[8] | BITSLICE_CONTROL[4].CLB2PHY_RDCS0_3 |
| CELL[34].IMUX_IMUX_DELAY[9] | BITSLICE[29].TX_CE_OFD |
| CELL[34].IMUX_IMUX_DELAY[10] | BITSLICE[29].TX_D0 |
| CELL[34].IMUX_IMUX_DELAY[11] | BITSLICE[29].TX_D2 |
| CELL[34].IMUX_IMUX_DELAY[12] | BITSLICE[29].TX_D6 |
| CELL[34].IMUX_IMUX_DELAY[13] | BITSLICE[29].TX_D7 |
| CELL[34].IMUX_IMUX_DELAY[14] | BITSLICE[29].TX_CNTVALUEIN3 |
| CELL[34].IMUX_IMUX_DELAY[15] | BITSLICE[29].TX_CNTVALUEIN5 |
| CELL[34].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[4].CLB2PHY_WRCS1_2 |
| CELL[34].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[4].CLB2PHY_WRCS1_3 |
| CELL[34].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[4].CLB2PHY_WRCS0_0 |
| CELL[34].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[4].CLB2PHY_WRCS0_1 |
| CELL[34].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[4].CLB2PHY_WRCS0_2 |
| CELL[34].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[4].CLB2PHY_WRCS0_3 |
| CELL[34].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[4].CLB2PHY_T_B0 |
| CELL[34].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[4].CLB2PHY_T_B1 |
| CELL[34].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[4].CLB2PHY_T_B2 |
| CELL[34].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[4].CLB2PHY_T_B3 |
| CELL[34].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[4].CLB2PHY_RDEN0 |
| CELL[34].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[4].CLB2PHY_RDEN1 |
| CELL[34].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[4].CLB2PHY_RDEN2 |
| CELL[34].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[4].CLB2PHY_RDEN3 |
| CELL[34].IMUX_IMUX_DELAY[30] | BITSLICE_CONTROL[4].CLB2PHY_RDCS1_0 |
| CELL[34].IMUX_IMUX_DELAY[31] | BITSLICE_CONTROL[4].CLB2PHY_RDCS1_2 |
| CELL[34].IMUX_IMUX_DELAY[32] | BITSLICE_CONTROL[4].CLB2PHY_RDCS0_0 |
| CELL[34].IMUX_IMUX_DELAY[33] | BITSLICE_CONTROL[4].CLB2PHY_RDCS0_1 |
| CELL[34].IMUX_IMUX_DELAY[34] | BITSLICE_CONTROL[4].CLB2PHY_RDCS0_2 |
| CELL[34].IMUX_IMUX_DELAY[35] | BITSLICE[29].TX_T |
| CELL[34].IMUX_IMUX_DELAY[36] | BITSLICE[29].RX_CE_IFD |
| CELL[34].IMUX_IMUX_DELAY[37] | BITSLICE[29].RX_DATAIN1 |
| CELL[34].IMUX_IMUX_DELAY[38] | BITSLICE[29].CLB2PHY_FIFO_RDEN |
| CELL[34].IMUX_IMUX_DELAY[39] | BITSLICE[29].TX_D1 |
| CELL[34].IMUX_IMUX_DELAY[40] | BITSLICE[29].TX_D3 |
| CELL[34].IMUX_IMUX_DELAY[41] | BITSLICE[29].TX_D4 |
| CELL[34].IMUX_IMUX_DELAY[42] | BITSLICE[29].TX_D5 |
| CELL[34].IMUX_IMUX_DELAY[44] | BITSLICE[29].TX_CNTVALUEIN0 |
| CELL[34].IMUX_IMUX_DELAY[45] | BITSLICE[29].TX_CNTVALUEIN1 |
| CELL[34].IMUX_IMUX_DELAY[46] | BITSLICE[29].TX_CNTVALUEIN2 |
| CELL[34].IMUX_IMUX_DELAY[47] | BITSLICE[29].TX_CNTVALUEIN4 |
| CELL[35].OUT_BEL[4] | BITSLICE[30].TX_CNTVALUEOUT5 |
| CELL[35].OUT_BEL[5] | BITSLICE[30].TX_CNTVALUEOUT6 |
| CELL[35].OUT_BEL[6] | BITSLICE[30].TX_CNTVALUEOUT7 |
| CELL[35].OUT_BEL[7] | BITSLICE[30].TX_CNTVALUEOUT8 |
| CELL[35].OUT_BEL[8] | BITSLICE[31].TX_T_OUT |
| CELL[35].OUT_BEL[9] | BITSLICE[30].RX_CNTVALUEOUT0 |
| CELL[35].OUT_BEL[10] | BITSLICE[30].RX_CNTVALUEOUT1 |
| CELL[35].OUT_BEL[11] | BITSLICE[30].RX_CNTVALUEOUT2 |
| CELL[35].OUT_BEL[12] | BITSLICE[30].RX_CNTVALUEOUT3 |
| CELL[35].OUT_BEL[13] | BITSLICE[30].RX_CNTVALUEOUT4 |
| CELL[35].OUT_BEL[14] | BITSLICE[30].RX_CNTVALUEOUT5 |
| CELL[35].OUT_BEL[15] | BITSLICE[30].RX_CNTVALUEOUT6 |
| CELL[35].OUT_BEL[16] | BITSLICE[30].RX_CNTVALUEOUT7 |
| CELL[35].OUT_BEL[17] | BITSLICE[30].RX_CNTVALUEOUT8 |
| CELL[35].OUT_BEL[18] | BITSLICE[31].PHY2CLB_FIFO_EMPTY |
| CELL[35].OUT_BEL[19] | BITSLICE[31].RX_Q0 |
| CELL[35].OUT_BEL[20] | BITSLICE[31].RX_Q1 |
| CELL[35].OUT_BEL[21] | BITSLICE[31].RX_Q2 |
| CELL[35].OUT_BEL[22] | BITSLICE[31].RX_Q3 |
| CELL[35].OUT_BEL[23] | BITSLICE[31].RX_Q4 |
| CELL[35].OUT_BEL[24] | BITSLICE[31].RX_Q5 |
| CELL[35].OUT_BEL[25] | BITSLICE[31].RX_Q6 |
| CELL[35].OUT_BEL[26] | BITSLICE[31].RX_Q7 |
| CELL[35].OUT_BEL[27] | BITSLICE[31].TX_CNTVALUEOUT0 |
| CELL[35].OUT_BEL[28] | BITSLICE[31].TX_CNTVALUEOUT1 |
| CELL[35].OUT_BEL[29] | BITSLICE[31].TX_CNTVALUEOUT2 |
| CELL[35].OUT_BEL[30] | BITSLICE[31].TX_CNTVALUEOUT3 |
| CELL[35].OUT_BEL[31] | BITSLICE[31].TX_CNTVALUEOUT4 |
| CELL[35].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B4 |
| CELL[35].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B4 |
| CELL[35].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B4 |
| CELL[35].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B4 |
| CELL[35].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK4 |
| CELL[35].IMUX_BYP[6] | BITSLICE[30].RX_INC |
| CELL[35].IMUX_BYP[7] | BITSLICE[30].RX_EN_VTC |
| CELL[35].IMUX_BYP[8] | BITSLICE[30].RX_CE_IDELAY |
| CELL[35].IMUX_BYP[9] | BITSLICE[30].DYN_DCI_OUT_INT |
| CELL[35].IMUX_BYP[10] | BITSLICE[31].TX_LD |
| CELL[35].IMUX_BYP[11] | BITSLICE[31].TX_INC |
| CELL[35].IMUX_BYP[12] | BITSLICE[31].TX_EN_VTC |
| CELL[35].IMUX_BYP[13] | BITSLICE[31].TX_CE_ODELAY |
| CELL[35].IMUX_BYP[14] | BITSLICE[31].RX_LD |
| CELL[35].IMUX_BYP[15] | BITSLICE[31].RX_INC |
| CELL[35].IMUX_IMUX_DELAY[6] | BITSLICE[30].RX_DATAIN1 |
| CELL[35].IMUX_IMUX_DELAY[7] | BITSLICE[30].TX_D0 |
| CELL[35].IMUX_IMUX_DELAY[8] | BITSLICE[30].TX_D4 |
| CELL[35].IMUX_IMUX_DELAY[9] | BITSLICE[30].TX_D6 |
| CELL[35].IMUX_IMUX_DELAY[10] | BITSLICE[30].TX_CNTVALUEIN2 |
| CELL[35].IMUX_IMUX_DELAY[11] | BITSLICE[30].TX_CNTVALUEIN4 |
| CELL[35].IMUX_IMUX_DELAY[12] | BITSLICE[30].TX_CNTVALUEIN8 |
| CELL[35].IMUX_IMUX_DELAY[13] | BITSLICE[30].RX_CNTVALUEIN1 |
| CELL[35].IMUX_IMUX_DELAY[14] | BITSLICE[30].RX_CNTVALUEIN5 |
| CELL[35].IMUX_IMUX_DELAY[15] | BITSLICE[30].RX_CNTVALUEIN7 |
| CELL[35].IMUX_IMUX_DELAY[16] | BITSLICE[29].TX_CNTVALUEIN6 |
| CELL[35].IMUX_IMUX_DELAY[17] | BITSLICE[29].TX_CNTVALUEIN7 |
| CELL[35].IMUX_IMUX_DELAY[18] | BITSLICE[29].TX_CNTVALUEIN8 |
| CELL[35].IMUX_IMUX_DELAY[19] | BITSLICE[29].RX_CNTVALUEIN0 |
| CELL[35].IMUX_IMUX_DELAY[20] | BITSLICE[29].RX_CNTVALUEIN1 |
| CELL[35].IMUX_IMUX_DELAY[21] | BITSLICE[29].RX_CNTVALUEIN2 |
| CELL[35].IMUX_IMUX_DELAY[22] | BITSLICE[29].RX_CNTVALUEIN3 |
| CELL[35].IMUX_IMUX_DELAY[23] | BITSLICE[29].RX_CNTVALUEIN4 |
| CELL[35].IMUX_IMUX_DELAY[24] | BITSLICE[29].RX_CNTVALUEIN5 |
| CELL[35].IMUX_IMUX_DELAY[25] | BITSLICE[29].RX_CNTVALUEIN6 |
| CELL[35].IMUX_IMUX_DELAY[26] | BITSLICE[29].RX_CNTVALUEIN7 |
| CELL[35].IMUX_IMUX_DELAY[27] | BITSLICE[29].RX_CNTVALUEIN8 |
| CELL[35].IMUX_IMUX_DELAY[28] | BITSLICE[30].TX_T |
| CELL[35].IMUX_IMUX_DELAY[29] | BITSLICE[30].TX_CE_OFD |
| CELL[35].IMUX_IMUX_DELAY[30] | BITSLICE[30].RX_CE_IFD |
| CELL[35].IMUX_IMUX_DELAY[31] | BITSLICE[30].CLB2PHY_FIFO_RDEN |
| CELL[35].IMUX_IMUX_DELAY[32] | BITSLICE[30].TX_D1 |
| CELL[35].IMUX_IMUX_DELAY[33] | BITSLICE[30].TX_D2 |
| CELL[35].IMUX_IMUX_DELAY[34] | BITSLICE[30].TX_D3 |
| CELL[35].IMUX_IMUX_DELAY[35] | BITSLICE[30].TX_D5 |
| CELL[35].IMUX_IMUX_DELAY[36] | BITSLICE[30].TX_D7 |
| CELL[35].IMUX_IMUX_DELAY[37] | BITSLICE[30].TX_CNTVALUEIN0 |
| CELL[35].IMUX_IMUX_DELAY[38] | BITSLICE[30].TX_CNTVALUEIN1 |
| CELL[35].IMUX_IMUX_DELAY[39] | BITSLICE[30].TX_CNTVALUEIN3 |
| CELL[35].IMUX_IMUX_DELAY[40] | BITSLICE[30].TX_CNTVALUEIN5 |
| CELL[35].IMUX_IMUX_DELAY[41] | BITSLICE[30].TX_CNTVALUEIN6 |
| CELL[35].IMUX_IMUX_DELAY[42] | BITSLICE[30].TX_CNTVALUEIN7 |
| CELL[35].IMUX_IMUX_DELAY[43] | BITSLICE[30].RX_CNTVALUEIN0 |
| CELL[35].IMUX_IMUX_DELAY[44] | BITSLICE[30].RX_CNTVALUEIN2 |
| CELL[35].IMUX_IMUX_DELAY[45] | BITSLICE[30].RX_CNTVALUEIN3 |
| CELL[35].IMUX_IMUX_DELAY[46] | BITSLICE[30].RX_CNTVALUEIN4 |
| CELL[35].IMUX_IMUX_DELAY[47] | BITSLICE[30].RX_CNTVALUEIN6 |
| CELL[36].OUT_BEL[4] | BITSLICE[31].TX_CNTVALUEOUT5 |
| CELL[36].OUT_BEL[5] | BITSLICE[31].TX_CNTVALUEOUT6 |
| CELL[36].OUT_BEL[6] | BITSLICE[31].TX_CNTVALUEOUT7 |
| CELL[36].OUT_BEL[7] | BITSLICE[31].TX_CNTVALUEOUT8 |
| CELL[36].OUT_BEL[8] | BITSLICE[32].TX_T_OUT |
| CELL[36].OUT_BEL[9] | BITSLICE[31].RX_CNTVALUEOUT0 |
| CELL[36].OUT_BEL[10] | BITSLICE[31].RX_CNTVALUEOUT1 |
| CELL[36].OUT_BEL[11] | BITSLICE[31].RX_CNTVALUEOUT2 |
| CELL[36].OUT_BEL[12] | BITSLICE[31].RX_CNTVALUEOUT3 |
| CELL[36].OUT_BEL[13] | BITSLICE[31].RX_CNTVALUEOUT4 |
| CELL[36].OUT_BEL[14] | BITSLICE[31].RX_CNTVALUEOUT5 |
| CELL[36].OUT_BEL[15] | BITSLICE[31].RX_CNTVALUEOUT6 |
| CELL[36].OUT_BEL[16] | BITSLICE[31].RX_CNTVALUEOUT7 |
| CELL[36].OUT_BEL[17] | BITSLICE[31].RX_CNTVALUEOUT8 |
| CELL[36].OUT_BEL[18] | RIU_OR[2].RIU_RD_VALID |
| CELL[36].OUT_BEL[19] | RIU_OR[2].RIU_RD_DATA0 |
| CELL[36].OUT_BEL[20] | RIU_OR[2].RIU_RD_DATA1 |
| CELL[36].OUT_BEL[21] | RIU_OR[2].RIU_RD_DATA2 |
| CELL[36].OUT_BEL[22] | RIU_OR[2].RIU_RD_DATA3 |
| CELL[36].OUT_BEL[23] | RIU_OR[2].RIU_RD_DATA4 |
| CELL[36].OUT_BEL[24] | RIU_OR[2].RIU_RD_DATA5 |
| CELL[36].OUT_BEL[25] | RIU_OR[2].RIU_RD_DATA6 |
| CELL[36].OUT_BEL[26] | RIU_OR[2].RIU_RD_DATA7 |
| CELL[36].OUT_BEL[27] | RIU_OR[2].RIU_RD_DATA8 |
| CELL[36].OUT_BEL[28] | RIU_OR[2].RIU_RD_DATA9 |
| CELL[36].OUT_BEL[29] | RIU_OR[2].RIU_RD_DATA10 |
| CELL[36].OUT_BEL[30] | RIU_OR[2].RIU_RD_DATA11 |
| CELL[36].OUT_BEL[31] | RIU_OR[2].RIU_RD_DATA12 |
| CELL[36].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B5 |
| CELL[36].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B5 |
| CELL[36].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B5 |
| CELL[36].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B5 |
| CELL[36].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK5 |
| CELL[36].IMUX_BYP[6] | BITSLICE[31].RX_EN_VTC |
| CELL[36].IMUX_BYP[7] | BITSLICE[31].RX_CE_IDELAY |
| CELL[36].IMUX_BYP[8] | BITSLICE[31].DYN_DCI_OUT_INT |
| CELL[36].IMUX_BYP[9] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_SPARE_B0 |
| CELL[36].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_SPARE_B1 |
| CELL[36].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_SPARE_B2 |
| CELL[36].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_SPARE_B3 |
| CELL[36].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_RST_MASK_B |
| CELL[36].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_MODE_B |
| CELL[36].IMUX_BYP[15] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN0 |
| CELL[36].IMUX_IMUX_DELAY[6] | BITSLICE[31].TX_CNTVALUEIN1 |
| CELL[36].IMUX_IMUX_DELAY[7] | BITSLICE[31].TX_CNTVALUEIN3 |
| CELL[36].IMUX_IMUX_DELAY[8] | BITSLICE[31].TX_CNTVALUEIN7 |
| CELL[36].IMUX_IMUX_DELAY[10] | BITSLICE[31].RX_CNTVALUEIN3 |
| CELL[36].IMUX_IMUX_DELAY[11] | BITSLICE[31].RX_CNTVALUEIN5 |
| CELL[36].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[4].CLB2RIU_WR_EN, BITSLICE_CONTROL[5].CLB2RIU_WR_EN |
| CELL[36].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA1, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA1 |
| CELL[36].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA5, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA5 |
| CELL[36].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA7, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA7 |
| CELL[36].IMUX_IMUX_DELAY[16] | BITSLICE[30].RX_CNTVALUEIN8 |
| CELL[36].IMUX_IMUX_DELAY[17] | BITSLICE[31].TX_T |
| CELL[36].IMUX_IMUX_DELAY[18] | BITSLICE[31].TX_CE_OFD |
| CELL[36].IMUX_IMUX_DELAY[19] | BITSLICE[31].RX_CE_IFD |
| CELL[36].IMUX_IMUX_DELAY[20] | BITSLICE[31].RX_DATAIN1 |
| CELL[36].IMUX_IMUX_DELAY[21] | BITSLICE[31].CLB2PHY_FIFO_RDEN |
| CELL[36].IMUX_IMUX_DELAY[22] | BITSLICE[31].TX_D0 |
| CELL[36].IMUX_IMUX_DELAY[23] | BITSLICE[31].TX_D1 |
| CELL[36].IMUX_IMUX_DELAY[24] | BITSLICE[31].TX_D2 |
| CELL[36].IMUX_IMUX_DELAY[25] | BITSLICE[31].TX_D3 |
| CELL[36].IMUX_IMUX_DELAY[26] | BITSLICE[31].TX_D4 |
| CELL[36].IMUX_IMUX_DELAY[27] | BITSLICE[31].TX_D5 |
| CELL[36].IMUX_IMUX_DELAY[28] | BITSLICE[31].TX_D6 |
| CELL[36].IMUX_IMUX_DELAY[29] | BITSLICE[31].TX_D7 |
| CELL[36].IMUX_IMUX_DELAY[30] | BITSLICE[31].TX_CNTVALUEIN0 |
| CELL[36].IMUX_IMUX_DELAY[31] | BITSLICE[31].TX_CNTVALUEIN2 |
| CELL[36].IMUX_IMUX_DELAY[32] | BITSLICE[31].TX_CNTVALUEIN4 |
| CELL[36].IMUX_IMUX_DELAY[33] | BITSLICE[31].TX_CNTVALUEIN5 |
| CELL[36].IMUX_IMUX_DELAY[34] | BITSLICE[31].TX_CNTVALUEIN6 |
| CELL[36].IMUX_IMUX_DELAY[35] | BITSLICE[31].TX_CNTVALUEIN8 |
| CELL[36].IMUX_IMUX_DELAY[36] | BITSLICE[31].RX_CNTVALUEIN0 |
| CELL[36].IMUX_IMUX_DELAY[37] | BITSLICE[31].RX_CNTVALUEIN1 |
| CELL[36].IMUX_IMUX_DELAY[38] | BITSLICE[31].RX_CNTVALUEIN2 |
| CELL[36].IMUX_IMUX_DELAY[39] | BITSLICE[31].RX_CNTVALUEIN4 |
| CELL[36].IMUX_IMUX_DELAY[40] | BITSLICE[31].RX_CNTVALUEIN6 |
| CELL[36].IMUX_IMUX_DELAY[41] | BITSLICE[31].RX_CNTVALUEIN7 |
| CELL[36].IMUX_IMUX_DELAY[42] | BITSLICE[31].RX_CNTVALUEIN8 |
| CELL[36].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA0, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA0 |
| CELL[36].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA2, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA2 |
| CELL[36].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA3, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA3 |
| CELL[36].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA4, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA4 |
| CELL[36].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA6, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA6 |
| CELL[37].OUT_BEL[4] | RIU_OR[2].RIU_RD_DATA13 |
| CELL[37].OUT_BEL[5] | RIU_OR[2].RIU_RD_DATA14 |
| CELL[37].OUT_BEL[6] | RIU_OR[2].RIU_RD_DATA15 |
| CELL[37].OUT_BEL[7] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT0 |
| CELL[37].OUT_BEL[8] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT1 |
| CELL[37].OUT_BEL[9] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT2 |
| CELL[37].OUT_BEL[10] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT3 |
| CELL[37].OUT_BEL[11] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT4 |
| CELL[37].OUT_BEL[12] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT5 |
| CELL[37].OUT_BEL[13] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT6 |
| CELL[37].OUT_BEL[14] | XIPHY_FEEDTHROUGH[2].PHY2CLB_SCAN_OUT7 |
| CELL[37].OUT_BEL[15] | XIPHY_FEEDTHROUGH[2].PHY2CLB_DBG_CLK_STOP_OUT |
| CELL[37].OUT_BEL[16] | XIPHY_FEEDTHROUGH[2].PHY2CLB_DBG_CLK_STOP_FLG_OUT |
| CELL[37].OUT_BEL[17] | XIPHY_FEEDTHROUGH[2].PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[37].OUT_BEL[18] | BITSLICE[38].PHY2CLB_FIFO_EMPTY |
| CELL[37].OUT_BEL[19] | BITSLICE[38].RX_Q0 |
| CELL[37].OUT_BEL[20] | BITSLICE[38].RX_Q1 |
| CELL[37].OUT_BEL[21] | BITSLICE[38].RX_Q2 |
| CELL[37].OUT_BEL[22] | BITSLICE[38].RX_Q3 |
| CELL[37].OUT_BEL[23] | BITSLICE[38].RX_Q4 |
| CELL[37].OUT_BEL[24] | BITSLICE[38].RX_Q5 |
| CELL[37].OUT_BEL[25] | BITSLICE[38].RX_Q6 |
| CELL[37].OUT_BEL[26] | BITSLICE[38].RX_Q7 |
| CELL[37].OUT_BEL[27] | BITSLICE[38].TX_CNTVALUEOUT0 |
| CELL[37].OUT_BEL[28] | BITSLICE[38].TX_CNTVALUEOUT1 |
| CELL[37].OUT_BEL[29] | BITSLICE[38].TX_CNTVALUEOUT2 |
| CELL[37].OUT_BEL[30] | BITSLICE[38].TX_CNTVALUEOUT3 |
| CELL[37].OUT_BEL[31] | BITSLICE[38].TX_CNTVALUEOUT4 |
| CELL[37].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_CLK_SDR |
| CELL[37].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_CLK_DIV4 |
| CELL[37].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_CLK_DIV2 |
| CELL[37].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B12 |
| CELL[37].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B12 |
| CELL[37].IMUX_BYP[6] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN1 |
| CELL[37].IMUX_BYP[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN2 |
| CELL[37].IMUX_BYP[8] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN3 |
| CELL[37].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN4 |
| CELL[37].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN5 |
| CELL[37].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN6 |
| CELL[37].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_IN7 |
| CELL[37].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[2].CLB2PHY_SCAN_EN_B |
| CELL[37].IMUX_BYP[15] | BITSLICE[38].TX_LD |
| CELL[37].IMUX_IMUX_DELAY[6] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_DIV4_CLK_SEL_B |
| CELL[37].IMUX_IMUX_DELAY[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_DBG_CT_START_EN |
| CELL[37].IMUX_IMUX_DELAY[8] | BITSLICE[38].TX_CE_OFD |
| CELL[37].IMUX_IMUX_DELAY[9] | BITSLICE[38].RX_DATAIN1 |
| CELL[37].IMUX_IMUX_DELAY[10] | BITSLICE[38].TX_D2 |
| CELL[37].IMUX_IMUX_DELAY[11] | BITSLICE[38].TX_D4 |
| CELL[37].IMUX_IMUX_DELAY[12] | BITSLICE[38].TX_CNTVALUEIN0 |
| CELL[37].IMUX_IMUX_DELAY[13] | BITSLICE[38].TX_CNTVALUEIN2 |
| CELL[37].IMUX_IMUX_DELAY[14] | BITSLICE[38].TX_CNTVALUEIN6 |
| CELL[37].IMUX_IMUX_DELAY[15] | BITSLICE[38].TX_CNTVALUEIN8 |
| CELL[37].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA8, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA8 |
| CELL[37].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA9, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA9 |
| CELL[37].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA10, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA10 |
| CELL[37].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA11, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA11 |
| CELL[37].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA12, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA12 |
| CELL[37].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA13, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA13 |
| CELL[37].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA14, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA14 |
| CELL[37].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[4].CLB2RIU_WR_DATA15, BITSLICE_CONTROL[5].CLB2RIU_WR_DATA15 |
| CELL[37].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[4].CLB2RIU_ADDR0, BITSLICE_CONTROL[5].CLB2RIU_ADDR0 |
| CELL[37].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[4].CLB2RIU_ADDR1, BITSLICE_CONTROL[5].CLB2RIU_ADDR1 |
| CELL[37].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[4].CLB2RIU_ADDR2, BITSLICE_CONTROL[5].CLB2RIU_ADDR2 |
| CELL[37].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[4].CLB2RIU_ADDR3, BITSLICE_CONTROL[5].CLB2RIU_ADDR3 |
| CELL[37].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[4].CLB2RIU_ADDR4, BITSLICE_CONTROL[5].CLB2RIU_ADDR4 |
| CELL[37].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[4].CLB2RIU_ADDR5, BITSLICE_CONTROL[5].CLB2RIU_ADDR5 |
| CELL[37].IMUX_IMUX_DELAY[30] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_SDR_CLK_SEL_B |
| CELL[37].IMUX_IMUX_DELAY[31] | XIPHY_FEEDTHROUGH[2].CLB2PHY_TEST_DIV2_CLK_SEL_B |
| CELL[37].IMUX_IMUX_DELAY[32] | XIPHY_FEEDTHROUGH[2].CLB2PHY_DBG_CLK_STOP_FLG_OUT |
| CELL[37].IMUX_IMUX_DELAY[33] | XIPHY_FEEDTHROUGH[2].CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[37].IMUX_IMUX_DELAY[34] | BITSLICE[38].TX_T |
| CELL[37].IMUX_IMUX_DELAY[35] | BITSLICE[38].RX_CE_IFD |
| CELL[37].IMUX_IMUX_DELAY[36] | BITSLICE[38].CLB2PHY_FIFO_RDEN |
| CELL[37].IMUX_IMUX_DELAY[37] | BITSLICE[38].TX_D0 |
| CELL[37].IMUX_IMUX_DELAY[38] | BITSLICE[38].TX_D1 |
| CELL[37].IMUX_IMUX_DELAY[39] | BITSLICE[38].TX_D3 |
| CELL[37].IMUX_IMUX_DELAY[40] | BITSLICE[38].TX_D5 |
| CELL[37].IMUX_IMUX_DELAY[41] | BITSLICE[38].TX_D6 |
| CELL[37].IMUX_IMUX_DELAY[42] | BITSLICE[38].TX_D7 |
| CELL[37].IMUX_IMUX_DELAY[43] | BITSLICE[38].TX_CNTVALUEIN1 |
| CELL[37].IMUX_IMUX_DELAY[44] | BITSLICE[38].TX_CNTVALUEIN3 |
| CELL[37].IMUX_IMUX_DELAY[45] | BITSLICE[38].TX_CNTVALUEIN4 |
| CELL[37].IMUX_IMUX_DELAY[46] | BITSLICE[38].TX_CNTVALUEIN5 |
| CELL[37].IMUX_IMUX_DELAY[47] | BITSLICE[38].TX_CNTVALUEIN7 |
| CELL[38].OUT_BEL[4] | BITSLICE[38].TX_CNTVALUEOUT5 |
| CELL[38].OUT_BEL[5] | BITSLICE[38].TX_CNTVALUEOUT6 |
| CELL[38].OUT_BEL[6] | BITSLICE[38].TX_CNTVALUEOUT7 |
| CELL[38].OUT_BEL[7] | BITSLICE[38].TX_CNTVALUEOUT8 |
| CELL[38].OUT_BEL[8] | BITSLICE[33].TX_T_OUT |
| CELL[38].OUT_BEL[9] | BITSLICE[38].RX_CNTVALUEOUT0 |
| CELL[38].OUT_BEL[10] | BITSLICE[38].RX_CNTVALUEOUT1 |
| CELL[38].OUT_BEL[11] | BITSLICE[38].RX_CNTVALUEOUT2 |
| CELL[38].OUT_BEL[12] | BITSLICE[38].RX_CNTVALUEOUT3 |
| CELL[38].OUT_BEL[13] | BITSLICE[38].RX_CNTVALUEOUT4 |
| CELL[38].OUT_BEL[14] | BITSLICE[38].RX_CNTVALUEOUT5 |
| CELL[38].OUT_BEL[15] | BITSLICE[38].RX_CNTVALUEOUT6 |
| CELL[38].OUT_BEL[16] | BITSLICE[38].RX_CNTVALUEOUT7 |
| CELL[38].OUT_BEL[17] | BITSLICE[38].RX_CNTVALUEOUT8 |
| CELL[38].OUT_BEL[18] | BITSLICE[32].PHY2CLB_FIFO_EMPTY |
| CELL[38].OUT_BEL[19] | BITSLICE[32].RX_Q0 |
| CELL[38].OUT_BEL[20] | BITSLICE[32].RX_Q1 |
| CELL[38].OUT_BEL[21] | BITSLICE[32].RX_Q2 |
| CELL[38].OUT_BEL[22] | BITSLICE[32].RX_Q3 |
| CELL[38].OUT_BEL[23] | BITSLICE[32].RX_Q4 |
| CELL[38].OUT_BEL[24] | BITSLICE[32].RX_Q5 |
| CELL[38].OUT_BEL[25] | BITSLICE[32].RX_Q6 |
| CELL[38].OUT_BEL[26] | BITSLICE[32].RX_Q7 |
| CELL[38].OUT_BEL[27] | BITSLICE[32].TX_CNTVALUEOUT0 |
| CELL[38].OUT_BEL[28] | BITSLICE[32].TX_CNTVALUEOUT1 |
| CELL[38].OUT_BEL[29] | BITSLICE[32].TX_CNTVALUEOUT2 |
| CELL[38].OUT_BEL[30] | BITSLICE[32].TX_CNTVALUEOUT3 |
| CELL[38].OUT_BEL[31] | BITSLICE[32].TX_CNTVALUEOUT4 |
| CELL[38].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B12 |
| CELL[38].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B12 |
| CELL[38].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK12 |
| CELL[38].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B6 |
| CELL[38].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B6 |
| CELL[38].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B6 |
| CELL[38].IMUX_BYP[6] | BITSLICE[38].TX_INC |
| CELL[38].IMUX_BYP[7] | BITSLICE[38].TX_EN_VTC |
| CELL[38].IMUX_BYP[8] | BITSLICE[38].TX_CE_ODELAY |
| CELL[38].IMUX_BYP[9] | BITSLICE[38].RX_LD |
| CELL[38].IMUX_BYP[10] | BITSLICE[38].RX_INC |
| CELL[38].IMUX_BYP[11] | BITSLICE[38].RX_EN_VTC |
| CELL[38].IMUX_BYP[12] | BITSLICE[38].RX_CE_IDELAY |
| CELL[38].IMUX_BYP[13] | BITSLICE[38].DYN_DCI_OUT_INT |
| CELL[38].IMUX_BYP[14] | BITSLICE[32].TX_LD |
| CELL[38].IMUX_BYP[15] | BITSLICE[32].TX_INC |
| CELL[38].IMUX_IMUX_DELAY[6] | BITSLICE[32].TX_D0 |
| CELL[38].IMUX_IMUX_DELAY[7] | BITSLICE[32].TX_D2 |
| CELL[38].IMUX_IMUX_DELAY[8] | BITSLICE[32].TX_D6 |
| CELL[38].IMUX_IMUX_DELAY[9] | BITSLICE[32].TX_CNTVALUEIN0 |
| CELL[38].IMUX_IMUX_DELAY[10] | BITSLICE[32].TX_CNTVALUEIN4 |
| CELL[38].IMUX_IMUX_DELAY[11] | BITSLICE[32].TX_CNTVALUEIN6 |
| CELL[38].IMUX_IMUX_DELAY[12] | BITSLICE[32].RX_CNTVALUEIN1 |
| CELL[38].IMUX_IMUX_DELAY[13] | BITSLICE[32].RX_CNTVALUEIN3 |
| CELL[38].IMUX_IMUX_DELAY[14] | BITSLICE[32].RX_CNTVALUEIN7 |
| CELL[38].IMUX_IMUX_DELAY[15] | BITSLICE[33].TX_T |
| CELL[38].IMUX_IMUX_DELAY[16] | BITSLICE[38].RX_CNTVALUEIN0 |
| CELL[38].IMUX_IMUX_DELAY[17] | BITSLICE[38].RX_CNTVALUEIN1 |
| CELL[38].IMUX_IMUX_DELAY[18] | BITSLICE[38].RX_CNTVALUEIN2 |
| CELL[38].IMUX_IMUX_DELAY[19] | BITSLICE[38].RX_CNTVALUEIN3 |
| CELL[38].IMUX_IMUX_DELAY[20] | BITSLICE[38].RX_CNTVALUEIN4 |
| CELL[38].IMUX_IMUX_DELAY[21] | BITSLICE[38].RX_CNTVALUEIN5 |
| CELL[38].IMUX_IMUX_DELAY[22] | BITSLICE[38].RX_CNTVALUEIN6 |
| CELL[38].IMUX_IMUX_DELAY[23] | BITSLICE[38].RX_CNTVALUEIN7 |
| CELL[38].IMUX_IMUX_DELAY[24] | BITSLICE[38].RX_CNTVALUEIN8 |
| CELL[38].IMUX_IMUX_DELAY[25] | BITSLICE[32].TX_T |
| CELL[38].IMUX_IMUX_DELAY[26] | BITSLICE[32].TX_CE_OFD |
| CELL[38].IMUX_IMUX_DELAY[27] | BITSLICE[32].RX_CE_IFD |
| CELL[38].IMUX_IMUX_DELAY[29] | BITSLICE[32].RX_DATAIN1 |
| CELL[38].IMUX_IMUX_DELAY[30] | BITSLICE[32].CLB2PHY_FIFO_RDEN |
| CELL[38].IMUX_IMUX_DELAY[31] | BITSLICE[32].TX_D1 |
| CELL[38].IMUX_IMUX_DELAY[32] | BITSLICE[32].TX_D3 |
| CELL[38].IMUX_IMUX_DELAY[33] | BITSLICE[32].TX_D4 |
| CELL[38].IMUX_IMUX_DELAY[34] | BITSLICE[32].TX_D5 |
| CELL[38].IMUX_IMUX_DELAY[35] | BITSLICE[32].TX_D7 |
| CELL[38].IMUX_IMUX_DELAY[36] | BITSLICE[32].TX_CNTVALUEIN1 |
| CELL[38].IMUX_IMUX_DELAY[37] | BITSLICE[32].TX_CNTVALUEIN2 |
| CELL[38].IMUX_IMUX_DELAY[38] | BITSLICE[32].TX_CNTVALUEIN3 |
| CELL[38].IMUX_IMUX_DELAY[39] | BITSLICE[32].TX_CNTVALUEIN5 |
| CELL[38].IMUX_IMUX_DELAY[40] | BITSLICE[32].TX_CNTVALUEIN7 |
| CELL[38].IMUX_IMUX_DELAY[41] | BITSLICE[32].TX_CNTVALUEIN8 |
| CELL[38].IMUX_IMUX_DELAY[42] | BITSLICE[32].RX_CNTVALUEIN0 |
| CELL[38].IMUX_IMUX_DELAY[43] | BITSLICE[32].RX_CNTVALUEIN2 |
| CELL[38].IMUX_IMUX_DELAY[44] | BITSLICE[32].RX_CNTVALUEIN4 |
| CELL[38].IMUX_IMUX_DELAY[45] | BITSLICE[32].RX_CNTVALUEIN5 |
| CELL[38].IMUX_IMUX_DELAY[46] | BITSLICE[32].RX_CNTVALUEIN6 |
| CELL[38].IMUX_IMUX_DELAY[47] | BITSLICE[32].RX_CNTVALUEIN8 |
| CELL[39].OUT_BEL[4] | BITSLICE[32].TX_CNTVALUEOUT5 |
| CELL[39].OUT_BEL[5] | BITSLICE[32].TX_CNTVALUEOUT6 |
| CELL[39].OUT_BEL[6] | BITSLICE[32].TX_CNTVALUEOUT7 |
| CELL[39].OUT_BEL[7] | BITSLICE[32].TX_CNTVALUEOUT8 |
| CELL[39].OUT_BEL[8] | BITSLICE[34].TX_T_OUT |
| CELL[39].OUT_BEL[9] | BITSLICE[32].RX_CNTVALUEOUT0 |
| CELL[39].OUT_BEL[10] | BITSLICE[32].RX_CNTVALUEOUT1 |
| CELL[39].OUT_BEL[11] | BITSLICE[32].RX_CNTVALUEOUT2 |
| CELL[39].OUT_BEL[12] | BITSLICE[32].RX_CNTVALUEOUT3 |
| CELL[39].OUT_BEL[13] | BITSLICE[32].RX_CNTVALUEOUT4 |
| CELL[39].OUT_BEL[14] | BITSLICE[32].RX_CNTVALUEOUT5 |
| CELL[39].OUT_BEL[15] | BITSLICE[32].RX_CNTVALUEOUT6 |
| CELL[39].OUT_BEL[16] | BITSLICE[32].RX_CNTVALUEOUT7 |
| CELL[39].OUT_BEL[17] | BITSLICE[32].RX_CNTVALUEOUT8 |
| CELL[39].OUT_BEL[18] | BITSLICE[33].PHY2CLB_FIFO_EMPTY |
| CELL[39].OUT_BEL[19] | BITSLICE[33].RX_Q0 |
| CELL[39].OUT_BEL[20] | BITSLICE[33].RX_Q1 |
| CELL[39].OUT_BEL[21] | BITSLICE[33].RX_Q2 |
| CELL[39].OUT_BEL[22] | BITSLICE[33].RX_Q3 |
| CELL[39].OUT_BEL[23] | BITSLICE[33].RX_Q4 |
| CELL[39].OUT_BEL[24] | BITSLICE[33].RX_Q5 |
| CELL[39].OUT_BEL[25] | BITSLICE[33].RX_Q6 |
| CELL[39].OUT_BEL[26] | BITSLICE[33].RX_Q7 |
| CELL[39].OUT_BEL[27] | BITSLICE[33].TX_CNTVALUEOUT0 |
| CELL[39].OUT_BEL[28] | BITSLICE[33].TX_CNTVALUEOUT1 |
| CELL[39].OUT_BEL[29] | BITSLICE[33].TX_CNTVALUEOUT2 |
| CELL[39].OUT_BEL[30] | BITSLICE[33].TX_CNTVALUEOUT3 |
| CELL[39].OUT_BEL[31] | BITSLICE[33].TX_CNTVALUEOUT4 |
| CELL[39].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B6 |
| CELL[39].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK6 |
| CELL[39].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B7 |
| CELL[39].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B7 |
| CELL[39].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B7 |
| CELL[39].IMUX_BYP[6] | BITSLICE[32].TX_EN_VTC |
| CELL[39].IMUX_BYP[7] | BITSLICE[32].TX_CE_ODELAY |
| CELL[39].IMUX_BYP[8] | BITSLICE[32].RX_LD |
| CELL[39].IMUX_BYP[9] | BITSLICE[32].RX_INC |
| CELL[39].IMUX_BYP[10] | BITSLICE[32].RX_EN_VTC |
| CELL[39].IMUX_BYP[11] | BITSLICE[32].RX_CE_IDELAY |
| CELL[39].IMUX_BYP[12] | BITSLICE[32].DYN_DCI_OUT_INT |
| CELL[39].IMUX_BYP[14] | BITSLICE[33].TX_LD |
| CELL[39].IMUX_BYP[15] | BITSLICE[33].TX_INC |
| CELL[39].IMUX_IMUX_DELAY[6] | BITSLICE[33].TX_CNTVALUEIN3 |
| CELL[39].IMUX_IMUX_DELAY[7] | BITSLICE[33].TX_CNTVALUEIN5 |
| CELL[39].IMUX_IMUX_DELAY[8] | BITSLICE[33].RX_CNTVALUEIN0 |
| CELL[39].IMUX_IMUX_DELAY[9] | BITSLICE[33].RX_CNTVALUEIN2 |
| CELL[39].IMUX_IMUX_DELAY[10] | BITSLICE[33].RX_CNTVALUEIN6 |
| CELL[39].IMUX_IMUX_DELAY[11] | BITSLICE[33].RX_CNTVALUEIN8 |
| CELL[39].IMUX_IMUX_DELAY[12] | BITSLICE[34].RX_DATAIN1 |
| CELL[39].IMUX_IMUX_DELAY[13] | BITSLICE[34].TX_D0 |
| CELL[39].IMUX_IMUX_DELAY[14] | BITSLICE[34].TX_D4 |
| CELL[39].IMUX_IMUX_DELAY[15] | BITSLICE[34].TX_D6 |
| CELL[39].IMUX_IMUX_DELAY[16] | BITSLICE[33].TX_CE_OFD |
| CELL[39].IMUX_IMUX_DELAY[17] | BITSLICE[33].RX_CE_IFD |
| CELL[39].IMUX_IMUX_DELAY[18] | BITSLICE[33].RX_DATAIN1 |
| CELL[39].IMUX_IMUX_DELAY[19] | BITSLICE[33].CLB2PHY_FIFO_RDEN |
| CELL[39].IMUX_IMUX_DELAY[20] | BITSLICE[33].TX_D0 |
| CELL[39].IMUX_IMUX_DELAY[21] | BITSLICE[33].TX_D1 |
| CELL[39].IMUX_IMUX_DELAY[22] | BITSLICE[33].TX_D2 |
| CELL[39].IMUX_IMUX_DELAY[23] | BITSLICE[33].TX_D3 |
| CELL[39].IMUX_IMUX_DELAY[24] | BITSLICE[33].TX_D4 |
| CELL[39].IMUX_IMUX_DELAY[25] | BITSLICE[33].TX_D5 |
| CELL[39].IMUX_IMUX_DELAY[26] | BITSLICE[33].TX_D6 |
| CELL[39].IMUX_IMUX_DELAY[27] | BITSLICE[33].TX_D7 |
| CELL[39].IMUX_IMUX_DELAY[28] | BITSLICE[33].TX_CNTVALUEIN0 |
| CELL[39].IMUX_IMUX_DELAY[29] | BITSLICE[33].TX_CNTVALUEIN1 |
| CELL[39].IMUX_IMUX_DELAY[30] | BITSLICE[33].TX_CNTVALUEIN2 |
| CELL[39].IMUX_IMUX_DELAY[31] | BITSLICE[33].TX_CNTVALUEIN4 |
| CELL[39].IMUX_IMUX_DELAY[32] | BITSLICE[33].TX_CNTVALUEIN6 |
| CELL[39].IMUX_IMUX_DELAY[33] | BITSLICE[33].TX_CNTVALUEIN7 |
| CELL[39].IMUX_IMUX_DELAY[34] | BITSLICE[33].TX_CNTVALUEIN8 |
| CELL[39].IMUX_IMUX_DELAY[35] | BITSLICE[33].RX_CNTVALUEIN1 |
| CELL[39].IMUX_IMUX_DELAY[36] | BITSLICE[33].RX_CNTVALUEIN3 |
| CELL[39].IMUX_IMUX_DELAY[37] | BITSLICE[33].RX_CNTVALUEIN4 |
| CELL[39].IMUX_IMUX_DELAY[38] | BITSLICE[33].RX_CNTVALUEIN5 |
| CELL[39].IMUX_IMUX_DELAY[39] | BITSLICE[33].RX_CNTVALUEIN7 |
| CELL[39].IMUX_IMUX_DELAY[40] | BITSLICE[34].TX_T |
| CELL[39].IMUX_IMUX_DELAY[41] | BITSLICE[34].TX_CE_OFD |
| CELL[39].IMUX_IMUX_DELAY[42] | BITSLICE[34].RX_CE_IFD |
| CELL[39].IMUX_IMUX_DELAY[43] | BITSLICE[34].CLB2PHY_FIFO_RDEN |
| CELL[39].IMUX_IMUX_DELAY[44] | BITSLICE[34].TX_D1 |
| CELL[39].IMUX_IMUX_DELAY[45] | BITSLICE[34].TX_D2 |
| CELL[39].IMUX_IMUX_DELAY[46] | BITSLICE[34].TX_D3 |
| CELL[39].IMUX_IMUX_DELAY[47] | BITSLICE[34].TX_D5 |
| CELL[40].OUT_BEL[4] | BITSLICE[33].TX_CNTVALUEOUT5 |
| CELL[40].OUT_BEL[5] | BITSLICE[33].TX_CNTVALUEOUT6 |
| CELL[40].OUT_BEL[6] | BITSLICE[33].TX_CNTVALUEOUT7 |
| CELL[40].OUT_BEL[7] | BITSLICE[33].TX_CNTVALUEOUT8 |
| CELL[40].OUT_BEL[8] | BITSLICE[35].TX_T_OUT |
| CELL[40].OUT_BEL[9] | BITSLICE[33].RX_CNTVALUEOUT0 |
| CELL[40].OUT_BEL[10] | BITSLICE[33].RX_CNTVALUEOUT1 |
| CELL[40].OUT_BEL[11] | BITSLICE[33].RX_CNTVALUEOUT2 |
| CELL[40].OUT_BEL[12] | BITSLICE[33].RX_CNTVALUEOUT3 |
| CELL[40].OUT_BEL[13] | BITSLICE[33].RX_CNTVALUEOUT4 |
| CELL[40].OUT_BEL[14] | BITSLICE[33].RX_CNTVALUEOUT5 |
| CELL[40].OUT_BEL[15] | BITSLICE[33].RX_CNTVALUEOUT6 |
| CELL[40].OUT_BEL[16] | BITSLICE[33].RX_CNTVALUEOUT7 |
| CELL[40].OUT_BEL[17] | BITSLICE[33].RX_CNTVALUEOUT8 |
| CELL[40].OUT_BEL[18] | BITSLICE[34].PHY2CLB_FIFO_EMPTY |
| CELL[40].OUT_BEL[19] | BITSLICE[34].RX_Q0 |
| CELL[40].OUT_BEL[20] | BITSLICE[34].RX_Q1 |
| CELL[40].OUT_BEL[21] | BITSLICE[34].RX_Q2 |
| CELL[40].OUT_BEL[22] | BITSLICE[34].RX_Q3 |
| CELL[40].OUT_BEL[23] | BITSLICE[34].RX_Q4 |
| CELL[40].OUT_BEL[24] | BITSLICE[34].RX_Q5 |
| CELL[40].OUT_BEL[25] | BITSLICE[34].RX_Q6 |
| CELL[40].OUT_BEL[26] | BITSLICE[34].RX_Q7 |
| CELL[40].OUT_BEL[27] | BITSLICE[34].TX_CNTVALUEOUT0 |
| CELL[40].OUT_BEL[28] | BITSLICE[34].TX_CNTVALUEOUT1 |
| CELL[40].OUT_BEL[29] | BITSLICE[34].TX_CNTVALUEOUT2 |
| CELL[40].OUT_BEL[30] | BITSLICE[34].TX_CNTVALUEOUT3 |
| CELL[40].OUT_BEL[31] | BITSLICE[34].TX_CNTVALUEOUT4 |
| CELL[40].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B7 |
| CELL[40].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK7 |
| CELL[40].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B8 |
| CELL[40].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B8 |
| CELL[40].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B8 |
| CELL[40].IMUX_BYP[6] | BITSLICE[33].TX_EN_VTC |
| CELL[40].IMUX_BYP[7] | BITSLICE[33].TX_CE_ODELAY |
| CELL[40].IMUX_BYP[8] | BITSLICE[33].RX_LD |
| CELL[40].IMUX_BYP[9] | BITSLICE[33].RX_INC |
| CELL[40].IMUX_BYP[10] | BITSLICE[33].RX_EN_VTC |
| CELL[40].IMUX_BYP[11] | BITSLICE[33].RX_CE_IDELAY |
| CELL[40].IMUX_BYP[12] | BITSLICE[33].DYN_DCI_OUT_INT |
| CELL[40].IMUX_BYP[13] | BITSLICE[34].TX_LD |
| CELL[40].IMUX_BYP[14] | BITSLICE[34].TX_INC |
| CELL[40].IMUX_BYP[15] | BITSLICE[34].TX_EN_VTC |
| CELL[40].IMUX_IMUX_DELAY[6] | BITSLICE[34].RX_CNTVALUEIN4 |
| CELL[40].IMUX_IMUX_DELAY[7] | BITSLICE[34].RX_CNTVALUEIN6 |
| CELL[40].IMUX_IMUX_DELAY[8] | BITSLICE_T[5].CNTVALUEIN1 |
| CELL[40].IMUX_IMUX_DELAY[9] | BITSLICE_T[5].CNTVALUEIN3 |
| CELL[40].IMUX_IMUX_DELAY[10] | BITSLICE_T[5].CNTVALUEIN7 |
| CELL[40].IMUX_IMUX_DELAY[11] | BITSLICE_CONTROL[5].CLB2RIU_NIBBLE_SEL |
| CELL[40].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[5].CLB2PHY_WRCS1_3 |
| CELL[40].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[5].CLB2PHY_WRCS0_1 |
| CELL[40].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[5].CLB2PHY_T_B1 |
| CELL[40].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[5].CLB2PHY_T_B3 |
| CELL[40].IMUX_IMUX_DELAY[16] | BITSLICE[34].TX_D7 |
| CELL[40].IMUX_IMUX_DELAY[18] | BITSLICE[34].TX_CNTVALUEIN0 |
| CELL[40].IMUX_IMUX_DELAY[19] | BITSLICE[34].TX_CNTVALUEIN1 |
| CELL[40].IMUX_IMUX_DELAY[20] | BITSLICE[34].TX_CNTVALUEIN2 |
| CELL[40].IMUX_IMUX_DELAY[21] | BITSLICE[34].TX_CNTVALUEIN3 |
| CELL[40].IMUX_IMUX_DELAY[22] | BITSLICE[34].TX_CNTVALUEIN4 |
| CELL[40].IMUX_IMUX_DELAY[23] | BITSLICE[34].TX_CNTVALUEIN5 |
| CELL[40].IMUX_IMUX_DELAY[24] | BITSLICE[34].TX_CNTVALUEIN6 |
| CELL[40].IMUX_IMUX_DELAY[25] | BITSLICE[34].TX_CNTVALUEIN7 |
| CELL[40].IMUX_IMUX_DELAY[26] | BITSLICE[34].TX_CNTVALUEIN8 |
| CELL[40].IMUX_IMUX_DELAY[27] | BITSLICE[34].RX_CNTVALUEIN0 |
| CELL[40].IMUX_IMUX_DELAY[28] | BITSLICE[34].RX_CNTVALUEIN1 |
| CELL[40].IMUX_IMUX_DELAY[29] | BITSLICE[34].RX_CNTVALUEIN2 |
| CELL[40].IMUX_IMUX_DELAY[30] | BITSLICE[34].RX_CNTVALUEIN3 |
| CELL[40].IMUX_IMUX_DELAY[31] | BITSLICE[34].RX_CNTVALUEIN5 |
| CELL[40].IMUX_IMUX_DELAY[32] | BITSLICE[34].RX_CNTVALUEIN7 |
| CELL[40].IMUX_IMUX_DELAY[33] | BITSLICE[34].RX_CNTVALUEIN8 |
| CELL[40].IMUX_IMUX_DELAY[34] | BITSLICE_T[5].CNTVALUEIN0 |
| CELL[40].IMUX_IMUX_DELAY[35] | BITSLICE_T[5].CNTVALUEIN2 |
| CELL[40].IMUX_IMUX_DELAY[36] | BITSLICE_T[5].CNTVALUEIN4 |
| CELL[40].IMUX_IMUX_DELAY[37] | BITSLICE_T[5].CNTVALUEIN5 |
| CELL[40].IMUX_IMUX_DELAY[38] | BITSLICE_T[5].CNTVALUEIN6 |
| CELL[40].IMUX_IMUX_DELAY[39] | BITSLICE_T[5].CNTVALUEIN8 |
| CELL[40].IMUX_IMUX_DELAY[40] | BITSLICE_CONTROL[5].CLB2PHY_WRCS1_0 |
| CELL[40].IMUX_IMUX_DELAY[41] | BITSLICE_CONTROL[5].CLB2PHY_WRCS1_1 |
| CELL[40].IMUX_IMUX_DELAY[42] | BITSLICE_CONTROL[5].CLB2PHY_WRCS1_2 |
| CELL[40].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[5].CLB2PHY_WRCS0_0 |
| CELL[40].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[5].CLB2PHY_WRCS0_2 |
| CELL[40].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[5].CLB2PHY_WRCS0_3 |
| CELL[40].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[5].CLB2PHY_T_B0 |
| CELL[40].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[5].CLB2PHY_T_B2 |
| CELL[41].OUT_BEL[4] | BITSLICE[34].TX_CNTVALUEOUT5 |
| CELL[41].OUT_BEL[5] | BITSLICE[34].TX_CNTVALUEOUT6 |
| CELL[41].OUT_BEL[6] | BITSLICE[34].TX_CNTVALUEOUT7 |
| CELL[41].OUT_BEL[7] | BITSLICE[34].TX_CNTVALUEOUT8 |
| CELL[41].OUT_BEL[8] | BITSLICE[36].TX_T_OUT |
| CELL[41].OUT_BEL[9] | BITSLICE[34].RX_CNTVALUEOUT0 |
| CELL[41].OUT_BEL[10] | BITSLICE[34].RX_CNTVALUEOUT1 |
| CELL[41].OUT_BEL[11] | BITSLICE[34].RX_CNTVALUEOUT2 |
| CELL[41].OUT_BEL[12] | BITSLICE[34].RX_CNTVALUEOUT3 |
| CELL[41].OUT_BEL[13] | BITSLICE[34].RX_CNTVALUEOUT4 |
| CELL[41].OUT_BEL[14] | BITSLICE[34].RX_CNTVALUEOUT5 |
| CELL[41].OUT_BEL[15] | BITSLICE[34].RX_CNTVALUEOUT6 |
| CELL[41].OUT_BEL[16] | BITSLICE[34].RX_CNTVALUEOUT7 |
| CELL[41].OUT_BEL[17] | BITSLICE[34].RX_CNTVALUEOUT8 |
| CELL[41].OUT_BEL[18] | BITSLICE_T[5].CNTVALUEOUT0 |
| CELL[41].OUT_BEL[19] | BITSLICE_T[5].CNTVALUEOUT1 |
| CELL[41].OUT_BEL[20] | BITSLICE_T[5].CNTVALUEOUT2 |
| CELL[41].OUT_BEL[21] | BITSLICE_T[5].CNTVALUEOUT3 |
| CELL[41].OUT_BEL[22] | BITSLICE_T[5].CNTVALUEOUT4 |
| CELL[41].OUT_BEL[23] | BITSLICE_T[5].CNTVALUEOUT5 |
| CELL[41].OUT_BEL[24] | BITSLICE_T[5].CNTVALUEOUT6 |
| CELL[41].OUT_BEL[25] | BITSLICE_T[5].CNTVALUEOUT7 |
| CELL[41].OUT_BEL[26] | BITSLICE_T[5].CNTVALUEOUT8 |
| CELL[41].OUT_BEL[27] | BITSLICE_CONTROL[5].PHY2CLB_PHY_RDY |
| CELL[41].OUT_BEL[28] | BITSLICE_CONTROL[5].MASTER_PD_OUT |
| CELL[41].OUT_BEL[29] | BITSLICE_CONTROL[5].PHY2CLB_FIXDLY_RDY |
| CELL[41].OUT_BEL[30] | BITSLICE_CONTROL[5].CTRL_DLY_TEST_OUT |
| CELL[41].OUT_BEL[31] | BITSLICE[37].TX_T_OUT |
| CELL[41].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B8 |
| CELL[41].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK8 |
| CELL[41].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].TRISTATE_ODELAY_RST_B1 |
| CELL[41].IMUX_CTRL[6] | BITSLICE_CONTROL[5].REFCLK |
| CELL[41].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].CTRL_RST_B_UPP |
| CELL[41].IMUX_BYP[6] | BITSLICE[34].TX_CE_ODELAY |
| CELL[41].IMUX_BYP[8] | BITSLICE[34].RX_LD |
| CELL[41].IMUX_BYP[9] | BITSLICE[34].RX_INC |
| CELL[41].IMUX_BYP[10] | BITSLICE[34].RX_EN_VTC |
| CELL[41].IMUX_BYP[11] | BITSLICE[34].RX_CE_IDELAY |
| CELL[41].IMUX_BYP[12] | BITSLICE[34].DYN_DCI_OUT_INT |
| CELL[41].IMUX_BYP[13] | BITSLICE_T[5].CE_OFD |
| CELL[41].IMUX_BYP[14] | BITSLICE_T[5].LD |
| CELL[41].IMUX_BYP[15] | BITSLICE_T[5].INC |
| CELL[41].IMUX_IMUX_DELAY[6] | BITSLICE[35].RX_DATAIN1 |
| CELL[41].IMUX_IMUX_DELAY[7] | BITSLICE[35].TX_D0 |
| CELL[41].IMUX_IMUX_DELAY[8] | BITSLICE[35].TX_D4 |
| CELL[41].IMUX_IMUX_DELAY[9] | BITSLICE[35].TX_D6 |
| CELL[41].IMUX_IMUX_DELAY[10] | BITSLICE[35].TX_CNTVALUEIN2 |
| CELL[41].IMUX_IMUX_DELAY[11] | BITSLICE[35].TX_CNTVALUEIN4 |
| CELL[41].IMUX_IMUX_DELAY[12] | BITSLICE[35].TX_CNTVALUEIN7 |
| CELL[41].IMUX_IMUX_DELAY[13] | BITSLICE[35].RX_CNTVALUEIN0 |
| CELL[41].IMUX_IMUX_DELAY[14] | BITSLICE[35].RX_CNTVALUEIN4 |
| CELL[41].IMUX_IMUX_DELAY[15] | BITSLICE[35].RX_CNTVALUEIN6 |
| CELL[41].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[5].CLB2PHY_RDEN0 |
| CELL[41].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[5].CLB2PHY_RDEN1 |
| CELL[41].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[5].CLB2PHY_RDEN2 |
| CELL[41].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[5].CLB2PHY_RDEN3 |
| CELL[41].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[5].CLB2PHY_RDCS1_0 |
| CELL[41].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[5].CLB2PHY_RDCS1_1 |
| CELL[41].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[5].CLB2PHY_RDCS1_2 |
| CELL[41].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[5].CLB2PHY_RDCS1_3 |
| CELL[41].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[5].CLB2PHY_RDCS0_0 |
| CELL[41].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[5].CLB2PHY_RDCS0_1 |
| CELL[41].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[5].CLB2PHY_RDCS0_2 |
| CELL[41].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[5].CLB2PHY_RDCS0_3 |
| CELL[41].IMUX_IMUX_DELAY[28] | BITSLICE[35].TX_T |
| CELL[41].IMUX_IMUX_DELAY[29] | BITSLICE[35].TX_CE_OFD |
| CELL[41].IMUX_IMUX_DELAY[30] | BITSLICE[35].RX_CE_IFD |
| CELL[41].IMUX_IMUX_DELAY[31] | BITSLICE[35].CLB2PHY_FIFO_RDEN |
| CELL[41].IMUX_IMUX_DELAY[32] | BITSLICE[35].TX_D1 |
| CELL[41].IMUX_IMUX_DELAY[33] | BITSLICE[35].TX_D2 |
| CELL[41].IMUX_IMUX_DELAY[34] | BITSLICE[35].TX_D3 |
| CELL[41].IMUX_IMUX_DELAY[35] | BITSLICE[35].TX_D5 |
| CELL[41].IMUX_IMUX_DELAY[36] | BITSLICE[35].TX_D7 |
| CELL[41].IMUX_IMUX_DELAY[37] | BITSLICE[35].TX_CNTVALUEIN0 |
| CELL[41].IMUX_IMUX_DELAY[38] | BITSLICE[35].TX_CNTVALUEIN1 |
| CELL[41].IMUX_IMUX_DELAY[39] | BITSLICE[35].TX_CNTVALUEIN3 |
| CELL[41].IMUX_IMUX_DELAY[40] | BITSLICE[35].TX_CNTVALUEIN5 |
| CELL[41].IMUX_IMUX_DELAY[41] | BITSLICE[35].TX_CNTVALUEIN6 |
| CELL[41].IMUX_IMUX_DELAY[43] | BITSLICE[35].TX_CNTVALUEIN8 |
| CELL[41].IMUX_IMUX_DELAY[44] | BITSLICE[35].RX_CNTVALUEIN1 |
| CELL[41].IMUX_IMUX_DELAY[45] | BITSLICE[35].RX_CNTVALUEIN2 |
| CELL[41].IMUX_IMUX_DELAY[46] | BITSLICE[35].RX_CNTVALUEIN3 |
| CELL[41].IMUX_IMUX_DELAY[47] | BITSLICE[35].RX_CNTVALUEIN5 |
| CELL[42].OUT_BEL[4] | BITSLICE[35].PHY2CLB_FIFO_EMPTY |
| CELL[42].OUT_BEL[5] | BITSLICE[35].RX_Q0 |
| CELL[42].OUT_BEL[6] | BITSLICE[35].RX_Q1 |
| CELL[42].OUT_BEL[7] | BITSLICE[35].RX_Q2 |
| CELL[42].OUT_BEL[8] | BITSLICE[35].RX_Q3 |
| CELL[42].OUT_BEL[9] | BITSLICE[35].RX_Q4 |
| CELL[42].OUT_BEL[10] | BITSLICE[35].RX_Q5 |
| CELL[42].OUT_BEL[11] | BITSLICE[35].RX_Q6 |
| CELL[42].OUT_BEL[12] | BITSLICE[35].RX_Q7 |
| CELL[42].OUT_BEL[13] | BITSLICE[35].TX_CNTVALUEOUT0 |
| CELL[42].OUT_BEL[14] | BITSLICE[35].TX_CNTVALUEOUT1 |
| CELL[42].OUT_BEL[15] | BITSLICE[35].TX_CNTVALUEOUT2 |
| CELL[42].OUT_BEL[16] | BITSLICE[35].TX_CNTVALUEOUT3 |
| CELL[42].OUT_BEL[17] | BITSLICE[35].TX_CNTVALUEOUT4 |
| CELL[42].OUT_BEL[18] | BITSLICE[35].TX_CNTVALUEOUT5 |
| CELL[42].OUT_BEL[19] | BITSLICE[35].TX_CNTVALUEOUT6 |
| CELL[42].OUT_BEL[20] | BITSLICE[35].TX_CNTVALUEOUT7 |
| CELL[42].OUT_BEL[21] | BITSLICE[35].TX_CNTVALUEOUT8 |
| CELL[42].OUT_BEL[22] | BITSLICE[38].TX_T_OUT |
| CELL[42].OUT_BEL[23] | BITSLICE[35].RX_CNTVALUEOUT0 |
| CELL[42].OUT_BEL[24] | BITSLICE[35].RX_CNTVALUEOUT1 |
| CELL[42].OUT_BEL[25] | BITSLICE[35].RX_CNTVALUEOUT2 |
| CELL[42].OUT_BEL[26] | BITSLICE[35].RX_CNTVALUEOUT3 |
| CELL[42].OUT_BEL[27] | BITSLICE[35].RX_CNTVALUEOUT4 |
| CELL[42].OUT_BEL[28] | BITSLICE[35].RX_CNTVALUEOUT5 |
| CELL[42].OUT_BEL[29] | BITSLICE[35].RX_CNTVALUEOUT6 |
| CELL[42].OUT_BEL[30] | BITSLICE[35].RX_CNTVALUEOUT7 |
| CELL[42].OUT_BEL[31] | BITSLICE[35].RX_CNTVALUEOUT8 |
| CELL[42].IMUX_CTRL[2] | BITSLICE_CONTROL[5].RIU_CLK, XIPHY_FEEDTHROUGH[2].CLB2PHY_CTRL_CLK_UPP |
| CELL[42].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B9 |
| CELL[42].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B9 |
| CELL[42].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B9 |
| CELL[42].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B9 |
| CELL[42].IMUX_BYP[6] | BITSLICE_T[5].CE_ODELAY |
| CELL[42].IMUX_BYP[7] | BITSLICE_CONTROL[5].EN_VTC |
| CELL[42].IMUX_BYP[8] | BITSLICE_CONTROL[5].CTRL_DLY_TEST_IN |
| CELL[42].IMUX_BYP[9] | BITSLICE[35].TX_LD |
| CELL[42].IMUX_BYP[10] | BITSLICE[35].TX_INC |
| CELL[42].IMUX_BYP[11] | BITSLICE[35].TX_EN_VTC |
| CELL[42].IMUX_BYP[12] | BITSLICE[35].TX_CE_ODELAY |
| CELL[42].IMUX_BYP[13] | BITSLICE[35].RX_LD |
| CELL[42].IMUX_BYP[14] | BITSLICE[35].RX_INC |
| CELL[42].IMUX_BYP[15] | BITSLICE[35].RX_EN_VTC |
| CELL[42].IMUX_IMUX_DELAY[6] | BITSLICE[36].TX_CNTVALUEIN0 |
| CELL[42].IMUX_IMUX_DELAY[7] | BITSLICE[36].TX_CNTVALUEIN2 |
| CELL[42].IMUX_IMUX_DELAY[8] | BITSLICE[36].TX_CNTVALUEIN6 |
| CELL[42].IMUX_IMUX_DELAY[9] | BITSLICE[36].TX_CNTVALUEIN8 |
| CELL[42].IMUX_IMUX_DELAY[10] | BITSLICE[36].RX_CNTVALUEIN3 |
| CELL[42].IMUX_IMUX_DELAY[11] | BITSLICE[36].RX_CNTVALUEIN5 |
| CELL[42].IMUX_IMUX_DELAY[12] | BITSLICE[37].TX_T |
| CELL[42].IMUX_IMUX_DELAY[13] | BITSLICE[37].RX_CE_IFD |
| CELL[42].IMUX_IMUX_DELAY[14] | BITSLICE[37].TX_D1 |
| CELL[42].IMUX_IMUX_DELAY[15] | BITSLICE[37].TX_D3 |
| CELL[42].IMUX_IMUX_DELAY[16] | BITSLICE[35].RX_CNTVALUEIN7 |
| CELL[42].IMUX_IMUX_DELAY[17] | BITSLICE[35].RX_CNTVALUEIN8 |
| CELL[42].IMUX_IMUX_DELAY[18] | BITSLICE[36].TX_T |
| CELL[42].IMUX_IMUX_DELAY[19] | BITSLICE[36].TX_CE_OFD |
| CELL[42].IMUX_IMUX_DELAY[20] | BITSLICE[36].RX_CE_IFD |
| CELL[42].IMUX_IMUX_DELAY[21] | BITSLICE[36].RX_DATAIN1 |
| CELL[42].IMUX_IMUX_DELAY[22] | BITSLICE[36].CLB2PHY_FIFO_RDEN |
| CELL[42].IMUX_IMUX_DELAY[23] | BITSLICE[36].TX_D5 |
| CELL[42].IMUX_IMUX_DELAY[24] | BITSLICE[36].TX_D4 |
| CELL[42].IMUX_IMUX_DELAY[25] | BITSLICE[36].TX_D3 |
| CELL[42].IMUX_IMUX_DELAY[26] | BITSLICE[36].TX_D2 |
| CELL[42].IMUX_IMUX_DELAY[27] | BITSLICE[36].TX_D1 |
| CELL[42].IMUX_IMUX_DELAY[28] | BITSLICE[36].TX_D0 |
| CELL[42].IMUX_IMUX_DELAY[29] | BITSLICE[36].TX_D6 |
| CELL[42].IMUX_IMUX_DELAY[30] | BITSLICE[36].TX_D7 |
| CELL[42].IMUX_IMUX_DELAY[31] | BITSLICE[36].TX_CNTVALUEIN1 |
| CELL[42].IMUX_IMUX_DELAY[32] | BITSLICE[36].TX_CNTVALUEIN3 |
| CELL[42].IMUX_IMUX_DELAY[33] | BITSLICE[36].TX_CNTVALUEIN4 |
| CELL[42].IMUX_IMUX_DELAY[34] | BITSLICE[36].TX_CNTVALUEIN5 |
| CELL[42].IMUX_IMUX_DELAY[35] | BITSLICE[36].TX_CNTVALUEIN7 |
| CELL[42].IMUX_IMUX_DELAY[36] | BITSLICE[36].RX_CNTVALUEIN0 |
| CELL[42].IMUX_IMUX_DELAY[37] | BITSLICE[36].RX_CNTVALUEIN1 |
| CELL[42].IMUX_IMUX_DELAY[38] | BITSLICE[36].RX_CNTVALUEIN2 |
| CELL[42].IMUX_IMUX_DELAY[39] | BITSLICE[36].RX_CNTVALUEIN4 |
| CELL[42].IMUX_IMUX_DELAY[40] | BITSLICE[36].RX_CNTVALUEIN6 |
| CELL[42].IMUX_IMUX_DELAY[41] | BITSLICE[36].RX_CNTVALUEIN7 |
| CELL[42].IMUX_IMUX_DELAY[42] | BITSLICE[36].RX_CNTVALUEIN8 |
| CELL[42].IMUX_IMUX_DELAY[43] | BITSLICE[37].TX_CE_OFD |
| CELL[42].IMUX_IMUX_DELAY[44] | BITSLICE[37].RX_DATAIN1 |
| CELL[42].IMUX_IMUX_DELAY[45] | BITSLICE[37].CLB2PHY_FIFO_RDEN |
| CELL[42].IMUX_IMUX_DELAY[46] | BITSLICE[37].TX_D0 |
| CELL[42].IMUX_IMUX_DELAY[47] | BITSLICE[37].TX_D2 |
| CELL[43].OUT_BEL[4] | BITSLICE[36].PHY2CLB_FIFO_EMPTY |
| CELL[43].OUT_BEL[5] | BITSLICE[36].RX_Q0 |
| CELL[43].OUT_BEL[6] | BITSLICE[36].RX_Q1 |
| CELL[43].OUT_BEL[7] | BITSLICE[36].RX_Q2 |
| CELL[43].OUT_BEL[8] | BITSLICE[36].RX_Q3 |
| CELL[43].OUT_BEL[9] | BITSLICE[36].RX_Q4 |
| CELL[43].OUT_BEL[10] | BITSLICE[36].RX_Q5 |
| CELL[43].OUT_BEL[11] | BITSLICE[36].RX_Q6 |
| CELL[43].OUT_BEL[12] | BITSLICE[36].RX_Q7 |
| CELL[43].OUT_BEL[13] | BITSLICE[36].TX_CNTVALUEOUT0 |
| CELL[43].OUT_BEL[14] | BITSLICE[36].TX_CNTVALUEOUT1 |
| CELL[43].OUT_BEL[15] | BITSLICE[36].TX_CNTVALUEOUT2 |
| CELL[43].OUT_BEL[16] | BITSLICE[36].TX_CNTVALUEOUT3 |
| CELL[43].OUT_BEL[17] | BITSLICE[36].TX_CNTVALUEOUT4 |
| CELL[43].OUT_BEL[18] | BITSLICE[36].TX_CNTVALUEOUT5 |
| CELL[43].OUT_BEL[19] | BITSLICE[36].TX_CNTVALUEOUT6 |
| CELL[43].OUT_BEL[20] | BITSLICE[36].TX_CNTVALUEOUT7 |
| CELL[43].OUT_BEL[21] | BITSLICE[36].TX_CNTVALUEOUT8 |
| CELL[43].OUT_BEL[23] | BITSLICE[36].RX_CNTVALUEOUT0 |
| CELL[43].OUT_BEL[24] | BITSLICE[36].RX_CNTVALUEOUT1 |
| CELL[43].OUT_BEL[25] | BITSLICE[36].RX_CNTVALUEOUT2 |
| CELL[43].OUT_BEL[26] | BITSLICE[36].RX_CNTVALUEOUT3 |
| CELL[43].OUT_BEL[27] | BITSLICE[36].RX_CNTVALUEOUT4 |
| CELL[43].OUT_BEL[28] | BITSLICE[36].RX_CNTVALUEOUT5 |
| CELL[43].OUT_BEL[29] | BITSLICE[36].RX_CNTVALUEOUT6 |
| CELL[43].OUT_BEL[30] | BITSLICE[36].RX_CNTVALUEOUT7 |
| CELL[43].OUT_BEL[31] | BITSLICE[36].RX_CNTVALUEOUT8 |
| CELL[43].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK9 |
| CELL[43].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B10 |
| CELL[43].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B10 |
| CELL[43].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B10 |
| CELL[43].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B10 |
| CELL[43].IMUX_BYP[6] | BITSLICE[35].RX_CE_IDELAY |
| CELL[43].IMUX_BYP[7] | BITSLICE[35].DYN_DCI_OUT_INT |
| CELL[43].IMUX_BYP[8] | BITSLICE[36].TX_LD |
| CELL[43].IMUX_BYP[9] | BITSLICE[36].TX_INC |
| CELL[43].IMUX_BYP[10] | BITSLICE[36].TX_EN_VTC |
| CELL[43].IMUX_BYP[11] | BITSLICE[36].TX_CE_ODELAY |
| CELL[43].IMUX_BYP[12] | BITSLICE[36].RX_LD |
| CELL[43].IMUX_BYP[13] | BITSLICE[36].RX_INC |
| CELL[43].IMUX_BYP[14] | BITSLICE[36].RX_EN_VTC |
| CELL[43].IMUX_BYP[15] | BITSLICE[36].RX_CE_IDELAY |
| CELL[43].IMUX_IMUX_DELAY[6] | BITSLICE[37].TX_D5 |
| CELL[43].IMUX_IMUX_DELAY[7] | BITSLICE[37].TX_D6 |
| CELL[43].IMUX_IMUX_DELAY[8] | BITSLICE[37].TX_D7 |
| CELL[43].IMUX_IMUX_DELAY[9] | BITSLICE[37].TX_CNTVALUEIN0 |
| CELL[43].IMUX_IMUX_DELAY[10] | BITSLICE[37].TX_CNTVALUEIN1 |
| CELL[43].IMUX_IMUX_DELAY[11] | BITSLICE[37].TX_CNTVALUEIN2 |
| CELL[43].IMUX_IMUX_DELAY[12] | BITSLICE[37].TX_CNTVALUEIN3 |
| CELL[43].IMUX_IMUX_DELAY[13] | BITSLICE[37].TX_CNTVALUEIN4 |
| CELL[43].IMUX_IMUX_DELAY[14] | BITSLICE[37].TX_CNTVALUEIN5 |
| CELL[43].IMUX_IMUX_DELAY[15] | BITSLICE[37].TX_CNTVALUEIN6 |
| CELL[43].IMUX_IMUX_DELAY[16] | BITSLICE[37].TX_D4 |
| CELL[44].OUT_BEL[4] | BITSLICE[37].PHY2CLB_FIFO_EMPTY |
| CELL[44].OUT_BEL[5] | BITSLICE[37].RX_Q0 |
| CELL[44].OUT_BEL[6] | BITSLICE[37].RX_Q1 |
| CELL[44].OUT_BEL[7] | BITSLICE[37].RX_Q2 |
| CELL[44].OUT_BEL[8] | BITSLICE[37].RX_Q3 |
| CELL[44].OUT_BEL[9] | BITSLICE[37].RX_Q4 |
| CELL[44].OUT_BEL[10] | BITSLICE[37].RX_Q5 |
| CELL[44].OUT_BEL[11] | BITSLICE[37].RX_Q6 |
| CELL[44].OUT_BEL[12] | BITSLICE[37].RX_Q7 |
| CELL[44].OUT_BEL[13] | BITSLICE[37].TX_CNTVALUEOUT0 |
| CELL[44].OUT_BEL[14] | BITSLICE[37].TX_CNTVALUEOUT1 |
| CELL[44].OUT_BEL[15] | BITSLICE[37].TX_CNTVALUEOUT2 |
| CELL[44].OUT_BEL[16] | BITSLICE[37].TX_CNTVALUEOUT3 |
| CELL[44].OUT_BEL[17] | BITSLICE[37].TX_CNTVALUEOUT4 |
| CELL[44].OUT_BEL[18] | BITSLICE[37].TX_CNTVALUEOUT5 |
| CELL[44].OUT_BEL[19] | BITSLICE[37].TX_CNTVALUEOUT6 |
| CELL[44].OUT_BEL[20] | BITSLICE[37].TX_CNTVALUEOUT7 |
| CELL[44].OUT_BEL[21] | BITSLICE[37].TX_CNTVALUEOUT8 |
| CELL[44].OUT_BEL[23] | BITSLICE[37].RX_CNTVALUEOUT0 |
| CELL[44].OUT_BEL[24] | BITSLICE[37].RX_CNTVALUEOUT1 |
| CELL[44].OUT_BEL[25] | BITSLICE[37].RX_CNTVALUEOUT2 |
| CELL[44].OUT_BEL[26] | BITSLICE[37].RX_CNTVALUEOUT3 |
| CELL[44].OUT_BEL[27] | BITSLICE[37].RX_CNTVALUEOUT4 |
| CELL[44].OUT_BEL[28] | BITSLICE[37].RX_CNTVALUEOUT5 |
| CELL[44].OUT_BEL[29] | BITSLICE[37].RX_CNTVALUEOUT6 |
| CELL[44].OUT_BEL[30] | BITSLICE[37].RX_CNTVALUEOUT7 |
| CELL[44].OUT_BEL[31] | BITSLICE[37].RX_CNTVALUEOUT8 |
| CELL[44].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK10 |
| CELL[44].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[2].TXBIT_RST_B11 |
| CELL[44].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[2].RXBIT_RST_B11 |
| CELL[44].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[2].ODELAY_RST_B11 |
| CELL[44].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[2].IDELAY_RST_B11 |
| CELL[44].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[2].CLB2PHY_FIFO_CLK11 |
| CELL[44].IMUX_BYP[6] | BITSLICE[36].DYN_DCI_OUT_INT |
| CELL[44].IMUX_BYP[7] | BITSLICE[37].TX_LD |
| CELL[44].IMUX_BYP[8] | BITSLICE[37].TX_INC |
| CELL[44].IMUX_BYP[9] | BITSLICE[37].TX_EN_VTC |
| CELL[44].IMUX_BYP[10] | BITSLICE[37].TX_CE_ODELAY |
| CELL[44].IMUX_BYP[11] | BITSLICE[37].RX_LD |
| CELL[44].IMUX_BYP[12] | BITSLICE[37].RX_INC |
| CELL[44].IMUX_BYP[13] | BITSLICE[37].RX_EN_VTC |
| CELL[44].IMUX_BYP[14] | BITSLICE[37].RX_CE_IDELAY |
| CELL[44].IMUX_BYP[15] | BITSLICE[37].DYN_DCI_OUT_INT |
| CELL[44].IMUX_IMUX_DELAY[6] | BITSLICE[37].TX_CNTVALUEIN8 |
| CELL[44].IMUX_IMUX_DELAY[7] | BITSLICE[37].RX_CNTVALUEIN0 |
| CELL[44].IMUX_IMUX_DELAY[8] | BITSLICE[37].RX_CNTVALUEIN1 |
| CELL[44].IMUX_IMUX_DELAY[9] | BITSLICE[37].RX_CNTVALUEIN2 |
| CELL[44].IMUX_IMUX_DELAY[10] | BITSLICE[37].RX_CNTVALUEIN3 |
| CELL[44].IMUX_IMUX_DELAY[11] | BITSLICE[37].RX_CNTVALUEIN4 |
| CELL[44].IMUX_IMUX_DELAY[12] | BITSLICE[37].RX_CNTVALUEIN5 |
| CELL[44].IMUX_IMUX_DELAY[13] | BITSLICE[37].RX_CNTVALUEIN6 |
| CELL[44].IMUX_IMUX_DELAY[14] | BITSLICE[37].RX_CNTVALUEIN7 |
| CELL[44].IMUX_IMUX_DELAY[15] | BITSLICE[37].RX_CNTVALUEIN8 |
| CELL[44].IMUX_IMUX_DELAY[16] | BITSLICE[37].TX_CNTVALUEIN7 |
| CELL[45].OUT_BEL[4] | BITSLICE[39].PHY2CLB_FIFO_EMPTY |
| CELL[45].OUT_BEL[5] | BITSLICE[39].RX_Q0 |
| CELL[45].OUT_BEL[6] | BITSLICE[39].RX_Q1 |
| CELL[45].OUT_BEL[7] | BITSLICE[39].RX_Q2 |
| CELL[45].OUT_BEL[8] | BITSLICE[39].RX_Q3 |
| CELL[45].OUT_BEL[9] | BITSLICE[39].RX_Q4 |
| CELL[45].OUT_BEL[10] | BITSLICE[39].RX_Q5 |
| CELL[45].OUT_BEL[11] | BITSLICE[39].RX_Q6 |
| CELL[45].OUT_BEL[12] | BITSLICE[39].RX_Q7 |
| CELL[45].OUT_BEL[13] | BITSLICE[39].TX_CNTVALUEOUT0 |
| CELL[45].OUT_BEL[14] | BITSLICE[39].TX_CNTVALUEOUT1 |
| CELL[45].OUT_BEL[15] | BITSLICE[39].TX_CNTVALUEOUT2 |
| CELL[45].OUT_BEL[16] | BITSLICE[39].TX_CNTVALUEOUT3 |
| CELL[45].OUT_BEL[17] | BITSLICE[39].TX_CNTVALUEOUT4 |
| CELL[45].OUT_BEL[18] | BITSLICE[39].TX_CNTVALUEOUT5 |
| CELL[45].OUT_BEL[19] | BITSLICE[39].TX_CNTVALUEOUT6 |
| CELL[45].OUT_BEL[20] | BITSLICE[39].TX_CNTVALUEOUT7 |
| CELL[45].OUT_BEL[21] | BITSLICE[39].TX_CNTVALUEOUT8 |
| CELL[45].OUT_BEL[22] | BITSLICE[39].TX_T_OUT |
| CELL[45].OUT_BEL[23] | BITSLICE[39].RX_CNTVALUEOUT0 |
| CELL[45].OUT_BEL[24] | BITSLICE[39].RX_CNTVALUEOUT1 |
| CELL[45].OUT_BEL[25] | BITSLICE[39].RX_CNTVALUEOUT2 |
| CELL[45].OUT_BEL[26] | BITSLICE[39].RX_CNTVALUEOUT3 |
| CELL[45].OUT_BEL[27] | BITSLICE[39].RX_CNTVALUEOUT4 |
| CELL[45].OUT_BEL[28] | BITSLICE[39].RX_CNTVALUEOUT5 |
| CELL[45].OUT_BEL[29] | BITSLICE[39].RX_CNTVALUEOUT6 |
| CELL[45].OUT_BEL[30] | BITSLICE[39].RX_CNTVALUEOUT7 |
| CELL[45].OUT_BEL[31] | BITSLICE[39].RX_CNTVALUEOUT8 |
| CELL[45].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].TXBIT_TRI_RST_B0 |
| CELL[45].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B0 |
| CELL[45].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B0 |
| CELL[45].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B0 |
| CELL[45].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B0 |
| CELL[45].IMUX_BYP[6] | BITSLICE_T[6].EN_VTC |
| CELL[45].IMUX_BYP[7] | BITSLICE[39].TX_LD |
| CELL[45].IMUX_BYP[8] | BITSLICE[39].TX_INC |
| CELL[45].IMUX_BYP[9] | BITSLICE[39].TX_EN_VTC |
| CELL[45].IMUX_BYP[10] | BITSLICE[39].TX_CE_ODELAY |
| CELL[45].IMUX_BYP[11] | BITSLICE[39].RX_LD |
| CELL[45].IMUX_BYP[12] | BITSLICE[39].RX_INC |
| CELL[45].IMUX_BYP[13] | BITSLICE[39].RX_EN_VTC |
| CELL[45].IMUX_BYP[14] | BITSLICE[39].RX_CE_IDELAY |
| CELL[45].IMUX_BYP[15] | BITSLICE[39].DYN_DCI_OUT_INT |
| CELL[45].IMUX_IMUX_DELAY[6] | BITSLICE[39].TX_CE_OFD |
| CELL[45].IMUX_IMUX_DELAY[7] | BITSLICE[39].RX_CE_IFD |
| CELL[45].IMUX_IMUX_DELAY[8] | BITSLICE[39].RX_DATAIN1 |
| CELL[45].IMUX_IMUX_DELAY[9] | BITSLICE[39].CLB2PHY_FIFO_RDEN |
| CELL[45].IMUX_IMUX_DELAY[10] | BITSLICE[39].TX_D7 |
| CELL[45].IMUX_IMUX_DELAY[11] | BITSLICE[39].TX_D6 |
| CELL[45].IMUX_IMUX_DELAY[12] | BITSLICE[39].TX_D5 |
| CELL[45].IMUX_IMUX_DELAY[13] | BITSLICE[39].TX_D4 |
| CELL[45].IMUX_IMUX_DELAY[14] | BITSLICE[39].TX_D3 |
| CELL[45].IMUX_IMUX_DELAY[15] | BITSLICE[39].TX_D2 |
| CELL[45].IMUX_IMUX_DELAY[16] | BITSLICE[39].TX_T |
| CELL[46].OUT_BEL[4] | BITSLICE[40].PHY2CLB_FIFO_EMPTY |
| CELL[46].OUT_BEL[5] | BITSLICE[40].RX_Q0 |
| CELL[46].OUT_BEL[6] | BITSLICE[40].RX_Q1 |
| CELL[46].OUT_BEL[7] | BITSLICE[40].RX_Q2 |
| CELL[46].OUT_BEL[8] | BITSLICE[40].RX_Q3 |
| CELL[46].OUT_BEL[9] | BITSLICE[40].RX_Q4 |
| CELL[46].OUT_BEL[10] | BITSLICE[40].RX_Q5 |
| CELL[46].OUT_BEL[11] | BITSLICE[40].RX_Q6 |
| CELL[46].OUT_BEL[12] | BITSLICE[40].RX_Q7 |
| CELL[46].OUT_BEL[13] | BITSLICE[40].TX_CNTVALUEOUT0 |
| CELL[46].OUT_BEL[14] | BITSLICE[40].TX_CNTVALUEOUT1 |
| CELL[46].OUT_BEL[15] | BITSLICE[40].TX_CNTVALUEOUT2 |
| CELL[46].OUT_BEL[16] | BITSLICE[40].TX_CNTVALUEOUT3 |
| CELL[46].OUT_BEL[17] | BITSLICE[40].TX_CNTVALUEOUT4 |
| CELL[46].OUT_BEL[18] | BITSLICE[40].TX_CNTVALUEOUT5 |
| CELL[46].OUT_BEL[19] | BITSLICE[40].TX_CNTVALUEOUT6 |
| CELL[46].OUT_BEL[20] | BITSLICE[40].TX_CNTVALUEOUT7 |
| CELL[46].OUT_BEL[21] | BITSLICE[40].TX_CNTVALUEOUT8 |
| CELL[46].OUT_BEL[22] | BITSLICE[40].TX_T_OUT |
| CELL[46].OUT_BEL[23] | BITSLICE[40].RX_CNTVALUEOUT0 |
| CELL[46].OUT_BEL[24] | BITSLICE[40].RX_CNTVALUEOUT1 |
| CELL[46].OUT_BEL[25] | BITSLICE[40].RX_CNTVALUEOUT2 |
| CELL[46].OUT_BEL[26] | BITSLICE[40].RX_CNTVALUEOUT3 |
| CELL[46].OUT_BEL[27] | BITSLICE[40].RX_CNTVALUEOUT4 |
| CELL[46].OUT_BEL[28] | BITSLICE[40].RX_CNTVALUEOUT5 |
| CELL[46].OUT_BEL[29] | BITSLICE[40].RX_CNTVALUEOUT6 |
| CELL[46].OUT_BEL[30] | BITSLICE[40].RX_CNTVALUEOUT7 |
| CELL[46].OUT_BEL[31] | BITSLICE[40].RX_CNTVALUEOUT8 |
| CELL[46].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK0 |
| CELL[46].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].TXBIT_TRI_RST_B1 |
| CELL[46].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B1 |
| CELL[46].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B1 |
| CELL[46].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B1 |
| CELL[46].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B1 |
| CELL[46].IMUX_BYP[6] | BITSLICE_T[7].EN_VTC |
| CELL[46].IMUX_BYP[7] | BITSLICE[40].TX_LD |
| CELL[46].IMUX_BYP[8] | BITSLICE[40].TX_INC |
| CELL[46].IMUX_BYP[9] | BITSLICE[40].TX_EN_VTC |
| CELL[46].IMUX_BYP[10] | BITSLICE[40].TX_CE_ODELAY |
| CELL[46].IMUX_BYP[11] | BITSLICE[40].RX_LD |
| CELL[46].IMUX_BYP[12] | BITSLICE[40].RX_INC |
| CELL[46].IMUX_BYP[13] | BITSLICE[40].RX_EN_VTC |
| CELL[46].IMUX_BYP[14] | BITSLICE[40].RX_CE_IDELAY |
| CELL[46].IMUX_BYP[15] | BITSLICE[40].DYN_DCI_OUT_INT |
| CELL[46].IMUX_IMUX_DELAY[6] | BITSLICE[39].TX_D1 |
| CELL[46].IMUX_IMUX_DELAY[7] | BITSLICE[39].TX_CNTVALUEIN0 |
| CELL[46].IMUX_IMUX_DELAY[8] | BITSLICE[39].TX_CNTVALUEIN1 |
| CELL[46].IMUX_IMUX_DELAY[9] | BITSLICE[39].TX_CNTVALUEIN2 |
| CELL[46].IMUX_IMUX_DELAY[10] | BITSLICE[39].TX_CNTVALUEIN3 |
| CELL[46].IMUX_IMUX_DELAY[11] | BITSLICE[39].TX_CNTVALUEIN4 |
| CELL[46].IMUX_IMUX_DELAY[12] | BITSLICE[39].TX_CNTVALUEIN5 |
| CELL[46].IMUX_IMUX_DELAY[13] | BITSLICE[39].TX_CNTVALUEIN6 |
| CELL[46].IMUX_IMUX_DELAY[14] | BITSLICE[39].TX_CNTVALUEIN7 |
| CELL[46].IMUX_IMUX_DELAY[15] | BITSLICE[39].TX_CNTVALUEIN8 |
| CELL[46].IMUX_IMUX_DELAY[16] | BITSLICE[39].TX_D0 |
| CELL[47].OUT_BEL[4] | BITSLICE[41].PHY2CLB_FIFO_EMPTY |
| CELL[47].OUT_BEL[5] | BITSLICE[41].RX_Q0 |
| CELL[47].OUT_BEL[6] | BITSLICE[41].RX_Q1 |
| CELL[47].OUT_BEL[7] | BITSLICE[41].RX_Q2 |
| CELL[47].OUT_BEL[8] | BITSLICE[41].RX_Q3 |
| CELL[47].OUT_BEL[9] | BITSLICE[41].RX_Q4 |
| CELL[47].OUT_BEL[10] | BITSLICE[41].RX_Q5 |
| CELL[47].OUT_BEL[11] | BITSLICE[41].RX_Q6 |
| CELL[47].OUT_BEL[12] | BITSLICE[41].RX_Q7 |
| CELL[47].OUT_BEL[13] | BITSLICE[41].TX_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[14] | BITSLICE[41].TX_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[15] | BITSLICE[41].TX_CNTVALUEOUT2 |
| CELL[47].OUT_BEL[16] | BITSLICE[41].TX_CNTVALUEOUT3 |
| CELL[47].OUT_BEL[17] | BITSLICE[41].TX_CNTVALUEOUT4 |
| CELL[47].OUT_BEL[18] | BITSLICE[41].TX_CNTVALUEOUT5 |
| CELL[47].OUT_BEL[19] | BITSLICE[41].TX_CNTVALUEOUT6 |
| CELL[47].OUT_BEL[20] | BITSLICE[41].TX_CNTVALUEOUT7 |
| CELL[47].OUT_BEL[21] | BITSLICE[41].TX_CNTVALUEOUT8 |
| CELL[47].OUT_BEL[22] | BITSLICE[41].TX_T_OUT |
| CELL[47].OUT_BEL[23] | BITSLICE[41].RX_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[24] | BITSLICE[41].RX_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[25] | BITSLICE[41].RX_CNTVALUEOUT2 |
| CELL[47].OUT_BEL[26] | BITSLICE[41].RX_CNTVALUEOUT3 |
| CELL[47].OUT_BEL[27] | BITSLICE[41].RX_CNTVALUEOUT4 |
| CELL[47].OUT_BEL[28] | BITSLICE[41].RX_CNTVALUEOUT5 |
| CELL[47].OUT_BEL[29] | BITSLICE[41].RX_CNTVALUEOUT6 |
| CELL[47].OUT_BEL[30] | BITSLICE[41].RX_CNTVALUEOUT7 |
| CELL[47].OUT_BEL[31] | BITSLICE[41].RX_CNTVALUEOUT8 |
| CELL[47].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK1 |
| CELL[47].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B2 |
| CELL[47].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B2 |
| CELL[47].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B2 |
| CELL[47].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B2 |
| CELL[47].IMUX_BYP[6] | BITSLICE[41].TX_LD |
| CELL[47].IMUX_BYP[7] | BITSLICE[41].TX_INC |
| CELL[47].IMUX_BYP[8] | BITSLICE[41].TX_EN_VTC |
| CELL[47].IMUX_BYP[9] | BITSLICE[41].TX_CE_ODELAY |
| CELL[47].IMUX_BYP[10] | BITSLICE[41].RX_LD |
| CELL[47].IMUX_BYP[11] | BITSLICE[41].RX_INC |
| CELL[47].IMUX_BYP[12] | BITSLICE[41].RX_EN_VTC |
| CELL[47].IMUX_BYP[13] | BITSLICE[41].RX_CE_IDELAY |
| CELL[47].IMUX_BYP[14] | BITSLICE[41].DYN_DCI_OUT_INT |
| CELL[47].IMUX_BYP[15] | BITSLICE_T[6].CE_OFD |
| CELL[47].IMUX_IMUX_DELAY[6] | BITSLICE[40].TX_D1 |
| CELL[47].IMUX_IMUX_DELAY[7] | BITSLICE[40].TX_D3 |
| CELL[47].IMUX_IMUX_DELAY[8] | BITSLICE[40].TX_D7 |
| CELL[47].IMUX_IMUX_DELAY[9] | BITSLICE[40].TX_CNTVALUEIN1 |
| CELL[47].IMUX_IMUX_DELAY[10] | BITSLICE[40].TX_CNTVALUEIN5 |
| CELL[47].IMUX_IMUX_DELAY[11] | BITSLICE[40].TX_CNTVALUEIN7 |
| CELL[47].IMUX_IMUX_DELAY[12] | BITSLICE[40].RX_CNTVALUEIN2 |
| CELL[47].IMUX_IMUX_DELAY[13] | BITSLICE[40].RX_CNTVALUEIN4 |
| CELL[47].IMUX_IMUX_DELAY[14] | BITSLICE[40].RX_CNTVALUEIN8 |
| CELL[47].IMUX_IMUX_DELAY[15] | BITSLICE[41].TX_CE_OFD |
| CELL[47].IMUX_IMUX_DELAY[16] | BITSLICE[39].RX_CNTVALUEIN0 |
| CELL[47].IMUX_IMUX_DELAY[17] | BITSLICE[39].RX_CNTVALUEIN1 |
| CELL[47].IMUX_IMUX_DELAY[18] | BITSLICE[39].RX_CNTVALUEIN2 |
| CELL[47].IMUX_IMUX_DELAY[19] | BITSLICE[39].RX_CNTVALUEIN3 |
| CELL[47].IMUX_IMUX_DELAY[20] | BITSLICE[39].RX_CNTVALUEIN4 |
| CELL[47].IMUX_IMUX_DELAY[21] | BITSLICE[39].RX_CNTVALUEIN5 |
| CELL[47].IMUX_IMUX_DELAY[22] | BITSLICE[39].RX_CNTVALUEIN6 |
| CELL[47].IMUX_IMUX_DELAY[23] | BITSLICE[39].RX_CNTVALUEIN7 |
| CELL[47].IMUX_IMUX_DELAY[24] | BITSLICE[39].RX_CNTVALUEIN8 |
| CELL[47].IMUX_IMUX_DELAY[25] | BITSLICE[40].TX_T |
| CELL[47].IMUX_IMUX_DELAY[26] | BITSLICE[40].TX_CE_OFD |
| CELL[47].IMUX_IMUX_DELAY[27] | BITSLICE[40].RX_CE_IFD |
| CELL[47].IMUX_IMUX_DELAY[28] | BITSLICE[40].RX_DATAIN1 |
| CELL[47].IMUX_IMUX_DELAY[29] | BITSLICE[40].CLB2PHY_FIFO_RDEN |
| CELL[47].IMUX_IMUX_DELAY[30] | BITSLICE[40].TX_D0 |
| CELL[47].IMUX_IMUX_DELAY[31] | BITSLICE[40].TX_D2 |
| CELL[47].IMUX_IMUX_DELAY[32] | BITSLICE[40].TX_D4 |
| CELL[47].IMUX_IMUX_DELAY[33] | BITSLICE[40].TX_D5 |
| CELL[47].IMUX_IMUX_DELAY[34] | BITSLICE[40].TX_D6 |
| CELL[47].IMUX_IMUX_DELAY[35] | BITSLICE[40].TX_CNTVALUEIN0 |
| CELL[47].IMUX_IMUX_DELAY[36] | BITSLICE[40].TX_CNTVALUEIN2 |
| CELL[47].IMUX_IMUX_DELAY[37] | BITSLICE[40].TX_CNTVALUEIN3 |
| CELL[47].IMUX_IMUX_DELAY[38] | BITSLICE[40].TX_CNTVALUEIN4 |
| CELL[47].IMUX_IMUX_DELAY[39] | BITSLICE[40].TX_CNTVALUEIN6 |
| CELL[47].IMUX_IMUX_DELAY[40] | BITSLICE[40].TX_CNTVALUEIN8 |
| CELL[47].IMUX_IMUX_DELAY[41] | BITSLICE[40].RX_CNTVALUEIN0 |
| CELL[47].IMUX_IMUX_DELAY[42] | BITSLICE[40].RX_CNTVALUEIN1 |
| CELL[47].IMUX_IMUX_DELAY[43] | BITSLICE[40].RX_CNTVALUEIN3 |
| CELL[47].IMUX_IMUX_DELAY[44] | BITSLICE[40].RX_CNTVALUEIN5 |
| CELL[47].IMUX_IMUX_DELAY[45] | BITSLICE[40].RX_CNTVALUEIN6 |
| CELL[47].IMUX_IMUX_DELAY[46] | BITSLICE[40].RX_CNTVALUEIN7 |
| CELL[47].IMUX_IMUX_DELAY[47] | BITSLICE[41].TX_T |
| CELL[48].OUT_BEL[4] | BITSLICE_T[6].CNTVALUEOUT0 |
| CELL[48].OUT_BEL[5] | BITSLICE_T[6].CNTVALUEOUT1 |
| CELL[48].OUT_BEL[6] | BITSLICE_T[6].CNTVALUEOUT2 |
| CELL[48].OUT_BEL[7] | BITSLICE_T[6].CNTVALUEOUT3 |
| CELL[48].OUT_BEL[8] | BITSLICE_T[6].CNTVALUEOUT4 |
| CELL[48].OUT_BEL[9] | BITSLICE_T[6].CNTVALUEOUT5 |
| CELL[48].OUT_BEL[10] | BITSLICE_T[6].CNTVALUEOUT6 |
| CELL[48].OUT_BEL[11] | BITSLICE_T[6].CNTVALUEOUT7 |
| CELL[48].OUT_BEL[12] | BITSLICE_T[6].CNTVALUEOUT8 |
| CELL[48].OUT_BEL[13] | BITSLICE[42].TX_T_OUT |
| CELL[48].OUT_BEL[14] | BITSLICE_CONTROL[6].PHY2CLB_PHY_RDY |
| CELL[48].OUT_BEL[15] | BITSLICE_CONTROL[6].MASTER_PD_OUT |
| CELL[48].OUT_BEL[16] | BITSLICE_CONTROL[6].PHY2CLB_FIXDLY_RDY |
| CELL[48].OUT_BEL[17] | BITSLICE_CONTROL[6].CTRL_DLY_TEST_OUT |
| CELL[48].OUT_BEL[18] | BITSLICE[42].PHY2CLB_FIFO_EMPTY |
| CELL[48].OUT_BEL[19] | BITSLICE[42].RX_Q0 |
| CELL[48].OUT_BEL[20] | BITSLICE[42].RX_Q1 |
| CELL[48].OUT_BEL[21] | BITSLICE[42].RX_Q2 |
| CELL[48].OUT_BEL[22] | BITSLICE[42].RX_Q3 |
| CELL[48].OUT_BEL[23] | BITSLICE[42].RX_Q4 |
| CELL[48].OUT_BEL[24] | BITSLICE[42].RX_Q5 |
| CELL[48].OUT_BEL[25] | BITSLICE[42].RX_Q6 |
| CELL[48].OUT_BEL[26] | BITSLICE[42].RX_Q7 |
| CELL[48].OUT_BEL[27] | BITSLICE[42].TX_CNTVALUEOUT0 |
| CELL[48].OUT_BEL[28] | BITSLICE[42].TX_CNTVALUEOUT1 |
| CELL[48].OUT_BEL[29] | BITSLICE[42].TX_CNTVALUEOUT2 |
| CELL[48].OUT_BEL[30] | BITSLICE[42].TX_CNTVALUEOUT3 |
| CELL[48].OUT_BEL[31] | BITSLICE[42].TX_CNTVALUEOUT4 |
| CELL[48].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK2 |
| CELL[48].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].TRISTATE_ODELAY_RST_B0 |
| CELL[48].IMUX_CTRL[5] | BITSLICE_CONTROL[6].REFCLK |
| CELL[48].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].CTRL_RST_B_LOW |
| CELL[48].IMUX_CTRL[7] | BITSLICE_CONTROL[6].RIU_CLK, XIPHY_FEEDTHROUGH[3].CLB2PHY_CTRL_CLK_LOW |
| CELL[48].IMUX_BYP[6] | BITSLICE_T[6].LD |
| CELL[48].IMUX_BYP[7] | BITSLICE_T[6].INC |
| CELL[48].IMUX_BYP[8] | BITSLICE_T[6].CE_ODELAY |
| CELL[48].IMUX_BYP[9] | BITSLICE_CONTROL[6].EN_VTC |
| CELL[48].IMUX_BYP[10] | BITSLICE_CONTROL[6].CTRL_DLY_TEST_IN |
| CELL[48].IMUX_BYP[12] | BITSLICE[42].TX_LD |
| CELL[48].IMUX_BYP[13] | BITSLICE[42].TX_INC |
| CELL[48].IMUX_BYP[14] | BITSLICE[42].TX_EN_VTC |
| CELL[48].IMUX_BYP[15] | BITSLICE[42].TX_CE_ODELAY |
| CELL[48].IMUX_IMUX_DELAY[6] | BITSLICE[41].TX_CNTVALUEIN3 |
| CELL[48].IMUX_IMUX_DELAY[7] | BITSLICE[41].TX_CNTVALUEIN5 |
| CELL[48].IMUX_IMUX_DELAY[8] | BITSLICE[41].RX_CNTVALUEIN0 |
| CELL[48].IMUX_IMUX_DELAY[9] | BITSLICE[41].RX_CNTVALUEIN2 |
| CELL[48].IMUX_IMUX_DELAY[10] | BITSLICE[41].RX_CNTVALUEIN6 |
| CELL[48].IMUX_IMUX_DELAY[11] | BITSLICE[41].RX_CNTVALUEIN8 |
| CELL[48].IMUX_IMUX_DELAY[12] | BITSLICE_T[6].CNTVALUEIN3 |
| CELL[48].IMUX_IMUX_DELAY[13] | BITSLICE_T[6].CNTVALUEIN5 |
| CELL[48].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[6].CLB2RIU_NIBBLE_SEL |
| CELL[48].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[6].CLB2PHY_WRCS1_1 |
| CELL[48].IMUX_IMUX_DELAY[16] | BITSLICE[41].RX_CE_IFD |
| CELL[48].IMUX_IMUX_DELAY[17] | BITSLICE[41].RX_DATAIN1 |
| CELL[48].IMUX_IMUX_DELAY[18] | BITSLICE[41].CLB2PHY_FIFO_RDEN |
| CELL[48].IMUX_IMUX_DELAY[20] | BITSLICE[41].TX_D0 |
| CELL[48].IMUX_IMUX_DELAY[21] | BITSLICE[41].TX_D1 |
| CELL[48].IMUX_IMUX_DELAY[22] | BITSLICE[41].TX_D2 |
| CELL[48].IMUX_IMUX_DELAY[23] | BITSLICE[41].TX_D3 |
| CELL[48].IMUX_IMUX_DELAY[24] | BITSLICE[41].TX_D4 |
| CELL[48].IMUX_IMUX_DELAY[25] | BITSLICE[41].TX_D5 |
| CELL[48].IMUX_IMUX_DELAY[26] | BITSLICE[41].TX_D6 |
| CELL[48].IMUX_IMUX_DELAY[27] | BITSLICE[41].TX_D7 |
| CELL[48].IMUX_IMUX_DELAY[28] | BITSLICE[41].TX_CNTVALUEIN0 |
| CELL[48].IMUX_IMUX_DELAY[29] | BITSLICE[41].TX_CNTVALUEIN1 |
| CELL[48].IMUX_IMUX_DELAY[30] | BITSLICE[41].TX_CNTVALUEIN2 |
| CELL[48].IMUX_IMUX_DELAY[31] | BITSLICE[41].TX_CNTVALUEIN4 |
| CELL[48].IMUX_IMUX_DELAY[32] | BITSLICE[41].TX_CNTVALUEIN6 |
| CELL[48].IMUX_IMUX_DELAY[33] | BITSLICE[41].TX_CNTVALUEIN7 |
| CELL[48].IMUX_IMUX_DELAY[34] | BITSLICE[41].TX_CNTVALUEIN8 |
| CELL[48].IMUX_IMUX_DELAY[35] | BITSLICE[41].RX_CNTVALUEIN1 |
| CELL[48].IMUX_IMUX_DELAY[36] | BITSLICE[41].RX_CNTVALUEIN3 |
| CELL[48].IMUX_IMUX_DELAY[37] | BITSLICE[41].RX_CNTVALUEIN4 |
| CELL[48].IMUX_IMUX_DELAY[38] | BITSLICE[41].RX_CNTVALUEIN5 |
| CELL[48].IMUX_IMUX_DELAY[39] | BITSLICE[41].RX_CNTVALUEIN7 |
| CELL[48].IMUX_IMUX_DELAY[40] | BITSLICE_T[6].CNTVALUEIN0 |
| CELL[48].IMUX_IMUX_DELAY[41] | BITSLICE_T[6].CNTVALUEIN1 |
| CELL[48].IMUX_IMUX_DELAY[42] | BITSLICE_T[6].CNTVALUEIN2 |
| CELL[48].IMUX_IMUX_DELAY[43] | BITSLICE_T[6].CNTVALUEIN4 |
| CELL[48].IMUX_IMUX_DELAY[44] | BITSLICE_T[6].CNTVALUEIN6 |
| CELL[48].IMUX_IMUX_DELAY[45] | BITSLICE_T[6].CNTVALUEIN7 |
| CELL[48].IMUX_IMUX_DELAY[46] | BITSLICE_T[6].CNTVALUEIN8 |
| CELL[48].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[6].CLB2PHY_WRCS1_0 |
| CELL[49].OUT_BEL[4] | BITSLICE[42].TX_CNTVALUEOUT5 |
| CELL[49].OUT_BEL[5] | BITSLICE[42].TX_CNTVALUEOUT6 |
| CELL[49].OUT_BEL[6] | BITSLICE[42].TX_CNTVALUEOUT7 |
| CELL[49].OUT_BEL[7] | BITSLICE[42].TX_CNTVALUEOUT8 |
| CELL[49].OUT_BEL[8] | BITSLICE[43].TX_T_OUT |
| CELL[49].OUT_BEL[9] | BITSLICE[42].RX_CNTVALUEOUT0 |
| CELL[49].OUT_BEL[10] | BITSLICE[42].RX_CNTVALUEOUT1 |
| CELL[49].OUT_BEL[11] | BITSLICE[42].RX_CNTVALUEOUT2 |
| CELL[49].OUT_BEL[12] | BITSLICE[42].RX_CNTVALUEOUT3 |
| CELL[49].OUT_BEL[13] | BITSLICE[42].RX_CNTVALUEOUT4 |
| CELL[49].OUT_BEL[14] | BITSLICE[42].RX_CNTVALUEOUT5 |
| CELL[49].OUT_BEL[15] | BITSLICE[42].RX_CNTVALUEOUT6 |
| CELL[49].OUT_BEL[16] | BITSLICE[42].RX_CNTVALUEOUT7 |
| CELL[49].OUT_BEL[17] | BITSLICE[42].RX_CNTVALUEOUT8 |
| CELL[49].OUT_BEL[18] | BITSLICE[43].PHY2CLB_FIFO_EMPTY |
| CELL[49].OUT_BEL[19] | BITSLICE[43].RX_Q0 |
| CELL[49].OUT_BEL[20] | BITSLICE[43].RX_Q1 |
| CELL[49].OUT_BEL[21] | BITSLICE[43].RX_Q2 |
| CELL[49].OUT_BEL[22] | BITSLICE[43].RX_Q3 |
| CELL[49].OUT_BEL[23] | BITSLICE[43].RX_Q4 |
| CELL[49].OUT_BEL[24] | BITSLICE[43].RX_Q5 |
| CELL[49].OUT_BEL[25] | BITSLICE[43].RX_Q6 |
| CELL[49].OUT_BEL[26] | BITSLICE[43].RX_Q7 |
| CELL[49].OUT_BEL[27] | BITSLICE[43].TX_CNTVALUEOUT0 |
| CELL[49].OUT_BEL[28] | BITSLICE[43].TX_CNTVALUEOUT1 |
| CELL[49].OUT_BEL[29] | BITSLICE[43].TX_CNTVALUEOUT2 |
| CELL[49].OUT_BEL[30] | BITSLICE[43].TX_CNTVALUEOUT3 |
| CELL[49].OUT_BEL[31] | BITSLICE[43].TX_CNTVALUEOUT4 |
| CELL[49].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B3 |
| CELL[49].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B3 |
| CELL[49].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B3 |
| CELL[49].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B3 |
| CELL[49].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK3 |
| CELL[49].IMUX_BYP[6] | BITSLICE[42].RX_LD |
| CELL[49].IMUX_BYP[7] | BITSLICE[42].RX_INC |
| CELL[49].IMUX_BYP[8] | BITSLICE[42].RX_EN_VTC |
| CELL[49].IMUX_BYP[9] | BITSLICE[42].RX_CE_IDELAY |
| CELL[49].IMUX_BYP[10] | BITSLICE[42].DYN_DCI_OUT_INT |
| CELL[49].IMUX_BYP[11] | BITSLICE[43].TX_LD |
| CELL[49].IMUX_BYP[12] | BITSLICE[43].TX_INC |
| CELL[49].IMUX_BYP[13] | BITSLICE[43].TX_EN_VTC |
| CELL[49].IMUX_BYP[14] | BITSLICE[43].TX_CE_ODELAY |
| CELL[49].IMUX_BYP[15] | BITSLICE[43].RX_LD |
| CELL[49].IMUX_IMUX_DELAY[6] | BITSLICE_CONTROL[6].CLB2PHY_RDCS1_1 |
| CELL[49].IMUX_IMUX_DELAY[7] | BITSLICE_CONTROL[6].CLB2PHY_RDCS1_3 |
| CELL[49].IMUX_IMUX_DELAY[8] | BITSLICE_CONTROL[6].CLB2PHY_RDCS0_3 |
| CELL[49].IMUX_IMUX_DELAY[9] | BITSLICE[42].TX_CE_OFD |
| CELL[49].IMUX_IMUX_DELAY[10] | BITSLICE[42].TX_D0 |
| CELL[49].IMUX_IMUX_DELAY[11] | BITSLICE[42].TX_D2 |
| CELL[49].IMUX_IMUX_DELAY[12] | BITSLICE[42].TX_D6 |
| CELL[49].IMUX_IMUX_DELAY[13] | BITSLICE[42].TX_D7 |
| CELL[49].IMUX_IMUX_DELAY[14] | BITSLICE[42].TX_CNTVALUEIN3 |
| CELL[49].IMUX_IMUX_DELAY[15] | BITSLICE[42].TX_CNTVALUEIN5 |
| CELL[49].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[6].CLB2PHY_WRCS1_2 |
| CELL[49].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[6].CLB2PHY_WRCS1_3 |
| CELL[49].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[6].CLB2PHY_WRCS0_0 |
| CELL[49].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[6].CLB2PHY_WRCS0_1 |
| CELL[49].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[6].CLB2PHY_WRCS0_2 |
| CELL[49].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[6].CLB2PHY_WRCS0_3 |
| CELL[49].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[6].CLB2PHY_T_B0 |
| CELL[49].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[6].CLB2PHY_T_B1 |
| CELL[49].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[6].CLB2PHY_T_B2 |
| CELL[49].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[6].CLB2PHY_T_B3 |
| CELL[49].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[6].CLB2PHY_RDEN0 |
| CELL[49].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[6].CLB2PHY_RDEN1 |
| CELL[49].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[6].CLB2PHY_RDEN2 |
| CELL[49].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[6].CLB2PHY_RDEN3 |
| CELL[49].IMUX_IMUX_DELAY[30] | BITSLICE_CONTROL[6].CLB2PHY_RDCS1_0 |
| CELL[49].IMUX_IMUX_DELAY[31] | BITSLICE_CONTROL[6].CLB2PHY_RDCS1_2 |
| CELL[49].IMUX_IMUX_DELAY[32] | BITSLICE_CONTROL[6].CLB2PHY_RDCS0_0 |
| CELL[49].IMUX_IMUX_DELAY[33] | BITSLICE_CONTROL[6].CLB2PHY_RDCS0_1 |
| CELL[49].IMUX_IMUX_DELAY[34] | BITSLICE_CONTROL[6].CLB2PHY_RDCS0_2 |
| CELL[49].IMUX_IMUX_DELAY[35] | BITSLICE[42].TX_T |
| CELL[49].IMUX_IMUX_DELAY[36] | BITSLICE[42].RX_CE_IFD |
| CELL[49].IMUX_IMUX_DELAY[37] | BITSLICE[42].RX_DATAIN1 |
| CELL[49].IMUX_IMUX_DELAY[38] | BITSLICE[42].CLB2PHY_FIFO_RDEN |
| CELL[49].IMUX_IMUX_DELAY[39] | BITSLICE[42].TX_D1 |
| CELL[49].IMUX_IMUX_DELAY[40] | BITSLICE[42].TX_D3 |
| CELL[49].IMUX_IMUX_DELAY[41] | BITSLICE[42].TX_D4 |
| CELL[49].IMUX_IMUX_DELAY[42] | BITSLICE[42].TX_D5 |
| CELL[49].IMUX_IMUX_DELAY[44] | BITSLICE[42].TX_CNTVALUEIN0 |
| CELL[49].IMUX_IMUX_DELAY[45] | BITSLICE[42].TX_CNTVALUEIN1 |
| CELL[49].IMUX_IMUX_DELAY[46] | BITSLICE[42].TX_CNTVALUEIN2 |
| CELL[49].IMUX_IMUX_DELAY[47] | BITSLICE[42].TX_CNTVALUEIN4 |
| CELL[50].OUT_BEL[4] | BITSLICE[43].TX_CNTVALUEOUT5 |
| CELL[50].OUT_BEL[5] | BITSLICE[43].TX_CNTVALUEOUT6 |
| CELL[50].OUT_BEL[6] | BITSLICE[43].TX_CNTVALUEOUT7 |
| CELL[50].OUT_BEL[7] | BITSLICE[43].TX_CNTVALUEOUT8 |
| CELL[50].OUT_BEL[8] | BITSLICE[44].TX_T_OUT |
| CELL[50].OUT_BEL[9] | BITSLICE[43].RX_CNTVALUEOUT0 |
| CELL[50].OUT_BEL[10] | BITSLICE[43].RX_CNTVALUEOUT1 |
| CELL[50].OUT_BEL[11] | BITSLICE[43].RX_CNTVALUEOUT2 |
| CELL[50].OUT_BEL[12] | BITSLICE[43].RX_CNTVALUEOUT3 |
| CELL[50].OUT_BEL[13] | BITSLICE[43].RX_CNTVALUEOUT4 |
| CELL[50].OUT_BEL[14] | BITSLICE[43].RX_CNTVALUEOUT5 |
| CELL[50].OUT_BEL[15] | BITSLICE[43].RX_CNTVALUEOUT6 |
| CELL[50].OUT_BEL[16] | BITSLICE[43].RX_CNTVALUEOUT7 |
| CELL[50].OUT_BEL[17] | BITSLICE[43].RX_CNTVALUEOUT8 |
| CELL[50].OUT_BEL[18] | BITSLICE[44].PHY2CLB_FIFO_EMPTY |
| CELL[50].OUT_BEL[19] | BITSLICE[44].RX_Q0 |
| CELL[50].OUT_BEL[20] | BITSLICE[44].RX_Q1 |
| CELL[50].OUT_BEL[21] | BITSLICE[44].RX_Q2 |
| CELL[50].OUT_BEL[22] | BITSLICE[44].RX_Q3 |
| CELL[50].OUT_BEL[23] | BITSLICE[44].RX_Q4 |
| CELL[50].OUT_BEL[24] | BITSLICE[44].RX_Q5 |
| CELL[50].OUT_BEL[25] | BITSLICE[44].RX_Q6 |
| CELL[50].OUT_BEL[26] | BITSLICE[44].RX_Q7 |
| CELL[50].OUT_BEL[27] | BITSLICE[44].TX_CNTVALUEOUT0 |
| CELL[50].OUT_BEL[28] | BITSLICE[44].TX_CNTVALUEOUT1 |
| CELL[50].OUT_BEL[29] | BITSLICE[44].TX_CNTVALUEOUT2 |
| CELL[50].OUT_BEL[30] | BITSLICE[44].TX_CNTVALUEOUT3 |
| CELL[50].OUT_BEL[31] | BITSLICE[44].TX_CNTVALUEOUT4 |
| CELL[50].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B4 |
| CELL[50].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B4 |
| CELL[50].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B4 |
| CELL[50].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B4 |
| CELL[50].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK4 |
| CELL[50].IMUX_BYP[6] | BITSLICE[43].RX_INC |
| CELL[50].IMUX_BYP[7] | BITSLICE[43].RX_EN_VTC |
| CELL[50].IMUX_BYP[8] | BITSLICE[43].RX_CE_IDELAY |
| CELL[50].IMUX_BYP[9] | BITSLICE[43].DYN_DCI_OUT_INT |
| CELL[50].IMUX_BYP[10] | BITSLICE[44].TX_LD |
| CELL[50].IMUX_BYP[11] | BITSLICE[44].TX_INC |
| CELL[50].IMUX_BYP[12] | BITSLICE[44].TX_EN_VTC |
| CELL[50].IMUX_BYP[13] | BITSLICE[44].TX_CE_ODELAY |
| CELL[50].IMUX_BYP[14] | BITSLICE[44].RX_LD |
| CELL[50].IMUX_BYP[15] | BITSLICE[44].RX_INC |
| CELL[50].IMUX_IMUX_DELAY[6] | BITSLICE[43].RX_DATAIN1 |
| CELL[50].IMUX_IMUX_DELAY[7] | BITSLICE[43].TX_D0 |
| CELL[50].IMUX_IMUX_DELAY[8] | BITSLICE[43].TX_D4 |
| CELL[50].IMUX_IMUX_DELAY[9] | BITSLICE[43].TX_D6 |
| CELL[50].IMUX_IMUX_DELAY[10] | BITSLICE[43].TX_CNTVALUEIN2 |
| CELL[50].IMUX_IMUX_DELAY[11] | BITSLICE[43].TX_CNTVALUEIN4 |
| CELL[50].IMUX_IMUX_DELAY[12] | BITSLICE[43].TX_CNTVALUEIN8 |
| CELL[50].IMUX_IMUX_DELAY[13] | BITSLICE[43].RX_CNTVALUEIN1 |
| CELL[50].IMUX_IMUX_DELAY[14] | BITSLICE[43].RX_CNTVALUEIN5 |
| CELL[50].IMUX_IMUX_DELAY[15] | BITSLICE[43].RX_CNTVALUEIN7 |
| CELL[50].IMUX_IMUX_DELAY[16] | BITSLICE[42].TX_CNTVALUEIN6 |
| CELL[50].IMUX_IMUX_DELAY[17] | BITSLICE[42].TX_CNTVALUEIN7 |
| CELL[50].IMUX_IMUX_DELAY[18] | BITSLICE[42].TX_CNTVALUEIN8 |
| CELL[50].IMUX_IMUX_DELAY[19] | BITSLICE[42].RX_CNTVALUEIN0 |
| CELL[50].IMUX_IMUX_DELAY[20] | BITSLICE[42].RX_CNTVALUEIN1 |
| CELL[50].IMUX_IMUX_DELAY[21] | BITSLICE[42].RX_CNTVALUEIN2 |
| CELL[50].IMUX_IMUX_DELAY[22] | BITSLICE[42].RX_CNTVALUEIN3 |
| CELL[50].IMUX_IMUX_DELAY[23] | BITSLICE[42].RX_CNTVALUEIN4 |
| CELL[50].IMUX_IMUX_DELAY[24] | BITSLICE[42].RX_CNTVALUEIN5 |
| CELL[50].IMUX_IMUX_DELAY[25] | BITSLICE[42].RX_CNTVALUEIN6 |
| CELL[50].IMUX_IMUX_DELAY[26] | BITSLICE[42].RX_CNTVALUEIN7 |
| CELL[50].IMUX_IMUX_DELAY[27] | BITSLICE[42].RX_CNTVALUEIN8 |
| CELL[50].IMUX_IMUX_DELAY[28] | BITSLICE[43].TX_T |
| CELL[50].IMUX_IMUX_DELAY[29] | BITSLICE[43].TX_CE_OFD |
| CELL[50].IMUX_IMUX_DELAY[30] | BITSLICE[43].RX_CE_IFD |
| CELL[50].IMUX_IMUX_DELAY[31] | BITSLICE[43].CLB2PHY_FIFO_RDEN |
| CELL[50].IMUX_IMUX_DELAY[32] | BITSLICE[43].TX_D1 |
| CELL[50].IMUX_IMUX_DELAY[33] | BITSLICE[43].TX_D2 |
| CELL[50].IMUX_IMUX_DELAY[34] | BITSLICE[43].TX_D3 |
| CELL[50].IMUX_IMUX_DELAY[35] | BITSLICE[43].TX_D5 |
| CELL[50].IMUX_IMUX_DELAY[36] | BITSLICE[43].TX_D7 |
| CELL[50].IMUX_IMUX_DELAY[37] | BITSLICE[43].TX_CNTVALUEIN0 |
| CELL[50].IMUX_IMUX_DELAY[38] | BITSLICE[43].TX_CNTVALUEIN1 |
| CELL[50].IMUX_IMUX_DELAY[39] | BITSLICE[43].TX_CNTVALUEIN3 |
| CELL[50].IMUX_IMUX_DELAY[40] | BITSLICE[43].TX_CNTVALUEIN5 |
| CELL[50].IMUX_IMUX_DELAY[41] | BITSLICE[43].TX_CNTVALUEIN6 |
| CELL[50].IMUX_IMUX_DELAY[42] | BITSLICE[43].TX_CNTVALUEIN7 |
| CELL[50].IMUX_IMUX_DELAY[43] | BITSLICE[43].RX_CNTVALUEIN0 |
| CELL[50].IMUX_IMUX_DELAY[44] | BITSLICE[43].RX_CNTVALUEIN2 |
| CELL[50].IMUX_IMUX_DELAY[45] | BITSLICE[43].RX_CNTVALUEIN3 |
| CELL[50].IMUX_IMUX_DELAY[46] | BITSLICE[43].RX_CNTVALUEIN4 |
| CELL[50].IMUX_IMUX_DELAY[47] | BITSLICE[43].RX_CNTVALUEIN6 |
| CELL[51].OUT_BEL[4] | BITSLICE[44].TX_CNTVALUEOUT5 |
| CELL[51].OUT_BEL[5] | BITSLICE[44].TX_CNTVALUEOUT6 |
| CELL[51].OUT_BEL[6] | BITSLICE[44].TX_CNTVALUEOUT7 |
| CELL[51].OUT_BEL[7] | BITSLICE[44].TX_CNTVALUEOUT8 |
| CELL[51].OUT_BEL[8] | BITSLICE[45].TX_T_OUT |
| CELL[51].OUT_BEL[9] | BITSLICE[44].RX_CNTVALUEOUT0 |
| CELL[51].OUT_BEL[10] | BITSLICE[44].RX_CNTVALUEOUT1 |
| CELL[51].OUT_BEL[11] | BITSLICE[44].RX_CNTVALUEOUT2 |
| CELL[51].OUT_BEL[12] | BITSLICE[44].RX_CNTVALUEOUT3 |
| CELL[51].OUT_BEL[13] | BITSLICE[44].RX_CNTVALUEOUT4 |
| CELL[51].OUT_BEL[14] | BITSLICE[44].RX_CNTVALUEOUT5 |
| CELL[51].OUT_BEL[15] | BITSLICE[44].RX_CNTVALUEOUT6 |
| CELL[51].OUT_BEL[16] | BITSLICE[44].RX_CNTVALUEOUT7 |
| CELL[51].OUT_BEL[17] | BITSLICE[44].RX_CNTVALUEOUT8 |
| CELL[51].OUT_BEL[18] | RIU_OR[3].RIU_RD_VALID |
| CELL[51].OUT_BEL[19] | RIU_OR[3].RIU_RD_DATA0 |
| CELL[51].OUT_BEL[20] | RIU_OR[3].RIU_RD_DATA1 |
| CELL[51].OUT_BEL[21] | RIU_OR[3].RIU_RD_DATA2 |
| CELL[51].OUT_BEL[22] | RIU_OR[3].RIU_RD_DATA3 |
| CELL[51].OUT_BEL[23] | RIU_OR[3].RIU_RD_DATA4 |
| CELL[51].OUT_BEL[24] | RIU_OR[3].RIU_RD_DATA5 |
| CELL[51].OUT_BEL[25] | RIU_OR[3].RIU_RD_DATA6 |
| CELL[51].OUT_BEL[26] | RIU_OR[3].RIU_RD_DATA7 |
| CELL[51].OUT_BEL[27] | RIU_OR[3].RIU_RD_DATA8 |
| CELL[51].OUT_BEL[28] | RIU_OR[3].RIU_RD_DATA9 |
| CELL[51].OUT_BEL[29] | RIU_OR[3].RIU_RD_DATA10 |
| CELL[51].OUT_BEL[30] | RIU_OR[3].RIU_RD_DATA11 |
| CELL[51].OUT_BEL[31] | RIU_OR[3].RIU_RD_DATA12 |
| CELL[51].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B5 |
| CELL[51].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B5 |
| CELL[51].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B5 |
| CELL[51].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B5 |
| CELL[51].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK5 |
| CELL[51].IMUX_BYP[6] | BITSLICE[44].RX_EN_VTC |
| CELL[51].IMUX_BYP[7] | BITSLICE[44].RX_CE_IDELAY |
| CELL[51].IMUX_BYP[8] | BITSLICE[44].DYN_DCI_OUT_INT |
| CELL[51].IMUX_BYP[9] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_SPARE_B0 |
| CELL[51].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_SPARE_B1 |
| CELL[51].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_SPARE_B2 |
| CELL[51].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_SPARE_B3 |
| CELL[51].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_RST_MASK_B |
| CELL[51].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_MODE_B |
| CELL[51].IMUX_BYP[15] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN0 |
| CELL[51].IMUX_IMUX_DELAY[6] | BITSLICE[44].TX_CNTVALUEIN1 |
| CELL[51].IMUX_IMUX_DELAY[7] | BITSLICE[44].TX_CNTVALUEIN3 |
| CELL[51].IMUX_IMUX_DELAY[8] | BITSLICE[44].TX_CNTVALUEIN7 |
| CELL[51].IMUX_IMUX_DELAY[10] | BITSLICE[44].RX_CNTVALUEIN3 |
| CELL[51].IMUX_IMUX_DELAY[11] | BITSLICE[44].RX_CNTVALUEIN5 |
| CELL[51].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[6].CLB2RIU_WR_EN, BITSLICE_CONTROL[7].CLB2RIU_WR_EN |
| CELL[51].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA1, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA1 |
| CELL[51].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA5, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA5 |
| CELL[51].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA7, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA7 |
| CELL[51].IMUX_IMUX_DELAY[16] | BITSLICE[43].RX_CNTVALUEIN8 |
| CELL[51].IMUX_IMUX_DELAY[17] | BITSLICE[44].TX_T |
| CELL[51].IMUX_IMUX_DELAY[18] | BITSLICE[44].TX_CE_OFD |
| CELL[51].IMUX_IMUX_DELAY[19] | BITSLICE[44].RX_CE_IFD |
| CELL[51].IMUX_IMUX_DELAY[20] | BITSLICE[44].RX_DATAIN1 |
| CELL[51].IMUX_IMUX_DELAY[21] | BITSLICE[44].CLB2PHY_FIFO_RDEN |
| CELL[51].IMUX_IMUX_DELAY[22] | BITSLICE[44].TX_D0 |
| CELL[51].IMUX_IMUX_DELAY[23] | BITSLICE[44].TX_D1 |
| CELL[51].IMUX_IMUX_DELAY[24] | BITSLICE[44].TX_D2 |
| CELL[51].IMUX_IMUX_DELAY[25] | BITSLICE[44].TX_D3 |
| CELL[51].IMUX_IMUX_DELAY[26] | BITSLICE[44].TX_D4 |
| CELL[51].IMUX_IMUX_DELAY[27] | BITSLICE[44].TX_D5 |
| CELL[51].IMUX_IMUX_DELAY[28] | BITSLICE[44].TX_D6 |
| CELL[51].IMUX_IMUX_DELAY[29] | BITSLICE[44].TX_D7 |
| CELL[51].IMUX_IMUX_DELAY[30] | BITSLICE[44].TX_CNTVALUEIN0 |
| CELL[51].IMUX_IMUX_DELAY[31] | BITSLICE[44].TX_CNTVALUEIN2 |
| CELL[51].IMUX_IMUX_DELAY[32] | BITSLICE[44].TX_CNTVALUEIN4 |
| CELL[51].IMUX_IMUX_DELAY[33] | BITSLICE[44].TX_CNTVALUEIN5 |
| CELL[51].IMUX_IMUX_DELAY[34] | BITSLICE[44].TX_CNTVALUEIN6 |
| CELL[51].IMUX_IMUX_DELAY[35] | BITSLICE[44].TX_CNTVALUEIN8 |
| CELL[51].IMUX_IMUX_DELAY[36] | BITSLICE[44].RX_CNTVALUEIN0 |
| CELL[51].IMUX_IMUX_DELAY[37] | BITSLICE[44].RX_CNTVALUEIN1 |
| CELL[51].IMUX_IMUX_DELAY[38] | BITSLICE[44].RX_CNTVALUEIN2 |
| CELL[51].IMUX_IMUX_DELAY[39] | BITSLICE[44].RX_CNTVALUEIN4 |
| CELL[51].IMUX_IMUX_DELAY[40] | BITSLICE[44].RX_CNTVALUEIN6 |
| CELL[51].IMUX_IMUX_DELAY[41] | BITSLICE[44].RX_CNTVALUEIN7 |
| CELL[51].IMUX_IMUX_DELAY[42] | BITSLICE[44].RX_CNTVALUEIN8 |
| CELL[51].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA0, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA0 |
| CELL[51].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA2, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA2 |
| CELL[51].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA3, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA3 |
| CELL[51].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA4, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA4 |
| CELL[51].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA6, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA6 |
| CELL[52].OUT_BEL[4] | RIU_OR[3].RIU_RD_DATA13 |
| CELL[52].OUT_BEL[5] | RIU_OR[3].RIU_RD_DATA14 |
| CELL[52].OUT_BEL[6] | RIU_OR[3].RIU_RD_DATA15 |
| CELL[52].OUT_BEL[7] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT0 |
| CELL[52].OUT_BEL[8] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT1 |
| CELL[52].OUT_BEL[9] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT2 |
| CELL[52].OUT_BEL[10] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT3 |
| CELL[52].OUT_BEL[11] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT4 |
| CELL[52].OUT_BEL[12] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT5 |
| CELL[52].OUT_BEL[13] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT6 |
| CELL[52].OUT_BEL[14] | XIPHY_FEEDTHROUGH[3].PHY2CLB_SCAN_OUT7 |
| CELL[52].OUT_BEL[15] | XIPHY_FEEDTHROUGH[3].PHY2CLB_DBG_CLK_STOP_OUT |
| CELL[52].OUT_BEL[16] | XIPHY_FEEDTHROUGH[3].PHY2CLB_DBG_CLK_STOP_FLG_OUT |
| CELL[52].OUT_BEL[17] | XIPHY_FEEDTHROUGH[3].PHY2CLB_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[52].OUT_BEL[18] | BITSLICE[51].PHY2CLB_FIFO_EMPTY |
| CELL[52].OUT_BEL[19] | BITSLICE[51].RX_Q0 |
| CELL[52].OUT_BEL[20] | BITSLICE[51].RX_Q1 |
| CELL[52].OUT_BEL[21] | BITSLICE[51].RX_Q2 |
| CELL[52].OUT_BEL[22] | BITSLICE[51].RX_Q3 |
| CELL[52].OUT_BEL[23] | BITSLICE[51].RX_Q4 |
| CELL[52].OUT_BEL[24] | BITSLICE[51].RX_Q5 |
| CELL[52].OUT_BEL[25] | BITSLICE[51].RX_Q6 |
| CELL[52].OUT_BEL[26] | BITSLICE[51].RX_Q7 |
| CELL[52].OUT_BEL[27] | BITSLICE[51].TX_CNTVALUEOUT0 |
| CELL[52].OUT_BEL[28] | BITSLICE[51].TX_CNTVALUEOUT1 |
| CELL[52].OUT_BEL[29] | BITSLICE[51].TX_CNTVALUEOUT2 |
| CELL[52].OUT_BEL[30] | BITSLICE[51].TX_CNTVALUEOUT3 |
| CELL[52].OUT_BEL[31] | BITSLICE[51].TX_CNTVALUEOUT4 |
| CELL[52].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_CLK_SDR |
| CELL[52].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_CLK_DIV4 |
| CELL[52].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_CLK_DIV2 |
| CELL[52].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B12 |
| CELL[52].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B12 |
| CELL[52].IMUX_BYP[6] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN1 |
| CELL[52].IMUX_BYP[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN2 |
| CELL[52].IMUX_BYP[8] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN3 |
| CELL[52].IMUX_BYP[10] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN4 |
| CELL[52].IMUX_BYP[11] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN5 |
| CELL[52].IMUX_BYP[12] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN6 |
| CELL[52].IMUX_BYP[13] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_IN7 |
| CELL[52].IMUX_BYP[14] | XIPHY_FEEDTHROUGH[3].CLB2PHY_SCAN_EN_B |
| CELL[52].IMUX_BYP[15] | BITSLICE[51].TX_LD |
| CELL[52].IMUX_IMUX_DELAY[6] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_DIV4_CLK_SEL_B |
| CELL[52].IMUX_IMUX_DELAY[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_DBG_CT_START_EN |
| CELL[52].IMUX_IMUX_DELAY[8] | BITSLICE[51].TX_CE_OFD |
| CELL[52].IMUX_IMUX_DELAY[9] | BITSLICE[51].RX_DATAIN1 |
| CELL[52].IMUX_IMUX_DELAY[10] | BITSLICE[51].TX_D2 |
| CELL[52].IMUX_IMUX_DELAY[11] | BITSLICE[51].TX_D4 |
| CELL[52].IMUX_IMUX_DELAY[12] | BITSLICE[51].TX_CNTVALUEIN0 |
| CELL[52].IMUX_IMUX_DELAY[13] | BITSLICE[51].TX_CNTVALUEIN2 |
| CELL[52].IMUX_IMUX_DELAY[14] | BITSLICE[51].TX_CNTVALUEIN6 |
| CELL[52].IMUX_IMUX_DELAY[15] | BITSLICE[51].TX_CNTVALUEIN8 |
| CELL[52].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA8, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA8 |
| CELL[52].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA9, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA9 |
| CELL[52].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA10, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA10 |
| CELL[52].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA11, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA11 |
| CELL[52].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA12, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA12 |
| CELL[52].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA13, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA13 |
| CELL[52].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA14, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA14 |
| CELL[52].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[6].CLB2RIU_WR_DATA15, BITSLICE_CONTROL[7].CLB2RIU_WR_DATA15 |
| CELL[52].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[6].CLB2RIU_ADDR0, BITSLICE_CONTROL[7].CLB2RIU_ADDR0 |
| CELL[52].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[6].CLB2RIU_ADDR1, BITSLICE_CONTROL[7].CLB2RIU_ADDR1 |
| CELL[52].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[6].CLB2RIU_ADDR2, BITSLICE_CONTROL[7].CLB2RIU_ADDR2 |
| CELL[52].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[6].CLB2RIU_ADDR3, BITSLICE_CONTROL[7].CLB2RIU_ADDR3 |
| CELL[52].IMUX_IMUX_DELAY[28] | BITSLICE_CONTROL[6].CLB2RIU_ADDR4, BITSLICE_CONTROL[7].CLB2RIU_ADDR4 |
| CELL[52].IMUX_IMUX_DELAY[29] | BITSLICE_CONTROL[6].CLB2RIU_ADDR5, BITSLICE_CONTROL[7].CLB2RIU_ADDR5 |
| CELL[52].IMUX_IMUX_DELAY[30] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_SDR_CLK_SEL_B |
| CELL[52].IMUX_IMUX_DELAY[31] | XIPHY_FEEDTHROUGH[3].CLB2PHY_TEST_DIV2_CLK_SEL_B |
| CELL[52].IMUX_IMUX_DELAY[32] | XIPHY_FEEDTHROUGH[3].CLB2PHY_DBG_CLK_STOP_FLG_OUT |
| CELL[52].IMUX_IMUX_DELAY[33] | XIPHY_FEEDTHROUGH[3].CLB2PHY_DBG_CLK_STOP_FLG_DLY_OUT |
| CELL[52].IMUX_IMUX_DELAY[34] | BITSLICE[51].TX_T |
| CELL[52].IMUX_IMUX_DELAY[35] | BITSLICE[51].RX_CE_IFD |
| CELL[52].IMUX_IMUX_DELAY[36] | BITSLICE[51].CLB2PHY_FIFO_RDEN |
| CELL[52].IMUX_IMUX_DELAY[37] | BITSLICE[51].TX_D0 |
| CELL[52].IMUX_IMUX_DELAY[38] | BITSLICE[51].TX_D1 |
| CELL[52].IMUX_IMUX_DELAY[39] | BITSLICE[51].TX_D3 |
| CELL[52].IMUX_IMUX_DELAY[40] | BITSLICE[51].TX_D5 |
| CELL[52].IMUX_IMUX_DELAY[41] | BITSLICE[51].TX_D6 |
| CELL[52].IMUX_IMUX_DELAY[42] | BITSLICE[51].TX_D7 |
| CELL[52].IMUX_IMUX_DELAY[43] | BITSLICE[51].TX_CNTVALUEIN1 |
| CELL[52].IMUX_IMUX_DELAY[44] | BITSLICE[51].TX_CNTVALUEIN3 |
| CELL[52].IMUX_IMUX_DELAY[45] | BITSLICE[51].TX_CNTVALUEIN4 |
| CELL[52].IMUX_IMUX_DELAY[46] | BITSLICE[51].TX_CNTVALUEIN5 |
| CELL[52].IMUX_IMUX_DELAY[47] | BITSLICE[51].TX_CNTVALUEIN7 |
| CELL[53].OUT_BEL[4] | BITSLICE[51].TX_CNTVALUEOUT5 |
| CELL[53].OUT_BEL[5] | BITSLICE[51].TX_CNTVALUEOUT6 |
| CELL[53].OUT_BEL[6] | BITSLICE[51].TX_CNTVALUEOUT7 |
| CELL[53].OUT_BEL[7] | BITSLICE[51].TX_CNTVALUEOUT8 |
| CELL[53].OUT_BEL[8] | BITSLICE[46].TX_T_OUT |
| CELL[53].OUT_BEL[9] | BITSLICE[51].RX_CNTVALUEOUT0 |
| CELL[53].OUT_BEL[10] | BITSLICE[51].RX_CNTVALUEOUT1 |
| CELL[53].OUT_BEL[11] | BITSLICE[51].RX_CNTVALUEOUT2 |
| CELL[53].OUT_BEL[12] | BITSLICE[51].RX_CNTVALUEOUT3 |
| CELL[53].OUT_BEL[13] | BITSLICE[51].RX_CNTVALUEOUT4 |
| CELL[53].OUT_BEL[14] | BITSLICE[51].RX_CNTVALUEOUT5 |
| CELL[53].OUT_BEL[15] | BITSLICE[51].RX_CNTVALUEOUT6 |
| CELL[53].OUT_BEL[16] | BITSLICE[51].RX_CNTVALUEOUT7 |
| CELL[53].OUT_BEL[17] | BITSLICE[51].RX_CNTVALUEOUT8 |
| CELL[53].OUT_BEL[18] | BITSLICE[45].PHY2CLB_FIFO_EMPTY |
| CELL[53].OUT_BEL[19] | BITSLICE[45].RX_Q0 |
| CELL[53].OUT_BEL[20] | BITSLICE[45].RX_Q1 |
| CELL[53].OUT_BEL[21] | BITSLICE[45].RX_Q2 |
| CELL[53].OUT_BEL[22] | BITSLICE[45].RX_Q3 |
| CELL[53].OUT_BEL[23] | BITSLICE[45].RX_Q4 |
| CELL[53].OUT_BEL[24] | BITSLICE[45].RX_Q5 |
| CELL[53].OUT_BEL[25] | BITSLICE[45].RX_Q6 |
| CELL[53].OUT_BEL[26] | BITSLICE[45].RX_Q7 |
| CELL[53].OUT_BEL[27] | BITSLICE[45].TX_CNTVALUEOUT0 |
| CELL[53].OUT_BEL[28] | BITSLICE[45].TX_CNTVALUEOUT1 |
| CELL[53].OUT_BEL[29] | BITSLICE[45].TX_CNTVALUEOUT2 |
| CELL[53].OUT_BEL[30] | BITSLICE[45].TX_CNTVALUEOUT3 |
| CELL[53].OUT_BEL[31] | BITSLICE[45].TX_CNTVALUEOUT4 |
| CELL[53].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B12 |
| CELL[53].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B12 |
| CELL[53].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK12 |
| CELL[53].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B6 |
| CELL[53].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B6 |
| CELL[53].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B6 |
| CELL[53].IMUX_BYP[6] | BITSLICE[51].TX_INC |
| CELL[53].IMUX_BYP[7] | BITSLICE[51].TX_EN_VTC |
| CELL[53].IMUX_BYP[8] | BITSLICE[51].TX_CE_ODELAY |
| CELL[53].IMUX_BYP[9] | BITSLICE[51].RX_LD |
| CELL[53].IMUX_BYP[10] | BITSLICE[51].RX_INC |
| CELL[53].IMUX_BYP[11] | BITSLICE[51].RX_EN_VTC |
| CELL[53].IMUX_BYP[12] | BITSLICE[51].RX_CE_IDELAY |
| CELL[53].IMUX_BYP[13] | BITSLICE[51].DYN_DCI_OUT_INT |
| CELL[53].IMUX_BYP[14] | BITSLICE[45].TX_LD |
| CELL[53].IMUX_BYP[15] | BITSLICE[45].TX_INC |
| CELL[53].IMUX_IMUX_DELAY[6] | BITSLICE[45].TX_D0 |
| CELL[53].IMUX_IMUX_DELAY[7] | BITSLICE[45].TX_D2 |
| CELL[53].IMUX_IMUX_DELAY[8] | BITSLICE[45].TX_D6 |
| CELL[53].IMUX_IMUX_DELAY[9] | BITSLICE[45].TX_CNTVALUEIN0 |
| CELL[53].IMUX_IMUX_DELAY[10] | BITSLICE[45].TX_CNTVALUEIN4 |
| CELL[53].IMUX_IMUX_DELAY[11] | BITSLICE[45].TX_CNTVALUEIN6 |
| CELL[53].IMUX_IMUX_DELAY[12] | BITSLICE[45].RX_CNTVALUEIN1 |
| CELL[53].IMUX_IMUX_DELAY[13] | BITSLICE[45].RX_CNTVALUEIN3 |
| CELL[53].IMUX_IMUX_DELAY[14] | BITSLICE[45].RX_CNTVALUEIN7 |
| CELL[53].IMUX_IMUX_DELAY[15] | BITSLICE[46].TX_T |
| CELL[53].IMUX_IMUX_DELAY[16] | BITSLICE[51].RX_CNTVALUEIN0 |
| CELL[53].IMUX_IMUX_DELAY[17] | BITSLICE[51].RX_CNTVALUEIN1 |
| CELL[53].IMUX_IMUX_DELAY[18] | BITSLICE[51].RX_CNTVALUEIN2 |
| CELL[53].IMUX_IMUX_DELAY[19] | BITSLICE[51].RX_CNTVALUEIN3 |
| CELL[53].IMUX_IMUX_DELAY[20] | BITSLICE[51].RX_CNTVALUEIN4 |
| CELL[53].IMUX_IMUX_DELAY[21] | BITSLICE[51].RX_CNTVALUEIN5 |
| CELL[53].IMUX_IMUX_DELAY[22] | BITSLICE[51].RX_CNTVALUEIN6 |
| CELL[53].IMUX_IMUX_DELAY[23] | BITSLICE[51].RX_CNTVALUEIN7 |
| CELL[53].IMUX_IMUX_DELAY[24] | BITSLICE[51].RX_CNTVALUEIN8 |
| CELL[53].IMUX_IMUX_DELAY[25] | BITSLICE[45].TX_T |
| CELL[53].IMUX_IMUX_DELAY[26] | BITSLICE[45].TX_CE_OFD |
| CELL[53].IMUX_IMUX_DELAY[27] | BITSLICE[45].RX_CE_IFD |
| CELL[53].IMUX_IMUX_DELAY[29] | BITSLICE[45].RX_DATAIN1 |
| CELL[53].IMUX_IMUX_DELAY[30] | BITSLICE[45].CLB2PHY_FIFO_RDEN |
| CELL[53].IMUX_IMUX_DELAY[31] | BITSLICE[45].TX_D1 |
| CELL[53].IMUX_IMUX_DELAY[32] | BITSLICE[45].TX_D3 |
| CELL[53].IMUX_IMUX_DELAY[33] | BITSLICE[45].TX_D4 |
| CELL[53].IMUX_IMUX_DELAY[34] | BITSLICE[45].TX_D5 |
| CELL[53].IMUX_IMUX_DELAY[35] | BITSLICE[45].TX_D7 |
| CELL[53].IMUX_IMUX_DELAY[36] | BITSLICE[45].TX_CNTVALUEIN1 |
| CELL[53].IMUX_IMUX_DELAY[37] | BITSLICE[45].TX_CNTVALUEIN2 |
| CELL[53].IMUX_IMUX_DELAY[38] | BITSLICE[45].TX_CNTVALUEIN3 |
| CELL[53].IMUX_IMUX_DELAY[39] | BITSLICE[45].TX_CNTVALUEIN5 |
| CELL[53].IMUX_IMUX_DELAY[40] | BITSLICE[45].TX_CNTVALUEIN7 |
| CELL[53].IMUX_IMUX_DELAY[41] | BITSLICE[45].TX_CNTVALUEIN8 |
| CELL[53].IMUX_IMUX_DELAY[42] | BITSLICE[45].RX_CNTVALUEIN0 |
| CELL[53].IMUX_IMUX_DELAY[43] | BITSLICE[45].RX_CNTVALUEIN2 |
| CELL[53].IMUX_IMUX_DELAY[44] | BITSLICE[45].RX_CNTVALUEIN4 |
| CELL[53].IMUX_IMUX_DELAY[45] | BITSLICE[45].RX_CNTVALUEIN5 |
| CELL[53].IMUX_IMUX_DELAY[46] | BITSLICE[45].RX_CNTVALUEIN6 |
| CELL[53].IMUX_IMUX_DELAY[47] | BITSLICE[45].RX_CNTVALUEIN8 |
| CELL[54].OUT_BEL[4] | BITSLICE[45].TX_CNTVALUEOUT5 |
| CELL[54].OUT_BEL[5] | BITSLICE[45].TX_CNTVALUEOUT6 |
| CELL[54].OUT_BEL[6] | BITSLICE[45].TX_CNTVALUEOUT7 |
| CELL[54].OUT_BEL[7] | BITSLICE[45].TX_CNTVALUEOUT8 |
| CELL[54].OUT_BEL[8] | BITSLICE[47].TX_T_OUT |
| CELL[54].OUT_BEL[9] | BITSLICE[45].RX_CNTVALUEOUT0 |
| CELL[54].OUT_BEL[10] | BITSLICE[45].RX_CNTVALUEOUT1 |
| CELL[54].OUT_BEL[11] | BITSLICE[45].RX_CNTVALUEOUT2 |
| CELL[54].OUT_BEL[12] | BITSLICE[45].RX_CNTVALUEOUT3 |
| CELL[54].OUT_BEL[13] | BITSLICE[45].RX_CNTVALUEOUT4 |
| CELL[54].OUT_BEL[14] | BITSLICE[45].RX_CNTVALUEOUT5 |
| CELL[54].OUT_BEL[15] | BITSLICE[45].RX_CNTVALUEOUT6 |
| CELL[54].OUT_BEL[16] | BITSLICE[45].RX_CNTVALUEOUT7 |
| CELL[54].OUT_BEL[17] | BITSLICE[45].RX_CNTVALUEOUT8 |
| CELL[54].OUT_BEL[18] | BITSLICE[46].PHY2CLB_FIFO_EMPTY |
| CELL[54].OUT_BEL[19] | BITSLICE[46].RX_Q0 |
| CELL[54].OUT_BEL[20] | BITSLICE[46].RX_Q1 |
| CELL[54].OUT_BEL[21] | BITSLICE[46].RX_Q2 |
| CELL[54].OUT_BEL[22] | BITSLICE[46].RX_Q3 |
| CELL[54].OUT_BEL[23] | BITSLICE[46].RX_Q4 |
| CELL[54].OUT_BEL[24] | BITSLICE[46].RX_Q5 |
| CELL[54].OUT_BEL[25] | BITSLICE[46].RX_Q6 |
| CELL[54].OUT_BEL[26] | BITSLICE[46].RX_Q7 |
| CELL[54].OUT_BEL[27] | BITSLICE[46].TX_CNTVALUEOUT0 |
| CELL[54].OUT_BEL[28] | BITSLICE[46].TX_CNTVALUEOUT1 |
| CELL[54].OUT_BEL[29] | BITSLICE[46].TX_CNTVALUEOUT2 |
| CELL[54].OUT_BEL[30] | BITSLICE[46].TX_CNTVALUEOUT3 |
| CELL[54].OUT_BEL[31] | BITSLICE[46].TX_CNTVALUEOUT4 |
| CELL[54].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B6 |
| CELL[54].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK6 |
| CELL[54].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B7 |
| CELL[54].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B7 |
| CELL[54].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B7 |
| CELL[54].IMUX_BYP[6] | BITSLICE[45].TX_EN_VTC |
| CELL[54].IMUX_BYP[7] | BITSLICE[45].TX_CE_ODELAY |
| CELL[54].IMUX_BYP[8] | BITSLICE[45].RX_LD |
| CELL[54].IMUX_BYP[9] | BITSLICE[45].RX_INC |
| CELL[54].IMUX_BYP[10] | BITSLICE[45].RX_EN_VTC |
| CELL[54].IMUX_BYP[11] | BITSLICE[45].RX_CE_IDELAY |
| CELL[54].IMUX_BYP[12] | BITSLICE[45].DYN_DCI_OUT_INT |
| CELL[54].IMUX_BYP[14] | BITSLICE[46].TX_LD |
| CELL[54].IMUX_BYP[15] | BITSLICE[46].TX_INC |
| CELL[54].IMUX_IMUX_DELAY[6] | BITSLICE[46].TX_CNTVALUEIN3 |
| CELL[54].IMUX_IMUX_DELAY[7] | BITSLICE[46].TX_CNTVALUEIN5 |
| CELL[54].IMUX_IMUX_DELAY[8] | BITSLICE[46].RX_CNTVALUEIN0 |
| CELL[54].IMUX_IMUX_DELAY[9] | BITSLICE[46].RX_CNTVALUEIN2 |
| CELL[54].IMUX_IMUX_DELAY[10] | BITSLICE[46].RX_CNTVALUEIN6 |
| CELL[54].IMUX_IMUX_DELAY[11] | BITSLICE[46].RX_CNTVALUEIN8 |
| CELL[54].IMUX_IMUX_DELAY[12] | BITSLICE[47].RX_DATAIN1 |
| CELL[54].IMUX_IMUX_DELAY[13] | BITSLICE[47].TX_D0 |
| CELL[54].IMUX_IMUX_DELAY[14] | BITSLICE[47].TX_D4 |
| CELL[54].IMUX_IMUX_DELAY[15] | BITSLICE[47].TX_D6 |
| CELL[54].IMUX_IMUX_DELAY[16] | BITSLICE[46].TX_CE_OFD |
| CELL[54].IMUX_IMUX_DELAY[17] | BITSLICE[46].RX_CE_IFD |
| CELL[54].IMUX_IMUX_DELAY[18] | BITSLICE[46].RX_DATAIN1 |
| CELL[54].IMUX_IMUX_DELAY[19] | BITSLICE[46].CLB2PHY_FIFO_RDEN |
| CELL[54].IMUX_IMUX_DELAY[20] | BITSLICE[46].TX_D0 |
| CELL[54].IMUX_IMUX_DELAY[21] | BITSLICE[46].TX_D1 |
| CELL[54].IMUX_IMUX_DELAY[22] | BITSLICE[46].TX_D2 |
| CELL[54].IMUX_IMUX_DELAY[23] | BITSLICE[46].TX_D3 |
| CELL[54].IMUX_IMUX_DELAY[24] | BITSLICE[46].TX_D4 |
| CELL[54].IMUX_IMUX_DELAY[25] | BITSLICE[46].TX_D5 |
| CELL[54].IMUX_IMUX_DELAY[26] | BITSLICE[46].TX_D6 |
| CELL[54].IMUX_IMUX_DELAY[27] | BITSLICE[46].TX_D7 |
| CELL[54].IMUX_IMUX_DELAY[28] | BITSLICE[46].TX_CNTVALUEIN0 |
| CELL[54].IMUX_IMUX_DELAY[29] | BITSLICE[46].TX_CNTVALUEIN1 |
| CELL[54].IMUX_IMUX_DELAY[30] | BITSLICE[46].TX_CNTVALUEIN2 |
| CELL[54].IMUX_IMUX_DELAY[31] | BITSLICE[46].TX_CNTVALUEIN4 |
| CELL[54].IMUX_IMUX_DELAY[32] | BITSLICE[46].TX_CNTVALUEIN6 |
| CELL[54].IMUX_IMUX_DELAY[33] | BITSLICE[46].TX_CNTVALUEIN7 |
| CELL[54].IMUX_IMUX_DELAY[34] | BITSLICE[46].TX_CNTVALUEIN8 |
| CELL[54].IMUX_IMUX_DELAY[35] | BITSLICE[46].RX_CNTVALUEIN1 |
| CELL[54].IMUX_IMUX_DELAY[36] | BITSLICE[46].RX_CNTVALUEIN3 |
| CELL[54].IMUX_IMUX_DELAY[37] | BITSLICE[46].RX_CNTVALUEIN4 |
| CELL[54].IMUX_IMUX_DELAY[38] | BITSLICE[46].RX_CNTVALUEIN5 |
| CELL[54].IMUX_IMUX_DELAY[39] | BITSLICE[46].RX_CNTVALUEIN7 |
| CELL[54].IMUX_IMUX_DELAY[40] | BITSLICE[47].TX_T |
| CELL[54].IMUX_IMUX_DELAY[41] | BITSLICE[47].TX_CE_OFD |
| CELL[54].IMUX_IMUX_DELAY[42] | BITSLICE[47].RX_CE_IFD |
| CELL[54].IMUX_IMUX_DELAY[43] | BITSLICE[47].CLB2PHY_FIFO_RDEN |
| CELL[54].IMUX_IMUX_DELAY[44] | BITSLICE[47].TX_D1 |
| CELL[54].IMUX_IMUX_DELAY[45] | BITSLICE[47].TX_D2 |
| CELL[54].IMUX_IMUX_DELAY[46] | BITSLICE[47].TX_D3 |
| CELL[54].IMUX_IMUX_DELAY[47] | BITSLICE[47].TX_D5 |
| CELL[55].OUT_BEL[4] | BITSLICE[46].TX_CNTVALUEOUT5 |
| CELL[55].OUT_BEL[5] | BITSLICE[46].TX_CNTVALUEOUT6 |
| CELL[55].OUT_BEL[6] | BITSLICE[46].TX_CNTVALUEOUT7 |
| CELL[55].OUT_BEL[7] | BITSLICE[46].TX_CNTVALUEOUT8 |
| CELL[55].OUT_BEL[8] | BITSLICE[48].TX_T_OUT |
| CELL[55].OUT_BEL[9] | BITSLICE[46].RX_CNTVALUEOUT0 |
| CELL[55].OUT_BEL[10] | BITSLICE[46].RX_CNTVALUEOUT1 |
| CELL[55].OUT_BEL[11] | BITSLICE[46].RX_CNTVALUEOUT2 |
| CELL[55].OUT_BEL[12] | BITSLICE[46].RX_CNTVALUEOUT3 |
| CELL[55].OUT_BEL[13] | BITSLICE[46].RX_CNTVALUEOUT4 |
| CELL[55].OUT_BEL[14] | BITSLICE[46].RX_CNTVALUEOUT5 |
| CELL[55].OUT_BEL[15] | BITSLICE[46].RX_CNTVALUEOUT6 |
| CELL[55].OUT_BEL[16] | BITSLICE[46].RX_CNTVALUEOUT7 |
| CELL[55].OUT_BEL[17] | BITSLICE[46].RX_CNTVALUEOUT8 |
| CELL[55].OUT_BEL[18] | BITSLICE[47].PHY2CLB_FIFO_EMPTY |
| CELL[55].OUT_BEL[19] | BITSLICE[47].RX_Q0 |
| CELL[55].OUT_BEL[20] | BITSLICE[47].RX_Q1 |
| CELL[55].OUT_BEL[21] | BITSLICE[47].RX_Q2 |
| CELL[55].OUT_BEL[22] | BITSLICE[47].RX_Q3 |
| CELL[55].OUT_BEL[23] | BITSLICE[47].RX_Q4 |
| CELL[55].OUT_BEL[24] | BITSLICE[47].RX_Q5 |
| CELL[55].OUT_BEL[25] | BITSLICE[47].RX_Q6 |
| CELL[55].OUT_BEL[26] | BITSLICE[47].RX_Q7 |
| CELL[55].OUT_BEL[27] | BITSLICE[47].TX_CNTVALUEOUT0 |
| CELL[55].OUT_BEL[28] | BITSLICE[47].TX_CNTVALUEOUT1 |
| CELL[55].OUT_BEL[29] | BITSLICE[47].TX_CNTVALUEOUT2 |
| CELL[55].OUT_BEL[30] | BITSLICE[47].TX_CNTVALUEOUT3 |
| CELL[55].OUT_BEL[31] | BITSLICE[47].TX_CNTVALUEOUT4 |
| CELL[55].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B7 |
| CELL[55].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK7 |
| CELL[55].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B8 |
| CELL[55].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B8 |
| CELL[55].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B8 |
| CELL[55].IMUX_BYP[6] | BITSLICE[46].TX_EN_VTC |
| CELL[55].IMUX_BYP[7] | BITSLICE[46].TX_CE_ODELAY |
| CELL[55].IMUX_BYP[8] | BITSLICE[46].RX_LD |
| CELL[55].IMUX_BYP[9] | BITSLICE[46].RX_INC |
| CELL[55].IMUX_BYP[10] | BITSLICE[46].RX_EN_VTC |
| CELL[55].IMUX_BYP[11] | BITSLICE[46].RX_CE_IDELAY |
| CELL[55].IMUX_BYP[12] | BITSLICE[46].DYN_DCI_OUT_INT |
| CELL[55].IMUX_BYP[13] | BITSLICE[47].TX_LD |
| CELL[55].IMUX_BYP[14] | BITSLICE[47].TX_INC |
| CELL[55].IMUX_BYP[15] | BITSLICE[47].TX_EN_VTC |
| CELL[55].IMUX_IMUX_DELAY[6] | BITSLICE[47].RX_CNTVALUEIN4 |
| CELL[55].IMUX_IMUX_DELAY[7] | BITSLICE[47].RX_CNTVALUEIN6 |
| CELL[55].IMUX_IMUX_DELAY[8] | BITSLICE_T[7].CNTVALUEIN1 |
| CELL[55].IMUX_IMUX_DELAY[9] | BITSLICE_T[7].CNTVALUEIN3 |
| CELL[55].IMUX_IMUX_DELAY[10] | BITSLICE_T[7].CNTVALUEIN7 |
| CELL[55].IMUX_IMUX_DELAY[11] | BITSLICE_CONTROL[7].CLB2RIU_NIBBLE_SEL |
| CELL[55].IMUX_IMUX_DELAY[12] | BITSLICE_CONTROL[7].CLB2PHY_WRCS1_3 |
| CELL[55].IMUX_IMUX_DELAY[13] | BITSLICE_CONTROL[7].CLB2PHY_WRCS0_1 |
| CELL[55].IMUX_IMUX_DELAY[14] | BITSLICE_CONTROL[7].CLB2PHY_T_B1 |
| CELL[55].IMUX_IMUX_DELAY[15] | BITSLICE_CONTROL[7].CLB2PHY_T_B3 |
| CELL[55].IMUX_IMUX_DELAY[16] | BITSLICE[47].TX_D7 |
| CELL[55].IMUX_IMUX_DELAY[18] | BITSLICE[47].TX_CNTVALUEIN0 |
| CELL[55].IMUX_IMUX_DELAY[19] | BITSLICE[47].TX_CNTVALUEIN1 |
| CELL[55].IMUX_IMUX_DELAY[20] | BITSLICE[47].TX_CNTVALUEIN2 |
| CELL[55].IMUX_IMUX_DELAY[21] | BITSLICE[47].TX_CNTVALUEIN3 |
| CELL[55].IMUX_IMUX_DELAY[22] | BITSLICE[47].TX_CNTVALUEIN4 |
| CELL[55].IMUX_IMUX_DELAY[23] | BITSLICE[47].TX_CNTVALUEIN5 |
| CELL[55].IMUX_IMUX_DELAY[24] | BITSLICE[47].TX_CNTVALUEIN6 |
| CELL[55].IMUX_IMUX_DELAY[25] | BITSLICE[47].TX_CNTVALUEIN7 |
| CELL[55].IMUX_IMUX_DELAY[26] | BITSLICE[47].TX_CNTVALUEIN8 |
| CELL[55].IMUX_IMUX_DELAY[27] | BITSLICE[47].RX_CNTVALUEIN0 |
| CELL[55].IMUX_IMUX_DELAY[28] | BITSLICE[47].RX_CNTVALUEIN1 |
| CELL[55].IMUX_IMUX_DELAY[29] | BITSLICE[47].RX_CNTVALUEIN2 |
| CELL[55].IMUX_IMUX_DELAY[30] | BITSLICE[47].RX_CNTVALUEIN3 |
| CELL[55].IMUX_IMUX_DELAY[31] | BITSLICE[47].RX_CNTVALUEIN5 |
| CELL[55].IMUX_IMUX_DELAY[32] | BITSLICE[47].RX_CNTVALUEIN7 |
| CELL[55].IMUX_IMUX_DELAY[33] | BITSLICE[47].RX_CNTVALUEIN8 |
| CELL[55].IMUX_IMUX_DELAY[34] | BITSLICE_T[7].CNTVALUEIN0 |
| CELL[55].IMUX_IMUX_DELAY[35] | BITSLICE_T[7].CNTVALUEIN2 |
| CELL[55].IMUX_IMUX_DELAY[36] | BITSLICE_T[7].CNTVALUEIN4 |
| CELL[55].IMUX_IMUX_DELAY[37] | BITSLICE_T[7].CNTVALUEIN5 |
| CELL[55].IMUX_IMUX_DELAY[38] | BITSLICE_T[7].CNTVALUEIN6 |
| CELL[55].IMUX_IMUX_DELAY[39] | BITSLICE_T[7].CNTVALUEIN8 |
| CELL[55].IMUX_IMUX_DELAY[40] | BITSLICE_CONTROL[7].CLB2PHY_WRCS1_0 |
| CELL[55].IMUX_IMUX_DELAY[41] | BITSLICE_CONTROL[7].CLB2PHY_WRCS1_1 |
| CELL[55].IMUX_IMUX_DELAY[42] | BITSLICE_CONTROL[7].CLB2PHY_WRCS1_2 |
| CELL[55].IMUX_IMUX_DELAY[43] | BITSLICE_CONTROL[7].CLB2PHY_WRCS0_0 |
| CELL[55].IMUX_IMUX_DELAY[44] | BITSLICE_CONTROL[7].CLB2PHY_WRCS0_2 |
| CELL[55].IMUX_IMUX_DELAY[45] | BITSLICE_CONTROL[7].CLB2PHY_WRCS0_3 |
| CELL[55].IMUX_IMUX_DELAY[46] | BITSLICE_CONTROL[7].CLB2PHY_T_B0 |
| CELL[55].IMUX_IMUX_DELAY[47] | BITSLICE_CONTROL[7].CLB2PHY_T_B2 |
| CELL[56].OUT_BEL[4] | BITSLICE[47].TX_CNTVALUEOUT5 |
| CELL[56].OUT_BEL[5] | BITSLICE[47].TX_CNTVALUEOUT6 |
| CELL[56].OUT_BEL[6] | BITSLICE[47].TX_CNTVALUEOUT7 |
| CELL[56].OUT_BEL[7] | BITSLICE[47].TX_CNTVALUEOUT8 |
| CELL[56].OUT_BEL[8] | BITSLICE[49].TX_T_OUT |
| CELL[56].OUT_BEL[9] | BITSLICE[47].RX_CNTVALUEOUT0 |
| CELL[56].OUT_BEL[10] | BITSLICE[47].RX_CNTVALUEOUT1 |
| CELL[56].OUT_BEL[11] | BITSLICE[47].RX_CNTVALUEOUT2 |
| CELL[56].OUT_BEL[12] | BITSLICE[47].RX_CNTVALUEOUT3 |
| CELL[56].OUT_BEL[13] | BITSLICE[47].RX_CNTVALUEOUT4 |
| CELL[56].OUT_BEL[14] | BITSLICE[47].RX_CNTVALUEOUT5 |
| CELL[56].OUT_BEL[15] | BITSLICE[47].RX_CNTVALUEOUT6 |
| CELL[56].OUT_BEL[16] | BITSLICE[47].RX_CNTVALUEOUT7 |
| CELL[56].OUT_BEL[17] | BITSLICE[47].RX_CNTVALUEOUT8 |
| CELL[56].OUT_BEL[18] | BITSLICE_T[7].CNTVALUEOUT0 |
| CELL[56].OUT_BEL[19] | BITSLICE_T[7].CNTVALUEOUT1 |
| CELL[56].OUT_BEL[20] | BITSLICE_T[7].CNTVALUEOUT2 |
| CELL[56].OUT_BEL[21] | BITSLICE_T[7].CNTVALUEOUT3 |
| CELL[56].OUT_BEL[22] | BITSLICE_T[7].CNTVALUEOUT4 |
| CELL[56].OUT_BEL[23] | BITSLICE_T[7].CNTVALUEOUT5 |
| CELL[56].OUT_BEL[24] | BITSLICE_T[7].CNTVALUEOUT6 |
| CELL[56].OUT_BEL[25] | BITSLICE_T[7].CNTVALUEOUT7 |
| CELL[56].OUT_BEL[26] | BITSLICE_T[7].CNTVALUEOUT8 |
| CELL[56].OUT_BEL[27] | BITSLICE_CONTROL[7].PHY2CLB_PHY_RDY |
| CELL[56].OUT_BEL[28] | BITSLICE_CONTROL[7].MASTER_PD_OUT |
| CELL[56].OUT_BEL[29] | BITSLICE_CONTROL[7].PHY2CLB_FIXDLY_RDY |
| CELL[56].OUT_BEL[30] | BITSLICE_CONTROL[7].CTRL_DLY_TEST_OUT |
| CELL[56].OUT_BEL[31] | BITSLICE[50].TX_T_OUT |
| CELL[56].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B8 |
| CELL[56].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK8 |
| CELL[56].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].TRISTATE_ODELAY_RST_B1 |
| CELL[56].IMUX_CTRL[6] | BITSLICE_CONTROL[7].REFCLK |
| CELL[56].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].CTRL_RST_B_UPP |
| CELL[56].IMUX_BYP[6] | BITSLICE[47].TX_CE_ODELAY |
| CELL[56].IMUX_BYP[8] | BITSLICE[47].RX_LD |
| CELL[56].IMUX_BYP[9] | BITSLICE[47].RX_INC |
| CELL[56].IMUX_BYP[10] | BITSLICE[47].RX_EN_VTC |
| CELL[56].IMUX_BYP[11] | BITSLICE[47].RX_CE_IDELAY |
| CELL[56].IMUX_BYP[12] | BITSLICE[47].DYN_DCI_OUT_INT |
| CELL[56].IMUX_BYP[13] | BITSLICE_T[7].CE_OFD |
| CELL[56].IMUX_BYP[14] | BITSLICE_T[7].LD |
| CELL[56].IMUX_BYP[15] | BITSLICE_T[7].INC |
| CELL[56].IMUX_IMUX_DELAY[6] | BITSLICE[48].RX_DATAIN1 |
| CELL[56].IMUX_IMUX_DELAY[7] | BITSLICE[48].TX_D0 |
| CELL[56].IMUX_IMUX_DELAY[8] | BITSLICE[48].TX_D4 |
| CELL[56].IMUX_IMUX_DELAY[9] | BITSLICE[48].TX_D6 |
| CELL[56].IMUX_IMUX_DELAY[10] | BITSLICE[48].TX_CNTVALUEIN2 |
| CELL[56].IMUX_IMUX_DELAY[11] | BITSLICE[48].TX_CNTVALUEIN4 |
| CELL[56].IMUX_IMUX_DELAY[12] | BITSLICE[48].TX_CNTVALUEIN7 |
| CELL[56].IMUX_IMUX_DELAY[13] | BITSLICE[48].RX_CNTVALUEIN0 |
| CELL[56].IMUX_IMUX_DELAY[14] | BITSLICE[48].RX_CNTVALUEIN4 |
| CELL[56].IMUX_IMUX_DELAY[15] | BITSLICE[48].RX_CNTVALUEIN6 |
| CELL[56].IMUX_IMUX_DELAY[16] | BITSLICE_CONTROL[7].CLB2PHY_RDEN0 |
| CELL[56].IMUX_IMUX_DELAY[17] | BITSLICE_CONTROL[7].CLB2PHY_RDEN1 |
| CELL[56].IMUX_IMUX_DELAY[18] | BITSLICE_CONTROL[7].CLB2PHY_RDEN2 |
| CELL[56].IMUX_IMUX_DELAY[19] | BITSLICE_CONTROL[7].CLB2PHY_RDEN3 |
| CELL[56].IMUX_IMUX_DELAY[20] | BITSLICE_CONTROL[7].CLB2PHY_RDCS1_0 |
| CELL[56].IMUX_IMUX_DELAY[21] | BITSLICE_CONTROL[7].CLB2PHY_RDCS1_1 |
| CELL[56].IMUX_IMUX_DELAY[22] | BITSLICE_CONTROL[7].CLB2PHY_RDCS1_2 |
| CELL[56].IMUX_IMUX_DELAY[23] | BITSLICE_CONTROL[7].CLB2PHY_RDCS1_3 |
| CELL[56].IMUX_IMUX_DELAY[24] | BITSLICE_CONTROL[7].CLB2PHY_RDCS0_0 |
| CELL[56].IMUX_IMUX_DELAY[25] | BITSLICE_CONTROL[7].CLB2PHY_RDCS0_1 |
| CELL[56].IMUX_IMUX_DELAY[26] | BITSLICE_CONTROL[7].CLB2PHY_RDCS0_2 |
| CELL[56].IMUX_IMUX_DELAY[27] | BITSLICE_CONTROL[7].CLB2PHY_RDCS0_3 |
| CELL[56].IMUX_IMUX_DELAY[28] | BITSLICE[48].TX_T |
| CELL[56].IMUX_IMUX_DELAY[29] | BITSLICE[48].TX_CE_OFD |
| CELL[56].IMUX_IMUX_DELAY[30] | BITSLICE[48].RX_CE_IFD |
| CELL[56].IMUX_IMUX_DELAY[31] | BITSLICE[48].CLB2PHY_FIFO_RDEN |
| CELL[56].IMUX_IMUX_DELAY[32] | BITSLICE[48].TX_D1 |
| CELL[56].IMUX_IMUX_DELAY[33] | BITSLICE[48].TX_D2 |
| CELL[56].IMUX_IMUX_DELAY[34] | BITSLICE[48].TX_D3 |
| CELL[56].IMUX_IMUX_DELAY[35] | BITSLICE[48].TX_D5 |
| CELL[56].IMUX_IMUX_DELAY[36] | BITSLICE[48].TX_D7 |
| CELL[56].IMUX_IMUX_DELAY[37] | BITSLICE[48].TX_CNTVALUEIN0 |
| CELL[56].IMUX_IMUX_DELAY[38] | BITSLICE[48].TX_CNTVALUEIN1 |
| CELL[56].IMUX_IMUX_DELAY[39] | BITSLICE[48].TX_CNTVALUEIN3 |
| CELL[56].IMUX_IMUX_DELAY[40] | BITSLICE[48].TX_CNTVALUEIN5 |
| CELL[56].IMUX_IMUX_DELAY[41] | BITSLICE[48].TX_CNTVALUEIN6 |
| CELL[56].IMUX_IMUX_DELAY[43] | BITSLICE[48].TX_CNTVALUEIN8 |
| CELL[56].IMUX_IMUX_DELAY[44] | BITSLICE[48].RX_CNTVALUEIN1 |
| CELL[56].IMUX_IMUX_DELAY[45] | BITSLICE[48].RX_CNTVALUEIN2 |
| CELL[56].IMUX_IMUX_DELAY[46] | BITSLICE[48].RX_CNTVALUEIN3 |
| CELL[56].IMUX_IMUX_DELAY[47] | BITSLICE[48].RX_CNTVALUEIN5 |
| CELL[57].OUT_BEL[4] | BITSLICE[48].PHY2CLB_FIFO_EMPTY |
| CELL[57].OUT_BEL[5] | BITSLICE[48].RX_Q0 |
| CELL[57].OUT_BEL[6] | BITSLICE[48].RX_Q1 |
| CELL[57].OUT_BEL[7] | BITSLICE[48].RX_Q2 |
| CELL[57].OUT_BEL[8] | BITSLICE[48].RX_Q3 |
| CELL[57].OUT_BEL[9] | BITSLICE[48].RX_Q4 |
| CELL[57].OUT_BEL[10] | BITSLICE[48].RX_Q5 |
| CELL[57].OUT_BEL[11] | BITSLICE[48].RX_Q6 |
| CELL[57].OUT_BEL[12] | BITSLICE[48].RX_Q7 |
| CELL[57].OUT_BEL[13] | BITSLICE[48].TX_CNTVALUEOUT0 |
| CELL[57].OUT_BEL[14] | BITSLICE[48].TX_CNTVALUEOUT1 |
| CELL[57].OUT_BEL[15] | BITSLICE[48].TX_CNTVALUEOUT2 |
| CELL[57].OUT_BEL[16] | BITSLICE[48].TX_CNTVALUEOUT3 |
| CELL[57].OUT_BEL[17] | BITSLICE[48].TX_CNTVALUEOUT4 |
| CELL[57].OUT_BEL[18] | BITSLICE[48].TX_CNTVALUEOUT5 |
| CELL[57].OUT_BEL[19] | BITSLICE[48].TX_CNTVALUEOUT6 |
| CELL[57].OUT_BEL[20] | BITSLICE[48].TX_CNTVALUEOUT7 |
| CELL[57].OUT_BEL[21] | BITSLICE[48].TX_CNTVALUEOUT8 |
| CELL[57].OUT_BEL[22] | BITSLICE[51].TX_T_OUT |
| CELL[57].OUT_BEL[23] | BITSLICE[48].RX_CNTVALUEOUT0 |
| CELL[57].OUT_BEL[24] | BITSLICE[48].RX_CNTVALUEOUT1 |
| CELL[57].OUT_BEL[25] | BITSLICE[48].RX_CNTVALUEOUT2 |
| CELL[57].OUT_BEL[26] | BITSLICE[48].RX_CNTVALUEOUT3 |
| CELL[57].OUT_BEL[27] | BITSLICE[48].RX_CNTVALUEOUT4 |
| CELL[57].OUT_BEL[28] | BITSLICE[48].RX_CNTVALUEOUT5 |
| CELL[57].OUT_BEL[29] | BITSLICE[48].RX_CNTVALUEOUT6 |
| CELL[57].OUT_BEL[30] | BITSLICE[48].RX_CNTVALUEOUT7 |
| CELL[57].OUT_BEL[31] | BITSLICE[48].RX_CNTVALUEOUT8 |
| CELL[57].IMUX_CTRL[2] | BITSLICE_CONTROL[7].RIU_CLK, XIPHY_FEEDTHROUGH[3].CLB2PHY_CTRL_CLK_UPP |
| CELL[57].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B9 |
| CELL[57].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B9 |
| CELL[57].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B9 |
| CELL[57].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B9 |
| CELL[57].IMUX_BYP[6] | BITSLICE_T[7].CE_ODELAY |
| CELL[57].IMUX_BYP[7] | BITSLICE_CONTROL[7].EN_VTC |
| CELL[57].IMUX_BYP[8] | BITSLICE_CONTROL[7].CTRL_DLY_TEST_IN |
| CELL[57].IMUX_BYP[9] | BITSLICE[48].TX_LD |
| CELL[57].IMUX_BYP[10] | BITSLICE[48].TX_INC |
| CELL[57].IMUX_BYP[11] | BITSLICE[48].TX_EN_VTC |
| CELL[57].IMUX_BYP[12] | BITSLICE[48].TX_CE_ODELAY |
| CELL[57].IMUX_BYP[13] | BITSLICE[48].RX_LD |
| CELL[57].IMUX_BYP[14] | BITSLICE[48].RX_INC |
| CELL[57].IMUX_BYP[15] | BITSLICE[48].RX_EN_VTC |
| CELL[57].IMUX_IMUX_DELAY[6] | BITSLICE[49].TX_CNTVALUEIN0 |
| CELL[57].IMUX_IMUX_DELAY[7] | BITSLICE[49].TX_CNTVALUEIN2 |
| CELL[57].IMUX_IMUX_DELAY[8] | BITSLICE[49].TX_CNTVALUEIN6 |
| CELL[57].IMUX_IMUX_DELAY[9] | BITSLICE[49].TX_CNTVALUEIN8 |
| CELL[57].IMUX_IMUX_DELAY[10] | BITSLICE[49].RX_CNTVALUEIN3 |
| CELL[57].IMUX_IMUX_DELAY[11] | BITSLICE[49].RX_CNTVALUEIN5 |
| CELL[57].IMUX_IMUX_DELAY[12] | BITSLICE[50].TX_T |
| CELL[57].IMUX_IMUX_DELAY[13] | BITSLICE[50].RX_CE_IFD |
| CELL[57].IMUX_IMUX_DELAY[14] | BITSLICE[50].TX_D1 |
| CELL[57].IMUX_IMUX_DELAY[15] | BITSLICE[50].TX_D3 |
| CELL[57].IMUX_IMUX_DELAY[16] | BITSLICE[48].RX_CNTVALUEIN7 |
| CELL[57].IMUX_IMUX_DELAY[17] | BITSLICE[48].RX_CNTVALUEIN8 |
| CELL[57].IMUX_IMUX_DELAY[18] | BITSLICE[49].TX_T |
| CELL[57].IMUX_IMUX_DELAY[19] | BITSLICE[49].TX_CE_OFD |
| CELL[57].IMUX_IMUX_DELAY[20] | BITSLICE[49].RX_CE_IFD |
| CELL[57].IMUX_IMUX_DELAY[21] | BITSLICE[49].RX_DATAIN1 |
| CELL[57].IMUX_IMUX_DELAY[22] | BITSLICE[49].CLB2PHY_FIFO_RDEN |
| CELL[57].IMUX_IMUX_DELAY[23] | BITSLICE[49].TX_D5 |
| CELL[57].IMUX_IMUX_DELAY[24] | BITSLICE[49].TX_D4 |
| CELL[57].IMUX_IMUX_DELAY[25] | BITSLICE[49].TX_D3 |
| CELL[57].IMUX_IMUX_DELAY[26] | BITSLICE[49].TX_D2 |
| CELL[57].IMUX_IMUX_DELAY[27] | BITSLICE[49].TX_D1 |
| CELL[57].IMUX_IMUX_DELAY[28] | BITSLICE[49].TX_D0 |
| CELL[57].IMUX_IMUX_DELAY[29] | BITSLICE[49].TX_D6 |
| CELL[57].IMUX_IMUX_DELAY[30] | BITSLICE[49].TX_D7 |
| CELL[57].IMUX_IMUX_DELAY[31] | BITSLICE[49].TX_CNTVALUEIN1 |
| CELL[57].IMUX_IMUX_DELAY[32] | BITSLICE[49].TX_CNTVALUEIN3 |
| CELL[57].IMUX_IMUX_DELAY[33] | BITSLICE[49].TX_CNTVALUEIN4 |
| CELL[57].IMUX_IMUX_DELAY[34] | BITSLICE[49].TX_CNTVALUEIN5 |
| CELL[57].IMUX_IMUX_DELAY[35] | BITSLICE[49].TX_CNTVALUEIN7 |
| CELL[57].IMUX_IMUX_DELAY[36] | BITSLICE[49].RX_CNTVALUEIN0 |
| CELL[57].IMUX_IMUX_DELAY[37] | BITSLICE[49].RX_CNTVALUEIN1 |
| CELL[57].IMUX_IMUX_DELAY[38] | BITSLICE[49].RX_CNTVALUEIN2 |
| CELL[57].IMUX_IMUX_DELAY[39] | BITSLICE[49].RX_CNTVALUEIN4 |
| CELL[57].IMUX_IMUX_DELAY[40] | BITSLICE[49].RX_CNTVALUEIN6 |
| CELL[57].IMUX_IMUX_DELAY[41] | BITSLICE[49].RX_CNTVALUEIN7 |
| CELL[57].IMUX_IMUX_DELAY[42] | BITSLICE[49].RX_CNTVALUEIN8 |
| CELL[57].IMUX_IMUX_DELAY[43] | BITSLICE[50].TX_CE_OFD |
| CELL[57].IMUX_IMUX_DELAY[44] | BITSLICE[50].RX_DATAIN1 |
| CELL[57].IMUX_IMUX_DELAY[45] | BITSLICE[50].CLB2PHY_FIFO_RDEN |
| CELL[57].IMUX_IMUX_DELAY[46] | BITSLICE[50].TX_D0 |
| CELL[57].IMUX_IMUX_DELAY[47] | BITSLICE[50].TX_D2 |
| CELL[58].OUT_BEL[4] | BITSLICE[49].PHY2CLB_FIFO_EMPTY |
| CELL[58].OUT_BEL[5] | BITSLICE[49].RX_Q0 |
| CELL[58].OUT_BEL[6] | BITSLICE[49].RX_Q1 |
| CELL[58].OUT_BEL[7] | BITSLICE[49].RX_Q2 |
| CELL[58].OUT_BEL[8] | BITSLICE[49].RX_Q3 |
| CELL[58].OUT_BEL[9] | BITSLICE[49].RX_Q4 |
| CELL[58].OUT_BEL[10] | BITSLICE[49].RX_Q5 |
| CELL[58].OUT_BEL[11] | BITSLICE[49].RX_Q6 |
| CELL[58].OUT_BEL[12] | BITSLICE[49].RX_Q7 |
| CELL[58].OUT_BEL[13] | BITSLICE[49].TX_CNTVALUEOUT0 |
| CELL[58].OUT_BEL[14] | BITSLICE[49].TX_CNTVALUEOUT1 |
| CELL[58].OUT_BEL[15] | BITSLICE[49].TX_CNTVALUEOUT2 |
| CELL[58].OUT_BEL[16] | BITSLICE[49].TX_CNTVALUEOUT3 |
| CELL[58].OUT_BEL[17] | BITSLICE[49].TX_CNTVALUEOUT4 |
| CELL[58].OUT_BEL[18] | BITSLICE[49].TX_CNTVALUEOUT5 |
| CELL[58].OUT_BEL[19] | BITSLICE[49].TX_CNTVALUEOUT6 |
| CELL[58].OUT_BEL[20] | BITSLICE[49].TX_CNTVALUEOUT7 |
| CELL[58].OUT_BEL[21] | BITSLICE[49].TX_CNTVALUEOUT8 |
| CELL[58].OUT_BEL[23] | BITSLICE[49].RX_CNTVALUEOUT0 |
| CELL[58].OUT_BEL[24] | BITSLICE[49].RX_CNTVALUEOUT1 |
| CELL[58].OUT_BEL[25] | BITSLICE[49].RX_CNTVALUEOUT2 |
| CELL[58].OUT_BEL[26] | BITSLICE[49].RX_CNTVALUEOUT3 |
| CELL[58].OUT_BEL[27] | BITSLICE[49].RX_CNTVALUEOUT4 |
| CELL[58].OUT_BEL[28] | BITSLICE[49].RX_CNTVALUEOUT5 |
| CELL[58].OUT_BEL[29] | BITSLICE[49].RX_CNTVALUEOUT6 |
| CELL[58].OUT_BEL[30] | BITSLICE[49].RX_CNTVALUEOUT7 |
| CELL[58].OUT_BEL[31] | BITSLICE[49].RX_CNTVALUEOUT8 |
| CELL[58].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK9 |
| CELL[58].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B10 |
| CELL[58].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B10 |
| CELL[58].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B10 |
| CELL[58].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B10 |
| CELL[58].IMUX_BYP[6] | BITSLICE[48].RX_CE_IDELAY |
| CELL[58].IMUX_BYP[7] | BITSLICE[48].DYN_DCI_OUT_INT |
| CELL[58].IMUX_BYP[8] | BITSLICE[49].TX_LD |
| CELL[58].IMUX_BYP[9] | BITSLICE[49].TX_INC |
| CELL[58].IMUX_BYP[10] | BITSLICE[49].TX_EN_VTC |
| CELL[58].IMUX_BYP[11] | BITSLICE[49].TX_CE_ODELAY |
| CELL[58].IMUX_BYP[12] | BITSLICE[49].RX_LD |
| CELL[58].IMUX_BYP[13] | BITSLICE[49].RX_INC |
| CELL[58].IMUX_BYP[14] | BITSLICE[49].RX_EN_VTC |
| CELL[58].IMUX_BYP[15] | BITSLICE[49].RX_CE_IDELAY |
| CELL[58].IMUX_IMUX_DELAY[6] | BITSLICE[50].TX_D5 |
| CELL[58].IMUX_IMUX_DELAY[7] | BITSLICE[50].TX_D6 |
| CELL[58].IMUX_IMUX_DELAY[8] | BITSLICE[50].TX_D7 |
| CELL[58].IMUX_IMUX_DELAY[9] | BITSLICE[50].TX_CNTVALUEIN0 |
| CELL[58].IMUX_IMUX_DELAY[10] | BITSLICE[50].TX_CNTVALUEIN1 |
| CELL[58].IMUX_IMUX_DELAY[11] | BITSLICE[50].TX_CNTVALUEIN2 |
| CELL[58].IMUX_IMUX_DELAY[12] | BITSLICE[50].TX_CNTVALUEIN3 |
| CELL[58].IMUX_IMUX_DELAY[13] | BITSLICE[50].TX_CNTVALUEIN4 |
| CELL[58].IMUX_IMUX_DELAY[14] | BITSLICE[50].TX_CNTVALUEIN5 |
| CELL[58].IMUX_IMUX_DELAY[15] | BITSLICE[50].TX_CNTVALUEIN6 |
| CELL[58].IMUX_IMUX_DELAY[16] | BITSLICE[50].TX_D4 |
| CELL[59].OUT_BEL[4] | BITSLICE[50].PHY2CLB_FIFO_EMPTY |
| CELL[59].OUT_BEL[5] | BITSLICE[50].RX_Q0 |
| CELL[59].OUT_BEL[6] | BITSLICE[50].RX_Q1 |
| CELL[59].OUT_BEL[7] | BITSLICE[50].RX_Q2 |
| CELL[59].OUT_BEL[8] | BITSLICE[50].RX_Q3 |
| CELL[59].OUT_BEL[9] | BITSLICE[50].RX_Q4 |
| CELL[59].OUT_BEL[10] | BITSLICE[50].RX_Q5 |
| CELL[59].OUT_BEL[11] | BITSLICE[50].RX_Q6 |
| CELL[59].OUT_BEL[12] | BITSLICE[50].RX_Q7 |
| CELL[59].OUT_BEL[13] | BITSLICE[50].TX_CNTVALUEOUT0 |
| CELL[59].OUT_BEL[14] | BITSLICE[50].TX_CNTVALUEOUT1 |
| CELL[59].OUT_BEL[15] | BITSLICE[50].TX_CNTVALUEOUT2 |
| CELL[59].OUT_BEL[16] | BITSLICE[50].TX_CNTVALUEOUT3 |
| CELL[59].OUT_BEL[17] | BITSLICE[50].TX_CNTVALUEOUT4 |
| CELL[59].OUT_BEL[18] | BITSLICE[50].TX_CNTVALUEOUT5 |
| CELL[59].OUT_BEL[19] | BITSLICE[50].TX_CNTVALUEOUT6 |
| CELL[59].OUT_BEL[20] | BITSLICE[50].TX_CNTVALUEOUT7 |
| CELL[59].OUT_BEL[21] | BITSLICE[50].TX_CNTVALUEOUT8 |
| CELL[59].OUT_BEL[23] | BITSLICE[50].RX_CNTVALUEOUT0 |
| CELL[59].OUT_BEL[24] | BITSLICE[50].RX_CNTVALUEOUT1 |
| CELL[59].OUT_BEL[25] | BITSLICE[50].RX_CNTVALUEOUT2 |
| CELL[59].OUT_BEL[26] | BITSLICE[50].RX_CNTVALUEOUT3 |
| CELL[59].OUT_BEL[27] | BITSLICE[50].RX_CNTVALUEOUT4 |
| CELL[59].OUT_BEL[28] | BITSLICE[50].RX_CNTVALUEOUT5 |
| CELL[59].OUT_BEL[29] | BITSLICE[50].RX_CNTVALUEOUT6 |
| CELL[59].OUT_BEL[30] | BITSLICE[50].RX_CNTVALUEOUT7 |
| CELL[59].OUT_BEL[31] | BITSLICE[50].RX_CNTVALUEOUT8 |
| CELL[59].IMUX_CTRL[2] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK10 |
| CELL[59].IMUX_CTRL[3] | XIPHY_FEEDTHROUGH[3].TXBIT_RST_B11 |
| CELL[59].IMUX_CTRL[4] | XIPHY_FEEDTHROUGH[3].RXBIT_RST_B11 |
| CELL[59].IMUX_CTRL[5] | XIPHY_FEEDTHROUGH[3].ODELAY_RST_B11 |
| CELL[59].IMUX_CTRL[6] | XIPHY_FEEDTHROUGH[3].IDELAY_RST_B11 |
| CELL[59].IMUX_CTRL[7] | XIPHY_FEEDTHROUGH[3].CLB2PHY_FIFO_CLK11 |
| CELL[59].IMUX_BYP[6] | BITSLICE[49].DYN_DCI_OUT_INT |
| CELL[59].IMUX_BYP[7] | BITSLICE[50].TX_LD |
| CELL[59].IMUX_BYP[8] | BITSLICE[50].TX_INC |
| CELL[59].IMUX_BYP[9] | BITSLICE[50].TX_EN_VTC |
| CELL[59].IMUX_BYP[10] | BITSLICE[50].TX_CE_ODELAY |
| CELL[59].IMUX_BYP[11] | BITSLICE[50].RX_LD |
| CELL[59].IMUX_BYP[12] | BITSLICE[50].RX_INC |
| CELL[59].IMUX_BYP[13] | BITSLICE[50].RX_EN_VTC |
| CELL[59].IMUX_BYP[14] | BITSLICE[50].RX_CE_IDELAY |
| CELL[59].IMUX_BYP[15] | BITSLICE[50].DYN_DCI_OUT_INT |
| CELL[59].IMUX_IMUX_DELAY[6] | BITSLICE[50].TX_CNTVALUEIN8 |
| CELL[59].IMUX_IMUX_DELAY[7] | BITSLICE[50].RX_CNTVALUEIN0 |
| CELL[59].IMUX_IMUX_DELAY[8] | BITSLICE[50].RX_CNTVALUEIN1 |
| CELL[59].IMUX_IMUX_DELAY[9] | BITSLICE[50].RX_CNTVALUEIN2 |
| CELL[59].IMUX_IMUX_DELAY[10] | BITSLICE[50].RX_CNTVALUEIN3 |
| CELL[59].IMUX_IMUX_DELAY[11] | BITSLICE[50].RX_CNTVALUEIN4 |
| CELL[59].IMUX_IMUX_DELAY[12] | BITSLICE[50].RX_CNTVALUEIN5 |
| CELL[59].IMUX_IMUX_DELAY[13] | BITSLICE[50].RX_CNTVALUEIN6 |
| CELL[59].IMUX_IMUX_DELAY[14] | BITSLICE[50].RX_CNTVALUEIN7 |
| CELL[59].IMUX_IMUX_DELAY[15] | BITSLICE[50].RX_CNTVALUEIN8 |
| CELL[59].IMUX_IMUX_DELAY[16] | BITSLICE[50].TX_CNTVALUEIN7 |