Clock column buffers
Tile RCLK_INT
Cells: 4
Switchbox RCLK_INT
| Destination | Source | Kind |
|---|---|---|
| NW.IMUX_RCLK[0] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.RCLK_GND[12] | mux | |
| NW.RCLK_GND[13] | mux | |
| NW.IMUX_RCLK[1] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.RCLK_GND[3] | mux | |
| NW.RCLK_GND[4] | mux | |
| NW.IMUX_RCLK[2] | NW.TIE_1 | mux |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.RCLK_GND[14] | mux | |
| NW.RCLK_GND[15] | mux | |
| NW.IMUX_RCLK[3] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.IMUX_RCLK[4] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.IMUX_RCLK[5] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.RCLK_GND[5] | mux | |
| NW.IMUX_RCLK[6] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[19] | mux | |
| NW.IMUX_RCLK[7] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[6] | mux | |
| NW.IMUX_RCLK[8] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.RCLK_GND[12] | mux | |
| NW.RCLK_GND[13] | mux | |
| NW.IMUX_RCLK[9] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.RCLK_GND[3] | mux | |
| NW.RCLK_GND[4] | mux | |
| NW.IMUX_RCLK[10] | NW.TIE_1 | mux |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[16] | mux | |
| NW.RCLK_GND[14] | mux | |
| NW.RCLK_GND[15] | mux | |
| NW.IMUX_RCLK[11] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[5] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.IMUX_RCLK[12] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[9] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[13] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.IMUX_RCLK[13] | NW.TIE_1 | mux |
| NW.INODE_RCLK[0] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[18] | mux | |
| NW.INODE_RCLK[22] | mux | |
| NW.RCLK_GND[5] | mux | |
| NW.IMUX_RCLK[14] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[11] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[19] | mux | |
| NW.IMUX_RCLK[15] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[15] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[6] | mux | |
| NW.RCLK_GND[7] | mux | |
| NW.IMUX_RCLK[16] | NW.TIE_1 | mux |
| NW.INODE_RCLK[19] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.INODE_RCLK[23] | mux | |
| NW.RCLK_GND[16] | mux | |
| NW.RCLK_GND[17] | mux | |
| NW.RCLK_GND[18] | mux | |
| NW.IMUX_RCLK[17] | NW.TIE_1 | mux |
| NW.INODE_RCLK[1] | mux | |
| NW.INODE_RCLK[19] | mux | |
| NW.INODE_RCLK[23] | mux | |
| NW.RCLK_GND[16] | mux | |
| NW.RCLK_GND[17] | mux | |
| NW.RCLK_GND[18] | mux | |
| NW.IMUX_RCLK[18] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.RCLK_GND[0] | mux | |
| NW.RCLK_GND[1] | mux | |
| NW.RCLK_GND[2] | mux | |
| NW.IMUX_RCLK[19] | NW.TIE_1 | mux |
| NW.INODE_RCLK[3] | mux | |
| NW.INODE_RCLK[7] | mux | |
| NW.INODE_RCLK[21] | mux | |
| NW.RCLK_GND[0] | mux | |
| NW.RCLK_GND[1] | mux | |
| NW.RCLK_GND[2] | mux | |
| NW.IMUX_RCLK[20] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[21] | mux | |
| NW.RCLK_GND[22] | mux | |
| NW.RCLK_GND[23] | mux | |
| NW.IMUX_RCLK[21] | NW.TIE_1 | mux |
| NW.INODE_RCLK[2] | mux | |
| NW.INODE_RCLK[6] | mux | |
| NW.INODE_RCLK[20] | mux | |
| NW.RCLK_GND[20] | mux | |
| NW.RCLK_GND[21] | mux | |
| NW.RCLK_GND[22] | mux | |
| NW.IMUX_RCLK[22] | NW.TIE_1 | mux |
| NW.INODE_RCLK[4] | mux | |
| NW.INODE_RCLK[8] | mux | |
| NW.INODE_RCLK[12] | mux | |
| NW.RCLK_GND[9] | mux | |
| NW.RCLK_GND[10] | mux | |
| NW.RCLK_GND[11] | mux | |
| NW.IMUX_RCLK[23] | NW.TIE_1 | mux |
| NW.INODE_RCLK[4] | mux | |
| NW.INODE_RCLK[8] | mux | |
| NW.INODE_RCLK[12] | mux | |
| NW.RCLK_GND[8] | mux | |
| NW.RCLK_GND[9] | mux | |
| NW.RCLK_GND[10] | mux | |
| NW.INODE_RCLK[0] | NW.X1_S0[0] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_S0[7] | mux | |
| NW.X1_N1[0] | mux | |
| NW.X2_S0[0] | mux | |
| NW.X2_N2[0] | mux | |
| NW.INODE_RCLK[1] | NW.X1_S0[0] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_S0[7] | mux | |
| NW.X1_N1[0] | mux | |
| NW.X2_S0[0] | mux | |
| NW.X2_N2[0] | mux | |
| NW.INODE_RCLK[2] | NW.X1_S0[2] | mux |
| NW.X1_N1[2] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S0[2] | mux | |
| NW.X2_N2[2] | mux | |
| NW.INODE_RCLK[3] | NW.X1_S0[2] | mux |
| NW.X1_N1[2] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X2_S0[2] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N2[2] | mux | |
| NW.INODE_RCLK[4] | NW.X1_S0[3] | mux |
| NW.X1_N1[3] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_S1[3] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N1[3] | mux | |
| NW.INODE_RCLK[5] | NW.X1_S0[3] | mux |
| NW.X1_N1[3] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_S1[3] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N1[3] | mux | |
| NW.INODE_RCLK[6] | NW.X1_S0[3] | mux |
| NW.X1_N1[3] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_S1[3] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N1[3] | mux | |
| NW.INODE_RCLK[7] | NW.X1_S0[3] | mux |
| NW.X1_N1[3] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_S1[3] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N1[3] | mux | |
| NW.INODE_RCLK[8] | NW.X1_S0[4] | mux |
| NW.X1_N1[4] | mux | |
| NW.X2_S0[4] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_S1[7] | mux | |
| NW.X2_N2[4] | mux | |
| NW.INODE_RCLK[9] | NW.X1_S0[4] | mux |
| NW.X1_N1[4] | mux | |
| NW.X2_S0[4] | mux | |
| NW.X2_S0[6] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[4] | mux | |
| NW.INODE_RCLK[10] | NW.X1_S0[4] | mux |
| NW.X1_N1[4] | mux | |
| NW.X2_S0[4] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[4] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[11] | NW.X1_S0[4] | mux |
| NW.X1_N1[4] | mux | |
| NW.X2_S0[4] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[4] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[12] | NW.X1_S0[5] | mux |
| NW.X1_N1[5] | mux | |
| NW.X2_S1[5] | mux | |
| NW.X2_N1[5] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[13] | NW.X1_S0[5] | mux |
| NW.X1_N1[5] | mux | |
| NW.X2_S1[5] | mux | |
| NW.X2_N1[5] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[14] | NW.X1_S0[5] | mux |
| NW.X1_N1[5] | mux | |
| NW.X2_S1[5] | mux | |
| NW.X2_N1[5] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[15] | NW.X1_S0[5] | mux |
| NW.X1_N1[5] | mux | |
| NW.X2_S1[5] | mux | |
| NW.X2_N1[5] | mux | |
| NW.X2_N1[7] | mux | |
| NW.X2_N2[6] | mux | |
| NW.INODE_RCLK[16] | NW.X1_S0[0] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_S0[7] | mux | |
| NW.X1_N1[0] | mux | |
| NW.X2_S0[0] | mux | |
| NW.X2_N2[0] | mux | |
| NW.INODE_RCLK[17] | NW.X1_S0[0] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_S0[7] | mux | |
| NW.X1_N1[0] | mux | |
| NW.X2_S0[0] | mux | |
| NW.X2_N2[0] | mux | |
| NW.INODE_RCLK[18] | NW.X1_S0[1] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_S0[7] | mux | |
| NW.X1_N1[1] | mux | |
| NW.X2_S1[1] | mux | |
| NW.X2_N1[1] | mux | |
| NW.INODE_RCLK[19] | NW.X1_S0[1] | mux |
| NW.X1_S0[6] | mux | |
| NW.X1_N1[1] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S1[1] | mux | |
| NW.X2_N1[1] | mux | |
| NW.INODE_RCLK[20] | NW.X1_S0[1] | mux |
| NW.X1_N1[1] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S1[1] | mux | |
| NW.X2_N1[1] | mux | |
| NW.INODE_RCLK[21] | NW.X1_S0[1] | mux |
| NW.X1_N1[1] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S1[1] | mux | |
| NW.X2_N1[1] | mux | |
| NW.INODE_RCLK[22] | NW.X1_S0[2] | mux |
| NW.X1_N1[2] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S0[2] | mux | |
| NW.X2_N2[2] | mux | |
| NW.INODE_RCLK[23] | NW.X1_S0[2] | mux |
| NW.X1_N1[2] | mux | |
| NW.X1_N1[6] | mux | |
| NW.X1_N1[7] | mux | |
| NW.X2_S0[2] | mux | |
| NW.X2_N2[2] | mux | |
| NE.IMUX_RCLK[0] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.RCLK_GND[12] | mux | |
| NE.RCLK_GND[13] | mux | |
| NE.IMUX_RCLK[1] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.RCLK_GND[3] | mux | |
| NE.RCLK_GND[4] | mux | |
| NE.IMUX_RCLK[2] | NW.TIE_1 | mux |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.RCLK_GND[14] | mux | |
| NE.RCLK_GND[15] | mux | |
| NE.IMUX_RCLK[3] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.IMUX_RCLK[4] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.IMUX_RCLK[5] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.RCLK_GND[5] | mux | |
| NE.IMUX_RCLK[6] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[19] | mux | |
| NE.IMUX_RCLK[7] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[6] | mux | |
| NE.IMUX_RCLK[8] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.RCLK_GND[12] | mux | |
| NE.RCLK_GND[13] | mux | |
| NE.IMUX_RCLK[9] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.RCLK_GND[3] | mux | |
| NE.RCLK_GND[4] | mux | |
| NE.IMUX_RCLK[10] | NW.TIE_1 | mux |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[16] | mux | |
| NE.RCLK_GND[14] | mux | |
| NE.RCLK_GND[15] | mux | |
| NE.IMUX_RCLK[11] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[5] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.IMUX_RCLK[12] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[9] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[13] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.IMUX_RCLK[13] | NW.TIE_1 | mux |
| NE.INODE_RCLK[0] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[18] | mux | |
| NE.INODE_RCLK[22] | mux | |
| NE.RCLK_GND[5] | mux | |
| NE.IMUX_RCLK[14] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[11] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[19] | mux | |
| NE.IMUX_RCLK[15] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[15] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[6] | mux | |
| NE.RCLK_GND[7] | mux | |
| NE.IMUX_RCLK[16] | NW.TIE_1 | mux |
| NE.INODE_RCLK[19] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.INODE_RCLK[23] | mux | |
| NE.RCLK_GND[16] | mux | |
| NE.RCLK_GND[17] | mux | |
| NE.RCLK_GND[18] | mux | |
| NE.IMUX_RCLK[17] | NW.TIE_1 | mux |
| NE.INODE_RCLK[1] | mux | |
| NE.INODE_RCLK[19] | mux | |
| NE.INODE_RCLK[23] | mux | |
| NE.RCLK_GND[16] | mux | |
| NE.RCLK_GND[17] | mux | |
| NE.RCLK_GND[18] | mux | |
| NE.IMUX_RCLK[18] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.RCLK_GND[0] | mux | |
| NE.RCLK_GND[1] | mux | |
| NE.RCLK_GND[2] | mux | |
| NE.IMUX_RCLK[19] | NW.TIE_1 | mux |
| NE.INODE_RCLK[3] | mux | |
| NE.INODE_RCLK[7] | mux | |
| NE.INODE_RCLK[21] | mux | |
| NE.RCLK_GND[0] | mux | |
| NE.RCLK_GND[1] | mux | |
| NE.RCLK_GND[2] | mux | |
| NE.IMUX_RCLK[20] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[21] | mux | |
| NE.RCLK_GND[22] | mux | |
| NE.RCLK_GND[23] | mux | |
| NE.IMUX_RCLK[21] | NW.TIE_1 | mux |
| NE.INODE_RCLK[2] | mux | |
| NE.INODE_RCLK[6] | mux | |
| NE.INODE_RCLK[20] | mux | |
| NE.RCLK_GND[20] | mux | |
| NE.RCLK_GND[21] | mux | |
| NE.RCLK_GND[22] | mux | |
| NE.IMUX_RCLK[22] | NW.TIE_1 | mux |
| NE.INODE_RCLK[4] | mux | |
| NE.INODE_RCLK[8] | mux | |
| NE.INODE_RCLK[12] | mux | |
| NE.RCLK_GND[9] | mux | |
| NE.RCLK_GND[10] | mux | |
| NE.RCLK_GND[11] | mux | |
| NE.IMUX_RCLK[23] | NW.TIE_1 | mux |
| NE.INODE_RCLK[4] | mux | |
| NE.INODE_RCLK[8] | mux | |
| NE.INODE_RCLK[12] | mux | |
| NE.RCLK_GND[8] | mux | |
| NE.RCLK_GND[9] | mux | |
| NE.RCLK_GND[10] | mux | |
| NE.INODE_RCLK[0] | NE.X1_S0[0] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_S0[7] | mux | |
| NE.X1_N1[0] | mux | |
| NE.X2_S0[0] | mux | |
| NE.X2_N2[0] | mux | |
| NE.INODE_RCLK[1] | NE.X1_S0[0] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_S0[7] | mux | |
| NE.X1_N1[0] | mux | |
| NE.X2_S0[0] | mux | |
| NE.X2_N2[0] | mux | |
| NE.INODE_RCLK[2] | NE.X1_S0[2] | mux |
| NE.X1_N1[2] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S0[2] | mux | |
| NE.X2_N2[2] | mux | |
| NE.INODE_RCLK[3] | NE.X1_S0[2] | mux |
| NE.X1_N1[2] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X2_S0[2] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N2[2] | mux | |
| NE.INODE_RCLK[4] | NE.X1_S0[3] | mux |
| NE.X1_N1[3] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_S1[3] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N1[3] | mux | |
| NE.INODE_RCLK[5] | NE.X1_S0[3] | mux |
| NE.X1_N1[3] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_S1[3] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N1[3] | mux | |
| NE.INODE_RCLK[6] | NE.X1_S0[3] | mux |
| NE.X1_N1[3] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_S1[3] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N1[3] | mux | |
| NE.INODE_RCLK[7] | NE.X1_S0[3] | mux |
| NE.X1_N1[3] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_S1[3] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N1[3] | mux | |
| NE.INODE_RCLK[8] | NE.X1_S0[4] | mux |
| NE.X1_N1[4] | mux | |
| NE.X2_S0[4] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_S1[7] | mux | |
| NE.X2_N2[4] | mux | |
| NE.INODE_RCLK[9] | NE.X1_S0[4] | mux |
| NE.X1_N1[4] | mux | |
| NE.X2_S0[4] | mux | |
| NE.X2_S0[6] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[4] | mux | |
| NE.INODE_RCLK[10] | NE.X1_S0[4] | mux |
| NE.X1_N1[4] | mux | |
| NE.X2_S0[4] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[4] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[11] | NE.X1_S0[4] | mux |
| NE.X1_N1[4] | mux | |
| NE.X2_S0[4] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[4] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[12] | NE.X1_S0[5] | mux |
| NE.X1_N1[5] | mux | |
| NE.X2_S1[5] | mux | |
| NE.X2_N1[5] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[13] | NE.X1_S0[5] | mux |
| NE.X1_N1[5] | mux | |
| NE.X2_S1[5] | mux | |
| NE.X2_N1[5] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[14] | NE.X1_S0[5] | mux |
| NE.X1_N1[5] | mux | |
| NE.X2_S1[5] | mux | |
| NE.X2_N1[5] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[15] | NE.X1_S0[5] | mux |
| NE.X1_N1[5] | mux | |
| NE.X2_S1[5] | mux | |
| NE.X2_N1[5] | mux | |
| NE.X2_N1[7] | mux | |
| NE.X2_N2[6] | mux | |
| NE.INODE_RCLK[16] | NE.X1_S0[0] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_S0[7] | mux | |
| NE.X1_N1[0] | mux | |
| NE.X2_S0[0] | mux | |
| NE.X2_N2[0] | mux | |
| NE.INODE_RCLK[17] | NE.X1_S0[0] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_S0[7] | mux | |
| NE.X1_N1[0] | mux | |
| NE.X2_S0[0] | mux | |
| NE.X2_N2[0] | mux | |
| NE.INODE_RCLK[18] | NE.X1_S0[1] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_S0[7] | mux | |
| NE.X1_N1[1] | mux | |
| NE.X2_S1[1] | mux | |
| NE.X2_N1[1] | mux | |
| NE.INODE_RCLK[19] | NE.X1_S0[1] | mux |
| NE.X1_S0[6] | mux | |
| NE.X1_N1[1] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S1[1] | mux | |
| NE.X2_N1[1] | mux | |
| NE.INODE_RCLK[20] | NE.X1_S0[1] | mux |
| NE.X1_N1[1] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S1[1] | mux | |
| NE.X2_N1[1] | mux | |
| NE.INODE_RCLK[21] | NE.X1_S0[1] | mux |
| NE.X1_N1[1] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S1[1] | mux | |
| NE.X2_N1[1] | mux | |
| NE.INODE_RCLK[22] | NE.X1_S0[2] | mux |
| NE.X1_N1[2] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S0[2] | mux | |
| NE.X2_N2[2] | mux | |
| NE.INODE_RCLK[23] | NE.X1_S0[2] | mux |
| NE.X1_N1[2] | mux | |
| NE.X1_N1[6] | mux | |
| NE.X1_N1[7] | mux | |
| NE.X2_S0[2] | mux | |
| NE.X2_N2[2] | mux |
Bel BUFCE_LEAF_S[0]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[0] |
| CLK_CASC_IN | input | NE.IMUX_RCLK[23] |
| CLK_LEAF | output | SW.GCLK[0] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[1]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[1] |
| CLK_LEAF | output | SW.GCLK[1] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[2]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[2] |
| CLK_LEAF | output | SW.GCLK[2] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[3]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[3] |
| CLK_LEAF | output | SW.GCLK[3] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[4]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[4] |
| CLK_LEAF | output | SW.GCLK[4] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[5]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[5] |
| CLK_LEAF | output | SW.GCLK[5] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[6]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[6] |
| CLK_LEAF | output | SW.GCLK[6] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[7]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[7] |
| CLK_LEAF | output | SW.GCLK[7] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[8]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[0] |
| CLK_LEAF | output | SW.GCLK[8] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[9]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[1] |
| CLK_LEAF | output | SW.GCLK[9] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[10]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[2] |
| CLK_LEAF | output | SW.GCLK[10] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[11]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[3] |
| CLK_LEAF | output | SW.GCLK[11] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[12]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[4] |
| CLK_LEAF | output | SW.GCLK[12] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[13]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[5] |
| CLK_LEAF | output | SW.GCLK[13] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[14]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[6] |
| CLK_LEAF | output | SW.GCLK[14] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_S[15]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[7] |
| CLK_LEAF | output | SW.GCLK[15] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[0]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[8] |
| CLK_LEAF | output | NW.GCLK[0] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[1]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[9] |
| CLK_LEAF | output | NW.GCLK[1] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[2]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[10] |
| CLK_LEAF | output | NW.GCLK[2] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[3]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[11] |
| CLK_LEAF | output | NW.GCLK[3] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[4]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[12] |
| CLK_LEAF | output | NW.GCLK[4] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[5]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[13] |
| CLK_LEAF | output | NW.GCLK[5] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[6]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[14] |
| CLK_LEAF | output | NW.GCLK[6] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[7]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NE.IMUX_RCLK[15] |
| CLK_LEAF | output | NW.GCLK[7] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[8]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[8] |
| CLK_LEAF | output | NW.GCLK[8] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[9]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[9] |
| CLK_LEAF | output | NW.GCLK[9] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[10]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[10] |
| CLK_LEAF | output | NW.GCLK[10] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[11]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[11] |
| CLK_LEAF | output | NW.GCLK[11] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[12]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[12] |
| CLK_LEAF | output | NW.GCLK[12] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[13]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[13] |
| CLK_LEAF | output | NW.GCLK[13] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[14]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[14] |
| CLK_LEAF | output | NW.GCLK[14] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel BUFCE_LEAF_N[15]
| Pin | Direction | Wires |
|---|---|---|
| CE_INT | input | NW.IMUX_RCLK[15] |
| CLK_LEAF | output | NW.GCLK[15] |
| ENSEL_PROG | input | NE.IMUX_RCLK[22] |
Bel RCLK_INT_CLK
| Pin | Direction | Wires |
|---|
Bel wires
| Wire | Pins |
|---|---|
| NW.GCLK[0] | BUFCE_LEAF_N[0].CLK_LEAF |
| NW.GCLK[1] | BUFCE_LEAF_N[1].CLK_LEAF |
| NW.GCLK[2] | BUFCE_LEAF_N[2].CLK_LEAF |
| NW.GCLK[3] | BUFCE_LEAF_N[3].CLK_LEAF |
| NW.GCLK[4] | BUFCE_LEAF_N[4].CLK_LEAF |
| NW.GCLK[5] | BUFCE_LEAF_N[5].CLK_LEAF |
| NW.GCLK[6] | BUFCE_LEAF_N[6].CLK_LEAF |
| NW.GCLK[7] | BUFCE_LEAF_N[7].CLK_LEAF |
| NW.GCLK[8] | BUFCE_LEAF_N[8].CLK_LEAF |
| NW.GCLK[9] | BUFCE_LEAF_N[9].CLK_LEAF |
| NW.GCLK[10] | BUFCE_LEAF_N[10].CLK_LEAF |
| NW.GCLK[11] | BUFCE_LEAF_N[11].CLK_LEAF |
| NW.GCLK[12] | BUFCE_LEAF_N[12].CLK_LEAF |
| NW.GCLK[13] | BUFCE_LEAF_N[13].CLK_LEAF |
| NW.GCLK[14] | BUFCE_LEAF_N[14].CLK_LEAF |
| NW.GCLK[15] | BUFCE_LEAF_N[15].CLK_LEAF |
| NW.IMUX_RCLK[0] | BUFCE_LEAF_S[8].CE_INT |
| NW.IMUX_RCLK[1] | BUFCE_LEAF_S[9].CE_INT |
| NW.IMUX_RCLK[2] | BUFCE_LEAF_S[10].CE_INT |
| NW.IMUX_RCLK[3] | BUFCE_LEAF_S[11].CE_INT |
| NW.IMUX_RCLK[4] | BUFCE_LEAF_S[12].CE_INT |
| NW.IMUX_RCLK[5] | BUFCE_LEAF_S[13].CE_INT |
| NW.IMUX_RCLK[6] | BUFCE_LEAF_S[14].CE_INT |
| NW.IMUX_RCLK[7] | BUFCE_LEAF_S[15].CE_INT |
| NW.IMUX_RCLK[8] | BUFCE_LEAF_N[8].CE_INT |
| NW.IMUX_RCLK[9] | BUFCE_LEAF_N[9].CE_INT |
| NW.IMUX_RCLK[10] | BUFCE_LEAF_N[10].CE_INT |
| NW.IMUX_RCLK[11] | BUFCE_LEAF_N[11].CE_INT |
| NW.IMUX_RCLK[12] | BUFCE_LEAF_N[12].CE_INT |
| NW.IMUX_RCLK[13] | BUFCE_LEAF_N[13].CE_INT |
| NW.IMUX_RCLK[14] | BUFCE_LEAF_N[14].CE_INT |
| NW.IMUX_RCLK[15] | BUFCE_LEAF_N[15].CE_INT |
| NE.IMUX_RCLK[0] | BUFCE_LEAF_S[0].CE_INT |
| NE.IMUX_RCLK[1] | BUFCE_LEAF_S[1].CE_INT |
| NE.IMUX_RCLK[2] | BUFCE_LEAF_S[2].CE_INT |
| NE.IMUX_RCLK[3] | BUFCE_LEAF_S[3].CE_INT |
| NE.IMUX_RCLK[4] | BUFCE_LEAF_S[4].CE_INT |
| NE.IMUX_RCLK[5] | BUFCE_LEAF_S[5].CE_INT |
| NE.IMUX_RCLK[6] | BUFCE_LEAF_S[6].CE_INT |
| NE.IMUX_RCLK[7] | BUFCE_LEAF_S[7].CE_INT |
| NE.IMUX_RCLK[8] | BUFCE_LEAF_N[0].CE_INT |
| NE.IMUX_RCLK[9] | BUFCE_LEAF_N[1].CE_INT |
| NE.IMUX_RCLK[10] | BUFCE_LEAF_N[2].CE_INT |
| NE.IMUX_RCLK[11] | BUFCE_LEAF_N[3].CE_INT |
| NE.IMUX_RCLK[12] | BUFCE_LEAF_N[4].CE_INT |
| NE.IMUX_RCLK[13] | BUFCE_LEAF_N[5].CE_INT |
| NE.IMUX_RCLK[14] | BUFCE_LEAF_N[6].CE_INT |
| NE.IMUX_RCLK[15] | BUFCE_LEAF_N[7].CE_INT |
| NE.IMUX_RCLK[22] | BUFCE_LEAF_S[0].ENSEL_PROG, BUFCE_LEAF_S[1].ENSEL_PROG, BUFCE_LEAF_S[2].ENSEL_PROG, BUFCE_LEAF_S[3].ENSEL_PROG, BUFCE_LEAF_S[4].ENSEL_PROG, BUFCE_LEAF_S[5].ENSEL_PROG, BUFCE_LEAF_S[6].ENSEL_PROG, BUFCE_LEAF_S[7].ENSEL_PROG, BUFCE_LEAF_S[8].ENSEL_PROG, BUFCE_LEAF_S[9].ENSEL_PROG, BUFCE_LEAF_S[10].ENSEL_PROG, BUFCE_LEAF_S[11].ENSEL_PROG, BUFCE_LEAF_S[12].ENSEL_PROG, BUFCE_LEAF_S[13].ENSEL_PROG, BUFCE_LEAF_S[14].ENSEL_PROG, BUFCE_LEAF_S[15].ENSEL_PROG, BUFCE_LEAF_N[0].ENSEL_PROG, BUFCE_LEAF_N[1].ENSEL_PROG, BUFCE_LEAF_N[2].ENSEL_PROG, BUFCE_LEAF_N[3].ENSEL_PROG, BUFCE_LEAF_N[4].ENSEL_PROG, BUFCE_LEAF_N[5].ENSEL_PROG, BUFCE_LEAF_N[6].ENSEL_PROG, BUFCE_LEAF_N[7].ENSEL_PROG, BUFCE_LEAF_N[8].ENSEL_PROG, BUFCE_LEAF_N[9].ENSEL_PROG, BUFCE_LEAF_N[10].ENSEL_PROG, BUFCE_LEAF_N[11].ENSEL_PROG, BUFCE_LEAF_N[12].ENSEL_PROG, BUFCE_LEAF_N[13].ENSEL_PROG, BUFCE_LEAF_N[14].ENSEL_PROG, BUFCE_LEAF_N[15].ENSEL_PROG |
| NE.IMUX_RCLK[23] | BUFCE_LEAF_S[0].CLK_CASC_IN |
| SW.GCLK[0] | BUFCE_LEAF_S[0].CLK_LEAF |
| SW.GCLK[1] | BUFCE_LEAF_S[1].CLK_LEAF |
| SW.GCLK[2] | BUFCE_LEAF_S[2].CLK_LEAF |
| SW.GCLK[3] | BUFCE_LEAF_S[3].CLK_LEAF |
| SW.GCLK[4] | BUFCE_LEAF_S[4].CLK_LEAF |
| SW.GCLK[5] | BUFCE_LEAF_S[5].CLK_LEAF |
| SW.GCLK[6] | BUFCE_LEAF_S[6].CLK_LEAF |
| SW.GCLK[7] | BUFCE_LEAF_S[7].CLK_LEAF |
| SW.GCLK[8] | BUFCE_LEAF_S[8].CLK_LEAF |
| SW.GCLK[9] | BUFCE_LEAF_S[9].CLK_LEAF |
| SW.GCLK[10] | BUFCE_LEAF_S[10].CLK_LEAF |
| SW.GCLK[11] | BUFCE_LEAF_S[11].CLK_LEAF |
| SW.GCLK[12] | BUFCE_LEAF_S[12].CLK_LEAF |
| SW.GCLK[13] | BUFCE_LEAF_S[13].CLK_LEAF |
| SW.GCLK[14] | BUFCE_LEAF_S[14].CLK_LEAF |
| SW.GCLK[15] | BUFCE_LEAF_S[15].CLK_LEAF |