Cells: 5
IRIs: 0
ultrascaleplus DSP bel DSP0
Pin | Direction | Wires |
A0 | input | TCELL0:IMUX.IMUX.1 |
A1 | input | TCELL0:IMUX.IMUX.3 |
A10 | input | TCELL1:IMUX.IMUX.26 |
A11 | input | TCELL1:IMUX.IMUX.7 |
A12 | input | TCELL1:IMUX.IMUX.35 |
A13 | input | TCELL1:IMUX.IMUX.38 |
A14 | input | TCELL1:IMUX.IMUX.13 |
A15 | input | TCELL1:IMUX.IMUX.46 |
A16 | input | TCELL2:IMUX.IMUX.1 |
A17 | input | TCELL2:IMUX.IMUX.3 |
A18 | input | TCELL2:IMUX.IMUX.26 |
A19 | input | TCELL2:IMUX.IMUX.7 |
A2 | input | TCELL0:IMUX.IMUX.26 |
A20 | input | TCELL2:IMUX.IMUX.35 |
A21 | input | TCELL2:IMUX.IMUX.38 |
A22 | input | TCELL2:IMUX.IMUX.13 |
A23 | input | TCELL2:IMUX.IMUX.46 |
A24 | input | TCELL3:IMUX.IMUX.1 |
A25 | input | TCELL3:IMUX.IMUX.3 |
A26 | input | TCELL3:IMUX.IMUX.26 |
A27 | input | TCELL3:IMUX.IMUX.7 |
A28 | input | TCELL3:IMUX.IMUX.35 |
A29 | input | TCELL3:IMUX.IMUX.38 |
A3 | input | TCELL0:IMUX.IMUX.7 |
A4 | input | TCELL0:IMUX.IMUX.35 |
A5 | input | TCELL0:IMUX.IMUX.38 |
A6 | input | TCELL0:IMUX.IMUX.13 |
A7 | input | TCELL0:IMUX.IMUX.46 |
A8 | input | TCELL1:IMUX.IMUX.1 |
A9 | input | TCELL1:IMUX.IMUX.3 |
ALUMODE0 | input | TCELL2:IMUX.IMUX.23 |
ALUMODE1 | input | TCELL0:IMUX.IMUX.24 |
ALUMODE2 | input | TCELL0:IMUX.IMUX.36 |
ALUMODE3 | input | TCELL2:IMUX.IMUX.9 |
B0 | input | TCELL0:IMUX.IMUX.16 |
B1 | input | TCELL0:IMUX.IMUX.2 |
B10 | input | TCELL1:IMUX.IMUX.4 |
B11 | input | TCELL1:IMUX.IMUX.28 |
B12 | input | TCELL1:IMUX.IMUX.32 |
B13 | input | TCELL1:IMUX.IMUX.10 |
B14 | input | TCELL1:IMUX.IMUX.40 |
B15 | input | TCELL1:IMUX.IMUX.44 |
B16 | input | TCELL2:IMUX.IMUX.16 |
B17 | input | TCELL2:IMUX.IMUX.2 |
B2 | input | TCELL0:IMUX.IMUX.4 |
B3 | input | TCELL0:IMUX.IMUX.28 |
B4 | input | TCELL0:IMUX.IMUX.32 |
B5 | input | TCELL0:IMUX.IMUX.10 |
B6 | input | TCELL0:IMUX.IMUX.40 |
B7 | input | TCELL0:IMUX.IMUX.44 |
B8 | input | TCELL1:IMUX.IMUX.16 |
B9 | input | TCELL1:IMUX.IMUX.2 |
C0 | input | TCELL0:IMUX.IMUX.0 |
C1 | input | TCELL0:IMUX.IMUX.19 |
C10 | input | TCELL1:IMUX.IMUX.25 |
C11 | input | TCELL1:IMUX.IMUX.6 |
C12 | input | TCELL1:IMUX.IMUX.33 |
C13 | input | TCELL1:IMUX.IMUX.37 |
C14 | input | TCELL1:IMUX.IMUX.12 |
C15 | input | TCELL1:IMUX.IMUX.45 |
C16 | input | TCELL2:IMUX.IMUX.0 |
C17 | input | TCELL2:IMUX.IMUX.19 |
C18 | input | TCELL2:IMUX.IMUX.25 |
C19 | input | TCELL2:IMUX.IMUX.6 |
C2 | input | TCELL0:IMUX.IMUX.25 |
C20 | input | TCELL2:IMUX.IMUX.33 |
C21 | input | TCELL2:IMUX.IMUX.37 |
C22 | input | TCELL2:IMUX.IMUX.12 |
C23 | input | TCELL2:IMUX.IMUX.45 |
C24 | input | TCELL3:IMUX.IMUX.0 |
C25 | input | TCELL3:IMUX.IMUX.19 |
C26 | input | TCELL3:IMUX.IMUX.25 |
C27 | input | TCELL3:IMUX.IMUX.6 |
C28 | input | TCELL3:IMUX.IMUX.33 |
C29 | input | TCELL3:IMUX.IMUX.37 |
C3 | input | TCELL0:IMUX.IMUX.6 |
C30 | input | TCELL3:IMUX.IMUX.12 |
C31 | input | TCELL3:IMUX.IMUX.45 |
C32 | input | TCELL4:IMUX.IMUX.0 |
C33 | input | TCELL4:IMUX.IMUX.19 |
C34 | input | TCELL4:IMUX.IMUX.25 |
C35 | input | TCELL4:IMUX.IMUX.6 |
C36 | input | TCELL4:IMUX.IMUX.33 |
C37 | input | TCELL4:IMUX.IMUX.37 |
C38 | input | TCELL4:IMUX.IMUX.12 |
C39 | input | TCELL4:IMUX.IMUX.45 |
C4 | input | TCELL0:IMUX.IMUX.33 |
C40 | input | TCELL0:IMUX.IMUX.22 |
C41 | input | TCELL0:IMUX.IMUX.31 |
C42 | input | TCELL0:IMUX.IMUX.9 |
C43 | input | TCELL0:IMUX.IMUX.43 |
C44 | input | TCELL1:IMUX.IMUX.22 |
C45 | input | TCELL1:IMUX.IMUX.31 |
C46 | input | TCELL1:IMUX.IMUX.9 |
C47 | input | TCELL1:IMUX.IMUX.43 |
C5 | input | TCELL0:IMUX.IMUX.37 |
C6 | input | TCELL0:IMUX.IMUX.12 |
C7 | input | TCELL0:IMUX.IMUX.45 |
C8 | input | TCELL1:IMUX.IMUX.0 |
C9 | input | TCELL1:IMUX.IMUX.19 |
CARRYIN | input | TCELL2:IMUX.IMUX.31 |
CARRYINSEL0 | input | TCELL0:IMUX.BYP.1 |
CARRYINSEL1 | input | TCELL0:IMUX.BYP.5 |
CARRYINSEL2 | input | TCELL0:IMUX.BYP.9 |
CARRYOUT0 | output | TCELL1:OUT.16 |
CARRYOUT1 | output | TCELL3:OUT.4 |
CARRYOUT2 | output | TCELL4:OUT.16 |
CARRYOUT3 | output | TCELL2:OUT.11 |
CEA1 | input | TCELL0:IMUX.CTRL.0 |
CEA2 | input | TCELL0:IMUX.CTRL.1 |
CEAD | input | TCELL1:IMUX.CTRL.3 |
CEALUMODE | input | TCELL0:IMUX.IMUX.47 |
CEB1 | input | TCELL1:IMUX.CTRL.0 |
CEB2 | input | TCELL0:IMUX.CTRL.3 |
CEC | input | TCELL0:IMUX.CTRL.2 |
CECARRYIN | input | TCELL2:IMUX.IMUX.4 |
CECTRL | input | TCELL4:IMUX.IMUX.23 |
CED | input | TCELL1:IMUX.CTRL.2 |
CEINMODE | input | TCELL0:IMUX.IMUX.30 |
CEM | input | TCELL1:IMUX.CTRL.1 |
CEP | input | TCELL2:IMUX.CTRL.0 |
CLK | input | TCELL1:IMUX.CTRL.4 |
DIN0 | input | TCELL0:IMUX.BYP.0 |
DIN1 | input | TCELL0:IMUX.BYP.3 |
DIN10 | input | TCELL1:IMUX.BYP.4 |
DIN11 | input | TCELL1:IMUX.BYP.6 |
DIN12 | input | TCELL1:IMUX.BYP.8 |
DIN13 | input | TCELL1:IMUX.BYP.9 |
DIN14 | input | TCELL1:IMUX.BYP.11 |
DIN15 | input | TCELL1:IMUX.BYP.13 |
DIN16 | input | TCELL1:IMUX.BYP.15 |
DIN17 | input | TCELL2:IMUX.BYP.1 |
DIN18 | input | TCELL2:IMUX.BYP.3 |
DIN19 | input | TCELL2:IMUX.BYP.5 |
DIN2 | input | TCELL0:IMUX.BYP.4 |
DIN20 | input | TCELL2:IMUX.BYP.8 |
DIN21 | input | TCELL2:IMUX.BYP.10 |
DIN22 | input | TCELL2:IMUX.BYP.12 |
DIN23 | input | TCELL2:IMUX.BYP.14 |
DIN24 | input | TCELL3:IMUX.BYP.0 |
DIN25 | input | TCELL3:IMUX.BYP.2 |
DIN26 | input | TCELL3:IMUX.BYP.4 |
DIN3 | input | TCELL0:IMUX.BYP.6 |
DIN4 | input | TCELL0:IMUX.BYP.8 |
DIN5 | input | TCELL0:IMUX.BYP.10 |
DIN6 | input | TCELL0:IMUX.BYP.12 |
DIN7 | input | TCELL0:IMUX.BYP.14 |
DIN8 | input | TCELL1:IMUX.BYP.0 |
DIN9 | input | TCELL1:IMUX.BYP.2 |
INMODE0 | input | TCELL0:IMUX.IMUX.18 |
INMODE1 | input | TCELL3:IMUX.IMUX.23 |
INMODE2 | input | TCELL1:IMUX.IMUX.18 |
INMODE3 | input | TCELL2:IMUX.IMUX.39 |
INMODE4 | input | TCELL2:IMUX.IMUX.28 |
MSCAN_ENABLE | input | TCELL1:IMUX.BYP.7 |
MSCAN_IN | input | TCELL0:IMUX.BYP.2 |
MSCAN_OUT | output | TCELL2:OUT.10 |
OPMODE0 | input | TCELL0:IMUX.IMUX.17 |
OPMODE1 | input | TCELL0:IMUX.IMUX.27 |
OPMODE2 | input | TCELL0:IMUX.IMUX.42 |
OPMODE3 | input | TCELL1:IMUX.IMUX.17 |
OPMODE4 | input | TCELL2:IMUX.IMUX.17 |
OPMODE5 | input | TCELL2:IMUX.IMUX.43 |
OPMODE6 | input | TCELL2:IMUX.IMUX.14 |
OPMODE7 | input | TCELL3:IMUX.IMUX.17 |
OPMODE8 | input | TCELL3:IMUX.IMUX.31 |
OVERFLOW | output | TCELL1:OUT.10 |
P0 | output | TCELL0:OUT.2 |
P1 | output | TCELL0:OUT.6 |
P10 | output | TCELL1:OUT.12 |
P11 | output | TCELL1:OUT.8 |
P12 | output | TCELL1:OUT.14 |
P13 | output | TCELL1:OUT.24 |
P14 | output | TCELL1:OUT.22 |
P15 | output | TCELL1:OUT.26 |
P16 | output | TCELL2:OUT.2 |
P17 | output | TCELL2:OUT.6 |
P18 | output | TCELL2:OUT.12 |
P19 | output | TCELL2:OUT.8 |
P2 | output | TCELL0:OUT.12 |
P20 | output | TCELL2:OUT.14 |
P21 | output | TCELL2:OUT.24 |
P22 | output | TCELL2:OUT.22 |
P23 | output | TCELL2:OUT.26 |
P24 | output | TCELL3:OUT.2 |
P25 | output | TCELL3:OUT.6 |
P26 | output | TCELL3:OUT.12 |
P27 | output | TCELL3:OUT.8 |
P28 | output | TCELL3:OUT.14 |
P29 | output | TCELL3:OUT.24 |
P3 | output | TCELL0:OUT.8 |
P30 | output | TCELL3:OUT.22 |
P31 | output | TCELL3:OUT.26 |
P32 | output | TCELL4:OUT.2 |
P33 | output | TCELL4:OUT.6 |
P34 | output | TCELL4:OUT.12 |
P35 | output | TCELL4:OUT.8 |
P36 | output | TCELL4:OUT.14 |
P37 | output | TCELL4:OUT.24 |
P38 | output | TCELL4:OUT.22 |
P39 | output | TCELL4:OUT.26 |
P4 | output | TCELL0:OUT.14 |
P40 | output | TCELL0:OUT.0 |
P41 | output | TCELL0:OUT.18 |
P42 | output | TCELL0:OUT.20 |
P43 | output | TCELL0:OUT.30 |
P44 | output | TCELL1:OUT.0 |
P45 | output | TCELL1:OUT.18 |
P46 | output | TCELL1:OUT.20 |
P47 | output | TCELL1:OUT.30 |
P5 | output | TCELL0:OUT.24 |
P6 | output | TCELL0:OUT.22 |
P7 | output | TCELL0:OUT.26 |
P8 | output | TCELL1:OUT.2 |
P9 | output | TCELL1:OUT.6 |
PATTERN_B_DETECT | output | TCELL2:OUT.21 |
PATTERN_DETECT | output | TCELL2:OUT.20 |
RSTA | input | TCELL0:IMUX.CTRL.6 |
RSTALLCARRYIN | input | TCELL2:IMUX.CTRL.6 |
RSTALUMODE | input | TCELL0:IMUX.CTRL.4 |
RSTB | input | TCELL1:IMUX.CTRL.6 |
RSTC | input | TCELL0:IMUX.CTRL.7 |
RSTCTRL | input | TCELL2:IMUX.CTRL.5 |
RSTD | input | TCELL1:IMUX.CTRL.7 |
RSTINMODE | input | TCELL0:IMUX.CTRL.5 |
RSTM | input | TCELL1:IMUX.CTRL.5 |
RSTP | input | TCELL2:IMUX.CTRL.4 |
UNDERFLOW | output | TCELL0:OUT.16 |
XOROUT0 | output | TCELL0:OUT.11 |
XOROUT1 | output | TCELL0:OUT.17 |
XOROUT2 | output | TCELL0:OUT.29 |
XOROUT3 | output | TCELL1:OUT.5 |
XOROUT4 | output | TCELL1:OUT.11 |
XOROUT5 | output | TCELL1:OUT.17 |
XOROUT6 | output | TCELL1:OUT.29 |
XOROUT7 | output | TCELL2:OUT.5 |
ultrascaleplus DSP bel DSP1
Pin | Direction | Wires |
A0 | input | TCELL1:IMUX.IMUX.24 |
A1 | input | TCELL1:IMUX.IMUX.27 |
A10 | input | TCELL2:IMUX.IMUX.30 |
A11 | input | TCELL2:IMUX.IMUX.36 |
A12 | input | TCELL2:IMUX.IMUX.42 |
A13 | input | TCELL2:IMUX.IMUX.47 |
A14 | input | TCELL3:IMUX.IMUX.18 |
A15 | input | TCELL3:IMUX.IMUX.22 |
A16 | input | TCELL3:IMUX.IMUX.24 |
A17 | input | TCELL3:IMUX.IMUX.27 |
A18 | input | TCELL3:IMUX.IMUX.30 |
A19 | input | TCELL3:IMUX.IMUX.36 |
A2 | input | TCELL1:IMUX.IMUX.30 |
A20 | input | TCELL3:IMUX.IMUX.42 |
A21 | input | TCELL3:IMUX.IMUX.47 |
A22 | input | TCELL4:IMUX.IMUX.18 |
A23 | input | TCELL4:IMUX.IMUX.22 |
A24 | input | TCELL4:IMUX.IMUX.24 |
A25 | input | TCELL4:IMUX.IMUX.27 |
A26 | input | TCELL4:IMUX.IMUX.30 |
A27 | input | TCELL4:IMUX.IMUX.36 |
A28 | input | TCELL4:IMUX.IMUX.42 |
A29 | input | TCELL4:IMUX.IMUX.47 |
A3 | input | TCELL1:IMUX.IMUX.36 |
A4 | input | TCELL1:IMUX.IMUX.42 |
A5 | input | TCELL1:IMUX.IMUX.47 |
A6 | input | TCELL2:IMUX.IMUX.18 |
A7 | input | TCELL2:IMUX.IMUX.22 |
A8 | input | TCELL2:IMUX.IMUX.24 |
A9 | input | TCELL2:IMUX.IMUX.27 |
ALUMODE0 | input | TCELL3:IMUX.IMUX.14 |
ALUMODE1 | input | TCELL4:IMUX.IMUX.1 |
ALUMODE2 | input | TCELL4:IMUX.IMUX.26 |
ALUMODE3 | input | TCELL4:IMUX.IMUX.8 |
B0 | input | TCELL2:IMUX.IMUX.32 |
B1 | input | TCELL2:IMUX.IMUX.10 |
B10 | input | TCELL3:IMUX.IMUX.40 |
B11 | input | TCELL3:IMUX.IMUX.44 |
B12 | input | TCELL4:IMUX.IMUX.16 |
B13 | input | TCELL4:IMUX.IMUX.2 |
B14 | input | TCELL4:IMUX.IMUX.4 |
B15 | input | TCELL4:IMUX.IMUX.28 |
B16 | input | TCELL4:IMUX.IMUX.32 |
B17 | input | TCELL4:IMUX.IMUX.10 |
B2 | input | TCELL2:IMUX.IMUX.40 |
B3 | input | TCELL2:IMUX.IMUX.44 |
B4 | input | TCELL3:IMUX.IMUX.16 |
B5 | input | TCELL3:IMUX.IMUX.2 |
B6 | input | TCELL3:IMUX.IMUX.4 |
B7 | input | TCELL3:IMUX.IMUX.28 |
B8 | input | TCELL3:IMUX.IMUX.32 |
B9 | input | TCELL3:IMUX.IMUX.10 |
C0 | input | TCELL0:IMUX.IMUX.20 |
C1 | input | TCELL0:IMUX.IMUX.21 |
C10 | input | TCELL1:IMUX.IMUX.5 |
C11 | input | TCELL1:IMUX.IMUX.29 |
C12 | input | TCELL1:IMUX.IMUX.34 |
C13 | input | TCELL1:IMUX.IMUX.11 |
C14 | input | TCELL1:IMUX.IMUX.41 |
C15 | input | TCELL1:IMUX.IMUX.15 |
C16 | input | TCELL2:IMUX.IMUX.20 |
C17 | input | TCELL2:IMUX.IMUX.21 |
C18 | input | TCELL2:IMUX.IMUX.5 |
C19 | input | TCELL2:IMUX.IMUX.29 |
C2 | input | TCELL0:IMUX.IMUX.5 |
C20 | input | TCELL2:IMUX.IMUX.34 |
C21 | input | TCELL2:IMUX.IMUX.11 |
C22 | input | TCELL2:IMUX.IMUX.41 |
C23 | input | TCELL2:IMUX.IMUX.15 |
C24 | input | TCELL3:IMUX.IMUX.20 |
C25 | input | TCELL3:IMUX.IMUX.21 |
C26 | input | TCELL3:IMUX.IMUX.5 |
C27 | input | TCELL3:IMUX.IMUX.29 |
C28 | input | TCELL3:IMUX.IMUX.34 |
C29 | input | TCELL3:IMUX.IMUX.11 |
C3 | input | TCELL0:IMUX.IMUX.29 |
C30 | input | TCELL3:IMUX.IMUX.41 |
C31 | input | TCELL3:IMUX.IMUX.15 |
C32 | input | TCELL4:IMUX.IMUX.20 |
C33 | input | TCELL4:IMUX.IMUX.21 |
C34 | input | TCELL4:IMUX.IMUX.5 |
C35 | input | TCELL4:IMUX.IMUX.29 |
C36 | input | TCELL4:IMUX.IMUX.34 |
C37 | input | TCELL4:IMUX.IMUX.11 |
C38 | input | TCELL4:IMUX.IMUX.41 |
C39 | input | TCELL4:IMUX.IMUX.15 |
C4 | input | TCELL0:IMUX.IMUX.34 |
C40 | input | TCELL0:IMUX.IMUX.23 |
C41 | input | TCELL0:IMUX.IMUX.8 |
C42 | input | TCELL0:IMUX.IMUX.39 |
C43 | input | TCELL0:IMUX.IMUX.14 |
C44 | input | TCELL1:IMUX.IMUX.23 |
C45 | input | TCELL1:IMUX.IMUX.8 |
C46 | input | TCELL1:IMUX.IMUX.39 |
C47 | input | TCELL1:IMUX.IMUX.14 |
C5 | input | TCELL0:IMUX.IMUX.11 |
C6 | input | TCELL0:IMUX.IMUX.41 |
C7 | input | TCELL0:IMUX.IMUX.15 |
C8 | input | TCELL1:IMUX.IMUX.20 |
C9 | input | TCELL1:IMUX.IMUX.21 |
CARRYIN | input | TCELL2:IMUX.IMUX.8 |
CARRYINSEL0 | input | TCELL4:IMUX.BYP.10 |
CARRYINSEL1 | input | TCELL4:IMUX.BYP.12 |
CARRYINSEL2 | input | TCELL4:IMUX.BYP.14 |
CARRYOUT0 | output | TCELL2:OUT.16 |
CARRYOUT1 | output | TCELL2:OUT.28 |
CARRYOUT2 | output | TCELL4:OUT.10 |
CARRYOUT3 | output | TCELL2:OUT.18 |
CEA1 | input | TCELL3:IMUX.CTRL.3 |
CEA2 | input | TCELL4:IMUX.CTRL.0 |
CEAD | input | TCELL3:IMUX.CTRL.2 |
CEALUMODE | input | TCELL4:IMUX.IMUX.3 |
CEB1 | input | TCELL3:IMUX.CTRL.0 |
CEB2 | input | TCELL4:IMUX.CTRL.1 |
CEC | input | TCELL2:IMUX.CTRL.1 |
CECARRYIN | input | TCELL3:IMUX.IMUX.43 |
CECTRL | input | TCELL4:IMUX.IMUX.14 |
CED | input | TCELL2:IMUX.CTRL.3 |
CEINMODE | input | TCELL4:IMUX.IMUX.31 |
CEM | input | TCELL3:IMUX.CTRL.1 |
CEP | input | TCELL2:IMUX.CTRL.2 |
CLK | input | TCELL3:IMUX.CTRL.4 |
DIN0 | input | TCELL1:IMUX.BYP.10 |
DIN1 | input | TCELL1:IMUX.BYP.12 |
DIN10 | input | TCELL2:IMUX.BYP.15 |
DIN11 | input | TCELL3:IMUX.BYP.1 |
DIN12 | input | TCELL3:IMUX.BYP.3 |
DIN13 | input | TCELL3:IMUX.BYP.5 |
DIN14 | input | TCELL3:IMUX.BYP.7 |
DIN15 | input | TCELL3:IMUX.BYP.9 |
DIN16 | input | TCELL3:IMUX.BYP.11 |
DIN17 | input | TCELL3:IMUX.BYP.13 |
DIN18 | input | TCELL3:IMUX.BYP.15 |
DIN19 | input | TCELL4:IMUX.BYP.1 |
DIN2 | input | TCELL1:IMUX.BYP.14 |
DIN20 | input | TCELL4:IMUX.BYP.3 |
DIN21 | input | TCELL4:IMUX.BYP.5 |
DIN22 | input | TCELL4:IMUX.BYP.7 |
DIN23 | input | TCELL4:IMUX.BYP.9 |
DIN24 | input | TCELL4:IMUX.BYP.11 |
DIN25 | input | TCELL4:IMUX.BYP.13 |
DIN26 | input | TCELL4:IMUX.BYP.15 |
DIN3 | input | TCELL2:IMUX.BYP.0 |
DIN4 | input | TCELL2:IMUX.BYP.2 |
DIN5 | input | TCELL2:IMUX.BYP.4 |
DIN6 | input | TCELL2:IMUX.BYP.7 |
DIN7 | input | TCELL2:IMUX.BYP.9 |
DIN8 | input | TCELL2:IMUX.BYP.11 |
DIN9 | input | TCELL2:IMUX.BYP.13 |
INMODE0 | input | TCELL4:IMUX.IMUX.35 |
INMODE1 | input | TCELL4:IMUX.IMUX.39 |
INMODE2 | input | TCELL4:IMUX.IMUX.13 |
INMODE3 | input | TCELL4:IMUX.IMUX.44 |
INMODE4 | input | TCELL4:IMUX.IMUX.46 |
MSCAN_ENABLE | input | TCELL4:IMUX.BYP.8 |
MSCAN_IN | input | TCELL2:IMUX.BYP.6 |
MSCAN_OUT | output | TCELL4:OUT.30 |
OPMODE0 | input | TCELL3:IMUX.IMUX.8 |
OPMODE1 | input | TCELL3:IMUX.IMUX.9 |
OPMODE2 | input | TCELL3:IMUX.IMUX.39 |
OPMODE3 | input | TCELL3:IMUX.IMUX.13 |
OPMODE4 | input | TCELL3:IMUX.IMUX.46 |
OPMODE5 | input | TCELL4:IMUX.IMUX.17 |
OPMODE6 | input | TCELL4:IMUX.IMUX.7 |
OPMODE7 | input | TCELL4:IMUX.IMUX.9 |
OPMODE8 | input | TCELL4:IMUX.IMUX.40 |
OVERFLOW | output | TCELL3:OUT.16 |
P0 | output | TCELL0:OUT.3 |
P1 | output | TCELL0:OUT.7 |
P10 | output | TCELL1:OUT.13 |
P11 | output | TCELL1:OUT.9 |
P12 | output | TCELL1:OUT.15 |
P13 | output | TCELL1:OUT.25 |
P14 | output | TCELL1:OUT.23 |
P15 | output | TCELL1:OUT.27 |
P16 | output | TCELL2:OUT.3 |
P17 | output | TCELL2:OUT.7 |
P18 | output | TCELL2:OUT.13 |
P19 | output | TCELL2:OUT.9 |
P2 | output | TCELL0:OUT.13 |
P20 | output | TCELL2:OUT.15 |
P21 | output | TCELL2:OUT.25 |
P22 | output | TCELL2:OUT.23 |
P23 | output | TCELL2:OUT.27 |
P24 | output | TCELL3:OUT.3 |
P25 | output | TCELL3:OUT.7 |
P26 | output | TCELL3:OUT.13 |
P27 | output | TCELL3:OUT.9 |
P28 | output | TCELL3:OUT.15 |
P29 | output | TCELL3:OUT.25 |
P3 | output | TCELL0:OUT.9 |
P30 | output | TCELL3:OUT.23 |
P31 | output | TCELL3:OUT.27 |
P32 | output | TCELL4:OUT.3 |
P33 | output | TCELL4:OUT.7 |
P34 | output | TCELL4:OUT.13 |
P35 | output | TCELL4:OUT.9 |
P36 | output | TCELL4:OUT.15 |
P37 | output | TCELL4:OUT.25 |
P38 | output | TCELL4:OUT.23 |
P39 | output | TCELL4:OUT.27 |
P4 | output | TCELL0:OUT.15 |
P40 | output | TCELL0:OUT.1 |
P41 | output | TCELL0:OUT.19 |
P42 | output | TCELL0:OUT.21 |
P43 | output | TCELL0:OUT.31 |
P44 | output | TCELL1:OUT.1 |
P45 | output | TCELL1:OUT.19 |
P46 | output | TCELL1:OUT.21 |
P47 | output | TCELL1:OUT.31 |
P5 | output | TCELL0:OUT.25 |
P6 | output | TCELL0:OUT.23 |
P7 | output | TCELL0:OUT.27 |
P8 | output | TCELL1:OUT.3 |
P9 | output | TCELL1:OUT.7 |
PATTERN_B_DETECT | output | TCELL4:OUT.29 |
PATTERN_DETECT | output | TCELL4:OUT.28 |
RSTA | input | TCELL4:IMUX.CTRL.4 |
RSTALLCARRYIN | input | TCELL4:IMUX.CTRL.7 |
RSTALUMODE | input | TCELL4:IMUX.CTRL.3 |
RSTB | input | TCELL3:IMUX.CTRL.6 |
RSTC | input | TCELL3:IMUX.CTRL.5 |
RSTCTRL | input | TCELL4:IMUX.CTRL.6 |
RSTD | input | TCELL3:IMUX.CTRL.7 |
RSTINMODE | input | TCELL4:IMUX.CTRL.5 |
RSTM | input | TCELL4:IMUX.CTRL.2 |
RSTP | input | TCELL2:IMUX.CTRL.7 |
UNDERFLOW | output | TCELL2:OUT.4 |
XOROUT0 | output | TCELL2:OUT.29 |
XOROUT1 | output | TCELL3:OUT.5 |
XOROUT2 | output | TCELL3:OUT.11 |
XOROUT3 | output | TCELL3:OUT.17 |
XOROUT4 | output | TCELL3:OUT.29 |
XOROUT5 | output | TCELL4:OUT.5 |
XOROUT6 | output | TCELL4:OUT.11 |
XOROUT7 | output | TCELL4:OUT.17 |
ultrascaleplus DSP bel wires
Wire | Pins |
TCELL0:OUT.0 | DSP0.P40 |
TCELL0:OUT.1 | DSP1.P40 |
TCELL0:OUT.2 | DSP0.P0 |
TCELL0:OUT.3 | DSP1.P0 |
TCELL0:OUT.6 | DSP0.P1 |
TCELL0:OUT.7 | DSP1.P1 |
TCELL0:OUT.8 | DSP0.P3 |
TCELL0:OUT.9 | DSP1.P3 |
TCELL0:OUT.11 | DSP0.XOROUT0 |
TCELL0:OUT.12 | DSP0.P2 |
TCELL0:OUT.13 | DSP1.P2 |
TCELL0:OUT.14 | DSP0.P4 |
TCELL0:OUT.15 | DSP1.P4 |
TCELL0:OUT.16 | DSP0.UNDERFLOW |
TCELL0:OUT.17 | DSP0.XOROUT1 |
TCELL0:OUT.18 | DSP0.P41 |
TCELL0:OUT.19 | DSP1.P41 |
TCELL0:OUT.20 | DSP0.P42 |
TCELL0:OUT.21 | DSP1.P42 |
TCELL0:OUT.22 | DSP0.P6 |
TCELL0:OUT.23 | DSP1.P6 |
TCELL0:OUT.24 | DSP0.P5 |
TCELL0:OUT.25 | DSP1.P5 |
TCELL0:OUT.26 | DSP0.P7 |
TCELL0:OUT.27 | DSP1.P7 |
TCELL0:OUT.29 | DSP0.XOROUT2 |
TCELL0:OUT.30 | DSP0.P43 |
TCELL0:OUT.31 | DSP1.P43 |
TCELL0:IMUX.CTRL.0 | DSP0.CEA1 |
TCELL0:IMUX.CTRL.1 | DSP0.CEA2 |
TCELL0:IMUX.CTRL.2 | DSP0.CEC |
TCELL0:IMUX.CTRL.3 | DSP0.CEB2 |
TCELL0:IMUX.CTRL.4 | DSP0.RSTALUMODE |
TCELL0:IMUX.CTRL.5 | DSP0.RSTINMODE |
TCELL0:IMUX.CTRL.6 | DSP0.RSTA |
TCELL0:IMUX.CTRL.7 | DSP0.RSTC |
TCELL0:IMUX.BYP.0 | DSP0.DIN0 |
TCELL0:IMUX.BYP.1 | DSP0.CARRYINSEL0 |
TCELL0:IMUX.BYP.2 | DSP0.MSCAN_IN |
TCELL0:IMUX.BYP.3 | DSP0.DIN1 |
TCELL0:IMUX.BYP.4 | DSP0.DIN2 |
TCELL0:IMUX.BYP.5 | DSP0.CARRYINSEL1 |
TCELL0:IMUX.BYP.6 | DSP0.DIN3 |
TCELL0:IMUX.BYP.8 | DSP0.DIN4 |
TCELL0:IMUX.BYP.9 | DSP0.CARRYINSEL2 |
TCELL0:IMUX.BYP.10 | DSP0.DIN5 |
TCELL0:IMUX.BYP.12 | DSP0.DIN6 |
TCELL0:IMUX.BYP.14 | DSP0.DIN7 |
TCELL0:IMUX.IMUX.0 | DSP0.C0 |
TCELL0:IMUX.IMUX.1 | DSP0.A0 |
TCELL0:IMUX.IMUX.2 | DSP0.B1 |
TCELL0:IMUX.IMUX.3 | DSP0.A1 |
TCELL0:IMUX.IMUX.4 | DSP0.B2 |
TCELL0:IMUX.IMUX.5 | DSP1.C2 |
TCELL0:IMUX.IMUX.6 | DSP0.C3 |
TCELL0:IMUX.IMUX.7 | DSP0.A3 |
TCELL0:IMUX.IMUX.8 | DSP1.C41 |
TCELL0:IMUX.IMUX.9 | DSP0.C42 |
TCELL0:IMUX.IMUX.10 | DSP0.B5 |
TCELL0:IMUX.IMUX.11 | DSP1.C5 |
TCELL0:IMUX.IMUX.12 | DSP0.C6 |
TCELL0:IMUX.IMUX.13 | DSP0.A6 |
TCELL0:IMUX.IMUX.14 | DSP1.C43 |
TCELL0:IMUX.IMUX.15 | DSP1.C7 |
TCELL0:IMUX.IMUX.16 | DSP0.B0 |
TCELL0:IMUX.IMUX.17 | DSP0.OPMODE0 |
TCELL0:IMUX.IMUX.18 | DSP0.INMODE0 |
TCELL0:IMUX.IMUX.19 | DSP0.C1 |
TCELL0:IMUX.IMUX.20 | DSP1.C0 |
TCELL0:IMUX.IMUX.21 | DSP1.C1 |
TCELL0:IMUX.IMUX.22 | DSP0.C40 |
TCELL0:IMUX.IMUX.23 | DSP1.C40 |
TCELL0:IMUX.IMUX.24 | DSP0.ALUMODE1 |
TCELL0:IMUX.IMUX.25 | DSP0.C2 |
TCELL0:IMUX.IMUX.26 | DSP0.A2 |
TCELL0:IMUX.IMUX.27 | DSP0.OPMODE1 |
TCELL0:IMUX.IMUX.28 | DSP0.B3 |
TCELL0:IMUX.IMUX.29 | DSP1.C3 |
TCELL0:IMUX.IMUX.30 | DSP0.CEINMODE |
TCELL0:IMUX.IMUX.31 | DSP0.C41 |
TCELL0:IMUX.IMUX.32 | DSP0.B4 |
TCELL0:IMUX.IMUX.33 | DSP0.C4 |
TCELL0:IMUX.IMUX.34 | DSP1.C4 |
TCELL0:IMUX.IMUX.35 | DSP0.A4 |
TCELL0:IMUX.IMUX.36 | DSP0.ALUMODE2 |
TCELL0:IMUX.IMUX.37 | DSP0.C5 |
TCELL0:IMUX.IMUX.38 | DSP0.A5 |
TCELL0:IMUX.IMUX.39 | DSP1.C42 |
TCELL0:IMUX.IMUX.40 | DSP0.B6 |
TCELL0:IMUX.IMUX.41 | DSP1.C6 |
TCELL0:IMUX.IMUX.42 | DSP0.OPMODE2 |
TCELL0:IMUX.IMUX.43 | DSP0.C43 |
TCELL0:IMUX.IMUX.44 | DSP0.B7 |
TCELL0:IMUX.IMUX.45 | DSP0.C7 |
TCELL0:IMUX.IMUX.46 | DSP0.A7 |
TCELL0:IMUX.IMUX.47 | DSP0.CEALUMODE |
TCELL1:OUT.0 | DSP0.P44 |
TCELL1:OUT.1 | DSP1.P44 |
TCELL1:OUT.2 | DSP0.P8 |
TCELL1:OUT.3 | DSP1.P8 |
TCELL1:OUT.5 | DSP0.XOROUT3 |
TCELL1:OUT.6 | DSP0.P9 |
TCELL1:OUT.7 | DSP1.P9 |
TCELL1:OUT.8 | DSP0.P11 |
TCELL1:OUT.9 | DSP1.P11 |
TCELL1:OUT.10 | DSP0.OVERFLOW |
TCELL1:OUT.11 | DSP0.XOROUT4 |
TCELL1:OUT.12 | DSP0.P10 |
TCELL1:OUT.13 | DSP1.P10 |
TCELL1:OUT.14 | DSP0.P12 |
TCELL1:OUT.15 | DSP1.P12 |
TCELL1:OUT.16 | DSP0.CARRYOUT0 |
TCELL1:OUT.17 | DSP0.XOROUT5 |
TCELL1:OUT.18 | DSP0.P45 |
TCELL1:OUT.19 | DSP1.P45 |
TCELL1:OUT.20 | DSP0.P46 |
TCELL1:OUT.21 | DSP1.P46 |
TCELL1:OUT.22 | DSP0.P14 |
TCELL1:OUT.23 | DSP1.P14 |
TCELL1:OUT.24 | DSP0.P13 |
TCELL1:OUT.25 | DSP1.P13 |
TCELL1:OUT.26 | DSP0.P15 |
TCELL1:OUT.27 | DSP1.P15 |
TCELL1:OUT.29 | DSP0.XOROUT6 |
TCELL1:OUT.30 | DSP0.P47 |
TCELL1:OUT.31 | DSP1.P47 |
TCELL1:IMUX.CTRL.0 | DSP0.CEB1 |
TCELL1:IMUX.CTRL.1 | DSP0.CEM |
TCELL1:IMUX.CTRL.2 | DSP0.CED |
TCELL1:IMUX.CTRL.3 | DSP0.CEAD |
TCELL1:IMUX.CTRL.4 | DSP0.CLK |
TCELL1:IMUX.CTRL.5 | DSP0.RSTM |
TCELL1:IMUX.CTRL.6 | DSP0.RSTB |
TCELL1:IMUX.CTRL.7 | DSP0.RSTD |
TCELL1:IMUX.BYP.0 | DSP0.DIN8 |
TCELL1:IMUX.BYP.2 | DSP0.DIN9 |
TCELL1:IMUX.BYP.4 | DSP0.DIN10 |
TCELL1:IMUX.BYP.6 | DSP0.DIN11 |
TCELL1:IMUX.BYP.7 | DSP0.MSCAN_ENABLE |
TCELL1:IMUX.BYP.8 | DSP0.DIN12 |
TCELL1:IMUX.BYP.9 | DSP0.DIN13 |
TCELL1:IMUX.BYP.10 | DSP1.DIN0 |
TCELL1:IMUX.BYP.11 | DSP0.DIN14 |
TCELL1:IMUX.BYP.12 | DSP1.DIN1 |
TCELL1:IMUX.BYP.13 | DSP0.DIN15 |
TCELL1:IMUX.BYP.14 | DSP1.DIN2 |
TCELL1:IMUX.BYP.15 | DSP0.DIN16 |
TCELL1:IMUX.IMUX.0 | DSP0.C8 |
TCELL1:IMUX.IMUX.1 | DSP0.A8 |
TCELL1:IMUX.IMUX.2 | DSP0.B9 |
TCELL1:IMUX.IMUX.3 | DSP0.A9 |
TCELL1:IMUX.IMUX.4 | DSP0.B10 |
TCELL1:IMUX.IMUX.5 | DSP1.C10 |
TCELL1:IMUX.IMUX.6 | DSP0.C11 |
TCELL1:IMUX.IMUX.7 | DSP0.A11 |
TCELL1:IMUX.IMUX.8 | DSP1.C45 |
TCELL1:IMUX.IMUX.9 | DSP0.C46 |
TCELL1:IMUX.IMUX.10 | DSP0.B13 |
TCELL1:IMUX.IMUX.11 | DSP1.C13 |
TCELL1:IMUX.IMUX.12 | DSP0.C14 |
TCELL1:IMUX.IMUX.13 | DSP0.A14 |
TCELL1:IMUX.IMUX.14 | DSP1.C47 |
TCELL1:IMUX.IMUX.15 | DSP1.C15 |
TCELL1:IMUX.IMUX.16 | DSP0.B8 |
TCELL1:IMUX.IMUX.17 | DSP0.OPMODE3 |
TCELL1:IMUX.IMUX.18 | DSP0.INMODE2 |
TCELL1:IMUX.IMUX.19 | DSP0.C9 |
TCELL1:IMUX.IMUX.20 | DSP1.C8 |
TCELL1:IMUX.IMUX.21 | DSP1.C9 |
TCELL1:IMUX.IMUX.22 | DSP0.C44 |
TCELL1:IMUX.IMUX.23 | DSP1.C44 |
TCELL1:IMUX.IMUX.24 | DSP1.A0 |
TCELL1:IMUX.IMUX.25 | DSP0.C10 |
TCELL1:IMUX.IMUX.26 | DSP0.A10 |
TCELL1:IMUX.IMUX.27 | DSP1.A1 |
TCELL1:IMUX.IMUX.28 | DSP0.B11 |
TCELL1:IMUX.IMUX.29 | DSP1.C11 |
TCELL1:IMUX.IMUX.30 | DSP1.A2 |
TCELL1:IMUX.IMUX.31 | DSP0.C45 |
TCELL1:IMUX.IMUX.32 | DSP0.B12 |
TCELL1:IMUX.IMUX.33 | DSP0.C12 |
TCELL1:IMUX.IMUX.34 | DSP1.C12 |
TCELL1:IMUX.IMUX.35 | DSP0.A12 |
TCELL1:IMUX.IMUX.36 | DSP1.A3 |
TCELL1:IMUX.IMUX.37 | DSP0.C13 |
TCELL1:IMUX.IMUX.38 | DSP0.A13 |
TCELL1:IMUX.IMUX.39 | DSP1.C46 |
TCELL1:IMUX.IMUX.40 | DSP0.B14 |
TCELL1:IMUX.IMUX.41 | DSP1.C14 |
TCELL1:IMUX.IMUX.42 | DSP1.A4 |
TCELL1:IMUX.IMUX.43 | DSP0.C47 |
TCELL1:IMUX.IMUX.44 | DSP0.B15 |
TCELL1:IMUX.IMUX.45 | DSP0.C15 |
TCELL1:IMUX.IMUX.46 | DSP0.A15 |
TCELL1:IMUX.IMUX.47 | DSP1.A5 |
TCELL2:OUT.2 | DSP0.P16 |
TCELL2:OUT.3 | DSP1.P16 |
TCELL2:OUT.4 | DSP1.UNDERFLOW |
TCELL2:OUT.5 | DSP0.XOROUT7 |
TCELL2:OUT.6 | DSP0.P17 |
TCELL2:OUT.7 | DSP1.P17 |
TCELL2:OUT.8 | DSP0.P19 |
TCELL2:OUT.9 | DSP1.P19 |
TCELL2:OUT.10 | DSP0.MSCAN_OUT |
TCELL2:OUT.11 | DSP0.CARRYOUT3 |
TCELL2:OUT.12 | DSP0.P18 |
TCELL2:OUT.13 | DSP1.P18 |
TCELL2:OUT.14 | DSP0.P20 |
TCELL2:OUT.15 | DSP1.P20 |
TCELL2:OUT.16 | DSP1.CARRYOUT0 |
TCELL2:OUT.18 | DSP1.CARRYOUT3 |
TCELL2:OUT.20 | DSP0.PATTERN_DETECT |
TCELL2:OUT.21 | DSP0.PATTERN_B_DETECT |
TCELL2:OUT.22 | DSP0.P22 |
TCELL2:OUT.23 | DSP1.P22 |
TCELL2:OUT.24 | DSP0.P21 |
TCELL2:OUT.25 | DSP1.P21 |
TCELL2:OUT.26 | DSP0.P23 |
TCELL2:OUT.27 | DSP1.P23 |
TCELL2:OUT.28 | DSP1.CARRYOUT1 |
TCELL2:OUT.29 | DSP1.XOROUT0 |
TCELL2:IMUX.CTRL.0 | DSP0.CEP |
TCELL2:IMUX.CTRL.1 | DSP1.CEC |
TCELL2:IMUX.CTRL.2 | DSP1.CEP |
TCELL2:IMUX.CTRL.3 | DSP1.CED |
TCELL2:IMUX.CTRL.4 | DSP0.RSTP |
TCELL2:IMUX.CTRL.5 | DSP0.RSTCTRL |
TCELL2:IMUX.CTRL.6 | DSP0.RSTALLCARRYIN |
TCELL2:IMUX.CTRL.7 | DSP1.RSTP |
TCELL2:IMUX.BYP.0 | DSP1.DIN3 |
TCELL2:IMUX.BYP.1 | DSP0.DIN17 |
TCELL2:IMUX.BYP.2 | DSP1.DIN4 |
TCELL2:IMUX.BYP.3 | DSP0.DIN18 |
TCELL2:IMUX.BYP.4 | DSP1.DIN5 |
TCELL2:IMUX.BYP.5 | DSP0.DIN19 |
TCELL2:IMUX.BYP.6 | DSP1.MSCAN_IN |
TCELL2:IMUX.BYP.7 | DSP1.DIN6 |
TCELL2:IMUX.BYP.8 | DSP0.DIN20 |
TCELL2:IMUX.BYP.9 | DSP1.DIN7 |
TCELL2:IMUX.BYP.10 | DSP0.DIN21 |
TCELL2:IMUX.BYP.11 | DSP1.DIN8 |
TCELL2:IMUX.BYP.12 | DSP0.DIN22 |
TCELL2:IMUX.BYP.13 | DSP1.DIN9 |
TCELL2:IMUX.BYP.14 | DSP0.DIN23 |
TCELL2:IMUX.BYP.15 | DSP1.DIN10 |
TCELL2:IMUX.IMUX.0 | DSP0.C16 |
TCELL2:IMUX.IMUX.1 | DSP0.A16 |
TCELL2:IMUX.IMUX.2 | DSP0.B17 |
TCELL2:IMUX.IMUX.3 | DSP0.A17 |
TCELL2:IMUX.IMUX.4 | DSP0.CECARRYIN |
TCELL2:IMUX.IMUX.5 | DSP1.C18 |
TCELL2:IMUX.IMUX.6 | DSP0.C19 |
TCELL2:IMUX.IMUX.7 | DSP0.A19 |
TCELL2:IMUX.IMUX.8 | DSP1.CARRYIN |
TCELL2:IMUX.IMUX.9 | DSP0.ALUMODE3 |
TCELL2:IMUX.IMUX.10 | DSP1.B1 |
TCELL2:IMUX.IMUX.11 | DSP1.C21 |
TCELL2:IMUX.IMUX.12 | DSP0.C22 |
TCELL2:IMUX.IMUX.13 | DSP0.A22 |
TCELL2:IMUX.IMUX.14 | DSP0.OPMODE6 |
TCELL2:IMUX.IMUX.15 | DSP1.C23 |
TCELL2:IMUX.IMUX.16 | DSP0.B16 |
TCELL2:IMUX.IMUX.17 | DSP0.OPMODE4 |
TCELL2:IMUX.IMUX.18 | DSP1.A6 |
TCELL2:IMUX.IMUX.19 | DSP0.C17 |
TCELL2:IMUX.IMUX.20 | DSP1.C16 |
TCELL2:IMUX.IMUX.21 | DSP1.C17 |
TCELL2:IMUX.IMUX.22 | DSP1.A7 |
TCELL2:IMUX.IMUX.23 | DSP0.ALUMODE0 |
TCELL2:IMUX.IMUX.24 | DSP1.A8 |
TCELL2:IMUX.IMUX.25 | DSP0.C18 |
TCELL2:IMUX.IMUX.26 | DSP0.A18 |
TCELL2:IMUX.IMUX.27 | DSP1.A9 |
TCELL2:IMUX.IMUX.28 | DSP0.INMODE4 |
TCELL2:IMUX.IMUX.29 | DSP1.C19 |
TCELL2:IMUX.IMUX.30 | DSP1.A10 |
TCELL2:IMUX.IMUX.31 | DSP0.CARRYIN |
TCELL2:IMUX.IMUX.32 | DSP1.B0 |
TCELL2:IMUX.IMUX.33 | DSP0.C20 |
TCELL2:IMUX.IMUX.34 | DSP1.C20 |
TCELL2:IMUX.IMUX.35 | DSP0.A20 |
TCELL2:IMUX.IMUX.36 | DSP1.A11 |
TCELL2:IMUX.IMUX.37 | DSP0.C21 |
TCELL2:IMUX.IMUX.38 | DSP0.A21 |
TCELL2:IMUX.IMUX.39 | DSP0.INMODE3 |
TCELL2:IMUX.IMUX.40 | DSP1.B2 |
TCELL2:IMUX.IMUX.41 | DSP1.C22 |
TCELL2:IMUX.IMUX.42 | DSP1.A12 |
TCELL2:IMUX.IMUX.43 | DSP0.OPMODE5 |
TCELL2:IMUX.IMUX.44 | DSP1.B3 |
TCELL2:IMUX.IMUX.45 | DSP0.C23 |
TCELL2:IMUX.IMUX.46 | DSP0.A23 |
TCELL2:IMUX.IMUX.47 | DSP1.A13 |
TCELL3:OUT.2 | DSP0.P24 |
TCELL3:OUT.3 | DSP1.P24 |
TCELL3:OUT.4 | DSP0.CARRYOUT1 |
TCELL3:OUT.5 | DSP1.XOROUT1 |
TCELL3:OUT.6 | DSP0.P25 |
TCELL3:OUT.7 | DSP1.P25 |
TCELL3:OUT.8 | DSP0.P27 |
TCELL3:OUT.9 | DSP1.P27 |
TCELL3:OUT.11 | DSP1.XOROUT2 |
TCELL3:OUT.12 | DSP0.P26 |
TCELL3:OUT.13 | DSP1.P26 |
TCELL3:OUT.14 | DSP0.P28 |
TCELL3:OUT.15 | DSP1.P28 |
TCELL3:OUT.16 | DSP1.OVERFLOW |
TCELL3:OUT.17 | DSP1.XOROUT3 |
TCELL3:OUT.22 | DSP0.P30 |
TCELL3:OUT.23 | DSP1.P30 |
TCELL3:OUT.24 | DSP0.P29 |
TCELL3:OUT.25 | DSP1.P29 |
TCELL3:OUT.26 | DSP0.P31 |
TCELL3:OUT.27 | DSP1.P31 |
TCELL3:OUT.29 | DSP1.XOROUT4 |
TCELL3:IMUX.CTRL.0 | DSP1.CEB1 |
TCELL3:IMUX.CTRL.1 | DSP1.CEM |
TCELL3:IMUX.CTRL.2 | DSP1.CEAD |
TCELL3:IMUX.CTRL.3 | DSP1.CEA1 |
TCELL3:IMUX.CTRL.4 | DSP1.CLK |
TCELL3:IMUX.CTRL.5 | DSP1.RSTC |
TCELL3:IMUX.CTRL.6 | DSP1.RSTB |
TCELL3:IMUX.CTRL.7 | DSP1.RSTD |
TCELL3:IMUX.BYP.0 | DSP0.DIN24 |
TCELL3:IMUX.BYP.1 | DSP1.DIN11 |
TCELL3:IMUX.BYP.2 | DSP0.DIN25 |
TCELL3:IMUX.BYP.3 | DSP1.DIN12 |
TCELL3:IMUX.BYP.4 | DSP0.DIN26 |
TCELL3:IMUX.BYP.5 | DSP1.DIN13 |
TCELL3:IMUX.BYP.7 | DSP1.DIN14 |
TCELL3:IMUX.BYP.9 | DSP1.DIN15 |
TCELL3:IMUX.BYP.11 | DSP1.DIN16 |
TCELL3:IMUX.BYP.13 | DSP1.DIN17 |
TCELL3:IMUX.BYP.15 | DSP1.DIN18 |
TCELL3:IMUX.IMUX.0 | DSP0.C24 |
TCELL3:IMUX.IMUX.1 | DSP0.A24 |
TCELL3:IMUX.IMUX.2 | DSP1.B5 |
TCELL3:IMUX.IMUX.3 | DSP0.A25 |
TCELL3:IMUX.IMUX.4 | DSP1.B6 |
TCELL3:IMUX.IMUX.5 | DSP1.C26 |
TCELL3:IMUX.IMUX.6 | DSP0.C27 |
TCELL3:IMUX.IMUX.7 | DSP0.A27 |
TCELL3:IMUX.IMUX.8 | DSP1.OPMODE0 |
TCELL3:IMUX.IMUX.9 | DSP1.OPMODE1 |
TCELL3:IMUX.IMUX.10 | DSP1.B9 |
TCELL3:IMUX.IMUX.11 | DSP1.C29 |
TCELL3:IMUX.IMUX.12 | DSP0.C30 |
TCELL3:IMUX.IMUX.13 | DSP1.OPMODE3 |
TCELL3:IMUX.IMUX.14 | DSP1.ALUMODE0 |
TCELL3:IMUX.IMUX.15 | DSP1.C31 |
TCELL3:IMUX.IMUX.16 | DSP1.B4 |
TCELL3:IMUX.IMUX.17 | DSP0.OPMODE7 |
TCELL3:IMUX.IMUX.18 | DSP1.A14 |
TCELL3:IMUX.IMUX.19 | DSP0.C25 |
TCELL3:IMUX.IMUX.20 | DSP1.C24 |
TCELL3:IMUX.IMUX.21 | DSP1.C25 |
TCELL3:IMUX.IMUX.22 | DSP1.A15 |
TCELL3:IMUX.IMUX.23 | DSP0.INMODE1 |
TCELL3:IMUX.IMUX.24 | DSP1.A16 |
TCELL3:IMUX.IMUX.25 | DSP0.C26 |
TCELL3:IMUX.IMUX.26 | DSP0.A26 |
TCELL3:IMUX.IMUX.27 | DSP1.A17 |
TCELL3:IMUX.IMUX.28 | DSP1.B7 |
TCELL3:IMUX.IMUX.29 | DSP1.C27 |
TCELL3:IMUX.IMUX.30 | DSP1.A18 |
TCELL3:IMUX.IMUX.31 | DSP0.OPMODE8 |
TCELL3:IMUX.IMUX.32 | DSP1.B8 |
TCELL3:IMUX.IMUX.33 | DSP0.C28 |
TCELL3:IMUX.IMUX.34 | DSP1.C28 |
TCELL3:IMUX.IMUX.35 | DSP0.A28 |
TCELL3:IMUX.IMUX.36 | DSP1.A19 |
TCELL3:IMUX.IMUX.37 | DSP0.C29 |
TCELL3:IMUX.IMUX.38 | DSP0.A29 |
TCELL3:IMUX.IMUX.39 | DSP1.OPMODE2 |
TCELL3:IMUX.IMUX.40 | DSP1.B10 |
TCELL3:IMUX.IMUX.41 | DSP1.C30 |
TCELL3:IMUX.IMUX.42 | DSP1.A20 |
TCELL3:IMUX.IMUX.43 | DSP1.CECARRYIN |
TCELL3:IMUX.IMUX.44 | DSP1.B11 |
TCELL3:IMUX.IMUX.45 | DSP0.C31 |
TCELL3:IMUX.IMUX.46 | DSP1.OPMODE4 |
TCELL3:IMUX.IMUX.47 | DSP1.A21 |
TCELL4:OUT.2 | DSP0.P32 |
TCELL4:OUT.3 | DSP1.P32 |
TCELL4:OUT.5 | DSP1.XOROUT5 |
TCELL4:OUT.6 | DSP0.P33 |
TCELL4:OUT.7 | DSP1.P33 |
TCELL4:OUT.8 | DSP0.P35 |
TCELL4:OUT.9 | DSP1.P35 |
TCELL4:OUT.10 | DSP1.CARRYOUT2 |
TCELL4:OUT.11 | DSP1.XOROUT6 |
TCELL4:OUT.12 | DSP0.P34 |
TCELL4:OUT.13 | DSP1.P34 |
TCELL4:OUT.14 | DSP0.P36 |
TCELL4:OUT.15 | DSP1.P36 |
TCELL4:OUT.16 | DSP0.CARRYOUT2 |
TCELL4:OUT.17 | DSP1.XOROUT7 |
TCELL4:OUT.22 | DSP0.P38 |
TCELL4:OUT.23 | DSP1.P38 |
TCELL4:OUT.24 | DSP0.P37 |
TCELL4:OUT.25 | DSP1.P37 |
TCELL4:OUT.26 | DSP0.P39 |
TCELL4:OUT.27 | DSP1.P39 |
TCELL4:OUT.28 | DSP1.PATTERN_DETECT |
TCELL4:OUT.29 | DSP1.PATTERN_B_DETECT |
TCELL4:OUT.30 | DSP1.MSCAN_OUT |
TCELL4:IMUX.CTRL.0 | DSP1.CEA2 |
TCELL4:IMUX.CTRL.1 | DSP1.CEB2 |
TCELL4:IMUX.CTRL.2 | DSP1.RSTM |
TCELL4:IMUX.CTRL.3 | DSP1.RSTALUMODE |
TCELL4:IMUX.CTRL.4 | DSP1.RSTA |
TCELL4:IMUX.CTRL.5 | DSP1.RSTINMODE |
TCELL4:IMUX.CTRL.6 | DSP1.RSTCTRL |
TCELL4:IMUX.CTRL.7 | DSP1.RSTALLCARRYIN |
TCELL4:IMUX.BYP.1 | DSP1.DIN19 |
TCELL4:IMUX.BYP.3 | DSP1.DIN20 |
TCELL4:IMUX.BYP.5 | DSP1.DIN21 |
TCELL4:IMUX.BYP.7 | DSP1.DIN22 |
TCELL4:IMUX.BYP.8 | DSP1.MSCAN_ENABLE |
TCELL4:IMUX.BYP.9 | DSP1.DIN23 |
TCELL4:IMUX.BYP.10 | DSP1.CARRYINSEL0 |
TCELL4:IMUX.BYP.11 | DSP1.DIN24 |
TCELL4:IMUX.BYP.12 | DSP1.CARRYINSEL1 |
TCELL4:IMUX.BYP.13 | DSP1.DIN25 |
TCELL4:IMUX.BYP.14 | DSP1.CARRYINSEL2 |
TCELL4:IMUX.BYP.15 | DSP1.DIN26 |
TCELL4:IMUX.IMUX.0 | DSP0.C32 |
TCELL4:IMUX.IMUX.1 | DSP1.ALUMODE1 |
TCELL4:IMUX.IMUX.2 | DSP1.B13 |
TCELL4:IMUX.IMUX.3 | DSP1.CEALUMODE |
TCELL4:IMUX.IMUX.4 | DSP1.B14 |
TCELL4:IMUX.IMUX.5 | DSP1.C34 |
TCELL4:IMUX.IMUX.6 | DSP0.C35 |
TCELL4:IMUX.IMUX.7 | DSP1.OPMODE6 |
TCELL4:IMUX.IMUX.8 | DSP1.ALUMODE3 |
TCELL4:IMUX.IMUX.9 | DSP1.OPMODE7 |
TCELL4:IMUX.IMUX.10 | DSP1.B17 |
TCELL4:IMUX.IMUX.11 | DSP1.C37 |
TCELL4:IMUX.IMUX.12 | DSP0.C38 |
TCELL4:IMUX.IMUX.13 | DSP1.INMODE2 |
TCELL4:IMUX.IMUX.14 | DSP1.CECTRL |
TCELL4:IMUX.IMUX.15 | DSP1.C39 |
TCELL4:IMUX.IMUX.16 | DSP1.B12 |
TCELL4:IMUX.IMUX.17 | DSP1.OPMODE5 |
TCELL4:IMUX.IMUX.18 | DSP1.A22 |
TCELL4:IMUX.IMUX.19 | DSP0.C33 |
TCELL4:IMUX.IMUX.20 | DSP1.C32 |
TCELL4:IMUX.IMUX.21 | DSP1.C33 |
TCELL4:IMUX.IMUX.22 | DSP1.A23 |
TCELL4:IMUX.IMUX.23 | DSP0.CECTRL |
TCELL4:IMUX.IMUX.24 | DSP1.A24 |
TCELL4:IMUX.IMUX.25 | DSP0.C34 |
TCELL4:IMUX.IMUX.26 | DSP1.ALUMODE2 |
TCELL4:IMUX.IMUX.27 | DSP1.A25 |
TCELL4:IMUX.IMUX.28 | DSP1.B15 |
TCELL4:IMUX.IMUX.29 | DSP1.C35 |
TCELL4:IMUX.IMUX.30 | DSP1.A26 |
TCELL4:IMUX.IMUX.31 | DSP1.CEINMODE |
TCELL4:IMUX.IMUX.32 | DSP1.B16 |
TCELL4:IMUX.IMUX.33 | DSP0.C36 |
TCELL4:IMUX.IMUX.34 | DSP1.C36 |
TCELL4:IMUX.IMUX.35 | DSP1.INMODE0 |
TCELL4:IMUX.IMUX.36 | DSP1.A27 |
TCELL4:IMUX.IMUX.37 | DSP0.C37 |
TCELL4:IMUX.IMUX.39 | DSP1.INMODE1 |
TCELL4:IMUX.IMUX.40 | DSP1.OPMODE8 |
TCELL4:IMUX.IMUX.41 | DSP1.C38 |
TCELL4:IMUX.IMUX.42 | DSP1.A28 |
TCELL4:IMUX.IMUX.44 | DSP1.INMODE3 |
TCELL4:IMUX.IMUX.45 | DSP0.C39 |
TCELL4:IMUX.IMUX.46 | DSP1.INMODE4 |
TCELL4:IMUX.IMUX.47 | DSP1.A29 |