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Ultra RAM

Tile URAM

Cells: 30 IRIs: 0

Bel URAM0

ultrascaleplus URAM bel URAM0
PinDirectionWires
ADDR_A0inputTCELL0:IMUX.IMUX.8
ADDR_A1inputTCELL0:IMUX.IMUX.32
ADDR_A10inputTCELL0:IMUX.IMUX.13
ADDR_A11inputTCELL0:IMUX.IMUX.42
ADDR_A12inputTCELL1:IMUX.IMUX.12
ADDR_A13inputTCELL1:IMUX.IMUX.40
ADDR_A14inputTCELL1:IMUX.IMUX.13
ADDR_A15inputTCELL1:IMUX.IMUX.42
ADDR_A16inputTCELL1:IMUX.IMUX.14
ADDR_A17inputTCELL1:IMUX.IMUX.44
ADDR_A18inputTCELL1:IMUX.IMUX.47
ADDR_A19inputTCELL1:IMUX.IMUX.46
ADDR_A2inputTCELL0:IMUX.IMUX.9
ADDR_A20inputTCELL2:IMUX.IMUX.0
ADDR_A21inputTCELL2:IMUX.IMUX.16
ADDR_A22inputTCELL2:IMUX.IMUX.1
ADDR_A3inputTCELL0:IMUX.IMUX.34
ADDR_A4inputTCELL0:IMUX.IMUX.10
ADDR_A5inputTCELL0:IMUX.IMUX.36
ADDR_A6inputTCELL0:IMUX.IMUX.39
ADDR_A7inputTCELL0:IMUX.IMUX.38
ADDR_A8inputTCELL0:IMUX.IMUX.12
ADDR_A9inputTCELL0:IMUX.IMUX.40
ADDR_B0inputTCELL15:IMUX.IMUX.8
ADDR_B1inputTCELL15:IMUX.IMUX.32
ADDR_B10inputTCELL15:IMUX.IMUX.13
ADDR_B11inputTCELL15:IMUX.IMUX.42
ADDR_B12inputTCELL16:IMUX.IMUX.12
ADDR_B13inputTCELL16:IMUX.IMUX.40
ADDR_B14inputTCELL16:IMUX.IMUX.13
ADDR_B15inputTCELL16:IMUX.IMUX.42
ADDR_B16inputTCELL16:IMUX.IMUX.14
ADDR_B17inputTCELL16:IMUX.IMUX.44
ADDR_B18inputTCELL16:IMUX.IMUX.47
ADDR_B19inputTCELL16:IMUX.IMUX.46
ADDR_B2inputTCELL15:IMUX.IMUX.9
ADDR_B20inputTCELL17:IMUX.IMUX.0
ADDR_B21inputTCELL17:IMUX.IMUX.16
ADDR_B22inputTCELL17:IMUX.IMUX.1
ADDR_B3inputTCELL15:IMUX.IMUX.34
ADDR_B4inputTCELL15:IMUX.IMUX.10
ADDR_B5inputTCELL15:IMUX.IMUX.36
ADDR_B6inputTCELL15:IMUX.IMUX.39
ADDR_B7inputTCELL15:IMUX.IMUX.38
ADDR_B8inputTCELL15:IMUX.IMUX.12
ADDR_B9inputTCELL15:IMUX.IMUX.40
BWE_A0inputTCELL2:IMUX.IMUX.10
BWE_A1inputTCELL2:IMUX.IMUX.36
BWE_A2inputTCELL2:IMUX.IMUX.39
BWE_A3inputTCELL2:IMUX.IMUX.38
BWE_A4inputTCELL2:IMUX.IMUX.12
BWE_A5inputTCELL2:IMUX.IMUX.40
BWE_A6inputTCELL2:IMUX.IMUX.13
BWE_A7inputTCELL2:IMUX.IMUX.42
BWE_A8inputTCELL2:IMUX.IMUX.14
BWE_B0inputTCELL17:IMUX.IMUX.10
BWE_B1inputTCELL17:IMUX.IMUX.36
BWE_B2inputTCELL17:IMUX.IMUX.39
BWE_B3inputTCELL17:IMUX.IMUX.38
BWE_B4inputTCELL17:IMUX.IMUX.12
BWE_B5inputTCELL17:IMUX.IMUX.40
BWE_B6inputTCELL17:IMUX.IMUX.13
BWE_B7inputTCELL17:IMUX.IMUX.42
BWE_B8inputTCELL17:IMUX.IMUX.14
CLKinputTCELL2:IMUX.CTRL.4
DBITERR_AoutputTCELL0:OUT.23
DBITERR_BoutputTCELL15:OUT.23
DEEPSLEEPinputTCELL1:IMUX.CTRL.0
DIN_A0inputTCELL0:IMUX.IMUX.0
DIN_A1inputTCELL0:IMUX.IMUX.16
DIN_A10inputTCELL0:IMUX.IMUX.5
DIN_A11inputTCELL0:IMUX.IMUX.26
DIN_A12inputTCELL0:IMUX.IMUX.6
DIN_A13inputTCELL0:IMUX.IMUX.28
DIN_A14inputTCELL0:IMUX.IMUX.31
DIN_A15inputTCELL0:IMUX.IMUX.30
DIN_A16inputTCELL0:IMUX.IMUX.14
DIN_A17inputTCELL0:IMUX.IMUX.44
DIN_A18inputTCELL1:IMUX.IMUX.0
DIN_A19inputTCELL1:IMUX.IMUX.16
DIN_A2inputTCELL0:IMUX.IMUX.1
DIN_A20inputTCELL1:IMUX.IMUX.1
DIN_A21inputTCELL1:IMUX.IMUX.18
DIN_A22inputTCELL1:IMUX.IMUX.2
DIN_A23inputTCELL1:IMUX.IMUX.20
DIN_A24inputTCELL1:IMUX.IMUX.23
DIN_A25inputTCELL1:IMUX.IMUX.22
DIN_A26inputTCELL1:IMUX.IMUX.4
DIN_A27inputTCELL1:IMUX.IMUX.24
DIN_A28inputTCELL1:IMUX.IMUX.5
DIN_A29inputTCELL1:IMUX.IMUX.26
DIN_A3inputTCELL0:IMUX.IMUX.18
DIN_A30inputTCELL1:IMUX.IMUX.6
DIN_A31inputTCELL1:IMUX.IMUX.28
DIN_A32inputTCELL1:IMUX.IMUX.31
DIN_A33inputTCELL1:IMUX.IMUX.30
DIN_A34inputTCELL1:IMUX.IMUX.8
DIN_A35inputTCELL1:IMUX.IMUX.32
DIN_A36inputTCELL1:IMUX.IMUX.9
DIN_A37inputTCELL1:IMUX.IMUX.34
DIN_A38inputTCELL1:IMUX.IMUX.10
DIN_A39inputTCELL1:IMUX.IMUX.36
DIN_A4inputTCELL0:IMUX.IMUX.2
DIN_A40inputTCELL2:IMUX.IMUX.18
DIN_A41inputTCELL2:IMUX.IMUX.2
DIN_A42inputTCELL2:IMUX.IMUX.20
DIN_A43inputTCELL2:IMUX.IMUX.23
DIN_A44inputTCELL2:IMUX.IMUX.4
DIN_A45inputTCELL2:IMUX.IMUX.24
DIN_A46inputTCELL2:IMUX.IMUX.5
DIN_A47inputTCELL2:IMUX.IMUX.26
DIN_A48inputTCELL2:IMUX.IMUX.6
DIN_A49inputTCELL2:IMUX.IMUX.28
DIN_A5inputTCELL0:IMUX.IMUX.20
DIN_A50inputTCELL2:IMUX.IMUX.31
DIN_A51inputTCELL2:IMUX.IMUX.30
DIN_A52inputTCELL2:IMUX.IMUX.8
DIN_A53inputTCELL2:IMUX.IMUX.32
DIN_A54inputTCELL2:IMUX.IMUX.9
DIN_A55inputTCELL2:IMUX.IMUX.34
DIN_A56inputTCELL2:IMUX.IMUX.47
DIN_A57inputTCELL2:IMUX.IMUX.46
DIN_A58inputTCELL3:IMUX.IMUX.0
DIN_A59inputTCELL3:IMUX.IMUX.16
DIN_A6inputTCELL0:IMUX.IMUX.23
DIN_A60inputTCELL3:IMUX.IMUX.1
DIN_A61inputTCELL3:IMUX.IMUX.18
DIN_A62inputTCELL3:IMUX.IMUX.2
DIN_A63inputTCELL3:IMUX.IMUX.20
DIN_A64inputTCELL3:IMUX.IMUX.23
DIN_A65inputTCELL3:IMUX.IMUX.22
DIN_A66inputTCELL3:IMUX.IMUX.4
DIN_A67inputTCELL3:IMUX.IMUX.24
DIN_A68inputTCELL3:IMUX.IMUX.5
DIN_A69inputTCELL3:IMUX.IMUX.26
DIN_A7inputTCELL0:IMUX.IMUX.22
DIN_A70inputTCELL3:IMUX.IMUX.6
DIN_A71inputTCELL3:IMUX.IMUX.28
DIN_A8inputTCELL0:IMUX.IMUX.4
DIN_A9inputTCELL0:IMUX.IMUX.24
DIN_B0inputTCELL15:IMUX.IMUX.0
DIN_B1inputTCELL15:IMUX.IMUX.16
DIN_B10inputTCELL15:IMUX.IMUX.5
DIN_B11inputTCELL15:IMUX.IMUX.26
DIN_B12inputTCELL15:IMUX.IMUX.6
DIN_B13inputTCELL15:IMUX.IMUX.28
DIN_B14inputTCELL15:IMUX.IMUX.31
DIN_B15inputTCELL15:IMUX.IMUX.30
DIN_B16inputTCELL15:IMUX.IMUX.14
DIN_B17inputTCELL15:IMUX.IMUX.44
DIN_B18inputTCELL16:IMUX.IMUX.0
DIN_B19inputTCELL16:IMUX.IMUX.16
DIN_B2inputTCELL15:IMUX.IMUX.1
DIN_B20inputTCELL16:IMUX.IMUX.1
DIN_B21inputTCELL16:IMUX.IMUX.18
DIN_B22inputTCELL16:IMUX.IMUX.2
DIN_B23inputTCELL16:IMUX.IMUX.20
DIN_B24inputTCELL16:IMUX.IMUX.23
DIN_B25inputTCELL16:IMUX.IMUX.22
DIN_B26inputTCELL16:IMUX.IMUX.4
DIN_B27inputTCELL16:IMUX.IMUX.24
DIN_B28inputTCELL16:IMUX.IMUX.5
DIN_B29inputTCELL16:IMUX.IMUX.26
DIN_B3inputTCELL15:IMUX.IMUX.18
DIN_B30inputTCELL16:IMUX.IMUX.6
DIN_B31inputTCELL16:IMUX.IMUX.28
DIN_B32inputTCELL16:IMUX.IMUX.31
DIN_B33inputTCELL16:IMUX.IMUX.30
DIN_B34inputTCELL16:IMUX.IMUX.8
DIN_B35inputTCELL16:IMUX.IMUX.32
DIN_B36inputTCELL16:IMUX.IMUX.9
DIN_B37inputTCELL16:IMUX.IMUX.34
DIN_B38inputTCELL16:IMUX.IMUX.10
DIN_B39inputTCELL16:IMUX.IMUX.36
DIN_B4inputTCELL15:IMUX.IMUX.2
DIN_B40inputTCELL17:IMUX.IMUX.18
DIN_B41inputTCELL17:IMUX.IMUX.2
DIN_B42inputTCELL17:IMUX.IMUX.20
DIN_B43inputTCELL17:IMUX.IMUX.23
DIN_B44inputTCELL17:IMUX.IMUX.4
DIN_B45inputTCELL17:IMUX.IMUX.24
DIN_B46inputTCELL17:IMUX.IMUX.5
DIN_B47inputTCELL17:IMUX.IMUX.26
DIN_B48inputTCELL17:IMUX.IMUX.6
DIN_B49inputTCELL17:IMUX.IMUX.28
DIN_B5inputTCELL15:IMUX.IMUX.20
DIN_B50inputTCELL17:IMUX.IMUX.31
DIN_B51inputTCELL17:IMUX.IMUX.30
DIN_B52inputTCELL17:IMUX.IMUX.8
DIN_B53inputTCELL17:IMUX.IMUX.32
DIN_B54inputTCELL17:IMUX.IMUX.9
DIN_B55inputTCELL17:IMUX.IMUX.34
DIN_B56inputTCELL17:IMUX.IMUX.47
DIN_B57inputTCELL17:IMUX.IMUX.46
DIN_B58inputTCELL18:IMUX.IMUX.0
DIN_B59inputTCELL18:IMUX.IMUX.16
DIN_B6inputTCELL15:IMUX.IMUX.23
DIN_B60inputTCELL18:IMUX.IMUX.1
DIN_B61inputTCELL18:IMUX.IMUX.18
DIN_B62inputTCELL18:IMUX.IMUX.2
DIN_B63inputTCELL18:IMUX.IMUX.20
DIN_B64inputTCELL18:IMUX.IMUX.23
DIN_B65inputTCELL18:IMUX.IMUX.22
DIN_B66inputTCELL18:IMUX.IMUX.4
DIN_B67inputTCELL18:IMUX.IMUX.24
DIN_B68inputTCELL18:IMUX.IMUX.5
DIN_B69inputTCELL18:IMUX.IMUX.26
DIN_B7inputTCELL15:IMUX.IMUX.22
DIN_B70inputTCELL18:IMUX.IMUX.6
DIN_B71inputTCELL18:IMUX.IMUX.28
DIN_B8inputTCELL15:IMUX.IMUX.4
DIN_B9inputTCELL15:IMUX.IMUX.24
DOUT_A0outputTCELL0:OUT.0
DOUT_A1outputTCELL0:OUT.1
DOUT_A10outputTCELL0:OUT.10
DOUT_A11outputTCELL0:OUT.11
DOUT_A12outputTCELL0:OUT.14
DOUT_A13outputTCELL0:OUT.16
DOUT_A14outputTCELL0:OUT.20
DOUT_A15outputTCELL0:OUT.21
DOUT_A16outputTCELL0:OUT.22
DOUT_A17outputTCELL0:OUT.24
DOUT_A18outputTCELL0:OUT.28
DOUT_A19outputTCELL0:OUT.29
DOUT_A2outputTCELL0:OUT.2
DOUT_A20outputTCELL1:OUT.0
DOUT_A21outputTCELL1:OUT.3
DOUT_A22outputTCELL1:OUT.4
DOUT_A23outputTCELL1:OUT.5
DOUT_A24outputTCELL1:OUT.6
DOUT_A25outputTCELL1:OUT.7
DOUT_A26outputTCELL1:OUT.8
DOUT_A27outputTCELL1:OUT.9
DOUT_A28outputTCELL1:OUT.10
DOUT_A29outputTCELL1:OUT.11
DOUT_A3outputTCELL0:OUT.3
DOUT_A30outputTCELL1:OUT.12
DOUT_A31outputTCELL1:OUT.13
DOUT_A32outputTCELL1:OUT.14
DOUT_A33outputTCELL1:OUT.15
DOUT_A34outputTCELL1:OUT.16
DOUT_A35outputTCELL1:OUT.17
DOUT_A36outputTCELL1:OUT.18
DOUT_A37outputTCELL1:OUT.19
DOUT_A38outputTCELL1:OUT.20
DOUT_A39outputTCELL1:OUT.25
DOUT_A4outputTCELL0:OUT.4
DOUT_A40outputTCELL1:OUT.31
DOUT_A41outputTCELL2:OUT.3
DOUT_A42outputTCELL2:OUT.5
DOUT_A43outputTCELL2:OUT.6
DOUT_A44outputTCELL2:OUT.7
DOUT_A45outputTCELL2:OUT.9
DOUT_A46outputTCELL2:OUT.10
DOUT_A47outputTCELL2:OUT.11
DOUT_A48outputTCELL2:OUT.12
DOUT_A49outputTCELL2:OUT.13
DOUT_A5outputTCELL0:OUT.5
DOUT_A50outputTCELL2:OUT.14
DOUT_A51outputTCELL2:OUT.15
DOUT_A52outputTCELL2:OUT.17
DOUT_A53outputTCELL2:OUT.19
DOUT_A54outputTCELL2:OUT.22
DOUT_A55outputTCELL2:OUT.24
DOUT_A56outputTCELL2:OUT.26
DOUT_A57outputTCELL2:OUT.28
DOUT_A58outputTCELL2:OUT.30
DOUT_A59outputTCELL3:OUT.0
DOUT_A6outputTCELL0:OUT.6
DOUT_A60outputTCELL3:OUT.2
DOUT_A61outputTCELL3:OUT.3
DOUT_A62outputTCELL3:OUT.4
DOUT_A63outputTCELL3:OUT.5
DOUT_A64outputTCELL3:OUT.6
DOUT_A65outputTCELL3:OUT.7
DOUT_A66outputTCELL3:OUT.8
DOUT_A67outputTCELL3:OUT.9
DOUT_A68outputTCELL3:OUT.10
DOUT_A69outputTCELL3:OUT.11
DOUT_A7outputTCELL0:OUT.7
DOUT_A70outputTCELL3:OUT.12
DOUT_A71outputTCELL3:OUT.16
DOUT_A8outputTCELL0:OUT.8
DOUT_A9outputTCELL0:OUT.9
DOUT_B0outputTCELL15:OUT.0
DOUT_B1outputTCELL15:OUT.1
DOUT_B10outputTCELL15:OUT.10
DOUT_B11outputTCELL15:OUT.11
DOUT_B12outputTCELL15:OUT.14
DOUT_B13outputTCELL15:OUT.16
DOUT_B14outputTCELL15:OUT.20
DOUT_B15outputTCELL15:OUT.21
DOUT_B16outputTCELL15:OUT.22
DOUT_B17outputTCELL15:OUT.24
DOUT_B18outputTCELL15:OUT.28
DOUT_B19outputTCELL15:OUT.29
DOUT_B2outputTCELL15:OUT.2
DOUT_B20outputTCELL16:OUT.0
DOUT_B21outputTCELL16:OUT.3
DOUT_B22outputTCELL16:OUT.4
DOUT_B23outputTCELL16:OUT.5
DOUT_B24outputTCELL16:OUT.6
DOUT_B25outputTCELL16:OUT.7
DOUT_B26outputTCELL16:OUT.8
DOUT_B27outputTCELL16:OUT.9
DOUT_B28outputTCELL16:OUT.10
DOUT_B29outputTCELL16:OUT.11
DOUT_B3outputTCELL15:OUT.3
DOUT_B30outputTCELL16:OUT.12
DOUT_B31outputTCELL16:OUT.13
DOUT_B32outputTCELL16:OUT.14
DOUT_B33outputTCELL16:OUT.15
DOUT_B34outputTCELL16:OUT.16
DOUT_B35outputTCELL16:OUT.17
DOUT_B36outputTCELL16:OUT.18
DOUT_B37outputTCELL16:OUT.19
DOUT_B38outputTCELL16:OUT.20
DOUT_B39outputTCELL16:OUT.25
DOUT_B4outputTCELL15:OUT.4
DOUT_B40outputTCELL16:OUT.31
DOUT_B41outputTCELL17:OUT.3
DOUT_B42outputTCELL17:OUT.5
DOUT_B43outputTCELL17:OUT.6
DOUT_B44outputTCELL17:OUT.7
DOUT_B45outputTCELL17:OUT.9
DOUT_B46outputTCELL17:OUT.10
DOUT_B47outputTCELL17:OUT.11
DOUT_B48outputTCELL17:OUT.12
DOUT_B49outputTCELL17:OUT.13
DOUT_B5outputTCELL15:OUT.5
DOUT_B50outputTCELL17:OUT.14
DOUT_B51outputTCELL17:OUT.15
DOUT_B52outputTCELL17:OUT.17
DOUT_B53outputTCELL17:OUT.19
DOUT_B54outputTCELL17:OUT.22
DOUT_B55outputTCELL17:OUT.24
DOUT_B56outputTCELL17:OUT.26
DOUT_B57outputTCELL17:OUT.28
DOUT_B58outputTCELL17:OUT.30
DOUT_B59outputTCELL18:OUT.0
DOUT_B6outputTCELL15:OUT.6
DOUT_B60outputTCELL18:OUT.2
DOUT_B61outputTCELL18:OUT.3
DOUT_B62outputTCELL18:OUT.4
DOUT_B63outputTCELL18:OUT.5
DOUT_B64outputTCELL18:OUT.6
DOUT_B65outputTCELL18:OUT.7
DOUT_B66outputTCELL18:OUT.8
DOUT_B67outputTCELL18:OUT.9
DOUT_B68outputTCELL18:OUT.10
DOUT_B69outputTCELL18:OUT.11
DOUT_B7outputTCELL15:OUT.7
DOUT_B70outputTCELL18:OUT.12
DOUT_B71outputTCELL18:OUT.16
DOUT_B8outputTCELL15:OUT.8
DOUT_B9outputTCELL15:OUT.9
EN_AinputTCELL2:IMUX.CTRL.3
EN_BinputTCELL17:IMUX.CTRL.3
INJECT_DBITERR_AinputTCELL1:IMUX.IMUX.39
INJECT_DBITERR_BinputTCELL16:IMUX.IMUX.39
INJECT_SBITERR_AinputTCELL1:IMUX.IMUX.38
INJECT_SBITERR_BinputTCELL16:IMUX.IMUX.38
OREG_CAS_CE_AinputTCELL0:IMUX.CTRL.7
OREG_CAS_CE_BinputTCELL15:IMUX.CTRL.7
OREG_CE_AinputTCELL1:IMUX.CTRL.3
OREG_CE_BinputTCELL16:IMUX.CTRL.3
OREG_ECC_CE_AinputTCELL1:IMUX.CTRL.2
OREG_ECC_CE_BinputTCELL16:IMUX.CTRL.2
RDACCESS_AoutputTCELL0:OUT.30
RDACCESS_BoutputTCELL15:OUT.30
RDB_WR_AinputTCELL2:IMUX.CTRL.2
RDB_WR_BinputTCELL17:IMUX.CTRL.2
RST_AinputTCELL1:IMUX.CTRL.7
RST_BinputTCELL16:IMUX.CTRL.7
SBITERR_AoutputTCELL0:OUT.31
SBITERR_BoutputTCELL15:OUT.31
SHUTDOWNinputTCELL1:IMUX.CTRL.1
SLEEPinputTCELL0:IMUX.CTRL.6
TST_DEEPSLEEP_OUToutputTCELL0:OUT.26
TST_RING_ENBinputTCELL3:IMUX.CTRL.4
TST_RING_OUToutputTCELL3:OUT.14
TST_RING_STARTBinputTCELL3:IMUX.CTRL.3
TST_SHUTDOWN_OUToutputTCELL0:OUT.27
TST_SLEEP_OUToutputTCELL0:OUT.25

Bel URAM1

ultrascaleplus URAM bel URAM1
PinDirectionWires
ADDR_A0inputTCELL4:IMUX.IMUX.4
ADDR_A1inputTCELL4:IMUX.IMUX.24
ADDR_A10inputTCELL4:IMUX.IMUX.9
ADDR_A11inputTCELL4:IMUX.IMUX.34
ADDR_A12inputTCELL5:IMUX.IMUX.8
ADDR_A13inputTCELL5:IMUX.IMUX.32
ADDR_A14inputTCELL5:IMUX.IMUX.9
ADDR_A15inputTCELL5:IMUX.IMUX.34
ADDR_A16inputTCELL5:IMUX.IMUX.10
ADDR_A17inputTCELL5:IMUX.IMUX.36
ADDR_A18inputTCELL5:IMUX.IMUX.39
ADDR_A19inputTCELL5:IMUX.IMUX.38
ADDR_A2inputTCELL4:IMUX.IMUX.5
ADDR_A20inputTCELL5:IMUX.IMUX.12
ADDR_A21inputTCELL5:IMUX.IMUX.40
ADDR_A22inputTCELL5:IMUX.IMUX.13
ADDR_A3inputTCELL4:IMUX.IMUX.26
ADDR_A4inputTCELL4:IMUX.IMUX.6
ADDR_A5inputTCELL4:IMUX.IMUX.28
ADDR_A6inputTCELL4:IMUX.IMUX.31
ADDR_A7inputTCELL4:IMUX.IMUX.30
ADDR_A8inputTCELL4:IMUX.IMUX.8
ADDR_A9inputTCELL4:IMUX.IMUX.32
ADDR_B0inputTCELL19:IMUX.IMUX.4
ADDR_B1inputTCELL19:IMUX.IMUX.24
ADDR_B10inputTCELL19:IMUX.IMUX.9
ADDR_B11inputTCELL19:IMUX.IMUX.34
ADDR_B12inputTCELL20:IMUX.IMUX.8
ADDR_B13inputTCELL20:IMUX.IMUX.32
ADDR_B14inputTCELL20:IMUX.IMUX.9
ADDR_B15inputTCELL20:IMUX.IMUX.34
ADDR_B16inputTCELL20:IMUX.IMUX.10
ADDR_B17inputTCELL20:IMUX.IMUX.36
ADDR_B18inputTCELL20:IMUX.IMUX.39
ADDR_B19inputTCELL20:IMUX.IMUX.38
ADDR_B2inputTCELL19:IMUX.IMUX.5
ADDR_B20inputTCELL20:IMUX.IMUX.12
ADDR_B21inputTCELL20:IMUX.IMUX.40
ADDR_B22inputTCELL20:IMUX.IMUX.13
ADDR_B3inputTCELL19:IMUX.IMUX.26
ADDR_B4inputTCELL19:IMUX.IMUX.6
ADDR_B5inputTCELL19:IMUX.IMUX.28
ADDR_B6inputTCELL19:IMUX.IMUX.31
ADDR_B7inputTCELL19:IMUX.IMUX.30
ADDR_B8inputTCELL19:IMUX.IMUX.8
ADDR_B9inputTCELL19:IMUX.IMUX.32
BWE_A0inputTCELL6:IMUX.IMUX.6
BWE_A1inputTCELL6:IMUX.IMUX.28
BWE_A2inputTCELL6:IMUX.IMUX.31
BWE_A3inputTCELL6:IMUX.IMUX.30
BWE_A4inputTCELL6:IMUX.IMUX.8
BWE_A5inputTCELL6:IMUX.IMUX.32
BWE_A6inputTCELL6:IMUX.IMUX.9
BWE_A7inputTCELL6:IMUX.IMUX.34
BWE_A8inputTCELL6:IMUX.IMUX.10
BWE_B0inputTCELL21:IMUX.IMUX.6
BWE_B1inputTCELL21:IMUX.IMUX.28
BWE_B2inputTCELL21:IMUX.IMUX.31
BWE_B3inputTCELL21:IMUX.IMUX.30
BWE_B4inputTCELL21:IMUX.IMUX.8
BWE_B5inputTCELL21:IMUX.IMUX.32
BWE_B6inputTCELL21:IMUX.IMUX.9
BWE_B7inputTCELL21:IMUX.IMUX.34
BWE_B8inputTCELL21:IMUX.IMUX.10
CLKinputTCELL6:IMUX.CTRL.4
DBITERR_AoutputTCELL4:OUT.15
DBITERR_BoutputTCELL19:OUT.15
DEEPSLEEPinputTCELL4:IMUX.CTRL.6
DIN_A0inputTCELL3:IMUX.IMUX.12
DIN_A1inputTCELL3:IMUX.IMUX.40
DIN_A10inputTCELL4:IMUX.IMUX.1
DIN_A11inputTCELL4:IMUX.IMUX.18
DIN_A12inputTCELL4:IMUX.IMUX.2
DIN_A13inputTCELL4:IMUX.IMUX.20
DIN_A14inputTCELL4:IMUX.IMUX.23
DIN_A15inputTCELL4:IMUX.IMUX.22
DIN_A16inputTCELL4:IMUX.IMUX.10
DIN_A17inputTCELL4:IMUX.IMUX.36
DIN_A18inputTCELL4:IMUX.IMUX.12
DIN_A19inputTCELL4:IMUX.IMUX.40
DIN_A2inputTCELL3:IMUX.IMUX.13
DIN_A20inputTCELL4:IMUX.IMUX.13
DIN_A21inputTCELL4:IMUX.IMUX.42
DIN_A22inputTCELL4:IMUX.IMUX.14
DIN_A23inputTCELL4:IMUX.IMUX.44
DIN_A24inputTCELL4:IMUX.IMUX.47
DIN_A25inputTCELL4:IMUX.IMUX.46
DIN_A26inputTCELL5:IMUX.IMUX.0
DIN_A27inputTCELL5:IMUX.IMUX.16
DIN_A28inputTCELL5:IMUX.IMUX.1
DIN_A29inputTCELL5:IMUX.IMUX.18
DIN_A3inputTCELL3:IMUX.IMUX.42
DIN_A30inputTCELL5:IMUX.IMUX.2
DIN_A31inputTCELL5:IMUX.IMUX.20
DIN_A32inputTCELL5:IMUX.IMUX.23
DIN_A33inputTCELL5:IMUX.IMUX.22
DIN_A34inputTCELL5:IMUX.IMUX.4
DIN_A35inputTCELL5:IMUX.IMUX.24
DIN_A36inputTCELL5:IMUX.IMUX.5
DIN_A37inputTCELL5:IMUX.IMUX.26
DIN_A38inputTCELL5:IMUX.IMUX.6
DIN_A39inputTCELL5:IMUX.IMUX.28
DIN_A4inputTCELL3:IMUX.IMUX.14
DIN_A40inputTCELL5:IMUX.IMUX.42
DIN_A41inputTCELL5:IMUX.IMUX.14
DIN_A42inputTCELL5:IMUX.IMUX.44
DIN_A43inputTCELL5:IMUX.IMUX.47
DIN_A44inputTCELL6:IMUX.IMUX.0
DIN_A45inputTCELL6:IMUX.IMUX.16
DIN_A46inputTCELL6:IMUX.IMUX.1
DIN_A47inputTCELL6:IMUX.IMUX.18
DIN_A48inputTCELL6:IMUX.IMUX.2
DIN_A49inputTCELL6:IMUX.IMUX.20
DIN_A5inputTCELL3:IMUX.IMUX.44
DIN_A50inputTCELL6:IMUX.IMUX.23
DIN_A51inputTCELL6:IMUX.IMUX.22
DIN_A52inputTCELL6:IMUX.IMUX.4
DIN_A53inputTCELL6:IMUX.IMUX.24
DIN_A54inputTCELL6:IMUX.IMUX.5
DIN_A55inputTCELL6:IMUX.IMUX.26
DIN_A56inputTCELL6:IMUX.IMUX.39
DIN_A57inputTCELL6:IMUX.IMUX.38
DIN_A58inputTCELL6:IMUX.IMUX.12
DIN_A59inputTCELL6:IMUX.IMUX.40
DIN_A6inputTCELL3:IMUX.IMUX.47
DIN_A60inputTCELL6:IMUX.IMUX.13
DIN_A61inputTCELL6:IMUX.IMUX.42
DIN_A62inputTCELL6:IMUX.IMUX.14
DIN_A63inputTCELL6:IMUX.IMUX.44
DIN_A64inputTCELL6:IMUX.IMUX.47
DIN_A65inputTCELL6:IMUX.IMUX.46
DIN_A66inputTCELL7:IMUX.IMUX.0
DIN_A67inputTCELL7:IMUX.IMUX.16
DIN_A68inputTCELL7:IMUX.IMUX.1
DIN_A69inputTCELL7:IMUX.IMUX.18
DIN_A7inputTCELL3:IMUX.IMUX.46
DIN_A70inputTCELL7:IMUX.IMUX.2
DIN_A71inputTCELL7:IMUX.IMUX.20
DIN_A8inputTCELL4:IMUX.IMUX.0
DIN_A9inputTCELL4:IMUX.IMUX.16
DIN_B0inputTCELL18:IMUX.IMUX.12
DIN_B1inputTCELL18:IMUX.IMUX.40
DIN_B10inputTCELL19:IMUX.IMUX.1
DIN_B11inputTCELL19:IMUX.IMUX.18
DIN_B12inputTCELL19:IMUX.IMUX.2
DIN_B13inputTCELL19:IMUX.IMUX.20
DIN_B14inputTCELL19:IMUX.IMUX.23
DIN_B15inputTCELL19:IMUX.IMUX.22
DIN_B16inputTCELL19:IMUX.IMUX.10
DIN_B17inputTCELL19:IMUX.IMUX.36
DIN_B18inputTCELL19:IMUX.IMUX.12
DIN_B19inputTCELL19:IMUX.IMUX.40
DIN_B2inputTCELL18:IMUX.IMUX.13
DIN_B20inputTCELL19:IMUX.IMUX.13
DIN_B21inputTCELL19:IMUX.IMUX.42
DIN_B22inputTCELL19:IMUX.IMUX.14
DIN_B23inputTCELL19:IMUX.IMUX.44
DIN_B24inputTCELL19:IMUX.IMUX.47
DIN_B25inputTCELL19:IMUX.IMUX.46
DIN_B26inputTCELL20:IMUX.IMUX.0
DIN_B27inputTCELL20:IMUX.IMUX.16
DIN_B28inputTCELL20:IMUX.IMUX.1
DIN_B29inputTCELL20:IMUX.IMUX.18
DIN_B3inputTCELL18:IMUX.IMUX.42
DIN_B30inputTCELL20:IMUX.IMUX.2
DIN_B31inputTCELL20:IMUX.IMUX.20
DIN_B32inputTCELL20:IMUX.IMUX.23
DIN_B33inputTCELL20:IMUX.IMUX.22
DIN_B34inputTCELL20:IMUX.IMUX.4
DIN_B35inputTCELL20:IMUX.IMUX.24
DIN_B36inputTCELL20:IMUX.IMUX.5
DIN_B37inputTCELL20:IMUX.IMUX.26
DIN_B38inputTCELL20:IMUX.IMUX.6
DIN_B39inputTCELL20:IMUX.IMUX.28
DIN_B4inputTCELL18:IMUX.IMUX.14
DIN_B40inputTCELL20:IMUX.IMUX.42
DIN_B41inputTCELL20:IMUX.IMUX.14
DIN_B42inputTCELL20:IMUX.IMUX.44
DIN_B43inputTCELL20:IMUX.IMUX.47
DIN_B44inputTCELL21:IMUX.IMUX.0
DIN_B45inputTCELL21:IMUX.IMUX.16
DIN_B46inputTCELL21:IMUX.IMUX.1
DIN_B47inputTCELL21:IMUX.IMUX.18
DIN_B48inputTCELL21:IMUX.IMUX.2
DIN_B49inputTCELL21:IMUX.IMUX.20
DIN_B5inputTCELL18:IMUX.IMUX.44
DIN_B50inputTCELL21:IMUX.IMUX.23
DIN_B51inputTCELL21:IMUX.IMUX.22
DIN_B52inputTCELL21:IMUX.IMUX.4
DIN_B53inputTCELL21:IMUX.IMUX.24
DIN_B54inputTCELL21:IMUX.IMUX.5
DIN_B55inputTCELL21:IMUX.IMUX.26
DIN_B56inputTCELL21:IMUX.IMUX.39
DIN_B57inputTCELL21:IMUX.IMUX.38
DIN_B58inputTCELL21:IMUX.IMUX.12
DIN_B59inputTCELL21:IMUX.IMUX.40
DIN_B6inputTCELL18:IMUX.IMUX.47
DIN_B60inputTCELL21:IMUX.IMUX.13
DIN_B61inputTCELL21:IMUX.IMUX.42
DIN_B62inputTCELL21:IMUX.IMUX.14
DIN_B63inputTCELL21:IMUX.IMUX.44
DIN_B64inputTCELL21:IMUX.IMUX.47
DIN_B65inputTCELL21:IMUX.IMUX.46
DIN_B66inputTCELL22:IMUX.IMUX.0
DIN_B67inputTCELL22:IMUX.IMUX.16
DIN_B68inputTCELL22:IMUX.IMUX.1
DIN_B69inputTCELL22:IMUX.IMUX.18
DIN_B7inputTCELL18:IMUX.IMUX.46
DIN_B70inputTCELL22:IMUX.IMUX.2
DIN_B71inputTCELL22:IMUX.IMUX.20
DIN_B8inputTCELL19:IMUX.IMUX.0
DIN_B9inputTCELL19:IMUX.IMUX.16
DOUT_A0outputTCELL3:OUT.24
DOUT_A1outputTCELL3:OUT.25
DOUT_A10outputTCELL4:OUT.2
DOUT_A11outputTCELL4:OUT.3
DOUT_A12outputTCELL4:OUT.6
DOUT_A13outputTCELL4:OUT.8
DOUT_A14outputTCELL4:OUT.12
DOUT_A15outputTCELL4:OUT.13
DOUT_A16outputTCELL4:OUT.14
DOUT_A17outputTCELL4:OUT.16
DOUT_A18outputTCELL4:OUT.20
DOUT_A19outputTCELL4:OUT.21
DOUT_A2outputTCELL3:OUT.26
DOUT_A20outputTCELL4:OUT.24
DOUT_A21outputTCELL4:OUT.27
DOUT_A22outputTCELL4:OUT.28
DOUT_A23outputTCELL4:OUT.29
DOUT_A24outputTCELL4:OUT.30
DOUT_A25outputTCELL4:OUT.31
DOUT_A26outputTCELL5:OUT.0
DOUT_A27outputTCELL5:OUT.1
DOUT_A28outputTCELL5:OUT.2
DOUT_A29outputTCELL5:OUT.3
DOUT_A3outputTCELL3:OUT.27
DOUT_A30outputTCELL5:OUT.4
DOUT_A31outputTCELL5:OUT.5
DOUT_A32outputTCELL5:OUT.6
DOUT_A33outputTCELL5:OUT.7
DOUT_A34outputTCELL5:OUT.8
DOUT_A35outputTCELL5:OUT.9
DOUT_A36outputTCELL5:OUT.10
DOUT_A37outputTCELL5:OUT.11
DOUT_A38outputTCELL5:OUT.12
DOUT_A39outputTCELL5:OUT.17
DOUT_A4outputTCELL3:OUT.28
DOUT_A40outputTCELL5:OUT.23
DOUT_A41outputTCELL5:OUT.27
DOUT_A42outputTCELL5:OUT.29
DOUT_A43outputTCELL5:OUT.30
DOUT_A44outputTCELL5:OUT.31
DOUT_A45outputTCELL6:OUT.1
DOUT_A46outputTCELL6:OUT.2
DOUT_A47outputTCELL6:OUT.3
DOUT_A48outputTCELL6:OUT.4
DOUT_A49outputTCELL6:OUT.5
DOUT_A5outputTCELL3:OUT.29
DOUT_A50outputTCELL6:OUT.6
DOUT_A51outputTCELL6:OUT.7
DOUT_A52outputTCELL6:OUT.9
DOUT_A53outputTCELL6:OUT.11
DOUT_A54outputTCELL6:OUT.14
DOUT_A55outputTCELL6:OUT.16
DOUT_A56outputTCELL6:OUT.18
DOUT_A57outputTCELL6:OUT.20
DOUT_A58outputTCELL6:OUT.22
DOUT_A59outputTCELL6:OUT.24
DOUT_A6outputTCELL3:OUT.30
DOUT_A60outputTCELL6:OUT.26
DOUT_A61outputTCELL6:OUT.27
DOUT_A62outputTCELL6:OUT.28
DOUT_A63outputTCELL6:OUT.29
DOUT_A64outputTCELL6:OUT.30
DOUT_A65outputTCELL6:OUT.31
DOUT_A66outputTCELL7:OUT.0
DOUT_A67outputTCELL7:OUT.1
DOUT_A68outputTCELL7:OUT.2
DOUT_A69outputTCELL7:OUT.3
DOUT_A7outputTCELL3:OUT.31
DOUT_A70outputTCELL7:OUT.4
DOUT_A71outputTCELL7:OUT.8
DOUT_A8outputTCELL4:OUT.0
DOUT_A9outputTCELL4:OUT.1
DOUT_B0outputTCELL18:OUT.24
DOUT_B1outputTCELL18:OUT.25
DOUT_B10outputTCELL19:OUT.2
DOUT_B11outputTCELL19:OUT.3
DOUT_B12outputTCELL19:OUT.6
DOUT_B13outputTCELL19:OUT.8
DOUT_B14outputTCELL19:OUT.12
DOUT_B15outputTCELL19:OUT.13
DOUT_B16outputTCELL19:OUT.14
DOUT_B17outputTCELL19:OUT.16
DOUT_B18outputTCELL19:OUT.20
DOUT_B19outputTCELL19:OUT.21
DOUT_B2outputTCELL18:OUT.26
DOUT_B20outputTCELL19:OUT.24
DOUT_B21outputTCELL19:OUT.27
DOUT_B22outputTCELL19:OUT.28
DOUT_B23outputTCELL19:OUT.29
DOUT_B24outputTCELL19:OUT.30
DOUT_B25outputTCELL19:OUT.31
DOUT_B26outputTCELL20:OUT.0
DOUT_B27outputTCELL20:OUT.1
DOUT_B28outputTCELL20:OUT.2
DOUT_B29outputTCELL20:OUT.3
DOUT_B3outputTCELL18:OUT.27
DOUT_B30outputTCELL20:OUT.4
DOUT_B31outputTCELL20:OUT.5
DOUT_B32outputTCELL20:OUT.6
DOUT_B33outputTCELL20:OUT.7
DOUT_B34outputTCELL20:OUT.8
DOUT_B35outputTCELL20:OUT.9
DOUT_B36outputTCELL20:OUT.10
DOUT_B37outputTCELL20:OUT.11
DOUT_B38outputTCELL20:OUT.12
DOUT_B39outputTCELL20:OUT.17
DOUT_B4outputTCELL18:OUT.28
DOUT_B40outputTCELL20:OUT.23
DOUT_B41outputTCELL20:OUT.27
DOUT_B42outputTCELL20:OUT.29
DOUT_B43outputTCELL20:OUT.30
DOUT_B44outputTCELL20:OUT.31
DOUT_B45outputTCELL21:OUT.1
DOUT_B46outputTCELL21:OUT.2
DOUT_B47outputTCELL21:OUT.3
DOUT_B48outputTCELL21:OUT.4
DOUT_B49outputTCELL21:OUT.5
DOUT_B5outputTCELL18:OUT.29
DOUT_B50outputTCELL21:OUT.6
DOUT_B51outputTCELL21:OUT.7
DOUT_B52outputTCELL21:OUT.9
DOUT_B53outputTCELL21:OUT.11
DOUT_B54outputTCELL21:OUT.14
DOUT_B55outputTCELL21:OUT.16
DOUT_B56outputTCELL21:OUT.18
DOUT_B57outputTCELL21:OUT.20
DOUT_B58outputTCELL21:OUT.22
DOUT_B59outputTCELL21:OUT.24
DOUT_B6outputTCELL18:OUT.30
DOUT_B60outputTCELL21:OUT.26
DOUT_B61outputTCELL21:OUT.27
DOUT_B62outputTCELL21:OUT.28
DOUT_B63outputTCELL21:OUT.29
DOUT_B64outputTCELL21:OUT.30
DOUT_B65outputTCELL21:OUT.31
DOUT_B66outputTCELL22:OUT.0
DOUT_B67outputTCELL22:OUT.1
DOUT_B68outputTCELL22:OUT.2
DOUT_B69outputTCELL22:OUT.3
DOUT_B7outputTCELL18:OUT.31
DOUT_B70outputTCELL22:OUT.4
DOUT_B71outputTCELL22:OUT.8
DOUT_B8outputTCELL19:OUT.0
DOUT_B9outputTCELL19:OUT.1
EN_AinputTCELL6:IMUX.CTRL.1
EN_BinputTCELL21:IMUX.CTRL.1
INJECT_DBITERR_AinputTCELL5:IMUX.IMUX.31
INJECT_DBITERR_BinputTCELL20:IMUX.IMUX.31
INJECT_SBITERR_AinputTCELL5:IMUX.IMUX.30
INJECT_SBITERR_BinputTCELL20:IMUX.IMUX.30
OREG_CAS_CE_AinputTCELL4:IMUX.CTRL.5
OREG_CAS_CE_BinputTCELL19:IMUX.CTRL.5
OREG_CE_AinputTCELL5:IMUX.CTRL.1
OREG_CE_BinputTCELL20:IMUX.CTRL.1
OREG_ECC_CE_AinputTCELL5:IMUX.CTRL.0
OREG_ECC_CE_BinputTCELL20:IMUX.CTRL.0
RDACCESS_AoutputTCELL4:OUT.22
RDACCESS_BoutputTCELL19:OUT.22
RDB_WR_AinputTCELL6:IMUX.CTRL.0
RDB_WR_BinputTCELL21:IMUX.CTRL.0
RST_AinputTCELL5:IMUX.CTRL.5
RST_BinputTCELL20:IMUX.CTRL.5
SBITERR_AoutputTCELL4:OUT.23
SBITERR_BoutputTCELL19:OUT.23
SHUTDOWNinputTCELL4:IMUX.CTRL.7
SLEEPinputTCELL4:IMUX.CTRL.4
TST_DEEPSLEEP_OUToutputTCELL4:OUT.18
TST_RING_ENBinputTCELL7:IMUX.CTRL.2
TST_RING_OUToutputTCELL7:OUT.6
TST_RING_STARTBinputTCELL7:IMUX.CTRL.1
TST_SHUTDOWN_OUToutputTCELL4:OUT.19
TST_SLEEP_OUToutputTCELL4:OUT.17

Bel URAM2

ultrascaleplus URAM bel URAM2
PinDirectionWires
ADDR_A0inputTCELL8:IMUX.IMUX.0
ADDR_A1inputTCELL8:IMUX.IMUX.16
ADDR_A10inputTCELL8:IMUX.IMUX.5
ADDR_A11inputTCELL8:IMUX.IMUX.26
ADDR_A12inputTCELL9:IMUX.IMUX.4
ADDR_A13inputTCELL9:IMUX.IMUX.24
ADDR_A14inputTCELL9:IMUX.IMUX.5
ADDR_A15inputTCELL9:IMUX.IMUX.26
ADDR_A16inputTCELL9:IMUX.IMUX.6
ADDR_A17inputTCELL9:IMUX.IMUX.28
ADDR_A18inputTCELL9:IMUX.IMUX.31
ADDR_A19inputTCELL9:IMUX.IMUX.30
ADDR_A2inputTCELL8:IMUX.IMUX.1
ADDR_A20inputTCELL9:IMUX.IMUX.8
ADDR_A21inputTCELL9:IMUX.IMUX.32
ADDR_A22inputTCELL9:IMUX.IMUX.9
ADDR_A3inputTCELL8:IMUX.IMUX.18
ADDR_A4inputTCELL8:IMUX.IMUX.2
ADDR_A5inputTCELL8:IMUX.IMUX.20
ADDR_A6inputTCELL8:IMUX.IMUX.23
ADDR_A7inputTCELL8:IMUX.IMUX.22
ADDR_A8inputTCELL8:IMUX.IMUX.4
ADDR_A9inputTCELL8:IMUX.IMUX.24
ADDR_B0inputTCELL23:IMUX.IMUX.0
ADDR_B1inputTCELL23:IMUX.IMUX.16
ADDR_B10inputTCELL23:IMUX.IMUX.5
ADDR_B11inputTCELL23:IMUX.IMUX.26
ADDR_B12inputTCELL24:IMUX.IMUX.4
ADDR_B13inputTCELL24:IMUX.IMUX.24
ADDR_B14inputTCELL24:IMUX.IMUX.5
ADDR_B15inputTCELL24:IMUX.IMUX.26
ADDR_B16inputTCELL24:IMUX.IMUX.6
ADDR_B17inputTCELL24:IMUX.IMUX.28
ADDR_B18inputTCELL24:IMUX.IMUX.31
ADDR_B19inputTCELL24:IMUX.IMUX.30
ADDR_B2inputTCELL23:IMUX.IMUX.1
ADDR_B20inputTCELL24:IMUX.IMUX.8
ADDR_B21inputTCELL24:IMUX.IMUX.32
ADDR_B22inputTCELL24:IMUX.IMUX.9
ADDR_B3inputTCELL23:IMUX.IMUX.18
ADDR_B4inputTCELL23:IMUX.IMUX.2
ADDR_B5inputTCELL23:IMUX.IMUX.20
ADDR_B6inputTCELL23:IMUX.IMUX.23
ADDR_B7inputTCELL23:IMUX.IMUX.22
ADDR_B8inputTCELL23:IMUX.IMUX.4
ADDR_B9inputTCELL23:IMUX.IMUX.24
BWE_A0inputTCELL10:IMUX.IMUX.2
BWE_A1inputTCELL10:IMUX.IMUX.20
BWE_A2inputTCELL10:IMUX.IMUX.23
BWE_A3inputTCELL10:IMUX.IMUX.22
BWE_A4inputTCELL10:IMUX.IMUX.4
BWE_A5inputTCELL10:IMUX.IMUX.24
BWE_A6inputTCELL10:IMUX.IMUX.5
BWE_A7inputTCELL10:IMUX.IMUX.26
BWE_A8inputTCELL10:IMUX.IMUX.6
BWE_B0inputTCELL25:IMUX.IMUX.2
BWE_B1inputTCELL25:IMUX.IMUX.20
BWE_B2inputTCELL25:IMUX.IMUX.23
BWE_B3inputTCELL25:IMUX.IMUX.22
BWE_B4inputTCELL25:IMUX.IMUX.4
BWE_B5inputTCELL25:IMUX.IMUX.24
BWE_B6inputTCELL25:IMUX.IMUX.5
BWE_B7inputTCELL25:IMUX.IMUX.26
BWE_B8inputTCELL25:IMUX.IMUX.6
CLKinputTCELL10:IMUX.CTRL.4
DBITERR_AoutputTCELL8:OUT.7
DBITERR_BoutputTCELL23:OUT.7
DEEPSLEEPinputTCELL8:IMUX.CTRL.4
DIN_A0inputTCELL7:IMUX.IMUX.8
DIN_A1inputTCELL7:IMUX.IMUX.32
DIN_A10inputTCELL7:IMUX.IMUX.13
DIN_A11inputTCELL7:IMUX.IMUX.42
DIN_A12inputTCELL7:IMUX.IMUX.14
DIN_A13inputTCELL7:IMUX.IMUX.44
DIN_A14inputTCELL7:IMUX.IMUX.47
DIN_A15inputTCELL7:IMUX.IMUX.46
DIN_A16inputTCELL8:IMUX.IMUX.6
DIN_A17inputTCELL8:IMUX.IMUX.28
DIN_A18inputTCELL8:IMUX.IMUX.8
DIN_A19inputTCELL8:IMUX.IMUX.32
DIN_A2inputTCELL7:IMUX.IMUX.9
DIN_A20inputTCELL8:IMUX.IMUX.9
DIN_A21inputTCELL8:IMUX.IMUX.34
DIN_A22inputTCELL8:IMUX.IMUX.10
DIN_A23inputTCELL8:IMUX.IMUX.36
DIN_A24inputTCELL8:IMUX.IMUX.39
DIN_A25inputTCELL8:IMUX.IMUX.38
DIN_A26inputTCELL8:IMUX.IMUX.12
DIN_A27inputTCELL8:IMUX.IMUX.40
DIN_A28inputTCELL8:IMUX.IMUX.13
DIN_A29inputTCELL8:IMUX.IMUX.42
DIN_A3inputTCELL7:IMUX.IMUX.34
DIN_A30inputTCELL8:IMUX.IMUX.14
DIN_A31inputTCELL8:IMUX.IMUX.44
DIN_A32inputTCELL8:IMUX.IMUX.47
DIN_A33inputTCELL8:IMUX.IMUX.46
DIN_A34inputTCELL9:IMUX.IMUX.0
DIN_A35inputTCELL9:IMUX.IMUX.16
DIN_A36inputTCELL9:IMUX.IMUX.1
DIN_A37inputTCELL9:IMUX.IMUX.18
DIN_A38inputTCELL9:IMUX.IMUX.2
DIN_A39inputTCELL9:IMUX.IMUX.20
DIN_A4inputTCELL7:IMUX.IMUX.10
DIN_A40inputTCELL9:IMUX.IMUX.34
DIN_A41inputTCELL9:IMUX.IMUX.10
DIN_A42inputTCELL9:IMUX.IMUX.36
DIN_A43inputTCELL9:IMUX.IMUX.39
DIN_A44inputTCELL9:IMUX.IMUX.12
DIN_A45inputTCELL9:IMUX.IMUX.40
DIN_A46inputTCELL9:IMUX.IMUX.13
DIN_A47inputTCELL9:IMUX.IMUX.42
DIN_A48inputTCELL9:IMUX.IMUX.14
DIN_A49inputTCELL9:IMUX.IMUX.44
DIN_A5inputTCELL7:IMUX.IMUX.36
DIN_A50inputTCELL9:IMUX.IMUX.47
DIN_A51inputTCELL9:IMUX.IMUX.46
DIN_A52inputTCELL10:IMUX.IMUX.0
DIN_A53inputTCELL10:IMUX.IMUX.16
DIN_A54inputTCELL10:IMUX.IMUX.1
DIN_A55inputTCELL10:IMUX.IMUX.18
DIN_A56inputTCELL10:IMUX.IMUX.31
DIN_A57inputTCELL10:IMUX.IMUX.30
DIN_A58inputTCELL10:IMUX.IMUX.8
DIN_A59inputTCELL10:IMUX.IMUX.32
DIN_A6inputTCELL7:IMUX.IMUX.39
DIN_A60inputTCELL10:IMUX.IMUX.9
DIN_A61inputTCELL10:IMUX.IMUX.34
DIN_A62inputTCELL10:IMUX.IMUX.10
DIN_A63inputTCELL10:IMUX.IMUX.36
DIN_A64inputTCELL10:IMUX.IMUX.39
DIN_A65inputTCELL10:IMUX.IMUX.38
DIN_A66inputTCELL10:IMUX.IMUX.12
DIN_A67inputTCELL10:IMUX.IMUX.40
DIN_A68inputTCELL10:IMUX.IMUX.13
DIN_A69inputTCELL10:IMUX.IMUX.42
DIN_A7inputTCELL7:IMUX.IMUX.38
DIN_A70inputTCELL10:IMUX.IMUX.14
DIN_A71inputTCELL10:IMUX.IMUX.44
DIN_A8inputTCELL7:IMUX.IMUX.12
DIN_A9inputTCELL7:IMUX.IMUX.40
DIN_B0inputTCELL22:IMUX.IMUX.8
DIN_B1inputTCELL22:IMUX.IMUX.32
DIN_B10inputTCELL22:IMUX.IMUX.13
DIN_B11inputTCELL22:IMUX.IMUX.42
DIN_B12inputTCELL22:IMUX.IMUX.14
DIN_B13inputTCELL22:IMUX.IMUX.44
DIN_B14inputTCELL22:IMUX.IMUX.47
DIN_B15inputTCELL22:IMUX.IMUX.46
DIN_B16inputTCELL23:IMUX.IMUX.6
DIN_B17inputTCELL23:IMUX.IMUX.28
DIN_B18inputTCELL23:IMUX.IMUX.8
DIN_B19inputTCELL23:IMUX.IMUX.32
DIN_B2inputTCELL22:IMUX.IMUX.9
DIN_B20inputTCELL23:IMUX.IMUX.9
DIN_B21inputTCELL23:IMUX.IMUX.34
DIN_B22inputTCELL23:IMUX.IMUX.10
DIN_B23inputTCELL23:IMUX.IMUX.36
DIN_B24inputTCELL23:IMUX.IMUX.39
DIN_B25inputTCELL23:IMUX.IMUX.38
DIN_B26inputTCELL23:IMUX.IMUX.12
DIN_B27inputTCELL23:IMUX.IMUX.40
DIN_B28inputTCELL23:IMUX.IMUX.13
DIN_B29inputTCELL23:IMUX.IMUX.42
DIN_B3inputTCELL22:IMUX.IMUX.34
DIN_B30inputTCELL23:IMUX.IMUX.14
DIN_B31inputTCELL23:IMUX.IMUX.44
DIN_B32inputTCELL23:IMUX.IMUX.47
DIN_B33inputTCELL23:IMUX.IMUX.46
DIN_B34inputTCELL24:IMUX.IMUX.0
DIN_B35inputTCELL24:IMUX.IMUX.16
DIN_B36inputTCELL24:IMUX.IMUX.1
DIN_B37inputTCELL24:IMUX.IMUX.18
DIN_B38inputTCELL24:IMUX.IMUX.2
DIN_B39inputTCELL24:IMUX.IMUX.20
DIN_B4inputTCELL22:IMUX.IMUX.10
DIN_B40inputTCELL24:IMUX.IMUX.34
DIN_B41inputTCELL24:IMUX.IMUX.10
DIN_B42inputTCELL24:IMUX.IMUX.36
DIN_B43inputTCELL24:IMUX.IMUX.39
DIN_B44inputTCELL24:IMUX.IMUX.12
DIN_B45inputTCELL24:IMUX.IMUX.40
DIN_B46inputTCELL24:IMUX.IMUX.13
DIN_B47inputTCELL24:IMUX.IMUX.42
DIN_B48inputTCELL24:IMUX.IMUX.14
DIN_B49inputTCELL24:IMUX.IMUX.44
DIN_B5inputTCELL22:IMUX.IMUX.36
DIN_B50inputTCELL24:IMUX.IMUX.47
DIN_B51inputTCELL24:IMUX.IMUX.46
DIN_B52inputTCELL25:IMUX.IMUX.0
DIN_B53inputTCELL25:IMUX.IMUX.16
DIN_B54inputTCELL25:IMUX.IMUX.1
DIN_B55inputTCELL25:IMUX.IMUX.18
DIN_B56inputTCELL25:IMUX.IMUX.31
DIN_B57inputTCELL25:IMUX.IMUX.30
DIN_B58inputTCELL25:IMUX.IMUX.8
DIN_B59inputTCELL25:IMUX.IMUX.32
DIN_B6inputTCELL22:IMUX.IMUX.39
DIN_B60inputTCELL25:IMUX.IMUX.9
DIN_B61inputTCELL25:IMUX.IMUX.34
DIN_B62inputTCELL25:IMUX.IMUX.10
DIN_B63inputTCELL25:IMUX.IMUX.36
DIN_B64inputTCELL25:IMUX.IMUX.39
DIN_B65inputTCELL25:IMUX.IMUX.38
DIN_B66inputTCELL25:IMUX.IMUX.12
DIN_B67inputTCELL25:IMUX.IMUX.40
DIN_B68inputTCELL25:IMUX.IMUX.13
DIN_B69inputTCELL25:IMUX.IMUX.42
DIN_B7inputTCELL22:IMUX.IMUX.38
DIN_B70inputTCELL25:IMUX.IMUX.14
DIN_B71inputTCELL25:IMUX.IMUX.44
DIN_B8inputTCELL22:IMUX.IMUX.12
DIN_B9inputTCELL22:IMUX.IMUX.40
DOUT_A0outputTCELL7:OUT.16
DOUT_A1outputTCELL7:OUT.17
DOUT_A10outputTCELL7:OUT.26
DOUT_A11outputTCELL7:OUT.27
DOUT_A12outputTCELL7:OUT.30
DOUT_A13outputTCELL8:OUT.0
DOUT_A14outputTCELL8:OUT.4
DOUT_A15outputTCELL8:OUT.5
DOUT_A16outputTCELL8:OUT.6
DOUT_A17outputTCELL8:OUT.8
DOUT_A18outputTCELL8:OUT.12
DOUT_A19outputTCELL8:OUT.13
DOUT_A2outputTCELL7:OUT.18
DOUT_A20outputTCELL8:OUT.16
DOUT_A21outputTCELL8:OUT.19
DOUT_A22outputTCELL8:OUT.20
DOUT_A23outputTCELL8:OUT.21
DOUT_A24outputTCELL8:OUT.22
DOUT_A25outputTCELL8:OUT.23
DOUT_A26outputTCELL8:OUT.24
DOUT_A27outputTCELL8:OUT.25
DOUT_A28outputTCELL8:OUT.26
DOUT_A29outputTCELL8:OUT.27
DOUT_A3outputTCELL7:OUT.19
DOUT_A30outputTCELL8:OUT.28
DOUT_A31outputTCELL8:OUT.29
DOUT_A32outputTCELL8:OUT.30
DOUT_A33outputTCELL8:OUT.31
DOUT_A34outputTCELL9:OUT.0
DOUT_A35outputTCELL9:OUT.1
DOUT_A36outputTCELL9:OUT.2
DOUT_A37outputTCELL9:OUT.3
DOUT_A38outputTCELL9:OUT.4
DOUT_A39outputTCELL9:OUT.9
DOUT_A4outputTCELL7:OUT.20
DOUT_A40outputTCELL9:OUT.15
DOUT_A41outputTCELL9:OUT.19
DOUT_A42outputTCELL9:OUT.21
DOUT_A43outputTCELL9:OUT.22
DOUT_A44outputTCELL9:OUT.23
DOUT_A45outputTCELL9:OUT.25
DOUT_A46outputTCELL9:OUT.26
DOUT_A47outputTCELL9:OUT.27
DOUT_A48outputTCELL9:OUT.28
DOUT_A49outputTCELL9:OUT.29
DOUT_A5outputTCELL7:OUT.21
DOUT_A50outputTCELL9:OUT.30
DOUT_A51outputTCELL9:OUT.31
DOUT_A52outputTCELL10:OUT.1
DOUT_A53outputTCELL10:OUT.3
DOUT_A54outputTCELL10:OUT.6
DOUT_A55outputTCELL10:OUT.8
DOUT_A56outputTCELL10:OUT.10
DOUT_A57outputTCELL10:OUT.12
DOUT_A58outputTCELL10:OUT.14
DOUT_A59outputTCELL10:OUT.16
DOUT_A6outputTCELL7:OUT.22
DOUT_A60outputTCELL10:OUT.18
DOUT_A61outputTCELL10:OUT.19
DOUT_A62outputTCELL10:OUT.20
DOUT_A63outputTCELL10:OUT.21
DOUT_A64outputTCELL10:OUT.22
DOUT_A65outputTCELL10:OUT.23
DOUT_A66outputTCELL10:OUT.24
DOUT_A67outputTCELL10:OUT.25
DOUT_A68outputTCELL10:OUT.26
DOUT_A69outputTCELL10:OUT.27
DOUT_A7outputTCELL7:OUT.23
DOUT_A70outputTCELL10:OUT.28
DOUT_A71outputTCELL11:OUT.0
DOUT_A8outputTCELL7:OUT.24
DOUT_A9outputTCELL7:OUT.25
DOUT_B0outputTCELL22:OUT.16
DOUT_B1outputTCELL22:OUT.17
DOUT_B10outputTCELL22:OUT.26
DOUT_B11outputTCELL22:OUT.27
DOUT_B12outputTCELL22:OUT.30
DOUT_B13outputTCELL23:OUT.0
DOUT_B14outputTCELL23:OUT.4
DOUT_B15outputTCELL23:OUT.5
DOUT_B16outputTCELL23:OUT.6
DOUT_B17outputTCELL23:OUT.8
DOUT_B18outputTCELL23:OUT.12
DOUT_B19outputTCELL23:OUT.13
DOUT_B2outputTCELL22:OUT.18
DOUT_B20outputTCELL23:OUT.16
DOUT_B21outputTCELL23:OUT.19
DOUT_B22outputTCELL23:OUT.20
DOUT_B23outputTCELL23:OUT.21
DOUT_B24outputTCELL23:OUT.22
DOUT_B25outputTCELL23:OUT.23
DOUT_B26outputTCELL23:OUT.24
DOUT_B27outputTCELL23:OUT.25
DOUT_B28outputTCELL23:OUT.26
DOUT_B29outputTCELL23:OUT.27
DOUT_B3outputTCELL22:OUT.19
DOUT_B30outputTCELL23:OUT.28
DOUT_B31outputTCELL23:OUT.29
DOUT_B32outputTCELL23:OUT.30
DOUT_B33outputTCELL23:OUT.31
DOUT_B34outputTCELL24:OUT.0
DOUT_B35outputTCELL24:OUT.1
DOUT_B36outputTCELL24:OUT.2
DOUT_B37outputTCELL24:OUT.3
DOUT_B38outputTCELL24:OUT.4
DOUT_B39outputTCELL24:OUT.9
DOUT_B4outputTCELL22:OUT.20
DOUT_B40outputTCELL24:OUT.15
DOUT_B41outputTCELL24:OUT.19
DOUT_B42outputTCELL24:OUT.21
DOUT_B43outputTCELL24:OUT.22
DOUT_B44outputTCELL24:OUT.23
DOUT_B45outputTCELL24:OUT.25
DOUT_B46outputTCELL24:OUT.26
DOUT_B47outputTCELL24:OUT.27
DOUT_B48outputTCELL24:OUT.28
DOUT_B49outputTCELL24:OUT.29
DOUT_B5outputTCELL22:OUT.21
DOUT_B50outputTCELL24:OUT.30
DOUT_B51outputTCELL24:OUT.31
DOUT_B52outputTCELL25:OUT.1
DOUT_B53outputTCELL25:OUT.3
DOUT_B54outputTCELL25:OUT.6
DOUT_B55outputTCELL25:OUT.8
DOUT_B56outputTCELL25:OUT.10
DOUT_B57outputTCELL25:OUT.12
DOUT_B58outputTCELL25:OUT.14
DOUT_B59outputTCELL25:OUT.16
DOUT_B6outputTCELL22:OUT.22
DOUT_B60outputTCELL25:OUT.18
DOUT_B61outputTCELL25:OUT.19
DOUT_B62outputTCELL25:OUT.20
DOUT_B63outputTCELL25:OUT.21
DOUT_B64outputTCELL25:OUT.22
DOUT_B65outputTCELL25:OUT.23
DOUT_B66outputTCELL25:OUT.24
DOUT_B67outputTCELL25:OUT.25
DOUT_B68outputTCELL25:OUT.26
DOUT_B69outputTCELL25:OUT.27
DOUT_B7outputTCELL22:OUT.23
DOUT_B70outputTCELL25:OUT.28
DOUT_B71outputTCELL26:OUT.0
DOUT_B8outputTCELL22:OUT.24
DOUT_B9outputTCELL22:OUT.25
EN_AinputTCELL9:IMUX.CTRL.7
EN_BinputTCELL24:IMUX.CTRL.7
INJECT_DBITERR_AinputTCELL9:IMUX.IMUX.23
INJECT_DBITERR_BinputTCELL24:IMUX.IMUX.23
INJECT_SBITERR_AinputTCELL9:IMUX.IMUX.22
INJECT_SBITERR_BinputTCELL24:IMUX.IMUX.22
OREG_CAS_CE_AinputTCELL8:IMUX.CTRL.3
OREG_CAS_CE_BinputTCELL23:IMUX.CTRL.3
OREG_CE_AinputTCELL8:IMUX.CTRL.7
OREG_CE_BinputTCELL23:IMUX.CTRL.7
OREG_ECC_CE_AinputTCELL8:IMUX.CTRL.6
OREG_ECC_CE_BinputTCELL23:IMUX.CTRL.6
RDACCESS_AoutputTCELL8:OUT.14
RDACCESS_BoutputTCELL23:OUT.14
RDB_WR_AinputTCELL9:IMUX.CTRL.6
RDB_WR_BinputTCELL24:IMUX.CTRL.6
RST_AinputTCELL9:IMUX.CTRL.3
RST_BinputTCELL24:IMUX.CTRL.3
SBITERR_AoutputTCELL8:OUT.15
SBITERR_BoutputTCELL23:OUT.15
SHUTDOWNinputTCELL8:IMUX.CTRL.5
SLEEPinputTCELL8:IMUX.CTRL.2
TST_DEEPSLEEP_OUToutputTCELL8:OUT.10
TST_RING_ENBinputTCELL11:IMUX.CTRL.0
TST_RING_OUToutputTCELL10:OUT.30
TST_RING_STARTBinputTCELL10:IMUX.CTRL.7
TST_SHUTDOWN_OUToutputTCELL8:OUT.11
TST_SLEEP_OUToutputTCELL8:OUT.9

Bel URAM3

ultrascaleplus URAM bel URAM3
PinDirectionWires
ADDR_A0inputTCELL11:IMUX.IMUX.12
ADDR_A1inputTCELL11:IMUX.IMUX.40
ADDR_A10inputTCELL12:IMUX.IMUX.1
ADDR_A11inputTCELL12:IMUX.IMUX.18
ADDR_A12inputTCELL13:IMUX.IMUX.0
ADDR_A13inputTCELL13:IMUX.IMUX.16
ADDR_A14inputTCELL13:IMUX.IMUX.1
ADDR_A15inputTCELL13:IMUX.IMUX.18
ADDR_A16inputTCELL13:IMUX.IMUX.2
ADDR_A17inputTCELL13:IMUX.IMUX.20
ADDR_A18inputTCELL13:IMUX.IMUX.23
ADDR_A19inputTCELL13:IMUX.IMUX.22
ADDR_A2inputTCELL11:IMUX.IMUX.13
ADDR_A20inputTCELL13:IMUX.IMUX.4
ADDR_A21inputTCELL13:IMUX.IMUX.24
ADDR_A22inputTCELL13:IMUX.IMUX.5
ADDR_A3inputTCELL11:IMUX.IMUX.42
ADDR_A4inputTCELL11:IMUX.IMUX.14
ADDR_A5inputTCELL11:IMUX.IMUX.44
ADDR_A6inputTCELL11:IMUX.IMUX.47
ADDR_A7inputTCELL11:IMUX.IMUX.46
ADDR_A8inputTCELL12:IMUX.IMUX.0
ADDR_A9inputTCELL12:IMUX.IMUX.16
ADDR_B0inputTCELL26:IMUX.IMUX.12
ADDR_B1inputTCELL26:IMUX.IMUX.40
ADDR_B10inputTCELL27:IMUX.IMUX.1
ADDR_B11inputTCELL27:IMUX.IMUX.18
ADDR_B12inputTCELL28:IMUX.IMUX.0
ADDR_B13inputTCELL28:IMUX.IMUX.16
ADDR_B14inputTCELL28:IMUX.IMUX.1
ADDR_B15inputTCELL28:IMUX.IMUX.18
ADDR_B16inputTCELL28:IMUX.IMUX.2
ADDR_B17inputTCELL28:IMUX.IMUX.20
ADDR_B18inputTCELL28:IMUX.IMUX.23
ADDR_B19inputTCELL28:IMUX.IMUX.22
ADDR_B2inputTCELL26:IMUX.IMUX.13
ADDR_B20inputTCELL28:IMUX.IMUX.4
ADDR_B21inputTCELL28:IMUX.IMUX.24
ADDR_B22inputTCELL28:IMUX.IMUX.5
ADDR_B3inputTCELL26:IMUX.IMUX.42
ADDR_B4inputTCELL26:IMUX.IMUX.14
ADDR_B5inputTCELL26:IMUX.IMUX.44
ADDR_B6inputTCELL26:IMUX.IMUX.47
ADDR_B7inputTCELL26:IMUX.IMUX.46
ADDR_B8inputTCELL27:IMUX.IMUX.0
ADDR_B9inputTCELL27:IMUX.IMUX.16
BWE_A0inputTCELL13:IMUX.IMUX.14
BWE_A1inputTCELL13:IMUX.IMUX.44
BWE_A2inputTCELL13:IMUX.IMUX.47
BWE_A3inputTCELL13:IMUX.IMUX.46
BWE_A4inputTCELL14:IMUX.IMUX.0
BWE_A5inputTCELL14:IMUX.IMUX.16
BWE_A6inputTCELL14:IMUX.IMUX.1
BWE_A7inputTCELL14:IMUX.IMUX.18
BWE_A8inputTCELL14:IMUX.IMUX.2
BWE_B0inputTCELL28:IMUX.IMUX.14
BWE_B1inputTCELL28:IMUX.IMUX.44
BWE_B2inputTCELL28:IMUX.IMUX.47
BWE_B3inputTCELL28:IMUX.IMUX.46
BWE_B4inputTCELL29:IMUX.IMUX.0
BWE_B5inputTCELL29:IMUX.IMUX.16
BWE_B6inputTCELL29:IMUX.IMUX.1
BWE_B7inputTCELL29:IMUX.IMUX.18
BWE_B8inputTCELL29:IMUX.IMUX.2
CLKinputTCELL14:IMUX.CTRL.4
DBITERR_AoutputTCELL11:OUT.31
DBITERR_BoutputTCELL26:OUT.31
DEEPSLEEPinputTCELL12:IMUX.CTRL.2
DIN_A0inputTCELL11:IMUX.IMUX.4
DIN_A1inputTCELL11:IMUX.IMUX.24
DIN_A10inputTCELL11:IMUX.IMUX.9
DIN_A11inputTCELL11:IMUX.IMUX.34
DIN_A12inputTCELL11:IMUX.IMUX.10
DIN_A13inputTCELL11:IMUX.IMUX.36
DIN_A14inputTCELL11:IMUX.IMUX.39
DIN_A15inputTCELL11:IMUX.IMUX.38
DIN_A16inputTCELL12:IMUX.IMUX.2
DIN_A17inputTCELL12:IMUX.IMUX.20
DIN_A18inputTCELL12:IMUX.IMUX.4
DIN_A19inputTCELL12:IMUX.IMUX.24
DIN_A2inputTCELL11:IMUX.IMUX.5
DIN_A20inputTCELL12:IMUX.IMUX.5
DIN_A21inputTCELL12:IMUX.IMUX.26
DIN_A22inputTCELL12:IMUX.IMUX.6
DIN_A23inputTCELL12:IMUX.IMUX.28
DIN_A24inputTCELL12:IMUX.IMUX.31
DIN_A25inputTCELL12:IMUX.IMUX.30
DIN_A26inputTCELL12:IMUX.IMUX.8
DIN_A27inputTCELL12:IMUX.IMUX.32
DIN_A28inputTCELL12:IMUX.IMUX.9
DIN_A29inputTCELL12:IMUX.IMUX.34
DIN_A3inputTCELL11:IMUX.IMUX.26
DIN_A30inputTCELL12:IMUX.IMUX.10
DIN_A31inputTCELL12:IMUX.IMUX.36
DIN_A32inputTCELL12:IMUX.IMUX.39
DIN_A33inputTCELL12:IMUX.IMUX.38
DIN_A34inputTCELL12:IMUX.IMUX.12
DIN_A35inputTCELL12:IMUX.IMUX.40
DIN_A36inputTCELL12:IMUX.IMUX.13
DIN_A37inputTCELL12:IMUX.IMUX.42
DIN_A38inputTCELL12:IMUX.IMUX.14
DIN_A39inputTCELL12:IMUX.IMUX.44
DIN_A4inputTCELL11:IMUX.IMUX.6
DIN_A40inputTCELL13:IMUX.IMUX.26
DIN_A41inputTCELL13:IMUX.IMUX.6
DIN_A42inputTCELL13:IMUX.IMUX.28
DIN_A43inputTCELL13:IMUX.IMUX.31
DIN_A44inputTCELL13:IMUX.IMUX.8
DIN_A45inputTCELL13:IMUX.IMUX.32
DIN_A46inputTCELL13:IMUX.IMUX.9
DIN_A47inputTCELL13:IMUX.IMUX.34
DIN_A48inputTCELL13:IMUX.IMUX.10
DIN_A49inputTCELL13:IMUX.IMUX.36
DIN_A5inputTCELL11:IMUX.IMUX.28
DIN_A50inputTCELL13:IMUX.IMUX.39
DIN_A51inputTCELL13:IMUX.IMUX.38
DIN_A52inputTCELL13:IMUX.IMUX.12
DIN_A53inputTCELL13:IMUX.IMUX.40
DIN_A54inputTCELL13:IMUX.IMUX.13
DIN_A55inputTCELL13:IMUX.IMUX.42
DIN_A56inputTCELL14:IMUX.IMUX.23
DIN_A57inputTCELL14:IMUX.IMUX.22
DIN_A58inputTCELL14:IMUX.IMUX.4
DIN_A59inputTCELL14:IMUX.IMUX.24
DIN_A6inputTCELL11:IMUX.IMUX.31
DIN_A60inputTCELL14:IMUX.IMUX.5
DIN_A61inputTCELL14:IMUX.IMUX.26
DIN_A62inputTCELL14:IMUX.IMUX.6
DIN_A63inputTCELL14:IMUX.IMUX.28
DIN_A64inputTCELL14:IMUX.IMUX.31
DIN_A65inputTCELL14:IMUX.IMUX.30
DIN_A66inputTCELL14:IMUX.IMUX.8
DIN_A67inputTCELL14:IMUX.IMUX.32
DIN_A68inputTCELL14:IMUX.IMUX.9
DIN_A69inputTCELL14:IMUX.IMUX.34
DIN_A7inputTCELL11:IMUX.IMUX.30
DIN_A70inputTCELL14:IMUX.IMUX.10
DIN_A71inputTCELL14:IMUX.IMUX.36
DIN_A8inputTCELL11:IMUX.IMUX.8
DIN_A9inputTCELL11:IMUX.IMUX.32
DIN_B0inputTCELL26:IMUX.IMUX.4
DIN_B1inputTCELL26:IMUX.IMUX.24
DIN_B10inputTCELL26:IMUX.IMUX.9
DIN_B11inputTCELL26:IMUX.IMUX.34
DIN_B12inputTCELL26:IMUX.IMUX.10
DIN_B13inputTCELL26:IMUX.IMUX.36
DIN_B14inputTCELL26:IMUX.IMUX.39
DIN_B15inputTCELL26:IMUX.IMUX.38
DIN_B16inputTCELL27:IMUX.IMUX.2
DIN_B17inputTCELL27:IMUX.IMUX.20
DIN_B18inputTCELL27:IMUX.IMUX.4
DIN_B19inputTCELL27:IMUX.IMUX.24
DIN_B2inputTCELL26:IMUX.IMUX.5
DIN_B20inputTCELL27:IMUX.IMUX.5
DIN_B21inputTCELL27:IMUX.IMUX.26
DIN_B22inputTCELL27:IMUX.IMUX.6
DIN_B23inputTCELL27:IMUX.IMUX.28
DIN_B24inputTCELL27:IMUX.IMUX.31
DIN_B25inputTCELL27:IMUX.IMUX.30
DIN_B26inputTCELL27:IMUX.IMUX.8
DIN_B27inputTCELL27:IMUX.IMUX.32
DIN_B28inputTCELL27:IMUX.IMUX.9
DIN_B29inputTCELL27:IMUX.IMUX.34
DIN_B3inputTCELL26:IMUX.IMUX.26
DIN_B30inputTCELL27:IMUX.IMUX.10
DIN_B31inputTCELL27:IMUX.IMUX.36
DIN_B32inputTCELL27:IMUX.IMUX.39
DIN_B33inputTCELL27:IMUX.IMUX.38
DIN_B34inputTCELL27:IMUX.IMUX.12
DIN_B35inputTCELL27:IMUX.IMUX.40
DIN_B36inputTCELL27:IMUX.IMUX.13
DIN_B37inputTCELL27:IMUX.IMUX.42
DIN_B38inputTCELL27:IMUX.IMUX.14
DIN_B39inputTCELL27:IMUX.IMUX.44
DIN_B4inputTCELL26:IMUX.IMUX.6
DIN_B40inputTCELL28:IMUX.IMUX.26
DIN_B41inputTCELL28:IMUX.IMUX.6
DIN_B42inputTCELL28:IMUX.IMUX.28
DIN_B43inputTCELL28:IMUX.IMUX.31
DIN_B44inputTCELL28:IMUX.IMUX.8
DIN_B45inputTCELL28:IMUX.IMUX.32
DIN_B46inputTCELL28:IMUX.IMUX.9
DIN_B47inputTCELL28:IMUX.IMUX.34
DIN_B48inputTCELL28:IMUX.IMUX.10
DIN_B49inputTCELL28:IMUX.IMUX.36
DIN_B5inputTCELL26:IMUX.IMUX.28
DIN_B50inputTCELL28:IMUX.IMUX.39
DIN_B51inputTCELL28:IMUX.IMUX.38
DIN_B52inputTCELL28:IMUX.IMUX.12
DIN_B53inputTCELL28:IMUX.IMUX.40
DIN_B54inputTCELL28:IMUX.IMUX.13
DIN_B55inputTCELL28:IMUX.IMUX.42
DIN_B56inputTCELL29:IMUX.IMUX.23
DIN_B57inputTCELL29:IMUX.IMUX.22
DIN_B58inputTCELL29:IMUX.IMUX.4
DIN_B59inputTCELL29:IMUX.IMUX.24
DIN_B6inputTCELL26:IMUX.IMUX.31
DIN_B60inputTCELL29:IMUX.IMUX.5
DIN_B61inputTCELL29:IMUX.IMUX.26
DIN_B62inputTCELL29:IMUX.IMUX.6
DIN_B63inputTCELL29:IMUX.IMUX.28
DIN_B64inputTCELL29:IMUX.IMUX.31
DIN_B65inputTCELL29:IMUX.IMUX.30
DIN_B66inputTCELL29:IMUX.IMUX.8
DIN_B67inputTCELL29:IMUX.IMUX.32
DIN_B68inputTCELL29:IMUX.IMUX.9
DIN_B69inputTCELL29:IMUX.IMUX.34
DIN_B7inputTCELL26:IMUX.IMUX.30
DIN_B70inputTCELL29:IMUX.IMUX.10
DIN_B71inputTCELL29:IMUX.IMUX.36
DIN_B8inputTCELL26:IMUX.IMUX.8
DIN_B9inputTCELL26:IMUX.IMUX.32
DOUT_A0outputTCELL11:OUT.8
DOUT_A1outputTCELL11:OUT.9
DOUT_A10outputTCELL11:OUT.18
DOUT_A11outputTCELL11:OUT.19
DOUT_A12outputTCELL11:OUT.22
DOUT_A13outputTCELL11:OUT.24
DOUT_A14outputTCELL11:OUT.28
DOUT_A15outputTCELL11:OUT.29
DOUT_A16outputTCELL11:OUT.30
DOUT_A17outputTCELL12:OUT.0
DOUT_A18outputTCELL12:OUT.4
DOUT_A19outputTCELL12:OUT.5
DOUT_A2outputTCELL11:OUT.10
DOUT_A20outputTCELL12:OUT.8
DOUT_A21outputTCELL12:OUT.11
DOUT_A22outputTCELL12:OUT.12
DOUT_A23outputTCELL12:OUT.13
DOUT_A24outputTCELL12:OUT.14
DOUT_A25outputTCELL12:OUT.15
DOUT_A26outputTCELL12:OUT.16
DOUT_A27outputTCELL12:OUT.17
DOUT_A28outputTCELL12:OUT.18
DOUT_A29outputTCELL12:OUT.19
DOUT_A3outputTCELL11:OUT.11
DOUT_A30outputTCELL12:OUT.20
DOUT_A31outputTCELL12:OUT.21
DOUT_A32outputTCELL12:OUT.22
DOUT_A33outputTCELL12:OUT.23
DOUT_A34outputTCELL12:OUT.24
DOUT_A35outputTCELL12:OUT.25
DOUT_A36outputTCELL12:OUT.26
DOUT_A37outputTCELL12:OUT.27
DOUT_A38outputTCELL12:OUT.28
DOUT_A39outputTCELL13:OUT.1
DOUT_A4outputTCELL11:OUT.12
DOUT_A40outputTCELL13:OUT.7
DOUT_A41outputTCELL13:OUT.11
DOUT_A42outputTCELL13:OUT.13
DOUT_A43outputTCELL13:OUT.14
DOUT_A44outputTCELL13:OUT.15
DOUT_A45outputTCELL13:OUT.17
DOUT_A46outputTCELL13:OUT.18
DOUT_A47outputTCELL13:OUT.19
DOUT_A48outputTCELL13:OUT.20
DOUT_A49outputTCELL13:OUT.21
DOUT_A5outputTCELL11:OUT.13
DOUT_A50outputTCELL13:OUT.22
DOUT_A51outputTCELL13:OUT.23
DOUT_A52outputTCELL13:OUT.25
DOUT_A53outputTCELL13:OUT.27
DOUT_A54outputTCELL13:OUT.30
DOUT_A55outputTCELL14:OUT.0
DOUT_A56outputTCELL14:OUT.2
DOUT_A57outputTCELL14:OUT.4
DOUT_A58outputTCELL14:OUT.6
DOUT_A59outputTCELL14:OUT.8
DOUT_A6outputTCELL11:OUT.14
DOUT_A60outputTCELL14:OUT.10
DOUT_A61outputTCELL14:OUT.11
DOUT_A62outputTCELL14:OUT.12
DOUT_A63outputTCELL14:OUT.13
DOUT_A64outputTCELL14:OUT.14
DOUT_A65outputTCELL14:OUT.15
DOUT_A66outputTCELL14:OUT.16
DOUT_A67outputTCELL14:OUT.17
DOUT_A68outputTCELL14:OUT.18
DOUT_A69outputTCELL14:OUT.19
DOUT_A7outputTCELL11:OUT.15
DOUT_A70outputTCELL14:OUT.20
DOUT_A71outputTCELL14:OUT.24
DOUT_A8outputTCELL11:OUT.16
DOUT_A9outputTCELL11:OUT.17
DOUT_B0outputTCELL26:OUT.8
DOUT_B1outputTCELL26:OUT.9
DOUT_B10outputTCELL26:OUT.18
DOUT_B11outputTCELL26:OUT.19
DOUT_B12outputTCELL26:OUT.22
DOUT_B13outputTCELL26:OUT.24
DOUT_B14outputTCELL26:OUT.28
DOUT_B15outputTCELL26:OUT.29
DOUT_B16outputTCELL26:OUT.30
DOUT_B17outputTCELL27:OUT.0
DOUT_B18outputTCELL27:OUT.4
DOUT_B19outputTCELL27:OUT.5
DOUT_B2outputTCELL26:OUT.10
DOUT_B20outputTCELL27:OUT.8
DOUT_B21outputTCELL27:OUT.11
DOUT_B22outputTCELL27:OUT.12
DOUT_B23outputTCELL27:OUT.13
DOUT_B24outputTCELL27:OUT.14
DOUT_B25outputTCELL27:OUT.15
DOUT_B26outputTCELL27:OUT.16
DOUT_B27outputTCELL27:OUT.17
DOUT_B28outputTCELL27:OUT.18
DOUT_B29outputTCELL27:OUT.19
DOUT_B3outputTCELL26:OUT.11
DOUT_B30outputTCELL27:OUT.20
DOUT_B31outputTCELL27:OUT.21
DOUT_B32outputTCELL27:OUT.22
DOUT_B33outputTCELL27:OUT.23
DOUT_B34outputTCELL27:OUT.24
DOUT_B35outputTCELL27:OUT.25
DOUT_B36outputTCELL27:OUT.26
DOUT_B37outputTCELL27:OUT.27
DOUT_B38outputTCELL27:OUT.28
DOUT_B39outputTCELL28:OUT.1
DOUT_B4outputTCELL26:OUT.12
DOUT_B40outputTCELL28:OUT.7
DOUT_B41outputTCELL28:OUT.11
DOUT_B42outputTCELL28:OUT.13
DOUT_B43outputTCELL28:OUT.14
DOUT_B44outputTCELL28:OUT.15
DOUT_B45outputTCELL28:OUT.17
DOUT_B46outputTCELL28:OUT.18
DOUT_B47outputTCELL28:OUT.19
DOUT_B48outputTCELL28:OUT.20
DOUT_B49outputTCELL28:OUT.21
DOUT_B5outputTCELL26:OUT.13
DOUT_B50outputTCELL28:OUT.22
DOUT_B51outputTCELL28:OUT.23
DOUT_B52outputTCELL28:OUT.25
DOUT_B53outputTCELL28:OUT.27
DOUT_B54outputTCELL28:OUT.30
DOUT_B55outputTCELL29:OUT.0
DOUT_B56outputTCELL29:OUT.2
DOUT_B57outputTCELL29:OUT.4
DOUT_B58outputTCELL29:OUT.6
DOUT_B59outputTCELL29:OUT.8
DOUT_B6outputTCELL26:OUT.14
DOUT_B60outputTCELL29:OUT.10
DOUT_B61outputTCELL29:OUT.11
DOUT_B62outputTCELL29:OUT.12
DOUT_B63outputTCELL29:OUT.13
DOUT_B64outputTCELL29:OUT.14
DOUT_B65outputTCELL29:OUT.15
DOUT_B66outputTCELL29:OUT.16
DOUT_B67outputTCELL29:OUT.17
DOUT_B68outputTCELL29:OUT.18
DOUT_B69outputTCELL29:OUT.19
DOUT_B7outputTCELL26:OUT.15
DOUT_B70outputTCELL29:OUT.20
DOUT_B71outputTCELL29:OUT.24
DOUT_B8outputTCELL26:OUT.16
DOUT_B9outputTCELL26:OUT.17
EN_AinputTCELL13:IMUX.CTRL.5
EN_BinputTCELL28:IMUX.CTRL.5
INJECT_DBITERR_AinputTCELL12:IMUX.IMUX.47
INJECT_DBITERR_BinputTCELL27:IMUX.IMUX.47
INJECT_SBITERR_AinputTCELL12:IMUX.IMUX.46
INJECT_SBITERR_BinputTCELL27:IMUX.IMUX.46
OREG_CAS_CE_AinputTCELL12:IMUX.CTRL.1
OREG_CAS_CE_BinputTCELL27:IMUX.CTRL.1
OREG_CE_AinputTCELL12:IMUX.CTRL.5
OREG_CE_BinputTCELL27:IMUX.CTRL.5
OREG_ECC_CE_AinputTCELL12:IMUX.CTRL.4
OREG_ECC_CE_BinputTCELL27:IMUX.CTRL.4
RDACCESS_AoutputTCELL12:OUT.6
RDACCESS_BoutputTCELL27:OUT.6
RDB_WR_AinputTCELL13:IMUX.CTRL.4
RDB_WR_BinputTCELL28:IMUX.CTRL.4
RST_AinputTCELL13:IMUX.CTRL.1
RST_BinputTCELL28:IMUX.CTRL.1
SBITERR_AoutputTCELL12:OUT.7
SBITERR_BoutputTCELL27:OUT.7
SHUTDOWNinputTCELL12:IMUX.CTRL.3
SLEEPinputTCELL12:IMUX.CTRL.0
TST_DEEPSLEEP_OUToutputTCELL12:OUT.2
TST_RING_ENBinputTCELL14:IMUX.CTRL.6
TST_RING_OUToutputTCELL14:OUT.22
TST_RING_STARTBinputTCELL14:IMUX.CTRL.5
TST_SHUTDOWN_OUToutputTCELL12:OUT.3
TST_SLEEP_OUToutputTCELL12:OUT.1

Bel wires

ultrascaleplus URAM bel wires
WirePins
TCELL0:OUT.0URAM0.DOUT_A0
TCELL0:OUT.1URAM0.DOUT_A1
TCELL0:OUT.2URAM0.DOUT_A2
TCELL0:OUT.3URAM0.DOUT_A3
TCELL0:OUT.4URAM0.DOUT_A4
TCELL0:OUT.5URAM0.DOUT_A5
TCELL0:OUT.6URAM0.DOUT_A6
TCELL0:OUT.7URAM0.DOUT_A7
TCELL0:OUT.8URAM0.DOUT_A8
TCELL0:OUT.9URAM0.DOUT_A9
TCELL0:OUT.10URAM0.DOUT_A10
TCELL0:OUT.11URAM0.DOUT_A11
TCELL0:OUT.14URAM0.DOUT_A12
TCELL0:OUT.16URAM0.DOUT_A13
TCELL0:OUT.20URAM0.DOUT_A14
TCELL0:OUT.21URAM0.DOUT_A15
TCELL0:OUT.22URAM0.DOUT_A16
TCELL0:OUT.23URAM0.DBITERR_A
TCELL0:OUT.24URAM0.DOUT_A17
TCELL0:OUT.25URAM0.TST_SLEEP_OUT
TCELL0:OUT.26URAM0.TST_DEEPSLEEP_OUT
TCELL0:OUT.27URAM0.TST_SHUTDOWN_OUT
TCELL0:OUT.28URAM0.DOUT_A18
TCELL0:OUT.29URAM0.DOUT_A19
TCELL0:OUT.30URAM0.RDACCESS_A
TCELL0:OUT.31URAM0.SBITERR_A
TCELL0:IMUX.CTRL.6URAM0.SLEEP
TCELL0:IMUX.CTRL.7URAM0.OREG_CAS_CE_A
TCELL0:IMUX.IMUX.0URAM0.DIN_A0
TCELL0:IMUX.IMUX.1URAM0.DIN_A2
TCELL0:IMUX.IMUX.2URAM0.DIN_A4
TCELL0:IMUX.IMUX.4URAM0.DIN_A8
TCELL0:IMUX.IMUX.5URAM0.DIN_A10
TCELL0:IMUX.IMUX.6URAM0.DIN_A12
TCELL0:IMUX.IMUX.8URAM0.ADDR_A0
TCELL0:IMUX.IMUX.9URAM0.ADDR_A2
TCELL0:IMUX.IMUX.10URAM0.ADDR_A4
TCELL0:IMUX.IMUX.12URAM0.ADDR_A8
TCELL0:IMUX.IMUX.13URAM0.ADDR_A10
TCELL0:IMUX.IMUX.14URAM0.DIN_A16
TCELL0:IMUX.IMUX.16URAM0.DIN_A1
TCELL0:IMUX.IMUX.18URAM0.DIN_A3
TCELL0:IMUX.IMUX.20URAM0.DIN_A5
TCELL0:IMUX.IMUX.22URAM0.DIN_A7
TCELL0:IMUX.IMUX.23URAM0.DIN_A6
TCELL0:IMUX.IMUX.24URAM0.DIN_A9
TCELL0:IMUX.IMUX.26URAM0.DIN_A11
TCELL0:IMUX.IMUX.28URAM0.DIN_A13
TCELL0:IMUX.IMUX.30URAM0.DIN_A15
TCELL0:IMUX.IMUX.31URAM0.DIN_A14
TCELL0:IMUX.IMUX.32URAM0.ADDR_A1
TCELL0:IMUX.IMUX.34URAM0.ADDR_A3
TCELL0:IMUX.IMUX.36URAM0.ADDR_A5
TCELL0:IMUX.IMUX.38URAM0.ADDR_A7
TCELL0:IMUX.IMUX.39URAM0.ADDR_A6
TCELL0:IMUX.IMUX.40URAM0.ADDR_A9
TCELL0:IMUX.IMUX.42URAM0.ADDR_A11
TCELL0:IMUX.IMUX.44URAM0.DIN_A17
TCELL1:OUT.0URAM0.DOUT_A20
TCELL1:OUT.3URAM0.DOUT_A21
TCELL1:OUT.4URAM0.DOUT_A22
TCELL1:OUT.5URAM0.DOUT_A23
TCELL1:OUT.6URAM0.DOUT_A24
TCELL1:OUT.7URAM0.DOUT_A25
TCELL1:OUT.8URAM0.DOUT_A26
TCELL1:OUT.9URAM0.DOUT_A27
TCELL1:OUT.10URAM0.DOUT_A28
TCELL1:OUT.11URAM0.DOUT_A29
TCELL1:OUT.12URAM0.DOUT_A30
TCELL1:OUT.13URAM0.DOUT_A31
TCELL1:OUT.14URAM0.DOUT_A32
TCELL1:OUT.15URAM0.DOUT_A33
TCELL1:OUT.16URAM0.DOUT_A34
TCELL1:OUT.17URAM0.DOUT_A35
TCELL1:OUT.18URAM0.DOUT_A36
TCELL1:OUT.19URAM0.DOUT_A37
TCELL1:OUT.20URAM0.DOUT_A38
TCELL1:OUT.25URAM0.DOUT_A39
TCELL1:OUT.31URAM0.DOUT_A40
TCELL1:IMUX.CTRL.0URAM0.DEEPSLEEP
TCELL1:IMUX.CTRL.1URAM0.SHUTDOWN
TCELL1:IMUX.CTRL.2URAM0.OREG_ECC_CE_A
TCELL1:IMUX.CTRL.3URAM0.OREG_CE_A
TCELL1:IMUX.CTRL.7URAM0.RST_A
TCELL1:IMUX.IMUX.0URAM0.DIN_A18
TCELL1:IMUX.IMUX.1URAM0.DIN_A20
TCELL1:IMUX.IMUX.2URAM0.DIN_A22
TCELL1:IMUX.IMUX.4URAM0.DIN_A26
TCELL1:IMUX.IMUX.5URAM0.DIN_A28
TCELL1:IMUX.IMUX.6URAM0.DIN_A30
TCELL1:IMUX.IMUX.8URAM0.DIN_A34
TCELL1:IMUX.IMUX.9URAM0.DIN_A36
TCELL1:IMUX.IMUX.10URAM0.DIN_A38
TCELL1:IMUX.IMUX.12URAM0.ADDR_A12
TCELL1:IMUX.IMUX.13URAM0.ADDR_A14
TCELL1:IMUX.IMUX.14URAM0.ADDR_A16
TCELL1:IMUX.IMUX.16URAM0.DIN_A19
TCELL1:IMUX.IMUX.18URAM0.DIN_A21
TCELL1:IMUX.IMUX.20URAM0.DIN_A23
TCELL1:IMUX.IMUX.22URAM0.DIN_A25
TCELL1:IMUX.IMUX.23URAM0.DIN_A24
TCELL1:IMUX.IMUX.24URAM0.DIN_A27
TCELL1:IMUX.IMUX.26URAM0.DIN_A29
TCELL1:IMUX.IMUX.28URAM0.DIN_A31
TCELL1:IMUX.IMUX.30URAM0.DIN_A33
TCELL1:IMUX.IMUX.31URAM0.DIN_A32
TCELL1:IMUX.IMUX.32URAM0.DIN_A35
TCELL1:IMUX.IMUX.34URAM0.DIN_A37
TCELL1:IMUX.IMUX.36URAM0.DIN_A39
TCELL1:IMUX.IMUX.38URAM0.INJECT_SBITERR_A
TCELL1:IMUX.IMUX.39URAM0.INJECT_DBITERR_A
TCELL1:IMUX.IMUX.40URAM0.ADDR_A13
TCELL1:IMUX.IMUX.42URAM0.ADDR_A15
TCELL1:IMUX.IMUX.44URAM0.ADDR_A17
TCELL1:IMUX.IMUX.46URAM0.ADDR_A19
TCELL1:IMUX.IMUX.47URAM0.ADDR_A18
TCELL2:OUT.3URAM0.DOUT_A41
TCELL2:OUT.5URAM0.DOUT_A42
TCELL2:OUT.6URAM0.DOUT_A43
TCELL2:OUT.7URAM0.DOUT_A44
TCELL2:OUT.9URAM0.DOUT_A45
TCELL2:OUT.10URAM0.DOUT_A46
TCELL2:OUT.11URAM0.DOUT_A47
TCELL2:OUT.12URAM0.DOUT_A48
TCELL2:OUT.13URAM0.DOUT_A49
TCELL2:OUT.14URAM0.DOUT_A50
TCELL2:OUT.15URAM0.DOUT_A51
TCELL2:OUT.17URAM0.DOUT_A52
TCELL2:OUT.19URAM0.DOUT_A53
TCELL2:OUT.22URAM0.DOUT_A54
TCELL2:OUT.24URAM0.DOUT_A55
TCELL2:OUT.26URAM0.DOUT_A56
TCELL2:OUT.28URAM0.DOUT_A57
TCELL2:OUT.30URAM0.DOUT_A58
TCELL2:IMUX.CTRL.2URAM0.RDB_WR_A
TCELL2:IMUX.CTRL.3URAM0.EN_A
TCELL2:IMUX.CTRL.4URAM0.CLK
TCELL2:IMUX.IMUX.0URAM0.ADDR_A20
TCELL2:IMUX.IMUX.1URAM0.ADDR_A22
TCELL2:IMUX.IMUX.2URAM0.DIN_A41
TCELL2:IMUX.IMUX.4URAM0.DIN_A44
TCELL2:IMUX.IMUX.5URAM0.DIN_A46
TCELL2:IMUX.IMUX.6URAM0.DIN_A48
TCELL2:IMUX.IMUX.8URAM0.DIN_A52
TCELL2:IMUX.IMUX.9URAM0.DIN_A54
TCELL2:IMUX.IMUX.10URAM0.BWE_A0
TCELL2:IMUX.IMUX.12URAM0.BWE_A4
TCELL2:IMUX.IMUX.13URAM0.BWE_A6
TCELL2:IMUX.IMUX.14URAM0.BWE_A8
TCELL2:IMUX.IMUX.16URAM0.ADDR_A21
TCELL2:IMUX.IMUX.18URAM0.DIN_A40
TCELL2:IMUX.IMUX.20URAM0.DIN_A42
TCELL2:IMUX.IMUX.23URAM0.DIN_A43
TCELL2:IMUX.IMUX.24URAM0.DIN_A45
TCELL2:IMUX.IMUX.26URAM0.DIN_A47
TCELL2:IMUX.IMUX.28URAM0.DIN_A49
TCELL2:IMUX.IMUX.30URAM0.DIN_A51
TCELL2:IMUX.IMUX.31URAM0.DIN_A50
TCELL2:IMUX.IMUX.32URAM0.DIN_A53
TCELL2:IMUX.IMUX.34URAM0.DIN_A55
TCELL2:IMUX.IMUX.36URAM0.BWE_A1
TCELL2:IMUX.IMUX.38URAM0.BWE_A3
TCELL2:IMUX.IMUX.39URAM0.BWE_A2
TCELL2:IMUX.IMUX.40URAM0.BWE_A5
TCELL2:IMUX.IMUX.42URAM0.BWE_A7
TCELL2:IMUX.IMUX.46URAM0.DIN_A57
TCELL2:IMUX.IMUX.47URAM0.DIN_A56
TCELL3:OUT.0URAM0.DOUT_A59
TCELL3:OUT.2URAM0.DOUT_A60
TCELL3:OUT.3URAM0.DOUT_A61
TCELL3:OUT.4URAM0.DOUT_A62
TCELL3:OUT.5URAM0.DOUT_A63
TCELL3:OUT.6URAM0.DOUT_A64
TCELL3:OUT.7URAM0.DOUT_A65
TCELL3:OUT.8URAM0.DOUT_A66
TCELL3:OUT.9URAM0.DOUT_A67
TCELL3:OUT.10URAM0.DOUT_A68
TCELL3:OUT.11URAM0.DOUT_A69
TCELL3:OUT.12URAM0.DOUT_A70
TCELL3:OUT.14URAM0.TST_RING_OUT
TCELL3:OUT.16URAM0.DOUT_A71
TCELL3:OUT.24URAM1.DOUT_A0
TCELL3:OUT.25URAM1.DOUT_A1
TCELL3:OUT.26URAM1.DOUT_A2
TCELL3:OUT.27URAM1.DOUT_A3
TCELL3:OUT.28URAM1.DOUT_A4
TCELL3:OUT.29URAM1.DOUT_A5
TCELL3:OUT.30URAM1.DOUT_A6
TCELL3:OUT.31URAM1.DOUT_A7
TCELL3:IMUX.CTRL.3URAM0.TST_RING_STARTB
TCELL3:IMUX.CTRL.4URAM0.TST_RING_ENB
TCELL3:IMUX.IMUX.0URAM0.DIN_A58
TCELL3:IMUX.IMUX.1URAM0.DIN_A60
TCELL3:IMUX.IMUX.2URAM0.DIN_A62
TCELL3:IMUX.IMUX.4URAM0.DIN_A66
TCELL3:IMUX.IMUX.5URAM0.DIN_A68
TCELL3:IMUX.IMUX.6URAM0.DIN_A70
TCELL3:IMUX.IMUX.12URAM1.DIN_A0
TCELL3:IMUX.IMUX.13URAM1.DIN_A2
TCELL3:IMUX.IMUX.14URAM1.DIN_A4
TCELL3:IMUX.IMUX.16URAM0.DIN_A59
TCELL3:IMUX.IMUX.18URAM0.DIN_A61
TCELL3:IMUX.IMUX.20URAM0.DIN_A63
TCELL3:IMUX.IMUX.22URAM0.DIN_A65
TCELL3:IMUX.IMUX.23URAM0.DIN_A64
TCELL3:IMUX.IMUX.24URAM0.DIN_A67
TCELL3:IMUX.IMUX.26URAM0.DIN_A69
TCELL3:IMUX.IMUX.28URAM0.DIN_A71
TCELL3:IMUX.IMUX.40URAM1.DIN_A1
TCELL3:IMUX.IMUX.42URAM1.DIN_A3
TCELL3:IMUX.IMUX.44URAM1.DIN_A5
TCELL3:IMUX.IMUX.46URAM1.DIN_A7
TCELL3:IMUX.IMUX.47URAM1.DIN_A6
TCELL4:OUT.0URAM1.DOUT_A8
TCELL4:OUT.1URAM1.DOUT_A9
TCELL4:OUT.2URAM1.DOUT_A10
TCELL4:OUT.3URAM1.DOUT_A11
TCELL4:OUT.6URAM1.DOUT_A12
TCELL4:OUT.8URAM1.DOUT_A13
TCELL4:OUT.12URAM1.DOUT_A14
TCELL4:OUT.13URAM1.DOUT_A15
TCELL4:OUT.14URAM1.DOUT_A16
TCELL4:OUT.15URAM1.DBITERR_A
TCELL4:OUT.16URAM1.DOUT_A17
TCELL4:OUT.17URAM1.TST_SLEEP_OUT
TCELL4:OUT.18URAM1.TST_DEEPSLEEP_OUT
TCELL4:OUT.19URAM1.TST_SHUTDOWN_OUT
TCELL4:OUT.20URAM1.DOUT_A18
TCELL4:OUT.21URAM1.DOUT_A19
TCELL4:OUT.22URAM1.RDACCESS_A
TCELL4:OUT.23URAM1.SBITERR_A
TCELL4:OUT.24URAM1.DOUT_A20
TCELL4:OUT.27URAM1.DOUT_A21
TCELL4:OUT.28URAM1.DOUT_A22
TCELL4:OUT.29URAM1.DOUT_A23
TCELL4:OUT.30URAM1.DOUT_A24
TCELL4:OUT.31URAM1.DOUT_A25
TCELL4:IMUX.CTRL.4URAM1.SLEEP
TCELL4:IMUX.CTRL.5URAM1.OREG_CAS_CE_A
TCELL4:IMUX.CTRL.6URAM1.DEEPSLEEP
TCELL4:IMUX.CTRL.7URAM1.SHUTDOWN
TCELL4:IMUX.IMUX.0URAM1.DIN_A8
TCELL4:IMUX.IMUX.1URAM1.DIN_A10
TCELL4:IMUX.IMUX.2URAM1.DIN_A12
TCELL4:IMUX.IMUX.4URAM1.ADDR_A0
TCELL4:IMUX.IMUX.5URAM1.ADDR_A2
TCELL4:IMUX.IMUX.6URAM1.ADDR_A4
TCELL4:IMUX.IMUX.8URAM1.ADDR_A8
TCELL4:IMUX.IMUX.9URAM1.ADDR_A10
TCELL4:IMUX.IMUX.10URAM1.DIN_A16
TCELL4:IMUX.IMUX.12URAM1.DIN_A18
TCELL4:IMUX.IMUX.13URAM1.DIN_A20
TCELL4:IMUX.IMUX.14URAM1.DIN_A22
TCELL4:IMUX.IMUX.16URAM1.DIN_A9
TCELL4:IMUX.IMUX.18URAM1.DIN_A11
TCELL4:IMUX.IMUX.20URAM1.DIN_A13
TCELL4:IMUX.IMUX.22URAM1.DIN_A15
TCELL4:IMUX.IMUX.23URAM1.DIN_A14
TCELL4:IMUX.IMUX.24URAM1.ADDR_A1
TCELL4:IMUX.IMUX.26URAM1.ADDR_A3
TCELL4:IMUX.IMUX.28URAM1.ADDR_A5
TCELL4:IMUX.IMUX.30URAM1.ADDR_A7
TCELL4:IMUX.IMUX.31URAM1.ADDR_A6
TCELL4:IMUX.IMUX.32URAM1.ADDR_A9
TCELL4:IMUX.IMUX.34URAM1.ADDR_A11
TCELL4:IMUX.IMUX.36URAM1.DIN_A17
TCELL4:IMUX.IMUX.40URAM1.DIN_A19
TCELL4:IMUX.IMUX.42URAM1.DIN_A21
TCELL4:IMUX.IMUX.44URAM1.DIN_A23
TCELL4:IMUX.IMUX.46URAM1.DIN_A25
TCELL4:IMUX.IMUX.47URAM1.DIN_A24
TCELL5:OUT.0URAM1.DOUT_A26
TCELL5:OUT.1URAM1.DOUT_A27
TCELL5:OUT.2URAM1.DOUT_A28
TCELL5:OUT.3URAM1.DOUT_A29
TCELL5:OUT.4URAM1.DOUT_A30
TCELL5:OUT.5URAM1.DOUT_A31
TCELL5:OUT.6URAM1.DOUT_A32
TCELL5:OUT.7URAM1.DOUT_A33
TCELL5:OUT.8URAM1.DOUT_A34
TCELL5:OUT.9URAM1.DOUT_A35
TCELL5:OUT.10URAM1.DOUT_A36
TCELL5:OUT.11URAM1.DOUT_A37
TCELL5:OUT.12URAM1.DOUT_A38
TCELL5:OUT.17URAM1.DOUT_A39
TCELL5:OUT.23URAM1.DOUT_A40
TCELL5:OUT.27URAM1.DOUT_A41
TCELL5:OUT.29URAM1.DOUT_A42
TCELL5:OUT.30URAM1.DOUT_A43
TCELL5:OUT.31URAM1.DOUT_A44
TCELL5:IMUX.CTRL.0URAM1.OREG_ECC_CE_A
TCELL5:IMUX.CTRL.1URAM1.OREG_CE_A
TCELL5:IMUX.CTRL.5URAM1.RST_A
TCELL5:IMUX.IMUX.0URAM1.DIN_A26
TCELL5:IMUX.IMUX.1URAM1.DIN_A28
TCELL5:IMUX.IMUX.2URAM1.DIN_A30
TCELL5:IMUX.IMUX.4URAM1.DIN_A34
TCELL5:IMUX.IMUX.5URAM1.DIN_A36
TCELL5:IMUX.IMUX.6URAM1.DIN_A38
TCELL5:IMUX.IMUX.8URAM1.ADDR_A12
TCELL5:IMUX.IMUX.9URAM1.ADDR_A14
TCELL5:IMUX.IMUX.10URAM1.ADDR_A16
TCELL5:IMUX.IMUX.12URAM1.ADDR_A20
TCELL5:IMUX.IMUX.13URAM1.ADDR_A22
TCELL5:IMUX.IMUX.14URAM1.DIN_A41
TCELL5:IMUX.IMUX.16URAM1.DIN_A27
TCELL5:IMUX.IMUX.18URAM1.DIN_A29
TCELL5:IMUX.IMUX.20URAM1.DIN_A31
TCELL5:IMUX.IMUX.22URAM1.DIN_A33
TCELL5:IMUX.IMUX.23URAM1.DIN_A32
TCELL5:IMUX.IMUX.24URAM1.DIN_A35
TCELL5:IMUX.IMUX.26URAM1.DIN_A37
TCELL5:IMUX.IMUX.28URAM1.DIN_A39
TCELL5:IMUX.IMUX.30URAM1.INJECT_SBITERR_A
TCELL5:IMUX.IMUX.31URAM1.INJECT_DBITERR_A
TCELL5:IMUX.IMUX.32URAM1.ADDR_A13
TCELL5:IMUX.IMUX.34URAM1.ADDR_A15
TCELL5:IMUX.IMUX.36URAM1.ADDR_A17
TCELL5:IMUX.IMUX.38URAM1.ADDR_A19
TCELL5:IMUX.IMUX.39URAM1.ADDR_A18
TCELL5:IMUX.IMUX.40URAM1.ADDR_A21
TCELL5:IMUX.IMUX.42URAM1.DIN_A40
TCELL5:IMUX.IMUX.44URAM1.DIN_A42
TCELL5:IMUX.IMUX.47URAM1.DIN_A43
TCELL6:OUT.1URAM1.DOUT_A45
TCELL6:OUT.2URAM1.DOUT_A46
TCELL6:OUT.3URAM1.DOUT_A47
TCELL6:OUT.4URAM1.DOUT_A48
TCELL6:OUT.5URAM1.DOUT_A49
TCELL6:OUT.6URAM1.DOUT_A50
TCELL6:OUT.7URAM1.DOUT_A51
TCELL6:OUT.9URAM1.DOUT_A52
TCELL6:OUT.11URAM1.DOUT_A53
TCELL6:OUT.14URAM1.DOUT_A54
TCELL6:OUT.16URAM1.DOUT_A55
TCELL6:OUT.18URAM1.DOUT_A56
TCELL6:OUT.20URAM1.DOUT_A57
TCELL6:OUT.22URAM1.DOUT_A58
TCELL6:OUT.24URAM1.DOUT_A59
TCELL6:OUT.26URAM1.DOUT_A60
TCELL6:OUT.27URAM1.DOUT_A61
TCELL6:OUT.28URAM1.DOUT_A62
TCELL6:OUT.29URAM1.DOUT_A63
TCELL6:OUT.30URAM1.DOUT_A64
TCELL6:OUT.31URAM1.DOUT_A65
TCELL6:IMUX.CTRL.0URAM1.RDB_WR_A
TCELL6:IMUX.CTRL.1URAM1.EN_A
TCELL6:IMUX.CTRL.4URAM1.CLK
TCELL6:IMUX.IMUX.0URAM1.DIN_A44
TCELL6:IMUX.IMUX.1URAM1.DIN_A46
TCELL6:IMUX.IMUX.2URAM1.DIN_A48
TCELL6:IMUX.IMUX.4URAM1.DIN_A52
TCELL6:IMUX.IMUX.5URAM1.DIN_A54
TCELL6:IMUX.IMUX.6URAM1.BWE_A0
TCELL6:IMUX.IMUX.8URAM1.BWE_A4
TCELL6:IMUX.IMUX.9URAM1.BWE_A6
TCELL6:IMUX.IMUX.10URAM1.BWE_A8
TCELL6:IMUX.IMUX.12URAM1.DIN_A58
TCELL6:IMUX.IMUX.13URAM1.DIN_A60
TCELL6:IMUX.IMUX.14URAM1.DIN_A62
TCELL6:IMUX.IMUX.16URAM1.DIN_A45
TCELL6:IMUX.IMUX.18URAM1.DIN_A47
TCELL6:IMUX.IMUX.20URAM1.DIN_A49
TCELL6:IMUX.IMUX.22URAM1.DIN_A51
TCELL6:IMUX.IMUX.23URAM1.DIN_A50
TCELL6:IMUX.IMUX.24URAM1.DIN_A53
TCELL6:IMUX.IMUX.26URAM1.DIN_A55
TCELL6:IMUX.IMUX.28URAM1.BWE_A1
TCELL6:IMUX.IMUX.30URAM1.BWE_A3
TCELL6:IMUX.IMUX.31URAM1.BWE_A2
TCELL6:IMUX.IMUX.32URAM1.BWE_A5
TCELL6:IMUX.IMUX.34URAM1.BWE_A7
TCELL6:IMUX.IMUX.38URAM1.DIN_A57
TCELL6:IMUX.IMUX.39URAM1.DIN_A56
TCELL6:IMUX.IMUX.40URAM1.DIN_A59
TCELL6:IMUX.IMUX.42URAM1.DIN_A61
TCELL6:IMUX.IMUX.44URAM1.DIN_A63
TCELL6:IMUX.IMUX.46URAM1.DIN_A65
TCELL6:IMUX.IMUX.47URAM1.DIN_A64
TCELL7:OUT.0URAM1.DOUT_A66
TCELL7:OUT.1URAM1.DOUT_A67
TCELL7:OUT.2URAM1.DOUT_A68
TCELL7:OUT.3URAM1.DOUT_A69
TCELL7:OUT.4URAM1.DOUT_A70
TCELL7:OUT.6URAM1.TST_RING_OUT
TCELL7:OUT.8URAM1.DOUT_A71
TCELL7:OUT.16URAM2.DOUT_A0
TCELL7:OUT.17URAM2.DOUT_A1
TCELL7:OUT.18URAM2.DOUT_A2
TCELL7:OUT.19URAM2.DOUT_A3
TCELL7:OUT.20URAM2.DOUT_A4
TCELL7:OUT.21URAM2.DOUT_A5
TCELL7:OUT.22URAM2.DOUT_A6
TCELL7:OUT.23URAM2.DOUT_A7
TCELL7:OUT.24URAM2.DOUT_A8
TCELL7:OUT.25URAM2.DOUT_A9
TCELL7:OUT.26URAM2.DOUT_A10
TCELL7:OUT.27URAM2.DOUT_A11
TCELL7:OUT.30URAM2.DOUT_A12
TCELL7:IMUX.CTRL.1URAM1.TST_RING_STARTB
TCELL7:IMUX.CTRL.2URAM1.TST_RING_ENB
TCELL7:IMUX.IMUX.0URAM1.DIN_A66
TCELL7:IMUX.IMUX.1URAM1.DIN_A68
TCELL7:IMUX.IMUX.2URAM1.DIN_A70
TCELL7:IMUX.IMUX.8URAM2.DIN_A0
TCELL7:IMUX.IMUX.9URAM2.DIN_A2
TCELL7:IMUX.IMUX.10URAM2.DIN_A4
TCELL7:IMUX.IMUX.12URAM2.DIN_A8
TCELL7:IMUX.IMUX.13URAM2.DIN_A10
TCELL7:IMUX.IMUX.14URAM2.DIN_A12
TCELL7:IMUX.IMUX.16URAM1.DIN_A67
TCELL7:IMUX.IMUX.18URAM1.DIN_A69
TCELL7:IMUX.IMUX.20URAM1.DIN_A71
TCELL7:IMUX.IMUX.32URAM2.DIN_A1
TCELL7:IMUX.IMUX.34URAM2.DIN_A3
TCELL7:IMUX.IMUX.36URAM2.DIN_A5
TCELL7:IMUX.IMUX.38URAM2.DIN_A7
TCELL7:IMUX.IMUX.39URAM2.DIN_A6
TCELL7:IMUX.IMUX.40URAM2.DIN_A9
TCELL7:IMUX.IMUX.42URAM2.DIN_A11
TCELL7:IMUX.IMUX.44URAM2.DIN_A13
TCELL7:IMUX.IMUX.46URAM2.DIN_A15
TCELL7:IMUX.IMUX.47URAM2.DIN_A14
TCELL8:OUT.0URAM2.DOUT_A13
TCELL8:OUT.4URAM2.DOUT_A14
TCELL8:OUT.5URAM2.DOUT_A15
TCELL8:OUT.6URAM2.DOUT_A16
TCELL8:OUT.7URAM2.DBITERR_A
TCELL8:OUT.8URAM2.DOUT_A17
TCELL8:OUT.9URAM2.TST_SLEEP_OUT
TCELL8:OUT.10URAM2.TST_DEEPSLEEP_OUT
TCELL8:OUT.11URAM2.TST_SHUTDOWN_OUT
TCELL8:OUT.12URAM2.DOUT_A18
TCELL8:OUT.13URAM2.DOUT_A19
TCELL8:OUT.14URAM2.RDACCESS_A
TCELL8:OUT.15URAM2.SBITERR_A
TCELL8:OUT.16URAM2.DOUT_A20
TCELL8:OUT.19URAM2.DOUT_A21
TCELL8:OUT.20URAM2.DOUT_A22
TCELL8:OUT.21URAM2.DOUT_A23
TCELL8:OUT.22URAM2.DOUT_A24
TCELL8:OUT.23URAM2.DOUT_A25
TCELL8:OUT.24URAM2.DOUT_A26
TCELL8:OUT.25URAM2.DOUT_A27
TCELL8:OUT.26URAM2.DOUT_A28
TCELL8:OUT.27URAM2.DOUT_A29
TCELL8:OUT.28URAM2.DOUT_A30
TCELL8:OUT.29URAM2.DOUT_A31
TCELL8:OUT.30URAM2.DOUT_A32
TCELL8:OUT.31URAM2.DOUT_A33
TCELL8:IMUX.CTRL.2URAM2.SLEEP
TCELL8:IMUX.CTRL.3URAM2.OREG_CAS_CE_A
TCELL8:IMUX.CTRL.4URAM2.DEEPSLEEP
TCELL8:IMUX.CTRL.5URAM2.SHUTDOWN
TCELL8:IMUX.CTRL.6URAM2.OREG_ECC_CE_A
TCELL8:IMUX.CTRL.7URAM2.OREG_CE_A
TCELL8:IMUX.IMUX.0URAM2.ADDR_A0
TCELL8:IMUX.IMUX.1URAM2.ADDR_A2
TCELL8:IMUX.IMUX.2URAM2.ADDR_A4
TCELL8:IMUX.IMUX.4URAM2.ADDR_A8
TCELL8:IMUX.IMUX.5URAM2.ADDR_A10
TCELL8:IMUX.IMUX.6URAM2.DIN_A16
TCELL8:IMUX.IMUX.8URAM2.DIN_A18
TCELL8:IMUX.IMUX.9URAM2.DIN_A20
TCELL8:IMUX.IMUX.10URAM2.DIN_A22
TCELL8:IMUX.IMUX.12URAM2.DIN_A26
TCELL8:IMUX.IMUX.13URAM2.DIN_A28
TCELL8:IMUX.IMUX.14URAM2.DIN_A30
TCELL8:IMUX.IMUX.16URAM2.ADDR_A1
TCELL8:IMUX.IMUX.18URAM2.ADDR_A3
TCELL8:IMUX.IMUX.20URAM2.ADDR_A5
TCELL8:IMUX.IMUX.22URAM2.ADDR_A7
TCELL8:IMUX.IMUX.23URAM2.ADDR_A6
TCELL8:IMUX.IMUX.24URAM2.ADDR_A9
TCELL8:IMUX.IMUX.26URAM2.ADDR_A11
TCELL8:IMUX.IMUX.28URAM2.DIN_A17
TCELL8:IMUX.IMUX.32URAM2.DIN_A19
TCELL8:IMUX.IMUX.34URAM2.DIN_A21
TCELL8:IMUX.IMUX.36URAM2.DIN_A23
TCELL8:IMUX.IMUX.38URAM2.DIN_A25
TCELL8:IMUX.IMUX.39URAM2.DIN_A24
TCELL8:IMUX.IMUX.40URAM2.DIN_A27
TCELL8:IMUX.IMUX.42URAM2.DIN_A29
TCELL8:IMUX.IMUX.44URAM2.DIN_A31
TCELL8:IMUX.IMUX.46URAM2.DIN_A33
TCELL8:IMUX.IMUX.47URAM2.DIN_A32
TCELL9:OUT.0URAM2.DOUT_A34
TCELL9:OUT.1URAM2.DOUT_A35
TCELL9:OUT.2URAM2.DOUT_A36
TCELL9:OUT.3URAM2.DOUT_A37
TCELL9:OUT.4URAM2.DOUT_A38
TCELL9:OUT.9URAM2.DOUT_A39
TCELL9:OUT.15URAM2.DOUT_A40
TCELL9:OUT.19URAM2.DOUT_A41
TCELL9:OUT.21URAM2.DOUT_A42
TCELL9:OUT.22URAM2.DOUT_A43
TCELL9:OUT.23URAM2.DOUT_A44
TCELL9:OUT.25URAM2.DOUT_A45
TCELL9:OUT.26URAM2.DOUT_A46
TCELL9:OUT.27URAM2.DOUT_A47
TCELL9:OUT.28URAM2.DOUT_A48
TCELL9:OUT.29URAM2.DOUT_A49
TCELL9:OUT.30URAM2.DOUT_A50
TCELL9:OUT.31URAM2.DOUT_A51
TCELL9:IMUX.CTRL.3URAM2.RST_A
TCELL9:IMUX.CTRL.6URAM2.RDB_WR_A
TCELL9:IMUX.CTRL.7URAM2.EN_A
TCELL9:IMUX.IMUX.0URAM2.DIN_A34
TCELL9:IMUX.IMUX.1URAM2.DIN_A36
TCELL9:IMUX.IMUX.2URAM2.DIN_A38
TCELL9:IMUX.IMUX.4URAM2.ADDR_A12
TCELL9:IMUX.IMUX.5URAM2.ADDR_A14
TCELL9:IMUX.IMUX.6URAM2.ADDR_A16
TCELL9:IMUX.IMUX.8URAM2.ADDR_A20
TCELL9:IMUX.IMUX.9URAM2.ADDR_A22
TCELL9:IMUX.IMUX.10URAM2.DIN_A41
TCELL9:IMUX.IMUX.12URAM2.DIN_A44
TCELL9:IMUX.IMUX.13URAM2.DIN_A46
TCELL9:IMUX.IMUX.14URAM2.DIN_A48
TCELL9:IMUX.IMUX.16URAM2.DIN_A35
TCELL9:IMUX.IMUX.18URAM2.DIN_A37
TCELL9:IMUX.IMUX.20URAM2.DIN_A39
TCELL9:IMUX.IMUX.22URAM2.INJECT_SBITERR_A
TCELL9:IMUX.IMUX.23URAM2.INJECT_DBITERR_A
TCELL9:IMUX.IMUX.24URAM2.ADDR_A13
TCELL9:IMUX.IMUX.26URAM2.ADDR_A15
TCELL9:IMUX.IMUX.28URAM2.ADDR_A17
TCELL9:IMUX.IMUX.30URAM2.ADDR_A19
TCELL9:IMUX.IMUX.31URAM2.ADDR_A18
TCELL9:IMUX.IMUX.32URAM2.ADDR_A21
TCELL9:IMUX.IMUX.34URAM2.DIN_A40
TCELL9:IMUX.IMUX.36URAM2.DIN_A42
TCELL9:IMUX.IMUX.39URAM2.DIN_A43
TCELL9:IMUX.IMUX.40URAM2.DIN_A45
TCELL9:IMUX.IMUX.42URAM2.DIN_A47
TCELL9:IMUX.IMUX.44URAM2.DIN_A49
TCELL9:IMUX.IMUX.46URAM2.DIN_A51
TCELL9:IMUX.IMUX.47URAM2.DIN_A50
TCELL10:OUT.1URAM2.DOUT_A52
TCELL10:OUT.3URAM2.DOUT_A53
TCELL10:OUT.6URAM2.DOUT_A54
TCELL10:OUT.8URAM2.DOUT_A55
TCELL10:OUT.10URAM2.DOUT_A56
TCELL10:OUT.12URAM2.DOUT_A57
TCELL10:OUT.14URAM2.DOUT_A58
TCELL10:OUT.16URAM2.DOUT_A59
TCELL10:OUT.18URAM2.DOUT_A60
TCELL10:OUT.19URAM2.DOUT_A61
TCELL10:OUT.20URAM2.DOUT_A62
TCELL10:OUT.21URAM2.DOUT_A63
TCELL10:OUT.22URAM2.DOUT_A64
TCELL10:OUT.23URAM2.DOUT_A65
TCELL10:OUT.24URAM2.DOUT_A66
TCELL10:OUT.25URAM2.DOUT_A67
TCELL10:OUT.26URAM2.DOUT_A68
TCELL10:OUT.27URAM2.DOUT_A69
TCELL10:OUT.28URAM2.DOUT_A70
TCELL10:OUT.30URAM2.TST_RING_OUT
TCELL10:IMUX.CTRL.4URAM2.CLK
TCELL10:IMUX.CTRL.7URAM2.TST_RING_STARTB
TCELL10:IMUX.IMUX.0URAM2.DIN_A52
TCELL10:IMUX.IMUX.1URAM2.DIN_A54
TCELL10:IMUX.IMUX.2URAM2.BWE_A0
TCELL10:IMUX.IMUX.4URAM2.BWE_A4
TCELL10:IMUX.IMUX.5URAM2.BWE_A6
TCELL10:IMUX.IMUX.6URAM2.BWE_A8
TCELL10:IMUX.IMUX.8URAM2.DIN_A58
TCELL10:IMUX.IMUX.9URAM2.DIN_A60
TCELL10:IMUX.IMUX.10URAM2.DIN_A62
TCELL10:IMUX.IMUX.12URAM2.DIN_A66
TCELL10:IMUX.IMUX.13URAM2.DIN_A68
TCELL10:IMUX.IMUX.14URAM2.DIN_A70
TCELL10:IMUX.IMUX.16URAM2.DIN_A53
TCELL10:IMUX.IMUX.18URAM2.DIN_A55
TCELL10:IMUX.IMUX.20URAM2.BWE_A1
TCELL10:IMUX.IMUX.22URAM2.BWE_A3
TCELL10:IMUX.IMUX.23URAM2.BWE_A2
TCELL10:IMUX.IMUX.24URAM2.BWE_A5
TCELL10:IMUX.IMUX.26URAM2.BWE_A7
TCELL10:IMUX.IMUX.30URAM2.DIN_A57
TCELL10:IMUX.IMUX.31URAM2.DIN_A56
TCELL10:IMUX.IMUX.32URAM2.DIN_A59
TCELL10:IMUX.IMUX.34URAM2.DIN_A61
TCELL10:IMUX.IMUX.36URAM2.DIN_A63
TCELL10:IMUX.IMUX.38URAM2.DIN_A65
TCELL10:IMUX.IMUX.39URAM2.DIN_A64
TCELL10:IMUX.IMUX.40URAM2.DIN_A67
TCELL10:IMUX.IMUX.42URAM2.DIN_A69
TCELL10:IMUX.IMUX.44URAM2.DIN_A71
TCELL11:OUT.0URAM2.DOUT_A71
TCELL11:OUT.8URAM3.DOUT_A0
TCELL11:OUT.9URAM3.DOUT_A1
TCELL11:OUT.10URAM3.DOUT_A2
TCELL11:OUT.11URAM3.DOUT_A3
TCELL11:OUT.12URAM3.DOUT_A4
TCELL11:OUT.13URAM3.DOUT_A5
TCELL11:OUT.14URAM3.DOUT_A6
TCELL11:OUT.15URAM3.DOUT_A7
TCELL11:OUT.16URAM3.DOUT_A8
TCELL11:OUT.17URAM3.DOUT_A9
TCELL11:OUT.18URAM3.DOUT_A10
TCELL11:OUT.19URAM3.DOUT_A11
TCELL11:OUT.22URAM3.DOUT_A12
TCELL11:OUT.24URAM3.DOUT_A13
TCELL11:OUT.28URAM3.DOUT_A14
TCELL11:OUT.29URAM3.DOUT_A15
TCELL11:OUT.30URAM3.DOUT_A16
TCELL11:OUT.31URAM3.DBITERR_A
TCELL11:IMUX.CTRL.0URAM2.TST_RING_ENB
TCELL11:IMUX.IMUX.4URAM3.DIN_A0
TCELL11:IMUX.IMUX.5URAM3.DIN_A2
TCELL11:IMUX.IMUX.6URAM3.DIN_A4
TCELL11:IMUX.IMUX.8URAM3.DIN_A8
TCELL11:IMUX.IMUX.9URAM3.DIN_A10
TCELL11:IMUX.IMUX.10URAM3.DIN_A12
TCELL11:IMUX.IMUX.12URAM3.ADDR_A0
TCELL11:IMUX.IMUX.13URAM3.ADDR_A2
TCELL11:IMUX.IMUX.14URAM3.ADDR_A4
TCELL11:IMUX.IMUX.24URAM3.DIN_A1
TCELL11:IMUX.IMUX.26URAM3.DIN_A3
TCELL11:IMUX.IMUX.28URAM3.DIN_A5
TCELL11:IMUX.IMUX.30URAM3.DIN_A7
TCELL11:IMUX.IMUX.31URAM3.DIN_A6
TCELL11:IMUX.IMUX.32URAM3.DIN_A9
TCELL11:IMUX.IMUX.34URAM3.DIN_A11
TCELL11:IMUX.IMUX.36URAM3.DIN_A13
TCELL11:IMUX.IMUX.38URAM3.DIN_A15
TCELL11:IMUX.IMUX.39URAM3.DIN_A14
TCELL11:IMUX.IMUX.40URAM3.ADDR_A1
TCELL11:IMUX.IMUX.42URAM3.ADDR_A3
TCELL11:IMUX.IMUX.44URAM3.ADDR_A5
TCELL11:IMUX.IMUX.46URAM3.ADDR_A7
TCELL11:IMUX.IMUX.47URAM3.ADDR_A6
TCELL12:OUT.0URAM3.DOUT_A17
TCELL12:OUT.1URAM3.TST_SLEEP_OUT
TCELL12:OUT.2URAM3.TST_DEEPSLEEP_OUT
TCELL12:OUT.3URAM3.TST_SHUTDOWN_OUT
TCELL12:OUT.4URAM3.DOUT_A18
TCELL12:OUT.5URAM3.DOUT_A19
TCELL12:OUT.6URAM3.RDACCESS_A
TCELL12:OUT.7URAM3.SBITERR_A
TCELL12:OUT.8URAM3.DOUT_A20
TCELL12:OUT.11URAM3.DOUT_A21
TCELL12:OUT.12URAM3.DOUT_A22
TCELL12:OUT.13URAM3.DOUT_A23
TCELL12:OUT.14URAM3.DOUT_A24
TCELL12:OUT.15URAM3.DOUT_A25
TCELL12:OUT.16URAM3.DOUT_A26
TCELL12:OUT.17URAM3.DOUT_A27
TCELL12:OUT.18URAM3.DOUT_A28
TCELL12:OUT.19URAM3.DOUT_A29
TCELL12:OUT.20URAM3.DOUT_A30
TCELL12:OUT.21URAM3.DOUT_A31
TCELL12:OUT.22URAM3.DOUT_A32
TCELL12:OUT.23URAM3.DOUT_A33
TCELL12:OUT.24URAM3.DOUT_A34
TCELL12:OUT.25URAM3.DOUT_A35
TCELL12:OUT.26URAM3.DOUT_A36
TCELL12:OUT.27URAM3.DOUT_A37
TCELL12:OUT.28URAM3.DOUT_A38
TCELL12:IMUX.CTRL.0URAM3.SLEEP
TCELL12:IMUX.CTRL.1URAM3.OREG_CAS_CE_A
TCELL12:IMUX.CTRL.2URAM3.DEEPSLEEP
TCELL12:IMUX.CTRL.3URAM3.SHUTDOWN
TCELL12:IMUX.CTRL.4URAM3.OREG_ECC_CE_A
TCELL12:IMUX.CTRL.5URAM3.OREG_CE_A
TCELL12:IMUX.IMUX.0URAM3.ADDR_A8
TCELL12:IMUX.IMUX.1URAM3.ADDR_A10
TCELL12:IMUX.IMUX.2URAM3.DIN_A16
TCELL12:IMUX.IMUX.4URAM3.DIN_A18
TCELL12:IMUX.IMUX.5URAM3.DIN_A20
TCELL12:IMUX.IMUX.6URAM3.DIN_A22
TCELL12:IMUX.IMUX.8URAM3.DIN_A26
TCELL12:IMUX.IMUX.9URAM3.DIN_A28
TCELL12:IMUX.IMUX.10URAM3.DIN_A30
TCELL12:IMUX.IMUX.12URAM3.DIN_A34
TCELL12:IMUX.IMUX.13URAM3.DIN_A36
TCELL12:IMUX.IMUX.14URAM3.DIN_A38
TCELL12:IMUX.IMUX.16URAM3.ADDR_A9
TCELL12:IMUX.IMUX.18URAM3.ADDR_A11
TCELL12:IMUX.IMUX.20URAM3.DIN_A17
TCELL12:IMUX.IMUX.24URAM3.DIN_A19
TCELL12:IMUX.IMUX.26URAM3.DIN_A21
TCELL12:IMUX.IMUX.28URAM3.DIN_A23
TCELL12:IMUX.IMUX.30URAM3.DIN_A25
TCELL12:IMUX.IMUX.31URAM3.DIN_A24
TCELL12:IMUX.IMUX.32URAM3.DIN_A27
TCELL12:IMUX.IMUX.34URAM3.DIN_A29
TCELL12:IMUX.IMUX.36URAM3.DIN_A31
TCELL12:IMUX.IMUX.38URAM3.DIN_A33
TCELL12:IMUX.IMUX.39URAM3.DIN_A32
TCELL12:IMUX.IMUX.40URAM3.DIN_A35
TCELL12:IMUX.IMUX.42URAM3.DIN_A37
TCELL12:IMUX.IMUX.44URAM3.DIN_A39
TCELL12:IMUX.IMUX.46URAM3.INJECT_SBITERR_A
TCELL12:IMUX.IMUX.47URAM3.INJECT_DBITERR_A
TCELL13:OUT.1URAM3.DOUT_A39
TCELL13:OUT.7URAM3.DOUT_A40
TCELL13:OUT.11URAM3.DOUT_A41
TCELL13:OUT.13URAM3.DOUT_A42
TCELL13:OUT.14URAM3.DOUT_A43
TCELL13:OUT.15URAM3.DOUT_A44
TCELL13:OUT.17URAM3.DOUT_A45
TCELL13:OUT.18URAM3.DOUT_A46
TCELL13:OUT.19URAM3.DOUT_A47
TCELL13:OUT.20URAM3.DOUT_A48
TCELL13:OUT.21URAM3.DOUT_A49
TCELL13:OUT.22URAM3.DOUT_A50
TCELL13:OUT.23URAM3.DOUT_A51
TCELL13:OUT.25URAM3.DOUT_A52
TCELL13:OUT.27URAM3.DOUT_A53
TCELL13:OUT.30URAM3.DOUT_A54
TCELL13:IMUX.CTRL.1URAM3.RST_A
TCELL13:IMUX.CTRL.4URAM3.RDB_WR_A
TCELL13:IMUX.CTRL.5URAM3.EN_A
TCELL13:IMUX.IMUX.0URAM3.ADDR_A12
TCELL13:IMUX.IMUX.1URAM3.ADDR_A14
TCELL13:IMUX.IMUX.2URAM3.ADDR_A16
TCELL13:IMUX.IMUX.4URAM3.ADDR_A20
TCELL13:IMUX.IMUX.5URAM3.ADDR_A22
TCELL13:IMUX.IMUX.6URAM3.DIN_A41
TCELL13:IMUX.IMUX.8URAM3.DIN_A44
TCELL13:IMUX.IMUX.9URAM3.DIN_A46
TCELL13:IMUX.IMUX.10URAM3.DIN_A48
TCELL13:IMUX.IMUX.12URAM3.DIN_A52
TCELL13:IMUX.IMUX.13URAM3.DIN_A54
TCELL13:IMUX.IMUX.14URAM3.BWE_A0
TCELL13:IMUX.IMUX.16URAM3.ADDR_A13
TCELL13:IMUX.IMUX.18URAM3.ADDR_A15
TCELL13:IMUX.IMUX.20URAM3.ADDR_A17
TCELL13:IMUX.IMUX.22URAM3.ADDR_A19
TCELL13:IMUX.IMUX.23URAM3.ADDR_A18
TCELL13:IMUX.IMUX.24URAM3.ADDR_A21
TCELL13:IMUX.IMUX.26URAM3.DIN_A40
TCELL13:IMUX.IMUX.28URAM3.DIN_A42
TCELL13:IMUX.IMUX.31URAM3.DIN_A43
TCELL13:IMUX.IMUX.32URAM3.DIN_A45
TCELL13:IMUX.IMUX.34URAM3.DIN_A47
TCELL13:IMUX.IMUX.36URAM3.DIN_A49
TCELL13:IMUX.IMUX.38URAM3.DIN_A51
TCELL13:IMUX.IMUX.39URAM3.DIN_A50
TCELL13:IMUX.IMUX.40URAM3.DIN_A53
TCELL13:IMUX.IMUX.42URAM3.DIN_A55
TCELL13:IMUX.IMUX.44URAM3.BWE_A1
TCELL13:IMUX.IMUX.46URAM3.BWE_A3
TCELL13:IMUX.IMUX.47URAM3.BWE_A2
TCELL14:OUT.0URAM3.DOUT_A55
TCELL14:OUT.2URAM3.DOUT_A56
TCELL14:OUT.4URAM3.DOUT_A57
TCELL14:OUT.6URAM3.DOUT_A58
TCELL14:OUT.8URAM3.DOUT_A59
TCELL14:OUT.10URAM3.DOUT_A60
TCELL14:OUT.11URAM3.DOUT_A61
TCELL14:OUT.12URAM3.DOUT_A62
TCELL14:OUT.13URAM3.DOUT_A63
TCELL14:OUT.14URAM3.DOUT_A64
TCELL14:OUT.15URAM3.DOUT_A65
TCELL14:OUT.16URAM3.DOUT_A66
TCELL14:OUT.17URAM3.DOUT_A67
TCELL14:OUT.18URAM3.DOUT_A68
TCELL14:OUT.19URAM3.DOUT_A69
TCELL14:OUT.20URAM3.DOUT_A70
TCELL14:OUT.22URAM3.TST_RING_OUT
TCELL14:OUT.24URAM3.DOUT_A71
TCELL14:IMUX.CTRL.4URAM3.CLK
TCELL14:IMUX.CTRL.5URAM3.TST_RING_STARTB
TCELL14:IMUX.CTRL.6URAM3.TST_RING_ENB
TCELL14:IMUX.IMUX.0URAM3.BWE_A4
TCELL14:IMUX.IMUX.1URAM3.BWE_A6
TCELL14:IMUX.IMUX.2URAM3.BWE_A8
TCELL14:IMUX.IMUX.4URAM3.DIN_A58
TCELL14:IMUX.IMUX.5URAM3.DIN_A60
TCELL14:IMUX.IMUX.6URAM3.DIN_A62
TCELL14:IMUX.IMUX.8URAM3.DIN_A66
TCELL14:IMUX.IMUX.9URAM3.DIN_A68
TCELL14:IMUX.IMUX.10URAM3.DIN_A70
TCELL14:IMUX.IMUX.16URAM3.BWE_A5
TCELL14:IMUX.IMUX.18URAM3.BWE_A7
TCELL14:IMUX.IMUX.22URAM3.DIN_A57
TCELL14:IMUX.IMUX.23URAM3.DIN_A56
TCELL14:IMUX.IMUX.24URAM3.DIN_A59
TCELL14:IMUX.IMUX.26URAM3.DIN_A61
TCELL14:IMUX.IMUX.28URAM3.DIN_A63
TCELL14:IMUX.IMUX.30URAM3.DIN_A65
TCELL14:IMUX.IMUX.31URAM3.DIN_A64
TCELL14:IMUX.IMUX.32URAM3.DIN_A67
TCELL14:IMUX.IMUX.34URAM3.DIN_A69
TCELL14:IMUX.IMUX.36URAM3.DIN_A71
TCELL15:OUT.0URAM0.DOUT_B0
TCELL15:OUT.1URAM0.DOUT_B1
TCELL15:OUT.2URAM0.DOUT_B2
TCELL15:OUT.3URAM0.DOUT_B3
TCELL15:OUT.4URAM0.DOUT_B4
TCELL15:OUT.5URAM0.DOUT_B5
TCELL15:OUT.6URAM0.DOUT_B6
TCELL15:OUT.7URAM0.DOUT_B7
TCELL15:OUT.8URAM0.DOUT_B8
TCELL15:OUT.9URAM0.DOUT_B9
TCELL15:OUT.10URAM0.DOUT_B10
TCELL15:OUT.11URAM0.DOUT_B11
TCELL15:OUT.14URAM0.DOUT_B12
TCELL15:OUT.16URAM0.DOUT_B13
TCELL15:OUT.20URAM0.DOUT_B14
TCELL15:OUT.21URAM0.DOUT_B15
TCELL15:OUT.22URAM0.DOUT_B16
TCELL15:OUT.23URAM0.DBITERR_B
TCELL15:OUT.24URAM0.DOUT_B17
TCELL15:OUT.28URAM0.DOUT_B18
TCELL15:OUT.29URAM0.DOUT_B19
TCELL15:OUT.30URAM0.RDACCESS_B
TCELL15:OUT.31URAM0.SBITERR_B
TCELL15:IMUX.CTRL.7URAM0.OREG_CAS_CE_B
TCELL15:IMUX.IMUX.0URAM0.DIN_B0
TCELL15:IMUX.IMUX.1URAM0.DIN_B2
TCELL15:IMUX.IMUX.2URAM0.DIN_B4
TCELL15:IMUX.IMUX.4URAM0.DIN_B8
TCELL15:IMUX.IMUX.5URAM0.DIN_B10
TCELL15:IMUX.IMUX.6URAM0.DIN_B12
TCELL15:IMUX.IMUX.8URAM0.ADDR_B0
TCELL15:IMUX.IMUX.9URAM0.ADDR_B2
TCELL15:IMUX.IMUX.10URAM0.ADDR_B4
TCELL15:IMUX.IMUX.12URAM0.ADDR_B8
TCELL15:IMUX.IMUX.13URAM0.ADDR_B10
TCELL15:IMUX.IMUX.14URAM0.DIN_B16
TCELL15:IMUX.IMUX.16URAM0.DIN_B1
TCELL15:IMUX.IMUX.18URAM0.DIN_B3
TCELL15:IMUX.IMUX.20URAM0.DIN_B5
TCELL15:IMUX.IMUX.22URAM0.DIN_B7
TCELL15:IMUX.IMUX.23URAM0.DIN_B6
TCELL15:IMUX.IMUX.24URAM0.DIN_B9
TCELL15:IMUX.IMUX.26URAM0.DIN_B11
TCELL15:IMUX.IMUX.28URAM0.DIN_B13
TCELL15:IMUX.IMUX.30URAM0.DIN_B15
TCELL15:IMUX.IMUX.31URAM0.DIN_B14
TCELL15:IMUX.IMUX.32URAM0.ADDR_B1
TCELL15:IMUX.IMUX.34URAM0.ADDR_B3
TCELL15:IMUX.IMUX.36URAM0.ADDR_B5
TCELL15:IMUX.IMUX.38URAM0.ADDR_B7
TCELL15:IMUX.IMUX.39URAM0.ADDR_B6
TCELL15:IMUX.IMUX.40URAM0.ADDR_B9
TCELL15:IMUX.IMUX.42URAM0.ADDR_B11
TCELL15:IMUX.IMUX.44URAM0.DIN_B17
TCELL16:OUT.0URAM0.DOUT_B20
TCELL16:OUT.3URAM0.DOUT_B21
TCELL16:OUT.4URAM0.DOUT_B22
TCELL16:OUT.5URAM0.DOUT_B23
TCELL16:OUT.6URAM0.DOUT_B24
TCELL16:OUT.7URAM0.DOUT_B25
TCELL16:OUT.8URAM0.DOUT_B26
TCELL16:OUT.9URAM0.DOUT_B27
TCELL16:OUT.10URAM0.DOUT_B28
TCELL16:OUT.11URAM0.DOUT_B29
TCELL16:OUT.12URAM0.DOUT_B30
TCELL16:OUT.13URAM0.DOUT_B31
TCELL16:OUT.14URAM0.DOUT_B32
TCELL16:OUT.15URAM0.DOUT_B33
TCELL16:OUT.16URAM0.DOUT_B34
TCELL16:OUT.17URAM0.DOUT_B35
TCELL16:OUT.18URAM0.DOUT_B36
TCELL16:OUT.19URAM0.DOUT_B37
TCELL16:OUT.20URAM0.DOUT_B38
TCELL16:OUT.25URAM0.DOUT_B39
TCELL16:OUT.31URAM0.DOUT_B40
TCELL16:IMUX.CTRL.2URAM0.OREG_ECC_CE_B
TCELL16:IMUX.CTRL.3URAM0.OREG_CE_B
TCELL16:IMUX.CTRL.7URAM0.RST_B
TCELL16:IMUX.IMUX.0URAM0.DIN_B18
TCELL16:IMUX.IMUX.1URAM0.DIN_B20
TCELL16:IMUX.IMUX.2URAM0.DIN_B22
TCELL16:IMUX.IMUX.4URAM0.DIN_B26
TCELL16:IMUX.IMUX.5URAM0.DIN_B28
TCELL16:IMUX.IMUX.6URAM0.DIN_B30
TCELL16:IMUX.IMUX.8URAM0.DIN_B34
TCELL16:IMUX.IMUX.9URAM0.DIN_B36
TCELL16:IMUX.IMUX.10URAM0.DIN_B38
TCELL16:IMUX.IMUX.12URAM0.ADDR_B12
TCELL16:IMUX.IMUX.13URAM0.ADDR_B14
TCELL16:IMUX.IMUX.14URAM0.ADDR_B16
TCELL16:IMUX.IMUX.16URAM0.DIN_B19
TCELL16:IMUX.IMUX.18URAM0.DIN_B21
TCELL16:IMUX.IMUX.20URAM0.DIN_B23
TCELL16:IMUX.IMUX.22URAM0.DIN_B25
TCELL16:IMUX.IMUX.23URAM0.DIN_B24
TCELL16:IMUX.IMUX.24URAM0.DIN_B27
TCELL16:IMUX.IMUX.26URAM0.DIN_B29
TCELL16:IMUX.IMUX.28URAM0.DIN_B31
TCELL16:IMUX.IMUX.30URAM0.DIN_B33
TCELL16:IMUX.IMUX.31URAM0.DIN_B32
TCELL16:IMUX.IMUX.32URAM0.DIN_B35
TCELL16:IMUX.IMUX.34URAM0.DIN_B37
TCELL16:IMUX.IMUX.36URAM0.DIN_B39
TCELL16:IMUX.IMUX.38URAM0.INJECT_SBITERR_B
TCELL16:IMUX.IMUX.39URAM0.INJECT_DBITERR_B
TCELL16:IMUX.IMUX.40URAM0.ADDR_B13
TCELL16:IMUX.IMUX.42URAM0.ADDR_B15
TCELL16:IMUX.IMUX.44URAM0.ADDR_B17
TCELL16:IMUX.IMUX.46URAM0.ADDR_B19
TCELL16:IMUX.IMUX.47URAM0.ADDR_B18
TCELL17:OUT.3URAM0.DOUT_B41
TCELL17:OUT.5URAM0.DOUT_B42
TCELL17:OUT.6URAM0.DOUT_B43
TCELL17:OUT.7URAM0.DOUT_B44
TCELL17:OUT.9URAM0.DOUT_B45
TCELL17:OUT.10URAM0.DOUT_B46
TCELL17:OUT.11URAM0.DOUT_B47
TCELL17:OUT.12URAM0.DOUT_B48
TCELL17:OUT.13URAM0.DOUT_B49
TCELL17:OUT.14URAM0.DOUT_B50
TCELL17:OUT.15URAM0.DOUT_B51
TCELL17:OUT.17URAM0.DOUT_B52
TCELL17:OUT.19URAM0.DOUT_B53
TCELL17:OUT.22URAM0.DOUT_B54
TCELL17:OUT.24URAM0.DOUT_B55
TCELL17:OUT.26URAM0.DOUT_B56
TCELL17:OUT.28URAM0.DOUT_B57
TCELL17:OUT.30URAM0.DOUT_B58
TCELL17:IMUX.CTRL.2URAM0.RDB_WR_B
TCELL17:IMUX.CTRL.3URAM0.EN_B
TCELL17:IMUX.IMUX.0URAM0.ADDR_B20
TCELL17:IMUX.IMUX.1URAM0.ADDR_B22
TCELL17:IMUX.IMUX.2URAM0.DIN_B41
TCELL17:IMUX.IMUX.4URAM0.DIN_B44
TCELL17:IMUX.IMUX.5URAM0.DIN_B46
TCELL17:IMUX.IMUX.6URAM0.DIN_B48
TCELL17:IMUX.IMUX.8URAM0.DIN_B52
TCELL17:IMUX.IMUX.9URAM0.DIN_B54
TCELL17:IMUX.IMUX.10URAM0.BWE_B0
TCELL17:IMUX.IMUX.12URAM0.BWE_B4
TCELL17:IMUX.IMUX.13URAM0.BWE_B6
TCELL17:IMUX.IMUX.14URAM0.BWE_B8
TCELL17:IMUX.IMUX.16URAM0.ADDR_B21
TCELL17:IMUX.IMUX.18URAM0.DIN_B40
TCELL17:IMUX.IMUX.20URAM0.DIN_B42
TCELL17:IMUX.IMUX.23URAM0.DIN_B43
TCELL17:IMUX.IMUX.24URAM0.DIN_B45
TCELL17:IMUX.IMUX.26URAM0.DIN_B47
TCELL17:IMUX.IMUX.28URAM0.DIN_B49
TCELL17:IMUX.IMUX.30URAM0.DIN_B51
TCELL17:IMUX.IMUX.31URAM0.DIN_B50
TCELL17:IMUX.IMUX.32URAM0.DIN_B53
TCELL17:IMUX.IMUX.34URAM0.DIN_B55
TCELL17:IMUX.IMUX.36URAM0.BWE_B1
TCELL17:IMUX.IMUX.38URAM0.BWE_B3
TCELL17:IMUX.IMUX.39URAM0.BWE_B2
TCELL17:IMUX.IMUX.40URAM0.BWE_B5
TCELL17:IMUX.IMUX.42URAM0.BWE_B7
TCELL17:IMUX.IMUX.46URAM0.DIN_B57
TCELL17:IMUX.IMUX.47URAM0.DIN_B56
TCELL18:OUT.0URAM0.DOUT_B59
TCELL18:OUT.2URAM0.DOUT_B60
TCELL18:OUT.3URAM0.DOUT_B61
TCELL18:OUT.4URAM0.DOUT_B62
TCELL18:OUT.5URAM0.DOUT_B63
TCELL18:OUT.6URAM0.DOUT_B64
TCELL18:OUT.7URAM0.DOUT_B65
TCELL18:OUT.8URAM0.DOUT_B66
TCELL18:OUT.9URAM0.DOUT_B67
TCELL18:OUT.10URAM0.DOUT_B68
TCELL18:OUT.11URAM0.DOUT_B69
TCELL18:OUT.12URAM0.DOUT_B70
TCELL18:OUT.16URAM0.DOUT_B71
TCELL18:OUT.24URAM1.DOUT_B0
TCELL18:OUT.25URAM1.DOUT_B1
TCELL18:OUT.26URAM1.DOUT_B2
TCELL18:OUT.27URAM1.DOUT_B3
TCELL18:OUT.28URAM1.DOUT_B4
TCELL18:OUT.29URAM1.DOUT_B5
TCELL18:OUT.30URAM1.DOUT_B6
TCELL18:OUT.31URAM1.DOUT_B7
TCELL18:IMUX.IMUX.0URAM0.DIN_B58
TCELL18:IMUX.IMUX.1URAM0.DIN_B60
TCELL18:IMUX.IMUX.2URAM0.DIN_B62
TCELL18:IMUX.IMUX.4URAM0.DIN_B66
TCELL18:IMUX.IMUX.5URAM0.DIN_B68
TCELL18:IMUX.IMUX.6URAM0.DIN_B70
TCELL18:IMUX.IMUX.12URAM1.DIN_B0
TCELL18:IMUX.IMUX.13URAM1.DIN_B2
TCELL18:IMUX.IMUX.14URAM1.DIN_B4
TCELL18:IMUX.IMUX.16URAM0.DIN_B59
TCELL18:IMUX.IMUX.18URAM0.DIN_B61
TCELL18:IMUX.IMUX.20URAM0.DIN_B63
TCELL18:IMUX.IMUX.22URAM0.DIN_B65
TCELL18:IMUX.IMUX.23URAM0.DIN_B64
TCELL18:IMUX.IMUX.24URAM0.DIN_B67
TCELL18:IMUX.IMUX.26URAM0.DIN_B69
TCELL18:IMUX.IMUX.28URAM0.DIN_B71
TCELL18:IMUX.IMUX.40URAM1.DIN_B1
TCELL18:IMUX.IMUX.42URAM1.DIN_B3
TCELL18:IMUX.IMUX.44URAM1.DIN_B5
TCELL18:IMUX.IMUX.46URAM1.DIN_B7
TCELL18:IMUX.IMUX.47URAM1.DIN_B6
TCELL19:OUT.0URAM1.DOUT_B8
TCELL19:OUT.1URAM1.DOUT_B9
TCELL19:OUT.2URAM1.DOUT_B10
TCELL19:OUT.3URAM1.DOUT_B11
TCELL19:OUT.6URAM1.DOUT_B12
TCELL19:OUT.8URAM1.DOUT_B13
TCELL19:OUT.12URAM1.DOUT_B14
TCELL19:OUT.13URAM1.DOUT_B15
TCELL19:OUT.14URAM1.DOUT_B16
TCELL19:OUT.15URAM1.DBITERR_B
TCELL19:OUT.16URAM1.DOUT_B17
TCELL19:OUT.20URAM1.DOUT_B18
TCELL19:OUT.21URAM1.DOUT_B19
TCELL19:OUT.22URAM1.RDACCESS_B
TCELL19:OUT.23URAM1.SBITERR_B
TCELL19:OUT.24URAM1.DOUT_B20
TCELL19:OUT.27URAM1.DOUT_B21
TCELL19:OUT.28URAM1.DOUT_B22
TCELL19:OUT.29URAM1.DOUT_B23
TCELL19:OUT.30URAM1.DOUT_B24
TCELL19:OUT.31URAM1.DOUT_B25
TCELL19:IMUX.CTRL.5URAM1.OREG_CAS_CE_B
TCELL19:IMUX.IMUX.0URAM1.DIN_B8
TCELL19:IMUX.IMUX.1URAM1.DIN_B10
TCELL19:IMUX.IMUX.2URAM1.DIN_B12
TCELL19:IMUX.IMUX.4URAM1.ADDR_B0
TCELL19:IMUX.IMUX.5URAM1.ADDR_B2
TCELL19:IMUX.IMUX.6URAM1.ADDR_B4
TCELL19:IMUX.IMUX.8URAM1.ADDR_B8
TCELL19:IMUX.IMUX.9URAM1.ADDR_B10
TCELL19:IMUX.IMUX.10URAM1.DIN_B16
TCELL19:IMUX.IMUX.12URAM1.DIN_B18
TCELL19:IMUX.IMUX.13URAM1.DIN_B20
TCELL19:IMUX.IMUX.14URAM1.DIN_B22
TCELL19:IMUX.IMUX.16URAM1.DIN_B9
TCELL19:IMUX.IMUX.18URAM1.DIN_B11
TCELL19:IMUX.IMUX.20URAM1.DIN_B13
TCELL19:IMUX.IMUX.22URAM1.DIN_B15
TCELL19:IMUX.IMUX.23URAM1.DIN_B14
TCELL19:IMUX.IMUX.24URAM1.ADDR_B1
TCELL19:IMUX.IMUX.26URAM1.ADDR_B3
TCELL19:IMUX.IMUX.28URAM1.ADDR_B5
TCELL19:IMUX.IMUX.30URAM1.ADDR_B7
TCELL19:IMUX.IMUX.31URAM1.ADDR_B6
TCELL19:IMUX.IMUX.32URAM1.ADDR_B9
TCELL19:IMUX.IMUX.34URAM1.ADDR_B11
TCELL19:IMUX.IMUX.36URAM1.DIN_B17
TCELL19:IMUX.IMUX.40URAM1.DIN_B19
TCELL19:IMUX.IMUX.42URAM1.DIN_B21
TCELL19:IMUX.IMUX.44URAM1.DIN_B23
TCELL19:IMUX.IMUX.46URAM1.DIN_B25
TCELL19:IMUX.IMUX.47URAM1.DIN_B24
TCELL20:OUT.0URAM1.DOUT_B26
TCELL20:OUT.1URAM1.DOUT_B27
TCELL20:OUT.2URAM1.DOUT_B28
TCELL20:OUT.3URAM1.DOUT_B29
TCELL20:OUT.4URAM1.DOUT_B30
TCELL20:OUT.5URAM1.DOUT_B31
TCELL20:OUT.6URAM1.DOUT_B32
TCELL20:OUT.7URAM1.DOUT_B33
TCELL20:OUT.8URAM1.DOUT_B34
TCELL20:OUT.9URAM1.DOUT_B35
TCELL20:OUT.10URAM1.DOUT_B36
TCELL20:OUT.11URAM1.DOUT_B37
TCELL20:OUT.12URAM1.DOUT_B38
TCELL20:OUT.17URAM1.DOUT_B39
TCELL20:OUT.23URAM1.DOUT_B40
TCELL20:OUT.27URAM1.DOUT_B41
TCELL20:OUT.29URAM1.DOUT_B42
TCELL20:OUT.30URAM1.DOUT_B43
TCELL20:OUT.31URAM1.DOUT_B44
TCELL20:IMUX.CTRL.0URAM1.OREG_ECC_CE_B
TCELL20:IMUX.CTRL.1URAM1.OREG_CE_B
TCELL20:IMUX.CTRL.5URAM1.RST_B
TCELL20:IMUX.IMUX.0URAM1.DIN_B26
TCELL20:IMUX.IMUX.1URAM1.DIN_B28
TCELL20:IMUX.IMUX.2URAM1.DIN_B30
TCELL20:IMUX.IMUX.4URAM1.DIN_B34
TCELL20:IMUX.IMUX.5URAM1.DIN_B36
TCELL20:IMUX.IMUX.6URAM1.DIN_B38
TCELL20:IMUX.IMUX.8URAM1.ADDR_B12
TCELL20:IMUX.IMUX.9URAM1.ADDR_B14
TCELL20:IMUX.IMUX.10URAM1.ADDR_B16
TCELL20:IMUX.IMUX.12URAM1.ADDR_B20
TCELL20:IMUX.IMUX.13URAM1.ADDR_B22
TCELL20:IMUX.IMUX.14URAM1.DIN_B41
TCELL20:IMUX.IMUX.16URAM1.DIN_B27
TCELL20:IMUX.IMUX.18URAM1.DIN_B29
TCELL20:IMUX.IMUX.20URAM1.DIN_B31
TCELL20:IMUX.IMUX.22URAM1.DIN_B33
TCELL20:IMUX.IMUX.23URAM1.DIN_B32
TCELL20:IMUX.IMUX.24URAM1.DIN_B35
TCELL20:IMUX.IMUX.26URAM1.DIN_B37
TCELL20:IMUX.IMUX.28URAM1.DIN_B39
TCELL20:IMUX.IMUX.30URAM1.INJECT_SBITERR_B
TCELL20:IMUX.IMUX.31URAM1.INJECT_DBITERR_B
TCELL20:IMUX.IMUX.32URAM1.ADDR_B13
TCELL20:IMUX.IMUX.34URAM1.ADDR_B15
TCELL20:IMUX.IMUX.36URAM1.ADDR_B17
TCELL20:IMUX.IMUX.38URAM1.ADDR_B19
TCELL20:IMUX.IMUX.39URAM1.ADDR_B18
TCELL20:IMUX.IMUX.40URAM1.ADDR_B21
TCELL20:IMUX.IMUX.42URAM1.DIN_B40
TCELL20:IMUX.IMUX.44URAM1.DIN_B42
TCELL20:IMUX.IMUX.47URAM1.DIN_B43
TCELL21:OUT.1URAM1.DOUT_B45
TCELL21:OUT.2URAM1.DOUT_B46
TCELL21:OUT.3URAM1.DOUT_B47
TCELL21:OUT.4URAM1.DOUT_B48
TCELL21:OUT.5URAM1.DOUT_B49
TCELL21:OUT.6URAM1.DOUT_B50
TCELL21:OUT.7URAM1.DOUT_B51
TCELL21:OUT.9URAM1.DOUT_B52
TCELL21:OUT.11URAM1.DOUT_B53
TCELL21:OUT.14URAM1.DOUT_B54
TCELL21:OUT.16URAM1.DOUT_B55
TCELL21:OUT.18URAM1.DOUT_B56
TCELL21:OUT.20URAM1.DOUT_B57
TCELL21:OUT.22URAM1.DOUT_B58
TCELL21:OUT.24URAM1.DOUT_B59
TCELL21:OUT.26URAM1.DOUT_B60
TCELL21:OUT.27URAM1.DOUT_B61
TCELL21:OUT.28URAM1.DOUT_B62
TCELL21:OUT.29URAM1.DOUT_B63
TCELL21:OUT.30URAM1.DOUT_B64
TCELL21:OUT.31URAM1.DOUT_B65
TCELL21:IMUX.CTRL.0URAM1.RDB_WR_B
TCELL21:IMUX.CTRL.1URAM1.EN_B
TCELL21:IMUX.IMUX.0URAM1.DIN_B44
TCELL21:IMUX.IMUX.1URAM1.DIN_B46
TCELL21:IMUX.IMUX.2URAM1.DIN_B48
TCELL21:IMUX.IMUX.4URAM1.DIN_B52
TCELL21:IMUX.IMUX.5URAM1.DIN_B54
TCELL21:IMUX.IMUX.6URAM1.BWE_B0
TCELL21:IMUX.IMUX.8URAM1.BWE_B4
TCELL21:IMUX.IMUX.9URAM1.BWE_B6
TCELL21:IMUX.IMUX.10URAM1.BWE_B8
TCELL21:IMUX.IMUX.12URAM1.DIN_B58
TCELL21:IMUX.IMUX.13URAM1.DIN_B60
TCELL21:IMUX.IMUX.14URAM1.DIN_B62
TCELL21:IMUX.IMUX.16URAM1.DIN_B45
TCELL21:IMUX.IMUX.18URAM1.DIN_B47
TCELL21:IMUX.IMUX.20URAM1.DIN_B49
TCELL21:IMUX.IMUX.22URAM1.DIN_B51
TCELL21:IMUX.IMUX.23URAM1.DIN_B50
TCELL21:IMUX.IMUX.24URAM1.DIN_B53
TCELL21:IMUX.IMUX.26URAM1.DIN_B55
TCELL21:IMUX.IMUX.28URAM1.BWE_B1
TCELL21:IMUX.IMUX.30URAM1.BWE_B3
TCELL21:IMUX.IMUX.31URAM1.BWE_B2
TCELL21:IMUX.IMUX.32URAM1.BWE_B5
TCELL21:IMUX.IMUX.34URAM1.BWE_B7
TCELL21:IMUX.IMUX.38URAM1.DIN_B57
TCELL21:IMUX.IMUX.39URAM1.DIN_B56
TCELL21:IMUX.IMUX.40URAM1.DIN_B59
TCELL21:IMUX.IMUX.42URAM1.DIN_B61
TCELL21:IMUX.IMUX.44URAM1.DIN_B63
TCELL21:IMUX.IMUX.46URAM1.DIN_B65
TCELL21:IMUX.IMUX.47URAM1.DIN_B64
TCELL22:OUT.0URAM1.DOUT_B66
TCELL22:OUT.1URAM1.DOUT_B67
TCELL22:OUT.2URAM1.DOUT_B68
TCELL22:OUT.3URAM1.DOUT_B69
TCELL22:OUT.4URAM1.DOUT_B70
TCELL22:OUT.8URAM1.DOUT_B71
TCELL22:OUT.16URAM2.DOUT_B0
TCELL22:OUT.17URAM2.DOUT_B1
TCELL22:OUT.18URAM2.DOUT_B2
TCELL22:OUT.19URAM2.DOUT_B3
TCELL22:OUT.20URAM2.DOUT_B4
TCELL22:OUT.21URAM2.DOUT_B5
TCELL22:OUT.22URAM2.DOUT_B6
TCELL22:OUT.23URAM2.DOUT_B7
TCELL22:OUT.24URAM2.DOUT_B8
TCELL22:OUT.25URAM2.DOUT_B9
TCELL22:OUT.26URAM2.DOUT_B10
TCELL22:OUT.27URAM2.DOUT_B11
TCELL22:OUT.30URAM2.DOUT_B12
TCELL22:IMUX.IMUX.0URAM1.DIN_B66
TCELL22:IMUX.IMUX.1URAM1.DIN_B68
TCELL22:IMUX.IMUX.2URAM1.DIN_B70
TCELL22:IMUX.IMUX.8URAM2.DIN_B0
TCELL22:IMUX.IMUX.9URAM2.DIN_B2
TCELL22:IMUX.IMUX.10URAM2.DIN_B4
TCELL22:IMUX.IMUX.12URAM2.DIN_B8
TCELL22:IMUX.IMUX.13URAM2.DIN_B10
TCELL22:IMUX.IMUX.14URAM2.DIN_B12
TCELL22:IMUX.IMUX.16URAM1.DIN_B67
TCELL22:IMUX.IMUX.18URAM1.DIN_B69
TCELL22:IMUX.IMUX.20URAM1.DIN_B71
TCELL22:IMUX.IMUX.32URAM2.DIN_B1
TCELL22:IMUX.IMUX.34URAM2.DIN_B3
TCELL22:IMUX.IMUX.36URAM2.DIN_B5
TCELL22:IMUX.IMUX.38URAM2.DIN_B7
TCELL22:IMUX.IMUX.39URAM2.DIN_B6
TCELL22:IMUX.IMUX.40URAM2.DIN_B9
TCELL22:IMUX.IMUX.42URAM2.DIN_B11
TCELL22:IMUX.IMUX.44URAM2.DIN_B13
TCELL22:IMUX.IMUX.46URAM2.DIN_B15
TCELL22:IMUX.IMUX.47URAM2.DIN_B14
TCELL23:OUT.0URAM2.DOUT_B13
TCELL23:OUT.4URAM2.DOUT_B14
TCELL23:OUT.5URAM2.DOUT_B15
TCELL23:OUT.6URAM2.DOUT_B16
TCELL23:OUT.7URAM2.DBITERR_B
TCELL23:OUT.8URAM2.DOUT_B17
TCELL23:OUT.12URAM2.DOUT_B18
TCELL23:OUT.13URAM2.DOUT_B19
TCELL23:OUT.14URAM2.RDACCESS_B
TCELL23:OUT.15URAM2.SBITERR_B
TCELL23:OUT.16URAM2.DOUT_B20
TCELL23:OUT.19URAM2.DOUT_B21
TCELL23:OUT.20URAM2.DOUT_B22
TCELL23:OUT.21URAM2.DOUT_B23
TCELL23:OUT.22URAM2.DOUT_B24
TCELL23:OUT.23URAM2.DOUT_B25
TCELL23:OUT.24URAM2.DOUT_B26
TCELL23:OUT.25URAM2.DOUT_B27
TCELL23:OUT.26URAM2.DOUT_B28
TCELL23:OUT.27URAM2.DOUT_B29
TCELL23:OUT.28URAM2.DOUT_B30
TCELL23:OUT.29URAM2.DOUT_B31
TCELL23:OUT.30URAM2.DOUT_B32
TCELL23:OUT.31URAM2.DOUT_B33
TCELL23:IMUX.CTRL.3URAM2.OREG_CAS_CE_B
TCELL23:IMUX.CTRL.6URAM2.OREG_ECC_CE_B
TCELL23:IMUX.CTRL.7URAM2.OREG_CE_B
TCELL23:IMUX.IMUX.0URAM2.ADDR_B0
TCELL23:IMUX.IMUX.1URAM2.ADDR_B2
TCELL23:IMUX.IMUX.2URAM2.ADDR_B4
TCELL23:IMUX.IMUX.4URAM2.ADDR_B8
TCELL23:IMUX.IMUX.5URAM2.ADDR_B10
TCELL23:IMUX.IMUX.6URAM2.DIN_B16
TCELL23:IMUX.IMUX.8URAM2.DIN_B18
TCELL23:IMUX.IMUX.9URAM2.DIN_B20
TCELL23:IMUX.IMUX.10URAM2.DIN_B22
TCELL23:IMUX.IMUX.12URAM2.DIN_B26
TCELL23:IMUX.IMUX.13URAM2.DIN_B28
TCELL23:IMUX.IMUX.14URAM2.DIN_B30
TCELL23:IMUX.IMUX.16URAM2.ADDR_B1
TCELL23:IMUX.IMUX.18URAM2.ADDR_B3
TCELL23:IMUX.IMUX.20URAM2.ADDR_B5
TCELL23:IMUX.IMUX.22URAM2.ADDR_B7
TCELL23:IMUX.IMUX.23URAM2.ADDR_B6
TCELL23:IMUX.IMUX.24URAM2.ADDR_B9
TCELL23:IMUX.IMUX.26URAM2.ADDR_B11
TCELL23:IMUX.IMUX.28URAM2.DIN_B17
TCELL23:IMUX.IMUX.32URAM2.DIN_B19
TCELL23:IMUX.IMUX.34URAM2.DIN_B21
TCELL23:IMUX.IMUX.36URAM2.DIN_B23
TCELL23:IMUX.IMUX.38URAM2.DIN_B25
TCELL23:IMUX.IMUX.39URAM2.DIN_B24
TCELL23:IMUX.IMUX.40URAM2.DIN_B27
TCELL23:IMUX.IMUX.42URAM2.DIN_B29
TCELL23:IMUX.IMUX.44URAM2.DIN_B31
TCELL23:IMUX.IMUX.46URAM2.DIN_B33
TCELL23:IMUX.IMUX.47URAM2.DIN_B32
TCELL24:OUT.0URAM2.DOUT_B34
TCELL24:OUT.1URAM2.DOUT_B35
TCELL24:OUT.2URAM2.DOUT_B36
TCELL24:OUT.3URAM2.DOUT_B37
TCELL24:OUT.4URAM2.DOUT_B38
TCELL24:OUT.9URAM2.DOUT_B39
TCELL24:OUT.15URAM2.DOUT_B40
TCELL24:OUT.19URAM2.DOUT_B41
TCELL24:OUT.21URAM2.DOUT_B42
TCELL24:OUT.22URAM2.DOUT_B43
TCELL24:OUT.23URAM2.DOUT_B44
TCELL24:OUT.25URAM2.DOUT_B45
TCELL24:OUT.26URAM2.DOUT_B46
TCELL24:OUT.27URAM2.DOUT_B47
TCELL24:OUT.28URAM2.DOUT_B48
TCELL24:OUT.29URAM2.DOUT_B49
TCELL24:OUT.30URAM2.DOUT_B50
TCELL24:OUT.31URAM2.DOUT_B51
TCELL24:IMUX.CTRL.3URAM2.RST_B
TCELL24:IMUX.CTRL.6URAM2.RDB_WR_B
TCELL24:IMUX.CTRL.7URAM2.EN_B
TCELL24:IMUX.IMUX.0URAM2.DIN_B34
TCELL24:IMUX.IMUX.1URAM2.DIN_B36
TCELL24:IMUX.IMUX.2URAM2.DIN_B38
TCELL24:IMUX.IMUX.4URAM2.ADDR_B12
TCELL24:IMUX.IMUX.5URAM2.ADDR_B14
TCELL24:IMUX.IMUX.6URAM2.ADDR_B16
TCELL24:IMUX.IMUX.8URAM2.ADDR_B20
TCELL24:IMUX.IMUX.9URAM2.ADDR_B22
TCELL24:IMUX.IMUX.10URAM2.DIN_B41
TCELL24:IMUX.IMUX.12URAM2.DIN_B44
TCELL24:IMUX.IMUX.13URAM2.DIN_B46
TCELL24:IMUX.IMUX.14URAM2.DIN_B48
TCELL24:IMUX.IMUX.16URAM2.DIN_B35
TCELL24:IMUX.IMUX.18URAM2.DIN_B37
TCELL24:IMUX.IMUX.20URAM2.DIN_B39
TCELL24:IMUX.IMUX.22URAM2.INJECT_SBITERR_B
TCELL24:IMUX.IMUX.23URAM2.INJECT_DBITERR_B
TCELL24:IMUX.IMUX.24URAM2.ADDR_B13
TCELL24:IMUX.IMUX.26URAM2.ADDR_B15
TCELL24:IMUX.IMUX.28URAM2.ADDR_B17
TCELL24:IMUX.IMUX.30URAM2.ADDR_B19
TCELL24:IMUX.IMUX.31URAM2.ADDR_B18
TCELL24:IMUX.IMUX.32URAM2.ADDR_B21
TCELL24:IMUX.IMUX.34URAM2.DIN_B40
TCELL24:IMUX.IMUX.36URAM2.DIN_B42
TCELL24:IMUX.IMUX.39URAM2.DIN_B43
TCELL24:IMUX.IMUX.40URAM2.DIN_B45
TCELL24:IMUX.IMUX.42URAM2.DIN_B47
TCELL24:IMUX.IMUX.44URAM2.DIN_B49
TCELL24:IMUX.IMUX.46URAM2.DIN_B51
TCELL24:IMUX.IMUX.47URAM2.DIN_B50
TCELL25:OUT.1URAM2.DOUT_B52
TCELL25:OUT.3URAM2.DOUT_B53
TCELL25:OUT.6URAM2.DOUT_B54
TCELL25:OUT.8URAM2.DOUT_B55
TCELL25:OUT.10URAM2.DOUT_B56
TCELL25:OUT.12URAM2.DOUT_B57
TCELL25:OUT.14URAM2.DOUT_B58
TCELL25:OUT.16URAM2.DOUT_B59
TCELL25:OUT.18URAM2.DOUT_B60
TCELL25:OUT.19URAM2.DOUT_B61
TCELL25:OUT.20URAM2.DOUT_B62
TCELL25:OUT.21URAM2.DOUT_B63
TCELL25:OUT.22URAM2.DOUT_B64
TCELL25:OUT.23URAM2.DOUT_B65
TCELL25:OUT.24URAM2.DOUT_B66
TCELL25:OUT.25URAM2.DOUT_B67
TCELL25:OUT.26URAM2.DOUT_B68
TCELL25:OUT.27URAM2.DOUT_B69
TCELL25:OUT.28URAM2.DOUT_B70
TCELL25:IMUX.IMUX.0URAM2.DIN_B52
TCELL25:IMUX.IMUX.1URAM2.DIN_B54
TCELL25:IMUX.IMUX.2URAM2.BWE_B0
TCELL25:IMUX.IMUX.4URAM2.BWE_B4
TCELL25:IMUX.IMUX.5URAM2.BWE_B6
TCELL25:IMUX.IMUX.6URAM2.BWE_B8
TCELL25:IMUX.IMUX.8URAM2.DIN_B58
TCELL25:IMUX.IMUX.9URAM2.DIN_B60
TCELL25:IMUX.IMUX.10URAM2.DIN_B62
TCELL25:IMUX.IMUX.12URAM2.DIN_B66
TCELL25:IMUX.IMUX.13URAM2.DIN_B68
TCELL25:IMUX.IMUX.14URAM2.DIN_B70
TCELL25:IMUX.IMUX.16URAM2.DIN_B53
TCELL25:IMUX.IMUX.18URAM2.DIN_B55
TCELL25:IMUX.IMUX.20URAM2.BWE_B1
TCELL25:IMUX.IMUX.22URAM2.BWE_B3
TCELL25:IMUX.IMUX.23URAM2.BWE_B2
TCELL25:IMUX.IMUX.24URAM2.BWE_B5
TCELL25:IMUX.IMUX.26URAM2.BWE_B7
TCELL25:IMUX.IMUX.30URAM2.DIN_B57
TCELL25:IMUX.IMUX.31URAM2.DIN_B56
TCELL25:IMUX.IMUX.32URAM2.DIN_B59
TCELL25:IMUX.IMUX.34URAM2.DIN_B61
TCELL25:IMUX.IMUX.36URAM2.DIN_B63
TCELL25:IMUX.IMUX.38URAM2.DIN_B65
TCELL25:IMUX.IMUX.39URAM2.DIN_B64
TCELL25:IMUX.IMUX.40URAM2.DIN_B67
TCELL25:IMUX.IMUX.42URAM2.DIN_B69
TCELL25:IMUX.IMUX.44URAM2.DIN_B71
TCELL26:OUT.0URAM2.DOUT_B71
TCELL26:OUT.8URAM3.DOUT_B0
TCELL26:OUT.9URAM3.DOUT_B1
TCELL26:OUT.10URAM3.DOUT_B2
TCELL26:OUT.11URAM3.DOUT_B3
TCELL26:OUT.12URAM3.DOUT_B4
TCELL26:OUT.13URAM3.DOUT_B5
TCELL26:OUT.14URAM3.DOUT_B6
TCELL26:OUT.15URAM3.DOUT_B7
TCELL26:OUT.16URAM3.DOUT_B8
TCELL26:OUT.17URAM3.DOUT_B9
TCELL26:OUT.18URAM3.DOUT_B10
TCELL26:OUT.19URAM3.DOUT_B11
TCELL26:OUT.22URAM3.DOUT_B12
TCELL26:OUT.24URAM3.DOUT_B13
TCELL26:OUT.28URAM3.DOUT_B14
TCELL26:OUT.29URAM3.DOUT_B15
TCELL26:OUT.30URAM3.DOUT_B16
TCELL26:OUT.31URAM3.DBITERR_B
TCELL26:IMUX.IMUX.4URAM3.DIN_B0
TCELL26:IMUX.IMUX.5URAM3.DIN_B2
TCELL26:IMUX.IMUX.6URAM3.DIN_B4
TCELL26:IMUX.IMUX.8URAM3.DIN_B8
TCELL26:IMUX.IMUX.9URAM3.DIN_B10
TCELL26:IMUX.IMUX.10URAM3.DIN_B12
TCELL26:IMUX.IMUX.12URAM3.ADDR_B0
TCELL26:IMUX.IMUX.13URAM3.ADDR_B2
TCELL26:IMUX.IMUX.14URAM3.ADDR_B4
TCELL26:IMUX.IMUX.24URAM3.DIN_B1
TCELL26:IMUX.IMUX.26URAM3.DIN_B3
TCELL26:IMUX.IMUX.28URAM3.DIN_B5
TCELL26:IMUX.IMUX.30URAM3.DIN_B7
TCELL26:IMUX.IMUX.31URAM3.DIN_B6
TCELL26:IMUX.IMUX.32URAM3.DIN_B9
TCELL26:IMUX.IMUX.34URAM3.DIN_B11
TCELL26:IMUX.IMUX.36URAM3.DIN_B13
TCELL26:IMUX.IMUX.38URAM3.DIN_B15
TCELL26:IMUX.IMUX.39URAM3.DIN_B14
TCELL26:IMUX.IMUX.40URAM3.ADDR_B1
TCELL26:IMUX.IMUX.42URAM3.ADDR_B3
TCELL26:IMUX.IMUX.44URAM3.ADDR_B5
TCELL26:IMUX.IMUX.46URAM3.ADDR_B7
TCELL26:IMUX.IMUX.47URAM3.ADDR_B6
TCELL27:OUT.0URAM3.DOUT_B17
TCELL27:OUT.4URAM3.DOUT_B18
TCELL27:OUT.5URAM3.DOUT_B19
TCELL27:OUT.6URAM3.RDACCESS_B
TCELL27:OUT.7URAM3.SBITERR_B
TCELL27:OUT.8URAM3.DOUT_B20
TCELL27:OUT.11URAM3.DOUT_B21
TCELL27:OUT.12URAM3.DOUT_B22
TCELL27:OUT.13URAM3.DOUT_B23
TCELL27:OUT.14URAM3.DOUT_B24
TCELL27:OUT.15URAM3.DOUT_B25
TCELL27:OUT.16URAM3.DOUT_B26
TCELL27:OUT.17URAM3.DOUT_B27
TCELL27:OUT.18URAM3.DOUT_B28
TCELL27:OUT.19URAM3.DOUT_B29
TCELL27:OUT.20URAM3.DOUT_B30
TCELL27:OUT.21URAM3.DOUT_B31
TCELL27:OUT.22URAM3.DOUT_B32
TCELL27:OUT.23URAM3.DOUT_B33
TCELL27:OUT.24URAM3.DOUT_B34
TCELL27:OUT.25URAM3.DOUT_B35
TCELL27:OUT.26URAM3.DOUT_B36
TCELL27:OUT.27URAM3.DOUT_B37
TCELL27:OUT.28URAM3.DOUT_B38
TCELL27:IMUX.CTRL.1URAM3.OREG_CAS_CE_B
TCELL27:IMUX.CTRL.4URAM3.OREG_ECC_CE_B
TCELL27:IMUX.CTRL.5URAM3.OREG_CE_B
TCELL27:IMUX.IMUX.0URAM3.ADDR_B8
TCELL27:IMUX.IMUX.1URAM3.ADDR_B10
TCELL27:IMUX.IMUX.2URAM3.DIN_B16
TCELL27:IMUX.IMUX.4URAM3.DIN_B18
TCELL27:IMUX.IMUX.5URAM3.DIN_B20
TCELL27:IMUX.IMUX.6URAM3.DIN_B22
TCELL27:IMUX.IMUX.8URAM3.DIN_B26
TCELL27:IMUX.IMUX.9URAM3.DIN_B28
TCELL27:IMUX.IMUX.10URAM3.DIN_B30
TCELL27:IMUX.IMUX.12URAM3.DIN_B34
TCELL27:IMUX.IMUX.13URAM3.DIN_B36
TCELL27:IMUX.IMUX.14URAM3.DIN_B38
TCELL27:IMUX.IMUX.16URAM3.ADDR_B9
TCELL27:IMUX.IMUX.18URAM3.ADDR_B11
TCELL27:IMUX.IMUX.20URAM3.DIN_B17
TCELL27:IMUX.IMUX.24URAM3.DIN_B19
TCELL27:IMUX.IMUX.26URAM3.DIN_B21
TCELL27:IMUX.IMUX.28URAM3.DIN_B23
TCELL27:IMUX.IMUX.30URAM3.DIN_B25
TCELL27:IMUX.IMUX.31URAM3.DIN_B24
TCELL27:IMUX.IMUX.32URAM3.DIN_B27
TCELL27:IMUX.IMUX.34URAM3.DIN_B29
TCELL27:IMUX.IMUX.36URAM3.DIN_B31
TCELL27:IMUX.IMUX.38URAM3.DIN_B33
TCELL27:IMUX.IMUX.39URAM3.DIN_B32
TCELL27:IMUX.IMUX.40URAM3.DIN_B35
TCELL27:IMUX.IMUX.42URAM3.DIN_B37
TCELL27:IMUX.IMUX.44URAM3.DIN_B39
TCELL27:IMUX.IMUX.46URAM3.INJECT_SBITERR_B
TCELL27:IMUX.IMUX.47URAM3.INJECT_DBITERR_B
TCELL28:OUT.1URAM3.DOUT_B39
TCELL28:OUT.7URAM3.DOUT_B40
TCELL28:OUT.11URAM3.DOUT_B41
TCELL28:OUT.13URAM3.DOUT_B42
TCELL28:OUT.14URAM3.DOUT_B43
TCELL28:OUT.15URAM3.DOUT_B44
TCELL28:OUT.17URAM3.DOUT_B45
TCELL28:OUT.18URAM3.DOUT_B46
TCELL28:OUT.19URAM3.DOUT_B47
TCELL28:OUT.20URAM3.DOUT_B48
TCELL28:OUT.21URAM3.DOUT_B49
TCELL28:OUT.22URAM3.DOUT_B50
TCELL28:OUT.23URAM3.DOUT_B51
TCELL28:OUT.25URAM3.DOUT_B52
TCELL28:OUT.27URAM3.DOUT_B53
TCELL28:OUT.30URAM3.DOUT_B54
TCELL28:IMUX.CTRL.1URAM3.RST_B
TCELL28:IMUX.CTRL.4URAM3.RDB_WR_B
TCELL28:IMUX.CTRL.5URAM3.EN_B
TCELL28:IMUX.IMUX.0URAM3.ADDR_B12
TCELL28:IMUX.IMUX.1URAM3.ADDR_B14
TCELL28:IMUX.IMUX.2URAM3.ADDR_B16
TCELL28:IMUX.IMUX.4URAM3.ADDR_B20
TCELL28:IMUX.IMUX.5URAM3.ADDR_B22
TCELL28:IMUX.IMUX.6URAM3.DIN_B41
TCELL28:IMUX.IMUX.8URAM3.DIN_B44
TCELL28:IMUX.IMUX.9URAM3.DIN_B46
TCELL28:IMUX.IMUX.10URAM3.DIN_B48
TCELL28:IMUX.IMUX.12URAM3.DIN_B52
TCELL28:IMUX.IMUX.13URAM3.DIN_B54
TCELL28:IMUX.IMUX.14URAM3.BWE_B0
TCELL28:IMUX.IMUX.16URAM3.ADDR_B13
TCELL28:IMUX.IMUX.18URAM3.ADDR_B15
TCELL28:IMUX.IMUX.20URAM3.ADDR_B17
TCELL28:IMUX.IMUX.22URAM3.ADDR_B19
TCELL28:IMUX.IMUX.23URAM3.ADDR_B18
TCELL28:IMUX.IMUX.24URAM3.ADDR_B21
TCELL28:IMUX.IMUX.26URAM3.DIN_B40
TCELL28:IMUX.IMUX.28URAM3.DIN_B42
TCELL28:IMUX.IMUX.31URAM3.DIN_B43
TCELL28:IMUX.IMUX.32URAM3.DIN_B45
TCELL28:IMUX.IMUX.34URAM3.DIN_B47
TCELL28:IMUX.IMUX.36URAM3.DIN_B49
TCELL28:IMUX.IMUX.38URAM3.DIN_B51
TCELL28:IMUX.IMUX.39URAM3.DIN_B50
TCELL28:IMUX.IMUX.40URAM3.DIN_B53
TCELL28:IMUX.IMUX.42URAM3.DIN_B55
TCELL28:IMUX.IMUX.44URAM3.BWE_B1
TCELL28:IMUX.IMUX.46URAM3.BWE_B3
TCELL28:IMUX.IMUX.47URAM3.BWE_B2
TCELL29:OUT.0URAM3.DOUT_B55
TCELL29:OUT.2URAM3.DOUT_B56
TCELL29:OUT.4URAM3.DOUT_B57
TCELL29:OUT.6URAM3.DOUT_B58
TCELL29:OUT.8URAM3.DOUT_B59
TCELL29:OUT.10URAM3.DOUT_B60
TCELL29:OUT.11URAM3.DOUT_B61
TCELL29:OUT.12URAM3.DOUT_B62
TCELL29:OUT.13URAM3.DOUT_B63
TCELL29:OUT.14URAM3.DOUT_B64
TCELL29:OUT.15URAM3.DOUT_B65
TCELL29:OUT.16URAM3.DOUT_B66
TCELL29:OUT.17URAM3.DOUT_B67
TCELL29:OUT.18URAM3.DOUT_B68
TCELL29:OUT.19URAM3.DOUT_B69
TCELL29:OUT.20URAM3.DOUT_B70
TCELL29:OUT.24URAM3.DOUT_B71
TCELL29:IMUX.IMUX.0URAM3.BWE_B4
TCELL29:IMUX.IMUX.1URAM3.BWE_B6
TCELL29:IMUX.IMUX.2URAM3.BWE_B8
TCELL29:IMUX.IMUX.4URAM3.DIN_B58
TCELL29:IMUX.IMUX.5URAM3.DIN_B60
TCELL29:IMUX.IMUX.6URAM3.DIN_B62
TCELL29:IMUX.IMUX.8URAM3.DIN_B66
TCELL29:IMUX.IMUX.9URAM3.DIN_B68
TCELL29:IMUX.IMUX.10URAM3.DIN_B70
TCELL29:IMUX.IMUX.16URAM3.BWE_B5
TCELL29:IMUX.IMUX.18URAM3.BWE_B7
TCELL29:IMUX.IMUX.22URAM3.DIN_B57
TCELL29:IMUX.IMUX.23URAM3.DIN_B56
TCELL29:IMUX.IMUX.24URAM3.DIN_B59
TCELL29:IMUX.IMUX.26URAM3.DIN_B61
TCELL29:IMUX.IMUX.28URAM3.DIN_B63
TCELL29:IMUX.IMUX.30URAM3.DIN_B65
TCELL29:IMUX.IMUX.31URAM3.DIN_B64
TCELL29:IMUX.IMUX.32URAM3.DIN_B67
TCELL29:IMUX.IMUX.34URAM3.DIN_B69
TCELL29:IMUX.IMUX.36URAM3.DIN_B71