Ultra RAM

Tile URAM

Cells: 30

Bel URAM[0]

ultrascaleplus URAM bel URAM[0]
Pin	Direction	Wires
ADDR_A0	input	CELL_W[0].IMUX_IMUX[8]
ADDR_A1	input	CELL_W[0].IMUX_IMUX[32]
ADDR_A10	input	CELL_W[0].IMUX_IMUX[13]
ADDR_A11	input	CELL_W[0].IMUX_IMUX[42]
ADDR_A12	input	CELL_W[1].IMUX_IMUX[12]
ADDR_A13	input	CELL_W[1].IMUX_IMUX[40]
ADDR_A14	input	CELL_W[1].IMUX_IMUX[13]
ADDR_A15	input	CELL_W[1].IMUX_IMUX[42]
ADDR_A16	input	CELL_W[1].IMUX_IMUX[14]
ADDR_A17	input	CELL_W[1].IMUX_IMUX[44]
ADDR_A18	input	CELL_W[1].IMUX_IMUX[47]
ADDR_A19	input	CELL_W[1].IMUX_IMUX[46]
ADDR_A2	input	CELL_W[0].IMUX_IMUX[9]
ADDR_A20	input	CELL_W[2].IMUX_IMUX[0]
ADDR_A21	input	CELL_W[2].IMUX_IMUX[16]
ADDR_A22	input	CELL_W[2].IMUX_IMUX[1]
ADDR_A3	input	CELL_W[0].IMUX_IMUX[34]
ADDR_A4	input	CELL_W[0].IMUX_IMUX[10]
ADDR_A5	input	CELL_W[0].IMUX_IMUX[36]
ADDR_A6	input	CELL_W[0].IMUX_IMUX[39]
ADDR_A7	input	CELL_W[0].IMUX_IMUX[38]
ADDR_A8	input	CELL_W[0].IMUX_IMUX[12]
ADDR_A9	input	CELL_W[0].IMUX_IMUX[40]
ADDR_B0	input	CELL_E[0].IMUX_IMUX[8]
ADDR_B1	input	CELL_E[0].IMUX_IMUX[32]
ADDR_B10	input	CELL_E[0].IMUX_IMUX[13]
ADDR_B11	input	CELL_E[0].IMUX_IMUX[42]
ADDR_B12	input	CELL_E[1].IMUX_IMUX[12]
ADDR_B13	input	CELL_E[1].IMUX_IMUX[40]
ADDR_B14	input	CELL_E[1].IMUX_IMUX[13]
ADDR_B15	input	CELL_E[1].IMUX_IMUX[42]
ADDR_B16	input	CELL_E[1].IMUX_IMUX[14]
ADDR_B17	input	CELL_E[1].IMUX_IMUX[44]
ADDR_B18	input	CELL_E[1].IMUX_IMUX[47]
ADDR_B19	input	CELL_E[1].IMUX_IMUX[46]
ADDR_B2	input	CELL_E[0].IMUX_IMUX[9]
ADDR_B20	input	CELL_E[2].IMUX_IMUX[0]
ADDR_B21	input	CELL_E[2].IMUX_IMUX[16]
ADDR_B22	input	CELL_E[2].IMUX_IMUX[1]
ADDR_B3	input	CELL_E[0].IMUX_IMUX[34]
ADDR_B4	input	CELL_E[0].IMUX_IMUX[10]
ADDR_B5	input	CELL_E[0].IMUX_IMUX[36]
ADDR_B6	input	CELL_E[0].IMUX_IMUX[39]
ADDR_B7	input	CELL_E[0].IMUX_IMUX[38]
ADDR_B8	input	CELL_E[0].IMUX_IMUX[12]
ADDR_B9	input	CELL_E[0].IMUX_IMUX[40]
BWE_A0	input	CELL_W[2].IMUX_IMUX[10]
BWE_A1	input	CELL_W[2].IMUX_IMUX[36]
BWE_A2	input	CELL_W[2].IMUX_IMUX[39]
BWE_A3	input	CELL_W[2].IMUX_IMUX[38]
BWE_A4	input	CELL_W[2].IMUX_IMUX[12]
BWE_A5	input	CELL_W[2].IMUX_IMUX[40]
BWE_A6	input	CELL_W[2].IMUX_IMUX[13]
BWE_A7	input	CELL_W[2].IMUX_IMUX[42]
BWE_A8	input	CELL_W[2].IMUX_IMUX[14]
BWE_B0	input	CELL_E[2].IMUX_IMUX[10]
BWE_B1	input	CELL_E[2].IMUX_IMUX[36]
BWE_B2	input	CELL_E[2].IMUX_IMUX[39]
BWE_B3	input	CELL_E[2].IMUX_IMUX[38]
BWE_B4	input	CELL_E[2].IMUX_IMUX[12]
BWE_B5	input	CELL_E[2].IMUX_IMUX[40]
BWE_B6	input	CELL_E[2].IMUX_IMUX[13]
BWE_B7	input	CELL_E[2].IMUX_IMUX[42]
BWE_B8	input	CELL_E[2].IMUX_IMUX[14]
CLK	input	CELL_W[2].IMUX_CTRL[4]
DBITERR_A	output	CELL_W[0].OUT_BEL[23]
DBITERR_B	output	CELL_E[0].OUT_BEL[23]
DEEPSLEEP	input	CELL_W[1].IMUX_CTRL[0]
DIN_A0	input	CELL_W[0].IMUX_IMUX[0]
DIN_A1	input	CELL_W[0].IMUX_IMUX[16]
DIN_A10	input	CELL_W[0].IMUX_IMUX[5]
DIN_A11	input	CELL_W[0].IMUX_IMUX[26]
DIN_A12	input	CELL_W[0].IMUX_IMUX[6]
DIN_A13	input	CELL_W[0].IMUX_IMUX[28]
DIN_A14	input	CELL_W[0].IMUX_IMUX[31]
DIN_A15	input	CELL_W[0].IMUX_IMUX[30]
DIN_A16	input	CELL_W[0].IMUX_IMUX[14]
DIN_A17	input	CELL_W[0].IMUX_IMUX[44]
DIN_A18	input	CELL_W[1].IMUX_IMUX[0]
DIN_A19	input	CELL_W[1].IMUX_IMUX[16]
DIN_A2	input	CELL_W[0].IMUX_IMUX[1]
DIN_A20	input	CELL_W[1].IMUX_IMUX[1]
DIN_A21	input	CELL_W[1].IMUX_IMUX[18]
DIN_A22	input	CELL_W[1].IMUX_IMUX[2]
DIN_A23	input	CELL_W[1].IMUX_IMUX[20]
DIN_A24	input	CELL_W[1].IMUX_IMUX[23]
DIN_A25	input	CELL_W[1].IMUX_IMUX[22]
DIN_A26	input	CELL_W[1].IMUX_IMUX[4]
DIN_A27	input	CELL_W[1].IMUX_IMUX[24]
DIN_A28	input	CELL_W[1].IMUX_IMUX[5]
DIN_A29	input	CELL_W[1].IMUX_IMUX[26]
DIN_A3	input	CELL_W[0].IMUX_IMUX[18]
DIN_A30	input	CELL_W[1].IMUX_IMUX[6]
DIN_A31	input	CELL_W[1].IMUX_IMUX[28]
DIN_A32	input	CELL_W[1].IMUX_IMUX[31]
DIN_A33	input	CELL_W[1].IMUX_IMUX[30]
DIN_A34	input	CELL_W[1].IMUX_IMUX[8]
DIN_A35	input	CELL_W[1].IMUX_IMUX[32]
DIN_A36	input	CELL_W[1].IMUX_IMUX[9]
DIN_A37	input	CELL_W[1].IMUX_IMUX[34]
DIN_A38	input	CELL_W[1].IMUX_IMUX[10]
DIN_A39	input	CELL_W[1].IMUX_IMUX[36]
DIN_A4	input	CELL_W[0].IMUX_IMUX[2]
DIN_A40	input	CELL_W[2].IMUX_IMUX[18]
DIN_A41	input	CELL_W[2].IMUX_IMUX[2]
DIN_A42	input	CELL_W[2].IMUX_IMUX[20]
DIN_A43	input	CELL_W[2].IMUX_IMUX[23]
DIN_A44	input	CELL_W[2].IMUX_IMUX[4]
DIN_A45	input	CELL_W[2].IMUX_IMUX[24]
DIN_A46	input	CELL_W[2].IMUX_IMUX[5]
DIN_A47	input	CELL_W[2].IMUX_IMUX[26]
DIN_A48	input	CELL_W[2].IMUX_IMUX[6]
DIN_A49	input	CELL_W[2].IMUX_IMUX[28]
DIN_A5	input	CELL_W[0].IMUX_IMUX[20]
DIN_A50	input	CELL_W[2].IMUX_IMUX[31]
DIN_A51	input	CELL_W[2].IMUX_IMUX[30]
DIN_A52	input	CELL_W[2].IMUX_IMUX[8]
DIN_A53	input	CELL_W[2].IMUX_IMUX[32]
DIN_A54	input	CELL_W[2].IMUX_IMUX[9]
DIN_A55	input	CELL_W[2].IMUX_IMUX[34]
DIN_A56	input	CELL_W[2].IMUX_IMUX[47]
DIN_A57	input	CELL_W[2].IMUX_IMUX[46]
DIN_A58	input	CELL_W[3].IMUX_IMUX[0]
DIN_A59	input	CELL_W[3].IMUX_IMUX[16]
DIN_A6	input	CELL_W[0].IMUX_IMUX[23]
DIN_A60	input	CELL_W[3].IMUX_IMUX[1]
DIN_A61	input	CELL_W[3].IMUX_IMUX[18]
DIN_A62	input	CELL_W[3].IMUX_IMUX[2]
DIN_A63	input	CELL_W[3].IMUX_IMUX[20]
DIN_A64	input	CELL_W[3].IMUX_IMUX[23]
DIN_A65	input	CELL_W[3].IMUX_IMUX[22]
DIN_A66	input	CELL_W[3].IMUX_IMUX[4]
DIN_A67	input	CELL_W[3].IMUX_IMUX[24]
DIN_A68	input	CELL_W[3].IMUX_IMUX[5]
DIN_A69	input	CELL_W[3].IMUX_IMUX[26]
DIN_A7	input	CELL_W[0].IMUX_IMUX[22]
DIN_A70	input	CELL_W[3].IMUX_IMUX[6]
DIN_A71	input	CELL_W[3].IMUX_IMUX[28]
DIN_A8	input	CELL_W[0].IMUX_IMUX[4]
DIN_A9	input	CELL_W[0].IMUX_IMUX[24]
DIN_B0	input	CELL_E[0].IMUX_IMUX[0]
DIN_B1	input	CELL_E[0].IMUX_IMUX[16]
DIN_B10	input	CELL_E[0].IMUX_IMUX[5]
DIN_B11	input	CELL_E[0].IMUX_IMUX[26]
DIN_B12	input	CELL_E[0].IMUX_IMUX[6]
DIN_B13	input	CELL_E[0].IMUX_IMUX[28]
DIN_B14	input	CELL_E[0].IMUX_IMUX[31]
DIN_B15	input	CELL_E[0].IMUX_IMUX[30]
DIN_B16	input	CELL_E[0].IMUX_IMUX[14]
DIN_B17	input	CELL_E[0].IMUX_IMUX[44]
DIN_B18	input	CELL_E[1].IMUX_IMUX[0]
DIN_B19	input	CELL_E[1].IMUX_IMUX[16]
DIN_B2	input	CELL_E[0].IMUX_IMUX[1]
DIN_B20	input	CELL_E[1].IMUX_IMUX[1]
DIN_B21	input	CELL_E[1].IMUX_IMUX[18]
DIN_B22	input	CELL_E[1].IMUX_IMUX[2]
DIN_B23	input	CELL_E[1].IMUX_IMUX[20]
DIN_B24	input	CELL_E[1].IMUX_IMUX[23]
DIN_B25	input	CELL_E[1].IMUX_IMUX[22]
DIN_B26	input	CELL_E[1].IMUX_IMUX[4]
DIN_B27	input	CELL_E[1].IMUX_IMUX[24]
DIN_B28	input	CELL_E[1].IMUX_IMUX[5]
DIN_B29	input	CELL_E[1].IMUX_IMUX[26]
DIN_B3	input	CELL_E[0].IMUX_IMUX[18]
DIN_B30	input	CELL_E[1].IMUX_IMUX[6]
DIN_B31	input	CELL_E[1].IMUX_IMUX[28]
DIN_B32	input	CELL_E[1].IMUX_IMUX[31]
DIN_B33	input	CELL_E[1].IMUX_IMUX[30]
DIN_B34	input	CELL_E[1].IMUX_IMUX[8]
DIN_B35	input	CELL_E[1].IMUX_IMUX[32]
DIN_B36	input	CELL_E[1].IMUX_IMUX[9]
DIN_B37	input	CELL_E[1].IMUX_IMUX[34]
DIN_B38	input	CELL_E[1].IMUX_IMUX[10]
DIN_B39	input	CELL_E[1].IMUX_IMUX[36]
DIN_B4	input	CELL_E[0].IMUX_IMUX[2]
DIN_B40	input	CELL_E[2].IMUX_IMUX[18]
DIN_B41	input	CELL_E[2].IMUX_IMUX[2]
DIN_B42	input	CELL_E[2].IMUX_IMUX[20]
DIN_B43	input	CELL_E[2].IMUX_IMUX[23]
DIN_B44	input	CELL_E[2].IMUX_IMUX[4]
DIN_B45	input	CELL_E[2].IMUX_IMUX[24]
DIN_B46	input	CELL_E[2].IMUX_IMUX[5]
DIN_B47	input	CELL_E[2].IMUX_IMUX[26]
DIN_B48	input	CELL_E[2].IMUX_IMUX[6]
DIN_B49	input	CELL_E[2].IMUX_IMUX[28]
DIN_B5	input	CELL_E[0].IMUX_IMUX[20]
DIN_B50	input	CELL_E[2].IMUX_IMUX[31]
DIN_B51	input	CELL_E[2].IMUX_IMUX[30]
DIN_B52	input	CELL_E[2].IMUX_IMUX[8]
DIN_B53	input	CELL_E[2].IMUX_IMUX[32]
DIN_B54	input	CELL_E[2].IMUX_IMUX[9]
DIN_B55	input	CELL_E[2].IMUX_IMUX[34]
DIN_B56	input	CELL_E[2].IMUX_IMUX[47]
DIN_B57	input	CELL_E[2].IMUX_IMUX[46]
DIN_B58	input	CELL_E[3].IMUX_IMUX[0]
DIN_B59	input	CELL_E[3].IMUX_IMUX[16]
DIN_B6	input	CELL_E[0].IMUX_IMUX[23]
DIN_B60	input	CELL_E[3].IMUX_IMUX[1]
DIN_B61	input	CELL_E[3].IMUX_IMUX[18]
DIN_B62	input	CELL_E[3].IMUX_IMUX[2]
DIN_B63	input	CELL_E[3].IMUX_IMUX[20]
DIN_B64	input	CELL_E[3].IMUX_IMUX[23]
DIN_B65	input	CELL_E[3].IMUX_IMUX[22]
DIN_B66	input	CELL_E[3].IMUX_IMUX[4]
DIN_B67	input	CELL_E[3].IMUX_IMUX[24]
DIN_B68	input	CELL_E[3].IMUX_IMUX[5]
DIN_B69	input	CELL_E[3].IMUX_IMUX[26]
DIN_B7	input	CELL_E[0].IMUX_IMUX[22]
DIN_B70	input	CELL_E[3].IMUX_IMUX[6]
DIN_B71	input	CELL_E[3].IMUX_IMUX[28]
DIN_B8	input	CELL_E[0].IMUX_IMUX[4]
DIN_B9	input	CELL_E[0].IMUX_IMUX[24]
DOUT_A0	output	CELL_W[0].OUT_BEL[0]
DOUT_A1	output	CELL_W[0].OUT_BEL[1]
DOUT_A10	output	CELL_W[0].OUT_BEL[10]
DOUT_A11	output	CELL_W[0].OUT_BEL[11]
DOUT_A12	output	CELL_W[0].OUT_BEL[14]
DOUT_A13	output	CELL_W[0].OUT_BEL[16]
DOUT_A14	output	CELL_W[0].OUT_BEL[20]
DOUT_A15	output	CELL_W[0].OUT_BEL[21]
DOUT_A16	output	CELL_W[0].OUT_BEL[22]
DOUT_A17	output	CELL_W[0].OUT_BEL[24]
DOUT_A18	output	CELL_W[0].OUT_BEL[28]
DOUT_A19	output	CELL_W[0].OUT_BEL[29]
DOUT_A2	output	CELL_W[0].OUT_BEL[2]
DOUT_A20	output	CELL_W[1].OUT_BEL[0]
DOUT_A21	output	CELL_W[1].OUT_BEL[3]
DOUT_A22	output	CELL_W[1].OUT_BEL[4]
DOUT_A23	output	CELL_W[1].OUT_BEL[5]
DOUT_A24	output	CELL_W[1].OUT_BEL[6]
DOUT_A25	output	CELL_W[1].OUT_BEL[7]
DOUT_A26	output	CELL_W[1].OUT_BEL[8]
DOUT_A27	output	CELL_W[1].OUT_BEL[9]
DOUT_A28	output	CELL_W[1].OUT_BEL[10]
DOUT_A29	output	CELL_W[1].OUT_BEL[11]
DOUT_A3	output	CELL_W[0].OUT_BEL[3]
DOUT_A30	output	CELL_W[1].OUT_BEL[12]
DOUT_A31	output	CELL_W[1].OUT_BEL[13]
DOUT_A32	output	CELL_W[1].OUT_BEL[14]
DOUT_A33	output	CELL_W[1].OUT_BEL[15]
DOUT_A34	output	CELL_W[1].OUT_BEL[16]
DOUT_A35	output	CELL_W[1].OUT_BEL[17]
DOUT_A36	output	CELL_W[1].OUT_BEL[18]
DOUT_A37	output	CELL_W[1].OUT_BEL[19]
DOUT_A38	output	CELL_W[1].OUT_BEL[20]
DOUT_A39	output	CELL_W[1].OUT_BEL[25]
DOUT_A4	output	CELL_W[0].OUT_BEL[4]
DOUT_A40	output	CELL_W[1].OUT_BEL[31]
DOUT_A41	output	CELL_W[2].OUT_BEL[3]
DOUT_A42	output	CELL_W[2].OUT_BEL[5]
DOUT_A43	output	CELL_W[2].OUT_BEL[6]
DOUT_A44	output	CELL_W[2].OUT_BEL[7]
DOUT_A45	output	CELL_W[2].OUT_BEL[9]
DOUT_A46	output	CELL_W[2].OUT_BEL[10]
DOUT_A47	output	CELL_W[2].OUT_BEL[11]
DOUT_A48	output	CELL_W[2].OUT_BEL[12]
DOUT_A49	output	CELL_W[2].OUT_BEL[13]
DOUT_A5	output	CELL_W[0].OUT_BEL[5]
DOUT_A50	output	CELL_W[2].OUT_BEL[14]
DOUT_A51	output	CELL_W[2].OUT_BEL[15]
DOUT_A52	output	CELL_W[2].OUT_BEL[17]
DOUT_A53	output	CELL_W[2].OUT_BEL[19]
DOUT_A54	output	CELL_W[2].OUT_BEL[22]
DOUT_A55	output	CELL_W[2].OUT_BEL[24]
DOUT_A56	output	CELL_W[2].OUT_BEL[26]
DOUT_A57	output	CELL_W[2].OUT_BEL[28]
DOUT_A58	output	CELL_W[2].OUT_BEL[30]
DOUT_A59	output	CELL_W[3].OUT_BEL[0]
DOUT_A6	output	CELL_W[0].OUT_BEL[6]
DOUT_A60	output	CELL_W[3].OUT_BEL[2]
DOUT_A61	output	CELL_W[3].OUT_BEL[3]
DOUT_A62	output	CELL_W[3].OUT_BEL[4]
DOUT_A63	output	CELL_W[3].OUT_BEL[5]
DOUT_A64	output	CELL_W[3].OUT_BEL[6]
DOUT_A65	output	CELL_W[3].OUT_BEL[7]
DOUT_A66	output	CELL_W[3].OUT_BEL[8]
DOUT_A67	output	CELL_W[3].OUT_BEL[9]
DOUT_A68	output	CELL_W[3].OUT_BEL[10]
DOUT_A69	output	CELL_W[3].OUT_BEL[11]
DOUT_A7	output	CELL_W[0].OUT_BEL[7]
DOUT_A70	output	CELL_W[3].OUT_BEL[12]
DOUT_A71	output	CELL_W[3].OUT_BEL[16]
DOUT_A8	output	CELL_W[0].OUT_BEL[8]
DOUT_A9	output	CELL_W[0].OUT_BEL[9]
DOUT_B0	output	CELL_E[0].OUT_BEL[0]
DOUT_B1	output	CELL_E[0].OUT_BEL[1]
DOUT_B10	output	CELL_E[0].OUT_BEL[10]
DOUT_B11	output	CELL_E[0].OUT_BEL[11]
DOUT_B12	output	CELL_E[0].OUT_BEL[14]
DOUT_B13	output	CELL_E[0].OUT_BEL[16]
DOUT_B14	output	CELL_E[0].OUT_BEL[20]
DOUT_B15	output	CELL_E[0].OUT_BEL[21]
DOUT_B16	output	CELL_E[0].OUT_BEL[22]
DOUT_B17	output	CELL_E[0].OUT_BEL[24]
DOUT_B18	output	CELL_E[0].OUT_BEL[28]
DOUT_B19	output	CELL_E[0].OUT_BEL[29]
DOUT_B2	output	CELL_E[0].OUT_BEL[2]
DOUT_B20	output	CELL_E[1].OUT_BEL[0]
DOUT_B21	output	CELL_E[1].OUT_BEL[3]
DOUT_B22	output	CELL_E[1].OUT_BEL[4]
DOUT_B23	output	CELL_E[1].OUT_BEL[5]
DOUT_B24	output	CELL_E[1].OUT_BEL[6]
DOUT_B25	output	CELL_E[1].OUT_BEL[7]
DOUT_B26	output	CELL_E[1].OUT_BEL[8]
DOUT_B27	output	CELL_E[1].OUT_BEL[9]
DOUT_B28	output	CELL_E[1].OUT_BEL[10]
DOUT_B29	output	CELL_E[1].OUT_BEL[11]
DOUT_B3	output	CELL_E[0].OUT_BEL[3]
DOUT_B30	output	CELL_E[1].OUT_BEL[12]
DOUT_B31	output	CELL_E[1].OUT_BEL[13]
DOUT_B32	output	CELL_E[1].OUT_BEL[14]
DOUT_B33	output	CELL_E[1].OUT_BEL[15]
DOUT_B34	output	CELL_E[1].OUT_BEL[16]
DOUT_B35	output	CELL_E[1].OUT_BEL[17]
DOUT_B36	output	CELL_E[1].OUT_BEL[18]
DOUT_B37	output	CELL_E[1].OUT_BEL[19]
DOUT_B38	output	CELL_E[1].OUT_BEL[20]
DOUT_B39	output	CELL_E[1].OUT_BEL[25]
DOUT_B4	output	CELL_E[0].OUT_BEL[4]
DOUT_B40	output	CELL_E[1].OUT_BEL[31]
DOUT_B41	output	CELL_E[2].OUT_BEL[3]
DOUT_B42	output	CELL_E[2].OUT_BEL[5]
DOUT_B43	output	CELL_E[2].OUT_BEL[6]
DOUT_B44	output	CELL_E[2].OUT_BEL[7]
DOUT_B45	output	CELL_E[2].OUT_BEL[9]
DOUT_B46	output	CELL_E[2].OUT_BEL[10]
DOUT_B47	output	CELL_E[2].OUT_BEL[11]
DOUT_B48	output	CELL_E[2].OUT_BEL[12]
DOUT_B49	output	CELL_E[2].OUT_BEL[13]
DOUT_B5	output	CELL_E[0].OUT_BEL[5]
DOUT_B50	output	CELL_E[2].OUT_BEL[14]
DOUT_B51	output	CELL_E[2].OUT_BEL[15]
DOUT_B52	output	CELL_E[2].OUT_BEL[17]
DOUT_B53	output	CELL_E[2].OUT_BEL[19]
DOUT_B54	output	CELL_E[2].OUT_BEL[22]
DOUT_B55	output	CELL_E[2].OUT_BEL[24]
DOUT_B56	output	CELL_E[2].OUT_BEL[26]
DOUT_B57	output	CELL_E[2].OUT_BEL[28]
DOUT_B58	output	CELL_E[2].OUT_BEL[30]
DOUT_B59	output	CELL_E[3].OUT_BEL[0]
DOUT_B6	output	CELL_E[0].OUT_BEL[6]
DOUT_B60	output	CELL_E[3].OUT_BEL[2]
DOUT_B61	output	CELL_E[3].OUT_BEL[3]
DOUT_B62	output	CELL_E[3].OUT_BEL[4]
DOUT_B63	output	CELL_E[3].OUT_BEL[5]
DOUT_B64	output	CELL_E[3].OUT_BEL[6]
DOUT_B65	output	CELL_E[3].OUT_BEL[7]
DOUT_B66	output	CELL_E[3].OUT_BEL[8]
DOUT_B67	output	CELL_E[3].OUT_BEL[9]
DOUT_B68	output	CELL_E[3].OUT_BEL[10]
DOUT_B69	output	CELL_E[3].OUT_BEL[11]
DOUT_B7	output	CELL_E[0].OUT_BEL[7]
DOUT_B70	output	CELL_E[3].OUT_BEL[12]
DOUT_B71	output	CELL_E[3].OUT_BEL[16]
DOUT_B8	output	CELL_E[0].OUT_BEL[8]
DOUT_B9	output	CELL_E[0].OUT_BEL[9]
EN_A	input	CELL_W[2].IMUX_CTRL[3]
EN_B	input	CELL_E[2].IMUX_CTRL[3]
INJECT_DBITERR_A	input	CELL_W[1].IMUX_IMUX[39]
INJECT_DBITERR_B	input	CELL_E[1].IMUX_IMUX[39]
INJECT_SBITERR_A	input	CELL_W[1].IMUX_IMUX[38]
INJECT_SBITERR_B	input	CELL_E[1].IMUX_IMUX[38]
OREG_CAS_CE_A	input	CELL_W[0].IMUX_CTRL[7]
OREG_CAS_CE_B	input	CELL_E[0].IMUX_CTRL[7]
OREG_CE_A	input	CELL_W[1].IMUX_CTRL[3]
OREG_CE_B	input	CELL_E[1].IMUX_CTRL[3]
OREG_ECC_CE_A	input	CELL_W[1].IMUX_CTRL[2]
OREG_ECC_CE_B	input	CELL_E[1].IMUX_CTRL[2]
RDACCESS_A	output	CELL_W[0].OUT_BEL[30]
RDACCESS_B	output	CELL_E[0].OUT_BEL[30]
RDB_WR_A	input	CELL_W[2].IMUX_CTRL[2]
RDB_WR_B	input	CELL_E[2].IMUX_CTRL[2]
RST_A	input	CELL_W[1].IMUX_CTRL[7]
RST_B	input	CELL_E[1].IMUX_CTRL[7]
SBITERR_A	output	CELL_W[0].OUT_BEL[31]
SBITERR_B	output	CELL_E[0].OUT_BEL[31]
SHUTDOWN	input	CELL_W[1].IMUX_CTRL[1]
SLEEP	input	CELL_W[0].IMUX_CTRL[6]
TST_DEEPSLEEP_OUT	output	CELL_W[0].OUT_BEL[26]
TST_RING_ENB	input	CELL_W[3].IMUX_CTRL[4]
TST_RING_OUT	output	CELL_W[3].OUT_BEL[14]
TST_RING_STARTB	input	CELL_W[3].IMUX_CTRL[3]
TST_SHUTDOWN_OUT	output	CELL_W[0].OUT_BEL[27]
TST_SLEEP_OUT	output	CELL_W[0].OUT_BEL[25]

Bel URAM[1]

ultrascaleplus URAM bel URAM[1]
Pin	Direction	Wires
ADDR_A0	input	CELL_W[4].IMUX_IMUX[4]
ADDR_A1	input	CELL_W[4].IMUX_IMUX[24]
ADDR_A10	input	CELL_W[4].IMUX_IMUX[9]
ADDR_A11	input	CELL_W[4].IMUX_IMUX[34]
ADDR_A12	input	CELL_W[5].IMUX_IMUX[8]
ADDR_A13	input	CELL_W[5].IMUX_IMUX[32]
ADDR_A14	input	CELL_W[5].IMUX_IMUX[9]
ADDR_A15	input	CELL_W[5].IMUX_IMUX[34]
ADDR_A16	input	CELL_W[5].IMUX_IMUX[10]
ADDR_A17	input	CELL_W[5].IMUX_IMUX[36]
ADDR_A18	input	CELL_W[5].IMUX_IMUX[39]
ADDR_A19	input	CELL_W[5].IMUX_IMUX[38]
ADDR_A2	input	CELL_W[4].IMUX_IMUX[5]
ADDR_A20	input	CELL_W[5].IMUX_IMUX[12]
ADDR_A21	input	CELL_W[5].IMUX_IMUX[40]
ADDR_A22	input	CELL_W[5].IMUX_IMUX[13]
ADDR_A3	input	CELL_W[4].IMUX_IMUX[26]
ADDR_A4	input	CELL_W[4].IMUX_IMUX[6]
ADDR_A5	input	CELL_W[4].IMUX_IMUX[28]
ADDR_A6	input	CELL_W[4].IMUX_IMUX[31]
ADDR_A7	input	CELL_W[4].IMUX_IMUX[30]
ADDR_A8	input	CELL_W[4].IMUX_IMUX[8]
ADDR_A9	input	CELL_W[4].IMUX_IMUX[32]
ADDR_B0	input	CELL_E[4].IMUX_IMUX[4]
ADDR_B1	input	CELL_E[4].IMUX_IMUX[24]
ADDR_B10	input	CELL_E[4].IMUX_IMUX[9]
ADDR_B11	input	CELL_E[4].IMUX_IMUX[34]
ADDR_B12	input	CELL_E[5].IMUX_IMUX[8]
ADDR_B13	input	CELL_E[5].IMUX_IMUX[32]
ADDR_B14	input	CELL_E[5].IMUX_IMUX[9]
ADDR_B15	input	CELL_E[5].IMUX_IMUX[34]
ADDR_B16	input	CELL_E[5].IMUX_IMUX[10]
ADDR_B17	input	CELL_E[5].IMUX_IMUX[36]
ADDR_B18	input	CELL_E[5].IMUX_IMUX[39]
ADDR_B19	input	CELL_E[5].IMUX_IMUX[38]
ADDR_B2	input	CELL_E[4].IMUX_IMUX[5]
ADDR_B20	input	CELL_E[5].IMUX_IMUX[12]
ADDR_B21	input	CELL_E[5].IMUX_IMUX[40]
ADDR_B22	input	CELL_E[5].IMUX_IMUX[13]
ADDR_B3	input	CELL_E[4].IMUX_IMUX[26]
ADDR_B4	input	CELL_E[4].IMUX_IMUX[6]
ADDR_B5	input	CELL_E[4].IMUX_IMUX[28]
ADDR_B6	input	CELL_E[4].IMUX_IMUX[31]
ADDR_B7	input	CELL_E[4].IMUX_IMUX[30]
ADDR_B8	input	CELL_E[4].IMUX_IMUX[8]
ADDR_B9	input	CELL_E[4].IMUX_IMUX[32]
BWE_A0	input	CELL_W[6].IMUX_IMUX[6]
BWE_A1	input	CELL_W[6].IMUX_IMUX[28]
BWE_A2	input	CELL_W[6].IMUX_IMUX[31]
BWE_A3	input	CELL_W[6].IMUX_IMUX[30]
BWE_A4	input	CELL_W[6].IMUX_IMUX[8]
BWE_A5	input	CELL_W[6].IMUX_IMUX[32]
BWE_A6	input	CELL_W[6].IMUX_IMUX[9]
BWE_A7	input	CELL_W[6].IMUX_IMUX[34]
BWE_A8	input	CELL_W[6].IMUX_IMUX[10]
BWE_B0	input	CELL_E[6].IMUX_IMUX[6]
BWE_B1	input	CELL_E[6].IMUX_IMUX[28]
BWE_B2	input	CELL_E[6].IMUX_IMUX[31]
BWE_B3	input	CELL_E[6].IMUX_IMUX[30]
BWE_B4	input	CELL_E[6].IMUX_IMUX[8]
BWE_B5	input	CELL_E[6].IMUX_IMUX[32]
BWE_B6	input	CELL_E[6].IMUX_IMUX[9]
BWE_B7	input	CELL_E[6].IMUX_IMUX[34]
BWE_B8	input	CELL_E[6].IMUX_IMUX[10]
CLK	input	CELL_W[6].IMUX_CTRL[4]
DBITERR_A	output	CELL_W[4].OUT_BEL[15]
DBITERR_B	output	CELL_E[4].OUT_BEL[15]
DEEPSLEEP	input	CELL_W[4].IMUX_CTRL[6]
DIN_A0	input	CELL_W[3].IMUX_IMUX[12]
DIN_A1	input	CELL_W[3].IMUX_IMUX[40]
DIN_A10	input	CELL_W[4].IMUX_IMUX[1]
DIN_A11	input	CELL_W[4].IMUX_IMUX[18]
DIN_A12	input	CELL_W[4].IMUX_IMUX[2]
DIN_A13	input	CELL_W[4].IMUX_IMUX[20]
DIN_A14	input	CELL_W[4].IMUX_IMUX[23]
DIN_A15	input	CELL_W[4].IMUX_IMUX[22]
DIN_A16	input	CELL_W[4].IMUX_IMUX[10]
DIN_A17	input	CELL_W[4].IMUX_IMUX[36]
DIN_A18	input	CELL_W[4].IMUX_IMUX[12]
DIN_A19	input	CELL_W[4].IMUX_IMUX[40]
DIN_A2	input	CELL_W[3].IMUX_IMUX[13]
DIN_A20	input	CELL_W[4].IMUX_IMUX[13]
DIN_A21	input	CELL_W[4].IMUX_IMUX[42]
DIN_A22	input	CELL_W[4].IMUX_IMUX[14]
DIN_A23	input	CELL_W[4].IMUX_IMUX[44]
DIN_A24	input	CELL_W[4].IMUX_IMUX[47]
DIN_A25	input	CELL_W[4].IMUX_IMUX[46]
DIN_A26	input	CELL_W[5].IMUX_IMUX[0]
DIN_A27	input	CELL_W[5].IMUX_IMUX[16]
DIN_A28	input	CELL_W[5].IMUX_IMUX[1]
DIN_A29	input	CELL_W[5].IMUX_IMUX[18]
DIN_A3	input	CELL_W[3].IMUX_IMUX[42]
DIN_A30	input	CELL_W[5].IMUX_IMUX[2]
DIN_A31	input	CELL_W[5].IMUX_IMUX[20]
DIN_A32	input	CELL_W[5].IMUX_IMUX[23]
DIN_A33	input	CELL_W[5].IMUX_IMUX[22]
DIN_A34	input	CELL_W[5].IMUX_IMUX[4]
DIN_A35	input	CELL_W[5].IMUX_IMUX[24]
DIN_A36	input	CELL_W[5].IMUX_IMUX[5]
DIN_A37	input	CELL_W[5].IMUX_IMUX[26]
DIN_A38	input	CELL_W[5].IMUX_IMUX[6]
DIN_A39	input	CELL_W[5].IMUX_IMUX[28]
DIN_A4	input	CELL_W[3].IMUX_IMUX[14]
DIN_A40	input	CELL_W[5].IMUX_IMUX[42]
DIN_A41	input	CELL_W[5].IMUX_IMUX[14]
DIN_A42	input	CELL_W[5].IMUX_IMUX[44]
DIN_A43	input	CELL_W[5].IMUX_IMUX[47]
DIN_A44	input	CELL_W[6].IMUX_IMUX[0]
DIN_A45	input	CELL_W[6].IMUX_IMUX[16]
DIN_A46	input	CELL_W[6].IMUX_IMUX[1]
DIN_A47	input	CELL_W[6].IMUX_IMUX[18]
DIN_A48	input	CELL_W[6].IMUX_IMUX[2]
DIN_A49	input	CELL_W[6].IMUX_IMUX[20]
DIN_A5	input	CELL_W[3].IMUX_IMUX[44]
DIN_A50	input	CELL_W[6].IMUX_IMUX[23]
DIN_A51	input	CELL_W[6].IMUX_IMUX[22]
DIN_A52	input	CELL_W[6].IMUX_IMUX[4]
DIN_A53	input	CELL_W[6].IMUX_IMUX[24]
DIN_A54	input	CELL_W[6].IMUX_IMUX[5]
DIN_A55	input	CELL_W[6].IMUX_IMUX[26]
DIN_A56	input	CELL_W[6].IMUX_IMUX[39]
DIN_A57	input	CELL_W[6].IMUX_IMUX[38]
DIN_A58	input	CELL_W[6].IMUX_IMUX[12]
DIN_A59	input	CELL_W[6].IMUX_IMUX[40]
DIN_A6	input	CELL_W[3].IMUX_IMUX[47]
DIN_A60	input	CELL_W[6].IMUX_IMUX[13]
DIN_A61	input	CELL_W[6].IMUX_IMUX[42]
DIN_A62	input	CELL_W[6].IMUX_IMUX[14]
DIN_A63	input	CELL_W[6].IMUX_IMUX[44]
DIN_A64	input	CELL_W[6].IMUX_IMUX[47]
DIN_A65	input	CELL_W[6].IMUX_IMUX[46]
DIN_A66	input	CELL_W[7].IMUX_IMUX[0]
DIN_A67	input	CELL_W[7].IMUX_IMUX[16]
DIN_A68	input	CELL_W[7].IMUX_IMUX[1]
DIN_A69	input	CELL_W[7].IMUX_IMUX[18]
DIN_A7	input	CELL_W[3].IMUX_IMUX[46]
DIN_A70	input	CELL_W[7].IMUX_IMUX[2]
DIN_A71	input	CELL_W[7].IMUX_IMUX[20]
DIN_A8	input	CELL_W[4].IMUX_IMUX[0]
DIN_A9	input	CELL_W[4].IMUX_IMUX[16]
DIN_B0	input	CELL_E[3].IMUX_IMUX[12]
DIN_B1	input	CELL_E[3].IMUX_IMUX[40]
DIN_B10	input	CELL_E[4].IMUX_IMUX[1]
DIN_B11	input	CELL_E[4].IMUX_IMUX[18]
DIN_B12	input	CELL_E[4].IMUX_IMUX[2]
DIN_B13	input	CELL_E[4].IMUX_IMUX[20]
DIN_B14	input	CELL_E[4].IMUX_IMUX[23]
DIN_B15	input	CELL_E[4].IMUX_IMUX[22]
DIN_B16	input	CELL_E[4].IMUX_IMUX[10]
DIN_B17	input	CELL_E[4].IMUX_IMUX[36]
DIN_B18	input	CELL_E[4].IMUX_IMUX[12]
DIN_B19	input	CELL_E[4].IMUX_IMUX[40]
DIN_B2	input	CELL_E[3].IMUX_IMUX[13]
DIN_B20	input	CELL_E[4].IMUX_IMUX[13]
DIN_B21	input	CELL_E[4].IMUX_IMUX[42]
DIN_B22	input	CELL_E[4].IMUX_IMUX[14]
DIN_B23	input	CELL_E[4].IMUX_IMUX[44]
DIN_B24	input	CELL_E[4].IMUX_IMUX[47]
DIN_B25	input	CELL_E[4].IMUX_IMUX[46]
DIN_B26	input	CELL_E[5].IMUX_IMUX[0]
DIN_B27	input	CELL_E[5].IMUX_IMUX[16]
DIN_B28	input	CELL_E[5].IMUX_IMUX[1]
DIN_B29	input	CELL_E[5].IMUX_IMUX[18]
DIN_B3	input	CELL_E[3].IMUX_IMUX[42]
DIN_B30	input	CELL_E[5].IMUX_IMUX[2]
DIN_B31	input	CELL_E[5].IMUX_IMUX[20]
DIN_B32	input	CELL_E[5].IMUX_IMUX[23]
DIN_B33	input	CELL_E[5].IMUX_IMUX[22]
DIN_B34	input	CELL_E[5].IMUX_IMUX[4]
DIN_B35	input	CELL_E[5].IMUX_IMUX[24]
DIN_B36	input	CELL_E[5].IMUX_IMUX[5]
DIN_B37	input	CELL_E[5].IMUX_IMUX[26]
DIN_B38	input	CELL_E[5].IMUX_IMUX[6]
DIN_B39	input	CELL_E[5].IMUX_IMUX[28]
DIN_B4	input	CELL_E[3].IMUX_IMUX[14]
DIN_B40	input	CELL_E[5].IMUX_IMUX[42]
DIN_B41	input	CELL_E[5].IMUX_IMUX[14]
DIN_B42	input	CELL_E[5].IMUX_IMUX[44]
DIN_B43	input	CELL_E[5].IMUX_IMUX[47]
DIN_B44	input	CELL_E[6].IMUX_IMUX[0]
DIN_B45	input	CELL_E[6].IMUX_IMUX[16]
DIN_B46	input	CELL_E[6].IMUX_IMUX[1]
DIN_B47	input	CELL_E[6].IMUX_IMUX[18]
DIN_B48	input	CELL_E[6].IMUX_IMUX[2]
DIN_B49	input	CELL_E[6].IMUX_IMUX[20]
DIN_B5	input	CELL_E[3].IMUX_IMUX[44]
DIN_B50	input	CELL_E[6].IMUX_IMUX[23]
DIN_B51	input	CELL_E[6].IMUX_IMUX[22]
DIN_B52	input	CELL_E[6].IMUX_IMUX[4]
DIN_B53	input	CELL_E[6].IMUX_IMUX[24]
DIN_B54	input	CELL_E[6].IMUX_IMUX[5]
DIN_B55	input	CELL_E[6].IMUX_IMUX[26]
DIN_B56	input	CELL_E[6].IMUX_IMUX[39]
DIN_B57	input	CELL_E[6].IMUX_IMUX[38]
DIN_B58	input	CELL_E[6].IMUX_IMUX[12]
DIN_B59	input	CELL_E[6].IMUX_IMUX[40]
DIN_B6	input	CELL_E[3].IMUX_IMUX[47]
DIN_B60	input	CELL_E[6].IMUX_IMUX[13]
DIN_B61	input	CELL_E[6].IMUX_IMUX[42]
DIN_B62	input	CELL_E[6].IMUX_IMUX[14]
DIN_B63	input	CELL_E[6].IMUX_IMUX[44]
DIN_B64	input	CELL_E[6].IMUX_IMUX[47]
DIN_B65	input	CELL_E[6].IMUX_IMUX[46]
DIN_B66	input	CELL_E[7].IMUX_IMUX[0]
DIN_B67	input	CELL_E[7].IMUX_IMUX[16]
DIN_B68	input	CELL_E[7].IMUX_IMUX[1]
DIN_B69	input	CELL_E[7].IMUX_IMUX[18]
DIN_B7	input	CELL_E[3].IMUX_IMUX[46]
DIN_B70	input	CELL_E[7].IMUX_IMUX[2]
DIN_B71	input	CELL_E[7].IMUX_IMUX[20]
DIN_B8	input	CELL_E[4].IMUX_IMUX[0]
DIN_B9	input	CELL_E[4].IMUX_IMUX[16]
DOUT_A0	output	CELL_W[3].OUT_BEL[24]
DOUT_A1	output	CELL_W[3].OUT_BEL[25]
DOUT_A10	output	CELL_W[4].OUT_BEL[2]
DOUT_A11	output	CELL_W[4].OUT_BEL[3]
DOUT_A12	output	CELL_W[4].OUT_BEL[6]
DOUT_A13	output	CELL_W[4].OUT_BEL[8]
DOUT_A14	output	CELL_W[4].OUT_BEL[12]
DOUT_A15	output	CELL_W[4].OUT_BEL[13]
DOUT_A16	output	CELL_W[4].OUT_BEL[14]
DOUT_A17	output	CELL_W[4].OUT_BEL[16]
DOUT_A18	output	CELL_W[4].OUT_BEL[20]
DOUT_A19	output	CELL_W[4].OUT_BEL[21]
DOUT_A2	output	CELL_W[3].OUT_BEL[26]
DOUT_A20	output	CELL_W[4].OUT_BEL[24]
DOUT_A21	output	CELL_W[4].OUT_BEL[27]
DOUT_A22	output	CELL_W[4].OUT_BEL[28]
DOUT_A23	output	CELL_W[4].OUT_BEL[29]
DOUT_A24	output	CELL_W[4].OUT_BEL[30]
DOUT_A25	output	CELL_W[4].OUT_BEL[31]
DOUT_A26	output	CELL_W[5].OUT_BEL[0]
DOUT_A27	output	CELL_W[5].OUT_BEL[1]
DOUT_A28	output	CELL_W[5].OUT_BEL[2]
DOUT_A29	output	CELL_W[5].OUT_BEL[3]
DOUT_A3	output	CELL_W[3].OUT_BEL[27]
DOUT_A30	output	CELL_W[5].OUT_BEL[4]
DOUT_A31	output	CELL_W[5].OUT_BEL[5]
DOUT_A32	output	CELL_W[5].OUT_BEL[6]
DOUT_A33	output	CELL_W[5].OUT_BEL[7]
DOUT_A34	output	CELL_W[5].OUT_BEL[8]
DOUT_A35	output	CELL_W[5].OUT_BEL[9]
DOUT_A36	output	CELL_W[5].OUT_BEL[10]
DOUT_A37	output	CELL_W[5].OUT_BEL[11]
DOUT_A38	output	CELL_W[5].OUT_BEL[12]
DOUT_A39	output	CELL_W[5].OUT_BEL[17]
DOUT_A4	output	CELL_W[3].OUT_BEL[28]
DOUT_A40	output	CELL_W[5].OUT_BEL[23]
DOUT_A41	output	CELL_W[5].OUT_BEL[27]
DOUT_A42	output	CELL_W[5].OUT_BEL[29]
DOUT_A43	output	CELL_W[5].OUT_BEL[30]
DOUT_A44	output	CELL_W[5].OUT_BEL[31]
DOUT_A45	output	CELL_W[6].OUT_BEL[1]
DOUT_A46	output	CELL_W[6].OUT_BEL[2]
DOUT_A47	output	CELL_W[6].OUT_BEL[3]
DOUT_A48	output	CELL_W[6].OUT_BEL[4]
DOUT_A49	output	CELL_W[6].OUT_BEL[5]
DOUT_A5	output	CELL_W[3].OUT_BEL[29]
DOUT_A50	output	CELL_W[6].OUT_BEL[6]
DOUT_A51	output	CELL_W[6].OUT_BEL[7]
DOUT_A52	output	CELL_W[6].OUT_BEL[9]
DOUT_A53	output	CELL_W[6].OUT_BEL[11]
DOUT_A54	output	CELL_W[6].OUT_BEL[14]
DOUT_A55	output	CELL_W[6].OUT_BEL[16]
DOUT_A56	output	CELL_W[6].OUT_BEL[18]
DOUT_A57	output	CELL_W[6].OUT_BEL[20]
DOUT_A58	output	CELL_W[6].OUT_BEL[22]
DOUT_A59	output	CELL_W[6].OUT_BEL[24]
DOUT_A6	output	CELL_W[3].OUT_BEL[30]
DOUT_A60	output	CELL_W[6].OUT_BEL[26]
DOUT_A61	output	CELL_W[6].OUT_BEL[27]
DOUT_A62	output	CELL_W[6].OUT_BEL[28]
DOUT_A63	output	CELL_W[6].OUT_BEL[29]
DOUT_A64	output	CELL_W[6].OUT_BEL[30]
DOUT_A65	output	CELL_W[6].OUT_BEL[31]
DOUT_A66	output	CELL_W[7].OUT_BEL[0]
DOUT_A67	output	CELL_W[7].OUT_BEL[1]
DOUT_A68	output	CELL_W[7].OUT_BEL[2]
DOUT_A69	output	CELL_W[7].OUT_BEL[3]
DOUT_A7	output	CELL_W[3].OUT_BEL[31]
DOUT_A70	output	CELL_W[7].OUT_BEL[4]
DOUT_A71	output	CELL_W[7].OUT_BEL[8]
DOUT_A8	output	CELL_W[4].OUT_BEL[0]
DOUT_A9	output	CELL_W[4].OUT_BEL[1]
DOUT_B0	output	CELL_E[3].OUT_BEL[24]
DOUT_B1	output	CELL_E[3].OUT_BEL[25]
DOUT_B10	output	CELL_E[4].OUT_BEL[2]
DOUT_B11	output	CELL_E[4].OUT_BEL[3]
DOUT_B12	output	CELL_E[4].OUT_BEL[6]
DOUT_B13	output	CELL_E[4].OUT_BEL[8]
DOUT_B14	output	CELL_E[4].OUT_BEL[12]
DOUT_B15	output	CELL_E[4].OUT_BEL[13]
DOUT_B16	output	CELL_E[4].OUT_BEL[14]
DOUT_B17	output	CELL_E[4].OUT_BEL[16]
DOUT_B18	output	CELL_E[4].OUT_BEL[20]
DOUT_B19	output	CELL_E[4].OUT_BEL[21]
DOUT_B2	output	CELL_E[3].OUT_BEL[26]
DOUT_B20	output	CELL_E[4].OUT_BEL[24]
DOUT_B21	output	CELL_E[4].OUT_BEL[27]
DOUT_B22	output	CELL_E[4].OUT_BEL[28]
DOUT_B23	output	CELL_E[4].OUT_BEL[29]
DOUT_B24	output	CELL_E[4].OUT_BEL[30]
DOUT_B25	output	CELL_E[4].OUT_BEL[31]
DOUT_B26	output	CELL_E[5].OUT_BEL[0]
DOUT_B27	output	CELL_E[5].OUT_BEL[1]
DOUT_B28	output	CELL_E[5].OUT_BEL[2]
DOUT_B29	output	CELL_E[5].OUT_BEL[3]
DOUT_B3	output	CELL_E[3].OUT_BEL[27]
DOUT_B30	output	CELL_E[5].OUT_BEL[4]
DOUT_B31	output	CELL_E[5].OUT_BEL[5]
DOUT_B32	output	CELL_E[5].OUT_BEL[6]
DOUT_B33	output	CELL_E[5].OUT_BEL[7]
DOUT_B34	output	CELL_E[5].OUT_BEL[8]
DOUT_B35	output	CELL_E[5].OUT_BEL[9]
DOUT_B36	output	CELL_E[5].OUT_BEL[10]
DOUT_B37	output	CELL_E[5].OUT_BEL[11]
DOUT_B38	output	CELL_E[5].OUT_BEL[12]
DOUT_B39	output	CELL_E[5].OUT_BEL[17]
DOUT_B4	output	CELL_E[3].OUT_BEL[28]
DOUT_B40	output	CELL_E[5].OUT_BEL[23]
DOUT_B41	output	CELL_E[5].OUT_BEL[27]
DOUT_B42	output	CELL_E[5].OUT_BEL[29]
DOUT_B43	output	CELL_E[5].OUT_BEL[30]
DOUT_B44	output	CELL_E[5].OUT_BEL[31]
DOUT_B45	output	CELL_E[6].OUT_BEL[1]
DOUT_B46	output	CELL_E[6].OUT_BEL[2]
DOUT_B47	output	CELL_E[6].OUT_BEL[3]
DOUT_B48	output	CELL_E[6].OUT_BEL[4]
DOUT_B49	output	CELL_E[6].OUT_BEL[5]
DOUT_B5	output	CELL_E[3].OUT_BEL[29]
DOUT_B50	output	CELL_E[6].OUT_BEL[6]
DOUT_B51	output	CELL_E[6].OUT_BEL[7]
DOUT_B52	output	CELL_E[6].OUT_BEL[9]
DOUT_B53	output	CELL_E[6].OUT_BEL[11]
DOUT_B54	output	CELL_E[6].OUT_BEL[14]
DOUT_B55	output	CELL_E[6].OUT_BEL[16]
DOUT_B56	output	CELL_E[6].OUT_BEL[18]
DOUT_B57	output	CELL_E[6].OUT_BEL[20]
DOUT_B58	output	CELL_E[6].OUT_BEL[22]
DOUT_B59	output	CELL_E[6].OUT_BEL[24]
DOUT_B6	output	CELL_E[3].OUT_BEL[30]
DOUT_B60	output	CELL_E[6].OUT_BEL[26]
DOUT_B61	output	CELL_E[6].OUT_BEL[27]
DOUT_B62	output	CELL_E[6].OUT_BEL[28]
DOUT_B63	output	CELL_E[6].OUT_BEL[29]
DOUT_B64	output	CELL_E[6].OUT_BEL[30]
DOUT_B65	output	CELL_E[6].OUT_BEL[31]
DOUT_B66	output	CELL_E[7].OUT_BEL[0]
DOUT_B67	output	CELL_E[7].OUT_BEL[1]
DOUT_B68	output	CELL_E[7].OUT_BEL[2]
DOUT_B69	output	CELL_E[7].OUT_BEL[3]
DOUT_B7	output	CELL_E[3].OUT_BEL[31]
DOUT_B70	output	CELL_E[7].OUT_BEL[4]
DOUT_B71	output	CELL_E[7].OUT_BEL[8]
DOUT_B8	output	CELL_E[4].OUT_BEL[0]
DOUT_B9	output	CELL_E[4].OUT_BEL[1]
EN_A	input	CELL_W[6].IMUX_CTRL[1]
EN_B	input	CELL_E[6].IMUX_CTRL[1]
INJECT_DBITERR_A	input	CELL_W[5].IMUX_IMUX[31]
INJECT_DBITERR_B	input	CELL_E[5].IMUX_IMUX[31]
INJECT_SBITERR_A	input	CELL_W[5].IMUX_IMUX[30]
INJECT_SBITERR_B	input	CELL_E[5].IMUX_IMUX[30]
OREG_CAS_CE_A	input	CELL_W[4].IMUX_CTRL[5]
OREG_CAS_CE_B	input	CELL_E[4].IMUX_CTRL[5]
OREG_CE_A	input	CELL_W[5].IMUX_CTRL[1]
OREG_CE_B	input	CELL_E[5].IMUX_CTRL[1]
OREG_ECC_CE_A	input	CELL_W[5].IMUX_CTRL[0]
OREG_ECC_CE_B	input	CELL_E[5].IMUX_CTRL[0]
RDACCESS_A	output	CELL_W[4].OUT_BEL[22]
RDACCESS_B	output	CELL_E[4].OUT_BEL[22]
RDB_WR_A	input	CELL_W[6].IMUX_CTRL[0]
RDB_WR_B	input	CELL_E[6].IMUX_CTRL[0]
RST_A	input	CELL_W[5].IMUX_CTRL[5]
RST_B	input	CELL_E[5].IMUX_CTRL[5]
SBITERR_A	output	CELL_W[4].OUT_BEL[23]
SBITERR_B	output	CELL_E[4].OUT_BEL[23]
SHUTDOWN	input	CELL_W[4].IMUX_CTRL[7]
SLEEP	input	CELL_W[4].IMUX_CTRL[4]
TST_DEEPSLEEP_OUT	output	CELL_W[4].OUT_BEL[18]
TST_RING_ENB	input	CELL_W[7].IMUX_CTRL[2]
TST_RING_OUT	output	CELL_W[7].OUT_BEL[6]
TST_RING_STARTB	input	CELL_W[7].IMUX_CTRL[1]
TST_SHUTDOWN_OUT	output	CELL_W[4].OUT_BEL[19]
TST_SLEEP_OUT	output	CELL_W[4].OUT_BEL[17]

Bel URAM[2]

ultrascaleplus URAM bel URAM[2]
Pin	Direction	Wires
ADDR_A0	input	CELL_W[8].IMUX_IMUX[0]
ADDR_A1	input	CELL_W[8].IMUX_IMUX[16]
ADDR_A10	input	CELL_W[8].IMUX_IMUX[5]
ADDR_A11	input	CELL_W[8].IMUX_IMUX[26]
ADDR_A12	input	CELL_W[9].IMUX_IMUX[4]
ADDR_A13	input	CELL_W[9].IMUX_IMUX[24]
ADDR_A14	input	CELL_W[9].IMUX_IMUX[5]
ADDR_A15	input	CELL_W[9].IMUX_IMUX[26]
ADDR_A16	input	CELL_W[9].IMUX_IMUX[6]
ADDR_A17	input	CELL_W[9].IMUX_IMUX[28]
ADDR_A18	input	CELL_W[9].IMUX_IMUX[31]
ADDR_A19	input	CELL_W[9].IMUX_IMUX[30]
ADDR_A2	input	CELL_W[8].IMUX_IMUX[1]
ADDR_A20	input	CELL_W[9].IMUX_IMUX[8]
ADDR_A21	input	CELL_W[9].IMUX_IMUX[32]
ADDR_A22	input	CELL_W[9].IMUX_IMUX[9]
ADDR_A3	input	CELL_W[8].IMUX_IMUX[18]
ADDR_A4	input	CELL_W[8].IMUX_IMUX[2]
ADDR_A5	input	CELL_W[8].IMUX_IMUX[20]
ADDR_A6	input	CELL_W[8].IMUX_IMUX[23]
ADDR_A7	input	CELL_W[8].IMUX_IMUX[22]
ADDR_A8	input	CELL_W[8].IMUX_IMUX[4]
ADDR_A9	input	CELL_W[8].IMUX_IMUX[24]
ADDR_B0	input	CELL_E[8].IMUX_IMUX[0]
ADDR_B1	input	CELL_E[8].IMUX_IMUX[16]
ADDR_B10	input	CELL_E[8].IMUX_IMUX[5]
ADDR_B11	input	CELL_E[8].IMUX_IMUX[26]
ADDR_B12	input	CELL_E[9].IMUX_IMUX[4]
ADDR_B13	input	CELL_E[9].IMUX_IMUX[24]
ADDR_B14	input	CELL_E[9].IMUX_IMUX[5]
ADDR_B15	input	CELL_E[9].IMUX_IMUX[26]
ADDR_B16	input	CELL_E[9].IMUX_IMUX[6]
ADDR_B17	input	CELL_E[9].IMUX_IMUX[28]
ADDR_B18	input	CELL_E[9].IMUX_IMUX[31]
ADDR_B19	input	CELL_E[9].IMUX_IMUX[30]
ADDR_B2	input	CELL_E[8].IMUX_IMUX[1]
ADDR_B20	input	CELL_E[9].IMUX_IMUX[8]
ADDR_B21	input	CELL_E[9].IMUX_IMUX[32]
ADDR_B22	input	CELL_E[9].IMUX_IMUX[9]
ADDR_B3	input	CELL_E[8].IMUX_IMUX[18]
ADDR_B4	input	CELL_E[8].IMUX_IMUX[2]
ADDR_B5	input	CELL_E[8].IMUX_IMUX[20]
ADDR_B6	input	CELL_E[8].IMUX_IMUX[23]
ADDR_B7	input	CELL_E[8].IMUX_IMUX[22]
ADDR_B8	input	CELL_E[8].IMUX_IMUX[4]
ADDR_B9	input	CELL_E[8].IMUX_IMUX[24]
BWE_A0	input	CELL_W[10].IMUX_IMUX[2]
BWE_A1	input	CELL_W[10].IMUX_IMUX[20]
BWE_A2	input	CELL_W[10].IMUX_IMUX[23]
BWE_A3	input	CELL_W[10].IMUX_IMUX[22]
BWE_A4	input	CELL_W[10].IMUX_IMUX[4]
BWE_A5	input	CELL_W[10].IMUX_IMUX[24]
BWE_A6	input	CELL_W[10].IMUX_IMUX[5]
BWE_A7	input	CELL_W[10].IMUX_IMUX[26]
BWE_A8	input	CELL_W[10].IMUX_IMUX[6]
BWE_B0	input	CELL_E[10].IMUX_IMUX[2]
BWE_B1	input	CELL_E[10].IMUX_IMUX[20]
BWE_B2	input	CELL_E[10].IMUX_IMUX[23]
BWE_B3	input	CELL_E[10].IMUX_IMUX[22]
BWE_B4	input	CELL_E[10].IMUX_IMUX[4]
BWE_B5	input	CELL_E[10].IMUX_IMUX[24]
BWE_B6	input	CELL_E[10].IMUX_IMUX[5]
BWE_B7	input	CELL_E[10].IMUX_IMUX[26]
BWE_B8	input	CELL_E[10].IMUX_IMUX[6]
CLK	input	CELL_W[10].IMUX_CTRL[4]
DBITERR_A	output	CELL_W[8].OUT_BEL[7]
DBITERR_B	output	CELL_E[8].OUT_BEL[7]
DEEPSLEEP	input	CELL_W[8].IMUX_CTRL[4]
DIN_A0	input	CELL_W[7].IMUX_IMUX[8]
DIN_A1	input	CELL_W[7].IMUX_IMUX[32]
DIN_A10	input	CELL_W[7].IMUX_IMUX[13]
DIN_A11	input	CELL_W[7].IMUX_IMUX[42]
DIN_A12	input	CELL_W[7].IMUX_IMUX[14]
DIN_A13	input	CELL_W[7].IMUX_IMUX[44]
DIN_A14	input	CELL_W[7].IMUX_IMUX[47]
DIN_A15	input	CELL_W[7].IMUX_IMUX[46]
DIN_A16	input	CELL_W[8].IMUX_IMUX[6]
DIN_A17	input	CELL_W[8].IMUX_IMUX[28]
DIN_A18	input	CELL_W[8].IMUX_IMUX[8]
DIN_A19	input	CELL_W[8].IMUX_IMUX[32]
DIN_A2	input	CELL_W[7].IMUX_IMUX[9]
DIN_A20	input	CELL_W[8].IMUX_IMUX[9]
DIN_A21	input	CELL_W[8].IMUX_IMUX[34]
DIN_A22	input	CELL_W[8].IMUX_IMUX[10]
DIN_A23	input	CELL_W[8].IMUX_IMUX[36]
DIN_A24	input	CELL_W[8].IMUX_IMUX[39]
DIN_A25	input	CELL_W[8].IMUX_IMUX[38]
DIN_A26	input	CELL_W[8].IMUX_IMUX[12]
DIN_A27	input	CELL_W[8].IMUX_IMUX[40]
DIN_A28	input	CELL_W[8].IMUX_IMUX[13]
DIN_A29	input	CELL_W[8].IMUX_IMUX[42]
DIN_A3	input	CELL_W[7].IMUX_IMUX[34]
DIN_A30	input	CELL_W[8].IMUX_IMUX[14]
DIN_A31	input	CELL_W[8].IMUX_IMUX[44]
DIN_A32	input	CELL_W[8].IMUX_IMUX[47]
DIN_A33	input	CELL_W[8].IMUX_IMUX[46]
DIN_A34	input	CELL_W[9].IMUX_IMUX[0]
DIN_A35	input	CELL_W[9].IMUX_IMUX[16]
DIN_A36	input	CELL_W[9].IMUX_IMUX[1]
DIN_A37	input	CELL_W[9].IMUX_IMUX[18]
DIN_A38	input	CELL_W[9].IMUX_IMUX[2]
DIN_A39	input	CELL_W[9].IMUX_IMUX[20]
DIN_A4	input	CELL_W[7].IMUX_IMUX[10]
DIN_A40	input	CELL_W[9].IMUX_IMUX[34]
DIN_A41	input	CELL_W[9].IMUX_IMUX[10]
DIN_A42	input	CELL_W[9].IMUX_IMUX[36]
DIN_A43	input	CELL_W[9].IMUX_IMUX[39]
DIN_A44	input	CELL_W[9].IMUX_IMUX[12]
DIN_A45	input	CELL_W[9].IMUX_IMUX[40]
DIN_A46	input	CELL_W[9].IMUX_IMUX[13]
DIN_A47	input	CELL_W[9].IMUX_IMUX[42]
DIN_A48	input	CELL_W[9].IMUX_IMUX[14]
DIN_A49	input	CELL_W[9].IMUX_IMUX[44]
DIN_A5	input	CELL_W[7].IMUX_IMUX[36]
DIN_A50	input	CELL_W[9].IMUX_IMUX[47]
DIN_A51	input	CELL_W[9].IMUX_IMUX[46]
DIN_A52	input	CELL_W[10].IMUX_IMUX[0]
DIN_A53	input	CELL_W[10].IMUX_IMUX[16]
DIN_A54	input	CELL_W[10].IMUX_IMUX[1]
DIN_A55	input	CELL_W[10].IMUX_IMUX[18]
DIN_A56	input	CELL_W[10].IMUX_IMUX[31]
DIN_A57	input	CELL_W[10].IMUX_IMUX[30]
DIN_A58	input	CELL_W[10].IMUX_IMUX[8]
DIN_A59	input	CELL_W[10].IMUX_IMUX[32]
DIN_A6	input	CELL_W[7].IMUX_IMUX[39]
DIN_A60	input	CELL_W[10].IMUX_IMUX[9]
DIN_A61	input	CELL_W[10].IMUX_IMUX[34]
DIN_A62	input	CELL_W[10].IMUX_IMUX[10]
DIN_A63	input	CELL_W[10].IMUX_IMUX[36]
DIN_A64	input	CELL_W[10].IMUX_IMUX[39]
DIN_A65	input	CELL_W[10].IMUX_IMUX[38]
DIN_A66	input	CELL_W[10].IMUX_IMUX[12]
DIN_A67	input	CELL_W[10].IMUX_IMUX[40]
DIN_A68	input	CELL_W[10].IMUX_IMUX[13]
DIN_A69	input	CELL_W[10].IMUX_IMUX[42]
DIN_A7	input	CELL_W[7].IMUX_IMUX[38]
DIN_A70	input	CELL_W[10].IMUX_IMUX[14]
DIN_A71	input	CELL_W[10].IMUX_IMUX[44]
DIN_A8	input	CELL_W[7].IMUX_IMUX[12]
DIN_A9	input	CELL_W[7].IMUX_IMUX[40]
DIN_B0	input	CELL_E[7].IMUX_IMUX[8]
DIN_B1	input	CELL_E[7].IMUX_IMUX[32]
DIN_B10	input	CELL_E[7].IMUX_IMUX[13]
DIN_B11	input	CELL_E[7].IMUX_IMUX[42]
DIN_B12	input	CELL_E[7].IMUX_IMUX[14]
DIN_B13	input	CELL_E[7].IMUX_IMUX[44]
DIN_B14	input	CELL_E[7].IMUX_IMUX[47]
DIN_B15	input	CELL_E[7].IMUX_IMUX[46]
DIN_B16	input	CELL_E[8].IMUX_IMUX[6]
DIN_B17	input	CELL_E[8].IMUX_IMUX[28]
DIN_B18	input	CELL_E[8].IMUX_IMUX[8]
DIN_B19	input	CELL_E[8].IMUX_IMUX[32]
DIN_B2	input	CELL_E[7].IMUX_IMUX[9]
DIN_B20	input	CELL_E[8].IMUX_IMUX[9]
DIN_B21	input	CELL_E[8].IMUX_IMUX[34]
DIN_B22	input	CELL_E[8].IMUX_IMUX[10]
DIN_B23	input	CELL_E[8].IMUX_IMUX[36]
DIN_B24	input	CELL_E[8].IMUX_IMUX[39]
DIN_B25	input	CELL_E[8].IMUX_IMUX[38]
DIN_B26	input	CELL_E[8].IMUX_IMUX[12]
DIN_B27	input	CELL_E[8].IMUX_IMUX[40]
DIN_B28	input	CELL_E[8].IMUX_IMUX[13]
DIN_B29	input	CELL_E[8].IMUX_IMUX[42]
DIN_B3	input	CELL_E[7].IMUX_IMUX[34]
DIN_B30	input	CELL_E[8].IMUX_IMUX[14]
DIN_B31	input	CELL_E[8].IMUX_IMUX[44]
DIN_B32	input	CELL_E[8].IMUX_IMUX[47]
DIN_B33	input	CELL_E[8].IMUX_IMUX[46]
DIN_B34	input	CELL_E[9].IMUX_IMUX[0]
DIN_B35	input	CELL_E[9].IMUX_IMUX[16]
DIN_B36	input	CELL_E[9].IMUX_IMUX[1]
DIN_B37	input	CELL_E[9].IMUX_IMUX[18]
DIN_B38	input	CELL_E[9].IMUX_IMUX[2]
DIN_B39	input	CELL_E[9].IMUX_IMUX[20]
DIN_B4	input	CELL_E[7].IMUX_IMUX[10]
DIN_B40	input	CELL_E[9].IMUX_IMUX[34]
DIN_B41	input	CELL_E[9].IMUX_IMUX[10]
DIN_B42	input	CELL_E[9].IMUX_IMUX[36]
DIN_B43	input	CELL_E[9].IMUX_IMUX[39]
DIN_B44	input	CELL_E[9].IMUX_IMUX[12]
DIN_B45	input	CELL_E[9].IMUX_IMUX[40]
DIN_B46	input	CELL_E[9].IMUX_IMUX[13]
DIN_B47	input	CELL_E[9].IMUX_IMUX[42]
DIN_B48	input	CELL_E[9].IMUX_IMUX[14]
DIN_B49	input	CELL_E[9].IMUX_IMUX[44]
DIN_B5	input	CELL_E[7].IMUX_IMUX[36]
DIN_B50	input	CELL_E[9].IMUX_IMUX[47]
DIN_B51	input	CELL_E[9].IMUX_IMUX[46]
DIN_B52	input	CELL_E[10].IMUX_IMUX[0]
DIN_B53	input	CELL_E[10].IMUX_IMUX[16]
DIN_B54	input	CELL_E[10].IMUX_IMUX[1]
DIN_B55	input	CELL_E[10].IMUX_IMUX[18]
DIN_B56	input	CELL_E[10].IMUX_IMUX[31]
DIN_B57	input	CELL_E[10].IMUX_IMUX[30]
DIN_B58	input	CELL_E[10].IMUX_IMUX[8]
DIN_B59	input	CELL_E[10].IMUX_IMUX[32]
DIN_B6	input	CELL_E[7].IMUX_IMUX[39]
DIN_B60	input	CELL_E[10].IMUX_IMUX[9]
DIN_B61	input	CELL_E[10].IMUX_IMUX[34]
DIN_B62	input	CELL_E[10].IMUX_IMUX[10]
DIN_B63	input	CELL_E[10].IMUX_IMUX[36]
DIN_B64	input	CELL_E[10].IMUX_IMUX[39]
DIN_B65	input	CELL_E[10].IMUX_IMUX[38]
DIN_B66	input	CELL_E[10].IMUX_IMUX[12]
DIN_B67	input	CELL_E[10].IMUX_IMUX[40]
DIN_B68	input	CELL_E[10].IMUX_IMUX[13]
DIN_B69	input	CELL_E[10].IMUX_IMUX[42]
DIN_B7	input	CELL_E[7].IMUX_IMUX[38]
DIN_B70	input	CELL_E[10].IMUX_IMUX[14]
DIN_B71	input	CELL_E[10].IMUX_IMUX[44]
DIN_B8	input	CELL_E[7].IMUX_IMUX[12]
DIN_B9	input	CELL_E[7].IMUX_IMUX[40]
DOUT_A0	output	CELL_W[7].OUT_BEL[16]
DOUT_A1	output	CELL_W[7].OUT_BEL[17]
DOUT_A10	output	CELL_W[7].OUT_BEL[26]
DOUT_A11	output	CELL_W[7].OUT_BEL[27]
DOUT_A12	output	CELL_W[7].OUT_BEL[30]
DOUT_A13	output	CELL_W[8].OUT_BEL[0]
DOUT_A14	output	CELL_W[8].OUT_BEL[4]
DOUT_A15	output	CELL_W[8].OUT_BEL[5]
DOUT_A16	output	CELL_W[8].OUT_BEL[6]
DOUT_A17	output	CELL_W[8].OUT_BEL[8]
DOUT_A18	output	CELL_W[8].OUT_BEL[12]
DOUT_A19	output	CELL_W[8].OUT_BEL[13]
DOUT_A2	output	CELL_W[7].OUT_BEL[18]
DOUT_A20	output	CELL_W[8].OUT_BEL[16]
DOUT_A21	output	CELL_W[8].OUT_BEL[19]
DOUT_A22	output	CELL_W[8].OUT_BEL[20]
DOUT_A23	output	CELL_W[8].OUT_BEL[21]
DOUT_A24	output	CELL_W[8].OUT_BEL[22]
DOUT_A25	output	CELL_W[8].OUT_BEL[23]
DOUT_A26	output	CELL_W[8].OUT_BEL[24]
DOUT_A27	output	CELL_W[8].OUT_BEL[25]
DOUT_A28	output	CELL_W[8].OUT_BEL[26]
DOUT_A29	output	CELL_W[8].OUT_BEL[27]
DOUT_A3	output	CELL_W[7].OUT_BEL[19]
DOUT_A30	output	CELL_W[8].OUT_BEL[28]
DOUT_A31	output	CELL_W[8].OUT_BEL[29]
DOUT_A32	output	CELL_W[8].OUT_BEL[30]
DOUT_A33	output	CELL_W[8].OUT_BEL[31]
DOUT_A34	output	CELL_W[9].OUT_BEL[0]
DOUT_A35	output	CELL_W[9].OUT_BEL[1]
DOUT_A36	output	CELL_W[9].OUT_BEL[2]
DOUT_A37	output	CELL_W[9].OUT_BEL[3]
DOUT_A38	output	CELL_W[9].OUT_BEL[4]
DOUT_A39	output	CELL_W[9].OUT_BEL[9]
DOUT_A4	output	CELL_W[7].OUT_BEL[20]
DOUT_A40	output	CELL_W[9].OUT_BEL[15]
DOUT_A41	output	CELL_W[9].OUT_BEL[19]
DOUT_A42	output	CELL_W[9].OUT_BEL[21]
DOUT_A43	output	CELL_W[9].OUT_BEL[22]
DOUT_A44	output	CELL_W[9].OUT_BEL[23]
DOUT_A45	output	CELL_W[9].OUT_BEL[25]
DOUT_A46	output	CELL_W[9].OUT_BEL[26]
DOUT_A47	output	CELL_W[9].OUT_BEL[27]
DOUT_A48	output	CELL_W[9].OUT_BEL[28]
DOUT_A49	output	CELL_W[9].OUT_BEL[29]
DOUT_A5	output	CELL_W[7].OUT_BEL[21]
DOUT_A50	output	CELL_W[9].OUT_BEL[30]
DOUT_A51	output	CELL_W[9].OUT_BEL[31]
DOUT_A52	output	CELL_W[10].OUT_BEL[1]
DOUT_A53	output	CELL_W[10].OUT_BEL[3]
DOUT_A54	output	CELL_W[10].OUT_BEL[6]
DOUT_A55	output	CELL_W[10].OUT_BEL[8]
DOUT_A56	output	CELL_W[10].OUT_BEL[10]
DOUT_A57	output	CELL_W[10].OUT_BEL[12]
DOUT_A58	output	CELL_W[10].OUT_BEL[14]
DOUT_A59	output	CELL_W[10].OUT_BEL[16]
DOUT_A6	output	CELL_W[7].OUT_BEL[22]
DOUT_A60	output	CELL_W[10].OUT_BEL[18]
DOUT_A61	output	CELL_W[10].OUT_BEL[19]
DOUT_A62	output	CELL_W[10].OUT_BEL[20]
DOUT_A63	output	CELL_W[10].OUT_BEL[21]
DOUT_A64	output	CELL_W[10].OUT_BEL[22]
DOUT_A65	output	CELL_W[10].OUT_BEL[23]
DOUT_A66	output	CELL_W[10].OUT_BEL[24]
DOUT_A67	output	CELL_W[10].OUT_BEL[25]
DOUT_A68	output	CELL_W[10].OUT_BEL[26]
DOUT_A69	output	CELL_W[10].OUT_BEL[27]
DOUT_A7	output	CELL_W[7].OUT_BEL[23]
DOUT_A70	output	CELL_W[10].OUT_BEL[28]
DOUT_A71	output	CELL_W[11].OUT_BEL[0]
DOUT_A8	output	CELL_W[7].OUT_BEL[24]
DOUT_A9	output	CELL_W[7].OUT_BEL[25]
DOUT_B0	output	CELL_E[7].OUT_BEL[16]
DOUT_B1	output	CELL_E[7].OUT_BEL[17]
DOUT_B10	output	CELL_E[7].OUT_BEL[26]
DOUT_B11	output	CELL_E[7].OUT_BEL[27]
DOUT_B12	output	CELL_E[7].OUT_BEL[30]
DOUT_B13	output	CELL_E[8].OUT_BEL[0]
DOUT_B14	output	CELL_E[8].OUT_BEL[4]
DOUT_B15	output	CELL_E[8].OUT_BEL[5]
DOUT_B16	output	CELL_E[8].OUT_BEL[6]
DOUT_B17	output	CELL_E[8].OUT_BEL[8]
DOUT_B18	output	CELL_E[8].OUT_BEL[12]
DOUT_B19	output	CELL_E[8].OUT_BEL[13]
DOUT_B2	output	CELL_E[7].OUT_BEL[18]
DOUT_B20	output	CELL_E[8].OUT_BEL[16]
DOUT_B21	output	CELL_E[8].OUT_BEL[19]
DOUT_B22	output	CELL_E[8].OUT_BEL[20]
DOUT_B23	output	CELL_E[8].OUT_BEL[21]
DOUT_B24	output	CELL_E[8].OUT_BEL[22]
DOUT_B25	output	CELL_E[8].OUT_BEL[23]
DOUT_B26	output	CELL_E[8].OUT_BEL[24]
DOUT_B27	output	CELL_E[8].OUT_BEL[25]
DOUT_B28	output	CELL_E[8].OUT_BEL[26]
DOUT_B29	output	CELL_E[8].OUT_BEL[27]
DOUT_B3	output	CELL_E[7].OUT_BEL[19]
DOUT_B30	output	CELL_E[8].OUT_BEL[28]
DOUT_B31	output	CELL_E[8].OUT_BEL[29]
DOUT_B32	output	CELL_E[8].OUT_BEL[30]
DOUT_B33	output	CELL_E[8].OUT_BEL[31]
DOUT_B34	output	CELL_E[9].OUT_BEL[0]
DOUT_B35	output	CELL_E[9].OUT_BEL[1]
DOUT_B36	output	CELL_E[9].OUT_BEL[2]
DOUT_B37	output	CELL_E[9].OUT_BEL[3]
DOUT_B38	output	CELL_E[9].OUT_BEL[4]
DOUT_B39	output	CELL_E[9].OUT_BEL[9]
DOUT_B4	output	CELL_E[7].OUT_BEL[20]
DOUT_B40	output	CELL_E[9].OUT_BEL[15]
DOUT_B41	output	CELL_E[9].OUT_BEL[19]
DOUT_B42	output	CELL_E[9].OUT_BEL[21]
DOUT_B43	output	CELL_E[9].OUT_BEL[22]
DOUT_B44	output	CELL_E[9].OUT_BEL[23]
DOUT_B45	output	CELL_E[9].OUT_BEL[25]
DOUT_B46	output	CELL_E[9].OUT_BEL[26]
DOUT_B47	output	CELL_E[9].OUT_BEL[27]
DOUT_B48	output	CELL_E[9].OUT_BEL[28]
DOUT_B49	output	CELL_E[9].OUT_BEL[29]
DOUT_B5	output	CELL_E[7].OUT_BEL[21]
DOUT_B50	output	CELL_E[9].OUT_BEL[30]
DOUT_B51	output	CELL_E[9].OUT_BEL[31]
DOUT_B52	output	CELL_E[10].OUT_BEL[1]
DOUT_B53	output	CELL_E[10].OUT_BEL[3]
DOUT_B54	output	CELL_E[10].OUT_BEL[6]
DOUT_B55	output	CELL_E[10].OUT_BEL[8]
DOUT_B56	output	CELL_E[10].OUT_BEL[10]
DOUT_B57	output	CELL_E[10].OUT_BEL[12]
DOUT_B58	output	CELL_E[10].OUT_BEL[14]
DOUT_B59	output	CELL_E[10].OUT_BEL[16]
DOUT_B6	output	CELL_E[7].OUT_BEL[22]
DOUT_B60	output	CELL_E[10].OUT_BEL[18]
DOUT_B61	output	CELL_E[10].OUT_BEL[19]
DOUT_B62	output	CELL_E[10].OUT_BEL[20]
DOUT_B63	output	CELL_E[10].OUT_BEL[21]
DOUT_B64	output	CELL_E[10].OUT_BEL[22]
DOUT_B65	output	CELL_E[10].OUT_BEL[23]
DOUT_B66	output	CELL_E[10].OUT_BEL[24]
DOUT_B67	output	CELL_E[10].OUT_BEL[25]
DOUT_B68	output	CELL_E[10].OUT_BEL[26]
DOUT_B69	output	CELL_E[10].OUT_BEL[27]
DOUT_B7	output	CELL_E[7].OUT_BEL[23]
DOUT_B70	output	CELL_E[10].OUT_BEL[28]
DOUT_B71	output	CELL_E[11].OUT_BEL[0]
DOUT_B8	output	CELL_E[7].OUT_BEL[24]
DOUT_B9	output	CELL_E[7].OUT_BEL[25]
EN_A	input	CELL_W[9].IMUX_CTRL[7]
EN_B	input	CELL_E[9].IMUX_CTRL[7]
INJECT_DBITERR_A	input	CELL_W[9].IMUX_IMUX[23]
INJECT_DBITERR_B	input	CELL_E[9].IMUX_IMUX[23]
INJECT_SBITERR_A	input	CELL_W[9].IMUX_IMUX[22]
INJECT_SBITERR_B	input	CELL_E[9].IMUX_IMUX[22]
OREG_CAS_CE_A	input	CELL_W[8].IMUX_CTRL[3]
OREG_CAS_CE_B	input	CELL_E[8].IMUX_CTRL[3]
OREG_CE_A	input	CELL_W[8].IMUX_CTRL[7]
OREG_CE_B	input	CELL_E[8].IMUX_CTRL[7]
OREG_ECC_CE_A	input	CELL_W[8].IMUX_CTRL[6]
OREG_ECC_CE_B	input	CELL_E[8].IMUX_CTRL[6]
RDACCESS_A	output	CELL_W[8].OUT_BEL[14]
RDACCESS_B	output	CELL_E[8].OUT_BEL[14]
RDB_WR_A	input	CELL_W[9].IMUX_CTRL[6]
RDB_WR_B	input	CELL_E[9].IMUX_CTRL[6]
RST_A	input	CELL_W[9].IMUX_CTRL[3]
RST_B	input	CELL_E[9].IMUX_CTRL[3]
SBITERR_A	output	CELL_W[8].OUT_BEL[15]
SBITERR_B	output	CELL_E[8].OUT_BEL[15]
SHUTDOWN	input	CELL_W[8].IMUX_CTRL[5]
SLEEP	input	CELL_W[8].IMUX_CTRL[2]
TST_DEEPSLEEP_OUT	output	CELL_W[8].OUT_BEL[10]
TST_RING_ENB	input	CELL_W[11].IMUX_CTRL[0]
TST_RING_OUT	output	CELL_W[10].OUT_BEL[30]
TST_RING_STARTB	input	CELL_W[10].IMUX_CTRL[7]
TST_SHUTDOWN_OUT	output	CELL_W[8].OUT_BEL[11]
TST_SLEEP_OUT	output	CELL_W[8].OUT_BEL[9]

Bel URAM[3]

ultrascaleplus URAM bel URAM[3]
Pin	Direction	Wires
ADDR_A0	input	CELL_W[11].IMUX_IMUX[12]
ADDR_A1	input	CELL_W[11].IMUX_IMUX[40]
ADDR_A10	input	CELL_W[12].IMUX_IMUX[1]
ADDR_A11	input	CELL_W[12].IMUX_IMUX[18]
ADDR_A12	input	CELL_W[13].IMUX_IMUX[0]
ADDR_A13	input	CELL_W[13].IMUX_IMUX[16]
ADDR_A14	input	CELL_W[13].IMUX_IMUX[1]
ADDR_A15	input	CELL_W[13].IMUX_IMUX[18]
ADDR_A16	input	CELL_W[13].IMUX_IMUX[2]
ADDR_A17	input	CELL_W[13].IMUX_IMUX[20]
ADDR_A18	input	CELL_W[13].IMUX_IMUX[23]
ADDR_A19	input	CELL_W[13].IMUX_IMUX[22]
ADDR_A2	input	CELL_W[11].IMUX_IMUX[13]
ADDR_A20	input	CELL_W[13].IMUX_IMUX[4]
ADDR_A21	input	CELL_W[13].IMUX_IMUX[24]
ADDR_A22	input	CELL_W[13].IMUX_IMUX[5]
ADDR_A3	input	CELL_W[11].IMUX_IMUX[42]
ADDR_A4	input	CELL_W[11].IMUX_IMUX[14]
ADDR_A5	input	CELL_W[11].IMUX_IMUX[44]
ADDR_A6	input	CELL_W[11].IMUX_IMUX[47]
ADDR_A7	input	CELL_W[11].IMUX_IMUX[46]
ADDR_A8	input	CELL_W[12].IMUX_IMUX[0]
ADDR_A9	input	CELL_W[12].IMUX_IMUX[16]
ADDR_B0	input	CELL_E[11].IMUX_IMUX[12]
ADDR_B1	input	CELL_E[11].IMUX_IMUX[40]
ADDR_B10	input	CELL_E[12].IMUX_IMUX[1]
ADDR_B11	input	CELL_E[12].IMUX_IMUX[18]
ADDR_B12	input	CELL_E[13].IMUX_IMUX[0]
ADDR_B13	input	CELL_E[13].IMUX_IMUX[16]
ADDR_B14	input	CELL_E[13].IMUX_IMUX[1]
ADDR_B15	input	CELL_E[13].IMUX_IMUX[18]
ADDR_B16	input	CELL_E[13].IMUX_IMUX[2]
ADDR_B17	input	CELL_E[13].IMUX_IMUX[20]
ADDR_B18	input	CELL_E[13].IMUX_IMUX[23]
ADDR_B19	input	CELL_E[13].IMUX_IMUX[22]
ADDR_B2	input	CELL_E[11].IMUX_IMUX[13]
ADDR_B20	input	CELL_E[13].IMUX_IMUX[4]
ADDR_B21	input	CELL_E[13].IMUX_IMUX[24]
ADDR_B22	input	CELL_E[13].IMUX_IMUX[5]
ADDR_B3	input	CELL_E[11].IMUX_IMUX[42]
ADDR_B4	input	CELL_E[11].IMUX_IMUX[14]
ADDR_B5	input	CELL_E[11].IMUX_IMUX[44]
ADDR_B6	input	CELL_E[11].IMUX_IMUX[47]
ADDR_B7	input	CELL_E[11].IMUX_IMUX[46]
ADDR_B8	input	CELL_E[12].IMUX_IMUX[0]
ADDR_B9	input	CELL_E[12].IMUX_IMUX[16]
BWE_A0	input	CELL_W[13].IMUX_IMUX[14]
BWE_A1	input	CELL_W[13].IMUX_IMUX[44]
BWE_A2	input	CELL_W[13].IMUX_IMUX[47]
BWE_A3	input	CELL_W[13].IMUX_IMUX[46]
BWE_A4	input	CELL_W[14].IMUX_IMUX[0]
BWE_A5	input	CELL_W[14].IMUX_IMUX[16]
BWE_A6	input	CELL_W[14].IMUX_IMUX[1]
BWE_A7	input	CELL_W[14].IMUX_IMUX[18]
BWE_A8	input	CELL_W[14].IMUX_IMUX[2]
BWE_B0	input	CELL_E[13].IMUX_IMUX[14]
BWE_B1	input	CELL_E[13].IMUX_IMUX[44]
BWE_B2	input	CELL_E[13].IMUX_IMUX[47]
BWE_B3	input	CELL_E[13].IMUX_IMUX[46]
BWE_B4	input	CELL_E[14].IMUX_IMUX[0]
BWE_B5	input	CELL_E[14].IMUX_IMUX[16]
BWE_B6	input	CELL_E[14].IMUX_IMUX[1]
BWE_B7	input	CELL_E[14].IMUX_IMUX[18]
BWE_B8	input	CELL_E[14].IMUX_IMUX[2]
CLK	input	CELL_W[14].IMUX_CTRL[4]
DBITERR_A	output	CELL_W[11].OUT_BEL[31]
DBITERR_B	output	CELL_E[11].OUT_BEL[31]
DEEPSLEEP	input	CELL_W[12].IMUX_CTRL[2]
DIN_A0	input	CELL_W[11].IMUX_IMUX[4]
DIN_A1	input	CELL_W[11].IMUX_IMUX[24]
DIN_A10	input	CELL_W[11].IMUX_IMUX[9]
DIN_A11	input	CELL_W[11].IMUX_IMUX[34]
DIN_A12	input	CELL_W[11].IMUX_IMUX[10]
DIN_A13	input	CELL_W[11].IMUX_IMUX[36]
DIN_A14	input	CELL_W[11].IMUX_IMUX[39]
DIN_A15	input	CELL_W[11].IMUX_IMUX[38]
DIN_A16	input	CELL_W[12].IMUX_IMUX[2]
DIN_A17	input	CELL_W[12].IMUX_IMUX[20]
DIN_A18	input	CELL_W[12].IMUX_IMUX[4]
DIN_A19	input	CELL_W[12].IMUX_IMUX[24]
DIN_A2	input	CELL_W[11].IMUX_IMUX[5]
DIN_A20	input	CELL_W[12].IMUX_IMUX[5]
DIN_A21	input	CELL_W[12].IMUX_IMUX[26]
DIN_A22	input	CELL_W[12].IMUX_IMUX[6]
DIN_A23	input	CELL_W[12].IMUX_IMUX[28]
DIN_A24	input	CELL_W[12].IMUX_IMUX[31]
DIN_A25	input	CELL_W[12].IMUX_IMUX[30]
DIN_A26	input	CELL_W[12].IMUX_IMUX[8]
DIN_A27	input	CELL_W[12].IMUX_IMUX[32]
DIN_A28	input	CELL_W[12].IMUX_IMUX[9]
DIN_A29	input	CELL_W[12].IMUX_IMUX[34]
DIN_A3	input	CELL_W[11].IMUX_IMUX[26]
DIN_A30	input	CELL_W[12].IMUX_IMUX[10]
DIN_A31	input	CELL_W[12].IMUX_IMUX[36]
DIN_A32	input	CELL_W[12].IMUX_IMUX[39]
DIN_A33	input	CELL_W[12].IMUX_IMUX[38]
DIN_A34	input	CELL_W[12].IMUX_IMUX[12]
DIN_A35	input	CELL_W[12].IMUX_IMUX[40]
DIN_A36	input	CELL_W[12].IMUX_IMUX[13]
DIN_A37	input	CELL_W[12].IMUX_IMUX[42]
DIN_A38	input	CELL_W[12].IMUX_IMUX[14]
DIN_A39	input	CELL_W[12].IMUX_IMUX[44]
DIN_A4	input	CELL_W[11].IMUX_IMUX[6]
DIN_A40	input	CELL_W[13].IMUX_IMUX[26]
DIN_A41	input	CELL_W[13].IMUX_IMUX[6]
DIN_A42	input	CELL_W[13].IMUX_IMUX[28]
DIN_A43	input	CELL_W[13].IMUX_IMUX[31]
DIN_A44	input	CELL_W[13].IMUX_IMUX[8]
DIN_A45	input	CELL_W[13].IMUX_IMUX[32]
DIN_A46	input	CELL_W[13].IMUX_IMUX[9]
DIN_A47	input	CELL_W[13].IMUX_IMUX[34]
DIN_A48	input	CELL_W[13].IMUX_IMUX[10]
DIN_A49	input	CELL_W[13].IMUX_IMUX[36]
DIN_A5	input	CELL_W[11].IMUX_IMUX[28]
DIN_A50	input	CELL_W[13].IMUX_IMUX[39]
DIN_A51	input	CELL_W[13].IMUX_IMUX[38]
DIN_A52	input	CELL_W[13].IMUX_IMUX[12]
DIN_A53	input	CELL_W[13].IMUX_IMUX[40]
DIN_A54	input	CELL_W[13].IMUX_IMUX[13]
DIN_A55	input	CELL_W[13].IMUX_IMUX[42]
DIN_A56	input	CELL_W[14].IMUX_IMUX[23]
DIN_A57	input	CELL_W[14].IMUX_IMUX[22]
DIN_A58	input	CELL_W[14].IMUX_IMUX[4]
DIN_A59	input	CELL_W[14].IMUX_IMUX[24]
DIN_A6	input	CELL_W[11].IMUX_IMUX[31]
DIN_A60	input	CELL_W[14].IMUX_IMUX[5]
DIN_A61	input	CELL_W[14].IMUX_IMUX[26]
DIN_A62	input	CELL_W[14].IMUX_IMUX[6]
DIN_A63	input	CELL_W[14].IMUX_IMUX[28]
DIN_A64	input	CELL_W[14].IMUX_IMUX[31]
DIN_A65	input	CELL_W[14].IMUX_IMUX[30]
DIN_A66	input	CELL_W[14].IMUX_IMUX[8]
DIN_A67	input	CELL_W[14].IMUX_IMUX[32]
DIN_A68	input	CELL_W[14].IMUX_IMUX[9]
DIN_A69	input	CELL_W[14].IMUX_IMUX[34]
DIN_A7	input	CELL_W[11].IMUX_IMUX[30]
DIN_A70	input	CELL_W[14].IMUX_IMUX[10]
DIN_A71	input	CELL_W[14].IMUX_IMUX[36]
DIN_A8	input	CELL_W[11].IMUX_IMUX[8]
DIN_A9	input	CELL_W[11].IMUX_IMUX[32]
DIN_B0	input	CELL_E[11].IMUX_IMUX[4]
DIN_B1	input	CELL_E[11].IMUX_IMUX[24]
DIN_B10	input	CELL_E[11].IMUX_IMUX[9]
DIN_B11	input	CELL_E[11].IMUX_IMUX[34]
DIN_B12	input	CELL_E[11].IMUX_IMUX[10]
DIN_B13	input	CELL_E[11].IMUX_IMUX[36]
DIN_B14	input	CELL_E[11].IMUX_IMUX[39]
DIN_B15	input	CELL_E[11].IMUX_IMUX[38]
DIN_B16	input	CELL_E[12].IMUX_IMUX[2]
DIN_B17	input	CELL_E[12].IMUX_IMUX[20]
DIN_B18	input	CELL_E[12].IMUX_IMUX[4]
DIN_B19	input	CELL_E[12].IMUX_IMUX[24]
DIN_B2	input	CELL_E[11].IMUX_IMUX[5]
DIN_B20	input	CELL_E[12].IMUX_IMUX[5]
DIN_B21	input	CELL_E[12].IMUX_IMUX[26]
DIN_B22	input	CELL_E[12].IMUX_IMUX[6]
DIN_B23	input	CELL_E[12].IMUX_IMUX[28]
DIN_B24	input	CELL_E[12].IMUX_IMUX[31]
DIN_B25	input	CELL_E[12].IMUX_IMUX[30]
DIN_B26	input	CELL_E[12].IMUX_IMUX[8]
DIN_B27	input	CELL_E[12].IMUX_IMUX[32]
DIN_B28	input	CELL_E[12].IMUX_IMUX[9]
DIN_B29	input	CELL_E[12].IMUX_IMUX[34]
DIN_B3	input	CELL_E[11].IMUX_IMUX[26]
DIN_B30	input	CELL_E[12].IMUX_IMUX[10]
DIN_B31	input	CELL_E[12].IMUX_IMUX[36]
DIN_B32	input	CELL_E[12].IMUX_IMUX[39]
DIN_B33	input	CELL_E[12].IMUX_IMUX[38]
DIN_B34	input	CELL_E[12].IMUX_IMUX[12]
DIN_B35	input	CELL_E[12].IMUX_IMUX[40]
DIN_B36	input	CELL_E[12].IMUX_IMUX[13]
DIN_B37	input	CELL_E[12].IMUX_IMUX[42]
DIN_B38	input	CELL_E[12].IMUX_IMUX[14]
DIN_B39	input	CELL_E[12].IMUX_IMUX[44]
DIN_B4	input	CELL_E[11].IMUX_IMUX[6]
DIN_B40	input	CELL_E[13].IMUX_IMUX[26]
DIN_B41	input	CELL_E[13].IMUX_IMUX[6]
DIN_B42	input	CELL_E[13].IMUX_IMUX[28]
DIN_B43	input	CELL_E[13].IMUX_IMUX[31]
DIN_B44	input	CELL_E[13].IMUX_IMUX[8]
DIN_B45	input	CELL_E[13].IMUX_IMUX[32]
DIN_B46	input	CELL_E[13].IMUX_IMUX[9]
DIN_B47	input	CELL_E[13].IMUX_IMUX[34]
DIN_B48	input	CELL_E[13].IMUX_IMUX[10]
DIN_B49	input	CELL_E[13].IMUX_IMUX[36]
DIN_B5	input	CELL_E[11].IMUX_IMUX[28]
DIN_B50	input	CELL_E[13].IMUX_IMUX[39]
DIN_B51	input	CELL_E[13].IMUX_IMUX[38]
DIN_B52	input	CELL_E[13].IMUX_IMUX[12]
DIN_B53	input	CELL_E[13].IMUX_IMUX[40]
DIN_B54	input	CELL_E[13].IMUX_IMUX[13]
DIN_B55	input	CELL_E[13].IMUX_IMUX[42]
DIN_B56	input	CELL_E[14].IMUX_IMUX[23]
DIN_B57	input	CELL_E[14].IMUX_IMUX[22]
DIN_B58	input	CELL_E[14].IMUX_IMUX[4]
DIN_B59	input	CELL_E[14].IMUX_IMUX[24]
DIN_B6	input	CELL_E[11].IMUX_IMUX[31]
DIN_B60	input	CELL_E[14].IMUX_IMUX[5]
DIN_B61	input	CELL_E[14].IMUX_IMUX[26]
DIN_B62	input	CELL_E[14].IMUX_IMUX[6]
DIN_B63	input	CELL_E[14].IMUX_IMUX[28]
DIN_B64	input	CELL_E[14].IMUX_IMUX[31]
DIN_B65	input	CELL_E[14].IMUX_IMUX[30]
DIN_B66	input	CELL_E[14].IMUX_IMUX[8]
DIN_B67	input	CELL_E[14].IMUX_IMUX[32]
DIN_B68	input	CELL_E[14].IMUX_IMUX[9]
DIN_B69	input	CELL_E[14].IMUX_IMUX[34]
DIN_B7	input	CELL_E[11].IMUX_IMUX[30]
DIN_B70	input	CELL_E[14].IMUX_IMUX[10]
DIN_B71	input	CELL_E[14].IMUX_IMUX[36]
DIN_B8	input	CELL_E[11].IMUX_IMUX[8]
DIN_B9	input	CELL_E[11].IMUX_IMUX[32]
DOUT_A0	output	CELL_W[11].OUT_BEL[8]
DOUT_A1	output	CELL_W[11].OUT_BEL[9]
DOUT_A10	output	CELL_W[11].OUT_BEL[18]
DOUT_A11	output	CELL_W[11].OUT_BEL[19]
DOUT_A12	output	CELL_W[11].OUT_BEL[22]
DOUT_A13	output	CELL_W[11].OUT_BEL[24]
DOUT_A14	output	CELL_W[11].OUT_BEL[28]
DOUT_A15	output	CELL_W[11].OUT_BEL[29]
DOUT_A16	output	CELL_W[11].OUT_BEL[30]
DOUT_A17	output	CELL_W[12].OUT_BEL[0]
DOUT_A18	output	CELL_W[12].OUT_BEL[4]
DOUT_A19	output	CELL_W[12].OUT_BEL[5]
DOUT_A2	output	CELL_W[11].OUT_BEL[10]
DOUT_A20	output	CELL_W[12].OUT_BEL[8]
DOUT_A21	output	CELL_W[12].OUT_BEL[11]
DOUT_A22	output	CELL_W[12].OUT_BEL[12]
DOUT_A23	output	CELL_W[12].OUT_BEL[13]
DOUT_A24	output	CELL_W[12].OUT_BEL[14]
DOUT_A25	output	CELL_W[12].OUT_BEL[15]
DOUT_A26	output	CELL_W[12].OUT_BEL[16]
DOUT_A27	output	CELL_W[12].OUT_BEL[17]
DOUT_A28	output	CELL_W[12].OUT_BEL[18]
DOUT_A29	output	CELL_W[12].OUT_BEL[19]
DOUT_A3	output	CELL_W[11].OUT_BEL[11]
DOUT_A30	output	CELL_W[12].OUT_BEL[20]
DOUT_A31	output	CELL_W[12].OUT_BEL[21]
DOUT_A32	output	CELL_W[12].OUT_BEL[22]
DOUT_A33	output	CELL_W[12].OUT_BEL[23]
DOUT_A34	output	CELL_W[12].OUT_BEL[24]
DOUT_A35	output	CELL_W[12].OUT_BEL[25]
DOUT_A36	output	CELL_W[12].OUT_BEL[26]
DOUT_A37	output	CELL_W[12].OUT_BEL[27]
DOUT_A38	output	CELL_W[12].OUT_BEL[28]
DOUT_A39	output	CELL_W[13].OUT_BEL[1]
DOUT_A4	output	CELL_W[11].OUT_BEL[12]
DOUT_A40	output	CELL_W[13].OUT_BEL[7]
DOUT_A41	output	CELL_W[13].OUT_BEL[11]
DOUT_A42	output	CELL_W[13].OUT_BEL[13]
DOUT_A43	output	CELL_W[13].OUT_BEL[14]
DOUT_A44	output	CELL_W[13].OUT_BEL[15]
DOUT_A45	output	CELL_W[13].OUT_BEL[17]
DOUT_A46	output	CELL_W[13].OUT_BEL[18]
DOUT_A47	output	CELL_W[13].OUT_BEL[19]
DOUT_A48	output	CELL_W[13].OUT_BEL[20]
DOUT_A49	output	CELL_W[13].OUT_BEL[21]
DOUT_A5	output	CELL_W[11].OUT_BEL[13]
DOUT_A50	output	CELL_W[13].OUT_BEL[22]
DOUT_A51	output	CELL_W[13].OUT_BEL[23]
DOUT_A52	output	CELL_W[13].OUT_BEL[25]
DOUT_A53	output	CELL_W[13].OUT_BEL[27]
DOUT_A54	output	CELL_W[13].OUT_BEL[30]
DOUT_A55	output	CELL_W[14].OUT_BEL[0]
DOUT_A56	output	CELL_W[14].OUT_BEL[2]
DOUT_A57	output	CELL_W[14].OUT_BEL[4]
DOUT_A58	output	CELL_W[14].OUT_BEL[6]
DOUT_A59	output	CELL_W[14].OUT_BEL[8]
DOUT_A6	output	CELL_W[11].OUT_BEL[14]
DOUT_A60	output	CELL_W[14].OUT_BEL[10]
DOUT_A61	output	CELL_W[14].OUT_BEL[11]
DOUT_A62	output	CELL_W[14].OUT_BEL[12]
DOUT_A63	output	CELL_W[14].OUT_BEL[13]
DOUT_A64	output	CELL_W[14].OUT_BEL[14]
DOUT_A65	output	CELL_W[14].OUT_BEL[15]
DOUT_A66	output	CELL_W[14].OUT_BEL[16]
DOUT_A67	output	CELL_W[14].OUT_BEL[17]
DOUT_A68	output	CELL_W[14].OUT_BEL[18]
DOUT_A69	output	CELL_W[14].OUT_BEL[19]
DOUT_A7	output	CELL_W[11].OUT_BEL[15]
DOUT_A70	output	CELL_W[14].OUT_BEL[20]
DOUT_A71	output	CELL_W[14].OUT_BEL[24]
DOUT_A8	output	CELL_W[11].OUT_BEL[16]
DOUT_A9	output	CELL_W[11].OUT_BEL[17]
DOUT_B0	output	CELL_E[11].OUT_BEL[8]
DOUT_B1	output	CELL_E[11].OUT_BEL[9]
DOUT_B10	output	CELL_E[11].OUT_BEL[18]
DOUT_B11	output	CELL_E[11].OUT_BEL[19]
DOUT_B12	output	CELL_E[11].OUT_BEL[22]
DOUT_B13	output	CELL_E[11].OUT_BEL[24]
DOUT_B14	output	CELL_E[11].OUT_BEL[28]
DOUT_B15	output	CELL_E[11].OUT_BEL[29]
DOUT_B16	output	CELL_E[11].OUT_BEL[30]
DOUT_B17	output	CELL_E[12].OUT_BEL[0]
DOUT_B18	output	CELL_E[12].OUT_BEL[4]
DOUT_B19	output	CELL_E[12].OUT_BEL[5]
DOUT_B2	output	CELL_E[11].OUT_BEL[10]
DOUT_B20	output	CELL_E[12].OUT_BEL[8]
DOUT_B21	output	CELL_E[12].OUT_BEL[11]
DOUT_B22	output	CELL_E[12].OUT_BEL[12]
DOUT_B23	output	CELL_E[12].OUT_BEL[13]
DOUT_B24	output	CELL_E[12].OUT_BEL[14]
DOUT_B25	output	CELL_E[12].OUT_BEL[15]
DOUT_B26	output	CELL_E[12].OUT_BEL[16]
DOUT_B27	output	CELL_E[12].OUT_BEL[17]
DOUT_B28	output	CELL_E[12].OUT_BEL[18]
DOUT_B29	output	CELL_E[12].OUT_BEL[19]
DOUT_B3	output	CELL_E[11].OUT_BEL[11]
DOUT_B30	output	CELL_E[12].OUT_BEL[20]
DOUT_B31	output	CELL_E[12].OUT_BEL[21]
DOUT_B32	output	CELL_E[12].OUT_BEL[22]
DOUT_B33	output	CELL_E[12].OUT_BEL[23]
DOUT_B34	output	CELL_E[12].OUT_BEL[24]
DOUT_B35	output	CELL_E[12].OUT_BEL[25]
DOUT_B36	output	CELL_E[12].OUT_BEL[26]
DOUT_B37	output	CELL_E[12].OUT_BEL[27]
DOUT_B38	output	CELL_E[12].OUT_BEL[28]
DOUT_B39	output	CELL_E[13].OUT_BEL[1]
DOUT_B4	output	CELL_E[11].OUT_BEL[12]
DOUT_B40	output	CELL_E[13].OUT_BEL[7]
DOUT_B41	output	CELL_E[13].OUT_BEL[11]
DOUT_B42	output	CELL_E[13].OUT_BEL[13]
DOUT_B43	output	CELL_E[13].OUT_BEL[14]
DOUT_B44	output	CELL_E[13].OUT_BEL[15]
DOUT_B45	output	CELL_E[13].OUT_BEL[17]
DOUT_B46	output	CELL_E[13].OUT_BEL[18]
DOUT_B47	output	CELL_E[13].OUT_BEL[19]
DOUT_B48	output	CELL_E[13].OUT_BEL[20]
DOUT_B49	output	CELL_E[13].OUT_BEL[21]
DOUT_B5	output	CELL_E[11].OUT_BEL[13]
DOUT_B50	output	CELL_E[13].OUT_BEL[22]
DOUT_B51	output	CELL_E[13].OUT_BEL[23]
DOUT_B52	output	CELL_E[13].OUT_BEL[25]
DOUT_B53	output	CELL_E[13].OUT_BEL[27]
DOUT_B54	output	CELL_E[13].OUT_BEL[30]
DOUT_B55	output	CELL_E[14].OUT_BEL[0]
DOUT_B56	output	CELL_E[14].OUT_BEL[2]
DOUT_B57	output	CELL_E[14].OUT_BEL[4]
DOUT_B58	output	CELL_E[14].OUT_BEL[6]
DOUT_B59	output	CELL_E[14].OUT_BEL[8]
DOUT_B6	output	CELL_E[11].OUT_BEL[14]
DOUT_B60	output	CELL_E[14].OUT_BEL[10]
DOUT_B61	output	CELL_E[14].OUT_BEL[11]
DOUT_B62	output	CELL_E[14].OUT_BEL[12]
DOUT_B63	output	CELL_E[14].OUT_BEL[13]
DOUT_B64	output	CELL_E[14].OUT_BEL[14]
DOUT_B65	output	CELL_E[14].OUT_BEL[15]
DOUT_B66	output	CELL_E[14].OUT_BEL[16]
DOUT_B67	output	CELL_E[14].OUT_BEL[17]
DOUT_B68	output	CELL_E[14].OUT_BEL[18]
DOUT_B69	output	CELL_E[14].OUT_BEL[19]
DOUT_B7	output	CELL_E[11].OUT_BEL[15]
DOUT_B70	output	CELL_E[14].OUT_BEL[20]
DOUT_B71	output	CELL_E[14].OUT_BEL[24]
DOUT_B8	output	CELL_E[11].OUT_BEL[16]
DOUT_B9	output	CELL_E[11].OUT_BEL[17]
EN_A	input	CELL_W[13].IMUX_CTRL[5]
EN_B	input	CELL_E[13].IMUX_CTRL[5]
INJECT_DBITERR_A	input	CELL_W[12].IMUX_IMUX[47]
INJECT_DBITERR_B	input	CELL_E[12].IMUX_IMUX[47]
INJECT_SBITERR_A	input	CELL_W[12].IMUX_IMUX[46]
INJECT_SBITERR_B	input	CELL_E[12].IMUX_IMUX[46]
OREG_CAS_CE_A	input	CELL_W[12].IMUX_CTRL[1]
OREG_CAS_CE_B	input	CELL_E[12].IMUX_CTRL[1]
OREG_CE_A	input	CELL_W[12].IMUX_CTRL[5]
OREG_CE_B	input	CELL_E[12].IMUX_CTRL[5]
OREG_ECC_CE_A	input	CELL_W[12].IMUX_CTRL[4]
OREG_ECC_CE_B	input	CELL_E[12].IMUX_CTRL[4]
RDACCESS_A	output	CELL_W[12].OUT_BEL[6]
RDACCESS_B	output	CELL_E[12].OUT_BEL[6]
RDB_WR_A	input	CELL_W[13].IMUX_CTRL[4]
RDB_WR_B	input	CELL_E[13].IMUX_CTRL[4]
RST_A	input	CELL_W[13].IMUX_CTRL[1]
RST_B	input	CELL_E[13].IMUX_CTRL[1]
SBITERR_A	output	CELL_W[12].OUT_BEL[7]
SBITERR_B	output	CELL_E[12].OUT_BEL[7]
SHUTDOWN	input	CELL_W[12].IMUX_CTRL[3]
SLEEP	input	CELL_W[12].IMUX_CTRL[0]
TST_DEEPSLEEP_OUT	output	CELL_W[12].OUT_BEL[2]
TST_RING_ENB	input	CELL_W[14].IMUX_CTRL[6]
TST_RING_OUT	output	CELL_W[14].OUT_BEL[22]
TST_RING_STARTB	input	CELL_W[14].IMUX_CTRL[5]
TST_SHUTDOWN_OUT	output	CELL_W[12].OUT_BEL[3]
TST_SLEEP_OUT	output	CELL_W[12].OUT_BEL[1]

Bel wires

ultrascaleplus URAM bel wires
Wire	Pins
CELL_W[0].OUT_BEL[0]	URAM[0].DOUT_A0
CELL_W[0].OUT_BEL[1]	URAM[0].DOUT_A1
CELL_W[0].OUT_BEL[2]	URAM[0].DOUT_A2
CELL_W[0].OUT_BEL[3]	URAM[0].DOUT_A3
CELL_W[0].OUT_BEL[4]	URAM[0].DOUT_A4
CELL_W[0].OUT_BEL[5]	URAM[0].DOUT_A5
CELL_W[0].OUT_BEL[6]	URAM[0].DOUT_A6
CELL_W[0].OUT_BEL[7]	URAM[0].DOUT_A7
CELL_W[0].OUT_BEL[8]	URAM[0].DOUT_A8
CELL_W[0].OUT_BEL[9]	URAM[0].DOUT_A9
CELL_W[0].OUT_BEL[10]	URAM[0].DOUT_A10
CELL_W[0].OUT_BEL[11]	URAM[0].DOUT_A11
CELL_W[0].OUT_BEL[14]	URAM[0].DOUT_A12
CELL_W[0].OUT_BEL[16]	URAM[0].DOUT_A13
CELL_W[0].OUT_BEL[20]	URAM[0].DOUT_A14
CELL_W[0].OUT_BEL[21]	URAM[0].DOUT_A15
CELL_W[0].OUT_BEL[22]	URAM[0].DOUT_A16
CELL_W[0].OUT_BEL[23]	URAM[0].DBITERR_A
CELL_W[0].OUT_BEL[24]	URAM[0].DOUT_A17
CELL_W[0].OUT_BEL[25]	URAM[0].TST_SLEEP_OUT
CELL_W[0].OUT_BEL[26]	URAM[0].TST_DEEPSLEEP_OUT
CELL_W[0].OUT_BEL[27]	URAM[0].TST_SHUTDOWN_OUT
CELL_W[0].OUT_BEL[28]	URAM[0].DOUT_A18
CELL_W[0].OUT_BEL[29]	URAM[0].DOUT_A19
CELL_W[0].OUT_BEL[30]	URAM[0].RDACCESS_A
CELL_W[0].OUT_BEL[31]	URAM[0].SBITERR_A
CELL_W[0].IMUX_CTRL[6]	URAM[0].SLEEP
CELL_W[0].IMUX_CTRL[7]	URAM[0].OREG_CAS_CE_A
CELL_W[0].IMUX_IMUX[0]	URAM[0].DIN_A0
CELL_W[0].IMUX_IMUX[1]	URAM[0].DIN_A2
CELL_W[0].IMUX_IMUX[2]	URAM[0].DIN_A4
CELL_W[0].IMUX_IMUX[4]	URAM[0].DIN_A8
CELL_W[0].IMUX_IMUX[5]	URAM[0].DIN_A10
CELL_W[0].IMUX_IMUX[6]	URAM[0].DIN_A12
CELL_W[0].IMUX_IMUX[8]	URAM[0].ADDR_A0
CELL_W[0].IMUX_IMUX[9]	URAM[0].ADDR_A2
CELL_W[0].IMUX_IMUX[10]	URAM[0].ADDR_A4
CELL_W[0].IMUX_IMUX[12]	URAM[0].ADDR_A8
CELL_W[0].IMUX_IMUX[13]	URAM[0].ADDR_A10
CELL_W[0].IMUX_IMUX[14]	URAM[0].DIN_A16
CELL_W[0].IMUX_IMUX[16]	URAM[0].DIN_A1
CELL_W[0].IMUX_IMUX[18]	URAM[0].DIN_A3
CELL_W[0].IMUX_IMUX[20]	URAM[0].DIN_A5
CELL_W[0].IMUX_IMUX[22]	URAM[0].DIN_A7
CELL_W[0].IMUX_IMUX[23]	URAM[0].DIN_A6
CELL_W[0].IMUX_IMUX[24]	URAM[0].DIN_A9
CELL_W[0].IMUX_IMUX[26]	URAM[0].DIN_A11
CELL_W[0].IMUX_IMUX[28]	URAM[0].DIN_A13
CELL_W[0].IMUX_IMUX[30]	URAM[0].DIN_A15
CELL_W[0].IMUX_IMUX[31]	URAM[0].DIN_A14
CELL_W[0].IMUX_IMUX[32]	URAM[0].ADDR_A1
CELL_W[0].IMUX_IMUX[34]	URAM[0].ADDR_A3
CELL_W[0].IMUX_IMUX[36]	URAM[0].ADDR_A5
CELL_W[0].IMUX_IMUX[38]	URAM[0].ADDR_A7
CELL_W[0].IMUX_IMUX[39]	URAM[0].ADDR_A6
CELL_W[0].IMUX_IMUX[40]	URAM[0].ADDR_A9
CELL_W[0].IMUX_IMUX[42]	URAM[0].ADDR_A11
CELL_W[0].IMUX_IMUX[44]	URAM[0].DIN_A17
CELL_W[1].OUT_BEL[0]	URAM[0].DOUT_A20
CELL_W[1].OUT_BEL[3]	URAM[0].DOUT_A21
CELL_W[1].OUT_BEL[4]	URAM[0].DOUT_A22
CELL_W[1].OUT_BEL[5]	URAM[0].DOUT_A23
CELL_W[1].OUT_BEL[6]	URAM[0].DOUT_A24
CELL_W[1].OUT_BEL[7]	URAM[0].DOUT_A25
CELL_W[1].OUT_BEL[8]	URAM[0].DOUT_A26
CELL_W[1].OUT_BEL[9]	URAM[0].DOUT_A27
CELL_W[1].OUT_BEL[10]	URAM[0].DOUT_A28
CELL_W[1].OUT_BEL[11]	URAM[0].DOUT_A29
CELL_W[1].OUT_BEL[12]	URAM[0].DOUT_A30
CELL_W[1].OUT_BEL[13]	URAM[0].DOUT_A31
CELL_W[1].OUT_BEL[14]	URAM[0].DOUT_A32
CELL_W[1].OUT_BEL[15]	URAM[0].DOUT_A33
CELL_W[1].OUT_BEL[16]	URAM[0].DOUT_A34
CELL_W[1].OUT_BEL[17]	URAM[0].DOUT_A35
CELL_W[1].OUT_BEL[18]	URAM[0].DOUT_A36
CELL_W[1].OUT_BEL[19]	URAM[0].DOUT_A37
CELL_W[1].OUT_BEL[20]	URAM[0].DOUT_A38
CELL_W[1].OUT_BEL[25]	URAM[0].DOUT_A39
CELL_W[1].OUT_BEL[31]	URAM[0].DOUT_A40
CELL_W[1].IMUX_CTRL[0]	URAM[0].DEEPSLEEP
CELL_W[1].IMUX_CTRL[1]	URAM[0].SHUTDOWN
CELL_W[1].IMUX_CTRL[2]	URAM[0].OREG_ECC_CE_A
CELL_W[1].IMUX_CTRL[3]	URAM[0].OREG_CE_A
CELL_W[1].IMUX_CTRL[7]	URAM[0].RST_A
CELL_W[1].IMUX_IMUX[0]	URAM[0].DIN_A18
CELL_W[1].IMUX_IMUX[1]	URAM[0].DIN_A20
CELL_W[1].IMUX_IMUX[2]	URAM[0].DIN_A22
CELL_W[1].IMUX_IMUX[4]	URAM[0].DIN_A26
CELL_W[1].IMUX_IMUX[5]	URAM[0].DIN_A28
CELL_W[1].IMUX_IMUX[6]	URAM[0].DIN_A30
CELL_W[1].IMUX_IMUX[8]	URAM[0].DIN_A34
CELL_W[1].IMUX_IMUX[9]	URAM[0].DIN_A36
CELL_W[1].IMUX_IMUX[10]	URAM[0].DIN_A38
CELL_W[1].IMUX_IMUX[12]	URAM[0].ADDR_A12
CELL_W[1].IMUX_IMUX[13]	URAM[0].ADDR_A14
CELL_W[1].IMUX_IMUX[14]	URAM[0].ADDR_A16
CELL_W[1].IMUX_IMUX[16]	URAM[0].DIN_A19
CELL_W[1].IMUX_IMUX[18]	URAM[0].DIN_A21
CELL_W[1].IMUX_IMUX[20]	URAM[0].DIN_A23
CELL_W[1].IMUX_IMUX[22]	URAM[0].DIN_A25
CELL_W[1].IMUX_IMUX[23]	URAM[0].DIN_A24
CELL_W[1].IMUX_IMUX[24]	URAM[0].DIN_A27
CELL_W[1].IMUX_IMUX[26]	URAM[0].DIN_A29
CELL_W[1].IMUX_IMUX[28]	URAM[0].DIN_A31
CELL_W[1].IMUX_IMUX[30]	URAM[0].DIN_A33
CELL_W[1].IMUX_IMUX[31]	URAM[0].DIN_A32
CELL_W[1].IMUX_IMUX[32]	URAM[0].DIN_A35
CELL_W[1].IMUX_IMUX[34]	URAM[0].DIN_A37
CELL_W[1].IMUX_IMUX[36]	URAM[0].DIN_A39
CELL_W[1].IMUX_IMUX[38]	URAM[0].INJECT_SBITERR_A
CELL_W[1].IMUX_IMUX[39]	URAM[0].INJECT_DBITERR_A
CELL_W[1].IMUX_IMUX[40]	URAM[0].ADDR_A13
CELL_W[1].IMUX_IMUX[42]	URAM[0].ADDR_A15
CELL_W[1].IMUX_IMUX[44]	URAM[0].ADDR_A17
CELL_W[1].IMUX_IMUX[46]	URAM[0].ADDR_A19
CELL_W[1].IMUX_IMUX[47]	URAM[0].ADDR_A18
CELL_W[2].OUT_BEL[3]	URAM[0].DOUT_A41
CELL_W[2].OUT_BEL[5]	URAM[0].DOUT_A42
CELL_W[2].OUT_BEL[6]	URAM[0].DOUT_A43
CELL_W[2].OUT_BEL[7]	URAM[0].DOUT_A44
CELL_W[2].OUT_BEL[9]	URAM[0].DOUT_A45
CELL_W[2].OUT_BEL[10]	URAM[0].DOUT_A46
CELL_W[2].OUT_BEL[11]	URAM[0].DOUT_A47
CELL_W[2].OUT_BEL[12]	URAM[0].DOUT_A48
CELL_W[2].OUT_BEL[13]	URAM[0].DOUT_A49
CELL_W[2].OUT_BEL[14]	URAM[0].DOUT_A50
CELL_W[2].OUT_BEL[15]	URAM[0].DOUT_A51
CELL_W[2].OUT_BEL[17]	URAM[0].DOUT_A52
CELL_W[2].OUT_BEL[19]	URAM[0].DOUT_A53
CELL_W[2].OUT_BEL[22]	URAM[0].DOUT_A54
CELL_W[2].OUT_BEL[24]	URAM[0].DOUT_A55
CELL_W[2].OUT_BEL[26]	URAM[0].DOUT_A56
CELL_W[2].OUT_BEL[28]	URAM[0].DOUT_A57
CELL_W[2].OUT_BEL[30]	URAM[0].DOUT_A58
CELL_W[2].IMUX_CTRL[2]	URAM[0].RDB_WR_A
CELL_W[2].IMUX_CTRL[3]	URAM[0].EN_A
CELL_W[2].IMUX_CTRL[4]	URAM[0].CLK
CELL_W[2].IMUX_IMUX[0]	URAM[0].ADDR_A20
CELL_W[2].IMUX_IMUX[1]	URAM[0].ADDR_A22
CELL_W[2].IMUX_IMUX[2]	URAM[0].DIN_A41
CELL_W[2].IMUX_IMUX[4]	URAM[0].DIN_A44
CELL_W[2].IMUX_IMUX[5]	URAM[0].DIN_A46
CELL_W[2].IMUX_IMUX[6]	URAM[0].DIN_A48
CELL_W[2].IMUX_IMUX[8]	URAM[0].DIN_A52
CELL_W[2].IMUX_IMUX[9]	URAM[0].DIN_A54
CELL_W[2].IMUX_IMUX[10]	URAM[0].BWE_A0
CELL_W[2].IMUX_IMUX[12]	URAM[0].BWE_A4
CELL_W[2].IMUX_IMUX[13]	URAM[0].BWE_A6
CELL_W[2].IMUX_IMUX[14]	URAM[0].BWE_A8
CELL_W[2].IMUX_IMUX[16]	URAM[0].ADDR_A21
CELL_W[2].IMUX_IMUX[18]	URAM[0].DIN_A40
CELL_W[2].IMUX_IMUX[20]	URAM[0].DIN_A42
CELL_W[2].IMUX_IMUX[23]	URAM[0].DIN_A43
CELL_W[2].IMUX_IMUX[24]	URAM[0].DIN_A45
CELL_W[2].IMUX_IMUX[26]	URAM[0].DIN_A47
CELL_W[2].IMUX_IMUX[28]	URAM[0].DIN_A49
CELL_W[2].IMUX_IMUX[30]	URAM[0].DIN_A51
CELL_W[2].IMUX_IMUX[31]	URAM[0].DIN_A50
CELL_W[2].IMUX_IMUX[32]	URAM[0].DIN_A53
CELL_W[2].IMUX_IMUX[34]	URAM[0].DIN_A55
CELL_W[2].IMUX_IMUX[36]	URAM[0].BWE_A1
CELL_W[2].IMUX_IMUX[38]	URAM[0].BWE_A3
CELL_W[2].IMUX_IMUX[39]	URAM[0].BWE_A2
CELL_W[2].IMUX_IMUX[40]	URAM[0].BWE_A5
CELL_W[2].IMUX_IMUX[42]	URAM[0].BWE_A7
CELL_W[2].IMUX_IMUX[46]	URAM[0].DIN_A57
CELL_W[2].IMUX_IMUX[47]	URAM[0].DIN_A56
CELL_W[3].OUT_BEL[0]	URAM[0].DOUT_A59
CELL_W[3].OUT_BEL[2]	URAM[0].DOUT_A60
CELL_W[3].OUT_BEL[3]	URAM[0].DOUT_A61
CELL_W[3].OUT_BEL[4]	URAM[0].DOUT_A62
CELL_W[3].OUT_BEL[5]	URAM[0].DOUT_A63
CELL_W[3].OUT_BEL[6]	URAM[0].DOUT_A64
CELL_W[3].OUT_BEL[7]	URAM[0].DOUT_A65
CELL_W[3].OUT_BEL[8]	URAM[0].DOUT_A66
CELL_W[3].OUT_BEL[9]	URAM[0].DOUT_A67
CELL_W[3].OUT_BEL[10]	URAM[0].DOUT_A68
CELL_W[3].OUT_BEL[11]	URAM[0].DOUT_A69
CELL_W[3].OUT_BEL[12]	URAM[0].DOUT_A70
CELL_W[3].OUT_BEL[14]	URAM[0].TST_RING_OUT
CELL_W[3].OUT_BEL[16]	URAM[0].DOUT_A71
CELL_W[3].OUT_BEL[24]	URAM[1].DOUT_A0
CELL_W[3].OUT_BEL[25]	URAM[1].DOUT_A1
CELL_W[3].OUT_BEL[26]	URAM[1].DOUT_A2
CELL_W[3].OUT_BEL[27]	URAM[1].DOUT_A3
CELL_W[3].OUT_BEL[28]	URAM[1].DOUT_A4
CELL_W[3].OUT_BEL[29]	URAM[1].DOUT_A5
CELL_W[3].OUT_BEL[30]	URAM[1].DOUT_A6
CELL_W[3].OUT_BEL[31]	URAM[1].DOUT_A7
CELL_W[3].IMUX_CTRL[3]	URAM[0].TST_RING_STARTB
CELL_W[3].IMUX_CTRL[4]	URAM[0].TST_RING_ENB
CELL_W[3].IMUX_IMUX[0]	URAM[0].DIN_A58
CELL_W[3].IMUX_IMUX[1]	URAM[0].DIN_A60
CELL_W[3].IMUX_IMUX[2]	URAM[0].DIN_A62
CELL_W[3].IMUX_IMUX[4]	URAM[0].DIN_A66
CELL_W[3].IMUX_IMUX[5]	URAM[0].DIN_A68
CELL_W[3].IMUX_IMUX[6]	URAM[0].DIN_A70
CELL_W[3].IMUX_IMUX[12]	URAM[1].DIN_A0
CELL_W[3].IMUX_IMUX[13]	URAM[1].DIN_A2
CELL_W[3].IMUX_IMUX[14]	URAM[1].DIN_A4
CELL_W[3].IMUX_IMUX[16]	URAM[0].DIN_A59
CELL_W[3].IMUX_IMUX[18]	URAM[0].DIN_A61
CELL_W[3].IMUX_IMUX[20]	URAM[0].DIN_A63
CELL_W[3].IMUX_IMUX[22]	URAM[0].DIN_A65
CELL_W[3].IMUX_IMUX[23]	URAM[0].DIN_A64
CELL_W[3].IMUX_IMUX[24]	URAM[0].DIN_A67
CELL_W[3].IMUX_IMUX[26]	URAM[0].DIN_A69
CELL_W[3].IMUX_IMUX[28]	URAM[0].DIN_A71
CELL_W[3].IMUX_IMUX[40]	URAM[1].DIN_A1
CELL_W[3].IMUX_IMUX[42]	URAM[1].DIN_A3
CELL_W[3].IMUX_IMUX[44]	URAM[1].DIN_A5
CELL_W[3].IMUX_IMUX[46]	URAM[1].DIN_A7
CELL_W[3].IMUX_IMUX[47]	URAM[1].DIN_A6
CELL_W[4].OUT_BEL[0]	URAM[1].DOUT_A8
CELL_W[4].OUT_BEL[1]	URAM[1].DOUT_A9
CELL_W[4].OUT_BEL[2]	URAM[1].DOUT_A10
CELL_W[4].OUT_BEL[3]	URAM[1].DOUT_A11
CELL_W[4].OUT_BEL[6]	URAM[1].DOUT_A12
CELL_W[4].OUT_BEL[8]	URAM[1].DOUT_A13
CELL_W[4].OUT_BEL[12]	URAM[1].DOUT_A14
CELL_W[4].OUT_BEL[13]	URAM[1].DOUT_A15
CELL_W[4].OUT_BEL[14]	URAM[1].DOUT_A16
CELL_W[4].OUT_BEL[15]	URAM[1].DBITERR_A
CELL_W[4].OUT_BEL[16]	URAM[1].DOUT_A17
CELL_W[4].OUT_BEL[17]	URAM[1].TST_SLEEP_OUT
CELL_W[4].OUT_BEL[18]	URAM[1].TST_DEEPSLEEP_OUT
CELL_W[4].OUT_BEL[19]	URAM[1].TST_SHUTDOWN_OUT
CELL_W[4].OUT_BEL[20]	URAM[1].DOUT_A18
CELL_W[4].OUT_BEL[21]	URAM[1].DOUT_A19
CELL_W[4].OUT_BEL[22]	URAM[1].RDACCESS_A
CELL_W[4].OUT_BEL[23]	URAM[1].SBITERR_A
CELL_W[4].OUT_BEL[24]	URAM[1].DOUT_A20
CELL_W[4].OUT_BEL[27]	URAM[1].DOUT_A21
CELL_W[4].OUT_BEL[28]	URAM[1].DOUT_A22
CELL_W[4].OUT_BEL[29]	URAM[1].DOUT_A23
CELL_W[4].OUT_BEL[30]	URAM[1].DOUT_A24
CELL_W[4].OUT_BEL[31]	URAM[1].DOUT_A25
CELL_W[4].IMUX_CTRL[4]	URAM[1].SLEEP
CELL_W[4].IMUX_CTRL[5]	URAM[1].OREG_CAS_CE_A
CELL_W[4].IMUX_CTRL[6]	URAM[1].DEEPSLEEP
CELL_W[4].IMUX_CTRL[7]	URAM[1].SHUTDOWN
CELL_W[4].IMUX_IMUX[0]	URAM[1].DIN_A8
CELL_W[4].IMUX_IMUX[1]	URAM[1].DIN_A10
CELL_W[4].IMUX_IMUX[2]	URAM[1].DIN_A12
CELL_W[4].IMUX_IMUX[4]	URAM[1].ADDR_A0
CELL_W[4].IMUX_IMUX[5]	URAM[1].ADDR_A2
CELL_W[4].IMUX_IMUX[6]	URAM[1].ADDR_A4
CELL_W[4].IMUX_IMUX[8]	URAM[1].ADDR_A8
CELL_W[4].IMUX_IMUX[9]	URAM[1].ADDR_A10
CELL_W[4].IMUX_IMUX[10]	URAM[1].DIN_A16
CELL_W[4].IMUX_IMUX[12]	URAM[1].DIN_A18
CELL_W[4].IMUX_IMUX[13]	URAM[1].DIN_A20
CELL_W[4].IMUX_IMUX[14]	URAM[1].DIN_A22
CELL_W[4].IMUX_IMUX[16]	URAM[1].DIN_A9
CELL_W[4].IMUX_IMUX[18]	URAM[1].DIN_A11
CELL_W[4].IMUX_IMUX[20]	URAM[1].DIN_A13
CELL_W[4].IMUX_IMUX[22]	URAM[1].DIN_A15
CELL_W[4].IMUX_IMUX[23]	URAM[1].DIN_A14
CELL_W[4].IMUX_IMUX[24]	URAM[1].ADDR_A1
CELL_W[4].IMUX_IMUX[26]	URAM[1].ADDR_A3
CELL_W[4].IMUX_IMUX[28]	URAM[1].ADDR_A5
CELL_W[4].IMUX_IMUX[30]	URAM[1].ADDR_A7
CELL_W[4].IMUX_IMUX[31]	URAM[1].ADDR_A6
CELL_W[4].IMUX_IMUX[32]	URAM[1].ADDR_A9
CELL_W[4].IMUX_IMUX[34]	URAM[1].ADDR_A11
CELL_W[4].IMUX_IMUX[36]	URAM[1].DIN_A17
CELL_W[4].IMUX_IMUX[40]	URAM[1].DIN_A19
CELL_W[4].IMUX_IMUX[42]	URAM[1].DIN_A21
CELL_W[4].IMUX_IMUX[44]	URAM[1].DIN_A23
CELL_W[4].IMUX_IMUX[46]	URAM[1].DIN_A25
CELL_W[4].IMUX_IMUX[47]	URAM[1].DIN_A24
CELL_W[5].OUT_BEL[0]	URAM[1].DOUT_A26
CELL_W[5].OUT_BEL[1]	URAM[1].DOUT_A27
CELL_W[5].OUT_BEL[2]	URAM[1].DOUT_A28
CELL_W[5].OUT_BEL[3]	URAM[1].DOUT_A29
CELL_W[5].OUT_BEL[4]	URAM[1].DOUT_A30
CELL_W[5].OUT_BEL[5]	URAM[1].DOUT_A31
CELL_W[5].OUT_BEL[6]	URAM[1].DOUT_A32
CELL_W[5].OUT_BEL[7]	URAM[1].DOUT_A33
CELL_W[5].OUT_BEL[8]	URAM[1].DOUT_A34
CELL_W[5].OUT_BEL[9]	URAM[1].DOUT_A35
CELL_W[5].OUT_BEL[10]	URAM[1].DOUT_A36
CELL_W[5].OUT_BEL[11]	URAM[1].DOUT_A37
CELL_W[5].OUT_BEL[12]	URAM[1].DOUT_A38
CELL_W[5].OUT_BEL[17]	URAM[1].DOUT_A39
CELL_W[5].OUT_BEL[23]	URAM[1].DOUT_A40
CELL_W[5].OUT_BEL[27]	URAM[1].DOUT_A41
CELL_W[5].OUT_BEL[29]	URAM[1].DOUT_A42
CELL_W[5].OUT_BEL[30]	URAM[1].DOUT_A43
CELL_W[5].OUT_BEL[31]	URAM[1].DOUT_A44
CELL_W[5].IMUX_CTRL[0]	URAM[1].OREG_ECC_CE_A
CELL_W[5].IMUX_CTRL[1]	URAM[1].OREG_CE_A
CELL_W[5].IMUX_CTRL[5]	URAM[1].RST_A
CELL_W[5].IMUX_IMUX[0]	URAM[1].DIN_A26
CELL_W[5].IMUX_IMUX[1]	URAM[1].DIN_A28
CELL_W[5].IMUX_IMUX[2]	URAM[1].DIN_A30
CELL_W[5].IMUX_IMUX[4]	URAM[1].DIN_A34
CELL_W[5].IMUX_IMUX[5]	URAM[1].DIN_A36
CELL_W[5].IMUX_IMUX[6]	URAM[1].DIN_A38
CELL_W[5].IMUX_IMUX[8]	URAM[1].ADDR_A12
CELL_W[5].IMUX_IMUX[9]	URAM[1].ADDR_A14
CELL_W[5].IMUX_IMUX[10]	URAM[1].ADDR_A16
CELL_W[5].IMUX_IMUX[12]	URAM[1].ADDR_A20
CELL_W[5].IMUX_IMUX[13]	URAM[1].ADDR_A22
CELL_W[5].IMUX_IMUX[14]	URAM[1].DIN_A41
CELL_W[5].IMUX_IMUX[16]	URAM[1].DIN_A27
CELL_W[5].IMUX_IMUX[18]	URAM[1].DIN_A29
CELL_W[5].IMUX_IMUX[20]	URAM[1].DIN_A31
CELL_W[5].IMUX_IMUX[22]	URAM[1].DIN_A33
CELL_W[5].IMUX_IMUX[23]	URAM[1].DIN_A32
CELL_W[5].IMUX_IMUX[24]	URAM[1].DIN_A35
CELL_W[5].IMUX_IMUX[26]	URAM[1].DIN_A37
CELL_W[5].IMUX_IMUX[28]	URAM[1].DIN_A39
CELL_W[5].IMUX_IMUX[30]	URAM[1].INJECT_SBITERR_A
CELL_W[5].IMUX_IMUX[31]	URAM[1].INJECT_DBITERR_A
CELL_W[5].IMUX_IMUX[32]	URAM[1].ADDR_A13
CELL_W[5].IMUX_IMUX[34]	URAM[1].ADDR_A15
CELL_W[5].IMUX_IMUX[36]	URAM[1].ADDR_A17
CELL_W[5].IMUX_IMUX[38]	URAM[1].ADDR_A19
CELL_W[5].IMUX_IMUX[39]	URAM[1].ADDR_A18
CELL_W[5].IMUX_IMUX[40]	URAM[1].ADDR_A21
CELL_W[5].IMUX_IMUX[42]	URAM[1].DIN_A40
CELL_W[5].IMUX_IMUX[44]	URAM[1].DIN_A42
CELL_W[5].IMUX_IMUX[47]	URAM[1].DIN_A43
CELL_W[6].OUT_BEL[1]	URAM[1].DOUT_A45
CELL_W[6].OUT_BEL[2]	URAM[1].DOUT_A46
CELL_W[6].OUT_BEL[3]	URAM[1].DOUT_A47
CELL_W[6].OUT_BEL[4]	URAM[1].DOUT_A48
CELL_W[6].OUT_BEL[5]	URAM[1].DOUT_A49
CELL_W[6].OUT_BEL[6]	URAM[1].DOUT_A50
CELL_W[6].OUT_BEL[7]	URAM[1].DOUT_A51
CELL_W[6].OUT_BEL[9]	URAM[1].DOUT_A52
CELL_W[6].OUT_BEL[11]	URAM[1].DOUT_A53
CELL_W[6].OUT_BEL[14]	URAM[1].DOUT_A54
CELL_W[6].OUT_BEL[16]	URAM[1].DOUT_A55
CELL_W[6].OUT_BEL[18]	URAM[1].DOUT_A56
CELL_W[6].OUT_BEL[20]	URAM[1].DOUT_A57
CELL_W[6].OUT_BEL[22]	URAM[1].DOUT_A58
CELL_W[6].OUT_BEL[24]	URAM[1].DOUT_A59
CELL_W[6].OUT_BEL[26]	URAM[1].DOUT_A60
CELL_W[6].OUT_BEL[27]	URAM[1].DOUT_A61
CELL_W[6].OUT_BEL[28]	URAM[1].DOUT_A62
CELL_W[6].OUT_BEL[29]	URAM[1].DOUT_A63
CELL_W[6].OUT_BEL[30]	URAM[1].DOUT_A64
CELL_W[6].OUT_BEL[31]	URAM[1].DOUT_A65
CELL_W[6].IMUX_CTRL[0]	URAM[1].RDB_WR_A
CELL_W[6].IMUX_CTRL[1]	URAM[1].EN_A
CELL_W[6].IMUX_CTRL[4]	URAM[1].CLK
CELL_W[6].IMUX_IMUX[0]	URAM[1].DIN_A44
CELL_W[6].IMUX_IMUX[1]	URAM[1].DIN_A46
CELL_W[6].IMUX_IMUX[2]	URAM[1].DIN_A48
CELL_W[6].IMUX_IMUX[4]	URAM[1].DIN_A52
CELL_W[6].IMUX_IMUX[5]	URAM[1].DIN_A54
CELL_W[6].IMUX_IMUX[6]	URAM[1].BWE_A0
CELL_W[6].IMUX_IMUX[8]	URAM[1].BWE_A4
CELL_W[6].IMUX_IMUX[9]	URAM[1].BWE_A6
CELL_W[6].IMUX_IMUX[10]	URAM[1].BWE_A8
CELL_W[6].IMUX_IMUX[12]	URAM[1].DIN_A58
CELL_W[6].IMUX_IMUX[13]	URAM[1].DIN_A60
CELL_W[6].IMUX_IMUX[14]	URAM[1].DIN_A62
CELL_W[6].IMUX_IMUX[16]	URAM[1].DIN_A45
CELL_W[6].IMUX_IMUX[18]	URAM[1].DIN_A47
CELL_W[6].IMUX_IMUX[20]	URAM[1].DIN_A49
CELL_W[6].IMUX_IMUX[22]	URAM[1].DIN_A51
CELL_W[6].IMUX_IMUX[23]	URAM[1].DIN_A50
CELL_W[6].IMUX_IMUX[24]	URAM[1].DIN_A53
CELL_W[6].IMUX_IMUX[26]	URAM[1].DIN_A55
CELL_W[6].IMUX_IMUX[28]	URAM[1].BWE_A1
CELL_W[6].IMUX_IMUX[30]	URAM[1].BWE_A3
CELL_W[6].IMUX_IMUX[31]	URAM[1].BWE_A2
CELL_W[6].IMUX_IMUX[32]	URAM[1].BWE_A5
CELL_W[6].IMUX_IMUX[34]	URAM[1].BWE_A7
CELL_W[6].IMUX_IMUX[38]	URAM[1].DIN_A57
CELL_W[6].IMUX_IMUX[39]	URAM[1].DIN_A56
CELL_W[6].IMUX_IMUX[40]	URAM[1].DIN_A59
CELL_W[6].IMUX_IMUX[42]	URAM[1].DIN_A61
CELL_W[6].IMUX_IMUX[44]	URAM[1].DIN_A63
CELL_W[6].IMUX_IMUX[46]	URAM[1].DIN_A65
CELL_W[6].IMUX_IMUX[47]	URAM[1].DIN_A64
CELL_W[7].OUT_BEL[0]	URAM[1].DOUT_A66
CELL_W[7].OUT_BEL[1]	URAM[1].DOUT_A67
CELL_W[7].OUT_BEL[2]	URAM[1].DOUT_A68
CELL_W[7].OUT_BEL[3]	URAM[1].DOUT_A69
CELL_W[7].OUT_BEL[4]	URAM[1].DOUT_A70
CELL_W[7].OUT_BEL[6]	URAM[1].TST_RING_OUT
CELL_W[7].OUT_BEL[8]	URAM[1].DOUT_A71
CELL_W[7].OUT_BEL[16]	URAM[2].DOUT_A0
CELL_W[7].OUT_BEL[17]	URAM[2].DOUT_A1
CELL_W[7].OUT_BEL[18]	URAM[2].DOUT_A2
CELL_W[7].OUT_BEL[19]	URAM[2].DOUT_A3
CELL_W[7].OUT_BEL[20]	URAM[2].DOUT_A4
CELL_W[7].OUT_BEL[21]	URAM[2].DOUT_A5
CELL_W[7].OUT_BEL[22]	URAM[2].DOUT_A6
CELL_W[7].OUT_BEL[23]	URAM[2].DOUT_A7
CELL_W[7].OUT_BEL[24]	URAM[2].DOUT_A8
CELL_W[7].OUT_BEL[25]	URAM[2].DOUT_A9
CELL_W[7].OUT_BEL[26]	URAM[2].DOUT_A10
CELL_W[7].OUT_BEL[27]	URAM[2].DOUT_A11
CELL_W[7].OUT_BEL[30]	URAM[2].DOUT_A12
CELL_W[7].IMUX_CTRL[1]	URAM[1].TST_RING_STARTB
CELL_W[7].IMUX_CTRL[2]	URAM[1].TST_RING_ENB
CELL_W[7].IMUX_IMUX[0]	URAM[1].DIN_A66
CELL_W[7].IMUX_IMUX[1]	URAM[1].DIN_A68
CELL_W[7].IMUX_IMUX[2]	URAM[1].DIN_A70
CELL_W[7].IMUX_IMUX[8]	URAM[2].DIN_A0
CELL_W[7].IMUX_IMUX[9]	URAM[2].DIN_A2
CELL_W[7].IMUX_IMUX[10]	URAM[2].DIN_A4
CELL_W[7].IMUX_IMUX[12]	URAM[2].DIN_A8
CELL_W[7].IMUX_IMUX[13]	URAM[2].DIN_A10
CELL_W[7].IMUX_IMUX[14]	URAM[2].DIN_A12
CELL_W[7].IMUX_IMUX[16]	URAM[1].DIN_A67
CELL_W[7].IMUX_IMUX[18]	URAM[1].DIN_A69
CELL_W[7].IMUX_IMUX[20]	URAM[1].DIN_A71
CELL_W[7].IMUX_IMUX[32]	URAM[2].DIN_A1
CELL_W[7].IMUX_IMUX[34]	URAM[2].DIN_A3
CELL_W[7].IMUX_IMUX[36]	URAM[2].DIN_A5
CELL_W[7].IMUX_IMUX[38]	URAM[2].DIN_A7
CELL_W[7].IMUX_IMUX[39]	URAM[2].DIN_A6
CELL_W[7].IMUX_IMUX[40]	URAM[2].DIN_A9
CELL_W[7].IMUX_IMUX[42]	URAM[2].DIN_A11
CELL_W[7].IMUX_IMUX[44]	URAM[2].DIN_A13
CELL_W[7].IMUX_IMUX[46]	URAM[2].DIN_A15
CELL_W[7].IMUX_IMUX[47]	URAM[2].DIN_A14
CELL_W[8].OUT_BEL[0]	URAM[2].DOUT_A13
CELL_W[8].OUT_BEL[4]	URAM[2].DOUT_A14
CELL_W[8].OUT_BEL[5]	URAM[2].DOUT_A15
CELL_W[8].OUT_BEL[6]	URAM[2].DOUT_A16
CELL_W[8].OUT_BEL[7]	URAM[2].DBITERR_A
CELL_W[8].OUT_BEL[8]	URAM[2].DOUT_A17
CELL_W[8].OUT_BEL[9]	URAM[2].TST_SLEEP_OUT
CELL_W[8].OUT_BEL[10]	URAM[2].TST_DEEPSLEEP_OUT
CELL_W[8].OUT_BEL[11]	URAM[2].TST_SHUTDOWN_OUT
CELL_W[8].OUT_BEL[12]	URAM[2].DOUT_A18
CELL_W[8].OUT_BEL[13]	URAM[2].DOUT_A19
CELL_W[8].OUT_BEL[14]	URAM[2].RDACCESS_A
CELL_W[8].OUT_BEL[15]	URAM[2].SBITERR_A
CELL_W[8].OUT_BEL[16]	URAM[2].DOUT_A20
CELL_W[8].OUT_BEL[19]	URAM[2].DOUT_A21
CELL_W[8].OUT_BEL[20]	URAM[2].DOUT_A22
CELL_W[8].OUT_BEL[21]	URAM[2].DOUT_A23
CELL_W[8].OUT_BEL[22]	URAM[2].DOUT_A24
CELL_W[8].OUT_BEL[23]	URAM[2].DOUT_A25
CELL_W[8].OUT_BEL[24]	URAM[2].DOUT_A26
CELL_W[8].OUT_BEL[25]	URAM[2].DOUT_A27
CELL_W[8].OUT_BEL[26]	URAM[2].DOUT_A28
CELL_W[8].OUT_BEL[27]	URAM[2].DOUT_A29
CELL_W[8].OUT_BEL[28]	URAM[2].DOUT_A30
CELL_W[8].OUT_BEL[29]	URAM[2].DOUT_A31
CELL_W[8].OUT_BEL[30]	URAM[2].DOUT_A32
CELL_W[8].OUT_BEL[31]	URAM[2].DOUT_A33
CELL_W[8].IMUX_CTRL[2]	URAM[2].SLEEP
CELL_W[8].IMUX_CTRL[3]	URAM[2].OREG_CAS_CE_A
CELL_W[8].IMUX_CTRL[4]	URAM[2].DEEPSLEEP
CELL_W[8].IMUX_CTRL[5]	URAM[2].SHUTDOWN
CELL_W[8].IMUX_CTRL[6]	URAM[2].OREG_ECC_CE_A
CELL_W[8].IMUX_CTRL[7]	URAM[2].OREG_CE_A
CELL_W[8].IMUX_IMUX[0]	URAM[2].ADDR_A0
CELL_W[8].IMUX_IMUX[1]	URAM[2].ADDR_A2
CELL_W[8].IMUX_IMUX[2]	URAM[2].ADDR_A4
CELL_W[8].IMUX_IMUX[4]	URAM[2].ADDR_A8
CELL_W[8].IMUX_IMUX[5]	URAM[2].ADDR_A10
CELL_W[8].IMUX_IMUX[6]	URAM[2].DIN_A16
CELL_W[8].IMUX_IMUX[8]	URAM[2].DIN_A18
CELL_W[8].IMUX_IMUX[9]	URAM[2].DIN_A20
CELL_W[8].IMUX_IMUX[10]	URAM[2].DIN_A22
CELL_W[8].IMUX_IMUX[12]	URAM[2].DIN_A26
CELL_W[8].IMUX_IMUX[13]	URAM[2].DIN_A28
CELL_W[8].IMUX_IMUX[14]	URAM[2].DIN_A30
CELL_W[8].IMUX_IMUX[16]	URAM[2].ADDR_A1
CELL_W[8].IMUX_IMUX[18]	URAM[2].ADDR_A3
CELL_W[8].IMUX_IMUX[20]	URAM[2].ADDR_A5
CELL_W[8].IMUX_IMUX[22]	URAM[2].ADDR_A7
CELL_W[8].IMUX_IMUX[23]	URAM[2].ADDR_A6
CELL_W[8].IMUX_IMUX[24]	URAM[2].ADDR_A9
CELL_W[8].IMUX_IMUX[26]	URAM[2].ADDR_A11
CELL_W[8].IMUX_IMUX[28]	URAM[2].DIN_A17
CELL_W[8].IMUX_IMUX[32]	URAM[2].DIN_A19
CELL_W[8].IMUX_IMUX[34]	URAM[2].DIN_A21
CELL_W[8].IMUX_IMUX[36]	URAM[2].DIN_A23
CELL_W[8].IMUX_IMUX[38]	URAM[2].DIN_A25
CELL_W[8].IMUX_IMUX[39]	URAM[2].DIN_A24
CELL_W[8].IMUX_IMUX[40]	URAM[2].DIN_A27
CELL_W[8].IMUX_IMUX[42]	URAM[2].DIN_A29
CELL_W[8].IMUX_IMUX[44]	URAM[2].DIN_A31
CELL_W[8].IMUX_IMUX[46]	URAM[2].DIN_A33
CELL_W[8].IMUX_IMUX[47]	URAM[2].DIN_A32
CELL_W[9].OUT_BEL[0]	URAM[2].DOUT_A34
CELL_W[9].OUT_BEL[1]	URAM[2].DOUT_A35
CELL_W[9].OUT_BEL[2]	URAM[2].DOUT_A36
CELL_W[9].OUT_BEL[3]	URAM[2].DOUT_A37
CELL_W[9].OUT_BEL[4]	URAM[2].DOUT_A38
CELL_W[9].OUT_BEL[9]	URAM[2].DOUT_A39
CELL_W[9].OUT_BEL[15]	URAM[2].DOUT_A40
CELL_W[9].OUT_BEL[19]	URAM[2].DOUT_A41
CELL_W[9].OUT_BEL[21]	URAM[2].DOUT_A42
CELL_W[9].OUT_BEL[22]	URAM[2].DOUT_A43
CELL_W[9].OUT_BEL[23]	URAM[2].DOUT_A44
CELL_W[9].OUT_BEL[25]	URAM[2].DOUT_A45
CELL_W[9].OUT_BEL[26]	URAM[2].DOUT_A46
CELL_W[9].OUT_BEL[27]	URAM[2].DOUT_A47
CELL_W[9].OUT_BEL[28]	URAM[2].DOUT_A48
CELL_W[9].OUT_BEL[29]	URAM[2].DOUT_A49
CELL_W[9].OUT_BEL[30]	URAM[2].DOUT_A50
CELL_W[9].OUT_BEL[31]	URAM[2].DOUT_A51
CELL_W[9].IMUX_CTRL[3]	URAM[2].RST_A
CELL_W[9].IMUX_CTRL[6]	URAM[2].RDB_WR_A
CELL_W[9].IMUX_CTRL[7]	URAM[2].EN_A
CELL_W[9].IMUX_IMUX[0]	URAM[2].DIN_A34
CELL_W[9].IMUX_IMUX[1]	URAM[2].DIN_A36
CELL_W[9].IMUX_IMUX[2]	URAM[2].DIN_A38
CELL_W[9].IMUX_IMUX[4]	URAM[2].ADDR_A12
CELL_W[9].IMUX_IMUX[5]	URAM[2].ADDR_A14
CELL_W[9].IMUX_IMUX[6]	URAM[2].ADDR_A16
CELL_W[9].IMUX_IMUX[8]	URAM[2].ADDR_A20
CELL_W[9].IMUX_IMUX[9]	URAM[2].ADDR_A22
CELL_W[9].IMUX_IMUX[10]	URAM[2].DIN_A41
CELL_W[9].IMUX_IMUX[12]	URAM[2].DIN_A44
CELL_W[9].IMUX_IMUX[13]	URAM[2].DIN_A46
CELL_W[9].IMUX_IMUX[14]	URAM[2].DIN_A48
CELL_W[9].IMUX_IMUX[16]	URAM[2].DIN_A35
CELL_W[9].IMUX_IMUX[18]	URAM[2].DIN_A37
CELL_W[9].IMUX_IMUX[20]	URAM[2].DIN_A39
CELL_W[9].IMUX_IMUX[22]	URAM[2].INJECT_SBITERR_A
CELL_W[9].IMUX_IMUX[23]	URAM[2].INJECT_DBITERR_A
CELL_W[9].IMUX_IMUX[24]	URAM[2].ADDR_A13
CELL_W[9].IMUX_IMUX[26]	URAM[2].ADDR_A15
CELL_W[9].IMUX_IMUX[28]	URAM[2].ADDR_A17
CELL_W[9].IMUX_IMUX[30]	URAM[2].ADDR_A19
CELL_W[9].IMUX_IMUX[31]	URAM[2].ADDR_A18
CELL_W[9].IMUX_IMUX[32]	URAM[2].ADDR_A21
CELL_W[9].IMUX_IMUX[34]	URAM[2].DIN_A40
CELL_W[9].IMUX_IMUX[36]	URAM[2].DIN_A42
CELL_W[9].IMUX_IMUX[39]	URAM[2].DIN_A43
CELL_W[9].IMUX_IMUX[40]	URAM[2].DIN_A45
CELL_W[9].IMUX_IMUX[42]	URAM[2].DIN_A47
CELL_W[9].IMUX_IMUX[44]	URAM[2].DIN_A49
CELL_W[9].IMUX_IMUX[46]	URAM[2].DIN_A51
CELL_W[9].IMUX_IMUX[47]	URAM[2].DIN_A50
CELL_W[10].OUT_BEL[1]	URAM[2].DOUT_A52
CELL_W[10].OUT_BEL[3]	URAM[2].DOUT_A53
CELL_W[10].OUT_BEL[6]	URAM[2].DOUT_A54
CELL_W[10].OUT_BEL[8]	URAM[2].DOUT_A55
CELL_W[10].OUT_BEL[10]	URAM[2].DOUT_A56
CELL_W[10].OUT_BEL[12]	URAM[2].DOUT_A57
CELL_W[10].OUT_BEL[14]	URAM[2].DOUT_A58
CELL_W[10].OUT_BEL[16]	URAM[2].DOUT_A59
CELL_W[10].OUT_BEL[18]	URAM[2].DOUT_A60
CELL_W[10].OUT_BEL[19]	URAM[2].DOUT_A61
CELL_W[10].OUT_BEL[20]	URAM[2].DOUT_A62
CELL_W[10].OUT_BEL[21]	URAM[2].DOUT_A63
CELL_W[10].OUT_BEL[22]	URAM[2].DOUT_A64
CELL_W[10].OUT_BEL[23]	URAM[2].DOUT_A65
CELL_W[10].OUT_BEL[24]	URAM[2].DOUT_A66
CELL_W[10].OUT_BEL[25]	URAM[2].DOUT_A67
CELL_W[10].OUT_BEL[26]	URAM[2].DOUT_A68
CELL_W[10].OUT_BEL[27]	URAM[2].DOUT_A69
CELL_W[10].OUT_BEL[28]	URAM[2].DOUT_A70
CELL_W[10].OUT_BEL[30]	URAM[2].TST_RING_OUT
CELL_W[10].IMUX_CTRL[4]	URAM[2].CLK
CELL_W[10].IMUX_CTRL[7]	URAM[2].TST_RING_STARTB
CELL_W[10].IMUX_IMUX[0]	URAM[2].DIN_A52
CELL_W[10].IMUX_IMUX[1]	URAM[2].DIN_A54
CELL_W[10].IMUX_IMUX[2]	URAM[2].BWE_A0
CELL_W[10].IMUX_IMUX[4]	URAM[2].BWE_A4
CELL_W[10].IMUX_IMUX[5]	URAM[2].BWE_A6
CELL_W[10].IMUX_IMUX[6]	URAM[2].BWE_A8
CELL_W[10].IMUX_IMUX[8]	URAM[2].DIN_A58
CELL_W[10].IMUX_IMUX[9]	URAM[2].DIN_A60
CELL_W[10].IMUX_IMUX[10]	URAM[2].DIN_A62
CELL_W[10].IMUX_IMUX[12]	URAM[2].DIN_A66
CELL_W[10].IMUX_IMUX[13]	URAM[2].DIN_A68
CELL_W[10].IMUX_IMUX[14]	URAM[2].DIN_A70
CELL_W[10].IMUX_IMUX[16]	URAM[2].DIN_A53
CELL_W[10].IMUX_IMUX[18]	URAM[2].DIN_A55
CELL_W[10].IMUX_IMUX[20]	URAM[2].BWE_A1
CELL_W[10].IMUX_IMUX[22]	URAM[2].BWE_A3
CELL_W[10].IMUX_IMUX[23]	URAM[2].BWE_A2
CELL_W[10].IMUX_IMUX[24]	URAM[2].BWE_A5
CELL_W[10].IMUX_IMUX[26]	URAM[2].BWE_A7
CELL_W[10].IMUX_IMUX[30]	URAM[2].DIN_A57
CELL_W[10].IMUX_IMUX[31]	URAM[2].DIN_A56
CELL_W[10].IMUX_IMUX[32]	URAM[2].DIN_A59
CELL_W[10].IMUX_IMUX[34]	URAM[2].DIN_A61
CELL_W[10].IMUX_IMUX[36]	URAM[2].DIN_A63
CELL_W[10].IMUX_IMUX[38]	URAM[2].DIN_A65
CELL_W[10].IMUX_IMUX[39]	URAM[2].DIN_A64
CELL_W[10].IMUX_IMUX[40]	URAM[2].DIN_A67
CELL_W[10].IMUX_IMUX[42]	URAM[2].DIN_A69
CELL_W[10].IMUX_IMUX[44]	URAM[2].DIN_A71
CELL_W[11].OUT_BEL[0]	URAM[2].DOUT_A71
CELL_W[11].OUT_BEL[8]	URAM[3].DOUT_A0
CELL_W[11].OUT_BEL[9]	URAM[3].DOUT_A1
CELL_W[11].OUT_BEL[10]	URAM[3].DOUT_A2
CELL_W[11].OUT_BEL[11]	URAM[3].DOUT_A3
CELL_W[11].OUT_BEL[12]	URAM[3].DOUT_A4
CELL_W[11].OUT_BEL[13]	URAM[3].DOUT_A5
CELL_W[11].OUT_BEL[14]	URAM[3].DOUT_A6
CELL_W[11].OUT_BEL[15]	URAM[3].DOUT_A7
CELL_W[11].OUT_BEL[16]	URAM[3].DOUT_A8
CELL_W[11].OUT_BEL[17]	URAM[3].DOUT_A9
CELL_W[11].OUT_BEL[18]	URAM[3].DOUT_A10
CELL_W[11].OUT_BEL[19]	URAM[3].DOUT_A11
CELL_W[11].OUT_BEL[22]	URAM[3].DOUT_A12
CELL_W[11].OUT_BEL[24]	URAM[3].DOUT_A13
CELL_W[11].OUT_BEL[28]	URAM[3].DOUT_A14
CELL_W[11].OUT_BEL[29]	URAM[3].DOUT_A15
CELL_W[11].OUT_BEL[30]	URAM[3].DOUT_A16
CELL_W[11].OUT_BEL[31]	URAM[3].DBITERR_A
CELL_W[11].IMUX_CTRL[0]	URAM[2].TST_RING_ENB
CELL_W[11].IMUX_IMUX[4]	URAM[3].DIN_A0
CELL_W[11].IMUX_IMUX[5]	URAM[3].DIN_A2
CELL_W[11].IMUX_IMUX[6]	URAM[3].DIN_A4
CELL_W[11].IMUX_IMUX[8]	URAM[3].DIN_A8
CELL_W[11].IMUX_IMUX[9]	URAM[3].DIN_A10
CELL_W[11].IMUX_IMUX[10]	URAM[3].DIN_A12
CELL_W[11].IMUX_IMUX[12]	URAM[3].ADDR_A0
CELL_W[11].IMUX_IMUX[13]	URAM[3].ADDR_A2
CELL_W[11].IMUX_IMUX[14]	URAM[3].ADDR_A4
CELL_W[11].IMUX_IMUX[24]	URAM[3].DIN_A1
CELL_W[11].IMUX_IMUX[26]	URAM[3].DIN_A3
CELL_W[11].IMUX_IMUX[28]	URAM[3].DIN_A5
CELL_W[11].IMUX_IMUX[30]	URAM[3].DIN_A7
CELL_W[11].IMUX_IMUX[31]	URAM[3].DIN_A6
CELL_W[11].IMUX_IMUX[32]	URAM[3].DIN_A9
CELL_W[11].IMUX_IMUX[34]	URAM[3].DIN_A11
CELL_W[11].IMUX_IMUX[36]	URAM[3].DIN_A13
CELL_W[11].IMUX_IMUX[38]	URAM[3].DIN_A15
CELL_W[11].IMUX_IMUX[39]	URAM[3].DIN_A14
CELL_W[11].IMUX_IMUX[40]	URAM[3].ADDR_A1
CELL_W[11].IMUX_IMUX[42]	URAM[3].ADDR_A3
CELL_W[11].IMUX_IMUX[44]	URAM[3].ADDR_A5
CELL_W[11].IMUX_IMUX[46]	URAM[3].ADDR_A7
CELL_W[11].IMUX_IMUX[47]	URAM[3].ADDR_A6
CELL_W[12].OUT_BEL[0]	URAM[3].DOUT_A17
CELL_W[12].OUT_BEL[1]	URAM[3].TST_SLEEP_OUT
CELL_W[12].OUT_BEL[2]	URAM[3].TST_DEEPSLEEP_OUT
CELL_W[12].OUT_BEL[3]	URAM[3].TST_SHUTDOWN_OUT
CELL_W[12].OUT_BEL[4]	URAM[3].DOUT_A18
CELL_W[12].OUT_BEL[5]	URAM[3].DOUT_A19
CELL_W[12].OUT_BEL[6]	URAM[3].RDACCESS_A
CELL_W[12].OUT_BEL[7]	URAM[3].SBITERR_A
CELL_W[12].OUT_BEL[8]	URAM[3].DOUT_A20
CELL_W[12].OUT_BEL[11]	URAM[3].DOUT_A21
CELL_W[12].OUT_BEL[12]	URAM[3].DOUT_A22
CELL_W[12].OUT_BEL[13]	URAM[3].DOUT_A23
CELL_W[12].OUT_BEL[14]	URAM[3].DOUT_A24
CELL_W[12].OUT_BEL[15]	URAM[3].DOUT_A25
CELL_W[12].OUT_BEL[16]	URAM[3].DOUT_A26
CELL_W[12].OUT_BEL[17]	URAM[3].DOUT_A27
CELL_W[12].OUT_BEL[18]	URAM[3].DOUT_A28
CELL_W[12].OUT_BEL[19]	URAM[3].DOUT_A29
CELL_W[12].OUT_BEL[20]	URAM[3].DOUT_A30
CELL_W[12].OUT_BEL[21]	URAM[3].DOUT_A31
CELL_W[12].OUT_BEL[22]	URAM[3].DOUT_A32
CELL_W[12].OUT_BEL[23]	URAM[3].DOUT_A33
CELL_W[12].OUT_BEL[24]	URAM[3].DOUT_A34
CELL_W[12].OUT_BEL[25]	URAM[3].DOUT_A35
CELL_W[12].OUT_BEL[26]	URAM[3].DOUT_A36
CELL_W[12].OUT_BEL[27]	URAM[3].DOUT_A37
CELL_W[12].OUT_BEL[28]	URAM[3].DOUT_A38
CELL_W[12].IMUX_CTRL[0]	URAM[3].SLEEP
CELL_W[12].IMUX_CTRL[1]	URAM[3].OREG_CAS_CE_A
CELL_W[12].IMUX_CTRL[2]	URAM[3].DEEPSLEEP
CELL_W[12].IMUX_CTRL[3]	URAM[3].SHUTDOWN
CELL_W[12].IMUX_CTRL[4]	URAM[3].OREG_ECC_CE_A
CELL_W[12].IMUX_CTRL[5]	URAM[3].OREG_CE_A
CELL_W[12].IMUX_IMUX[0]	URAM[3].ADDR_A8
CELL_W[12].IMUX_IMUX[1]	URAM[3].ADDR_A10
CELL_W[12].IMUX_IMUX[2]	URAM[3].DIN_A16
CELL_W[12].IMUX_IMUX[4]	URAM[3].DIN_A18
CELL_W[12].IMUX_IMUX[5]	URAM[3].DIN_A20
CELL_W[12].IMUX_IMUX[6]	URAM[3].DIN_A22
CELL_W[12].IMUX_IMUX[8]	URAM[3].DIN_A26
CELL_W[12].IMUX_IMUX[9]	URAM[3].DIN_A28
CELL_W[12].IMUX_IMUX[10]	URAM[3].DIN_A30
CELL_W[12].IMUX_IMUX[12]	URAM[3].DIN_A34
CELL_W[12].IMUX_IMUX[13]	URAM[3].DIN_A36
CELL_W[12].IMUX_IMUX[14]	URAM[3].DIN_A38
CELL_W[12].IMUX_IMUX[16]	URAM[3].ADDR_A9
CELL_W[12].IMUX_IMUX[18]	URAM[3].ADDR_A11
CELL_W[12].IMUX_IMUX[20]	URAM[3].DIN_A17
CELL_W[12].IMUX_IMUX[24]	URAM[3].DIN_A19
CELL_W[12].IMUX_IMUX[26]	URAM[3].DIN_A21
CELL_W[12].IMUX_IMUX[28]	URAM[3].DIN_A23
CELL_W[12].IMUX_IMUX[30]	URAM[3].DIN_A25
CELL_W[12].IMUX_IMUX[31]	URAM[3].DIN_A24
CELL_W[12].IMUX_IMUX[32]	URAM[3].DIN_A27
CELL_W[12].IMUX_IMUX[34]	URAM[3].DIN_A29
CELL_W[12].IMUX_IMUX[36]	URAM[3].DIN_A31
CELL_W[12].IMUX_IMUX[38]	URAM[3].DIN_A33
CELL_W[12].IMUX_IMUX[39]	URAM[3].DIN_A32
CELL_W[12].IMUX_IMUX[40]	URAM[3].DIN_A35
CELL_W[12].IMUX_IMUX[42]	URAM[3].DIN_A37
CELL_W[12].IMUX_IMUX[44]	URAM[3].DIN_A39
CELL_W[12].IMUX_IMUX[46]	URAM[3].INJECT_SBITERR_A
CELL_W[12].IMUX_IMUX[47]	URAM[3].INJECT_DBITERR_A
CELL_W[13].OUT_BEL[1]	URAM[3].DOUT_A39
CELL_W[13].OUT_BEL[7]	URAM[3].DOUT_A40
CELL_W[13].OUT_BEL[11]	URAM[3].DOUT_A41
CELL_W[13].OUT_BEL[13]	URAM[3].DOUT_A42
CELL_W[13].OUT_BEL[14]	URAM[3].DOUT_A43
CELL_W[13].OUT_BEL[15]	URAM[3].DOUT_A44
CELL_W[13].OUT_BEL[17]	URAM[3].DOUT_A45
CELL_W[13].OUT_BEL[18]	URAM[3].DOUT_A46
CELL_W[13].OUT_BEL[19]	URAM[3].DOUT_A47
CELL_W[13].OUT_BEL[20]	URAM[3].DOUT_A48
CELL_W[13].OUT_BEL[21]	URAM[3].DOUT_A49
CELL_W[13].OUT_BEL[22]	URAM[3].DOUT_A50
CELL_W[13].OUT_BEL[23]	URAM[3].DOUT_A51
CELL_W[13].OUT_BEL[25]	URAM[3].DOUT_A52
CELL_W[13].OUT_BEL[27]	URAM[3].DOUT_A53
CELL_W[13].OUT_BEL[30]	URAM[3].DOUT_A54
CELL_W[13].IMUX_CTRL[1]	URAM[3].RST_A
CELL_W[13].IMUX_CTRL[4]	URAM[3].RDB_WR_A
CELL_W[13].IMUX_CTRL[5]	URAM[3].EN_A
CELL_W[13].IMUX_IMUX[0]	URAM[3].ADDR_A12
CELL_W[13].IMUX_IMUX[1]	URAM[3].ADDR_A14
CELL_W[13].IMUX_IMUX[2]	URAM[3].ADDR_A16
CELL_W[13].IMUX_IMUX[4]	URAM[3].ADDR_A20
CELL_W[13].IMUX_IMUX[5]	URAM[3].ADDR_A22
CELL_W[13].IMUX_IMUX[6]	URAM[3].DIN_A41
CELL_W[13].IMUX_IMUX[8]	URAM[3].DIN_A44
CELL_W[13].IMUX_IMUX[9]	URAM[3].DIN_A46
CELL_W[13].IMUX_IMUX[10]	URAM[3].DIN_A48
CELL_W[13].IMUX_IMUX[12]	URAM[3].DIN_A52
CELL_W[13].IMUX_IMUX[13]	URAM[3].DIN_A54
CELL_W[13].IMUX_IMUX[14]	URAM[3].BWE_A0
CELL_W[13].IMUX_IMUX[16]	URAM[3].ADDR_A13
CELL_W[13].IMUX_IMUX[18]	URAM[3].ADDR_A15
CELL_W[13].IMUX_IMUX[20]	URAM[3].ADDR_A17
CELL_W[13].IMUX_IMUX[22]	URAM[3].ADDR_A19
CELL_W[13].IMUX_IMUX[23]	URAM[3].ADDR_A18
CELL_W[13].IMUX_IMUX[24]	URAM[3].ADDR_A21
CELL_W[13].IMUX_IMUX[26]	URAM[3].DIN_A40
CELL_W[13].IMUX_IMUX[28]	URAM[3].DIN_A42
CELL_W[13].IMUX_IMUX[31]	URAM[3].DIN_A43
CELL_W[13].IMUX_IMUX[32]	URAM[3].DIN_A45
CELL_W[13].IMUX_IMUX[34]	URAM[3].DIN_A47
CELL_W[13].IMUX_IMUX[36]	URAM[3].DIN_A49
CELL_W[13].IMUX_IMUX[38]	URAM[3].DIN_A51
CELL_W[13].IMUX_IMUX[39]	URAM[3].DIN_A50
CELL_W[13].IMUX_IMUX[40]	URAM[3].DIN_A53
CELL_W[13].IMUX_IMUX[42]	URAM[3].DIN_A55
CELL_W[13].IMUX_IMUX[44]	URAM[3].BWE_A1
CELL_W[13].IMUX_IMUX[46]	URAM[3].BWE_A3
CELL_W[13].IMUX_IMUX[47]	URAM[3].BWE_A2
CELL_W[14].OUT_BEL[0]	URAM[3].DOUT_A55
CELL_W[14].OUT_BEL[2]	URAM[3].DOUT_A56
CELL_W[14].OUT_BEL[4]	URAM[3].DOUT_A57
CELL_W[14].OUT_BEL[6]	URAM[3].DOUT_A58
CELL_W[14].OUT_BEL[8]	URAM[3].DOUT_A59
CELL_W[14].OUT_BEL[10]	URAM[3].DOUT_A60
CELL_W[14].OUT_BEL[11]	URAM[3].DOUT_A61
CELL_W[14].OUT_BEL[12]	URAM[3].DOUT_A62
CELL_W[14].OUT_BEL[13]	URAM[3].DOUT_A63
CELL_W[14].OUT_BEL[14]	URAM[3].DOUT_A64
CELL_W[14].OUT_BEL[15]	URAM[3].DOUT_A65
CELL_W[14].OUT_BEL[16]	URAM[3].DOUT_A66
CELL_W[14].OUT_BEL[17]	URAM[3].DOUT_A67
CELL_W[14].OUT_BEL[18]	URAM[3].DOUT_A68
CELL_W[14].OUT_BEL[19]	URAM[3].DOUT_A69
CELL_W[14].OUT_BEL[20]	URAM[3].DOUT_A70
CELL_W[14].OUT_BEL[22]	URAM[3].TST_RING_OUT
CELL_W[14].OUT_BEL[24]	URAM[3].DOUT_A71
CELL_W[14].IMUX_CTRL[4]	URAM[3].CLK
CELL_W[14].IMUX_CTRL[5]	URAM[3].TST_RING_STARTB
CELL_W[14].IMUX_CTRL[6]	URAM[3].TST_RING_ENB
CELL_W[14].IMUX_IMUX[0]	URAM[3].BWE_A4
CELL_W[14].IMUX_IMUX[1]	URAM[3].BWE_A6
CELL_W[14].IMUX_IMUX[2]	URAM[3].BWE_A8
CELL_W[14].IMUX_IMUX[4]	URAM[3].DIN_A58
CELL_W[14].IMUX_IMUX[5]	URAM[3].DIN_A60
CELL_W[14].IMUX_IMUX[6]	URAM[3].DIN_A62
CELL_W[14].IMUX_IMUX[8]	URAM[3].DIN_A66
CELL_W[14].IMUX_IMUX[9]	URAM[3].DIN_A68
CELL_W[14].IMUX_IMUX[10]	URAM[3].DIN_A70
CELL_W[14].IMUX_IMUX[16]	URAM[3].BWE_A5
CELL_W[14].IMUX_IMUX[18]	URAM[3].BWE_A7
CELL_W[14].IMUX_IMUX[22]	URAM[3].DIN_A57
CELL_W[14].IMUX_IMUX[23]	URAM[3].DIN_A56
CELL_W[14].IMUX_IMUX[24]	URAM[3].DIN_A59
CELL_W[14].IMUX_IMUX[26]	URAM[3].DIN_A61
CELL_W[14].IMUX_IMUX[28]	URAM[3].DIN_A63
CELL_W[14].IMUX_IMUX[30]	URAM[3].DIN_A65
CELL_W[14].IMUX_IMUX[31]	URAM[3].DIN_A64
CELL_W[14].IMUX_IMUX[32]	URAM[3].DIN_A67
CELL_W[14].IMUX_IMUX[34]	URAM[3].DIN_A69
CELL_W[14].IMUX_IMUX[36]	URAM[3].DIN_A71
CELL_E[0].OUT_BEL[0]	URAM[0].DOUT_B0
CELL_E[0].OUT_BEL[1]	URAM[0].DOUT_B1
CELL_E[0].OUT_BEL[2]	URAM[0].DOUT_B2
CELL_E[0].OUT_BEL[3]	URAM[0].DOUT_B3
CELL_E[0].OUT_BEL[4]	URAM[0].DOUT_B4
CELL_E[0].OUT_BEL[5]	URAM[0].DOUT_B5
CELL_E[0].OUT_BEL[6]	URAM[0].DOUT_B6
CELL_E[0].OUT_BEL[7]	URAM[0].DOUT_B7
CELL_E[0].OUT_BEL[8]	URAM[0].DOUT_B8
CELL_E[0].OUT_BEL[9]	URAM[0].DOUT_B9
CELL_E[0].OUT_BEL[10]	URAM[0].DOUT_B10
CELL_E[0].OUT_BEL[11]	URAM[0].DOUT_B11
CELL_E[0].OUT_BEL[14]	URAM[0].DOUT_B12
CELL_E[0].OUT_BEL[16]	URAM[0].DOUT_B13
CELL_E[0].OUT_BEL[20]	URAM[0].DOUT_B14
CELL_E[0].OUT_BEL[21]	URAM[0].DOUT_B15
CELL_E[0].OUT_BEL[22]	URAM[0].DOUT_B16
CELL_E[0].OUT_BEL[23]	URAM[0].DBITERR_B
CELL_E[0].OUT_BEL[24]	URAM[0].DOUT_B17
CELL_E[0].OUT_BEL[28]	URAM[0].DOUT_B18
CELL_E[0].OUT_BEL[29]	URAM[0].DOUT_B19
CELL_E[0].OUT_BEL[30]	URAM[0].RDACCESS_B
CELL_E[0].OUT_BEL[31]	URAM[0].SBITERR_B
CELL_E[0].IMUX_CTRL[7]	URAM[0].OREG_CAS_CE_B
CELL_E[0].IMUX_IMUX[0]	URAM[0].DIN_B0
CELL_E[0].IMUX_IMUX[1]	URAM[0].DIN_B2
CELL_E[0].IMUX_IMUX[2]	URAM[0].DIN_B4
CELL_E[0].IMUX_IMUX[4]	URAM[0].DIN_B8
CELL_E[0].IMUX_IMUX[5]	URAM[0].DIN_B10
CELL_E[0].IMUX_IMUX[6]	URAM[0].DIN_B12
CELL_E[0].IMUX_IMUX[8]	URAM[0].ADDR_B0
CELL_E[0].IMUX_IMUX[9]	URAM[0].ADDR_B2
CELL_E[0].IMUX_IMUX[10]	URAM[0].ADDR_B4
CELL_E[0].IMUX_IMUX[12]	URAM[0].ADDR_B8
CELL_E[0].IMUX_IMUX[13]	URAM[0].ADDR_B10
CELL_E[0].IMUX_IMUX[14]	URAM[0].DIN_B16
CELL_E[0].IMUX_IMUX[16]	URAM[0].DIN_B1
CELL_E[0].IMUX_IMUX[18]	URAM[0].DIN_B3
CELL_E[0].IMUX_IMUX[20]	URAM[0].DIN_B5
CELL_E[0].IMUX_IMUX[22]	URAM[0].DIN_B7
CELL_E[0].IMUX_IMUX[23]	URAM[0].DIN_B6
CELL_E[0].IMUX_IMUX[24]	URAM[0].DIN_B9
CELL_E[0].IMUX_IMUX[26]	URAM[0].DIN_B11
CELL_E[0].IMUX_IMUX[28]	URAM[0].DIN_B13
CELL_E[0].IMUX_IMUX[30]	URAM[0].DIN_B15
CELL_E[0].IMUX_IMUX[31]	URAM[0].DIN_B14
CELL_E[0].IMUX_IMUX[32]	URAM[0].ADDR_B1
CELL_E[0].IMUX_IMUX[34]	URAM[0].ADDR_B3
CELL_E[0].IMUX_IMUX[36]	URAM[0].ADDR_B5
CELL_E[0].IMUX_IMUX[38]	URAM[0].ADDR_B7
CELL_E[0].IMUX_IMUX[39]	URAM[0].ADDR_B6
CELL_E[0].IMUX_IMUX[40]	URAM[0].ADDR_B9
CELL_E[0].IMUX_IMUX[42]	URAM[0].ADDR_B11
CELL_E[0].IMUX_IMUX[44]	URAM[0].DIN_B17
CELL_E[1].OUT_BEL[0]	URAM[0].DOUT_B20
CELL_E[1].OUT_BEL[3]	URAM[0].DOUT_B21
CELL_E[1].OUT_BEL[4]	URAM[0].DOUT_B22
CELL_E[1].OUT_BEL[5]	URAM[0].DOUT_B23
CELL_E[1].OUT_BEL[6]	URAM[0].DOUT_B24
CELL_E[1].OUT_BEL[7]	URAM[0].DOUT_B25
CELL_E[1].OUT_BEL[8]	URAM[0].DOUT_B26
CELL_E[1].OUT_BEL[9]	URAM[0].DOUT_B27
CELL_E[1].OUT_BEL[10]	URAM[0].DOUT_B28
CELL_E[1].OUT_BEL[11]	URAM[0].DOUT_B29
CELL_E[1].OUT_BEL[12]	URAM[0].DOUT_B30
CELL_E[1].OUT_BEL[13]	URAM[0].DOUT_B31
CELL_E[1].OUT_BEL[14]	URAM[0].DOUT_B32
CELL_E[1].OUT_BEL[15]	URAM[0].DOUT_B33
CELL_E[1].OUT_BEL[16]	URAM[0].DOUT_B34
CELL_E[1].OUT_BEL[17]	URAM[0].DOUT_B35
CELL_E[1].OUT_BEL[18]	URAM[0].DOUT_B36
CELL_E[1].OUT_BEL[19]	URAM[0].DOUT_B37
CELL_E[1].OUT_BEL[20]	URAM[0].DOUT_B38
CELL_E[1].OUT_BEL[25]	URAM[0].DOUT_B39
CELL_E[1].OUT_BEL[31]	URAM[0].DOUT_B40
CELL_E[1].IMUX_CTRL[2]	URAM[0].OREG_ECC_CE_B
CELL_E[1].IMUX_CTRL[3]	URAM[0].OREG_CE_B
CELL_E[1].IMUX_CTRL[7]	URAM[0].RST_B
CELL_E[1].IMUX_IMUX[0]	URAM[0].DIN_B18
CELL_E[1].IMUX_IMUX[1]	URAM[0].DIN_B20
CELL_E[1].IMUX_IMUX[2]	URAM[0].DIN_B22
CELL_E[1].IMUX_IMUX[4]	URAM[0].DIN_B26
CELL_E[1].IMUX_IMUX[5]	URAM[0].DIN_B28
CELL_E[1].IMUX_IMUX[6]	URAM[0].DIN_B30
CELL_E[1].IMUX_IMUX[8]	URAM[0].DIN_B34
CELL_E[1].IMUX_IMUX[9]	URAM[0].DIN_B36
CELL_E[1].IMUX_IMUX[10]	URAM[0].DIN_B38
CELL_E[1].IMUX_IMUX[12]	URAM[0].ADDR_B12
CELL_E[1].IMUX_IMUX[13]	URAM[0].ADDR_B14
CELL_E[1].IMUX_IMUX[14]	URAM[0].ADDR_B16
CELL_E[1].IMUX_IMUX[16]	URAM[0].DIN_B19
CELL_E[1].IMUX_IMUX[18]	URAM[0].DIN_B21
CELL_E[1].IMUX_IMUX[20]	URAM[0].DIN_B23
CELL_E[1].IMUX_IMUX[22]	URAM[0].DIN_B25
CELL_E[1].IMUX_IMUX[23]	URAM[0].DIN_B24
CELL_E[1].IMUX_IMUX[24]	URAM[0].DIN_B27
CELL_E[1].IMUX_IMUX[26]	URAM[0].DIN_B29
CELL_E[1].IMUX_IMUX[28]	URAM[0].DIN_B31
CELL_E[1].IMUX_IMUX[30]	URAM[0].DIN_B33
CELL_E[1].IMUX_IMUX[31]	URAM[0].DIN_B32
CELL_E[1].IMUX_IMUX[32]	URAM[0].DIN_B35
CELL_E[1].IMUX_IMUX[34]	URAM[0].DIN_B37
CELL_E[1].IMUX_IMUX[36]	URAM[0].DIN_B39
CELL_E[1].IMUX_IMUX[38]	URAM[0].INJECT_SBITERR_B
CELL_E[1].IMUX_IMUX[39]	URAM[0].INJECT_DBITERR_B
CELL_E[1].IMUX_IMUX[40]	URAM[0].ADDR_B13
CELL_E[1].IMUX_IMUX[42]	URAM[0].ADDR_B15
CELL_E[1].IMUX_IMUX[44]	URAM[0].ADDR_B17
CELL_E[1].IMUX_IMUX[46]	URAM[0].ADDR_B19
CELL_E[1].IMUX_IMUX[47]	URAM[0].ADDR_B18
CELL_E[2].OUT_BEL[3]	URAM[0].DOUT_B41
CELL_E[2].OUT_BEL[5]	URAM[0].DOUT_B42
CELL_E[2].OUT_BEL[6]	URAM[0].DOUT_B43
CELL_E[2].OUT_BEL[7]	URAM[0].DOUT_B44
CELL_E[2].OUT_BEL[9]	URAM[0].DOUT_B45
CELL_E[2].OUT_BEL[10]	URAM[0].DOUT_B46
CELL_E[2].OUT_BEL[11]	URAM[0].DOUT_B47
CELL_E[2].OUT_BEL[12]	URAM[0].DOUT_B48
CELL_E[2].OUT_BEL[13]	URAM[0].DOUT_B49
CELL_E[2].OUT_BEL[14]	URAM[0].DOUT_B50
CELL_E[2].OUT_BEL[15]	URAM[0].DOUT_B51
CELL_E[2].OUT_BEL[17]	URAM[0].DOUT_B52
CELL_E[2].OUT_BEL[19]	URAM[0].DOUT_B53
CELL_E[2].OUT_BEL[22]	URAM[0].DOUT_B54
CELL_E[2].OUT_BEL[24]	URAM[0].DOUT_B55
CELL_E[2].OUT_BEL[26]	URAM[0].DOUT_B56
CELL_E[2].OUT_BEL[28]	URAM[0].DOUT_B57
CELL_E[2].OUT_BEL[30]	URAM[0].DOUT_B58
CELL_E[2].IMUX_CTRL[2]	URAM[0].RDB_WR_B
CELL_E[2].IMUX_CTRL[3]	URAM[0].EN_B
CELL_E[2].IMUX_IMUX[0]	URAM[0].ADDR_B20
CELL_E[2].IMUX_IMUX[1]	URAM[0].ADDR_B22
CELL_E[2].IMUX_IMUX[2]	URAM[0].DIN_B41
CELL_E[2].IMUX_IMUX[4]	URAM[0].DIN_B44
CELL_E[2].IMUX_IMUX[5]	URAM[0].DIN_B46
CELL_E[2].IMUX_IMUX[6]	URAM[0].DIN_B48
CELL_E[2].IMUX_IMUX[8]	URAM[0].DIN_B52
CELL_E[2].IMUX_IMUX[9]	URAM[0].DIN_B54
CELL_E[2].IMUX_IMUX[10]	URAM[0].BWE_B0
CELL_E[2].IMUX_IMUX[12]	URAM[0].BWE_B4
CELL_E[2].IMUX_IMUX[13]	URAM[0].BWE_B6
CELL_E[2].IMUX_IMUX[14]	URAM[0].BWE_B8
CELL_E[2].IMUX_IMUX[16]	URAM[0].ADDR_B21
CELL_E[2].IMUX_IMUX[18]	URAM[0].DIN_B40
CELL_E[2].IMUX_IMUX[20]	URAM[0].DIN_B42
CELL_E[2].IMUX_IMUX[23]	URAM[0].DIN_B43
CELL_E[2].IMUX_IMUX[24]	URAM[0].DIN_B45
CELL_E[2].IMUX_IMUX[26]	URAM[0].DIN_B47
CELL_E[2].IMUX_IMUX[28]	URAM[0].DIN_B49
CELL_E[2].IMUX_IMUX[30]	URAM[0].DIN_B51
CELL_E[2].IMUX_IMUX[31]	URAM[0].DIN_B50
CELL_E[2].IMUX_IMUX[32]	URAM[0].DIN_B53
CELL_E[2].IMUX_IMUX[34]	URAM[0].DIN_B55
CELL_E[2].IMUX_IMUX[36]	URAM[0].BWE_B1
CELL_E[2].IMUX_IMUX[38]	URAM[0].BWE_B3
CELL_E[2].IMUX_IMUX[39]	URAM[0].BWE_B2
CELL_E[2].IMUX_IMUX[40]	URAM[0].BWE_B5
CELL_E[2].IMUX_IMUX[42]	URAM[0].BWE_B7
CELL_E[2].IMUX_IMUX[46]	URAM[0].DIN_B57
CELL_E[2].IMUX_IMUX[47]	URAM[0].DIN_B56
CELL_E[3].OUT_BEL[0]	URAM[0].DOUT_B59
CELL_E[3].OUT_BEL[2]	URAM[0].DOUT_B60
CELL_E[3].OUT_BEL[3]	URAM[0].DOUT_B61
CELL_E[3].OUT_BEL[4]	URAM[0].DOUT_B62
CELL_E[3].OUT_BEL[5]	URAM[0].DOUT_B63
CELL_E[3].OUT_BEL[6]	URAM[0].DOUT_B64
CELL_E[3].OUT_BEL[7]	URAM[0].DOUT_B65
CELL_E[3].OUT_BEL[8]	URAM[0].DOUT_B66
CELL_E[3].OUT_BEL[9]	URAM[0].DOUT_B67
CELL_E[3].OUT_BEL[10]	URAM[0].DOUT_B68
CELL_E[3].OUT_BEL[11]	URAM[0].DOUT_B69
CELL_E[3].OUT_BEL[12]	URAM[0].DOUT_B70
CELL_E[3].OUT_BEL[16]	URAM[0].DOUT_B71
CELL_E[3].OUT_BEL[24]	URAM[1].DOUT_B0
CELL_E[3].OUT_BEL[25]	URAM[1].DOUT_B1
CELL_E[3].OUT_BEL[26]	URAM[1].DOUT_B2
CELL_E[3].OUT_BEL[27]	URAM[1].DOUT_B3
CELL_E[3].OUT_BEL[28]	URAM[1].DOUT_B4
CELL_E[3].OUT_BEL[29]	URAM[1].DOUT_B5
CELL_E[3].OUT_BEL[30]	URAM[1].DOUT_B6
CELL_E[3].OUT_BEL[31]	URAM[1].DOUT_B7
CELL_E[3].IMUX_IMUX[0]	URAM[0].DIN_B58
CELL_E[3].IMUX_IMUX[1]	URAM[0].DIN_B60
CELL_E[3].IMUX_IMUX[2]	URAM[0].DIN_B62
CELL_E[3].IMUX_IMUX[4]	URAM[0].DIN_B66
CELL_E[3].IMUX_IMUX[5]	URAM[0].DIN_B68
CELL_E[3].IMUX_IMUX[6]	URAM[0].DIN_B70
CELL_E[3].IMUX_IMUX[12]	URAM[1].DIN_B0
CELL_E[3].IMUX_IMUX[13]	URAM[1].DIN_B2
CELL_E[3].IMUX_IMUX[14]	URAM[1].DIN_B4
CELL_E[3].IMUX_IMUX[16]	URAM[0].DIN_B59
CELL_E[3].IMUX_IMUX[18]	URAM[0].DIN_B61
CELL_E[3].IMUX_IMUX[20]	URAM[0].DIN_B63
CELL_E[3].IMUX_IMUX[22]	URAM[0].DIN_B65
CELL_E[3].IMUX_IMUX[23]	URAM[0].DIN_B64
CELL_E[3].IMUX_IMUX[24]	URAM[0].DIN_B67
CELL_E[3].IMUX_IMUX[26]	URAM[0].DIN_B69
CELL_E[3].IMUX_IMUX[28]	URAM[0].DIN_B71
CELL_E[3].IMUX_IMUX[40]	URAM[1].DIN_B1
CELL_E[3].IMUX_IMUX[42]	URAM[1].DIN_B3
CELL_E[3].IMUX_IMUX[44]	URAM[1].DIN_B5
CELL_E[3].IMUX_IMUX[46]	URAM[1].DIN_B7
CELL_E[3].IMUX_IMUX[47]	URAM[1].DIN_B6
CELL_E[4].OUT_BEL[0]	URAM[1].DOUT_B8
CELL_E[4].OUT_BEL[1]	URAM[1].DOUT_B9
CELL_E[4].OUT_BEL[2]	URAM[1].DOUT_B10
CELL_E[4].OUT_BEL[3]	URAM[1].DOUT_B11
CELL_E[4].OUT_BEL[6]	URAM[1].DOUT_B12
CELL_E[4].OUT_BEL[8]	URAM[1].DOUT_B13
CELL_E[4].OUT_BEL[12]	URAM[1].DOUT_B14
CELL_E[4].OUT_BEL[13]	URAM[1].DOUT_B15
CELL_E[4].OUT_BEL[14]	URAM[1].DOUT_B16
CELL_E[4].OUT_BEL[15]	URAM[1].DBITERR_B
CELL_E[4].OUT_BEL[16]	URAM[1].DOUT_B17
CELL_E[4].OUT_BEL[20]	URAM[1].DOUT_B18
CELL_E[4].OUT_BEL[21]	URAM[1].DOUT_B19
CELL_E[4].OUT_BEL[22]	URAM[1].RDACCESS_B
CELL_E[4].OUT_BEL[23]	URAM[1].SBITERR_B
CELL_E[4].OUT_BEL[24]	URAM[1].DOUT_B20
CELL_E[4].OUT_BEL[27]	URAM[1].DOUT_B21
CELL_E[4].OUT_BEL[28]	URAM[1].DOUT_B22
CELL_E[4].OUT_BEL[29]	URAM[1].DOUT_B23
CELL_E[4].OUT_BEL[30]	URAM[1].DOUT_B24
CELL_E[4].OUT_BEL[31]	URAM[1].DOUT_B25
CELL_E[4].IMUX_CTRL[5]	URAM[1].OREG_CAS_CE_B
CELL_E[4].IMUX_IMUX[0]	URAM[1].DIN_B8
CELL_E[4].IMUX_IMUX[1]	URAM[1].DIN_B10
CELL_E[4].IMUX_IMUX[2]	URAM[1].DIN_B12
CELL_E[4].IMUX_IMUX[4]	URAM[1].ADDR_B0
CELL_E[4].IMUX_IMUX[5]	URAM[1].ADDR_B2
CELL_E[4].IMUX_IMUX[6]	URAM[1].ADDR_B4
CELL_E[4].IMUX_IMUX[8]	URAM[1].ADDR_B8
CELL_E[4].IMUX_IMUX[9]	URAM[1].ADDR_B10
CELL_E[4].IMUX_IMUX[10]	URAM[1].DIN_B16
CELL_E[4].IMUX_IMUX[12]	URAM[1].DIN_B18
CELL_E[4].IMUX_IMUX[13]	URAM[1].DIN_B20
CELL_E[4].IMUX_IMUX[14]	URAM[1].DIN_B22
CELL_E[4].IMUX_IMUX[16]	URAM[1].DIN_B9
CELL_E[4].IMUX_IMUX[18]	URAM[1].DIN_B11
CELL_E[4].IMUX_IMUX[20]	URAM[1].DIN_B13
CELL_E[4].IMUX_IMUX[22]	URAM[1].DIN_B15
CELL_E[4].IMUX_IMUX[23]	URAM[1].DIN_B14
CELL_E[4].IMUX_IMUX[24]	URAM[1].ADDR_B1
CELL_E[4].IMUX_IMUX[26]	URAM[1].ADDR_B3
CELL_E[4].IMUX_IMUX[28]	URAM[1].ADDR_B5
CELL_E[4].IMUX_IMUX[30]	URAM[1].ADDR_B7
CELL_E[4].IMUX_IMUX[31]	URAM[1].ADDR_B6
CELL_E[4].IMUX_IMUX[32]	URAM[1].ADDR_B9
CELL_E[4].IMUX_IMUX[34]	URAM[1].ADDR_B11
CELL_E[4].IMUX_IMUX[36]	URAM[1].DIN_B17
CELL_E[4].IMUX_IMUX[40]	URAM[1].DIN_B19
CELL_E[4].IMUX_IMUX[42]	URAM[1].DIN_B21
CELL_E[4].IMUX_IMUX[44]	URAM[1].DIN_B23
CELL_E[4].IMUX_IMUX[46]	URAM[1].DIN_B25
CELL_E[4].IMUX_IMUX[47]	URAM[1].DIN_B24
CELL_E[5].OUT_BEL[0]	URAM[1].DOUT_B26
CELL_E[5].OUT_BEL[1]	URAM[1].DOUT_B27
CELL_E[5].OUT_BEL[2]	URAM[1].DOUT_B28
CELL_E[5].OUT_BEL[3]	URAM[1].DOUT_B29
CELL_E[5].OUT_BEL[4]	URAM[1].DOUT_B30
CELL_E[5].OUT_BEL[5]	URAM[1].DOUT_B31
CELL_E[5].OUT_BEL[6]	URAM[1].DOUT_B32
CELL_E[5].OUT_BEL[7]	URAM[1].DOUT_B33
CELL_E[5].OUT_BEL[8]	URAM[1].DOUT_B34
CELL_E[5].OUT_BEL[9]	URAM[1].DOUT_B35
CELL_E[5].OUT_BEL[10]	URAM[1].DOUT_B36
CELL_E[5].OUT_BEL[11]	URAM[1].DOUT_B37
CELL_E[5].OUT_BEL[12]	URAM[1].DOUT_B38
CELL_E[5].OUT_BEL[17]	URAM[1].DOUT_B39
CELL_E[5].OUT_BEL[23]	URAM[1].DOUT_B40
CELL_E[5].OUT_BEL[27]	URAM[1].DOUT_B41
CELL_E[5].OUT_BEL[29]	URAM[1].DOUT_B42
CELL_E[5].OUT_BEL[30]	URAM[1].DOUT_B43
CELL_E[5].OUT_BEL[31]	URAM[1].DOUT_B44
CELL_E[5].IMUX_CTRL[0]	URAM[1].OREG_ECC_CE_B
CELL_E[5].IMUX_CTRL[1]	URAM[1].OREG_CE_B
CELL_E[5].IMUX_CTRL[5]	URAM[1].RST_B
CELL_E[5].IMUX_IMUX[0]	URAM[1].DIN_B26
CELL_E[5].IMUX_IMUX[1]	URAM[1].DIN_B28
CELL_E[5].IMUX_IMUX[2]	URAM[1].DIN_B30
CELL_E[5].IMUX_IMUX[4]	URAM[1].DIN_B34
CELL_E[5].IMUX_IMUX[5]	URAM[1].DIN_B36
CELL_E[5].IMUX_IMUX[6]	URAM[1].DIN_B38
CELL_E[5].IMUX_IMUX[8]	URAM[1].ADDR_B12
CELL_E[5].IMUX_IMUX[9]	URAM[1].ADDR_B14
CELL_E[5].IMUX_IMUX[10]	URAM[1].ADDR_B16
CELL_E[5].IMUX_IMUX[12]	URAM[1].ADDR_B20
CELL_E[5].IMUX_IMUX[13]	URAM[1].ADDR_B22
CELL_E[5].IMUX_IMUX[14]	URAM[1].DIN_B41
CELL_E[5].IMUX_IMUX[16]	URAM[1].DIN_B27
CELL_E[5].IMUX_IMUX[18]	URAM[1].DIN_B29
CELL_E[5].IMUX_IMUX[20]	URAM[1].DIN_B31
CELL_E[5].IMUX_IMUX[22]	URAM[1].DIN_B33
CELL_E[5].IMUX_IMUX[23]	URAM[1].DIN_B32
CELL_E[5].IMUX_IMUX[24]	URAM[1].DIN_B35
CELL_E[5].IMUX_IMUX[26]	URAM[1].DIN_B37
CELL_E[5].IMUX_IMUX[28]	URAM[1].DIN_B39
CELL_E[5].IMUX_IMUX[30]	URAM[1].INJECT_SBITERR_B
CELL_E[5].IMUX_IMUX[31]	URAM[1].INJECT_DBITERR_B
CELL_E[5].IMUX_IMUX[32]	URAM[1].ADDR_B13
CELL_E[5].IMUX_IMUX[34]	URAM[1].ADDR_B15
CELL_E[5].IMUX_IMUX[36]	URAM[1].ADDR_B17
CELL_E[5].IMUX_IMUX[38]	URAM[1].ADDR_B19
CELL_E[5].IMUX_IMUX[39]	URAM[1].ADDR_B18
CELL_E[5].IMUX_IMUX[40]	URAM[1].ADDR_B21
CELL_E[5].IMUX_IMUX[42]	URAM[1].DIN_B40
CELL_E[5].IMUX_IMUX[44]	URAM[1].DIN_B42
CELL_E[5].IMUX_IMUX[47]	URAM[1].DIN_B43
CELL_E[6].OUT_BEL[1]	URAM[1].DOUT_B45
CELL_E[6].OUT_BEL[2]	URAM[1].DOUT_B46
CELL_E[6].OUT_BEL[3]	URAM[1].DOUT_B47
CELL_E[6].OUT_BEL[4]	URAM[1].DOUT_B48
CELL_E[6].OUT_BEL[5]	URAM[1].DOUT_B49
CELL_E[6].OUT_BEL[6]	URAM[1].DOUT_B50
CELL_E[6].OUT_BEL[7]	URAM[1].DOUT_B51
CELL_E[6].OUT_BEL[9]	URAM[1].DOUT_B52
CELL_E[6].OUT_BEL[11]	URAM[1].DOUT_B53
CELL_E[6].OUT_BEL[14]	URAM[1].DOUT_B54
CELL_E[6].OUT_BEL[16]	URAM[1].DOUT_B55
CELL_E[6].OUT_BEL[18]	URAM[1].DOUT_B56
CELL_E[6].OUT_BEL[20]	URAM[1].DOUT_B57
CELL_E[6].OUT_BEL[22]	URAM[1].DOUT_B58
CELL_E[6].OUT_BEL[24]	URAM[1].DOUT_B59
CELL_E[6].OUT_BEL[26]	URAM[1].DOUT_B60
CELL_E[6].OUT_BEL[27]	URAM[1].DOUT_B61
CELL_E[6].OUT_BEL[28]	URAM[1].DOUT_B62
CELL_E[6].OUT_BEL[29]	URAM[1].DOUT_B63
CELL_E[6].OUT_BEL[30]	URAM[1].DOUT_B64
CELL_E[6].OUT_BEL[31]	URAM[1].DOUT_B65
CELL_E[6].IMUX_CTRL[0]	URAM[1].RDB_WR_B
CELL_E[6].IMUX_CTRL[1]	URAM[1].EN_B
CELL_E[6].IMUX_IMUX[0]	URAM[1].DIN_B44
CELL_E[6].IMUX_IMUX[1]	URAM[1].DIN_B46
CELL_E[6].IMUX_IMUX[2]	URAM[1].DIN_B48
CELL_E[6].IMUX_IMUX[4]	URAM[1].DIN_B52
CELL_E[6].IMUX_IMUX[5]	URAM[1].DIN_B54
CELL_E[6].IMUX_IMUX[6]	URAM[1].BWE_B0
CELL_E[6].IMUX_IMUX[8]	URAM[1].BWE_B4
CELL_E[6].IMUX_IMUX[9]	URAM[1].BWE_B6
CELL_E[6].IMUX_IMUX[10]	URAM[1].BWE_B8
CELL_E[6].IMUX_IMUX[12]	URAM[1].DIN_B58
CELL_E[6].IMUX_IMUX[13]	URAM[1].DIN_B60
CELL_E[6].IMUX_IMUX[14]	URAM[1].DIN_B62
CELL_E[6].IMUX_IMUX[16]	URAM[1].DIN_B45
CELL_E[6].IMUX_IMUX[18]	URAM[1].DIN_B47
CELL_E[6].IMUX_IMUX[20]	URAM[1].DIN_B49
CELL_E[6].IMUX_IMUX[22]	URAM[1].DIN_B51
CELL_E[6].IMUX_IMUX[23]	URAM[1].DIN_B50
CELL_E[6].IMUX_IMUX[24]	URAM[1].DIN_B53
CELL_E[6].IMUX_IMUX[26]	URAM[1].DIN_B55
CELL_E[6].IMUX_IMUX[28]	URAM[1].BWE_B1
CELL_E[6].IMUX_IMUX[30]	URAM[1].BWE_B3
CELL_E[6].IMUX_IMUX[31]	URAM[1].BWE_B2
CELL_E[6].IMUX_IMUX[32]	URAM[1].BWE_B5
CELL_E[6].IMUX_IMUX[34]	URAM[1].BWE_B7
CELL_E[6].IMUX_IMUX[38]	URAM[1].DIN_B57
CELL_E[6].IMUX_IMUX[39]	URAM[1].DIN_B56
CELL_E[6].IMUX_IMUX[40]	URAM[1].DIN_B59
CELL_E[6].IMUX_IMUX[42]	URAM[1].DIN_B61
CELL_E[6].IMUX_IMUX[44]	URAM[1].DIN_B63
CELL_E[6].IMUX_IMUX[46]	URAM[1].DIN_B65
CELL_E[6].IMUX_IMUX[47]	URAM[1].DIN_B64
CELL_E[7].OUT_BEL[0]	URAM[1].DOUT_B66
CELL_E[7].OUT_BEL[1]	URAM[1].DOUT_B67
CELL_E[7].OUT_BEL[2]	URAM[1].DOUT_B68
CELL_E[7].OUT_BEL[3]	URAM[1].DOUT_B69
CELL_E[7].OUT_BEL[4]	URAM[1].DOUT_B70
CELL_E[7].OUT_BEL[8]	URAM[1].DOUT_B71
CELL_E[7].OUT_BEL[16]	URAM[2].DOUT_B0
CELL_E[7].OUT_BEL[17]	URAM[2].DOUT_B1
CELL_E[7].OUT_BEL[18]	URAM[2].DOUT_B2
CELL_E[7].OUT_BEL[19]	URAM[2].DOUT_B3
CELL_E[7].OUT_BEL[20]	URAM[2].DOUT_B4
CELL_E[7].OUT_BEL[21]	URAM[2].DOUT_B5
CELL_E[7].OUT_BEL[22]	URAM[2].DOUT_B6
CELL_E[7].OUT_BEL[23]	URAM[2].DOUT_B7
CELL_E[7].OUT_BEL[24]	URAM[2].DOUT_B8
CELL_E[7].OUT_BEL[25]	URAM[2].DOUT_B9
CELL_E[7].OUT_BEL[26]	URAM[2].DOUT_B10
CELL_E[7].OUT_BEL[27]	URAM[2].DOUT_B11
CELL_E[7].OUT_BEL[30]	URAM[2].DOUT_B12
CELL_E[7].IMUX_IMUX[0]	URAM[1].DIN_B66
CELL_E[7].IMUX_IMUX[1]	URAM[1].DIN_B68
CELL_E[7].IMUX_IMUX[2]	URAM[1].DIN_B70
CELL_E[7].IMUX_IMUX[8]	URAM[2].DIN_B0
CELL_E[7].IMUX_IMUX[9]	URAM[2].DIN_B2
CELL_E[7].IMUX_IMUX[10]	URAM[2].DIN_B4
CELL_E[7].IMUX_IMUX[12]	URAM[2].DIN_B8
CELL_E[7].IMUX_IMUX[13]	URAM[2].DIN_B10
CELL_E[7].IMUX_IMUX[14]	URAM[2].DIN_B12
CELL_E[7].IMUX_IMUX[16]	URAM[1].DIN_B67
CELL_E[7].IMUX_IMUX[18]	URAM[1].DIN_B69
CELL_E[7].IMUX_IMUX[20]	URAM[1].DIN_B71
CELL_E[7].IMUX_IMUX[32]	URAM[2].DIN_B1
CELL_E[7].IMUX_IMUX[34]	URAM[2].DIN_B3
CELL_E[7].IMUX_IMUX[36]	URAM[2].DIN_B5
CELL_E[7].IMUX_IMUX[38]	URAM[2].DIN_B7
CELL_E[7].IMUX_IMUX[39]	URAM[2].DIN_B6
CELL_E[7].IMUX_IMUX[40]	URAM[2].DIN_B9
CELL_E[7].IMUX_IMUX[42]	URAM[2].DIN_B11
CELL_E[7].IMUX_IMUX[44]	URAM[2].DIN_B13
CELL_E[7].IMUX_IMUX[46]	URAM[2].DIN_B15
CELL_E[7].IMUX_IMUX[47]	URAM[2].DIN_B14
CELL_E[8].OUT_BEL[0]	URAM[2].DOUT_B13
CELL_E[8].OUT_BEL[4]	URAM[2].DOUT_B14
CELL_E[8].OUT_BEL[5]	URAM[2].DOUT_B15
CELL_E[8].OUT_BEL[6]	URAM[2].DOUT_B16
CELL_E[8].OUT_BEL[7]	URAM[2].DBITERR_B
CELL_E[8].OUT_BEL[8]	URAM[2].DOUT_B17
CELL_E[8].OUT_BEL[12]	URAM[2].DOUT_B18
CELL_E[8].OUT_BEL[13]	URAM[2].DOUT_B19
CELL_E[8].OUT_BEL[14]	URAM[2].RDACCESS_B
CELL_E[8].OUT_BEL[15]	URAM[2].SBITERR_B
CELL_E[8].OUT_BEL[16]	URAM[2].DOUT_B20
CELL_E[8].OUT_BEL[19]	URAM[2].DOUT_B21
CELL_E[8].OUT_BEL[20]	URAM[2].DOUT_B22
CELL_E[8].OUT_BEL[21]	URAM[2].DOUT_B23
CELL_E[8].OUT_BEL[22]	URAM[2].DOUT_B24
CELL_E[8].OUT_BEL[23]	URAM[2].DOUT_B25
CELL_E[8].OUT_BEL[24]	URAM[2].DOUT_B26
CELL_E[8].OUT_BEL[25]	URAM[2].DOUT_B27
CELL_E[8].OUT_BEL[26]	URAM[2].DOUT_B28
CELL_E[8].OUT_BEL[27]	URAM[2].DOUT_B29
CELL_E[8].OUT_BEL[28]	URAM[2].DOUT_B30
CELL_E[8].OUT_BEL[29]	URAM[2].DOUT_B31
CELL_E[8].OUT_BEL[30]	URAM[2].DOUT_B32
CELL_E[8].OUT_BEL[31]	URAM[2].DOUT_B33
CELL_E[8].IMUX_CTRL[3]	URAM[2].OREG_CAS_CE_B
CELL_E[8].IMUX_CTRL[6]	URAM[2].OREG_ECC_CE_B
CELL_E[8].IMUX_CTRL[7]	URAM[2].OREG_CE_B
CELL_E[8].IMUX_IMUX[0]	URAM[2].ADDR_B0
CELL_E[8].IMUX_IMUX[1]	URAM[2].ADDR_B2
CELL_E[8].IMUX_IMUX[2]	URAM[2].ADDR_B4
CELL_E[8].IMUX_IMUX[4]	URAM[2].ADDR_B8
CELL_E[8].IMUX_IMUX[5]	URAM[2].ADDR_B10
CELL_E[8].IMUX_IMUX[6]	URAM[2].DIN_B16
CELL_E[8].IMUX_IMUX[8]	URAM[2].DIN_B18
CELL_E[8].IMUX_IMUX[9]	URAM[2].DIN_B20
CELL_E[8].IMUX_IMUX[10]	URAM[2].DIN_B22
CELL_E[8].IMUX_IMUX[12]	URAM[2].DIN_B26
CELL_E[8].IMUX_IMUX[13]	URAM[2].DIN_B28
CELL_E[8].IMUX_IMUX[14]	URAM[2].DIN_B30
CELL_E[8].IMUX_IMUX[16]	URAM[2].ADDR_B1
CELL_E[8].IMUX_IMUX[18]	URAM[2].ADDR_B3
CELL_E[8].IMUX_IMUX[20]	URAM[2].ADDR_B5
CELL_E[8].IMUX_IMUX[22]	URAM[2].ADDR_B7
CELL_E[8].IMUX_IMUX[23]	URAM[2].ADDR_B6
CELL_E[8].IMUX_IMUX[24]	URAM[2].ADDR_B9
CELL_E[8].IMUX_IMUX[26]	URAM[2].ADDR_B11
CELL_E[8].IMUX_IMUX[28]	URAM[2].DIN_B17
CELL_E[8].IMUX_IMUX[32]	URAM[2].DIN_B19
CELL_E[8].IMUX_IMUX[34]	URAM[2].DIN_B21
CELL_E[8].IMUX_IMUX[36]	URAM[2].DIN_B23
CELL_E[8].IMUX_IMUX[38]	URAM[2].DIN_B25
CELL_E[8].IMUX_IMUX[39]	URAM[2].DIN_B24
CELL_E[8].IMUX_IMUX[40]	URAM[2].DIN_B27
CELL_E[8].IMUX_IMUX[42]	URAM[2].DIN_B29
CELL_E[8].IMUX_IMUX[44]	URAM[2].DIN_B31
CELL_E[8].IMUX_IMUX[46]	URAM[2].DIN_B33
CELL_E[8].IMUX_IMUX[47]	URAM[2].DIN_B32
CELL_E[9].OUT_BEL[0]	URAM[2].DOUT_B34
CELL_E[9].OUT_BEL[1]	URAM[2].DOUT_B35
CELL_E[9].OUT_BEL[2]	URAM[2].DOUT_B36
CELL_E[9].OUT_BEL[3]	URAM[2].DOUT_B37
CELL_E[9].OUT_BEL[4]	URAM[2].DOUT_B38
CELL_E[9].OUT_BEL[9]	URAM[2].DOUT_B39
CELL_E[9].OUT_BEL[15]	URAM[2].DOUT_B40
CELL_E[9].OUT_BEL[19]	URAM[2].DOUT_B41
CELL_E[9].OUT_BEL[21]	URAM[2].DOUT_B42
CELL_E[9].OUT_BEL[22]	URAM[2].DOUT_B43
CELL_E[9].OUT_BEL[23]	URAM[2].DOUT_B44
CELL_E[9].OUT_BEL[25]	URAM[2].DOUT_B45
CELL_E[9].OUT_BEL[26]	URAM[2].DOUT_B46
CELL_E[9].OUT_BEL[27]	URAM[2].DOUT_B47
CELL_E[9].OUT_BEL[28]	URAM[2].DOUT_B48
CELL_E[9].OUT_BEL[29]	URAM[2].DOUT_B49
CELL_E[9].OUT_BEL[30]	URAM[2].DOUT_B50
CELL_E[9].OUT_BEL[31]	URAM[2].DOUT_B51
CELL_E[9].IMUX_CTRL[3]	URAM[2].RST_B
CELL_E[9].IMUX_CTRL[6]	URAM[2].RDB_WR_B
CELL_E[9].IMUX_CTRL[7]	URAM[2].EN_B
CELL_E[9].IMUX_IMUX[0]	URAM[2].DIN_B34
CELL_E[9].IMUX_IMUX[1]	URAM[2].DIN_B36
CELL_E[9].IMUX_IMUX[2]	URAM[2].DIN_B38
CELL_E[9].IMUX_IMUX[4]	URAM[2].ADDR_B12
CELL_E[9].IMUX_IMUX[5]	URAM[2].ADDR_B14
CELL_E[9].IMUX_IMUX[6]	URAM[2].ADDR_B16
CELL_E[9].IMUX_IMUX[8]	URAM[2].ADDR_B20
CELL_E[9].IMUX_IMUX[9]	URAM[2].ADDR_B22
CELL_E[9].IMUX_IMUX[10]	URAM[2].DIN_B41
CELL_E[9].IMUX_IMUX[12]	URAM[2].DIN_B44
CELL_E[9].IMUX_IMUX[13]	URAM[2].DIN_B46
CELL_E[9].IMUX_IMUX[14]	URAM[2].DIN_B48
CELL_E[9].IMUX_IMUX[16]	URAM[2].DIN_B35
CELL_E[9].IMUX_IMUX[18]	URAM[2].DIN_B37
CELL_E[9].IMUX_IMUX[20]	URAM[2].DIN_B39
CELL_E[9].IMUX_IMUX[22]	URAM[2].INJECT_SBITERR_B
CELL_E[9].IMUX_IMUX[23]	URAM[2].INJECT_DBITERR_B
CELL_E[9].IMUX_IMUX[24]	URAM[2].ADDR_B13
CELL_E[9].IMUX_IMUX[26]	URAM[2].ADDR_B15
CELL_E[9].IMUX_IMUX[28]	URAM[2].ADDR_B17
CELL_E[9].IMUX_IMUX[30]	URAM[2].ADDR_B19
CELL_E[9].IMUX_IMUX[31]	URAM[2].ADDR_B18
CELL_E[9].IMUX_IMUX[32]	URAM[2].ADDR_B21
CELL_E[9].IMUX_IMUX[34]	URAM[2].DIN_B40
CELL_E[9].IMUX_IMUX[36]	URAM[2].DIN_B42
CELL_E[9].IMUX_IMUX[39]	URAM[2].DIN_B43
CELL_E[9].IMUX_IMUX[40]	URAM[2].DIN_B45
CELL_E[9].IMUX_IMUX[42]	URAM[2].DIN_B47
CELL_E[9].IMUX_IMUX[44]	URAM[2].DIN_B49
CELL_E[9].IMUX_IMUX[46]	URAM[2].DIN_B51
CELL_E[9].IMUX_IMUX[47]	URAM[2].DIN_B50
CELL_E[10].OUT_BEL[1]	URAM[2].DOUT_B52
CELL_E[10].OUT_BEL[3]	URAM[2].DOUT_B53
CELL_E[10].OUT_BEL[6]	URAM[2].DOUT_B54
CELL_E[10].OUT_BEL[8]	URAM[2].DOUT_B55
CELL_E[10].OUT_BEL[10]	URAM[2].DOUT_B56
CELL_E[10].OUT_BEL[12]	URAM[2].DOUT_B57
CELL_E[10].OUT_BEL[14]	URAM[2].DOUT_B58
CELL_E[10].OUT_BEL[16]	URAM[2].DOUT_B59
CELL_E[10].OUT_BEL[18]	URAM[2].DOUT_B60
CELL_E[10].OUT_BEL[19]	URAM[2].DOUT_B61
CELL_E[10].OUT_BEL[20]	URAM[2].DOUT_B62
CELL_E[10].OUT_BEL[21]	URAM[2].DOUT_B63
CELL_E[10].OUT_BEL[22]	URAM[2].DOUT_B64
CELL_E[10].OUT_BEL[23]	URAM[2].DOUT_B65
CELL_E[10].OUT_BEL[24]	URAM[2].DOUT_B66
CELL_E[10].OUT_BEL[25]	URAM[2].DOUT_B67
CELL_E[10].OUT_BEL[26]	URAM[2].DOUT_B68
CELL_E[10].OUT_BEL[27]	URAM[2].DOUT_B69
CELL_E[10].OUT_BEL[28]	URAM[2].DOUT_B70
CELL_E[10].IMUX_IMUX[0]	URAM[2].DIN_B52
CELL_E[10].IMUX_IMUX[1]	URAM[2].DIN_B54
CELL_E[10].IMUX_IMUX[2]	URAM[2].BWE_B0
CELL_E[10].IMUX_IMUX[4]	URAM[2].BWE_B4
CELL_E[10].IMUX_IMUX[5]	URAM[2].BWE_B6
CELL_E[10].IMUX_IMUX[6]	URAM[2].BWE_B8
CELL_E[10].IMUX_IMUX[8]	URAM[2].DIN_B58
CELL_E[10].IMUX_IMUX[9]	URAM[2].DIN_B60
CELL_E[10].IMUX_IMUX[10]	URAM[2].DIN_B62
CELL_E[10].IMUX_IMUX[12]	URAM[2].DIN_B66
CELL_E[10].IMUX_IMUX[13]	URAM[2].DIN_B68
CELL_E[10].IMUX_IMUX[14]	URAM[2].DIN_B70
CELL_E[10].IMUX_IMUX[16]	URAM[2].DIN_B53
CELL_E[10].IMUX_IMUX[18]	URAM[2].DIN_B55
CELL_E[10].IMUX_IMUX[20]	URAM[2].BWE_B1
CELL_E[10].IMUX_IMUX[22]	URAM[2].BWE_B3
CELL_E[10].IMUX_IMUX[23]	URAM[2].BWE_B2
CELL_E[10].IMUX_IMUX[24]	URAM[2].BWE_B5
CELL_E[10].IMUX_IMUX[26]	URAM[2].BWE_B7
CELL_E[10].IMUX_IMUX[30]	URAM[2].DIN_B57
CELL_E[10].IMUX_IMUX[31]	URAM[2].DIN_B56
CELL_E[10].IMUX_IMUX[32]	URAM[2].DIN_B59
CELL_E[10].IMUX_IMUX[34]	URAM[2].DIN_B61
CELL_E[10].IMUX_IMUX[36]	URAM[2].DIN_B63
CELL_E[10].IMUX_IMUX[38]	URAM[2].DIN_B65
CELL_E[10].IMUX_IMUX[39]	URAM[2].DIN_B64
CELL_E[10].IMUX_IMUX[40]	URAM[2].DIN_B67
CELL_E[10].IMUX_IMUX[42]	URAM[2].DIN_B69
CELL_E[10].IMUX_IMUX[44]	URAM[2].DIN_B71
CELL_E[11].OUT_BEL[0]	URAM[2].DOUT_B71
CELL_E[11].OUT_BEL[8]	URAM[3].DOUT_B0
CELL_E[11].OUT_BEL[9]	URAM[3].DOUT_B1
CELL_E[11].OUT_BEL[10]	URAM[3].DOUT_B2
CELL_E[11].OUT_BEL[11]	URAM[3].DOUT_B3
CELL_E[11].OUT_BEL[12]	URAM[3].DOUT_B4
CELL_E[11].OUT_BEL[13]	URAM[3].DOUT_B5
CELL_E[11].OUT_BEL[14]	URAM[3].DOUT_B6
CELL_E[11].OUT_BEL[15]	URAM[3].DOUT_B7
CELL_E[11].OUT_BEL[16]	URAM[3].DOUT_B8
CELL_E[11].OUT_BEL[17]	URAM[3].DOUT_B9
CELL_E[11].OUT_BEL[18]	URAM[3].DOUT_B10
CELL_E[11].OUT_BEL[19]	URAM[3].DOUT_B11
CELL_E[11].OUT_BEL[22]	URAM[3].DOUT_B12
CELL_E[11].OUT_BEL[24]	URAM[3].DOUT_B13
CELL_E[11].OUT_BEL[28]	URAM[3].DOUT_B14
CELL_E[11].OUT_BEL[29]	URAM[3].DOUT_B15
CELL_E[11].OUT_BEL[30]	URAM[3].DOUT_B16
CELL_E[11].OUT_BEL[31]	URAM[3].DBITERR_B
CELL_E[11].IMUX_IMUX[4]	URAM[3].DIN_B0
CELL_E[11].IMUX_IMUX[5]	URAM[3].DIN_B2
CELL_E[11].IMUX_IMUX[6]	URAM[3].DIN_B4
CELL_E[11].IMUX_IMUX[8]	URAM[3].DIN_B8
CELL_E[11].IMUX_IMUX[9]	URAM[3].DIN_B10
CELL_E[11].IMUX_IMUX[10]	URAM[3].DIN_B12
CELL_E[11].IMUX_IMUX[12]	URAM[3].ADDR_B0
CELL_E[11].IMUX_IMUX[13]	URAM[3].ADDR_B2
CELL_E[11].IMUX_IMUX[14]	URAM[3].ADDR_B4
CELL_E[11].IMUX_IMUX[24]	URAM[3].DIN_B1
CELL_E[11].IMUX_IMUX[26]	URAM[3].DIN_B3
CELL_E[11].IMUX_IMUX[28]	URAM[3].DIN_B5
CELL_E[11].IMUX_IMUX[30]	URAM[3].DIN_B7
CELL_E[11].IMUX_IMUX[31]	URAM[3].DIN_B6
CELL_E[11].IMUX_IMUX[32]	URAM[3].DIN_B9
CELL_E[11].IMUX_IMUX[34]	URAM[3].DIN_B11
CELL_E[11].IMUX_IMUX[36]	URAM[3].DIN_B13
CELL_E[11].IMUX_IMUX[38]	URAM[3].DIN_B15
CELL_E[11].IMUX_IMUX[39]	URAM[3].DIN_B14
CELL_E[11].IMUX_IMUX[40]	URAM[3].ADDR_B1
CELL_E[11].IMUX_IMUX[42]	URAM[3].ADDR_B3
CELL_E[11].IMUX_IMUX[44]	URAM[3].ADDR_B5
CELL_E[11].IMUX_IMUX[46]	URAM[3].ADDR_B7
CELL_E[11].IMUX_IMUX[47]	URAM[3].ADDR_B6
CELL_E[12].OUT_BEL[0]	URAM[3].DOUT_B17
CELL_E[12].OUT_BEL[4]	URAM[3].DOUT_B18
CELL_E[12].OUT_BEL[5]	URAM[3].DOUT_B19
CELL_E[12].OUT_BEL[6]	URAM[3].RDACCESS_B
CELL_E[12].OUT_BEL[7]	URAM[3].SBITERR_B
CELL_E[12].OUT_BEL[8]	URAM[3].DOUT_B20
CELL_E[12].OUT_BEL[11]	URAM[3].DOUT_B21
CELL_E[12].OUT_BEL[12]	URAM[3].DOUT_B22
CELL_E[12].OUT_BEL[13]	URAM[3].DOUT_B23
CELL_E[12].OUT_BEL[14]	URAM[3].DOUT_B24
CELL_E[12].OUT_BEL[15]	URAM[3].DOUT_B25
CELL_E[12].OUT_BEL[16]	URAM[3].DOUT_B26
CELL_E[12].OUT_BEL[17]	URAM[3].DOUT_B27
CELL_E[12].OUT_BEL[18]	URAM[3].DOUT_B28
CELL_E[12].OUT_BEL[19]	URAM[3].DOUT_B29
CELL_E[12].OUT_BEL[20]	URAM[3].DOUT_B30
CELL_E[12].OUT_BEL[21]	URAM[3].DOUT_B31
CELL_E[12].OUT_BEL[22]	URAM[3].DOUT_B32
CELL_E[12].OUT_BEL[23]	URAM[3].DOUT_B33
CELL_E[12].OUT_BEL[24]	URAM[3].DOUT_B34
CELL_E[12].OUT_BEL[25]	URAM[3].DOUT_B35
CELL_E[12].OUT_BEL[26]	URAM[3].DOUT_B36
CELL_E[12].OUT_BEL[27]	URAM[3].DOUT_B37
CELL_E[12].OUT_BEL[28]	URAM[3].DOUT_B38
CELL_E[12].IMUX_CTRL[1]	URAM[3].OREG_CAS_CE_B
CELL_E[12].IMUX_CTRL[4]	URAM[3].OREG_ECC_CE_B
CELL_E[12].IMUX_CTRL[5]	URAM[3].OREG_CE_B
CELL_E[12].IMUX_IMUX[0]	URAM[3].ADDR_B8
CELL_E[12].IMUX_IMUX[1]	URAM[3].ADDR_B10
CELL_E[12].IMUX_IMUX[2]	URAM[3].DIN_B16
CELL_E[12].IMUX_IMUX[4]	URAM[3].DIN_B18
CELL_E[12].IMUX_IMUX[5]	URAM[3].DIN_B20
CELL_E[12].IMUX_IMUX[6]	URAM[3].DIN_B22
CELL_E[12].IMUX_IMUX[8]	URAM[3].DIN_B26
CELL_E[12].IMUX_IMUX[9]	URAM[3].DIN_B28
CELL_E[12].IMUX_IMUX[10]	URAM[3].DIN_B30
CELL_E[12].IMUX_IMUX[12]	URAM[3].DIN_B34
CELL_E[12].IMUX_IMUX[13]	URAM[3].DIN_B36
CELL_E[12].IMUX_IMUX[14]	URAM[3].DIN_B38
CELL_E[12].IMUX_IMUX[16]	URAM[3].ADDR_B9
CELL_E[12].IMUX_IMUX[18]	URAM[3].ADDR_B11
CELL_E[12].IMUX_IMUX[20]	URAM[3].DIN_B17
CELL_E[12].IMUX_IMUX[24]	URAM[3].DIN_B19
CELL_E[12].IMUX_IMUX[26]	URAM[3].DIN_B21
CELL_E[12].IMUX_IMUX[28]	URAM[3].DIN_B23
CELL_E[12].IMUX_IMUX[30]	URAM[3].DIN_B25
CELL_E[12].IMUX_IMUX[31]	URAM[3].DIN_B24
CELL_E[12].IMUX_IMUX[32]	URAM[3].DIN_B27
CELL_E[12].IMUX_IMUX[34]	URAM[3].DIN_B29
CELL_E[12].IMUX_IMUX[36]	URAM[3].DIN_B31
CELL_E[12].IMUX_IMUX[38]	URAM[3].DIN_B33
CELL_E[12].IMUX_IMUX[39]	URAM[3].DIN_B32
CELL_E[12].IMUX_IMUX[40]	URAM[3].DIN_B35
CELL_E[12].IMUX_IMUX[42]	URAM[3].DIN_B37
CELL_E[12].IMUX_IMUX[44]	URAM[3].DIN_B39
CELL_E[12].IMUX_IMUX[46]	URAM[3].INJECT_SBITERR_B
CELL_E[12].IMUX_IMUX[47]	URAM[3].INJECT_DBITERR_B
CELL_E[13].OUT_BEL[1]	URAM[3].DOUT_B39
CELL_E[13].OUT_BEL[7]	URAM[3].DOUT_B40
CELL_E[13].OUT_BEL[11]	URAM[3].DOUT_B41
CELL_E[13].OUT_BEL[13]	URAM[3].DOUT_B42
CELL_E[13].OUT_BEL[14]	URAM[3].DOUT_B43
CELL_E[13].OUT_BEL[15]	URAM[3].DOUT_B44
CELL_E[13].OUT_BEL[17]	URAM[3].DOUT_B45
CELL_E[13].OUT_BEL[18]	URAM[3].DOUT_B46
CELL_E[13].OUT_BEL[19]	URAM[3].DOUT_B47
CELL_E[13].OUT_BEL[20]	URAM[3].DOUT_B48
CELL_E[13].OUT_BEL[21]	URAM[3].DOUT_B49
CELL_E[13].OUT_BEL[22]	URAM[3].DOUT_B50
CELL_E[13].OUT_BEL[23]	URAM[3].DOUT_B51
CELL_E[13].OUT_BEL[25]	URAM[3].DOUT_B52
CELL_E[13].OUT_BEL[27]	URAM[3].DOUT_B53
CELL_E[13].OUT_BEL[30]	URAM[3].DOUT_B54
CELL_E[13].IMUX_CTRL[1]	URAM[3].RST_B
CELL_E[13].IMUX_CTRL[4]	URAM[3].RDB_WR_B
CELL_E[13].IMUX_CTRL[5]	URAM[3].EN_B
CELL_E[13].IMUX_IMUX[0]	URAM[3].ADDR_B12
CELL_E[13].IMUX_IMUX[1]	URAM[3].ADDR_B14
CELL_E[13].IMUX_IMUX[2]	URAM[3].ADDR_B16
CELL_E[13].IMUX_IMUX[4]	URAM[3].ADDR_B20
CELL_E[13].IMUX_IMUX[5]	URAM[3].ADDR_B22
CELL_E[13].IMUX_IMUX[6]	URAM[3].DIN_B41
CELL_E[13].IMUX_IMUX[8]	URAM[3].DIN_B44
CELL_E[13].IMUX_IMUX[9]	URAM[3].DIN_B46
CELL_E[13].IMUX_IMUX[10]	URAM[3].DIN_B48
CELL_E[13].IMUX_IMUX[12]	URAM[3].DIN_B52
CELL_E[13].IMUX_IMUX[13]	URAM[3].DIN_B54
CELL_E[13].IMUX_IMUX[14]	URAM[3].BWE_B0
CELL_E[13].IMUX_IMUX[16]	URAM[3].ADDR_B13
CELL_E[13].IMUX_IMUX[18]	URAM[3].ADDR_B15
CELL_E[13].IMUX_IMUX[20]	URAM[3].ADDR_B17
CELL_E[13].IMUX_IMUX[22]	URAM[3].ADDR_B19
CELL_E[13].IMUX_IMUX[23]	URAM[3].ADDR_B18
CELL_E[13].IMUX_IMUX[24]	URAM[3].ADDR_B21
CELL_E[13].IMUX_IMUX[26]	URAM[3].DIN_B40
CELL_E[13].IMUX_IMUX[28]	URAM[3].DIN_B42
CELL_E[13].IMUX_IMUX[31]	URAM[3].DIN_B43
CELL_E[13].IMUX_IMUX[32]	URAM[3].DIN_B45
CELL_E[13].IMUX_IMUX[34]	URAM[3].DIN_B47
CELL_E[13].IMUX_IMUX[36]	URAM[3].DIN_B49
CELL_E[13].IMUX_IMUX[38]	URAM[3].DIN_B51
CELL_E[13].IMUX_IMUX[39]	URAM[3].DIN_B50
CELL_E[13].IMUX_IMUX[40]	URAM[3].DIN_B53
CELL_E[13].IMUX_IMUX[42]	URAM[3].DIN_B55
CELL_E[13].IMUX_IMUX[44]	URAM[3].BWE_B1
CELL_E[13].IMUX_IMUX[46]	URAM[3].BWE_B3
CELL_E[13].IMUX_IMUX[47]	URAM[3].BWE_B2
CELL_E[14].OUT_BEL[0]	URAM[3].DOUT_B55
CELL_E[14].OUT_BEL[2]	URAM[3].DOUT_B56
CELL_E[14].OUT_BEL[4]	URAM[3].DOUT_B57
CELL_E[14].OUT_BEL[6]	URAM[3].DOUT_B58
CELL_E[14].OUT_BEL[8]	URAM[3].DOUT_B59
CELL_E[14].OUT_BEL[10]	URAM[3].DOUT_B60
CELL_E[14].OUT_BEL[11]	URAM[3].DOUT_B61
CELL_E[14].OUT_BEL[12]	URAM[3].DOUT_B62
CELL_E[14].OUT_BEL[13]	URAM[3].DOUT_B63
CELL_E[14].OUT_BEL[14]	URAM[3].DOUT_B64
CELL_E[14].OUT_BEL[15]	URAM[3].DOUT_B65
CELL_E[14].OUT_BEL[16]	URAM[3].DOUT_B66
CELL_E[14].OUT_BEL[17]	URAM[3].DOUT_B67
CELL_E[14].OUT_BEL[18]	URAM[3].DOUT_B68
CELL_E[14].OUT_BEL[19]	URAM[3].DOUT_B69
CELL_E[14].OUT_BEL[20]	URAM[3].DOUT_B70
CELL_E[14].OUT_BEL[24]	URAM[3].DOUT_B71
CELL_E[14].IMUX_IMUX[0]	URAM[3].BWE_B4
CELL_E[14].IMUX_IMUX[1]	URAM[3].BWE_B6
CELL_E[14].IMUX_IMUX[2]	URAM[3].BWE_B8
CELL_E[14].IMUX_IMUX[4]	URAM[3].DIN_B58
CELL_E[14].IMUX_IMUX[5]	URAM[3].DIN_B60
CELL_E[14].IMUX_IMUX[6]	URAM[3].DIN_B62
CELL_E[14].IMUX_IMUX[8]	URAM[3].DIN_B66
CELL_E[14].IMUX_IMUX[9]	URAM[3].DIN_B68
CELL_E[14].IMUX_IMUX[10]	URAM[3].DIN_B70
CELL_E[14].IMUX_IMUX[16]	URAM[3].BWE_B5
CELL_E[14].IMUX_IMUX[18]	URAM[3].BWE_B7
CELL_E[14].IMUX_IMUX[22]	URAM[3].DIN_B57
CELL_E[14].IMUX_IMUX[23]	URAM[3].DIN_B56
CELL_E[14].IMUX_IMUX[24]	URAM[3].DIN_B59
CELL_E[14].IMUX_IMUX[26]	URAM[3].DIN_B61
CELL_E[14].IMUX_IMUX[28]	URAM[3].DIN_B63
CELL_E[14].IMUX_IMUX[30]	URAM[3].DIN_B65
CELL_E[14].IMUX_IMUX[31]	URAM[3].DIN_B64
CELL_E[14].IMUX_IMUX[32]	URAM[3].DIN_B67
CELL_E[14].IMUX_IMUX[34]	URAM[3].DIN_B69
CELL_E[14].IMUX_IMUX[36]	URAM[3].DIN_B71

Keyboard shortcuts

Project Combine

Ultra RAM

Tile URAM

Bel URAM[0]

Bel URAM[1]

Bel URAM[2]

Bel URAM[3]

Bel wires