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GTF transceivers

Tile GTF

Cells: 60

Bel BUFG_GT0

ultrascaleplus GTF bel BUFG_GT0
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.2.DELAY
DIV0inputTCELL16:IMUX.IMUX.17.DELAY
DIV1inputTCELL16:IMUX.IMUX.21.DELAY
DIV2inputTCELL16:IMUX.IMUX.27.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.5.DELAY

Bel BUFG_GT1

ultrascaleplus GTF bel BUFG_GT1
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.11.DELAY
DIV0inputTCELL16:IMUX.IMUX.33.DELAY
DIV1inputTCELL16:IMUX.IMUX.39.DELAY
DIV2inputTCELL16:IMUX.IMUX.45.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.14.DELAY

Bel BUFG_GT2

ultrascaleplus GTF bel BUFG_GT2
PinDirectionWires
CEMASKinputTCELL16:IMUX.IMUX.34.DELAY
DIV0inputTCELL16:IMUX.IMUX.20.DELAY
DIV1inputTCELL16:IMUX.IMUX.32.DELAY
DIV2inputTCELL16:IMUX.IMUX.44.DELAY
RSTMASKinputTCELL16:IMUX.IMUX.46.DELAY

Bel BUFG_GT3

ultrascaleplus GTF bel BUFG_GT3
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.2.DELAY
DIV0inputTCELL15:IMUX.IMUX.17.DELAY
DIV1inputTCELL15:IMUX.IMUX.21.DELAY
DIV2inputTCELL15:IMUX.IMUX.27.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.5.DELAY

Bel BUFG_GT4

ultrascaleplus GTF bel BUFG_GT4
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.11.DELAY
DIV0inputTCELL15:IMUX.IMUX.33.DELAY
DIV1inputTCELL15:IMUX.IMUX.39.DELAY
DIV2inputTCELL15:IMUX.IMUX.45.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.14.DELAY

Bel BUFG_GT5

ultrascaleplus GTF bel BUFG_GT5
PinDirectionWires
CEMASKinputTCELL15:IMUX.IMUX.34.DELAY
DIV0inputTCELL15:IMUX.IMUX.20.DELAY
DIV1inputTCELL15:IMUX.IMUX.32.DELAY
DIV2inputTCELL15:IMUX.IMUX.44.DELAY
RSTMASKinputTCELL15:IMUX.IMUX.46.DELAY

Bel BUFG_GT6

ultrascaleplus GTF bel BUFG_GT6
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.2.DELAY
DIV0inputTCELL14:IMUX.IMUX.17.DELAY
DIV1inputTCELL14:IMUX.IMUX.21.DELAY
DIV2inputTCELL14:IMUX.IMUX.27.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.5.DELAY

Bel BUFG_GT7

ultrascaleplus GTF bel BUFG_GT7
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.11.DELAY
DIV0inputTCELL14:IMUX.IMUX.33.DELAY
DIV1inputTCELL14:IMUX.IMUX.39.DELAY
DIV2inputTCELL14:IMUX.IMUX.45.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.14.DELAY

Bel BUFG_GT8

ultrascaleplus GTF bel BUFG_GT8
PinDirectionWires
CEMASKinputTCELL14:IMUX.IMUX.34.DELAY
DIV0inputTCELL14:IMUX.IMUX.20.DELAY
DIV1inputTCELL14:IMUX.IMUX.32.DELAY
DIV2inputTCELL14:IMUX.IMUX.44.DELAY
RSTMASKinputTCELL14:IMUX.IMUX.46.DELAY

Bel BUFG_GT9

ultrascaleplus GTF bel BUFG_GT9
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.2.DELAY
DIV0inputTCELL13:IMUX.IMUX.17.DELAY
DIV1inputTCELL13:IMUX.IMUX.21.DELAY
DIV2inputTCELL13:IMUX.IMUX.27.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.5.DELAY

Bel BUFG_GT10

ultrascaleplus GTF bel BUFG_GT10
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.11.DELAY
DIV0inputTCELL13:IMUX.IMUX.33.DELAY
DIV1inputTCELL13:IMUX.IMUX.39.DELAY
DIV2inputTCELL13:IMUX.IMUX.45.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.14.DELAY

Bel BUFG_GT11

ultrascaleplus GTF bel BUFG_GT11
PinDirectionWires
CEMASKinputTCELL13:IMUX.IMUX.34.DELAY
DIV0inputTCELL13:IMUX.IMUX.20.DELAY
DIV1inputTCELL13:IMUX.IMUX.32.DELAY
DIV2inputTCELL13:IMUX.IMUX.44.DELAY
RSTMASKinputTCELL13:IMUX.IMUX.46.DELAY

Bel BUFG_GT12

ultrascaleplus GTF bel BUFG_GT12
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.42.DELAY
DIV0inputTCELL43:IMUX.IMUX.47.DELAY
DIV1inputTCELL43:IMUX.IMUX.45.DELAY
DIV2inputTCELL43:IMUX.IMUX.39.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.36.DELAY

Bel BUFG_GT13

ultrascaleplus GTF bel BUFG_GT13
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.24.DELAY
DIV0inputTCELL43:IMUX.IMUX.33.DELAY
DIV1inputTCELL43:IMUX.IMUX.27.DELAY
DIV2inputTCELL43:IMUX.IMUX.21.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.17.DELAY

Bel BUFG_GT14

ultrascaleplus GTF bel BUFG_GT14
PinDirectionWires
CEMASKinputTCELL43:IMUX.IMUX.3.DELAY
DIV0inputTCELL43:IMUX.IMUX.15.DELAY
DIV1inputTCELL43:IMUX.IMUX.9.DELAY
DIV2inputTCELL43:IMUX.IMUX.10.DELAY
RSTMASKinputTCELL43:IMUX.IMUX.4.DELAY

Bel BUFG_GT15

ultrascaleplus GTF bel BUFG_GT15
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.40.DELAY
DIV0inputTCELL44:IMUX.IMUX.46.DELAY
DIV1inputTCELL44:IMUX.IMUX.43.DELAY
DIV2inputTCELL44:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.36.DELAY

Bel BUFG_GT16

ultrascaleplus GTF bel BUFG_GT16
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.22.DELAY
DIV0inputTCELL44:IMUX.IMUX.34.DELAY
DIV1inputTCELL44:IMUX.IMUX.28.DELAY
DIV2inputTCELL44:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.16.DELAY

Bel BUFG_GT17

ultrascaleplus GTF bel BUFG_GT17
PinDirectionWires
CEMASKinputTCELL44:IMUX.IMUX.6.DELAY
DIV0inputTCELL44:IMUX.IMUX.13.DELAY
DIV1inputTCELL44:IMUX.IMUX.10.DELAY
DIV2inputTCELL44:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL44:IMUX.IMUX.0.DELAY

Bel BUFG_GT18

ultrascaleplus GTF bel BUFG_GT18
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.42.DELAY
DIV0inputTCELL45:IMUX.IMUX.47.DELAY
DIV1inputTCELL45:IMUX.IMUX.43.DELAY
DIV2inputTCELL45:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.36.DELAY

Bel BUFG_GT19

ultrascaleplus GTF bel BUFG_GT19
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.24.DELAY
DIV0inputTCELL45:IMUX.IMUX.31.DELAY
DIV1inputTCELL45:IMUX.IMUX.25.DELAY
DIV2inputTCELL45:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.18.DELAY

Bel BUFG_GT20

ultrascaleplus GTF bel BUFG_GT20
PinDirectionWires
CEMASKinputTCELL45:IMUX.IMUX.6.DELAY
DIV0inputTCELL45:IMUX.IMUX.13.DELAY
DIV1inputTCELL45:IMUX.IMUX.7.DELAY
DIV2inputTCELL45:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL45:IMUX.IMUX.0.DELAY

Bel BUFG_GT21

ultrascaleplus GTF bel BUFG_GT21
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.42.DELAY
DIV0inputTCELL46:IMUX.IMUX.47.DELAY
DIV1inputTCELL46:IMUX.IMUX.43.DELAY
DIV2inputTCELL46:IMUX.IMUX.37.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.36.DELAY

Bel BUFG_GT22

ultrascaleplus GTF bel BUFG_GT22
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.24.DELAY
DIV0inputTCELL46:IMUX.IMUX.31.DELAY
DIV1inputTCELL46:IMUX.IMUX.25.DELAY
DIV2inputTCELL46:IMUX.IMUX.19.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.18.DELAY

Bel BUFG_GT23

ultrascaleplus GTF bel BUFG_GT23
PinDirectionWires
CEMASKinputTCELL46:IMUX.IMUX.6.DELAY
DIV0inputTCELL46:IMUX.IMUX.13.DELAY
DIV1inputTCELL46:IMUX.IMUX.7.DELAY
DIV2inputTCELL46:IMUX.IMUX.1.DELAY
RSTMASKinputTCELL46:IMUX.IMUX.0.DELAY

Bel BUFG_GT_SYNC0

ultrascaleplus GTF bel BUFG_GT_SYNC0
PinDirectionWires
CE_INinputTCELL15:IMUX.IMUX.36.DELAY
RST_INinputTCELL13:IMUX.IMUX.16.DELAY

Bel BUFG_GT_SYNC1

ultrascaleplus GTF bel BUFG_GT_SYNC1
PinDirectionWires
CE_INinputTCELL15:IMUX.IMUX.40.DELAY
RST_INinputTCELL13:IMUX.IMUX.18.DELAY

Bel BUFG_GT_SYNC2

ultrascaleplus GTF bel BUFG_GT_SYNC2
PinDirectionWires
CE_INinputTCELL13:IMUX.IMUX.36.DELAY
RST_INinputTCELL13:IMUX.IMUX.22.DELAY

Bel BUFG_GT_SYNC3

ultrascaleplus GTF bel BUFG_GT_SYNC3
PinDirectionWires
CE_INinputTCELL13:IMUX.IMUX.38.DELAY
RST_INinputTCELL13:IMUX.IMUX.24.DELAY

Bel BUFG_GT_SYNC4

ultrascaleplus GTF bel BUFG_GT_SYNC4
PinDirectionWires
CE_INinputTCELL13:IMUX.IMUX.40.DELAY
RST_INinputTCELL13:IMUX.IMUX.26.DELAY

Bel BUFG_GT_SYNC5

ultrascaleplus GTF bel BUFG_GT_SYNC5
PinDirectionWires
CE_INinputTCELL44:IMUX.IMUX.4.DELAY
RST_INinputTCELL46:IMUX.IMUX.15.DELAY

Bel BUFG_GT_SYNC6

ultrascaleplus GTF bel BUFG_GT_SYNC6
PinDirectionWires
CE_INinputTCELL44:IMUX.IMUX.3.DELAY
RST_INinputTCELL46:IMUX.IMUX.14.DELAY

Bel BUFG_GT_SYNC7

ultrascaleplus GTF bel BUFG_GT_SYNC7
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.5.DELAY
RST_INinputTCELL46:IMUX.IMUX.12.DELAY

Bel BUFG_GT_SYNC8

ultrascaleplus GTF bel BUFG_GT_SYNC8
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.4.DELAY
RST_INinputTCELL46:IMUX.IMUX.11.DELAY

Bel BUFG_GT_SYNC9

ultrascaleplus GTF bel BUFG_GT_SYNC9
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.3.DELAY
RST_INinputTCELL46:IMUX.IMUX.10.DELAY

Bel BUFG_GT_SYNC10

ultrascaleplus GTF bel BUFG_GT_SYNC10
PinDirectionWires
CE_INinputTCELL45:IMUX.IMUX.5.DELAY
RST_INinputTCELL46:IMUX.IMUX.9.DELAY

Bel BUFG_GT_SYNC11

ultrascaleplus GTF bel BUFG_GT_SYNC11
PinDirectionWires
CE_INinputTCELL15:IMUX.IMUX.35.DELAY
RST_INinputTCELL13:IMUX.IMUX.6.DELAY

Bel BUFG_GT_SYNC12

ultrascaleplus GTF bel BUFG_GT_SYNC12
PinDirectionWires
CE_INinputTCELL13:IMUX.IMUX.3.DELAY
RST_INinputTCELL13:IMUX.IMUX.28.DELAY

Bel BUFG_GT_SYNC13

ultrascaleplus GTF bel BUFG_GT_SYNC13
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.17.DELAY
RST_INinputTCELL46:IMUX.IMUX.23.DELAY

Bel BUFG_GT_SYNC14

ultrascaleplus GTF bel BUFG_GT_SYNC14
PinDirectionWires
CE_INinputTCELL46:IMUX.IMUX.29.DELAY
CLK_INinputTCELL30:RCLK.IMUX.17
RST_INinputTCELL46:IMUX.IMUX.35.DELAY

Bel ABUS_SWITCH_GT0

ultrascaleplus GTF bel ABUS_SWITCH_GT0
PinDirectionWires
TEST_ANALOGBUS_SEL_BinputTCELL13:IMUX.IMUX.30.DELAY

Bel ABUS_SWITCH_GT1

ultrascaleplus GTF bel ABUS_SWITCH_GT1
PinDirectionWires
TEST_ANALOGBUS_SEL_BinputTCELL13:IMUX.IMUX.30.DELAY

Bel ABUS_SWITCH_GT2

ultrascaleplus GTF bel ABUS_SWITCH_GT2
PinDirectionWires
TEST_ANALOGBUS_SEL_BinputTCELL13:IMUX.IMUX.30.DELAY

Bel ABUS_SWITCH_GT3

ultrascaleplus GTF bel ABUS_SWITCH_GT3
PinDirectionWires
TEST_ANALOGBUS_SEL_BinputTCELL13:IMUX.IMUX.30.DELAY

Bel ABUS_SWITCH_GT4

ultrascaleplus GTF bel ABUS_SWITCH_GT4
PinDirectionWires
TEST_ANALOGBUS_SEL_BinputTCELL46:IMUX.IMUX.8.DELAY

Bel GTF_COMMON

ultrascaleplus GTF bel GTF_COMMON
PinDirectionWires
BGBYPASS_FS_1inputTCELL44:IMUX.IMUX.7.DELAY
BGRCALCTL_FS_1_0inputTCELL43:IMUX.IMUX.43.DELAY
BGRCALCTL_FS_1_1inputTCELL43:IMUX.IMUX.37.DELAY
BGRCALCTL_FS_1_2inputTCELL43:IMUX.IMUX.31.DELAY
BGRCALCTL_FS_1_3inputTCELL43:IMUX.IMUX.25.DELAY
BGRCALCTL_FS_1_4inputTCELL43:IMUX.IMUX.19.DELAY
BGRCALOVRDENB_FS_1inputTCELL43:IMUX.IMUX.13.DELAY
BGTESTEN_FS_1inputTCELL43:IMUX.IMUX.7.DELAY
DADDR_FS0inputTCELL16:IMUX.IMUX.19.DELAY
DADDR_FS1inputTCELL16:IMUX.IMUX.25.DELAY
DADDR_FS10inputTCELL15:IMUX.IMUX.43.DELAY
DADDR_FS11inputTCELL15:IMUX.IMUX.37.DELAY
DADDR_FS12inputTCELL13:IMUX.IMUX.15.DELAY
DADDR_FS13inputTCELL13:IMUX.IMUX.47.DELAY
DADDR_FS14inputTCELL13:IMUX.IMUX.12.DELAY
DADDR_FS15inputTCELL13:IMUX.IMUX.41.DELAY
DADDR_FS2inputTCELL16:IMUX.IMUX.31.DELAY
DADDR_FS3inputTCELL16:IMUX.IMUX.37.DELAY
DADDR_FS4inputTCELL16:IMUX.IMUX.43.DELAY
DADDR_FS5inputTCELL16:IMUX.IMUX.16.DELAY
DADDR_FS6inputTCELL16:IMUX.IMUX.28.DELAY
DADDR_FS7inputTCELL16:IMUX.IMUX.40.DELAY
DADDR_FS8inputTCELL15:IMUX.IMUX.23.DELAY
DADDR_FS9inputTCELL13:IMUX.IMUX.29.DELAY
DCLK_FSinputTCELL14:IMUX.CTRL.2
DEN_FSinputTCELL16:IMUX.IMUX.47.DELAY
DI_FS0inputTCELL16:IMUX.IMUX.0.DELAY
DI_FS1inputTCELL16:IMUX.IMUX.3.DELAY
DI_FS10inputTCELL15:IMUX.IMUX.6.DELAY
DI_FS11inputTCELL15:IMUX.IMUX.9.DELAY
DI_FS12inputTCELL15:IMUX.IMUX.12.DELAY
DI_FS13inputTCELL15:IMUX.IMUX.15.DELAY
DI_FS14inputTCELL15:IMUX.IMUX.26.DELAY
DI_FS15inputTCELL15:IMUX.IMUX.38.DELAY
DI_FS2inputTCELL13:IMUX.IMUX.8.DELAY
DI_FS3inputTCELL16:IMUX.IMUX.9.DELAY
DI_FS4inputTCELL16:IMUX.IMUX.12.DELAY
DI_FS5inputTCELL16:IMUX.IMUX.15.DELAY
DI_FS6inputTCELL16:IMUX.IMUX.26.DELAY
DI_FS7inputTCELL16:IMUX.IMUX.38.DELAY
DI_FS8inputTCELL13:IMUX.IMUX.0.DELAY
DI_FS9inputTCELL15:IMUX.IMUX.3.DELAY
DMONOUT_QDCM_SF_0_0outputTCELL16:OUT.5.TMIN
DMONOUT_QDCM_SF_0_1outputTCELL15:OUT.5.TMIN
DMONOUT_QDCM_SF_0_2outputTCELL14:OUT.5.TMIN
DMONOUT_QDCM_SF_0_3outputTCELL13:OUT.5.TMIN
DMONOUT_QDCM_SF_0_4outputTCELL16:OUT.13.TMIN
DMONOUT_QDCM_SF_0_5outputTCELL15:OUT.13.TMIN
DMONOUT_QDCM_SF_0_6outputTCELL14:OUT.13.TMIN
DMONOUT_QDCM_SF_0_7outputTCELL13:OUT.13.TMIN
DMONOUT_QDCM_SF_1_0outputTCELL43:OUT.26.TMIN
DMONOUT_QDCM_SF_1_1outputTCELL44:OUT.26.TMIN
DMONOUT_QDCM_SF_1_2outputTCELL45:OUT.26.TMIN
DMONOUT_QDCM_SF_1_3outputTCELL46:OUT.26.TMIN
DMONOUT_QDCM_SF_1_4outputTCELL43:OUT.18.TMIN
DMONOUT_QDCM_SF_1_5outputTCELL44:OUT.18.TMIN
DMONOUT_QDCM_SF_1_6outputTCELL45:OUT.18.TMIN
DMONOUT_QDCM_SF_1_7outputTCELL46:OUT.18.TMIN
DRDY_SFoutputTCELL13:OUT.27.TMIN
DRPDO_SF0outputTCELL16:OUT.2.TMIN
DRPDO_SF1outputTCELL15:OUT.2.TMIN
DRPDO_SF10outputTCELL14:OUT.18.TMIN
DRPDO_SF11outputTCELL13:OUT.18.TMIN
DRPDO_SF12outputTCELL16:OUT.26.TMIN
DRPDO_SF13outputTCELL15:OUT.26.TMIN
DRPDO_SF14outputTCELL14:OUT.26.TMIN
DRPDO_SF15outputTCELL13:OUT.26.TMIN
DRPDO_SF2outputTCELL14:OUT.2.TMIN
DRPDO_SF3outputTCELL13:OUT.2.TMIN
DRPDO_SF4outputTCELL16:OUT.10.TMIN
DRPDO_SF5outputTCELL15:OUT.10.TMIN
DRPDO_SF6outputTCELL14:OUT.10.TMIN
DRPDO_SF7outputTCELL13:OUT.10.TMIN
DRPDO_SF8outputTCELL16:OUT.18.TMIN
DRPDO_SF9outputTCELL15:OUT.18.TMIN
DWE_FSinputTCELL14:IMUX.IMUX.36.DELAY
HROW_TEST_CK_FS_0inputTCELL16:IMUX.CTRL.2
HROW_TEST_CK_FS_1inputTCELL43:IMUX.CTRL.5
MGTREFCLKFA_SF_0outputTCELL14:OUT.9.TMIN
MGTREFCLKFA_SF_1outputTCELL45:OUT.22.TMIN
PWRDNBGB_FS_1inputTCELL44:IMUX.IMUX.5.DELAY
QDCLKPINSPRD0_FS_0inputTCELL13:IMUX.CTRL.2
QDCLKPINSPRD0_FS_1inputTCELL46:IMUX.CTRL.5
QDCLKPINSPRD1_FS_0inputTCELL13:IMUX.CTRL.3
QDCLKPINSPRD1_FS_1inputTCELL46:IMUX.CTRL.4
QDCMRSVDOUT_SF_0_0outputTCELL16:OUT.6.TMIN
QDCMRSVDOUT_SF_0_1outputTCELL15:OUT.6.TMIN
QDCMRSVDOUT_SF_0_2outputTCELL14:OUT.6.TMIN
QDCMRSVDOUT_SF_0_3outputTCELL13:OUT.6.TMIN
QDCMRSVDOUT_SF_0_4outputTCELL16:OUT.14.TMIN
QDCMRSVDOUT_SF_0_5outputTCELL15:OUT.14.TMIN
QDCMRSVDOUT_SF_0_6outputTCELL14:OUT.14.TMIN
QDCMRSVDOUT_SF_0_7outputTCELL13:OUT.14.TMIN
QDCMRSVDOUT_SF_1_0outputTCELL43:OUT.25.TMIN
QDCMRSVDOUT_SF_1_1outputTCELL44:OUT.25.TMIN
QDCMRSVDOUT_SF_1_2outputTCELL45:OUT.25.TMIN
QDCMRSVDOUT_SF_1_3outputTCELL46:OUT.25.TMIN
QDCMRSVDOUT_SF_1_4outputTCELL43:OUT.17.TMIN
QDCMRSVDOUT_SF_1_5outputTCELL44:OUT.17.TMIN
QDCMRSVDOUT_SF_1_6outputTCELL45:OUT.17.TMIN
QDCMRSVDOUT_SF_1_7outputTCELL46:OUT.17.TMIN
QDCMRSVDPIN_FS_0_0inputTCELL14:IMUX.IMUX.0.DELAY
QDCMRSVDPIN_FS_0_1inputTCELL14:IMUX.IMUX.3.DELAY
QDCMRSVDPIN_FS_0_2inputTCELL14:IMUX.IMUX.6.DELAY
QDCMRSVDPIN_FS_0_3inputTCELL14:IMUX.IMUX.9.DELAY
QDCMRSVDPIN_FS_0_4inputTCELL14:IMUX.IMUX.12.DELAY
QDCMRSVDPIN_FS_0_5inputTCELL14:IMUX.IMUX.15.DELAY
QDCMRSVDPIN_FS_0_6inputTCELL14:IMUX.IMUX.26.DELAY
QDCMRSVDPIN_FS_0_7inputTCELL14:IMUX.IMUX.38.DELAY
QDCMRSVDPIN_FS_1_0inputTCELL45:IMUX.IMUX.46.DELAY
QDCMRSVDPIN_FS_1_1inputTCELL45:IMUX.IMUX.40.DELAY
QDCMRSVDPIN_FS_1_2inputTCELL45:IMUX.IMUX.34.DELAY
QDCMRSVDPIN_FS_1_3inputTCELL45:IMUX.IMUX.28.DELAY
QDCMRSVDPIN_FS_1_4inputTCELL45:IMUX.IMUX.22.DELAY
QDCMRSVDPIN_FS_1_5inputTCELL45:IMUX.IMUX.16.DELAY
QDCMRSVDPIN_FS_1_6inputTCELL45:IMUX.IMUX.10.DELAY
QDCMRSVDPIN_FS_1_7inputTCELL45:IMUX.IMUX.4.DELAY
QDCOREREFCLK_FS_0inputTCELL16:IMUX.CTRL.6
QDCOREREFCLK_FS_1inputTCELL43:IMUX.CTRL.1
QDPINSPRD_FS_0_0inputTCELL13:IMUX.IMUX.19.DELAY
QDPINSPRD_FS_0_1inputTCELL13:IMUX.IMUX.25.DELAY
QDPINSPRD_FS_0_2inputTCELL13:IMUX.IMUX.31.DELAY
QDPINSPRD_FS_0_3inputTCELL13:IMUX.IMUX.37.DELAY
QDPINSPRD_FS_0_4inputTCELL13:IMUX.IMUX.43.DELAY
QDPINSPRD_FS_1_0inputTCELL46:IMUX.IMUX.45.DELAY
QDPINSPRD_FS_1_1inputTCELL46:IMUX.IMUX.39.DELAY
QDPINSPRD_FS_1_2inputTCELL46:IMUX.IMUX.33.DELAY
QDPINSPRD_FS_1_3inputTCELL46:IMUX.IMUX.27.DELAY
QDPINSPRD_FS_1_4inputTCELL46:IMUX.IMUX.21.DELAY
QDPMAPINRSVD_FS_0_0inputTCELL14:IMUX.IMUX.19.DELAY
QDPMAPINRSVD_FS_0_1inputTCELL14:IMUX.IMUX.25.DELAY
QDPMAPINRSVD_FS_0_2inputTCELL14:IMUX.IMUX.31.DELAY
QDPMAPINRSVD_FS_0_3inputTCELL14:IMUX.IMUX.37.DELAY
QDPMAPINRSVD_FS_0_4inputTCELL14:IMUX.IMUX.43.DELAY
QDPMAPINRSVD_FS_0_5inputTCELL14:IMUX.IMUX.16.DELAY
QDPMAPINRSVD_FS_0_6inputTCELL14:IMUX.IMUX.28.DELAY
QDPMAPINRSVD_FS_0_7inputTCELL14:IMUX.IMUX.40.DELAY
QDPMAPINRSVD_FS_1_0inputTCELL45:IMUX.IMUX.45.DELAY
QDPMAPINRSVD_FS_1_1inputTCELL45:IMUX.IMUX.39.DELAY
QDPMAPINRSVD_FS_1_2inputTCELL45:IMUX.IMUX.33.DELAY
QDPMAPINRSVD_FS_1_3inputTCELL45:IMUX.IMUX.27.DELAY
QDPMAPINRSVD_FS_1_4inputTCELL45:IMUX.IMUX.21.DELAY
QDPMAPINRSVD_FS_1_5inputTCELL45:IMUX.IMUX.15.DELAY
QDPMAPINRSVD_FS_1_6inputTCELL45:IMUX.IMUX.9.DELAY
QDPMAPINRSVD_FS_1_7inputTCELL45:IMUX.IMUX.3.DELAY
QDPMASCANCLK_FS0inputTCELL16:IMUX.CTRL.4
QDPMASCANCLK_FS1inputTCELL15:IMUX.CTRL.4
QDPMASCANCLK_FS10inputTCELL13:IMUX.CTRL.5
QDPMASCANCLK_FS11inputTCELL15:IMUX.CTRL.5
QDPMASCANCLK_FS12inputTCELL43:IMUX.CTRL.4
QDPMASCANCLK_FS13inputTCELL45:IMUX.CTRL.5
QDPMASCANCLK_FS2inputTCELL14:IMUX.CTRL.4
QDPMASCANCLK_FS3inputTCELL13:IMUX.CTRL.4
QDPMASCANCLK_FS4inputTCELL14:IMUX.CTRL.1
QDPMASCANCLK_FS5inputTCELL43:IMUX.CTRL.3
QDPMASCANCLK_FS6inputTCELL44:IMUX.CTRL.3
QDPMASCANCLK_FS7inputTCELL45:IMUX.CTRL.3
QDPMASCANCLK_FS8inputTCELL46:IMUX.CTRL.3
QDPMASCANCLK_FS9inputTCELL45:IMUX.CTRL.6
QDPMASCANENB_FSinputTCELL44:IMUX.IMUX.18.DELAY
QDPMASCANIN_FS0inputTCELL13:IMUX.IMUX.4.DELAY
QDPMASCANIN_FS1inputTCELL13:IMUX.IMUX.7.DELAY
QDPMASCANIN_FS10inputTCELL43:IMUX.IMUX.23.DELAY
QDPMASCANIN_FS11inputTCELL43:IMUX.IMUX.46.DELAY
QDPMASCANIN_FS12inputTCELL44:IMUX.IMUX.27.DELAY
QDPMASCANIN_FS13inputTCELL44:IMUX.IMUX.41.DELAY
QDPMASCANIN_FS2inputTCELL13:IMUX.IMUX.10.DELAY
QDPMASCANIN_FS3inputTCELL13:IMUX.IMUX.13.DELAY
QDPMASCANIN_FS4inputTCELL15:IMUX.IMUX.28.DELAY
QDPMASCANIN_FS5inputTCELL46:IMUX.IMUX.38.DELAY
QDPMASCANIN_FS6inputTCELL46:IMUX.IMUX.32.DELAY
QDPMASCANIN_FS7inputTCELL46:IMUX.IMUX.26.DELAY
QDPMASCANIN_FS8inputTCELL46:IMUX.IMUX.20.DELAY
QDPMASCANIN_FS9inputTCELL44:IMUX.IMUX.9.DELAY
QDPMASCANMODEB_FSinputTCELL44:IMUX.IMUX.31.DELAY
QDPMASCANOUT_SF0outputTCELL16:OUT.19.TMIN
QDPMASCANOUT_SF1outputTCELL15:OUT.19.TMIN
QDPMASCANOUT_SF10outputTCELL43:OUT.13.TMIN
QDPMASCANOUT_SF11outputTCELL44:OUT.13.TMIN
QDPMASCANOUT_SF12outputTCELL45:OUT.13.TMIN
QDPMASCANOUT_SF13outputTCELL46:OUT.13.TMIN
QDPMASCANOUT_SF2outputTCELL14:OUT.19.TMIN
QDPMASCANOUT_SF3outputTCELL13:OUT.19.TMIN
QDPMASCANOUT_SF4outputTCELL15:OUT.0.TMIN
QDPMASCANOUT_SF5outputTCELL43:OUT.12.TMIN
QDPMASCANOUT_SF6outputTCELL44:OUT.12.TMIN
QDPMASCANOUT_SF7outputTCELL45:OUT.12.TMIN
QDPMASCANOUT_SF8outputTCELL46:OUT.12.TMIN
QDPMASCANOUT_SF9outputTCELL44:OUT.31.TMIN
QDPMASCANRSTEN_FSinputTCELL44:IMUX.IMUX.24.DELAY
QPLFBDIV_FS_0_0inputTCELL16:IMUX.IMUX.8.DELAY
QPLFBDIV_FS_0_1inputTCELL15:IMUX.IMUX.8.DELAY
QPLFBDIV_FS_0_2inputTCELL16:IMUX.IMUX.24.DELAY
QPLFBDIV_FS_0_3inputTCELL16:IMUX.IMUX.6.DELAY
QPLFBDIV_FS_0_4inputTCELL16:IMUX.IMUX.36.DELAY
QPLFBDIV_FS_0_5inputTCELL15:IMUX.IMUX.41.DELAY
QPLFBDIV_FS_0_6inputTCELL15:IMUX.IMUX.29.DELAY
QPLFBDIV_FS_0_7inputTCELL15:IMUX.IMUX.0.DELAY
QPLFBDIV_FS_1_0inputTCELL43:IMUX.IMUX.30.DELAY
QPLFBDIV_FS_1_1inputTCELL44:IMUX.IMUX.30.DELAY
QPLFBDIV_FS_1_2inputTCELL43:IMUX.IMUX.11.DELAY
QPLFBDIV_FS_1_3inputTCELL43:IMUX.IMUX.34.DELAY
QPLFBDIV_FS_1_4inputTCELL43:IMUX.IMUX.5.DELAY
QPLFBDIV_FS_1_5inputTCELL44:IMUX.IMUX.23.DELAY
QPLFBDIV_FS_1_6inputTCELL44:IMUX.IMUX.35.DELAY
QPLFBDIV_FS_1_7inputTCELL44:IMUX.IMUX.47.DELAY
QPLFBLOSS_SF_0outputTCELL13:OUT.9.TMIN
QPLFBLOSS_SF_1outputTCELL46:OUT.22.TMIN
QPLFREQLOCK_SF_0outputTCELL13:OUT.28.TMIN
QPLFREQLOCK_SF_1outputTCELL46:OUT.3.TMIN
QPLLDMONCLK_FS_0inputTCELL14:IMUX.CTRL.3
QPLLDMONCLK_FS_1inputTCELL45:IMUX.CTRL.4
QPLLKDETEN_FS_0inputTCELL14:IMUX.IMUX.35.DELAY
QPLLKDETEN_FS_1inputTCELL45:IMUX.IMUX.29.DELAY
QPLPWRDN_FS_0inputTCELL15:IMUX.IMUX.24.DELAY
QPLPWRDN_FS_1inputTCELL44:IMUX.IMUX.11.DELAY
QPLREFDYN_FS_0_0inputTCELL15:IMUX.IMUX.19.DELAY
QPLREFDYN_FS_0_1inputTCELL15:IMUX.IMUX.25.DELAY
QPLREFDYN_FS_0_2inputTCELL15:IMUX.IMUX.31.DELAY
QPLREFDYN_FS_1_0inputTCELL44:IMUX.IMUX.45.DELAY
QPLREFDYN_FS_1_1inputTCELL44:IMUX.IMUX.39.DELAY
QPLREFDYN_FS_1_2inputTCELL44:IMUX.IMUX.33.DELAY
QPLREFLOSS_SF_0outputTCELL15:OUT.9.TMIN
QPLREFLOSS_SF_1outputTCELL44:OUT.22.TMIN
QPLRESET_FS_0inputTCELL15:IMUX.CTRL.7
QPLRESET_FS_1inputTCELL44:IMUX.CTRL.0
RCALENB_FS_1inputTCELL43:IMUX.IMUX.6.DELAY
REFCLKPD_FS_0inputTCELL13:IMUX.IMUX.42.DELAY
REFCLKPD_FS_1inputTCELL46:IMUX.IMUX.2.DELAY
SDMDATA_FS_0_0inputTCELL16:IMUX.IMUX.1.DELAY
SDMDATA_FS_0_1inputTCELL16:IMUX.IMUX.4.DELAY
SDMDATA_FS_0_10inputTCELL15:IMUX.IMUX.7.DELAY
SDMDATA_FS_0_11inputTCELL15:IMUX.IMUX.10.DELAY
SDMDATA_FS_0_12inputTCELL15:IMUX.IMUX.13.DELAY
SDMDATA_FS_0_13inputTCELL15:IMUX.IMUX.18.DELAY
SDMDATA_FS_0_14inputTCELL15:IMUX.IMUX.30.DELAY
SDMDATA_FS_0_15inputTCELL15:IMUX.IMUX.42.DELAY
SDMDATA_FS_0_16inputTCELL14:IMUX.IMUX.1.DELAY
SDMDATA_FS_0_17inputTCELL14:IMUX.IMUX.4.DELAY
SDMDATA_FS_0_18inputTCELL14:IMUX.IMUX.7.DELAY
SDMDATA_FS_0_19inputTCELL14:IMUX.IMUX.10.DELAY
SDMDATA_FS_0_2inputTCELL16:IMUX.IMUX.7.DELAY
SDMDATA_FS_0_20inputTCELL14:IMUX.IMUX.13.DELAY
SDMDATA_FS_0_21inputTCELL14:IMUX.IMUX.18.DELAY
SDMDATA_FS_0_22inputTCELL14:IMUX.IMUX.30.DELAY
SDMDATA_FS_0_23inputTCELL14:IMUX.IMUX.42.DELAY
SDMDATA_FS_0_24inputTCELL13:IMUX.IMUX.1.DELAY
SDMDATA_FS_0_3inputTCELL16:IMUX.IMUX.10.DELAY
SDMDATA_FS_0_4inputTCELL16:IMUX.IMUX.13.DELAY
SDMDATA_FS_0_5inputTCELL16:IMUX.IMUX.18.DELAY
SDMDATA_FS_0_6inputTCELL16:IMUX.IMUX.30.DELAY
SDMDATA_FS_0_7inputTCELL16:IMUX.IMUX.42.DELAY
SDMDATA_FS_0_8inputTCELL15:IMUX.IMUX.1.DELAY
SDMDATA_FS_0_9inputTCELL15:IMUX.IMUX.4.DELAY
SDMDATA_FS_1_0inputTCELL43:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_1inputTCELL43:IMUX.IMUX.38.DELAY
SDMDATA_FS_1_10inputTCELL44:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_11inputTCELL44:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_12inputTCELL44:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_13inputTCELL44:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_14inputTCELL44:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_15inputTCELL44:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_16inputTCELL45:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_17inputTCELL45:IMUX.IMUX.38.DELAY
SDMDATA_FS_1_18inputTCELL45:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_19inputTCELL45:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_2inputTCELL43:IMUX.IMUX.32.DELAY
SDMDATA_FS_1_20inputTCELL45:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_21inputTCELL45:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_22inputTCELL45:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_23inputTCELL45:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_24inputTCELL46:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_3inputTCELL43:IMUX.IMUX.26.DELAY
SDMDATA_FS_1_4inputTCELL43:IMUX.IMUX.20.DELAY
SDMDATA_FS_1_5inputTCELL43:IMUX.IMUX.14.DELAY
SDMDATA_FS_1_6inputTCELL43:IMUX.IMUX.8.DELAY
SDMDATA_FS_1_7inputTCELL43:IMUX.IMUX.2.DELAY
SDMDATA_FS_1_8inputTCELL44:IMUX.IMUX.44.DELAY
SDMDATA_FS_1_9inputTCELL44:IMUX.IMUX.38.DELAY
SDMFINALOUT_SF_0_0outputTCELL16:OUT.1.TMIN
SDMFINALOUT_SF_0_1outputTCELL15:OUT.1.TMIN
SDMFINALOUT_SF_0_2outputTCELL14:OUT.1.TMIN
SDMFINALOUT_SF_0_3outputTCELL13:OUT.1.TMIN
SDMFINALOUT_SF_1_0outputTCELL43:OUT.30.TMIN
SDMFINALOUT_SF_1_1outputTCELL44:OUT.30.TMIN
SDMFINALOUT_SF_1_2outputTCELL45:OUT.30.TMIN
SDMFINALOUT_SF_1_3outputTCELL46:OUT.30.TMIN
SDMRESET_FS_0inputTCELL14:IMUX.CTRL.7
SDMRESET_FS_1inputTCELL45:IMUX.CTRL.0
SDMTESTDATA_SF_0_0outputTCELL16:OUT.4.TMIN
SDMTESTDATA_SF_0_1outputTCELL15:OUT.4.TMIN
SDMTESTDATA_SF_0_10outputTCELL14:OUT.20.TMIN
SDMTESTDATA_SF_0_11outputTCELL13:OUT.20.TMIN
SDMTESTDATA_SF_0_12outputTCELL16:OUT.28.TMIN
SDMTESTDATA_SF_0_13outputTCELL15:OUT.28.TMIN
SDMTESTDATA_SF_0_14outputTCELL14:OUT.28.TMIN
SDMTESTDATA_SF_0_2outputTCELL14:OUT.4.TMIN
SDMTESTDATA_SF_0_3outputTCELL13:OUT.4.TMIN
SDMTESTDATA_SF_0_4outputTCELL16:OUT.12.TMIN
SDMTESTDATA_SF_0_5outputTCELL15:OUT.12.TMIN
SDMTESTDATA_SF_0_6outputTCELL14:OUT.12.TMIN
SDMTESTDATA_SF_0_7outputTCELL13:OUT.12.TMIN
SDMTESTDATA_SF_0_8outputTCELL16:OUT.20.TMIN
SDMTESTDATA_SF_0_9outputTCELL15:OUT.20.TMIN
SDMTESTDATA_SF_1_0outputTCELL43:OUT.27.TMIN
SDMTESTDATA_SF_1_1outputTCELL44:OUT.27.TMIN
SDMTESTDATA_SF_1_10outputTCELL45:OUT.11.TMIN
SDMTESTDATA_SF_1_11outputTCELL46:OUT.11.TMIN
SDMTESTDATA_SF_1_12outputTCELL43:OUT.3.TMIN
SDMTESTDATA_SF_1_13outputTCELL44:OUT.3.TMIN
SDMTESTDATA_SF_1_14outputTCELL45:OUT.3.TMIN
SDMTESTDATA_SF_1_2outputTCELL45:OUT.27.TMIN
SDMTESTDATA_SF_1_3outputTCELL46:OUT.27.TMIN
SDMTESTDATA_SF_1_4outputTCELL43:OUT.19.TMIN
SDMTESTDATA_SF_1_5outputTCELL44:OUT.19.TMIN
SDMTESTDATA_SF_1_6outputTCELL45:OUT.19.TMIN
SDMTESTDATA_SF_1_7outputTCELL46:OUT.19.TMIN
SDMTESTDATA_SF_1_8outputTCELL43:OUT.11.TMIN
SDMTESTDATA_SF_1_9outputTCELL44:OUT.11.TMIN
SDMTOGGLE_FS_0inputTCELL16:IMUX.IMUX.29.DELAY
SDMTOGGLE_FS_1inputTCELL43:IMUX.IMUX.35.DELAY
SDMWIDTH_FS_0_0inputTCELL15:IMUX.IMUX.16.DELAY
SDMWIDTH_FS_0_1inputTCELL15:IMUX.IMUX.47.DELAY
SDMWIDTH_FS_1_0inputTCELL44:IMUX.IMUX.15.DELAY
SDMWIDTH_FS_1_1inputTCELL44:IMUX.IMUX.17.DELAY

Bel GTF_CHANNEL0

ultrascaleplus GTF bel GTF_CHANNEL0
PinDirectionWires
AFECFOKEN_FSinputTCELL10:IMUX.IMUX.17.DELAY
BSR_SERIAL_FSinputTCELL6:IMUX.IMUX.4.DELAY
CDRFRRESET_FSinputTCELL8:IMUX.CTRL.0
CDRHOLD_FSinputTCELL8:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL6:OUT.6.TMIN
CDROVREN_FSinputTCELL9:IMUX.IMUX.31.DELAY
CDRPHRESET_FSinputTCELL11:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL12:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL12:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL12:IMUX.IMUX.15.DELAY
CFGRESET_FSinputTCELL2:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL3:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL3:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL4:OUT.0.TMIN
CFOKRESET_FSinputTCELL10:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL4:OUT.6.TMIN
CKOKDONE_SFoutputTCELL3:OUT.17.TMIN
CKOKRESET_FSinputTCELL10:IMUX.IMUX.2.DELAY
CKPINRSRVD0_FSinputTCELL12:IMUX.CTRL.5
CKPINRSRVD1_FSinputTCELL12:IMUX.CTRL.4
COREREFCLK_FSinputTCELL1:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL5:OUT.1.TMIN
CPLFREQLOCK_SFoutputTCELL1:OUT.10.TMIN
CPLLDMONCLK_FSinputTCELL3:IMUX.CTRL.5
CPLLFREQLOCK_FSinputTCELL6:IMUX.IMUX.6.DELAY
CPLLKDETEN_FSinputTCELL3:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL2:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL3:OUT.5.TMIN
CPLREFSELDYN_FS0inputTCELL3:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL3:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL3:IMUX.IMUX.3.DELAY
CPLRESET_FSinputTCELL3:IMUX.CTRL.0
CTL_RX_PAUSE_ACK_FS0inputTCELL9:IMUX.IMUX.33.DELAY
CTL_RX_PAUSE_ACK_FS1inputTCELL9:IMUX.IMUX.35.DELAY
CTL_RX_PAUSE_ACK_FS2inputTCELL9:IMUX.IMUX.36.DELAY
CTL_RX_PAUSE_ACK_FS3inputTCELL9:IMUX.IMUX.38.DELAY
CTL_RX_PAUSE_ACK_FS4inputTCELL9:IMUX.IMUX.39.DELAY
CTL_RX_PAUSE_ACK_FS5inputTCELL9:IMUX.IMUX.41.DELAY
CTL_RX_PAUSE_ACK_FS6inputTCELL9:IMUX.IMUX.42.DELAY
CTL_RX_PAUSE_ACK_FS7inputTCELL9:IMUX.IMUX.44.DELAY
CTL_RX_PAUSE_ACK_FS8inputTCELL9:IMUX.IMUX.45.DELAY
CTL_TX_PAUSE_REQ_FS0inputTCELL6:IMUX.IMUX.29.DELAY
CTL_TX_PAUSE_REQ_FS1inputTCELL6:IMUX.IMUX.30.DELAY
CTL_TX_PAUSE_REQ_FS2inputTCELL6:IMUX.IMUX.32.DELAY
CTL_TX_PAUSE_REQ_FS3inputTCELL6:IMUX.IMUX.35.DELAY
CTL_TX_PAUSE_REQ_FS4inputTCELL6:IMUX.IMUX.36.DELAY
CTL_TX_PAUSE_REQ_FS5inputTCELL6:IMUX.IMUX.38.DELAY
CTL_TX_PAUSE_REQ_FS6inputTCELL6:IMUX.IMUX.39.DELAY
CTL_TX_PAUSE_REQ_FS7inputTCELL6:IMUX.IMUX.41.DELAY
CTL_TX_PAUSE_REQ_FS8inputTCELL6:IMUX.IMUX.42.DELAY
CTL_TX_RESEND_PAUSE_FSinputTCELL6:IMUX.IMUX.28.DELAY
CTL_TX_SEND_IDLE_FSinputTCELL6:IMUX.IMUX.26.DELAY
CTL_TX_SEND_LFI_FSinputTCELL6:IMUX.IMUX.23.DELAY
CTL_TX_SEND_RFI_FSinputTCELL6:IMUX.IMUX.22.DELAY
DADDR_FS0inputTCELL0:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL1:IMUX.IMUX.34.DELAY
DADDR_FS2inputTCELL2:IMUX.IMUX.7.DELAY
DADDR_FS3inputTCELL0:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL2:IMUX.IMUX.11.DELAY
DADDR_FS5inputTCELL2:IMUX.IMUX.23.DELAY
DADDR_FS6inputTCELL0:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL2:IMUX.IMUX.38.DELAY
DADDR_FS8inputTCELL2:IMUX.IMUX.47.DELAY
DADDR_FS9inputTCELL1:IMUX.IMUX.8.DELAY
DCLK_FSinputTCELL0:IMUX.CTRL.4
DEN_FSinputTCELL0:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL12:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL12:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL12:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL12:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL9:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL9:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL10:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL9:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL11:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL11:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL0:OUT.26.TMIN
DFEDOUT_SF1outputTCELL0:OUT.24.TMIN
DFEDOUT_SF2outputTCELL2:OUT.26.TMIN
DFEDOUT_SF3outputTCELL3:OUT.26.TMIN
DFEDOUT_SF4outputTCELL4:OUT.26.TMIN
DFEDOUT_SF5outputTCELL0:OUT.6.TMIN
DFEDOUT_SF6outputTCELL1:OUT.6.TMIN
DFEDOUT_SF7outputTCELL4:OUT.7.TMIN
DFEGCHOLD_FSinputTCELL10:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL10:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL12:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL12:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL10:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL10:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL11:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL11:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL12:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL12:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL10:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL10:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL11:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL11:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL10:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL10:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL11:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL11:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL12:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL12:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL10:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL10:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL11:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL11:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL12:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL12:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL10:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL10:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL11:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL11:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL10:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL10:IMUX.IMUX.38.DELAY
DFERESET_FSinputTCELL7:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL10:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL10:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL11:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL11:IMUX.IMUX.39.DELAY
DFEYEN_FSinputTCELL11:IMUX.IMUX.45.DELAY
DFE_KH_EXTHOLD_FSinputTCELL1:IMUX.IMUX.45.DELAY
DFE_KH_OVERWREN_FSinputTCELL4:IMUX.IMUX.43.DELAY
DI_FS0inputTCELL0:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL2:IMUX.IMUX.2.DELAY
DI_FS10inputTCELL3:IMUX.IMUX.8.DELAY
DI_FS11inputTCELL1:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL1:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL1:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL1:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL1:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL0:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL0:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL2:IMUX.IMUX.17.DELAY
DI_FS5inputTCELL2:IMUX.IMUX.30.DELAY
DI_FS6inputTCELL0:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL2:IMUX.IMUX.42.DELAY
DI_FS8inputTCELL3:IMUX.IMUX.2.DELAY
DI_FS9inputTCELL1:IMUX.IMUX.11.DELAY
DMONCLK_FSinputTCELL0:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL2:IMUX.IMUX.44.DELAY
DMONOUT_SF0outputTCELL0:OUT.27.TMIN
DMONOUT_SF1outputTCELL0:OUT.30.TMIN
DMONOUT_SF10outputTCELL0:OUT.15.TMIN
DMONOUT_SF11outputTCELL0:OUT.3.TMIN
DMONOUT_SF12outputTCELL4:OUT.12.TMIN
DMONOUT_SF13outputTCELL3:OUT.15.TMIN
DMONOUT_SF14outputTCELL4:OUT.15.TMIN
DMONOUT_SF15outputTCELL0:OUT.9.TMIN
DMONOUT_SF2outputTCELL2:OUT.27.TMIN
DMONOUT_SF3outputTCELL3:OUT.27.TMIN
DMONOUT_SF4outputTCELL4:OUT.27.TMIN
DMONOUT_SF5outputTCELL0:OUT.21.TMIN
DMONOUT_SF6outputTCELL0:OUT.12.TMIN
DMONOUT_SF7outputTCELL5:OUT.5.TMIN
DMONOUT_SF8outputTCELL3:OUT.21.TMIN
DMONOUT_SF9outputTCELL4:OUT.21.TMIN
DRDY_SFoutputTCELL3:OUT.7.TMIN
DRPDO_SF0outputTCELL0:OUT.31.TMIN
DRPDO_SF1outputTCELL1:OUT.7.TMIN
DRPDO_SF10outputTCELL0:OUT.19.TMIN
DRPDO_SF11outputTCELL0:OUT.10.TMIN
DRPDO_SF12outputTCELL5:OUT.3.TMIN
DRPDO_SF13outputTCELL3:OUT.19.TMIN
DRPDO_SF14outputTCELL4:OUT.19.TMIN
DRPDO_SF15outputTCELL0:OUT.13.TMIN
DRPDO_SF2outputTCELL2:OUT.31.TMIN
DRPDO_SF3outputTCELL3:OUT.31.TMIN
DRPDO_SF4outputTCELL4:OUT.31.TMIN
DRPDO_SF5outputTCELL0:OUT.25.TMIN
DRPDO_SF6outputTCELL0:OUT.20.TMIN
DRPDO_SF7outputTCELL2:OUT.25.TMIN
DRPDO_SF8outputTCELL3:OUT.25.TMIN
DRPDO_SF9outputTCELL4:OUT.25.TMIN
DRST_FSinputTCELL1:IMUX.CTRL.3
DWE_FSinputTCELL0:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL3:IMUX.IMUX.22.DELAY
EYESCANDATAERROR_SFoutputTCELL1:OUT.1.TMIN
EYESCANTRIGGER_FSinputTCELL0:IMUX.IMUX.12.DELAY
FREQOS_FSinputTCELL2:IMUX.IMUX.22.DELAY
GATERXELECIDLE_FS0inputTCELL8:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL8:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL4:OUT.22.TMIN
GTRXRSTSEL_FSinputTCELL1:IMUX.IMUX.20.DELAY
GTRXRST_FSinputTCELL9:IMUX.CTRL.0
GTTXRSTSEL_FSinputTCELL2:IMUX.IMUX.8.DELAY
GTTXRST_FSinputTCELL4:IMUX.CTRL.0
INCPCTRL_FSinputTCELL2:IMUX.IMUX.16.DELAY
ISCANRESET_FSinputTCELL1:IMUX.IMUX.36.DELAY
LOOPBACK_FS0inputTCELL2:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL2:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL2:IMUX.IMUX.9.DELAY
LPMGCHOLD_FSinputTCELL12:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL12:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL12:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL11:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL12:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL12:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL11:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL11:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL0:OUT.28.TMIN
OSHOLD_FSinputTCELL10:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL9:IMUX.IMUX.16.DELAY
PCS_RSVD_IN_FS0inputTCELL5:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL5:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL10:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL10:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL11:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL11:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL12:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL12:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL6:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL6:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL7:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL7:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL8:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL8:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL9:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL9:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL5:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL6:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL7:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL8:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL9:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL10:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL11:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL12:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL7:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL8:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL9:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL10:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL11:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL12:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL5:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL6:OUT.20.TMIN
PINRSRVDAS_SF0outputTCELL1:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL5:OUT.9.TMIN
PINRSRVDAS_SF10outputTCELL0:OUT.16.TMIN
PINRSRVDAS_SF11outputTCELL5:OUT.7.TMIN
PINRSRVDAS_SF12outputTCELL3:OUT.1.TMIN
PINRSRVDAS_SF13outputTCELL4:OUT.16.TMIN
PINRSRVDAS_SF14outputTCELL4:OUT.1.TMIN
PINRSRVDAS_SF15outputTCELL4:OUT.28.TMIN
PINRSRVDAS_SF2outputTCELL3:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL4:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL1:OUT.5.TMIN
PINRSRVDAS_SF5outputTCELL2:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL3:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL4:OUT.30.TMIN
PINRSRVDAS_SF8outputTCELL0:OUT.22.TMIN
PINRSRVDAS_SF9outputTCELL0:OUT.5.TMIN
PINRSRVD_FS0inputTCELL5:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL5:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL10:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL10:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL11:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL11:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL12:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL12:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL6:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL6:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL7:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL7:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL8:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL8:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL9:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL9:IMUX.IMUX.46.DELAY
PMASCANCLK0_FSinputTCELL10:IMUX.CTRL.5
PMASCANCLK1_FSinputTCELL10:IMUX.CTRL.4
PMASCANCLK2_FSinputTCELL4:IMUX.CTRL.5
PMASCANCLK3_FSinputTCELL4:IMUX.CTRL.4
PMASCANCLK4_FSinputTCELL2:IMUX.CTRL.5
PMASCANCLK5_FSinputTCELL2:IMUX.CTRL.6
PMASCANCLK6_FSinputTCELL6:IMUX.CTRL.2
PMASCANCLK7_FSinputTCELL6:IMUX.CTRL.3
PMASCANCLK8_FSinputTCELL8:IMUX.CTRL.2
PMASCANENB_FSinputTCELL1:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL1:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL2:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL2:IMUX.IMUX.35.DELAY
PMASCANIN_FS11inputTCELL2:IMUX.IMUX.39.DELAY
PMASCANIN_FS12inputTCELL2:IMUX.IMUX.36.DELAY
PMASCANIN_FS13inputTCELL2:IMUX.IMUX.41.DELAY
PMASCANIN_FS14inputTCELL1:IMUX.IMUX.43.DELAY
PMASCANIN_FS15inputTCELL1:IMUX.IMUX.46.DELAY
PMASCANIN_FS16inputTCELL2:IMUX.IMUX.43.DELAY
PMASCANIN_FS17inputTCELL2:IMUX.IMUX.46.DELAY
PMASCANIN_FS2inputTCELL2:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL3:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL3:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL4:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL4:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL2:IMUX.IMUX.29.DELAY
PMASCANIN_FS8inputTCELL2:IMUX.IMUX.31.DELAY
PMASCANIN_FS9inputTCELL0:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL2:IMUX.IMUX.34.DELAY
PMASCANOUT_SF0outputTCELL0:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL1:OUT.3.TMIN
PMASCANOUT_SF10outputTCELL4:OUT.11.TMIN
PMASCANOUT_SF11outputTCELL3:OUT.14.TMIN
PMASCANOUT_SF12outputTCELL5:OUT.0.TMIN
PMASCANOUT_SF13outputTCELL7:OUT.10.TMIN
PMASCANOUT_SF14outputTCELL8:OUT.10.TMIN
PMASCANOUT_SF15outputTCELL9:OUT.10.TMIN
PMASCANOUT_SF16outputTCELL10:OUT.10.TMIN
PMASCANOUT_SF17outputTCELL11:OUT.10.TMIN
PMASCANOUT_SF2outputTCELL2:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL3:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL4:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL0:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL0:OUT.7.TMIN
PMASCANOUT_SF7outputTCELL4:OUT.14.TMIN
PMASCANOUT_SF8outputTCELL0:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL0:OUT.1.TMIN
PMASCANRSTEN_FSinputTCELL2:IMUX.IMUX.32.DELAY
PRBSCNTRST_FSinputTCELL8:IMUX.IMUX.12.DELAY
QPLLFREQLOCK0_FSinputTCELL5:IMUX.IMUX.16.DELAY
QPLLFREQLOCK1_FSinputTCELL10:IMUX.IMUX.3.DELAY
RCODAPWDN_FSinputTCELL8:IMUX.IMUX.19.DELAY
RCODARESET_FSinputTCELL9:IMUX.CTRL.7
RDASOFTRSTDONE_SFoutputTCELL5:OUT.6.TMIN
RESETOVRD_FSinputTCELL7:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL4:OUT.18.TMIN
RXCDRPHDONE_SFoutputTCELL3:OUT.20.TMIN
RXCKCALSTART_FS0inputTCELL10:IMUX.IMUX.14.DELAY
RXCKCALSTART_FS1inputTCELL10:IMUX.IMUX.26.DELAY
RXCKCALSTART_FS2inputTCELL11:IMUX.IMUX.14.DELAY
RXCKCALSTART_FS3inputTCELL11:IMUX.IMUX.21.DELAY
RXCKCALSTART_FS4inputTCELL12:IMUX.IMUX.24.DELAY
RXCKCALSTART_FS5inputTCELL12:IMUX.IMUX.31.DELAY
RXCKCALSTART_FS6inputTCELL12:IMUX.IMUX.41.DELAY
RXCOALGNEN_FSinputTCELL8:IMUX.IMUX.22.DELAY
RXCOPHDONE_SFoutputTCELL4:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL8:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL12:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL12:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL12:IMUX.IMUX.32.DELAY
RXDASOFTRESET_FSinputTCELL11:IMUX.CTRL.7
RXELECIDLE_SFoutputTCELL5:OUT.2.TMIN
RXLINKSYNCDONE_SFoutputTCELL4:OUT.13.TMIN
RXLPMEN_FSinputTCELL11:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL11:IMUX.IMUX.35.DELAY
RXOUTCKCTL_FS0inputTCELL8:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL9:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL9:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL3:OUT.24.TMIN
RXPLLCKSEL_FS0inputTCELL9:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL10:IMUX.IMUX.4.DELAY
RXPMARESETDONE_SFoutputTCELL4:OUT.2.TMIN
RXPMARESET_FSinputTCELL8:IMUX.CTRL.7
RXPOLARITY_FSinputTCELL8:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL12:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL5:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL12:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL12:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL12:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL12:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL4:OUT.20.TMIN
RXPROGDIVRESET_FSinputTCELL10:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL11:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL12:IMUX.IMUX.4.DELAY
RXRAWDATA_SF0outputTCELL1:OUT.11.TMIN
RXRAWDATA_SF1outputTCELL1:OUT.14.TMIN
RXRAWDATA_SF10outputTCELL1:OUT.23.TMIN
RXRAWDATA_SF11outputTCELL1:OUT.24.TMIN
RXRAWDATA_SF12outputTCELL1:OUT.25.TMIN
RXRAWDATA_SF13outputTCELL1:OUT.26.TMIN
RXRAWDATA_SF14outputTCELL1:OUT.27.TMIN
RXRAWDATA_SF15outputTCELL1:OUT.28.TMIN
RXRAWDATA_SF16outputTCELL1:OUT.29.TMIN
RXRAWDATA_SF17outputTCELL1:OUT.30.TMIN
RXRAWDATA_SF18outputTCELL1:OUT.31.TMIN
RXRAWDATA_SF19outputTCELL2:OUT.0.TMIN
RXRAWDATA_SF2outputTCELL1:OUT.15.TMIN
RXRAWDATA_SF20outputTCELL2:OUT.1.TMIN
RXRAWDATA_SF21outputTCELL2:OUT.2.TMIN
RXRAWDATA_SF22outputTCELL2:OUT.3.TMIN
RXRAWDATA_SF23outputTCELL2:OUT.4.TMIN
RXRAWDATA_SF24outputTCELL2:OUT.5.TMIN
RXRAWDATA_SF25outputTCELL2:OUT.7.TMIN
RXRAWDATA_SF26outputTCELL2:OUT.8.TMIN
RXRAWDATA_SF27outputTCELL2:OUT.9.TMIN
RXRAWDATA_SF28outputTCELL2:OUT.10.TMIN
RXRAWDATA_SF29outputTCELL2:OUT.12.TMIN
RXRAWDATA_SF3outputTCELL1:OUT.16.TMIN
RXRAWDATA_SF30outputTCELL2:OUT.13.TMIN
RXRAWDATA_SF31outputTCELL2:OUT.14.TMIN
RXRAWDATA_SF32outputTCELL2:OUT.15.TMIN
RXRAWDATA_SF33outputTCELL2:OUT.16.TMIN
RXRAWDATA_SF34outputTCELL2:OUT.17.TMIN
RXRAWDATA_SF35outputTCELL2:OUT.18.TMIN
RXRAWDATA_SF36outputTCELL2:OUT.19.TMIN
RXRAWDATA_SF37outputTCELL2:OUT.20.TMIN
RXRAWDATA_SF38outputTCELL2:OUT.21.TMIN
RXRAWDATA_SF39outputTCELL2:OUT.22.TMIN
RXRAWDATA_SF4outputTCELL1:OUT.17.TMIN
RXRAWDATA_SF5outputTCELL1:OUT.18.TMIN
RXRAWDATA_SF6outputTCELL1:OUT.19.TMIN
RXRAWDATA_SF7outputTCELL1:OUT.20.TMIN
RXRAWDATA_SF8outputTCELL1:OUT.21.TMIN
RXRAWDATA_SF9outputTCELL1:OUT.22.TMIN
RXRECCLKPCS_SFoutputTCELL7:OUT.8.TMIN
RXRECCLK_SFoutputTCELL6:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL12:OUT.10.TMIN
RXRESET_FSinputTCELL9:IMUX.IMUX.13.DELAY
RXSLIPDONE_SFoutputTCELL4:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL4:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL12:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL4:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL12:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL11:IMUX.IMUX.26.DELAY
RXSYNCEN2SLV_SFoutputTCELL4:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL11:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL9:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL8:IMUX.IMUX.4.DELAY
RXTERMINATION_FSinputTCELL3:IMUX.IMUX.7.DELAY
RXUSRCLK2_FSinputTCELL9:IMUX.CTRL.4
RXUSRCLK_FSinputTCELL9:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL11:IMUX.IMUX.29.DELAY
RX_AXIS_TDATA_SF0outputTCELL8:OUT.15.TMIN
RX_AXIS_TDATA_SF1outputTCELL8:OUT.16.TMIN
RX_AXIS_TDATA_SF10outputTCELL8:OUT.27.TMIN
RX_AXIS_TDATA_SF11outputTCELL8:OUT.28.TMIN
RX_AXIS_TDATA_SF12outputTCELL8:OUT.29.TMIN
RX_AXIS_TDATA_SF13outputTCELL8:OUT.30.TMIN
RX_AXIS_TDATA_SF14outputTCELL8:OUT.31.TMIN
RX_AXIS_TDATA_SF15outputTCELL9:OUT.0.TMIN
RX_AXIS_TDATA_SF16outputTCELL9:OUT.1.TMIN
RX_AXIS_TDATA_SF17outputTCELL9:OUT.2.TMIN
RX_AXIS_TDATA_SF18outputTCELL9:OUT.3.TMIN
RX_AXIS_TDATA_SF19outputTCELL9:OUT.4.TMIN
RX_AXIS_TDATA_SF2outputTCELL8:OUT.17.TMIN
RX_AXIS_TDATA_SF20outputTCELL9:OUT.5.TMIN
RX_AXIS_TDATA_SF21outputTCELL9:OUT.6.TMIN
RX_AXIS_TDATA_SF22outputTCELL9:OUT.7.TMIN
RX_AXIS_TDATA_SF23outputTCELL9:OUT.8.TMIN
RX_AXIS_TDATA_SF24outputTCELL9:OUT.9.TMIN
RX_AXIS_TDATA_SF25outputTCELL9:OUT.11.TMIN
RX_AXIS_TDATA_SF26outputTCELL9:OUT.12.TMIN
RX_AXIS_TDATA_SF27outputTCELL9:OUT.13.TMIN
RX_AXIS_TDATA_SF28outputTCELL9:OUT.14.TMIN
RX_AXIS_TDATA_SF29outputTCELL9:OUT.15.TMIN
RX_AXIS_TDATA_SF3outputTCELL8:OUT.18.TMIN
RX_AXIS_TDATA_SF30outputTCELL9:OUT.16.TMIN
RX_AXIS_TDATA_SF31outputTCELL9:OUT.17.TMIN
RX_AXIS_TDATA_SF32outputTCELL9:OUT.18.TMIN
RX_AXIS_TDATA_SF33outputTCELL9:OUT.19.TMIN
RX_AXIS_TDATA_SF34outputTCELL9:OUT.21.TMIN
RX_AXIS_TDATA_SF35outputTCELL9:OUT.23.TMIN
RX_AXIS_TDATA_SF36outputTCELL9:OUT.24.TMIN
RX_AXIS_TDATA_SF37outputTCELL9:OUT.25.TMIN
RX_AXIS_TDATA_SF38outputTCELL9:OUT.26.TMIN
RX_AXIS_TDATA_SF39outputTCELL9:OUT.27.TMIN
RX_AXIS_TDATA_SF4outputTCELL8:OUT.19.TMIN
RX_AXIS_TDATA_SF40outputTCELL9:OUT.28.TMIN
RX_AXIS_TDATA_SF41outputTCELL9:OUT.29.TMIN
RX_AXIS_TDATA_SF42outputTCELL9:OUT.30.TMIN
RX_AXIS_TDATA_SF43outputTCELL9:OUT.31.TMIN
RX_AXIS_TDATA_SF44outputTCELL10:OUT.0.TMIN
RX_AXIS_TDATA_SF45outputTCELL10:OUT.1.TMIN
RX_AXIS_TDATA_SF46outputTCELL10:OUT.2.TMIN
RX_AXIS_TDATA_SF47outputTCELL10:OUT.3.TMIN
RX_AXIS_TDATA_SF48outputTCELL10:OUT.4.TMIN
RX_AXIS_TDATA_SF49outputTCELL10:OUT.5.TMIN
RX_AXIS_TDATA_SF5outputTCELL8:OUT.21.TMIN
RX_AXIS_TDATA_SF50outputTCELL10:OUT.6.TMIN
RX_AXIS_TDATA_SF51outputTCELL10:OUT.7.TMIN
RX_AXIS_TDATA_SF52outputTCELL10:OUT.8.TMIN
RX_AXIS_TDATA_SF53outputTCELL10:OUT.9.TMIN
RX_AXIS_TDATA_SF54outputTCELL10:OUT.11.TMIN
RX_AXIS_TDATA_SF55outputTCELL10:OUT.12.TMIN
RX_AXIS_TDATA_SF56outputTCELL10:OUT.13.TMIN
RX_AXIS_TDATA_SF57outputTCELL10:OUT.14.TMIN
RX_AXIS_TDATA_SF58outputTCELL10:OUT.15.TMIN
RX_AXIS_TDATA_SF59outputTCELL10:OUT.16.TMIN
RX_AXIS_TDATA_SF6outputTCELL8:OUT.23.TMIN
RX_AXIS_TDATA_SF60outputTCELL10:OUT.17.TMIN
RX_AXIS_TDATA_SF61outputTCELL10:OUT.18.TMIN
RX_AXIS_TDATA_SF62outputTCELL10:OUT.19.TMIN
RX_AXIS_TDATA_SF63outputTCELL10:OUT.21.TMIN
RX_AXIS_TDATA_SF7outputTCELL8:OUT.24.TMIN
RX_AXIS_TDATA_SF8outputTCELL8:OUT.25.TMIN
RX_AXIS_TDATA_SF9outputTCELL8:OUT.26.TMIN
RX_AXIS_TERR_SFoutputTCELL8:OUT.14.TMIN
RX_AXIS_TLAST_SF0outputTCELL8:OUT.5.TMIN
RX_AXIS_TLAST_SF1outputTCELL8:OUT.6.TMIN
RX_AXIS_TLAST_SF2outputTCELL8:OUT.7.TMIN
RX_AXIS_TLAST_SF3outputTCELL8:OUT.8.TMIN
RX_AXIS_TLAST_SF4outputTCELL8:OUT.9.TMIN
RX_AXIS_TLAST_SF5outputTCELL8:OUT.11.TMIN
RX_AXIS_TLAST_SF6outputTCELL8:OUT.12.TMIN
RX_AXIS_TLAST_SF7outputTCELL8:OUT.13.TMIN
RX_AXIS_TPRE_SF0outputTCELL7:OUT.29.TMIN
RX_AXIS_TPRE_SF1outputTCELL7:OUT.30.TMIN
RX_AXIS_TPRE_SF2outputTCELL7:OUT.31.TMIN
RX_AXIS_TPRE_SF3outputTCELL8:OUT.0.TMIN
RX_AXIS_TPRE_SF4outputTCELL8:OUT.1.TMIN
RX_AXIS_TPRE_SF5outputTCELL8:OUT.2.TMIN
RX_AXIS_TPRE_SF6outputTCELL8:OUT.3.TMIN
RX_AXIS_TPRE_SF7outputTCELL8:OUT.4.TMIN
RX_AXIS_TSOF_SF0outputTCELL7:OUT.27.TMIN
RX_AXIS_TSOF_SF1outputTCELL7:OUT.28.TMIN
RX_AXIS_TTERM_SF0outputTCELL7:OUT.21.TMIN
RX_AXIS_TTERM_SF1outputTCELL7:OUT.23.TMIN
RX_AXIS_TTERM_SF2outputTCELL7:OUT.24.TMIN
RX_AXIS_TTERM_SF3outputTCELL7:OUT.25.TMIN
RX_AXIS_TTERM_SF4outputTCELL7:OUT.26.TMIN
RX_AXIS_TVALID_SFoutputTCELL7:OUT.19.TMIN
RX_BITSLIP_SFoutputTCELL7:OUT.18.TMIN
RX_GB_SEQ_START_SFoutputTCELL7:OUT.17.TMIN
RX_PTP_SOP_POS_SFoutputTCELL7:OUT.15.TMIN
RX_PTP_SOP_SFoutputTCELL7:OUT.16.TMIN
SCANCLK_FSinputTCELL7:IMUX.CTRL.5
SCANENB_FSinputTCELL1:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL2:IMUX.IMUX.14.DELAY
SCANIN_FS1inputTCELL1:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL3:IMUX.IMUX.11.DELAY
SCANIN_FS11inputTCELL0:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL2:IMUX.IMUX.21.DELAY
SCANIN_FS13inputTCELL2:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL9:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL9:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL10:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL11:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL12:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL2:IMUX.IMUX.20.DELAY
SCANIN_FS3inputTCELL1:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL2:IMUX.IMUX.26.DELAY
SCANIN_FS5inputTCELL1:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL3:IMUX.IMUX.17.DELAY
SCANIN_FS7inputTCELL0:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL3:IMUX.IMUX.15.DELAY
SCANIN_FS9inputTCELL0:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL1:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL0:OUT.23.TMIN
SCANOUT_SF1outputTCELL0:OUT.18.TMIN
SCANOUT_SF10outputTCELL3:OUT.3.TMIN
SCANOUT_SF11outputTCELL0:OUT.4.TMIN
SCANOUT_SF12outputTCELL1:OUT.4.TMIN
SCANOUT_SF13outputTCELL3:OUT.4.TMIN
SCANOUT_SF14outputTCELL0:OUT.8.TMIN
SCANOUT_SF15outputTCELL1:OUT.8.TMIN
SCANOUT_SF16outputTCELL3:OUT.22.TMIN
SCANOUT_SF17outputTCELL3:OUT.10.TMIN
SCANOUT_SF18outputTCELL3:OUT.12.TMIN
SCANOUT_SF2outputTCELL2:OUT.23.TMIN
SCANOUT_SF3outputTCELL3:OUT.23.TMIN
SCANOUT_SF4outputTCELL4:OUT.23.TMIN
SCANOUT_SF5outputTCELL0:OUT.11.TMIN
SCANOUT_SF6outputTCELL0:OUT.0.TMIN
SCANOUT_SF7outputTCELL1:OUT.0.TMIN
SCANOUT_SF8outputTCELL0:OUT.2.TMIN
SCANOUT_SF9outputTCELL1:OUT.2.TMIN
SCANRSTB_FSinputTCELL1:IMUX.IMUX.39.DELAY
SCANRSTEN_FSinputTCELL1:IMUX.IMUX.42.DELAY
STAT_RX_BAD_CODE_SFoutputTCELL7:OUT.14.TMIN
STAT_RX_BAD_FCS_SFoutputTCELL12:OUT.6.TMIN
STAT_RX_BAD_PREAMBLE_SFoutputTCELL7:OUT.12.TMIN
STAT_RX_BAD_SFD_SFoutputTCELL7:OUT.13.TMIN
STAT_RX_BLOCK_LOCK_SFoutputTCELL7:OUT.11.TMIN
STAT_RX_BROADCAST_SFoutputTCELL7:OUT.9.TMIN
STAT_RX_BYTES_SF0outputTCELL7:OUT.4.TMIN
STAT_RX_BYTES_SF1outputTCELL7:OUT.5.TMIN
STAT_RX_BYTES_SF2outputTCELL7:OUT.6.TMIN
STAT_RX_BYTES_SF3outputTCELL7:OUT.7.TMIN
STAT_RX_FCS_ERR_SFoutputTCELL7:OUT.3.TMIN
STAT_RX_FRAMING_ERR_SFoutputTCELL7:OUT.2.TMIN
STAT_RX_GOT_SIGNAL_OS_SFoutputTCELL7:OUT.1.TMIN
STAT_RX_HI_BER_SFoutputTCELL7:OUT.0.TMIN
STAT_RX_INRANGEERR_SFoutputTCELL12:OUT.2.TMIN
STAT_RX_INTERNAL_LOCAL_FAULT_SFoutputTCELL12:OUT.7.TMIN
STAT_RX_LOCAL_FAULT_SFoutputTCELL12:OUT.1.TMIN
STAT_RX_MULTICAST_SFoutputTCELL12:OUT.0.TMIN
STAT_RX_PAUSE_QUANTA_SF0outputTCELL11:OUT.23.TMIN
STAT_RX_PAUSE_QUANTA_SF1outputTCELL11:OUT.24.TMIN
STAT_RX_PAUSE_QUANTA_SF2outputTCELL11:OUT.25.TMIN
STAT_RX_PAUSE_QUANTA_SF3outputTCELL11:OUT.26.TMIN
STAT_RX_PAUSE_QUANTA_SF4outputTCELL11:OUT.27.TMIN
STAT_RX_PAUSE_QUANTA_SF5outputTCELL11:OUT.28.TMIN
STAT_RX_PAUSE_QUANTA_SF6outputTCELL11:OUT.29.TMIN
STAT_RX_PAUSE_QUANTA_SF7outputTCELL11:OUT.30.TMIN
STAT_RX_PAUSE_QUANTA_SF8outputTCELL11:OUT.31.TMIN
STAT_RX_PAUSE_REQ_SF0outputTCELL11:OUT.11.TMIN
STAT_RX_PAUSE_REQ_SF1outputTCELL11:OUT.13.TMIN
STAT_RX_PAUSE_REQ_SF2outputTCELL11:OUT.14.TMIN
STAT_RX_PAUSE_REQ_SF3outputTCELL11:OUT.15.TMIN
STAT_RX_PAUSE_REQ_SF4outputTCELL11:OUT.16.TMIN
STAT_RX_PAUSE_REQ_SF5outputTCELL11:OUT.17.TMIN
STAT_RX_PAUSE_REQ_SF6outputTCELL11:OUT.18.TMIN
STAT_RX_PAUSE_REQ_SF7outputTCELL11:OUT.19.TMIN
STAT_RX_PAUSE_REQ_SF8outputTCELL11:OUT.21.TMIN
STAT_RX_PAUSE_VALID_SF0outputTCELL11:OUT.1.TMIN
STAT_RX_PAUSE_VALID_SF1outputTCELL11:OUT.2.TMIN
STAT_RX_PAUSE_VALID_SF2outputTCELL11:OUT.3.TMIN
STAT_RX_PAUSE_VALID_SF3outputTCELL11:OUT.4.TMIN
STAT_RX_PAUSE_VALID_SF4outputTCELL11:OUT.5.TMIN
STAT_RX_PAUSE_VALID_SF5outputTCELL11:OUT.6.TMIN
STAT_RX_PAUSE_VALID_SF6outputTCELL11:OUT.7.TMIN
STAT_RX_PAUSE_VALID_SF7outputTCELL11:OUT.8.TMIN
STAT_RX_PAUSE_VALID_SF8outputTCELL11:OUT.9.TMIN
STAT_RX_PKT_ERR_SFoutputTCELL10:OUT.31.TMIN
STAT_RX_PKT_SFoutputTCELL11:OUT.0.TMIN
STAT_RX_RECEIVED_LOCAL_FAULT_SFoutputTCELL10:OUT.30.TMIN
STAT_RX_REMOTE_FAULT_SFoutputTCELL10:OUT.29.TMIN
STAT_RX_STATUS_SFoutputTCELL10:OUT.28.TMIN
STAT_RX_STOMPED_FCS_SFoutputTCELL12:OUT.5.TMIN
STAT_RX_TEST_PATTERN_MISMATCH_SFoutputTCELL10:OUT.27.TMIN
STAT_RX_TRUNCATED_SFoutputTCELL10:OUT.26.TMIN
STAT_RX_UNICAST_SFoutputTCELL10:OUT.25.TMIN
STAT_RX_VALID_CTRL_CODE_SFoutputTCELL10:OUT.24.TMIN
STAT_RX_VLAN_SFoutputTCELL10:OUT.23.TMIN
STAT_TX_BAD_FCS_SFoutputTCELL6:OUT.11.TMIN
STAT_TX_BROADCAST_SFoutputTCELL6:OUT.13.TMIN
STAT_TX_BYTES_SF0outputTCELL6:OUT.2.TMIN
STAT_TX_BYTES_SF1outputTCELL6:OUT.3.TMIN
STAT_TX_BYTES_SF2outputTCELL6:OUT.4.TMIN
STAT_TX_BYTES_SF3outputTCELL6:OUT.5.TMIN
STAT_TX_FCS_ERR_SFoutputTCELL6:OUT.1.TMIN
STAT_TX_MULTICAST_SFoutputTCELL6:OUT.14.TMIN
STAT_TX_PAUSE_VALID_SF0outputTCELL5:OUT.24.TMIN
STAT_TX_PAUSE_VALID_SF1outputTCELL5:OUT.25.TMIN
STAT_TX_PAUSE_VALID_SF2outputTCELL5:OUT.26.TMIN
STAT_TX_PAUSE_VALID_SF3outputTCELL5:OUT.27.TMIN
STAT_TX_PAUSE_VALID_SF4outputTCELL5:OUT.28.TMIN
STAT_TX_PAUSE_VALID_SF5outputTCELL5:OUT.29.TMIN
STAT_TX_PAUSE_VALID_SF6outputTCELL5:OUT.30.TMIN
STAT_TX_PAUSE_VALID_SF7outputTCELL5:OUT.31.TMIN
STAT_TX_PAUSE_VALID_SF8outputTCELL6:OUT.0.TMIN
STAT_TX_PKT_ERR_SFoutputTCELL5:OUT.21.TMIN
STAT_TX_PKT_SFoutputTCELL5:OUT.23.TMIN
STAT_TX_UNICAST_SFoutputTCELL6:OUT.15.TMIN
STAT_TX_VLAN_SFoutputTCELL6:OUT.12.TMIN
STEPSIZEPPM_FS0inputTCELL2:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL3:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL4:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL5:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL6:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUT_FSinputTCELL6:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL5:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL6:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL7:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL7:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL6:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL5:OUT.4.TMIN
TCOINITSET_FSinputTCELL8:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL3:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL7:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL6:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL3:OUT.8.TMIN
TSTCLK0_FSinputTCELL8:IMUX.CTRL.5
TSTCLK1_FSinputTCELL8:IMUX.CTRL.4
TSTIN_FS0inputTCELL0:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL2:IMUX.IMUX.45.DELAY
TSTIN_FS10inputTCELL0:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL3:IMUX.IMUX.5.DELAY
TSTIN_FS12inputTCELL0:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL3:IMUX.IMUX.14.DELAY
TSTIN_FS14inputTCELL0:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL1:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL0:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL3:IMUX.IMUX.20.DELAY
TSTIN_FS18inputTCELL2:IMUX.IMUX.15.DELAY
TSTIN_FS19inputTCELL1:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL0:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL3:IMUX.IMUX.0.DELAY
TSTIN_FS4inputTCELL1:IMUX.IMUX.31.DELAY
TSTIN_FS5inputTCELL1:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL2:IMUX.IMUX.0.DELAY
TSTIN_FS7inputTCELL1:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL2:IMUX.IMUX.5.DELAY
TSTIN_FS9inputTCELL1:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL1:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL1:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL1:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL1:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL1:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL1:IMUX.IMUX.15.DELAY
TXCODAALGNEN_FSinputTCELL5:IMUX.IMUX.7.DELAY
TXCOPIALGNEN_FSinputTCELL7:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL2:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL7:IMUX.IMUX.19.DELAY
TXDCCDONE_SFoutputTCELL3:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL2:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL7:IMUX.IMUX.4.DELAY
TXDRVAMP_FS0inputTCELL4:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL5:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL6:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL7:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL7:IMUX.IMUX.3.DELAY
TXELECIDLE_FSinputTCELL7:IMUX.IMUX.27.DELAY
TXEMPMAIN_FS0inputTCELL2:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL3:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL4:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL5:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL6:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL7:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL8:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL2:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL3:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL4:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL5:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL6:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL2:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL3:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL4:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL5:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL6:IMUX.IMUX.13.DELAY
TXLINKSYNCDONE_SFoutputTCELL3:OUT.11.TMIN
TXMSTRSETPHDONE_FSinputTCELL4:IMUX.IMUX.4.DELAY
TXMUXDCDEXHOLD_FSinputTCELL10:IMUX.IMUX.45.DELAY
TXMUXDCDORWREN_FSinputTCELL10:IMUX.IMUX.5.DELAY
TXOUTCKCTL_FS0inputTCELL4:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL5:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL6:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL2:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL2:OUT.6.TMIN
TXPIPPMPWDN_FSinputTCELL3:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL5:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL6:IMUX.IMUX.27.DELAY
TXPMARESETDONE_SFoutputTCELL2:OUT.24.TMIN
TXPMARESET_FSinputTCELL6:IMUX.CTRL.0
TXPOLARITY_FSinputTCELL2:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL3:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL3:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL2:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL4:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL5:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL6:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL6:IMUX.IMUX.1.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL4:OUT.17.TMIN
TXPROGDIVRESET_FSinputTCELL5:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL2:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL3:IMUX.IMUX.28.DELAY
TXRAWDATA_FS0inputTCELL0:IMUX.IMUX.27.DELAY
TXRAWDATA_FS1inputTCELL0:IMUX.IMUX.26.DELAY
TXRAWDATA_FS10inputTCELL0:IMUX.IMUX.32.DELAY
TXRAWDATA_FS11inputTCELL0:IMUX.IMUX.9.DELAY
TXRAWDATA_FS12inputTCELL0:IMUX.IMUX.35.DELAY
TXRAWDATA_FS13inputTCELL0:IMUX.IMUX.34.DELAY
TXRAWDATA_FS14inputTCELL0:IMUX.IMUX.10.DELAY
TXRAWDATA_FS15inputTCELL0:IMUX.IMUX.37.DELAY
TXRAWDATA_FS16inputTCELL0:IMUX.IMUX.36.DELAY
TXRAWDATA_FS17inputTCELL0:IMUX.IMUX.11.DELAY
TXRAWDATA_FS18inputTCELL0:IMUX.IMUX.40.DELAY
TXRAWDATA_FS19inputTCELL0:IMUX.IMUX.13.DELAY
TXRAWDATA_FS2inputTCELL0:IMUX.IMUX.6.DELAY
TXRAWDATA_FS20inputTCELL0:IMUX.IMUX.43.DELAY
TXRAWDATA_FS21inputTCELL0:IMUX.IMUX.42.DELAY
TXRAWDATA_FS22inputTCELL0:IMUX.IMUX.14.DELAY
TXRAWDATA_FS23inputTCELL0:IMUX.IMUX.45.DELAY
TXRAWDATA_FS24inputTCELL0:IMUX.IMUX.44.DELAY
TXRAWDATA_FS25inputTCELL0:IMUX.IMUX.15.DELAY
TXRAWDATA_FS26inputTCELL0:IMUX.IMUX.47.DELAY
TXRAWDATA_FS27inputTCELL0:IMUX.IMUX.46.DELAY
TXRAWDATA_FS28inputTCELL1:IMUX.IMUX.0.DELAY
TXRAWDATA_FS29inputTCELL1:IMUX.IMUX.17.DELAY
TXRAWDATA_FS3inputTCELL0:IMUX.IMUX.29.DELAY
TXRAWDATA_FS30inputTCELL1:IMUX.IMUX.16.DELAY
TXRAWDATA_FS31inputTCELL1:IMUX.IMUX.1.DELAY
TXRAWDATA_FS32inputTCELL1:IMUX.IMUX.19.DELAY
TXRAWDATA_FS33inputTCELL1:IMUX.IMUX.18.DELAY
TXRAWDATA_FS34inputTCELL1:IMUX.IMUX.2.DELAY
TXRAWDATA_FS35inputTCELL1:IMUX.IMUX.21.DELAY
TXRAWDATA_FS36inputTCELL1:IMUX.IMUX.4.DELAY
TXRAWDATA_FS37inputTCELL1:IMUX.IMUX.25.DELAY
TXRAWDATA_FS38inputTCELL1:IMUX.IMUX.24.DELAY
TXRAWDATA_FS39inputTCELL1:IMUX.IMUX.5.DELAY
TXRAWDATA_FS4inputTCELL0:IMUX.IMUX.28.DELAY
TXRAWDATA_FS5inputTCELL0:IMUX.IMUX.7.DELAY
TXRAWDATA_FS6inputTCELL0:IMUX.IMUX.31.DELAY
TXRAWDATA_FS7inputTCELL0:IMUX.IMUX.30.DELAY
TXRAWDATA_FS8inputTCELL0:IMUX.IMUX.8.DELAY
TXRAWDATA_FS9inputTCELL0:IMUX.IMUX.33.DELAY
TXRESETDONE_SFoutputTCELL3:OUT.13.TMIN
TXRESET_FSinputTCELL8:IMUX.IMUX.9.DELAY
TXSERPWRDN_FSinputTCELL2:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL3:IMUX.IMUX.4.DELAY
TXSYNCEN2SLV_SFoutputTCELL3:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL8:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL3:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL4:IMUX.IMUX.27.DELAY
TXUSRCLK2_FSinputTCELL5:IMUX.CTRL.4
TXUSRCLK_FSinputTCELL5:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL2:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS0inputTCELL3:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS1inputTCELL3:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS10inputTCELL3:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS11inputTCELL3:IMUX.IMUX.39.DELAY
TX_AXIS_TDATA_FS12inputTCELL3:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS13inputTCELL3:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS14inputTCELL3:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS15inputTCELL3:IMUX.IMUX.44.DELAY
TX_AXIS_TDATA_FS16inputTCELL3:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS17inputTCELL3:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS18inputTCELL3:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS19inputTCELL4:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS2inputTCELL3:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS20inputTCELL4:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS21inputTCELL4:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS22inputTCELL4:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS23inputTCELL4:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS24inputTCELL4:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS25inputTCELL4:IMUX.IMUX.9.DELAY
TX_AXIS_TDATA_FS26inputTCELL4:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS27inputTCELL4:IMUX.IMUX.11.DELAY
TX_AXIS_TDATA_FS28inputTCELL4:IMUX.IMUX.14.DELAY
TX_AXIS_TDATA_FS29inputTCELL4:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS3inputTCELL3:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS30inputTCELL4:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS31inputTCELL4:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS32inputTCELL4:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS33inputTCELL4:IMUX.IMUX.20.DELAY
TX_AXIS_TDATA_FS34inputTCELL4:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS35inputTCELL4:IMUX.IMUX.22.DELAY
TX_AXIS_TDATA_FS36inputTCELL4:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS37inputTCELL4:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS38inputTCELL4:IMUX.IMUX.28.DELAY
TX_AXIS_TDATA_FS39inputTCELL4:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS4inputTCELL3:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS40inputTCELL4:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS41inputTCELL4:IMUX.IMUX.31.DELAY
TX_AXIS_TDATA_FS42inputTCELL4:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS43inputTCELL4:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS44inputTCELL4:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS45inputTCELL4:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS46inputTCELL4:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS47inputTCELL4:IMUX.IMUX.39.DELAY
TX_AXIS_TDATA_FS48inputTCELL4:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS49inputTCELL4:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS5inputTCELL3:IMUX.IMUX.31.DELAY
TX_AXIS_TDATA_FS50inputTCELL4:IMUX.IMUX.44.DELAY
TX_AXIS_TDATA_FS51inputTCELL4:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS52inputTCELL4:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS53inputTCELL5:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS54inputTCELL5:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS55inputTCELL5:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS56inputTCELL5:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS57inputTCELL5:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS58inputTCELL5:IMUX.IMUX.11.DELAY
TX_AXIS_TDATA_FS59inputTCELL5:IMUX.IMUX.14.DELAY
TX_AXIS_TDATA_FS6inputTCELL3:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS60inputTCELL5:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS61inputTCELL5:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS62inputTCELL5:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS63inputTCELL5:IMUX.IMUX.20.DELAY
TX_AXIS_TDATA_FS7inputTCELL3:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS8inputTCELL3:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS9inputTCELL3:IMUX.IMUX.36.DELAY
TX_AXIS_TERR_FSinputTCELL6:IMUX.IMUX.21.DELAY
TX_AXIS_TLAST_FS0inputTCELL6:IMUX.IMUX.2.DELAY
TX_AXIS_TLAST_FS1inputTCELL6:IMUX.IMUX.5.DELAY
TX_AXIS_TLAST_FS2inputTCELL6:IMUX.IMUX.8.DELAY
TX_AXIS_TLAST_FS3inputTCELL6:IMUX.IMUX.11.DELAY
TX_AXIS_TLAST_FS4inputTCELL6:IMUX.IMUX.14.DELAY
TX_AXIS_TLAST_FS5inputTCELL6:IMUX.IMUX.15.DELAY
TX_AXIS_TLAST_FS6inputTCELL6:IMUX.IMUX.17.DELAY
TX_AXIS_TLAST_FS7inputTCELL6:IMUX.IMUX.20.DELAY
TX_AXIS_TPOISON_FSinputTCELL6:IMUX.IMUX.0.DELAY
TX_AXIS_TPRE_FS0inputTCELL5:IMUX.IMUX.36.DELAY
TX_AXIS_TPRE_FS1inputTCELL5:IMUX.IMUX.38.DELAY
TX_AXIS_TPRE_FS2inputTCELL5:IMUX.IMUX.39.DELAY
TX_AXIS_TPRE_FS3inputTCELL5:IMUX.IMUX.41.DELAY
TX_AXIS_TPRE_FS4inputTCELL5:IMUX.IMUX.42.DELAY
TX_AXIS_TPRE_FS5inputTCELL5:IMUX.IMUX.44.DELAY
TX_AXIS_TPRE_FS6inputTCELL5:IMUX.IMUX.45.DELAY
TX_AXIS_TPRE_FS7inputTCELL5:IMUX.IMUX.47.DELAY
TX_AXIS_TREADY_SFoutputTCELL5:OUT.19.TMIN
TX_AXIS_TSOF_FS0inputTCELL5:IMUX.IMUX.32.DELAY
TX_AXIS_TSOF_FS1inputTCELL5:IMUX.IMUX.35.DELAY
TX_AXIS_TTERM_FS0inputTCELL5:IMUX.IMUX.23.DELAY
TX_AXIS_TTERM_FS1inputTCELL5:IMUX.IMUX.26.DELAY
TX_AXIS_TTERM_FS2inputTCELL5:IMUX.IMUX.28.DELAY
TX_AXIS_TTERM_FS3inputTCELL5:IMUX.IMUX.29.DELAY
TX_AXIS_TTERM_FS4inputTCELL5:IMUX.IMUX.30.DELAY
TX_AXIS_TVALID_FSinputTCELL5:IMUX.IMUX.22.DELAY
TX_GB_SEQ_START_SFoutputTCELL5:OUT.18.TMIN
TX_GB_SEQ_SYNC_FSinputTCELL5:IMUX.IMUX.21.DELAY
TX_PTP_SOP_POS_SFoutputTCELL5:OUT.16.TMIN
TX_PTP_SOP_SFoutputTCELL5:OUT.17.TMIN
TX_UNFOUT_SFoutputTCELL5:OUT.15.TMIN

Bel GTF_CHANNEL1

ultrascaleplus GTF bel GTF_CHANNEL1
PinDirectionWires
AFECFOKEN_FSinputTCELL19:IMUX.IMUX.47.DELAY
BSR_SERIAL_FSinputTCELL23:IMUX.IMUX.38.DELAY
CDRFRRESET_FSinputTCELL21:IMUX.CTRL.7
CDRHOLD_FSinputTCELL21:IMUX.IMUX.33.DELAY
CDRLOCK_SFoutputTCELL23:OUT.25.TMIN
CDROVREN_FSinputTCELL20:IMUX.IMUX.33.DELAY
CDRPHRESET_FSinputTCELL18:IMUX.CTRL.7
CDRSTEPDIR_FSinputTCELL17:IMUX.IMUX.19.DELAY
CDRSTEPSQ_FSinputTCELL17:IMUX.IMUX.14.DELAY
CDRSTEPSX_FSinputTCELL17:IMUX.IMUX.16.DELAY
CFGRESET_FSinputTCELL27:IMUX.CTRL.7
CFOKDONE_SFoutputTCELL26:OUT.25.TMIN
CFOKFORCEDONE_SFoutputTCELL26:OUT.31.TMIN
CFOKFSTARTED_SFoutputTCELL25:OUT.31.TMIN
CFOKRESET_FSinputTCELL19:IMUX.IMUX.35.DELAY
CFOKSTART_SFoutputTCELL25:OUT.25.TMIN
CKOKDONE_SFoutputTCELL26:OUT.14.TMIN
CKOKRESET_FSinputTCELL19:IMUX.IMUX.42.DELAY
CKPINRSRVD0_FSinputTCELL17:IMUX.CTRL.2
CKPINRSRVD1_FSinputTCELL17:IMUX.CTRL.3
COREREFCLK_FSinputTCELL28:IMUX.CTRL.2
CPLFBLOSS_SFoutputTCELL24:OUT.30.TMIN
CPLFREQLOCK_SFoutputTCELL28:OUT.21.TMIN
CPLLDMONCLK_FSinputTCELL26:IMUX.CTRL.2
CPLLFREQLOCK_FSinputTCELL23:IMUX.IMUX.34.DELAY
CPLLKDETEN_FSinputTCELL26:IMUX.IMUX.22.DELAY
CPLPWRDN_FSinputTCELL27:IMUX.IMUX.22.DELAY
CPLREFLOSS_SFoutputTCELL26:OUT.26.TMIN
CPLREFSELDYN_FS0inputTCELL26:IMUX.IMUX.28.DELAY
CPLREFSELDYN_FS1inputTCELL26:IMUX.IMUX.34.DELAY
CPLREFSELDYN_FS2inputTCELL26:IMUX.IMUX.40.DELAY
CPLRESET_FSinputTCELL26:IMUX.CTRL.7
CTL_RX_PAUSE_ACK_FS0inputTCELL20:IMUX.IMUX.31.DELAY
CTL_RX_PAUSE_ACK_FS1inputTCELL20:IMUX.IMUX.29.DELAY
CTL_RX_PAUSE_ACK_FS2inputTCELL20:IMUX.IMUX.5.DELAY
CTL_RX_PAUSE_ACK_FS3inputTCELL20:IMUX.IMUX.4.DELAY
CTL_RX_PAUSE_ACK_FS4inputTCELL20:IMUX.IMUX.25.DELAY
CTL_RX_PAUSE_ACK_FS5inputTCELL20:IMUX.IMUX.23.DELAY
CTL_RX_PAUSE_ACK_FS6inputTCELL20:IMUX.IMUX.2.DELAY
CTL_RX_PAUSE_ACK_FS7inputTCELL20:IMUX.IMUX.1.DELAY
CTL_RX_PAUSE_ACK_FS8inputTCELL20:IMUX.IMUX.19.DELAY
CTL_TX_PAUSE_REQ_FS0inputTCELL23:IMUX.IMUX.35.DELAY
CTL_TX_PAUSE_REQ_FS1inputTCELL23:IMUX.IMUX.8.DELAY
CTL_TX_PAUSE_REQ_FS2inputTCELL23:IMUX.IMUX.7.DELAY
CTL_TX_PAUSE_REQ_FS3inputTCELL23:IMUX.IMUX.29.DELAY
CTL_TX_PAUSE_REQ_FS4inputTCELL23:IMUX.IMUX.5.DELAY
CTL_TX_PAUSE_REQ_FS5inputTCELL23:IMUX.IMUX.4.DELAY
CTL_TX_PAUSE_REQ_FS6inputTCELL23:IMUX.IMUX.25.DELAY
CTL_TX_PAUSE_REQ_FS7inputTCELL23:IMUX.IMUX.23.DELAY
CTL_TX_PAUSE_REQ_FS8inputTCELL23:IMUX.IMUX.2.DELAY
CTL_TX_RESEND_PAUSE_FSinputTCELL23:IMUX.IMUX.9.DELAY
CTL_TX_SEND_IDLE_FSinputTCELL23:IMUX.IMUX.10.DELAY
CTL_TX_SEND_LFI_FSinputTCELL23:IMUX.IMUX.41.DELAY
CTL_TX_SEND_RFI_FSinputTCELL23:IMUX.IMUX.12.DELAY
DADDR_FS0inputTCELL29:IMUX.IMUX.42.DELAY
DADDR_FS1inputTCELL28:IMUX.IMUX.6.DELAY
DADDR_FS2inputTCELL27:IMUX.IMUX.32.DELAY
DADDR_FS3inputTCELL29:IMUX.IMUX.13.DELAY
DADDR_FS4inputTCELL27:IMUX.IMUX.24.DELAY
DADDR_FS5inputTCELL27:IMUX.IMUX.41.DELAY
DADDR_FS6inputTCELL29:IMUX.IMUX.4.DELAY
DADDR_FS7inputTCELL27:IMUX.IMUX.4.DELAY
DADDR_FS8inputTCELL27:IMUX.IMUX.17.DELAY
DADDR_FS9inputTCELL28:IMUX.IMUX.30.DELAY
DCLK_FSinputTCELL29:IMUX.CTRL.3
DEN_FSinputTCELL29:IMUX.IMUX.46.DELAY
DFECFOKCFNUM_FS0inputTCELL17:IMUX.IMUX.24.DELAY
DFECFOKCFNUM_FS1inputTCELL17:IMUX.IMUX.18.DELAY
DFECFOKCFNUM_FS2inputTCELL17:IMUX.IMUX.47.DELAY
DFECFOKCFNUM_FS3inputTCELL17:IMUX.IMUX.13.DELAY
DFECFOKFEN_FSinputTCELL20:IMUX.IMUX.39.DELAY
DFECFOKFPULSE_FSinputTCELL20:IMUX.IMUX.12.DELAY
DFECFOKHOLD_FSinputTCELL19:IMUX.IMUX.24.DELAY
DFECFOKOVREN_FSinputTCELL20:IMUX.IMUX.45.DELAY
DFEDOUTMODE_FS0inputTCELL18:IMUX.IMUX.4.DELAY
DFEDOUTMODE_FS1inputTCELL18:IMUX.IMUX.1.DELAY
DFEDOUT_SF0outputTCELL29:OUT.5.TMIN
DFEDOUT_SF1outputTCELL29:OUT.7.TMIN
DFEDOUT_SF2outputTCELL27:OUT.5.TMIN
DFEDOUT_SF3outputTCELL26:OUT.5.TMIN
DFEDOUT_SF4outputTCELL25:OUT.5.TMIN
DFEDOUT_SF5outputTCELL29:OUT.25.TMIN
DFEDOUT_SF6outputTCELL28:OUT.25.TMIN
DFEDOUT_SF7outputTCELL25:OUT.24.TMIN
DFEGCHOLD_FSinputTCELL19:IMUX.IMUX.17.DELAY
DFEGCOVREN_FSinputTCELL19:IMUX.IMUX.1.DELAY
DFEH10HOLD_FSinputTCELL17:IMUX.IMUX.45.DELAY
DFEH10OVREN_FSinputTCELL17:IMUX.IMUX.12.DELAY
DFEH11HOLD_FSinputTCELL19:IMUX.IMUX.39.DELAY
DFEH11OVREN_FSinputTCELL19:IMUX.IMUX.9.DELAY
DFEH12HOLD_FSinputTCELL18:IMUX.IMUX.39.DELAY
DFEH12OVREN_FSinputTCELL18:IMUX.IMUX.9.DELAY
DFEH13HOLD_FSinputTCELL17:IMUX.IMUX.39.DELAY
DFEH13OVREN_FSinputTCELL17:IMUX.IMUX.9.DELAY
DFEH14HOLD_FSinputTCELL19:IMUX.IMUX.33.DELAY
DFEH14OVREN_FSinputTCELL19:IMUX.IMUX.6.DELAY
DFEH15HOLD_FSinputTCELL18:IMUX.IMUX.33.DELAY
DFEH15OVREN_FSinputTCELL18:IMUX.IMUX.6.DELAY
DFEH2HOLD_FSinputTCELL19:IMUX.IMUX.32.DELAY
DFEH2OVREN_FSinputTCELL19:IMUX.IMUX.26.DELAY
DFEH3HOLD_FSinputTCELL18:IMUX.IMUX.32.DELAY
DFEH3OVREN_FSinputTCELL18:IMUX.IMUX.26.DELAY
DFEH4HOLD_FSinputTCELL17:IMUX.IMUX.32.DELAY
DFEH4OVREN_FSinputTCELL17:IMUX.IMUX.26.DELAY
DFEH5HOLD_FSinputTCELL19:IMUX.IMUX.20.DELAY
DFEH5OVREN_FSinputTCELL19:IMUX.IMUX.15.DELAY
DFEH6HOLD_FSinputTCELL18:IMUX.IMUX.20.DELAY
DFEH6OVREN_FSinputTCELL18:IMUX.IMUX.15.DELAY
DFEH7HOLD_FSinputTCELL17:IMUX.IMUX.20.DELAY
DFEH7OVREN_FSinputTCELL17:IMUX.IMUX.15.DELAY
DFEH8HOLD_FSinputTCELL19:IMUX.IMUX.45.DELAY
DFEH8OVREN_FSinputTCELL19:IMUX.IMUX.12.DELAY
DFEH9HOLD_FSinputTCELL18:IMUX.IMUX.45.DELAY
DFEH9OVREN_FSinputTCELL18:IMUX.IMUX.12.DELAY
DFEKLHOLD_FSinputTCELL19:IMUX.IMUX.23.DELAY
DFEKLOVREN_FSinputTCELL19:IMUX.IMUX.4.DELAY
DFERESET_FSinputTCELL22:IMUX.CTRL.7
DFEUTHOLD_FSinputTCELL19:IMUX.IMUX.2.DELAY
DFEUTOVREN_FSinputTCELL19:IMUX.IMUX.25.DELAY
DFEVPHOLD_FSinputTCELL18:IMUX.IMUX.2.DELAY
DFEVPOVREN_FSinputTCELL18:IMUX.IMUX.25.DELAY
DFEYEN_FSinputTCELL18:IMUX.IMUX.19.DELAY
DFE_KH_EXTHOLD_FSinputTCELL28:IMUX.IMUX.19.DELAY
DFE_KH_OVERWREN_FSinputTCELL25:IMUX.IMUX.21.DELAY
DI_FS0inputTCELL29:IMUX.IMUX.36.DELAY
DI_FS1inputTCELL27:IMUX.IMUX.42.DELAY
DI_FS10inputTCELL26:IMUX.IMUX.30.DELAY
DI_FS11inputTCELL28:IMUX.IMUX.41.DELAY
DI_FS12inputTCELL28:IMUX.IMUX.35.DELAY
DI_FS13inputTCELL28:IMUX.IMUX.29.DELAY
DI_FS14inputTCELL28:IMUX.IMUX.23.DELAY
DI_FS15inputTCELL28:IMUX.IMUX.17.DELAY
DI_FS2inputTCELL29:IMUX.IMUX.47.DELAY
DI_FS3inputTCELL29:IMUX.IMUX.41.DELAY
DI_FS4inputTCELL27:IMUX.IMUX.47.DELAY
DI_FS5inputTCELL27:IMUX.IMUX.8.DELAY
DI_FS6inputTCELL29:IMUX.IMUX.23.DELAY
DI_FS7inputTCELL27:IMUX.IMUX.2.DELAY
DI_FS8inputTCELL26:IMUX.IMUX.42.DELAY
DI_FS9inputTCELL28:IMUX.IMUX.24.DELAY
DMONCLK_FSinputTCELL29:IMUX.CTRL.2
DMONFIFORESET_FSinputTCELL27:IMUX.IMUX.1.DELAY
DMONOUT_SF0outputTCELL29:OUT.4.TMIN
DMONOUT_SF1outputTCELL29:OUT.1.TMIN
DMONOUT_SF10outputTCELL29:OUT.16.TMIN
DMONOUT_SF11outputTCELL29:OUT.28.TMIN
DMONOUT_SF12outputTCELL25:OUT.19.TMIN
DMONOUT_SF13outputTCELL26:OUT.16.TMIN
DMONOUT_SF14outputTCELL25:OUT.16.TMIN
DMONOUT_SF15outputTCELL29:OUT.22.TMIN
DMONOUT_SF2outputTCELL27:OUT.4.TMIN
DMONOUT_SF3outputTCELL26:OUT.4.TMIN
DMONOUT_SF4outputTCELL25:OUT.4.TMIN
DMONOUT_SF5outputTCELL29:OUT.10.TMIN
DMONOUT_SF6outputTCELL29:OUT.19.TMIN
DMONOUT_SF7outputTCELL24:OUT.26.TMIN
DMONOUT_SF8outputTCELL26:OUT.10.TMIN
DMONOUT_SF9outputTCELL25:OUT.10.TMIN
DRDY_SFoutputTCELL26:OUT.24.TMIN
DRPDO_SF0outputTCELL29:OUT.0.TMIN
DRPDO_SF1outputTCELL28:OUT.24.TMIN
DRPDO_SF10outputTCELL29:OUT.12.TMIN
DRPDO_SF11outputTCELL29:OUT.21.TMIN
DRPDO_SF12outputTCELL24:OUT.28.TMIN
DRPDO_SF13outputTCELL26:OUT.12.TMIN
DRPDO_SF14outputTCELL25:OUT.12.TMIN
DRPDO_SF15outputTCELL29:OUT.18.TMIN
DRPDO_SF2outputTCELL27:OUT.0.TMIN
DRPDO_SF3outputTCELL26:OUT.0.TMIN
DRPDO_SF4outputTCELL25:OUT.0.TMIN
DRPDO_SF5outputTCELL29:OUT.6.TMIN
DRPDO_SF6outputTCELL29:OUT.11.TMIN
DRPDO_SF7outputTCELL27:OUT.6.TMIN
DRPDO_SF8outputTCELL26:OUT.6.TMIN
DRPDO_SF9outputTCELL25:OUT.6.TMIN
DRST_FSinputTCELL28:IMUX.CTRL.4
DWE_FSinputTCELL29:IMUX.IMUX.40.DELAY
ENPPM_FSinputTCELL26:IMUX.IMUX.12.DELAY
EYESCANDATAERROR_SFoutputTCELL28:OUT.30.TMIN
EYESCANTRIGGER_FSinputTCELL29:IMUX.IMUX.22.DELAY
FREQOS_FSinputTCELL27:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL21:IMUX.IMUX.40.DELAY
GATERXELECIDLE_FS1inputTCELL21:IMUX.IMUX.32.DELAY
GTPOWERGOOD_SFoutputTCELL25:OUT.9.TMIN
GTRXRSTSEL_FSinputTCELL28:IMUX.IMUX.13.DELAY
GTRXRST_FSinputTCELL20:IMUX.CTRL.7
GTTXRSTSEL_FSinputTCELL27:IMUX.IMUX.30.DELAY
GTTXRST_FSinputTCELL25:IMUX.CTRL.7
INCPCTRL_FSinputTCELL27:IMUX.IMUX.15.DELAY
ISCANRESET_FSinputTCELL28:IMUX.IMUX.5.DELAY
LOOPBACK_FS0inputTCELL27:IMUX.IMUX.40.DELAY
LOOPBACK_FS1inputTCELL27:IMUX.IMUX.34.DELAY
LOOPBACK_FS2inputTCELL27:IMUX.IMUX.28.DELAY
LPMGCHOLD_FSinputTCELL17:IMUX.IMUX.8.DELAY
LPMGCOVREN_FSinputTCELL17:IMUX.IMUX.6.DELAY
LPMKHHOLD_FSinputTCELL17:IMUX.IMUX.35.DELAY
LPMKHOVREN_FSinputTCELL18:IMUX.IMUX.8.DELAY
LPMKLHOLD_FSinputTCELL17:IMUX.IMUX.10.DELAY
LPMKLOVREN_FSinputTCELL17:IMUX.IMUX.41.DELAY
LPMOSHOLD_FSinputTCELL18:IMUX.IMUX.22.DELAY
LPMOSOVREN_FSinputTCELL18:IMUX.IMUX.13.DELAY
MGTREFCLKFA_SFoutputTCELL29:OUT.3.TMIN
OSHOLD_FSinputTCELL19:IMUX.IMUX.41.DELAY
OSOVREN_FSinputTCELL20:IMUX.IMUX.15.DELAY
PCS_RSVD_IN_FS0inputTCELL24:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS1inputTCELL24:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS10inputTCELL19:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS11inputTCELL19:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS12inputTCELL18:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS13inputTCELL18:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS14inputTCELL17:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS15inputTCELL17:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS2inputTCELL23:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS3inputTCELL23:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS4inputTCELL22:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS5inputTCELL22:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS6inputTCELL21:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS7inputTCELL21:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS8inputTCELL20:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS9inputTCELL20:IMUX.IMUX.3.DELAY
PCS_RSVD_OUT_SF0outputTCELL24:OUT.9.TMIN
PCS_RSVD_OUT_SF1outputTCELL23:OUT.9.TMIN
PCS_RSVD_OUT_SF10outputTCELL22:OUT.11.TMIN
PCS_RSVD_OUT_SF11outputTCELL21:OUT.11.TMIN
PCS_RSVD_OUT_SF12outputTCELL20:OUT.11.TMIN
PCS_RSVD_OUT_SF13outputTCELL19:OUT.11.TMIN
PCS_RSVD_OUT_SF14outputTCELL18:OUT.11.TMIN
PCS_RSVD_OUT_SF15outputTCELL17:OUT.11.TMIN
PCS_RSVD_OUT_SF2outputTCELL22:OUT.9.TMIN
PCS_RSVD_OUT_SF3outputTCELL21:OUT.9.TMIN
PCS_RSVD_OUT_SF4outputTCELL20:OUT.9.TMIN
PCS_RSVD_OUT_SF5outputTCELL19:OUT.9.TMIN
PCS_RSVD_OUT_SF6outputTCELL18:OUT.9.TMIN
PCS_RSVD_OUT_SF7outputTCELL17:OUT.9.TMIN
PCS_RSVD_OUT_SF8outputTCELL24:OUT.11.TMIN
PCS_RSVD_OUT_SF9outputTCELL23:OUT.11.TMIN
PINRSRVDAS_SF0outputTCELL28:OUT.22.TMIN
PINRSRVDAS_SF1outputTCELL24:OUT.22.TMIN
PINRSRVDAS_SF10outputTCELL29:OUT.15.TMIN
PINRSRVDAS_SF11outputTCELL24:OUT.24.TMIN
PINRSRVDAS_SF12outputTCELL26:OUT.30.TMIN
PINRSRVDAS_SF13outputTCELL25:OUT.15.TMIN
PINRSRVDAS_SF14outputTCELL25:OUT.30.TMIN
PINRSRVDAS_SF15outputTCELL25:OUT.3.TMIN
PINRSRVDAS_SF2outputTCELL26:OUT.22.TMIN
PINRSRVDAS_SF3outputTCELL25:OUT.22.TMIN
PINRSRVDAS_SF4outputTCELL28:OUT.26.TMIN
PINRSRVDAS_SF5outputTCELL27:OUT.1.TMIN
PINRSRVDAS_SF6outputTCELL26:OUT.1.TMIN
PINRSRVDAS_SF7outputTCELL25:OUT.1.TMIN
PINRSRVDAS_SF8outputTCELL29:OUT.9.TMIN
PINRSRVDAS_SF9outputTCELL29:OUT.26.TMIN
PINRSRVD_FS0inputTCELL24:IMUX.IMUX.21.DELAY
PINRSRVD_FS1inputTCELL24:IMUX.IMUX.0.DELAY
PINRSRVD_FS10inputTCELL19:IMUX.IMUX.21.DELAY
PINRSRVD_FS11inputTCELL19:IMUX.IMUX.0.DELAY
PINRSRVD_FS12inputTCELL18:IMUX.IMUX.21.DELAY
PINRSRVD_FS13inputTCELL18:IMUX.IMUX.0.DELAY
PINRSRVD_FS14inputTCELL17:IMUX.IMUX.21.DELAY
PINRSRVD_FS15inputTCELL17:IMUX.IMUX.0.DELAY
PINRSRVD_FS2inputTCELL23:IMUX.IMUX.21.DELAY
PINRSRVD_FS3inputTCELL23:IMUX.IMUX.0.DELAY
PINRSRVD_FS4inputTCELL22:IMUX.IMUX.21.DELAY
PINRSRVD_FS5inputTCELL22:IMUX.IMUX.0.DELAY
PINRSRVD_FS6inputTCELL21:IMUX.IMUX.21.DELAY
PINRSRVD_FS7inputTCELL21:IMUX.IMUX.0.DELAY
PINRSRVD_FS8inputTCELL20:IMUX.IMUX.21.DELAY
PINRSRVD_FS9inputTCELL20:IMUX.IMUX.0.DELAY
PMASCANCLK0_FSinputTCELL19:IMUX.CTRL.2
PMASCANCLK1_FSinputTCELL19:IMUX.CTRL.3
PMASCANCLK2_FSinputTCELL25:IMUX.CTRL.2
PMASCANCLK3_FSinputTCELL25:IMUX.CTRL.3
PMASCANCLK4_FSinputTCELL27:IMUX.CTRL.2
PMASCANCLK5_FSinputTCELL27:IMUX.CTRL.1
PMASCANCLK6_FSinputTCELL23:IMUX.CTRL.5
PMASCANCLK7_FSinputTCELL23:IMUX.CTRL.4
PMASCANCLK8_FSinputTCELL21:IMUX.CTRL.5
PMASCANENB_FSinputTCELL28:IMUX.IMUX.27.DELAY
PMASCANIN_FS0inputTCELL28:IMUX.IMUX.3.DELAY
PMASCANIN_FS1inputTCELL27:IMUX.IMUX.27.DELAY
PMASCANIN_FS10inputTCELL27:IMUX.IMUX.29.DELAY
PMASCANIN_FS11inputTCELL27:IMUX.IMUX.25.DELAY
PMASCANIN_FS12inputTCELL27:IMUX.IMUX.5.DELAY
PMASCANIN_FS13inputTCELL27:IMUX.IMUX.23.DELAY
PMASCANIN_FS14inputTCELL28:IMUX.IMUX.21.DELAY
PMASCANIN_FS15inputTCELL28:IMUX.IMUX.0.DELAY
PMASCANIN_FS16inputTCELL27:IMUX.IMUX.21.DELAY
PMASCANIN_FS17inputTCELL27:IMUX.IMUX.0.DELAY
PMASCANIN_FS2inputTCELL27:IMUX.IMUX.3.DELAY
PMASCANIN_FS3inputTCELL26:IMUX.IMUX.27.DELAY
PMASCANIN_FS4inputTCELL26:IMUX.IMUX.3.DELAY
PMASCANIN_FS5inputTCELL25:IMUX.IMUX.27.DELAY
PMASCANIN_FS6inputTCELL25:IMUX.IMUX.3.DELAY
PMASCANIN_FS7inputTCELL27:IMUX.IMUX.35.DELAY
PMASCANIN_FS8inputTCELL27:IMUX.IMUX.33.DELAY
PMASCANIN_FS9inputTCELL29:IMUX.IMUX.25.DELAY
PMASCANMODEB_FSinputTCELL27:IMUX.IMUX.6.DELAY
PMASCANOUT_SF0outputTCELL29:OUT.2.TMIN
PMASCANOUT_SF1outputTCELL28:OUT.28.TMIN
PMASCANOUT_SF10outputTCELL25:OUT.20.TMIN
PMASCANOUT_SF11outputTCELL26:OUT.17.TMIN
PMASCANOUT_SF12outputTCELL24:OUT.31.TMIN
PMASCANOUT_SF13outputTCELL22:OUT.21.TMIN
PMASCANOUT_SF14outputTCELL21:OUT.21.TMIN
PMASCANOUT_SF15outputTCELL20:OUT.21.TMIN
PMASCANOUT_SF16outputTCELL19:OUT.21.TMIN
PMASCANOUT_SF17outputTCELL18:OUT.21.TMIN
PMASCANOUT_SF2outputTCELL27:OUT.2.TMIN
PMASCANOUT_SF3outputTCELL26:OUT.2.TMIN
PMASCANOUT_SF4outputTCELL25:OUT.2.TMIN
PMASCANOUT_SF5outputTCELL29:OUT.14.TMIN
PMASCANOUT_SF6outputTCELL29:OUT.24.TMIN
PMASCANOUT_SF7outputTCELL25:OUT.17.TMIN
PMASCANOUT_SF8outputTCELL29:OUT.17.TMIN
PMASCANOUT_SF9outputTCELL29:OUT.30.TMIN
PMASCANRSTEN_FSinputTCELL27:IMUX.IMUX.7.DELAY
PRBSCNTRST_FSinputTCELL21:IMUX.IMUX.22.DELAY
QPLLFREQLOCK0_FSinputTCELL24:IMUX.IMUX.15.DELAY
QPLLFREQLOCK1_FSinputTCELL19:IMUX.IMUX.40.DELAY
RCODAPWDN_FSinputTCELL21:IMUX.IMUX.45.DELAY
RCODARESET_FSinputTCELL20:IMUX.CTRL.0
RDASOFTRSTDONE_SFoutputTCELL24:OUT.25.TMIN
RESETOVRD_FSinputTCELL22:IMUX.IMUX.44.DELAY
RESET_EXCEPTION_SFoutputTCELL25:OUT.13.TMIN
RXCDRPHDONE_SFoutputTCELL26:OUT.11.TMIN
RXCKCALSTART_FS0inputTCELL19:IMUX.IMUX.18.DELAY
RXCKCALSTART_FS1inputTCELL19:IMUX.IMUX.10.DELAY
RXCKCALSTART_FS2inputTCELL18:IMUX.IMUX.18.DELAY
RXCKCALSTART_FS3inputTCELL18:IMUX.IMUX.43.DELAY
RXCKCALSTART_FS4inputTCELL17:IMUX.IMUX.11.DELAY
RXCKCALSTART_FS5inputTCELL17:IMUX.IMUX.33.DELAY
RXCKCALSTART_FS6inputTCELL17:IMUX.IMUX.23.DELAY
RXCOALGNEN_FSinputTCELL21:IMUX.IMUX.12.DELAY
RXCOPHDONE_SFoutputTCELL25:OUT.23.TMIN
RXCOSETPHS_FSinputTCELL21:IMUX.IMUX.11.DELAY
RXDAALGNEN_FSinputTCELL17:IMUX.IMUX.31.DELAY
RXDABYPASS_FSinputTCELL17:IMUX.IMUX.5.DELAY
RXDAOVREN_FSinputTCELL17:IMUX.IMUX.7.DELAY
RXDASOFTRESET_FSinputTCELL18:IMUX.CTRL.0
RXELECIDLE_SFoutputTCELL24:OUT.29.TMIN
RXLINKSYNCDONE_SFoutputTCELL25:OUT.18.TMIN
RXLPMEN_FSinputTCELL18:IMUX.IMUX.7.DELAY
RXMSTRSETPHDONE_FSinputTCELL18:IMUX.IMUX.29.DELAY
RXOUTCKCTL_FS0inputTCELL21:IMUX.IMUX.9.DELAY
RXOUTCKCTL_FS1inputTCELL20:IMUX.IMUX.9.DELAY
RXOUTCKCTL_FS2inputTCELL20:IMUX.IMUX.6.DELAY
RXPHALIGNERR_SFoutputTCELL26:OUT.7.TMIN
RXPLLCKSEL_FS0inputTCELL20:IMUX.IMUX.38.DELAY
RXPLLCKSEL_FS1inputTCELL19:IMUX.IMUX.38.DELAY
RXPMARESETDONE_SFoutputTCELL25:OUT.29.TMIN
RXPMARESET_FSinputTCELL21:IMUX.CTRL.0
RXPOLARITY_FSinputTCELL21:IMUX.IMUX.20.DELAY
RXPRBSERR_SFoutputTCELL17:OUT.23.TMIN
RXPRBSLOCKED_SFoutputTCELL24:OUT.23.TMIN
RXPRBSPTN_FS0inputTCELL17:IMUX.IMUX.42.DELAY
RXPRBSPTN_FS1inputTCELL17:IMUX.IMUX.36.DELAY
RXPRBSPTN_FS2inputTCELL17:IMUX.IMUX.30.DELAY
RXPRBSPTN_FS3inputTCELL17:IMUX.IMUX.46.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL25:OUT.11.TMIN
RXPROGDIVRESET_FSinputTCELL19:IMUX.CTRL.0
RXPWRDN_FS0inputTCELL18:IMUX.IMUX.38.DELAY
RXPWRDN_FS1inputTCELL17:IMUX.IMUX.38.DELAY
RXRAWDATA_SF0outputTCELL28:OUT.20.TMIN
RXRAWDATA_SF1outputTCELL28:OUT.17.TMIN
RXRAWDATA_SF10outputTCELL28:OUT.8.TMIN
RXRAWDATA_SF11outputTCELL28:OUT.7.TMIN
RXRAWDATA_SF12outputTCELL28:OUT.6.TMIN
RXRAWDATA_SF13outputTCELL28:OUT.5.TMIN
RXRAWDATA_SF14outputTCELL28:OUT.4.TMIN
RXRAWDATA_SF15outputTCELL28:OUT.3.TMIN
RXRAWDATA_SF16outputTCELL28:OUT.2.TMIN
RXRAWDATA_SF17outputTCELL28:OUT.1.TMIN
RXRAWDATA_SF18outputTCELL28:OUT.0.TMIN
RXRAWDATA_SF19outputTCELL27:OUT.31.TMIN
RXRAWDATA_SF2outputTCELL28:OUT.16.TMIN
RXRAWDATA_SF20outputTCELL27:OUT.30.TMIN
RXRAWDATA_SF21outputTCELL27:OUT.29.TMIN
RXRAWDATA_SF22outputTCELL27:OUT.28.TMIN
RXRAWDATA_SF23outputTCELL27:OUT.27.TMIN
RXRAWDATA_SF24outputTCELL27:OUT.26.TMIN
RXRAWDATA_SF25outputTCELL27:OUT.24.TMIN
RXRAWDATA_SF26outputTCELL27:OUT.23.TMIN
RXRAWDATA_SF27outputTCELL27:OUT.22.TMIN
RXRAWDATA_SF28outputTCELL27:OUT.21.TMIN
RXRAWDATA_SF29outputTCELL27:OUT.19.TMIN
RXRAWDATA_SF3outputTCELL28:OUT.15.TMIN
RXRAWDATA_SF30outputTCELL27:OUT.18.TMIN
RXRAWDATA_SF31outputTCELL27:OUT.17.TMIN
RXRAWDATA_SF32outputTCELL27:OUT.16.TMIN
RXRAWDATA_SF33outputTCELL27:OUT.15.TMIN
RXRAWDATA_SF34outputTCELL27:OUT.14.TMIN
RXRAWDATA_SF35outputTCELL27:OUT.13.TMIN
RXRAWDATA_SF36outputTCELL27:OUT.12.TMIN
RXRAWDATA_SF37outputTCELL27:OUT.11.TMIN
RXRAWDATA_SF38outputTCELL27:OUT.10.TMIN
RXRAWDATA_SF39outputTCELL27:OUT.9.TMIN
RXRAWDATA_SF4outputTCELL28:OUT.14.TMIN
RXRAWDATA_SF5outputTCELL28:OUT.13.TMIN
RXRAWDATA_SF6outputTCELL28:OUT.12.TMIN
RXRAWDATA_SF7outputTCELL28:OUT.11.TMIN
RXRAWDATA_SF8outputTCELL28:OUT.10.TMIN
RXRAWDATA_SF9outputTCELL28:OUT.9.TMIN
RXRECCLKPCS_SFoutputTCELL22:OUT.23.TMIN
RXRECCLK_SFoutputTCELL23:OUT.23.TMIN
RXRESETDONE_SFoutputTCELL17:OUT.21.TMIN
RXRESET_FSinputTCELL20:IMUX.IMUX.20.DELAY
RXSLIPDONE_SFoutputTCELL25:OUT.21.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL25:OUT.26.TMIN
RXSLIPOUTCLK_FSinputTCELL17:IMUX.IMUX.2.DELAY
RXSLIPPMARDY_SFoutputTCELL25:OUT.28.TMIN
RXSLIPPMA_FSinputTCELL17:IMUX.IMUX.29.DELAY
RXSLVSYNCEN_FSinputTCELL18:IMUX.IMUX.10.DELAY
RXSYNCEN2SLV_SFoutputTCELL25:OUT.27.TMIN
RXSYNCFSMMASTER_FSinputTCELL18:IMUX.IMUX.41.DELAY
RXSYSCKSEL_FS0inputTCELL20:IMUX.IMUX.37.DELAY
RXSYSCKSEL_FS1inputTCELL21:IMUX.IMUX.38.DELAY
RXTERMINATION_FSinputTCELL26:IMUX.IMUX.32.DELAY
RXUSRCLK2_FSinputTCELL20:IMUX.CTRL.3
RXUSRCLK_FSinputTCELL20:IMUX.CTRL.2
RXUSRRDY_FSinputTCELL18:IMUX.IMUX.35.DELAY
RX_AXIS_TDATA_SF0outputTCELL21:OUT.16.TMIN
RX_AXIS_TDATA_SF1outputTCELL21:OUT.15.TMIN
RX_AXIS_TDATA_SF10outputTCELL21:OUT.4.TMIN
RX_AXIS_TDATA_SF11outputTCELL21:OUT.3.TMIN
RX_AXIS_TDATA_SF12outputTCELL21:OUT.2.TMIN
RX_AXIS_TDATA_SF13outputTCELL21:OUT.1.TMIN
RX_AXIS_TDATA_SF14outputTCELL21:OUT.0.TMIN
RX_AXIS_TDATA_SF15outputTCELL20:OUT.31.TMIN
RX_AXIS_TDATA_SF16outputTCELL20:OUT.30.TMIN
RX_AXIS_TDATA_SF17outputTCELL20:OUT.29.TMIN
RX_AXIS_TDATA_SF18outputTCELL20:OUT.28.TMIN
RX_AXIS_TDATA_SF19outputTCELL20:OUT.27.TMIN
RX_AXIS_TDATA_SF2outputTCELL21:OUT.14.TMIN
RX_AXIS_TDATA_SF20outputTCELL20:OUT.26.TMIN
RX_AXIS_TDATA_SF21outputTCELL20:OUT.25.TMIN
RX_AXIS_TDATA_SF22outputTCELL20:OUT.24.TMIN
RX_AXIS_TDATA_SF23outputTCELL20:OUT.23.TMIN
RX_AXIS_TDATA_SF24outputTCELL20:OUT.22.TMIN
RX_AXIS_TDATA_SF25outputTCELL20:OUT.20.TMIN
RX_AXIS_TDATA_SF26outputTCELL20:OUT.19.TMIN
RX_AXIS_TDATA_SF27outputTCELL20:OUT.18.TMIN
RX_AXIS_TDATA_SF28outputTCELL20:OUT.17.TMIN
RX_AXIS_TDATA_SF29outputTCELL20:OUT.16.TMIN
RX_AXIS_TDATA_SF3outputTCELL21:OUT.13.TMIN
RX_AXIS_TDATA_SF30outputTCELL20:OUT.15.TMIN
RX_AXIS_TDATA_SF31outputTCELL20:OUT.14.TMIN
RX_AXIS_TDATA_SF32outputTCELL20:OUT.13.TMIN
RX_AXIS_TDATA_SF33outputTCELL20:OUT.12.TMIN
RX_AXIS_TDATA_SF34outputTCELL20:OUT.10.TMIN
RX_AXIS_TDATA_SF35outputTCELL20:OUT.8.TMIN
RX_AXIS_TDATA_SF36outputTCELL20:OUT.7.TMIN
RX_AXIS_TDATA_SF37outputTCELL20:OUT.6.TMIN
RX_AXIS_TDATA_SF38outputTCELL20:OUT.5.TMIN
RX_AXIS_TDATA_SF39outputTCELL20:OUT.4.TMIN
RX_AXIS_TDATA_SF4outputTCELL21:OUT.12.TMIN
RX_AXIS_TDATA_SF40outputTCELL20:OUT.3.TMIN
RX_AXIS_TDATA_SF41outputTCELL20:OUT.2.TMIN
RX_AXIS_TDATA_SF42outputTCELL20:OUT.1.TMIN
RX_AXIS_TDATA_SF43outputTCELL20:OUT.0.TMIN
RX_AXIS_TDATA_SF44outputTCELL19:OUT.31.TMIN
RX_AXIS_TDATA_SF45outputTCELL19:OUT.30.TMIN
RX_AXIS_TDATA_SF46outputTCELL19:OUT.29.TMIN
RX_AXIS_TDATA_SF47outputTCELL19:OUT.28.TMIN
RX_AXIS_TDATA_SF48outputTCELL19:OUT.27.TMIN
RX_AXIS_TDATA_SF49outputTCELL19:OUT.26.TMIN
RX_AXIS_TDATA_SF5outputTCELL21:OUT.10.TMIN
RX_AXIS_TDATA_SF50outputTCELL19:OUT.25.TMIN
RX_AXIS_TDATA_SF51outputTCELL19:OUT.24.TMIN
RX_AXIS_TDATA_SF52outputTCELL19:OUT.23.TMIN
RX_AXIS_TDATA_SF53outputTCELL19:OUT.22.TMIN
RX_AXIS_TDATA_SF54outputTCELL19:OUT.20.TMIN
RX_AXIS_TDATA_SF55outputTCELL19:OUT.19.TMIN
RX_AXIS_TDATA_SF56outputTCELL19:OUT.18.TMIN
RX_AXIS_TDATA_SF57outputTCELL19:OUT.17.TMIN
RX_AXIS_TDATA_SF58outputTCELL19:OUT.16.TMIN
RX_AXIS_TDATA_SF59outputTCELL19:OUT.15.TMIN
RX_AXIS_TDATA_SF6outputTCELL21:OUT.8.TMIN
RX_AXIS_TDATA_SF60outputTCELL19:OUT.14.TMIN
RX_AXIS_TDATA_SF61outputTCELL19:OUT.13.TMIN
RX_AXIS_TDATA_SF62outputTCELL19:OUT.12.TMIN
RX_AXIS_TDATA_SF63outputTCELL19:OUT.10.TMIN
RX_AXIS_TDATA_SF7outputTCELL21:OUT.7.TMIN
RX_AXIS_TDATA_SF8outputTCELL21:OUT.6.TMIN
RX_AXIS_TDATA_SF9outputTCELL21:OUT.5.TMIN
RX_AXIS_TERR_SFoutputTCELL21:OUT.17.TMIN
RX_AXIS_TLAST_SF0outputTCELL21:OUT.26.TMIN
RX_AXIS_TLAST_SF1outputTCELL21:OUT.25.TMIN
RX_AXIS_TLAST_SF2outputTCELL21:OUT.24.TMIN
RX_AXIS_TLAST_SF3outputTCELL21:OUT.23.TMIN
RX_AXIS_TLAST_SF4outputTCELL21:OUT.22.TMIN
RX_AXIS_TLAST_SF5outputTCELL21:OUT.20.TMIN
RX_AXIS_TLAST_SF6outputTCELL21:OUT.19.TMIN
RX_AXIS_TLAST_SF7outputTCELL21:OUT.18.TMIN
RX_AXIS_TPRE_SF0outputTCELL22:OUT.2.TMIN
RX_AXIS_TPRE_SF1outputTCELL22:OUT.1.TMIN
RX_AXIS_TPRE_SF2outputTCELL22:OUT.0.TMIN
RX_AXIS_TPRE_SF3outputTCELL21:OUT.31.TMIN
RX_AXIS_TPRE_SF4outputTCELL21:OUT.30.TMIN
RX_AXIS_TPRE_SF5outputTCELL21:OUT.29.TMIN
RX_AXIS_TPRE_SF6outputTCELL21:OUT.28.TMIN
RX_AXIS_TPRE_SF7outputTCELL21:OUT.27.TMIN
RX_AXIS_TSOF_SF0outputTCELL22:OUT.4.TMIN
RX_AXIS_TSOF_SF1outputTCELL22:OUT.3.TMIN
RX_AXIS_TTERM_SF0outputTCELL22:OUT.10.TMIN
RX_AXIS_TTERM_SF1outputTCELL22:OUT.8.TMIN
RX_AXIS_TTERM_SF2outputTCELL22:OUT.7.TMIN
RX_AXIS_TTERM_SF3outputTCELL22:OUT.6.TMIN
RX_AXIS_TTERM_SF4outputTCELL22:OUT.5.TMIN
RX_AXIS_TVALID_SFoutputTCELL22:OUT.12.TMIN
RX_BITSLIP_SFoutputTCELL22:OUT.13.TMIN
RX_GB_SEQ_START_SFoutputTCELL22:OUT.14.TMIN
RX_PTP_SOP_POS_SFoutputTCELL22:OUT.16.TMIN
RX_PTP_SOP_SFoutputTCELL22:OUT.15.TMIN
SCANCLK_FSinputTCELL22:IMUX.CTRL.2
SCANENB_FSinputTCELL28:IMUX.IMUX.4.DELAY
SCANIN_FS0inputTCELL27:IMUX.IMUX.18.DELAY
SCANIN_FS1inputTCELL28:IMUX.IMUX.37.DELAY
SCANIN_FS10inputTCELL26:IMUX.IMUX.24.DELAY
SCANIN_FS11inputTCELL29:IMUX.IMUX.14.DELAY
SCANIN_FS12inputTCELL27:IMUX.IMUX.43.DELAY
SCANIN_FS13inputTCELL27:IMUX.IMUX.44.DELAY
SCANIN_FS14inputTCELL20:IMUX.IMUX.32.DELAY
SCANIN_FS15inputTCELL20:IMUX.IMUX.26.DELAY
SCANIN_FS16inputTCELL19:IMUX.IMUX.44.DELAY
SCANIN_FS17inputTCELL18:IMUX.IMUX.44.DELAY
SCANIN_FS18inputTCELL17:IMUX.IMUX.44.DELAY
SCANIN_FS2inputTCELL27:IMUX.IMUX.13.DELAY
SCANIN_FS3inputTCELL28:IMUX.IMUX.8.DELAY
SCANIN_FS4inputTCELL27:IMUX.IMUX.10.DELAY
SCANIN_FS5inputTCELL28:IMUX.IMUX.31.DELAY
SCANIN_FS6inputTCELL26:IMUX.IMUX.47.DELAY
SCANIN_FS7inputTCELL29:IMUX.IMUX.11.DELAY
SCANIN_FS8inputTCELL26:IMUX.IMUX.16.DELAY
SCANIN_FS9inputTCELL29:IMUX.IMUX.43.DELAY
SCANMODEB_FSinputTCELL28:IMUX.IMUX.7.DELAY
SCANOUT_SF0outputTCELL29:OUT.8.TMIN
SCANOUT_SF1outputTCELL29:OUT.13.TMIN
SCANOUT_SF10outputTCELL26:OUT.28.TMIN
SCANOUT_SF11outputTCELL29:OUT.27.TMIN
SCANOUT_SF12outputTCELL28:OUT.27.TMIN
SCANOUT_SF13outputTCELL26:OUT.27.TMIN
SCANOUT_SF14outputTCELL29:OUT.23.TMIN
SCANOUT_SF15outputTCELL28:OUT.23.TMIN
SCANOUT_SF16outputTCELL26:OUT.9.TMIN
SCANOUT_SF17outputTCELL26:OUT.21.TMIN
SCANOUT_SF18outputTCELL26:OUT.19.TMIN
SCANOUT_SF2outputTCELL27:OUT.8.TMIN
SCANOUT_SF3outputTCELL26:OUT.8.TMIN
SCANOUT_SF4outputTCELL25:OUT.8.TMIN
SCANOUT_SF5outputTCELL29:OUT.20.TMIN
SCANOUT_SF6outputTCELL29:OUT.31.TMIN
SCANOUT_SF7outputTCELL28:OUT.31.TMIN
SCANOUT_SF8outputTCELL29:OUT.29.TMIN
SCANOUT_SF9outputTCELL28:OUT.29.TMIN
SCANRSTB_FSinputTCELL28:IMUX.IMUX.25.DELAY
SCANRSTEN_FSinputTCELL28:IMUX.IMUX.2.DELAY
STAT_RX_BAD_CODE_SFoutputTCELL22:OUT.17.TMIN
STAT_RX_BAD_FCS_SFoutputTCELL17:OUT.25.TMIN
STAT_RX_BAD_PREAMBLE_SFoutputTCELL22:OUT.19.TMIN
STAT_RX_BAD_SFD_SFoutputTCELL22:OUT.18.TMIN
STAT_RX_BLOCK_LOCK_SFoutputTCELL22:OUT.20.TMIN
STAT_RX_BROADCAST_SFoutputTCELL22:OUT.22.TMIN
STAT_RX_BYTES_SF0outputTCELL22:OUT.27.TMIN
STAT_RX_BYTES_SF1outputTCELL22:OUT.26.TMIN
STAT_RX_BYTES_SF2outputTCELL22:OUT.25.TMIN
STAT_RX_BYTES_SF3outputTCELL22:OUT.24.TMIN
STAT_RX_FCS_ERR_SFoutputTCELL22:OUT.28.TMIN
STAT_RX_FRAMING_ERR_SFoutputTCELL22:OUT.29.TMIN
STAT_RX_GOT_SIGNAL_OS_SFoutputTCELL22:OUT.30.TMIN
STAT_RX_HI_BER_SFoutputTCELL22:OUT.31.TMIN
STAT_RX_INRANGEERR_SFoutputTCELL17:OUT.29.TMIN
STAT_RX_INTERNAL_LOCAL_FAULT_SFoutputTCELL17:OUT.24.TMIN
STAT_RX_LOCAL_FAULT_SFoutputTCELL17:OUT.30.TMIN
STAT_RX_MULTICAST_SFoutputTCELL17:OUT.31.TMIN
STAT_RX_PAUSE_QUANTA_SF0outputTCELL18:OUT.8.TMIN
STAT_RX_PAUSE_QUANTA_SF1outputTCELL18:OUT.7.TMIN
STAT_RX_PAUSE_QUANTA_SF2outputTCELL18:OUT.6.TMIN
STAT_RX_PAUSE_QUANTA_SF3outputTCELL18:OUT.5.TMIN
STAT_RX_PAUSE_QUANTA_SF4outputTCELL18:OUT.4.TMIN
STAT_RX_PAUSE_QUANTA_SF5outputTCELL18:OUT.3.TMIN
STAT_RX_PAUSE_QUANTA_SF6outputTCELL18:OUT.2.TMIN
STAT_RX_PAUSE_QUANTA_SF7outputTCELL18:OUT.1.TMIN
STAT_RX_PAUSE_QUANTA_SF8outputTCELL18:OUT.0.TMIN
STAT_RX_PAUSE_REQ_SF0outputTCELL18:OUT.20.TMIN
STAT_RX_PAUSE_REQ_SF1outputTCELL18:OUT.18.TMIN
STAT_RX_PAUSE_REQ_SF2outputTCELL18:OUT.17.TMIN
STAT_RX_PAUSE_REQ_SF3outputTCELL18:OUT.16.TMIN
STAT_RX_PAUSE_REQ_SF4outputTCELL18:OUT.15.TMIN
STAT_RX_PAUSE_REQ_SF5outputTCELL18:OUT.14.TMIN
STAT_RX_PAUSE_REQ_SF6outputTCELL18:OUT.13.TMIN
STAT_RX_PAUSE_REQ_SF7outputTCELL18:OUT.12.TMIN
STAT_RX_PAUSE_REQ_SF8outputTCELL18:OUT.10.TMIN
STAT_RX_PAUSE_VALID_SF0outputTCELL18:OUT.30.TMIN
STAT_RX_PAUSE_VALID_SF1outputTCELL18:OUT.29.TMIN
STAT_RX_PAUSE_VALID_SF2outputTCELL18:OUT.28.TMIN
STAT_RX_PAUSE_VALID_SF3outputTCELL18:OUT.27.TMIN
STAT_RX_PAUSE_VALID_SF4outputTCELL18:OUT.26.TMIN
STAT_RX_PAUSE_VALID_SF5outputTCELL18:OUT.25.TMIN
STAT_RX_PAUSE_VALID_SF6outputTCELL18:OUT.24.TMIN
STAT_RX_PAUSE_VALID_SF7outputTCELL18:OUT.23.TMIN
STAT_RX_PAUSE_VALID_SF8outputTCELL18:OUT.22.TMIN
STAT_RX_PKT_ERR_SFoutputTCELL19:OUT.0.TMIN
STAT_RX_PKT_SFoutputTCELL18:OUT.31.TMIN
STAT_RX_RECEIVED_LOCAL_FAULT_SFoutputTCELL19:OUT.1.TMIN
STAT_RX_REMOTE_FAULT_SFoutputTCELL19:OUT.2.TMIN
STAT_RX_STATUS_SFoutputTCELL19:OUT.3.TMIN
STAT_RX_STOMPED_FCS_SFoutputTCELL17:OUT.26.TMIN
STAT_RX_TEST_PATTERN_MISMATCH_SFoutputTCELL19:OUT.4.TMIN
STAT_RX_TRUNCATED_SFoutputTCELL19:OUT.5.TMIN
STAT_RX_UNICAST_SFoutputTCELL19:OUT.6.TMIN
STAT_RX_VALID_CTRL_CODE_SFoutputTCELL19:OUT.7.TMIN
STAT_RX_VLAN_SFoutputTCELL19:OUT.8.TMIN
STAT_TX_BAD_FCS_SFoutputTCELL23:OUT.20.TMIN
STAT_TX_BROADCAST_SFoutputTCELL23:OUT.18.TMIN
STAT_TX_BYTES_SF0outputTCELL23:OUT.29.TMIN
STAT_TX_BYTES_SF1outputTCELL23:OUT.28.TMIN
STAT_TX_BYTES_SF2outputTCELL23:OUT.27.TMIN
STAT_TX_BYTES_SF3outputTCELL23:OUT.26.TMIN
STAT_TX_FCS_ERR_SFoutputTCELL23:OUT.30.TMIN
STAT_TX_MULTICAST_SFoutputTCELL23:OUT.17.TMIN
STAT_TX_PAUSE_VALID_SF0outputTCELL24:OUT.7.TMIN
STAT_TX_PAUSE_VALID_SF1outputTCELL24:OUT.6.TMIN
STAT_TX_PAUSE_VALID_SF2outputTCELL24:OUT.5.TMIN
STAT_TX_PAUSE_VALID_SF3outputTCELL24:OUT.4.TMIN
STAT_TX_PAUSE_VALID_SF4outputTCELL24:OUT.3.TMIN
STAT_TX_PAUSE_VALID_SF5outputTCELL24:OUT.2.TMIN
STAT_TX_PAUSE_VALID_SF6outputTCELL24:OUT.1.TMIN
STAT_TX_PAUSE_VALID_SF7outputTCELL24:OUT.0.TMIN
STAT_TX_PAUSE_VALID_SF8outputTCELL23:OUT.31.TMIN
STAT_TX_PKT_ERR_SFoutputTCELL24:OUT.10.TMIN
STAT_TX_PKT_SFoutputTCELL24:OUT.8.TMIN
STAT_TX_UNICAST_SFoutputTCELL23:OUT.16.TMIN
STAT_TX_VLAN_SFoutputTCELL23:OUT.19.TMIN
STEPSIZEPPM_FS0inputTCELL27:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS1inputTCELL26:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS2inputTCELL25:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS3inputTCELL24:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS4inputTCELL23:IMUX.IMUX.31.DELAY
TCOCLKFSMFROUT_FSinputTCELL23:IMUX.CTRL.2
TCODABYPASS_FSinputTCELL24:IMUX.IMUX.28.DELAY
TCODAOVREN_FSinputTCELL23:IMUX.IMUX.15.DELAY
TCODAPWDN_FSinputTCELL22:IMUX.IMUX.28.DELAY
TCODARESET_FSinputTCELL22:IMUX.IMUX.32.DELAY
TCOHOLDFROUT_FSinputTCELL23:IMUX.IMUX.45.DELAY
TCOINITDONE_SFoutputTCELL24:OUT.27.TMIN
TCOINITSET_FSinputTCELL21:IMUX.IMUX.6.DELAY
TCOPIOVREN_FSinputTCELL26:IMUX.IMUX.39.DELAY
TCOUPDNFROUT_FSinputTCELL22:IMUX.IMUX.9.DELAY
TDASOFTRESET_FSinputTCELL23:IMUX.IMUX.28.DELAY
TDASOFTRSTDONE_SFoutputTCELL26:OUT.23.TMIN
TSTCLK0_FSinputTCELL21:IMUX.CTRL.2
TSTCLK1_FSinputTCELL21:IMUX.CTRL.3
TSTIN_FS0inputTCELL29:IMUX.IMUX.44.DELAY
TSTIN_FS1inputTCELL27:IMUX.IMUX.19.DELAY
TSTIN_FS10inputTCELL29:IMUX.IMUX.15.DELAY
TSTIN_FS11inputTCELL26:IMUX.IMUX.36.DELAY
TSTIN_FS12inputTCELL29:IMUX.IMUX.45.DELAY
TSTIN_FS13inputTCELL26:IMUX.IMUX.18.DELAY
TSTIN_FS14inputTCELL29:IMUX.IMUX.12.DELAY
TSTIN_FS15inputTCELL28:IMUX.IMUX.12.DELAY
TSTIN_FS16inputTCELL29:IMUX.IMUX.39.DELAY
TSTIN_FS17inputTCELL26:IMUX.IMUX.13.DELAY
TSTIN_FS18inputTCELL27:IMUX.IMUX.16.DELAY
TSTIN_FS19inputTCELL28:IMUX.IMUX.9.DELAY
TSTIN_FS2inputTCELL29:IMUX.IMUX.38.DELAY
TSTIN_FS3inputTCELL26:IMUX.IMUX.46.DELAY
TSTIN_FS4inputTCELL28:IMUX.IMUX.33.DELAY
TSTIN_FS5inputTCELL28:IMUX.IMUX.32.DELAY
TSTIN_FS6inputTCELL27:IMUX.IMUX.46.DELAY
TSTIN_FS7inputTCELL28:IMUX.IMUX.26.DELAY
TSTIN_FS8inputTCELL27:IMUX.IMUX.36.DELAY
TSTIN_FS9inputTCELL28:IMUX.IMUX.20.DELAY
TSTPWRDNOVRDB_FSinputTCELL28:IMUX.IMUX.1.DELAY
TSTPWRDN_FS0inputTCELL28:IMUX.IMUX.40.DELAY
TSTPWRDN_FS1inputTCELL28:IMUX.IMUX.34.DELAY
TSTPWRDN_FS2inputTCELL28:IMUX.IMUX.28.DELAY
TSTPWRDN_FS3inputTCELL28:IMUX.IMUX.22.DELAY
TSTPWRDN_FS4inputTCELL28:IMUX.IMUX.16.DELAY
TXCODAALGNEN_FSinputTCELL24:IMUX.IMUX.32.DELAY
TXCOPIALGNEN_FSinputTCELL22:IMUX.IMUX.15.DELAY
TXCOPIPHDONE_SFoutputTCELL27:OUT.3.TMIN
TXCOPISETPHS_FSinputTCELL22:IMUX.IMUX.45.DELAY
TXDCCDONE_SFoutputTCELL26:OUT.13.TMIN
TXDCCSRESET_FSinputTCELL27:IMUX.IMUX.26.DELAY
TXDCCSTART_FSinputTCELL22:IMUX.IMUX.38.DELAY
TXDRVAMP_FS0inputTCELL25:IMUX.IMUX.22.DELAY
TXDRVAMP_FS1inputTCELL24:IMUX.IMUX.22.DELAY
TXDRVAMP_FS2inputTCELL23:IMUX.IMUX.22.DELAY
TXDRVAMP_FS3inputTCELL22:IMUX.IMUX.22.DELAY
TXDRVAMP_FS4inputTCELL22:IMUX.IMUX.40.DELAY
TXELECIDLE_FSinputTCELL22:IMUX.IMUX.37.DELAY
TXEMPMAIN_FS0inputTCELL27:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS1inputTCELL26:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS2inputTCELL25:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS3inputTCELL24:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS4inputTCELL23:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS5inputTCELL22:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS6inputTCELL21:IMUX.IMUX.14.DELAY
TXEMPPOS_FS0inputTCELL27:IMUX.IMUX.11.DELAY
TXEMPPOS_FS1inputTCELL26:IMUX.IMUX.11.DELAY
TXEMPPOS_FS2inputTCELL25:IMUX.IMUX.11.DELAY
TXEMPPOS_FS3inputTCELL24:IMUX.IMUX.11.DELAY
TXEMPPOS_FS4inputTCELL23:IMUX.IMUX.11.DELAY
TXEMPPRE_FS0inputTCELL27:IMUX.IMUX.20.DELAY
TXEMPPRE_FS1inputTCELL26:IMUX.IMUX.20.DELAY
TXEMPPRE_FS2inputTCELL25:IMUX.IMUX.20.DELAY
TXEMPPRE_FS3inputTCELL24:IMUX.IMUX.20.DELAY
TXEMPPRE_FS4inputTCELL23:IMUX.IMUX.20.DELAY
TXLINKSYNCDONE_SFoutputTCELL26:OUT.20.TMIN
TXMSTRSETPHDONE_FSinputTCELL25:IMUX.IMUX.38.DELAY
TXMUXDCDEXHOLD_FSinputTCELL19:IMUX.IMUX.19.DELAY
TXMUXDCDORWREN_FSinputTCELL19:IMUX.IMUX.36.DELAY
TXOUTCKCTL_FS0inputTCELL25:IMUX.IMUX.40.DELAY
TXOUTCKCTL_FS1inputTCELL24:IMUX.IMUX.40.DELAY
TXOUTCKCTL_FS2inputTCELL23:IMUX.IMUX.40.DELAY
TXOUTCLKPCS_SFoutputTCELL27:OUT.20.TMIN
TXOUTCLK_SFoutputTCELL27:OUT.25.TMIN
TXPIPPMPWDN_FSinputTCELL26:IMUX.IMUX.15.DELAY
TXPLLCKSEL_FS0inputTCELL24:IMUX.IMUX.37.DELAY
TXPLLCKSEL_FS1inputTCELL23:IMUX.IMUX.37.DELAY
TXPMARESETDONE_SFoutputTCELL27:OUT.7.TMIN
TXPMARESET_FSinputTCELL23:IMUX.CTRL.7
TXPOLARITY_FSinputTCELL27:IMUX.IMUX.39.DELAY
TXPPMOVRDEN_FSinputTCELL26:IMUX.IMUX.45.DELAY
TXPPMSEL_FSinputTCELL26:IMUX.IMUX.26.DELAY
TXPRBSINERR_FSinputTCELL27:IMUX.IMUX.45.DELAY
TXPRBSPTN_FS0inputTCELL25:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS1inputTCELL24:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS2inputTCELL23:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS3inputTCELL23:IMUX.IMUX.44.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL25:OUT.14.TMIN
TXPROGDIVRESET_FSinputTCELL24:IMUX.CTRL.7
TXPWRDN_FS0inputTCELL27:IMUX.IMUX.9.DELAY
TXPWRDN_FS1inputTCELL26:IMUX.IMUX.9.DELAY
TXRAWDATA_FS0inputTCELL29:IMUX.IMUX.37.DELAY
TXRAWDATA_FS1inputTCELL29:IMUX.IMUX.10.DELAY
TXRAWDATA_FS10inputTCELL29:IMUX.IMUX.7.DELAY
TXRAWDATA_FS11inputTCELL29:IMUX.IMUX.28.DELAY
TXRAWDATA_FS12inputTCELL29:IMUX.IMUX.29.DELAY
TXRAWDATA_FS13inputTCELL29:IMUX.IMUX.6.DELAY
TXRAWDATA_FS14inputTCELL29:IMUX.IMUX.26.DELAY
TXRAWDATA_FS15inputTCELL29:IMUX.IMUX.27.DELAY
TXRAWDATA_FS16inputTCELL29:IMUX.IMUX.5.DELAY
TXRAWDATA_FS17inputTCELL29:IMUX.IMUX.24.DELAY
TXRAWDATA_FS18inputTCELL29:IMUX.IMUX.3.DELAY
TXRAWDATA_FS19inputTCELL29:IMUX.IMUX.20.DELAY
TXRAWDATA_FS2inputTCELL29:IMUX.IMUX.34.DELAY
TXRAWDATA_FS20inputTCELL29:IMUX.IMUX.21.DELAY
TXRAWDATA_FS21inputTCELL29:IMUX.IMUX.2.DELAY
TXRAWDATA_FS22inputTCELL29:IMUX.IMUX.18.DELAY
TXRAWDATA_FS23inputTCELL29:IMUX.IMUX.19.DELAY
TXRAWDATA_FS24inputTCELL29:IMUX.IMUX.1.DELAY
TXRAWDATA_FS25inputTCELL29:IMUX.IMUX.16.DELAY
TXRAWDATA_FS26inputTCELL29:IMUX.IMUX.17.DELAY
TXRAWDATA_FS27inputTCELL29:IMUX.IMUX.0.DELAY
TXRAWDATA_FS28inputTCELL28:IMUX.IMUX.46.DELAY
TXRAWDATA_FS29inputTCELL28:IMUX.IMUX.47.DELAY
TXRAWDATA_FS3inputTCELL29:IMUX.IMUX.35.DELAY
TXRAWDATA_FS30inputTCELL28:IMUX.IMUX.15.DELAY
TXRAWDATA_FS31inputTCELL28:IMUX.IMUX.44.DELAY
TXRAWDATA_FS32inputTCELL28:IMUX.IMUX.45.DELAY
TXRAWDATA_FS33inputTCELL28:IMUX.IMUX.14.DELAY
TXRAWDATA_FS34inputTCELL28:IMUX.IMUX.42.DELAY
TXRAWDATA_FS35inputTCELL28:IMUX.IMUX.43.DELAY
TXRAWDATA_FS36inputTCELL28:IMUX.IMUX.38.DELAY
TXRAWDATA_FS37inputTCELL28:IMUX.IMUX.39.DELAY
TXRAWDATA_FS38inputTCELL28:IMUX.IMUX.11.DELAY
TXRAWDATA_FS39inputTCELL28:IMUX.IMUX.36.DELAY
TXRAWDATA_FS4inputTCELL29:IMUX.IMUX.9.DELAY
TXRAWDATA_FS5inputTCELL29:IMUX.IMUX.32.DELAY
TXRAWDATA_FS6inputTCELL29:IMUX.IMUX.33.DELAY
TXRAWDATA_FS7inputTCELL29:IMUX.IMUX.8.DELAY
TXRAWDATA_FS8inputTCELL29:IMUX.IMUX.30.DELAY
TXRAWDATA_FS9inputTCELL29:IMUX.IMUX.31.DELAY
TXRESETDONE_SFoutputTCELL26:OUT.18.TMIN
TXRESET_FSinputTCELL21:IMUX.IMUX.28.DELAY
TXSERPWRDN_FSinputTCELL27:IMUX.IMUX.37.DELAY
TXSLVSYNCEN_FSinputTCELL26:IMUX.IMUX.38.DELAY
TXSYNCEN2SLV_SFoutputTCELL26:OUT.29.TMIN
TXSYNCFSMMASTER_FSinputTCELL21:IMUX.IMUX.34.DELAY
TXSYSCKSEL_FS0inputTCELL26:IMUX.IMUX.37.DELAY
TXSYSCKSEL_FS1inputTCELL25:IMUX.IMUX.37.DELAY
TXUSRCLK2_FSinputTCELL24:IMUX.CTRL.3
TXUSRCLK_FSinputTCELL24:IMUX.CTRL.2
TXUSRRDY_FSinputTCELL27:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS0inputTCELL26:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS1inputTCELL26:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS10inputTCELL26:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS11inputTCELL26:IMUX.IMUX.25.DELAY
TX_AXIS_TDATA_FS12inputTCELL26:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS13inputTCELL26:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS14inputTCELL26:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS15inputTCELL26:IMUX.IMUX.1.DELAY
TX_AXIS_TDATA_FS16inputTCELL26:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS17inputTCELL26:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS18inputTCELL26:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS19inputTCELL25:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS2inputTCELL26:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS20inputTCELL25:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS21inputTCELL25:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS22inputTCELL25:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS23inputTCELL25:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS24inputTCELL25:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS25inputTCELL25:IMUX.IMUX.28.DELAY
TX_AXIS_TDATA_FS26inputTCELL25:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS27inputTCELL25:IMUX.IMUX.24.DELAY
TX_AXIS_TDATA_FS28inputTCELL25:IMUX.IMUX.18.DELAY
TX_AXIS_TDATA_FS29inputTCELL25:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS3inputTCELL26:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS30inputTCELL25:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS31inputTCELL25:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS32inputTCELL25:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS33inputTCELL25:IMUX.IMUX.13.DELAY
TX_AXIS_TDATA_FS34inputTCELL25:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS35inputTCELL25:IMUX.IMUX.12.DELAY
TX_AXIS_TDATA_FS36inputTCELL25:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS37inputTCELL25:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS38inputTCELL25:IMUX.IMUX.9.DELAY
TX_AXIS_TDATA_FS39inputTCELL25:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS4inputTCELL26:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS40inputTCELL25:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS41inputTCELL25:IMUX.IMUX.33.DELAY
TX_AXIS_TDATA_FS42inputTCELL25:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS43inputTCELL25:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS44inputTCELL25:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS45inputTCELL25:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS46inputTCELL25:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS47inputTCELL25:IMUX.IMUX.25.DELAY
TX_AXIS_TDATA_FS48inputTCELL25:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS49inputTCELL25:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS5inputTCELL26:IMUX.IMUX.33.DELAY
TX_AXIS_TDATA_FS50inputTCELL25:IMUX.IMUX.1.DELAY
TX_AXIS_TDATA_FS51inputTCELL25:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS52inputTCELL25:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS53inputTCELL24:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS54inputTCELL24:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS55inputTCELL24:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS56inputTCELL24:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS57inputTCELL24:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS58inputTCELL24:IMUX.IMUX.24.DELAY
TX_AXIS_TDATA_FS59inputTCELL24:IMUX.IMUX.18.DELAY
TX_AXIS_TDATA_FS6inputTCELL26:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS60inputTCELL24:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS61inputTCELL24:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS62inputTCELL24:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS63inputTCELL24:IMUX.IMUX.13.DELAY
TX_AXIS_TDATA_FS7inputTCELL26:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS8inputTCELL26:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS9inputTCELL26:IMUX.IMUX.5.DELAY
TX_AXIS_TERR_FSinputTCELL23:IMUX.IMUX.43.DELAY
TX_AXIS_TLAST_FS0inputTCELL23:IMUX.IMUX.42.DELAY
TX_AXIS_TLAST_FS1inputTCELL23:IMUX.IMUX.36.DELAY
TX_AXIS_TLAST_FS2inputTCELL23:IMUX.IMUX.30.DELAY
TX_AXIS_TLAST_FS3inputTCELL23:IMUX.IMUX.24.DELAY
TX_AXIS_TLAST_FS4inputTCELL23:IMUX.IMUX.18.DELAY
TX_AXIS_TLAST_FS5inputTCELL23:IMUX.IMUX.16.DELAY
TX_AXIS_TLAST_FS6inputTCELL23:IMUX.IMUX.47.DELAY
TX_AXIS_TLAST_FS7inputTCELL23:IMUX.IMUX.13.DELAY
TX_AXIS_TPOISON_FSinputTCELL23:IMUX.IMUX.46.DELAY
TX_AXIS_TPRE_FS0inputTCELL24:IMUX.IMUX.5.DELAY
TX_AXIS_TPRE_FS1inputTCELL24:IMUX.IMUX.4.DELAY
TX_AXIS_TPRE_FS2inputTCELL24:IMUX.IMUX.25.DELAY
TX_AXIS_TPRE_FS3inputTCELL24:IMUX.IMUX.23.DELAY
TX_AXIS_TPRE_FS4inputTCELL24:IMUX.IMUX.2.DELAY
TX_AXIS_TPRE_FS5inputTCELL24:IMUX.IMUX.1.DELAY
TX_AXIS_TPRE_FS6inputTCELL24:IMUX.IMUX.19.DELAY
TX_AXIS_TPRE_FS7inputTCELL24:IMUX.IMUX.17.DELAY
TX_AXIS_TREADY_SFoutputTCELL24:OUT.12.TMIN
TX_AXIS_TSOF_FS0inputTCELL24:IMUX.IMUX.7.DELAY
TX_AXIS_TSOF_FS1inputTCELL24:IMUX.IMUX.29.DELAY
TX_AXIS_TTERM_FS0inputTCELL24:IMUX.IMUX.41.DELAY
TX_AXIS_TTERM_FS1inputTCELL24:IMUX.IMUX.10.DELAY
TX_AXIS_TTERM_FS2inputTCELL24:IMUX.IMUX.9.DELAY
TX_AXIS_TTERM_FS3inputTCELL24:IMUX.IMUX.35.DELAY
TX_AXIS_TTERM_FS4inputTCELL24:IMUX.IMUX.8.DELAY
TX_AXIS_TVALID_FSinputTCELL24:IMUX.IMUX.12.DELAY
TX_GB_SEQ_START_SFoutputTCELL24:OUT.13.TMIN
TX_GB_SEQ_SYNC_FSinputTCELL24:IMUX.IMUX.43.DELAY
TX_PTP_SOP_POS_SFoutputTCELL24:OUT.15.TMIN
TX_PTP_SOP_SFoutputTCELL24:OUT.14.TMIN
TX_UNFOUT_SFoutputTCELL24:OUT.16.TMIN

Bel GTF_CHANNEL2

ultrascaleplus GTF bel GTF_CHANNEL2
PinDirectionWires
AFECFOKEN_FSinputTCELL40:IMUX.IMUX.17.DELAY
BSR_SERIAL_FSinputTCELL36:IMUX.IMUX.4.DELAY
CDRFRRESET_FSinputTCELL38:IMUX.CTRL.0
CDRHOLD_FSinputTCELL38:IMUX.IMUX.31.DELAY
CDRLOCK_SFoutputTCELL36:OUT.6.TMIN
CDROVREN_FSinputTCELL39:IMUX.IMUX.31.DELAY
CDRPHRESET_FSinputTCELL41:IMUX.CTRL.0
CDRSTEPDIR_FSinputTCELL42:IMUX.IMUX.45.DELAY
CDRSTEPSQ_FSinputTCELL42:IMUX.IMUX.18.DELAY
CDRSTEPSX_FSinputTCELL42:IMUX.IMUX.15.DELAY
CFGRESET_FSinputTCELL32:IMUX.CTRL.0
CFOKDONE_SFoutputTCELL33:OUT.6.TMIN
CFOKFORCEDONE_SFoutputTCELL33:OUT.0.TMIN
CFOKFSTARTED_SFoutputTCELL34:OUT.0.TMIN
CFOKRESET_FSinputTCELL40:IMUX.IMUX.29.DELAY
CFOKSTART_SFoutputTCELL34:OUT.6.TMIN
CKOKDONE_SFoutputTCELL33:OUT.17.TMIN
CKOKRESET_FSinputTCELL40:IMUX.IMUX.2.DELAY
CKPINRSRVD0_FSinputTCELL42:IMUX.CTRL.5
CKPINRSRVD1_FSinputTCELL42:IMUX.CTRL.4
COREREFCLK_FSinputTCELL31:IMUX.CTRL.5
CPLFBLOSS_SFoutputTCELL35:OUT.1.TMIN
CPLFREQLOCK_SFoutputTCELL31:OUT.10.TMIN
CPLLDMONCLK_FSinputTCELL33:IMUX.CTRL.5
CPLLFREQLOCK_FSinputTCELL36:IMUX.IMUX.6.DELAY
CPLLKDETEN_FSinputTCELL33:IMUX.IMUX.12.DELAY
CPLPWRDN_FSinputTCELL32:IMUX.IMUX.12.DELAY
CPLREFLOSS_SFoutputTCELL33:OUT.5.TMIN
CPLREFSELDYN_FS0inputTCELL33:IMUX.IMUX.9.DELAY
CPLREFSELDYN_FS1inputTCELL33:IMUX.IMUX.6.DELAY
CPLREFSELDYN_FS2inputTCELL33:IMUX.IMUX.3.DELAY
CPLRESET_FSinputTCELL33:IMUX.CTRL.0
CTL_RX_PAUSE_ACK_FS0inputTCELL39:IMUX.IMUX.33.DELAY
CTL_RX_PAUSE_ACK_FS1inputTCELL39:IMUX.IMUX.35.DELAY
CTL_RX_PAUSE_ACK_FS2inputTCELL39:IMUX.IMUX.36.DELAY
CTL_RX_PAUSE_ACK_FS3inputTCELL39:IMUX.IMUX.38.DELAY
CTL_RX_PAUSE_ACK_FS4inputTCELL39:IMUX.IMUX.39.DELAY
CTL_RX_PAUSE_ACK_FS5inputTCELL39:IMUX.IMUX.41.DELAY
CTL_RX_PAUSE_ACK_FS6inputTCELL39:IMUX.IMUX.42.DELAY
CTL_RX_PAUSE_ACK_FS7inputTCELL39:IMUX.IMUX.44.DELAY
CTL_RX_PAUSE_ACK_FS8inputTCELL39:IMUX.IMUX.45.DELAY
CTL_TX_PAUSE_REQ_FS0inputTCELL36:IMUX.IMUX.29.DELAY
CTL_TX_PAUSE_REQ_FS1inputTCELL36:IMUX.IMUX.30.DELAY
CTL_TX_PAUSE_REQ_FS2inputTCELL36:IMUX.IMUX.32.DELAY
CTL_TX_PAUSE_REQ_FS3inputTCELL36:IMUX.IMUX.35.DELAY
CTL_TX_PAUSE_REQ_FS4inputTCELL36:IMUX.IMUX.36.DELAY
CTL_TX_PAUSE_REQ_FS5inputTCELL36:IMUX.IMUX.38.DELAY
CTL_TX_PAUSE_REQ_FS6inputTCELL36:IMUX.IMUX.39.DELAY
CTL_TX_PAUSE_REQ_FS7inputTCELL36:IMUX.IMUX.41.DELAY
CTL_TX_PAUSE_REQ_FS8inputTCELL36:IMUX.IMUX.42.DELAY
CTL_TX_RESEND_PAUSE_FSinputTCELL36:IMUX.IMUX.28.DELAY
CTL_TX_SEND_IDLE_FSinputTCELL36:IMUX.IMUX.26.DELAY
CTL_TX_SEND_LFI_FSinputTCELL36:IMUX.IMUX.23.DELAY
CTL_TX_SEND_RFI_FSinputTCELL36:IMUX.IMUX.22.DELAY
DADDR_FS0inputTCELL30:IMUX.IMUX.2.DELAY
DADDR_FS1inputTCELL31:IMUX.IMUX.34.DELAY
DADDR_FS2inputTCELL32:IMUX.IMUX.7.DELAY
DADDR_FS3inputTCELL30:IMUX.IMUX.20.DELAY
DADDR_FS4inputTCELL32:IMUX.IMUX.11.DELAY
DADDR_FS5inputTCELL32:IMUX.IMUX.23.DELAY
DADDR_FS6inputTCELL30:IMUX.IMUX.38.DELAY
DADDR_FS7inputTCELL32:IMUX.IMUX.38.DELAY
DADDR_FS8inputTCELL32:IMUX.IMUX.47.DELAY
DADDR_FS9inputTCELL31:IMUX.IMUX.8.DELAY
DCLK_FSinputTCELL30:IMUX.CTRL.4
DEN_FSinputTCELL30:IMUX.IMUX.0.DELAY
DFECFOKCFNUM_FS0inputTCELL42:IMUX.IMUX.11.DELAY
DFECFOKCFNUM_FS1inputTCELL42:IMUX.IMUX.14.DELAY
DFECFOKCFNUM_FS2inputTCELL42:IMUX.IMUX.17.DELAY
DFECFOKCFNUM_FS3inputTCELL42:IMUX.IMUX.20.DELAY
DFECFOKFEN_FSinputTCELL39:IMUX.IMUX.25.DELAY
DFECFOKFPULSE_FSinputTCELL39:IMUX.IMUX.22.DELAY
DFECFOKHOLD_FSinputTCELL40:IMUX.IMUX.11.DELAY
DFECFOKOVREN_FSinputTCELL39:IMUX.IMUX.19.DELAY
DFEDOUTMODE_FS0inputTCELL41:IMUX.IMUX.38.DELAY
DFEDOUTMODE_FS1inputTCELL41:IMUX.IMUX.44.DELAY
DFEDOUT_SF0outputTCELL30:OUT.26.TMIN
DFEDOUT_SF1outputTCELL30:OUT.24.TMIN
DFEDOUT_SF2outputTCELL32:OUT.26.TMIN
DFEDOUT_SF3outputTCELL33:OUT.26.TMIN
DFEDOUT_SF4outputTCELL34:OUT.26.TMIN
DFEDOUT_SF5outputTCELL30:OUT.6.TMIN
DFEDOUT_SF6outputTCELL31:OUT.6.TMIN
DFEDOUT_SF7outputTCELL34:OUT.7.TMIN
DFEGCHOLD_FSinputTCELL40:IMUX.IMUX.47.DELAY
DFEGCOVREN_FSinputTCELL40:IMUX.IMUX.44.DELAY
DFEH10HOLD_FSinputTCELL42:IMUX.IMUX.19.DELAY
DFEH10OVREN_FSinputTCELL42:IMUX.IMUX.22.DELAY
DFEH11HOLD_FSinputTCELL40:IMUX.IMUX.25.DELAY
DFEH11OVREN_FSinputTCELL40:IMUX.IMUX.28.DELAY
DFEH12HOLD_FSinputTCELL41:IMUX.IMUX.25.DELAY
DFEH12OVREN_FSinputTCELL41:IMUX.IMUX.28.DELAY
DFEH13HOLD_FSinputTCELL42:IMUX.IMUX.25.DELAY
DFEH13OVREN_FSinputTCELL42:IMUX.IMUX.28.DELAY
DFEH14HOLD_FSinputTCELL40:IMUX.IMUX.31.DELAY
DFEH14OVREN_FSinputTCELL40:IMUX.IMUX.34.DELAY
DFEH15HOLD_FSinputTCELL41:IMUX.IMUX.31.DELAY
DFEH15OVREN_FSinputTCELL41:IMUX.IMUX.34.DELAY
DFEH2HOLD_FSinputTCELL40:IMUX.IMUX.7.DELAY
DFEH2OVREN_FSinputTCELL40:IMUX.IMUX.10.DELAY
DFEH3HOLD_FSinputTCELL41:IMUX.IMUX.7.DELAY
DFEH3OVREN_FSinputTCELL41:IMUX.IMUX.10.DELAY
DFEH4HOLD_FSinputTCELL42:IMUX.IMUX.7.DELAY
DFEH4OVREN_FSinputTCELL42:IMUX.IMUX.10.DELAY
DFEH5HOLD_FSinputTCELL40:IMUX.IMUX.13.DELAY
DFEH5OVREN_FSinputTCELL40:IMUX.IMUX.16.DELAY
DFEH6HOLD_FSinputTCELL41:IMUX.IMUX.13.DELAY
DFEH6OVREN_FSinputTCELL41:IMUX.IMUX.16.DELAY
DFEH7HOLD_FSinputTCELL42:IMUX.IMUX.13.DELAY
DFEH7OVREN_FSinputTCELL42:IMUX.IMUX.16.DELAY
DFEH8HOLD_FSinputTCELL40:IMUX.IMUX.19.DELAY
DFEH8OVREN_FSinputTCELL40:IMUX.IMUX.22.DELAY
DFEH9HOLD_FSinputTCELL41:IMUX.IMUX.19.DELAY
DFEH9OVREN_FSinputTCELL41:IMUX.IMUX.22.DELAY
DFEKLHOLD_FSinputTCELL40:IMUX.IMUX.41.DELAY
DFEKLOVREN_FSinputTCELL40:IMUX.IMUX.38.DELAY
DFERESET_FSinputTCELL37:IMUX.CTRL.0
DFEUTHOLD_FSinputTCELL40:IMUX.IMUX.42.DELAY
DFEUTOVREN_FSinputTCELL40:IMUX.IMUX.39.DELAY
DFEVPHOLD_FSinputTCELL41:IMUX.IMUX.42.DELAY
DFEVPOVREN_FSinputTCELL41:IMUX.IMUX.39.DELAY
DFEYEN_FSinputTCELL41:IMUX.IMUX.45.DELAY
DFE_KH_EXTHOLD_FSinputTCELL31:IMUX.IMUX.45.DELAY
DFE_KH_OVERWREN_FSinputTCELL34:IMUX.IMUX.43.DELAY
DI_FS0inputTCELL30:IMUX.IMUX.5.DELAY
DI_FS1inputTCELL32:IMUX.IMUX.2.DELAY
DI_FS10inputTCELL33:IMUX.IMUX.8.DELAY
DI_FS11inputTCELL31:IMUX.IMUX.23.DELAY
DI_FS12inputTCELL31:IMUX.IMUX.29.DELAY
DI_FS13inputTCELL31:IMUX.IMUX.35.DELAY
DI_FS14inputTCELL31:IMUX.IMUX.41.DELAY
DI_FS15inputTCELL31:IMUX.IMUX.47.DELAY
DI_FS2inputTCELL30:IMUX.IMUX.17.DELAY
DI_FS3inputTCELL30:IMUX.IMUX.23.DELAY
DI_FS4inputTCELL32:IMUX.IMUX.17.DELAY
DI_FS5inputTCELL32:IMUX.IMUX.30.DELAY
DI_FS6inputTCELL30:IMUX.IMUX.41.DELAY
DI_FS7inputTCELL32:IMUX.IMUX.42.DELAY
DI_FS8inputTCELL33:IMUX.IMUX.2.DELAY
DI_FS9inputTCELL31:IMUX.IMUX.11.DELAY
DMONCLK_FSinputTCELL30:IMUX.CTRL.5
DMONFIFORESET_FSinputTCELL32:IMUX.IMUX.44.DELAY
DMONOUT_SF0outputTCELL30:OUT.27.TMIN
DMONOUT_SF1outputTCELL30:OUT.30.TMIN
DMONOUT_SF10outputTCELL30:OUT.15.TMIN
DMONOUT_SF11outputTCELL30:OUT.3.TMIN
DMONOUT_SF12outputTCELL34:OUT.12.TMIN
DMONOUT_SF13outputTCELL33:OUT.15.TMIN
DMONOUT_SF14outputTCELL34:OUT.15.TMIN
DMONOUT_SF15outputTCELL30:OUT.9.TMIN
DMONOUT_SF2outputTCELL32:OUT.27.TMIN
DMONOUT_SF3outputTCELL33:OUT.27.TMIN
DMONOUT_SF4outputTCELL34:OUT.27.TMIN
DMONOUT_SF5outputTCELL30:OUT.21.TMIN
DMONOUT_SF6outputTCELL30:OUT.12.TMIN
DMONOUT_SF7outputTCELL35:OUT.5.TMIN
DMONOUT_SF8outputTCELL33:OUT.21.TMIN
DMONOUT_SF9outputTCELL34:OUT.21.TMIN
DRDY_SFoutputTCELL33:OUT.7.TMIN
DRPDO_SF0outputTCELL30:OUT.31.TMIN
DRPDO_SF1outputTCELL31:OUT.7.TMIN
DRPDO_SF10outputTCELL30:OUT.19.TMIN
DRPDO_SF11outputTCELL30:OUT.10.TMIN
DRPDO_SF12outputTCELL35:OUT.3.TMIN
DRPDO_SF13outputTCELL33:OUT.19.TMIN
DRPDO_SF14outputTCELL34:OUT.19.TMIN
DRPDO_SF15outputTCELL30:OUT.13.TMIN
DRPDO_SF2outputTCELL32:OUT.31.TMIN
DRPDO_SF3outputTCELL33:OUT.31.TMIN
DRPDO_SF4outputTCELL34:OUT.31.TMIN
DRPDO_SF5outputTCELL30:OUT.25.TMIN
DRPDO_SF6outputTCELL30:OUT.20.TMIN
DRPDO_SF7outputTCELL32:OUT.25.TMIN
DRPDO_SF8outputTCELL33:OUT.25.TMIN
DRPDO_SF9outputTCELL34:OUT.25.TMIN
DRST_FSinputTCELL31:IMUX.CTRL.3
DWE_FSinputTCELL30:IMUX.IMUX.3.DELAY
ENPPM_FSinputTCELL33:IMUX.IMUX.22.DELAY
EYESCANDATAERROR_SFoutputTCELL31:OUT.1.TMIN
EYESCANTRIGGER_FSinputTCELL30:IMUX.IMUX.12.DELAY
FREQOS_FSinputTCELL32:IMUX.IMUX.22.DELAY
GATERXELECIDLE_FS0inputTCELL38:IMUX.IMUX.3.DELAY
GATERXELECIDLE_FS1inputTCELL38:IMUX.IMUX.7.DELAY
GTPOWERGOOD_SFoutputTCELL34:OUT.22.TMIN
GTRXRSTSEL_FSinputTCELL31:IMUX.IMUX.20.DELAY
GTRXRST_FSinputTCELL39:IMUX.CTRL.0
GTTXRSTSEL_FSinputTCELL32:IMUX.IMUX.8.DELAY
GTTXRST_FSinputTCELL34:IMUX.CTRL.0
INCPCTRL_FSinputTCELL32:IMUX.IMUX.16.DELAY
ISCANRESET_FSinputTCELL31:IMUX.IMUX.36.DELAY
LOOPBACK_FS0inputTCELL32:IMUX.IMUX.3.DELAY
LOOPBACK_FS1inputTCELL32:IMUX.IMUX.6.DELAY
LOOPBACK_FS2inputTCELL32:IMUX.IMUX.9.DELAY
LPMGCHOLD_FSinputTCELL42:IMUX.IMUX.30.DELAY
LPMGCOVREN_FSinputTCELL42:IMUX.IMUX.34.DELAY
LPMKHHOLD_FSinputTCELL42:IMUX.IMUX.29.DELAY
LPMKHOVREN_FSinputTCELL41:IMUX.IMUX.30.DELAY
LPMKLHOLD_FSinputTCELL42:IMUX.IMUX.26.DELAY
LPMKLOVREN_FSinputTCELL42:IMUX.IMUX.23.DELAY
LPMOSHOLD_FSinputTCELL41:IMUX.IMUX.12.DELAY
LPMOSOVREN_FSinputTCELL41:IMUX.IMUX.20.DELAY
MGTREFCLKFA_SFoutputTCELL30:OUT.28.TMIN
OSHOLD_FSinputTCELL40:IMUX.IMUX.23.DELAY
OSOVREN_FSinputTCELL39:IMUX.IMUX.16.DELAY
PCS_RSVD_IN_FS0inputTCELL35:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS1inputTCELL35:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS10inputTCELL40:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS11inputTCELL40:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS12inputTCELL41:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS13inputTCELL41:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS14inputTCELL42:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS15inputTCELL42:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS2inputTCELL36:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS3inputTCELL36:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS4inputTCELL37:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS5inputTCELL37:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS6inputTCELL38:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS7inputTCELL38:IMUX.IMUX.40.DELAY
PCS_RSVD_IN_FS8inputTCELL39:IMUX.IMUX.37.DELAY
PCS_RSVD_IN_FS9inputTCELL39:IMUX.IMUX.40.DELAY
PCS_RSVD_OUT_SF0outputTCELL35:OUT.22.TMIN
PCS_RSVD_OUT_SF1outputTCELL36:OUT.22.TMIN
PCS_RSVD_OUT_SF10outputTCELL37:OUT.20.TMIN
PCS_RSVD_OUT_SF11outputTCELL38:OUT.20.TMIN
PCS_RSVD_OUT_SF12outputTCELL39:OUT.20.TMIN
PCS_RSVD_OUT_SF13outputTCELL40:OUT.20.TMIN
PCS_RSVD_OUT_SF14outputTCELL41:OUT.20.TMIN
PCS_RSVD_OUT_SF15outputTCELL42:OUT.20.TMIN
PCS_RSVD_OUT_SF2outputTCELL37:OUT.22.TMIN
PCS_RSVD_OUT_SF3outputTCELL38:OUT.22.TMIN
PCS_RSVD_OUT_SF4outputTCELL39:OUT.22.TMIN
PCS_RSVD_OUT_SF5outputTCELL40:OUT.22.TMIN
PCS_RSVD_OUT_SF6outputTCELL41:OUT.22.TMIN
PCS_RSVD_OUT_SF7outputTCELL42:OUT.22.TMIN
PCS_RSVD_OUT_SF8outputTCELL35:OUT.20.TMIN
PCS_RSVD_OUT_SF9outputTCELL36:OUT.20.TMIN
PINRSRVDAS_SF0outputTCELL31:OUT.9.TMIN
PINRSRVDAS_SF1outputTCELL35:OUT.9.TMIN
PINRSRVDAS_SF10outputTCELL30:OUT.16.TMIN
PINRSRVDAS_SF11outputTCELL35:OUT.7.TMIN
PINRSRVDAS_SF12outputTCELL33:OUT.1.TMIN
PINRSRVDAS_SF13outputTCELL34:OUT.16.TMIN
PINRSRVDAS_SF14outputTCELL34:OUT.1.TMIN
PINRSRVDAS_SF15outputTCELL34:OUT.28.TMIN
PINRSRVDAS_SF2outputTCELL33:OUT.9.TMIN
PINRSRVDAS_SF3outputTCELL34:OUT.9.TMIN
PINRSRVDAS_SF4outputTCELL31:OUT.5.TMIN
PINRSRVDAS_SF5outputTCELL32:OUT.30.TMIN
PINRSRVDAS_SF6outputTCELL33:OUT.30.TMIN
PINRSRVDAS_SF7outputTCELL34:OUT.30.TMIN
PINRSRVDAS_SF8outputTCELL30:OUT.22.TMIN
PINRSRVDAS_SF9outputTCELL30:OUT.5.TMIN
PINRSRVD_FS0inputTCELL35:IMUX.IMUX.43.DELAY
PINRSRVD_FS1inputTCELL35:IMUX.IMUX.46.DELAY
PINRSRVD_FS10inputTCELL40:IMUX.IMUX.43.DELAY
PINRSRVD_FS11inputTCELL40:IMUX.IMUX.46.DELAY
PINRSRVD_FS12inputTCELL41:IMUX.IMUX.43.DELAY
PINRSRVD_FS13inputTCELL41:IMUX.IMUX.46.DELAY
PINRSRVD_FS14inputTCELL42:IMUX.IMUX.43.DELAY
PINRSRVD_FS15inputTCELL42:IMUX.IMUX.46.DELAY
PINRSRVD_FS2inputTCELL36:IMUX.IMUX.43.DELAY
PINRSRVD_FS3inputTCELL36:IMUX.IMUX.46.DELAY
PINRSRVD_FS4inputTCELL37:IMUX.IMUX.43.DELAY
PINRSRVD_FS5inputTCELL37:IMUX.IMUX.46.DELAY
PINRSRVD_FS6inputTCELL38:IMUX.IMUX.43.DELAY
PINRSRVD_FS7inputTCELL38:IMUX.IMUX.46.DELAY
PINRSRVD_FS8inputTCELL39:IMUX.IMUX.43.DELAY
PINRSRVD_FS9inputTCELL39:IMUX.IMUX.46.DELAY
PMASCANCLK0_FSinputTCELL40:IMUX.CTRL.5
PMASCANCLK1_FSinputTCELL40:IMUX.CTRL.4
PMASCANCLK2_FSinputTCELL34:IMUX.CTRL.5
PMASCANCLK3_FSinputTCELL34:IMUX.CTRL.4
PMASCANCLK4_FSinputTCELL32:IMUX.CTRL.5
PMASCANCLK5_FSinputTCELL32:IMUX.CTRL.6
PMASCANCLK6_FSinputTCELL36:IMUX.CTRL.2
PMASCANCLK7_FSinputTCELL36:IMUX.CTRL.3
PMASCANCLK8_FSinputTCELL38:IMUX.CTRL.2
PMASCANENB_FSinputTCELL31:IMUX.IMUX.37.DELAY
PMASCANIN_FS0inputTCELL31:IMUX.IMUX.40.DELAY
PMASCANIN_FS1inputTCELL32:IMUX.IMUX.37.DELAY
PMASCANIN_FS10inputTCELL32:IMUX.IMUX.35.DELAY
PMASCANIN_FS11inputTCELL32:IMUX.IMUX.39.DELAY
PMASCANIN_FS12inputTCELL32:IMUX.IMUX.36.DELAY
PMASCANIN_FS13inputTCELL32:IMUX.IMUX.41.DELAY
PMASCANIN_FS14inputTCELL31:IMUX.IMUX.43.DELAY
PMASCANIN_FS15inputTCELL31:IMUX.IMUX.46.DELAY
PMASCANIN_FS16inputTCELL32:IMUX.IMUX.43.DELAY
PMASCANIN_FS17inputTCELL32:IMUX.IMUX.46.DELAY
PMASCANIN_FS2inputTCELL32:IMUX.IMUX.40.DELAY
PMASCANIN_FS3inputTCELL33:IMUX.IMUX.37.DELAY
PMASCANIN_FS4inputTCELL33:IMUX.IMUX.40.DELAY
PMASCANIN_FS5inputTCELL34:IMUX.IMUX.37.DELAY
PMASCANIN_FS6inputTCELL34:IMUX.IMUX.40.DELAY
PMASCANIN_FS7inputTCELL32:IMUX.IMUX.29.DELAY
PMASCANIN_FS8inputTCELL32:IMUX.IMUX.31.DELAY
PMASCANIN_FS9inputTCELL30:IMUX.IMUX.39.DELAY
PMASCANMODEB_FSinputTCELL32:IMUX.IMUX.34.DELAY
PMASCANOUT_SF0outputTCELL30:OUT.29.TMIN
PMASCANOUT_SF1outputTCELL31:OUT.3.TMIN
PMASCANOUT_SF10outputTCELL34:OUT.11.TMIN
PMASCANOUT_SF11outputTCELL33:OUT.14.TMIN
PMASCANOUT_SF12outputTCELL35:OUT.0.TMIN
PMASCANOUT_SF13outputTCELL37:OUT.10.TMIN
PMASCANOUT_SF14outputTCELL38:OUT.10.TMIN
PMASCANOUT_SF15outputTCELL39:OUT.10.TMIN
PMASCANOUT_SF16outputTCELL40:OUT.10.TMIN
PMASCANOUT_SF17outputTCELL41:OUT.10.TMIN
PMASCANOUT_SF2outputTCELL32:OUT.29.TMIN
PMASCANOUT_SF3outputTCELL33:OUT.29.TMIN
PMASCANOUT_SF4outputTCELL34:OUT.29.TMIN
PMASCANOUT_SF5outputTCELL30:OUT.17.TMIN
PMASCANOUT_SF6outputTCELL30:OUT.7.TMIN
PMASCANOUT_SF7outputTCELL34:OUT.14.TMIN
PMASCANOUT_SF8outputTCELL30:OUT.14.TMIN
PMASCANOUT_SF9outputTCELL30:OUT.1.TMIN
PMASCANRSTEN_FSinputTCELL32:IMUX.IMUX.32.DELAY
PRBSCNTRST_FSinputTCELL38:IMUX.IMUX.12.DELAY
QPLLFREQLOCK0_FSinputTCELL35:IMUX.IMUX.16.DELAY
QPLLFREQLOCK1_FSinputTCELL40:IMUX.IMUX.3.DELAY
RCODAPWDN_FSinputTCELL38:IMUX.IMUX.19.DELAY
RCODARESET_FSinputTCELL39:IMUX.CTRL.7
RDASOFTRSTDONE_SFoutputTCELL35:OUT.6.TMIN
RESETOVRD_FSinputTCELL37:IMUX.IMUX.1.DELAY
RESET_EXCEPTION_SFoutputTCELL34:OUT.18.TMIN
RXCDRPHDONE_SFoutputTCELL33:OUT.20.TMIN
RXCKCALSTART_FS0inputTCELL40:IMUX.IMUX.14.DELAY
RXCKCALSTART_FS1inputTCELL40:IMUX.IMUX.26.DELAY
RXCKCALSTART_FS2inputTCELL41:IMUX.IMUX.14.DELAY
RXCKCALSTART_FS3inputTCELL41:IMUX.IMUX.21.DELAY
RXCKCALSTART_FS4inputTCELL42:IMUX.IMUX.24.DELAY
RXCKCALSTART_FS5inputTCELL42:IMUX.IMUX.31.DELAY
RXCKCALSTART_FS6inputTCELL42:IMUX.IMUX.41.DELAY
RXCOALGNEN_FSinputTCELL38:IMUX.IMUX.22.DELAY
RXCOPHDONE_SFoutputTCELL34:OUT.8.TMIN
RXCOSETPHS_FSinputTCELL38:IMUX.IMUX.24.DELAY
RXDAALGNEN_FSinputTCELL42:IMUX.IMUX.33.DELAY
RXDABYPASS_FSinputTCELL42:IMUX.IMUX.36.DELAY
RXDAOVREN_FSinputTCELL42:IMUX.IMUX.32.DELAY
RXDASOFTRESET_FSinputTCELL41:IMUX.CTRL.7
RXELECIDLE_SFoutputTCELL35:OUT.2.TMIN
RXLINKSYNCDONE_SFoutputTCELL34:OUT.13.TMIN
RXLPMEN_FSinputTCELL41:IMUX.IMUX.32.DELAY
RXMSTRSETPHDONE_FSinputTCELL41:IMUX.IMUX.35.DELAY
RXOUTCKCTL_FS0inputTCELL38:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS1inputTCELL39:IMUX.IMUX.28.DELAY
RXOUTCKCTL_FS2inputTCELL39:IMUX.IMUX.34.DELAY
RXPHALIGNERR_SFoutputTCELL33:OUT.24.TMIN
RXPLLCKSEL_FS0inputTCELL39:IMUX.IMUX.4.DELAY
RXPLLCKSEL_FS1inputTCELL40:IMUX.IMUX.4.DELAY
RXPMARESETDONE_SFoutputTCELL34:OUT.2.TMIN
RXPMARESET_FSinputTCELL38:IMUX.CTRL.7
RXPOLARITY_FSinputTCELL38:IMUX.IMUX.13.DELAY
RXPRBSERR_SFoutputTCELL42:OUT.8.TMIN
RXPRBSLOCKED_SFoutputTCELL35:OUT.8.TMIN
RXPRBSPTN_FS0inputTCELL42:IMUX.IMUX.2.DELAY
RXPRBSPTN_FS1inputTCELL42:IMUX.IMUX.5.DELAY
RXPRBSPTN_FS2inputTCELL42:IMUX.IMUX.8.DELAY
RXPRBSPTN_FS3inputTCELL42:IMUX.IMUX.0.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL34:OUT.20.TMIN
RXPROGDIVRESET_FSinputTCELL40:IMUX.CTRL.7
RXPWRDN_FS0inputTCELL41:IMUX.IMUX.4.DELAY
RXPWRDN_FS1inputTCELL42:IMUX.IMUX.4.DELAY
RXRAWDATA_SF0outputTCELL31:OUT.11.TMIN
RXRAWDATA_SF1outputTCELL31:OUT.14.TMIN
RXRAWDATA_SF10outputTCELL31:OUT.23.TMIN
RXRAWDATA_SF11outputTCELL31:OUT.24.TMIN
RXRAWDATA_SF12outputTCELL31:OUT.25.TMIN
RXRAWDATA_SF13outputTCELL31:OUT.26.TMIN
RXRAWDATA_SF14outputTCELL31:OUT.27.TMIN
RXRAWDATA_SF15outputTCELL31:OUT.28.TMIN
RXRAWDATA_SF16outputTCELL31:OUT.29.TMIN
RXRAWDATA_SF17outputTCELL31:OUT.30.TMIN
RXRAWDATA_SF18outputTCELL31:OUT.31.TMIN
RXRAWDATA_SF19outputTCELL32:OUT.0.TMIN
RXRAWDATA_SF2outputTCELL31:OUT.15.TMIN
RXRAWDATA_SF20outputTCELL32:OUT.1.TMIN
RXRAWDATA_SF21outputTCELL32:OUT.2.TMIN
RXRAWDATA_SF22outputTCELL32:OUT.3.TMIN
RXRAWDATA_SF23outputTCELL32:OUT.4.TMIN
RXRAWDATA_SF24outputTCELL32:OUT.5.TMIN
RXRAWDATA_SF25outputTCELL32:OUT.7.TMIN
RXRAWDATA_SF26outputTCELL32:OUT.8.TMIN
RXRAWDATA_SF27outputTCELL32:OUT.9.TMIN
RXRAWDATA_SF28outputTCELL32:OUT.10.TMIN
RXRAWDATA_SF29outputTCELL32:OUT.12.TMIN
RXRAWDATA_SF3outputTCELL31:OUT.16.TMIN
RXRAWDATA_SF30outputTCELL32:OUT.13.TMIN
RXRAWDATA_SF31outputTCELL32:OUT.14.TMIN
RXRAWDATA_SF32outputTCELL32:OUT.15.TMIN
RXRAWDATA_SF33outputTCELL32:OUT.16.TMIN
RXRAWDATA_SF34outputTCELL32:OUT.17.TMIN
RXRAWDATA_SF35outputTCELL32:OUT.18.TMIN
RXRAWDATA_SF36outputTCELL32:OUT.19.TMIN
RXRAWDATA_SF37outputTCELL32:OUT.20.TMIN
RXRAWDATA_SF38outputTCELL32:OUT.21.TMIN
RXRAWDATA_SF39outputTCELL32:OUT.22.TMIN
RXRAWDATA_SF4outputTCELL31:OUT.17.TMIN
RXRAWDATA_SF5outputTCELL31:OUT.18.TMIN
RXRAWDATA_SF6outputTCELL31:OUT.19.TMIN
RXRAWDATA_SF7outputTCELL31:OUT.20.TMIN
RXRAWDATA_SF8outputTCELL31:OUT.21.TMIN
RXRAWDATA_SF9outputTCELL31:OUT.22.TMIN
RXRECCLKPCS_SFoutputTCELL37:OUT.8.TMIN
RXRECCLK_SFoutputTCELL36:OUT.8.TMIN
RXRESETDONE_SFoutputTCELL42:OUT.10.TMIN
RXRESET_FSinputTCELL39:IMUX.IMUX.13.DELAY
RXSLIPDONE_SFoutputTCELL34:OUT.10.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL34:OUT.5.TMIN
RXSLIPOUTCLK_FSinputTCELL42:IMUX.IMUX.42.DELAY
RXSLIPPMARDY_SFoutputTCELL34:OUT.3.TMIN
RXSLIPPMA_FSinputTCELL42:IMUX.IMUX.35.DELAY
RXSLVSYNCEN_FSinputTCELL41:IMUX.IMUX.26.DELAY
RXSYNCEN2SLV_SFoutputTCELL34:OUT.4.TMIN
RXSYNCFSMMASTER_FSinputTCELL41:IMUX.IMUX.23.DELAY
RXSYSCKSEL_FS0inputTCELL39:IMUX.IMUX.27.DELAY
RXSYSCKSEL_FS1inputTCELL38:IMUX.IMUX.4.DELAY
RXTERMINATION_FSinputTCELL33:IMUX.IMUX.7.DELAY
RXUSRCLK2_FSinputTCELL39:IMUX.CTRL.4
RXUSRCLK_FSinputTCELL39:IMUX.CTRL.5
RXUSRRDY_FSinputTCELL41:IMUX.IMUX.29.DELAY
RX_AXIS_TDATA_SF0outputTCELL38:OUT.15.TMIN
RX_AXIS_TDATA_SF1outputTCELL38:OUT.16.TMIN
RX_AXIS_TDATA_SF10outputTCELL38:OUT.27.TMIN
RX_AXIS_TDATA_SF11outputTCELL38:OUT.28.TMIN
RX_AXIS_TDATA_SF12outputTCELL38:OUT.29.TMIN
RX_AXIS_TDATA_SF13outputTCELL38:OUT.30.TMIN
RX_AXIS_TDATA_SF14outputTCELL38:OUT.31.TMIN
RX_AXIS_TDATA_SF15outputTCELL39:OUT.0.TMIN
RX_AXIS_TDATA_SF16outputTCELL39:OUT.1.TMIN
RX_AXIS_TDATA_SF17outputTCELL39:OUT.2.TMIN
RX_AXIS_TDATA_SF18outputTCELL39:OUT.3.TMIN
RX_AXIS_TDATA_SF19outputTCELL39:OUT.4.TMIN
RX_AXIS_TDATA_SF2outputTCELL38:OUT.17.TMIN
RX_AXIS_TDATA_SF20outputTCELL39:OUT.5.TMIN
RX_AXIS_TDATA_SF21outputTCELL39:OUT.6.TMIN
RX_AXIS_TDATA_SF22outputTCELL39:OUT.7.TMIN
RX_AXIS_TDATA_SF23outputTCELL39:OUT.8.TMIN
RX_AXIS_TDATA_SF24outputTCELL39:OUT.9.TMIN
RX_AXIS_TDATA_SF25outputTCELL39:OUT.11.TMIN
RX_AXIS_TDATA_SF26outputTCELL39:OUT.12.TMIN
RX_AXIS_TDATA_SF27outputTCELL39:OUT.13.TMIN
RX_AXIS_TDATA_SF28outputTCELL39:OUT.14.TMIN
RX_AXIS_TDATA_SF29outputTCELL39:OUT.15.TMIN
RX_AXIS_TDATA_SF3outputTCELL38:OUT.18.TMIN
RX_AXIS_TDATA_SF30outputTCELL39:OUT.16.TMIN
RX_AXIS_TDATA_SF31outputTCELL39:OUT.17.TMIN
RX_AXIS_TDATA_SF32outputTCELL39:OUT.18.TMIN
RX_AXIS_TDATA_SF33outputTCELL39:OUT.19.TMIN
RX_AXIS_TDATA_SF34outputTCELL39:OUT.21.TMIN
RX_AXIS_TDATA_SF35outputTCELL39:OUT.23.TMIN
RX_AXIS_TDATA_SF36outputTCELL39:OUT.24.TMIN
RX_AXIS_TDATA_SF37outputTCELL39:OUT.25.TMIN
RX_AXIS_TDATA_SF38outputTCELL39:OUT.26.TMIN
RX_AXIS_TDATA_SF39outputTCELL39:OUT.27.TMIN
RX_AXIS_TDATA_SF4outputTCELL38:OUT.19.TMIN
RX_AXIS_TDATA_SF40outputTCELL39:OUT.28.TMIN
RX_AXIS_TDATA_SF41outputTCELL39:OUT.29.TMIN
RX_AXIS_TDATA_SF42outputTCELL39:OUT.30.TMIN
RX_AXIS_TDATA_SF43outputTCELL39:OUT.31.TMIN
RX_AXIS_TDATA_SF44outputTCELL40:OUT.0.TMIN
RX_AXIS_TDATA_SF45outputTCELL40:OUT.1.TMIN
RX_AXIS_TDATA_SF46outputTCELL40:OUT.2.TMIN
RX_AXIS_TDATA_SF47outputTCELL40:OUT.3.TMIN
RX_AXIS_TDATA_SF48outputTCELL40:OUT.4.TMIN
RX_AXIS_TDATA_SF49outputTCELL40:OUT.5.TMIN
RX_AXIS_TDATA_SF5outputTCELL38:OUT.21.TMIN
RX_AXIS_TDATA_SF50outputTCELL40:OUT.6.TMIN
RX_AXIS_TDATA_SF51outputTCELL40:OUT.7.TMIN
RX_AXIS_TDATA_SF52outputTCELL40:OUT.8.TMIN
RX_AXIS_TDATA_SF53outputTCELL40:OUT.9.TMIN
RX_AXIS_TDATA_SF54outputTCELL40:OUT.11.TMIN
RX_AXIS_TDATA_SF55outputTCELL40:OUT.12.TMIN
RX_AXIS_TDATA_SF56outputTCELL40:OUT.13.TMIN
RX_AXIS_TDATA_SF57outputTCELL40:OUT.14.TMIN
RX_AXIS_TDATA_SF58outputTCELL40:OUT.15.TMIN
RX_AXIS_TDATA_SF59outputTCELL40:OUT.16.TMIN
RX_AXIS_TDATA_SF6outputTCELL38:OUT.23.TMIN
RX_AXIS_TDATA_SF60outputTCELL40:OUT.17.TMIN
RX_AXIS_TDATA_SF61outputTCELL40:OUT.18.TMIN
RX_AXIS_TDATA_SF62outputTCELL40:OUT.19.TMIN
RX_AXIS_TDATA_SF63outputTCELL40:OUT.21.TMIN
RX_AXIS_TDATA_SF7outputTCELL38:OUT.24.TMIN
RX_AXIS_TDATA_SF8outputTCELL38:OUT.25.TMIN
RX_AXIS_TDATA_SF9outputTCELL38:OUT.26.TMIN
RX_AXIS_TERR_SFoutputTCELL38:OUT.14.TMIN
RX_AXIS_TLAST_SF0outputTCELL38:OUT.5.TMIN
RX_AXIS_TLAST_SF1outputTCELL38:OUT.6.TMIN
RX_AXIS_TLAST_SF2outputTCELL38:OUT.7.TMIN
RX_AXIS_TLAST_SF3outputTCELL38:OUT.8.TMIN
RX_AXIS_TLAST_SF4outputTCELL38:OUT.9.TMIN
RX_AXIS_TLAST_SF5outputTCELL38:OUT.11.TMIN
RX_AXIS_TLAST_SF6outputTCELL38:OUT.12.TMIN
RX_AXIS_TLAST_SF7outputTCELL38:OUT.13.TMIN
RX_AXIS_TPRE_SF0outputTCELL37:OUT.29.TMIN
RX_AXIS_TPRE_SF1outputTCELL37:OUT.30.TMIN
RX_AXIS_TPRE_SF2outputTCELL37:OUT.31.TMIN
RX_AXIS_TPRE_SF3outputTCELL38:OUT.0.TMIN
RX_AXIS_TPRE_SF4outputTCELL38:OUT.1.TMIN
RX_AXIS_TPRE_SF5outputTCELL38:OUT.2.TMIN
RX_AXIS_TPRE_SF6outputTCELL38:OUT.3.TMIN
RX_AXIS_TPRE_SF7outputTCELL38:OUT.4.TMIN
RX_AXIS_TSOF_SF0outputTCELL37:OUT.27.TMIN
RX_AXIS_TSOF_SF1outputTCELL37:OUT.28.TMIN
RX_AXIS_TTERM_SF0outputTCELL37:OUT.21.TMIN
RX_AXIS_TTERM_SF1outputTCELL37:OUT.23.TMIN
RX_AXIS_TTERM_SF2outputTCELL37:OUT.24.TMIN
RX_AXIS_TTERM_SF3outputTCELL37:OUT.25.TMIN
RX_AXIS_TTERM_SF4outputTCELL37:OUT.26.TMIN
RX_AXIS_TVALID_SFoutputTCELL37:OUT.19.TMIN
RX_BITSLIP_SFoutputTCELL37:OUT.18.TMIN
RX_GB_SEQ_START_SFoutputTCELL37:OUT.17.TMIN
RX_PTP_SOP_POS_SFoutputTCELL37:OUT.15.TMIN
RX_PTP_SOP_SFoutputTCELL37:OUT.16.TMIN
SCANCLK_FSinputTCELL37:IMUX.CTRL.5
SCANENB_FSinputTCELL31:IMUX.IMUX.38.DELAY
SCANIN_FS0inputTCELL32:IMUX.IMUX.14.DELAY
SCANIN_FS1inputTCELL31:IMUX.IMUX.27.DELAY
SCANIN_FS10inputTCELL33:IMUX.IMUX.11.DELAY
SCANIN_FS11inputTCELL30:IMUX.IMUX.18.DELAY
SCANIN_FS12inputTCELL32:IMUX.IMUX.21.DELAY
SCANIN_FS13inputTCELL32:IMUX.IMUX.1.DELAY
SCANIN_FS14inputTCELL39:IMUX.IMUX.7.DELAY
SCANIN_FS15inputTCELL39:IMUX.IMUX.10.DELAY
SCANIN_FS16inputTCELL40:IMUX.IMUX.1.DELAY
SCANIN_FS17inputTCELL41:IMUX.IMUX.1.DELAY
SCANIN_FS18inputTCELL42:IMUX.IMUX.1.DELAY
SCANIN_FS2inputTCELL32:IMUX.IMUX.20.DELAY
SCANIN_FS3inputTCELL31:IMUX.IMUX.30.DELAY
SCANIN_FS4inputTCELL32:IMUX.IMUX.26.DELAY
SCANIN_FS5inputTCELL31:IMUX.IMUX.33.DELAY
SCANIN_FS6inputTCELL33:IMUX.IMUX.17.DELAY
SCANIN_FS7inputTCELL30:IMUX.IMUX.24.DELAY
SCANIN_FS8inputTCELL33:IMUX.IMUX.15.DELAY
SCANIN_FS9inputTCELL30:IMUX.IMUX.21.DELAY
SCANMODEB_FSinputTCELL31:IMUX.IMUX.32.DELAY
SCANOUT_SF0outputTCELL30:OUT.23.TMIN
SCANOUT_SF1outputTCELL30:OUT.18.TMIN
SCANOUT_SF10outputTCELL33:OUT.3.TMIN
SCANOUT_SF11outputTCELL30:OUT.4.TMIN
SCANOUT_SF12outputTCELL31:OUT.4.TMIN
SCANOUT_SF13outputTCELL33:OUT.4.TMIN
SCANOUT_SF14outputTCELL30:OUT.8.TMIN
SCANOUT_SF15outputTCELL31:OUT.8.TMIN
SCANOUT_SF16outputTCELL33:OUT.22.TMIN
SCANOUT_SF17outputTCELL33:OUT.10.TMIN
SCANOUT_SF18outputTCELL33:OUT.12.TMIN
SCANOUT_SF2outputTCELL32:OUT.23.TMIN
SCANOUT_SF3outputTCELL33:OUT.23.TMIN
SCANOUT_SF4outputTCELL34:OUT.23.TMIN
SCANOUT_SF5outputTCELL30:OUT.11.TMIN
SCANOUT_SF6outputTCELL30:OUT.0.TMIN
SCANOUT_SF7outputTCELL31:OUT.0.TMIN
SCANOUT_SF8outputTCELL30:OUT.2.TMIN
SCANOUT_SF9outputTCELL31:OUT.2.TMIN
SCANRSTB_FSinputTCELL31:IMUX.IMUX.39.DELAY
SCANRSTEN_FSinputTCELL31:IMUX.IMUX.42.DELAY
STAT_RX_BAD_CODE_SFoutputTCELL37:OUT.14.TMIN
STAT_RX_BAD_FCS_SFoutputTCELL42:OUT.6.TMIN
STAT_RX_BAD_PREAMBLE_SFoutputTCELL37:OUT.12.TMIN
STAT_RX_BAD_SFD_SFoutputTCELL37:OUT.13.TMIN
STAT_RX_BLOCK_LOCK_SFoutputTCELL37:OUT.11.TMIN
STAT_RX_BROADCAST_SFoutputTCELL37:OUT.9.TMIN
STAT_RX_BYTES_SF0outputTCELL37:OUT.4.TMIN
STAT_RX_BYTES_SF1outputTCELL37:OUT.5.TMIN
STAT_RX_BYTES_SF2outputTCELL37:OUT.6.TMIN
STAT_RX_BYTES_SF3outputTCELL37:OUT.7.TMIN
STAT_RX_FCS_ERR_SFoutputTCELL37:OUT.3.TMIN
STAT_RX_FRAMING_ERR_SFoutputTCELL37:OUT.2.TMIN
STAT_RX_GOT_SIGNAL_OS_SFoutputTCELL37:OUT.1.TMIN
STAT_RX_HI_BER_SFoutputTCELL37:OUT.0.TMIN
STAT_RX_INRANGEERR_SFoutputTCELL42:OUT.2.TMIN
STAT_RX_INTERNAL_LOCAL_FAULT_SFoutputTCELL42:OUT.7.TMIN
STAT_RX_LOCAL_FAULT_SFoutputTCELL42:OUT.1.TMIN
STAT_RX_MULTICAST_SFoutputTCELL42:OUT.0.TMIN
STAT_RX_PAUSE_QUANTA_SF0outputTCELL41:OUT.23.TMIN
STAT_RX_PAUSE_QUANTA_SF1outputTCELL41:OUT.24.TMIN
STAT_RX_PAUSE_QUANTA_SF2outputTCELL41:OUT.25.TMIN
STAT_RX_PAUSE_QUANTA_SF3outputTCELL41:OUT.26.TMIN
STAT_RX_PAUSE_QUANTA_SF4outputTCELL41:OUT.27.TMIN
STAT_RX_PAUSE_QUANTA_SF5outputTCELL41:OUT.28.TMIN
STAT_RX_PAUSE_QUANTA_SF6outputTCELL41:OUT.29.TMIN
STAT_RX_PAUSE_QUANTA_SF7outputTCELL41:OUT.30.TMIN
STAT_RX_PAUSE_QUANTA_SF8outputTCELL41:OUT.31.TMIN
STAT_RX_PAUSE_REQ_SF0outputTCELL41:OUT.11.TMIN
STAT_RX_PAUSE_REQ_SF1outputTCELL41:OUT.13.TMIN
STAT_RX_PAUSE_REQ_SF2outputTCELL41:OUT.14.TMIN
STAT_RX_PAUSE_REQ_SF3outputTCELL41:OUT.15.TMIN
STAT_RX_PAUSE_REQ_SF4outputTCELL41:OUT.16.TMIN
STAT_RX_PAUSE_REQ_SF5outputTCELL41:OUT.17.TMIN
STAT_RX_PAUSE_REQ_SF6outputTCELL41:OUT.18.TMIN
STAT_RX_PAUSE_REQ_SF7outputTCELL41:OUT.19.TMIN
STAT_RX_PAUSE_REQ_SF8outputTCELL41:OUT.21.TMIN
STAT_RX_PAUSE_VALID_SF0outputTCELL41:OUT.1.TMIN
STAT_RX_PAUSE_VALID_SF1outputTCELL41:OUT.2.TMIN
STAT_RX_PAUSE_VALID_SF2outputTCELL41:OUT.3.TMIN
STAT_RX_PAUSE_VALID_SF3outputTCELL41:OUT.4.TMIN
STAT_RX_PAUSE_VALID_SF4outputTCELL41:OUT.5.TMIN
STAT_RX_PAUSE_VALID_SF5outputTCELL41:OUT.6.TMIN
STAT_RX_PAUSE_VALID_SF6outputTCELL41:OUT.7.TMIN
STAT_RX_PAUSE_VALID_SF7outputTCELL41:OUT.8.TMIN
STAT_RX_PAUSE_VALID_SF8outputTCELL41:OUT.9.TMIN
STAT_RX_PKT_ERR_SFoutputTCELL40:OUT.31.TMIN
STAT_RX_PKT_SFoutputTCELL41:OUT.0.TMIN
STAT_RX_RECEIVED_LOCAL_FAULT_SFoutputTCELL40:OUT.30.TMIN
STAT_RX_REMOTE_FAULT_SFoutputTCELL40:OUT.29.TMIN
STAT_RX_STATUS_SFoutputTCELL40:OUT.28.TMIN
STAT_RX_STOMPED_FCS_SFoutputTCELL42:OUT.5.TMIN
STAT_RX_TEST_PATTERN_MISMATCH_SFoutputTCELL40:OUT.27.TMIN
STAT_RX_TRUNCATED_SFoutputTCELL40:OUT.26.TMIN
STAT_RX_UNICAST_SFoutputTCELL40:OUT.25.TMIN
STAT_RX_VALID_CTRL_CODE_SFoutputTCELL40:OUT.24.TMIN
STAT_RX_VLAN_SFoutputTCELL40:OUT.23.TMIN
STAT_TX_BAD_FCS_SFoutputTCELL36:OUT.11.TMIN
STAT_TX_BROADCAST_SFoutputTCELL36:OUT.13.TMIN
STAT_TX_BYTES_SF0outputTCELL36:OUT.2.TMIN
STAT_TX_BYTES_SF1outputTCELL36:OUT.3.TMIN
STAT_TX_BYTES_SF2outputTCELL36:OUT.4.TMIN
STAT_TX_BYTES_SF3outputTCELL36:OUT.5.TMIN
STAT_TX_FCS_ERR_SFoutputTCELL36:OUT.1.TMIN
STAT_TX_MULTICAST_SFoutputTCELL36:OUT.14.TMIN
STAT_TX_PAUSE_VALID_SF0outputTCELL35:OUT.24.TMIN
STAT_TX_PAUSE_VALID_SF1outputTCELL35:OUT.25.TMIN
STAT_TX_PAUSE_VALID_SF2outputTCELL35:OUT.26.TMIN
STAT_TX_PAUSE_VALID_SF3outputTCELL35:OUT.27.TMIN
STAT_TX_PAUSE_VALID_SF4outputTCELL35:OUT.28.TMIN
STAT_TX_PAUSE_VALID_SF5outputTCELL35:OUT.29.TMIN
STAT_TX_PAUSE_VALID_SF6outputTCELL35:OUT.30.TMIN
STAT_TX_PAUSE_VALID_SF7outputTCELL35:OUT.31.TMIN
STAT_TX_PAUSE_VALID_SF8outputTCELL36:OUT.0.TMIN
STAT_TX_PKT_ERR_SFoutputTCELL35:OUT.21.TMIN
STAT_TX_PKT_SFoutputTCELL35:OUT.23.TMIN
STAT_TX_UNICAST_SFoutputTCELL36:OUT.15.TMIN
STAT_TX_VLAN_SFoutputTCELL36:OUT.12.TMIN
STEPSIZEPPM_FS0inputTCELL32:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS1inputTCELL33:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS2inputTCELL34:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS3inputTCELL35:IMUX.IMUX.33.DELAY
STEPSIZEPPM_FS4inputTCELL36:IMUX.IMUX.33.DELAY
TCOCLKFSMFROUT_FSinputTCELL36:IMUX.CTRL.5
TCODABYPASS_FSinputTCELL35:IMUX.IMUX.9.DELAY
TCODAOVREN_FSinputTCELL36:IMUX.IMUX.16.DELAY
TCODAPWDN_FSinputTCELL37:IMUX.IMUX.9.DELAY
TCODARESET_FSinputTCELL37:IMUX.IMUX.7.DELAY
TCOHOLDFROUT_FSinputTCELL36:IMUX.IMUX.19.DELAY
TCOINITDONE_SFoutputTCELL35:OUT.4.TMIN
TCOINITSET_FSinputTCELL38:IMUX.IMUX.34.DELAY
TCOPIOVREN_FSinputTCELL33:IMUX.IMUX.25.DELAY
TCOUPDNFROUT_FSinputTCELL37:IMUX.IMUX.28.DELAY
TDASOFTRESET_FSinputTCELL36:IMUX.IMUX.9.DELAY
TDASOFTRSTDONE_SFoutputTCELL33:OUT.8.TMIN
TSTCLK0_FSinputTCELL38:IMUX.CTRL.5
TSTCLK1_FSinputTCELL38:IMUX.CTRL.4
TSTIN_FS0inputTCELL30:IMUX.IMUX.1.DELAY
TSTIN_FS1inputTCELL32:IMUX.IMUX.45.DELAY
TSTIN_FS10inputTCELL30:IMUX.IMUX.16.DELAY
TSTIN_FS11inputTCELL33:IMUX.IMUX.5.DELAY
TSTIN_FS12inputTCELL30:IMUX.IMUX.19.DELAY
TSTIN_FS13inputTCELL33:IMUX.IMUX.14.DELAY
TSTIN_FS14inputTCELL30:IMUX.IMUX.22.DELAY
TSTIN_FS15inputTCELL31:IMUX.IMUX.22.DELAY
TSTIN_FS16inputTCELL30:IMUX.IMUX.25.DELAY
TSTIN_FS17inputTCELL33:IMUX.IMUX.20.DELAY
TSTIN_FS18inputTCELL32:IMUX.IMUX.15.DELAY
TSTIN_FS19inputTCELL31:IMUX.IMUX.28.DELAY
TSTIN_FS2inputTCELL30:IMUX.IMUX.4.DELAY
TSTIN_FS3inputTCELL33:IMUX.IMUX.0.DELAY
TSTIN_FS4inputTCELL31:IMUX.IMUX.31.DELAY
TSTIN_FS5inputTCELL31:IMUX.IMUX.7.DELAY
TSTIN_FS6inputTCELL32:IMUX.IMUX.0.DELAY
TSTIN_FS7inputTCELL31:IMUX.IMUX.10.DELAY
TSTIN_FS8inputTCELL32:IMUX.IMUX.5.DELAY
TSTIN_FS9inputTCELL31:IMUX.IMUX.13.DELAY
TSTPWRDNOVRDB_FSinputTCELL31:IMUX.IMUX.44.DELAY
TSTPWRDN_FS0inputTCELL31:IMUX.IMUX.3.DELAY
TSTPWRDN_FS1inputTCELL31:IMUX.IMUX.6.DELAY
TSTPWRDN_FS2inputTCELL31:IMUX.IMUX.9.DELAY
TSTPWRDN_FS3inputTCELL31:IMUX.IMUX.12.DELAY
TSTPWRDN_FS4inputTCELL31:IMUX.IMUX.15.DELAY
TXCODAALGNEN_FSinputTCELL35:IMUX.IMUX.7.DELAY
TXCOPIALGNEN_FSinputTCELL37:IMUX.IMUX.16.DELAY
TXCOPIPHDONE_SFoutputTCELL32:OUT.28.TMIN
TXCOPISETPHS_FSinputTCELL37:IMUX.IMUX.19.DELAY
TXDCCDONE_SFoutputTCELL33:OUT.18.TMIN
TXDCCSRESET_FSinputTCELL32:IMUX.IMUX.10.DELAY
TXDCCSTART_FSinputTCELL37:IMUX.IMUX.4.DELAY
TXDRVAMP_FS0inputTCELL34:IMUX.IMUX.12.DELAY
TXDRVAMP_FS1inputTCELL35:IMUX.IMUX.12.DELAY
TXDRVAMP_FS2inputTCELL36:IMUX.IMUX.12.DELAY
TXDRVAMP_FS3inputTCELL37:IMUX.IMUX.12.DELAY
TXDRVAMP_FS4inputTCELL37:IMUX.IMUX.3.DELAY
TXELECIDLE_FSinputTCELL37:IMUX.IMUX.27.DELAY
TXEMPMAIN_FS0inputTCELL32:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS1inputTCELL33:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS2inputTCELL34:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS3inputTCELL35:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS4inputTCELL36:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS5inputTCELL37:IMUX.IMUX.18.DELAY
TXEMPMAIN_FS6inputTCELL38:IMUX.IMUX.18.DELAY
TXEMPPOS_FS0inputTCELL32:IMUX.IMUX.24.DELAY
TXEMPPOS_FS1inputTCELL33:IMUX.IMUX.24.DELAY
TXEMPPOS_FS2inputTCELL34:IMUX.IMUX.24.DELAY
TXEMPPOS_FS3inputTCELL35:IMUX.IMUX.24.DELAY
TXEMPPOS_FS4inputTCELL36:IMUX.IMUX.24.DELAY
TXEMPPRE_FS0inputTCELL32:IMUX.IMUX.13.DELAY
TXEMPPRE_FS1inputTCELL33:IMUX.IMUX.13.DELAY
TXEMPPRE_FS2inputTCELL34:IMUX.IMUX.13.DELAY
TXEMPPRE_FS3inputTCELL35:IMUX.IMUX.13.DELAY
TXEMPPRE_FS4inputTCELL36:IMUX.IMUX.13.DELAY
TXLINKSYNCDONE_SFoutputTCELL33:OUT.11.TMIN
TXMSTRSETPHDONE_FSinputTCELL34:IMUX.IMUX.4.DELAY
TXMUXDCDEXHOLD_FSinputTCELL40:IMUX.IMUX.45.DELAY
TXMUXDCDORWREN_FSinputTCELL40:IMUX.IMUX.5.DELAY
TXOUTCKCTL_FS0inputTCELL34:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS1inputTCELL35:IMUX.IMUX.3.DELAY
TXOUTCKCTL_FS2inputTCELL36:IMUX.IMUX.3.DELAY
TXOUTCLKPCS_SFoutputTCELL32:OUT.11.TMIN
TXOUTCLK_SFoutputTCELL32:OUT.6.TMIN
TXPIPPMPWDN_FSinputTCELL33:IMUX.IMUX.16.DELAY
TXPLLCKSEL_FS0inputTCELL35:IMUX.IMUX.27.DELAY
TXPLLCKSEL_FS1inputTCELL36:IMUX.IMUX.27.DELAY
TXPMARESETDONE_SFoutputTCELL32:OUT.24.TMIN
TXPMARESET_FSinputTCELL36:IMUX.CTRL.0
TXPOLARITY_FSinputTCELL32:IMUX.IMUX.25.DELAY
TXPPMOVRDEN_FSinputTCELL33:IMUX.IMUX.19.DELAY
TXPPMSEL_FSinputTCELL33:IMUX.IMUX.10.DELAY
TXPRBSINERR_FSinputTCELL32:IMUX.IMUX.19.DELAY
TXPRBSPTN_FS0inputTCELL34:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS1inputTCELL35:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS2inputTCELL36:IMUX.IMUX.25.DELAY
TXPRBSPTN_FS3inputTCELL36:IMUX.IMUX.1.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL34:OUT.17.TMIN
TXPROGDIVRESET_FSinputTCELL35:IMUX.CTRL.0
TXPWRDN_FS0inputTCELL32:IMUX.IMUX.28.DELAY
TXPWRDN_FS1inputTCELL33:IMUX.IMUX.28.DELAY
TXRAWDATA_FS0inputTCELL30:IMUX.IMUX.27.DELAY
TXRAWDATA_FS1inputTCELL30:IMUX.IMUX.26.DELAY
TXRAWDATA_FS10inputTCELL30:IMUX.IMUX.32.DELAY
TXRAWDATA_FS11inputTCELL30:IMUX.IMUX.9.DELAY
TXRAWDATA_FS12inputTCELL30:IMUX.IMUX.35.DELAY
TXRAWDATA_FS13inputTCELL30:IMUX.IMUX.34.DELAY
TXRAWDATA_FS14inputTCELL30:IMUX.IMUX.10.DELAY
TXRAWDATA_FS15inputTCELL30:IMUX.IMUX.37.DELAY
TXRAWDATA_FS16inputTCELL30:IMUX.IMUX.36.DELAY
TXRAWDATA_FS17inputTCELL30:IMUX.IMUX.11.DELAY
TXRAWDATA_FS18inputTCELL30:IMUX.IMUX.40.DELAY
TXRAWDATA_FS19inputTCELL30:IMUX.IMUX.13.DELAY
TXRAWDATA_FS2inputTCELL30:IMUX.IMUX.6.DELAY
TXRAWDATA_FS20inputTCELL30:IMUX.IMUX.43.DELAY
TXRAWDATA_FS21inputTCELL30:IMUX.IMUX.42.DELAY
TXRAWDATA_FS22inputTCELL30:IMUX.IMUX.14.DELAY
TXRAWDATA_FS23inputTCELL30:IMUX.IMUX.45.DELAY
TXRAWDATA_FS24inputTCELL30:IMUX.IMUX.44.DELAY
TXRAWDATA_FS25inputTCELL30:IMUX.IMUX.15.DELAY
TXRAWDATA_FS26inputTCELL30:IMUX.IMUX.47.DELAY
TXRAWDATA_FS27inputTCELL30:IMUX.IMUX.46.DELAY
TXRAWDATA_FS28inputTCELL31:IMUX.IMUX.0.DELAY
TXRAWDATA_FS29inputTCELL31:IMUX.IMUX.17.DELAY
TXRAWDATA_FS3inputTCELL30:IMUX.IMUX.29.DELAY
TXRAWDATA_FS30inputTCELL31:IMUX.IMUX.16.DELAY
TXRAWDATA_FS31inputTCELL31:IMUX.IMUX.1.DELAY
TXRAWDATA_FS32inputTCELL31:IMUX.IMUX.19.DELAY
TXRAWDATA_FS33inputTCELL31:IMUX.IMUX.18.DELAY
TXRAWDATA_FS34inputTCELL31:IMUX.IMUX.2.DELAY
TXRAWDATA_FS35inputTCELL31:IMUX.IMUX.21.DELAY
TXRAWDATA_FS36inputTCELL31:IMUX.IMUX.4.DELAY
TXRAWDATA_FS37inputTCELL31:IMUX.IMUX.25.DELAY
TXRAWDATA_FS38inputTCELL31:IMUX.IMUX.24.DELAY
TXRAWDATA_FS39inputTCELL31:IMUX.IMUX.5.DELAY
TXRAWDATA_FS4inputTCELL30:IMUX.IMUX.28.DELAY
TXRAWDATA_FS5inputTCELL30:IMUX.IMUX.7.DELAY
TXRAWDATA_FS6inputTCELL30:IMUX.IMUX.31.DELAY
TXRAWDATA_FS7inputTCELL30:IMUX.IMUX.30.DELAY
TXRAWDATA_FS8inputTCELL30:IMUX.IMUX.8.DELAY
TXRAWDATA_FS9inputTCELL30:IMUX.IMUX.33.DELAY
TXRESETDONE_SFoutputTCELL33:OUT.13.TMIN
TXRESET_FSinputTCELL38:IMUX.IMUX.9.DELAY
TXSERPWRDN_FSinputTCELL32:IMUX.IMUX.27.DELAY
TXSLVSYNCEN_FSinputTCELL33:IMUX.IMUX.4.DELAY
TXSYNCEN2SLV_SFoutputTCELL33:OUT.2.TMIN
TXSYNCFSMMASTER_FSinputTCELL38:IMUX.IMUX.6.DELAY
TXSYSCKSEL_FS0inputTCELL33:IMUX.IMUX.27.DELAY
TXSYSCKSEL_FS1inputTCELL34:IMUX.IMUX.27.DELAY
TXUSRCLK2_FSinputTCELL35:IMUX.CTRL.4
TXUSRCLK_FSinputTCELL35:IMUX.CTRL.5
TXUSRRDY_FSinputTCELL32:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS0inputTCELL33:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS1inputTCELL33:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS10inputTCELL33:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS11inputTCELL33:IMUX.IMUX.39.DELAY
TX_AXIS_TDATA_FS12inputTCELL33:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS13inputTCELL33:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS14inputTCELL33:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS15inputTCELL33:IMUX.IMUX.44.DELAY
TX_AXIS_TDATA_FS16inputTCELL33:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS17inputTCELL33:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS18inputTCELL33:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS19inputTCELL34:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS2inputTCELL33:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS20inputTCELL34:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS21inputTCELL34:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS22inputTCELL34:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS23inputTCELL34:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS24inputTCELL34:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS25inputTCELL34:IMUX.IMUX.9.DELAY
TX_AXIS_TDATA_FS26inputTCELL34:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS27inputTCELL34:IMUX.IMUX.11.DELAY
TX_AXIS_TDATA_FS28inputTCELL34:IMUX.IMUX.14.DELAY
TX_AXIS_TDATA_FS29inputTCELL34:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS3inputTCELL33:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS30inputTCELL34:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS31inputTCELL34:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS32inputTCELL34:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS33inputTCELL34:IMUX.IMUX.20.DELAY
TX_AXIS_TDATA_FS34inputTCELL34:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS35inputTCELL34:IMUX.IMUX.22.DELAY
TX_AXIS_TDATA_FS36inputTCELL34:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS37inputTCELL34:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS38inputTCELL34:IMUX.IMUX.28.DELAY
TX_AXIS_TDATA_FS39inputTCELL34:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS4inputTCELL33:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS40inputTCELL34:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS41inputTCELL34:IMUX.IMUX.31.DELAY
TX_AXIS_TDATA_FS42inputTCELL34:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS43inputTCELL34:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS44inputTCELL34:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS45inputTCELL34:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS46inputTCELL34:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS47inputTCELL34:IMUX.IMUX.39.DELAY
TX_AXIS_TDATA_FS48inputTCELL34:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS49inputTCELL34:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS5inputTCELL33:IMUX.IMUX.31.DELAY
TX_AXIS_TDATA_FS50inputTCELL34:IMUX.IMUX.44.DELAY
TX_AXIS_TDATA_FS51inputTCELL34:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS52inputTCELL34:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS53inputTCELL35:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS54inputTCELL35:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS55inputTCELL35:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS56inputTCELL35:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS57inputTCELL35:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS58inputTCELL35:IMUX.IMUX.11.DELAY
TX_AXIS_TDATA_FS59inputTCELL35:IMUX.IMUX.14.DELAY
TX_AXIS_TDATA_FS6inputTCELL33:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS60inputTCELL35:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS61inputTCELL35:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS62inputTCELL35:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS63inputTCELL35:IMUX.IMUX.20.DELAY
TX_AXIS_TDATA_FS7inputTCELL33:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS8inputTCELL33:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS9inputTCELL33:IMUX.IMUX.36.DELAY
TX_AXIS_TERR_FSinputTCELL36:IMUX.IMUX.21.DELAY
TX_AXIS_TLAST_FS0inputTCELL36:IMUX.IMUX.2.DELAY
TX_AXIS_TLAST_FS1inputTCELL36:IMUX.IMUX.5.DELAY
TX_AXIS_TLAST_FS2inputTCELL36:IMUX.IMUX.8.DELAY
TX_AXIS_TLAST_FS3inputTCELL36:IMUX.IMUX.11.DELAY
TX_AXIS_TLAST_FS4inputTCELL36:IMUX.IMUX.14.DELAY
TX_AXIS_TLAST_FS5inputTCELL36:IMUX.IMUX.15.DELAY
TX_AXIS_TLAST_FS6inputTCELL36:IMUX.IMUX.17.DELAY
TX_AXIS_TLAST_FS7inputTCELL36:IMUX.IMUX.20.DELAY
TX_AXIS_TPOISON_FSinputTCELL36:IMUX.IMUX.0.DELAY
TX_AXIS_TPRE_FS0inputTCELL35:IMUX.IMUX.36.DELAY
TX_AXIS_TPRE_FS1inputTCELL35:IMUX.IMUX.38.DELAY
TX_AXIS_TPRE_FS2inputTCELL35:IMUX.IMUX.39.DELAY
TX_AXIS_TPRE_FS3inputTCELL35:IMUX.IMUX.41.DELAY
TX_AXIS_TPRE_FS4inputTCELL35:IMUX.IMUX.42.DELAY
TX_AXIS_TPRE_FS5inputTCELL35:IMUX.IMUX.44.DELAY
TX_AXIS_TPRE_FS6inputTCELL35:IMUX.IMUX.45.DELAY
TX_AXIS_TPRE_FS7inputTCELL35:IMUX.IMUX.47.DELAY
TX_AXIS_TREADY_SFoutputTCELL35:OUT.19.TMIN
TX_AXIS_TSOF_FS0inputTCELL35:IMUX.IMUX.32.DELAY
TX_AXIS_TSOF_FS1inputTCELL35:IMUX.IMUX.35.DELAY
TX_AXIS_TTERM_FS0inputTCELL35:IMUX.IMUX.23.DELAY
TX_AXIS_TTERM_FS1inputTCELL35:IMUX.IMUX.26.DELAY
TX_AXIS_TTERM_FS2inputTCELL35:IMUX.IMUX.28.DELAY
TX_AXIS_TTERM_FS3inputTCELL35:IMUX.IMUX.29.DELAY
TX_AXIS_TTERM_FS4inputTCELL35:IMUX.IMUX.30.DELAY
TX_AXIS_TVALID_FSinputTCELL35:IMUX.IMUX.22.DELAY
TX_GB_SEQ_START_SFoutputTCELL35:OUT.18.TMIN
TX_GB_SEQ_SYNC_FSinputTCELL35:IMUX.IMUX.21.DELAY
TX_PTP_SOP_POS_SFoutputTCELL35:OUT.16.TMIN
TX_PTP_SOP_SFoutputTCELL35:OUT.17.TMIN
TX_UNFOUT_SFoutputTCELL35:OUT.15.TMIN

Bel GTF_CHANNEL3

ultrascaleplus GTF bel GTF_CHANNEL3
PinDirectionWires
AFECFOKEN_FSinputTCELL49:IMUX.IMUX.47.DELAY
BSR_SERIAL_FSinputTCELL53:IMUX.IMUX.38.DELAY
CDRFRRESET_FSinputTCELL51:IMUX.CTRL.7
CDRHOLD_FSinputTCELL51:IMUX.IMUX.33.DELAY
CDRLOCK_SFoutputTCELL53:OUT.25.TMIN
CDROVREN_FSinputTCELL50:IMUX.IMUX.33.DELAY
CDRPHRESET_FSinputTCELL48:IMUX.CTRL.7
CDRSTEPDIR_FSinputTCELL47:IMUX.IMUX.19.DELAY
CDRSTEPSQ_FSinputTCELL47:IMUX.IMUX.14.DELAY
CDRSTEPSX_FSinputTCELL47:IMUX.IMUX.16.DELAY
CFGRESET_FSinputTCELL57:IMUX.CTRL.7
CFOKDONE_SFoutputTCELL56:OUT.25.TMIN
CFOKFORCEDONE_SFoutputTCELL56:OUT.31.TMIN
CFOKFSTARTED_SFoutputTCELL55:OUT.31.TMIN
CFOKRESET_FSinputTCELL49:IMUX.IMUX.35.DELAY
CFOKSTART_SFoutputTCELL55:OUT.25.TMIN
CKOKDONE_SFoutputTCELL56:OUT.14.TMIN
CKOKRESET_FSinputTCELL49:IMUX.IMUX.42.DELAY
CKPINRSRVD0_FSinputTCELL47:IMUX.CTRL.2
CKPINRSRVD1_FSinputTCELL47:IMUX.CTRL.3
COREREFCLK_FSinputTCELL58:IMUX.CTRL.2
CPLFBLOSS_SFoutputTCELL54:OUT.30.TMIN
CPLFREQLOCK_SFoutputTCELL58:OUT.21.TMIN
CPLLDMONCLK_FSinputTCELL56:IMUX.CTRL.2
CPLLFREQLOCK_FSinputTCELL53:IMUX.IMUX.34.DELAY
CPLLKDETEN_FSinputTCELL56:IMUX.IMUX.22.DELAY
CPLPWRDN_FSinputTCELL57:IMUX.IMUX.22.DELAY
CPLREFLOSS_SFoutputTCELL56:OUT.26.TMIN
CPLREFSELDYN_FS0inputTCELL56:IMUX.IMUX.28.DELAY
CPLREFSELDYN_FS1inputTCELL56:IMUX.IMUX.34.DELAY
CPLREFSELDYN_FS2inputTCELL56:IMUX.IMUX.40.DELAY
CPLRESET_FSinputTCELL56:IMUX.CTRL.7
CTL_RX_PAUSE_ACK_FS0inputTCELL50:IMUX.IMUX.31.DELAY
CTL_RX_PAUSE_ACK_FS1inputTCELL50:IMUX.IMUX.29.DELAY
CTL_RX_PAUSE_ACK_FS2inputTCELL50:IMUX.IMUX.5.DELAY
CTL_RX_PAUSE_ACK_FS3inputTCELL50:IMUX.IMUX.4.DELAY
CTL_RX_PAUSE_ACK_FS4inputTCELL50:IMUX.IMUX.25.DELAY
CTL_RX_PAUSE_ACK_FS5inputTCELL50:IMUX.IMUX.23.DELAY
CTL_RX_PAUSE_ACK_FS6inputTCELL50:IMUX.IMUX.2.DELAY
CTL_RX_PAUSE_ACK_FS7inputTCELL50:IMUX.IMUX.1.DELAY
CTL_RX_PAUSE_ACK_FS8inputTCELL50:IMUX.IMUX.19.DELAY
CTL_TX_PAUSE_REQ_FS0inputTCELL53:IMUX.IMUX.35.DELAY
CTL_TX_PAUSE_REQ_FS1inputTCELL53:IMUX.IMUX.8.DELAY
CTL_TX_PAUSE_REQ_FS2inputTCELL53:IMUX.IMUX.7.DELAY
CTL_TX_PAUSE_REQ_FS3inputTCELL53:IMUX.IMUX.29.DELAY
CTL_TX_PAUSE_REQ_FS4inputTCELL53:IMUX.IMUX.5.DELAY
CTL_TX_PAUSE_REQ_FS5inputTCELL53:IMUX.IMUX.4.DELAY
CTL_TX_PAUSE_REQ_FS6inputTCELL53:IMUX.IMUX.25.DELAY
CTL_TX_PAUSE_REQ_FS7inputTCELL53:IMUX.IMUX.23.DELAY
CTL_TX_PAUSE_REQ_FS8inputTCELL53:IMUX.IMUX.2.DELAY
CTL_TX_RESEND_PAUSE_FSinputTCELL53:IMUX.IMUX.9.DELAY
CTL_TX_SEND_IDLE_FSinputTCELL53:IMUX.IMUX.10.DELAY
CTL_TX_SEND_LFI_FSinputTCELL53:IMUX.IMUX.41.DELAY
CTL_TX_SEND_RFI_FSinputTCELL53:IMUX.IMUX.12.DELAY
DADDR_FS0inputTCELL59:IMUX.IMUX.42.DELAY
DADDR_FS1inputTCELL58:IMUX.IMUX.6.DELAY
DADDR_FS2inputTCELL57:IMUX.IMUX.32.DELAY
DADDR_FS3inputTCELL59:IMUX.IMUX.13.DELAY
DADDR_FS4inputTCELL57:IMUX.IMUX.24.DELAY
DADDR_FS5inputTCELL57:IMUX.IMUX.41.DELAY
DADDR_FS6inputTCELL59:IMUX.IMUX.4.DELAY
DADDR_FS7inputTCELL57:IMUX.IMUX.4.DELAY
DADDR_FS8inputTCELL57:IMUX.IMUX.17.DELAY
DADDR_FS9inputTCELL58:IMUX.IMUX.30.DELAY
DCLK_FSinputTCELL59:IMUX.CTRL.3
DEN_FSinputTCELL59:IMUX.IMUX.46.DELAY
DFECFOKCFNUM_FS0inputTCELL47:IMUX.IMUX.24.DELAY
DFECFOKCFNUM_FS1inputTCELL47:IMUX.IMUX.18.DELAY
DFECFOKCFNUM_FS2inputTCELL47:IMUX.IMUX.47.DELAY
DFECFOKCFNUM_FS3inputTCELL47:IMUX.IMUX.13.DELAY
DFECFOKFEN_FSinputTCELL50:IMUX.IMUX.39.DELAY
DFECFOKFPULSE_FSinputTCELL50:IMUX.IMUX.12.DELAY
DFECFOKHOLD_FSinputTCELL49:IMUX.IMUX.24.DELAY
DFECFOKOVREN_FSinputTCELL50:IMUX.IMUX.45.DELAY
DFEDOUTMODE_FS0inputTCELL48:IMUX.IMUX.4.DELAY
DFEDOUTMODE_FS1inputTCELL48:IMUX.IMUX.1.DELAY
DFEDOUT_SF0outputTCELL59:OUT.5.TMIN
DFEDOUT_SF1outputTCELL59:OUT.7.TMIN
DFEDOUT_SF2outputTCELL57:OUT.5.TMIN
DFEDOUT_SF3outputTCELL56:OUT.5.TMIN
DFEDOUT_SF4outputTCELL55:OUT.5.TMIN
DFEDOUT_SF5outputTCELL59:OUT.25.TMIN
DFEDOUT_SF6outputTCELL58:OUT.25.TMIN
DFEDOUT_SF7outputTCELL55:OUT.24.TMIN
DFEGCHOLD_FSinputTCELL49:IMUX.IMUX.17.DELAY
DFEGCOVREN_FSinputTCELL49:IMUX.IMUX.1.DELAY
DFEH10HOLD_FSinputTCELL47:IMUX.IMUX.45.DELAY
DFEH10OVREN_FSinputTCELL47:IMUX.IMUX.12.DELAY
DFEH11HOLD_FSinputTCELL49:IMUX.IMUX.39.DELAY
DFEH11OVREN_FSinputTCELL49:IMUX.IMUX.9.DELAY
DFEH12HOLD_FSinputTCELL48:IMUX.IMUX.39.DELAY
DFEH12OVREN_FSinputTCELL48:IMUX.IMUX.9.DELAY
DFEH13HOLD_FSinputTCELL47:IMUX.IMUX.39.DELAY
DFEH13OVREN_FSinputTCELL47:IMUX.IMUX.9.DELAY
DFEH14HOLD_FSinputTCELL49:IMUX.IMUX.33.DELAY
DFEH14OVREN_FSinputTCELL49:IMUX.IMUX.6.DELAY
DFEH15HOLD_FSinputTCELL48:IMUX.IMUX.33.DELAY
DFEH15OVREN_FSinputTCELL48:IMUX.IMUX.6.DELAY
DFEH2HOLD_FSinputTCELL49:IMUX.IMUX.32.DELAY
DFEH2OVREN_FSinputTCELL49:IMUX.IMUX.26.DELAY
DFEH3HOLD_FSinputTCELL48:IMUX.IMUX.32.DELAY
DFEH3OVREN_FSinputTCELL48:IMUX.IMUX.26.DELAY
DFEH4HOLD_FSinputTCELL47:IMUX.IMUX.32.DELAY
DFEH4OVREN_FSinputTCELL47:IMUX.IMUX.26.DELAY
DFEH5HOLD_FSinputTCELL49:IMUX.IMUX.20.DELAY
DFEH5OVREN_FSinputTCELL49:IMUX.IMUX.15.DELAY
DFEH6HOLD_FSinputTCELL48:IMUX.IMUX.20.DELAY
DFEH6OVREN_FSinputTCELL48:IMUX.IMUX.15.DELAY
DFEH7HOLD_FSinputTCELL47:IMUX.IMUX.20.DELAY
DFEH7OVREN_FSinputTCELL47:IMUX.IMUX.15.DELAY
DFEH8HOLD_FSinputTCELL49:IMUX.IMUX.45.DELAY
DFEH8OVREN_FSinputTCELL49:IMUX.IMUX.12.DELAY
DFEH9HOLD_FSinputTCELL48:IMUX.IMUX.45.DELAY
DFEH9OVREN_FSinputTCELL48:IMUX.IMUX.12.DELAY
DFEKLHOLD_FSinputTCELL49:IMUX.IMUX.23.DELAY
DFEKLOVREN_FSinputTCELL49:IMUX.IMUX.4.DELAY
DFERESET_FSinputTCELL52:IMUX.CTRL.7
DFEUTHOLD_FSinputTCELL49:IMUX.IMUX.2.DELAY
DFEUTOVREN_FSinputTCELL49:IMUX.IMUX.25.DELAY
DFEVPHOLD_FSinputTCELL48:IMUX.IMUX.2.DELAY
DFEVPOVREN_FSinputTCELL48:IMUX.IMUX.25.DELAY
DFEYEN_FSinputTCELL48:IMUX.IMUX.19.DELAY
DFE_KH_EXTHOLD_FSinputTCELL58:IMUX.IMUX.19.DELAY
DFE_KH_OVERWREN_FSinputTCELL55:IMUX.IMUX.21.DELAY
DI_FS0inputTCELL59:IMUX.IMUX.36.DELAY
DI_FS1inputTCELL57:IMUX.IMUX.42.DELAY
DI_FS10inputTCELL56:IMUX.IMUX.30.DELAY
DI_FS11inputTCELL58:IMUX.IMUX.41.DELAY
DI_FS12inputTCELL58:IMUX.IMUX.35.DELAY
DI_FS13inputTCELL58:IMUX.IMUX.29.DELAY
DI_FS14inputTCELL58:IMUX.IMUX.23.DELAY
DI_FS15inputTCELL58:IMUX.IMUX.17.DELAY
DI_FS2inputTCELL59:IMUX.IMUX.47.DELAY
DI_FS3inputTCELL59:IMUX.IMUX.41.DELAY
DI_FS4inputTCELL57:IMUX.IMUX.47.DELAY
DI_FS5inputTCELL57:IMUX.IMUX.8.DELAY
DI_FS6inputTCELL59:IMUX.IMUX.23.DELAY
DI_FS7inputTCELL57:IMUX.IMUX.2.DELAY
DI_FS8inputTCELL56:IMUX.IMUX.42.DELAY
DI_FS9inputTCELL58:IMUX.IMUX.24.DELAY
DMONCLK_FSinputTCELL59:IMUX.CTRL.2
DMONFIFORESET_FSinputTCELL57:IMUX.IMUX.1.DELAY
DMONOUT_SF0outputTCELL59:OUT.4.TMIN
DMONOUT_SF1outputTCELL59:OUT.1.TMIN
DMONOUT_SF10outputTCELL59:OUT.16.TMIN
DMONOUT_SF11outputTCELL59:OUT.28.TMIN
DMONOUT_SF12outputTCELL55:OUT.19.TMIN
DMONOUT_SF13outputTCELL56:OUT.16.TMIN
DMONOUT_SF14outputTCELL55:OUT.16.TMIN
DMONOUT_SF15outputTCELL59:OUT.22.TMIN
DMONOUT_SF2outputTCELL57:OUT.4.TMIN
DMONOUT_SF3outputTCELL56:OUT.4.TMIN
DMONOUT_SF4outputTCELL55:OUT.4.TMIN
DMONOUT_SF5outputTCELL59:OUT.10.TMIN
DMONOUT_SF6outputTCELL59:OUT.19.TMIN
DMONOUT_SF7outputTCELL54:OUT.26.TMIN
DMONOUT_SF8outputTCELL56:OUT.10.TMIN
DMONOUT_SF9outputTCELL55:OUT.10.TMIN
DRDY_SFoutputTCELL56:OUT.24.TMIN
DRPDO_SF0outputTCELL59:OUT.0.TMIN
DRPDO_SF1outputTCELL58:OUT.24.TMIN
DRPDO_SF10outputTCELL59:OUT.12.TMIN
DRPDO_SF11outputTCELL59:OUT.21.TMIN
DRPDO_SF12outputTCELL54:OUT.28.TMIN
DRPDO_SF13outputTCELL56:OUT.12.TMIN
DRPDO_SF14outputTCELL55:OUT.12.TMIN
DRPDO_SF15outputTCELL59:OUT.18.TMIN
DRPDO_SF2outputTCELL57:OUT.0.TMIN
DRPDO_SF3outputTCELL56:OUT.0.TMIN
DRPDO_SF4outputTCELL55:OUT.0.TMIN
DRPDO_SF5outputTCELL59:OUT.6.TMIN
DRPDO_SF6outputTCELL59:OUT.11.TMIN
DRPDO_SF7outputTCELL57:OUT.6.TMIN
DRPDO_SF8outputTCELL56:OUT.6.TMIN
DRPDO_SF9outputTCELL55:OUT.6.TMIN
DRST_FSinputTCELL58:IMUX.CTRL.4
DWE_FSinputTCELL59:IMUX.IMUX.40.DELAY
ENPPM_FSinputTCELL56:IMUX.IMUX.12.DELAY
EYESCANDATAERROR_SFoutputTCELL58:OUT.30.TMIN
EYESCANTRIGGER_FSinputTCELL59:IMUX.IMUX.22.DELAY
FREQOS_FSinputTCELL57:IMUX.IMUX.12.DELAY
GATERXELECIDLE_FS0inputTCELL51:IMUX.IMUX.40.DELAY
GATERXELECIDLE_FS1inputTCELL51:IMUX.IMUX.32.DELAY
GTPOWERGOOD_SFoutputTCELL55:OUT.9.TMIN
GTRXRSTSEL_FSinputTCELL58:IMUX.IMUX.13.DELAY
GTRXRST_FSinputTCELL50:IMUX.CTRL.7
GTTXRSTSEL_FSinputTCELL57:IMUX.IMUX.30.DELAY
GTTXRST_FSinputTCELL55:IMUX.CTRL.7
INCPCTRL_FSinputTCELL57:IMUX.IMUX.15.DELAY
ISCANRESET_FSinputTCELL58:IMUX.IMUX.5.DELAY
LOOPBACK_FS0inputTCELL57:IMUX.IMUX.40.DELAY
LOOPBACK_FS1inputTCELL57:IMUX.IMUX.34.DELAY
LOOPBACK_FS2inputTCELL57:IMUX.IMUX.28.DELAY
LPMGCHOLD_FSinputTCELL47:IMUX.IMUX.8.DELAY
LPMGCOVREN_FSinputTCELL47:IMUX.IMUX.6.DELAY
LPMKHHOLD_FSinputTCELL47:IMUX.IMUX.35.DELAY
LPMKHOVREN_FSinputTCELL48:IMUX.IMUX.8.DELAY
LPMKLHOLD_FSinputTCELL47:IMUX.IMUX.10.DELAY
LPMKLOVREN_FSinputTCELL47:IMUX.IMUX.41.DELAY
LPMOSHOLD_FSinputTCELL48:IMUX.IMUX.22.DELAY
LPMOSOVREN_FSinputTCELL48:IMUX.IMUX.13.DELAY
MGTREFCLKFA_SFoutputTCELL59:OUT.3.TMIN
OSHOLD_FSinputTCELL49:IMUX.IMUX.41.DELAY
OSOVREN_FSinputTCELL50:IMUX.IMUX.15.DELAY
PCS_RSVD_IN_FS0inputTCELL54:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS1inputTCELL54:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS10inputTCELL49:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS11inputTCELL49:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS12inputTCELL48:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS13inputTCELL48:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS14inputTCELL47:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS15inputTCELL47:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS2inputTCELL53:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS3inputTCELL53:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS4inputTCELL52:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS5inputTCELL52:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS6inputTCELL51:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS7inputTCELL51:IMUX.IMUX.3.DELAY
PCS_RSVD_IN_FS8inputTCELL50:IMUX.IMUX.27.DELAY
PCS_RSVD_IN_FS9inputTCELL50:IMUX.IMUX.3.DELAY
PCS_RSVD_OUT_SF0outputTCELL54:OUT.9.TMIN
PCS_RSVD_OUT_SF1outputTCELL53:OUT.9.TMIN
PCS_RSVD_OUT_SF10outputTCELL52:OUT.11.TMIN
PCS_RSVD_OUT_SF11outputTCELL51:OUT.11.TMIN
PCS_RSVD_OUT_SF12outputTCELL50:OUT.11.TMIN
PCS_RSVD_OUT_SF13outputTCELL49:OUT.11.TMIN
PCS_RSVD_OUT_SF14outputTCELL48:OUT.11.TMIN
PCS_RSVD_OUT_SF15outputTCELL47:OUT.11.TMIN
PCS_RSVD_OUT_SF2outputTCELL52:OUT.9.TMIN
PCS_RSVD_OUT_SF3outputTCELL51:OUT.9.TMIN
PCS_RSVD_OUT_SF4outputTCELL50:OUT.9.TMIN
PCS_RSVD_OUT_SF5outputTCELL49:OUT.9.TMIN
PCS_RSVD_OUT_SF6outputTCELL48:OUT.9.TMIN
PCS_RSVD_OUT_SF7outputTCELL47:OUT.9.TMIN
PCS_RSVD_OUT_SF8outputTCELL54:OUT.11.TMIN
PCS_RSVD_OUT_SF9outputTCELL53:OUT.11.TMIN
PINRSRVDAS_SF0outputTCELL58:OUT.22.TMIN
PINRSRVDAS_SF1outputTCELL54:OUT.22.TMIN
PINRSRVDAS_SF10outputTCELL59:OUT.15.TMIN
PINRSRVDAS_SF11outputTCELL54:OUT.24.TMIN
PINRSRVDAS_SF12outputTCELL56:OUT.30.TMIN
PINRSRVDAS_SF13outputTCELL55:OUT.15.TMIN
PINRSRVDAS_SF14outputTCELL55:OUT.30.TMIN
PINRSRVDAS_SF15outputTCELL55:OUT.3.TMIN
PINRSRVDAS_SF2outputTCELL56:OUT.22.TMIN
PINRSRVDAS_SF3outputTCELL55:OUT.22.TMIN
PINRSRVDAS_SF4outputTCELL58:OUT.26.TMIN
PINRSRVDAS_SF5outputTCELL57:OUT.1.TMIN
PINRSRVDAS_SF6outputTCELL56:OUT.1.TMIN
PINRSRVDAS_SF7outputTCELL55:OUT.1.TMIN
PINRSRVDAS_SF8outputTCELL59:OUT.9.TMIN
PINRSRVDAS_SF9outputTCELL59:OUT.26.TMIN
PINRSRVD_FS0inputTCELL54:IMUX.IMUX.21.DELAY
PINRSRVD_FS1inputTCELL54:IMUX.IMUX.0.DELAY
PINRSRVD_FS10inputTCELL49:IMUX.IMUX.21.DELAY
PINRSRVD_FS11inputTCELL49:IMUX.IMUX.0.DELAY
PINRSRVD_FS12inputTCELL48:IMUX.IMUX.21.DELAY
PINRSRVD_FS13inputTCELL48:IMUX.IMUX.0.DELAY
PINRSRVD_FS14inputTCELL47:IMUX.IMUX.21.DELAY
PINRSRVD_FS15inputTCELL47:IMUX.IMUX.0.DELAY
PINRSRVD_FS2inputTCELL53:IMUX.IMUX.21.DELAY
PINRSRVD_FS3inputTCELL53:IMUX.IMUX.0.DELAY
PINRSRVD_FS4inputTCELL52:IMUX.IMUX.21.DELAY
PINRSRVD_FS5inputTCELL52:IMUX.IMUX.0.DELAY
PINRSRVD_FS6inputTCELL51:IMUX.IMUX.21.DELAY
PINRSRVD_FS7inputTCELL51:IMUX.IMUX.0.DELAY
PINRSRVD_FS8inputTCELL50:IMUX.IMUX.21.DELAY
PINRSRVD_FS9inputTCELL50:IMUX.IMUX.0.DELAY
PMASCANCLK0_FSinputTCELL49:IMUX.CTRL.2
PMASCANCLK1_FSinputTCELL49:IMUX.CTRL.3
PMASCANCLK2_FSinputTCELL55:IMUX.CTRL.2
PMASCANCLK3_FSinputTCELL55:IMUX.CTRL.3
PMASCANCLK4_FSinputTCELL57:IMUX.CTRL.2
PMASCANCLK5_FSinputTCELL57:IMUX.CTRL.1
PMASCANCLK6_FSinputTCELL53:IMUX.CTRL.5
PMASCANCLK7_FSinputTCELL53:IMUX.CTRL.4
PMASCANCLK8_FSinputTCELL51:IMUX.CTRL.5
PMASCANENB_FSinputTCELL58:IMUX.IMUX.27.DELAY
PMASCANIN_FS0inputTCELL58:IMUX.IMUX.3.DELAY
PMASCANIN_FS1inputTCELL57:IMUX.IMUX.27.DELAY
PMASCANIN_FS10inputTCELL57:IMUX.IMUX.29.DELAY
PMASCANIN_FS11inputTCELL57:IMUX.IMUX.25.DELAY
PMASCANIN_FS12inputTCELL57:IMUX.IMUX.5.DELAY
PMASCANIN_FS13inputTCELL57:IMUX.IMUX.23.DELAY
PMASCANIN_FS14inputTCELL58:IMUX.IMUX.21.DELAY
PMASCANIN_FS15inputTCELL58:IMUX.IMUX.0.DELAY
PMASCANIN_FS16inputTCELL57:IMUX.IMUX.21.DELAY
PMASCANIN_FS17inputTCELL57:IMUX.IMUX.0.DELAY
PMASCANIN_FS2inputTCELL57:IMUX.IMUX.3.DELAY
PMASCANIN_FS3inputTCELL56:IMUX.IMUX.27.DELAY
PMASCANIN_FS4inputTCELL56:IMUX.IMUX.3.DELAY
PMASCANIN_FS5inputTCELL55:IMUX.IMUX.27.DELAY
PMASCANIN_FS6inputTCELL55:IMUX.IMUX.3.DELAY
PMASCANIN_FS7inputTCELL57:IMUX.IMUX.35.DELAY
PMASCANIN_FS8inputTCELL57:IMUX.IMUX.33.DELAY
PMASCANIN_FS9inputTCELL59:IMUX.IMUX.25.DELAY
PMASCANMODEB_FSinputTCELL57:IMUX.IMUX.6.DELAY
PMASCANOUT_SF0outputTCELL59:OUT.2.TMIN
PMASCANOUT_SF1outputTCELL58:OUT.28.TMIN
PMASCANOUT_SF10outputTCELL55:OUT.20.TMIN
PMASCANOUT_SF11outputTCELL56:OUT.17.TMIN
PMASCANOUT_SF12outputTCELL54:OUT.31.TMIN
PMASCANOUT_SF13outputTCELL52:OUT.21.TMIN
PMASCANOUT_SF14outputTCELL51:OUT.21.TMIN
PMASCANOUT_SF15outputTCELL50:OUT.21.TMIN
PMASCANOUT_SF16outputTCELL49:OUT.21.TMIN
PMASCANOUT_SF17outputTCELL48:OUT.21.TMIN
PMASCANOUT_SF2outputTCELL57:OUT.2.TMIN
PMASCANOUT_SF3outputTCELL56:OUT.2.TMIN
PMASCANOUT_SF4outputTCELL55:OUT.2.TMIN
PMASCANOUT_SF5outputTCELL59:OUT.14.TMIN
PMASCANOUT_SF6outputTCELL59:OUT.24.TMIN
PMASCANOUT_SF7outputTCELL55:OUT.17.TMIN
PMASCANOUT_SF8outputTCELL59:OUT.17.TMIN
PMASCANOUT_SF9outputTCELL59:OUT.30.TMIN
PMASCANRSTEN_FSinputTCELL57:IMUX.IMUX.7.DELAY
PRBSCNTRST_FSinputTCELL51:IMUX.IMUX.22.DELAY
QPLLFREQLOCK0_FSinputTCELL54:IMUX.IMUX.15.DELAY
QPLLFREQLOCK1_FSinputTCELL49:IMUX.IMUX.40.DELAY
RCODAPWDN_FSinputTCELL51:IMUX.IMUX.45.DELAY
RCODARESET_FSinputTCELL50:IMUX.CTRL.0
RDASOFTRSTDONE_SFoutputTCELL54:OUT.25.TMIN
RESETOVRD_FSinputTCELL52:IMUX.IMUX.44.DELAY
RESET_EXCEPTION_SFoutputTCELL55:OUT.13.TMIN
RXCDRPHDONE_SFoutputTCELL56:OUT.11.TMIN
RXCKCALSTART_FS0inputTCELL49:IMUX.IMUX.18.DELAY
RXCKCALSTART_FS1inputTCELL49:IMUX.IMUX.10.DELAY
RXCKCALSTART_FS2inputTCELL48:IMUX.IMUX.18.DELAY
RXCKCALSTART_FS3inputTCELL48:IMUX.IMUX.43.DELAY
RXCKCALSTART_FS4inputTCELL47:IMUX.IMUX.11.DELAY
RXCKCALSTART_FS5inputTCELL47:IMUX.IMUX.33.DELAY
RXCKCALSTART_FS6inputTCELL47:IMUX.IMUX.23.DELAY
RXCOALGNEN_FSinputTCELL51:IMUX.IMUX.12.DELAY
RXCOPHDONE_SFoutputTCELL55:OUT.23.TMIN
RXCOSETPHS_FSinputTCELL51:IMUX.IMUX.11.DELAY
RXDAALGNEN_FSinputTCELL47:IMUX.IMUX.31.DELAY
RXDABYPASS_FSinputTCELL47:IMUX.IMUX.5.DELAY
RXDAOVREN_FSinputTCELL47:IMUX.IMUX.7.DELAY
RXDASOFTRESET_FSinputTCELL48:IMUX.CTRL.0
RXELECIDLE_SFoutputTCELL54:OUT.29.TMIN
RXLINKSYNCDONE_SFoutputTCELL55:OUT.18.TMIN
RXLPMEN_FSinputTCELL48:IMUX.IMUX.7.DELAY
RXMSTRSETPHDONE_FSinputTCELL48:IMUX.IMUX.29.DELAY
RXOUTCKCTL_FS0inputTCELL51:IMUX.IMUX.9.DELAY
RXOUTCKCTL_FS1inputTCELL50:IMUX.IMUX.9.DELAY
RXOUTCKCTL_FS2inputTCELL50:IMUX.IMUX.6.DELAY
RXPHALIGNERR_SFoutputTCELL56:OUT.7.TMIN
RXPLLCKSEL_FS0inputTCELL50:IMUX.IMUX.38.DELAY
RXPLLCKSEL_FS1inputTCELL49:IMUX.IMUX.38.DELAY
RXPMARESETDONE_SFoutputTCELL55:OUT.29.TMIN
RXPMARESET_FSinputTCELL51:IMUX.CTRL.0
RXPOLARITY_FSinputTCELL51:IMUX.IMUX.20.DELAY
RXPRBSERR_SFoutputTCELL47:OUT.23.TMIN
RXPRBSLOCKED_SFoutputTCELL54:OUT.23.TMIN
RXPRBSPTN_FS0inputTCELL47:IMUX.IMUX.42.DELAY
RXPRBSPTN_FS1inputTCELL47:IMUX.IMUX.36.DELAY
RXPRBSPTN_FS2inputTCELL47:IMUX.IMUX.30.DELAY
RXPRBSPTN_FS3inputTCELL47:IMUX.IMUX.46.DELAY
RXPRGDIVRSTDONE_SFoutputTCELL55:OUT.11.TMIN
RXPROGDIVRESET_FSinputTCELL49:IMUX.CTRL.0
RXPWRDN_FS0inputTCELL48:IMUX.IMUX.38.DELAY
RXPWRDN_FS1inputTCELL47:IMUX.IMUX.38.DELAY
RXRAWDATA_SF0outputTCELL58:OUT.20.TMIN
RXRAWDATA_SF1outputTCELL58:OUT.17.TMIN
RXRAWDATA_SF10outputTCELL58:OUT.8.TMIN
RXRAWDATA_SF11outputTCELL58:OUT.7.TMIN
RXRAWDATA_SF12outputTCELL58:OUT.6.TMIN
RXRAWDATA_SF13outputTCELL58:OUT.5.TMIN
RXRAWDATA_SF14outputTCELL58:OUT.4.TMIN
RXRAWDATA_SF15outputTCELL58:OUT.3.TMIN
RXRAWDATA_SF16outputTCELL58:OUT.2.TMIN
RXRAWDATA_SF17outputTCELL58:OUT.1.TMIN
RXRAWDATA_SF18outputTCELL58:OUT.0.TMIN
RXRAWDATA_SF19outputTCELL57:OUT.31.TMIN
RXRAWDATA_SF2outputTCELL58:OUT.16.TMIN
RXRAWDATA_SF20outputTCELL57:OUT.30.TMIN
RXRAWDATA_SF21outputTCELL57:OUT.29.TMIN
RXRAWDATA_SF22outputTCELL57:OUT.28.TMIN
RXRAWDATA_SF23outputTCELL57:OUT.27.TMIN
RXRAWDATA_SF24outputTCELL57:OUT.26.TMIN
RXRAWDATA_SF25outputTCELL57:OUT.24.TMIN
RXRAWDATA_SF26outputTCELL57:OUT.23.TMIN
RXRAWDATA_SF27outputTCELL57:OUT.22.TMIN
RXRAWDATA_SF28outputTCELL57:OUT.21.TMIN
RXRAWDATA_SF29outputTCELL57:OUT.19.TMIN
RXRAWDATA_SF3outputTCELL58:OUT.15.TMIN
RXRAWDATA_SF30outputTCELL57:OUT.18.TMIN
RXRAWDATA_SF31outputTCELL57:OUT.17.TMIN
RXRAWDATA_SF32outputTCELL57:OUT.16.TMIN
RXRAWDATA_SF33outputTCELL57:OUT.15.TMIN
RXRAWDATA_SF34outputTCELL57:OUT.14.TMIN
RXRAWDATA_SF35outputTCELL57:OUT.13.TMIN
RXRAWDATA_SF36outputTCELL57:OUT.12.TMIN
RXRAWDATA_SF37outputTCELL57:OUT.11.TMIN
RXRAWDATA_SF38outputTCELL57:OUT.10.TMIN
RXRAWDATA_SF39outputTCELL57:OUT.9.TMIN
RXRAWDATA_SF4outputTCELL58:OUT.14.TMIN
RXRAWDATA_SF5outputTCELL58:OUT.13.TMIN
RXRAWDATA_SF6outputTCELL58:OUT.12.TMIN
RXRAWDATA_SF7outputTCELL58:OUT.11.TMIN
RXRAWDATA_SF8outputTCELL58:OUT.10.TMIN
RXRAWDATA_SF9outputTCELL58:OUT.9.TMIN
RXRECCLKPCS_SFoutputTCELL52:OUT.23.TMIN
RXRECCLK_SFoutputTCELL53:OUT.23.TMIN
RXRESETDONE_SFoutputTCELL47:OUT.21.TMIN
RXRESET_FSinputTCELL50:IMUX.IMUX.20.DELAY
RXSLIPDONE_SFoutputTCELL55:OUT.21.TMIN
RXSLIPOUTCLKRDY_SFoutputTCELL55:OUT.26.TMIN
RXSLIPOUTCLK_FSinputTCELL47:IMUX.IMUX.2.DELAY
RXSLIPPMARDY_SFoutputTCELL55:OUT.28.TMIN
RXSLIPPMA_FSinputTCELL47:IMUX.IMUX.29.DELAY
RXSLVSYNCEN_FSinputTCELL48:IMUX.IMUX.10.DELAY
RXSYNCEN2SLV_SFoutputTCELL55:OUT.27.TMIN
RXSYNCFSMMASTER_FSinputTCELL48:IMUX.IMUX.41.DELAY
RXSYSCKSEL_FS0inputTCELL50:IMUX.IMUX.37.DELAY
RXSYSCKSEL_FS1inputTCELL51:IMUX.IMUX.38.DELAY
RXTERMINATION_FSinputTCELL56:IMUX.IMUX.32.DELAY
RXUSRCLK2_FSinputTCELL50:IMUX.CTRL.3
RXUSRCLK_FSinputTCELL50:IMUX.CTRL.2
RXUSRRDY_FSinputTCELL48:IMUX.IMUX.35.DELAY
RX_AXIS_TDATA_SF0outputTCELL51:OUT.16.TMIN
RX_AXIS_TDATA_SF1outputTCELL51:OUT.15.TMIN
RX_AXIS_TDATA_SF10outputTCELL51:OUT.4.TMIN
RX_AXIS_TDATA_SF11outputTCELL51:OUT.3.TMIN
RX_AXIS_TDATA_SF12outputTCELL51:OUT.2.TMIN
RX_AXIS_TDATA_SF13outputTCELL51:OUT.1.TMIN
RX_AXIS_TDATA_SF14outputTCELL51:OUT.0.TMIN
RX_AXIS_TDATA_SF15outputTCELL50:OUT.31.TMIN
RX_AXIS_TDATA_SF16outputTCELL50:OUT.30.TMIN
RX_AXIS_TDATA_SF17outputTCELL50:OUT.29.TMIN
RX_AXIS_TDATA_SF18outputTCELL50:OUT.28.TMIN
RX_AXIS_TDATA_SF19outputTCELL50:OUT.27.TMIN
RX_AXIS_TDATA_SF2outputTCELL51:OUT.14.TMIN
RX_AXIS_TDATA_SF20outputTCELL50:OUT.26.TMIN
RX_AXIS_TDATA_SF21outputTCELL50:OUT.25.TMIN
RX_AXIS_TDATA_SF22outputTCELL50:OUT.24.TMIN
RX_AXIS_TDATA_SF23outputTCELL50:OUT.23.TMIN
RX_AXIS_TDATA_SF24outputTCELL50:OUT.22.TMIN
RX_AXIS_TDATA_SF25outputTCELL50:OUT.20.TMIN
RX_AXIS_TDATA_SF26outputTCELL50:OUT.19.TMIN
RX_AXIS_TDATA_SF27outputTCELL50:OUT.18.TMIN
RX_AXIS_TDATA_SF28outputTCELL50:OUT.17.TMIN
RX_AXIS_TDATA_SF29outputTCELL50:OUT.16.TMIN
RX_AXIS_TDATA_SF3outputTCELL51:OUT.13.TMIN
RX_AXIS_TDATA_SF30outputTCELL50:OUT.15.TMIN
RX_AXIS_TDATA_SF31outputTCELL50:OUT.14.TMIN
RX_AXIS_TDATA_SF32outputTCELL50:OUT.13.TMIN
RX_AXIS_TDATA_SF33outputTCELL50:OUT.12.TMIN
RX_AXIS_TDATA_SF34outputTCELL50:OUT.10.TMIN
RX_AXIS_TDATA_SF35outputTCELL50:OUT.8.TMIN
RX_AXIS_TDATA_SF36outputTCELL50:OUT.7.TMIN
RX_AXIS_TDATA_SF37outputTCELL50:OUT.6.TMIN
RX_AXIS_TDATA_SF38outputTCELL50:OUT.5.TMIN
RX_AXIS_TDATA_SF39outputTCELL50:OUT.4.TMIN
RX_AXIS_TDATA_SF4outputTCELL51:OUT.12.TMIN
RX_AXIS_TDATA_SF40outputTCELL50:OUT.3.TMIN
RX_AXIS_TDATA_SF41outputTCELL50:OUT.2.TMIN
RX_AXIS_TDATA_SF42outputTCELL50:OUT.1.TMIN
RX_AXIS_TDATA_SF43outputTCELL50:OUT.0.TMIN
RX_AXIS_TDATA_SF44outputTCELL49:OUT.31.TMIN
RX_AXIS_TDATA_SF45outputTCELL49:OUT.30.TMIN
RX_AXIS_TDATA_SF46outputTCELL49:OUT.29.TMIN
RX_AXIS_TDATA_SF47outputTCELL49:OUT.28.TMIN
RX_AXIS_TDATA_SF48outputTCELL49:OUT.27.TMIN
RX_AXIS_TDATA_SF49outputTCELL49:OUT.26.TMIN
RX_AXIS_TDATA_SF5outputTCELL51:OUT.10.TMIN
RX_AXIS_TDATA_SF50outputTCELL49:OUT.25.TMIN
RX_AXIS_TDATA_SF51outputTCELL49:OUT.24.TMIN
RX_AXIS_TDATA_SF52outputTCELL49:OUT.23.TMIN
RX_AXIS_TDATA_SF53outputTCELL49:OUT.22.TMIN
RX_AXIS_TDATA_SF54outputTCELL49:OUT.20.TMIN
RX_AXIS_TDATA_SF55outputTCELL49:OUT.19.TMIN
RX_AXIS_TDATA_SF56outputTCELL49:OUT.18.TMIN
RX_AXIS_TDATA_SF57outputTCELL49:OUT.17.TMIN
RX_AXIS_TDATA_SF58outputTCELL49:OUT.16.TMIN
RX_AXIS_TDATA_SF59outputTCELL49:OUT.15.TMIN
RX_AXIS_TDATA_SF6outputTCELL51:OUT.8.TMIN
RX_AXIS_TDATA_SF60outputTCELL49:OUT.14.TMIN
RX_AXIS_TDATA_SF61outputTCELL49:OUT.13.TMIN
RX_AXIS_TDATA_SF62outputTCELL49:OUT.12.TMIN
RX_AXIS_TDATA_SF63outputTCELL49:OUT.10.TMIN
RX_AXIS_TDATA_SF7outputTCELL51:OUT.7.TMIN
RX_AXIS_TDATA_SF8outputTCELL51:OUT.6.TMIN
RX_AXIS_TDATA_SF9outputTCELL51:OUT.5.TMIN
RX_AXIS_TERR_SFoutputTCELL51:OUT.17.TMIN
RX_AXIS_TLAST_SF0outputTCELL51:OUT.26.TMIN
RX_AXIS_TLAST_SF1outputTCELL51:OUT.25.TMIN
RX_AXIS_TLAST_SF2outputTCELL51:OUT.24.TMIN
RX_AXIS_TLAST_SF3outputTCELL51:OUT.23.TMIN
RX_AXIS_TLAST_SF4outputTCELL51:OUT.22.TMIN
RX_AXIS_TLAST_SF5outputTCELL51:OUT.20.TMIN
RX_AXIS_TLAST_SF6outputTCELL51:OUT.19.TMIN
RX_AXIS_TLAST_SF7outputTCELL51:OUT.18.TMIN
RX_AXIS_TPRE_SF0outputTCELL52:OUT.2.TMIN
RX_AXIS_TPRE_SF1outputTCELL52:OUT.1.TMIN
RX_AXIS_TPRE_SF2outputTCELL52:OUT.0.TMIN
RX_AXIS_TPRE_SF3outputTCELL51:OUT.31.TMIN
RX_AXIS_TPRE_SF4outputTCELL51:OUT.30.TMIN
RX_AXIS_TPRE_SF5outputTCELL51:OUT.29.TMIN
RX_AXIS_TPRE_SF6outputTCELL51:OUT.28.TMIN
RX_AXIS_TPRE_SF7outputTCELL51:OUT.27.TMIN
RX_AXIS_TSOF_SF0outputTCELL52:OUT.4.TMIN
RX_AXIS_TSOF_SF1outputTCELL52:OUT.3.TMIN
RX_AXIS_TTERM_SF0outputTCELL52:OUT.10.TMIN
RX_AXIS_TTERM_SF1outputTCELL52:OUT.8.TMIN
RX_AXIS_TTERM_SF2outputTCELL52:OUT.7.TMIN
RX_AXIS_TTERM_SF3outputTCELL52:OUT.6.TMIN
RX_AXIS_TTERM_SF4outputTCELL52:OUT.5.TMIN
RX_AXIS_TVALID_SFoutputTCELL52:OUT.12.TMIN
RX_BITSLIP_SFoutputTCELL52:OUT.13.TMIN
RX_GB_SEQ_START_SFoutputTCELL52:OUT.14.TMIN
RX_PTP_SOP_POS_SFoutputTCELL52:OUT.16.TMIN
RX_PTP_SOP_SFoutputTCELL52:OUT.15.TMIN
SCANCLK_FSinputTCELL52:IMUX.CTRL.2
SCANENB_FSinputTCELL58:IMUX.IMUX.4.DELAY
SCANIN_FS0inputTCELL57:IMUX.IMUX.18.DELAY
SCANIN_FS1inputTCELL58:IMUX.IMUX.37.DELAY
SCANIN_FS10inputTCELL56:IMUX.IMUX.24.DELAY
SCANIN_FS11inputTCELL59:IMUX.IMUX.14.DELAY
SCANIN_FS12inputTCELL57:IMUX.IMUX.43.DELAY
SCANIN_FS13inputTCELL57:IMUX.IMUX.44.DELAY
SCANIN_FS14inputTCELL50:IMUX.IMUX.32.DELAY
SCANIN_FS15inputTCELL50:IMUX.IMUX.26.DELAY
SCANIN_FS16inputTCELL49:IMUX.IMUX.44.DELAY
SCANIN_FS17inputTCELL48:IMUX.IMUX.44.DELAY
SCANIN_FS18inputTCELL47:IMUX.IMUX.44.DELAY
SCANIN_FS2inputTCELL57:IMUX.IMUX.13.DELAY
SCANIN_FS3inputTCELL58:IMUX.IMUX.8.DELAY
SCANIN_FS4inputTCELL57:IMUX.IMUX.10.DELAY
SCANIN_FS5inputTCELL58:IMUX.IMUX.31.DELAY
SCANIN_FS6inputTCELL56:IMUX.IMUX.47.DELAY
SCANIN_FS7inputTCELL59:IMUX.IMUX.11.DELAY
SCANIN_FS8inputTCELL56:IMUX.IMUX.16.DELAY
SCANIN_FS9inputTCELL59:IMUX.IMUX.43.DELAY
SCANMODEB_FSinputTCELL58:IMUX.IMUX.7.DELAY
SCANOUT_SF0outputTCELL59:OUT.8.TMIN
SCANOUT_SF1outputTCELL59:OUT.13.TMIN
SCANOUT_SF10outputTCELL56:OUT.28.TMIN
SCANOUT_SF11outputTCELL59:OUT.27.TMIN
SCANOUT_SF12outputTCELL58:OUT.27.TMIN
SCANOUT_SF13outputTCELL56:OUT.27.TMIN
SCANOUT_SF14outputTCELL59:OUT.23.TMIN
SCANOUT_SF15outputTCELL58:OUT.23.TMIN
SCANOUT_SF16outputTCELL56:OUT.9.TMIN
SCANOUT_SF17outputTCELL56:OUT.21.TMIN
SCANOUT_SF18outputTCELL56:OUT.19.TMIN
SCANOUT_SF2outputTCELL57:OUT.8.TMIN
SCANOUT_SF3outputTCELL56:OUT.8.TMIN
SCANOUT_SF4outputTCELL55:OUT.8.TMIN
SCANOUT_SF5outputTCELL59:OUT.20.TMIN
SCANOUT_SF6outputTCELL59:OUT.31.TMIN
SCANOUT_SF7outputTCELL58:OUT.31.TMIN
SCANOUT_SF8outputTCELL59:OUT.29.TMIN
SCANOUT_SF9outputTCELL58:OUT.29.TMIN
SCANRSTB_FSinputTCELL58:IMUX.IMUX.25.DELAY
SCANRSTEN_FSinputTCELL58:IMUX.IMUX.2.DELAY
STAT_RX_BAD_CODE_SFoutputTCELL52:OUT.17.TMIN
STAT_RX_BAD_FCS_SFoutputTCELL47:OUT.25.TMIN
STAT_RX_BAD_PREAMBLE_SFoutputTCELL52:OUT.19.TMIN
STAT_RX_BAD_SFD_SFoutputTCELL52:OUT.18.TMIN
STAT_RX_BLOCK_LOCK_SFoutputTCELL52:OUT.20.TMIN
STAT_RX_BROADCAST_SFoutputTCELL52:OUT.22.TMIN
STAT_RX_BYTES_SF0outputTCELL52:OUT.27.TMIN
STAT_RX_BYTES_SF1outputTCELL52:OUT.26.TMIN
STAT_RX_BYTES_SF2outputTCELL52:OUT.25.TMIN
STAT_RX_BYTES_SF3outputTCELL52:OUT.24.TMIN
STAT_RX_FCS_ERR_SFoutputTCELL52:OUT.28.TMIN
STAT_RX_FRAMING_ERR_SFoutputTCELL52:OUT.29.TMIN
STAT_RX_GOT_SIGNAL_OS_SFoutputTCELL52:OUT.30.TMIN
STAT_RX_HI_BER_SFoutputTCELL52:OUT.31.TMIN
STAT_RX_INRANGEERR_SFoutputTCELL47:OUT.29.TMIN
STAT_RX_INTERNAL_LOCAL_FAULT_SFoutputTCELL47:OUT.24.TMIN
STAT_RX_LOCAL_FAULT_SFoutputTCELL47:OUT.30.TMIN
STAT_RX_MULTICAST_SFoutputTCELL47:OUT.31.TMIN
STAT_RX_PAUSE_QUANTA_SF0outputTCELL48:OUT.8.TMIN
STAT_RX_PAUSE_QUANTA_SF1outputTCELL48:OUT.7.TMIN
STAT_RX_PAUSE_QUANTA_SF2outputTCELL48:OUT.6.TMIN
STAT_RX_PAUSE_QUANTA_SF3outputTCELL48:OUT.5.TMIN
STAT_RX_PAUSE_QUANTA_SF4outputTCELL48:OUT.4.TMIN
STAT_RX_PAUSE_QUANTA_SF5outputTCELL48:OUT.3.TMIN
STAT_RX_PAUSE_QUANTA_SF6outputTCELL48:OUT.2.TMIN
STAT_RX_PAUSE_QUANTA_SF7outputTCELL48:OUT.1.TMIN
STAT_RX_PAUSE_QUANTA_SF8outputTCELL48:OUT.0.TMIN
STAT_RX_PAUSE_REQ_SF0outputTCELL48:OUT.20.TMIN
STAT_RX_PAUSE_REQ_SF1outputTCELL48:OUT.18.TMIN
STAT_RX_PAUSE_REQ_SF2outputTCELL48:OUT.17.TMIN
STAT_RX_PAUSE_REQ_SF3outputTCELL48:OUT.16.TMIN
STAT_RX_PAUSE_REQ_SF4outputTCELL48:OUT.15.TMIN
STAT_RX_PAUSE_REQ_SF5outputTCELL48:OUT.14.TMIN
STAT_RX_PAUSE_REQ_SF6outputTCELL48:OUT.13.TMIN
STAT_RX_PAUSE_REQ_SF7outputTCELL48:OUT.12.TMIN
STAT_RX_PAUSE_REQ_SF8outputTCELL48:OUT.10.TMIN
STAT_RX_PAUSE_VALID_SF0outputTCELL48:OUT.30.TMIN
STAT_RX_PAUSE_VALID_SF1outputTCELL48:OUT.29.TMIN
STAT_RX_PAUSE_VALID_SF2outputTCELL48:OUT.28.TMIN
STAT_RX_PAUSE_VALID_SF3outputTCELL48:OUT.27.TMIN
STAT_RX_PAUSE_VALID_SF4outputTCELL48:OUT.26.TMIN
STAT_RX_PAUSE_VALID_SF5outputTCELL48:OUT.25.TMIN
STAT_RX_PAUSE_VALID_SF6outputTCELL48:OUT.24.TMIN
STAT_RX_PAUSE_VALID_SF7outputTCELL48:OUT.23.TMIN
STAT_RX_PAUSE_VALID_SF8outputTCELL48:OUT.22.TMIN
STAT_RX_PKT_ERR_SFoutputTCELL49:OUT.0.TMIN
STAT_RX_PKT_SFoutputTCELL48:OUT.31.TMIN
STAT_RX_RECEIVED_LOCAL_FAULT_SFoutputTCELL49:OUT.1.TMIN
STAT_RX_REMOTE_FAULT_SFoutputTCELL49:OUT.2.TMIN
STAT_RX_STATUS_SFoutputTCELL49:OUT.3.TMIN
STAT_RX_STOMPED_FCS_SFoutputTCELL47:OUT.26.TMIN
STAT_RX_TEST_PATTERN_MISMATCH_SFoutputTCELL49:OUT.4.TMIN
STAT_RX_TRUNCATED_SFoutputTCELL49:OUT.5.TMIN
STAT_RX_UNICAST_SFoutputTCELL49:OUT.6.TMIN
STAT_RX_VALID_CTRL_CODE_SFoutputTCELL49:OUT.7.TMIN
STAT_RX_VLAN_SFoutputTCELL49:OUT.8.TMIN
STAT_TX_BAD_FCS_SFoutputTCELL53:OUT.20.TMIN
STAT_TX_BROADCAST_SFoutputTCELL53:OUT.18.TMIN
STAT_TX_BYTES_SF0outputTCELL53:OUT.29.TMIN
STAT_TX_BYTES_SF1outputTCELL53:OUT.28.TMIN
STAT_TX_BYTES_SF2outputTCELL53:OUT.27.TMIN
STAT_TX_BYTES_SF3outputTCELL53:OUT.26.TMIN
STAT_TX_FCS_ERR_SFoutputTCELL53:OUT.30.TMIN
STAT_TX_MULTICAST_SFoutputTCELL53:OUT.17.TMIN
STAT_TX_PAUSE_VALID_SF0outputTCELL54:OUT.7.TMIN
STAT_TX_PAUSE_VALID_SF1outputTCELL54:OUT.6.TMIN
STAT_TX_PAUSE_VALID_SF2outputTCELL54:OUT.5.TMIN
STAT_TX_PAUSE_VALID_SF3outputTCELL54:OUT.4.TMIN
STAT_TX_PAUSE_VALID_SF4outputTCELL54:OUT.3.TMIN
STAT_TX_PAUSE_VALID_SF5outputTCELL54:OUT.2.TMIN
STAT_TX_PAUSE_VALID_SF6outputTCELL54:OUT.1.TMIN
STAT_TX_PAUSE_VALID_SF7outputTCELL54:OUT.0.TMIN
STAT_TX_PAUSE_VALID_SF8outputTCELL53:OUT.31.TMIN
STAT_TX_PKT_ERR_SFoutputTCELL54:OUT.10.TMIN
STAT_TX_PKT_SFoutputTCELL54:OUT.8.TMIN
STAT_TX_UNICAST_SFoutputTCELL53:OUT.16.TMIN
STAT_TX_VLAN_SFoutputTCELL53:OUT.19.TMIN
STEPSIZEPPM_FS0inputTCELL57:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS1inputTCELL56:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS2inputTCELL55:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS3inputTCELL54:IMUX.IMUX.31.DELAY
STEPSIZEPPM_FS4inputTCELL53:IMUX.IMUX.31.DELAY
TCOCLKFSMFROUT_FSinputTCELL53:IMUX.CTRL.2
TCODABYPASS_FSinputTCELL54:IMUX.IMUX.28.DELAY
TCODAOVREN_FSinputTCELL53:IMUX.IMUX.15.DELAY
TCODAPWDN_FSinputTCELL52:IMUX.IMUX.28.DELAY
TCODARESET_FSinputTCELL52:IMUX.IMUX.32.DELAY
TCOHOLDFROUT_FSinputTCELL53:IMUX.IMUX.45.DELAY
TCOINITDONE_SFoutputTCELL54:OUT.27.TMIN
TCOINITSET_FSinputTCELL51:IMUX.IMUX.6.DELAY
TCOPIOVREN_FSinputTCELL56:IMUX.IMUX.39.DELAY
TCOUPDNFROUT_FSinputTCELL52:IMUX.IMUX.9.DELAY
TDASOFTRESET_FSinputTCELL53:IMUX.IMUX.28.DELAY
TDASOFTRSTDONE_SFoutputTCELL56:OUT.23.TMIN
TSTCLK0_FSinputTCELL51:IMUX.CTRL.2
TSTCLK1_FSinputTCELL51:IMUX.CTRL.3
TSTIN_FS0inputTCELL59:IMUX.IMUX.44.DELAY
TSTIN_FS1inputTCELL57:IMUX.IMUX.19.DELAY
TSTIN_FS10inputTCELL59:IMUX.IMUX.15.DELAY
TSTIN_FS11inputTCELL56:IMUX.IMUX.36.DELAY
TSTIN_FS12inputTCELL59:IMUX.IMUX.45.DELAY
TSTIN_FS13inputTCELL56:IMUX.IMUX.18.DELAY
TSTIN_FS14inputTCELL59:IMUX.IMUX.12.DELAY
TSTIN_FS15inputTCELL58:IMUX.IMUX.12.DELAY
TSTIN_FS16inputTCELL59:IMUX.IMUX.39.DELAY
TSTIN_FS17inputTCELL56:IMUX.IMUX.13.DELAY
TSTIN_FS18inputTCELL57:IMUX.IMUX.16.DELAY
TSTIN_FS19inputTCELL58:IMUX.IMUX.9.DELAY
TSTIN_FS2inputTCELL59:IMUX.IMUX.38.DELAY
TSTIN_FS3inputTCELL56:IMUX.IMUX.46.DELAY
TSTIN_FS4inputTCELL58:IMUX.IMUX.33.DELAY
TSTIN_FS5inputTCELL58:IMUX.IMUX.32.DELAY
TSTIN_FS6inputTCELL57:IMUX.IMUX.46.DELAY
TSTIN_FS7inputTCELL58:IMUX.IMUX.26.DELAY
TSTIN_FS8inputTCELL57:IMUX.IMUX.36.DELAY
TSTIN_FS9inputTCELL58:IMUX.IMUX.20.DELAY
TSTPWRDNOVRDB_FSinputTCELL58:IMUX.IMUX.1.DELAY
TSTPWRDN_FS0inputTCELL58:IMUX.IMUX.40.DELAY
TSTPWRDN_FS1inputTCELL58:IMUX.IMUX.34.DELAY
TSTPWRDN_FS2inputTCELL58:IMUX.IMUX.28.DELAY
TSTPWRDN_FS3inputTCELL58:IMUX.IMUX.22.DELAY
TSTPWRDN_FS4inputTCELL58:IMUX.IMUX.16.DELAY
TXCODAALGNEN_FSinputTCELL54:IMUX.IMUX.32.DELAY
TXCOPIALGNEN_FSinputTCELL52:IMUX.IMUX.15.DELAY
TXCOPIPHDONE_SFoutputTCELL57:OUT.3.TMIN
TXCOPISETPHS_FSinputTCELL52:IMUX.IMUX.45.DELAY
TXDCCDONE_SFoutputTCELL56:OUT.13.TMIN
TXDCCSRESET_FSinputTCELL57:IMUX.IMUX.26.DELAY
TXDCCSTART_FSinputTCELL52:IMUX.IMUX.38.DELAY
TXDRVAMP_FS0inputTCELL55:IMUX.IMUX.22.DELAY
TXDRVAMP_FS1inputTCELL54:IMUX.IMUX.22.DELAY
TXDRVAMP_FS2inputTCELL53:IMUX.IMUX.22.DELAY
TXDRVAMP_FS3inputTCELL52:IMUX.IMUX.22.DELAY
TXDRVAMP_FS4inputTCELL52:IMUX.IMUX.40.DELAY
TXELECIDLE_FSinputTCELL52:IMUX.IMUX.37.DELAY
TXEMPMAIN_FS0inputTCELL57:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS1inputTCELL56:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS2inputTCELL55:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS3inputTCELL54:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS4inputTCELL53:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS5inputTCELL52:IMUX.IMUX.14.DELAY
TXEMPMAIN_FS6inputTCELL51:IMUX.IMUX.14.DELAY
TXEMPPOS_FS0inputTCELL57:IMUX.IMUX.11.DELAY
TXEMPPOS_FS1inputTCELL56:IMUX.IMUX.11.DELAY
TXEMPPOS_FS2inputTCELL55:IMUX.IMUX.11.DELAY
TXEMPPOS_FS3inputTCELL54:IMUX.IMUX.11.DELAY
TXEMPPOS_FS4inputTCELL53:IMUX.IMUX.11.DELAY
TXEMPPRE_FS0inputTCELL57:IMUX.IMUX.20.DELAY
TXEMPPRE_FS1inputTCELL56:IMUX.IMUX.20.DELAY
TXEMPPRE_FS2inputTCELL55:IMUX.IMUX.20.DELAY
TXEMPPRE_FS3inputTCELL54:IMUX.IMUX.20.DELAY
TXEMPPRE_FS4inputTCELL53:IMUX.IMUX.20.DELAY
TXLINKSYNCDONE_SFoutputTCELL56:OUT.20.TMIN
TXMSTRSETPHDONE_FSinputTCELL55:IMUX.IMUX.38.DELAY
TXMUXDCDEXHOLD_FSinputTCELL49:IMUX.IMUX.19.DELAY
TXMUXDCDORWREN_FSinputTCELL49:IMUX.IMUX.36.DELAY
TXOUTCKCTL_FS0inputTCELL55:IMUX.IMUX.40.DELAY
TXOUTCKCTL_FS1inputTCELL54:IMUX.IMUX.40.DELAY
TXOUTCKCTL_FS2inputTCELL53:IMUX.IMUX.40.DELAY
TXOUTCLKPCS_SFoutputTCELL57:OUT.20.TMIN
TXOUTCLK_SFoutputTCELL57:OUT.25.TMIN
TXPIPPMPWDN_FSinputTCELL56:IMUX.IMUX.15.DELAY
TXPLLCKSEL_FS0inputTCELL54:IMUX.IMUX.37.DELAY
TXPLLCKSEL_FS1inputTCELL53:IMUX.IMUX.37.DELAY
TXPMARESETDONE_SFoutputTCELL57:OUT.7.TMIN
TXPMARESET_FSinputTCELL53:IMUX.CTRL.7
TXPOLARITY_FSinputTCELL57:IMUX.IMUX.39.DELAY
TXPPMOVRDEN_FSinputTCELL56:IMUX.IMUX.45.DELAY
TXPPMSEL_FSinputTCELL56:IMUX.IMUX.26.DELAY
TXPRBSINERR_FSinputTCELL57:IMUX.IMUX.45.DELAY
TXPRBSPTN_FS0inputTCELL55:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS1inputTCELL54:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS2inputTCELL53:IMUX.IMUX.39.DELAY
TXPRBSPTN_FS3inputTCELL53:IMUX.IMUX.44.DELAY
TXPRGDIVRSTDONE_SFoutputTCELL55:OUT.14.TMIN
TXPROGDIVRESET_FSinputTCELL54:IMUX.CTRL.7
TXPWRDN_FS0inputTCELL57:IMUX.IMUX.9.DELAY
TXPWRDN_FS1inputTCELL56:IMUX.IMUX.9.DELAY
TXRAWDATA_FS0inputTCELL59:IMUX.IMUX.37.DELAY
TXRAWDATA_FS1inputTCELL59:IMUX.IMUX.10.DELAY
TXRAWDATA_FS10inputTCELL59:IMUX.IMUX.7.DELAY
TXRAWDATA_FS11inputTCELL59:IMUX.IMUX.28.DELAY
TXRAWDATA_FS12inputTCELL59:IMUX.IMUX.29.DELAY
TXRAWDATA_FS13inputTCELL59:IMUX.IMUX.6.DELAY
TXRAWDATA_FS14inputTCELL59:IMUX.IMUX.26.DELAY
TXRAWDATA_FS15inputTCELL59:IMUX.IMUX.27.DELAY
TXRAWDATA_FS16inputTCELL59:IMUX.IMUX.5.DELAY
TXRAWDATA_FS17inputTCELL59:IMUX.IMUX.24.DELAY
TXRAWDATA_FS18inputTCELL59:IMUX.IMUX.3.DELAY
TXRAWDATA_FS19inputTCELL59:IMUX.IMUX.20.DELAY
TXRAWDATA_FS2inputTCELL59:IMUX.IMUX.34.DELAY
TXRAWDATA_FS20inputTCELL59:IMUX.IMUX.21.DELAY
TXRAWDATA_FS21inputTCELL59:IMUX.IMUX.2.DELAY
TXRAWDATA_FS22inputTCELL59:IMUX.IMUX.18.DELAY
TXRAWDATA_FS23inputTCELL59:IMUX.IMUX.19.DELAY
TXRAWDATA_FS24inputTCELL59:IMUX.IMUX.1.DELAY
TXRAWDATA_FS25inputTCELL59:IMUX.IMUX.16.DELAY
TXRAWDATA_FS26inputTCELL59:IMUX.IMUX.17.DELAY
TXRAWDATA_FS27inputTCELL59:IMUX.IMUX.0.DELAY
TXRAWDATA_FS28inputTCELL58:IMUX.IMUX.46.DELAY
TXRAWDATA_FS29inputTCELL58:IMUX.IMUX.47.DELAY
TXRAWDATA_FS3inputTCELL59:IMUX.IMUX.35.DELAY
TXRAWDATA_FS30inputTCELL58:IMUX.IMUX.15.DELAY
TXRAWDATA_FS31inputTCELL58:IMUX.IMUX.44.DELAY
TXRAWDATA_FS32inputTCELL58:IMUX.IMUX.45.DELAY
TXRAWDATA_FS33inputTCELL58:IMUX.IMUX.14.DELAY
TXRAWDATA_FS34inputTCELL58:IMUX.IMUX.42.DELAY
TXRAWDATA_FS35inputTCELL58:IMUX.IMUX.43.DELAY
TXRAWDATA_FS36inputTCELL58:IMUX.IMUX.38.DELAY
TXRAWDATA_FS37inputTCELL58:IMUX.IMUX.39.DELAY
TXRAWDATA_FS38inputTCELL58:IMUX.IMUX.11.DELAY
TXRAWDATA_FS39inputTCELL58:IMUX.IMUX.36.DELAY
TXRAWDATA_FS4inputTCELL59:IMUX.IMUX.9.DELAY
TXRAWDATA_FS5inputTCELL59:IMUX.IMUX.32.DELAY
TXRAWDATA_FS6inputTCELL59:IMUX.IMUX.33.DELAY
TXRAWDATA_FS7inputTCELL59:IMUX.IMUX.8.DELAY
TXRAWDATA_FS8inputTCELL59:IMUX.IMUX.30.DELAY
TXRAWDATA_FS9inputTCELL59:IMUX.IMUX.31.DELAY
TXRESETDONE_SFoutputTCELL56:OUT.18.TMIN
TXRESET_FSinputTCELL51:IMUX.IMUX.28.DELAY
TXSERPWRDN_FSinputTCELL57:IMUX.IMUX.37.DELAY
TXSLVSYNCEN_FSinputTCELL56:IMUX.IMUX.38.DELAY
TXSYNCEN2SLV_SFoutputTCELL56:OUT.29.TMIN
TXSYNCFSMMASTER_FSinputTCELL51:IMUX.IMUX.34.DELAY
TXSYSCKSEL_FS0inputTCELL56:IMUX.IMUX.37.DELAY
TXSYSCKSEL_FS1inputTCELL55:IMUX.IMUX.37.DELAY
TXUSRCLK2_FSinputTCELL54:IMUX.CTRL.3
TXUSRCLK_FSinputTCELL54:IMUX.CTRL.2
TXUSRRDY_FSinputTCELL57:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS0inputTCELL56:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS1inputTCELL56:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS10inputTCELL56:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS11inputTCELL56:IMUX.IMUX.25.DELAY
TX_AXIS_TDATA_FS12inputTCELL56:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS13inputTCELL56:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS14inputTCELL56:IMUX.IMUX.21.DELAY
TX_AXIS_TDATA_FS15inputTCELL56:IMUX.IMUX.1.DELAY
TX_AXIS_TDATA_FS16inputTCELL56:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS17inputTCELL56:IMUX.IMUX.0.DELAY
TX_AXIS_TDATA_FS18inputTCELL56:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS19inputTCELL55:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS2inputTCELL56:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS20inputTCELL55:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS21inputTCELL55:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS22inputTCELL55:IMUX.IMUX.34.DELAY
TX_AXIS_TDATA_FS23inputTCELL55:IMUX.IMUX.32.DELAY
TX_AXIS_TDATA_FS24inputTCELL55:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS25inputTCELL55:IMUX.IMUX.28.DELAY
TX_AXIS_TDATA_FS26inputTCELL55:IMUX.IMUX.26.DELAY
TX_AXIS_TDATA_FS27inputTCELL55:IMUX.IMUX.24.DELAY
TX_AXIS_TDATA_FS28inputTCELL55:IMUX.IMUX.18.DELAY
TX_AXIS_TDATA_FS29inputTCELL55:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS3inputTCELL56:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS30inputTCELL55:IMUX.IMUX.15.DELAY
TX_AXIS_TDATA_FS31inputTCELL55:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS32inputTCELL55:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS33inputTCELL55:IMUX.IMUX.13.DELAY
TX_AXIS_TDATA_FS34inputTCELL55:IMUX.IMUX.43.DELAY
TX_AXIS_TDATA_FS35inputTCELL55:IMUX.IMUX.12.DELAY
TX_AXIS_TDATA_FS36inputTCELL55:IMUX.IMUX.41.DELAY
TX_AXIS_TDATA_FS37inputTCELL55:IMUX.IMUX.10.DELAY
TX_AXIS_TDATA_FS38inputTCELL55:IMUX.IMUX.9.DELAY
TX_AXIS_TDATA_FS39inputTCELL55:IMUX.IMUX.35.DELAY
TX_AXIS_TDATA_FS4inputTCELL56:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS40inputTCELL55:IMUX.IMUX.8.DELAY
TX_AXIS_TDATA_FS41inputTCELL55:IMUX.IMUX.33.DELAY
TX_AXIS_TDATA_FS42inputTCELL55:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS43inputTCELL55:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS44inputTCELL55:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS45inputTCELL55:IMUX.IMUX.5.DELAY
TX_AXIS_TDATA_FS46inputTCELL55:IMUX.IMUX.4.DELAY
TX_AXIS_TDATA_FS47inputTCELL55:IMUX.IMUX.25.DELAY
TX_AXIS_TDATA_FS48inputTCELL55:IMUX.IMUX.23.DELAY
TX_AXIS_TDATA_FS49inputTCELL55:IMUX.IMUX.2.DELAY
TX_AXIS_TDATA_FS5inputTCELL56:IMUX.IMUX.33.DELAY
TX_AXIS_TDATA_FS50inputTCELL55:IMUX.IMUX.1.DELAY
TX_AXIS_TDATA_FS51inputTCELL55:IMUX.IMUX.19.DELAY
TX_AXIS_TDATA_FS52inputTCELL55:IMUX.IMUX.17.DELAY
TX_AXIS_TDATA_FS53inputTCELL54:IMUX.IMUX.46.DELAY
TX_AXIS_TDATA_FS54inputTCELL54:IMUX.IMUX.42.DELAY
TX_AXIS_TDATA_FS55inputTCELL54:IMUX.IMUX.38.DELAY
TX_AXIS_TDATA_FS56inputTCELL54:IMUX.IMUX.36.DELAY
TX_AXIS_TDATA_FS57inputTCELL54:IMUX.IMUX.30.DELAY
TX_AXIS_TDATA_FS58inputTCELL54:IMUX.IMUX.24.DELAY
TX_AXIS_TDATA_FS59inputTCELL54:IMUX.IMUX.18.DELAY
TX_AXIS_TDATA_FS6inputTCELL56:IMUX.IMUX.7.DELAY
TX_AXIS_TDATA_FS60inputTCELL54:IMUX.IMUX.16.DELAY
TX_AXIS_TDATA_FS61inputTCELL54:IMUX.IMUX.47.DELAY
TX_AXIS_TDATA_FS62inputTCELL54:IMUX.IMUX.45.DELAY
TX_AXIS_TDATA_FS63inputTCELL54:IMUX.IMUX.13.DELAY
TX_AXIS_TDATA_FS7inputTCELL56:IMUX.IMUX.6.DELAY
TX_AXIS_TDATA_FS8inputTCELL56:IMUX.IMUX.29.DELAY
TX_AXIS_TDATA_FS9inputTCELL56:IMUX.IMUX.5.DELAY
TX_AXIS_TERR_FSinputTCELL53:IMUX.IMUX.43.DELAY
TX_AXIS_TLAST_FS0inputTCELL53:IMUX.IMUX.42.DELAY
TX_AXIS_TLAST_FS1inputTCELL53:IMUX.IMUX.36.DELAY
TX_AXIS_TLAST_FS2inputTCELL53:IMUX.IMUX.30.DELAY
TX_AXIS_TLAST_FS3inputTCELL53:IMUX.IMUX.24.DELAY
TX_AXIS_TLAST_FS4inputTCELL53:IMUX.IMUX.18.DELAY
TX_AXIS_TLAST_FS5inputTCELL53:IMUX.IMUX.16.DELAY
TX_AXIS_TLAST_FS6inputTCELL53:IMUX.IMUX.47.DELAY
TX_AXIS_TLAST_FS7inputTCELL53:IMUX.IMUX.13.DELAY
TX_AXIS_TPOISON_FSinputTCELL53:IMUX.IMUX.46.DELAY
TX_AXIS_TPRE_FS0inputTCELL54:IMUX.IMUX.5.DELAY
TX_AXIS_TPRE_FS1inputTCELL54:IMUX.IMUX.4.DELAY
TX_AXIS_TPRE_FS2inputTCELL54:IMUX.IMUX.25.DELAY
TX_AXIS_TPRE_FS3inputTCELL54:IMUX.IMUX.23.DELAY
TX_AXIS_TPRE_FS4inputTCELL54:IMUX.IMUX.2.DELAY
TX_AXIS_TPRE_FS5inputTCELL54:IMUX.IMUX.1.DELAY
TX_AXIS_TPRE_FS6inputTCELL54:IMUX.IMUX.19.DELAY
TX_AXIS_TPRE_FS7inputTCELL54:IMUX.IMUX.17.DELAY
TX_AXIS_TREADY_SFoutputTCELL54:OUT.12.TMIN
TX_AXIS_TSOF_FS0inputTCELL54:IMUX.IMUX.7.DELAY
TX_AXIS_TSOF_FS1inputTCELL54:IMUX.IMUX.29.DELAY
TX_AXIS_TTERM_FS0inputTCELL54:IMUX.IMUX.41.DELAY
TX_AXIS_TTERM_FS1inputTCELL54:IMUX.IMUX.10.DELAY
TX_AXIS_TTERM_FS2inputTCELL54:IMUX.IMUX.9.DELAY
TX_AXIS_TTERM_FS3inputTCELL54:IMUX.IMUX.35.DELAY
TX_AXIS_TTERM_FS4inputTCELL54:IMUX.IMUX.8.DELAY
TX_AXIS_TVALID_FSinputTCELL54:IMUX.IMUX.12.DELAY
TX_GB_SEQ_START_SFoutputTCELL54:OUT.13.TMIN
TX_GB_SEQ_SYNC_FSinputTCELL54:IMUX.IMUX.43.DELAY
TX_PTP_SOP_POS_SFoutputTCELL54:OUT.15.TMIN
TX_PTP_SOP_SFoutputTCELL54:OUT.14.TMIN
TX_UNFOUT_SFoutputTCELL54:OUT.16.TMIN

Bel RCLK_GT

ultrascaleplus GTF bel RCLK_GT
PinDirectionWires

Bel VCC_GT

ultrascaleplus GTF bel VCC_GT
PinDirectionWires

Bel wires

ultrascaleplus GTF bel wires
WirePins
TCELL0:OUT.0.TMINGTF_CHANNEL0.SCANOUT_SF6
TCELL0:OUT.1.TMINGTF_CHANNEL0.PMASCANOUT_SF9
TCELL0:OUT.2.TMINGTF_CHANNEL0.SCANOUT_SF8
TCELL0:OUT.3.TMINGTF_CHANNEL0.DMONOUT_SF11
TCELL0:OUT.4.TMINGTF_CHANNEL0.SCANOUT_SF11
TCELL0:OUT.5.TMINGTF_CHANNEL0.PINRSRVDAS_SF9
TCELL0:OUT.6.TMINGTF_CHANNEL0.DFEDOUT_SF5
TCELL0:OUT.7.TMINGTF_CHANNEL0.PMASCANOUT_SF6
TCELL0:OUT.8.TMINGTF_CHANNEL0.SCANOUT_SF14
TCELL0:OUT.9.TMINGTF_CHANNEL0.DMONOUT_SF15
TCELL0:OUT.10.TMINGTF_CHANNEL0.DRPDO_SF11
TCELL0:OUT.11.TMINGTF_CHANNEL0.SCANOUT_SF5
TCELL0:OUT.12.TMINGTF_CHANNEL0.DMONOUT_SF6
TCELL0:OUT.13.TMINGTF_CHANNEL0.DRPDO_SF15
TCELL0:OUT.14.TMINGTF_CHANNEL0.PMASCANOUT_SF8
TCELL0:OUT.15.TMINGTF_CHANNEL0.DMONOUT_SF10
TCELL0:OUT.16.TMINGTF_CHANNEL0.PINRSRVDAS_SF10
TCELL0:OUT.17.TMINGTF_CHANNEL0.PMASCANOUT_SF5
TCELL0:OUT.18.TMINGTF_CHANNEL0.SCANOUT_SF1
TCELL0:OUT.19.TMINGTF_CHANNEL0.DRPDO_SF10
TCELL0:OUT.20.TMINGTF_CHANNEL0.DRPDO_SF6
TCELL0:OUT.21.TMINGTF_CHANNEL0.DMONOUT_SF5
TCELL0:OUT.22.TMINGTF_CHANNEL0.PINRSRVDAS_SF8
TCELL0:OUT.23.TMINGTF_CHANNEL0.SCANOUT_SF0
TCELL0:OUT.24.TMINGTF_CHANNEL0.DFEDOUT_SF1
TCELL0:OUT.25.TMINGTF_CHANNEL0.DRPDO_SF5
TCELL0:OUT.26.TMINGTF_CHANNEL0.DFEDOUT_SF0
TCELL0:OUT.27.TMINGTF_CHANNEL0.DMONOUT_SF0
TCELL0:OUT.28.TMINGTF_CHANNEL0.MGTREFCLKFA_SF
TCELL0:OUT.29.TMINGTF_CHANNEL0.PMASCANOUT_SF0
TCELL0:OUT.30.TMINGTF_CHANNEL0.DMONOUT_SF1
TCELL0:OUT.31.TMINGTF_CHANNEL0.DRPDO_SF0
TCELL0:IMUX.CTRL.4GTF_CHANNEL0.DCLK_FS
TCELL0:IMUX.CTRL.5GTF_CHANNEL0.DMONCLK_FS
TCELL0:IMUX.IMUX.0.DELAYGTF_CHANNEL0.DEN_FS
TCELL0:IMUX.IMUX.1.DELAYGTF_CHANNEL0.TSTIN_FS0
TCELL0:IMUX.IMUX.2.DELAYGTF_CHANNEL0.DADDR_FS0
TCELL0:IMUX.IMUX.3.DELAYGTF_CHANNEL0.DWE_FS
TCELL0:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TSTIN_FS2
TCELL0:IMUX.IMUX.5.DELAYGTF_CHANNEL0.DI_FS0
TCELL0:IMUX.IMUX.6.DELAYGTF_CHANNEL0.TXRAWDATA_FS2
TCELL0:IMUX.IMUX.7.DELAYGTF_CHANNEL0.TXRAWDATA_FS5
TCELL0:IMUX.IMUX.8.DELAYGTF_CHANNEL0.TXRAWDATA_FS8
TCELL0:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TXRAWDATA_FS11
TCELL0:IMUX.IMUX.10.DELAYGTF_CHANNEL0.TXRAWDATA_FS14
TCELL0:IMUX.IMUX.11.DELAYGTF_CHANNEL0.TXRAWDATA_FS17
TCELL0:IMUX.IMUX.12.DELAYGTF_CHANNEL0.EYESCANTRIGGER_FS
TCELL0:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXRAWDATA_FS19
TCELL0:IMUX.IMUX.14.DELAYGTF_CHANNEL0.TXRAWDATA_FS22
TCELL0:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TXRAWDATA_FS25
TCELL0:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TSTIN_FS10
TCELL0:IMUX.IMUX.17.DELAYGTF_CHANNEL0.DI_FS2
TCELL0:IMUX.IMUX.18.DELAYGTF_CHANNEL0.SCANIN_FS11
TCELL0:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TSTIN_FS12
TCELL0:IMUX.IMUX.20.DELAYGTF_CHANNEL0.DADDR_FS3
TCELL0:IMUX.IMUX.21.DELAYGTF_CHANNEL0.SCANIN_FS9
TCELL0:IMUX.IMUX.22.DELAYGTF_CHANNEL0.TSTIN_FS14
TCELL0:IMUX.IMUX.23.DELAYGTF_CHANNEL0.DI_FS3
TCELL0:IMUX.IMUX.24.DELAYGTF_CHANNEL0.SCANIN_FS7
TCELL0:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TSTIN_FS16
TCELL0:IMUX.IMUX.26.DELAYGTF_CHANNEL0.TXRAWDATA_FS1
TCELL0:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXRAWDATA_FS0
TCELL0:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TXRAWDATA_FS4
TCELL0:IMUX.IMUX.29.DELAYGTF_CHANNEL0.TXRAWDATA_FS3
TCELL0:IMUX.IMUX.30.DELAYGTF_CHANNEL0.TXRAWDATA_FS7
TCELL0:IMUX.IMUX.31.DELAYGTF_CHANNEL0.TXRAWDATA_FS6
TCELL0:IMUX.IMUX.32.DELAYGTF_CHANNEL0.TXRAWDATA_FS10
TCELL0:IMUX.IMUX.33.DELAYGTF_CHANNEL0.TXRAWDATA_FS9
TCELL0:IMUX.IMUX.34.DELAYGTF_CHANNEL0.TXRAWDATA_FS13
TCELL0:IMUX.IMUX.35.DELAYGTF_CHANNEL0.TXRAWDATA_FS12
TCELL0:IMUX.IMUX.36.DELAYGTF_CHANNEL0.TXRAWDATA_FS16
TCELL0:IMUX.IMUX.37.DELAYGTF_CHANNEL0.TXRAWDATA_FS15
TCELL0:IMUX.IMUX.38.DELAYGTF_CHANNEL0.DADDR_FS6
TCELL0:IMUX.IMUX.39.DELAYGTF_CHANNEL0.PMASCANIN_FS9
TCELL0:IMUX.IMUX.40.DELAYGTF_CHANNEL0.TXRAWDATA_FS18
TCELL0:IMUX.IMUX.41.DELAYGTF_CHANNEL0.DI_FS6
TCELL0:IMUX.IMUX.42.DELAYGTF_CHANNEL0.TXRAWDATA_FS21
TCELL0:IMUX.IMUX.43.DELAYGTF_CHANNEL0.TXRAWDATA_FS20
TCELL0:IMUX.IMUX.44.DELAYGTF_CHANNEL0.TXRAWDATA_FS24
TCELL0:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TXRAWDATA_FS23
TCELL0:IMUX.IMUX.46.DELAYGTF_CHANNEL0.TXRAWDATA_FS27
TCELL0:IMUX.IMUX.47.DELAYGTF_CHANNEL0.TXRAWDATA_FS26
TCELL1:OUT.0.TMINGTF_CHANNEL0.SCANOUT_SF7
TCELL1:OUT.1.TMINGTF_CHANNEL0.EYESCANDATAERROR_SF
TCELL1:OUT.2.TMINGTF_CHANNEL0.SCANOUT_SF9
TCELL1:OUT.3.TMINGTF_CHANNEL0.PMASCANOUT_SF1
TCELL1:OUT.4.TMINGTF_CHANNEL0.SCANOUT_SF12
TCELL1:OUT.5.TMINGTF_CHANNEL0.PINRSRVDAS_SF4
TCELL1:OUT.6.TMINGTF_CHANNEL0.DFEDOUT_SF6
TCELL1:OUT.7.TMINGTF_CHANNEL0.DRPDO_SF1
TCELL1:OUT.8.TMINGTF_CHANNEL0.SCANOUT_SF15
TCELL1:OUT.9.TMINGTF_CHANNEL0.PINRSRVDAS_SF0
TCELL1:OUT.10.TMINGTF_CHANNEL0.CPLFREQLOCK_SF
TCELL1:OUT.11.TMINGTF_CHANNEL0.RXRAWDATA_SF0
TCELL1:OUT.14.TMINGTF_CHANNEL0.RXRAWDATA_SF1
TCELL1:OUT.15.TMINGTF_CHANNEL0.RXRAWDATA_SF2
TCELL1:OUT.16.TMINGTF_CHANNEL0.RXRAWDATA_SF3
TCELL1:OUT.17.TMINGTF_CHANNEL0.RXRAWDATA_SF4
TCELL1:OUT.18.TMINGTF_CHANNEL0.RXRAWDATA_SF5
TCELL1:OUT.19.TMINGTF_CHANNEL0.RXRAWDATA_SF6
TCELL1:OUT.20.TMINGTF_CHANNEL0.RXRAWDATA_SF7
TCELL1:OUT.21.TMINGTF_CHANNEL0.RXRAWDATA_SF8
TCELL1:OUT.22.TMINGTF_CHANNEL0.RXRAWDATA_SF9
TCELL1:OUT.23.TMINGTF_CHANNEL0.RXRAWDATA_SF10
TCELL1:OUT.24.TMINGTF_CHANNEL0.RXRAWDATA_SF11
TCELL1:OUT.25.TMINGTF_CHANNEL0.RXRAWDATA_SF12
TCELL1:OUT.26.TMINGTF_CHANNEL0.RXRAWDATA_SF13
TCELL1:OUT.27.TMINGTF_CHANNEL0.RXRAWDATA_SF14
TCELL1:OUT.28.TMINGTF_CHANNEL0.RXRAWDATA_SF15
TCELL1:OUT.29.TMINGTF_CHANNEL0.RXRAWDATA_SF16
TCELL1:OUT.30.TMINGTF_CHANNEL0.RXRAWDATA_SF17
TCELL1:OUT.31.TMINGTF_CHANNEL0.RXRAWDATA_SF18
TCELL1:IMUX.CTRL.3GTF_CHANNEL0.DRST_FS
TCELL1:IMUX.CTRL.5GTF_CHANNEL0.COREREFCLK_FS
TCELL1:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TXRAWDATA_FS28
TCELL1:IMUX.IMUX.1.DELAYGTF_CHANNEL0.TXRAWDATA_FS31
TCELL1:IMUX.IMUX.2.DELAYGTF_CHANNEL0.TXRAWDATA_FS34
TCELL1:IMUX.IMUX.3.DELAYGTF_CHANNEL0.TSTPWRDN_FS0
TCELL1:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TXRAWDATA_FS36
TCELL1:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TXRAWDATA_FS39
TCELL1:IMUX.IMUX.6.DELAYGTF_CHANNEL0.TSTPWRDN_FS1
TCELL1:IMUX.IMUX.7.DELAYGTF_CHANNEL0.TSTIN_FS5
TCELL1:IMUX.IMUX.8.DELAYGTF_CHANNEL0.DADDR_FS9
TCELL1:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TSTPWRDN_FS2
TCELL1:IMUX.IMUX.10.DELAYGTF_CHANNEL0.TSTIN_FS7
TCELL1:IMUX.IMUX.11.DELAYGTF_CHANNEL0.DI_FS9
TCELL1:IMUX.IMUX.12.DELAYGTF_CHANNEL0.TSTPWRDN_FS3
TCELL1:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TSTIN_FS9
TCELL1:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TSTPWRDN_FS4
TCELL1:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TXRAWDATA_FS30
TCELL1:IMUX.IMUX.17.DELAYGTF_CHANNEL0.TXRAWDATA_FS29
TCELL1:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXRAWDATA_FS33
TCELL1:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TXRAWDATA_FS32
TCELL1:IMUX.IMUX.20.DELAYGTF_CHANNEL0.GTRXRSTSEL_FS
TCELL1:IMUX.IMUX.21.DELAYGTF_CHANNEL0.TXRAWDATA_FS35
TCELL1:IMUX.IMUX.22.DELAYGTF_CHANNEL0.TSTIN_FS15
TCELL1:IMUX.IMUX.23.DELAYGTF_CHANNEL0.DI_FS11
TCELL1:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXRAWDATA_FS38
TCELL1:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TXRAWDATA_FS37
TCELL1:IMUX.IMUX.27.DELAYGTF_CHANNEL0.SCANIN_FS1
TCELL1:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TSTIN_FS19
TCELL1:IMUX.IMUX.29.DELAYGTF_CHANNEL0.DI_FS12
TCELL1:IMUX.IMUX.30.DELAYGTF_CHANNEL0.SCANIN_FS3
TCELL1:IMUX.IMUX.31.DELAYGTF_CHANNEL0.TSTIN_FS4
TCELL1:IMUX.IMUX.32.DELAYGTF_CHANNEL0.SCANMODEB_FS
TCELL1:IMUX.IMUX.33.DELAYGTF_CHANNEL0.SCANIN_FS5
TCELL1:IMUX.IMUX.34.DELAYGTF_CHANNEL0.DADDR_FS1
TCELL1:IMUX.IMUX.35.DELAYGTF_CHANNEL0.DI_FS13
TCELL1:IMUX.IMUX.36.DELAYGTF_CHANNEL0.ISCANRESET_FS
TCELL1:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PMASCANENB_FS
TCELL1:IMUX.IMUX.38.DELAYGTF_CHANNEL0.SCANENB_FS
TCELL1:IMUX.IMUX.39.DELAYGTF_CHANNEL0.SCANRSTB_FS
TCELL1:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PMASCANIN_FS0
TCELL1:IMUX.IMUX.41.DELAYGTF_CHANNEL0.DI_FS14
TCELL1:IMUX.IMUX.42.DELAYGTF_CHANNEL0.SCANRSTEN_FS
TCELL1:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PMASCANIN_FS14
TCELL1:IMUX.IMUX.44.DELAYGTF_CHANNEL0.TSTPWRDNOVRDB_FS
TCELL1:IMUX.IMUX.45.DELAYGTF_CHANNEL0.DFE_KH_EXTHOLD_FS
TCELL1:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PMASCANIN_FS15
TCELL1:IMUX.IMUX.47.DELAYGTF_CHANNEL0.DI_FS15
TCELL2:OUT.0.TMINGTF_CHANNEL0.RXRAWDATA_SF19
TCELL2:OUT.1.TMINGTF_CHANNEL0.RXRAWDATA_SF20
TCELL2:OUT.2.TMINGTF_CHANNEL0.RXRAWDATA_SF21
TCELL2:OUT.3.TMINGTF_CHANNEL0.RXRAWDATA_SF22
TCELL2:OUT.4.TMINGTF_CHANNEL0.RXRAWDATA_SF23
TCELL2:OUT.5.TMINGTF_CHANNEL0.RXRAWDATA_SF24
TCELL2:OUT.6.TMINGTF_CHANNEL0.TXOUTCLK_SF
TCELL2:OUT.7.TMINGTF_CHANNEL0.RXRAWDATA_SF25
TCELL2:OUT.8.TMINGTF_CHANNEL0.RXRAWDATA_SF26
TCELL2:OUT.9.TMINGTF_CHANNEL0.RXRAWDATA_SF27
TCELL2:OUT.10.TMINGTF_CHANNEL0.RXRAWDATA_SF28
TCELL2:OUT.11.TMINGTF_CHANNEL0.TXOUTCLKPCS_SF
TCELL2:OUT.12.TMINGTF_CHANNEL0.RXRAWDATA_SF29
TCELL2:OUT.13.TMINGTF_CHANNEL0.RXRAWDATA_SF30
TCELL2:OUT.14.TMINGTF_CHANNEL0.RXRAWDATA_SF31
TCELL2:OUT.15.TMINGTF_CHANNEL0.RXRAWDATA_SF32
TCELL2:OUT.16.TMINGTF_CHANNEL0.RXRAWDATA_SF33
TCELL2:OUT.17.TMINGTF_CHANNEL0.RXRAWDATA_SF34
TCELL2:OUT.18.TMINGTF_CHANNEL0.RXRAWDATA_SF35
TCELL2:OUT.19.TMINGTF_CHANNEL0.RXRAWDATA_SF36
TCELL2:OUT.20.TMINGTF_CHANNEL0.RXRAWDATA_SF37
TCELL2:OUT.21.TMINGTF_CHANNEL0.RXRAWDATA_SF38
TCELL2:OUT.22.TMINGTF_CHANNEL0.RXRAWDATA_SF39
TCELL2:OUT.23.TMINGTF_CHANNEL0.SCANOUT_SF2
TCELL2:OUT.24.TMINGTF_CHANNEL0.TXPMARESETDONE_SF
TCELL2:OUT.25.TMINGTF_CHANNEL0.DRPDO_SF7
TCELL2:OUT.26.TMINGTF_CHANNEL0.DFEDOUT_SF2
TCELL2:OUT.27.TMINGTF_CHANNEL0.DMONOUT_SF2
TCELL2:OUT.28.TMINGTF_CHANNEL0.TXCOPIPHDONE_SF
TCELL2:OUT.29.TMINGTF_CHANNEL0.PMASCANOUT_SF2
TCELL2:OUT.30.TMINGTF_CHANNEL0.PINRSRVDAS_SF5
TCELL2:OUT.31.TMINGTF_CHANNEL0.DRPDO_SF2
TCELL2:IMUX.CTRL.0GTF_CHANNEL0.CFGRESET_FS
TCELL2:IMUX.CTRL.5GTF_CHANNEL0.PMASCANCLK4_FS
TCELL2:IMUX.CTRL.6GTF_CHANNEL0.PMASCANCLK5_FS
TCELL2:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TSTIN_FS6
TCELL2:IMUX.IMUX.1.DELAYGTF_CHANNEL0.SCANIN_FS13
TCELL2:IMUX.IMUX.2.DELAYGTF_CHANNEL0.DI_FS1
TCELL2:IMUX.IMUX.3.DELAYGTF_CHANNEL0.LOOPBACK_FS0
TCELL2:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TXUSRRDY_FS
TCELL2:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TSTIN_FS8
TCELL2:IMUX.IMUX.6.DELAYGTF_CHANNEL0.LOOPBACK_FS1
TCELL2:IMUX.IMUX.7.DELAYGTF_CHANNEL0.DADDR_FS2
TCELL2:IMUX.IMUX.8.DELAYGTF_CHANNEL0.GTTXRSTSEL_FS
TCELL2:IMUX.IMUX.9.DELAYGTF_CHANNEL0.LOOPBACK_FS2
TCELL2:IMUX.IMUX.10.DELAYGTF_CHANNEL0.TXDCCSRESET_FS
TCELL2:IMUX.IMUX.11.DELAYGTF_CHANNEL0.DADDR_FS4
TCELL2:IMUX.IMUX.12.DELAYGTF_CHANNEL0.CPLPWRDN_FS
TCELL2:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXEMPPRE_FS0
TCELL2:IMUX.IMUX.14.DELAYGTF_CHANNEL0.SCANIN_FS0
TCELL2:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TSTIN_FS18
TCELL2:IMUX.IMUX.16.DELAYGTF_CHANNEL0.INCPCTRL_FS
TCELL2:IMUX.IMUX.17.DELAYGTF_CHANNEL0.DI_FS4
TCELL2:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS0
TCELL2:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TXPRBSINERR_FS
TCELL2:IMUX.IMUX.20.DELAYGTF_CHANNEL0.SCANIN_FS2
TCELL2:IMUX.IMUX.21.DELAYGTF_CHANNEL0.SCANIN_FS12
TCELL2:IMUX.IMUX.22.DELAYGTF_CHANNEL0.FREQOS_FS
TCELL2:IMUX.IMUX.23.DELAYGTF_CHANNEL0.DADDR_FS5
TCELL2:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXEMPPOS_FS0
TCELL2:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TXPOLARITY_FS
TCELL2:IMUX.IMUX.26.DELAYGTF_CHANNEL0.SCANIN_FS4
TCELL2:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXSERPWRDN_FS
TCELL2:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TXPWRDN_FS0
TCELL2:IMUX.IMUX.29.DELAYGTF_CHANNEL0.PMASCANIN_FS7
TCELL2:IMUX.IMUX.30.DELAYGTF_CHANNEL0.DI_FS5
TCELL2:IMUX.IMUX.31.DELAYGTF_CHANNEL0.PMASCANIN_FS8
TCELL2:IMUX.IMUX.32.DELAYGTF_CHANNEL0.PMASCANRSTEN_FS
TCELL2:IMUX.IMUX.33.DELAYGTF_CHANNEL0.STEPSIZEPPM_FS0
TCELL2:IMUX.IMUX.34.DELAYGTF_CHANNEL0.PMASCANMODEB_FS
TCELL2:IMUX.IMUX.35.DELAYGTF_CHANNEL0.PMASCANIN_FS10
TCELL2:IMUX.IMUX.36.DELAYGTF_CHANNEL0.PMASCANIN_FS12
TCELL2:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PMASCANIN_FS1
TCELL2:IMUX.IMUX.38.DELAYGTF_CHANNEL0.DADDR_FS7
TCELL2:IMUX.IMUX.39.DELAYGTF_CHANNEL0.PMASCANIN_FS11
TCELL2:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PMASCANIN_FS2
TCELL2:IMUX.IMUX.41.DELAYGTF_CHANNEL0.PMASCANIN_FS13
TCELL2:IMUX.IMUX.42.DELAYGTF_CHANNEL0.DI_FS7
TCELL2:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PMASCANIN_FS16
TCELL2:IMUX.IMUX.44.DELAYGTF_CHANNEL0.DMONFIFORESET_FS
TCELL2:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TSTIN_FS1
TCELL2:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PMASCANIN_FS17
TCELL2:IMUX.IMUX.47.DELAYGTF_CHANNEL0.DADDR_FS8
TCELL3:OUT.0.TMINGTF_CHANNEL0.CFOKFORCEDONE_SF
TCELL3:OUT.1.TMINGTF_CHANNEL0.PINRSRVDAS_SF12
TCELL3:OUT.2.TMINGTF_CHANNEL0.TXSYNCEN2SLV_SF
TCELL3:OUT.3.TMINGTF_CHANNEL0.SCANOUT_SF10
TCELL3:OUT.4.TMINGTF_CHANNEL0.SCANOUT_SF13
TCELL3:OUT.5.TMINGTF_CHANNEL0.CPLREFLOSS_SF
TCELL3:OUT.6.TMINGTF_CHANNEL0.CFOKDONE_SF
TCELL3:OUT.7.TMINGTF_CHANNEL0.DRDY_SF
TCELL3:OUT.8.TMINGTF_CHANNEL0.TDASOFTRSTDONE_SF
TCELL3:OUT.9.TMINGTF_CHANNEL0.PINRSRVDAS_SF2
TCELL3:OUT.10.TMINGTF_CHANNEL0.SCANOUT_SF17
TCELL3:OUT.11.TMINGTF_CHANNEL0.TXLINKSYNCDONE_SF
TCELL3:OUT.12.TMINGTF_CHANNEL0.SCANOUT_SF18
TCELL3:OUT.13.TMINGTF_CHANNEL0.TXRESETDONE_SF
TCELL3:OUT.14.TMINGTF_CHANNEL0.PMASCANOUT_SF11
TCELL3:OUT.15.TMINGTF_CHANNEL0.DMONOUT_SF13
TCELL3:OUT.17.TMINGTF_CHANNEL0.CKOKDONE_SF
TCELL3:OUT.18.TMINGTF_CHANNEL0.TXDCCDONE_SF
TCELL3:OUT.19.TMINGTF_CHANNEL0.DRPDO_SF13
TCELL3:OUT.20.TMINGTF_CHANNEL0.RXCDRPHDONE_SF
TCELL3:OUT.21.TMINGTF_CHANNEL0.DMONOUT_SF8
TCELL3:OUT.22.TMINGTF_CHANNEL0.SCANOUT_SF16
TCELL3:OUT.23.TMINGTF_CHANNEL0.SCANOUT_SF3
TCELL3:OUT.24.TMINGTF_CHANNEL0.RXPHALIGNERR_SF
TCELL3:OUT.25.TMINGTF_CHANNEL0.DRPDO_SF8
TCELL3:OUT.26.TMINGTF_CHANNEL0.DFEDOUT_SF3
TCELL3:OUT.27.TMINGTF_CHANNEL0.DMONOUT_SF3
TCELL3:OUT.29.TMINGTF_CHANNEL0.PMASCANOUT_SF3
TCELL3:OUT.30.TMINGTF_CHANNEL0.PINRSRVDAS_SF6
TCELL3:OUT.31.TMINGTF_CHANNEL0.DRPDO_SF3
TCELL3:IMUX.CTRL.0GTF_CHANNEL0.CPLRESET_FS
TCELL3:IMUX.CTRL.5GTF_CHANNEL0.CPLLDMONCLK_FS
TCELL3:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TSTIN_FS3
TCELL3:IMUX.IMUX.2.DELAYGTF_CHANNEL0.DI_FS8
TCELL3:IMUX.IMUX.3.DELAYGTF_CHANNEL0.CPLREFSELDYN_FS2
TCELL3:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TXSLVSYNCEN_FS
TCELL3:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TSTIN_FS11
TCELL3:IMUX.IMUX.6.DELAYGTF_CHANNEL0.CPLREFSELDYN_FS1
TCELL3:IMUX.IMUX.7.DELAYGTF_CHANNEL0.RXTERMINATION_FS
TCELL3:IMUX.IMUX.8.DELAYGTF_CHANNEL0.DI_FS10
TCELL3:IMUX.IMUX.9.DELAYGTF_CHANNEL0.CPLREFSELDYN_FS0
TCELL3:IMUX.IMUX.10.DELAYGTF_CHANNEL0.TXPPMSEL_FS
TCELL3:IMUX.IMUX.11.DELAYGTF_CHANNEL0.SCANIN_FS10
TCELL3:IMUX.IMUX.12.DELAYGTF_CHANNEL0.CPLLKDETEN_FS
TCELL3:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXEMPPRE_FS1
TCELL3:IMUX.IMUX.14.DELAYGTF_CHANNEL0.TSTIN_FS13
TCELL3:IMUX.IMUX.15.DELAYGTF_CHANNEL0.SCANIN_FS8
TCELL3:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TXPIPPMPWDN_FS
TCELL3:IMUX.IMUX.17.DELAYGTF_CHANNEL0.SCANIN_FS6
TCELL3:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS1
TCELL3:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TXPPMOVRDEN_FS
TCELL3:IMUX.IMUX.20.DELAYGTF_CHANNEL0.TSTIN_FS17
TCELL3:IMUX.IMUX.21.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS0
TCELL3:IMUX.IMUX.22.DELAYGTF_CHANNEL0.ENPPM_FS
TCELL3:IMUX.IMUX.23.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS1
TCELL3:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXEMPPOS_FS1
TCELL3:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TCOPIOVREN_FS
TCELL3:IMUX.IMUX.26.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS2
TCELL3:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXSYSCKSEL_FS0
TCELL3:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TXPWRDN_FS1
TCELL3:IMUX.IMUX.29.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS3
TCELL3:IMUX.IMUX.30.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS4
TCELL3:IMUX.IMUX.31.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS5
TCELL3:IMUX.IMUX.32.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS6
TCELL3:IMUX.IMUX.33.DELAYGTF_CHANNEL0.STEPSIZEPPM_FS1
TCELL3:IMUX.IMUX.34.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS7
TCELL3:IMUX.IMUX.35.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS8
TCELL3:IMUX.IMUX.36.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS9
TCELL3:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PMASCANIN_FS3
TCELL3:IMUX.IMUX.38.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS10
TCELL3:IMUX.IMUX.39.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS11
TCELL3:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PMASCANIN_FS4
TCELL3:IMUX.IMUX.41.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS12
TCELL3:IMUX.IMUX.42.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS13
TCELL3:IMUX.IMUX.43.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS14
TCELL3:IMUX.IMUX.44.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS15
TCELL3:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS16
TCELL3:IMUX.IMUX.46.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS17
TCELL3:IMUX.IMUX.47.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS18
TCELL4:OUT.0.TMINGTF_CHANNEL0.CFOKFSTARTED_SF
TCELL4:OUT.1.TMINGTF_CHANNEL0.PINRSRVDAS_SF14
TCELL4:OUT.2.TMINGTF_CHANNEL0.RXPMARESETDONE_SF
TCELL4:OUT.3.TMINGTF_CHANNEL0.RXSLIPPMARDY_SF
TCELL4:OUT.4.TMINGTF_CHANNEL0.RXSYNCEN2SLV_SF
TCELL4:OUT.5.TMINGTF_CHANNEL0.RXSLIPOUTCLKRDY_SF
TCELL4:OUT.6.TMINGTF_CHANNEL0.CFOKSTART_SF
TCELL4:OUT.7.TMINGTF_CHANNEL0.DFEDOUT_SF7
TCELL4:OUT.8.TMINGTF_CHANNEL0.RXCOPHDONE_SF
TCELL4:OUT.9.TMINGTF_CHANNEL0.PINRSRVDAS_SF3
TCELL4:OUT.10.TMINGTF_CHANNEL0.RXSLIPDONE_SF
TCELL4:OUT.11.TMINGTF_CHANNEL0.PMASCANOUT_SF10
TCELL4:OUT.12.TMINGTF_CHANNEL0.DMONOUT_SF12
TCELL4:OUT.13.TMINGTF_CHANNEL0.RXLINKSYNCDONE_SF
TCELL4:OUT.14.TMINGTF_CHANNEL0.PMASCANOUT_SF7
TCELL4:OUT.15.TMINGTF_CHANNEL0.DMONOUT_SF14
TCELL4:OUT.16.TMINGTF_CHANNEL0.PINRSRVDAS_SF13
TCELL4:OUT.17.TMINGTF_CHANNEL0.TXPRGDIVRSTDONE_SF
TCELL4:OUT.18.TMINGTF_CHANNEL0.RESET_EXCEPTION_SF
TCELL4:OUT.19.TMINGTF_CHANNEL0.DRPDO_SF14
TCELL4:OUT.20.TMINGTF_CHANNEL0.RXPRGDIVRSTDONE_SF
TCELL4:OUT.21.TMINGTF_CHANNEL0.DMONOUT_SF9
TCELL4:OUT.22.TMINGTF_CHANNEL0.GTPOWERGOOD_SF
TCELL4:OUT.23.TMINGTF_CHANNEL0.SCANOUT_SF4
TCELL4:OUT.25.TMINGTF_CHANNEL0.DRPDO_SF9
TCELL4:OUT.26.TMINGTF_CHANNEL0.DFEDOUT_SF4
TCELL4:OUT.27.TMINGTF_CHANNEL0.DMONOUT_SF4
TCELL4:OUT.28.TMINGTF_CHANNEL0.PINRSRVDAS_SF15
TCELL4:OUT.29.TMINGTF_CHANNEL0.PMASCANOUT_SF4
TCELL4:OUT.30.TMINGTF_CHANNEL0.PINRSRVDAS_SF7
TCELL4:OUT.31.TMINGTF_CHANNEL0.DRPDO_SF4
TCELL4:IMUX.CTRL.0GTF_CHANNEL0.GTTXRST_FS
TCELL4:IMUX.CTRL.4GTF_CHANNEL0.PMASCANCLK3_FS
TCELL4:IMUX.CTRL.5GTF_CHANNEL0.PMASCANCLK2_FS
TCELL4:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS19
TCELL4:IMUX.IMUX.2.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS20
TCELL4:IMUX.IMUX.3.DELAYGTF_CHANNEL0.TXOUTCKCTL_FS0
TCELL4:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TXMSTRSETPHDONE_FS
TCELL4:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS21
TCELL4:IMUX.IMUX.6.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS22
TCELL4:IMUX.IMUX.7.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS23
TCELL4:IMUX.IMUX.8.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS24
TCELL4:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS25
TCELL4:IMUX.IMUX.10.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS26
TCELL4:IMUX.IMUX.11.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS27
TCELL4:IMUX.IMUX.12.DELAYGTF_CHANNEL0.TXDRVAMP_FS0
TCELL4:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXEMPPRE_FS2
TCELL4:IMUX.IMUX.14.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS28
TCELL4:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS29
TCELL4:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS30
TCELL4:IMUX.IMUX.17.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS31
TCELL4:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS2
TCELL4:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS32
TCELL4:IMUX.IMUX.20.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS33
TCELL4:IMUX.IMUX.21.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS34
TCELL4:IMUX.IMUX.22.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS35
TCELL4:IMUX.IMUX.23.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS36
TCELL4:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXEMPPOS_FS2
TCELL4:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TXPRBSPTN_FS0
TCELL4:IMUX.IMUX.26.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS37
TCELL4:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXSYSCKSEL_FS1
TCELL4:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS38
TCELL4:IMUX.IMUX.29.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS39
TCELL4:IMUX.IMUX.30.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS40
TCELL4:IMUX.IMUX.31.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS41
TCELL4:IMUX.IMUX.32.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS42
TCELL4:IMUX.IMUX.33.DELAYGTF_CHANNEL0.STEPSIZEPPM_FS2
TCELL4:IMUX.IMUX.34.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS43
TCELL4:IMUX.IMUX.35.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS44
TCELL4:IMUX.IMUX.36.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS45
TCELL4:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PMASCANIN_FS5
TCELL4:IMUX.IMUX.38.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS46
TCELL4:IMUX.IMUX.39.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS47
TCELL4:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PMASCANIN_FS6
TCELL4:IMUX.IMUX.41.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS48
TCELL4:IMUX.IMUX.42.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS49
TCELL4:IMUX.IMUX.43.DELAYGTF_CHANNEL0.DFE_KH_OVERWREN_FS
TCELL4:IMUX.IMUX.44.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS50
TCELL4:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS51
TCELL4:IMUX.IMUX.47.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS52
TCELL5:OUT.0.TMINGTF_CHANNEL0.PMASCANOUT_SF12
TCELL5:OUT.1.TMINGTF_CHANNEL0.CPLFBLOSS_SF
TCELL5:OUT.2.TMINGTF_CHANNEL0.RXELECIDLE_SF
TCELL5:OUT.3.TMINGTF_CHANNEL0.DRPDO_SF12
TCELL5:OUT.4.TMINGTF_CHANNEL0.TCOINITDONE_SF
TCELL5:OUT.5.TMINGTF_CHANNEL0.DMONOUT_SF7
TCELL5:OUT.6.TMINGTF_CHANNEL0.RDASOFTRSTDONE_SF
TCELL5:OUT.7.TMINGTF_CHANNEL0.PINRSRVDAS_SF11
TCELL5:OUT.8.TMINGTF_CHANNEL0.RXPRBSLOCKED_SF
TCELL5:OUT.9.TMINGTF_CHANNEL0.PINRSRVDAS_SF1
TCELL5:OUT.15.TMINGTF_CHANNEL0.TX_UNFOUT_SF
TCELL5:OUT.16.TMINGTF_CHANNEL0.TX_PTP_SOP_POS_SF
TCELL5:OUT.17.TMINGTF_CHANNEL0.TX_PTP_SOP_SF
TCELL5:OUT.18.TMINGTF_CHANNEL0.TX_GB_SEQ_START_SF
TCELL5:OUT.19.TMINGTF_CHANNEL0.TX_AXIS_TREADY_SF
TCELL5:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF8
TCELL5:OUT.21.TMINGTF_CHANNEL0.STAT_TX_PKT_ERR_SF
TCELL5:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF0
TCELL5:OUT.23.TMINGTF_CHANNEL0.STAT_TX_PKT_SF
TCELL5:OUT.24.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF0
TCELL5:OUT.25.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF1
TCELL5:OUT.26.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF2
TCELL5:OUT.27.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF3
TCELL5:OUT.28.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF4
TCELL5:OUT.29.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF5
TCELL5:OUT.30.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF6
TCELL5:OUT.31.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF7
TCELL5:IMUX.CTRL.0GTF_CHANNEL0.TXPROGDIVRESET_FS
TCELL5:IMUX.CTRL.4GTF_CHANNEL0.TXUSRCLK2_FS
TCELL5:IMUX.CTRL.5GTF_CHANNEL0.TXUSRCLK_FS
TCELL5:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS53
TCELL5:IMUX.IMUX.2.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS54
TCELL5:IMUX.IMUX.3.DELAYGTF_CHANNEL0.TXOUTCKCTL_FS1
TCELL5:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS55
TCELL5:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS56
TCELL5:IMUX.IMUX.7.DELAYGTF_CHANNEL0.TXCODAALGNEN_FS
TCELL5:IMUX.IMUX.8.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS57
TCELL5:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TCODABYPASS_FS
TCELL5:IMUX.IMUX.11.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS58
TCELL5:IMUX.IMUX.12.DELAYGTF_CHANNEL0.TXDRVAMP_FS1
TCELL5:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXEMPPRE_FS3
TCELL5:IMUX.IMUX.14.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS59
TCELL5:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS60
TCELL5:IMUX.IMUX.16.DELAYGTF_CHANNEL0.QPLLFREQLOCK0_FS
TCELL5:IMUX.IMUX.17.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS61
TCELL5:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS3
TCELL5:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS62
TCELL5:IMUX.IMUX.20.DELAYGTF_CHANNEL0.TX_AXIS_TDATA_FS63
TCELL5:IMUX.IMUX.21.DELAYGTF_CHANNEL0.TX_GB_SEQ_SYNC_FS
TCELL5:IMUX.IMUX.22.DELAYGTF_CHANNEL0.TX_AXIS_TVALID_FS
TCELL5:IMUX.IMUX.23.DELAYGTF_CHANNEL0.TX_AXIS_TTERM_FS0
TCELL5:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXEMPPOS_FS3
TCELL5:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TXPRBSPTN_FS1
TCELL5:IMUX.IMUX.26.DELAYGTF_CHANNEL0.TX_AXIS_TTERM_FS1
TCELL5:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXPLLCKSEL_FS0
TCELL5:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TX_AXIS_TTERM_FS2
TCELL5:IMUX.IMUX.29.DELAYGTF_CHANNEL0.TX_AXIS_TTERM_FS3
TCELL5:IMUX.IMUX.30.DELAYGTF_CHANNEL0.TX_AXIS_TTERM_FS4
TCELL5:IMUX.IMUX.32.DELAYGTF_CHANNEL0.TX_AXIS_TSOF_FS0
TCELL5:IMUX.IMUX.33.DELAYGTF_CHANNEL0.STEPSIZEPPM_FS3
TCELL5:IMUX.IMUX.35.DELAYGTF_CHANNEL0.TX_AXIS_TSOF_FS1
TCELL5:IMUX.IMUX.36.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS0
TCELL5:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS0
TCELL5:IMUX.IMUX.38.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS1
TCELL5:IMUX.IMUX.39.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS2
TCELL5:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS1
TCELL5:IMUX.IMUX.41.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS3
TCELL5:IMUX.IMUX.42.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS4
TCELL5:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS0
TCELL5:IMUX.IMUX.44.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS5
TCELL5:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS6
TCELL5:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS1
TCELL5:IMUX.IMUX.47.DELAYGTF_CHANNEL0.TX_AXIS_TPRE_FS7
TCELL6:OUT.0.TMINGTF_CHANNEL0.STAT_TX_PAUSE_VALID_SF8
TCELL6:OUT.1.TMINGTF_CHANNEL0.STAT_TX_FCS_ERR_SF
TCELL6:OUT.2.TMINGTF_CHANNEL0.STAT_TX_BYTES_SF0
TCELL6:OUT.3.TMINGTF_CHANNEL0.STAT_TX_BYTES_SF1
TCELL6:OUT.4.TMINGTF_CHANNEL0.STAT_TX_BYTES_SF2
TCELL6:OUT.5.TMINGTF_CHANNEL0.STAT_TX_BYTES_SF3
TCELL6:OUT.6.TMINGTF_CHANNEL0.CDRLOCK_SF
TCELL6:OUT.8.TMINGTF_CHANNEL0.RXRECCLK_SF
TCELL6:OUT.11.TMINGTF_CHANNEL0.STAT_TX_BAD_FCS_SF
TCELL6:OUT.12.TMINGTF_CHANNEL0.STAT_TX_VLAN_SF
TCELL6:OUT.13.TMINGTF_CHANNEL0.STAT_TX_BROADCAST_SF
TCELL6:OUT.14.TMINGTF_CHANNEL0.STAT_TX_MULTICAST_SF
TCELL6:OUT.15.TMINGTF_CHANNEL0.STAT_TX_UNICAST_SF
TCELL6:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF9
TCELL6:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF1
TCELL6:IMUX.CTRL.0GTF_CHANNEL0.TXPMARESET_FS
TCELL6:IMUX.CTRL.2GTF_CHANNEL0.PMASCANCLK6_FS
TCELL6:IMUX.CTRL.3GTF_CHANNEL0.PMASCANCLK7_FS
TCELL6:IMUX.CTRL.5GTF_CHANNEL0.TCOCLKFSMFROUT_FS
TCELL6:IMUX.IMUX.0.DELAYGTF_CHANNEL0.TX_AXIS_TPOISON_FS
TCELL6:IMUX.IMUX.1.DELAYGTF_CHANNEL0.TXPRBSPTN_FS3
TCELL6:IMUX.IMUX.2.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS0
TCELL6:IMUX.IMUX.3.DELAYGTF_CHANNEL0.TXOUTCKCTL_FS2
TCELL6:IMUX.IMUX.4.DELAYGTF_CHANNEL0.BSR_SERIAL_FS
TCELL6:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS1
TCELL6:IMUX.IMUX.6.DELAYGTF_CHANNEL0.CPLLFREQLOCK_FS
TCELL6:IMUX.IMUX.8.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS2
TCELL6:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TDASOFTRESET_FS
TCELL6:IMUX.IMUX.11.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS3
TCELL6:IMUX.IMUX.12.DELAYGTF_CHANNEL0.TXDRVAMP_FS2
TCELL6:IMUX.IMUX.13.DELAYGTF_CHANNEL0.TXEMPPRE_FS4
TCELL6:IMUX.IMUX.14.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS4
TCELL6:IMUX.IMUX.15.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS5
TCELL6:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TCODAOVREN_FS
TCELL6:IMUX.IMUX.17.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS6
TCELL6:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS4
TCELL6:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TCOHOLDFROUT_FS
TCELL6:IMUX.IMUX.20.DELAYGTF_CHANNEL0.TX_AXIS_TLAST_FS7
TCELL6:IMUX.IMUX.21.DELAYGTF_CHANNEL0.TX_AXIS_TERR_FS
TCELL6:IMUX.IMUX.22.DELAYGTF_CHANNEL0.CTL_TX_SEND_RFI_FS
TCELL6:IMUX.IMUX.23.DELAYGTF_CHANNEL0.CTL_TX_SEND_LFI_FS
TCELL6:IMUX.IMUX.24.DELAYGTF_CHANNEL0.TXEMPPOS_FS4
TCELL6:IMUX.IMUX.25.DELAYGTF_CHANNEL0.TXPRBSPTN_FS2
TCELL6:IMUX.IMUX.26.DELAYGTF_CHANNEL0.CTL_TX_SEND_IDLE_FS
TCELL6:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXPLLCKSEL_FS1
TCELL6:IMUX.IMUX.28.DELAYGTF_CHANNEL0.CTL_TX_RESEND_PAUSE_FS
TCELL6:IMUX.IMUX.29.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS0
TCELL6:IMUX.IMUX.30.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS1
TCELL6:IMUX.IMUX.32.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS2
TCELL6:IMUX.IMUX.33.DELAYGTF_CHANNEL0.STEPSIZEPPM_FS4
TCELL6:IMUX.IMUX.35.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS3
TCELL6:IMUX.IMUX.36.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS4
TCELL6:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS2
TCELL6:IMUX.IMUX.38.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS5
TCELL6:IMUX.IMUX.39.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS6
TCELL6:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS3
TCELL6:IMUX.IMUX.41.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS7
TCELL6:IMUX.IMUX.42.DELAYGTF_CHANNEL0.CTL_TX_PAUSE_REQ_FS8
TCELL6:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS2
TCELL6:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS3
TCELL7:OUT.0.TMINGTF_CHANNEL0.STAT_RX_HI_BER_SF
TCELL7:OUT.1.TMINGTF_CHANNEL0.STAT_RX_GOT_SIGNAL_OS_SF
TCELL7:OUT.2.TMINGTF_CHANNEL0.STAT_RX_FRAMING_ERR_SF
TCELL7:OUT.3.TMINGTF_CHANNEL0.STAT_RX_FCS_ERR_SF
TCELL7:OUT.4.TMINGTF_CHANNEL0.STAT_RX_BYTES_SF0
TCELL7:OUT.5.TMINGTF_CHANNEL0.STAT_RX_BYTES_SF1
TCELL7:OUT.6.TMINGTF_CHANNEL0.STAT_RX_BYTES_SF2
TCELL7:OUT.7.TMINGTF_CHANNEL0.STAT_RX_BYTES_SF3
TCELL7:OUT.8.TMINGTF_CHANNEL0.RXRECCLKPCS_SF
TCELL7:OUT.9.TMINGTF_CHANNEL0.STAT_RX_BROADCAST_SF
TCELL7:OUT.10.TMINGTF_CHANNEL0.PMASCANOUT_SF13
TCELL7:OUT.11.TMINGTF_CHANNEL0.STAT_RX_BLOCK_LOCK_SF
TCELL7:OUT.12.TMINGTF_CHANNEL0.STAT_RX_BAD_PREAMBLE_SF
TCELL7:OUT.13.TMINGTF_CHANNEL0.STAT_RX_BAD_SFD_SF
TCELL7:OUT.14.TMINGTF_CHANNEL0.STAT_RX_BAD_CODE_SF
TCELL7:OUT.15.TMINGTF_CHANNEL0.RX_PTP_SOP_POS_SF
TCELL7:OUT.16.TMINGTF_CHANNEL0.RX_PTP_SOP_SF
TCELL7:OUT.17.TMINGTF_CHANNEL0.RX_GB_SEQ_START_SF
TCELL7:OUT.18.TMINGTF_CHANNEL0.RX_BITSLIP_SF
TCELL7:OUT.19.TMINGTF_CHANNEL0.RX_AXIS_TVALID_SF
TCELL7:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF10
TCELL7:OUT.21.TMINGTF_CHANNEL0.RX_AXIS_TTERM_SF0
TCELL7:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF2
TCELL7:OUT.23.TMINGTF_CHANNEL0.RX_AXIS_TTERM_SF1
TCELL7:OUT.24.TMINGTF_CHANNEL0.RX_AXIS_TTERM_SF2
TCELL7:OUT.25.TMINGTF_CHANNEL0.RX_AXIS_TTERM_SF3
TCELL7:OUT.26.TMINGTF_CHANNEL0.RX_AXIS_TTERM_SF4
TCELL7:OUT.27.TMINGTF_CHANNEL0.RX_AXIS_TSOF_SF0
TCELL7:OUT.28.TMINGTF_CHANNEL0.RX_AXIS_TSOF_SF1
TCELL7:OUT.29.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF0
TCELL7:OUT.30.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF1
TCELL7:OUT.31.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF2
TCELL7:IMUX.CTRL.0GTF_CHANNEL0.DFERESET_FS
TCELL7:IMUX.CTRL.5GTF_CHANNEL0.SCANCLK_FS
TCELL7:IMUX.IMUX.1.DELAYGTF_CHANNEL0.RESETOVRD_FS
TCELL7:IMUX.IMUX.3.DELAYGTF_CHANNEL0.TXDRVAMP_FS4
TCELL7:IMUX.IMUX.4.DELAYGTF_CHANNEL0.TXDCCSTART_FS
TCELL7:IMUX.IMUX.7.DELAYGTF_CHANNEL0.TCODARESET_FS
TCELL7:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TCODAPWDN_FS
TCELL7:IMUX.IMUX.12.DELAYGTF_CHANNEL0.TXDRVAMP_FS3
TCELL7:IMUX.IMUX.16.DELAYGTF_CHANNEL0.TXCOPIALGNEN_FS
TCELL7:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS5
TCELL7:IMUX.IMUX.19.DELAYGTF_CHANNEL0.TXCOPISETPHS_FS
TCELL7:IMUX.IMUX.27.DELAYGTF_CHANNEL0.TXELECIDLE_FS
TCELL7:IMUX.IMUX.28.DELAYGTF_CHANNEL0.TCOUPDNFROUT_FS
TCELL7:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS4
TCELL7:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS5
TCELL7:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS4
TCELL7:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS5
TCELL8:OUT.0.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF3
TCELL8:OUT.1.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF4
TCELL8:OUT.2.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF5
TCELL8:OUT.3.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF6
TCELL8:OUT.4.TMINGTF_CHANNEL0.RX_AXIS_TPRE_SF7
TCELL8:OUT.5.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF0
TCELL8:OUT.6.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF1
TCELL8:OUT.7.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF2
TCELL8:OUT.8.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF3
TCELL8:OUT.9.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF4
TCELL8:OUT.10.TMINGTF_CHANNEL0.PMASCANOUT_SF14
TCELL8:OUT.11.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF5
TCELL8:OUT.12.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF6
TCELL8:OUT.13.TMINGTF_CHANNEL0.RX_AXIS_TLAST_SF7
TCELL8:OUT.14.TMINGTF_CHANNEL0.RX_AXIS_TERR_SF
TCELL8:OUT.15.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF0
TCELL8:OUT.16.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF1
TCELL8:OUT.17.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF2
TCELL8:OUT.18.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF3
TCELL8:OUT.19.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF4
TCELL8:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF11
TCELL8:OUT.21.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF5
TCELL8:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF3
TCELL8:OUT.23.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF6
TCELL8:OUT.24.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF7
TCELL8:OUT.25.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF8
TCELL8:OUT.26.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF9
TCELL8:OUT.27.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF10
TCELL8:OUT.28.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF11
TCELL8:OUT.29.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF12
TCELL8:OUT.30.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF13
TCELL8:OUT.31.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF14
TCELL8:IMUX.CTRL.0GTF_CHANNEL0.CDRFRRESET_FS
TCELL8:IMUX.CTRL.2GTF_CHANNEL0.PMASCANCLK8_FS
TCELL8:IMUX.CTRL.4GTF_CHANNEL0.TSTCLK1_FS
TCELL8:IMUX.CTRL.5GTF_CHANNEL0.TSTCLK0_FS
TCELL8:IMUX.CTRL.7GTF_CHANNEL0.RXPMARESET_FS
TCELL8:IMUX.IMUX.3.DELAYGTF_CHANNEL0.GATERXELECIDLE_FS0
TCELL8:IMUX.IMUX.4.DELAYGTF_CHANNEL0.RXSYSCKSEL_FS1
TCELL8:IMUX.IMUX.6.DELAYGTF_CHANNEL0.TXSYNCFSMMASTER_FS
TCELL8:IMUX.IMUX.7.DELAYGTF_CHANNEL0.GATERXELECIDLE_FS1
TCELL8:IMUX.IMUX.9.DELAYGTF_CHANNEL0.TXRESET_FS
TCELL8:IMUX.IMUX.12.DELAYGTF_CHANNEL0.PRBSCNTRST_FS
TCELL8:IMUX.IMUX.13.DELAYGTF_CHANNEL0.RXPOLARITY_FS
TCELL8:IMUX.IMUX.18.DELAYGTF_CHANNEL0.TXEMPMAIN_FS6
TCELL8:IMUX.IMUX.19.DELAYGTF_CHANNEL0.RCODAPWDN_FS
TCELL8:IMUX.IMUX.22.DELAYGTF_CHANNEL0.RXCOALGNEN_FS
TCELL8:IMUX.IMUX.24.DELAYGTF_CHANNEL0.RXCOSETPHS_FS
TCELL8:IMUX.IMUX.28.DELAYGTF_CHANNEL0.RXOUTCKCTL_FS0
TCELL8:IMUX.IMUX.31.DELAYGTF_CHANNEL0.CDRHOLD_FS
TCELL8:IMUX.IMUX.34.DELAYGTF_CHANNEL0.TCOINITSET_FS
TCELL8:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS6
TCELL8:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS7
TCELL8:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS6
TCELL8:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS7
TCELL9:OUT.0.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF15
TCELL9:OUT.1.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF16
TCELL9:OUT.2.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF17
TCELL9:OUT.3.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF18
TCELL9:OUT.4.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF19
TCELL9:OUT.5.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF20
TCELL9:OUT.6.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF21
TCELL9:OUT.7.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF22
TCELL9:OUT.8.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF23
TCELL9:OUT.9.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF24
TCELL9:OUT.10.TMINGTF_CHANNEL0.PMASCANOUT_SF15
TCELL9:OUT.11.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF25
TCELL9:OUT.12.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF26
TCELL9:OUT.13.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF27
TCELL9:OUT.14.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF28
TCELL9:OUT.15.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF29
TCELL9:OUT.16.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF30
TCELL9:OUT.17.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF31
TCELL9:OUT.18.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF32
TCELL9:OUT.19.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF33
TCELL9:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF12
TCELL9:OUT.21.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF34
TCELL9:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF4
TCELL9:OUT.23.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF35
TCELL9:OUT.24.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF36
TCELL9:OUT.25.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF37
TCELL9:OUT.26.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF38
TCELL9:OUT.27.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF39
TCELL9:OUT.28.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF40
TCELL9:OUT.29.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF41
TCELL9:OUT.30.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF42
TCELL9:OUT.31.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF43
TCELL9:IMUX.CTRL.0GTF_CHANNEL0.GTRXRST_FS
TCELL9:IMUX.CTRL.4GTF_CHANNEL0.RXUSRCLK2_FS
TCELL9:IMUX.CTRL.5GTF_CHANNEL0.RXUSRCLK_FS
TCELL9:IMUX.CTRL.7GTF_CHANNEL0.RCODARESET_FS
TCELL9:IMUX.IMUX.4.DELAYGTF_CHANNEL0.RXPLLCKSEL_FS0
TCELL9:IMUX.IMUX.7.DELAYGTF_CHANNEL0.SCANIN_FS14
TCELL9:IMUX.IMUX.10.DELAYGTF_CHANNEL0.SCANIN_FS15
TCELL9:IMUX.IMUX.13.DELAYGTF_CHANNEL0.RXRESET_FS
TCELL9:IMUX.IMUX.16.DELAYGTF_CHANNEL0.OSOVREN_FS
TCELL9:IMUX.IMUX.19.DELAYGTF_CHANNEL0.DFECFOKOVREN_FS
TCELL9:IMUX.IMUX.22.DELAYGTF_CHANNEL0.DFECFOKFPULSE_FS
TCELL9:IMUX.IMUX.25.DELAYGTF_CHANNEL0.DFECFOKFEN_FS
TCELL9:IMUX.IMUX.27.DELAYGTF_CHANNEL0.RXSYSCKSEL_FS0
TCELL9:IMUX.IMUX.28.DELAYGTF_CHANNEL0.RXOUTCKCTL_FS1
TCELL9:IMUX.IMUX.31.DELAYGTF_CHANNEL0.CDROVREN_FS
TCELL9:IMUX.IMUX.33.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS0
TCELL9:IMUX.IMUX.34.DELAYGTF_CHANNEL0.RXOUTCKCTL_FS2
TCELL9:IMUX.IMUX.35.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS1
TCELL9:IMUX.IMUX.36.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS2
TCELL9:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS8
TCELL9:IMUX.IMUX.38.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS3
TCELL9:IMUX.IMUX.39.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS4
TCELL9:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS9
TCELL9:IMUX.IMUX.41.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS5
TCELL9:IMUX.IMUX.42.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS6
TCELL9:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS8
TCELL9:IMUX.IMUX.44.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS7
TCELL9:IMUX.IMUX.45.DELAYGTF_CHANNEL0.CTL_RX_PAUSE_ACK_FS8
TCELL9:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS9
TCELL10:OUT.0.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF44
TCELL10:OUT.1.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF45
TCELL10:OUT.2.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF46
TCELL10:OUT.3.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF47
TCELL10:OUT.4.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF48
TCELL10:OUT.5.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF49
TCELL10:OUT.6.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF50
TCELL10:OUT.7.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF51
TCELL10:OUT.8.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF52
TCELL10:OUT.9.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF53
TCELL10:OUT.10.TMINGTF_CHANNEL0.PMASCANOUT_SF16
TCELL10:OUT.11.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF54
TCELL10:OUT.12.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF55
TCELL10:OUT.13.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF56
TCELL10:OUT.14.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF57
TCELL10:OUT.15.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF58
TCELL10:OUT.16.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF59
TCELL10:OUT.17.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF60
TCELL10:OUT.18.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF61
TCELL10:OUT.19.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF62
TCELL10:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF13
TCELL10:OUT.21.TMINGTF_CHANNEL0.RX_AXIS_TDATA_SF63
TCELL10:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF5
TCELL10:OUT.23.TMINGTF_CHANNEL0.STAT_RX_VLAN_SF
TCELL10:OUT.24.TMINGTF_CHANNEL0.STAT_RX_VALID_CTRL_CODE_SF
TCELL10:OUT.25.TMINGTF_CHANNEL0.STAT_RX_UNICAST_SF
TCELL10:OUT.26.TMINGTF_CHANNEL0.STAT_RX_TRUNCATED_SF
TCELL10:OUT.27.TMINGTF_CHANNEL0.STAT_RX_TEST_PATTERN_MISMATCH_SF
TCELL10:OUT.28.TMINGTF_CHANNEL0.STAT_RX_STATUS_SF
TCELL10:OUT.29.TMINGTF_CHANNEL0.STAT_RX_REMOTE_FAULT_SF
TCELL10:OUT.30.TMINGTF_CHANNEL0.STAT_RX_RECEIVED_LOCAL_FAULT_SF
TCELL10:OUT.31.TMINGTF_CHANNEL0.STAT_RX_PKT_ERR_SF
TCELL10:IMUX.CTRL.4GTF_CHANNEL0.PMASCANCLK1_FS
TCELL10:IMUX.CTRL.5GTF_CHANNEL0.PMASCANCLK0_FS
TCELL10:IMUX.CTRL.7GTF_CHANNEL0.RXPROGDIVRESET_FS
TCELL10:IMUX.IMUX.1.DELAYGTF_CHANNEL0.SCANIN_FS16
TCELL10:IMUX.IMUX.2.DELAYGTF_CHANNEL0.CKOKRESET_FS
TCELL10:IMUX.IMUX.3.DELAYGTF_CHANNEL0.QPLLFREQLOCK1_FS
TCELL10:IMUX.IMUX.4.DELAYGTF_CHANNEL0.RXPLLCKSEL_FS1
TCELL10:IMUX.IMUX.5.DELAYGTF_CHANNEL0.TXMUXDCDORWREN_FS
TCELL10:IMUX.IMUX.7.DELAYGTF_CHANNEL0.DFEH2HOLD_FS
TCELL10:IMUX.IMUX.10.DELAYGTF_CHANNEL0.DFEH2OVREN_FS
TCELL10:IMUX.IMUX.11.DELAYGTF_CHANNEL0.DFECFOKHOLD_FS
TCELL10:IMUX.IMUX.13.DELAYGTF_CHANNEL0.DFEH5HOLD_FS
TCELL10:IMUX.IMUX.14.DELAYGTF_CHANNEL0.RXCKCALSTART_FS0
TCELL10:IMUX.IMUX.16.DELAYGTF_CHANNEL0.DFEH5OVREN_FS
TCELL10:IMUX.IMUX.17.DELAYGTF_CHANNEL0.AFECFOKEN_FS
TCELL10:IMUX.IMUX.19.DELAYGTF_CHANNEL0.DFEH8HOLD_FS
TCELL10:IMUX.IMUX.22.DELAYGTF_CHANNEL0.DFEH8OVREN_FS
TCELL10:IMUX.IMUX.23.DELAYGTF_CHANNEL0.OSHOLD_FS
TCELL10:IMUX.IMUX.25.DELAYGTF_CHANNEL0.DFEH11HOLD_FS
TCELL10:IMUX.IMUX.26.DELAYGTF_CHANNEL0.RXCKCALSTART_FS1
TCELL10:IMUX.IMUX.28.DELAYGTF_CHANNEL0.DFEH11OVREN_FS
TCELL10:IMUX.IMUX.29.DELAYGTF_CHANNEL0.CFOKRESET_FS
TCELL10:IMUX.IMUX.31.DELAYGTF_CHANNEL0.DFEH14HOLD_FS
TCELL10:IMUX.IMUX.34.DELAYGTF_CHANNEL0.DFEH14OVREN_FS
TCELL10:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS10
TCELL10:IMUX.IMUX.38.DELAYGTF_CHANNEL0.DFEKLOVREN_FS
TCELL10:IMUX.IMUX.39.DELAYGTF_CHANNEL0.DFEUTOVREN_FS
TCELL10:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS11
TCELL10:IMUX.IMUX.41.DELAYGTF_CHANNEL0.DFEKLHOLD_FS
TCELL10:IMUX.IMUX.42.DELAYGTF_CHANNEL0.DFEUTHOLD_FS
TCELL10:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS10
TCELL10:IMUX.IMUX.44.DELAYGTF_CHANNEL0.DFEGCOVREN_FS
TCELL10:IMUX.IMUX.45.DELAYGTF_CHANNEL0.TXMUXDCDEXHOLD_FS
TCELL10:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS11
TCELL10:IMUX.IMUX.47.DELAYGTF_CHANNEL0.DFEGCHOLD_FS
TCELL11:OUT.0.TMINGTF_CHANNEL0.STAT_RX_PKT_SF
TCELL11:OUT.1.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF0
TCELL11:OUT.2.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF1
TCELL11:OUT.3.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF2
TCELL11:OUT.4.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF3
TCELL11:OUT.5.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF4
TCELL11:OUT.6.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF5
TCELL11:OUT.7.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF6
TCELL11:OUT.8.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF7
TCELL11:OUT.9.TMINGTF_CHANNEL0.STAT_RX_PAUSE_VALID_SF8
TCELL11:OUT.10.TMINGTF_CHANNEL0.PMASCANOUT_SF17
TCELL11:OUT.11.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF0
TCELL11:OUT.13.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF1
TCELL11:OUT.14.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF2
TCELL11:OUT.15.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF3
TCELL11:OUT.16.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF4
TCELL11:OUT.17.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF5
TCELL11:OUT.18.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF6
TCELL11:OUT.19.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF7
TCELL11:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF14
TCELL11:OUT.21.TMINGTF_CHANNEL0.STAT_RX_PAUSE_REQ_SF8
TCELL11:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF6
TCELL11:OUT.23.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF0
TCELL11:OUT.24.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF1
TCELL11:OUT.25.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF2
TCELL11:OUT.26.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF3
TCELL11:OUT.27.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF4
TCELL11:OUT.28.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF5
TCELL11:OUT.29.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF6
TCELL11:OUT.30.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF7
TCELL11:OUT.31.TMINGTF_CHANNEL0.STAT_RX_PAUSE_QUANTA_SF8
TCELL11:IMUX.CTRL.0GTF_CHANNEL0.CDRPHRESET_FS
TCELL11:IMUX.CTRL.7GTF_CHANNEL0.RXDASOFTRESET_FS
TCELL11:IMUX.IMUX.1.DELAYGTF_CHANNEL0.SCANIN_FS17
TCELL11:IMUX.IMUX.4.DELAYGTF_CHANNEL0.RXPWRDN_FS0
TCELL11:IMUX.IMUX.7.DELAYGTF_CHANNEL0.DFEH3HOLD_FS
TCELL11:IMUX.IMUX.10.DELAYGTF_CHANNEL0.DFEH3OVREN_FS
TCELL11:IMUX.IMUX.12.DELAYGTF_CHANNEL0.LPMOSHOLD_FS
TCELL11:IMUX.IMUX.13.DELAYGTF_CHANNEL0.DFEH6HOLD_FS
TCELL11:IMUX.IMUX.14.DELAYGTF_CHANNEL0.RXCKCALSTART_FS2
TCELL11:IMUX.IMUX.16.DELAYGTF_CHANNEL0.DFEH6OVREN_FS
TCELL11:IMUX.IMUX.19.DELAYGTF_CHANNEL0.DFEH9HOLD_FS
TCELL11:IMUX.IMUX.20.DELAYGTF_CHANNEL0.LPMOSOVREN_FS
TCELL11:IMUX.IMUX.21.DELAYGTF_CHANNEL0.RXCKCALSTART_FS3
TCELL11:IMUX.IMUX.22.DELAYGTF_CHANNEL0.DFEH9OVREN_FS
TCELL11:IMUX.IMUX.23.DELAYGTF_CHANNEL0.RXSYNCFSMMASTER_FS
TCELL11:IMUX.IMUX.25.DELAYGTF_CHANNEL0.DFEH12HOLD_FS
TCELL11:IMUX.IMUX.26.DELAYGTF_CHANNEL0.RXSLVSYNCEN_FS
TCELL11:IMUX.IMUX.28.DELAYGTF_CHANNEL0.DFEH12OVREN_FS
TCELL11:IMUX.IMUX.29.DELAYGTF_CHANNEL0.RXUSRRDY_FS
TCELL11:IMUX.IMUX.30.DELAYGTF_CHANNEL0.LPMKHOVREN_FS
TCELL11:IMUX.IMUX.31.DELAYGTF_CHANNEL0.DFEH15HOLD_FS
TCELL11:IMUX.IMUX.32.DELAYGTF_CHANNEL0.RXLPMEN_FS
TCELL11:IMUX.IMUX.34.DELAYGTF_CHANNEL0.DFEH15OVREN_FS
TCELL11:IMUX.IMUX.35.DELAYGTF_CHANNEL0.RXMSTRSETPHDONE_FS
TCELL11:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS12
TCELL11:IMUX.IMUX.38.DELAYGTF_CHANNEL0.DFEDOUTMODE_FS0
TCELL11:IMUX.IMUX.39.DELAYGTF_CHANNEL0.DFEVPOVREN_FS
TCELL11:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS13
TCELL11:IMUX.IMUX.42.DELAYGTF_CHANNEL0.DFEVPHOLD_FS
TCELL11:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS12
TCELL11:IMUX.IMUX.44.DELAYGTF_CHANNEL0.DFEDOUTMODE_FS1
TCELL11:IMUX.IMUX.45.DELAYGTF_CHANNEL0.DFEYEN_FS
TCELL11:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS13
TCELL12:OUT.0.TMINGTF_CHANNEL0.STAT_RX_MULTICAST_SF
TCELL12:OUT.1.TMINGTF_CHANNEL0.STAT_RX_LOCAL_FAULT_SF
TCELL12:OUT.2.TMINGTF_CHANNEL0.STAT_RX_INRANGEERR_SF
TCELL12:OUT.5.TMINGTF_CHANNEL0.STAT_RX_STOMPED_FCS_SF
TCELL12:OUT.6.TMINGTF_CHANNEL0.STAT_RX_BAD_FCS_SF
TCELL12:OUT.7.TMINGTF_CHANNEL0.STAT_RX_INTERNAL_LOCAL_FAULT_SF
TCELL12:OUT.8.TMINGTF_CHANNEL0.RXPRBSERR_SF
TCELL12:OUT.10.TMINGTF_CHANNEL0.RXRESETDONE_SF
TCELL12:OUT.20.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF15
TCELL12:OUT.22.TMINGTF_CHANNEL0.PCS_RSVD_OUT_SF7
TCELL12:IMUX.CTRL.4GTF_CHANNEL0.CKPINRSRVD1_FS
TCELL12:IMUX.CTRL.5GTF_CHANNEL0.CKPINRSRVD0_FS
TCELL12:IMUX.IMUX.0.DELAYGTF_CHANNEL0.RXPRBSPTN_FS3
TCELL12:IMUX.IMUX.1.DELAYGTF_CHANNEL0.SCANIN_FS18
TCELL12:IMUX.IMUX.2.DELAYGTF_CHANNEL0.RXPRBSPTN_FS0
TCELL12:IMUX.IMUX.4.DELAYGTF_CHANNEL0.RXPWRDN_FS1
TCELL12:IMUX.IMUX.5.DELAYGTF_CHANNEL0.RXPRBSPTN_FS1
TCELL12:IMUX.IMUX.7.DELAYGTF_CHANNEL0.DFEH4HOLD_FS
TCELL12:IMUX.IMUX.8.DELAYGTF_CHANNEL0.RXPRBSPTN_FS2
TCELL12:IMUX.IMUX.10.DELAYGTF_CHANNEL0.DFEH4OVREN_FS
TCELL12:IMUX.IMUX.11.DELAYGTF_CHANNEL0.DFECFOKCFNUM_FS0
TCELL12:IMUX.IMUX.13.DELAYGTF_CHANNEL0.DFEH7HOLD_FS
TCELL12:IMUX.IMUX.14.DELAYGTF_CHANNEL0.DFECFOKCFNUM_FS1
TCELL12:IMUX.IMUX.15.DELAYGTF_CHANNEL0.CDRSTEPSX_FS
TCELL12:IMUX.IMUX.16.DELAYGTF_CHANNEL0.DFEH7OVREN_FS
TCELL12:IMUX.IMUX.17.DELAYGTF_CHANNEL0.DFECFOKCFNUM_FS2
TCELL12:IMUX.IMUX.18.DELAYGTF_CHANNEL0.CDRSTEPSQ_FS
TCELL12:IMUX.IMUX.19.DELAYGTF_CHANNEL0.DFEH10HOLD_FS
TCELL12:IMUX.IMUX.20.DELAYGTF_CHANNEL0.DFECFOKCFNUM_FS3
TCELL12:IMUX.IMUX.22.DELAYGTF_CHANNEL0.DFEH10OVREN_FS
TCELL12:IMUX.IMUX.23.DELAYGTF_CHANNEL0.LPMKLOVREN_FS
TCELL12:IMUX.IMUX.24.DELAYGTF_CHANNEL0.RXCKCALSTART_FS4
TCELL12:IMUX.IMUX.25.DELAYGTF_CHANNEL0.DFEH13HOLD_FS
TCELL12:IMUX.IMUX.26.DELAYGTF_CHANNEL0.LPMKLHOLD_FS
TCELL12:IMUX.IMUX.28.DELAYGTF_CHANNEL0.DFEH13OVREN_FS
TCELL12:IMUX.IMUX.29.DELAYGTF_CHANNEL0.LPMKHHOLD_FS
TCELL12:IMUX.IMUX.30.DELAYGTF_CHANNEL0.LPMGCHOLD_FS
TCELL12:IMUX.IMUX.31.DELAYGTF_CHANNEL0.RXCKCALSTART_FS5
TCELL12:IMUX.IMUX.32.DELAYGTF_CHANNEL0.RXDAOVREN_FS
TCELL12:IMUX.IMUX.33.DELAYGTF_CHANNEL0.RXDAALGNEN_FS
TCELL12:IMUX.IMUX.34.DELAYGTF_CHANNEL0.LPMGCOVREN_FS
TCELL12:IMUX.IMUX.35.DELAYGTF_CHANNEL0.RXSLIPPMA_FS
TCELL12:IMUX.IMUX.36.DELAYGTF_CHANNEL0.RXDABYPASS_FS
TCELL12:IMUX.IMUX.37.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS14
TCELL12:IMUX.IMUX.40.DELAYGTF_CHANNEL0.PCS_RSVD_IN_FS15
TCELL12:IMUX.IMUX.41.DELAYGTF_CHANNEL0.RXCKCALSTART_FS6
TCELL12:IMUX.IMUX.42.DELAYGTF_CHANNEL0.RXSLIPOUTCLK_FS
TCELL12:IMUX.IMUX.43.DELAYGTF_CHANNEL0.PINRSRVD_FS14
TCELL12:IMUX.IMUX.45.DELAYGTF_CHANNEL0.CDRSTEPDIR_FS
TCELL12:IMUX.IMUX.46.DELAYGTF_CHANNEL0.PINRSRVD_FS15
TCELL13:OUT.1.TMINGTF_COMMON.SDMFINALOUT_SF_0_3
TCELL13:OUT.2.TMINGTF_COMMON.DRPDO_SF3
TCELL13:OUT.4.TMINGTF_COMMON.SDMTESTDATA_SF_0_3
TCELL13:OUT.5.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_3
TCELL13:OUT.6.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_3
TCELL13:OUT.9.TMINGTF_COMMON.QPLFBLOSS_SF_0
TCELL13:OUT.10.TMINGTF_COMMON.DRPDO_SF7
TCELL13:OUT.12.TMINGTF_COMMON.SDMTESTDATA_SF_0_7
TCELL13:OUT.13.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_7
TCELL13:OUT.14.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_7
TCELL13:OUT.18.TMINGTF_COMMON.DRPDO_SF11
TCELL13:OUT.19.TMINGTF_COMMON.QDPMASCANOUT_SF3
TCELL13:OUT.20.TMINGTF_COMMON.SDMTESTDATA_SF_0_11
TCELL13:OUT.26.TMINGTF_COMMON.DRPDO_SF15
TCELL13:OUT.27.TMINGTF_COMMON.DRDY_SF
TCELL13:OUT.28.TMINGTF_COMMON.QPLFREQLOCK_SF_0
TCELL13:IMUX.CTRL.2GTF_COMMON.QDCLKPINSPRD0_FS_0
TCELL13:IMUX.CTRL.3GTF_COMMON.QDCLKPINSPRD1_FS_0
TCELL13:IMUX.CTRL.4GTF_COMMON.QDPMASCANCLK_FS3
TCELL13:IMUX.CTRL.5GTF_COMMON.QDPMASCANCLK_FS10
TCELL13:IMUX.IMUX.0.DELAYGTF_COMMON.DI_FS8
TCELL13:IMUX.IMUX.1.DELAYGTF_COMMON.SDMDATA_FS_0_24
TCELL13:IMUX.IMUX.2.DELAYBUFG_GT9.CEMASK
TCELL13:IMUX.IMUX.3.DELAYBUFG_GT_SYNC12.CE_IN
TCELL13:IMUX.IMUX.4.DELAYGTF_COMMON.QDPMASCANIN_FS0
TCELL13:IMUX.IMUX.5.DELAYBUFG_GT9.RSTMASK
TCELL13:IMUX.IMUX.6.DELAYBUFG_GT_SYNC11.RST_IN
TCELL13:IMUX.IMUX.7.DELAYGTF_COMMON.QDPMASCANIN_FS1
TCELL13:IMUX.IMUX.8.DELAYGTF_COMMON.DI_FS2
TCELL13:IMUX.IMUX.10.DELAYGTF_COMMON.QDPMASCANIN_FS2
TCELL13:IMUX.IMUX.11.DELAYBUFG_GT10.CEMASK
TCELL13:IMUX.IMUX.12.DELAYGTF_COMMON.DADDR_FS14
TCELL13:IMUX.IMUX.13.DELAYGTF_COMMON.QDPMASCANIN_FS3
TCELL13:IMUX.IMUX.14.DELAYBUFG_GT10.RSTMASK
TCELL13:IMUX.IMUX.15.DELAYGTF_COMMON.DADDR_FS12
TCELL13:IMUX.IMUX.16.DELAYBUFG_GT_SYNC0.RST_IN
TCELL13:IMUX.IMUX.17.DELAYBUFG_GT9.DIV0
TCELL13:IMUX.IMUX.18.DELAYBUFG_GT_SYNC1.RST_IN
TCELL13:IMUX.IMUX.19.DELAYGTF_COMMON.QDPINSPRD_FS_0_0
TCELL13:IMUX.IMUX.20.DELAYBUFG_GT11.DIV0
TCELL13:IMUX.IMUX.21.DELAYBUFG_GT9.DIV1
TCELL13:IMUX.IMUX.22.DELAYBUFG_GT_SYNC2.RST_IN
TCELL13:IMUX.IMUX.24.DELAYBUFG_GT_SYNC3.RST_IN
TCELL13:IMUX.IMUX.25.DELAYGTF_COMMON.QDPINSPRD_FS_0_1
TCELL13:IMUX.IMUX.26.DELAYBUFG_GT_SYNC4.RST_IN
TCELL13:IMUX.IMUX.27.DELAYBUFG_GT9.DIV2
TCELL13:IMUX.IMUX.28.DELAYBUFG_GT_SYNC12.RST_IN
TCELL13:IMUX.IMUX.29.DELAYGTF_COMMON.DADDR_FS9
TCELL13:IMUX.IMUX.30.DELAYABUS_SWITCH_GT0.TEST_ANALOGBUS_SEL_B, ABUS_SWITCH_GT1.TEST_ANALOGBUS_SEL_B, ABUS_SWITCH_GT2.TEST_ANALOGBUS_SEL_B, ABUS_SWITCH_GT3.TEST_ANALOGBUS_SEL_B
TCELL13:IMUX.IMUX.31.DELAYGTF_COMMON.QDPINSPRD_FS_0_2
TCELL13:IMUX.IMUX.32.DELAYBUFG_GT11.DIV1
TCELL13:IMUX.IMUX.33.DELAYBUFG_GT10.DIV0
TCELL13:IMUX.IMUX.34.DELAYBUFG_GT11.CEMASK
TCELL13:IMUX.IMUX.36.DELAYBUFG_GT_SYNC2.CE_IN
TCELL13:IMUX.IMUX.37.DELAYGTF_COMMON.QDPINSPRD_FS_0_3
TCELL13:IMUX.IMUX.38.DELAYBUFG_GT_SYNC3.CE_IN
TCELL13:IMUX.IMUX.39.DELAYBUFG_GT10.DIV1
TCELL13:IMUX.IMUX.40.DELAYBUFG_GT_SYNC4.CE_IN
TCELL13:IMUX.IMUX.41.DELAYGTF_COMMON.DADDR_FS15
TCELL13:IMUX.IMUX.42.DELAYGTF_COMMON.REFCLKPD_FS_0
TCELL13:IMUX.IMUX.43.DELAYGTF_COMMON.QDPINSPRD_FS_0_4
TCELL13:IMUX.IMUX.44.DELAYBUFG_GT11.DIV2
TCELL13:IMUX.IMUX.45.DELAYBUFG_GT10.DIV2
TCELL13:IMUX.IMUX.46.DELAYBUFG_GT11.RSTMASK
TCELL13:IMUX.IMUX.47.DELAYGTF_COMMON.DADDR_FS13
TCELL14:OUT.1.TMINGTF_COMMON.SDMFINALOUT_SF_0_2
TCELL14:OUT.2.TMINGTF_COMMON.DRPDO_SF2
TCELL14:OUT.4.TMINGTF_COMMON.SDMTESTDATA_SF_0_2
TCELL14:OUT.5.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_2
TCELL14:OUT.6.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_2
TCELL14:OUT.9.TMINGTF_COMMON.MGTREFCLKFA_SF_0
TCELL14:OUT.10.TMINGTF_COMMON.DRPDO_SF6
TCELL14:OUT.12.TMINGTF_COMMON.SDMTESTDATA_SF_0_6
TCELL14:OUT.13.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_6
TCELL14:OUT.14.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_6
TCELL14:OUT.18.TMINGTF_COMMON.DRPDO_SF10
TCELL14:OUT.19.TMINGTF_COMMON.QDPMASCANOUT_SF2
TCELL14:OUT.20.TMINGTF_COMMON.SDMTESTDATA_SF_0_10
TCELL14:OUT.26.TMINGTF_COMMON.DRPDO_SF14
TCELL14:OUT.28.TMINGTF_COMMON.SDMTESTDATA_SF_0_14
TCELL14:IMUX.CTRL.1GTF_COMMON.QDPMASCANCLK_FS4
TCELL14:IMUX.CTRL.2GTF_COMMON.DCLK_FS
TCELL14:IMUX.CTRL.3GTF_COMMON.QPLLDMONCLK_FS_0
TCELL14:IMUX.CTRL.4GTF_COMMON.QDPMASCANCLK_FS2
TCELL14:IMUX.CTRL.7GTF_COMMON.SDMRESET_FS_0
TCELL14:IMUX.IMUX.0.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_0
TCELL14:IMUX.IMUX.1.DELAYGTF_COMMON.SDMDATA_FS_0_16
TCELL14:IMUX.IMUX.2.DELAYBUFG_GT6.CEMASK
TCELL14:IMUX.IMUX.3.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_1
TCELL14:IMUX.IMUX.4.DELAYGTF_COMMON.SDMDATA_FS_0_17
TCELL14:IMUX.IMUX.5.DELAYBUFG_GT6.RSTMASK
TCELL14:IMUX.IMUX.6.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_2
TCELL14:IMUX.IMUX.7.DELAYGTF_COMMON.SDMDATA_FS_0_18
TCELL14:IMUX.IMUX.9.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_3
TCELL14:IMUX.IMUX.10.DELAYGTF_COMMON.SDMDATA_FS_0_19
TCELL14:IMUX.IMUX.11.DELAYBUFG_GT7.CEMASK
TCELL14:IMUX.IMUX.12.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_4
TCELL14:IMUX.IMUX.13.DELAYGTF_COMMON.SDMDATA_FS_0_20
TCELL14:IMUX.IMUX.14.DELAYBUFG_GT7.RSTMASK
TCELL14:IMUX.IMUX.15.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_5
TCELL14:IMUX.IMUX.16.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_5
TCELL14:IMUX.IMUX.17.DELAYBUFG_GT6.DIV0
TCELL14:IMUX.IMUX.18.DELAYGTF_COMMON.SDMDATA_FS_0_21
TCELL14:IMUX.IMUX.19.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_0
TCELL14:IMUX.IMUX.20.DELAYBUFG_GT8.DIV0
TCELL14:IMUX.IMUX.21.DELAYBUFG_GT6.DIV1
TCELL14:IMUX.IMUX.25.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_1
TCELL14:IMUX.IMUX.26.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_6
TCELL14:IMUX.IMUX.27.DELAYBUFG_GT6.DIV2
TCELL14:IMUX.IMUX.28.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_6
TCELL14:IMUX.IMUX.30.DELAYGTF_COMMON.SDMDATA_FS_0_22
TCELL14:IMUX.IMUX.31.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_2
TCELL14:IMUX.IMUX.32.DELAYBUFG_GT8.DIV1
TCELL14:IMUX.IMUX.33.DELAYBUFG_GT7.DIV0
TCELL14:IMUX.IMUX.34.DELAYBUFG_GT8.CEMASK
TCELL14:IMUX.IMUX.35.DELAYGTF_COMMON.QPLLKDETEN_FS_0
TCELL14:IMUX.IMUX.36.DELAYGTF_COMMON.DWE_FS
TCELL14:IMUX.IMUX.37.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_3
TCELL14:IMUX.IMUX.38.DELAYGTF_COMMON.QDCMRSVDPIN_FS_0_7
TCELL14:IMUX.IMUX.39.DELAYBUFG_GT7.DIV1
TCELL14:IMUX.IMUX.40.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_7
TCELL14:IMUX.IMUX.42.DELAYGTF_COMMON.SDMDATA_FS_0_23
TCELL14:IMUX.IMUX.43.DELAYGTF_COMMON.QDPMAPINRSVD_FS_0_4
TCELL14:IMUX.IMUX.44.DELAYBUFG_GT8.DIV2
TCELL14:IMUX.IMUX.45.DELAYBUFG_GT7.DIV2
TCELL14:IMUX.IMUX.46.DELAYBUFG_GT8.RSTMASK
TCELL15:OUT.0.TMINGTF_COMMON.QDPMASCANOUT_SF4
TCELL15:OUT.1.TMINGTF_COMMON.SDMFINALOUT_SF_0_1
TCELL15:OUT.2.TMINGTF_COMMON.DRPDO_SF1
TCELL15:OUT.4.TMINGTF_COMMON.SDMTESTDATA_SF_0_1
TCELL15:OUT.5.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_1
TCELL15:OUT.6.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_1
TCELL15:OUT.9.TMINGTF_COMMON.QPLREFLOSS_SF_0
TCELL15:OUT.10.TMINGTF_COMMON.DRPDO_SF5
TCELL15:OUT.12.TMINGTF_COMMON.SDMTESTDATA_SF_0_5
TCELL15:OUT.13.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_5
TCELL15:OUT.14.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_5
TCELL15:OUT.18.TMINGTF_COMMON.DRPDO_SF9
TCELL15:OUT.19.TMINGTF_COMMON.QDPMASCANOUT_SF1
TCELL15:OUT.20.TMINGTF_COMMON.SDMTESTDATA_SF_0_9
TCELL15:OUT.26.TMINGTF_COMMON.DRPDO_SF13
TCELL15:OUT.28.TMINGTF_COMMON.SDMTESTDATA_SF_0_13
TCELL15:IMUX.CTRL.4GTF_COMMON.QDPMASCANCLK_FS1
TCELL15:IMUX.CTRL.5GTF_COMMON.QDPMASCANCLK_FS11
TCELL15:IMUX.CTRL.7GTF_COMMON.QPLRESET_FS_0
TCELL15:IMUX.IMUX.0.DELAYGTF_COMMON.QPLFBDIV_FS_0_7
TCELL15:IMUX.IMUX.1.DELAYGTF_COMMON.SDMDATA_FS_0_8
TCELL15:IMUX.IMUX.2.DELAYBUFG_GT3.CEMASK
TCELL15:IMUX.IMUX.3.DELAYGTF_COMMON.DI_FS9
TCELL15:IMUX.IMUX.4.DELAYGTF_COMMON.SDMDATA_FS_0_9
TCELL15:IMUX.IMUX.5.DELAYBUFG_GT3.RSTMASK
TCELL15:IMUX.IMUX.6.DELAYGTF_COMMON.DI_FS10
TCELL15:IMUX.IMUX.7.DELAYGTF_COMMON.SDMDATA_FS_0_10
TCELL15:IMUX.IMUX.8.DELAYGTF_COMMON.QPLFBDIV_FS_0_1
TCELL15:IMUX.IMUX.9.DELAYGTF_COMMON.DI_FS11
TCELL15:IMUX.IMUX.10.DELAYGTF_COMMON.SDMDATA_FS_0_11
TCELL15:IMUX.IMUX.11.DELAYBUFG_GT4.CEMASK
TCELL15:IMUX.IMUX.12.DELAYGTF_COMMON.DI_FS12
TCELL15:IMUX.IMUX.13.DELAYGTF_COMMON.SDMDATA_FS_0_12
TCELL15:IMUX.IMUX.14.DELAYBUFG_GT4.RSTMASK
TCELL15:IMUX.IMUX.15.DELAYGTF_COMMON.DI_FS13
TCELL15:IMUX.IMUX.16.DELAYGTF_COMMON.SDMWIDTH_FS_0_0
TCELL15:IMUX.IMUX.17.DELAYBUFG_GT3.DIV0
TCELL15:IMUX.IMUX.18.DELAYGTF_COMMON.SDMDATA_FS_0_13
TCELL15:IMUX.IMUX.19.DELAYGTF_COMMON.QPLREFDYN_FS_0_0
TCELL15:IMUX.IMUX.20.DELAYBUFG_GT5.DIV0
TCELL15:IMUX.IMUX.21.DELAYBUFG_GT3.DIV1
TCELL15:IMUX.IMUX.23.DELAYGTF_COMMON.DADDR_FS8
TCELL15:IMUX.IMUX.24.DELAYGTF_COMMON.QPLPWRDN_FS_0
TCELL15:IMUX.IMUX.25.DELAYGTF_COMMON.QPLREFDYN_FS_0_1
TCELL15:IMUX.IMUX.26.DELAYGTF_COMMON.DI_FS14
TCELL15:IMUX.IMUX.27.DELAYBUFG_GT3.DIV2
TCELL15:IMUX.IMUX.28.DELAYGTF_COMMON.QDPMASCANIN_FS4
TCELL15:IMUX.IMUX.29.DELAYGTF_COMMON.QPLFBDIV_FS_0_6
TCELL15:IMUX.IMUX.30.DELAYGTF_COMMON.SDMDATA_FS_0_14
TCELL15:IMUX.IMUX.31.DELAYGTF_COMMON.QPLREFDYN_FS_0_2
TCELL15:IMUX.IMUX.32.DELAYBUFG_GT5.DIV1
TCELL15:IMUX.IMUX.33.DELAYBUFG_GT4.DIV0
TCELL15:IMUX.IMUX.34.DELAYBUFG_GT5.CEMASK
TCELL15:IMUX.IMUX.35.DELAYBUFG_GT_SYNC11.CE_IN
TCELL15:IMUX.IMUX.36.DELAYBUFG_GT_SYNC0.CE_IN
TCELL15:IMUX.IMUX.37.DELAYGTF_COMMON.DADDR_FS11
TCELL15:IMUX.IMUX.38.DELAYGTF_COMMON.DI_FS15
TCELL15:IMUX.IMUX.39.DELAYBUFG_GT4.DIV1
TCELL15:IMUX.IMUX.40.DELAYBUFG_GT_SYNC1.CE_IN
TCELL15:IMUX.IMUX.41.DELAYGTF_COMMON.QPLFBDIV_FS_0_5
TCELL15:IMUX.IMUX.42.DELAYGTF_COMMON.SDMDATA_FS_0_15
TCELL15:IMUX.IMUX.43.DELAYGTF_COMMON.DADDR_FS10
TCELL15:IMUX.IMUX.44.DELAYBUFG_GT5.DIV2
TCELL15:IMUX.IMUX.45.DELAYBUFG_GT4.DIV2
TCELL15:IMUX.IMUX.46.DELAYBUFG_GT5.RSTMASK
TCELL15:IMUX.IMUX.47.DELAYGTF_COMMON.SDMWIDTH_FS_0_1
TCELL16:OUT.1.TMINGTF_COMMON.SDMFINALOUT_SF_0_0
TCELL16:OUT.2.TMINGTF_COMMON.DRPDO_SF0
TCELL16:OUT.4.TMINGTF_COMMON.SDMTESTDATA_SF_0_0
TCELL16:OUT.5.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_0
TCELL16:OUT.6.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_0
TCELL16:OUT.10.TMINGTF_COMMON.DRPDO_SF4
TCELL16:OUT.12.TMINGTF_COMMON.SDMTESTDATA_SF_0_4
TCELL16:OUT.13.TMINGTF_COMMON.DMONOUT_QDCM_SF_0_4
TCELL16:OUT.14.TMINGTF_COMMON.QDCMRSVDOUT_SF_0_4
TCELL16:OUT.18.TMINGTF_COMMON.DRPDO_SF8
TCELL16:OUT.19.TMINGTF_COMMON.QDPMASCANOUT_SF0
TCELL16:OUT.20.TMINGTF_COMMON.SDMTESTDATA_SF_0_8
TCELL16:OUT.26.TMINGTF_COMMON.DRPDO_SF12
TCELL16:OUT.28.TMINGTF_COMMON.SDMTESTDATA_SF_0_12
TCELL16:IMUX.CTRL.2GTF_COMMON.HROW_TEST_CK_FS_0
TCELL16:IMUX.CTRL.4GTF_COMMON.QDPMASCANCLK_FS0
TCELL16:IMUX.CTRL.6GTF_COMMON.QDCOREREFCLK_FS_0
TCELL16:IMUX.IMUX.0.DELAYGTF_COMMON.DI_FS0
TCELL16:IMUX.IMUX.1.DELAYGTF_COMMON.SDMDATA_FS_0_0
TCELL16:IMUX.IMUX.2.DELAYBUFG_GT0.CEMASK
TCELL16:IMUX.IMUX.3.DELAYGTF_COMMON.DI_FS1
TCELL16:IMUX.IMUX.4.DELAYGTF_COMMON.SDMDATA_FS_0_1
TCELL16:IMUX.IMUX.5.DELAYBUFG_GT0.RSTMASK
TCELL16:IMUX.IMUX.6.DELAYGTF_COMMON.QPLFBDIV_FS_0_3
TCELL16:IMUX.IMUX.7.DELAYGTF_COMMON.SDMDATA_FS_0_2
TCELL16:IMUX.IMUX.8.DELAYGTF_COMMON.QPLFBDIV_FS_0_0
TCELL16:IMUX.IMUX.9.DELAYGTF_COMMON.DI_FS3
TCELL16:IMUX.IMUX.10.DELAYGTF_COMMON.SDMDATA_FS_0_3
TCELL16:IMUX.IMUX.11.DELAYBUFG_GT1.CEMASK
TCELL16:IMUX.IMUX.12.DELAYGTF_COMMON.DI_FS4
TCELL16:IMUX.IMUX.13.DELAYGTF_COMMON.SDMDATA_FS_0_4
TCELL16:IMUX.IMUX.14.DELAYBUFG_GT1.RSTMASK
TCELL16:IMUX.IMUX.15.DELAYGTF_COMMON.DI_FS5
TCELL16:IMUX.IMUX.16.DELAYGTF_COMMON.DADDR_FS5
TCELL16:IMUX.IMUX.17.DELAYBUFG_GT0.DIV0
TCELL16:IMUX.IMUX.18.DELAYGTF_COMMON.SDMDATA_FS_0_5
TCELL16:IMUX.IMUX.19.DELAYGTF_COMMON.DADDR_FS0
TCELL16:IMUX.IMUX.20.DELAYBUFG_GT2.DIV0
TCELL16:IMUX.IMUX.21.DELAYBUFG_GT0.DIV1
TCELL16:IMUX.IMUX.24.DELAYGTF_COMMON.QPLFBDIV_FS_0_2
TCELL16:IMUX.IMUX.25.DELAYGTF_COMMON.DADDR_FS1
TCELL16:IMUX.IMUX.26.DELAYGTF_COMMON.DI_FS6
TCELL16:IMUX.IMUX.27.DELAYBUFG_GT0.DIV2
TCELL16:IMUX.IMUX.28.DELAYGTF_COMMON.DADDR_FS6
TCELL16:IMUX.IMUX.29.DELAYGTF_COMMON.SDMTOGGLE_FS_0
TCELL16:IMUX.IMUX.30.DELAYGTF_COMMON.SDMDATA_FS_0_6
TCELL16:IMUX.IMUX.31.DELAYGTF_COMMON.DADDR_FS2
TCELL16:IMUX.IMUX.32.DELAYBUFG_GT2.DIV1
TCELL16:IMUX.IMUX.33.DELAYBUFG_GT1.DIV0
TCELL16:IMUX.IMUX.34.DELAYBUFG_GT2.CEMASK
TCELL16:IMUX.IMUX.36.DELAYGTF_COMMON.QPLFBDIV_FS_0_4
TCELL16:IMUX.IMUX.37.DELAYGTF_COMMON.DADDR_FS3
TCELL16:IMUX.IMUX.38.DELAYGTF_COMMON.DI_FS7
TCELL16:IMUX.IMUX.39.DELAYBUFG_GT1.DIV1
TCELL16:IMUX.IMUX.40.DELAYGTF_COMMON.DADDR_FS7
TCELL16:IMUX.IMUX.42.DELAYGTF_COMMON.SDMDATA_FS_0_7
TCELL16:IMUX.IMUX.43.DELAYGTF_COMMON.DADDR_FS4
TCELL16:IMUX.IMUX.44.DELAYBUFG_GT2.DIV2
TCELL16:IMUX.IMUX.45.DELAYBUFG_GT1.DIV2
TCELL16:IMUX.IMUX.46.DELAYBUFG_GT2.RSTMASK
TCELL16:IMUX.IMUX.47.DELAYGTF_COMMON.DEN_FS
TCELL17:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF7
TCELL17:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF15
TCELL17:OUT.21.TMINGTF_CHANNEL1.RXRESETDONE_SF
TCELL17:OUT.23.TMINGTF_CHANNEL1.RXPRBSERR_SF
TCELL17:OUT.24.TMINGTF_CHANNEL1.STAT_RX_INTERNAL_LOCAL_FAULT_SF
TCELL17:OUT.25.TMINGTF_CHANNEL1.STAT_RX_BAD_FCS_SF
TCELL17:OUT.26.TMINGTF_CHANNEL1.STAT_RX_STOMPED_FCS_SF
TCELL17:OUT.29.TMINGTF_CHANNEL1.STAT_RX_INRANGEERR_SF
TCELL17:OUT.30.TMINGTF_CHANNEL1.STAT_RX_LOCAL_FAULT_SF
TCELL17:OUT.31.TMINGTF_CHANNEL1.STAT_RX_MULTICAST_SF
TCELL17:IMUX.CTRL.2GTF_CHANNEL1.CKPINRSRVD0_FS
TCELL17:IMUX.CTRL.3GTF_CHANNEL1.CKPINRSRVD1_FS
TCELL17:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS15
TCELL17:IMUX.IMUX.2.DELAYGTF_CHANNEL1.RXSLIPOUTCLK_FS
TCELL17:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS15
TCELL17:IMUX.IMUX.5.DELAYGTF_CHANNEL1.RXDABYPASS_FS
TCELL17:IMUX.IMUX.6.DELAYGTF_CHANNEL1.LPMGCOVREN_FS
TCELL17:IMUX.IMUX.7.DELAYGTF_CHANNEL1.RXDAOVREN_FS
TCELL17:IMUX.IMUX.8.DELAYGTF_CHANNEL1.LPMGCHOLD_FS
TCELL17:IMUX.IMUX.9.DELAYGTF_CHANNEL1.DFEH13OVREN_FS
TCELL17:IMUX.IMUX.10.DELAYGTF_CHANNEL1.LPMKLHOLD_FS
TCELL17:IMUX.IMUX.11.DELAYGTF_CHANNEL1.RXCKCALSTART_FS4
TCELL17:IMUX.IMUX.12.DELAYGTF_CHANNEL1.DFEH10OVREN_FS
TCELL17:IMUX.IMUX.13.DELAYGTF_CHANNEL1.DFECFOKCFNUM_FS3
TCELL17:IMUX.IMUX.14.DELAYGTF_CHANNEL1.CDRSTEPSQ_FS
TCELL17:IMUX.IMUX.15.DELAYGTF_CHANNEL1.DFEH7OVREN_FS
TCELL17:IMUX.IMUX.16.DELAYGTF_CHANNEL1.CDRSTEPSX_FS
TCELL17:IMUX.IMUX.18.DELAYGTF_CHANNEL1.DFECFOKCFNUM_FS1
TCELL17:IMUX.IMUX.19.DELAYGTF_CHANNEL1.CDRSTEPDIR_FS
TCELL17:IMUX.IMUX.20.DELAYGTF_CHANNEL1.DFEH7HOLD_FS
TCELL17:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS14
TCELL17:IMUX.IMUX.23.DELAYGTF_CHANNEL1.RXCKCALSTART_FS6
TCELL17:IMUX.IMUX.24.DELAYGTF_CHANNEL1.DFECFOKCFNUM_FS0
TCELL17:IMUX.IMUX.26.DELAYGTF_CHANNEL1.DFEH4OVREN_FS
TCELL17:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS14
TCELL17:IMUX.IMUX.29.DELAYGTF_CHANNEL1.RXSLIPPMA_FS
TCELL17:IMUX.IMUX.30.DELAYGTF_CHANNEL1.RXPRBSPTN_FS2
TCELL17:IMUX.IMUX.31.DELAYGTF_CHANNEL1.RXDAALGNEN_FS
TCELL17:IMUX.IMUX.32.DELAYGTF_CHANNEL1.DFEH4HOLD_FS
TCELL17:IMUX.IMUX.33.DELAYGTF_CHANNEL1.RXCKCALSTART_FS5
TCELL17:IMUX.IMUX.35.DELAYGTF_CHANNEL1.LPMKHHOLD_FS
TCELL17:IMUX.IMUX.36.DELAYGTF_CHANNEL1.RXPRBSPTN_FS1
TCELL17:IMUX.IMUX.38.DELAYGTF_CHANNEL1.RXPWRDN_FS1
TCELL17:IMUX.IMUX.39.DELAYGTF_CHANNEL1.DFEH13HOLD_FS
TCELL17:IMUX.IMUX.41.DELAYGTF_CHANNEL1.LPMKLOVREN_FS
TCELL17:IMUX.IMUX.42.DELAYGTF_CHANNEL1.RXPRBSPTN_FS0
TCELL17:IMUX.IMUX.44.DELAYGTF_CHANNEL1.SCANIN_FS18
TCELL17:IMUX.IMUX.45.DELAYGTF_CHANNEL1.DFEH10HOLD_FS
TCELL17:IMUX.IMUX.46.DELAYGTF_CHANNEL1.RXPRBSPTN_FS3
TCELL17:IMUX.IMUX.47.DELAYGTF_CHANNEL1.DFECFOKCFNUM_FS2
TCELL18:OUT.0.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF8
TCELL18:OUT.1.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF7
TCELL18:OUT.2.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF6
TCELL18:OUT.3.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF5
TCELL18:OUT.4.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF4
TCELL18:OUT.5.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF3
TCELL18:OUT.6.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF2
TCELL18:OUT.7.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF1
TCELL18:OUT.8.TMINGTF_CHANNEL1.STAT_RX_PAUSE_QUANTA_SF0
TCELL18:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF6
TCELL18:OUT.10.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF8
TCELL18:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF14
TCELL18:OUT.12.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF7
TCELL18:OUT.13.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF6
TCELL18:OUT.14.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF5
TCELL18:OUT.15.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF4
TCELL18:OUT.16.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF3
TCELL18:OUT.17.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF2
TCELL18:OUT.18.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF1
TCELL18:OUT.20.TMINGTF_CHANNEL1.STAT_RX_PAUSE_REQ_SF0
TCELL18:OUT.21.TMINGTF_CHANNEL1.PMASCANOUT_SF17
TCELL18:OUT.22.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF8
TCELL18:OUT.23.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF7
TCELL18:OUT.24.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF6
TCELL18:OUT.25.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF5
TCELL18:OUT.26.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF4
TCELL18:OUT.27.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF3
TCELL18:OUT.28.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF2
TCELL18:OUT.29.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF1
TCELL18:OUT.30.TMINGTF_CHANNEL1.STAT_RX_PAUSE_VALID_SF0
TCELL18:OUT.31.TMINGTF_CHANNEL1.STAT_RX_PKT_SF
TCELL18:IMUX.CTRL.0GTF_CHANNEL1.RXDASOFTRESET_FS
TCELL18:IMUX.CTRL.7GTF_CHANNEL1.CDRPHRESET_FS
TCELL18:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS13
TCELL18:IMUX.IMUX.1.DELAYGTF_CHANNEL1.DFEDOUTMODE_FS1
TCELL18:IMUX.IMUX.2.DELAYGTF_CHANNEL1.DFEVPHOLD_FS
TCELL18:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS13
TCELL18:IMUX.IMUX.4.DELAYGTF_CHANNEL1.DFEDOUTMODE_FS0
TCELL18:IMUX.IMUX.6.DELAYGTF_CHANNEL1.DFEH15OVREN_FS
TCELL18:IMUX.IMUX.7.DELAYGTF_CHANNEL1.RXLPMEN_FS
TCELL18:IMUX.IMUX.8.DELAYGTF_CHANNEL1.LPMKHOVREN_FS
TCELL18:IMUX.IMUX.9.DELAYGTF_CHANNEL1.DFEH12OVREN_FS
TCELL18:IMUX.IMUX.10.DELAYGTF_CHANNEL1.RXSLVSYNCEN_FS
TCELL18:IMUX.IMUX.12.DELAYGTF_CHANNEL1.DFEH9OVREN_FS
TCELL18:IMUX.IMUX.13.DELAYGTF_CHANNEL1.LPMOSOVREN_FS
TCELL18:IMUX.IMUX.15.DELAYGTF_CHANNEL1.DFEH6OVREN_FS
TCELL18:IMUX.IMUX.18.DELAYGTF_CHANNEL1.RXCKCALSTART_FS2
TCELL18:IMUX.IMUX.19.DELAYGTF_CHANNEL1.DFEYEN_FS
TCELL18:IMUX.IMUX.20.DELAYGTF_CHANNEL1.DFEH6HOLD_FS
TCELL18:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS12
TCELL18:IMUX.IMUX.22.DELAYGTF_CHANNEL1.LPMOSHOLD_FS
TCELL18:IMUX.IMUX.25.DELAYGTF_CHANNEL1.DFEVPOVREN_FS
TCELL18:IMUX.IMUX.26.DELAYGTF_CHANNEL1.DFEH3OVREN_FS
TCELL18:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS12
TCELL18:IMUX.IMUX.29.DELAYGTF_CHANNEL1.RXMSTRSETPHDONE_FS
TCELL18:IMUX.IMUX.32.DELAYGTF_CHANNEL1.DFEH3HOLD_FS
TCELL18:IMUX.IMUX.33.DELAYGTF_CHANNEL1.DFEH15HOLD_FS
TCELL18:IMUX.IMUX.35.DELAYGTF_CHANNEL1.RXUSRRDY_FS
TCELL18:IMUX.IMUX.38.DELAYGTF_CHANNEL1.RXPWRDN_FS0
TCELL18:IMUX.IMUX.39.DELAYGTF_CHANNEL1.DFEH12HOLD_FS
TCELL18:IMUX.IMUX.41.DELAYGTF_CHANNEL1.RXSYNCFSMMASTER_FS
TCELL18:IMUX.IMUX.43.DELAYGTF_CHANNEL1.RXCKCALSTART_FS3
TCELL18:IMUX.IMUX.44.DELAYGTF_CHANNEL1.SCANIN_FS17
TCELL18:IMUX.IMUX.45.DELAYGTF_CHANNEL1.DFEH9HOLD_FS
TCELL19:OUT.0.TMINGTF_CHANNEL1.STAT_RX_PKT_ERR_SF
TCELL19:OUT.1.TMINGTF_CHANNEL1.STAT_RX_RECEIVED_LOCAL_FAULT_SF
TCELL19:OUT.2.TMINGTF_CHANNEL1.STAT_RX_REMOTE_FAULT_SF
TCELL19:OUT.3.TMINGTF_CHANNEL1.STAT_RX_STATUS_SF
TCELL19:OUT.4.TMINGTF_CHANNEL1.STAT_RX_TEST_PATTERN_MISMATCH_SF
TCELL19:OUT.5.TMINGTF_CHANNEL1.STAT_RX_TRUNCATED_SF
TCELL19:OUT.6.TMINGTF_CHANNEL1.STAT_RX_UNICAST_SF
TCELL19:OUT.7.TMINGTF_CHANNEL1.STAT_RX_VALID_CTRL_CODE_SF
TCELL19:OUT.8.TMINGTF_CHANNEL1.STAT_RX_VLAN_SF
TCELL19:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF5
TCELL19:OUT.10.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF63
TCELL19:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF13
TCELL19:OUT.12.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF62
TCELL19:OUT.13.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF61
TCELL19:OUT.14.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF60
TCELL19:OUT.15.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF59
TCELL19:OUT.16.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF58
TCELL19:OUT.17.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF57
TCELL19:OUT.18.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF56
TCELL19:OUT.19.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF55
TCELL19:OUT.20.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF54
TCELL19:OUT.21.TMINGTF_CHANNEL1.PMASCANOUT_SF16
TCELL19:OUT.22.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF53
TCELL19:OUT.23.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF52
TCELL19:OUT.24.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF51
TCELL19:OUT.25.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF50
TCELL19:OUT.26.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF49
TCELL19:OUT.27.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF48
TCELL19:OUT.28.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF47
TCELL19:OUT.29.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF46
TCELL19:OUT.30.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF45
TCELL19:OUT.31.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF44
TCELL19:IMUX.CTRL.0GTF_CHANNEL1.RXPROGDIVRESET_FS
TCELL19:IMUX.CTRL.2GTF_CHANNEL1.PMASCANCLK0_FS
TCELL19:IMUX.CTRL.3GTF_CHANNEL1.PMASCANCLK1_FS
TCELL19:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS11
TCELL19:IMUX.IMUX.1.DELAYGTF_CHANNEL1.DFEGCOVREN_FS
TCELL19:IMUX.IMUX.2.DELAYGTF_CHANNEL1.DFEUTHOLD_FS
TCELL19:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS11
TCELL19:IMUX.IMUX.4.DELAYGTF_CHANNEL1.DFEKLOVREN_FS
TCELL19:IMUX.IMUX.6.DELAYGTF_CHANNEL1.DFEH14OVREN_FS
TCELL19:IMUX.IMUX.9.DELAYGTF_CHANNEL1.DFEH11OVREN_FS
TCELL19:IMUX.IMUX.10.DELAYGTF_CHANNEL1.RXCKCALSTART_FS1
TCELL19:IMUX.IMUX.12.DELAYGTF_CHANNEL1.DFEH8OVREN_FS
TCELL19:IMUX.IMUX.15.DELAYGTF_CHANNEL1.DFEH5OVREN_FS
TCELL19:IMUX.IMUX.17.DELAYGTF_CHANNEL1.DFEGCHOLD_FS
TCELL19:IMUX.IMUX.18.DELAYGTF_CHANNEL1.RXCKCALSTART_FS0
TCELL19:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TXMUXDCDEXHOLD_FS
TCELL19:IMUX.IMUX.20.DELAYGTF_CHANNEL1.DFEH5HOLD_FS
TCELL19:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS10
TCELL19:IMUX.IMUX.23.DELAYGTF_CHANNEL1.DFEKLHOLD_FS
TCELL19:IMUX.IMUX.24.DELAYGTF_CHANNEL1.DFECFOKHOLD_FS
TCELL19:IMUX.IMUX.25.DELAYGTF_CHANNEL1.DFEUTOVREN_FS
TCELL19:IMUX.IMUX.26.DELAYGTF_CHANNEL1.DFEH2OVREN_FS
TCELL19:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS10
TCELL19:IMUX.IMUX.32.DELAYGTF_CHANNEL1.DFEH2HOLD_FS
TCELL19:IMUX.IMUX.33.DELAYGTF_CHANNEL1.DFEH14HOLD_FS
TCELL19:IMUX.IMUX.35.DELAYGTF_CHANNEL1.CFOKRESET_FS
TCELL19:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TXMUXDCDORWREN_FS
TCELL19:IMUX.IMUX.38.DELAYGTF_CHANNEL1.RXPLLCKSEL_FS1
TCELL19:IMUX.IMUX.39.DELAYGTF_CHANNEL1.DFEH11HOLD_FS
TCELL19:IMUX.IMUX.40.DELAYGTF_CHANNEL1.QPLLFREQLOCK1_FS
TCELL19:IMUX.IMUX.41.DELAYGTF_CHANNEL1.OSHOLD_FS
TCELL19:IMUX.IMUX.42.DELAYGTF_CHANNEL1.CKOKRESET_FS
TCELL19:IMUX.IMUX.44.DELAYGTF_CHANNEL1.SCANIN_FS16
TCELL19:IMUX.IMUX.45.DELAYGTF_CHANNEL1.DFEH8HOLD_FS
TCELL19:IMUX.IMUX.47.DELAYGTF_CHANNEL1.AFECFOKEN_FS
TCELL20:OUT.0.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF43
TCELL20:OUT.1.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF42
TCELL20:OUT.2.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF41
TCELL20:OUT.3.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF40
TCELL20:OUT.4.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF39
TCELL20:OUT.5.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF38
TCELL20:OUT.6.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF37
TCELL20:OUT.7.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF36
TCELL20:OUT.8.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF35
TCELL20:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF4
TCELL20:OUT.10.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF34
TCELL20:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF12
TCELL20:OUT.12.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF33
TCELL20:OUT.13.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF32
TCELL20:OUT.14.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF31
TCELL20:OUT.15.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF30
TCELL20:OUT.16.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF29
TCELL20:OUT.17.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF28
TCELL20:OUT.18.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF27
TCELL20:OUT.19.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF26
TCELL20:OUT.20.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF25
TCELL20:OUT.21.TMINGTF_CHANNEL1.PMASCANOUT_SF15
TCELL20:OUT.22.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF24
TCELL20:OUT.23.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF23
TCELL20:OUT.24.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF22
TCELL20:OUT.25.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF21
TCELL20:OUT.26.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF20
TCELL20:OUT.27.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF19
TCELL20:OUT.28.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF18
TCELL20:OUT.29.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF17
TCELL20:OUT.30.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF16
TCELL20:OUT.31.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF15
TCELL20:IMUX.CTRL.0GTF_CHANNEL1.RCODARESET_FS
TCELL20:IMUX.CTRL.2GTF_CHANNEL1.RXUSRCLK_FS
TCELL20:IMUX.CTRL.3GTF_CHANNEL1.RXUSRCLK2_FS
TCELL20:IMUX.CTRL.7GTF_CHANNEL1.GTRXRST_FS
TCELL20:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS9
TCELL20:IMUX.IMUX.1.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS7
TCELL20:IMUX.IMUX.2.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS6
TCELL20:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS9
TCELL20:IMUX.IMUX.4.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS3
TCELL20:IMUX.IMUX.5.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS2
TCELL20:IMUX.IMUX.6.DELAYGTF_CHANNEL1.RXOUTCKCTL_FS2
TCELL20:IMUX.IMUX.9.DELAYGTF_CHANNEL1.RXOUTCKCTL_FS1
TCELL20:IMUX.IMUX.12.DELAYGTF_CHANNEL1.DFECFOKFPULSE_FS
TCELL20:IMUX.IMUX.15.DELAYGTF_CHANNEL1.OSOVREN_FS
TCELL20:IMUX.IMUX.19.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS8
TCELL20:IMUX.IMUX.20.DELAYGTF_CHANNEL1.RXRESET_FS
TCELL20:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS8
TCELL20:IMUX.IMUX.23.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS5
TCELL20:IMUX.IMUX.25.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS4
TCELL20:IMUX.IMUX.26.DELAYGTF_CHANNEL1.SCANIN_FS15
TCELL20:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS8
TCELL20:IMUX.IMUX.29.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS1
TCELL20:IMUX.IMUX.31.DELAYGTF_CHANNEL1.CTL_RX_PAUSE_ACK_FS0
TCELL20:IMUX.IMUX.32.DELAYGTF_CHANNEL1.SCANIN_FS14
TCELL20:IMUX.IMUX.33.DELAYGTF_CHANNEL1.CDROVREN_FS
TCELL20:IMUX.IMUX.37.DELAYGTF_CHANNEL1.RXSYSCKSEL_FS0
TCELL20:IMUX.IMUX.38.DELAYGTF_CHANNEL1.RXPLLCKSEL_FS0
TCELL20:IMUX.IMUX.39.DELAYGTF_CHANNEL1.DFECFOKFEN_FS
TCELL20:IMUX.IMUX.45.DELAYGTF_CHANNEL1.DFECFOKOVREN_FS
TCELL21:OUT.0.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF14
TCELL21:OUT.1.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF13
TCELL21:OUT.2.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF12
TCELL21:OUT.3.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF11
TCELL21:OUT.4.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF10
TCELL21:OUT.5.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF9
TCELL21:OUT.6.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF8
TCELL21:OUT.7.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF7
TCELL21:OUT.8.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF6
TCELL21:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF3
TCELL21:OUT.10.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF5
TCELL21:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF11
TCELL21:OUT.12.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF4
TCELL21:OUT.13.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF3
TCELL21:OUT.14.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF2
TCELL21:OUT.15.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF1
TCELL21:OUT.16.TMINGTF_CHANNEL1.RX_AXIS_TDATA_SF0
TCELL21:OUT.17.TMINGTF_CHANNEL1.RX_AXIS_TERR_SF
TCELL21:OUT.18.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF7
TCELL21:OUT.19.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF6
TCELL21:OUT.20.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF5
TCELL21:OUT.21.TMINGTF_CHANNEL1.PMASCANOUT_SF14
TCELL21:OUT.22.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF4
TCELL21:OUT.23.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF3
TCELL21:OUT.24.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF2
TCELL21:OUT.25.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF1
TCELL21:OUT.26.TMINGTF_CHANNEL1.RX_AXIS_TLAST_SF0
TCELL21:OUT.27.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF7
TCELL21:OUT.28.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF6
TCELL21:OUT.29.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF5
TCELL21:OUT.30.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF4
TCELL21:OUT.31.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF3
TCELL21:IMUX.CTRL.0GTF_CHANNEL1.RXPMARESET_FS
TCELL21:IMUX.CTRL.2GTF_CHANNEL1.TSTCLK0_FS
TCELL21:IMUX.CTRL.3GTF_CHANNEL1.TSTCLK1_FS
TCELL21:IMUX.CTRL.5GTF_CHANNEL1.PMASCANCLK8_FS
TCELL21:IMUX.CTRL.7GTF_CHANNEL1.CDRFRRESET_FS
TCELL21:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS7
TCELL21:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS7
TCELL21:IMUX.IMUX.6.DELAYGTF_CHANNEL1.TCOINITSET_FS
TCELL21:IMUX.IMUX.9.DELAYGTF_CHANNEL1.RXOUTCKCTL_FS0
TCELL21:IMUX.IMUX.11.DELAYGTF_CHANNEL1.RXCOSETPHS_FS
TCELL21:IMUX.IMUX.12.DELAYGTF_CHANNEL1.RXCOALGNEN_FS
TCELL21:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS6
TCELL21:IMUX.IMUX.20.DELAYGTF_CHANNEL1.RXPOLARITY_FS
TCELL21:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS6
TCELL21:IMUX.IMUX.22.DELAYGTF_CHANNEL1.PRBSCNTRST_FS
TCELL21:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS6
TCELL21:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TXRESET_FS
TCELL21:IMUX.IMUX.32.DELAYGTF_CHANNEL1.GATERXELECIDLE_FS1
TCELL21:IMUX.IMUX.33.DELAYGTF_CHANNEL1.CDRHOLD_FS
TCELL21:IMUX.IMUX.34.DELAYGTF_CHANNEL1.TXSYNCFSMMASTER_FS
TCELL21:IMUX.IMUX.38.DELAYGTF_CHANNEL1.RXSYSCKSEL_FS1
TCELL21:IMUX.IMUX.40.DELAYGTF_CHANNEL1.GATERXELECIDLE_FS0
TCELL21:IMUX.IMUX.45.DELAYGTF_CHANNEL1.RCODAPWDN_FS
TCELL22:OUT.0.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF2
TCELL22:OUT.1.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF1
TCELL22:OUT.2.TMINGTF_CHANNEL1.RX_AXIS_TPRE_SF0
TCELL22:OUT.3.TMINGTF_CHANNEL1.RX_AXIS_TSOF_SF1
TCELL22:OUT.4.TMINGTF_CHANNEL1.RX_AXIS_TSOF_SF0
TCELL22:OUT.5.TMINGTF_CHANNEL1.RX_AXIS_TTERM_SF4
TCELL22:OUT.6.TMINGTF_CHANNEL1.RX_AXIS_TTERM_SF3
TCELL22:OUT.7.TMINGTF_CHANNEL1.RX_AXIS_TTERM_SF2
TCELL22:OUT.8.TMINGTF_CHANNEL1.RX_AXIS_TTERM_SF1
TCELL22:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF2
TCELL22:OUT.10.TMINGTF_CHANNEL1.RX_AXIS_TTERM_SF0
TCELL22:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF10
TCELL22:OUT.12.TMINGTF_CHANNEL1.RX_AXIS_TVALID_SF
TCELL22:OUT.13.TMINGTF_CHANNEL1.RX_BITSLIP_SF
TCELL22:OUT.14.TMINGTF_CHANNEL1.RX_GB_SEQ_START_SF
TCELL22:OUT.15.TMINGTF_CHANNEL1.RX_PTP_SOP_SF
TCELL22:OUT.16.TMINGTF_CHANNEL1.RX_PTP_SOP_POS_SF
TCELL22:OUT.17.TMINGTF_CHANNEL1.STAT_RX_BAD_CODE_SF
TCELL22:OUT.18.TMINGTF_CHANNEL1.STAT_RX_BAD_SFD_SF
TCELL22:OUT.19.TMINGTF_CHANNEL1.STAT_RX_BAD_PREAMBLE_SF
TCELL22:OUT.20.TMINGTF_CHANNEL1.STAT_RX_BLOCK_LOCK_SF
TCELL22:OUT.21.TMINGTF_CHANNEL1.PMASCANOUT_SF13
TCELL22:OUT.22.TMINGTF_CHANNEL1.STAT_RX_BROADCAST_SF
TCELL22:OUT.23.TMINGTF_CHANNEL1.RXRECCLKPCS_SF
TCELL22:OUT.24.TMINGTF_CHANNEL1.STAT_RX_BYTES_SF3
TCELL22:OUT.25.TMINGTF_CHANNEL1.STAT_RX_BYTES_SF2
TCELL22:OUT.26.TMINGTF_CHANNEL1.STAT_RX_BYTES_SF1
TCELL22:OUT.27.TMINGTF_CHANNEL1.STAT_RX_BYTES_SF0
TCELL22:OUT.28.TMINGTF_CHANNEL1.STAT_RX_FCS_ERR_SF
TCELL22:OUT.29.TMINGTF_CHANNEL1.STAT_RX_FRAMING_ERR_SF
TCELL22:OUT.30.TMINGTF_CHANNEL1.STAT_RX_GOT_SIGNAL_OS_SF
TCELL22:OUT.31.TMINGTF_CHANNEL1.STAT_RX_HI_BER_SF
TCELL22:IMUX.CTRL.2GTF_CHANNEL1.SCANCLK_FS
TCELL22:IMUX.CTRL.7GTF_CHANNEL1.DFERESET_FS
TCELL22:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS5
TCELL22:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS5
TCELL22:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TCOUPDNFROUT_FS
TCELL22:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS5
TCELL22:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TXCOPIALGNEN_FS
TCELL22:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS4
TCELL22:IMUX.IMUX.22.DELAYGTF_CHANNEL1.TXDRVAMP_FS3
TCELL22:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS4
TCELL22:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TCODAPWDN_FS
TCELL22:IMUX.IMUX.32.DELAYGTF_CHANNEL1.TCODARESET_FS
TCELL22:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXELECIDLE_FS
TCELL22:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TXDCCSTART_FS
TCELL22:IMUX.IMUX.40.DELAYGTF_CHANNEL1.TXDRVAMP_FS4
TCELL22:IMUX.IMUX.44.DELAYGTF_CHANNEL1.RESETOVRD_FS
TCELL22:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TXCOPISETPHS_FS
TCELL23:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF1
TCELL23:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF9
TCELL23:OUT.16.TMINGTF_CHANNEL1.STAT_TX_UNICAST_SF
TCELL23:OUT.17.TMINGTF_CHANNEL1.STAT_TX_MULTICAST_SF
TCELL23:OUT.18.TMINGTF_CHANNEL1.STAT_TX_BROADCAST_SF
TCELL23:OUT.19.TMINGTF_CHANNEL1.STAT_TX_VLAN_SF
TCELL23:OUT.20.TMINGTF_CHANNEL1.STAT_TX_BAD_FCS_SF
TCELL23:OUT.23.TMINGTF_CHANNEL1.RXRECCLK_SF
TCELL23:OUT.25.TMINGTF_CHANNEL1.CDRLOCK_SF
TCELL23:OUT.26.TMINGTF_CHANNEL1.STAT_TX_BYTES_SF3
TCELL23:OUT.27.TMINGTF_CHANNEL1.STAT_TX_BYTES_SF2
TCELL23:OUT.28.TMINGTF_CHANNEL1.STAT_TX_BYTES_SF1
TCELL23:OUT.29.TMINGTF_CHANNEL1.STAT_TX_BYTES_SF0
TCELL23:OUT.30.TMINGTF_CHANNEL1.STAT_TX_FCS_ERR_SF
TCELL23:OUT.31.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF8
TCELL23:IMUX.CTRL.2GTF_CHANNEL1.TCOCLKFSMFROUT_FS
TCELL23:IMUX.CTRL.4GTF_CHANNEL1.PMASCANCLK7_FS
TCELL23:IMUX.CTRL.5GTF_CHANNEL1.PMASCANCLK6_FS
TCELL23:IMUX.CTRL.7GTF_CHANNEL1.TXPMARESET_FS
TCELL23:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS3
TCELL23:IMUX.IMUX.2.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS8
TCELL23:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS3
TCELL23:IMUX.IMUX.4.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS5
TCELL23:IMUX.IMUX.5.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS4
TCELL23:IMUX.IMUX.7.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS2
TCELL23:IMUX.IMUX.8.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS1
TCELL23:IMUX.IMUX.9.DELAYGTF_CHANNEL1.CTL_TX_RESEND_PAUSE_FS
TCELL23:IMUX.IMUX.10.DELAYGTF_CHANNEL1.CTL_TX_SEND_IDLE_FS
TCELL23:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXEMPPOS_FS4
TCELL23:IMUX.IMUX.12.DELAYGTF_CHANNEL1.CTL_TX_SEND_RFI_FS
TCELL23:IMUX.IMUX.13.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS7
TCELL23:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS4
TCELL23:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TCODAOVREN_FS
TCELL23:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS5
TCELL23:IMUX.IMUX.18.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS4
TCELL23:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXEMPPRE_FS4
TCELL23:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS2
TCELL23:IMUX.IMUX.22.DELAYGTF_CHANNEL1.TXDRVAMP_FS2
TCELL23:IMUX.IMUX.23.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS7
TCELL23:IMUX.IMUX.24.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS3
TCELL23:IMUX.IMUX.25.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS6
TCELL23:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS2
TCELL23:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TDASOFTRESET_FS
TCELL23:IMUX.IMUX.29.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS3
TCELL23:IMUX.IMUX.30.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS2
TCELL23:IMUX.IMUX.31.DELAYGTF_CHANNEL1.STEPSIZEPPM_FS4
TCELL23:IMUX.IMUX.34.DELAYGTF_CHANNEL1.CPLLFREQLOCK_FS
TCELL23:IMUX.IMUX.35.DELAYGTF_CHANNEL1.CTL_TX_PAUSE_REQ_FS0
TCELL23:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS1
TCELL23:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXPLLCKSEL_FS1
TCELL23:IMUX.IMUX.38.DELAYGTF_CHANNEL1.BSR_SERIAL_FS
TCELL23:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TXPRBSPTN_FS2
TCELL23:IMUX.IMUX.40.DELAYGTF_CHANNEL1.TXOUTCKCTL_FS2
TCELL23:IMUX.IMUX.41.DELAYGTF_CHANNEL1.CTL_TX_SEND_LFI_FS
TCELL23:IMUX.IMUX.42.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS0
TCELL23:IMUX.IMUX.43.DELAYGTF_CHANNEL1.TX_AXIS_TERR_FS
TCELL23:IMUX.IMUX.44.DELAYGTF_CHANNEL1.TXPRBSPTN_FS3
TCELL23:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TCOHOLDFROUT_FS
TCELL23:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TX_AXIS_TPOISON_FS
TCELL23:IMUX.IMUX.47.DELAYGTF_CHANNEL1.TX_AXIS_TLAST_FS6
TCELL24:OUT.0.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF7
TCELL24:OUT.1.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF6
TCELL24:OUT.2.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF5
TCELL24:OUT.3.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF4
TCELL24:OUT.4.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF3
TCELL24:OUT.5.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF2
TCELL24:OUT.6.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF1
TCELL24:OUT.7.TMINGTF_CHANNEL1.STAT_TX_PAUSE_VALID_SF0
TCELL24:OUT.8.TMINGTF_CHANNEL1.STAT_TX_PKT_SF
TCELL24:OUT.9.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF0
TCELL24:OUT.10.TMINGTF_CHANNEL1.STAT_TX_PKT_ERR_SF
TCELL24:OUT.11.TMINGTF_CHANNEL1.PCS_RSVD_OUT_SF8
TCELL24:OUT.12.TMINGTF_CHANNEL1.TX_AXIS_TREADY_SF
TCELL24:OUT.13.TMINGTF_CHANNEL1.TX_GB_SEQ_START_SF
TCELL24:OUT.14.TMINGTF_CHANNEL1.TX_PTP_SOP_SF
TCELL24:OUT.15.TMINGTF_CHANNEL1.TX_PTP_SOP_POS_SF
TCELL24:OUT.16.TMINGTF_CHANNEL1.TX_UNFOUT_SF
TCELL24:OUT.22.TMINGTF_CHANNEL1.PINRSRVDAS_SF1
TCELL24:OUT.23.TMINGTF_CHANNEL1.RXPRBSLOCKED_SF
TCELL24:OUT.24.TMINGTF_CHANNEL1.PINRSRVDAS_SF11
TCELL24:OUT.25.TMINGTF_CHANNEL1.RDASOFTRSTDONE_SF
TCELL24:OUT.26.TMINGTF_CHANNEL1.DMONOUT_SF7
TCELL24:OUT.27.TMINGTF_CHANNEL1.TCOINITDONE_SF
TCELL24:OUT.28.TMINGTF_CHANNEL1.DRPDO_SF12
TCELL24:OUT.29.TMINGTF_CHANNEL1.RXELECIDLE_SF
TCELL24:OUT.30.TMINGTF_CHANNEL1.CPLFBLOSS_SF
TCELL24:OUT.31.TMINGTF_CHANNEL1.PMASCANOUT_SF12
TCELL24:IMUX.CTRL.2GTF_CHANNEL1.TXUSRCLK_FS
TCELL24:IMUX.CTRL.3GTF_CHANNEL1.TXUSRCLK2_FS
TCELL24:IMUX.CTRL.7GTF_CHANNEL1.TXPROGDIVRESET_FS
TCELL24:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PINRSRVD_FS1
TCELL24:IMUX.IMUX.1.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS5
TCELL24:IMUX.IMUX.2.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS4
TCELL24:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS1
TCELL24:IMUX.IMUX.4.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS1
TCELL24:IMUX.IMUX.5.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS0
TCELL24:IMUX.IMUX.7.DELAYGTF_CHANNEL1.TX_AXIS_TSOF_FS0
TCELL24:IMUX.IMUX.8.DELAYGTF_CHANNEL1.TX_AXIS_TTERM_FS4
TCELL24:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TX_AXIS_TTERM_FS2
TCELL24:IMUX.IMUX.10.DELAYGTF_CHANNEL1.TX_AXIS_TTERM_FS1
TCELL24:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXEMPPOS_FS3
TCELL24:IMUX.IMUX.12.DELAYGTF_CHANNEL1.TX_AXIS_TVALID_FS
TCELL24:IMUX.IMUX.13.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS63
TCELL24:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS3
TCELL24:IMUX.IMUX.15.DELAYGTF_CHANNEL1.QPLLFREQLOCK0_FS
TCELL24:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS60
TCELL24:IMUX.IMUX.17.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS7
TCELL24:IMUX.IMUX.18.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS59
TCELL24:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS6
TCELL24:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXEMPPRE_FS3
TCELL24:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PINRSRVD_FS0
TCELL24:IMUX.IMUX.22.DELAYGTF_CHANNEL1.TXDRVAMP_FS1
TCELL24:IMUX.IMUX.23.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS3
TCELL24:IMUX.IMUX.24.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS58
TCELL24:IMUX.IMUX.25.DELAYGTF_CHANNEL1.TX_AXIS_TPRE_FS2
TCELL24:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PCS_RSVD_IN_FS0
TCELL24:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TCODABYPASS_FS
TCELL24:IMUX.IMUX.29.DELAYGTF_CHANNEL1.TX_AXIS_TSOF_FS1
TCELL24:IMUX.IMUX.30.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS57
TCELL24:IMUX.IMUX.31.DELAYGTF_CHANNEL1.STEPSIZEPPM_FS3
TCELL24:IMUX.IMUX.32.DELAYGTF_CHANNEL1.TXCODAALGNEN_FS
TCELL24:IMUX.IMUX.35.DELAYGTF_CHANNEL1.TX_AXIS_TTERM_FS3
TCELL24:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS56
TCELL24:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXPLLCKSEL_FS0
TCELL24:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS55
TCELL24:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TXPRBSPTN_FS1
TCELL24:IMUX.IMUX.40.DELAYGTF_CHANNEL1.TXOUTCKCTL_FS1
TCELL24:IMUX.IMUX.41.DELAYGTF_CHANNEL1.TX_AXIS_TTERM_FS0
TCELL24:IMUX.IMUX.42.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS54
TCELL24:IMUX.IMUX.43.DELAYGTF_CHANNEL1.TX_GB_SEQ_SYNC_FS
TCELL24:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS62
TCELL24:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS53
TCELL24:IMUX.IMUX.47.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS61
TCELL25:OUT.0.TMINGTF_CHANNEL1.DRPDO_SF4
TCELL25:OUT.1.TMINGTF_CHANNEL1.PINRSRVDAS_SF7
TCELL25:OUT.2.TMINGTF_CHANNEL1.PMASCANOUT_SF4
TCELL25:OUT.3.TMINGTF_CHANNEL1.PINRSRVDAS_SF15
TCELL25:OUT.4.TMINGTF_CHANNEL1.DMONOUT_SF4
TCELL25:OUT.5.TMINGTF_CHANNEL1.DFEDOUT_SF4
TCELL25:OUT.6.TMINGTF_CHANNEL1.DRPDO_SF9
TCELL25:OUT.8.TMINGTF_CHANNEL1.SCANOUT_SF4
TCELL25:OUT.9.TMINGTF_CHANNEL1.GTPOWERGOOD_SF
TCELL25:OUT.10.TMINGTF_CHANNEL1.DMONOUT_SF9
TCELL25:OUT.11.TMINGTF_CHANNEL1.RXPRGDIVRSTDONE_SF
TCELL25:OUT.12.TMINGTF_CHANNEL1.DRPDO_SF14
TCELL25:OUT.13.TMINGTF_CHANNEL1.RESET_EXCEPTION_SF
TCELL25:OUT.14.TMINGTF_CHANNEL1.TXPRGDIVRSTDONE_SF
TCELL25:OUT.15.TMINGTF_CHANNEL1.PINRSRVDAS_SF13
TCELL25:OUT.16.TMINGTF_CHANNEL1.DMONOUT_SF14
TCELL25:OUT.17.TMINGTF_CHANNEL1.PMASCANOUT_SF7
TCELL25:OUT.18.TMINGTF_CHANNEL1.RXLINKSYNCDONE_SF
TCELL25:OUT.19.TMINGTF_CHANNEL1.DMONOUT_SF12
TCELL25:OUT.20.TMINGTF_CHANNEL1.PMASCANOUT_SF10
TCELL25:OUT.21.TMINGTF_CHANNEL1.RXSLIPDONE_SF
TCELL25:OUT.22.TMINGTF_CHANNEL1.PINRSRVDAS_SF3
TCELL25:OUT.23.TMINGTF_CHANNEL1.RXCOPHDONE_SF
TCELL25:OUT.24.TMINGTF_CHANNEL1.DFEDOUT_SF7
TCELL25:OUT.25.TMINGTF_CHANNEL1.CFOKSTART_SF
TCELL25:OUT.26.TMINGTF_CHANNEL1.RXSLIPOUTCLKRDY_SF
TCELL25:OUT.27.TMINGTF_CHANNEL1.RXSYNCEN2SLV_SF
TCELL25:OUT.28.TMINGTF_CHANNEL1.RXSLIPPMARDY_SF
TCELL25:OUT.29.TMINGTF_CHANNEL1.RXPMARESETDONE_SF
TCELL25:OUT.30.TMINGTF_CHANNEL1.PINRSRVDAS_SF14
TCELL25:OUT.31.TMINGTF_CHANNEL1.CFOKFSTARTED_SF
TCELL25:IMUX.CTRL.2GTF_CHANNEL1.PMASCANCLK2_FS
TCELL25:IMUX.CTRL.3GTF_CHANNEL1.PMASCANCLK3_FS
TCELL25:IMUX.CTRL.7GTF_CHANNEL1.GTTXRST_FS
TCELL25:IMUX.IMUX.1.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS50
TCELL25:IMUX.IMUX.2.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS49
TCELL25:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PMASCANIN_FS6
TCELL25:IMUX.IMUX.4.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS46
TCELL25:IMUX.IMUX.5.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS45
TCELL25:IMUX.IMUX.6.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS43
TCELL25:IMUX.IMUX.7.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS42
TCELL25:IMUX.IMUX.8.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS40
TCELL25:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS38
TCELL25:IMUX.IMUX.10.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS37
TCELL25:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXEMPPOS_FS2
TCELL25:IMUX.IMUX.12.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS35
TCELL25:IMUX.IMUX.13.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS33
TCELL25:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS2
TCELL25:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS30
TCELL25:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS29
TCELL25:IMUX.IMUX.17.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS52
TCELL25:IMUX.IMUX.18.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS28
TCELL25:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS51
TCELL25:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXEMPPRE_FS2
TCELL25:IMUX.IMUX.21.DELAYGTF_CHANNEL1.DFE_KH_OVERWREN_FS
TCELL25:IMUX.IMUX.22.DELAYGTF_CHANNEL1.TXDRVAMP_FS0
TCELL25:IMUX.IMUX.23.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS48
TCELL25:IMUX.IMUX.24.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS27
TCELL25:IMUX.IMUX.25.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS47
TCELL25:IMUX.IMUX.26.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS26
TCELL25:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PMASCANIN_FS5
TCELL25:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS25
TCELL25:IMUX.IMUX.29.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS44
TCELL25:IMUX.IMUX.30.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS24
TCELL25:IMUX.IMUX.31.DELAYGTF_CHANNEL1.STEPSIZEPPM_FS2
TCELL25:IMUX.IMUX.32.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS23
TCELL25:IMUX.IMUX.33.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS41
TCELL25:IMUX.IMUX.34.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS22
TCELL25:IMUX.IMUX.35.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS39
TCELL25:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS21
TCELL25:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXSYSCKSEL_FS1
TCELL25:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TXMSTRSETPHDONE_FS
TCELL25:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TXPRBSPTN_FS0
TCELL25:IMUX.IMUX.40.DELAYGTF_CHANNEL1.TXOUTCKCTL_FS0
TCELL25:IMUX.IMUX.41.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS36
TCELL25:IMUX.IMUX.42.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS20
TCELL25:IMUX.IMUX.43.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS34
TCELL25:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS32
TCELL25:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS19
TCELL25:IMUX.IMUX.47.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS31
TCELL26:OUT.0.TMINGTF_CHANNEL1.DRPDO_SF3
TCELL26:OUT.1.TMINGTF_CHANNEL1.PINRSRVDAS_SF6
TCELL26:OUT.2.TMINGTF_CHANNEL1.PMASCANOUT_SF3
TCELL26:OUT.4.TMINGTF_CHANNEL1.DMONOUT_SF3
TCELL26:OUT.5.TMINGTF_CHANNEL1.DFEDOUT_SF3
TCELL26:OUT.6.TMINGTF_CHANNEL1.DRPDO_SF8
TCELL26:OUT.7.TMINGTF_CHANNEL1.RXPHALIGNERR_SF
TCELL26:OUT.8.TMINGTF_CHANNEL1.SCANOUT_SF3
TCELL26:OUT.9.TMINGTF_CHANNEL1.SCANOUT_SF16
TCELL26:OUT.10.TMINGTF_CHANNEL1.DMONOUT_SF8
TCELL26:OUT.11.TMINGTF_CHANNEL1.RXCDRPHDONE_SF
TCELL26:OUT.12.TMINGTF_CHANNEL1.DRPDO_SF13
TCELL26:OUT.13.TMINGTF_CHANNEL1.TXDCCDONE_SF
TCELL26:OUT.14.TMINGTF_CHANNEL1.CKOKDONE_SF
TCELL26:OUT.16.TMINGTF_CHANNEL1.DMONOUT_SF13
TCELL26:OUT.17.TMINGTF_CHANNEL1.PMASCANOUT_SF11
TCELL26:OUT.18.TMINGTF_CHANNEL1.TXRESETDONE_SF
TCELL26:OUT.19.TMINGTF_CHANNEL1.SCANOUT_SF18
TCELL26:OUT.20.TMINGTF_CHANNEL1.TXLINKSYNCDONE_SF
TCELL26:OUT.21.TMINGTF_CHANNEL1.SCANOUT_SF17
TCELL26:OUT.22.TMINGTF_CHANNEL1.PINRSRVDAS_SF2
TCELL26:OUT.23.TMINGTF_CHANNEL1.TDASOFTRSTDONE_SF
TCELL26:OUT.24.TMINGTF_CHANNEL1.DRDY_SF
TCELL26:OUT.25.TMINGTF_CHANNEL1.CFOKDONE_SF
TCELL26:OUT.26.TMINGTF_CHANNEL1.CPLREFLOSS_SF
TCELL26:OUT.27.TMINGTF_CHANNEL1.SCANOUT_SF13
TCELL26:OUT.28.TMINGTF_CHANNEL1.SCANOUT_SF10
TCELL26:OUT.29.TMINGTF_CHANNEL1.TXSYNCEN2SLV_SF
TCELL26:OUT.30.TMINGTF_CHANNEL1.PINRSRVDAS_SF12
TCELL26:OUT.31.TMINGTF_CHANNEL1.CFOKFORCEDONE_SF
TCELL26:IMUX.CTRL.2GTF_CHANNEL1.CPLLDMONCLK_FS
TCELL26:IMUX.CTRL.7GTF_CHANNEL1.CPLRESET_FS
TCELL26:IMUX.IMUX.0.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS17
TCELL26:IMUX.IMUX.1.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS15
TCELL26:IMUX.IMUX.2.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS13
TCELL26:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PMASCANIN_FS4
TCELL26:IMUX.IMUX.4.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS10
TCELL26:IMUX.IMUX.5.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS9
TCELL26:IMUX.IMUX.6.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS7
TCELL26:IMUX.IMUX.7.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS6
TCELL26:IMUX.IMUX.8.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS4
TCELL26:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TXPWRDN_FS1
TCELL26:IMUX.IMUX.10.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS2
TCELL26:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXEMPPOS_FS1
TCELL26:IMUX.IMUX.12.DELAYGTF_CHANNEL1.ENPPM_FS
TCELL26:IMUX.IMUX.13.DELAYGTF_CHANNEL1.TSTIN_FS17
TCELL26:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS1
TCELL26:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TXPIPPMPWDN_FS
TCELL26:IMUX.IMUX.16.DELAYGTF_CHANNEL1.SCANIN_FS8
TCELL26:IMUX.IMUX.17.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS18
TCELL26:IMUX.IMUX.18.DELAYGTF_CHANNEL1.TSTIN_FS13
TCELL26:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS16
TCELL26:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXEMPPRE_FS1
TCELL26:IMUX.IMUX.21.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS14
TCELL26:IMUX.IMUX.22.DELAYGTF_CHANNEL1.CPLLKDETEN_FS
TCELL26:IMUX.IMUX.23.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS12
TCELL26:IMUX.IMUX.24.DELAYGTF_CHANNEL1.SCANIN_FS10
TCELL26:IMUX.IMUX.25.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS11
TCELL26:IMUX.IMUX.26.DELAYGTF_CHANNEL1.TXPPMSEL_FS
TCELL26:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PMASCANIN_FS3
TCELL26:IMUX.IMUX.28.DELAYGTF_CHANNEL1.CPLREFSELDYN_FS0
TCELL26:IMUX.IMUX.29.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS8
TCELL26:IMUX.IMUX.30.DELAYGTF_CHANNEL1.DI_FS10
TCELL26:IMUX.IMUX.31.DELAYGTF_CHANNEL1.STEPSIZEPPM_FS1
TCELL26:IMUX.IMUX.32.DELAYGTF_CHANNEL1.RXTERMINATION_FS
TCELL26:IMUX.IMUX.33.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS5
TCELL26:IMUX.IMUX.34.DELAYGTF_CHANNEL1.CPLREFSELDYN_FS1
TCELL26:IMUX.IMUX.35.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS3
TCELL26:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TSTIN_FS11
TCELL26:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXSYSCKSEL_FS0
TCELL26:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TXSLVSYNCEN_FS
TCELL26:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TCOPIOVREN_FS
TCELL26:IMUX.IMUX.40.DELAYGTF_CHANNEL1.CPLREFSELDYN_FS2
TCELL26:IMUX.IMUX.41.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS1
TCELL26:IMUX.IMUX.42.DELAYGTF_CHANNEL1.DI_FS8
TCELL26:IMUX.IMUX.43.DELAYGTF_CHANNEL1.TX_AXIS_TDATA_FS0
TCELL26:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TXPPMOVRDEN_FS
TCELL26:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TSTIN_FS3
TCELL26:IMUX.IMUX.47.DELAYGTF_CHANNEL1.SCANIN_FS6
TCELL27:OUT.0.TMINGTF_CHANNEL1.DRPDO_SF2
TCELL27:OUT.1.TMINGTF_CHANNEL1.PINRSRVDAS_SF5
TCELL27:OUT.2.TMINGTF_CHANNEL1.PMASCANOUT_SF2
TCELL27:OUT.3.TMINGTF_CHANNEL1.TXCOPIPHDONE_SF
TCELL27:OUT.4.TMINGTF_CHANNEL1.DMONOUT_SF2
TCELL27:OUT.5.TMINGTF_CHANNEL1.DFEDOUT_SF2
TCELL27:OUT.6.TMINGTF_CHANNEL1.DRPDO_SF7
TCELL27:OUT.7.TMINGTF_CHANNEL1.TXPMARESETDONE_SF
TCELL27:OUT.8.TMINGTF_CHANNEL1.SCANOUT_SF2
TCELL27:OUT.9.TMINGTF_CHANNEL1.RXRAWDATA_SF39
TCELL27:OUT.10.TMINGTF_CHANNEL1.RXRAWDATA_SF38
TCELL27:OUT.11.TMINGTF_CHANNEL1.RXRAWDATA_SF37
TCELL27:OUT.12.TMINGTF_CHANNEL1.RXRAWDATA_SF36
TCELL27:OUT.13.TMINGTF_CHANNEL1.RXRAWDATA_SF35
TCELL27:OUT.14.TMINGTF_CHANNEL1.RXRAWDATA_SF34
TCELL27:OUT.15.TMINGTF_CHANNEL1.RXRAWDATA_SF33
TCELL27:OUT.16.TMINGTF_CHANNEL1.RXRAWDATA_SF32
TCELL27:OUT.17.TMINGTF_CHANNEL1.RXRAWDATA_SF31
TCELL27:OUT.18.TMINGTF_CHANNEL1.RXRAWDATA_SF30
TCELL27:OUT.19.TMINGTF_CHANNEL1.RXRAWDATA_SF29
TCELL27:OUT.20.TMINGTF_CHANNEL1.TXOUTCLKPCS_SF
TCELL27:OUT.21.TMINGTF_CHANNEL1.RXRAWDATA_SF28
TCELL27:OUT.22.TMINGTF_CHANNEL1.RXRAWDATA_SF27
TCELL27:OUT.23.TMINGTF_CHANNEL1.RXRAWDATA_SF26
TCELL27:OUT.24.TMINGTF_CHANNEL1.RXRAWDATA_SF25
TCELL27:OUT.25.TMINGTF_CHANNEL1.TXOUTCLK_SF
TCELL27:OUT.26.TMINGTF_CHANNEL1.RXRAWDATA_SF24
TCELL27:OUT.27.TMINGTF_CHANNEL1.RXRAWDATA_SF23
TCELL27:OUT.28.TMINGTF_CHANNEL1.RXRAWDATA_SF22
TCELL27:OUT.29.TMINGTF_CHANNEL1.RXRAWDATA_SF21
TCELL27:OUT.30.TMINGTF_CHANNEL1.RXRAWDATA_SF20
TCELL27:OUT.31.TMINGTF_CHANNEL1.RXRAWDATA_SF19
TCELL27:IMUX.CTRL.1GTF_CHANNEL1.PMASCANCLK5_FS
TCELL27:IMUX.CTRL.2GTF_CHANNEL1.PMASCANCLK4_FS
TCELL27:IMUX.CTRL.7GTF_CHANNEL1.CFGRESET_FS
TCELL27:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PMASCANIN_FS17
TCELL27:IMUX.IMUX.1.DELAYGTF_CHANNEL1.DMONFIFORESET_FS
TCELL27:IMUX.IMUX.2.DELAYGTF_CHANNEL1.DI_FS7
TCELL27:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PMASCANIN_FS2
TCELL27:IMUX.IMUX.4.DELAYGTF_CHANNEL1.DADDR_FS7
TCELL27:IMUX.IMUX.5.DELAYGTF_CHANNEL1.PMASCANIN_FS12
TCELL27:IMUX.IMUX.6.DELAYGTF_CHANNEL1.PMASCANMODEB_FS
TCELL27:IMUX.IMUX.7.DELAYGTF_CHANNEL1.PMASCANRSTEN_FS
TCELL27:IMUX.IMUX.8.DELAYGTF_CHANNEL1.DI_FS5
TCELL27:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TXPWRDN_FS0
TCELL27:IMUX.IMUX.10.DELAYGTF_CHANNEL1.SCANIN_FS4
TCELL27:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXEMPPOS_FS0
TCELL27:IMUX.IMUX.12.DELAYGTF_CHANNEL1.FREQOS_FS
TCELL27:IMUX.IMUX.13.DELAYGTF_CHANNEL1.SCANIN_FS2
TCELL27:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXEMPMAIN_FS0
TCELL27:IMUX.IMUX.15.DELAYGTF_CHANNEL1.INCPCTRL_FS
TCELL27:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TSTIN_FS18
TCELL27:IMUX.IMUX.17.DELAYGTF_CHANNEL1.DADDR_FS8
TCELL27:IMUX.IMUX.18.DELAYGTF_CHANNEL1.SCANIN_FS0
TCELL27:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TSTIN_FS1
TCELL27:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXEMPPRE_FS0
TCELL27:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PMASCANIN_FS16
TCELL27:IMUX.IMUX.22.DELAYGTF_CHANNEL1.CPLPWRDN_FS
TCELL27:IMUX.IMUX.23.DELAYGTF_CHANNEL1.PMASCANIN_FS13
TCELL27:IMUX.IMUX.24.DELAYGTF_CHANNEL1.DADDR_FS4
TCELL27:IMUX.IMUX.25.DELAYGTF_CHANNEL1.PMASCANIN_FS11
TCELL27:IMUX.IMUX.26.DELAYGTF_CHANNEL1.TXDCCSRESET_FS
TCELL27:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PMASCANIN_FS1
TCELL27:IMUX.IMUX.28.DELAYGTF_CHANNEL1.LOOPBACK_FS2
TCELL27:IMUX.IMUX.29.DELAYGTF_CHANNEL1.PMASCANIN_FS10
TCELL27:IMUX.IMUX.30.DELAYGTF_CHANNEL1.GTTXRSTSEL_FS
TCELL27:IMUX.IMUX.31.DELAYGTF_CHANNEL1.STEPSIZEPPM_FS0
TCELL27:IMUX.IMUX.32.DELAYGTF_CHANNEL1.DADDR_FS2
TCELL27:IMUX.IMUX.33.DELAYGTF_CHANNEL1.PMASCANIN_FS8
TCELL27:IMUX.IMUX.34.DELAYGTF_CHANNEL1.LOOPBACK_FS1
TCELL27:IMUX.IMUX.35.DELAYGTF_CHANNEL1.PMASCANIN_FS7
TCELL27:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TSTIN_FS8
TCELL27:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXSERPWRDN_FS
TCELL27:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TXUSRRDY_FS
TCELL27:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TXPOLARITY_FS
TCELL27:IMUX.IMUX.40.DELAYGTF_CHANNEL1.LOOPBACK_FS0
TCELL27:IMUX.IMUX.41.DELAYGTF_CHANNEL1.DADDR_FS5
TCELL27:IMUX.IMUX.42.DELAYGTF_CHANNEL1.DI_FS1
TCELL27:IMUX.IMUX.43.DELAYGTF_CHANNEL1.SCANIN_FS12
TCELL27:IMUX.IMUX.44.DELAYGTF_CHANNEL1.SCANIN_FS13
TCELL27:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TXPRBSINERR_FS
TCELL27:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TSTIN_FS6
TCELL27:IMUX.IMUX.47.DELAYGTF_CHANNEL1.DI_FS4
TCELL28:OUT.0.TMINGTF_CHANNEL1.RXRAWDATA_SF18
TCELL28:OUT.1.TMINGTF_CHANNEL1.RXRAWDATA_SF17
TCELL28:OUT.2.TMINGTF_CHANNEL1.RXRAWDATA_SF16
TCELL28:OUT.3.TMINGTF_CHANNEL1.RXRAWDATA_SF15
TCELL28:OUT.4.TMINGTF_CHANNEL1.RXRAWDATA_SF14
TCELL28:OUT.5.TMINGTF_CHANNEL1.RXRAWDATA_SF13
TCELL28:OUT.6.TMINGTF_CHANNEL1.RXRAWDATA_SF12
TCELL28:OUT.7.TMINGTF_CHANNEL1.RXRAWDATA_SF11
TCELL28:OUT.8.TMINGTF_CHANNEL1.RXRAWDATA_SF10
TCELL28:OUT.9.TMINGTF_CHANNEL1.RXRAWDATA_SF9
TCELL28:OUT.10.TMINGTF_CHANNEL1.RXRAWDATA_SF8
TCELL28:OUT.11.TMINGTF_CHANNEL1.RXRAWDATA_SF7
TCELL28:OUT.12.TMINGTF_CHANNEL1.RXRAWDATA_SF6
TCELL28:OUT.13.TMINGTF_CHANNEL1.RXRAWDATA_SF5
TCELL28:OUT.14.TMINGTF_CHANNEL1.RXRAWDATA_SF4
TCELL28:OUT.15.TMINGTF_CHANNEL1.RXRAWDATA_SF3
TCELL28:OUT.16.TMINGTF_CHANNEL1.RXRAWDATA_SF2
TCELL28:OUT.17.TMINGTF_CHANNEL1.RXRAWDATA_SF1
TCELL28:OUT.20.TMINGTF_CHANNEL1.RXRAWDATA_SF0
TCELL28:OUT.21.TMINGTF_CHANNEL1.CPLFREQLOCK_SF
TCELL28:OUT.22.TMINGTF_CHANNEL1.PINRSRVDAS_SF0
TCELL28:OUT.23.TMINGTF_CHANNEL1.SCANOUT_SF15
TCELL28:OUT.24.TMINGTF_CHANNEL1.DRPDO_SF1
TCELL28:OUT.25.TMINGTF_CHANNEL1.DFEDOUT_SF6
TCELL28:OUT.26.TMINGTF_CHANNEL1.PINRSRVDAS_SF4
TCELL28:OUT.27.TMINGTF_CHANNEL1.SCANOUT_SF12
TCELL28:OUT.28.TMINGTF_CHANNEL1.PMASCANOUT_SF1
TCELL28:OUT.29.TMINGTF_CHANNEL1.SCANOUT_SF9
TCELL28:OUT.30.TMINGTF_CHANNEL1.EYESCANDATAERROR_SF
TCELL28:OUT.31.TMINGTF_CHANNEL1.SCANOUT_SF7
TCELL28:IMUX.CTRL.2GTF_CHANNEL1.COREREFCLK_FS
TCELL28:IMUX.CTRL.4GTF_CHANNEL1.DRST_FS
TCELL28:IMUX.IMUX.0.DELAYGTF_CHANNEL1.PMASCANIN_FS15
TCELL28:IMUX.IMUX.1.DELAYGTF_CHANNEL1.TSTPWRDNOVRDB_FS
TCELL28:IMUX.IMUX.2.DELAYGTF_CHANNEL1.SCANRSTEN_FS
TCELL28:IMUX.IMUX.3.DELAYGTF_CHANNEL1.PMASCANIN_FS0
TCELL28:IMUX.IMUX.4.DELAYGTF_CHANNEL1.SCANENB_FS
TCELL28:IMUX.IMUX.5.DELAYGTF_CHANNEL1.ISCANRESET_FS
TCELL28:IMUX.IMUX.6.DELAYGTF_CHANNEL1.DADDR_FS1
TCELL28:IMUX.IMUX.7.DELAYGTF_CHANNEL1.SCANMODEB_FS
TCELL28:IMUX.IMUX.8.DELAYGTF_CHANNEL1.SCANIN_FS3
TCELL28:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TSTIN_FS19
TCELL28:IMUX.IMUX.11.DELAYGTF_CHANNEL1.TXRAWDATA_FS38
TCELL28:IMUX.IMUX.12.DELAYGTF_CHANNEL1.TSTIN_FS15
TCELL28:IMUX.IMUX.13.DELAYGTF_CHANNEL1.GTRXRSTSEL_FS
TCELL28:IMUX.IMUX.14.DELAYGTF_CHANNEL1.TXRAWDATA_FS33
TCELL28:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TXRAWDATA_FS30
TCELL28:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TSTPWRDN_FS4
TCELL28:IMUX.IMUX.17.DELAYGTF_CHANNEL1.DI_FS15
TCELL28:IMUX.IMUX.19.DELAYGTF_CHANNEL1.DFE_KH_EXTHOLD_FS
TCELL28:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TSTIN_FS9
TCELL28:IMUX.IMUX.21.DELAYGTF_CHANNEL1.PMASCANIN_FS14
TCELL28:IMUX.IMUX.22.DELAYGTF_CHANNEL1.TSTPWRDN_FS3
TCELL28:IMUX.IMUX.23.DELAYGTF_CHANNEL1.DI_FS14
TCELL28:IMUX.IMUX.24.DELAYGTF_CHANNEL1.DI_FS9
TCELL28:IMUX.IMUX.25.DELAYGTF_CHANNEL1.SCANRSTB_FS
TCELL28:IMUX.IMUX.26.DELAYGTF_CHANNEL1.TSTIN_FS7
TCELL28:IMUX.IMUX.27.DELAYGTF_CHANNEL1.PMASCANENB_FS
TCELL28:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TSTPWRDN_FS2
TCELL28:IMUX.IMUX.29.DELAYGTF_CHANNEL1.DI_FS13
TCELL28:IMUX.IMUX.30.DELAYGTF_CHANNEL1.DADDR_FS9
TCELL28:IMUX.IMUX.31.DELAYGTF_CHANNEL1.SCANIN_FS5
TCELL28:IMUX.IMUX.32.DELAYGTF_CHANNEL1.TSTIN_FS5
TCELL28:IMUX.IMUX.33.DELAYGTF_CHANNEL1.TSTIN_FS4
TCELL28:IMUX.IMUX.34.DELAYGTF_CHANNEL1.TSTPWRDN_FS1
TCELL28:IMUX.IMUX.35.DELAYGTF_CHANNEL1.DI_FS12
TCELL28:IMUX.IMUX.36.DELAYGTF_CHANNEL1.TXRAWDATA_FS39
TCELL28:IMUX.IMUX.37.DELAYGTF_CHANNEL1.SCANIN_FS1
TCELL28:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TXRAWDATA_FS36
TCELL28:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TXRAWDATA_FS37
TCELL28:IMUX.IMUX.40.DELAYGTF_CHANNEL1.TSTPWRDN_FS0
TCELL28:IMUX.IMUX.41.DELAYGTF_CHANNEL1.DI_FS11
TCELL28:IMUX.IMUX.42.DELAYGTF_CHANNEL1.TXRAWDATA_FS34
TCELL28:IMUX.IMUX.43.DELAYGTF_CHANNEL1.TXRAWDATA_FS35
TCELL28:IMUX.IMUX.44.DELAYGTF_CHANNEL1.TXRAWDATA_FS31
TCELL28:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TXRAWDATA_FS32
TCELL28:IMUX.IMUX.46.DELAYGTF_CHANNEL1.TXRAWDATA_FS28
TCELL28:IMUX.IMUX.47.DELAYGTF_CHANNEL1.TXRAWDATA_FS29
TCELL29:OUT.0.TMINGTF_CHANNEL1.DRPDO_SF0
TCELL29:OUT.1.TMINGTF_CHANNEL1.DMONOUT_SF1
TCELL29:OUT.2.TMINGTF_CHANNEL1.PMASCANOUT_SF0
TCELL29:OUT.3.TMINGTF_CHANNEL1.MGTREFCLKFA_SF
TCELL29:OUT.4.TMINGTF_CHANNEL1.DMONOUT_SF0
TCELL29:OUT.5.TMINGTF_CHANNEL1.DFEDOUT_SF0
TCELL29:OUT.6.TMINGTF_CHANNEL1.DRPDO_SF5
TCELL29:OUT.7.TMINGTF_CHANNEL1.DFEDOUT_SF1
TCELL29:OUT.8.TMINGTF_CHANNEL1.SCANOUT_SF0
TCELL29:OUT.9.TMINGTF_CHANNEL1.PINRSRVDAS_SF8
TCELL29:OUT.10.TMINGTF_CHANNEL1.DMONOUT_SF5
TCELL29:OUT.11.TMINGTF_CHANNEL1.DRPDO_SF6
TCELL29:OUT.12.TMINGTF_CHANNEL1.DRPDO_SF10
TCELL29:OUT.13.TMINGTF_CHANNEL1.SCANOUT_SF1
TCELL29:OUT.14.TMINGTF_CHANNEL1.PMASCANOUT_SF5
TCELL29:OUT.15.TMINGTF_CHANNEL1.PINRSRVDAS_SF10
TCELL29:OUT.16.TMINGTF_CHANNEL1.DMONOUT_SF10
TCELL29:OUT.17.TMINGTF_CHANNEL1.PMASCANOUT_SF8
TCELL29:OUT.18.TMINGTF_CHANNEL1.DRPDO_SF15
TCELL29:OUT.19.TMINGTF_CHANNEL1.DMONOUT_SF6
TCELL29:OUT.20.TMINGTF_CHANNEL1.SCANOUT_SF5
TCELL29:OUT.21.TMINGTF_CHANNEL1.DRPDO_SF11
TCELL29:OUT.22.TMINGTF_CHANNEL1.DMONOUT_SF15
TCELL29:OUT.23.TMINGTF_CHANNEL1.SCANOUT_SF14
TCELL29:OUT.24.TMINGTF_CHANNEL1.PMASCANOUT_SF6
TCELL29:OUT.25.TMINGTF_CHANNEL1.DFEDOUT_SF5
TCELL29:OUT.26.TMINGTF_CHANNEL1.PINRSRVDAS_SF9
TCELL29:OUT.27.TMINGTF_CHANNEL1.SCANOUT_SF11
TCELL29:OUT.28.TMINGTF_CHANNEL1.DMONOUT_SF11
TCELL29:OUT.29.TMINGTF_CHANNEL1.SCANOUT_SF8
TCELL29:OUT.30.TMINGTF_CHANNEL1.PMASCANOUT_SF9
TCELL29:OUT.31.TMINGTF_CHANNEL1.SCANOUT_SF6
TCELL29:IMUX.CTRL.2GTF_CHANNEL1.DMONCLK_FS
TCELL29:IMUX.CTRL.3GTF_CHANNEL1.DCLK_FS
TCELL29:IMUX.IMUX.0.DELAYGTF_CHANNEL1.TXRAWDATA_FS27
TCELL29:IMUX.IMUX.1.DELAYGTF_CHANNEL1.TXRAWDATA_FS24
TCELL29:IMUX.IMUX.2.DELAYGTF_CHANNEL1.TXRAWDATA_FS21
TCELL29:IMUX.IMUX.3.DELAYGTF_CHANNEL1.TXRAWDATA_FS18
TCELL29:IMUX.IMUX.4.DELAYGTF_CHANNEL1.DADDR_FS6
TCELL29:IMUX.IMUX.5.DELAYGTF_CHANNEL1.TXRAWDATA_FS16
TCELL29:IMUX.IMUX.6.DELAYGTF_CHANNEL1.TXRAWDATA_FS13
TCELL29:IMUX.IMUX.7.DELAYGTF_CHANNEL1.TXRAWDATA_FS10
TCELL29:IMUX.IMUX.8.DELAYGTF_CHANNEL1.TXRAWDATA_FS7
TCELL29:IMUX.IMUX.9.DELAYGTF_CHANNEL1.TXRAWDATA_FS4
TCELL29:IMUX.IMUX.10.DELAYGTF_CHANNEL1.TXRAWDATA_FS1
TCELL29:IMUX.IMUX.11.DELAYGTF_CHANNEL1.SCANIN_FS7
TCELL29:IMUX.IMUX.12.DELAYGTF_CHANNEL1.TSTIN_FS14
TCELL29:IMUX.IMUX.13.DELAYGTF_CHANNEL1.DADDR_FS3
TCELL29:IMUX.IMUX.14.DELAYGTF_CHANNEL1.SCANIN_FS11
TCELL29:IMUX.IMUX.15.DELAYGTF_CHANNEL1.TSTIN_FS10
TCELL29:IMUX.IMUX.16.DELAYGTF_CHANNEL1.TXRAWDATA_FS25
TCELL29:IMUX.IMUX.17.DELAYGTF_CHANNEL1.TXRAWDATA_FS26
TCELL29:IMUX.IMUX.18.DELAYGTF_CHANNEL1.TXRAWDATA_FS22
TCELL29:IMUX.IMUX.19.DELAYGTF_CHANNEL1.TXRAWDATA_FS23
TCELL29:IMUX.IMUX.20.DELAYGTF_CHANNEL1.TXRAWDATA_FS19
TCELL29:IMUX.IMUX.21.DELAYGTF_CHANNEL1.TXRAWDATA_FS20
TCELL29:IMUX.IMUX.22.DELAYGTF_CHANNEL1.EYESCANTRIGGER_FS
TCELL29:IMUX.IMUX.23.DELAYGTF_CHANNEL1.DI_FS6
TCELL29:IMUX.IMUX.24.DELAYGTF_CHANNEL1.TXRAWDATA_FS17
TCELL29:IMUX.IMUX.25.DELAYGTF_CHANNEL1.PMASCANIN_FS9
TCELL29:IMUX.IMUX.26.DELAYGTF_CHANNEL1.TXRAWDATA_FS14
TCELL29:IMUX.IMUX.27.DELAYGTF_CHANNEL1.TXRAWDATA_FS15
TCELL29:IMUX.IMUX.28.DELAYGTF_CHANNEL1.TXRAWDATA_FS11
TCELL29:IMUX.IMUX.29.DELAYGTF_CHANNEL1.TXRAWDATA_FS12
TCELL29:IMUX.IMUX.30.DELAYGTF_CHANNEL1.TXRAWDATA_FS8
TCELL29:IMUX.IMUX.31.DELAYGTF_CHANNEL1.TXRAWDATA_FS9
TCELL29:IMUX.IMUX.32.DELAYGTF_CHANNEL1.TXRAWDATA_FS5
TCELL29:IMUX.IMUX.33.DELAYGTF_CHANNEL1.TXRAWDATA_FS6
TCELL29:IMUX.IMUX.34.DELAYGTF_CHANNEL1.TXRAWDATA_FS2
TCELL29:IMUX.IMUX.35.DELAYGTF_CHANNEL1.TXRAWDATA_FS3
TCELL29:IMUX.IMUX.36.DELAYGTF_CHANNEL1.DI_FS0
TCELL29:IMUX.IMUX.37.DELAYGTF_CHANNEL1.TXRAWDATA_FS0
TCELL29:IMUX.IMUX.38.DELAYGTF_CHANNEL1.TSTIN_FS2
TCELL29:IMUX.IMUX.39.DELAYGTF_CHANNEL1.TSTIN_FS16
TCELL29:IMUX.IMUX.40.DELAYGTF_CHANNEL1.DWE_FS
TCELL29:IMUX.IMUX.41.DELAYGTF_CHANNEL1.DI_FS3
TCELL29:IMUX.IMUX.42.DELAYGTF_CHANNEL1.DADDR_FS0
TCELL29:IMUX.IMUX.43.DELAYGTF_CHANNEL1.SCANIN_FS9
TCELL29:IMUX.IMUX.44.DELAYGTF_CHANNEL1.TSTIN_FS0
TCELL29:IMUX.IMUX.45.DELAYGTF_CHANNEL1.TSTIN_FS12
TCELL29:IMUX.IMUX.46.DELAYGTF_CHANNEL1.DEN_FS
TCELL29:IMUX.IMUX.47.DELAYGTF_CHANNEL1.DI_FS2
TCELL30:OUT.0.TMINGTF_CHANNEL2.SCANOUT_SF6
TCELL30:OUT.1.TMINGTF_CHANNEL2.PMASCANOUT_SF9
TCELL30:OUT.2.TMINGTF_CHANNEL2.SCANOUT_SF8
TCELL30:OUT.3.TMINGTF_CHANNEL2.DMONOUT_SF11
TCELL30:OUT.4.TMINGTF_CHANNEL2.SCANOUT_SF11
TCELL30:OUT.5.TMINGTF_CHANNEL2.PINRSRVDAS_SF9
TCELL30:OUT.6.TMINGTF_CHANNEL2.DFEDOUT_SF5
TCELL30:OUT.7.TMINGTF_CHANNEL2.PMASCANOUT_SF6
TCELL30:OUT.8.TMINGTF_CHANNEL2.SCANOUT_SF14
TCELL30:OUT.9.TMINGTF_CHANNEL2.DMONOUT_SF15
TCELL30:OUT.10.TMINGTF_CHANNEL2.DRPDO_SF11
TCELL30:OUT.11.TMINGTF_CHANNEL2.SCANOUT_SF5
TCELL30:OUT.12.TMINGTF_CHANNEL2.DMONOUT_SF6
TCELL30:OUT.13.TMINGTF_CHANNEL2.DRPDO_SF15
TCELL30:OUT.14.TMINGTF_CHANNEL2.PMASCANOUT_SF8
TCELL30:OUT.15.TMINGTF_CHANNEL2.DMONOUT_SF10
TCELL30:OUT.16.TMINGTF_CHANNEL2.PINRSRVDAS_SF10
TCELL30:OUT.17.TMINGTF_CHANNEL2.PMASCANOUT_SF5
TCELL30:OUT.18.TMINGTF_CHANNEL2.SCANOUT_SF1
TCELL30:OUT.19.TMINGTF_CHANNEL2.DRPDO_SF10
TCELL30:OUT.20.TMINGTF_CHANNEL2.DRPDO_SF6
TCELL30:OUT.21.TMINGTF_CHANNEL2.DMONOUT_SF5
TCELL30:OUT.22.TMINGTF_CHANNEL2.PINRSRVDAS_SF8
TCELL30:OUT.23.TMINGTF_CHANNEL2.SCANOUT_SF0
TCELL30:OUT.24.TMINGTF_CHANNEL2.DFEDOUT_SF1
TCELL30:OUT.25.TMINGTF_CHANNEL2.DRPDO_SF5
TCELL30:OUT.26.TMINGTF_CHANNEL2.DFEDOUT_SF0
TCELL30:OUT.27.TMINGTF_CHANNEL2.DMONOUT_SF0
TCELL30:OUT.28.TMINGTF_CHANNEL2.MGTREFCLKFA_SF
TCELL30:OUT.29.TMINGTF_CHANNEL2.PMASCANOUT_SF0
TCELL30:OUT.30.TMINGTF_CHANNEL2.DMONOUT_SF1
TCELL30:OUT.31.TMINGTF_CHANNEL2.DRPDO_SF0
TCELL30:IMUX.CTRL.4GTF_CHANNEL2.DCLK_FS
TCELL30:IMUX.CTRL.5GTF_CHANNEL2.DMONCLK_FS
TCELL30:IMUX.IMUX.0.DELAYGTF_CHANNEL2.DEN_FS
TCELL30:IMUX.IMUX.1.DELAYGTF_CHANNEL2.TSTIN_FS0
TCELL30:IMUX.IMUX.2.DELAYGTF_CHANNEL2.DADDR_FS0
TCELL30:IMUX.IMUX.3.DELAYGTF_CHANNEL2.DWE_FS
TCELL30:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TSTIN_FS2
TCELL30:IMUX.IMUX.5.DELAYGTF_CHANNEL2.DI_FS0
TCELL30:IMUX.IMUX.6.DELAYGTF_CHANNEL2.TXRAWDATA_FS2
TCELL30:IMUX.IMUX.7.DELAYGTF_CHANNEL2.TXRAWDATA_FS5
TCELL30:IMUX.IMUX.8.DELAYGTF_CHANNEL2.TXRAWDATA_FS8
TCELL30:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TXRAWDATA_FS11
TCELL30:IMUX.IMUX.10.DELAYGTF_CHANNEL2.TXRAWDATA_FS14
TCELL30:IMUX.IMUX.11.DELAYGTF_CHANNEL2.TXRAWDATA_FS17
TCELL30:IMUX.IMUX.12.DELAYGTF_CHANNEL2.EYESCANTRIGGER_FS
TCELL30:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXRAWDATA_FS19
TCELL30:IMUX.IMUX.14.DELAYGTF_CHANNEL2.TXRAWDATA_FS22
TCELL30:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TXRAWDATA_FS25
TCELL30:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TSTIN_FS10
TCELL30:IMUX.IMUX.17.DELAYGTF_CHANNEL2.DI_FS2
TCELL30:IMUX.IMUX.18.DELAYGTF_CHANNEL2.SCANIN_FS11
TCELL30:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TSTIN_FS12
TCELL30:IMUX.IMUX.20.DELAYGTF_CHANNEL2.DADDR_FS3
TCELL30:IMUX.IMUX.21.DELAYGTF_CHANNEL2.SCANIN_FS9
TCELL30:IMUX.IMUX.22.DELAYGTF_CHANNEL2.TSTIN_FS14
TCELL30:IMUX.IMUX.23.DELAYGTF_CHANNEL2.DI_FS3
TCELL30:IMUX.IMUX.24.DELAYGTF_CHANNEL2.SCANIN_FS7
TCELL30:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TSTIN_FS16
TCELL30:IMUX.IMUX.26.DELAYGTF_CHANNEL2.TXRAWDATA_FS1
TCELL30:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXRAWDATA_FS0
TCELL30:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TXRAWDATA_FS4
TCELL30:IMUX.IMUX.29.DELAYGTF_CHANNEL2.TXRAWDATA_FS3
TCELL30:IMUX.IMUX.30.DELAYGTF_CHANNEL2.TXRAWDATA_FS7
TCELL30:IMUX.IMUX.31.DELAYGTF_CHANNEL2.TXRAWDATA_FS6
TCELL30:IMUX.IMUX.32.DELAYGTF_CHANNEL2.TXRAWDATA_FS10
TCELL30:IMUX.IMUX.33.DELAYGTF_CHANNEL2.TXRAWDATA_FS9
TCELL30:IMUX.IMUX.34.DELAYGTF_CHANNEL2.TXRAWDATA_FS13
TCELL30:IMUX.IMUX.35.DELAYGTF_CHANNEL2.TXRAWDATA_FS12
TCELL30:IMUX.IMUX.36.DELAYGTF_CHANNEL2.TXRAWDATA_FS16
TCELL30:IMUX.IMUX.37.DELAYGTF_CHANNEL2.TXRAWDATA_FS15
TCELL30:IMUX.IMUX.38.DELAYGTF_CHANNEL2.DADDR_FS6
TCELL30:IMUX.IMUX.39.DELAYGTF_CHANNEL2.PMASCANIN_FS9
TCELL30:IMUX.IMUX.40.DELAYGTF_CHANNEL2.TXRAWDATA_FS18
TCELL30:IMUX.IMUX.41.DELAYGTF_CHANNEL2.DI_FS6
TCELL30:IMUX.IMUX.42.DELAYGTF_CHANNEL2.TXRAWDATA_FS21
TCELL30:IMUX.IMUX.43.DELAYGTF_CHANNEL2.TXRAWDATA_FS20
TCELL30:IMUX.IMUX.44.DELAYGTF_CHANNEL2.TXRAWDATA_FS24
TCELL30:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TXRAWDATA_FS23
TCELL30:IMUX.IMUX.46.DELAYGTF_CHANNEL2.TXRAWDATA_FS27
TCELL30:IMUX.IMUX.47.DELAYGTF_CHANNEL2.TXRAWDATA_FS26
TCELL30:RCLK.IMUX.17BUFG_GT_SYNC14.CLK_IN
TCELL31:OUT.0.TMINGTF_CHANNEL2.SCANOUT_SF7
TCELL31:OUT.1.TMINGTF_CHANNEL2.EYESCANDATAERROR_SF
TCELL31:OUT.2.TMINGTF_CHANNEL2.SCANOUT_SF9
TCELL31:OUT.3.TMINGTF_CHANNEL2.PMASCANOUT_SF1
TCELL31:OUT.4.TMINGTF_CHANNEL2.SCANOUT_SF12
TCELL31:OUT.5.TMINGTF_CHANNEL2.PINRSRVDAS_SF4
TCELL31:OUT.6.TMINGTF_CHANNEL2.DFEDOUT_SF6
TCELL31:OUT.7.TMINGTF_CHANNEL2.DRPDO_SF1
TCELL31:OUT.8.TMINGTF_CHANNEL2.SCANOUT_SF15
TCELL31:OUT.9.TMINGTF_CHANNEL2.PINRSRVDAS_SF0
TCELL31:OUT.10.TMINGTF_CHANNEL2.CPLFREQLOCK_SF
TCELL31:OUT.11.TMINGTF_CHANNEL2.RXRAWDATA_SF0
TCELL31:OUT.14.TMINGTF_CHANNEL2.RXRAWDATA_SF1
TCELL31:OUT.15.TMINGTF_CHANNEL2.RXRAWDATA_SF2
TCELL31:OUT.16.TMINGTF_CHANNEL2.RXRAWDATA_SF3
TCELL31:OUT.17.TMINGTF_CHANNEL2.RXRAWDATA_SF4
TCELL31:OUT.18.TMINGTF_CHANNEL2.RXRAWDATA_SF5
TCELL31:OUT.19.TMINGTF_CHANNEL2.RXRAWDATA_SF6
TCELL31:OUT.20.TMINGTF_CHANNEL2.RXRAWDATA_SF7
TCELL31:OUT.21.TMINGTF_CHANNEL2.RXRAWDATA_SF8
TCELL31:OUT.22.TMINGTF_CHANNEL2.RXRAWDATA_SF9
TCELL31:OUT.23.TMINGTF_CHANNEL2.RXRAWDATA_SF10
TCELL31:OUT.24.TMINGTF_CHANNEL2.RXRAWDATA_SF11
TCELL31:OUT.25.TMINGTF_CHANNEL2.RXRAWDATA_SF12
TCELL31:OUT.26.TMINGTF_CHANNEL2.RXRAWDATA_SF13
TCELL31:OUT.27.TMINGTF_CHANNEL2.RXRAWDATA_SF14
TCELL31:OUT.28.TMINGTF_CHANNEL2.RXRAWDATA_SF15
TCELL31:OUT.29.TMINGTF_CHANNEL2.RXRAWDATA_SF16
TCELL31:OUT.30.TMINGTF_CHANNEL2.RXRAWDATA_SF17
TCELL31:OUT.31.TMINGTF_CHANNEL2.RXRAWDATA_SF18
TCELL31:IMUX.CTRL.3GTF_CHANNEL2.DRST_FS
TCELL31:IMUX.CTRL.5GTF_CHANNEL2.COREREFCLK_FS
TCELL31:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TXRAWDATA_FS28
TCELL31:IMUX.IMUX.1.DELAYGTF_CHANNEL2.TXRAWDATA_FS31
TCELL31:IMUX.IMUX.2.DELAYGTF_CHANNEL2.TXRAWDATA_FS34
TCELL31:IMUX.IMUX.3.DELAYGTF_CHANNEL2.TSTPWRDN_FS0
TCELL31:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TXRAWDATA_FS36
TCELL31:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TXRAWDATA_FS39
TCELL31:IMUX.IMUX.6.DELAYGTF_CHANNEL2.TSTPWRDN_FS1
TCELL31:IMUX.IMUX.7.DELAYGTF_CHANNEL2.TSTIN_FS5
TCELL31:IMUX.IMUX.8.DELAYGTF_CHANNEL2.DADDR_FS9
TCELL31:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TSTPWRDN_FS2
TCELL31:IMUX.IMUX.10.DELAYGTF_CHANNEL2.TSTIN_FS7
TCELL31:IMUX.IMUX.11.DELAYGTF_CHANNEL2.DI_FS9
TCELL31:IMUX.IMUX.12.DELAYGTF_CHANNEL2.TSTPWRDN_FS3
TCELL31:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TSTIN_FS9
TCELL31:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TSTPWRDN_FS4
TCELL31:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TXRAWDATA_FS30
TCELL31:IMUX.IMUX.17.DELAYGTF_CHANNEL2.TXRAWDATA_FS29
TCELL31:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXRAWDATA_FS33
TCELL31:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TXRAWDATA_FS32
TCELL31:IMUX.IMUX.20.DELAYGTF_CHANNEL2.GTRXRSTSEL_FS
TCELL31:IMUX.IMUX.21.DELAYGTF_CHANNEL2.TXRAWDATA_FS35
TCELL31:IMUX.IMUX.22.DELAYGTF_CHANNEL2.TSTIN_FS15
TCELL31:IMUX.IMUX.23.DELAYGTF_CHANNEL2.DI_FS11
TCELL31:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXRAWDATA_FS38
TCELL31:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TXRAWDATA_FS37
TCELL31:IMUX.IMUX.27.DELAYGTF_CHANNEL2.SCANIN_FS1
TCELL31:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TSTIN_FS19
TCELL31:IMUX.IMUX.29.DELAYGTF_CHANNEL2.DI_FS12
TCELL31:IMUX.IMUX.30.DELAYGTF_CHANNEL2.SCANIN_FS3
TCELL31:IMUX.IMUX.31.DELAYGTF_CHANNEL2.TSTIN_FS4
TCELL31:IMUX.IMUX.32.DELAYGTF_CHANNEL2.SCANMODEB_FS
TCELL31:IMUX.IMUX.33.DELAYGTF_CHANNEL2.SCANIN_FS5
TCELL31:IMUX.IMUX.34.DELAYGTF_CHANNEL2.DADDR_FS1
TCELL31:IMUX.IMUX.35.DELAYGTF_CHANNEL2.DI_FS13
TCELL31:IMUX.IMUX.36.DELAYGTF_CHANNEL2.ISCANRESET_FS
TCELL31:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PMASCANENB_FS
TCELL31:IMUX.IMUX.38.DELAYGTF_CHANNEL2.SCANENB_FS
TCELL31:IMUX.IMUX.39.DELAYGTF_CHANNEL2.SCANRSTB_FS
TCELL31:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PMASCANIN_FS0
TCELL31:IMUX.IMUX.41.DELAYGTF_CHANNEL2.DI_FS14
TCELL31:IMUX.IMUX.42.DELAYGTF_CHANNEL2.SCANRSTEN_FS
TCELL31:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PMASCANIN_FS14
TCELL31:IMUX.IMUX.44.DELAYGTF_CHANNEL2.TSTPWRDNOVRDB_FS
TCELL31:IMUX.IMUX.45.DELAYGTF_CHANNEL2.DFE_KH_EXTHOLD_FS
TCELL31:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PMASCANIN_FS15
TCELL31:IMUX.IMUX.47.DELAYGTF_CHANNEL2.DI_FS15
TCELL32:OUT.0.TMINGTF_CHANNEL2.RXRAWDATA_SF19
TCELL32:OUT.1.TMINGTF_CHANNEL2.RXRAWDATA_SF20
TCELL32:OUT.2.TMINGTF_CHANNEL2.RXRAWDATA_SF21
TCELL32:OUT.3.TMINGTF_CHANNEL2.RXRAWDATA_SF22
TCELL32:OUT.4.TMINGTF_CHANNEL2.RXRAWDATA_SF23
TCELL32:OUT.5.TMINGTF_CHANNEL2.RXRAWDATA_SF24
TCELL32:OUT.6.TMINGTF_CHANNEL2.TXOUTCLK_SF
TCELL32:OUT.7.TMINGTF_CHANNEL2.RXRAWDATA_SF25
TCELL32:OUT.8.TMINGTF_CHANNEL2.RXRAWDATA_SF26
TCELL32:OUT.9.TMINGTF_CHANNEL2.RXRAWDATA_SF27
TCELL32:OUT.10.TMINGTF_CHANNEL2.RXRAWDATA_SF28
TCELL32:OUT.11.TMINGTF_CHANNEL2.TXOUTCLKPCS_SF
TCELL32:OUT.12.TMINGTF_CHANNEL2.RXRAWDATA_SF29
TCELL32:OUT.13.TMINGTF_CHANNEL2.RXRAWDATA_SF30
TCELL32:OUT.14.TMINGTF_CHANNEL2.RXRAWDATA_SF31
TCELL32:OUT.15.TMINGTF_CHANNEL2.RXRAWDATA_SF32
TCELL32:OUT.16.TMINGTF_CHANNEL2.RXRAWDATA_SF33
TCELL32:OUT.17.TMINGTF_CHANNEL2.RXRAWDATA_SF34
TCELL32:OUT.18.TMINGTF_CHANNEL2.RXRAWDATA_SF35
TCELL32:OUT.19.TMINGTF_CHANNEL2.RXRAWDATA_SF36
TCELL32:OUT.20.TMINGTF_CHANNEL2.RXRAWDATA_SF37
TCELL32:OUT.21.TMINGTF_CHANNEL2.RXRAWDATA_SF38
TCELL32:OUT.22.TMINGTF_CHANNEL2.RXRAWDATA_SF39
TCELL32:OUT.23.TMINGTF_CHANNEL2.SCANOUT_SF2
TCELL32:OUT.24.TMINGTF_CHANNEL2.TXPMARESETDONE_SF
TCELL32:OUT.25.TMINGTF_CHANNEL2.DRPDO_SF7
TCELL32:OUT.26.TMINGTF_CHANNEL2.DFEDOUT_SF2
TCELL32:OUT.27.TMINGTF_CHANNEL2.DMONOUT_SF2
TCELL32:OUT.28.TMINGTF_CHANNEL2.TXCOPIPHDONE_SF
TCELL32:OUT.29.TMINGTF_CHANNEL2.PMASCANOUT_SF2
TCELL32:OUT.30.TMINGTF_CHANNEL2.PINRSRVDAS_SF5
TCELL32:OUT.31.TMINGTF_CHANNEL2.DRPDO_SF2
TCELL32:IMUX.CTRL.0GTF_CHANNEL2.CFGRESET_FS
TCELL32:IMUX.CTRL.5GTF_CHANNEL2.PMASCANCLK4_FS
TCELL32:IMUX.CTRL.6GTF_CHANNEL2.PMASCANCLK5_FS
TCELL32:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TSTIN_FS6
TCELL32:IMUX.IMUX.1.DELAYGTF_CHANNEL2.SCANIN_FS13
TCELL32:IMUX.IMUX.2.DELAYGTF_CHANNEL2.DI_FS1
TCELL32:IMUX.IMUX.3.DELAYGTF_CHANNEL2.LOOPBACK_FS0
TCELL32:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TXUSRRDY_FS
TCELL32:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TSTIN_FS8
TCELL32:IMUX.IMUX.6.DELAYGTF_CHANNEL2.LOOPBACK_FS1
TCELL32:IMUX.IMUX.7.DELAYGTF_CHANNEL2.DADDR_FS2
TCELL32:IMUX.IMUX.8.DELAYGTF_CHANNEL2.GTTXRSTSEL_FS
TCELL32:IMUX.IMUX.9.DELAYGTF_CHANNEL2.LOOPBACK_FS2
TCELL32:IMUX.IMUX.10.DELAYGTF_CHANNEL2.TXDCCSRESET_FS
TCELL32:IMUX.IMUX.11.DELAYGTF_CHANNEL2.DADDR_FS4
TCELL32:IMUX.IMUX.12.DELAYGTF_CHANNEL2.CPLPWRDN_FS
TCELL32:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXEMPPRE_FS0
TCELL32:IMUX.IMUX.14.DELAYGTF_CHANNEL2.SCANIN_FS0
TCELL32:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TSTIN_FS18
TCELL32:IMUX.IMUX.16.DELAYGTF_CHANNEL2.INCPCTRL_FS
TCELL32:IMUX.IMUX.17.DELAYGTF_CHANNEL2.DI_FS4
TCELL32:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS0
TCELL32:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TXPRBSINERR_FS
TCELL32:IMUX.IMUX.20.DELAYGTF_CHANNEL2.SCANIN_FS2
TCELL32:IMUX.IMUX.21.DELAYGTF_CHANNEL2.SCANIN_FS12
TCELL32:IMUX.IMUX.22.DELAYGTF_CHANNEL2.FREQOS_FS
TCELL32:IMUX.IMUX.23.DELAYGTF_CHANNEL2.DADDR_FS5
TCELL32:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXEMPPOS_FS0
TCELL32:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TXPOLARITY_FS
TCELL32:IMUX.IMUX.26.DELAYGTF_CHANNEL2.SCANIN_FS4
TCELL32:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXSERPWRDN_FS
TCELL32:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TXPWRDN_FS0
TCELL32:IMUX.IMUX.29.DELAYGTF_CHANNEL2.PMASCANIN_FS7
TCELL32:IMUX.IMUX.30.DELAYGTF_CHANNEL2.DI_FS5
TCELL32:IMUX.IMUX.31.DELAYGTF_CHANNEL2.PMASCANIN_FS8
TCELL32:IMUX.IMUX.32.DELAYGTF_CHANNEL2.PMASCANRSTEN_FS
TCELL32:IMUX.IMUX.33.DELAYGTF_CHANNEL2.STEPSIZEPPM_FS0
TCELL32:IMUX.IMUX.34.DELAYGTF_CHANNEL2.PMASCANMODEB_FS
TCELL32:IMUX.IMUX.35.DELAYGTF_CHANNEL2.PMASCANIN_FS10
TCELL32:IMUX.IMUX.36.DELAYGTF_CHANNEL2.PMASCANIN_FS12
TCELL32:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PMASCANIN_FS1
TCELL32:IMUX.IMUX.38.DELAYGTF_CHANNEL2.DADDR_FS7
TCELL32:IMUX.IMUX.39.DELAYGTF_CHANNEL2.PMASCANIN_FS11
TCELL32:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PMASCANIN_FS2
TCELL32:IMUX.IMUX.41.DELAYGTF_CHANNEL2.PMASCANIN_FS13
TCELL32:IMUX.IMUX.42.DELAYGTF_CHANNEL2.DI_FS7
TCELL32:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PMASCANIN_FS16
TCELL32:IMUX.IMUX.44.DELAYGTF_CHANNEL2.DMONFIFORESET_FS
TCELL32:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TSTIN_FS1
TCELL32:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PMASCANIN_FS17
TCELL32:IMUX.IMUX.47.DELAYGTF_CHANNEL2.DADDR_FS8
TCELL33:OUT.0.TMINGTF_CHANNEL2.CFOKFORCEDONE_SF
TCELL33:OUT.1.TMINGTF_CHANNEL2.PINRSRVDAS_SF12
TCELL33:OUT.2.TMINGTF_CHANNEL2.TXSYNCEN2SLV_SF
TCELL33:OUT.3.TMINGTF_CHANNEL2.SCANOUT_SF10
TCELL33:OUT.4.TMINGTF_CHANNEL2.SCANOUT_SF13
TCELL33:OUT.5.TMINGTF_CHANNEL2.CPLREFLOSS_SF
TCELL33:OUT.6.TMINGTF_CHANNEL2.CFOKDONE_SF
TCELL33:OUT.7.TMINGTF_CHANNEL2.DRDY_SF
TCELL33:OUT.8.TMINGTF_CHANNEL2.TDASOFTRSTDONE_SF
TCELL33:OUT.9.TMINGTF_CHANNEL2.PINRSRVDAS_SF2
TCELL33:OUT.10.TMINGTF_CHANNEL2.SCANOUT_SF17
TCELL33:OUT.11.TMINGTF_CHANNEL2.TXLINKSYNCDONE_SF
TCELL33:OUT.12.TMINGTF_CHANNEL2.SCANOUT_SF18
TCELL33:OUT.13.TMINGTF_CHANNEL2.TXRESETDONE_SF
TCELL33:OUT.14.TMINGTF_CHANNEL2.PMASCANOUT_SF11
TCELL33:OUT.15.TMINGTF_CHANNEL2.DMONOUT_SF13
TCELL33:OUT.17.TMINGTF_CHANNEL2.CKOKDONE_SF
TCELL33:OUT.18.TMINGTF_CHANNEL2.TXDCCDONE_SF
TCELL33:OUT.19.TMINGTF_CHANNEL2.DRPDO_SF13
TCELL33:OUT.20.TMINGTF_CHANNEL2.RXCDRPHDONE_SF
TCELL33:OUT.21.TMINGTF_CHANNEL2.DMONOUT_SF8
TCELL33:OUT.22.TMINGTF_CHANNEL2.SCANOUT_SF16
TCELL33:OUT.23.TMINGTF_CHANNEL2.SCANOUT_SF3
TCELL33:OUT.24.TMINGTF_CHANNEL2.RXPHALIGNERR_SF
TCELL33:OUT.25.TMINGTF_CHANNEL2.DRPDO_SF8
TCELL33:OUT.26.TMINGTF_CHANNEL2.DFEDOUT_SF3
TCELL33:OUT.27.TMINGTF_CHANNEL2.DMONOUT_SF3
TCELL33:OUT.29.TMINGTF_CHANNEL2.PMASCANOUT_SF3
TCELL33:OUT.30.TMINGTF_CHANNEL2.PINRSRVDAS_SF6
TCELL33:OUT.31.TMINGTF_CHANNEL2.DRPDO_SF3
TCELL33:IMUX.CTRL.0GTF_CHANNEL2.CPLRESET_FS
TCELL33:IMUX.CTRL.5GTF_CHANNEL2.CPLLDMONCLK_FS
TCELL33:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TSTIN_FS3
TCELL33:IMUX.IMUX.2.DELAYGTF_CHANNEL2.DI_FS8
TCELL33:IMUX.IMUX.3.DELAYGTF_CHANNEL2.CPLREFSELDYN_FS2
TCELL33:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TXSLVSYNCEN_FS
TCELL33:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TSTIN_FS11
TCELL33:IMUX.IMUX.6.DELAYGTF_CHANNEL2.CPLREFSELDYN_FS1
TCELL33:IMUX.IMUX.7.DELAYGTF_CHANNEL2.RXTERMINATION_FS
TCELL33:IMUX.IMUX.8.DELAYGTF_CHANNEL2.DI_FS10
TCELL33:IMUX.IMUX.9.DELAYGTF_CHANNEL2.CPLREFSELDYN_FS0
TCELL33:IMUX.IMUX.10.DELAYGTF_CHANNEL2.TXPPMSEL_FS
TCELL33:IMUX.IMUX.11.DELAYGTF_CHANNEL2.SCANIN_FS10
TCELL33:IMUX.IMUX.12.DELAYGTF_CHANNEL2.CPLLKDETEN_FS
TCELL33:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXEMPPRE_FS1
TCELL33:IMUX.IMUX.14.DELAYGTF_CHANNEL2.TSTIN_FS13
TCELL33:IMUX.IMUX.15.DELAYGTF_CHANNEL2.SCANIN_FS8
TCELL33:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TXPIPPMPWDN_FS
TCELL33:IMUX.IMUX.17.DELAYGTF_CHANNEL2.SCANIN_FS6
TCELL33:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS1
TCELL33:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TXPPMOVRDEN_FS
TCELL33:IMUX.IMUX.20.DELAYGTF_CHANNEL2.TSTIN_FS17
TCELL33:IMUX.IMUX.21.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS0
TCELL33:IMUX.IMUX.22.DELAYGTF_CHANNEL2.ENPPM_FS
TCELL33:IMUX.IMUX.23.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS1
TCELL33:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXEMPPOS_FS1
TCELL33:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TCOPIOVREN_FS
TCELL33:IMUX.IMUX.26.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS2
TCELL33:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXSYSCKSEL_FS0
TCELL33:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TXPWRDN_FS1
TCELL33:IMUX.IMUX.29.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS3
TCELL33:IMUX.IMUX.30.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS4
TCELL33:IMUX.IMUX.31.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS5
TCELL33:IMUX.IMUX.32.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS6
TCELL33:IMUX.IMUX.33.DELAYGTF_CHANNEL2.STEPSIZEPPM_FS1
TCELL33:IMUX.IMUX.34.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS7
TCELL33:IMUX.IMUX.35.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS8
TCELL33:IMUX.IMUX.36.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS9
TCELL33:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PMASCANIN_FS3
TCELL33:IMUX.IMUX.38.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS10
TCELL33:IMUX.IMUX.39.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS11
TCELL33:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PMASCANIN_FS4
TCELL33:IMUX.IMUX.41.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS12
TCELL33:IMUX.IMUX.42.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS13
TCELL33:IMUX.IMUX.43.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS14
TCELL33:IMUX.IMUX.44.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS15
TCELL33:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS16
TCELL33:IMUX.IMUX.46.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS17
TCELL33:IMUX.IMUX.47.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS18
TCELL34:OUT.0.TMINGTF_CHANNEL2.CFOKFSTARTED_SF
TCELL34:OUT.1.TMINGTF_CHANNEL2.PINRSRVDAS_SF14
TCELL34:OUT.2.TMINGTF_CHANNEL2.RXPMARESETDONE_SF
TCELL34:OUT.3.TMINGTF_CHANNEL2.RXSLIPPMARDY_SF
TCELL34:OUT.4.TMINGTF_CHANNEL2.RXSYNCEN2SLV_SF
TCELL34:OUT.5.TMINGTF_CHANNEL2.RXSLIPOUTCLKRDY_SF
TCELL34:OUT.6.TMINGTF_CHANNEL2.CFOKSTART_SF
TCELL34:OUT.7.TMINGTF_CHANNEL2.DFEDOUT_SF7
TCELL34:OUT.8.TMINGTF_CHANNEL2.RXCOPHDONE_SF
TCELL34:OUT.9.TMINGTF_CHANNEL2.PINRSRVDAS_SF3
TCELL34:OUT.10.TMINGTF_CHANNEL2.RXSLIPDONE_SF
TCELL34:OUT.11.TMINGTF_CHANNEL2.PMASCANOUT_SF10
TCELL34:OUT.12.TMINGTF_CHANNEL2.DMONOUT_SF12
TCELL34:OUT.13.TMINGTF_CHANNEL2.RXLINKSYNCDONE_SF
TCELL34:OUT.14.TMINGTF_CHANNEL2.PMASCANOUT_SF7
TCELL34:OUT.15.TMINGTF_CHANNEL2.DMONOUT_SF14
TCELL34:OUT.16.TMINGTF_CHANNEL2.PINRSRVDAS_SF13
TCELL34:OUT.17.TMINGTF_CHANNEL2.TXPRGDIVRSTDONE_SF
TCELL34:OUT.18.TMINGTF_CHANNEL2.RESET_EXCEPTION_SF
TCELL34:OUT.19.TMINGTF_CHANNEL2.DRPDO_SF14
TCELL34:OUT.20.TMINGTF_CHANNEL2.RXPRGDIVRSTDONE_SF
TCELL34:OUT.21.TMINGTF_CHANNEL2.DMONOUT_SF9
TCELL34:OUT.22.TMINGTF_CHANNEL2.GTPOWERGOOD_SF
TCELL34:OUT.23.TMINGTF_CHANNEL2.SCANOUT_SF4
TCELL34:OUT.25.TMINGTF_CHANNEL2.DRPDO_SF9
TCELL34:OUT.26.TMINGTF_CHANNEL2.DFEDOUT_SF4
TCELL34:OUT.27.TMINGTF_CHANNEL2.DMONOUT_SF4
TCELL34:OUT.28.TMINGTF_CHANNEL2.PINRSRVDAS_SF15
TCELL34:OUT.29.TMINGTF_CHANNEL2.PMASCANOUT_SF4
TCELL34:OUT.30.TMINGTF_CHANNEL2.PINRSRVDAS_SF7
TCELL34:OUT.31.TMINGTF_CHANNEL2.DRPDO_SF4
TCELL34:IMUX.CTRL.0GTF_CHANNEL2.GTTXRST_FS
TCELL34:IMUX.CTRL.4GTF_CHANNEL2.PMASCANCLK3_FS
TCELL34:IMUX.CTRL.5GTF_CHANNEL2.PMASCANCLK2_FS
TCELL34:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS19
TCELL34:IMUX.IMUX.2.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS20
TCELL34:IMUX.IMUX.3.DELAYGTF_CHANNEL2.TXOUTCKCTL_FS0
TCELL34:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TXMSTRSETPHDONE_FS
TCELL34:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS21
TCELL34:IMUX.IMUX.6.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS22
TCELL34:IMUX.IMUX.7.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS23
TCELL34:IMUX.IMUX.8.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS24
TCELL34:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS25
TCELL34:IMUX.IMUX.10.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS26
TCELL34:IMUX.IMUX.11.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS27
TCELL34:IMUX.IMUX.12.DELAYGTF_CHANNEL2.TXDRVAMP_FS0
TCELL34:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXEMPPRE_FS2
TCELL34:IMUX.IMUX.14.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS28
TCELL34:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS29
TCELL34:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS30
TCELL34:IMUX.IMUX.17.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS31
TCELL34:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS2
TCELL34:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS32
TCELL34:IMUX.IMUX.20.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS33
TCELL34:IMUX.IMUX.21.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS34
TCELL34:IMUX.IMUX.22.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS35
TCELL34:IMUX.IMUX.23.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS36
TCELL34:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXEMPPOS_FS2
TCELL34:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TXPRBSPTN_FS0
TCELL34:IMUX.IMUX.26.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS37
TCELL34:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXSYSCKSEL_FS1
TCELL34:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS38
TCELL34:IMUX.IMUX.29.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS39
TCELL34:IMUX.IMUX.30.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS40
TCELL34:IMUX.IMUX.31.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS41
TCELL34:IMUX.IMUX.32.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS42
TCELL34:IMUX.IMUX.33.DELAYGTF_CHANNEL2.STEPSIZEPPM_FS2
TCELL34:IMUX.IMUX.34.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS43
TCELL34:IMUX.IMUX.35.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS44
TCELL34:IMUX.IMUX.36.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS45
TCELL34:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PMASCANIN_FS5
TCELL34:IMUX.IMUX.38.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS46
TCELL34:IMUX.IMUX.39.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS47
TCELL34:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PMASCANIN_FS6
TCELL34:IMUX.IMUX.41.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS48
TCELL34:IMUX.IMUX.42.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS49
TCELL34:IMUX.IMUX.43.DELAYGTF_CHANNEL2.DFE_KH_OVERWREN_FS
TCELL34:IMUX.IMUX.44.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS50
TCELL34:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS51
TCELL34:IMUX.IMUX.47.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS52
TCELL35:OUT.0.TMINGTF_CHANNEL2.PMASCANOUT_SF12
TCELL35:OUT.1.TMINGTF_CHANNEL2.CPLFBLOSS_SF
TCELL35:OUT.2.TMINGTF_CHANNEL2.RXELECIDLE_SF
TCELL35:OUT.3.TMINGTF_CHANNEL2.DRPDO_SF12
TCELL35:OUT.4.TMINGTF_CHANNEL2.TCOINITDONE_SF
TCELL35:OUT.5.TMINGTF_CHANNEL2.DMONOUT_SF7
TCELL35:OUT.6.TMINGTF_CHANNEL2.RDASOFTRSTDONE_SF
TCELL35:OUT.7.TMINGTF_CHANNEL2.PINRSRVDAS_SF11
TCELL35:OUT.8.TMINGTF_CHANNEL2.RXPRBSLOCKED_SF
TCELL35:OUT.9.TMINGTF_CHANNEL2.PINRSRVDAS_SF1
TCELL35:OUT.15.TMINGTF_CHANNEL2.TX_UNFOUT_SF
TCELL35:OUT.16.TMINGTF_CHANNEL2.TX_PTP_SOP_POS_SF
TCELL35:OUT.17.TMINGTF_CHANNEL2.TX_PTP_SOP_SF
TCELL35:OUT.18.TMINGTF_CHANNEL2.TX_GB_SEQ_START_SF
TCELL35:OUT.19.TMINGTF_CHANNEL2.TX_AXIS_TREADY_SF
TCELL35:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF8
TCELL35:OUT.21.TMINGTF_CHANNEL2.STAT_TX_PKT_ERR_SF
TCELL35:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF0
TCELL35:OUT.23.TMINGTF_CHANNEL2.STAT_TX_PKT_SF
TCELL35:OUT.24.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF0
TCELL35:OUT.25.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF1
TCELL35:OUT.26.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF2
TCELL35:OUT.27.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF3
TCELL35:OUT.28.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF4
TCELL35:OUT.29.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF5
TCELL35:OUT.30.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF6
TCELL35:OUT.31.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF7
TCELL35:IMUX.CTRL.0GTF_CHANNEL2.TXPROGDIVRESET_FS
TCELL35:IMUX.CTRL.4GTF_CHANNEL2.TXUSRCLK2_FS
TCELL35:IMUX.CTRL.5GTF_CHANNEL2.TXUSRCLK_FS
TCELL35:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS53
TCELL35:IMUX.IMUX.2.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS54
TCELL35:IMUX.IMUX.3.DELAYGTF_CHANNEL2.TXOUTCKCTL_FS1
TCELL35:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS55
TCELL35:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS56
TCELL35:IMUX.IMUX.7.DELAYGTF_CHANNEL2.TXCODAALGNEN_FS
TCELL35:IMUX.IMUX.8.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS57
TCELL35:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TCODABYPASS_FS
TCELL35:IMUX.IMUX.11.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS58
TCELL35:IMUX.IMUX.12.DELAYGTF_CHANNEL2.TXDRVAMP_FS1
TCELL35:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXEMPPRE_FS3
TCELL35:IMUX.IMUX.14.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS59
TCELL35:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS60
TCELL35:IMUX.IMUX.16.DELAYGTF_CHANNEL2.QPLLFREQLOCK0_FS
TCELL35:IMUX.IMUX.17.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS61
TCELL35:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS3
TCELL35:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS62
TCELL35:IMUX.IMUX.20.DELAYGTF_CHANNEL2.TX_AXIS_TDATA_FS63
TCELL35:IMUX.IMUX.21.DELAYGTF_CHANNEL2.TX_GB_SEQ_SYNC_FS
TCELL35:IMUX.IMUX.22.DELAYGTF_CHANNEL2.TX_AXIS_TVALID_FS
TCELL35:IMUX.IMUX.23.DELAYGTF_CHANNEL2.TX_AXIS_TTERM_FS0
TCELL35:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXEMPPOS_FS3
TCELL35:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TXPRBSPTN_FS1
TCELL35:IMUX.IMUX.26.DELAYGTF_CHANNEL2.TX_AXIS_TTERM_FS1
TCELL35:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXPLLCKSEL_FS0
TCELL35:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TX_AXIS_TTERM_FS2
TCELL35:IMUX.IMUX.29.DELAYGTF_CHANNEL2.TX_AXIS_TTERM_FS3
TCELL35:IMUX.IMUX.30.DELAYGTF_CHANNEL2.TX_AXIS_TTERM_FS4
TCELL35:IMUX.IMUX.32.DELAYGTF_CHANNEL2.TX_AXIS_TSOF_FS0
TCELL35:IMUX.IMUX.33.DELAYGTF_CHANNEL2.STEPSIZEPPM_FS3
TCELL35:IMUX.IMUX.35.DELAYGTF_CHANNEL2.TX_AXIS_TSOF_FS1
TCELL35:IMUX.IMUX.36.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS0
TCELL35:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS0
TCELL35:IMUX.IMUX.38.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS1
TCELL35:IMUX.IMUX.39.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS2
TCELL35:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS1
TCELL35:IMUX.IMUX.41.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS3
TCELL35:IMUX.IMUX.42.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS4
TCELL35:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS0
TCELL35:IMUX.IMUX.44.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS5
TCELL35:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS6
TCELL35:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS1
TCELL35:IMUX.IMUX.47.DELAYGTF_CHANNEL2.TX_AXIS_TPRE_FS7
TCELL36:OUT.0.TMINGTF_CHANNEL2.STAT_TX_PAUSE_VALID_SF8
TCELL36:OUT.1.TMINGTF_CHANNEL2.STAT_TX_FCS_ERR_SF
TCELL36:OUT.2.TMINGTF_CHANNEL2.STAT_TX_BYTES_SF0
TCELL36:OUT.3.TMINGTF_CHANNEL2.STAT_TX_BYTES_SF1
TCELL36:OUT.4.TMINGTF_CHANNEL2.STAT_TX_BYTES_SF2
TCELL36:OUT.5.TMINGTF_CHANNEL2.STAT_TX_BYTES_SF3
TCELL36:OUT.6.TMINGTF_CHANNEL2.CDRLOCK_SF
TCELL36:OUT.8.TMINGTF_CHANNEL2.RXRECCLK_SF
TCELL36:OUT.11.TMINGTF_CHANNEL2.STAT_TX_BAD_FCS_SF
TCELL36:OUT.12.TMINGTF_CHANNEL2.STAT_TX_VLAN_SF
TCELL36:OUT.13.TMINGTF_CHANNEL2.STAT_TX_BROADCAST_SF
TCELL36:OUT.14.TMINGTF_CHANNEL2.STAT_TX_MULTICAST_SF
TCELL36:OUT.15.TMINGTF_CHANNEL2.STAT_TX_UNICAST_SF
TCELL36:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF9
TCELL36:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF1
TCELL36:IMUX.CTRL.0GTF_CHANNEL2.TXPMARESET_FS
TCELL36:IMUX.CTRL.2GTF_CHANNEL2.PMASCANCLK6_FS
TCELL36:IMUX.CTRL.3GTF_CHANNEL2.PMASCANCLK7_FS
TCELL36:IMUX.CTRL.5GTF_CHANNEL2.TCOCLKFSMFROUT_FS
TCELL36:IMUX.IMUX.0.DELAYGTF_CHANNEL2.TX_AXIS_TPOISON_FS
TCELL36:IMUX.IMUX.1.DELAYGTF_CHANNEL2.TXPRBSPTN_FS3
TCELL36:IMUX.IMUX.2.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS0
TCELL36:IMUX.IMUX.3.DELAYGTF_CHANNEL2.TXOUTCKCTL_FS2
TCELL36:IMUX.IMUX.4.DELAYGTF_CHANNEL2.BSR_SERIAL_FS
TCELL36:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS1
TCELL36:IMUX.IMUX.6.DELAYGTF_CHANNEL2.CPLLFREQLOCK_FS
TCELL36:IMUX.IMUX.8.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS2
TCELL36:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TDASOFTRESET_FS
TCELL36:IMUX.IMUX.11.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS3
TCELL36:IMUX.IMUX.12.DELAYGTF_CHANNEL2.TXDRVAMP_FS2
TCELL36:IMUX.IMUX.13.DELAYGTF_CHANNEL2.TXEMPPRE_FS4
TCELL36:IMUX.IMUX.14.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS4
TCELL36:IMUX.IMUX.15.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS5
TCELL36:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TCODAOVREN_FS
TCELL36:IMUX.IMUX.17.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS6
TCELL36:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS4
TCELL36:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TCOHOLDFROUT_FS
TCELL36:IMUX.IMUX.20.DELAYGTF_CHANNEL2.TX_AXIS_TLAST_FS7
TCELL36:IMUX.IMUX.21.DELAYGTF_CHANNEL2.TX_AXIS_TERR_FS
TCELL36:IMUX.IMUX.22.DELAYGTF_CHANNEL2.CTL_TX_SEND_RFI_FS
TCELL36:IMUX.IMUX.23.DELAYGTF_CHANNEL2.CTL_TX_SEND_LFI_FS
TCELL36:IMUX.IMUX.24.DELAYGTF_CHANNEL2.TXEMPPOS_FS4
TCELL36:IMUX.IMUX.25.DELAYGTF_CHANNEL2.TXPRBSPTN_FS2
TCELL36:IMUX.IMUX.26.DELAYGTF_CHANNEL2.CTL_TX_SEND_IDLE_FS
TCELL36:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXPLLCKSEL_FS1
TCELL36:IMUX.IMUX.28.DELAYGTF_CHANNEL2.CTL_TX_RESEND_PAUSE_FS
TCELL36:IMUX.IMUX.29.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS0
TCELL36:IMUX.IMUX.30.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS1
TCELL36:IMUX.IMUX.32.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS2
TCELL36:IMUX.IMUX.33.DELAYGTF_CHANNEL2.STEPSIZEPPM_FS4
TCELL36:IMUX.IMUX.35.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS3
TCELL36:IMUX.IMUX.36.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS4
TCELL36:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS2
TCELL36:IMUX.IMUX.38.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS5
TCELL36:IMUX.IMUX.39.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS6
TCELL36:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS3
TCELL36:IMUX.IMUX.41.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS7
TCELL36:IMUX.IMUX.42.DELAYGTF_CHANNEL2.CTL_TX_PAUSE_REQ_FS8
TCELL36:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS2
TCELL36:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS3
TCELL37:OUT.0.TMINGTF_CHANNEL2.STAT_RX_HI_BER_SF
TCELL37:OUT.1.TMINGTF_CHANNEL2.STAT_RX_GOT_SIGNAL_OS_SF
TCELL37:OUT.2.TMINGTF_CHANNEL2.STAT_RX_FRAMING_ERR_SF
TCELL37:OUT.3.TMINGTF_CHANNEL2.STAT_RX_FCS_ERR_SF
TCELL37:OUT.4.TMINGTF_CHANNEL2.STAT_RX_BYTES_SF0
TCELL37:OUT.5.TMINGTF_CHANNEL2.STAT_RX_BYTES_SF1
TCELL37:OUT.6.TMINGTF_CHANNEL2.STAT_RX_BYTES_SF2
TCELL37:OUT.7.TMINGTF_CHANNEL2.STAT_RX_BYTES_SF3
TCELL37:OUT.8.TMINGTF_CHANNEL2.RXRECCLKPCS_SF
TCELL37:OUT.9.TMINGTF_CHANNEL2.STAT_RX_BROADCAST_SF
TCELL37:OUT.10.TMINGTF_CHANNEL2.PMASCANOUT_SF13
TCELL37:OUT.11.TMINGTF_CHANNEL2.STAT_RX_BLOCK_LOCK_SF
TCELL37:OUT.12.TMINGTF_CHANNEL2.STAT_RX_BAD_PREAMBLE_SF
TCELL37:OUT.13.TMINGTF_CHANNEL2.STAT_RX_BAD_SFD_SF
TCELL37:OUT.14.TMINGTF_CHANNEL2.STAT_RX_BAD_CODE_SF
TCELL37:OUT.15.TMINGTF_CHANNEL2.RX_PTP_SOP_POS_SF
TCELL37:OUT.16.TMINGTF_CHANNEL2.RX_PTP_SOP_SF
TCELL37:OUT.17.TMINGTF_CHANNEL2.RX_GB_SEQ_START_SF
TCELL37:OUT.18.TMINGTF_CHANNEL2.RX_BITSLIP_SF
TCELL37:OUT.19.TMINGTF_CHANNEL2.RX_AXIS_TVALID_SF
TCELL37:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF10
TCELL37:OUT.21.TMINGTF_CHANNEL2.RX_AXIS_TTERM_SF0
TCELL37:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF2
TCELL37:OUT.23.TMINGTF_CHANNEL2.RX_AXIS_TTERM_SF1
TCELL37:OUT.24.TMINGTF_CHANNEL2.RX_AXIS_TTERM_SF2
TCELL37:OUT.25.TMINGTF_CHANNEL2.RX_AXIS_TTERM_SF3
TCELL37:OUT.26.TMINGTF_CHANNEL2.RX_AXIS_TTERM_SF4
TCELL37:OUT.27.TMINGTF_CHANNEL2.RX_AXIS_TSOF_SF0
TCELL37:OUT.28.TMINGTF_CHANNEL2.RX_AXIS_TSOF_SF1
TCELL37:OUT.29.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF0
TCELL37:OUT.30.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF1
TCELL37:OUT.31.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF2
TCELL37:IMUX.CTRL.0GTF_CHANNEL2.DFERESET_FS
TCELL37:IMUX.CTRL.5GTF_CHANNEL2.SCANCLK_FS
TCELL37:IMUX.IMUX.1.DELAYGTF_CHANNEL2.RESETOVRD_FS
TCELL37:IMUX.IMUX.3.DELAYGTF_CHANNEL2.TXDRVAMP_FS4
TCELL37:IMUX.IMUX.4.DELAYGTF_CHANNEL2.TXDCCSTART_FS
TCELL37:IMUX.IMUX.7.DELAYGTF_CHANNEL2.TCODARESET_FS
TCELL37:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TCODAPWDN_FS
TCELL37:IMUX.IMUX.12.DELAYGTF_CHANNEL2.TXDRVAMP_FS3
TCELL37:IMUX.IMUX.16.DELAYGTF_CHANNEL2.TXCOPIALGNEN_FS
TCELL37:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS5
TCELL37:IMUX.IMUX.19.DELAYGTF_CHANNEL2.TXCOPISETPHS_FS
TCELL37:IMUX.IMUX.27.DELAYGTF_CHANNEL2.TXELECIDLE_FS
TCELL37:IMUX.IMUX.28.DELAYGTF_CHANNEL2.TCOUPDNFROUT_FS
TCELL37:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS4
TCELL37:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS5
TCELL37:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS4
TCELL37:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS5
TCELL38:OUT.0.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF3
TCELL38:OUT.1.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF4
TCELL38:OUT.2.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF5
TCELL38:OUT.3.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF6
TCELL38:OUT.4.TMINGTF_CHANNEL2.RX_AXIS_TPRE_SF7
TCELL38:OUT.5.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF0
TCELL38:OUT.6.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF1
TCELL38:OUT.7.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF2
TCELL38:OUT.8.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF3
TCELL38:OUT.9.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF4
TCELL38:OUT.10.TMINGTF_CHANNEL2.PMASCANOUT_SF14
TCELL38:OUT.11.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF5
TCELL38:OUT.12.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF6
TCELL38:OUT.13.TMINGTF_CHANNEL2.RX_AXIS_TLAST_SF7
TCELL38:OUT.14.TMINGTF_CHANNEL2.RX_AXIS_TERR_SF
TCELL38:OUT.15.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF0
TCELL38:OUT.16.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF1
TCELL38:OUT.17.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF2
TCELL38:OUT.18.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF3
TCELL38:OUT.19.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF4
TCELL38:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF11
TCELL38:OUT.21.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF5
TCELL38:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF3
TCELL38:OUT.23.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF6
TCELL38:OUT.24.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF7
TCELL38:OUT.25.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF8
TCELL38:OUT.26.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF9
TCELL38:OUT.27.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF10
TCELL38:OUT.28.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF11
TCELL38:OUT.29.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF12
TCELL38:OUT.30.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF13
TCELL38:OUT.31.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF14
TCELL38:IMUX.CTRL.0GTF_CHANNEL2.CDRFRRESET_FS
TCELL38:IMUX.CTRL.2GTF_CHANNEL2.PMASCANCLK8_FS
TCELL38:IMUX.CTRL.4GTF_CHANNEL2.TSTCLK1_FS
TCELL38:IMUX.CTRL.5GTF_CHANNEL2.TSTCLK0_FS
TCELL38:IMUX.CTRL.7GTF_CHANNEL2.RXPMARESET_FS
TCELL38:IMUX.IMUX.3.DELAYGTF_CHANNEL2.GATERXELECIDLE_FS0
TCELL38:IMUX.IMUX.4.DELAYGTF_CHANNEL2.RXSYSCKSEL_FS1
TCELL38:IMUX.IMUX.6.DELAYGTF_CHANNEL2.TXSYNCFSMMASTER_FS
TCELL38:IMUX.IMUX.7.DELAYGTF_CHANNEL2.GATERXELECIDLE_FS1
TCELL38:IMUX.IMUX.9.DELAYGTF_CHANNEL2.TXRESET_FS
TCELL38:IMUX.IMUX.12.DELAYGTF_CHANNEL2.PRBSCNTRST_FS
TCELL38:IMUX.IMUX.13.DELAYGTF_CHANNEL2.RXPOLARITY_FS
TCELL38:IMUX.IMUX.18.DELAYGTF_CHANNEL2.TXEMPMAIN_FS6
TCELL38:IMUX.IMUX.19.DELAYGTF_CHANNEL2.RCODAPWDN_FS
TCELL38:IMUX.IMUX.22.DELAYGTF_CHANNEL2.RXCOALGNEN_FS
TCELL38:IMUX.IMUX.24.DELAYGTF_CHANNEL2.RXCOSETPHS_FS
TCELL38:IMUX.IMUX.28.DELAYGTF_CHANNEL2.RXOUTCKCTL_FS0
TCELL38:IMUX.IMUX.31.DELAYGTF_CHANNEL2.CDRHOLD_FS
TCELL38:IMUX.IMUX.34.DELAYGTF_CHANNEL2.TCOINITSET_FS
TCELL38:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS6
TCELL38:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS7
TCELL38:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS6
TCELL38:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS7
TCELL39:OUT.0.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF15
TCELL39:OUT.1.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF16
TCELL39:OUT.2.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF17
TCELL39:OUT.3.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF18
TCELL39:OUT.4.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF19
TCELL39:OUT.5.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF20
TCELL39:OUT.6.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF21
TCELL39:OUT.7.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF22
TCELL39:OUT.8.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF23
TCELL39:OUT.9.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF24
TCELL39:OUT.10.TMINGTF_CHANNEL2.PMASCANOUT_SF15
TCELL39:OUT.11.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF25
TCELL39:OUT.12.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF26
TCELL39:OUT.13.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF27
TCELL39:OUT.14.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF28
TCELL39:OUT.15.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF29
TCELL39:OUT.16.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF30
TCELL39:OUT.17.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF31
TCELL39:OUT.18.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF32
TCELL39:OUT.19.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF33
TCELL39:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF12
TCELL39:OUT.21.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF34
TCELL39:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF4
TCELL39:OUT.23.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF35
TCELL39:OUT.24.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF36
TCELL39:OUT.25.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF37
TCELL39:OUT.26.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF38
TCELL39:OUT.27.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF39
TCELL39:OUT.28.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF40
TCELL39:OUT.29.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF41
TCELL39:OUT.30.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF42
TCELL39:OUT.31.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF43
TCELL39:IMUX.CTRL.0GTF_CHANNEL2.GTRXRST_FS
TCELL39:IMUX.CTRL.4GTF_CHANNEL2.RXUSRCLK2_FS
TCELL39:IMUX.CTRL.5GTF_CHANNEL2.RXUSRCLK_FS
TCELL39:IMUX.CTRL.7GTF_CHANNEL2.RCODARESET_FS
TCELL39:IMUX.IMUX.4.DELAYGTF_CHANNEL2.RXPLLCKSEL_FS0
TCELL39:IMUX.IMUX.7.DELAYGTF_CHANNEL2.SCANIN_FS14
TCELL39:IMUX.IMUX.10.DELAYGTF_CHANNEL2.SCANIN_FS15
TCELL39:IMUX.IMUX.13.DELAYGTF_CHANNEL2.RXRESET_FS
TCELL39:IMUX.IMUX.16.DELAYGTF_CHANNEL2.OSOVREN_FS
TCELL39:IMUX.IMUX.19.DELAYGTF_CHANNEL2.DFECFOKOVREN_FS
TCELL39:IMUX.IMUX.22.DELAYGTF_CHANNEL2.DFECFOKFPULSE_FS
TCELL39:IMUX.IMUX.25.DELAYGTF_CHANNEL2.DFECFOKFEN_FS
TCELL39:IMUX.IMUX.27.DELAYGTF_CHANNEL2.RXSYSCKSEL_FS0
TCELL39:IMUX.IMUX.28.DELAYGTF_CHANNEL2.RXOUTCKCTL_FS1
TCELL39:IMUX.IMUX.31.DELAYGTF_CHANNEL2.CDROVREN_FS
TCELL39:IMUX.IMUX.33.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS0
TCELL39:IMUX.IMUX.34.DELAYGTF_CHANNEL2.RXOUTCKCTL_FS2
TCELL39:IMUX.IMUX.35.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS1
TCELL39:IMUX.IMUX.36.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS2
TCELL39:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS8
TCELL39:IMUX.IMUX.38.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS3
TCELL39:IMUX.IMUX.39.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS4
TCELL39:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS9
TCELL39:IMUX.IMUX.41.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS5
TCELL39:IMUX.IMUX.42.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS6
TCELL39:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS8
TCELL39:IMUX.IMUX.44.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS7
TCELL39:IMUX.IMUX.45.DELAYGTF_CHANNEL2.CTL_RX_PAUSE_ACK_FS8
TCELL39:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS9
TCELL40:OUT.0.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF44
TCELL40:OUT.1.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF45
TCELL40:OUT.2.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF46
TCELL40:OUT.3.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF47
TCELL40:OUT.4.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF48
TCELL40:OUT.5.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF49
TCELL40:OUT.6.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF50
TCELL40:OUT.7.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF51
TCELL40:OUT.8.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF52
TCELL40:OUT.9.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF53
TCELL40:OUT.10.TMINGTF_CHANNEL2.PMASCANOUT_SF16
TCELL40:OUT.11.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF54
TCELL40:OUT.12.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF55
TCELL40:OUT.13.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF56
TCELL40:OUT.14.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF57
TCELL40:OUT.15.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF58
TCELL40:OUT.16.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF59
TCELL40:OUT.17.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF60
TCELL40:OUT.18.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF61
TCELL40:OUT.19.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF62
TCELL40:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF13
TCELL40:OUT.21.TMINGTF_CHANNEL2.RX_AXIS_TDATA_SF63
TCELL40:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF5
TCELL40:OUT.23.TMINGTF_CHANNEL2.STAT_RX_VLAN_SF
TCELL40:OUT.24.TMINGTF_CHANNEL2.STAT_RX_VALID_CTRL_CODE_SF
TCELL40:OUT.25.TMINGTF_CHANNEL2.STAT_RX_UNICAST_SF
TCELL40:OUT.26.TMINGTF_CHANNEL2.STAT_RX_TRUNCATED_SF
TCELL40:OUT.27.TMINGTF_CHANNEL2.STAT_RX_TEST_PATTERN_MISMATCH_SF
TCELL40:OUT.28.TMINGTF_CHANNEL2.STAT_RX_STATUS_SF
TCELL40:OUT.29.TMINGTF_CHANNEL2.STAT_RX_REMOTE_FAULT_SF
TCELL40:OUT.30.TMINGTF_CHANNEL2.STAT_RX_RECEIVED_LOCAL_FAULT_SF
TCELL40:OUT.31.TMINGTF_CHANNEL2.STAT_RX_PKT_ERR_SF
TCELL40:IMUX.CTRL.4GTF_CHANNEL2.PMASCANCLK1_FS
TCELL40:IMUX.CTRL.5GTF_CHANNEL2.PMASCANCLK0_FS
TCELL40:IMUX.CTRL.7GTF_CHANNEL2.RXPROGDIVRESET_FS
TCELL40:IMUX.IMUX.1.DELAYGTF_CHANNEL2.SCANIN_FS16
TCELL40:IMUX.IMUX.2.DELAYGTF_CHANNEL2.CKOKRESET_FS
TCELL40:IMUX.IMUX.3.DELAYGTF_CHANNEL2.QPLLFREQLOCK1_FS
TCELL40:IMUX.IMUX.4.DELAYGTF_CHANNEL2.RXPLLCKSEL_FS1
TCELL40:IMUX.IMUX.5.DELAYGTF_CHANNEL2.TXMUXDCDORWREN_FS
TCELL40:IMUX.IMUX.7.DELAYGTF_CHANNEL2.DFEH2HOLD_FS
TCELL40:IMUX.IMUX.10.DELAYGTF_CHANNEL2.DFEH2OVREN_FS
TCELL40:IMUX.IMUX.11.DELAYGTF_CHANNEL2.DFECFOKHOLD_FS
TCELL40:IMUX.IMUX.13.DELAYGTF_CHANNEL2.DFEH5HOLD_FS
TCELL40:IMUX.IMUX.14.DELAYGTF_CHANNEL2.RXCKCALSTART_FS0
TCELL40:IMUX.IMUX.16.DELAYGTF_CHANNEL2.DFEH5OVREN_FS
TCELL40:IMUX.IMUX.17.DELAYGTF_CHANNEL2.AFECFOKEN_FS
TCELL40:IMUX.IMUX.19.DELAYGTF_CHANNEL2.DFEH8HOLD_FS
TCELL40:IMUX.IMUX.22.DELAYGTF_CHANNEL2.DFEH8OVREN_FS
TCELL40:IMUX.IMUX.23.DELAYGTF_CHANNEL2.OSHOLD_FS
TCELL40:IMUX.IMUX.25.DELAYGTF_CHANNEL2.DFEH11HOLD_FS
TCELL40:IMUX.IMUX.26.DELAYGTF_CHANNEL2.RXCKCALSTART_FS1
TCELL40:IMUX.IMUX.28.DELAYGTF_CHANNEL2.DFEH11OVREN_FS
TCELL40:IMUX.IMUX.29.DELAYGTF_CHANNEL2.CFOKRESET_FS
TCELL40:IMUX.IMUX.31.DELAYGTF_CHANNEL2.DFEH14HOLD_FS
TCELL40:IMUX.IMUX.34.DELAYGTF_CHANNEL2.DFEH14OVREN_FS
TCELL40:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS10
TCELL40:IMUX.IMUX.38.DELAYGTF_CHANNEL2.DFEKLOVREN_FS
TCELL40:IMUX.IMUX.39.DELAYGTF_CHANNEL2.DFEUTOVREN_FS
TCELL40:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS11
TCELL40:IMUX.IMUX.41.DELAYGTF_CHANNEL2.DFEKLHOLD_FS
TCELL40:IMUX.IMUX.42.DELAYGTF_CHANNEL2.DFEUTHOLD_FS
TCELL40:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS10
TCELL40:IMUX.IMUX.44.DELAYGTF_CHANNEL2.DFEGCOVREN_FS
TCELL40:IMUX.IMUX.45.DELAYGTF_CHANNEL2.TXMUXDCDEXHOLD_FS
TCELL40:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS11
TCELL40:IMUX.IMUX.47.DELAYGTF_CHANNEL2.DFEGCHOLD_FS
TCELL41:OUT.0.TMINGTF_CHANNEL2.STAT_RX_PKT_SF
TCELL41:OUT.1.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF0
TCELL41:OUT.2.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF1
TCELL41:OUT.3.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF2
TCELL41:OUT.4.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF3
TCELL41:OUT.5.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF4
TCELL41:OUT.6.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF5
TCELL41:OUT.7.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF6
TCELL41:OUT.8.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF7
TCELL41:OUT.9.TMINGTF_CHANNEL2.STAT_RX_PAUSE_VALID_SF8
TCELL41:OUT.10.TMINGTF_CHANNEL2.PMASCANOUT_SF17
TCELL41:OUT.11.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF0
TCELL41:OUT.13.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF1
TCELL41:OUT.14.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF2
TCELL41:OUT.15.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF3
TCELL41:OUT.16.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF4
TCELL41:OUT.17.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF5
TCELL41:OUT.18.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF6
TCELL41:OUT.19.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF7
TCELL41:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF14
TCELL41:OUT.21.TMINGTF_CHANNEL2.STAT_RX_PAUSE_REQ_SF8
TCELL41:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF6
TCELL41:OUT.23.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF0
TCELL41:OUT.24.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF1
TCELL41:OUT.25.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF2
TCELL41:OUT.26.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF3
TCELL41:OUT.27.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF4
TCELL41:OUT.28.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF5
TCELL41:OUT.29.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF6
TCELL41:OUT.30.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF7
TCELL41:OUT.31.TMINGTF_CHANNEL2.STAT_RX_PAUSE_QUANTA_SF8
TCELL41:IMUX.CTRL.0GTF_CHANNEL2.CDRPHRESET_FS
TCELL41:IMUX.CTRL.7GTF_CHANNEL2.RXDASOFTRESET_FS
TCELL41:IMUX.IMUX.1.DELAYGTF_CHANNEL2.SCANIN_FS17
TCELL41:IMUX.IMUX.4.DELAYGTF_CHANNEL2.RXPWRDN_FS0
TCELL41:IMUX.IMUX.7.DELAYGTF_CHANNEL2.DFEH3HOLD_FS
TCELL41:IMUX.IMUX.10.DELAYGTF_CHANNEL2.DFEH3OVREN_FS
TCELL41:IMUX.IMUX.12.DELAYGTF_CHANNEL2.LPMOSHOLD_FS
TCELL41:IMUX.IMUX.13.DELAYGTF_CHANNEL2.DFEH6HOLD_FS
TCELL41:IMUX.IMUX.14.DELAYGTF_CHANNEL2.RXCKCALSTART_FS2
TCELL41:IMUX.IMUX.16.DELAYGTF_CHANNEL2.DFEH6OVREN_FS
TCELL41:IMUX.IMUX.19.DELAYGTF_CHANNEL2.DFEH9HOLD_FS
TCELL41:IMUX.IMUX.20.DELAYGTF_CHANNEL2.LPMOSOVREN_FS
TCELL41:IMUX.IMUX.21.DELAYGTF_CHANNEL2.RXCKCALSTART_FS3
TCELL41:IMUX.IMUX.22.DELAYGTF_CHANNEL2.DFEH9OVREN_FS
TCELL41:IMUX.IMUX.23.DELAYGTF_CHANNEL2.RXSYNCFSMMASTER_FS
TCELL41:IMUX.IMUX.25.DELAYGTF_CHANNEL2.DFEH12HOLD_FS
TCELL41:IMUX.IMUX.26.DELAYGTF_CHANNEL2.RXSLVSYNCEN_FS
TCELL41:IMUX.IMUX.28.DELAYGTF_CHANNEL2.DFEH12OVREN_FS
TCELL41:IMUX.IMUX.29.DELAYGTF_CHANNEL2.RXUSRRDY_FS
TCELL41:IMUX.IMUX.30.DELAYGTF_CHANNEL2.LPMKHOVREN_FS
TCELL41:IMUX.IMUX.31.DELAYGTF_CHANNEL2.DFEH15HOLD_FS
TCELL41:IMUX.IMUX.32.DELAYGTF_CHANNEL2.RXLPMEN_FS
TCELL41:IMUX.IMUX.34.DELAYGTF_CHANNEL2.DFEH15OVREN_FS
TCELL41:IMUX.IMUX.35.DELAYGTF_CHANNEL2.RXMSTRSETPHDONE_FS
TCELL41:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS12
TCELL41:IMUX.IMUX.38.DELAYGTF_CHANNEL2.DFEDOUTMODE_FS0
TCELL41:IMUX.IMUX.39.DELAYGTF_CHANNEL2.DFEVPOVREN_FS
TCELL41:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS13
TCELL41:IMUX.IMUX.42.DELAYGTF_CHANNEL2.DFEVPHOLD_FS
TCELL41:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS12
TCELL41:IMUX.IMUX.44.DELAYGTF_CHANNEL2.DFEDOUTMODE_FS1
TCELL41:IMUX.IMUX.45.DELAYGTF_CHANNEL2.DFEYEN_FS
TCELL41:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS13
TCELL42:OUT.0.TMINGTF_CHANNEL2.STAT_RX_MULTICAST_SF
TCELL42:OUT.1.TMINGTF_CHANNEL2.STAT_RX_LOCAL_FAULT_SF
TCELL42:OUT.2.TMINGTF_CHANNEL2.STAT_RX_INRANGEERR_SF
TCELL42:OUT.5.TMINGTF_CHANNEL2.STAT_RX_STOMPED_FCS_SF
TCELL42:OUT.6.TMINGTF_CHANNEL2.STAT_RX_BAD_FCS_SF
TCELL42:OUT.7.TMINGTF_CHANNEL2.STAT_RX_INTERNAL_LOCAL_FAULT_SF
TCELL42:OUT.8.TMINGTF_CHANNEL2.RXPRBSERR_SF
TCELL42:OUT.10.TMINGTF_CHANNEL2.RXRESETDONE_SF
TCELL42:OUT.20.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF15
TCELL42:OUT.22.TMINGTF_CHANNEL2.PCS_RSVD_OUT_SF7
TCELL42:IMUX.CTRL.4GTF_CHANNEL2.CKPINRSRVD1_FS
TCELL42:IMUX.CTRL.5GTF_CHANNEL2.CKPINRSRVD0_FS
TCELL42:IMUX.IMUX.0.DELAYGTF_CHANNEL2.RXPRBSPTN_FS3
TCELL42:IMUX.IMUX.1.DELAYGTF_CHANNEL2.SCANIN_FS18
TCELL42:IMUX.IMUX.2.DELAYGTF_CHANNEL2.RXPRBSPTN_FS0
TCELL42:IMUX.IMUX.4.DELAYGTF_CHANNEL2.RXPWRDN_FS1
TCELL42:IMUX.IMUX.5.DELAYGTF_CHANNEL2.RXPRBSPTN_FS1
TCELL42:IMUX.IMUX.7.DELAYGTF_CHANNEL2.DFEH4HOLD_FS
TCELL42:IMUX.IMUX.8.DELAYGTF_CHANNEL2.RXPRBSPTN_FS2
TCELL42:IMUX.IMUX.10.DELAYGTF_CHANNEL2.DFEH4OVREN_FS
TCELL42:IMUX.IMUX.11.DELAYGTF_CHANNEL2.DFECFOKCFNUM_FS0
TCELL42:IMUX.IMUX.13.DELAYGTF_CHANNEL2.DFEH7HOLD_FS
TCELL42:IMUX.IMUX.14.DELAYGTF_CHANNEL2.DFECFOKCFNUM_FS1
TCELL42:IMUX.IMUX.15.DELAYGTF_CHANNEL2.CDRSTEPSX_FS
TCELL42:IMUX.IMUX.16.DELAYGTF_CHANNEL2.DFEH7OVREN_FS
TCELL42:IMUX.IMUX.17.DELAYGTF_CHANNEL2.DFECFOKCFNUM_FS2
TCELL42:IMUX.IMUX.18.DELAYGTF_CHANNEL2.CDRSTEPSQ_FS
TCELL42:IMUX.IMUX.19.DELAYGTF_CHANNEL2.DFEH10HOLD_FS
TCELL42:IMUX.IMUX.20.DELAYGTF_CHANNEL2.DFECFOKCFNUM_FS3
TCELL42:IMUX.IMUX.22.DELAYGTF_CHANNEL2.DFEH10OVREN_FS
TCELL42:IMUX.IMUX.23.DELAYGTF_CHANNEL2.LPMKLOVREN_FS
TCELL42:IMUX.IMUX.24.DELAYGTF_CHANNEL2.RXCKCALSTART_FS4
TCELL42:IMUX.IMUX.25.DELAYGTF_CHANNEL2.DFEH13HOLD_FS
TCELL42:IMUX.IMUX.26.DELAYGTF_CHANNEL2.LPMKLHOLD_FS
TCELL42:IMUX.IMUX.28.DELAYGTF_CHANNEL2.DFEH13OVREN_FS
TCELL42:IMUX.IMUX.29.DELAYGTF_CHANNEL2.LPMKHHOLD_FS
TCELL42:IMUX.IMUX.30.DELAYGTF_CHANNEL2.LPMGCHOLD_FS
TCELL42:IMUX.IMUX.31.DELAYGTF_CHANNEL2.RXCKCALSTART_FS5
TCELL42:IMUX.IMUX.32.DELAYGTF_CHANNEL2.RXDAOVREN_FS
TCELL42:IMUX.IMUX.33.DELAYGTF_CHANNEL2.RXDAALGNEN_FS
TCELL42:IMUX.IMUX.34.DELAYGTF_CHANNEL2.LPMGCOVREN_FS
TCELL42:IMUX.IMUX.35.DELAYGTF_CHANNEL2.RXSLIPPMA_FS
TCELL42:IMUX.IMUX.36.DELAYGTF_CHANNEL2.RXDABYPASS_FS
TCELL42:IMUX.IMUX.37.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS14
TCELL42:IMUX.IMUX.40.DELAYGTF_CHANNEL2.PCS_RSVD_IN_FS15
TCELL42:IMUX.IMUX.41.DELAYGTF_CHANNEL2.RXCKCALSTART_FS6
TCELL42:IMUX.IMUX.42.DELAYGTF_CHANNEL2.RXSLIPOUTCLK_FS
TCELL42:IMUX.IMUX.43.DELAYGTF_CHANNEL2.PINRSRVD_FS14
TCELL42:IMUX.IMUX.45.DELAYGTF_CHANNEL2.CDRSTEPDIR_FS
TCELL42:IMUX.IMUX.46.DELAYGTF_CHANNEL2.PINRSRVD_FS15
TCELL43:OUT.3.TMINGTF_COMMON.SDMTESTDATA_SF_1_12
TCELL43:OUT.11.TMINGTF_COMMON.SDMTESTDATA_SF_1_8
TCELL43:OUT.12.TMINGTF_COMMON.QDPMASCANOUT_SF5
TCELL43:OUT.13.TMINGTF_COMMON.QDPMASCANOUT_SF10
TCELL43:OUT.17.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_4
TCELL43:OUT.18.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_4
TCELL43:OUT.19.TMINGTF_COMMON.SDMTESTDATA_SF_1_4
TCELL43:OUT.25.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_0
TCELL43:OUT.26.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_0
TCELL43:OUT.27.TMINGTF_COMMON.SDMTESTDATA_SF_1_0
TCELL43:OUT.30.TMINGTF_COMMON.SDMFINALOUT_SF_1_0
TCELL43:IMUX.CTRL.1GTF_COMMON.QDCOREREFCLK_FS_1
TCELL43:IMUX.CTRL.3GTF_COMMON.QDPMASCANCLK_FS5
TCELL43:IMUX.CTRL.4GTF_COMMON.QDPMASCANCLK_FS12
TCELL43:IMUX.CTRL.5GTF_COMMON.HROW_TEST_CK_FS_1
TCELL43:IMUX.IMUX.2.DELAYGTF_COMMON.SDMDATA_FS_1_7
TCELL43:IMUX.IMUX.3.DELAYBUFG_GT14.CEMASK
TCELL43:IMUX.IMUX.4.DELAYBUFG_GT14.RSTMASK
TCELL43:IMUX.IMUX.5.DELAYGTF_COMMON.QPLFBDIV_FS_1_4
TCELL43:IMUX.IMUX.6.DELAYGTF_COMMON.RCALENB_FS_1
TCELL43:IMUX.IMUX.7.DELAYGTF_COMMON.BGTESTEN_FS_1
TCELL43:IMUX.IMUX.8.DELAYGTF_COMMON.SDMDATA_FS_1_6
TCELL43:IMUX.IMUX.9.DELAYBUFG_GT14.DIV1
TCELL43:IMUX.IMUX.10.DELAYBUFG_GT14.DIV2
TCELL43:IMUX.IMUX.11.DELAYGTF_COMMON.QPLFBDIV_FS_1_2
TCELL43:IMUX.IMUX.13.DELAYGTF_COMMON.BGRCALOVRDENB_FS_1
TCELL43:IMUX.IMUX.14.DELAYGTF_COMMON.SDMDATA_FS_1_5
TCELL43:IMUX.IMUX.15.DELAYBUFG_GT14.DIV0
TCELL43:IMUX.IMUX.17.DELAYBUFG_GT13.RSTMASK
TCELL43:IMUX.IMUX.19.DELAYGTF_COMMON.BGRCALCTL_FS_1_4
TCELL43:IMUX.IMUX.20.DELAYGTF_COMMON.SDMDATA_FS_1_4
TCELL43:IMUX.IMUX.21.DELAYBUFG_GT13.DIV2
TCELL43:IMUX.IMUX.23.DELAYGTF_COMMON.QDPMASCANIN_FS10
TCELL43:IMUX.IMUX.24.DELAYBUFG_GT13.CEMASK
TCELL43:IMUX.IMUX.25.DELAYGTF_COMMON.BGRCALCTL_FS_1_3
TCELL43:IMUX.IMUX.26.DELAYGTF_COMMON.SDMDATA_FS_1_3
TCELL43:IMUX.IMUX.27.DELAYBUFG_GT13.DIV1
TCELL43:IMUX.IMUX.30.DELAYGTF_COMMON.QPLFBDIV_FS_1_0
TCELL43:IMUX.IMUX.31.DELAYGTF_COMMON.BGRCALCTL_FS_1_2
TCELL43:IMUX.IMUX.32.DELAYGTF_COMMON.SDMDATA_FS_1_2
TCELL43:IMUX.IMUX.33.DELAYBUFG_GT13.DIV0
TCELL43:IMUX.IMUX.34.DELAYGTF_COMMON.QPLFBDIV_FS_1_3
TCELL43:IMUX.IMUX.35.DELAYGTF_COMMON.SDMTOGGLE_FS_1
TCELL43:IMUX.IMUX.36.DELAYBUFG_GT12.RSTMASK
TCELL43:IMUX.IMUX.37.DELAYGTF_COMMON.BGRCALCTL_FS_1_1
TCELL43:IMUX.IMUX.38.DELAYGTF_COMMON.SDMDATA_FS_1_1
TCELL43:IMUX.IMUX.39.DELAYBUFG_GT12.DIV2
TCELL43:IMUX.IMUX.42.DELAYBUFG_GT12.CEMASK
TCELL43:IMUX.IMUX.43.DELAYGTF_COMMON.BGRCALCTL_FS_1_0
TCELL43:IMUX.IMUX.44.DELAYGTF_COMMON.SDMDATA_FS_1_0
TCELL43:IMUX.IMUX.45.DELAYBUFG_GT12.DIV1
TCELL43:IMUX.IMUX.46.DELAYGTF_COMMON.QDPMASCANIN_FS11
TCELL43:IMUX.IMUX.47.DELAYBUFG_GT12.DIV0
TCELL44:OUT.3.TMINGTF_COMMON.SDMTESTDATA_SF_1_13
TCELL44:OUT.11.TMINGTF_COMMON.SDMTESTDATA_SF_1_9
TCELL44:OUT.12.TMINGTF_COMMON.QDPMASCANOUT_SF6
TCELL44:OUT.13.TMINGTF_COMMON.QDPMASCANOUT_SF11
TCELL44:OUT.17.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_5
TCELL44:OUT.18.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_5
TCELL44:OUT.19.TMINGTF_COMMON.SDMTESTDATA_SF_1_5
TCELL44:OUT.22.TMINGTF_COMMON.QPLREFLOSS_SF_1
TCELL44:OUT.25.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_1
TCELL44:OUT.26.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_1
TCELL44:OUT.27.TMINGTF_COMMON.SDMTESTDATA_SF_1_1
TCELL44:OUT.30.TMINGTF_COMMON.SDMFINALOUT_SF_1_1
TCELL44:OUT.31.TMINGTF_COMMON.QDPMASCANOUT_SF9
TCELL44:IMUX.CTRL.0GTF_COMMON.QPLRESET_FS_1
TCELL44:IMUX.CTRL.3GTF_COMMON.QDPMASCANCLK_FS6
TCELL44:IMUX.IMUX.0.DELAYBUFG_GT17.RSTMASK
TCELL44:IMUX.IMUX.1.DELAYBUFG_GT17.DIV2
TCELL44:IMUX.IMUX.2.DELAYGTF_COMMON.SDMDATA_FS_1_15
TCELL44:IMUX.IMUX.3.DELAYBUFG_GT_SYNC6.CE_IN
TCELL44:IMUX.IMUX.4.DELAYBUFG_GT_SYNC5.CE_IN
TCELL44:IMUX.IMUX.5.DELAYGTF_COMMON.PWRDNBGB_FS_1
TCELL44:IMUX.IMUX.6.DELAYBUFG_GT17.CEMASK
TCELL44:IMUX.IMUX.7.DELAYGTF_COMMON.BGBYPASS_FS_1
TCELL44:IMUX.IMUX.8.DELAYGTF_COMMON.SDMDATA_FS_1_14
TCELL44:IMUX.IMUX.9.DELAYGTF_COMMON.QDPMASCANIN_FS9
TCELL44:IMUX.IMUX.10.DELAYBUFG_GT17.DIV1
TCELL44:IMUX.IMUX.11.DELAYGTF_COMMON.QPLPWRDN_FS_1
TCELL44:IMUX.IMUX.13.DELAYBUFG_GT17.DIV0
TCELL44:IMUX.IMUX.14.DELAYGTF_COMMON.SDMDATA_FS_1_13
TCELL44:IMUX.IMUX.15.DELAYGTF_COMMON.SDMWIDTH_FS_1_0
TCELL44:IMUX.IMUX.16.DELAYBUFG_GT16.RSTMASK
TCELL44:IMUX.IMUX.17.DELAYGTF_COMMON.SDMWIDTH_FS_1_1
TCELL44:IMUX.IMUX.18.DELAYGTF_COMMON.QDPMASCANENB_FS
TCELL44:IMUX.IMUX.19.DELAYBUFG_GT16.DIV2
TCELL44:IMUX.IMUX.20.DELAYGTF_COMMON.SDMDATA_FS_1_12
TCELL44:IMUX.IMUX.22.DELAYBUFG_GT16.CEMASK
TCELL44:IMUX.IMUX.23.DELAYGTF_COMMON.QPLFBDIV_FS_1_5
TCELL44:IMUX.IMUX.24.DELAYGTF_COMMON.QDPMASCANRSTEN_FS
TCELL44:IMUX.IMUX.26.DELAYGTF_COMMON.SDMDATA_FS_1_11
TCELL44:IMUX.IMUX.27.DELAYGTF_COMMON.QDPMASCANIN_FS12
TCELL44:IMUX.IMUX.28.DELAYBUFG_GT16.DIV1
TCELL44:IMUX.IMUX.30.DELAYGTF_COMMON.QPLFBDIV_FS_1_1
TCELL44:IMUX.IMUX.31.DELAYGTF_COMMON.QDPMASCANMODEB_FS
TCELL44:IMUX.IMUX.32.DELAYGTF_COMMON.SDMDATA_FS_1_10
TCELL44:IMUX.IMUX.33.DELAYGTF_COMMON.QPLREFDYN_FS_1_2
TCELL44:IMUX.IMUX.34.DELAYBUFG_GT16.DIV0
TCELL44:IMUX.IMUX.35.DELAYGTF_COMMON.QPLFBDIV_FS_1_6
TCELL44:IMUX.IMUX.36.DELAYBUFG_GT15.RSTMASK
TCELL44:IMUX.IMUX.37.DELAYBUFG_GT15.DIV2
TCELL44:IMUX.IMUX.38.DELAYGTF_COMMON.SDMDATA_FS_1_9
TCELL44:IMUX.IMUX.39.DELAYGTF_COMMON.QPLREFDYN_FS_1_1
TCELL44:IMUX.IMUX.40.DELAYBUFG_GT15.CEMASK
TCELL44:IMUX.IMUX.41.DELAYGTF_COMMON.QDPMASCANIN_FS13
TCELL44:IMUX.IMUX.43.DELAYBUFG_GT15.DIV1
TCELL44:IMUX.IMUX.44.DELAYGTF_COMMON.SDMDATA_FS_1_8
TCELL44:IMUX.IMUX.45.DELAYGTF_COMMON.QPLREFDYN_FS_1_0
TCELL44:IMUX.IMUX.46.DELAYBUFG_GT15.DIV0
TCELL44:IMUX.IMUX.47.DELAYGTF_COMMON.QPLFBDIV_FS_1_7
TCELL45:OUT.3.TMINGTF_COMMON.SDMTESTDATA_SF_1_14
TCELL45:OUT.11.TMINGTF_COMMON.SDMTESTDATA_SF_1_10
TCELL45:OUT.12.TMINGTF_COMMON.QDPMASCANOUT_SF7
TCELL45:OUT.13.TMINGTF_COMMON.QDPMASCANOUT_SF12
TCELL45:OUT.17.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_6
TCELL45:OUT.18.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_6
TCELL45:OUT.19.TMINGTF_COMMON.SDMTESTDATA_SF_1_6
TCELL45:OUT.22.TMINGTF_COMMON.MGTREFCLKFA_SF_1
TCELL45:OUT.25.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_2
TCELL45:OUT.26.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_2
TCELL45:OUT.27.TMINGTF_COMMON.SDMTESTDATA_SF_1_2
TCELL45:OUT.30.TMINGTF_COMMON.SDMFINALOUT_SF_1_2
TCELL45:IMUX.CTRL.0GTF_COMMON.SDMRESET_FS_1
TCELL45:IMUX.CTRL.3GTF_COMMON.QDPMASCANCLK_FS7
TCELL45:IMUX.CTRL.4GTF_COMMON.QPLLDMONCLK_FS_1
TCELL45:IMUX.CTRL.5GTF_COMMON.QDPMASCANCLK_FS13
TCELL45:IMUX.CTRL.6GTF_COMMON.QDPMASCANCLK_FS9
TCELL45:IMUX.IMUX.0.DELAYBUFG_GT20.RSTMASK
TCELL45:IMUX.IMUX.1.DELAYBUFG_GT20.DIV2
TCELL45:IMUX.IMUX.2.DELAYGTF_COMMON.SDMDATA_FS_1_23
TCELL45:IMUX.IMUX.3.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_7
TCELL45:IMUX.IMUX.4.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_7
TCELL45:IMUX.IMUX.5.DELAYBUFG_GT_SYNC10.CE_IN
TCELL45:IMUX.IMUX.6.DELAYBUFG_GT20.CEMASK
TCELL45:IMUX.IMUX.7.DELAYBUFG_GT20.DIV1
TCELL45:IMUX.IMUX.8.DELAYGTF_COMMON.SDMDATA_FS_1_22
TCELL45:IMUX.IMUX.9.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_6
TCELL45:IMUX.IMUX.10.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_6
TCELL45:IMUX.IMUX.13.DELAYBUFG_GT20.DIV0
TCELL45:IMUX.IMUX.14.DELAYGTF_COMMON.SDMDATA_FS_1_21
TCELL45:IMUX.IMUX.15.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_5
TCELL45:IMUX.IMUX.16.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_5
TCELL45:IMUX.IMUX.18.DELAYBUFG_GT19.RSTMASK
TCELL45:IMUX.IMUX.19.DELAYBUFG_GT19.DIV2
TCELL45:IMUX.IMUX.20.DELAYGTF_COMMON.SDMDATA_FS_1_20
TCELL45:IMUX.IMUX.21.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_4
TCELL45:IMUX.IMUX.22.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_4
TCELL45:IMUX.IMUX.24.DELAYBUFG_GT19.CEMASK
TCELL45:IMUX.IMUX.25.DELAYBUFG_GT19.DIV1
TCELL45:IMUX.IMUX.26.DELAYGTF_COMMON.SDMDATA_FS_1_19
TCELL45:IMUX.IMUX.27.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_3
TCELL45:IMUX.IMUX.28.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_3
TCELL45:IMUX.IMUX.29.DELAYGTF_COMMON.QPLLKDETEN_FS_1
TCELL45:IMUX.IMUX.31.DELAYBUFG_GT19.DIV0
TCELL45:IMUX.IMUX.32.DELAYGTF_COMMON.SDMDATA_FS_1_18
TCELL45:IMUX.IMUX.33.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_2
TCELL45:IMUX.IMUX.34.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_2
TCELL45:IMUX.IMUX.36.DELAYBUFG_GT18.RSTMASK
TCELL45:IMUX.IMUX.37.DELAYBUFG_GT18.DIV2
TCELL45:IMUX.IMUX.38.DELAYGTF_COMMON.SDMDATA_FS_1_17
TCELL45:IMUX.IMUX.39.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_1
TCELL45:IMUX.IMUX.40.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_1
TCELL45:IMUX.IMUX.42.DELAYBUFG_GT18.CEMASK
TCELL45:IMUX.IMUX.43.DELAYBUFG_GT18.DIV1
TCELL45:IMUX.IMUX.44.DELAYGTF_COMMON.SDMDATA_FS_1_16
TCELL45:IMUX.IMUX.45.DELAYGTF_COMMON.QDPMAPINRSVD_FS_1_0
TCELL45:IMUX.IMUX.46.DELAYGTF_COMMON.QDCMRSVDPIN_FS_1_0
TCELL45:IMUX.IMUX.47.DELAYBUFG_GT18.DIV0
TCELL46:OUT.3.TMINGTF_COMMON.QPLFREQLOCK_SF_1
TCELL46:OUT.11.TMINGTF_COMMON.SDMTESTDATA_SF_1_11
TCELL46:OUT.12.TMINGTF_COMMON.QDPMASCANOUT_SF8
TCELL46:OUT.13.TMINGTF_COMMON.QDPMASCANOUT_SF13
TCELL46:OUT.17.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_7
TCELL46:OUT.18.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_7
TCELL46:OUT.19.TMINGTF_COMMON.SDMTESTDATA_SF_1_7
TCELL46:OUT.22.TMINGTF_COMMON.QPLFBLOSS_SF_1
TCELL46:OUT.25.TMINGTF_COMMON.QDCMRSVDOUT_SF_1_3
TCELL46:OUT.26.TMINGTF_COMMON.DMONOUT_QDCM_SF_1_3
TCELL46:OUT.27.TMINGTF_COMMON.SDMTESTDATA_SF_1_3
TCELL46:OUT.30.TMINGTF_COMMON.SDMFINALOUT_SF_1_3
TCELL46:IMUX.CTRL.3GTF_COMMON.QDPMASCANCLK_FS8
TCELL46:IMUX.CTRL.4GTF_COMMON.QDCLKPINSPRD1_FS_1
TCELL46:IMUX.CTRL.5GTF_COMMON.QDCLKPINSPRD0_FS_1
TCELL46:IMUX.IMUX.0.DELAYBUFG_GT23.RSTMASK
TCELL46:IMUX.IMUX.1.DELAYBUFG_GT23.DIV2
TCELL46:IMUX.IMUX.2.DELAYGTF_COMMON.REFCLKPD_FS_1
TCELL46:IMUX.IMUX.3.DELAYBUFG_GT_SYNC9.CE_IN
TCELL46:IMUX.IMUX.4.DELAYBUFG_GT_SYNC8.CE_IN
TCELL46:IMUX.IMUX.5.DELAYBUFG_GT_SYNC7.CE_IN
TCELL46:IMUX.IMUX.6.DELAYBUFG_GT23.CEMASK
TCELL46:IMUX.IMUX.7.DELAYBUFG_GT23.DIV1
TCELL46:IMUX.IMUX.8.DELAYABUS_SWITCH_GT4.TEST_ANALOGBUS_SEL_B
TCELL46:IMUX.IMUX.9.DELAYBUFG_GT_SYNC10.RST_IN
TCELL46:IMUX.IMUX.10.DELAYBUFG_GT_SYNC9.RST_IN
TCELL46:IMUX.IMUX.11.DELAYBUFG_GT_SYNC8.RST_IN
TCELL46:IMUX.IMUX.12.DELAYBUFG_GT_SYNC7.RST_IN
TCELL46:IMUX.IMUX.13.DELAYBUFG_GT23.DIV0
TCELL46:IMUX.IMUX.14.DELAYBUFG_GT_SYNC6.RST_IN
TCELL46:IMUX.IMUX.15.DELAYBUFG_GT_SYNC5.RST_IN
TCELL46:IMUX.IMUX.17.DELAYBUFG_GT_SYNC13.CE_IN
TCELL46:IMUX.IMUX.18.DELAYBUFG_GT22.RSTMASK
TCELL46:IMUX.IMUX.19.DELAYBUFG_GT22.DIV2
TCELL46:IMUX.IMUX.20.DELAYGTF_COMMON.QDPMASCANIN_FS8
TCELL46:IMUX.IMUX.21.DELAYGTF_COMMON.QDPINSPRD_FS_1_4
TCELL46:IMUX.IMUX.23.DELAYBUFG_GT_SYNC13.RST_IN
TCELL46:IMUX.IMUX.24.DELAYBUFG_GT22.CEMASK
TCELL46:IMUX.IMUX.25.DELAYBUFG_GT22.DIV1
TCELL46:IMUX.IMUX.26.DELAYGTF_COMMON.QDPMASCANIN_FS7
TCELL46:IMUX.IMUX.27.DELAYGTF_COMMON.QDPINSPRD_FS_1_3
TCELL46:IMUX.IMUX.29.DELAYBUFG_GT_SYNC14.CE_IN
TCELL46:IMUX.IMUX.31.DELAYBUFG_GT22.DIV0
TCELL46:IMUX.IMUX.32.DELAYGTF_COMMON.QDPMASCANIN_FS6
TCELL46:IMUX.IMUX.33.DELAYGTF_COMMON.QDPINSPRD_FS_1_2
TCELL46:IMUX.IMUX.35.DELAYBUFG_GT_SYNC14.RST_IN
TCELL46:IMUX.IMUX.36.DELAYBUFG_GT21.RSTMASK
TCELL46:IMUX.IMUX.37.DELAYBUFG_GT21.DIV2
TCELL46:IMUX.IMUX.38.DELAYGTF_COMMON.QDPMASCANIN_FS5
TCELL46:IMUX.IMUX.39.DELAYGTF_COMMON.QDPINSPRD_FS_1_1
TCELL46:IMUX.IMUX.42.DELAYBUFG_GT21.CEMASK
TCELL46:IMUX.IMUX.43.DELAYBUFG_GT21.DIV1
TCELL46:IMUX.IMUX.44.DELAYGTF_COMMON.SDMDATA_FS_1_24
TCELL46:IMUX.IMUX.45.DELAYGTF_COMMON.QDPINSPRD_FS_1_0
TCELL46:IMUX.IMUX.47.DELAYBUFG_GT21.DIV0
TCELL47:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF7
TCELL47:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF15
TCELL47:OUT.21.TMINGTF_CHANNEL3.RXRESETDONE_SF
TCELL47:OUT.23.TMINGTF_CHANNEL3.RXPRBSERR_SF
TCELL47:OUT.24.TMINGTF_CHANNEL3.STAT_RX_INTERNAL_LOCAL_FAULT_SF
TCELL47:OUT.25.TMINGTF_CHANNEL3.STAT_RX_BAD_FCS_SF
TCELL47:OUT.26.TMINGTF_CHANNEL3.STAT_RX_STOMPED_FCS_SF
TCELL47:OUT.29.TMINGTF_CHANNEL3.STAT_RX_INRANGEERR_SF
TCELL47:OUT.30.TMINGTF_CHANNEL3.STAT_RX_LOCAL_FAULT_SF
TCELL47:OUT.31.TMINGTF_CHANNEL3.STAT_RX_MULTICAST_SF
TCELL47:IMUX.CTRL.2GTF_CHANNEL3.CKPINRSRVD0_FS
TCELL47:IMUX.CTRL.3GTF_CHANNEL3.CKPINRSRVD1_FS
TCELL47:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS15
TCELL47:IMUX.IMUX.2.DELAYGTF_CHANNEL3.RXSLIPOUTCLK_FS
TCELL47:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS15
TCELL47:IMUX.IMUX.5.DELAYGTF_CHANNEL3.RXDABYPASS_FS
TCELL47:IMUX.IMUX.6.DELAYGTF_CHANNEL3.LPMGCOVREN_FS
TCELL47:IMUX.IMUX.7.DELAYGTF_CHANNEL3.RXDAOVREN_FS
TCELL47:IMUX.IMUX.8.DELAYGTF_CHANNEL3.LPMGCHOLD_FS
TCELL47:IMUX.IMUX.9.DELAYGTF_CHANNEL3.DFEH13OVREN_FS
TCELL47:IMUX.IMUX.10.DELAYGTF_CHANNEL3.LPMKLHOLD_FS
TCELL47:IMUX.IMUX.11.DELAYGTF_CHANNEL3.RXCKCALSTART_FS4
TCELL47:IMUX.IMUX.12.DELAYGTF_CHANNEL3.DFEH10OVREN_FS
TCELL47:IMUX.IMUX.13.DELAYGTF_CHANNEL3.DFECFOKCFNUM_FS3
TCELL47:IMUX.IMUX.14.DELAYGTF_CHANNEL3.CDRSTEPSQ_FS
TCELL47:IMUX.IMUX.15.DELAYGTF_CHANNEL3.DFEH7OVREN_FS
TCELL47:IMUX.IMUX.16.DELAYGTF_CHANNEL3.CDRSTEPSX_FS
TCELL47:IMUX.IMUX.18.DELAYGTF_CHANNEL3.DFECFOKCFNUM_FS1
TCELL47:IMUX.IMUX.19.DELAYGTF_CHANNEL3.CDRSTEPDIR_FS
TCELL47:IMUX.IMUX.20.DELAYGTF_CHANNEL3.DFEH7HOLD_FS
TCELL47:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS14
TCELL47:IMUX.IMUX.23.DELAYGTF_CHANNEL3.RXCKCALSTART_FS6
TCELL47:IMUX.IMUX.24.DELAYGTF_CHANNEL3.DFECFOKCFNUM_FS0
TCELL47:IMUX.IMUX.26.DELAYGTF_CHANNEL3.DFEH4OVREN_FS
TCELL47:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS14
TCELL47:IMUX.IMUX.29.DELAYGTF_CHANNEL3.RXSLIPPMA_FS
TCELL47:IMUX.IMUX.30.DELAYGTF_CHANNEL3.RXPRBSPTN_FS2
TCELL47:IMUX.IMUX.31.DELAYGTF_CHANNEL3.RXDAALGNEN_FS
TCELL47:IMUX.IMUX.32.DELAYGTF_CHANNEL3.DFEH4HOLD_FS
TCELL47:IMUX.IMUX.33.DELAYGTF_CHANNEL3.RXCKCALSTART_FS5
TCELL47:IMUX.IMUX.35.DELAYGTF_CHANNEL3.LPMKHHOLD_FS
TCELL47:IMUX.IMUX.36.DELAYGTF_CHANNEL3.RXPRBSPTN_FS1
TCELL47:IMUX.IMUX.38.DELAYGTF_CHANNEL3.RXPWRDN_FS1
TCELL47:IMUX.IMUX.39.DELAYGTF_CHANNEL3.DFEH13HOLD_FS
TCELL47:IMUX.IMUX.41.DELAYGTF_CHANNEL3.LPMKLOVREN_FS
TCELL47:IMUX.IMUX.42.DELAYGTF_CHANNEL3.RXPRBSPTN_FS0
TCELL47:IMUX.IMUX.44.DELAYGTF_CHANNEL3.SCANIN_FS18
TCELL47:IMUX.IMUX.45.DELAYGTF_CHANNEL3.DFEH10HOLD_FS
TCELL47:IMUX.IMUX.46.DELAYGTF_CHANNEL3.RXPRBSPTN_FS3
TCELL47:IMUX.IMUX.47.DELAYGTF_CHANNEL3.DFECFOKCFNUM_FS2
TCELL48:OUT.0.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF8
TCELL48:OUT.1.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF7
TCELL48:OUT.2.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF6
TCELL48:OUT.3.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF5
TCELL48:OUT.4.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF4
TCELL48:OUT.5.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF3
TCELL48:OUT.6.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF2
TCELL48:OUT.7.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF1
TCELL48:OUT.8.TMINGTF_CHANNEL3.STAT_RX_PAUSE_QUANTA_SF0
TCELL48:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF6
TCELL48:OUT.10.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF8
TCELL48:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF14
TCELL48:OUT.12.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF7
TCELL48:OUT.13.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF6
TCELL48:OUT.14.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF5
TCELL48:OUT.15.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF4
TCELL48:OUT.16.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF3
TCELL48:OUT.17.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF2
TCELL48:OUT.18.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF1
TCELL48:OUT.20.TMINGTF_CHANNEL3.STAT_RX_PAUSE_REQ_SF0
TCELL48:OUT.21.TMINGTF_CHANNEL3.PMASCANOUT_SF17
TCELL48:OUT.22.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF8
TCELL48:OUT.23.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF7
TCELL48:OUT.24.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF6
TCELL48:OUT.25.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF5
TCELL48:OUT.26.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF4
TCELL48:OUT.27.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF3
TCELL48:OUT.28.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF2
TCELL48:OUT.29.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF1
TCELL48:OUT.30.TMINGTF_CHANNEL3.STAT_RX_PAUSE_VALID_SF0
TCELL48:OUT.31.TMINGTF_CHANNEL3.STAT_RX_PKT_SF
TCELL48:IMUX.CTRL.0GTF_CHANNEL3.RXDASOFTRESET_FS
TCELL48:IMUX.CTRL.7GTF_CHANNEL3.CDRPHRESET_FS
TCELL48:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS13
TCELL48:IMUX.IMUX.1.DELAYGTF_CHANNEL3.DFEDOUTMODE_FS1
TCELL48:IMUX.IMUX.2.DELAYGTF_CHANNEL3.DFEVPHOLD_FS
TCELL48:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS13
TCELL48:IMUX.IMUX.4.DELAYGTF_CHANNEL3.DFEDOUTMODE_FS0
TCELL48:IMUX.IMUX.6.DELAYGTF_CHANNEL3.DFEH15OVREN_FS
TCELL48:IMUX.IMUX.7.DELAYGTF_CHANNEL3.RXLPMEN_FS
TCELL48:IMUX.IMUX.8.DELAYGTF_CHANNEL3.LPMKHOVREN_FS
TCELL48:IMUX.IMUX.9.DELAYGTF_CHANNEL3.DFEH12OVREN_FS
TCELL48:IMUX.IMUX.10.DELAYGTF_CHANNEL3.RXSLVSYNCEN_FS
TCELL48:IMUX.IMUX.12.DELAYGTF_CHANNEL3.DFEH9OVREN_FS
TCELL48:IMUX.IMUX.13.DELAYGTF_CHANNEL3.LPMOSOVREN_FS
TCELL48:IMUX.IMUX.15.DELAYGTF_CHANNEL3.DFEH6OVREN_FS
TCELL48:IMUX.IMUX.18.DELAYGTF_CHANNEL3.RXCKCALSTART_FS2
TCELL48:IMUX.IMUX.19.DELAYGTF_CHANNEL3.DFEYEN_FS
TCELL48:IMUX.IMUX.20.DELAYGTF_CHANNEL3.DFEH6HOLD_FS
TCELL48:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS12
TCELL48:IMUX.IMUX.22.DELAYGTF_CHANNEL3.LPMOSHOLD_FS
TCELL48:IMUX.IMUX.25.DELAYGTF_CHANNEL3.DFEVPOVREN_FS
TCELL48:IMUX.IMUX.26.DELAYGTF_CHANNEL3.DFEH3OVREN_FS
TCELL48:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS12
TCELL48:IMUX.IMUX.29.DELAYGTF_CHANNEL3.RXMSTRSETPHDONE_FS
TCELL48:IMUX.IMUX.32.DELAYGTF_CHANNEL3.DFEH3HOLD_FS
TCELL48:IMUX.IMUX.33.DELAYGTF_CHANNEL3.DFEH15HOLD_FS
TCELL48:IMUX.IMUX.35.DELAYGTF_CHANNEL3.RXUSRRDY_FS
TCELL48:IMUX.IMUX.38.DELAYGTF_CHANNEL3.RXPWRDN_FS0
TCELL48:IMUX.IMUX.39.DELAYGTF_CHANNEL3.DFEH12HOLD_FS
TCELL48:IMUX.IMUX.41.DELAYGTF_CHANNEL3.RXSYNCFSMMASTER_FS
TCELL48:IMUX.IMUX.43.DELAYGTF_CHANNEL3.RXCKCALSTART_FS3
TCELL48:IMUX.IMUX.44.DELAYGTF_CHANNEL3.SCANIN_FS17
TCELL48:IMUX.IMUX.45.DELAYGTF_CHANNEL3.DFEH9HOLD_FS
TCELL49:OUT.0.TMINGTF_CHANNEL3.STAT_RX_PKT_ERR_SF
TCELL49:OUT.1.TMINGTF_CHANNEL3.STAT_RX_RECEIVED_LOCAL_FAULT_SF
TCELL49:OUT.2.TMINGTF_CHANNEL3.STAT_RX_REMOTE_FAULT_SF
TCELL49:OUT.3.TMINGTF_CHANNEL3.STAT_RX_STATUS_SF
TCELL49:OUT.4.TMINGTF_CHANNEL3.STAT_RX_TEST_PATTERN_MISMATCH_SF
TCELL49:OUT.5.TMINGTF_CHANNEL3.STAT_RX_TRUNCATED_SF
TCELL49:OUT.6.TMINGTF_CHANNEL3.STAT_RX_UNICAST_SF
TCELL49:OUT.7.TMINGTF_CHANNEL3.STAT_RX_VALID_CTRL_CODE_SF
TCELL49:OUT.8.TMINGTF_CHANNEL3.STAT_RX_VLAN_SF
TCELL49:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF5
TCELL49:OUT.10.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF63
TCELL49:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF13
TCELL49:OUT.12.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF62
TCELL49:OUT.13.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF61
TCELL49:OUT.14.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF60
TCELL49:OUT.15.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF59
TCELL49:OUT.16.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF58
TCELL49:OUT.17.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF57
TCELL49:OUT.18.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF56
TCELL49:OUT.19.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF55
TCELL49:OUT.20.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF54
TCELL49:OUT.21.TMINGTF_CHANNEL3.PMASCANOUT_SF16
TCELL49:OUT.22.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF53
TCELL49:OUT.23.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF52
TCELL49:OUT.24.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF51
TCELL49:OUT.25.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF50
TCELL49:OUT.26.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF49
TCELL49:OUT.27.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF48
TCELL49:OUT.28.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF47
TCELL49:OUT.29.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF46
TCELL49:OUT.30.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF45
TCELL49:OUT.31.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF44
TCELL49:IMUX.CTRL.0GTF_CHANNEL3.RXPROGDIVRESET_FS
TCELL49:IMUX.CTRL.2GTF_CHANNEL3.PMASCANCLK0_FS
TCELL49:IMUX.CTRL.3GTF_CHANNEL3.PMASCANCLK1_FS
TCELL49:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS11
TCELL49:IMUX.IMUX.1.DELAYGTF_CHANNEL3.DFEGCOVREN_FS
TCELL49:IMUX.IMUX.2.DELAYGTF_CHANNEL3.DFEUTHOLD_FS
TCELL49:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS11
TCELL49:IMUX.IMUX.4.DELAYGTF_CHANNEL3.DFEKLOVREN_FS
TCELL49:IMUX.IMUX.6.DELAYGTF_CHANNEL3.DFEH14OVREN_FS
TCELL49:IMUX.IMUX.9.DELAYGTF_CHANNEL3.DFEH11OVREN_FS
TCELL49:IMUX.IMUX.10.DELAYGTF_CHANNEL3.RXCKCALSTART_FS1
TCELL49:IMUX.IMUX.12.DELAYGTF_CHANNEL3.DFEH8OVREN_FS
TCELL49:IMUX.IMUX.15.DELAYGTF_CHANNEL3.DFEH5OVREN_FS
TCELL49:IMUX.IMUX.17.DELAYGTF_CHANNEL3.DFEGCHOLD_FS
TCELL49:IMUX.IMUX.18.DELAYGTF_CHANNEL3.RXCKCALSTART_FS0
TCELL49:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TXMUXDCDEXHOLD_FS
TCELL49:IMUX.IMUX.20.DELAYGTF_CHANNEL3.DFEH5HOLD_FS
TCELL49:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS10
TCELL49:IMUX.IMUX.23.DELAYGTF_CHANNEL3.DFEKLHOLD_FS
TCELL49:IMUX.IMUX.24.DELAYGTF_CHANNEL3.DFECFOKHOLD_FS
TCELL49:IMUX.IMUX.25.DELAYGTF_CHANNEL3.DFEUTOVREN_FS
TCELL49:IMUX.IMUX.26.DELAYGTF_CHANNEL3.DFEH2OVREN_FS
TCELL49:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS10
TCELL49:IMUX.IMUX.32.DELAYGTF_CHANNEL3.DFEH2HOLD_FS
TCELL49:IMUX.IMUX.33.DELAYGTF_CHANNEL3.DFEH14HOLD_FS
TCELL49:IMUX.IMUX.35.DELAYGTF_CHANNEL3.CFOKRESET_FS
TCELL49:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TXMUXDCDORWREN_FS
TCELL49:IMUX.IMUX.38.DELAYGTF_CHANNEL3.RXPLLCKSEL_FS1
TCELL49:IMUX.IMUX.39.DELAYGTF_CHANNEL3.DFEH11HOLD_FS
TCELL49:IMUX.IMUX.40.DELAYGTF_CHANNEL3.QPLLFREQLOCK1_FS
TCELL49:IMUX.IMUX.41.DELAYGTF_CHANNEL3.OSHOLD_FS
TCELL49:IMUX.IMUX.42.DELAYGTF_CHANNEL3.CKOKRESET_FS
TCELL49:IMUX.IMUX.44.DELAYGTF_CHANNEL3.SCANIN_FS16
TCELL49:IMUX.IMUX.45.DELAYGTF_CHANNEL3.DFEH8HOLD_FS
TCELL49:IMUX.IMUX.47.DELAYGTF_CHANNEL3.AFECFOKEN_FS
TCELL50:OUT.0.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF43
TCELL50:OUT.1.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF42
TCELL50:OUT.2.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF41
TCELL50:OUT.3.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF40
TCELL50:OUT.4.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF39
TCELL50:OUT.5.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF38
TCELL50:OUT.6.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF37
TCELL50:OUT.7.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF36
TCELL50:OUT.8.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF35
TCELL50:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF4
TCELL50:OUT.10.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF34
TCELL50:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF12
TCELL50:OUT.12.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF33
TCELL50:OUT.13.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF32
TCELL50:OUT.14.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF31
TCELL50:OUT.15.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF30
TCELL50:OUT.16.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF29
TCELL50:OUT.17.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF28
TCELL50:OUT.18.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF27
TCELL50:OUT.19.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF26
TCELL50:OUT.20.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF25
TCELL50:OUT.21.TMINGTF_CHANNEL3.PMASCANOUT_SF15
TCELL50:OUT.22.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF24
TCELL50:OUT.23.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF23
TCELL50:OUT.24.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF22
TCELL50:OUT.25.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF21
TCELL50:OUT.26.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF20
TCELL50:OUT.27.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF19
TCELL50:OUT.28.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF18
TCELL50:OUT.29.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF17
TCELL50:OUT.30.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF16
TCELL50:OUT.31.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF15
TCELL50:IMUX.CTRL.0GTF_CHANNEL3.RCODARESET_FS
TCELL50:IMUX.CTRL.2GTF_CHANNEL3.RXUSRCLK_FS
TCELL50:IMUX.CTRL.3GTF_CHANNEL3.RXUSRCLK2_FS
TCELL50:IMUX.CTRL.7GTF_CHANNEL3.GTRXRST_FS
TCELL50:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS9
TCELL50:IMUX.IMUX.1.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS7
TCELL50:IMUX.IMUX.2.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS6
TCELL50:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS9
TCELL50:IMUX.IMUX.4.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS3
TCELL50:IMUX.IMUX.5.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS2
TCELL50:IMUX.IMUX.6.DELAYGTF_CHANNEL3.RXOUTCKCTL_FS2
TCELL50:IMUX.IMUX.9.DELAYGTF_CHANNEL3.RXOUTCKCTL_FS1
TCELL50:IMUX.IMUX.12.DELAYGTF_CHANNEL3.DFECFOKFPULSE_FS
TCELL50:IMUX.IMUX.15.DELAYGTF_CHANNEL3.OSOVREN_FS
TCELL50:IMUX.IMUX.19.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS8
TCELL50:IMUX.IMUX.20.DELAYGTF_CHANNEL3.RXRESET_FS
TCELL50:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS8
TCELL50:IMUX.IMUX.23.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS5
TCELL50:IMUX.IMUX.25.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS4
TCELL50:IMUX.IMUX.26.DELAYGTF_CHANNEL3.SCANIN_FS15
TCELL50:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS8
TCELL50:IMUX.IMUX.29.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS1
TCELL50:IMUX.IMUX.31.DELAYGTF_CHANNEL3.CTL_RX_PAUSE_ACK_FS0
TCELL50:IMUX.IMUX.32.DELAYGTF_CHANNEL3.SCANIN_FS14
TCELL50:IMUX.IMUX.33.DELAYGTF_CHANNEL3.CDROVREN_FS
TCELL50:IMUX.IMUX.37.DELAYGTF_CHANNEL3.RXSYSCKSEL_FS0
TCELL50:IMUX.IMUX.38.DELAYGTF_CHANNEL3.RXPLLCKSEL_FS0
TCELL50:IMUX.IMUX.39.DELAYGTF_CHANNEL3.DFECFOKFEN_FS
TCELL50:IMUX.IMUX.45.DELAYGTF_CHANNEL3.DFECFOKOVREN_FS
TCELL51:OUT.0.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF14
TCELL51:OUT.1.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF13
TCELL51:OUT.2.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF12
TCELL51:OUT.3.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF11
TCELL51:OUT.4.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF10
TCELL51:OUT.5.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF9
TCELL51:OUT.6.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF8
TCELL51:OUT.7.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF7
TCELL51:OUT.8.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF6
TCELL51:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF3
TCELL51:OUT.10.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF5
TCELL51:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF11
TCELL51:OUT.12.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF4
TCELL51:OUT.13.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF3
TCELL51:OUT.14.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF2
TCELL51:OUT.15.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF1
TCELL51:OUT.16.TMINGTF_CHANNEL3.RX_AXIS_TDATA_SF0
TCELL51:OUT.17.TMINGTF_CHANNEL3.RX_AXIS_TERR_SF
TCELL51:OUT.18.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF7
TCELL51:OUT.19.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF6
TCELL51:OUT.20.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF5
TCELL51:OUT.21.TMINGTF_CHANNEL3.PMASCANOUT_SF14
TCELL51:OUT.22.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF4
TCELL51:OUT.23.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF3
TCELL51:OUT.24.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF2
TCELL51:OUT.25.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF1
TCELL51:OUT.26.TMINGTF_CHANNEL3.RX_AXIS_TLAST_SF0
TCELL51:OUT.27.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF7
TCELL51:OUT.28.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF6
TCELL51:OUT.29.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF5
TCELL51:OUT.30.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF4
TCELL51:OUT.31.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF3
TCELL51:IMUX.CTRL.0GTF_CHANNEL3.RXPMARESET_FS
TCELL51:IMUX.CTRL.2GTF_CHANNEL3.TSTCLK0_FS
TCELL51:IMUX.CTRL.3GTF_CHANNEL3.TSTCLK1_FS
TCELL51:IMUX.CTRL.5GTF_CHANNEL3.PMASCANCLK8_FS
TCELL51:IMUX.CTRL.7GTF_CHANNEL3.CDRFRRESET_FS
TCELL51:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS7
TCELL51:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS7
TCELL51:IMUX.IMUX.6.DELAYGTF_CHANNEL3.TCOINITSET_FS
TCELL51:IMUX.IMUX.9.DELAYGTF_CHANNEL3.RXOUTCKCTL_FS0
TCELL51:IMUX.IMUX.11.DELAYGTF_CHANNEL3.RXCOSETPHS_FS
TCELL51:IMUX.IMUX.12.DELAYGTF_CHANNEL3.RXCOALGNEN_FS
TCELL51:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS6
TCELL51:IMUX.IMUX.20.DELAYGTF_CHANNEL3.RXPOLARITY_FS
TCELL51:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS6
TCELL51:IMUX.IMUX.22.DELAYGTF_CHANNEL3.PRBSCNTRST_FS
TCELL51:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS6
TCELL51:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TXRESET_FS
TCELL51:IMUX.IMUX.32.DELAYGTF_CHANNEL3.GATERXELECIDLE_FS1
TCELL51:IMUX.IMUX.33.DELAYGTF_CHANNEL3.CDRHOLD_FS
TCELL51:IMUX.IMUX.34.DELAYGTF_CHANNEL3.TXSYNCFSMMASTER_FS
TCELL51:IMUX.IMUX.38.DELAYGTF_CHANNEL3.RXSYSCKSEL_FS1
TCELL51:IMUX.IMUX.40.DELAYGTF_CHANNEL3.GATERXELECIDLE_FS0
TCELL51:IMUX.IMUX.45.DELAYGTF_CHANNEL3.RCODAPWDN_FS
TCELL52:OUT.0.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF2
TCELL52:OUT.1.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF1
TCELL52:OUT.2.TMINGTF_CHANNEL3.RX_AXIS_TPRE_SF0
TCELL52:OUT.3.TMINGTF_CHANNEL3.RX_AXIS_TSOF_SF1
TCELL52:OUT.4.TMINGTF_CHANNEL3.RX_AXIS_TSOF_SF0
TCELL52:OUT.5.TMINGTF_CHANNEL3.RX_AXIS_TTERM_SF4
TCELL52:OUT.6.TMINGTF_CHANNEL3.RX_AXIS_TTERM_SF3
TCELL52:OUT.7.TMINGTF_CHANNEL3.RX_AXIS_TTERM_SF2
TCELL52:OUT.8.TMINGTF_CHANNEL3.RX_AXIS_TTERM_SF1
TCELL52:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF2
TCELL52:OUT.10.TMINGTF_CHANNEL3.RX_AXIS_TTERM_SF0
TCELL52:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF10
TCELL52:OUT.12.TMINGTF_CHANNEL3.RX_AXIS_TVALID_SF
TCELL52:OUT.13.TMINGTF_CHANNEL3.RX_BITSLIP_SF
TCELL52:OUT.14.TMINGTF_CHANNEL3.RX_GB_SEQ_START_SF
TCELL52:OUT.15.TMINGTF_CHANNEL3.RX_PTP_SOP_SF
TCELL52:OUT.16.TMINGTF_CHANNEL3.RX_PTP_SOP_POS_SF
TCELL52:OUT.17.TMINGTF_CHANNEL3.STAT_RX_BAD_CODE_SF
TCELL52:OUT.18.TMINGTF_CHANNEL3.STAT_RX_BAD_SFD_SF
TCELL52:OUT.19.TMINGTF_CHANNEL3.STAT_RX_BAD_PREAMBLE_SF
TCELL52:OUT.20.TMINGTF_CHANNEL3.STAT_RX_BLOCK_LOCK_SF
TCELL52:OUT.21.TMINGTF_CHANNEL3.PMASCANOUT_SF13
TCELL52:OUT.22.TMINGTF_CHANNEL3.STAT_RX_BROADCAST_SF
TCELL52:OUT.23.TMINGTF_CHANNEL3.RXRECCLKPCS_SF
TCELL52:OUT.24.TMINGTF_CHANNEL3.STAT_RX_BYTES_SF3
TCELL52:OUT.25.TMINGTF_CHANNEL3.STAT_RX_BYTES_SF2
TCELL52:OUT.26.TMINGTF_CHANNEL3.STAT_RX_BYTES_SF1
TCELL52:OUT.27.TMINGTF_CHANNEL3.STAT_RX_BYTES_SF0
TCELL52:OUT.28.TMINGTF_CHANNEL3.STAT_RX_FCS_ERR_SF
TCELL52:OUT.29.TMINGTF_CHANNEL3.STAT_RX_FRAMING_ERR_SF
TCELL52:OUT.30.TMINGTF_CHANNEL3.STAT_RX_GOT_SIGNAL_OS_SF
TCELL52:OUT.31.TMINGTF_CHANNEL3.STAT_RX_HI_BER_SF
TCELL52:IMUX.CTRL.2GTF_CHANNEL3.SCANCLK_FS
TCELL52:IMUX.CTRL.7GTF_CHANNEL3.DFERESET_FS
TCELL52:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS5
TCELL52:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS5
TCELL52:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TCOUPDNFROUT_FS
TCELL52:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS5
TCELL52:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TXCOPIALGNEN_FS
TCELL52:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS4
TCELL52:IMUX.IMUX.22.DELAYGTF_CHANNEL3.TXDRVAMP_FS3
TCELL52:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS4
TCELL52:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TCODAPWDN_FS
TCELL52:IMUX.IMUX.32.DELAYGTF_CHANNEL3.TCODARESET_FS
TCELL52:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXELECIDLE_FS
TCELL52:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TXDCCSTART_FS
TCELL52:IMUX.IMUX.40.DELAYGTF_CHANNEL3.TXDRVAMP_FS4
TCELL52:IMUX.IMUX.44.DELAYGTF_CHANNEL3.RESETOVRD_FS
TCELL52:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TXCOPISETPHS_FS
TCELL53:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF1
TCELL53:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF9
TCELL53:OUT.16.TMINGTF_CHANNEL3.STAT_TX_UNICAST_SF
TCELL53:OUT.17.TMINGTF_CHANNEL3.STAT_TX_MULTICAST_SF
TCELL53:OUT.18.TMINGTF_CHANNEL3.STAT_TX_BROADCAST_SF
TCELL53:OUT.19.TMINGTF_CHANNEL3.STAT_TX_VLAN_SF
TCELL53:OUT.20.TMINGTF_CHANNEL3.STAT_TX_BAD_FCS_SF
TCELL53:OUT.23.TMINGTF_CHANNEL3.RXRECCLK_SF
TCELL53:OUT.25.TMINGTF_CHANNEL3.CDRLOCK_SF
TCELL53:OUT.26.TMINGTF_CHANNEL3.STAT_TX_BYTES_SF3
TCELL53:OUT.27.TMINGTF_CHANNEL3.STAT_TX_BYTES_SF2
TCELL53:OUT.28.TMINGTF_CHANNEL3.STAT_TX_BYTES_SF1
TCELL53:OUT.29.TMINGTF_CHANNEL3.STAT_TX_BYTES_SF0
TCELL53:OUT.30.TMINGTF_CHANNEL3.STAT_TX_FCS_ERR_SF
TCELL53:OUT.31.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF8
TCELL53:IMUX.CTRL.2GTF_CHANNEL3.TCOCLKFSMFROUT_FS
TCELL53:IMUX.CTRL.4GTF_CHANNEL3.PMASCANCLK7_FS
TCELL53:IMUX.CTRL.5GTF_CHANNEL3.PMASCANCLK6_FS
TCELL53:IMUX.CTRL.7GTF_CHANNEL3.TXPMARESET_FS
TCELL53:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS3
TCELL53:IMUX.IMUX.2.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS8
TCELL53:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS3
TCELL53:IMUX.IMUX.4.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS5
TCELL53:IMUX.IMUX.5.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS4
TCELL53:IMUX.IMUX.7.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS2
TCELL53:IMUX.IMUX.8.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS1
TCELL53:IMUX.IMUX.9.DELAYGTF_CHANNEL3.CTL_TX_RESEND_PAUSE_FS
TCELL53:IMUX.IMUX.10.DELAYGTF_CHANNEL3.CTL_TX_SEND_IDLE_FS
TCELL53:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXEMPPOS_FS4
TCELL53:IMUX.IMUX.12.DELAYGTF_CHANNEL3.CTL_TX_SEND_RFI_FS
TCELL53:IMUX.IMUX.13.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS7
TCELL53:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS4
TCELL53:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TCODAOVREN_FS
TCELL53:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS5
TCELL53:IMUX.IMUX.18.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS4
TCELL53:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXEMPPRE_FS4
TCELL53:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS2
TCELL53:IMUX.IMUX.22.DELAYGTF_CHANNEL3.TXDRVAMP_FS2
TCELL53:IMUX.IMUX.23.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS7
TCELL53:IMUX.IMUX.24.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS3
TCELL53:IMUX.IMUX.25.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS6
TCELL53:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS2
TCELL53:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TDASOFTRESET_FS
TCELL53:IMUX.IMUX.29.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS3
TCELL53:IMUX.IMUX.30.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS2
TCELL53:IMUX.IMUX.31.DELAYGTF_CHANNEL3.STEPSIZEPPM_FS4
TCELL53:IMUX.IMUX.34.DELAYGTF_CHANNEL3.CPLLFREQLOCK_FS
TCELL53:IMUX.IMUX.35.DELAYGTF_CHANNEL3.CTL_TX_PAUSE_REQ_FS0
TCELL53:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS1
TCELL53:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXPLLCKSEL_FS1
TCELL53:IMUX.IMUX.38.DELAYGTF_CHANNEL3.BSR_SERIAL_FS
TCELL53:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TXPRBSPTN_FS2
TCELL53:IMUX.IMUX.40.DELAYGTF_CHANNEL3.TXOUTCKCTL_FS2
TCELL53:IMUX.IMUX.41.DELAYGTF_CHANNEL3.CTL_TX_SEND_LFI_FS
TCELL53:IMUX.IMUX.42.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS0
TCELL53:IMUX.IMUX.43.DELAYGTF_CHANNEL3.TX_AXIS_TERR_FS
TCELL53:IMUX.IMUX.44.DELAYGTF_CHANNEL3.TXPRBSPTN_FS3
TCELL53:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TCOHOLDFROUT_FS
TCELL53:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TX_AXIS_TPOISON_FS
TCELL53:IMUX.IMUX.47.DELAYGTF_CHANNEL3.TX_AXIS_TLAST_FS6
TCELL54:OUT.0.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF7
TCELL54:OUT.1.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF6
TCELL54:OUT.2.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF5
TCELL54:OUT.3.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF4
TCELL54:OUT.4.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF3
TCELL54:OUT.5.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF2
TCELL54:OUT.6.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF1
TCELL54:OUT.7.TMINGTF_CHANNEL3.STAT_TX_PAUSE_VALID_SF0
TCELL54:OUT.8.TMINGTF_CHANNEL3.STAT_TX_PKT_SF
TCELL54:OUT.9.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF0
TCELL54:OUT.10.TMINGTF_CHANNEL3.STAT_TX_PKT_ERR_SF
TCELL54:OUT.11.TMINGTF_CHANNEL3.PCS_RSVD_OUT_SF8
TCELL54:OUT.12.TMINGTF_CHANNEL3.TX_AXIS_TREADY_SF
TCELL54:OUT.13.TMINGTF_CHANNEL3.TX_GB_SEQ_START_SF
TCELL54:OUT.14.TMINGTF_CHANNEL3.TX_PTP_SOP_SF
TCELL54:OUT.15.TMINGTF_CHANNEL3.TX_PTP_SOP_POS_SF
TCELL54:OUT.16.TMINGTF_CHANNEL3.TX_UNFOUT_SF
TCELL54:OUT.22.TMINGTF_CHANNEL3.PINRSRVDAS_SF1
TCELL54:OUT.23.TMINGTF_CHANNEL3.RXPRBSLOCKED_SF
TCELL54:OUT.24.TMINGTF_CHANNEL3.PINRSRVDAS_SF11
TCELL54:OUT.25.TMINGTF_CHANNEL3.RDASOFTRSTDONE_SF
TCELL54:OUT.26.TMINGTF_CHANNEL3.DMONOUT_SF7
TCELL54:OUT.27.TMINGTF_CHANNEL3.TCOINITDONE_SF
TCELL54:OUT.28.TMINGTF_CHANNEL3.DRPDO_SF12
TCELL54:OUT.29.TMINGTF_CHANNEL3.RXELECIDLE_SF
TCELL54:OUT.30.TMINGTF_CHANNEL3.CPLFBLOSS_SF
TCELL54:OUT.31.TMINGTF_CHANNEL3.PMASCANOUT_SF12
TCELL54:IMUX.CTRL.2GTF_CHANNEL3.TXUSRCLK_FS
TCELL54:IMUX.CTRL.3GTF_CHANNEL3.TXUSRCLK2_FS
TCELL54:IMUX.CTRL.7GTF_CHANNEL3.TXPROGDIVRESET_FS
TCELL54:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PINRSRVD_FS1
TCELL54:IMUX.IMUX.1.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS5
TCELL54:IMUX.IMUX.2.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS4
TCELL54:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS1
TCELL54:IMUX.IMUX.4.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS1
TCELL54:IMUX.IMUX.5.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS0
TCELL54:IMUX.IMUX.7.DELAYGTF_CHANNEL3.TX_AXIS_TSOF_FS0
TCELL54:IMUX.IMUX.8.DELAYGTF_CHANNEL3.TX_AXIS_TTERM_FS4
TCELL54:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TX_AXIS_TTERM_FS2
TCELL54:IMUX.IMUX.10.DELAYGTF_CHANNEL3.TX_AXIS_TTERM_FS1
TCELL54:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXEMPPOS_FS3
TCELL54:IMUX.IMUX.12.DELAYGTF_CHANNEL3.TX_AXIS_TVALID_FS
TCELL54:IMUX.IMUX.13.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS63
TCELL54:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS3
TCELL54:IMUX.IMUX.15.DELAYGTF_CHANNEL3.QPLLFREQLOCK0_FS
TCELL54:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS60
TCELL54:IMUX.IMUX.17.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS7
TCELL54:IMUX.IMUX.18.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS59
TCELL54:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS6
TCELL54:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXEMPPRE_FS3
TCELL54:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PINRSRVD_FS0
TCELL54:IMUX.IMUX.22.DELAYGTF_CHANNEL3.TXDRVAMP_FS1
TCELL54:IMUX.IMUX.23.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS3
TCELL54:IMUX.IMUX.24.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS58
TCELL54:IMUX.IMUX.25.DELAYGTF_CHANNEL3.TX_AXIS_TPRE_FS2
TCELL54:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PCS_RSVD_IN_FS0
TCELL54:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TCODABYPASS_FS
TCELL54:IMUX.IMUX.29.DELAYGTF_CHANNEL3.TX_AXIS_TSOF_FS1
TCELL54:IMUX.IMUX.30.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS57
TCELL54:IMUX.IMUX.31.DELAYGTF_CHANNEL3.STEPSIZEPPM_FS3
TCELL54:IMUX.IMUX.32.DELAYGTF_CHANNEL3.TXCODAALGNEN_FS
TCELL54:IMUX.IMUX.35.DELAYGTF_CHANNEL3.TX_AXIS_TTERM_FS3
TCELL54:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS56
TCELL54:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXPLLCKSEL_FS0
TCELL54:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS55
TCELL54:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TXPRBSPTN_FS1
TCELL54:IMUX.IMUX.40.DELAYGTF_CHANNEL3.TXOUTCKCTL_FS1
TCELL54:IMUX.IMUX.41.DELAYGTF_CHANNEL3.TX_AXIS_TTERM_FS0
TCELL54:IMUX.IMUX.42.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS54
TCELL54:IMUX.IMUX.43.DELAYGTF_CHANNEL3.TX_GB_SEQ_SYNC_FS
TCELL54:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS62
TCELL54:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS53
TCELL54:IMUX.IMUX.47.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS61
TCELL55:OUT.0.TMINGTF_CHANNEL3.DRPDO_SF4
TCELL55:OUT.1.TMINGTF_CHANNEL3.PINRSRVDAS_SF7
TCELL55:OUT.2.TMINGTF_CHANNEL3.PMASCANOUT_SF4
TCELL55:OUT.3.TMINGTF_CHANNEL3.PINRSRVDAS_SF15
TCELL55:OUT.4.TMINGTF_CHANNEL3.DMONOUT_SF4
TCELL55:OUT.5.TMINGTF_CHANNEL3.DFEDOUT_SF4
TCELL55:OUT.6.TMINGTF_CHANNEL3.DRPDO_SF9
TCELL55:OUT.8.TMINGTF_CHANNEL3.SCANOUT_SF4
TCELL55:OUT.9.TMINGTF_CHANNEL3.GTPOWERGOOD_SF
TCELL55:OUT.10.TMINGTF_CHANNEL3.DMONOUT_SF9
TCELL55:OUT.11.TMINGTF_CHANNEL3.RXPRGDIVRSTDONE_SF
TCELL55:OUT.12.TMINGTF_CHANNEL3.DRPDO_SF14
TCELL55:OUT.13.TMINGTF_CHANNEL3.RESET_EXCEPTION_SF
TCELL55:OUT.14.TMINGTF_CHANNEL3.TXPRGDIVRSTDONE_SF
TCELL55:OUT.15.TMINGTF_CHANNEL3.PINRSRVDAS_SF13
TCELL55:OUT.16.TMINGTF_CHANNEL3.DMONOUT_SF14
TCELL55:OUT.17.TMINGTF_CHANNEL3.PMASCANOUT_SF7
TCELL55:OUT.18.TMINGTF_CHANNEL3.RXLINKSYNCDONE_SF
TCELL55:OUT.19.TMINGTF_CHANNEL3.DMONOUT_SF12
TCELL55:OUT.20.TMINGTF_CHANNEL3.PMASCANOUT_SF10
TCELL55:OUT.21.TMINGTF_CHANNEL3.RXSLIPDONE_SF
TCELL55:OUT.22.TMINGTF_CHANNEL3.PINRSRVDAS_SF3
TCELL55:OUT.23.TMINGTF_CHANNEL3.RXCOPHDONE_SF
TCELL55:OUT.24.TMINGTF_CHANNEL3.DFEDOUT_SF7
TCELL55:OUT.25.TMINGTF_CHANNEL3.CFOKSTART_SF
TCELL55:OUT.26.TMINGTF_CHANNEL3.RXSLIPOUTCLKRDY_SF
TCELL55:OUT.27.TMINGTF_CHANNEL3.RXSYNCEN2SLV_SF
TCELL55:OUT.28.TMINGTF_CHANNEL3.RXSLIPPMARDY_SF
TCELL55:OUT.29.TMINGTF_CHANNEL3.RXPMARESETDONE_SF
TCELL55:OUT.30.TMINGTF_CHANNEL3.PINRSRVDAS_SF14
TCELL55:OUT.31.TMINGTF_CHANNEL3.CFOKFSTARTED_SF
TCELL55:IMUX.CTRL.2GTF_CHANNEL3.PMASCANCLK2_FS
TCELL55:IMUX.CTRL.3GTF_CHANNEL3.PMASCANCLK3_FS
TCELL55:IMUX.CTRL.7GTF_CHANNEL3.GTTXRST_FS
TCELL55:IMUX.IMUX.1.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS50
TCELL55:IMUX.IMUX.2.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS49
TCELL55:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PMASCANIN_FS6
TCELL55:IMUX.IMUX.4.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS46
TCELL55:IMUX.IMUX.5.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS45
TCELL55:IMUX.IMUX.6.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS43
TCELL55:IMUX.IMUX.7.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS42
TCELL55:IMUX.IMUX.8.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS40
TCELL55:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS38
TCELL55:IMUX.IMUX.10.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS37
TCELL55:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXEMPPOS_FS2
TCELL55:IMUX.IMUX.12.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS35
TCELL55:IMUX.IMUX.13.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS33
TCELL55:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS2
TCELL55:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS30
TCELL55:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS29
TCELL55:IMUX.IMUX.17.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS52
TCELL55:IMUX.IMUX.18.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS28
TCELL55:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS51
TCELL55:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXEMPPRE_FS2
TCELL55:IMUX.IMUX.21.DELAYGTF_CHANNEL3.DFE_KH_OVERWREN_FS
TCELL55:IMUX.IMUX.22.DELAYGTF_CHANNEL3.TXDRVAMP_FS0
TCELL55:IMUX.IMUX.23.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS48
TCELL55:IMUX.IMUX.24.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS27
TCELL55:IMUX.IMUX.25.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS47
TCELL55:IMUX.IMUX.26.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS26
TCELL55:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PMASCANIN_FS5
TCELL55:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS25
TCELL55:IMUX.IMUX.29.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS44
TCELL55:IMUX.IMUX.30.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS24
TCELL55:IMUX.IMUX.31.DELAYGTF_CHANNEL3.STEPSIZEPPM_FS2
TCELL55:IMUX.IMUX.32.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS23
TCELL55:IMUX.IMUX.33.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS41
TCELL55:IMUX.IMUX.34.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS22
TCELL55:IMUX.IMUX.35.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS39
TCELL55:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS21
TCELL55:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXSYSCKSEL_FS1
TCELL55:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TXMSTRSETPHDONE_FS
TCELL55:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TXPRBSPTN_FS0
TCELL55:IMUX.IMUX.40.DELAYGTF_CHANNEL3.TXOUTCKCTL_FS0
TCELL55:IMUX.IMUX.41.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS36
TCELL55:IMUX.IMUX.42.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS20
TCELL55:IMUX.IMUX.43.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS34
TCELL55:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS32
TCELL55:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS19
TCELL55:IMUX.IMUX.47.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS31
TCELL56:OUT.0.TMINGTF_CHANNEL3.DRPDO_SF3
TCELL56:OUT.1.TMINGTF_CHANNEL3.PINRSRVDAS_SF6
TCELL56:OUT.2.TMINGTF_CHANNEL3.PMASCANOUT_SF3
TCELL56:OUT.4.TMINGTF_CHANNEL3.DMONOUT_SF3
TCELL56:OUT.5.TMINGTF_CHANNEL3.DFEDOUT_SF3
TCELL56:OUT.6.TMINGTF_CHANNEL3.DRPDO_SF8
TCELL56:OUT.7.TMINGTF_CHANNEL3.RXPHALIGNERR_SF
TCELL56:OUT.8.TMINGTF_CHANNEL3.SCANOUT_SF3
TCELL56:OUT.9.TMINGTF_CHANNEL3.SCANOUT_SF16
TCELL56:OUT.10.TMINGTF_CHANNEL3.DMONOUT_SF8
TCELL56:OUT.11.TMINGTF_CHANNEL3.RXCDRPHDONE_SF
TCELL56:OUT.12.TMINGTF_CHANNEL3.DRPDO_SF13
TCELL56:OUT.13.TMINGTF_CHANNEL3.TXDCCDONE_SF
TCELL56:OUT.14.TMINGTF_CHANNEL3.CKOKDONE_SF
TCELL56:OUT.16.TMINGTF_CHANNEL3.DMONOUT_SF13
TCELL56:OUT.17.TMINGTF_CHANNEL3.PMASCANOUT_SF11
TCELL56:OUT.18.TMINGTF_CHANNEL3.TXRESETDONE_SF
TCELL56:OUT.19.TMINGTF_CHANNEL3.SCANOUT_SF18
TCELL56:OUT.20.TMINGTF_CHANNEL3.TXLINKSYNCDONE_SF
TCELL56:OUT.21.TMINGTF_CHANNEL3.SCANOUT_SF17
TCELL56:OUT.22.TMINGTF_CHANNEL3.PINRSRVDAS_SF2
TCELL56:OUT.23.TMINGTF_CHANNEL3.TDASOFTRSTDONE_SF
TCELL56:OUT.24.TMINGTF_CHANNEL3.DRDY_SF
TCELL56:OUT.25.TMINGTF_CHANNEL3.CFOKDONE_SF
TCELL56:OUT.26.TMINGTF_CHANNEL3.CPLREFLOSS_SF
TCELL56:OUT.27.TMINGTF_CHANNEL3.SCANOUT_SF13
TCELL56:OUT.28.TMINGTF_CHANNEL3.SCANOUT_SF10
TCELL56:OUT.29.TMINGTF_CHANNEL3.TXSYNCEN2SLV_SF
TCELL56:OUT.30.TMINGTF_CHANNEL3.PINRSRVDAS_SF12
TCELL56:OUT.31.TMINGTF_CHANNEL3.CFOKFORCEDONE_SF
TCELL56:IMUX.CTRL.2GTF_CHANNEL3.CPLLDMONCLK_FS
TCELL56:IMUX.CTRL.7GTF_CHANNEL3.CPLRESET_FS
TCELL56:IMUX.IMUX.0.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS17
TCELL56:IMUX.IMUX.1.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS15
TCELL56:IMUX.IMUX.2.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS13
TCELL56:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PMASCANIN_FS4
TCELL56:IMUX.IMUX.4.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS10
TCELL56:IMUX.IMUX.5.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS9
TCELL56:IMUX.IMUX.6.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS7
TCELL56:IMUX.IMUX.7.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS6
TCELL56:IMUX.IMUX.8.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS4
TCELL56:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TXPWRDN_FS1
TCELL56:IMUX.IMUX.10.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS2
TCELL56:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXEMPPOS_FS1
TCELL56:IMUX.IMUX.12.DELAYGTF_CHANNEL3.ENPPM_FS
TCELL56:IMUX.IMUX.13.DELAYGTF_CHANNEL3.TSTIN_FS17
TCELL56:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS1
TCELL56:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TXPIPPMPWDN_FS
TCELL56:IMUX.IMUX.16.DELAYGTF_CHANNEL3.SCANIN_FS8
TCELL56:IMUX.IMUX.17.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS18
TCELL56:IMUX.IMUX.18.DELAYGTF_CHANNEL3.TSTIN_FS13
TCELL56:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS16
TCELL56:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXEMPPRE_FS1
TCELL56:IMUX.IMUX.21.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS14
TCELL56:IMUX.IMUX.22.DELAYGTF_CHANNEL3.CPLLKDETEN_FS
TCELL56:IMUX.IMUX.23.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS12
TCELL56:IMUX.IMUX.24.DELAYGTF_CHANNEL3.SCANIN_FS10
TCELL56:IMUX.IMUX.25.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS11
TCELL56:IMUX.IMUX.26.DELAYGTF_CHANNEL3.TXPPMSEL_FS
TCELL56:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PMASCANIN_FS3
TCELL56:IMUX.IMUX.28.DELAYGTF_CHANNEL3.CPLREFSELDYN_FS0
TCELL56:IMUX.IMUX.29.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS8
TCELL56:IMUX.IMUX.30.DELAYGTF_CHANNEL3.DI_FS10
TCELL56:IMUX.IMUX.31.DELAYGTF_CHANNEL3.STEPSIZEPPM_FS1
TCELL56:IMUX.IMUX.32.DELAYGTF_CHANNEL3.RXTERMINATION_FS
TCELL56:IMUX.IMUX.33.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS5
TCELL56:IMUX.IMUX.34.DELAYGTF_CHANNEL3.CPLREFSELDYN_FS1
TCELL56:IMUX.IMUX.35.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS3
TCELL56:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TSTIN_FS11
TCELL56:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXSYSCKSEL_FS0
TCELL56:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TXSLVSYNCEN_FS
TCELL56:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TCOPIOVREN_FS
TCELL56:IMUX.IMUX.40.DELAYGTF_CHANNEL3.CPLREFSELDYN_FS2
TCELL56:IMUX.IMUX.41.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS1
TCELL56:IMUX.IMUX.42.DELAYGTF_CHANNEL3.DI_FS8
TCELL56:IMUX.IMUX.43.DELAYGTF_CHANNEL3.TX_AXIS_TDATA_FS0
TCELL56:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TXPPMOVRDEN_FS
TCELL56:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TSTIN_FS3
TCELL56:IMUX.IMUX.47.DELAYGTF_CHANNEL3.SCANIN_FS6
TCELL57:OUT.0.TMINGTF_CHANNEL3.DRPDO_SF2
TCELL57:OUT.1.TMINGTF_CHANNEL3.PINRSRVDAS_SF5
TCELL57:OUT.2.TMINGTF_CHANNEL3.PMASCANOUT_SF2
TCELL57:OUT.3.TMINGTF_CHANNEL3.TXCOPIPHDONE_SF
TCELL57:OUT.4.TMINGTF_CHANNEL3.DMONOUT_SF2
TCELL57:OUT.5.TMINGTF_CHANNEL3.DFEDOUT_SF2
TCELL57:OUT.6.TMINGTF_CHANNEL3.DRPDO_SF7
TCELL57:OUT.7.TMINGTF_CHANNEL3.TXPMARESETDONE_SF
TCELL57:OUT.8.TMINGTF_CHANNEL3.SCANOUT_SF2
TCELL57:OUT.9.TMINGTF_CHANNEL3.RXRAWDATA_SF39
TCELL57:OUT.10.TMINGTF_CHANNEL3.RXRAWDATA_SF38
TCELL57:OUT.11.TMINGTF_CHANNEL3.RXRAWDATA_SF37
TCELL57:OUT.12.TMINGTF_CHANNEL3.RXRAWDATA_SF36
TCELL57:OUT.13.TMINGTF_CHANNEL3.RXRAWDATA_SF35
TCELL57:OUT.14.TMINGTF_CHANNEL3.RXRAWDATA_SF34
TCELL57:OUT.15.TMINGTF_CHANNEL3.RXRAWDATA_SF33
TCELL57:OUT.16.TMINGTF_CHANNEL3.RXRAWDATA_SF32
TCELL57:OUT.17.TMINGTF_CHANNEL3.RXRAWDATA_SF31
TCELL57:OUT.18.TMINGTF_CHANNEL3.RXRAWDATA_SF30
TCELL57:OUT.19.TMINGTF_CHANNEL3.RXRAWDATA_SF29
TCELL57:OUT.20.TMINGTF_CHANNEL3.TXOUTCLKPCS_SF
TCELL57:OUT.21.TMINGTF_CHANNEL3.RXRAWDATA_SF28
TCELL57:OUT.22.TMINGTF_CHANNEL3.RXRAWDATA_SF27
TCELL57:OUT.23.TMINGTF_CHANNEL3.RXRAWDATA_SF26
TCELL57:OUT.24.TMINGTF_CHANNEL3.RXRAWDATA_SF25
TCELL57:OUT.25.TMINGTF_CHANNEL3.TXOUTCLK_SF
TCELL57:OUT.26.TMINGTF_CHANNEL3.RXRAWDATA_SF24
TCELL57:OUT.27.TMINGTF_CHANNEL3.RXRAWDATA_SF23
TCELL57:OUT.28.TMINGTF_CHANNEL3.RXRAWDATA_SF22
TCELL57:OUT.29.TMINGTF_CHANNEL3.RXRAWDATA_SF21
TCELL57:OUT.30.TMINGTF_CHANNEL3.RXRAWDATA_SF20
TCELL57:OUT.31.TMINGTF_CHANNEL3.RXRAWDATA_SF19
TCELL57:IMUX.CTRL.1GTF_CHANNEL3.PMASCANCLK5_FS
TCELL57:IMUX.CTRL.2GTF_CHANNEL3.PMASCANCLK4_FS
TCELL57:IMUX.CTRL.7GTF_CHANNEL3.CFGRESET_FS
TCELL57:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PMASCANIN_FS17
TCELL57:IMUX.IMUX.1.DELAYGTF_CHANNEL3.DMONFIFORESET_FS
TCELL57:IMUX.IMUX.2.DELAYGTF_CHANNEL3.DI_FS7
TCELL57:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PMASCANIN_FS2
TCELL57:IMUX.IMUX.4.DELAYGTF_CHANNEL3.DADDR_FS7
TCELL57:IMUX.IMUX.5.DELAYGTF_CHANNEL3.PMASCANIN_FS12
TCELL57:IMUX.IMUX.6.DELAYGTF_CHANNEL3.PMASCANMODEB_FS
TCELL57:IMUX.IMUX.7.DELAYGTF_CHANNEL3.PMASCANRSTEN_FS
TCELL57:IMUX.IMUX.8.DELAYGTF_CHANNEL3.DI_FS5
TCELL57:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TXPWRDN_FS0
TCELL57:IMUX.IMUX.10.DELAYGTF_CHANNEL3.SCANIN_FS4
TCELL57:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXEMPPOS_FS0
TCELL57:IMUX.IMUX.12.DELAYGTF_CHANNEL3.FREQOS_FS
TCELL57:IMUX.IMUX.13.DELAYGTF_CHANNEL3.SCANIN_FS2
TCELL57:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXEMPMAIN_FS0
TCELL57:IMUX.IMUX.15.DELAYGTF_CHANNEL3.INCPCTRL_FS
TCELL57:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TSTIN_FS18
TCELL57:IMUX.IMUX.17.DELAYGTF_CHANNEL3.DADDR_FS8
TCELL57:IMUX.IMUX.18.DELAYGTF_CHANNEL3.SCANIN_FS0
TCELL57:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TSTIN_FS1
TCELL57:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXEMPPRE_FS0
TCELL57:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PMASCANIN_FS16
TCELL57:IMUX.IMUX.22.DELAYGTF_CHANNEL3.CPLPWRDN_FS
TCELL57:IMUX.IMUX.23.DELAYGTF_CHANNEL3.PMASCANIN_FS13
TCELL57:IMUX.IMUX.24.DELAYGTF_CHANNEL3.DADDR_FS4
TCELL57:IMUX.IMUX.25.DELAYGTF_CHANNEL3.PMASCANIN_FS11
TCELL57:IMUX.IMUX.26.DELAYGTF_CHANNEL3.TXDCCSRESET_FS
TCELL57:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PMASCANIN_FS1
TCELL57:IMUX.IMUX.28.DELAYGTF_CHANNEL3.LOOPBACK_FS2
TCELL57:IMUX.IMUX.29.DELAYGTF_CHANNEL3.PMASCANIN_FS10
TCELL57:IMUX.IMUX.30.DELAYGTF_CHANNEL3.GTTXRSTSEL_FS
TCELL57:IMUX.IMUX.31.DELAYGTF_CHANNEL3.STEPSIZEPPM_FS0
TCELL57:IMUX.IMUX.32.DELAYGTF_CHANNEL3.DADDR_FS2
TCELL57:IMUX.IMUX.33.DELAYGTF_CHANNEL3.PMASCANIN_FS8
TCELL57:IMUX.IMUX.34.DELAYGTF_CHANNEL3.LOOPBACK_FS1
TCELL57:IMUX.IMUX.35.DELAYGTF_CHANNEL3.PMASCANIN_FS7
TCELL57:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TSTIN_FS8
TCELL57:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXSERPWRDN_FS
TCELL57:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TXUSRRDY_FS
TCELL57:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TXPOLARITY_FS
TCELL57:IMUX.IMUX.40.DELAYGTF_CHANNEL3.LOOPBACK_FS0
TCELL57:IMUX.IMUX.41.DELAYGTF_CHANNEL3.DADDR_FS5
TCELL57:IMUX.IMUX.42.DELAYGTF_CHANNEL3.DI_FS1
TCELL57:IMUX.IMUX.43.DELAYGTF_CHANNEL3.SCANIN_FS12
TCELL57:IMUX.IMUX.44.DELAYGTF_CHANNEL3.SCANIN_FS13
TCELL57:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TXPRBSINERR_FS
TCELL57:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TSTIN_FS6
TCELL57:IMUX.IMUX.47.DELAYGTF_CHANNEL3.DI_FS4
TCELL58:OUT.0.TMINGTF_CHANNEL3.RXRAWDATA_SF18
TCELL58:OUT.1.TMINGTF_CHANNEL3.RXRAWDATA_SF17
TCELL58:OUT.2.TMINGTF_CHANNEL3.RXRAWDATA_SF16
TCELL58:OUT.3.TMINGTF_CHANNEL3.RXRAWDATA_SF15
TCELL58:OUT.4.TMINGTF_CHANNEL3.RXRAWDATA_SF14
TCELL58:OUT.5.TMINGTF_CHANNEL3.RXRAWDATA_SF13
TCELL58:OUT.6.TMINGTF_CHANNEL3.RXRAWDATA_SF12
TCELL58:OUT.7.TMINGTF_CHANNEL3.RXRAWDATA_SF11
TCELL58:OUT.8.TMINGTF_CHANNEL3.RXRAWDATA_SF10
TCELL58:OUT.9.TMINGTF_CHANNEL3.RXRAWDATA_SF9
TCELL58:OUT.10.TMINGTF_CHANNEL3.RXRAWDATA_SF8
TCELL58:OUT.11.TMINGTF_CHANNEL3.RXRAWDATA_SF7
TCELL58:OUT.12.TMINGTF_CHANNEL3.RXRAWDATA_SF6
TCELL58:OUT.13.TMINGTF_CHANNEL3.RXRAWDATA_SF5
TCELL58:OUT.14.TMINGTF_CHANNEL3.RXRAWDATA_SF4
TCELL58:OUT.15.TMINGTF_CHANNEL3.RXRAWDATA_SF3
TCELL58:OUT.16.TMINGTF_CHANNEL3.RXRAWDATA_SF2
TCELL58:OUT.17.TMINGTF_CHANNEL3.RXRAWDATA_SF1
TCELL58:OUT.20.TMINGTF_CHANNEL3.RXRAWDATA_SF0
TCELL58:OUT.21.TMINGTF_CHANNEL3.CPLFREQLOCK_SF
TCELL58:OUT.22.TMINGTF_CHANNEL3.PINRSRVDAS_SF0
TCELL58:OUT.23.TMINGTF_CHANNEL3.SCANOUT_SF15
TCELL58:OUT.24.TMINGTF_CHANNEL3.DRPDO_SF1
TCELL58:OUT.25.TMINGTF_CHANNEL3.DFEDOUT_SF6
TCELL58:OUT.26.TMINGTF_CHANNEL3.PINRSRVDAS_SF4
TCELL58:OUT.27.TMINGTF_CHANNEL3.SCANOUT_SF12
TCELL58:OUT.28.TMINGTF_CHANNEL3.PMASCANOUT_SF1
TCELL58:OUT.29.TMINGTF_CHANNEL3.SCANOUT_SF9
TCELL58:OUT.30.TMINGTF_CHANNEL3.EYESCANDATAERROR_SF
TCELL58:OUT.31.TMINGTF_CHANNEL3.SCANOUT_SF7
TCELL58:IMUX.CTRL.2GTF_CHANNEL3.COREREFCLK_FS
TCELL58:IMUX.CTRL.4GTF_CHANNEL3.DRST_FS
TCELL58:IMUX.IMUX.0.DELAYGTF_CHANNEL3.PMASCANIN_FS15
TCELL58:IMUX.IMUX.1.DELAYGTF_CHANNEL3.TSTPWRDNOVRDB_FS
TCELL58:IMUX.IMUX.2.DELAYGTF_CHANNEL3.SCANRSTEN_FS
TCELL58:IMUX.IMUX.3.DELAYGTF_CHANNEL3.PMASCANIN_FS0
TCELL58:IMUX.IMUX.4.DELAYGTF_CHANNEL3.SCANENB_FS
TCELL58:IMUX.IMUX.5.DELAYGTF_CHANNEL3.ISCANRESET_FS
TCELL58:IMUX.IMUX.6.DELAYGTF_CHANNEL3.DADDR_FS1
TCELL58:IMUX.IMUX.7.DELAYGTF_CHANNEL3.SCANMODEB_FS
TCELL58:IMUX.IMUX.8.DELAYGTF_CHANNEL3.SCANIN_FS3
TCELL58:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TSTIN_FS19
TCELL58:IMUX.IMUX.11.DELAYGTF_CHANNEL3.TXRAWDATA_FS38
TCELL58:IMUX.IMUX.12.DELAYGTF_CHANNEL3.TSTIN_FS15
TCELL58:IMUX.IMUX.13.DELAYGTF_CHANNEL3.GTRXRSTSEL_FS
TCELL58:IMUX.IMUX.14.DELAYGTF_CHANNEL3.TXRAWDATA_FS33
TCELL58:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TXRAWDATA_FS30
TCELL58:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TSTPWRDN_FS4
TCELL58:IMUX.IMUX.17.DELAYGTF_CHANNEL3.DI_FS15
TCELL58:IMUX.IMUX.19.DELAYGTF_CHANNEL3.DFE_KH_EXTHOLD_FS
TCELL58:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TSTIN_FS9
TCELL58:IMUX.IMUX.21.DELAYGTF_CHANNEL3.PMASCANIN_FS14
TCELL58:IMUX.IMUX.22.DELAYGTF_CHANNEL3.TSTPWRDN_FS3
TCELL58:IMUX.IMUX.23.DELAYGTF_CHANNEL3.DI_FS14
TCELL58:IMUX.IMUX.24.DELAYGTF_CHANNEL3.DI_FS9
TCELL58:IMUX.IMUX.25.DELAYGTF_CHANNEL3.SCANRSTB_FS
TCELL58:IMUX.IMUX.26.DELAYGTF_CHANNEL3.TSTIN_FS7
TCELL58:IMUX.IMUX.27.DELAYGTF_CHANNEL3.PMASCANENB_FS
TCELL58:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TSTPWRDN_FS2
TCELL58:IMUX.IMUX.29.DELAYGTF_CHANNEL3.DI_FS13
TCELL58:IMUX.IMUX.30.DELAYGTF_CHANNEL3.DADDR_FS9
TCELL58:IMUX.IMUX.31.DELAYGTF_CHANNEL3.SCANIN_FS5
TCELL58:IMUX.IMUX.32.DELAYGTF_CHANNEL3.TSTIN_FS5
TCELL58:IMUX.IMUX.33.DELAYGTF_CHANNEL3.TSTIN_FS4
TCELL58:IMUX.IMUX.34.DELAYGTF_CHANNEL3.TSTPWRDN_FS1
TCELL58:IMUX.IMUX.35.DELAYGTF_CHANNEL3.DI_FS12
TCELL58:IMUX.IMUX.36.DELAYGTF_CHANNEL3.TXRAWDATA_FS39
TCELL58:IMUX.IMUX.37.DELAYGTF_CHANNEL3.SCANIN_FS1
TCELL58:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TXRAWDATA_FS36
TCELL58:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TXRAWDATA_FS37
TCELL58:IMUX.IMUX.40.DELAYGTF_CHANNEL3.TSTPWRDN_FS0
TCELL58:IMUX.IMUX.41.DELAYGTF_CHANNEL3.DI_FS11
TCELL58:IMUX.IMUX.42.DELAYGTF_CHANNEL3.TXRAWDATA_FS34
TCELL58:IMUX.IMUX.43.DELAYGTF_CHANNEL3.TXRAWDATA_FS35
TCELL58:IMUX.IMUX.44.DELAYGTF_CHANNEL3.TXRAWDATA_FS31
TCELL58:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TXRAWDATA_FS32
TCELL58:IMUX.IMUX.46.DELAYGTF_CHANNEL3.TXRAWDATA_FS28
TCELL58:IMUX.IMUX.47.DELAYGTF_CHANNEL3.TXRAWDATA_FS29
TCELL59:OUT.0.TMINGTF_CHANNEL3.DRPDO_SF0
TCELL59:OUT.1.TMINGTF_CHANNEL3.DMONOUT_SF1
TCELL59:OUT.2.TMINGTF_CHANNEL3.PMASCANOUT_SF0
TCELL59:OUT.3.TMINGTF_CHANNEL3.MGTREFCLKFA_SF
TCELL59:OUT.4.TMINGTF_CHANNEL3.DMONOUT_SF0
TCELL59:OUT.5.TMINGTF_CHANNEL3.DFEDOUT_SF0
TCELL59:OUT.6.TMINGTF_CHANNEL3.DRPDO_SF5
TCELL59:OUT.7.TMINGTF_CHANNEL3.DFEDOUT_SF1
TCELL59:OUT.8.TMINGTF_CHANNEL3.SCANOUT_SF0
TCELL59:OUT.9.TMINGTF_CHANNEL3.PINRSRVDAS_SF8
TCELL59:OUT.10.TMINGTF_CHANNEL3.DMONOUT_SF5
TCELL59:OUT.11.TMINGTF_CHANNEL3.DRPDO_SF6
TCELL59:OUT.12.TMINGTF_CHANNEL3.DRPDO_SF10
TCELL59:OUT.13.TMINGTF_CHANNEL3.SCANOUT_SF1
TCELL59:OUT.14.TMINGTF_CHANNEL3.PMASCANOUT_SF5
TCELL59:OUT.15.TMINGTF_CHANNEL3.PINRSRVDAS_SF10
TCELL59:OUT.16.TMINGTF_CHANNEL3.DMONOUT_SF10
TCELL59:OUT.17.TMINGTF_CHANNEL3.PMASCANOUT_SF8
TCELL59:OUT.18.TMINGTF_CHANNEL3.DRPDO_SF15
TCELL59:OUT.19.TMINGTF_CHANNEL3.DMONOUT_SF6
TCELL59:OUT.20.TMINGTF_CHANNEL3.SCANOUT_SF5
TCELL59:OUT.21.TMINGTF_CHANNEL3.DRPDO_SF11
TCELL59:OUT.22.TMINGTF_CHANNEL3.DMONOUT_SF15
TCELL59:OUT.23.TMINGTF_CHANNEL3.SCANOUT_SF14
TCELL59:OUT.24.TMINGTF_CHANNEL3.PMASCANOUT_SF6
TCELL59:OUT.25.TMINGTF_CHANNEL3.DFEDOUT_SF5
TCELL59:OUT.26.TMINGTF_CHANNEL3.PINRSRVDAS_SF9
TCELL59:OUT.27.TMINGTF_CHANNEL3.SCANOUT_SF11
TCELL59:OUT.28.TMINGTF_CHANNEL3.DMONOUT_SF11
TCELL59:OUT.29.TMINGTF_CHANNEL3.SCANOUT_SF8
TCELL59:OUT.30.TMINGTF_CHANNEL3.PMASCANOUT_SF9
TCELL59:OUT.31.TMINGTF_CHANNEL3.SCANOUT_SF6
TCELL59:IMUX.CTRL.2GTF_CHANNEL3.DMONCLK_FS
TCELL59:IMUX.CTRL.3GTF_CHANNEL3.DCLK_FS
TCELL59:IMUX.IMUX.0.DELAYGTF_CHANNEL3.TXRAWDATA_FS27
TCELL59:IMUX.IMUX.1.DELAYGTF_CHANNEL3.TXRAWDATA_FS24
TCELL59:IMUX.IMUX.2.DELAYGTF_CHANNEL3.TXRAWDATA_FS21
TCELL59:IMUX.IMUX.3.DELAYGTF_CHANNEL3.TXRAWDATA_FS18
TCELL59:IMUX.IMUX.4.DELAYGTF_CHANNEL3.DADDR_FS6
TCELL59:IMUX.IMUX.5.DELAYGTF_CHANNEL3.TXRAWDATA_FS16
TCELL59:IMUX.IMUX.6.DELAYGTF_CHANNEL3.TXRAWDATA_FS13
TCELL59:IMUX.IMUX.7.DELAYGTF_CHANNEL3.TXRAWDATA_FS10
TCELL59:IMUX.IMUX.8.DELAYGTF_CHANNEL3.TXRAWDATA_FS7
TCELL59:IMUX.IMUX.9.DELAYGTF_CHANNEL3.TXRAWDATA_FS4
TCELL59:IMUX.IMUX.10.DELAYGTF_CHANNEL3.TXRAWDATA_FS1
TCELL59:IMUX.IMUX.11.DELAYGTF_CHANNEL3.SCANIN_FS7
TCELL59:IMUX.IMUX.12.DELAYGTF_CHANNEL3.TSTIN_FS14
TCELL59:IMUX.IMUX.13.DELAYGTF_CHANNEL3.DADDR_FS3
TCELL59:IMUX.IMUX.14.DELAYGTF_CHANNEL3.SCANIN_FS11
TCELL59:IMUX.IMUX.15.DELAYGTF_CHANNEL3.TSTIN_FS10
TCELL59:IMUX.IMUX.16.DELAYGTF_CHANNEL3.TXRAWDATA_FS25
TCELL59:IMUX.IMUX.17.DELAYGTF_CHANNEL3.TXRAWDATA_FS26
TCELL59:IMUX.IMUX.18.DELAYGTF_CHANNEL3.TXRAWDATA_FS22
TCELL59:IMUX.IMUX.19.DELAYGTF_CHANNEL3.TXRAWDATA_FS23
TCELL59:IMUX.IMUX.20.DELAYGTF_CHANNEL3.TXRAWDATA_FS19
TCELL59:IMUX.IMUX.21.DELAYGTF_CHANNEL3.TXRAWDATA_FS20
TCELL59:IMUX.IMUX.22.DELAYGTF_CHANNEL3.EYESCANTRIGGER_FS
TCELL59:IMUX.IMUX.23.DELAYGTF_CHANNEL3.DI_FS6
TCELL59:IMUX.IMUX.24.DELAYGTF_CHANNEL3.TXRAWDATA_FS17
TCELL59:IMUX.IMUX.25.DELAYGTF_CHANNEL3.PMASCANIN_FS9
TCELL59:IMUX.IMUX.26.DELAYGTF_CHANNEL3.TXRAWDATA_FS14
TCELL59:IMUX.IMUX.27.DELAYGTF_CHANNEL3.TXRAWDATA_FS15
TCELL59:IMUX.IMUX.28.DELAYGTF_CHANNEL3.TXRAWDATA_FS11
TCELL59:IMUX.IMUX.29.DELAYGTF_CHANNEL3.TXRAWDATA_FS12
TCELL59:IMUX.IMUX.30.DELAYGTF_CHANNEL3.TXRAWDATA_FS8
TCELL59:IMUX.IMUX.31.DELAYGTF_CHANNEL3.TXRAWDATA_FS9
TCELL59:IMUX.IMUX.32.DELAYGTF_CHANNEL3.TXRAWDATA_FS5
TCELL59:IMUX.IMUX.33.DELAYGTF_CHANNEL3.TXRAWDATA_FS6
TCELL59:IMUX.IMUX.34.DELAYGTF_CHANNEL3.TXRAWDATA_FS2
TCELL59:IMUX.IMUX.35.DELAYGTF_CHANNEL3.TXRAWDATA_FS3
TCELL59:IMUX.IMUX.36.DELAYGTF_CHANNEL3.DI_FS0
TCELL59:IMUX.IMUX.37.DELAYGTF_CHANNEL3.TXRAWDATA_FS0
TCELL59:IMUX.IMUX.38.DELAYGTF_CHANNEL3.TSTIN_FS2
TCELL59:IMUX.IMUX.39.DELAYGTF_CHANNEL3.TSTIN_FS16
TCELL59:IMUX.IMUX.40.DELAYGTF_CHANNEL3.DWE_FS
TCELL59:IMUX.IMUX.41.DELAYGTF_CHANNEL3.DI_FS3
TCELL59:IMUX.IMUX.42.DELAYGTF_CHANNEL3.DADDR_FS0
TCELL59:IMUX.IMUX.43.DELAYGTF_CHANNEL3.SCANIN_FS9
TCELL59:IMUX.IMUX.44.DELAYGTF_CHANNEL3.TSTIN_FS0
TCELL59:IMUX.IMUX.45.DELAYGTF_CHANNEL3.TSTIN_FS12
TCELL59:IMUX.IMUX.46.DELAYGTF_CHANNEL3.DEN_FS
TCELL59:IMUX.IMUX.47.DELAYGTF_CHANNEL3.DI_FS2