XP5IO
Tile XP5IO
Cells: 60
Bel LPDDRMC
| Pin | Direction | Wires |
|---|---|---|
| AXI0_ARADDR_10_NIB0_CLB2PHY_DLYCTL_EN_VTC | input | CELL[58].IMUX_IMUX_DELAY[12] |
| AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN0 | input | CELL[54].IMUX_IMUX_DELAY[19] |
| AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN1 | input | CELL[54].IMUX_IMUX_DELAY[18] |
| AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN2 | input | CELL[54].IMUX_IMUX_DELAY[1] |
| AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN3 | input | CELL[54].IMUX_IMUX_DELAY[17] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL0 | input | CELL[54].IMUX_IMUX_DELAY[23] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL1 | input | CELL[54].IMUX_IMUX_DELAY[22] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL2 | input | CELL[54].IMUX_IMUX_DELAY[3] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL3 | input | CELL[54].IMUX_IMUX_DELAY[21] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL4 | input | CELL[54].IMUX_IMUX_DELAY[20] |
| AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL5 | input | CELL[54].IMUX_IMUX_DELAY[2] |
| AXI0_ARADDR_21_NIB1_CLB2PHY_DLYCTL_EN_VTC | input | CELL[54].IMUX_IMUX_DELAY[4] |
| AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN0 | input | CELL[45].IMUX_IMUX_DELAY[31] |
| AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN1 | input | CELL[45].IMUX_IMUX_DELAY[30] |
| AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN2 | input | CELL[45].IMUX_IMUX_DELAY[7] |
| AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN3 | input | CELL[45].IMUX_IMUX_DELAY[29] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL0 | input | CELL[45].IMUX_IMUX_DELAY[35] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL1 | input | CELL[45].IMUX_IMUX_DELAY[34] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL2 | input | CELL[45].IMUX_IMUX_DELAY[9] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL3 | input | CELL[45].IMUX_IMUX_DELAY[33] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL4 | input | CELL[45].IMUX_IMUX_DELAY[32] |
| AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL5 | input | CELL[45].IMUX_IMUX_DELAY[8] |
| AXI0_ARADDR_32_NIB2_CLB2PHY_DLYCTL_EN_VTC | input | CELL[45].IMUX_IMUX_DELAY[10] |
| AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN0 | input | CELL[43].IMUX_IMUX_DELAY[11] |
| AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN1 | input | CELL[43].IMUX_IMUX_DELAY[37] |
| AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN2 | input | CELL[43].IMUX_IMUX_DELAY[36] |
| AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN3 | input | CELL[43].IMUX_IMUX_DELAY[10] |
| AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN0 | input | CELL[58].IMUX_IMUX_DELAY[35] |
| AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN1 | input | CELL[58].IMUX_IMUX_DELAY[34] |
| AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN2 | input | CELL[58].IMUX_IMUX_DELAY[9] |
| AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN3 | input | CELL[58].IMUX_IMUX_DELAY[33] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL0 | input | CELL[43].IMUX_IMUX_DELAY[13] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL1 | input | CELL[43].IMUX_IMUX_DELAY[41] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL2 | input | CELL[43].IMUX_IMUX_DELAY[40] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL3 | input | CELL[43].IMUX_IMUX_DELAY[12] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL4 | input | CELL[43].IMUX_IMUX_DELAY[39] |
| AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL5 | input | CELL[43].IMUX_IMUX_DELAY[38] |
| AXI0_ARADDR_43_NIB3_CLB2PHY_DLYCTL_EN_VTC | input | CELL[43].IMUX_IMUX_DELAY[42] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL0 | input | CELL[58].IMUX_IMUX_DELAY[39] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL1 | input | CELL[58].IMUX_IMUX_DELAY[38] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL2 | input | CELL[58].IMUX_IMUX_DELAY[11] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL3 | input | CELL[58].IMUX_IMUX_DELAY[37] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL4 | input | CELL[58].IMUX_IMUX_DELAY[36] |
| AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL5 | input | CELL[58].IMUX_IMUX_DELAY[10] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[45].IMUX_IMUX_DELAY[41] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[45].IMUX_IMUX_DELAY[40] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[45].IMUX_IMUX_DELAY[12] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[45].IMUX_IMUX_DELAY[39] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[45].IMUX_IMUX_DELAY[38] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[45].IMUX_IMUX_DELAY[11] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[45].IMUX_IMUX_DELAY[37] |
| AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[45].IMUX_IMUX_DELAY[36] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[45].IMUX_IMUX_DELAY[46] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[45].IMUX_IMUX_DELAY[15] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[45].IMUX_IMUX_DELAY[45] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[45].IMUX_IMUX_DELAY[44] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[45].IMUX_IMUX_DELAY[14] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[45].IMUX_IMUX_DELAY[43] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[45].IMUX_IMUX_DELAY[42] |
| AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[45].IMUX_IMUX_DELAY[13] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[46].IMUX_IMUX_DELAY[3] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[46].IMUX_IMUX_DELAY[21] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[45].IMUX_IMUX_DELAY[47] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[46].IMUX_IMUX_DELAY[20] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[46].IMUX_IMUX_DELAY[2] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[46].IMUX_IMUX_DELAY[19] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[46].IMUX_IMUX_DELAY[18] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[46].IMUX_IMUX_DELAY[1] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[46].IMUX_IMUX_DELAY[17] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[46].IMUX_IMUX_DELAY[16] |
| AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[46].IMUX_IMUX_DELAY[0] |
| AXI0_AWADDR_10_NIB0_CLB2PHY_FIFO_RDEN | input | CELL[58].IMUX_IMUX_DELAY[32] |
| AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN0 | input | CELL[53].IMUX_IMUX_DELAY[43] |
| AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN1 | input | CELL[53].IMUX_IMUX_DELAY[42] |
| AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN2 | input | CELL[53].IMUX_IMUX_DELAY[13] |
| AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN3 | input | CELL[53].IMUX_IMUX_DELAY[41] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT0 | input | CELL[53].IMUX_IMUX_DELAY[47] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT1 | input | CELL[53].IMUX_IMUX_DELAY[46] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT2 | input | CELL[53].IMUX_IMUX_DELAY[15] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT3 | input | CELL[53].IMUX_IMUX_DELAY[45] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT4 | input | CELL[53].IMUX_IMUX_DELAY[44] |
| AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT5 | input | CELL[53].IMUX_IMUX_DELAY[14] |
| AXI0_AWADDR_21_NIB1_CLB2PHY_FIFO_RDEN | input | CELL[54].IMUX_IMUX_DELAY[16] |
| AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN0 | input | CELL[45].IMUX_IMUX_DELAY[4] |
| AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN1 | input | CELL[45].IMUX_IMUX_DELAY[23] |
| AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN2 | input | CELL[45].IMUX_IMUX_DELAY[22] |
| AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN3 | input | CELL[45].IMUX_IMUX_DELAY[3] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT0 | input | CELL[45].IMUX_IMUX_DELAY[6] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT1 | input | CELL[45].IMUX_IMUX_DELAY[27] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT2 | input | CELL[45].IMUX_IMUX_DELAY[26] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT3 | input | CELL[45].IMUX_IMUX_DELAY[5] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT4 | input | CELL[45].IMUX_IMUX_DELAY[25] |
| AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT5 | input | CELL[45].IMUX_IMUX_DELAY[24] |
| AXI0_AWADDR_32_NIB2_CLB2PHY_FIFO_RDEN | input | CELL[45].IMUX_IMUX_DELAY[28] |
| AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN0 | input | CELL[43].IMUX_IMUX_DELAY[30] |
| AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN1 | input | CELL[43].IMUX_IMUX_DELAY[7] |
| AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN2 | input | CELL[43].IMUX_IMUX_DELAY[29] |
| AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN3 | input | CELL[43].IMUX_IMUX_DELAY[28] |
| AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN0 | input | CELL[58].IMUX_IMUX_DELAY[6] |
| AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN1 | input | CELL[58].IMUX_IMUX_DELAY[27] |
| AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN2 | input | CELL[58].IMUX_IMUX_DELAY[26] |
| AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN3 | input | CELL[58].IMUX_IMUX_DELAY[5] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT0 | input | CELL[43].IMUX_IMUX_DELAY[34] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT1 | input | CELL[43].IMUX_IMUX_DELAY[9] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT2 | input | CELL[43].IMUX_IMUX_DELAY[33] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT3 | input | CELL[43].IMUX_IMUX_DELAY[32] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT4 | input | CELL[43].IMUX_IMUX_DELAY[8] |
| AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT5 | input | CELL[43].IMUX_IMUX_DELAY[31] |
| AXI0_AWADDR_43_NIB3_CLB2PHY_FIFO_RDEN | input | CELL[43].IMUX_IMUX_DELAY[35] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT0 | input | CELL[58].IMUX_IMUX_DELAY[8] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT1 | input | CELL[58].IMUX_IMUX_DELAY[31] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT2 | input | CELL[58].IMUX_IMUX_DELAY[30] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT3 | input | CELL[58].IMUX_IMUX_DELAY[7] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT4 | input | CELL[58].IMUX_IMUX_DELAY[29] |
| AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT5 | input | CELL[58].IMUX_IMUX_DELAY[28] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[46].IMUX_IMUX_DELAY[27] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[46].IMUX_IMUX_DELAY[26] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[46].IMUX_IMUX_DELAY[5] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[46].IMUX_IMUX_DELAY[25] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[46].IMUX_IMUX_DELAY[24] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[46].IMUX_IMUX_DELAY[4] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[46].IMUX_IMUX_DELAY[23] |
| AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[46].IMUX_IMUX_DELAY[22] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[46].IMUX_IMUX_DELAY[32] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[46].IMUX_IMUX_DELAY[8] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[46].IMUX_IMUX_DELAY[31] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[46].IMUX_IMUX_DELAY[30] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[46].IMUX_IMUX_DELAY[7] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[46].IMUX_IMUX_DELAY[29] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[46].IMUX_IMUX_DELAY[28] |
| AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[46].IMUX_IMUX_DELAY[6] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[46].IMUX_IMUX_DELAY[12] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[46].IMUX_IMUX_DELAY[39] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[46].IMUX_IMUX_DELAY[33] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[46].IMUX_IMUX_DELAY[38] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[46].IMUX_IMUX_DELAY[11] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[46].IMUX_IMUX_DELAY[37] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[46].IMUX_IMUX_DELAY[36] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[46].IMUX_IMUX_DELAY[10] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[46].IMUX_IMUX_DELAY[35] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[46].IMUX_IMUX_DELAY[34] |
| AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[46].IMUX_IMUX_DELAY[9] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_0 | output | CELL[50].OUT_BEL[17] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_1 | output | CELL[50].OUT_BEL[16] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_2 | output | CELL[50].OUT_BEL[18] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_3 | output | CELL[50].OUT_BEL[15] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_4 | output | CELL[50].OUT_BEL[19] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_5 | output | CELL[50].OUT_BEL[14] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_6 | output | CELL[50].OUT_BEL[20] |
| AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_7 | output | CELL[50].OUT_BEL[13] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_0 | output | CELL[50].OUT_BEL[25] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_1 | output | CELL[50].OUT_BEL[24] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_2 | output | CELL[50].OUT_BEL[26] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_3 | output | CELL[50].OUT_BEL[23] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_4 | output | CELL[50].OUT_BEL[27] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_5 | output | CELL[50].OUT_BEL[22] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_6 | output | CELL[50].OUT_BEL[28] |
| AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_7 | output | CELL[50].OUT_BEL[21] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_0 | output | CELL[51].OUT_BEL[4] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_1 | output | CELL[51].OUT_BEL[3] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_2 | output | CELL[51].OUT_BEL[5] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_3 | output | CELL[50].OUT_BEL[31] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_4 | output | CELL[51].OUT_BEL[6] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_5 | output | CELL[50].OUT_BEL[30] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_6 | output | CELL[51].OUT_BEL[7] |
| AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_7 | output | CELL[50].OUT_BEL[29] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_0 | output | CELL[52].OUT_BEL[4] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_1 | output | CELL[52].OUT_BEL[3] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_2 | output | CELL[52].OUT_BEL[5] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_3 | output | CELL[51].OUT_BEL[31] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_4 | output | CELL[52].OUT_BEL[6] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_5 | output | CELL[51].OUT_BEL[30] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_6 | output | CELL[52].OUT_BEL[7] |
| AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_7 | output | CELL[51].OUT_BEL[29] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA0 | output | CELL[48].OUT_BEL[6] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA1 | output | CELL[48].OUT_BEL[5] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA10 | output | CELL[47].OUT_BEL[25] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA11 | output | CELL[47].OUT_BEL[24] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA12 | output | CELL[47].OUT_BEL[23] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA13 | output | CELL[47].OUT_BEL[22] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA14 | output | CELL[47].OUT_BEL[21] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA15 | output | CELL[47].OUT_BEL[20] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA2 | output | CELL[48].OUT_BEL[4] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA3 | output | CELL[48].OUT_BEL[3] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA4 | output | CELL[47].OUT_BEL[31] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA5 | output | CELL[47].OUT_BEL[30] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA6 | output | CELL[47].OUT_BEL[29] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA7 | output | CELL[47].OUT_BEL[28] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA8 | output | CELL[47].OUT_BEL[27] |
| AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA9 | output | CELL[47].OUT_BEL[26] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_0 | output | CELL[49].OUT_BEL[21] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_1 | output | CELL[49].OUT_BEL[22] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_2 | output | CELL[49].OUT_BEL[20] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_3 | output | CELL[49].OUT_BEL[23] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_4 | output | CELL[49].OUT_BEL[19] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_5 | output | CELL[49].OUT_BEL[24] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_6 | output | CELL[49].OUT_BEL[18] |
| AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_7 | output | CELL[49].OUT_BEL[25] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_0 | output | CELL[49].OUT_BEL[13] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_1 | output | CELL[49].OUT_BEL[14] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_2 | output | CELL[49].OUT_BEL[12] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_3 | output | CELL[49].OUT_BEL[15] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_4 | output | CELL[49].OUT_BEL[11] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_5 | output | CELL[49].OUT_BEL[16] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_6 | output | CELL[49].OUT_BEL[10] |
| AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_7 | output | CELL[49].OUT_BEL[17] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA0 | output | CELL[58].OUT_BEL[15] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA1 | output | CELL[58].OUT_BEL[14] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA10 | output | CELL[58].OUT_BEL[5] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA11 | output | CELL[58].OUT_BEL[4] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA12 | output | CELL[58].OUT_BEL[3] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA13 | output | CELL[58].OUT_BEL[2] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA14 | output | CELL[58].OUT_BEL[1] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA15 | output | CELL[58].OUT_BEL[0] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA2 | output | CELL[58].OUT_BEL[13] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA3 | output | CELL[58].OUT_BEL[12] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA4 | output | CELL[58].OUT_BEL[11] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA5 | output | CELL[58].OUT_BEL[10] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA6 | output | CELL[58].OUT_BEL[9] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA7 | output | CELL[58].OUT_BEL[8] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA8 | output | CELL[58].OUT_BEL[7] |
| AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA9 | output | CELL[58].OUT_BEL[6] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_0 | output | CELL[49].OUT_BEL[5] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_1 | output | CELL[49].OUT_BEL[6] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_2 | output | CELL[49].OUT_BEL[4] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_3 | output | CELL[49].OUT_BEL[7] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_4 | output | CELL[49].OUT_BEL[3] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_5 | output | CELL[49].OUT_BEL[8] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_6 | output | CELL[48].OUT_BEL[31] |
| AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_7 | output | CELL[49].OUT_BEL[9] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_0 | output | CELL[48].OUT_BEL[26] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_1 | output | CELL[48].OUT_BEL[27] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_2 | output | CELL[48].OUT_BEL[25] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_3 | output | CELL[48].OUT_BEL[28] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_4 | output | CELL[48].OUT_BEL[24] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_5 | output | CELL[48].OUT_BEL[29] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_6 | output | CELL[48].OUT_BEL[23] |
| AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_7 | output | CELL[48].OUT_BEL[30] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_0 | output | CELL[48].OUT_BEL[18] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_1 | output | CELL[48].OUT_BEL[19] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_2 | output | CELL[48].OUT_BEL[17] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_3 | output | CELL[48].OUT_BEL[20] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_4 | output | CELL[48].OUT_BEL[16] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_5 | output | CELL[48].OUT_BEL[21] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_6 | output | CELL[48].OUT_BEL[15] |
| AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_7 | output | CELL[48].OUT_BEL[22] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_0 | output | CELL[48].OUT_BEL[10] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_1 | output | CELL[48].OUT_BEL[11] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_2 | output | CELL[48].OUT_BEL[9] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_3 | output | CELL[48].OUT_BEL[12] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_4 | output | CELL[48].OUT_BEL[8] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_5 | output | CELL[48].OUT_BEL[13] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_6 | output | CELL[48].OUT_BEL[7] |
| AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_7 | output | CELL[48].OUT_BEL[14] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA0 | output | CELL[44].OUT_BEL[5] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA1 | output | CELL[44].OUT_BEL[4] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA10 | output | CELL[43].OUT_BEL[24] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA11 | output | CELL[43].OUT_BEL[23] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA12 | output | CELL[43].OUT_BEL[22] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA13 | output | CELL[43].OUT_BEL[21] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA14 | output | CELL[43].OUT_BEL[20] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA15 | output | CELL[43].OUT_BEL[19] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA2 | output | CELL[44].OUT_BEL[3] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA3 | output | CELL[43].OUT_BEL[31] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA4 | output | CELL[43].OUT_BEL[30] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA5 | output | CELL[43].OUT_BEL[29] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA6 | output | CELL[43].OUT_BEL[28] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA7 | output | CELL[43].OUT_BEL[27] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA8 | output | CELL[43].OUT_BEL[26] |
| AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA9 | output | CELL[43].OUT_BEL[25] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_0 | output | CELL[39].OUT_BEL[29] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_1 | output | CELL[39].OUT_BEL[28] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_2 | output | CELL[39].OUT_BEL[30] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_3 | output | CELL[39].OUT_BEL[27] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_4 | output | CELL[39].OUT_BEL[31] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_5 | output | CELL[39].OUT_BEL[26] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_6 | output | CELL[40].OUT_BEL[0] |
| AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_7 | output | CELL[39].OUT_BEL[25] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_0 | output | CELL[40].OUT_BEL[5] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_1 | output | CELL[40].OUT_BEL[4] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_2 | output | CELL[40].OUT_BEL[6] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_3 | output | CELL[40].OUT_BEL[3] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_4 | output | CELL[40].OUT_BEL[7] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_5 | output | CELL[40].OUT_BEL[2] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_6 | output | CELL[40].OUT_BEL[8] |
| AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_7 | output | CELL[40].OUT_BEL[1] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_0 | output | CELL[40].OUT_BEL[13] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_1 | output | CELL[40].OUT_BEL[12] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_2 | output | CELL[40].OUT_BEL[14] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_3 | output | CELL[40].OUT_BEL[11] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_4 | output | CELL[40].OUT_BEL[15] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_5 | output | CELL[40].OUT_BEL[10] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_6 | output | CELL[40].OUT_BEL[16] |
| AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_7 | output | CELL[40].OUT_BEL[9] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_0 | output | CELL[40].OUT_BEL[21] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_1 | output | CELL[40].OUT_BEL[20] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_2 | output | CELL[40].OUT_BEL[22] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_3 | output | CELL[40].OUT_BEL[19] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_4 | output | CELL[40].OUT_BEL[23] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_5 | output | CELL[40].OUT_BEL[18] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_6 | output | CELL[40].OUT_BEL[24] |
| AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_7 | output | CELL[40].OUT_BEL[17] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_0 | output | CELL[59].OUT_BEL[27] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_1 | output | CELL[59].OUT_BEL[28] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_2 | output | CELL[59].OUT_BEL[26] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_3 | output | CELL[59].OUT_BEL[29] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_4 | output | CELL[59].OUT_BEL[25] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_5 | output | CELL[59].OUT_BEL[30] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_6 | output | CELL[59].OUT_BEL[24] |
| AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_7 | output | CELL[59].OUT_BEL[31] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_0 | output | CELL[41].OUT_BEL[15] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_1 | output | CELL[41].OUT_BEL[14] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_2 | output | CELL[41].OUT_BEL[16] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_3 | output | CELL[41].OUT_BEL[13] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_4 | output | CELL[41].OUT_BEL[17] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_5 | output | CELL[41].OUT_BEL[12] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_6 | output | CELL[41].OUT_BEL[18] |
| AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_7 | output | CELL[41].OUT_BEL[11] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_0 | output | CELL[41].OUT_BEL[23] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_1 | output | CELL[41].OUT_BEL[22] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_2 | output | CELL[41].OUT_BEL[24] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_3 | output | CELL[41].OUT_BEL[21] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_4 | output | CELL[41].OUT_BEL[25] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_5 | output | CELL[41].OUT_BEL[20] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_6 | output | CELL[41].OUT_BEL[26] |
| AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_7 | output | CELL[41].OUT_BEL[19] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_0 | output | CELL[59].OUT_BEL[19] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_1 | output | CELL[59].OUT_BEL[20] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_2 | output | CELL[59].OUT_BEL[18] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_3 | output | CELL[59].OUT_BEL[21] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_4 | output | CELL[59].OUT_BEL[17] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_5 | output | CELL[59].OUT_BEL[22] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_6 | output | CELL[59].OUT_BEL[16] |
| AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_7 | output | CELL[59].OUT_BEL[23] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_0 | output | CELL[59].OUT_BEL[11] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_1 | output | CELL[59].OUT_BEL[12] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_2 | output | CELL[59].OUT_BEL[10] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_3 | output | CELL[59].OUT_BEL[13] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_4 | output | CELL[59].OUT_BEL[9] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_5 | output | CELL[59].OUT_BEL[14] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_6 | output | CELL[59].OUT_BEL[8] |
| AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_7 | output | CELL[59].OUT_BEL[15] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_0 | output | CELL[59].OUT_BEL[3] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_1 | output | CELL[59].OUT_BEL[4] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_2 | output | CELL[59].OUT_BEL[2] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_3 | output | CELL[59].OUT_BEL[5] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_4 | output | CELL[59].OUT_BEL[1] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_5 | output | CELL[59].OUT_BEL[6] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_6 | output | CELL[59].OUT_BEL[0] |
| AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_7 | output | CELL[59].OUT_BEL[7] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_0 | output | CELL[58].OUT_BEL[27] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_1 | output | CELL[58].OUT_BEL[28] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_2 | output | CELL[58].OUT_BEL[26] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_3 | output | CELL[58].OUT_BEL[29] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_4 | output | CELL[58].OUT_BEL[25] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_5 | output | CELL[58].OUT_BEL[30] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_6 | output | CELL[58].OUT_BEL[24] |
| AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_7 | output | CELL[58].OUT_BEL[31] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_0 | output | CELL[58].OUT_BEL[19] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_1 | output | CELL[58].OUT_BEL[20] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_2 | output | CELL[58].OUT_BEL[18] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_3 | output | CELL[58].OUT_BEL[21] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_4 | output | CELL[58].OUT_BEL[17] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_5 | output | CELL[58].OUT_BEL[22] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_6 | output | CELL[58].OUT_BEL[16] |
| AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_7 | output | CELL[58].OUT_BEL[23] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA0 | output | CELL[54].OUT_BEL[16] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA1 | output | CELL[54].OUT_BEL[15] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA10 | output | CELL[54].OUT_BEL[6] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA11 | output | CELL[54].OUT_BEL[5] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA12 | output | CELL[54].OUT_BEL[4] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA13 | output | CELL[54].OUT_BEL[3] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA14 | output | CELL[53].OUT_BEL[31] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA15 | output | CELL[53].OUT_BEL[30] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA2 | output | CELL[54].OUT_BEL[14] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA3 | output | CELL[54].OUT_BEL[13] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA4 | output | CELL[54].OUT_BEL[12] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA5 | output | CELL[54].OUT_BEL[11] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA6 | output | CELL[54].OUT_BEL[10] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA7 | output | CELL[54].OUT_BEL[9] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA8 | output | CELL[54].OUT_BEL[8] |
| AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA9 | output | CELL[54].OUT_BEL[7] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_0 | output | CELL[49].OUT_BEL[30] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_1 | output | CELL[49].OUT_BEL[29] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_2 | output | CELL[49].OUT_BEL[31] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_3 | output | CELL[49].OUT_BEL[28] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_4 | output | CELL[50].OUT_BEL[3] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_5 | output | CELL[49].OUT_BEL[27] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_6 | output | CELL[50].OUT_BEL[4] |
| AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_7 | output | CELL[49].OUT_BEL[26] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_0 | output | CELL[50].OUT_BEL[9] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_1 | output | CELL[50].OUT_BEL[8] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_2 | output | CELL[50].OUT_BEL[10] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_3 | output | CELL[50].OUT_BEL[7] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_4 | output | CELL[50].OUT_BEL[11] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_5 | output | CELL[50].OUT_BEL[6] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_6 | output | CELL[50].OUT_BEL[12] |
| AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_7 | output | CELL[50].OUT_BEL[5] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_0 | input | CELL[50].IMUX_IMUX_DELAY[13] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_1 | input | CELL[50].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_2 | input | CELL[50].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_3 | input | CELL[50].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_4 | input | CELL[50].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_5 | input | CELL[50].IMUX_IMUX_DELAY[12] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_6 | input | CELL[50].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_7 | input | CELL[50].IMUX_IMUX_DELAY[39] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_0 | input | CELL[51].IMUX_IMUX_DELAY[35] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_1 | input | CELL[51].IMUX_IMUX_DELAY[34] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_2 | input | CELL[51].IMUX_IMUX_DELAY[10] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_3 | input | CELL[51].IMUX_IMUX_DELAY[9] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_4 | input | CELL[51].IMUX_IMUX_DELAY[36] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_5 | input | CELL[51].IMUX_IMUX_DELAY[33] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_6 | input | CELL[51].IMUX_IMUX_DELAY[37] |
| AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_7 | input | CELL[51].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_0 | input | CELL[51].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_1 | input | CELL[51].IMUX_IMUX_DELAY[12] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_2 | input | CELL[51].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_3 | input | CELL[51].IMUX_IMUX_DELAY[39] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_4 | input | CELL[51].IMUX_IMUX_DELAY[13] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_5 | input | CELL[51].IMUX_IMUX_DELAY[38] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_6 | input | CELL[51].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_7 | input | CELL[51].IMUX_IMUX_DELAY[11] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_0 | input | CELL[51].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_1 | input | CELL[51].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_2 | input | CELL[51].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_3 | input | CELL[51].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_4 | input | CELL[51].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_5 | input | CELL[51].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_6 | input | CELL[52].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_7 | input | CELL[51].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA0 | input | CELL[45].IMUX_IMUX_DELAY[0] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA1 | input | CELL[44].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA10 | input | CELL[44].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA11 | input | CELL[44].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA12 | input | CELL[44].IMUX_IMUX_DELAY[12] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA13 | input | CELL[44].IMUX_IMUX_DELAY[39] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA14 | input | CELL[44].IMUX_IMUX_DELAY[38] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA15 | input | CELL[44].IMUX_IMUX_DELAY[11] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA2 | input | CELL[44].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA3 | input | CELL[44].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA4 | input | CELL[44].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA5 | input | CELL[44].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA6 | input | CELL[44].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA7 | input | CELL[44].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA8 | input | CELL[44].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA9 | input | CELL[44].IMUX_IMUX_DELAY[13] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_0 | input | CELL[49].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_1 | input | CELL[49].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_2 | input | CELL[49].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_3 | input | CELL[49].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_4 | input | CELL[49].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_5 | input | CELL[49].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_6 | input | CELL[49].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_7 | input | CELL[49].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_0 | input | CELL[48].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_1 | input | CELL[48].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_2 | input | CELL[48].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_3 | input | CELL[48].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_4 | input | CELL[48].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_5 | input | CELL[48].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_6 | input | CELL[48].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_7 | input | CELL[48].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA0 | input | CELL[55].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA1 | input | CELL[55].IMUX_IMUX_DELAY[3] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA10 | input | CELL[54].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA11 | input | CELL[54].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA12 | input | CELL[54].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA13 | input | CELL[54].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA14 | input | CELL[54].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA15 | input | CELL[54].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA2 | input | CELL[55].IMUX_IMUX_DELAY[21] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA3 | input | CELL[55].IMUX_IMUX_DELAY[20] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA4 | input | CELL[55].IMUX_IMUX_DELAY[2] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA5 | input | CELL[55].IMUX_IMUX_DELAY[19] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA6 | input | CELL[55].IMUX_IMUX_DELAY[18] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA7 | input | CELL[55].IMUX_IMUX_DELAY[1] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA8 | input | CELL[55].IMUX_IMUX_DELAY[17] |
| AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA9 | input | CELL[55].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_0 | input | CELL[48].IMUX_IMUX_DELAY[38] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_1 | input | CELL[48].IMUX_IMUX_DELAY[39] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_2 | input | CELL[48].IMUX_IMUX_DELAY[11] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_3 | input | CELL[48].IMUX_IMUX_DELAY[12] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_4 | input | CELL[48].IMUX_IMUX_DELAY[37] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_5 | input | CELL[48].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_6 | input | CELL[48].IMUX_IMUX_DELAY[36] |
| AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_7 | input | CELL[48].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_0 | input | CELL[48].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_1 | input | CELL[48].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_2 | input | CELL[48].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_3 | input | CELL[48].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_4 | input | CELL[48].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_5 | input | CELL[48].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_6 | input | CELL[48].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_7 | input | CELL[48].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_0 | input | CELL[48].IMUX_IMUX_DELAY[4] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_1 | input | CELL[48].IMUX_IMUX_DELAY[24] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_2 | input | CELL[48].IMUX_IMUX_DELAY[23] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_3 | input | CELL[48].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_4 | input | CELL[48].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_5 | input | CELL[48].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_6 | input | CELL[48].IMUX_IMUX_DELAY[3] |
| AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_7 | input | CELL[48].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_0 | input | CELL[47].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_1 | input | CELL[47].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_2 | input | CELL[47].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_3 | input | CELL[47].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_4 | input | CELL[47].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_5 | input | CELL[48].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_6 | input | CELL[47].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_7 | input | CELL[48].IMUX_IMUX_DELAY[17] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA0 | input | CELL[43].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA1 | input | CELL[43].IMUX_IMUX_DELAY[3] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA10 | input | CELL[42].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA11 | input | CELL[42].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA12 | input | CELL[42].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA13 | input | CELL[42].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA14 | input | CELL[42].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA15 | input | CELL[42].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA2 | input | CELL[43].IMUX_IMUX_DELAY[21] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA3 | input | CELL[43].IMUX_IMUX_DELAY[20] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA4 | input | CELL[43].IMUX_IMUX_DELAY[2] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA5 | input | CELL[43].IMUX_IMUX_DELAY[19] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA6 | input | CELL[43].IMUX_IMUX_DELAY[18] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA7 | input | CELL[43].IMUX_IMUX_DELAY[1] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA8 | input | CELL[43].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA9 | input | CELL[43].IMUX_IMUX_DELAY[0] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_0 | input | CELL[39].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_1 | input | CELL[39].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_2 | input | CELL[39].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_3 | input | CELL[39].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_4 | input | CELL[39].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_5 | input | CELL[39].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_6 | input | CELL[39].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_7 | input | CELL[39].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_0 | input | CELL[39].IMUX_IMUX_DELAY[34] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_1 | input | CELL[39].IMUX_IMUX_DELAY[9] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_2 | input | CELL[39].IMUX_IMUX_DELAY[35] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_3 | input | CELL[39].IMUX_IMUX_DELAY[33] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_4 | input | CELL[39].IMUX_IMUX_DELAY[10] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_5 | input | CELL[39].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_6 | input | CELL[39].IMUX_IMUX_DELAY[36] |
| AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_7 | input | CELL[39].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_0 | input | CELL[40].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_1 | input | CELL[40].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_2 | input | CELL[40].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_3 | input | CELL[40].IMUX_IMUX_DELAY[24] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_4 | input | CELL[40].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_5 | input | CELL[40].IMUX_IMUX_DELAY[4] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_6 | input | CELL[40].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_7 | input | CELL[40].IMUX_IMUX_DELAY[23] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_0 | input | CELL[41].IMUX_IMUX_DELAY[19] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_1 | input | CELL[41].IMUX_IMUX_DELAY[18] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_2 | input | CELL[41].IMUX_IMUX_DELAY[2] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_3 | input | CELL[41].IMUX_IMUX_DELAY[1] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_4 | input | CELL[41].IMUX_IMUX_DELAY[20] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_5 | input | CELL[41].IMUX_IMUX_DELAY[17] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_6 | input | CELL[41].IMUX_IMUX_DELAY[21] |
| AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_7 | input | CELL[41].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_0 | input | CELL[59].IMUX_IMUX_DELAY[34] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_1 | input | CELL[59].IMUX_IMUX_DELAY[35] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_2 | input | CELL[59].IMUX_IMUX_DELAY[9] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_3 | input | CELL[59].IMUX_IMUX_DELAY[10] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_4 | input | CELL[59].IMUX_IMUX_DELAY[33] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_5 | input | CELL[59].IMUX_IMUX_DELAY[36] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_6 | input | CELL[59].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_7 | input | CELL[59].IMUX_IMUX_DELAY[37] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_0 | input | CELL[41].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_1 | input | CELL[41].IMUX_IMUX_DELAY[24] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_2 | input | CELL[41].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_3 | input | CELL[41].IMUX_IMUX_DELAY[4] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_4 | input | CELL[41].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_5 | input | CELL[41].IMUX_IMUX_DELAY[23] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_6 | input | CELL[41].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_7 | input | CELL[41].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_0 | input | CELL[41].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_1 | input | CELL[41].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_2 | input | CELL[41].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_3 | input | CELL[41].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_4 | input | CELL[41].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_5 | input | CELL[41].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_6 | input | CELL[41].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_7 | input | CELL[41].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_0 | input | CELL[59].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_1 | input | CELL[59].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_2 | input | CELL[59].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_3 | input | CELL[59].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_4 | input | CELL[59].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_5 | input | CELL[59].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_6 | input | CELL[59].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_7 | input | CELL[59].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_0 | input | CELL[59].IMUX_IMUX_DELAY[23] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_1 | input | CELL[59].IMUX_IMUX_DELAY[4] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_2 | input | CELL[59].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_3 | input | CELL[59].IMUX_IMUX_DELAY[24] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_4 | input | CELL[59].IMUX_IMUX_DELAY[3] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_5 | input | CELL[59].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_6 | input | CELL[59].IMUX_IMUX_DELAY[21] |
| AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_7 | input | CELL[59].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_0 | input | CELL[59].IMUX_IMUX_DELAY[1] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_1 | input | CELL[59].IMUX_IMUX_DELAY[18] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_2 | input | CELL[58].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_3 | input | CELL[59].IMUX_IMUX_DELAY[19] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_4 | input | CELL[58].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_5 | input | CELL[59].IMUX_IMUX_DELAY[2] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_6 | input | CELL[58].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_7 | input | CELL[59].IMUX_IMUX_DELAY[20] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_0 | input | CELL[58].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_1 | input | CELL[58].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_2 | input | CELL[58].IMUX_IMUX_DELAY[13] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_3 | input | CELL[58].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_4 | input | CELL[58].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_5 | input | CELL[58].IMUX_IMUX_DELAY[44] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_6 | input | CELL[58].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_7 | input | CELL[58].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_0 | input | CELL[58].IMUX_IMUX_DELAY[22] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_1 | input | CELL[58].IMUX_IMUX_DELAY[23] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_2 | input | CELL[58].IMUX_IMUX_DELAY[3] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_3 | input | CELL[58].IMUX_IMUX_DELAY[4] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_4 | input | CELL[58].IMUX_IMUX_DELAY[21] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_5 | input | CELL[58].IMUX_IMUX_DELAY[24] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_6 | input | CELL[58].IMUX_IMUX_DELAY[20] |
| AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_7 | input | CELL[58].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA0 | input | CELL[53].IMUX_IMUX_DELAY[35] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA1 | input | CELL[53].IMUX_IMUX_DELAY[34] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA10 | input | CELL[53].IMUX_IMUX_DELAY[28] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA11 | input | CELL[53].IMUX_IMUX_DELAY[6] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA12 | input | CELL[53].IMUX_IMUX_DELAY[27] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA13 | input | CELL[53].IMUX_IMUX_DELAY[26] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA14 | input | CELL[53].IMUX_IMUX_DELAY[5] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA15 | input | CELL[53].IMUX_IMUX_DELAY[25] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA2 | input | CELL[53].IMUX_IMUX_DELAY[9] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA3 | input | CELL[53].IMUX_IMUX_DELAY[33] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA4 | input | CELL[53].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA5 | input | CELL[53].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA6 | input | CELL[53].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA7 | input | CELL[53].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA8 | input | CELL[53].IMUX_IMUX_DELAY[7] |
| AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA9 | input | CELL[53].IMUX_IMUX_DELAY[29] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_0 | input | CELL[49].IMUX_IMUX_DELAY[33] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_1 | input | CELL[49].IMUX_IMUX_DELAY[32] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_2 | input | CELL[49].IMUX_IMUX_DELAY[9] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_3 | input | CELL[49].IMUX_IMUX_DELAY[8] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_4 | input | CELL[49].IMUX_IMUX_DELAY[34] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_5 | input | CELL[49].IMUX_IMUX_DELAY[31] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_6 | input | CELL[49].IMUX_IMUX_DELAY[35] |
| AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_7 | input | CELL[49].IMUX_IMUX_DELAY[30] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_0 | input | CELL[50].IMUX_IMUX_DELAY[16] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_1 | input | CELL[49].IMUX_IMUX_DELAY[47] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_2 | input | CELL[50].IMUX_IMUX_DELAY[17] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_3 | input | CELL[49].IMUX_IMUX_DELAY[46] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_4 | input | CELL[50].IMUX_IMUX_DELAY[1] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_5 | input | CELL[49].IMUX_IMUX_DELAY[15] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_6 | input | CELL[50].IMUX_IMUX_DELAY[18] |
| AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_7 | input | CELL[49].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN0 | input | CELL[46].IMUX_IMUX_DELAY[14] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN1 | input | CELL[46].IMUX_IMUX_DELAY[43] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN2 | input | CELL[46].IMUX_IMUX_DELAY[42] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN3 | input | CELL[46].IMUX_IMUX_DELAY[13] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN4 | input | CELL[46].IMUX_IMUX_DELAY[41] |
| AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN5 | input | CELL[46].IMUX_IMUX_DELAY[40] |
| AXI0_WDATA_PAR_7_6_NIB2_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[46].IMUX_IMUX_DELAY[45] |
| AXI0_WDATA_PAR_7_6_NIB2_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[46].IMUX_IMUX_DELAY[44] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR0 | input | CELL[53].IMUX_IMUX_DELAY[40] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR1 | input | CELL[53].IMUX_IMUX_DELAY[12] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR2 | input | CELL[53].IMUX_IMUX_DELAY[39] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR3 | input | CELL[53].IMUX_IMUX_DELAY[38] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR4 | input | CELL[53].IMUX_IMUX_DELAY[11] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR5 | input | CELL[53].IMUX_IMUX_DELAY[37] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR6 | input | CELL[53].IMUX_IMUX_DELAY[36] |
| AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR7 | input | CELL[53].IMUX_IMUX_DELAY[10] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR0 | input | CELL[45].IMUX_IMUX_DELAY[21] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR1 | input | CELL[45].IMUX_IMUX_DELAY[20] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR2 | input | CELL[45].IMUX_IMUX_DELAY[2] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR3 | input | CELL[45].IMUX_IMUX_DELAY[19] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR4 | input | CELL[45].IMUX_IMUX_DELAY[18] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR5 | input | CELL[45].IMUX_IMUX_DELAY[1] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR6 | input | CELL[45].IMUX_IMUX_DELAY[17] |
| AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR7 | input | CELL[45].IMUX_IMUX_DELAY[16] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR0 | input | CELL[43].IMUX_IMUX_DELAY[6] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR1 | input | CELL[43].IMUX_IMUX_DELAY[27] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR2 | input | CELL[43].IMUX_IMUX_DELAY[26] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR3 | input | CELL[43].IMUX_IMUX_DELAY[5] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR4 | input | CELL[43].IMUX_IMUX_DELAY[25] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR5 | input | CELL[43].IMUX_IMUX_DELAY[24] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR6 | input | CELL[43].IMUX_IMUX_DELAY[4] |
| AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR7 | input | CELL[43].IMUX_IMUX_DELAY[23] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR0 | input | CELL[55].IMUX_IMUX_DELAY[6] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR1 | input | CELL[55].IMUX_IMUX_DELAY[27] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR2 | input | CELL[55].IMUX_IMUX_DELAY[26] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR3 | input | CELL[55].IMUX_IMUX_DELAY[5] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR4 | input | CELL[55].IMUX_IMUX_DELAY[25] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR5 | input | CELL[55].IMUX_IMUX_DELAY[24] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR6 | input | CELL[55].IMUX_IMUX_DELAY[4] |
| AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR7 | input | CELL[55].IMUX_IMUX_DELAY[23] |
| AXI1_ARADDR_10_NIB6_CLB2PHY_DLYCTL_EN_VTC | input | CELL[16].IMUX_IMUX_DELAY[12] |
| AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN0 | input | CELL[14].IMUX_IMUX_DELAY[4] |
| AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN1 | input | CELL[14].IMUX_IMUX_DELAY[23] |
| AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN2 | input | CELL[14].IMUX_IMUX_DELAY[22] |
| AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN3 | input | CELL[14].IMUX_IMUX_DELAY[3] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL0 | input | CELL[14].IMUX_IMUX_DELAY[6] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL1 | input | CELL[14].IMUX_IMUX_DELAY[27] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL2 | input | CELL[14].IMUX_IMUX_DELAY[26] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL3 | input | CELL[14].IMUX_IMUX_DELAY[5] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL4 | input | CELL[14].IMUX_IMUX_DELAY[25] |
| AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL5 | input | CELL[14].IMUX_IMUX_DELAY[24] |
| AXI1_ARADDR_21_NIB7_CLB2PHY_DLYCTL_EN_VTC | input | CELL[14].IMUX_IMUX_DELAY[28] |
| AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN0 | input | CELL[5].IMUX_IMUX_DELAY[36] |
| AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN1 | input | CELL[5].IMUX_IMUX_DELAY[10] |
| AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN2 | input | CELL[5].IMUX_IMUX_DELAY[35] |
| AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN3 | input | CELL[5].IMUX_IMUX_DELAY[34] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL0 | input | CELL[5].IMUX_IMUX_DELAY[40] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL1 | input | CELL[5].IMUX_IMUX_DELAY[12] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL2 | input | CELL[5].IMUX_IMUX_DELAY[39] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL3 | input | CELL[5].IMUX_IMUX_DELAY[38] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL4 | input | CELL[5].IMUX_IMUX_DELAY[11] |
| AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL5 | input | CELL[5].IMUX_IMUX_DELAY[37] |
| AXI1_ARADDR_32_NIB8_CLB2PHY_DLYCTL_EN_VTC | input | CELL[5].IMUX_IMUX_DELAY[41] |
| AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN0 | input | CELL[2].IMUX_IMUX_DELAY[36] |
| AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN1 | input | CELL[2].IMUX_IMUX_DELAY[10] |
| AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN2 | input | CELL[2].IMUX_IMUX_DELAY[35] |
| AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN3 | input | CELL[2].IMUX_IMUX_DELAY[34] |
| AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN0 | input | CELL[16].IMUX_IMUX_DELAY[35] |
| AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN1 | input | CELL[16].IMUX_IMUX_DELAY[34] |
| AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN2 | input | CELL[16].IMUX_IMUX_DELAY[9] |
| AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN3 | input | CELL[16].IMUX_IMUX_DELAY[33] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL0 | input | CELL[2].IMUX_IMUX_DELAY[40] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL1 | input | CELL[2].IMUX_IMUX_DELAY[12] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL2 | input | CELL[2].IMUX_IMUX_DELAY[39] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL3 | input | CELL[2].IMUX_IMUX_DELAY[38] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL4 | input | CELL[2].IMUX_IMUX_DELAY[11] |
| AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL5 | input | CELL[2].IMUX_IMUX_DELAY[37] |
| AXI1_ARADDR_43_NIB9_CLB2PHY_DLYCTL_EN_VTC | input | CELL[2].IMUX_IMUX_DELAY[41] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL0 | input | CELL[16].IMUX_IMUX_DELAY[39] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL1 | input | CELL[16].IMUX_IMUX_DELAY[38] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL2 | input | CELL[16].IMUX_IMUX_DELAY[11] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL3 | input | CELL[16].IMUX_IMUX_DELAY[37] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL4 | input | CELL[16].IMUX_IMUX_DELAY[36] |
| AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL5 | input | CELL[16].IMUX_IMUX_DELAY[10] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[16].IMUX_IMUX_DELAY[45] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[16].IMUX_IMUX_DELAY[44] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[16].IMUX_IMUX_DELAY[14] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[16].IMUX_IMUX_DELAY[43] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[16].IMUX_IMUX_DELAY[42] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[16].IMUX_IMUX_DELAY[13] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[16].IMUX_IMUX_DELAY[41] |
| AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[16].IMUX_IMUX_DELAY[40] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[17].IMUX_IMUX_DELAY[18] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[17].IMUX_IMUX_DELAY[1] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[17].IMUX_IMUX_DELAY[17] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[17].IMUX_IMUX_DELAY[16] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[17].IMUX_IMUX_DELAY[0] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[16].IMUX_IMUX_DELAY[47] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[16].IMUX_IMUX_DELAY[46] |
| AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[16].IMUX_IMUX_DELAY[15] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[17].IMUX_IMUX_DELAY[5] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[17].IMUX_IMUX_DELAY[25] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[17].IMUX_IMUX_DELAY[19] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[17].IMUX_IMUX_DELAY[24] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[17].IMUX_IMUX_DELAY[4] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[17].IMUX_IMUX_DELAY[23] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[17].IMUX_IMUX_DELAY[22] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[17].IMUX_IMUX_DELAY[3] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[17].IMUX_IMUX_DELAY[21] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[17].IMUX_IMUX_DELAY[20] |
| AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[17].IMUX_IMUX_DELAY[2] |
| AXI1_AWADDR_10_NIB6_CLB2PHY_FIFO_RDEN | input | CELL[16].IMUX_IMUX_DELAY[32] |
| AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN0 | input | CELL[14].IMUX_IMUX_DELAY[16] |
| AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN1 | input | CELL[14].IMUX_IMUX_DELAY[0] |
| AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN2 | input | CELL[13].IMUX_IMUX_DELAY[47] |
| AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN3 | input | CELL[13].IMUX_IMUX_DELAY[46] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT0 | input | CELL[14].IMUX_IMUX_DELAY[20] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT1 | input | CELL[14].IMUX_IMUX_DELAY[2] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT2 | input | CELL[14].IMUX_IMUX_DELAY[19] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT3 | input | CELL[14].IMUX_IMUX_DELAY[18] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT4 | input | CELL[14].IMUX_IMUX_DELAY[1] |
| AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT5 | input | CELL[14].IMUX_IMUX_DELAY[17] |
| AXI1_AWADDR_21_NIB7_CLB2PHY_FIFO_RDEN | input | CELL[14].IMUX_IMUX_DELAY[21] |
| AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN0 | input | CELL[5].IMUX_IMUX_DELAY[29] |
| AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN1 | input | CELL[5].IMUX_IMUX_DELAY[28] |
| AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN2 | input | CELL[5].IMUX_IMUX_DELAY[6] |
| AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN3 | input | CELL[5].IMUX_IMUX_DELAY[27] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT0 | input | CELL[5].IMUX_IMUX_DELAY[33] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT1 | input | CELL[5].IMUX_IMUX_DELAY[32] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT2 | input | CELL[5].IMUX_IMUX_DELAY[8] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT3 | input | CELL[5].IMUX_IMUX_DELAY[31] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT4 | input | CELL[5].IMUX_IMUX_DELAY[30] |
| AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT5 | input | CELL[5].IMUX_IMUX_DELAY[7] |
| AXI1_AWADDR_32_NIB8_CLB2PHY_FIFO_RDEN | input | CELL[5].IMUX_IMUX_DELAY[9] |
| AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN0 | input | CELL[2].IMUX_IMUX_DELAY[29] |
| AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN1 | input | CELL[2].IMUX_IMUX_DELAY[28] |
| AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN2 | input | CELL[2].IMUX_IMUX_DELAY[6] |
| AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN3 | input | CELL[2].IMUX_IMUX_DELAY[27] |
| AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN0 | input | CELL[16].IMUX_IMUX_DELAY[27] |
| AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN1 | input | CELL[16].IMUX_IMUX_DELAY[26] |
| AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN2 | input | CELL[16].IMUX_IMUX_DELAY[5] |
| AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN3 | input | CELL[16].IMUX_IMUX_DELAY[25] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT0 | input | CELL[2].IMUX_IMUX_DELAY[33] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT1 | input | CELL[2].IMUX_IMUX_DELAY[32] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT2 | input | CELL[2].IMUX_IMUX_DELAY[8] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT3 | input | CELL[2].IMUX_IMUX_DELAY[31] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT4 | input | CELL[2].IMUX_IMUX_DELAY[30] |
| AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT5 | input | CELL[2].IMUX_IMUX_DELAY[7] |
| AXI1_AWADDR_43_NIB9_CLB2PHY_FIFO_RDEN | input | CELL[2].IMUX_IMUX_DELAY[9] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT0 | input | CELL[16].IMUX_IMUX_DELAY[31] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT1 | input | CELL[16].IMUX_IMUX_DELAY[30] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT2 | input | CELL[16].IMUX_IMUX_DELAY[7] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT3 | input | CELL[16].IMUX_IMUX_DELAY[29] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT4 | input | CELL[16].IMUX_IMUX_DELAY[28] |
| AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT5 | input | CELL[16].IMUX_IMUX_DELAY[6] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[17].IMUX_IMUX_DELAY[31] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[17].IMUX_IMUX_DELAY[30] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[17].IMUX_IMUX_DELAY[7] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[17].IMUX_IMUX_DELAY[29] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[17].IMUX_IMUX_DELAY[28] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[17].IMUX_IMUX_DELAY[6] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[17].IMUX_IMUX_DELAY[27] |
| AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[17].IMUX_IMUX_DELAY[26] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[17].IMUX_IMUX_DELAY[36] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[17].IMUX_IMUX_DELAY[10] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[17].IMUX_IMUX_DELAY[35] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[17].IMUX_IMUX_DELAY[34] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[17].IMUX_IMUX_DELAY[9] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[17].IMUX_IMUX_DELAY[33] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[17].IMUX_IMUX_DELAY[32] |
| AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[17].IMUX_IMUX_DELAY[8] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[17].IMUX_IMUX_DELAY[14] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[17].IMUX_IMUX_DELAY[43] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[17].IMUX_IMUX_DELAY[37] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[17].IMUX_IMUX_DELAY[42] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[17].IMUX_IMUX_DELAY[13] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[17].IMUX_IMUX_DELAY[41] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[17].IMUX_IMUX_DELAY[40] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[17].IMUX_IMUX_DELAY[12] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[17].IMUX_IMUX_DELAY[39] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[17].IMUX_IMUX_DELAY[38] |
| AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[17].IMUX_IMUX_DELAY[11] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_0 | output | CELL[10].OUT_BEL[9] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_1 | output | CELL[10].OUT_BEL[8] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_2 | output | CELL[10].OUT_BEL[10] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_3 | output | CELL[10].OUT_BEL[7] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_4 | output | CELL[10].OUT_BEL[11] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_5 | output | CELL[10].OUT_BEL[6] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_6 | output | CELL[10].OUT_BEL[12] |
| AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_7 | output | CELL[10].OUT_BEL[5] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_0 | output | CELL[10].OUT_BEL[17] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_1 | output | CELL[10].OUT_BEL[16] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_2 | output | CELL[10].OUT_BEL[18] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_3 | output | CELL[10].OUT_BEL[15] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_4 | output | CELL[10].OUT_BEL[19] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_5 | output | CELL[10].OUT_BEL[14] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_6 | output | CELL[10].OUT_BEL[20] |
| AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_7 | output | CELL[10].OUT_BEL[13] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_0 | output | CELL[10].OUT_BEL[25] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_1 | output | CELL[10].OUT_BEL[24] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_2 | output | CELL[10].OUT_BEL[26] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_3 | output | CELL[10].OUT_BEL[23] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_4 | output | CELL[10].OUT_BEL[27] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_5 | output | CELL[10].OUT_BEL[22] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_6 | output | CELL[10].OUT_BEL[28] |
| AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_7 | output | CELL[10].OUT_BEL[21] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_0 | output | CELL[11].OUT_BEL[4] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_1 | output | CELL[11].OUT_BEL[3] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_2 | output | CELL[11].OUT_BEL[5] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_3 | output | CELL[10].OUT_BEL[31] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_4 | output | CELL[11].OUT_BEL[6] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_5 | output | CELL[10].OUT_BEL[30] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_6 | output | CELL[11].OUT_BEL[7] |
| AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_7 | output | CELL[10].OUT_BEL[29] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA0 | output | CELL[7].OUT_BEL[27] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA1 | output | CELL[7].OUT_BEL[26] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA10 | output | CELL[7].OUT_BEL[17] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA11 | output | CELL[7].OUT_BEL[16] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA12 | output | CELL[7].OUT_BEL[15] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA13 | output | CELL[7].OUT_BEL[14] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA14 | output | CELL[7].OUT_BEL[13] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA15 | output | CELL[7].OUT_BEL[12] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA2 | output | CELL[7].OUT_BEL[25] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA3 | output | CELL[7].OUT_BEL[24] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA4 | output | CELL[7].OUT_BEL[23] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA5 | output | CELL[7].OUT_BEL[22] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA6 | output | CELL[7].OUT_BEL[21] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA7 | output | CELL[7].OUT_BEL[20] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA8 | output | CELL[7].OUT_BEL[19] |
| AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA9 | output | CELL[7].OUT_BEL[18] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_0 | output | CELL[9].OUT_BEL[13] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_1 | output | CELL[9].OUT_BEL[14] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_2 | output | CELL[9].OUT_BEL[12] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_3 | output | CELL[9].OUT_BEL[15] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_4 | output | CELL[9].OUT_BEL[11] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_5 | output | CELL[9].OUT_BEL[16] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_6 | output | CELL[9].OUT_BEL[10] |
| AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_7 | output | CELL[9].OUT_BEL[17] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_0 | output | CELL[9].OUT_BEL[5] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_1 | output | CELL[9].OUT_BEL[6] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_2 | output | CELL[9].OUT_BEL[4] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_3 | output | CELL[9].OUT_BEL[7] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_4 | output | CELL[9].OUT_BEL[3] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_5 | output | CELL[9].OUT_BEL[8] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_6 | output | CELL[8].OUT_BEL[31] |
| AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_7 | output | CELL[9].OUT_BEL[9] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA0 | output | CELL[19].OUT_BEL[19] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA1 | output | CELL[19].OUT_BEL[18] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA10 | output | CELL[19].OUT_BEL[9] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA11 | output | CELL[19].OUT_BEL[8] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA12 | output | CELL[19].OUT_BEL[7] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA13 | output | CELL[19].OUT_BEL[6] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA14 | output | CELL[19].OUT_BEL[5] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA15 | output | CELL[19].OUT_BEL[4] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA2 | output | CELL[19].OUT_BEL[17] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA3 | output | CELL[19].OUT_BEL[16] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA4 | output | CELL[19].OUT_BEL[15] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA5 | output | CELL[19].OUT_BEL[14] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA6 | output | CELL[19].OUT_BEL[13] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA7 | output | CELL[19].OUT_BEL[12] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA8 | output | CELL[19].OUT_BEL[11] |
| AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA9 | output | CELL[19].OUT_BEL[10] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_0 | output | CELL[8].OUT_BEL[26] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_1 | output | CELL[8].OUT_BEL[27] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_2 | output | CELL[8].OUT_BEL[25] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_3 | output | CELL[8].OUT_BEL[28] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_4 | output | CELL[8].OUT_BEL[24] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_5 | output | CELL[8].OUT_BEL[29] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_6 | output | CELL[8].OUT_BEL[23] |
| AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_7 | output | CELL[8].OUT_BEL[30] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_0 | output | CELL[8].OUT_BEL[18] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_1 | output | CELL[8].OUT_BEL[19] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_2 | output | CELL[8].OUT_BEL[17] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_3 | output | CELL[8].OUT_BEL[20] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_4 | output | CELL[8].OUT_BEL[16] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_5 | output | CELL[8].OUT_BEL[21] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_6 | output | CELL[8].OUT_BEL[15] |
| AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_7 | output | CELL[8].OUT_BEL[22] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_0 | output | CELL[8].OUT_BEL[10] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_1 | output | CELL[8].OUT_BEL[11] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_2 | output | CELL[8].OUT_BEL[9] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_3 | output | CELL[8].OUT_BEL[12] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_4 | output | CELL[8].OUT_BEL[8] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_5 | output | CELL[8].OUT_BEL[13] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_6 | output | CELL[8].OUT_BEL[7] |
| AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_7 | output | CELL[8].OUT_BEL[14] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_0 | output | CELL[7].OUT_BEL[31] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_1 | output | CELL[8].OUT_BEL[3] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_2 | output | CELL[7].OUT_BEL[30] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_3 | output | CELL[8].OUT_BEL[4] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_4 | output | CELL[7].OUT_BEL[29] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_5 | output | CELL[8].OUT_BEL[5] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_6 | output | CELL[7].OUT_BEL[28] |
| AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_7 | output | CELL[8].OUT_BEL[6] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA0 | output | CELL[4].OUT_BEL[26] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA1 | output | CELL[4].OUT_BEL[25] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA10 | output | CELL[4].OUT_BEL[16] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA11 | output | CELL[4].OUT_BEL[15] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA12 | output | CELL[4].OUT_BEL[14] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA13 | output | CELL[4].OUT_BEL[13] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA14 | output | CELL[4].OUT_BEL[12] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA15 | output | CELL[4].OUT_BEL[11] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA2 | output | CELL[4].OUT_BEL[24] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA3 | output | CELL[4].OUT_BEL[23] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA4 | output | CELL[4].OUT_BEL[22] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA5 | output | CELL[4].OUT_BEL[21] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA6 | output | CELL[4].OUT_BEL[20] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA7 | output | CELL[4].OUT_BEL[19] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA8 | output | CELL[4].OUT_BEL[18] |
| AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA9 | output | CELL[4].OUT_BEL[17] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_0 | output | CELL[0].OUT_BEL[15] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_1 | output | CELL[0].OUT_BEL[14] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_2 | output | CELL[0].OUT_BEL[16] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_3 | output | CELL[0].OUT_BEL[13] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_4 | output | CELL[0].OUT_BEL[17] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_5 | output | CELL[0].OUT_BEL[12] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_6 | output | CELL[0].OUT_BEL[18] |
| AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_7 | output | CELL[0].OUT_BEL[11] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_0 | output | CELL[0].OUT_BEL[23] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_1 | output | CELL[0].OUT_BEL[22] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_2 | output | CELL[0].OUT_BEL[24] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_3 | output | CELL[0].OUT_BEL[21] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_4 | output | CELL[0].OUT_BEL[25] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_5 | output | CELL[0].OUT_BEL[20] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_6 | output | CELL[0].OUT_BEL[26] |
| AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_7 | output | CELL[0].OUT_BEL[19] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_0 | output | CELL[0].OUT_BEL[31] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_1 | output | CELL[0].OUT_BEL[30] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_2 | output | CELL[1].OUT_BEL[0] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_3 | output | CELL[0].OUT_BEL[29] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_4 | output | CELL[1].OUT_BEL[1] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_5 | output | CELL[0].OUT_BEL[28] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_6 | output | CELL[1].OUT_BEL[2] |
| AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_7 | output | CELL[0].OUT_BEL[27] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_0 | output | CELL[1].OUT_BEL[7] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_1 | output | CELL[1].OUT_BEL[6] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_2 | output | CELL[1].OUT_BEL[8] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_3 | output | CELL[1].OUT_BEL[5] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_4 | output | CELL[1].OUT_BEL[9] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_5 | output | CELL[1].OUT_BEL[4] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_6 | output | CELL[1].OUT_BEL[10] |
| AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_7 | output | CELL[1].OUT_BEL[3] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_0 | output | CELL[21].OUT_BEL[15] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_1 | output | CELL[21].OUT_BEL[16] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_2 | output | CELL[21].OUT_BEL[14] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_3 | output | CELL[21].OUT_BEL[17] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_4 | output | CELL[21].OUT_BEL[13] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_5 | output | CELL[21].OUT_BEL[18] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_6 | output | CELL[21].OUT_BEL[12] |
| AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_7 | output | CELL[21].OUT_BEL[19] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_0 | output | CELL[1].OUT_BEL[15] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_1 | output | CELL[1].OUT_BEL[14] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_2 | output | CELL[1].OUT_BEL[16] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_3 | output | CELL[1].OUT_BEL[13] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_4 | output | CELL[1].OUT_BEL[17] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_5 | output | CELL[1].OUT_BEL[12] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_6 | output | CELL[1].OUT_BEL[18] |
| AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_7 | output | CELL[1].OUT_BEL[11] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_0 | output | CELL[1].OUT_BEL[23] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_1 | output | CELL[1].OUT_BEL[22] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_2 | output | CELL[1].OUT_BEL[24] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_3 | output | CELL[1].OUT_BEL[21] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_4 | output | CELL[1].OUT_BEL[25] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_5 | output | CELL[1].OUT_BEL[20] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_6 | output | CELL[1].OUT_BEL[26] |
| AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_7 | output | CELL[1].OUT_BEL[19] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_0 | output | CELL[21].OUT_BEL[5] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_1 | output | CELL[21].OUT_BEL[6] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_2 | output | CELL[21].OUT_BEL[4] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_3 | output | CELL[21].OUT_BEL[7] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_4 | output | CELL[21].OUT_BEL[3] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_5 | output | CELL[21].OUT_BEL[8] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_6 | output | CELL[20].OUT_BEL[31] |
| AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_7 | output | CELL[21].OUT_BEL[9] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_0 | output | CELL[20].OUT_BEL[26] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_1 | output | CELL[20].OUT_BEL[27] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_2 | output | CELL[20].OUT_BEL[25] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_3 | output | CELL[20].OUT_BEL[28] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_4 | output | CELL[20].OUT_BEL[24] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_5 | output | CELL[20].OUT_BEL[29] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_6 | output | CELL[20].OUT_BEL[23] |
| AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_7 | output | CELL[20].OUT_BEL[30] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_0 | output | CELL[20].OUT_BEL[18] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_1 | output | CELL[20].OUT_BEL[19] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_2 | output | CELL[20].OUT_BEL[17] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_3 | output | CELL[20].OUT_BEL[20] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_4 | output | CELL[20].OUT_BEL[16] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_5 | output | CELL[20].OUT_BEL[21] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_6 | output | CELL[20].OUT_BEL[15] |
| AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_7 | output | CELL[20].OUT_BEL[22] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_0 | output | CELL[20].OUT_BEL[10] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_1 | output | CELL[20].OUT_BEL[11] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_2 | output | CELL[20].OUT_BEL[9] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_3 | output | CELL[20].OUT_BEL[12] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_4 | output | CELL[20].OUT_BEL[8] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_5 | output | CELL[20].OUT_BEL[13] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_6 | output | CELL[20].OUT_BEL[7] |
| AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_7 | output | CELL[20].OUT_BEL[14] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_0 | output | CELL[19].OUT_BEL[31] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_1 | output | CELL[20].OUT_BEL[3] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_2 | output | CELL[19].OUT_BEL[30] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_3 | output | CELL[20].OUT_BEL[4] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_4 | output | CELL[19].OUT_BEL[29] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_5 | output | CELL[20].OUT_BEL[5] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_6 | output | CELL[19].OUT_BEL[28] |
| AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_7 | output | CELL[20].OUT_BEL[6] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA0 | output | CELL[14].OUT_BEL[8] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA1 | output | CELL[14].OUT_BEL[7] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA10 | output | CELL[13].OUT_BEL[28] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA11 | output | CELL[13].OUT_BEL[27] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA12 | output | CELL[13].OUT_BEL[26] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA13 | output | CELL[13].OUT_BEL[25] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA14 | output | CELL[13].OUT_BEL[24] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA15 | output | CELL[13].OUT_BEL[22] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA2 | output | CELL[14].OUT_BEL[5] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA3 | output | CELL[14].OUT_BEL[4] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA4 | output | CELL[14].OUT_BEL[3] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA5 | output | CELL[14].OUT_BEL[2] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA6 | output | CELL[14].OUT_BEL[1] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA7 | output | CELL[14].OUT_BEL[0] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA8 | output | CELL[13].OUT_BEL[30] |
| AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA9 | output | CELL[13].OUT_BEL[29] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_0 | output | CELL[9].OUT_BEL[22] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_1 | output | CELL[9].OUT_BEL[21] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_2 | output | CELL[9].OUT_BEL[23] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_3 | output | CELL[9].OUT_BEL[20] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_4 | output | CELL[9].OUT_BEL[24] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_5 | output | CELL[9].OUT_BEL[19] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_6 | output | CELL[9].OUT_BEL[25] |
| AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_7 | output | CELL[9].OUT_BEL[18] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_0 | output | CELL[9].OUT_BEL[30] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_1 | output | CELL[9].OUT_BEL[29] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_2 | output | CELL[9].OUT_BEL[31] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_3 | output | CELL[9].OUT_BEL[28] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_4 | output | CELL[10].OUT_BEL[3] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_5 | output | CELL[9].OUT_BEL[27] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_6 | output | CELL[10].OUT_BEL[4] |
| AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_7 | output | CELL[9].OUT_BEL[26] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_0 | input | CELL[10].IMUX_IMUX_DELAY[31] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_1 | input | CELL[10].IMUX_IMUX_DELAY[30] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_2 | input | CELL[10].IMUX_IMUX_DELAY[8] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_3 | input | CELL[10].IMUX_IMUX_DELAY[7] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_4 | input | CELL[10].IMUX_IMUX_DELAY[32] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_5 | input | CELL[10].IMUX_IMUX_DELAY[29] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_6 | input | CELL[10].IMUX_IMUX_DELAY[33] |
| AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_7 | input | CELL[10].IMUX_IMUX_DELAY[28] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_0 | input | CELL[11].IMUX_IMUX_DELAY[24] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_1 | input | CELL[11].IMUX_IMUX_DELAY[4] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_2 | input | CELL[11].IMUX_IMUX_DELAY[25] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_3 | input | CELL[11].IMUX_IMUX_DELAY[23] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_4 | input | CELL[11].IMUX_IMUX_DELAY[5] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_5 | input | CELL[11].IMUX_IMUX_DELAY[22] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_6 | input | CELL[11].IMUX_IMUX_DELAY[26] |
| AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_7 | input | CELL[11].IMUX_IMUX_DELAY[3] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_0 | input | CELL[12].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_1 | input | CELL[11].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_2 | input | CELL[12].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_3 | input | CELL[11].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_4 | input | CELL[12].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_5 | input | CELL[11].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_6 | input | CELL[12].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_7 | input | CELL[11].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_0 | input | CELL[12].IMUX_IMUX_DELAY[40] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_1 | input | CELL[12].IMUX_IMUX_DELAY[12] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_2 | input | CELL[12].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_3 | input | CELL[12].IMUX_IMUX_DELAY[39] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_4 | input | CELL[12].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_5 | input | CELL[12].IMUX_IMUX_DELAY[38] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_6 | input | CELL[12].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_7 | input | CELL[12].IMUX_IMUX_DELAY[11] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA0 | input | CELL[5].IMUX_IMUX_DELAY[21] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA1 | input | CELL[5].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA10 | input | CELL[4].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA11 | input | CELL[4].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA12 | input | CELL[4].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA13 | input | CELL[4].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA14 | input | CELL[4].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA15 | input | CELL[4].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA2 | input | CELL[5].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA3 | input | CELL[5].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA4 | input | CELL[5].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA5 | input | CELL[5].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA6 | input | CELL[5].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA7 | input | CELL[5].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA8 | input | CELL[5].IMUX_IMUX_DELAY[0] |
| AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA9 | input | CELL[4].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_0 | input | CELL[9].IMUX_IMUX_DELAY[29] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_1 | input | CELL[9].IMUX_IMUX_DELAY[7] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_2 | input | CELL[9].IMUX_IMUX_DELAY[28] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_3 | input | CELL[9].IMUX_IMUX_DELAY[30] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_4 | input | CELL[9].IMUX_IMUX_DELAY[6] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_5 | input | CELL[9].IMUX_IMUX_DELAY[31] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_6 | input | CELL[9].IMUX_IMUX_DELAY[27] |
| AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_7 | input | CELL[9].IMUX_IMUX_DELAY[8] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_0 | input | CELL[8].IMUX_IMUX_DELAY[8] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_1 | input | CELL[8].IMUX_IMUX_DELAY[32] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_2 | input | CELL[8].IMUX_IMUX_DELAY[31] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_3 | input | CELL[8].IMUX_IMUX_DELAY[33] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_4 | input | CELL[8].IMUX_IMUX_DELAY[30] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_5 | input | CELL[8].IMUX_IMUX_DELAY[9] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_6 | input | CELL[8].IMUX_IMUX_DELAY[7] |
| AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_7 | input | CELL[8].IMUX_IMUX_DELAY[34] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA0 | input | CELL[16].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA1 | input | CELL[16].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA10 | input | CELL[15].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA11 | input | CELL[15].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA12 | input | CELL[15].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA13 | input | CELL[15].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA14 | input | CELL[15].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA15 | input | CELL[15].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA2 | input | CELL[16].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA3 | input | CELL[16].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA4 | input | CELL[16].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA5 | input | CELL[16].IMUX_IMUX_DELAY[0] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA6 | input | CELL[15].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA7 | input | CELL[15].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA8 | input | CELL[15].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA9 | input | CELL[15].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_0 | input | CELL[8].IMUX_IMUX_DELAY[26] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_1 | input | CELL[8].IMUX_IMUX_DELAY[27] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_2 | input | CELL[8].IMUX_IMUX_DELAY[5] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_3 | input | CELL[8].IMUX_IMUX_DELAY[6] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_4 | input | CELL[8].IMUX_IMUX_DELAY[25] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_5 | input | CELL[8].IMUX_IMUX_DELAY[28] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_6 | input | CELL[8].IMUX_IMUX_DELAY[24] |
| AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_7 | input | CELL[8].IMUX_IMUX_DELAY[29] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_0 | input | CELL[8].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_1 | input | CELL[8].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_2 | input | CELL[8].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_3 | input | CELL[8].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_4 | input | CELL[7].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_5 | input | CELL[8].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_6 | input | CELL[7].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_7 | input | CELL[8].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_0 | input | CELL[7].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_1 | input | CELL[7].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_2 | input | CELL[7].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_3 | input | CELL[7].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_4 | input | CELL[7].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_5 | input | CELL[7].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_6 | input | CELL[7].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_7 | input | CELL[7].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_0 | input | CELL[7].IMUX_IMUX_DELAY[34] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_1 | input | CELL[7].IMUX_IMUX_DELAY[35] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_2 | input | CELL[7].IMUX_IMUX_DELAY[9] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_3 | input | CELL[7].IMUX_IMUX_DELAY[10] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_4 | input | CELL[7].IMUX_IMUX_DELAY[33] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_5 | input | CELL[7].IMUX_IMUX_DELAY[36] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_6 | input | CELL[7].IMUX_IMUX_DELAY[32] |
| AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_7 | input | CELL[7].IMUX_IMUX_DELAY[37] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA0 | input | CELL[2].IMUX_IMUX_DELAY[21] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA1 | input | CELL[2].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA10 | input | CELL[1].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA11 | input | CELL[1].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA12 | input | CELL[1].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA13 | input | CELL[1].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA14 | input | CELL[1].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA15 | input | CELL[1].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA2 | input | CELL[2].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA3 | input | CELL[2].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA4 | input | CELL[2].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA5 | input | CELL[2].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA6 | input | CELL[2].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA7 | input | CELL[2].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA8 | input | CELL[2].IMUX_IMUX_DELAY[0] |
| AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA9 | input | CELL[1].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_0 | input | CELL[0].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_1 | input | CELL[0].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_2 | input | CELL[0].IMUX_IMUX_DELAY[21] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_3 | input | CELL[0].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_4 | input | CELL[0].IMUX_IMUX_DELAY[3] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_5 | input | CELL[0].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_6 | input | CELL[0].IMUX_IMUX_DELAY[22] |
| AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_7 | input | CELL[0].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_0 | input | CELL[0].IMUX_IMUX_DELAY[5] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_1 | input | CELL[0].IMUX_IMUX_DELAY[25] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_2 | input | CELL[0].IMUX_IMUX_DELAY[26] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_3 | input | CELL[0].IMUX_IMUX_DELAY[24] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_4 | input | CELL[0].IMUX_IMUX_DELAY[27] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_5 | input | CELL[0].IMUX_IMUX_DELAY[4] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_6 | input | CELL[0].IMUX_IMUX_DELAY[6] |
| AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_7 | input | CELL[0].IMUX_IMUX_DELAY[23] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_0 | input | CELL[0].IMUX_IMUX_DELAY[8] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_1 | input | CELL[0].IMUX_IMUX_DELAY[31] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_2 | input | CELL[0].IMUX_IMUX_DELAY[32] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_3 | input | CELL[0].IMUX_IMUX_DELAY[30] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_4 | input | CELL[0].IMUX_IMUX_DELAY[33] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_5 | input | CELL[0].IMUX_IMUX_DELAY[7] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_6 | input | CELL[0].IMUX_IMUX_DELAY[9] |
| AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_7 | input | CELL[0].IMUX_IMUX_DELAY[29] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_0 | input | CELL[0].IMUX_IMUX_DELAY[37] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_1 | input | CELL[0].IMUX_IMUX_DELAY[36] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_2 | input | CELL[0].IMUX_IMUX_DELAY[11] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_3 | input | CELL[0].IMUX_IMUX_DELAY[10] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_4 | input | CELL[0].IMUX_IMUX_DELAY[38] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_5 | input | CELL[0].IMUX_IMUX_DELAY[35] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_6 | input | CELL[0].IMUX_IMUX_DELAY[39] |
| AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_7 | input | CELL[0].IMUX_IMUX_DELAY[34] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_0 | input | CELL[21].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_1 | input | CELL[21].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_2 | input | CELL[21].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_3 | input | CELL[21].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_4 | input | CELL[21].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_5 | input | CELL[21].IMUX_IMUX_DELAY[21] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_6 | input | CELL[21].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_7 | input | CELL[21].IMUX_IMUX_DELAY[3] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_0 | input | CELL[0].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_1 | input | CELL[0].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_2 | input | CELL[0].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_3 | input | CELL[0].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_4 | input | CELL[0].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_5 | input | CELL[0].IMUX_IMUX_DELAY[40] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_6 | input | CELL[0].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_7 | input | CELL[0].IMUX_IMUX_DELAY[12] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_0 | input | CELL[1].IMUX_IMUX_DELAY[18] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_1 | input | CELL[1].IMUX_IMUX_DELAY[1] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_2 | input | CELL[1].IMUX_IMUX_DELAY[19] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_3 | input | CELL[1].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_4 | input | CELL[1].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_5 | input | CELL[1].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_6 | input | CELL[1].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_7 | input | CELL[0].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_0 | input | CELL[20].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_1 | input | CELL[20].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_2 | input | CELL[20].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_3 | input | CELL[20].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_4 | input | CELL[20].IMUX_IMUX_DELAY[40] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_5 | input | CELL[20].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_6 | input | CELL[20].IMUX_IMUX_DELAY[12] |
| AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_7 | input | CELL[20].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_0 | input | CELL[20].IMUX_IMUX_DELAY[36] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_1 | input | CELL[20].IMUX_IMUX_DELAY[37] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_2 | input | CELL[20].IMUX_IMUX_DELAY[10] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_3 | input | CELL[20].IMUX_IMUX_DELAY[11] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_4 | input | CELL[20].IMUX_IMUX_DELAY[35] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_5 | input | CELL[20].IMUX_IMUX_DELAY[38] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_6 | input | CELL[20].IMUX_IMUX_DELAY[34] |
| AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_7 | input | CELL[20].IMUX_IMUX_DELAY[39] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_0 | input | CELL[20].IMUX_IMUX_DELAY[27] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_1 | input | CELL[20].IMUX_IMUX_DELAY[6] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_2 | input | CELL[20].IMUX_IMUX_DELAY[26] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_3 | input | CELL[20].IMUX_IMUX_DELAY[28] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_4 | input | CELL[20].IMUX_IMUX_DELAY[5] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_5 | input | CELL[20].IMUX_IMUX_DELAY[29] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_6 | input | CELL[20].IMUX_IMUX_DELAY[25] |
| AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_7 | input | CELL[20].IMUX_IMUX_DELAY[7] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_0 | input | CELL[20].IMUX_IMUX_DELAY[3] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_1 | input | CELL[20].IMUX_IMUX_DELAY[22] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_2 | input | CELL[20].IMUX_IMUX_DELAY[21] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_3 | input | CELL[20].IMUX_IMUX_DELAY[23] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_4 | input | CELL[20].IMUX_IMUX_DELAY[20] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_5 | input | CELL[20].IMUX_IMUX_DELAY[4] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_6 | input | CELL[20].IMUX_IMUX_DELAY[2] |
| AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_7 | input | CELL[20].IMUX_IMUX_DELAY[24] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_0 | input | CELL[19].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_1 | input | CELL[19].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_2 | input | CELL[19].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_3 | input | CELL[19].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_4 | input | CELL[19].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_5 | input | CELL[19].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_6 | input | CELL[19].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_7 | input | CELL[20].IMUX_IMUX_DELAY[16] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA0 | input | CELL[13].IMUX_IMUX_DELAY[40] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA1 | input | CELL[13].IMUX_IMUX_DELAY[12] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA10 | input | CELL[13].IMUX_IMUX_DELAY[9] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA11 | input | CELL[13].IMUX_IMUX_DELAY[33] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA12 | input | CELL[13].IMUX_IMUX_DELAY[32] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA13 | input | CELL[13].IMUX_IMUX_DELAY[8] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA14 | input | CELL[13].IMUX_IMUX_DELAY[31] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA15 | input | CELL[13].IMUX_IMUX_DELAY[30] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA2 | input | CELL[13].IMUX_IMUX_DELAY[39] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA3 | input | CELL[13].IMUX_IMUX_DELAY[38] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA4 | input | CELL[13].IMUX_IMUX_DELAY[11] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA5 | input | CELL[13].IMUX_IMUX_DELAY[37] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA6 | input | CELL[13].IMUX_IMUX_DELAY[36] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA7 | input | CELL[13].IMUX_IMUX_DELAY[10] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA8 | input | CELL[13].IMUX_IMUX_DELAY[35] |
| AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA9 | input | CELL[13].IMUX_IMUX_DELAY[34] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_0 | input | CELL[9].IMUX_IMUX_DELAY[38] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_1 | input | CELL[9].IMUX_IMUX_DELAY[11] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_2 | input | CELL[9].IMUX_IMUX_DELAY[39] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_3 | input | CELL[9].IMUX_IMUX_DELAY[37] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_4 | input | CELL[9].IMUX_IMUX_DELAY[12] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_5 | input | CELL[9].IMUX_IMUX_DELAY[36] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_6 | input | CELL[9].IMUX_IMUX_DELAY[40] |
| AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_7 | input | CELL[9].IMUX_IMUX_DELAY[10] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_0 | input | CELL[9].IMUX_IMUX_DELAY[14] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_1 | input | CELL[9].IMUX_IMUX_DELAY[43] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_2 | input | CELL[9].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_3 | input | CELL[9].IMUX_IMUX_DELAY[42] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_4 | input | CELL[9].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_5 | input | CELL[9].IMUX_IMUX_DELAY[13] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_6 | input | CELL[9].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_7 | input | CELL[9].IMUX_IMUX_DELAY[41] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN0 | input | CELL[18].IMUX_IMUX_DELAY[0] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN1 | input | CELL[17].IMUX_IMUX_DELAY[47] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN2 | input | CELL[17].IMUX_IMUX_DELAY[46] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN3 | input | CELL[17].IMUX_IMUX_DELAY[15] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN4 | input | CELL[17].IMUX_IMUX_DELAY[45] |
| AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN5 | input | CELL[17].IMUX_IMUX_DELAY[44] |
| AXI1_WDATA_PAR_7_6_NIB6_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[18].IMUX_IMUX_DELAY[17] |
| AXI1_WDATA_PAR_7_6_NIB6_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[18].IMUX_IMUX_DELAY[16] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR0 | input | CELL[13].IMUX_IMUX_DELAY[15] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR1 | input | CELL[13].IMUX_IMUX_DELAY[45] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR2 | input | CELL[13].IMUX_IMUX_DELAY[44] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR3 | input | CELL[13].IMUX_IMUX_DELAY[14] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR4 | input | CELL[13].IMUX_IMUX_DELAY[43] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR5 | input | CELL[13].IMUX_IMUX_DELAY[42] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR6 | input | CELL[13].IMUX_IMUX_DELAY[13] |
| AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR7 | input | CELL[13].IMUX_IMUX_DELAY[41] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR0 | input | CELL[5].IMUX_IMUX_DELAY[26] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR1 | input | CELL[5].IMUX_IMUX_DELAY[5] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR2 | input | CELL[5].IMUX_IMUX_DELAY[25] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR3 | input | CELL[5].IMUX_IMUX_DELAY[24] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR4 | input | CELL[5].IMUX_IMUX_DELAY[4] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR5 | input | CELL[5].IMUX_IMUX_DELAY[23] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR6 | input | CELL[5].IMUX_IMUX_DELAY[22] |
| AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR7 | input | CELL[5].IMUX_IMUX_DELAY[3] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR0 | input | CELL[2].IMUX_IMUX_DELAY[26] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR1 | input | CELL[2].IMUX_IMUX_DELAY[5] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR2 | input | CELL[2].IMUX_IMUX_DELAY[25] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR3 | input | CELL[2].IMUX_IMUX_DELAY[24] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR4 | input | CELL[2].IMUX_IMUX_DELAY[4] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR5 | input | CELL[2].IMUX_IMUX_DELAY[23] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR6 | input | CELL[2].IMUX_IMUX_DELAY[22] |
| AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR7 | input | CELL[2].IMUX_IMUX_DELAY[3] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR0 | input | CELL[16].IMUX_IMUX_DELAY[24] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR1 | input | CELL[16].IMUX_IMUX_DELAY[4] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR2 | input | CELL[16].IMUX_IMUX_DELAY[23] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR3 | input | CELL[16].IMUX_IMUX_DELAY[22] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR4 | input | CELL[16].IMUX_IMUX_DELAY[3] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR5 | input | CELL[16].IMUX_IMUX_DELAY[21] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR6 | input | CELL[16].IMUX_IMUX_DELAY[20] |
| AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR7 | input | CELL[16].IMUX_IMUX_DELAY[2] |
| AXIA0_CLK | input | CELL[48].IMUX_CTRL[0] |
| AXIA1_CLK | input | CELL[10].IMUX_CTRL[0] |
| CAPTURE_DR | input | CELL[34].IMUX_IMUX_DELAY[30] |
| CAPTURE_DR_O | output | CELL[33].OUT_BEL[21] |
| CFG2IOB_PUDC_B | input | CELL[34].IMUX_IMUX_DELAY[27] |
| CFG2IOB_PUDC_B_O | output | CELL[33].OUT_BEL[16] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS0 | output | CELL[18].OUT_BEL[22] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS1 | output | CELL[18].OUT_BEL[21] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS10 | output | CELL[18].OUT_BEL[12] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS11 | output | CELL[18].OUT_BEL[11] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS12 | output | CELL[18].OUT_BEL[10] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS13 | output | CELL[18].OUT_BEL[9] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS14 | output | CELL[18].OUT_BEL[8] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS15 | output | CELL[18].OUT_BEL[7] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS2 | output | CELL[18].OUT_BEL[20] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS3 | output | CELL[18].OUT_BEL[19] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS4 | output | CELL[18].OUT_BEL[18] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS5 | output | CELL[18].OUT_BEL[17] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS6 | output | CELL[18].OUT_BEL[16] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS7 | output | CELL[18].OUT_BEL[15] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS8 | output | CELL[18].OUT_BEL[14] |
| CFI_NPI_BRIDGE_TO_FABRIC_STATUS9 | output | CELL[18].OUT_BEL[13] |
| FABRIC_APB_RST_N | input | CELL[1].IMUX_BYP_DELAY[10] |
| FABRIC_MUX_SELECT_EN | input | CELL[15].IMUX_IMUX_DELAY[40] |
| IFABRIC_APB_CLK | input | CELL[18].IMUX_CTRL[0] |
| IF_APB_FABRIC2BRIDGE_PADDR0 | input | CELL[15].IMUX_IMUX_DELAY[11] |
| IF_APB_FABRIC2BRIDGE_PADDR1 | input | CELL[15].IMUX_IMUX_DELAY[37] |
| IF_APB_FABRIC2BRIDGE_PADDR10 | input | CELL[15].IMUX_IMUX_DELAY[31] |
| IF_APB_FABRIC2BRIDGE_PADDR11 | input | CELL[15].IMUX_IMUX_DELAY[30] |
| IF_APB_FABRIC2BRIDGE_PADDR12 | input | CELL[15].IMUX_IMUX_DELAY[7] |
| IF_APB_FABRIC2BRIDGE_PADDR13 | input | CELL[15].IMUX_IMUX_DELAY[29] |
| IF_APB_FABRIC2BRIDGE_PADDR14 | input | CELL[15].IMUX_IMUX_DELAY[28] |
| IF_APB_FABRIC2BRIDGE_PADDR15 | input | CELL[15].IMUX_IMUX_DELAY[6] |
| IF_APB_FABRIC2BRIDGE_PADDR16 | input | CELL[15].IMUX_IMUX_DELAY[27] |
| IF_APB_FABRIC2BRIDGE_PADDR17 | input | CELL[15].IMUX_IMUX_DELAY[26] |
| IF_APB_FABRIC2BRIDGE_PADDR18 | input | CELL[15].IMUX_IMUX_DELAY[5] |
| IF_APB_FABRIC2BRIDGE_PADDR19 | input | CELL[15].IMUX_IMUX_DELAY[25] |
| IF_APB_FABRIC2BRIDGE_PADDR2 | input | CELL[15].IMUX_IMUX_DELAY[36] |
| IF_APB_FABRIC2BRIDGE_PADDR20 | input | CELL[15].IMUX_IMUX_DELAY[24] |
| IF_APB_FABRIC2BRIDGE_PADDR21 | input | CELL[15].IMUX_IMUX_DELAY[4] |
| IF_APB_FABRIC2BRIDGE_PADDR22 | input | CELL[15].IMUX_IMUX_DELAY[23] |
| IF_APB_FABRIC2BRIDGE_PADDR23 | input | CELL[15].IMUX_IMUX_DELAY[22] |
| IF_APB_FABRIC2BRIDGE_PADDR24 | input | CELL[15].IMUX_IMUX_DELAY[3] |
| IF_APB_FABRIC2BRIDGE_PADDR25 | input | CELL[15].IMUX_IMUX_DELAY[21] |
| IF_APB_FABRIC2BRIDGE_PADDR26 | input | CELL[15].IMUX_IMUX_DELAY[20] |
| IF_APB_FABRIC2BRIDGE_PADDR27 | input | CELL[15].IMUX_IMUX_DELAY[2] |
| IF_APB_FABRIC2BRIDGE_PADDR28 | input | CELL[15].IMUX_IMUX_DELAY[19] |
| IF_APB_FABRIC2BRIDGE_PADDR29 | input | CELL[15].IMUX_IMUX_DELAY[18] |
| IF_APB_FABRIC2BRIDGE_PADDR3 | input | CELL[15].IMUX_IMUX_DELAY[10] |
| IF_APB_FABRIC2BRIDGE_PADDR30 | input | CELL[15].IMUX_IMUX_DELAY[1] |
| IF_APB_FABRIC2BRIDGE_PADDR31 | input | CELL[15].IMUX_IMUX_DELAY[17] |
| IF_APB_FABRIC2BRIDGE_PADDR4 | input | CELL[15].IMUX_IMUX_DELAY[35] |
| IF_APB_FABRIC2BRIDGE_PADDR5 | input | CELL[15].IMUX_IMUX_DELAY[34] |
| IF_APB_FABRIC2BRIDGE_PADDR6 | input | CELL[15].IMUX_IMUX_DELAY[9] |
| IF_APB_FABRIC2BRIDGE_PADDR7 | input | CELL[15].IMUX_IMUX_DELAY[33] |
| IF_APB_FABRIC2BRIDGE_PADDR8 | input | CELL[15].IMUX_IMUX_DELAY[32] |
| IF_APB_FABRIC2BRIDGE_PADDR9 | input | CELL[15].IMUX_IMUX_DELAY[8] |
| IF_APB_FABRIC2BRIDGE_PENABLE | input | CELL[15].IMUX_IMUX_DELAY[39] |
| IF_APB_FABRIC2BRIDGE_PRDATA0 | output | CELL[19].OUT_BEL[27] |
| IF_APB_FABRIC2BRIDGE_PRDATA1 | output | CELL[19].OUT_BEL[26] |
| IF_APB_FABRIC2BRIDGE_PRDATA10 | output | CELL[18].OUT_BEL[30] |
| IF_APB_FABRIC2BRIDGE_PRDATA11 | output | CELL[18].OUT_BEL[29] |
| IF_APB_FABRIC2BRIDGE_PRDATA12 | output | CELL[18].OUT_BEL[28] |
| IF_APB_FABRIC2BRIDGE_PRDATA13 | output | CELL[18].OUT_BEL[27] |
| IF_APB_FABRIC2BRIDGE_PRDATA14 | output | CELL[18].OUT_BEL[26] |
| IF_APB_FABRIC2BRIDGE_PRDATA15 | output | CELL[18].OUT_BEL[25] |
| IF_APB_FABRIC2BRIDGE_PRDATA16 | output | CELL[18].OUT_BEL[24] |
| IF_APB_FABRIC2BRIDGE_PRDATA17 | output | CELL[18].OUT_BEL[23] |
| IF_APB_FABRIC2BRIDGE_PRDATA18 | output | CELL[18].OUT_BEL[6] |
| IF_APB_FABRIC2BRIDGE_PRDATA19 | output | CELL[18].OUT_BEL[5] |
| IF_APB_FABRIC2BRIDGE_PRDATA2 | output | CELL[19].OUT_BEL[25] |
| IF_APB_FABRIC2BRIDGE_PRDATA20 | output | CELL[18].OUT_BEL[4] |
| IF_APB_FABRIC2BRIDGE_PRDATA21 | output | CELL[18].OUT_BEL[3] |
| IF_APB_FABRIC2BRIDGE_PRDATA22 | output | CELL[17].OUT_BEL[31] |
| IF_APB_FABRIC2BRIDGE_PRDATA23 | output | CELL[17].OUT_BEL[30] |
| IF_APB_FABRIC2BRIDGE_PRDATA24 | output | CELL[17].OUT_BEL[29] |
| IF_APB_FABRIC2BRIDGE_PRDATA25 | output | CELL[17].OUT_BEL[28] |
| IF_APB_FABRIC2BRIDGE_PRDATA26 | output | CELL[17].OUT_BEL[27] |
| IF_APB_FABRIC2BRIDGE_PRDATA27 | output | CELL[17].OUT_BEL[26] |
| IF_APB_FABRIC2BRIDGE_PRDATA28 | output | CELL[17].OUT_BEL[25] |
| IF_APB_FABRIC2BRIDGE_PRDATA29 | output | CELL[17].OUT_BEL[24] |
| IF_APB_FABRIC2BRIDGE_PRDATA3 | output | CELL[19].OUT_BEL[24] |
| IF_APB_FABRIC2BRIDGE_PRDATA30 | output | CELL[17].OUT_BEL[23] |
| IF_APB_FABRIC2BRIDGE_PRDATA31 | output | CELL[17].OUT_BEL[22] |
| IF_APB_FABRIC2BRIDGE_PRDATA4 | output | CELL[19].OUT_BEL[23] |
| IF_APB_FABRIC2BRIDGE_PRDATA5 | output | CELL[19].OUT_BEL[22] |
| IF_APB_FABRIC2BRIDGE_PRDATA6 | output | CELL[19].OUT_BEL[21] |
| IF_APB_FABRIC2BRIDGE_PRDATA7 | output | CELL[19].OUT_BEL[20] |
| IF_APB_FABRIC2BRIDGE_PRDATA8 | output | CELL[19].OUT_BEL[3] |
| IF_APB_FABRIC2BRIDGE_PRDATA9 | output | CELL[18].OUT_BEL[31] |
| IF_APB_FABRIC2BRIDGE_PREADY | output | CELL[21].OUT_BEL[10] |
| IF_APB_FABRIC2BRIDGE_PSELX | input | CELL[15].IMUX_IMUX_DELAY[38] |
| IF_APB_FABRIC2BRIDGE_PSLVERR | output | CELL[21].OUT_BEL[11] |
| IF_APB_FABRIC2BRIDGE_PWDATA0 | input | CELL[21].IMUX_IMUX_DELAY[16] |
| IF_APB_FABRIC2BRIDGE_PWDATA1 | input | CELL[20].IMUX_IMUX_DELAY[47] |
| IF_APB_FABRIC2BRIDGE_PWDATA10 | input | CELL[20].IMUX_IMUX_DELAY[30] |
| IF_APB_FABRIC2BRIDGE_PWDATA11 | input | CELL[20].IMUX_IMUX_DELAY[19] |
| IF_APB_FABRIC2BRIDGE_PWDATA12 | input | CELL[20].IMUX_IMUX_DELAY[18] |
| IF_APB_FABRIC2BRIDGE_PWDATA13 | input | CELL[20].IMUX_IMUX_DELAY[1] |
| IF_APB_FABRIC2BRIDGE_PWDATA14 | input | CELL[20].IMUX_IMUX_DELAY[17] |
| IF_APB_FABRIC2BRIDGE_PWDATA15 | input | CELL[19].IMUX_IMUX_DELAY[42] |
| IF_APB_FABRIC2BRIDGE_PWDATA16 | input | CELL[19].IMUX_IMUX_DELAY[13] |
| IF_APB_FABRIC2BRIDGE_PWDATA17 | input | CELL[19].IMUX_IMUX_DELAY[41] |
| IF_APB_FABRIC2BRIDGE_PWDATA18 | input | CELL[19].IMUX_IMUX_DELAY[40] |
| IF_APB_FABRIC2BRIDGE_PWDATA19 | input | CELL[19].IMUX_IMUX_DELAY[12] |
| IF_APB_FABRIC2BRIDGE_PWDATA2 | input | CELL[20].IMUX_IMUX_DELAY[46] |
| IF_APB_FABRIC2BRIDGE_PWDATA20 | input | CELL[19].IMUX_IMUX_DELAY[39] |
| IF_APB_FABRIC2BRIDGE_PWDATA21 | input | CELL[19].IMUX_IMUX_DELAY[38] |
| IF_APB_FABRIC2BRIDGE_PWDATA22 | input | CELL[19].IMUX_IMUX_DELAY[11] |
| IF_APB_FABRIC2BRIDGE_PWDATA23 | input | CELL[19].IMUX_IMUX_DELAY[37] |
| IF_APB_FABRIC2BRIDGE_PWDATA24 | input | CELL[19].IMUX_IMUX_DELAY[36] |
| IF_APB_FABRIC2BRIDGE_PWDATA25 | input | CELL[19].IMUX_IMUX_DELAY[10] |
| IF_APB_FABRIC2BRIDGE_PWDATA26 | input | CELL[19].IMUX_IMUX_DELAY[35] |
| IF_APB_FABRIC2BRIDGE_PWDATA27 | input | CELL[19].IMUX_IMUX_DELAY[34] |
| IF_APB_FABRIC2BRIDGE_PWDATA28 | input | CELL[19].IMUX_IMUX_DELAY[9] |
| IF_APB_FABRIC2BRIDGE_PWDATA29 | input | CELL[19].IMUX_IMUX_DELAY[33] |
| IF_APB_FABRIC2BRIDGE_PWDATA3 | input | CELL[20].IMUX_IMUX_DELAY[15] |
| IF_APB_FABRIC2BRIDGE_PWDATA30 | input | CELL[19].IMUX_IMUX_DELAY[32] |
| IF_APB_FABRIC2BRIDGE_PWDATA31 | input | CELL[19].IMUX_IMUX_DELAY[8] |
| IF_APB_FABRIC2BRIDGE_PWDATA4 | input | CELL[20].IMUX_IMUX_DELAY[45] |
| IF_APB_FABRIC2BRIDGE_PWDATA5 | input | CELL[20].IMUX_IMUX_DELAY[9] |
| IF_APB_FABRIC2BRIDGE_PWDATA6 | input | CELL[20].IMUX_IMUX_DELAY[33] |
| IF_APB_FABRIC2BRIDGE_PWDATA7 | input | CELL[20].IMUX_IMUX_DELAY[32] |
| IF_APB_FABRIC2BRIDGE_PWDATA8 | input | CELL[20].IMUX_IMUX_DELAY[8] |
| IF_APB_FABRIC2BRIDGE_PWDATA9 | input | CELL[20].IMUX_IMUX_DELAY[31] |
| IF_APB_FABRIC2BRIDGE_PWRITE | input | CELL[15].IMUX_IMUX_DELAY[12] |
| IF_DMC_FABRIC_BLI2ILA_ACK | input | CELL[26].IMUX_IMUX_DELAY[25] |
| IF_DMC_FABRIC_BLI2ILA_TRIG | input | CELL[26].IMUX_IMUX_DELAY[24] |
| IF_DMC_FABRIC_BLI2UB_ACK | input | CELL[26].IMUX_IMUX_DELAY[21] |
| IF_DMC_FABRIC_BLI2UB_TRACE_CLK | input | CELL[26].IMUX_CTRL[0] |
| IF_DMC_FABRIC_BLI2UB_TRACE_RST_N | input | CELL[26].IMUX_IMUX_DELAY[22] |
| IF_DMC_FABRIC_BLI2UB_TRACE_TREADY | input | CELL[26].IMUX_IMUX_DELAY[3] |
| IF_DMC_FABRIC_BLI2UB_TRIG | input | CELL[26].IMUX_IMUX_DELAY[20] |
| IF_DMC_FABRIC_BLI2UB_UART_RX | input | CELL[26].IMUX_IMUX_DELAY[23] |
| IF_DMC_FABRIC_BLOCK_PERIODIC_CAL | input | CELL[26].IMUX_IMUX_DELAY[4] |
| IF_DMC_FABRIC_CAL_BUSY | output | CELL[26].OUT_BEL[18] |
| IF_DMC_FABRIC_CAL_DONE | output | CELL[26].OUT_BEL[19] |
| IF_DMC_FABRIC_CSSD_CLKSTP_BCAST | output | CELL[27].OUT_BEL[3] |
| IF_DMC_FABRIC_CSSD_TRIG_IN_N_EXT | input | CELL[26].IMUX_IMUX_DELAY[5] |
| IF_DMC_FABRIC_EXMON_CLEAR_IN | input | CELL[26].IMUX_IMUX_DELAY[19] |
| IF_DMC_FABRIC_EXMON_CLEAR_OUT | output | CELL[27].OUT_BEL[4] |
| IF_DMC_FABRIC_ILA2BLI_ACK | output | CELL[27].OUT_BEL[26] |
| IF_DMC_FABRIC_ILA2BLI_TRIG | output | CELL[27].OUT_BEL[27] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_0 | output | CELL[0].OUT_BEL[0] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_1 | output | CELL[0].OUT_BEL[1] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_2 | output | CELL[0].OUT_BEL[2] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_3 | output | CELL[0].OUT_BEL[3] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_4 | output | CELL[0].OUT_BEL[4] |
| IF_DMC_FABRIC_LPDDRMC_SPARE0_5 | output | CELL[0].OUT_BEL[5] |
| IF_DMC_FABRIC_LPDDRMC_SPARE1 | output | CELL[27].OUT_BEL[5] |
| IF_DMC_FABRIC_LPDDRMC_SPARE2 | input | CELL[14].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_REF_ACK_0_0 | output | CELL[26].OUT_BEL[15] |
| IF_DMC_FABRIC_REF_ACK_0_1 | output | CELL[26].OUT_BEL[14] |
| IF_DMC_FABRIC_REF_ACK_0_2 | output | CELL[26].OUT_BEL[13] |
| IF_DMC_FABRIC_REF_ACK_0_3 | output | CELL[26].OUT_BEL[12] |
| IF_DMC_FABRIC_REF_ACK_1_0 | output | CELL[26].OUT_BEL[17] |
| IF_DMC_FABRIC_REF_ACK_1_1 | output | CELL[26].OUT_BEL[16] |
| IF_DMC_FABRIC_REF_RANK_EN_0_0 | input | CELL[26].IMUX_IMUX_DELAY[17] |
| IF_DMC_FABRIC_REF_RANK_EN_0_1 | input | CELL[26].IMUX_IMUX_DELAY[16] |
| IF_DMC_FABRIC_REF_RANK_EN_0_2 | input | CELL[25].IMUX_IMUX_DELAY[47] |
| IF_DMC_FABRIC_REF_RANK_EN_0_3 | input | CELL[25].IMUX_IMUX_DELAY[46] |
| IF_DMC_FABRIC_REF_RANK_EN_1_0 | input | CELL[26].IMUX_IMUX_DELAY[18] |
| IF_DMC_FABRIC_REF_RANK_EN_1_1 | input | CELL[26].IMUX_IMUX_DELAY[1] |
| IF_DMC_FABRIC_REF_USR_PORT_AVAILABLE | output | CELL[26].OUT_BEL[11] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT0 | input | CELL[32].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT1 | input | CELL[15].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT10 | input | CELL[48].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT11 | input | CELL[44].IMUX_BYP_DELAY[11] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT12 | input | CELL[45].IMUX_BYP_DELAY[8] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT2 | input | CELL[59].IMUX_BYP_DELAY[7] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT3 | input | CELL[21].IMUX_BYP_DELAY[6] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT4 | input | CELL[21].IMUX_BYP_DELAY[12] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT5 | input | CELL[2].IMUX_BYP_DELAY[11] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT6 | input | CELL[39].IMUX_BYP_DELAY[7] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT7 | input | CELL[10].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT8 | input | CELL[5].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_IN_EXT9 | input | CELL[31].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT0 | input | CELL[29].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT1 | input | CELL[58].IMUX_BYP_DELAY[7] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT10 | input | CELL[54].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT11 | input | CELL[18].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT12 | input | CELL[2].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT2 | input | CELL[24].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT3 | input | CELL[17].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT4 | input | CELL[35].IMUX_BYP_DELAY[8] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT5 | input | CELL[11].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT6 | input | CELL[51].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT7 | input | CELL[45].IMUX_BYP_DELAY[11] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT8 | input | CELL[23].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT9 | input | CELL[26].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC0 | output | CELL[26].OUT_BEL[29] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC1 | output | CELL[26].OUT_BEL[28] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC2 | output | CELL[26].OUT_BEL[27] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC3 | output | CELL[26].OUT_BEL[26] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC4 | output | CELL[26].OUT_BEL[25] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC5 | output | CELL[26].OUT_BEL[24] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC6 | output | CELL[26].OUT_BEL[23] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC7 | output | CELL[26].OUT_BEL[22] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC8 | output | CELL[26].OUT_BEL[21] |
| IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC9 | output | CELL[26].OUT_BEL[20] |
| IF_DMC_FABRIC_SCAN_CLK_N_EXT | input | CELL[49].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_CNTRL_CHNL_IN_EXT_DDRMC0 | input | CELL[6].IMUX_BYP_DELAY[9] |
| IF_DMC_FABRIC_SCAN_CNTRL_CHNL_IN_EXT_DDRMC1 | input | CELL[37].IMUX_BYP_DELAY[7] |
| IF_DMC_FABRIC_SCAN_CNTRL_CHNL_OUT_EXT_DDRMC0 | output | CELL[26].OUT_BEL[31] |
| IF_DMC_FABRIC_SCAN_CNTRL_CHNL_OUT_EXT_DDRMC1 | output | CELL[26].OUT_BEL[30] |
| IF_DMC_FABRIC_SCAN_EDT_UPDT_N_EXT | input | CELL[27].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_EN_N_EXT | input | CELL[3].IMUX_BYP_DELAY[10] |
| IF_DMC_FABRIC_SCAN_MODE_RST_N_EXT | input | CELL[38].IMUX_BYP_DELAY[8] |
| IF_DMC_FABRIC_UB2BLI_ACK | output | CELL[27].OUT_BEL[6] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA0 | output | CELL[27].OUT_BEL[23] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA1 | output | CELL[27].OUT_BEL[22] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA10 | output | CELL[27].OUT_BEL[13] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA11 | output | CELL[27].OUT_BEL[12] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA12 | output | CELL[27].OUT_BEL[11] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA13 | output | CELL[27].OUT_BEL[10] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA14 | output | CELL[27].OUT_BEL[9] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA15 | output | CELL[27].OUT_BEL[8] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA2 | output | CELL[27].OUT_BEL[21] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA3 | output | CELL[27].OUT_BEL[20] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA4 | output | CELL[27].OUT_BEL[19] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA5 | output | CELL[27].OUT_BEL[18] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA6 | output | CELL[27].OUT_BEL[17] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA7 | output | CELL[27].OUT_BEL[16] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA8 | output | CELL[27].OUT_BEL[15] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TDATA9 | output | CELL[27].OUT_BEL[14] |
| IF_DMC_FABRIC_UB2BLI_TRACE_TVALID | output | CELL[27].OUT_BEL[24] |
| IF_DMC_FABRIC_UB2BLI_TRIG | output | CELL[27].OUT_BEL[7] |
| IF_DMC_FABRIC_UB2BLI_UART_TX | output | CELL[27].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P0_CLB2MC_DIV_CLK | input | CELL[56].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_CTRL_CLK | input | CELL[56].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[55].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[55].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[55].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[55].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[55].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[55].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_FIFO_CLK | input | CELL[56].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE0 | input | CELL[55].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE1 | input | CELL[55].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE2 | input | CELL[55].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE3 | input | CELL[55].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE4 | input | CELL[55].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE5 | input | CELL[55].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[57].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[57].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[57].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[57].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[57].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[57].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE0 | input | CELL[56].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE1 | input | CELL[56].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE2 | input | CELL[55].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE3 | input | CELL[55].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE4 | input | CELL[55].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE5 | input | CELL[55].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[57].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[57].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[57].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[57].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[57].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[57].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[57].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[57].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[57].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[57].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[57].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[57].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[57].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[57].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[56].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[56].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[56].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[56].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[56].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[56].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[56].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[56].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[56].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[57].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[56].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[56].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[56].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[56].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[56].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[56].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[56].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[56].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[56].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[56].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[57].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[56].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[56].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[56].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[56].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[56].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[56].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[56].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[56].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[56].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[56].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[57].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[56].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[56].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[56].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[56].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[57].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[57].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[57].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[57].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC0 | input | CELL[56].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC1 | input | CELL[56].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC2 | input | CELL[56].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC3 | input | CELL[56].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC4 | input | CELL[56].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC5 | input | CELL[56].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD0 | input | CELL[56].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD1 | input | CELL[56].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD2 | input | CELL[56].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD3 | input | CELL[56].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD4 | input | CELL[56].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD5 | input | CELL[56].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN0 | input | CELL[58].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN1 | input | CELL[58].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN2 | input | CELL[58].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN3 | input | CELL[58].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN4 | input | CELL[58].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN5 | input | CELL[58].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[57].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[57].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[57].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[57].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[57].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[57].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[57].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[57].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[57].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[57].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[57].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[57].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[57].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[57].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[57].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[57].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[57].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[57].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_0 | input | CELL[57].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_1 | input | CELL[57].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_2 | input | CELL[57].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RST | input | CELL[55].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST0 | input | CELL[55].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST1 | input | CELL[55].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST2 | input | CELL[55].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST3 | input | CELL[55].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST4 | input | CELL[55].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST5 | input | CELL[55].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST0 | input | CELL[55].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST1 | input | CELL[55].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST2 | input | CELL[55].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST3 | input | CELL[55].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST4 | input | CELL[55].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST5 | input | CELL[55].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P0_CLB2RIU_NIBBLE_SEL | input | CELL[59].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P0_CLB2RIU_WR_EN | input | CELL[58].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT0 | output | CELL[57].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT1 | output | CELL[57].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT2 | output | CELL[57].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT3 | output | CELL[57].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT4 | output | CELL[57].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P0_IOB2CLB_DFT5 | output | CELL[57].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_FIFO_EMPTY | output | CELL[55].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_FIXDLY_RDY | output | CELL[55].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_GT_STATUS | output | CELL[55].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[57].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[57].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[57].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[57].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[57].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[57].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[57].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[57].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[57].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[57].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[57].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[56].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[57].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[56].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[56].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[56].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[56].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[56].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[56].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[56].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[56].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[56].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[56].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[57].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[56].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[56].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[56].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[56].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[56].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[56].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[56].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[56].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[56].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[56].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[57].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[56].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[56].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[56].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[56].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[56].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[56].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[56].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[56].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[56].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[56].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[57].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[55].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[55].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[55].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[55].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[57].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[57].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[57].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[57].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_0 | output | CELL[57].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_1 | output | CELL[57].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_2 | output | CELL[57].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_0 | output | CELL[57].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_1 | output | CELL[57].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_2 | output | CELL[57].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_MASTER_PD | output | CELL[55].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P0_PHY2CLB_PHY_RDY | output | CELL[55].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P0_RIU2CLB_VALID | output | CELL[57].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_CLB2MC_DIV_CLK | input | CELL[22].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_CTRL_CLK | input | CELL[22].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DLYCTL_EN_VTC | input | CELL[22].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[22].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[22].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[22].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[22].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[22].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[22].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_FIFO_CLK | input | CELL[22].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_FIFO_RDEN | input | CELL[22].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE0 | input | CELL[22].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE1 | input | CELL[22].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE2 | input | CELL[22].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE3 | input | CELL[22].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE4 | input | CELL[22].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE5 | input | CELL[22].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[24].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[24].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[24].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[24].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[24].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[24].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE0 | input | CELL[23].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE1 | input | CELL[23].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE2 | input | CELL[22].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE3 | input | CELL[22].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE4 | input | CELL[22].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE5 | input | CELL[22].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[24].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[24].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[24].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[24].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[24].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[24].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[24].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[24].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[24].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[24].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[24].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[24].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[24].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[24].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[24].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[24].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[24].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[24].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[24].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[24].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[24].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[23].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[23].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[24].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[23].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[23].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[23].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[23].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[23].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[23].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[23].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[23].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[23].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[23].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[24].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[23].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[23].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[23].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[23].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[23].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[23].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[23].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[23].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[23].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[23].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[24].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[23].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[23].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[23].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[23].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[24].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[24].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[24].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[24].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC0 | input | CELL[23].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC1 | input | CELL[23].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC2 | input | CELL[23].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC3 | input | CELL[23].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC4 | input | CELL[23].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC5 | input | CELL[23].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD0 | input | CELL[23].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD1 | input | CELL[23].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD2 | input | CELL[23].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD3 | input | CELL[23].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD4 | input | CELL[23].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD5 | input | CELL[23].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL0 | input | CELL[24].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL1 | input | CELL[24].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL2 | input | CELL[24].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL3 | input | CELL[24].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL4 | input | CELL[24].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL5 | input | CELL[24].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN0 | input | CELL[25].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN1 | input | CELL[25].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN2 | input | CELL[25].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN3 | input | CELL[25].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN4 | input | CELL[25].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN5 | input | CELL[25].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[25].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[25].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[24].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[25].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[25].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[25].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[25].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[25].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[25].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[25].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[25].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[25].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[24].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[24].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[24].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[24].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[24].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[24].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_0 | input | CELL[25].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_1 | input | CELL[25].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_2 | input | CELL[25].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN0 | input | CELL[22].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN1 | input | CELL[22].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN2 | input | CELL[22].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN3 | input | CELL[22].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RST | input | CELL[21].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST0 | input | CELL[22].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST1 | input | CELL[22].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST2 | input | CELL[22].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST3 | input | CELL[22].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST4 | input | CELL[22].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST5 | input | CELL[22].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST0 | input | CELL[22].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST1 | input | CELL[21].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST2 | input | CELL[21].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST3 | input | CELL[21].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST4 | input | CELL[21].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST5 | input | CELL[21].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT0 | input | CELL[22].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT1 | input | CELL[22].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT2 | input | CELL[22].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT3 | input | CELL[22].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT4 | input | CELL[22].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT5 | input | CELL[22].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WREN0 | input | CELL[22].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WREN1 | input | CELL[22].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WREN2 | input | CELL[22].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WREN3 | input | CELL[22].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_0 | input | CELL[21].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_1 | input | CELL[21].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_2 | input | CELL[21].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_3 | input | CELL[21].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_4 | input | CELL[21].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_5 | input | CELL[21].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_6 | input | CELL[21].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_7 | input | CELL[21].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_0 | input | CELL[21].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_1 | input | CELL[21].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_2 | input | CELL[21].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_3 | input | CELL[21].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_4 | input | CELL[21].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_5 | input | CELL[21].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_6 | input | CELL[21].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_7 | input | CELL[21].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_0 | input | CELL[21].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_1 | input | CELL[21].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_2 | input | CELL[21].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_3 | input | CELL[21].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_4 | input | CELL[21].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_5 | input | CELL[21].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_6 | input | CELL[21].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_7 | input | CELL[21].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_0 | input | CELL[21].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_1 | input | CELL[21].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_2 | input | CELL[21].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_3 | input | CELL[21].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_4 | input | CELL[21].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_5 | input | CELL[21].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_6 | input | CELL[21].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_7 | input | CELL[21].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_0 | input | CELL[22].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_1 | input | CELL[22].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_2 | input | CELL[22].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_3 | input | CELL[22].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_4 | input | CELL[22].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_5 | input | CELL[22].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_6 | input | CELL[22].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_7 | input | CELL[22].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_0 | input | CELL[23].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_1 | input | CELL[23].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_2 | input | CELL[23].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_3 | input | CELL[23].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_4 | input | CELL[23].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_5 | input | CELL[23].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_6 | input | CELL[23].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_7 | input | CELL[23].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR0 | input | CELL[25].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR1 | input | CELL[25].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR2 | input | CELL[25].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR3 | input | CELL[25].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR4 | input | CELL[25].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR5 | input | CELL[25].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR6 | input | CELL[25].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR7 | input | CELL[25].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_NIBBLE_SEL | input | CELL[26].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA0 | input | CELL[25].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA1 | input | CELL[25].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA10 | input | CELL[25].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA11 | input | CELL[25].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA12 | input | CELL[25].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA13 | input | CELL[25].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA14 | input | CELL[25].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA15 | input | CELL[25].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA2 | input | CELL[25].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA3 | input | CELL[25].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA4 | input | CELL[25].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA5 | input | CELL[25].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA6 | input | CELL[25].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA7 | input | CELL[25].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA8 | input | CELL[25].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA9 | input | CELL[25].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P10_CLB2RIU_WR_EN | input | CELL[25].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT0 | output | CELL[25].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT1 | output | CELL[25].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT2 | output | CELL[25].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT3 | output | CELL[25].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT4 | output | CELL[25].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P10_IOB2CLB_DFT5 | output | CELL[25].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_FIFO_EMPTY | output | CELL[23].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_FIXDLY_RDY | output | CELL[23].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_GT_STATUS | output | CELL[23].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[25].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[25].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[24].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[24].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[24].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[24].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[24].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[24].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[24].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[24].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[24].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[24].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[25].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[24].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[24].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[24].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[24].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[24].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[24].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[24].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[24].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[24].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[24].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[25].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[24].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[24].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[24].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[24].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[24].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[24].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[24].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[23].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[23].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[23].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[25].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[23].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[23].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[23].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[23].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[23].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[23].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[23].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[23].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[23].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[23].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[25].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[23].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[23].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[23].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[23].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[25].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[25].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[24].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[24].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_0 | output | CELL[25].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_1 | output | CELL[25].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_2 | output | CELL[25].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_0 | output | CELL[25].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_1 | output | CELL[25].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_2 | output | CELL[25].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_MASTER_PD | output | CELL[23].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_PHY_RDY | output | CELL[23].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_0 | output | CELL[21].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_1 | output | CELL[21].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_2 | output | CELL[21].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_3 | output | CELL[21].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_4 | output | CELL[21].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_5 | output | CELL[21].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_6 | output | CELL[21].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_7 | output | CELL[21].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_0 | output | CELL[22].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_1 | output | CELL[21].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_2 | output | CELL[22].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_3 | output | CELL[21].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_4 | output | CELL[22].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_5 | output | CELL[21].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_6 | output | CELL[22].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_7 | output | CELL[21].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_0 | output | CELL[22].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_1 | output | CELL[22].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_2 | output | CELL[22].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_3 | output | CELL[22].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_4 | output | CELL[22].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_5 | output | CELL[22].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_6 | output | CELL[22].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_7 | output | CELL[22].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_0 | output | CELL[22].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_1 | output | CELL[22].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_2 | output | CELL[22].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_3 | output | CELL[22].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_4 | output | CELL[22].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_5 | output | CELL[22].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_6 | output | CELL[22].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_7 | output | CELL[22].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_0 | output | CELL[22].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_1 | output | CELL[22].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_2 | output | CELL[22].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_3 | output | CELL[22].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_4 | output | CELL[22].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_5 | output | CELL[22].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_6 | output | CELL[22].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_7 | output | CELL[22].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_0 | output | CELL[23].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_1 | output | CELL[23].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_2 | output | CELL[23].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_3 | output | CELL[23].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_4 | output | CELL[23].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_5 | output | CELL[23].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_6 | output | CELL[23].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_7 | output | CELL[22].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA0 | output | CELL[26].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA1 | output | CELL[26].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA10 | output | CELL[25].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA11 | output | CELL[25].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA12 | output | CELL[25].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA13 | output | CELL[25].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA14 | output | CELL[25].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA15 | output | CELL[25].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA2 | output | CELL[26].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA3 | output | CELL[26].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA4 | output | CELL[26].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA5 | output | CELL[26].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA6 | output | CELL[26].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA7 | output | CELL[25].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA8 | output | CELL[25].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA9 | output | CELL[25].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P10_RIU2CLB_VALID | output | CELL[26].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P1_CLB2MC_DIV_CLK | input | CELL[49].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_CTRL_CLK | input | CELL[49].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[50].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[50].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[50].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[50].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[50].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[49].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_FIFO_CLK | input | CELL[49].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE0 | input | CELL[50].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE1 | input | CELL[50].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE2 | input | CELL[50].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE3 | input | CELL[50].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE4 | input | CELL[50].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE5 | input | CELL[50].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[52].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[52].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[52].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[52].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[52].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[52].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE0 | input | CELL[50].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE1 | input | CELL[50].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE2 | input | CELL[50].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE3 | input | CELL[50].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE4 | input | CELL[50].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE5 | input | CELL[50].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[52].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[52].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[52].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[52].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[52].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[52].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[52].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[52].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[52].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[52].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[52].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[52].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[52].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[52].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[52].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[52].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[52].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[51].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[51].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[51].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[51].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[51].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[51].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[52].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[51].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[51].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[51].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[51].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[51].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[51].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[51].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[51].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[51].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[51].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[52].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[51].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[51].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[51].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[51].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[51].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[51].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[51].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[51].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[50].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[50].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[52].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[50].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[50].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[50].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[50].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[52].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[52].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[52].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[52].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC0 | input | CELL[50].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC1 | input | CELL[50].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC2 | input | CELL[50].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC3 | input | CELL[50].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC4 | input | CELL[50].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC5 | input | CELL[50].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD0 | input | CELL[50].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD1 | input | CELL[50].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD2 | input | CELL[50].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD3 | input | CELL[50].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD4 | input | CELL[50].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD5 | input | CELL[50].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN0 | input | CELL[53].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN1 | input | CELL[53].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN2 | input | CELL[53].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN3 | input | CELL[53].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN4 | input | CELL[53].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN5 | input | CELL[53].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[52].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[52].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[52].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[53].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[53].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[52].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[53].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[53].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[53].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[52].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[52].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[52].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[52].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[52].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[52].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[52].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[52].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[52].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_0 | input | CELL[52].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_1 | input | CELL[52].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_2 | input | CELL[52].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RST | input | CELL[49].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST0 | input | CELL[49].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST1 | input | CELL[49].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST2 | input | CELL[49].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST3 | input | CELL[49].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST4 | input | CELL[49].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST5 | input | CELL[49].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST0 | input | CELL[49].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST1 | input | CELL[49].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST2 | input | CELL[49].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST3 | input | CELL[49].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST4 | input | CELL[49].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST5 | input | CELL[49].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P1_CLB2RIU_NIBBLE_SEL | input | CELL[53].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P1_CLB2RIU_WR_EN | input | CELL[53].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT0 | output | CELL[53].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT1 | output | CELL[53].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT2 | output | CELL[53].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT3 | output | CELL[53].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT4 | output | CELL[53].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P1_IOB2CLB_DFT5 | output | CELL[53].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_FIFO_EMPTY | output | CELL[51].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_FIXDLY_RDY | output | CELL[51].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_GT_STATUS | output | CELL[51].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[53].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[53].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[53].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[53].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[53].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[53].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[52].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[52].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[52].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[52].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[52].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[52].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[53].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[52].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[52].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[52].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[52].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[52].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[52].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[52].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[52].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[52].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[52].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[53].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[52].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[52].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[52].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[52].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[52].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[52].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[52].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[52].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[51].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[51].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[53].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[51].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[51].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[51].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[51].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[51].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[51].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[51].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[51].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[51].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[51].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[53].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[51].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[51].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[51].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[51].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[53].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[53].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[53].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[53].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_0 | output | CELL[53].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_1 | output | CELL[53].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_2 | output | CELL[53].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_0 | output | CELL[53].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_1 | output | CELL[53].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_2 | output | CELL[53].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_MASTER_PD | output | CELL[51].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P1_PHY2CLB_PHY_RDY | output | CELL[51].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P1_RIU2CLB_VALID | output | CELL[53].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P2_CLB2MC_DIV_CLK | input | CELL[46].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_CTRL_CLK | input | CELL[46].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[47].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[47].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[47].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[47].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[47].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[47].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_FIFO_CLK | input | CELL[46].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE0 | input | CELL[47].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE1 | input | CELL[47].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE2 | input | CELL[47].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE3 | input | CELL[47].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE4 | input | CELL[47].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE5 | input | CELL[47].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[48].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[48].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[48].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[48].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[48].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[47].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE0 | input | CELL[47].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE1 | input | CELL[47].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE2 | input | CELL[47].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE3 | input | CELL[47].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE4 | input | CELL[47].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE5 | input | CELL[47].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC0 | input | CELL[47].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC1 | input | CELL[47].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC2 | input | CELL[47].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC3 | input | CELL[47].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC4 | input | CELL[47].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC5 | input | CELL[47].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD0 | input | CELL[47].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD1 | input | CELL[47].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD2 | input | CELL[47].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD3 | input | CELL[47].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD4 | input | CELL[47].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD5 | input | CELL[47].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[49].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[49].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[48].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_0_BIT2 | input | CELL[49].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[49].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[49].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[49].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[49].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[49].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[49].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[48].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[48].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[48].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[48].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[48].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[48].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_0 | input | CELL[49].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_1 | input | CELL[49].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_2 | input | CELL[49].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RST | input | CELL[46].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST0 | input | CELL[47].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST1 | input | CELL[47].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST2 | input | CELL[47].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST3 | input | CELL[47].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST4 | input | CELL[47].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST5 | input | CELL[47].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST0 | input | CELL[47].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST1 | input | CELL[47].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST2 | input | CELL[47].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST3 | input | CELL[47].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST4 | input | CELL[46].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST5 | input | CELL[46].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P2_CLB2RIU_NIBBLE_SEL | input | CELL[48].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P2_CLB2RIU_WR_EN | input | CELL[49].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT0 | output | CELL[45].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT1 | output | CELL[45].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT2 | output | CELL[45].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT3 | output | CELL[45].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT4 | output | CELL[45].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P2_IOB2CLB_DFT5 | output | CELL[45].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_FIFO_EMPTY | output | CELL[44].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_FIXDLY_RDY | output | CELL[44].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_GT_STATUS | output | CELL[44].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_0 | output | CELL[45].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_1 | output | CELL[45].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_2 | output | CELL[45].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_0 | output | CELL[45].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_1 | output | CELL[45].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_2 | output | CELL[45].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_MASTER_PD | output | CELL[45].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P2_PHY2CLB_PHY_RDY | output | CELL[44].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P2_RIU2CLB_VALID | output | CELL[45].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P3_CLB2MC_DIV_CLK | input | CELL[38].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_CTRL_CLK | input | CELL[38].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[40].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[40].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[40].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[39].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[39].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[39].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_FIFO_CLK | input | CELL[38].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE0 | input | CELL[40].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE1 | input | CELL[40].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE2 | input | CELL[40].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE3 | input | CELL[40].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE4 | input | CELL[40].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE5 | input | CELL[40].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE0 | input | CELL[40].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE1 | input | CELL[40].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE2 | input | CELL[40].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE3 | input | CELL[40].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE4 | input | CELL[40].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE5 | input | CELL[40].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC0 | input | CELL[40].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC1 | input | CELL[40].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC2 | input | CELL[40].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC3 | input | CELL[40].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC4 | input | CELL[40].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC5 | input | CELL[40].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD0 | input | CELL[40].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD1 | input | CELL[40].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD2 | input | CELL[40].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD3 | input | CELL[40].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD4 | input | CELL[40].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD5 | input | CELL[40].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN0 | input | CELL[44].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN1 | input | CELL[44].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN2 | input | CELL[44].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN3 | input | CELL[43].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN4 | input | CELL[43].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN5 | input | CELL[43].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[40].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[40].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[40].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[43].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[41].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[40].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[43].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[43].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[43].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[40].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[40].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[40].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[40].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[40].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[40].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[40].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[40].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[40].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RST | input | CELL[39].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST0 | input | CELL[39].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST1 | input | CELL[39].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST2 | input | CELL[39].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST3 | input | CELL[39].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST4 | input | CELL[39].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST5 | input | CELL[39].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST0 | input | CELL[39].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST1 | input | CELL[39].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST2 | input | CELL[39].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST3 | input | CELL[39].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST4 | input | CELL[39].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST5 | input | CELL[39].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P3_CLB2RIU_NIBBLE_SEL | input | CELL[43].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT0 | output | CELL[41].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT1 | output | CELL[41].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT2 | output | CELL[41].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT3 | output | CELL[41].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT4 | output | CELL[40].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P3_IOB2CLB_DFT5 | output | CELL[40].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_FIFO_EMPTY | output | CELL[40].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_FIXDLY_RDY | output | CELL[40].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_GT_STATUS | output | CELL[40].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_0 | output | CELL[41].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_1 | output | CELL[41].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_2 | output | CELL[41].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_0 | output | CELL[41].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_1 | output | CELL[41].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_2 | output | CELL[41].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_MASTER_PD | output | CELL[40].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P3_PHY2CLB_PHY_RDY | output | CELL[40].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P3_RIU2CLB_VALID | output | CELL[41].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P4_CLB2MC_DIV_CLK | input | CELL[34].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_CTRL_CLK | input | CELL[34].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DLYCTL_EN_VTC | input | CELL[35].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[35].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[35].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[35].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[35].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[35].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[35].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_FIFO_CLK | input | CELL[34].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_FIFO_RDEN | input | CELL[35].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE0 | input | CELL[35].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE1 | input | CELL[35].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE2 | input | CELL[35].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE3 | input | CELL[35].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE4 | input | CELL[35].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE5 | input | CELL[35].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[37].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[37].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[37].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[37].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[37].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[37].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE0 | input | CELL[35].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE1 | input | CELL[35].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE2 | input | CELL[35].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE3 | input | CELL[35].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE4 | input | CELL[35].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE5 | input | CELL[35].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[36].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[36].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[36].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[36].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[36].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[36].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[36].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[36].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[36].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[36].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[36].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[36].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[36].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[36].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[36].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[36].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[36].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[36].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[36].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[36].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[36].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[36].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[36].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[36].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[36].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[36].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[36].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[36].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[36].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[36].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[36].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[36].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[36].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[36].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[36].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[36].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[36].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[36].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[36].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[36].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[36].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[35].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[35].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[35].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[35].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[36].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[35].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[35].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[35].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[35].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[36].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[36].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[36].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[36].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC0 | input | CELL[35].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC1 | input | CELL[35].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC2 | input | CELL[35].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC3 | input | CELL[35].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC4 | input | CELL[35].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC5 | input | CELL[35].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD0 | input | CELL[35].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD1 | input | CELL[35].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD2 | input | CELL[35].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD3 | input | CELL[35].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD4 | input | CELL[35].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD5 | input | CELL[35].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL0 | input | CELL[37].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL1 | input | CELL[37].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL2 | input | CELL[37].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL3 | input | CELL[37].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL4 | input | CELL[37].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL5 | input | CELL[36].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN0 | input | CELL[38].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN1 | input | CELL[38].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN2 | input | CELL[38].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN3 | input | CELL[38].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN4 | input | CELL[38].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN5 | input | CELL[38].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[37].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[37].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[37].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[38].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[38].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[38].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[38].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[38].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[38].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[37].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[37].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[37].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[37].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[37].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[37].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[37].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[37].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[37].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_0 | input | CELL[38].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_1 | input | CELL[38].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_2 | input | CELL[37].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN0 | input | CELL[35].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN1 | input | CELL[35].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN2 | input | CELL[35].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN3 | input | CELL[35].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RST | input | CELL[34].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST0 | input | CELL[34].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST1 | input | CELL[34].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST2 | input | CELL[34].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST3 | input | CELL[34].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST4 | input | CELL[34].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST5 | input | CELL[34].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST0 | input | CELL[34].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST1 | input | CELL[34].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST2 | input | CELL[34].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST3 | input | CELL[34].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST4 | input | CELL[34].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST5 | input | CELL[34].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT0 | input | CELL[35].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT1 | input | CELL[35].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT2 | input | CELL[35].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT3 | input | CELL[35].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT4 | input | CELL[34].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT5 | input | CELL[34].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WREN0 | input | CELL[34].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WREN1 | input | CELL[34].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WREN2 | input | CELL[34].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WREN3 | input | CELL[34].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_0 | input | CELL[39].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_1 | input | CELL[39].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_2 | input | CELL[39].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_3 | input | CELL[39].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_4 | input | CELL[39].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_5 | input | CELL[39].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_6 | input | CELL[39].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_7 | input | CELL[39].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_0 | input | CELL[39].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_1 | input | CELL[39].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_2 | input | CELL[39].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_3 | input | CELL[39].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_4 | input | CELL[39].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_5 | input | CELL[39].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_6 | input | CELL[39].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_7 | input | CELL[39].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_0 | input | CELL[38].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_1 | input | CELL[38].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_2 | input | CELL[38].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_3 | input | CELL[38].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_4 | input | CELL[38].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_5 | input | CELL[38].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_6 | input | CELL[38].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_7 | input | CELL[38].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_0 | input | CELL[37].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_1 | input | CELL[37].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_2 | input | CELL[37].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_3 | input | CELL[37].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_4 | input | CELL[37].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_5 | input | CELL[37].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_6 | input | CELL[37].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_7 | input | CELL[38].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_0 | input | CELL[37].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_1 | input | CELL[37].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_2 | input | CELL[37].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_3 | input | CELL[37].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_4 | input | CELL[37].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_5 | input | CELL[37].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_6 | input | CELL[37].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_7 | input | CELL[37].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_0 | input | CELL[37].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_1 | input | CELL[37].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_2 | input | CELL[37].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_3 | input | CELL[37].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_4 | input | CELL[37].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_5 | input | CELL[37].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_6 | input | CELL[37].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_7 | input | CELL[37].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR0 | input | CELL[38].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR1 | input | CELL[38].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR2 | input | CELL[38].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR3 | input | CELL[38].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR4 | input | CELL[38].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR5 | input | CELL[38].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR6 | input | CELL[38].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR7 | input | CELL[38].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_NIBBLE_SEL | input | CELL[37].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA0 | input | CELL[38].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA1 | input | CELL[38].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA10 | input | CELL[38].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA11 | input | CELL[38].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA12 | input | CELL[38].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA13 | input | CELL[38].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA14 | input | CELL[38].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA15 | input | CELL[38].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA2 | input | CELL[38].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA3 | input | CELL[38].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA4 | input | CELL[38].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA5 | input | CELL[38].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA6 | input | CELL[38].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA7 | input | CELL[38].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA8 | input | CELL[38].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA9 | input | CELL[38].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P4_CLB2RIU_WR_EN | input | CELL[38].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT0 | output | CELL[37].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT1 | output | CELL[37].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT2 | output | CELL[37].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT3 | output | CELL[37].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT4 | output | CELL[37].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P4_IOB2CLB_DFT5 | output | CELL[37].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_FIFO_EMPTY | output | CELL[35].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_FIXDLY_RDY | output | CELL[35].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_GT_STATUS | output | CELL[35].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[37].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[37].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[37].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[37].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[36].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[36].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[36].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[36].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[36].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[36].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[36].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[36].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[37].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[36].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[36].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[36].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[36].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[36].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[36].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[36].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[36].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[36].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[36].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[37].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[36].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[36].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[36].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[36].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[36].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[36].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[36].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[36].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[36].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[36].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[37].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[36].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[36].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[36].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[35].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[35].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[35].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[35].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[35].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[35].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[35].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[37].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[35].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[35].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[35].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[35].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[37].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[37].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[37].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[37].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_0 | output | CELL[37].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_1 | output | CELL[37].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_2 | output | CELL[37].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_0 | output | CELL[37].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_1 | output | CELL[37].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_2 | output | CELL[37].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_MASTER_PD | output | CELL[35].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_PHY_RDY | output | CELL[35].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_0 | output | CELL[39].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_1 | output | CELL[39].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_2 | output | CELL[39].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_3 | output | CELL[39].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_4 | output | CELL[39].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_5 | output | CELL[39].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_6 | output | CELL[39].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_7 | output | CELL[39].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_0 | output | CELL[39].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_1 | output | CELL[39].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_2 | output | CELL[39].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_3 | output | CELL[39].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_4 | output | CELL[39].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_5 | output | CELL[39].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_6 | output | CELL[39].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_7 | output | CELL[39].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_0 | output | CELL[39].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_1 | output | CELL[39].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_2 | output | CELL[39].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_3 | output | CELL[39].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_4 | output | CELL[39].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_5 | output | CELL[39].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_6 | output | CELL[39].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_7 | output | CELL[39].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_0 | output | CELL[38].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_1 | output | CELL[38].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_2 | output | CELL[38].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_3 | output | CELL[38].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_4 | output | CELL[38].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_5 | output | CELL[38].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_6 | output | CELL[38].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_7 | output | CELL[39].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_0 | output | CELL[38].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_1 | output | CELL[38].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_2 | output | CELL[38].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_3 | output | CELL[38].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_4 | output | CELL[38].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_5 | output | CELL[38].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_6 | output | CELL[38].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_7 | output | CELL[38].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_0 | output | CELL[38].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_1 | output | CELL[38].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_2 | output | CELL[38].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_3 | output | CELL[38].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_4 | output | CELL[38].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_5 | output | CELL[38].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_6 | output | CELL[38].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_7 | output | CELL[38].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA0 | output | CELL[38].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA1 | output | CELL[38].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA10 | output | CELL[37].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA11 | output | CELL[37].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA12 | output | CELL[37].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA13 | output | CELL[37].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA14 | output | CELL[37].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA15 | output | CELL[37].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA2 | output | CELL[38].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA3 | output | CELL[38].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA4 | output | CELL[38].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA5 | output | CELL[38].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA6 | output | CELL[38].OUT_BEL[1] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA7 | output | CELL[38].OUT_BEL[0] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA8 | output | CELL[37].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA9 | output | CELL[37].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P4_RIU2CLB_VALID | output | CELL[38].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_CLB2MC_DIV_CLK | input | CELL[30].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_CTRL_CLK | input | CELL[30].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DLYCTL_EN_VTC | input | CELL[27].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[27].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[27].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[27].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[27].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[32].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[32].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_FIFO_CLK | input | CELL[30].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_FIFO_RDEN | input | CELL[32].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE0 | input | CELL[27].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE1 | input | CELL[27].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE2 | input | CELL[27].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE3 | input | CELL[27].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE4 | input | CELL[27].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE5 | input | CELL[27].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[33].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[33].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[33].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[33].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[33].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[33].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE0 | input | CELL[28].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE1 | input | CELL[28].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE2 | input | CELL[28].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE3 | input | CELL[28].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE4 | input | CELL[28].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE5 | input | CELL[27].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[32].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[32].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[32].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[32].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[32].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[32].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[32].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[32].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[32].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[32].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[32].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[32].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[32].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[32].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[32].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[32].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[32].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[32].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[32].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[32].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[32].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[32].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[32].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[32].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[32].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[32].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[32].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[32].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[32].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[32].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[32].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[32].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[31].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[31].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[32].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[31].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[31].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[31].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[31].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[31].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[31].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[30].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[30].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[30].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[30].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[32].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[30].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[30].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[30].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[30].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[32].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[32].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[32].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[32].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC0 | input | CELL[29].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC1 | input | CELL[29].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC2 | input | CELL[29].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC3 | input | CELL[28].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC4 | input | CELL[28].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC5 | input | CELL[28].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD0 | input | CELL[29].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD1 | input | CELL[29].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD2 | input | CELL[29].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD3 | input | CELL[29].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD4 | input | CELL[29].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD5 | input | CELL[29].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL0 | input | CELL[33].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL1 | input | CELL[33].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL2 | input | CELL[33].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL3 | input | CELL[33].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL4 | input | CELL[32].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL5 | input | CELL[32].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN0 | input | CELL[33].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN1 | input | CELL[33].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN2 | input | CELL[33].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN3 | input | CELL[33].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN4 | input | CELL[33].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN5 | input | CELL[33].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[33].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[33].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[33].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[33].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[33].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[33].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[33].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[33].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[33].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[33].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[33].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[33].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[33].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[33].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[33].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[33].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[33].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[33].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_0 | input | CELL[33].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_1 | input | CELL[33].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_2 | input | CELL[33].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN0 | input | CELL[32].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN1 | input | CELL[32].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN2 | input | CELL[32].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN3 | input | CELL[32].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RST | input | CELL[29].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST0 | input | CELL[30].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST1 | input | CELL[30].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST2 | input | CELL[30].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST3 | input | CELL[30].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST4 | input | CELL[30].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST5 | input | CELL[30].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST0 | input | CELL[29].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST1 | input | CELL[29].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST2 | input | CELL[29].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST3 | input | CELL[29].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST4 | input | CELL[29].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST5 | input | CELL[29].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT0 | input | CELL[31].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT1 | input | CELL[31].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT2 | input | CELL[31].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT3 | input | CELL[31].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT4 | input | CELL[31].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT5 | input | CELL[31].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WREN0 | input | CELL[31].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WREN1 | input | CELL[31].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WREN2 | input | CELL[30].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WREN3 | input | CELL[30].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_0 | input | CELL[26].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_1 | input | CELL[26].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_2 | input | CELL[27].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_3 | input | CELL[26].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_4 | input | CELL[27].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_5 | input | CELL[26].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_6 | input | CELL[27].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_7 | input | CELL[26].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_0 | input | CELL[27].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_1 | input | CELL[27].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_2 | input | CELL[27].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_3 | input | CELL[27].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_4 | input | CELL[27].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_5 | input | CELL[27].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_6 | input | CELL[27].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_7 | input | CELL[27].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_0 | input | CELL[27].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_1 | input | CELL[27].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_2 | input | CELL[27].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_3 | input | CELL[27].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_4 | input | CELL[27].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_5 | input | CELL[27].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_6 | input | CELL[27].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_7 | input | CELL[27].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_0 | input | CELL[27].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_1 | input | CELL[27].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_2 | input | CELL[27].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_3 | input | CELL[27].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_4 | input | CELL[27].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_5 | input | CELL[27].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_6 | input | CELL[27].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_7 | input | CELL[27].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_0 | input | CELL[27].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_1 | input | CELL[27].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_2 | input | CELL[27].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_3 | input | CELL[27].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_4 | input | CELL[27].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_5 | input | CELL[27].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_6 | input | CELL[27].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_7 | input | CELL[27].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_0 | input | CELL[28].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_1 | input | CELL[28].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_2 | input | CELL[28].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_3 | input | CELL[28].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_4 | input | CELL[28].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_5 | input | CELL[28].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_6 | input | CELL[28].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_7 | input | CELL[28].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR0 | input | CELL[33].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR1 | input | CELL[33].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR2 | input | CELL[33].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR3 | input | CELL[33].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR4 | input | CELL[33].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR5 | input | CELL[33].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR6 | input | CELL[33].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR7 | input | CELL[33].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_NIBBLE_SEL | input | CELL[34].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA0 | input | CELL[34].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA1 | input | CELL[34].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA10 | input | CELL[34].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA11 | input | CELL[34].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA12 | input | CELL[34].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA13 | input | CELL[34].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA14 | input | CELL[33].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA15 | input | CELL[33].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA2 | input | CELL[34].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA3 | input | CELL[34].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA4 | input | CELL[34].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA5 | input | CELL[34].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA6 | input | CELL[34].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA7 | input | CELL[34].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA8 | input | CELL[34].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA9 | input | CELL[34].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P5_CLB2RIU_WR_EN | input | CELL[34].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT0 | output | CELL[32].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT1 | output | CELL[32].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT2 | output | CELL[32].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT3 | output | CELL[32].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT4 | output | CELL[32].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P5_IOB2CLB_DFT5 | output | CELL[32].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_FIFO_EMPTY | output | CELL[29].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_FIXDLY_RDY | output | CELL[29].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_GT_STATUS | output | CELL[28].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[32].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[32].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[31].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[31].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[31].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[31].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[31].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[31].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[31].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[31].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[32].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[32].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[32].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[32].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[32].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[31].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[31].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[31].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[31].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[31].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[31].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[31].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[31].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[32].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[31].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[30].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[30].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[30].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[30].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[30].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[30].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[30].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[30].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[30].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[32].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[30].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[29].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[29].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[29].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[29].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[29].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[29].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[29].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[29].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[29].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[32].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[29].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[29].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[28].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[28].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[32].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[32].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[32].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[31].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_0 | output | CELL[32].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_1 | output | CELL[32].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_2 | output | CELL[32].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_0 | output | CELL[32].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_1 | output | CELL[32].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_2 | output | CELL[32].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_MASTER_PD | output | CELL[28].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_PHY_RDY | output | CELL[28].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_0 | output | CELL[29].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_1 | output | CELL[29].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_2 | output | CELL[29].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_3 | output | CELL[29].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_4 | output | CELL[29].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_5 | output | CELL[28].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_6 | output | CELL[29].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_7 | output | CELL[28].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_0 | output | CELL[29].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_1 | output | CELL[29].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_2 | output | CELL[29].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_3 | output | CELL[29].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_4 | output | CELL[29].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_5 | output | CELL[29].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_6 | output | CELL[29].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_7 | output | CELL[29].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_0 | output | CELL[30].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_1 | output | CELL[30].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_2 | output | CELL[30].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_3 | output | CELL[30].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_4 | output | CELL[30].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_5 | output | CELL[29].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_6 | output | CELL[30].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_7 | output | CELL[29].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_0 | output | CELL[30].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_1 | output | CELL[30].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_2 | output | CELL[30].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_3 | output | CELL[30].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_4 | output | CELL[30].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_5 | output | CELL[30].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_6 | output | CELL[30].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_7 | output | CELL[30].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_0 | output | CELL[30].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_1 | output | CELL[30].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_2 | output | CELL[31].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_3 | output | CELL[30].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_4 | output | CELL[31].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_5 | output | CELL[30].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_6 | output | CELL[31].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_7 | output | CELL[30].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_0 | output | CELL[31].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_1 | output | CELL[31].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_2 | output | CELL[31].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_3 | output | CELL[31].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_4 | output | CELL[31].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_5 | output | CELL[31].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_6 | output | CELL[31].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_7 | output | CELL[31].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA0 | output | CELL[33].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA1 | output | CELL[33].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA10 | output | CELL[33].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA11 | output | CELL[33].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA12 | output | CELL[33].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA13 | output | CELL[32].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA14 | output | CELL[32].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA15 | output | CELL[32].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA2 | output | CELL[33].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA3 | output | CELL[33].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA4 | output | CELL[33].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA5 | output | CELL[33].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA6 | output | CELL[33].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA7 | output | CELL[33].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA8 | output | CELL[33].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA9 | output | CELL[33].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P5_RIU2CLB_VALID | output | CELL[32].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P6_CLB2MC_DIV_CLK | input | CELL[18].IMUX_CTRL[3] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_CTRL_CLK | input | CELL[18].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[18].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[18].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[18].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[18].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[18].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[18].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_FIFO_CLK | input | CELL[18].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE0 | input | CELL[18].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE1 | input | CELL[18].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE2 | input | CELL[18].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE3 | input | CELL[18].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE4 | input | CELL[18].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE5 | input | CELL[18].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[19].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[19].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[19].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[19].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[18].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[18].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE0 | input | CELL[18].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE1 | input | CELL[18].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE2 | input | CELL[18].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE3 | input | CELL[18].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE4 | input | CELL[18].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE5 | input | CELL[18].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC0 | input | CELL[18].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC1 | input | CELL[18].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC2 | input | CELL[18].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC3 | input | CELL[18].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC4 | input | CELL[18].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC5 | input | CELL[18].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD0 | input | CELL[18].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD1 | input | CELL[18].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD2 | input | CELL[18].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD3 | input | CELL[18].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD4 | input | CELL[18].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD5 | input | CELL[18].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[19].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[19].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[19].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_0_BIT2 | input | CELL[19].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[19].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[19].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[19].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[19].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[19].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[19].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[19].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[19].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[19].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[19].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[19].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[19].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_0 | input | CELL[19].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_1 | input | CELL[19].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_2 | input | CELL[19].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RST | input | CELL[18].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST0 | input | CELL[18].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST1 | input | CELL[18].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST2 | input | CELL[18].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST3 | input | CELL[18].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST4 | input | CELL[18].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST5 | input | CELL[18].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST0 | input | CELL[18].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST1 | input | CELL[18].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST2 | input | CELL[18].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST3 | input | CELL[18].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST4 | input | CELL[18].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST5 | input | CELL[18].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P6_CLB2RIU_NIBBLE_SEL | input | CELL[16].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P6_CLB2RIU_WR_EN | input | CELL[19].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT0 | output | CELL[17].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT1 | output | CELL[17].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT2 | output | CELL[17].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT3 | output | CELL[17].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT4 | output | CELL[17].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P6_IOB2CLB_DFT5 | output | CELL[17].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_FIFO_EMPTY | output | CELL[15].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_FIXDLY_RDY | output | CELL[15].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_GT_STATUS | output | CELL[15].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[17].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[17].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[16].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[16].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[16].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[16].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[16].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[16].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[16].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[16].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[16].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[16].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[17].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[16].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[16].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[16].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[16].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[16].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[16].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[16].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[16].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[16].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[16].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[17].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[16].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[16].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[16].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[16].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[16].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[16].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[15].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[15].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[15].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[15].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[17].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[15].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[15].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[15].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[15].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[15].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[15].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[15].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[15].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[15].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[15].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[17].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[15].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[15].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[15].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[15].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[16].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[16].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[16].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[16].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_0 | output | CELL[17].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_1 | output | CELL[17].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_2 | output | CELL[17].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_0 | output | CELL[17].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_1 | output | CELL[17].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_2 | output | CELL[17].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_MASTER_PD | output | CELL[15].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P6_PHY2CLB_PHY_RDY | output | CELL[15].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P6_RIU2CLB_VALID | output | CELL[17].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P7_CLB2MC_DIV_CLK | input | CELL[11].IMUX_CTRL[3] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_CTRL_CLK | input | CELL[11].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[10].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[10].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[10].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[10].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[10].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[10].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_FIFO_CLK | input | CELL[11].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE0 | input | CELL[10].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE1 | input | CELL[10].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE2 | input | CELL[10].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE3 | input | CELL[10].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE4 | input | CELL[10].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE5 | input | CELL[10].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[12].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[12].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[12].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[12].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[12].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[12].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE0 | input | CELL[10].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE1 | input | CELL[10].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE2 | input | CELL[10].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE3 | input | CELL[10].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE4 | input | CELL[10].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE5 | input | CELL[10].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[12].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[12].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[12].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[12].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[12].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[12].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[12].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[12].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[12].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[12].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[12].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[12].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[12].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[12].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[11].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[11].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[11].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[11].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[11].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[11].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[11].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[11].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[11].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[12].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[11].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[11].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[11].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[11].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[11].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[11].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[11].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[11].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[11].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[11].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[12].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[11].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[11].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[11].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[11].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[11].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[11].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[11].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[11].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[11].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[11].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[12].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[11].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[11].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[11].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[11].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[12].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[12].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[12].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[12].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC0 | input | CELL[10].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC1 | input | CELL[10].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC2 | input | CELL[10].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC3 | input | CELL[10].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC4 | input | CELL[10].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC5 | input | CELL[10].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD0 | input | CELL[11].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD1 | input | CELL[11].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD2 | input | CELL[10].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD3 | input | CELL[10].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD4 | input | CELL[10].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD5 | input | CELL[10].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN0 | input | CELL[13].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN1 | input | CELL[13].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN2 | input | CELL[13].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN3 | input | CELL[13].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN4 | input | CELL[13].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN5 | input | CELL[13].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[13].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[12].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[12].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[13].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[13].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[13].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[13].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[13].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[13].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[13].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[13].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[13].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[12].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[12].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[12].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[12].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[12].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[12].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_0 | input | CELL[13].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_1 | input | CELL[13].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_2 | input | CELL[13].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RST | input | CELL[9].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST0 | input | CELL[10].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST1 | input | CELL[10].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST2 | input | CELL[10].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST3 | input | CELL[10].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST4 | input | CELL[10].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST5 | input | CELL[10].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST0 | input | CELL[10].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST1 | input | CELL[10].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST2 | input | CELL[10].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST3 | input | CELL[10].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST4 | input | CELL[10].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST5 | input | CELL[9].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P7_CLB2RIU_NIBBLE_SEL | input | CELL[13].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P7_CLB2RIU_WR_EN | input | CELL[13].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT0 | output | CELL[13].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT1 | output | CELL[13].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT2 | output | CELL[13].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT3 | output | CELL[13].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT4 | output | CELL[13].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P7_IOB2CLB_DFT5 | output | CELL[13].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_FIFO_EMPTY | output | CELL[11].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_FIXDLY_RDY | output | CELL[11].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_GT_STATUS | output | CELL[11].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[13].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[13].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[12].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[12].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[12].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[12].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[12].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[12].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[12].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[12].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[12].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[12].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[13].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[12].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[12].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[12].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[12].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[12].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[12].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[12].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[12].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[12].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[12].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[13].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[12].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[12].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[12].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[12].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[12].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[11].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[11].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[11].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[11].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[11].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[13].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[11].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[11].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[11].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[11].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[11].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[11].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[11].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[11].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[11].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[11].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[13].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[11].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[11].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[11].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[11].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[12].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[12].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[12].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[12].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_0 | output | CELL[13].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_1 | output | CELL[13].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_2 | output | CELL[13].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_0 | output | CELL[13].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_1 | output | CELL[13].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_2 | output | CELL[13].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_MASTER_PD | output | CELL[11].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P7_PHY2CLB_PHY_RDY | output | CELL[11].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P7_RIU2CLB_VALID | output | CELL[13].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P8_CLB2MC_DIV_CLK | input | CELL[6].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_CTRL_CLK | input | CELL[6].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[6].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[6].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[6].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[6].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[6].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[6].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_FIFO_CLK | input | CELL[6].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE0 | input | CELL[6].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE1 | input | CELL[6].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE2 | input | CELL[6].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE3 | input | CELL[6].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE4 | input | CELL[6].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE5 | input | CELL[6].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[8].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[8].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[8].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[8].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[8].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[8].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE0 | input | CELL[6].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE1 | input | CELL[6].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE2 | input | CELL[6].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE3 | input | CELL[6].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE4 | input | CELL[6].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE5 | input | CELL[6].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[8].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[8].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[8].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[8].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[8].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[7].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[7].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[7].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[7].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[7].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[7].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[7].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[8].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[7].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[7].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[7].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[7].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[7].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[7].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[7].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[7].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[7].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[7].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[8].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[7].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[7].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[7].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[7].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[7].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[7].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[7].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[7].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[7].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[7].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[8].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[7].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[7].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[6].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[6].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[6].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[6].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[6].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[6].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[6].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[6].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[8].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[6].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[6].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[6].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[6].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[8].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[8].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[8].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[8].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC0 | input | CELL[6].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC1 | input | CELL[6].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC2 | input | CELL[6].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC3 | input | CELL[6].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC4 | input | CELL[6].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC5 | input | CELL[6].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD0 | input | CELL[6].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD1 | input | CELL[6].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD2 | input | CELL[6].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD3 | input | CELL[6].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD4 | input | CELL[6].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD5 | input | CELL[6].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN0 | input | CELL[9].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN1 | input | CELL[9].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN2 | input | CELL[9].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN3 | input | CELL[9].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN4 | input | CELL[9].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN5 | input | CELL[9].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[9].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[9].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[9].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[9].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[9].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[9].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[9].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[9].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[9].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[9].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[9].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[9].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[8].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[8].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[8].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[8].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[8].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[8].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_0 | input | CELL[9].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_1 | input | CELL[9].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_2 | input | CELL[9].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RST | input | CELL[5].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST0 | input | CELL[6].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST1 | input | CELL[6].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST2 | input | CELL[6].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST3 | input | CELL[6].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST4 | input | CELL[6].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST5 | input | CELL[5].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST0 | input | CELL[5].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST1 | input | CELL[5].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST2 | input | CELL[5].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST3 | input | CELL[5].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST4 | input | CELL[5].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST5 | input | CELL[5].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P8_CLB2RIU_NIBBLE_SEL | input | CELL[5].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P8_CLB2RIU_WR_EN | input | CELL[9].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT0 | output | CELL[7].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT1 | output | CELL[7].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT2 | output | CELL[6].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT3 | output | CELL[6].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT4 | output | CELL[6].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P8_IOB2CLB_DFT5 | output | CELL[6].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_FIFO_EMPTY | output | CELL[4].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_FIXDLY_RDY | output | CELL[4].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_GT_STATUS | output | CELL[4].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[6].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[6].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[6].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[6].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[6].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[6].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[6].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[6].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[6].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[6].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[6].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[6].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[6].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[6].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[6].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[6].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[6].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[6].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[5].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[5].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[5].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[5].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[5].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[6].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[5].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[5].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[5].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[5].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[5].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[5].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[5].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[5].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[5].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[5].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[6].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[5].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[5].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[5].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[5].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[5].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[5].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[5].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[5].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[5].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[5].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[6].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[5].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[5].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[5].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[5].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[6].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[6].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[6].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[6].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_0 | output | CELL[7].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_1 | output | CELL[7].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_2 | output | CELL[7].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_0 | output | CELL[7].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_1 | output | CELL[7].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_2 | output | CELL[7].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_MASTER_PD | output | CELL[4].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P8_PHY2CLB_PHY_RDY | output | CELL[4].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P8_RIU2CLB_VALID | output | CELL[7].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P9_CLB2MC_DIV_CLK | input | CELL[1].IMUX_CTRL[0] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_CTRL_CLK | input | CELL[1].IMUX_CTRL[1] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS0 | input | CELL[1].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS1 | input | CELL[1].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS2 | input | CELL[1].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS3 | input | CELL[1].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS4 | input | CELL[1].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS5 | input | CELL[1].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_FIFO_CLK | input | CELL[1].IMUX_CTRL[2] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE0 | input | CELL[1].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE1 | input | CELL[1].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE2 | input | CELL[1].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE3 | input | CELL[1].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE4 | input | CELL[1].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE5 | input | CELL[1].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[4].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[4].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[4].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[4].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[4].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[4].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE0 | input | CELL[1].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE1 | input | CELL[1].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE2 | input | CELL[1].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE3 | input | CELL[1].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE4 | input | CELL[1].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE5 | input | CELL[1].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[4].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[4].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[3].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[3].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[3].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[3].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[3].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[3].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[3].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[3].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[3].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[3].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[4].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[3].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[3].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[3].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[3].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[3].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[3].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[3].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[3].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[3].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[3].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[4].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[3].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[3].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN32 | input | CELL[3].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN33 | input | CELL[3].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN34 | input | CELL[3].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN35 | input | CELL[3].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN36 | input | CELL[3].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN37 | input | CELL[3].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN38 | input | CELL[3].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN39 | input | CELL[3].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[4].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN40 | input | CELL[3].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN41 | input | CELL[3].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN42 | input | CELL[3].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN43 | input | CELL[3].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN44 | input | CELL[3].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN45 | input | CELL[3].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN46 | input | CELL[3].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN47 | input | CELL[3].IMUX_IMUX_DELAY[20] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN48 | input | CELL[3].IMUX_IMUX_DELAY[2] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN49 | input | CELL[3].IMUX_IMUX_DELAY[19] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[4].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN50 | input | CELL[3].IMUX_IMUX_DELAY[18] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN51 | input | CELL[3].IMUX_IMUX_DELAY[1] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN52 | input | CELL[3].IMUX_IMUX_DELAY[17] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN53 | input | CELL[3].IMUX_IMUX_DELAY[16] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[4].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[3].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[3].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[3].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC0 | input | CELL[2].IMUX_IMUX_DELAY[14] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC1 | input | CELL[2].IMUX_IMUX_DELAY[43] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC2 | input | CELL[2].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC3 | input | CELL[2].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC4 | input | CELL[1].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC5 | input | CELL[1].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD0 | input | CELL[3].IMUX_IMUX_DELAY[0] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD1 | input | CELL[2].IMUX_IMUX_DELAY[47] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD2 | input | CELL[2].IMUX_IMUX_DELAY[46] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD3 | input | CELL[2].IMUX_IMUX_DELAY[15] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD4 | input | CELL[2].IMUX_IMUX_DELAY[45] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD5 | input | CELL[2].IMUX_IMUX_DELAY[44] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN0 | input | CELL[4].IMUX_IMUX_DELAY[13] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN1 | input | CELL[4].IMUX_IMUX_DELAY[41] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN2 | input | CELL[4].IMUX_IMUX_DELAY[40] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN3 | input | CELL[4].IMUX_IMUX_DELAY[12] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN4 | input | CELL[4].IMUX_IMUX_DELAY[39] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN5 | input | CELL[4].IMUX_IMUX_DELAY[38] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 | input | CELL[4].IMUX_IMUX_DELAY[7] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 | input | CELL[4].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 | input | CELL[4].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 | input | CELL[4].IMUX_IMUX_DELAY[10] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 | input | CELL[4].IMUX_IMUX_DELAY[35] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 | input | CELL[4].IMUX_IMUX_DELAY[34] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 | input | CELL[4].IMUX_IMUX_DELAY[11] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 | input | CELL[4].IMUX_IMUX_DELAY[37] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 | input | CELL[4].IMUX_IMUX_DELAY[36] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 | input | CELL[4].IMUX_IMUX_DELAY[8] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 | input | CELL[4].IMUX_IMUX_DELAY[31] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 | input | CELL[4].IMUX_IMUX_DELAY[30] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC0 | input | CELL[4].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC1 | input | CELL[4].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC2 | input | CELL[4].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC3 | input | CELL[4].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC4 | input | CELL[4].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC5 | input | CELL[4].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_0 | input | CELL[4].IMUX_IMUX_DELAY[9] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_1 | input | CELL[4].IMUX_IMUX_DELAY[33] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_2 | input | CELL[4].IMUX_IMUX_DELAY[32] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RST | input | CELL[1].IMUX_IMUX_DELAY[21] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST0 | input | CELL[1].IMUX_IMUX_DELAY[29] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST1 | input | CELL[1].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST2 | input | CELL[1].IMUX_IMUX_DELAY[6] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST3 | input | CELL[1].IMUX_IMUX_DELAY[27] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST4 | input | CELL[1].IMUX_IMUX_DELAY[26] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST5 | input | CELL[1].IMUX_IMUX_DELAY[5] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST0 | input | CELL[1].IMUX_IMUX_DELAY[25] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST1 | input | CELL[1].IMUX_IMUX_DELAY[24] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST2 | input | CELL[1].IMUX_IMUX_DELAY[4] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST3 | input | CELL[1].IMUX_IMUX_DELAY[23] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST4 | input | CELL[1].IMUX_IMUX_DELAY[22] |
| IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST5 | input | CELL[1].IMUX_IMUX_DELAY[3] |
| IF_HSM_CLB2PHY_P9_CLB2RIU_NIBBLE_SEL | input | CELL[0].IMUX_IMUX_DELAY[28] |
| IF_HSM_CLB2PHY_P9_CLB2RIU_WR_EN | input | CELL[4].IMUX_IMUX_DELAY[42] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT0 | output | CELL[4].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT1 | output | CELL[3].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT2 | output | CELL[3].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT3 | output | CELL[3].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT4 | output | CELL[3].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P9_IOB2CLB_DFT5 | output | CELL[3].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_FIFO_EMPTY | output | CELL[1].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_FIXDLY_RDY | output | CELL[1].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_GT_STATUS | output | CELL[1].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[3].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[3].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[3].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[3].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[3].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[3].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[3].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[3].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[3].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[3].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[3].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[3].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[3].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[3].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[3].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[3].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[3].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[2].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[2].OUT_BEL[30] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[2].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[2].OUT_BEL[28] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[2].OUT_BEL[27] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[2].OUT_BEL[26] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[3].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[2].OUT_BEL[25] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[2].OUT_BEL[24] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT32 | output | CELL[2].OUT_BEL[23] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT33 | output | CELL[2].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT34 | output | CELL[2].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT35 | output | CELL[2].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT36 | output | CELL[2].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT37 | output | CELL[2].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT38 | output | CELL[2].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT39 | output | CELL[2].OUT_BEL[16] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[3].OUT_BEL[22] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT40 | output | CELL[2].OUT_BEL[15] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT41 | output | CELL[2].OUT_BEL[14] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT42 | output | CELL[2].OUT_BEL[13] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT43 | output | CELL[2].OUT_BEL[12] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT44 | output | CELL[2].OUT_BEL[11] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT45 | output | CELL[2].OUT_BEL[10] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT46 | output | CELL[2].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT47 | output | CELL[2].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT48 | output | CELL[2].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT49 | output | CELL[2].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[3].OUT_BEL[21] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT50 | output | CELL[2].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT51 | output | CELL[2].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT52 | output | CELL[2].OUT_BEL[3] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT53 | output | CELL[2].OUT_BEL[2] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[3].OUT_BEL[20] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[3].OUT_BEL[19] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[3].OUT_BEL[18] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[3].OUT_BEL[17] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_0 | output | CELL[4].OUT_BEL[6] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_1 | output | CELL[4].OUT_BEL[5] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_2 | output | CELL[4].OUT_BEL[4] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_0 | output | CELL[4].OUT_BEL[9] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_1 | output | CELL[4].OUT_BEL[8] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_2 | output | CELL[4].OUT_BEL[7] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_MASTER_PD | output | CELL[1].OUT_BEL[31] |
| IF_HSM_CLB2PHY_P9_PHY2CLB_PHY_RDY | output | CELL[1].OUT_BEL[29] |
| IF_HSM_CLB2PHY_P9_RIU2CLB_VALID | output | CELL[4].OUT_BEL[10] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARADDR_PAR0 | input | CELL[54].IMUX_IMUX_DELAY[8] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARADDR_PAR1 | input | CELL[54].IMUX_IMUX_DELAY[31] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARBURST0 | input | CELL[54].IMUX_IMUX_DELAY[6] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARBURST1 | input | CELL[54].IMUX_IMUX_DELAY[27] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARLOCK | input | CELL[54].IMUX_IMUX_DELAY[28] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT0 | input | CELL[54].IMUX_IMUX_DELAY[30] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT1 | input | CELL[54].IMUX_IMUX_DELAY[7] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT2 | input | CELL[54].IMUX_IMUX_DELAY[29] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARREADY | output | CELL[54].OUT_BEL[17] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE0 | input | CELL[54].IMUX_IMUX_DELAY[26] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE1 | input | CELL[54].IMUX_IMUX_DELAY[5] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE2 | input | CELL[54].IMUX_IMUX_DELAY[25] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARVALID | input | CELL[54].IMUX_IMUX_DELAY[24] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWADDR_PAR0 | input | CELL[54].IMUX_IMUX_DELAY[12] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWADDR_PAR1 | input | CELL[54].IMUX_IMUX_DELAY[39] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWBURST0 | input | CELL[54].IMUX_IMUX_DELAY[10] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWBURST1 | input | CELL[54].IMUX_IMUX_DELAY[35] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWLOCK | input | CELL[54].IMUX_IMUX_DELAY[36] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT0 | input | CELL[54].IMUX_IMUX_DELAY[38] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT1 | input | CELL[54].IMUX_IMUX_DELAY[11] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT2 | input | CELL[54].IMUX_IMUX_DELAY[37] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWREADY | output | CELL[54].OUT_BEL[18] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE0 | input | CELL[54].IMUX_IMUX_DELAY[34] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE1 | input | CELL[54].IMUX_IMUX_DELAY[9] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE2 | input | CELL[54].IMUX_IMUX_DELAY[33] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWVALID | input | CELL[54].IMUX_IMUX_DELAY[32] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID0 | output | CELL[55].OUT_BEL[20] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID1 | output | CELL[55].OUT_BEL[19] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID2 | output | CELL[55].OUT_BEL[18] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID3 | output | CELL[55].OUT_BEL[17] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID4 | output | CELL[55].OUT_BEL[16] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID5 | output | CELL[55].OUT_BEL[15] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID6 | output | CELL[55].OUT_BEL[14] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID7 | output | CELL[55].OUT_BEL[13] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BREADY | input | CELL[54].IMUX_IMUX_DELAY[43] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BRESP0 | output | CELL[55].OUT_BEL[22] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BRESP1 | output | CELL[55].OUT_BEL[21] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BVALID | output | CELL[55].OUT_BEL[12] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR0 | output | CELL[55].OUT_BEL[11] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR1 | output | CELL[55].OUT_BEL[10] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR2 | output | CELL[55].OUT_BEL[9] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR3 | output | CELL[55].OUT_BEL[8] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR4 | output | CELL[55].OUT_BEL[7] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR5 | output | CELL[55].OUT_BEL[6] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR6 | output | CELL[55].OUT_BEL[5] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR7 | output | CELL[55].OUT_BEL[4] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID0 | output | CELL[54].OUT_BEL[29] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID1 | output | CELL[54].OUT_BEL[28] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID2 | output | CELL[54].OUT_BEL[27] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID3 | output | CELL[54].OUT_BEL[26] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID4 | output | CELL[54].OUT_BEL[25] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID5 | output | CELL[54].OUT_BEL[24] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID6 | output | CELL[54].OUT_BEL[23] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID7 | output | CELL[54].OUT_BEL[22] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RLAST | output | CELL[54].OUT_BEL[21] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RPOISON | output | CELL[55].OUT_BEL[3] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RREADY | input | CELL[54].IMUX_IMUX_DELAY[42] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RRESP0 | output | CELL[54].OUT_BEL[31] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RRESP1 | output | CELL[54].OUT_BEL[30] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RVALID | output | CELL[54].OUT_BEL[20] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WLAST | input | CELL[54].IMUX_IMUX_DELAY[41] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WPOISON | input | CELL[54].IMUX_IMUX_DELAY[13] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WREADY | output | CELL[54].OUT_BEL[19] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WVALID | input | CELL[54].IMUX_IMUX_DELAY[40] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARADDR_PAR0 | input | CELL[14].IMUX_IMUX_DELAY[36] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARADDR_PAR1 | input | CELL[14].IMUX_IMUX_DELAY[10] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARBURST0 | input | CELL[14].IMUX_IMUX_DELAY[32] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARBURST1 | input | CELL[14].IMUX_IMUX_DELAY[8] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARLOCK | input | CELL[14].IMUX_IMUX_DELAY[33] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT0 | input | CELL[14].IMUX_IMUX_DELAY[35] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT1 | input | CELL[14].IMUX_IMUX_DELAY[34] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT2 | input | CELL[14].IMUX_IMUX_DELAY[9] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARREADY | output | CELL[13].OUT_BEL[23] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE0 | input | CELL[14].IMUX_IMUX_DELAY[31] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE1 | input | CELL[14].IMUX_IMUX_DELAY[30] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE2 | input | CELL[14].IMUX_IMUX_DELAY[7] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARVALID | input | CELL[14].IMUX_IMUX_DELAY[29] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWADDR_PAR0 | input | CELL[14].IMUX_IMUX_DELAY[44] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWADDR_PAR1 | input | CELL[14].IMUX_IMUX_DELAY[14] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWBURST0 | input | CELL[14].IMUX_IMUX_DELAY[40] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWBURST1 | input | CELL[14].IMUX_IMUX_DELAY[12] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWLOCK | input | CELL[14].IMUX_IMUX_DELAY[41] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT0 | input | CELL[14].IMUX_IMUX_DELAY[43] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT1 | input | CELL[14].IMUX_IMUX_DELAY[42] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT2 | input | CELL[14].IMUX_IMUX_DELAY[13] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWREADY | output | CELL[13].OUT_BEL[31] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE0 | input | CELL[14].IMUX_IMUX_DELAY[39] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE1 | input | CELL[14].IMUX_IMUX_DELAY[38] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE2 | input | CELL[14].IMUX_IMUX_DELAY[11] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWVALID | input | CELL[14].IMUX_IMUX_DELAY[37] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID0 | output | CELL[15].OUT_BEL[6] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID1 | output | CELL[15].OUT_BEL[5] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID2 | output | CELL[15].OUT_BEL[4] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID3 | output | CELL[15].OUT_BEL[3] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID4 | output | CELL[15].OUT_BEL[2] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID5 | output | CELL[15].OUT_BEL[1] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID6 | output | CELL[15].OUT_BEL[0] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID7 | output | CELL[14].OUT_BEL[31] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BREADY | input | CELL[15].IMUX_IMUX_DELAY[16] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BRESP0 | output | CELL[15].OUT_BEL[8] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BRESP1 | output | CELL[15].OUT_BEL[7] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BVALID | output | CELL[14].OUT_BEL[30] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR0 | output | CELL[14].OUT_BEL[29] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR1 | output | CELL[14].OUT_BEL[28] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR2 | output | CELL[14].OUT_BEL[27] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR3 | output | CELL[14].OUT_BEL[26] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR4 | output | CELL[14].OUT_BEL[25] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR5 | output | CELL[14].OUT_BEL[24] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR6 | output | CELL[14].OUT_BEL[23] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR7 | output | CELL[14].OUT_BEL[22] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID0 | output | CELL[14].OUT_BEL[18] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID1 | output | CELL[14].OUT_BEL[17] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID2 | output | CELL[14].OUT_BEL[16] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID3 | output | CELL[14].OUT_BEL[15] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID4 | output | CELL[14].OUT_BEL[14] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID5 | output | CELL[14].OUT_BEL[13] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID6 | output | CELL[14].OUT_BEL[12] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID7 | output | CELL[14].OUT_BEL[11] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RLAST | output | CELL[14].OUT_BEL[10] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RPOISON | output | CELL[14].OUT_BEL[21] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RREADY | input | CELL[14].IMUX_IMUX_DELAY[47] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RRESP0 | output | CELL[14].OUT_BEL[20] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RRESP1 | output | CELL[14].OUT_BEL[19] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RVALID | output | CELL[14].OUT_BEL[9] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WLAST | input | CELL[14].IMUX_IMUX_DELAY[15] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WPOISON | input | CELL[14].IMUX_IMUX_DELAY[46] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WREADY | output | CELL[14].OUT_BEL[6] |
| IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WVALID | input | CELL[14].IMUX_IMUX_DELAY[45] |
| IF_UBLAZE_FABRIC_BLI2UB_CLK | input | CELL[43].IMUX_CTRL[0] |
| IF_UBLAZE_FABRIC_BLI2UB_DRAM_POWER_OFF_REQ | input | CELL[44].IMUX_IMUX_DELAY[31] |
| IF_UBLAZE_FABRIC_BLI2UB_RST | input | CELL[44].IMUX_IMUX_DELAY[6] |
| IF_UBLAZE_FABRIC_BLI2UB_SELF_REF_REQ | input | CELL[44].IMUX_IMUX_DELAY[30] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_CAPTURE | input | CELL[44].IMUX_IMUX_DELAY[8] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_DRCK | input | CELL[44].IMUX_IMUX_DELAY[32] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_RESET | input | CELL[44].IMUX_IMUX_DELAY[33] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_SEL | input | CELL[44].IMUX_IMUX_DELAY[9] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_SHIFT | input | CELL[44].IMUX_IMUX_DELAY[34] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_TCK | input | CELL[44].IMUX_IMUX_DELAY[35] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_TDI | input | CELL[44].IMUX_IMUX_DELAY[10] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_TDO | output | CELL[44].OUT_BEL[25] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_TMS | input | CELL[44].IMUX_IMUX_DELAY[36] |
| IF_UBLAZE_FABRIC_BSCAN_EXT_UPDATE | input | CELL[44].IMUX_IMUX_DELAY[37] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARBURST0 | output | CELL[44].OUT_BEL[28] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARBURST1 | output | CELL[44].OUT_BEL[16] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARREADY | input | CELL[44].IMUX_IMUX_DELAY[24] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE0 | output | CELL[44].OUT_BEL[29] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE1 | output | CELL[44].OUT_BEL[15] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE2 | output | CELL[44].OUT_BEL[30] |
| IF_UBLAZE_FABRIC_M_AXI_DC_ARVALID | output | CELL[44].OUT_BEL[17] |
| IF_UBLAZE_FABRIC_M_AXI_DC_AWREADY | input | CELL[44].IMUX_IMUX_DELAY[21] |
| IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE0 | output | CELL[44].OUT_BEL[31] |
| IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE1 | output | CELL[44].OUT_BEL[10] |
| IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE2 | output | CELL[45].OUT_BEL[3] |
| IF_UBLAZE_FABRIC_M_AXI_DC_AWVALID | output | CELL[44].OUT_BEL[11] |
| IF_UBLAZE_FABRIC_M_AXI_DC_BREADY | output | CELL[44].OUT_BEL[14] |
| IF_UBLAZE_FABRIC_M_AXI_DC_BRESP0 | input | CELL[44].IMUX_IMUX_DELAY[23] |
| IF_UBLAZE_FABRIC_M_AXI_DC_BRESP1 | input | CELL[44].IMUX_IMUX_DELAY[22] |
| IF_UBLAZE_FABRIC_M_AXI_DC_BVALID | input | CELL[44].IMUX_IMUX_DELAY[4] |
| IF_UBLAZE_FABRIC_M_AXI_DC_RLAST | input | CELL[44].IMUX_IMUX_DELAY[25] |
| IF_UBLAZE_FABRIC_M_AXI_DC_RREADY | output | CELL[44].OUT_BEL[18] |
| IF_UBLAZE_FABRIC_M_AXI_DC_RRESP0 | input | CELL[44].IMUX_IMUX_DELAY[26] |
| IF_UBLAZE_FABRIC_M_AXI_DC_RRESP1 | input | CELL[44].IMUX_IMUX_DELAY[5] |
| IF_UBLAZE_FABRIC_M_AXI_DC_RVALID | input | CELL[44].IMUX_IMUX_DELAY[27] |
| IF_UBLAZE_FABRIC_M_AXI_DC_WLAST | output | CELL[44].OUT_BEL[12] |
| IF_UBLAZE_FABRIC_M_AXI_DC_WREADY | input | CELL[44].IMUX_IMUX_DELAY[3] |
| IF_UBLAZE_FABRIC_M_AXI_DC_WVALID | output | CELL[44].OUT_BEL[13] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN0 | output | CELL[44].OUT_BEL[8] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN1 | output | CELL[44].OUT_BEL[7] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN2 | output | CELL[44].OUT_BEL[6] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN3 | output | CELL[45].OUT_BEL[4] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN4 | output | CELL[45].OUT_BEL[5] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN5 | output | CELL[45].OUT_BEL[6] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN6 | output | CELL[45].OUT_BEL[7] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN7 | output | CELL[45].OUT_BEL[8] |
| IF_UBLAZE_FABRIC_M_AXI_IC_ARREADY | input | CELL[44].IMUX_IMUX_DELAY[1] |
| IF_UBLAZE_FABRIC_M_AXI_IC_RLAST | input | CELL[44].IMUX_IMUX_DELAY[18] |
| IF_UBLAZE_FABRIC_M_AXI_IC_RREADY | output | CELL[44].OUT_BEL[9] |
| IF_UBLAZE_FABRIC_M_AXI_IC_RRESP0 | input | CELL[44].IMUX_IMUX_DELAY[2] |
| IF_UBLAZE_FABRIC_M_AXI_IC_RRESP1 | input | CELL[44].IMUX_IMUX_DELAY[19] |
| IF_UBLAZE_FABRIC_M_AXI_IC_RVALID | input | CELL[44].IMUX_IMUX_DELAY[20] |
| IF_UBLAZE_FABRIC_UB2BLI_DRAM_POWER_OFF_DONE | output | CELL[44].OUT_BEL[22] |
| IF_UBLAZE_FABRIC_UB2BLI_SELF_REF_DONE | output | CELL[44].OUT_BEL[21] |
| IF_UBLAZE_FABRIC_UB_MISC_IN0 | input | CELL[44].IMUX_IMUX_DELAY[7] |
| IF_UBLAZE_FABRIC_UB_MISC_IN1 | input | CELL[44].IMUX_IMUX_DELAY[29] |
| IF_UBLAZE_FABRIC_UB_MISC_IN2 | input | CELL[44].IMUX_IMUX_DELAY[28] |
| IF_UBLAZE_FABRIC_UB_MISC_OUT0 | output | CELL[44].OUT_BEL[20] |
| IF_UBLAZE_FABRIC_UB_MISC_OUT1 | output | CELL[44].OUT_BEL[19] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTRDCI_USR_RST | input | CELL[26].IMUX_IMUX_DELAY[14] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_RST_N | input | CELL[26].IMUX_IMUX_DELAY[27] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I1 | input | CELL[26].IMUX_IMUX_DELAY[42] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I10 | input | CELL[26].IMUX_IMUX_DELAY[36] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I11 | input | CELL[26].IMUX_IMUX_DELAY[10] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I12 | input | CELL[26].IMUX_IMUX_DELAY[35] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I13 | input | CELL[26].IMUX_IMUX_DELAY[34] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I14 | input | CELL[26].IMUX_IMUX_DELAY[9] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I15 | input | CELL[26].IMUX_IMUX_DELAY[33] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I16 | input | CELL[26].IMUX_IMUX_DELAY[32] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I17 | input | CELL[26].IMUX_IMUX_DELAY[8] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I18 | input | CELL[26].IMUX_IMUX_DELAY[31] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I19 | input | CELL[26].IMUX_IMUX_DELAY[30] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I2 | input | CELL[26].IMUX_IMUX_DELAY[13] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I20 | input | CELL[26].IMUX_IMUX_DELAY[7] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I21 | input | CELL[26].IMUX_IMUX_DELAY[29] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I22 | input | CELL[26].IMUX_IMUX_DELAY[28] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I23 | input | CELL[26].IMUX_IMUX_DELAY[6] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I3 | input | CELL[26].IMUX_IMUX_DELAY[41] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I4 | input | CELL[26].IMUX_IMUX_DELAY[40] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I5 | input | CELL[26].IMUX_IMUX_DELAY[12] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I6 | input | CELL[26].IMUX_IMUX_DELAY[39] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I7 | input | CELL[26].IMUX_IMUX_DELAY[38] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I8 | input | CELL[26].IMUX_IMUX_DELAY[11] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I9 | input | CELL[26].IMUX_IMUX_DELAY[37] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I_CLOCK | input | CELL[26].IMUX_IMUX_DELAY[43] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2IOB_PUDC_B | input | CELL[26].IMUX_IMUX_DELAY[26] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_LOCK | output | CELL[28].OUT_BEL[3] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O0 | output | CELL[28].OUT_BEL[24] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O1 | output | CELL[28].OUT_BEL[23] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O10 | output | CELL[28].OUT_BEL[14] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O11 | output | CELL[28].OUT_BEL[13] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O12 | output | CELL[28].OUT_BEL[12] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O13 | output | CELL[28].OUT_BEL[11] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O14 | output | CELL[28].OUT_BEL[10] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O15 | output | CELL[28].OUT_BEL[9] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O16 | output | CELL[28].OUT_BEL[8] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O17 | output | CELL[28].OUT_BEL[7] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O18 | output | CELL[28].OUT_BEL[6] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O19 | output | CELL[28].OUT_BEL[5] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O2 | output | CELL[28].OUT_BEL[22] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O20 | output | CELL[28].OUT_BEL[4] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O21 | output | CELL[27].OUT_BEL[29] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O22 | output | CELL[27].OUT_BEL[31] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O23 | output | CELL[27].OUT_BEL[30] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O3 | output | CELL[28].OUT_BEL[21] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O4 | output | CELL[28].OUT_BEL[20] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O5 | output | CELL[28].OUT_BEL[19] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O6 | output | CELL[28].OUT_BEL[18] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O7 | output | CELL[28].OUT_BEL[17] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O8 | output | CELL[28].OUT_BEL[16] |
| IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O9 | output | CELL[28].OUT_BEL[15] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG0 | input | CELL[2].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG1 | input | CELL[39].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG10 | input | CELL[57].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG2 | input | CELL[52].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG3 | input | CELL[58].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG4 | input | CELL[30].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG5 | input | CELL[49].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG6 | input | CELL[40].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG7 | input | CELL[33].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG8 | input | CELL[13].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG9 | input | CELL[24].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CLK_B | input | CELL[40].IMUX_BYP_DELAY[7] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN0 | input | CELL[13].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN1 | input | CELL[19].IMUX_BYP_DELAY[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN10 | input | CELL[19].IMUX_BYP_DELAY[14] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN2 | input | CELL[45].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN3 | input | CELL[15].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN4 | input | CELL[41].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN5 | input | CELL[42].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN6 | input | CELL[44].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN7 | input | CELL[19].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN8 | input | CELL[48].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN9 | input | CELL[30].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN0 | input | CELL[59].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN1 | input | CELL[34].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN10 | input | CELL[8].IMUX_BYP_DELAY[12] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN2 | input | CELL[8].IMUX_BYP_DELAY[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN3 | input | CELL[28].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN4 | input | CELL[44].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN5 | input | CELL[37].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN6 | input | CELL[43].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN7 | input | CELL[11].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN8 | input | CELL[52].IMUX_BYP_DELAY[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN9 | input | CELL[52].IMUX_BYP_DELAY[13] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_EDT_UPDT_B | input | CELL[45].IMUX_BYP_DELAY[12] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_EN_B | input | CELL[55].IMUX_BYP_DELAY[7] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN0 | input | CELL[52].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN1 | input | CELL[57].IMUX_BYP_DELAY[7] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN10 | input | CELL[13].IMUX_BYP_DELAY[13] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN2 | input | CELL[22].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN3 | input | CELL[6].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN4 | input | CELL[13].IMUX_BYP_DELAY[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN5 | input | CELL[21].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN6 | input | CELL[7].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN7 | input | CELL[55].IMUX_BYP_DELAY[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN8 | input | CELL[45].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN9 | input | CELL[26].IMUX_BYP_DELAY[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_MODE_RST_B | input | CELL[39].IMUX_BYP_DELAY[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION0 | output | CELL[34].OUT_BEL[12] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION1 | output | CELL[34].OUT_BEL[29] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION10 | output | CELL[34].OUT_BEL[14] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION11 | output | CELL[34].OUT_BEL[25] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION2 | output | CELL[34].OUT_BEL[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION3 | output | CELL[34].OUT_BEL[28] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION4 | output | CELL[34].OUT_BEL[7] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION5 | output | CELL[34].OUT_BEL[27] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION6 | output | CELL[34].OUT_BEL[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION7 | output | CELL[34].OUT_BEL[30] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION8 | output | CELL[34].OUT_BEL[13] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION9 | output | CELL[34].OUT_BEL[26] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT0 | output | CELL[34].OUT_BEL[4] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT1 | output | CELL[35].OUT_BEL[11] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT10 | output | CELL[34].OUT_BEL[11] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT2 | output | CELL[33].OUT_BEL[28] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT3 | output | CELL[35].OUT_BEL[12] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT4 | output | CELL[34].OUT_BEL[3] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT5 | output | CELL[35].OUT_BEL[13] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT6 | output | CELL[33].OUT_BEL[29] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT7 | output | CELL[35].OUT_BEL[14] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT8 | output | CELL[34].OUT_BEL[21] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT9 | output | CELL[35].OUT_BEL[15] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT0 | output | CELL[34].OUT_BEL[15] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT1 | output | CELL[34].OUT_BEL[24] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT10 | output | CELL[33].OUT_BEL[30] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT2 | output | CELL[34].OUT_BEL[16] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT3 | output | CELL[34].OUT_BEL[23] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT4 | output | CELL[34].OUT_BEL[20] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT5 | output | CELL[34].OUT_BEL[31] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT6 | output | CELL[34].OUT_BEL[22] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT7 | output | CELL[35].OUT_BEL[3] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT8 | output | CELL[34].OUT_BEL[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT9 | output | CELL[35].OUT_BEL[4] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT0 | output | CELL[35].OUT_BEL[5] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT1 | output | CELL[34].OUT_BEL[17] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT10 | output | CELL[35].OUT_BEL[10] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT2 | output | CELL[35].OUT_BEL[6] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT3 | output | CELL[34].OUT_BEL[19] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT4 | output | CELL[35].OUT_BEL[7] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT5 | output | CELL[34].OUT_BEL[18] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT6 | output | CELL[35].OUT_BEL[8] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT7 | output | CELL[34].OUT_BEL[5] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT8 | output | CELL[35].OUT_BEL[9] |
| IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT9 | output | CELL[34].OUT_BEL[10] |
| IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK0 | output | CELL[0].OUT_BEL[10] |
| IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK10 | output | CELL[0].OUT_BEL[9] |
| IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK9 | output | CELL[0].OUT_BEL[8] |
| IJTAG_RESET_TAP | input | CELL[34].IMUX_IMUX_DELAY[28] |
| IJTAG_RESET_TAP_O | output | CELL[33].OUT_BEL[18] |
| IJTAG_TDI_EXT | input | CELL[34].IMUX_IMUX_DELAY[9] |
| IJTAG_TDI_RETURN_EXT | input | CELL[34].IMUX_IMUX_DELAY[34] |
| IJTAG_TDO_OABUT | output | CELL[33].OUT_BEL[26] |
| IJTAG_TDO_RETURN_EXT | output | CELL[33].OUT_BEL[27] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[46].OUT_BEL[26] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[46].OUT_BEL[25] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[46].OUT_BEL[16] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[46].OUT_BEL[15] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[46].OUT_BEL[14] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[46].OUT_BEL[13] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[46].OUT_BEL[12] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[46].OUT_BEL[11] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[46].OUT_BEL[24] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[46].OUT_BEL[23] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[46].OUT_BEL[22] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[46].OUT_BEL[21] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[46].OUT_BEL[20] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[46].OUT_BEL[19] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[46].OUT_BEL[18] |
| MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[46].OUT_BEL[17] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[47].OUT_BEL[13] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[47].OUT_BEL[12] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[47].OUT_BEL[11] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[47].OUT_BEL[10] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[47].OUT_BEL[9] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[47].OUT_BEL[8] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[47].OUT_BEL[7] |
| MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[47].OUT_BEL[6] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[46].OUT_BEL[10] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[46].OUT_BEL[9] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[45].OUT_BEL[29] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[45].OUT_BEL[28] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[45].OUT_BEL[27] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[45].OUT_BEL[26] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[45].OUT_BEL[25] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[45].OUT_BEL[24] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[46].OUT_BEL[8] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[46].OUT_BEL[7] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[46].OUT_BEL[6] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[46].OUT_BEL[5] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[46].OUT_BEL[4] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[46].OUT_BEL[3] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[45].OUT_BEL[31] |
| MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[45].OUT_BEL[30] |
| MAXI_DCAWBURST_1_0_NIB2_53_52_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[47].OUT_BEL[19] |
| MAXI_DCAWBURST_1_0_NIB2_53_52_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[47].OUT_BEL[18] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[47].OUT_BEL[5] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[47].OUT_BEL[4] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[47].OUT_BEL[3] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[46].OUT_BEL[31] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[46].OUT_BEL[30] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[46].OUT_BEL[29] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[46].OUT_BEL[28] |
| MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[46].OUT_BEL[27] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[42].IMUX_IMUX_DELAY[3] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[42].IMUX_IMUX_DELAY[21] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[41].IMUX_IMUX_DELAY[47] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[41].IMUX_IMUX_DELAY[46] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[41].IMUX_IMUX_DELAY[15] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[41].IMUX_IMUX_DELAY[45] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[41].IMUX_IMUX_DELAY[44] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[41].IMUX_IMUX_DELAY[14] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[41].IMUX_IMUX_DELAY[43] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[41].IMUX_IMUX_DELAY[42] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[41].IMUX_IMUX_DELAY[13] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[41].IMUX_IMUX_DELAY[41] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[42].IMUX_IMUX_DELAY[20] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[41].IMUX_IMUX_DELAY[40] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[41].IMUX_IMUX_DELAY[12] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN22 | input | CELL[41].IMUX_IMUX_DELAY[39] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN23 | input | CELL[41].IMUX_IMUX_DELAY[38] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN24 | input | CELL[41].IMUX_IMUX_DELAY[11] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN25 | input | CELL[41].IMUX_IMUX_DELAY[37] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN26 | input | CELL[41].IMUX_IMUX_DELAY[36] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN27 | input | CELL[41].IMUX_IMUX_DELAY[10] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN28 | input | CELL[41].IMUX_IMUX_DELAY[35] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN29 | input | CELL[41].IMUX_IMUX_DELAY[34] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[42].IMUX_IMUX_DELAY[2] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN30 | input | CELL[41].IMUX_IMUX_DELAY[9] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN31 | input | CELL[41].IMUX_IMUX_DELAY[33] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[42].IMUX_IMUX_DELAY[19] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[42].IMUX_IMUX_DELAY[18] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[42].IMUX_IMUX_DELAY[1] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[42].IMUX_IMUX_DELAY[17] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[42].IMUX_IMUX_DELAY[16] |
| MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[42].IMUX_IMUX_DELAY[0] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[42].OUT_BEL[26] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[42].OUT_BEL[25] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[42].OUT_BEL[16] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[42].OUT_BEL[15] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[42].OUT_BEL[14] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[42].OUT_BEL[13] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[42].OUT_BEL[12] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[42].OUT_BEL[11] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT16 | output | CELL[42].OUT_BEL[10] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT17 | output | CELL[42].OUT_BEL[9] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT18 | output | CELL[42].OUT_BEL[8] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT19 | output | CELL[42].OUT_BEL[7] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[42].OUT_BEL[24] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT20 | output | CELL[42].OUT_BEL[6] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT21 | output | CELL[42].OUT_BEL[5] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT22 | output | CELL[42].OUT_BEL[4] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT23 | output | CELL[42].OUT_BEL[3] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT24 | output | CELL[42].OUT_BEL[2] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT25 | output | CELL[42].OUT_BEL[1] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT26 | output | CELL[42].OUT_BEL[0] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT27 | output | CELL[41].OUT_BEL[31] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT28 | output | CELL[41].OUT_BEL[30] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT29 | output | CELL[41].OUT_BEL[29] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[42].OUT_BEL[23] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT30 | output | CELL[41].OUT_BEL[28] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT31 | output | CELL[41].OUT_BEL[27] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[42].OUT_BEL[22] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[42].OUT_BEL[21] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[42].OUT_BEL[20] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[42].OUT_BEL[19] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[42].OUT_BEL[18] |
| MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[42].OUT_BEL[17] |
| MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[47].OUT_BEL[17] |
| MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[47].OUT_BEL[16] |
| MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[47].OUT_BEL[15] |
| MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[47].OUT_BEL[14] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[43].OUT_BEL[12] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[43].OUT_BEL[11] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT10 | output | CELL[43].OUT_BEL[2] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT11 | output | CELL[42].OUT_BEL[31] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT12 | output | CELL[42].OUT_BEL[30] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT13 | output | CELL[42].OUT_BEL[29] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT14 | output | CELL[42].OUT_BEL[28] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT15 | output | CELL[42].OUT_BEL[27] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[43].OUT_BEL[10] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT3 | output | CELL[43].OUT_BEL[9] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT4 | output | CELL[43].OUT_BEL[8] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT5 | output | CELL[43].OUT_BEL[7] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT6 | output | CELL[43].OUT_BEL[6] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT7 | output | CELL[43].OUT_BEL[5] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT8 | output | CELL[43].OUT_BEL[4] |
| MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT9 | output | CELL[43].OUT_BEL[3] |
| MAXI_ICARBURST_1_0_NIB3_52_51_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[43].OUT_BEL[17] |
| MAXI_ICARBURST_1_0_NIB3_52_51_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[43].OUT_BEL[16] |
| MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT0 | output | CELL[43].OUT_BEL[15] |
| MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT1 | output | CELL[43].OUT_BEL[14] |
| MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT2 | output | CELL[43].OUT_BEL[13] |
| MAXI_ICARVALID_NIB3_53_PHY2CLB_IODELAY_CNTVALUEOUT | output | CELL[43].OUT_BEL[18] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN0 | input | CELL[42].IMUX_IMUX_DELAY[36] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN1 | input | CELL[42].IMUX_IMUX_DELAY[10] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN10 | input | CELL[42].IMUX_IMUX_DELAY[7] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN11 | input | CELL[42].IMUX_IMUX_DELAY[29] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN12 | input | CELL[42].IMUX_IMUX_DELAY[28] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN13 | input | CELL[42].IMUX_IMUX_DELAY[6] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN14 | input | CELL[42].IMUX_IMUX_DELAY[27] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN15 | input | CELL[42].IMUX_IMUX_DELAY[26] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN16 | input | CELL[42].IMUX_IMUX_DELAY[5] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN17 | input | CELL[42].IMUX_IMUX_DELAY[25] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN18 | input | CELL[42].IMUX_IMUX_DELAY[24] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN19 | input | CELL[42].IMUX_IMUX_DELAY[4] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN2 | input | CELL[42].IMUX_IMUX_DELAY[35] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN20 | input | CELL[42].IMUX_IMUX_DELAY[23] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN21 | input | CELL[42].IMUX_IMUX_DELAY[22] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN3 | input | CELL[42].IMUX_IMUX_DELAY[34] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN4 | input | CELL[42].IMUX_IMUX_DELAY[9] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN5 | input | CELL[42].IMUX_IMUX_DELAY[33] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN6 | input | CELL[42].IMUX_IMUX_DELAY[32] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN7 | input | CELL[42].IMUX_IMUX_DELAY[8] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN8 | input | CELL[42].IMUX_IMUX_DELAY[31] |
| MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN9 | input | CELL[42].IMUX_IMUX_DELAY[30] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC0 | input | CELL[42].IMUX_IMUX_DELAY[40] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC1 | input | CELL[42].IMUX_IMUX_DELAY[12] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC2 | input | CELL[42].IMUX_IMUX_DELAY[39] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC3 | input | CELL[42].IMUX_IMUX_DELAY[38] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC4 | input | CELL[42].IMUX_IMUX_DELAY[11] |
| MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC5 | input | CELL[42].IMUX_IMUX_DELAY[37] |
| MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_0 | input | CELL[42].IMUX_IMUX_DELAY[42] |
| MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_1 | input | CELL[42].IMUX_IMUX_DELAY[13] |
| MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_2 | input | CELL[42].IMUX_IMUX_DELAY[41] |
| MAXI_ICRDATA_31_NIB3_CLB2RIU_WR_EN | input | CELL[42].IMUX_IMUX_DELAY[43] |
| SELECT_DR | input | CELL[34].IMUX_IMUX_DELAY[31] |
| SELECT_DR_O | output | CELL[33].OUT_BEL[22] |
| TEST_CLK_OUT0 | output | CELL[0].OUT_BEL[7] |
| TEST_CLK_OUT1 | output | CELL[0].OUT_BEL[6] |
Bel XP5IOB[0]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[1]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[2]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[3]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[4]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[5]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[6]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[7]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[8]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[9]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[10]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[11]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[12]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[13]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[14]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[15]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[16]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[17]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[18]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[19]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[20]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[21]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[22]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[23]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[24]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[25]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[26]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[27]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[28]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[29]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[30]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[31]
| Pin | Direction | Wires |
|---|
Bel XP5IOB[32]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[0]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[1]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[2]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[3]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[4]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[5]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[6]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[7]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[8]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[9]
| Pin | Direction | Wires |
|---|
Bel XP5IO_VREF[10]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[0]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[1]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[2]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[3]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[4]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[5]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[6]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[7]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[8]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[9]
| Pin | Direction | Wires |
|---|
Bel X5PHY_LS[10]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[0]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[1]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[2]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[3]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[4]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[5]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[6]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[7]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[8]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[9]
| Pin | Direction | Wires |
|---|
Bel X5PHY_HS[10]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[0]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[1]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[2]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[3]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[4]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[5]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[6]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[7]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[8]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[9]
| Pin | Direction | Wires |
|---|
Bel X5PHY_PLL_SELECT[10]
| Pin | Direction | Wires |
|---|
Bel XP5PIO_CMU_ANA
| Pin | Direction | Wires |
|---|
Bel XP5PIO_CMU_DIG_TOP
| Pin | Direction | Wires |
|---|
Bel ABUS_SWITCH_XP5IO[0]
| Pin | Direction | Wires |
|---|---|---|
| TEST_ANALOGBUS_SEL_B | input | CELL[33].IMUX_IMUX_DELAY[0] |
Bel ABUS_SWITCH_XP5IO[1]
| Pin | Direction | Wires |
|---|---|---|
| TEST_ANALOGBUS_SEL_B | input | CELL[34].IMUX_IMUX_DELAY[0] |
Bel VCC_XP5IO
| Pin | Direction | Wires |
|---|
Bel wires
| Wire | Pins |
|---|---|
| CELL[0].OUT_BEL[0] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_0 |
| CELL[0].OUT_BEL[1] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_1 |
| CELL[0].OUT_BEL[2] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_2 |
| CELL[0].OUT_BEL[3] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_3 |
| CELL[0].OUT_BEL[4] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_4 |
| CELL[0].OUT_BEL[5] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE0_5 |
| CELL[0].OUT_BEL[6] | LPDDRMC.TEST_CLK_OUT1 |
| CELL[0].OUT_BEL[7] | LPDDRMC.TEST_CLK_OUT0 |
| CELL[0].OUT_BEL[8] | LPDDRMC.IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK9 |
| CELL[0].OUT_BEL[9] | LPDDRMC.IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK10 |
| CELL[0].OUT_BEL[10] | LPDDRMC.IF_XPIO_MMCM_DMC_OABUT_XPIO_PHY_CLK0 |
| CELL[0].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_7 |
| CELL[0].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_5 |
| CELL[0].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_3 |
| CELL[0].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_1 |
| CELL[0].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_0 |
| CELL[0].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_2 |
| CELL[0].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_4 |
| CELL[0].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_215_208_NIB9_PHY2CLB_RD_DQ0_6 |
| CELL[0].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_7 |
| CELL[0].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_5 |
| CELL[0].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_3 |
| CELL[0].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_1 |
| CELL[0].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_0 |
| CELL[0].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_2 |
| CELL[0].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_4 |
| CELL[0].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_223_216_NIB9_PHY2CLB_RD_DQ1_6 |
| CELL[0].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_7 |
| CELL[0].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_5 |
| CELL[0].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_3 |
| CELL[0].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_1 |
| CELL[0].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_0 |
| CELL[0].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_7 |
| CELL[0].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_1 |
| CELL[0].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_4 |
| CELL[0].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_5 |
| CELL[0].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_0 |
| CELL[0].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_6 |
| CELL[0].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_5 |
| CELL[0].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_0 |
| CELL[0].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_6 |
| CELL[0].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_3 |
| CELL[0].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_2 |
| CELL[0].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_7 |
| CELL[0].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_1 |
| CELL[0].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_4 |
| CELL[0].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_5 |
| CELL[0].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_3 |
| CELL[0].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_0 |
| CELL[0].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_2 |
| CELL[0].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WDATA_215_208_NIB9_CLB2PHY_WR_DQ0_6 |
| CELL[0].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_7 |
| CELL[0].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_3 |
| CELL[0].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_1 |
| CELL[0].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_2 |
| CELL[0].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_WDATA_223_216_NIB9_CLB2PHY_WR_DQ1_4 |
| CELL[0].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2RIU_NIBBLE_SEL |
| CELL[0].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_7 |
| CELL[0].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_3 |
| CELL[0].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_1 |
| CELL[0].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_2 |
| CELL[0].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_WDATA_231_224_NIB9_CLB2PHY_WR_DQ2_4 |
| CELL[0].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_7 |
| CELL[0].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_5 |
| CELL[0].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_1 |
| CELL[0].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_0 |
| CELL[0].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_4 |
| CELL[0].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_WDATA_239_232_NIB9_CLB2PHY_WR_DQ3_6 |
| CELL[0].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_5 |
| CELL[0].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_3 |
| CELL[0].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_0 |
| CELL[0].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_2 |
| CELL[0].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_247_240_NIB9_CLB2PHY_WR_DQ4_6 |
| CELL[0].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_7 |
| CELL[1].OUT_BEL[0] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_2 |
| CELL[1].OUT_BEL[1] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_4 |
| CELL[1].OUT_BEL[2] | LPDDRMC.AXI1_RDATA_231_224_NIB9_PHY2CLB_RD_DQ2_6 |
| CELL[1].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_7 |
| CELL[1].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_5 |
| CELL[1].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_3 |
| CELL[1].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_1 |
| CELL[1].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_0 |
| CELL[1].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_2 |
| CELL[1].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_4 |
| CELL[1].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_239_232_NIB9_PHY2CLB_RD_DQ3_6 |
| CELL[1].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_7 |
| CELL[1].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_5 |
| CELL[1].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_3 |
| CELL[1].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_1 |
| CELL[1].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_0 |
| CELL[1].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_2 |
| CELL[1].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_4 |
| CELL[1].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_247_240_NIB9_PHY2CLB_RD_DQ4_6 |
| CELL[1].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_7 |
| CELL[1].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_5 |
| CELL[1].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_3 |
| CELL[1].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_1 |
| CELL[1].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_0 |
| CELL[1].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_2 |
| CELL[1].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_4 |
| CELL[1].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_255_248_NIB9_PHY2CLB_RD_DQ5_6 |
| CELL[1].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_FIFO_EMPTY |
| CELL[1].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_FIXDLY_RDY |
| CELL[1].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_PHY_RDY |
| CELL[1].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_GT_STATUS |
| CELL[1].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_MASTER_PD |
| CELL[1].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2MC_DIV_CLK |
| CELL[1].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_CTRL_CLK |
| CELL[1].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_FIFO_CLK |
| CELL[1].IMUX_BYP_DELAY[10] | LPDDRMC.FABRIC_APB_RST_N |
| CELL[1].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_1 |
| CELL[1].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_4 |
| CELL[1].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST5 |
| CELL[1].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST2 |
| CELL[1].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST5 |
| CELL[1].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST2 |
| CELL[1].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[1].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[1].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE5 |
| CELL[1].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE2 |
| CELL[1].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE5 |
| CELL[1].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE2 |
| CELL[1].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC5 |
| CELL[1].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA14 |
| CELL[1].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA11 |
| CELL[1].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_5 |
| CELL[1].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_3 |
| CELL[1].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_0 |
| CELL[1].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_2 |
| CELL[1].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_255_248_NIB9_CLB2PHY_WR_DQ5_6 |
| CELL[1].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RST |
| CELL[1].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST4 |
| CELL[1].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST3 |
| CELL[1].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST1 |
| CELL[1].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_TXBIT_RST0 |
| CELL[1].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST4 |
| CELL[1].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST3 |
| CELL[1].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST1 |
| CELL[1].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_RXBIT_RST0 |
| CELL[1].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[1].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[1].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[1].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[1].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE4 |
| CELL[1].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE3 |
| CELL[1].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE1 |
| CELL[1].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IBUF_DISABLE0 |
| CELL[1].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE4 |
| CELL[1].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE3 |
| CELL[1].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE1 |
| CELL[1].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CE0 |
| CELL[1].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC4 |
| CELL[1].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA15 |
| CELL[1].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA13 |
| CELL[1].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA12 |
| CELL[1].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA10 |
| CELL[1].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA9 |
| CELL[2].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[2].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[2].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[2].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[2].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[2].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[2].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[2].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[2].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[2].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[2].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[2].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[2].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[2].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[2].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[2].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[2].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[2].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[2].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[2].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[2].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[2].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[2].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[2].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[2].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[2].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[2].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[2].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[2].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[2].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[2].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT12 |
| CELL[2].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG0 |
| CELL[2].IMUX_BYP_DELAY[11] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT5 |
| CELL[2].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA8 |
| CELL[2].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA5 |
| CELL[2].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA2 |
| CELL[2].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR7 |
| CELL[2].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR4 |
| CELL[2].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR1 |
| CELL[2].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN2 |
| CELL[2].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT5 |
| CELL[2].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT2 |
| CELL[2].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_AWADDR_43_NIB9_CLB2PHY_FIFO_RDEN |
| CELL[2].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN1 |
| CELL[2].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL4 |
| CELL[2].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL1 |
| CELL[2].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC3 |
| CELL[2].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC0 |
| CELL[2].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD3 |
| CELL[2].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA7 |
| CELL[2].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA6 |
| CELL[2].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA4 |
| CELL[2].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA3 |
| CELL[2].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA1 |
| CELL[2].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WDATA_207_192_NIB9_CLB2RIU_WR_DATA0 |
| CELL[2].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR6 |
| CELL[2].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR5 |
| CELL[2].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR3 |
| CELL[2].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR2 |
| CELL[2].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WSTRB_31_24_NIB9_CLB2RIU_ADDR0 |
| CELL[2].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN3 |
| CELL[2].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN1 |
| CELL[2].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_AWADDR_36_33_NIB9_CLB2PHY_WREN0 |
| CELL[2].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT4 |
| CELL[2].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT3 |
| CELL[2].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT1 |
| CELL[2].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_AWADDR_42_37_NIB9_CLB2PHY_T_TXBIT0 |
| CELL[2].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN3 |
| CELL[2].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN2 |
| CELL[2].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_ARADDR_36_33_NIB9_CLB2PHY_RDEN0 |
| CELL[2].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL5 |
| CELL[2].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL3 |
| CELL[2].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL2 |
| CELL[2].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_ARADDR_42_37_NIB9_CLB2PHY_IODELAY_SEL0 |
| CELL[2].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_ARADDR_43_NIB9_CLB2PHY_DLYCTL_EN_VTC |
| CELL[2].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC2 |
| CELL[2].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_INC1 |
| CELL[2].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD5 |
| CELL[2].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD4 |
| CELL[2].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD2 |
| CELL[2].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD1 |
| CELL[3].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[3].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[3].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[3].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[3].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[3].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[3].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[3].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[3].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[3].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[3].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[3].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[3].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[3].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[3].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[3].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[3].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[3].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[3].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[3].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[3].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[3].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[3].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[3].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[3].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT5 |
| CELL[3].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT4 |
| CELL[3].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT3 |
| CELL[3].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT2 |
| CELL[3].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT1 |
| CELL[3].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_EN_N_EXT |
| CELL[3].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_LD0 |
| CELL[3].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[3].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[3].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[3].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[3].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[3].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[3].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[3].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[3].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[3].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[3].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[3].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[3].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[3].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[3].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[3].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[3].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[3].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[3].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[3].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[3].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[3].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[3].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[3].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[3].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[3].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[3].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[3].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[3].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[3].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[3].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[3].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[3].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[3].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[3].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[3].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[3].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[3].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[3].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[3].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[3].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[3].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[3].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[3].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[3].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[3].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[3].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[4].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_IOB2CLB_DFT0 |
| CELL[4].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_2 |
| CELL[4].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_1 |
| CELL[4].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_0_0 |
| CELL[4].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_2 |
| CELL[4].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_1 |
| CELL[4].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_PHY2CLB_LP_I_1_0 |
| CELL[4].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_RIU2CLB_VALID |
| CELL[4].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA15 |
| CELL[4].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA14 |
| CELL[4].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA13 |
| CELL[4].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA12 |
| CELL[4].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA11 |
| CELL[4].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA10 |
| CELL[4].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA9 |
| CELL[4].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA8 |
| CELL[4].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA7 |
| CELL[4].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA6 |
| CELL[4].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA5 |
| CELL[4].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA4 |
| CELL[4].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA3 |
| CELL[4].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA2 |
| CELL[4].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA1 |
| CELL[4].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_207_192_NIB9_RIU2CLB_RD_DATA0 |
| CELL[4].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_FIFO_EMPTY |
| CELL[4].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_FIXDLY_RDY |
| CELL[4].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_PHY_RDY |
| CELL[4].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_GT_STATUS |
| CELL[4].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_MASTER_PD |
| CELL[4].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[4].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[4].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[4].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[4].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[4].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[4].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[4].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[4].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[4].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_0 |
| CELL[4].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[4].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[4].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN3 |
| CELL[4].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN0 |
| CELL[4].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA14 |
| CELL[4].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA11 |
| CELL[4].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[4].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[4].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[4].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[4].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[4].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[4].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[4].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[4].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[4].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[4].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[4].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[4].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[4].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[4].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[4].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[4].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_2 |
| CELL[4].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_PD_EN_1_1 |
| CELL[4].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[4].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[4].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[4].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[4].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN5 |
| CELL[4].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN4 |
| CELL[4].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN2 |
| CELL[4].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2PHY_KEEPER_EN1 |
| CELL[4].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P9_CLB2RIU_WR_EN |
| CELL[4].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA15 |
| CELL[4].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA13 |
| CELL[4].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA12 |
| CELL[4].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA10 |
| CELL[4].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA9 |
| CELL[5].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[5].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[5].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[5].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[5].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[5].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[5].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[5].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[5].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[5].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[5].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[5].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[5].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[5].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[5].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[5].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[5].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[5].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[5].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[5].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[5].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[5].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[5].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[5].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[5].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[5].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[5].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[5].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[5].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[5].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT8 |
| CELL[5].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA8 |
| CELL[5].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA5 |
| CELL[5].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA2 |
| CELL[5].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR7 |
| CELL[5].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR4 |
| CELL[5].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR1 |
| CELL[5].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN2 |
| CELL[5].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT5 |
| CELL[5].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT2 |
| CELL[5].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_AWADDR_32_NIB8_CLB2PHY_FIFO_RDEN |
| CELL[5].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN1 |
| CELL[5].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL4 |
| CELL[5].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL1 |
| CELL[5].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2RIU_NIBBLE_SEL |
| CELL[5].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST4 |
| CELL[5].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST1 |
| CELL[5].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA7 |
| CELL[5].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA6 |
| CELL[5].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA4 |
| CELL[5].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA3 |
| CELL[5].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA1 |
| CELL[5].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WDATA_143_128_NIB8_CLB2RIU_WR_DATA0 |
| CELL[5].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR6 |
| CELL[5].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR5 |
| CELL[5].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR3 |
| CELL[5].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR2 |
| CELL[5].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WSTRB_23_16_NIB8_CLB2RIU_ADDR0 |
| CELL[5].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN3 |
| CELL[5].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN1 |
| CELL[5].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_AWADDR_25_22_NIB8_CLB2PHY_WREN0 |
| CELL[5].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT4 |
| CELL[5].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT3 |
| CELL[5].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT1 |
| CELL[5].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_AWADDR_31_26_NIB8_CLB2PHY_T_TXBIT0 |
| CELL[5].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN3 |
| CELL[5].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN2 |
| CELL[5].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_ARADDR_25_22_NIB8_CLB2PHY_RDEN0 |
| CELL[5].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL5 |
| CELL[5].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL3 |
| CELL[5].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL2 |
| CELL[5].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_ARADDR_31_26_NIB8_CLB2PHY_IODELAY_SEL0 |
| CELL[5].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_ARADDR_32_NIB8_CLB2PHY_DLYCTL_EN_VTC |
| CELL[5].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RST |
| CELL[5].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST5 |
| CELL[5].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST3 |
| CELL[5].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST2 |
| CELL[5].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_TXBIT_RST0 |
| CELL[5].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST5 |
| CELL[6].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[6].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[6].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[6].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[6].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[6].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[6].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[6].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[6].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[6].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[6].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[6].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[6].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[6].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[6].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[6].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[6].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[6].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[6].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[6].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[6].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[6].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[6].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[6].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[6].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[6].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT5 |
| CELL[6].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT4 |
| CELL[6].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT3 |
| CELL[6].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT2 |
| CELL[6].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_FIFO_CLK |
| CELL[6].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2MC_DIV_CLK |
| CELL[6].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_CTRL_CLK |
| CELL[6].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CNTRL_CHNL_IN_EXT_DDRMC0 |
| CELL[6].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN3 |
| CELL[6].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST2 |
| CELL[6].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[6].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[6].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE5 |
| CELL[6].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE2 |
| CELL[6].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE5 |
| CELL[6].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE2 |
| CELL[6].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC5 |
| CELL[6].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC2 |
| CELL[6].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD5 |
| CELL[6].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD2 |
| CELL[6].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[6].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[6].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[6].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[6].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST4 |
| CELL[6].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST3 |
| CELL[6].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST1 |
| CELL[6].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_RXBIT_RST0 |
| CELL[6].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[6].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[6].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[6].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[6].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE4 |
| CELL[6].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE3 |
| CELL[6].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE1 |
| CELL[6].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IBUF_DISABLE0 |
| CELL[6].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE4 |
| CELL[6].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE3 |
| CELL[6].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE1 |
| CELL[6].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CE0 |
| CELL[6].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC4 |
| CELL[6].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC3 |
| CELL[6].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC1 |
| CELL[6].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_INC0 |
| CELL[6].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD4 |
| CELL[6].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD3 |
| CELL[6].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD1 |
| CELL[6].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_LD0 |
| CELL[6].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[6].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[6].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[6].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[6].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[6].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[6].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[6].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[7].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT1 |
| CELL[7].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_IOB2CLB_DFT0 |
| CELL[7].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_2 |
| CELL[7].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_1 |
| CELL[7].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_0_0 |
| CELL[7].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_2 |
| CELL[7].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_1 |
| CELL[7].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P8_PHY2CLB_LP_I_1_0 |
| CELL[7].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_RIU2CLB_VALID |
| CELL[7].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA15 |
| CELL[7].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA14 |
| CELL[7].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA13 |
| CELL[7].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA12 |
| CELL[7].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA11 |
| CELL[7].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA10 |
| CELL[7].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA9 |
| CELL[7].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA8 |
| CELL[7].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA7 |
| CELL[7].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA6 |
| CELL[7].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA5 |
| CELL[7].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA4 |
| CELL[7].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA3 |
| CELL[7].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA2 |
| CELL[7].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA1 |
| CELL[7].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_143_128_NIB8_RIU2CLB_RD_DATA0 |
| CELL[7].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_6 |
| CELL[7].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_4 |
| CELL[7].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_2 |
| CELL[7].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_0 |
| CELL[7].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN6 |
| CELL[7].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[7].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[7].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[7].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[7].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[7].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[7].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[7].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[7].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_2 |
| CELL[7].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_3 |
| CELL[7].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[7].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[7].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_4 |
| CELL[7].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_1 |
| CELL[7].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_7 |
| CELL[7].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[7].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[7].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[7].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[7].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[7].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[7].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[7].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[7].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[7].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[7].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[7].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[7].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[7].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[7].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[7].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[7].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_6 |
| CELL[7].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_4 |
| CELL[7].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_0 |
| CELL[7].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_1 |
| CELL[7].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_5 |
| CELL[7].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_WDATA_191_184_NIB8_CLB2PHY_WR_DQ5_7 |
| CELL[7].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[7].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[7].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[7].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_6 |
| CELL[7].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_2 |
| CELL[7].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_0 |
| CELL[7].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_3 |
| CELL[7].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_183_176_NIB8_CLB2PHY_WR_DQ4_5 |
| CELL[7].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_6 |
| CELL[7].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_4 |
| CELL[8].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_1 |
| CELL[8].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_3 |
| CELL[8].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_5 |
| CELL[8].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_191_184_NIB8_PHY2CLB_RD_DQ5_7 |
| CELL[8].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_6 |
| CELL[8].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_4 |
| CELL[8].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_2 |
| CELL[8].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_0 |
| CELL[8].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_1 |
| CELL[8].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_3 |
| CELL[8].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_5 |
| CELL[8].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_183_176_NIB8_PHY2CLB_RD_DQ4_7 |
| CELL[8].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_6 |
| CELL[8].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_4 |
| CELL[8].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_2 |
| CELL[8].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_0 |
| CELL[8].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_1 |
| CELL[8].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_3 |
| CELL[8].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_5 |
| CELL[8].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_175_168_NIB8_PHY2CLB_RD_DQ3_7 |
| CELL[8].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_6 |
| CELL[8].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_4 |
| CELL[8].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_2 |
| CELL[8].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_0 |
| CELL[8].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_1 |
| CELL[8].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_3 |
| CELL[8].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_5 |
| CELL[8].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_167_160_NIB8_PHY2CLB_RD_DQ2_7 |
| CELL[8].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_6 |
| CELL[8].IMUX_BYP_DELAY[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN2 |
| CELL[8].IMUX_BYP_DELAY[12] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN10 |
| CELL[8].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_1 |
| CELL[8].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_7 |
| CELL[8].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[8].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[8].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_2 |
| CELL[8].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_3 |
| CELL[8].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_6 |
| CELL[8].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_0 |
| CELL[8].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_5 |
| CELL[8].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[8].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[8].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[8].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[8].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[8].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[8].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_2 |
| CELL[8].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_0 |
| CELL[8].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_3 |
| CELL[8].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_175_168_NIB8_CLB2PHY_WR_DQ3_5 |
| CELL[8].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[8].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[8].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[8].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[8].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_6 |
| CELL[8].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_4 |
| CELL[8].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_0 |
| CELL[8].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_1 |
| CELL[8].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_5 |
| CELL[8].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_WDATA_167_160_NIB8_CLB2PHY_WR_DQ2_7 |
| CELL[8].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_4 |
| CELL[8].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_2 |
| CELL[8].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_1 |
| CELL[8].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_3 |
| CELL[8].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_WDATA_159_152_NIB8_CLB2PHY_WR_DQ1_7 |
| CELL[8].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[8].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[8].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[8].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[8].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[8].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[8].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[8].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[8].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[8].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[8].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[8].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[8].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[9].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_4 |
| CELL[9].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_2 |
| CELL[9].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_0 |
| CELL[9].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_1 |
| CELL[9].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_3 |
| CELL[9].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_5 |
| CELL[9].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_159_152_NIB8_PHY2CLB_RD_DQ1_7 |
| CELL[9].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_6 |
| CELL[9].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_4 |
| CELL[9].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_2 |
| CELL[9].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_0 |
| CELL[9].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_1 |
| CELL[9].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_3 |
| CELL[9].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_5 |
| CELL[9].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_151_144_NIB8_PHY2CLB_RD_DQ0_7 |
| CELL[9].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_7 |
| CELL[9].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_5 |
| CELL[9].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_3 |
| CELL[9].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_1 |
| CELL[9].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_0 |
| CELL[9].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_2 |
| CELL[9].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_4 |
| CELL[9].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_87_80_NIB7_PHY2CLB_RD_DQ0_6 |
| CELL[9].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_7 |
| CELL[9].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_5 |
| CELL[9].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_3 |
| CELL[9].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_1 |
| CELL[9].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_0 |
| CELL[9].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_2 |
| CELL[9].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[9].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[9].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_2 |
| CELL[9].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[9].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[9].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN5 |
| CELL[9].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_4 |
| CELL[9].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_1 |
| CELL[9].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_7 |
| CELL[9].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN1 |
| CELL[9].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_7 |
| CELL[9].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_1 |
| CELL[9].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_4 |
| CELL[9].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_5 |
| CELL[9].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_0 |
| CELL[9].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_6 |
| CELL[9].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[9].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[9].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[9].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[9].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_1 |
| CELL[9].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_PD_EN_1_0 |
| CELL[9].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[9].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[9].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[9].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[9].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN4 |
| CELL[9].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_6 |
| CELL[9].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_2 |
| CELL[9].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_0 |
| CELL[9].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_3 |
| CELL[9].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_WDATA_151_144_NIB8_CLB2PHY_WR_DQ0_5 |
| CELL[9].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN3 |
| CELL[9].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN2 |
| CELL[9].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2PHY_KEEPER_EN0 |
| CELL[9].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P8_CLB2RIU_WR_EN |
| CELL[9].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_5 |
| CELL[9].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_3 |
| CELL[9].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_0 |
| CELL[9].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_2 |
| CELL[9].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_WDATA_87_80_NIB7_CLB2PHY_WR_DQ0_6 |
| CELL[9].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_7 |
| CELL[9].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_3 |
| CELL[9].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_1 |
| CELL[9].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_2 |
| CELL[9].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_95_88_NIB7_CLB2PHY_WR_DQ1_4 |
| CELL[9].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RST |
| CELL[9].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST5 |
| CELL[10].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_4 |
| CELL[10].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_95_88_NIB7_PHY2CLB_RD_DQ1_6 |
| CELL[10].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_7 |
| CELL[10].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_5 |
| CELL[10].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_3 |
| CELL[10].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_1 |
| CELL[10].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_0 |
| CELL[10].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_2 |
| CELL[10].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_4 |
| CELL[10].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_103_96_NIB7_PHY2CLB_RD_DQ2_6 |
| CELL[10].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_7 |
| CELL[10].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_5 |
| CELL[10].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_3 |
| CELL[10].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_1 |
| CELL[10].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_0 |
| CELL[10].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_2 |
| CELL[10].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_4 |
| CELL[10].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_111_104_NIB7_PHY2CLB_RD_DQ3_6 |
| CELL[10].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_7 |
| CELL[10].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_5 |
| CELL[10].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_3 |
| CELL[10].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_1 |
| CELL[10].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_0 |
| CELL[10].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_2 |
| CELL[10].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_4 |
| CELL[10].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_119_112_NIB7_PHY2CLB_RD_DQ4_6 |
| CELL[10].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_7 |
| CELL[10].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_5 |
| CELL[10].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_3 |
| CELL[10].IMUX_CTRL[0] | LPDDRMC.AXIA1_CLK |
| CELL[10].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT7 |
| CELL[10].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST2 |
| CELL[10].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST5 |
| CELL[10].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST2 |
| CELL[10].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[10].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[10].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE5 |
| CELL[10].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_3 |
| CELL[10].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_2 |
| CELL[10].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE4 |
| CELL[10].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE1 |
| CELL[10].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE4 |
| CELL[10].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE1 |
| CELL[10].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC4 |
| CELL[10].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC1 |
| CELL[10].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD4 |
| CELL[10].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST4 |
| CELL[10].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST3 |
| CELL[10].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST1 |
| CELL[10].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_TXBIT_RST0 |
| CELL[10].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST4 |
| CELL[10].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST3 |
| CELL[10].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST1 |
| CELL[10].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_RXBIT_RST0 |
| CELL[10].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[10].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[10].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[10].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[10].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_7 |
| CELL[10].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_5 |
| CELL[10].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_1 |
| CELL[10].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_0 |
| CELL[10].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_4 |
| CELL[10].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_WDATA_103_96_NIB7_CLB2PHY_WR_DQ2_6 |
| CELL[10].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE3 |
| CELL[10].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE2 |
| CELL[10].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IBUF_DISABLE0 |
| CELL[10].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE5 |
| CELL[10].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE3 |
| CELL[10].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE2 |
| CELL[10].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CE0 |
| CELL[10].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC5 |
| CELL[10].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC3 |
| CELL[10].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC2 |
| CELL[10].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_INC0 |
| CELL[10].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD5 |
| CELL[10].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD3 |
| CELL[10].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD2 |
| CELL[11].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_1 |
| CELL[11].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_0 |
| CELL[11].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_2 |
| CELL[11].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_4 |
| CELL[11].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_127_120_NIB7_PHY2CLB_RD_DQ5_6 |
| CELL[11].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_FIFO_EMPTY |
| CELL[11].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_FIXDLY_RDY |
| CELL[11].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_PHY_RDY |
| CELL[11].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_GT_STATUS |
| CELL[11].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_MASTER_PD |
| CELL[11].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[11].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[11].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[11].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[11].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[11].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[11].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[11].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[11].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[11].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[11].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[11].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[11].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[11].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[11].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[11].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[11].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[11].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[11].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[11].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_CTRL_CLK |
| CELL[11].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_FIFO_CLK |
| CELL[11].IMUX_CTRL[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2MC_DIV_CLK |
| CELL[11].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT5 |
| CELL[11].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN7 |
| CELL[11].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[11].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[11].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_7 |
| CELL[11].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_1 |
| CELL[11].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_4 |
| CELL[11].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[11].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[11].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[11].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[11].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[11].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[11].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[11].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[11].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[11].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_5 |
| CELL[11].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD1 |
| CELL[11].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_LD0 |
| CELL[11].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[11].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[11].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[11].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[11].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_5 |
| CELL[11].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_3 |
| CELL[11].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_0 |
| CELL[11].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_2 |
| CELL[11].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WDATA_111_104_NIB7_CLB2PHY_WR_DQ3_6 |
| CELL[11].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[11].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[11].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[11].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[11].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[11].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[11].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[11].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[11].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[11].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[11].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[11].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[11].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[11].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[11].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[11].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[11].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[11].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[11].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_7 |
| CELL[11].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_3 |
| CELL[11].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_1 |
| CELL[12].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[12].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[12].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[12].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[12].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[12].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[12].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[12].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[12].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[12].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[12].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[12].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[12].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[12].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[12].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[12].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[12].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[12].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[12].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[12].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[12].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[12].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[12].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[12].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[12].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[12].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[12].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[12].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[12].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[12].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_4 |
| CELL[12].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[12].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[12].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[12].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[12].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[12].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[12].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[12].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[12].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[12].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_7 |
| CELL[12].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_1 |
| CELL[12].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_4 |
| CELL[12].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[12].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[12].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_0 |
| CELL[12].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_2 |
| CELL[12].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_119_112_NIB7_CLB2PHY_WR_DQ4_6 |
| CELL[12].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[12].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[12].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[12].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[12].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[12].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[12].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[12].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[12].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[12].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[12].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[12].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[12].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[12].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[12].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[12].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[12].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[12].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[12].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[12].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_5 |
| CELL[12].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_3 |
| CELL[12].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_0 |
| CELL[12].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_2 |
| CELL[12].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_127_120_NIB7_CLB2PHY_WR_DQ5_6 |
| CELL[12].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[12].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[12].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[12].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[12].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[13].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[13].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[13].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[13].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[13].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[13].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[13].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT5 |
| CELL[13].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT4 |
| CELL[13].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT3 |
| CELL[13].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT2 |
| CELL[13].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT1 |
| CELL[13].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P7_IOB2CLB_DFT0 |
| CELL[13].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_2 |
| CELL[13].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_1 |
| CELL[13].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_0_0 |
| CELL[13].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_2 |
| CELL[13].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_1 |
| CELL[13].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_PHY2CLB_LP_I_1_0 |
| CELL[13].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_RIU2CLB_VALID |
| CELL[13].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA15 |
| CELL[13].OUT_BEL[23] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARREADY |
| CELL[13].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA14 |
| CELL[13].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA13 |
| CELL[13].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA12 |
| CELL[13].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA11 |
| CELL[13].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA10 |
| CELL[13].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA9 |
| CELL[13].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA8 |
| CELL[13].OUT_BEL[31] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWREADY |
| CELL[13].IMUX_BYP_DELAY[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN4 |
| CELL[13].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN0 |
| CELL[13].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG8 |
| CELL[13].IMUX_BYP_DELAY[13] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN10 |
| CELL[13].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[13].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_1 |
| CELL[13].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[13].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[13].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN4 |
| CELL[13].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN1 |
| CELL[13].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2RIU_NIBBLE_SEL |
| CELL[13].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA13 |
| CELL[13].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA10 |
| CELL[13].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA7 |
| CELL[13].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA4 |
| CELL[13].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA1 |
| CELL[13].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR6 |
| CELL[13].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR3 |
| CELL[13].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR0 |
| CELL[13].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[13].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[13].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[13].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_2 |
| CELL[13].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_PD_EN_1_0 |
| CELL[13].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[13].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[13].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[13].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[13].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN5 |
| CELL[13].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN3 |
| CELL[13].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN2 |
| CELL[13].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2PHY_KEEPER_EN0 |
| CELL[13].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P7_CLB2RIU_WR_EN |
| CELL[13].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA15 |
| CELL[13].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA14 |
| CELL[13].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA12 |
| CELL[13].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA11 |
| CELL[13].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA9 |
| CELL[13].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA8 |
| CELL[13].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA6 |
| CELL[13].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA5 |
| CELL[13].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA3 |
| CELL[13].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA2 |
| CELL[13].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_WDATA_79_64_NIB7_CLB2RIU_WR_DATA0 |
| CELL[13].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR7 |
| CELL[13].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR5 |
| CELL[13].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR4 |
| CELL[13].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR2 |
| CELL[13].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WSTRB_15_8_NIB7_CLB2RIU_ADDR1 |
| CELL[13].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN3 |
| CELL[13].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN2 |
| CELL[14].OUT_BEL[0] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA7 |
| CELL[14].OUT_BEL[1] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA6 |
| CELL[14].OUT_BEL[2] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA5 |
| CELL[14].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA4 |
| CELL[14].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA3 |
| CELL[14].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA2 |
| CELL[14].OUT_BEL[6] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WREADY |
| CELL[14].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA1 |
| CELL[14].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_79_64_NIB7_RIU2CLB_RD_DATA0 |
| CELL[14].OUT_BEL[9] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RVALID |
| CELL[14].OUT_BEL[10] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RLAST |
| CELL[14].OUT_BEL[11] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID7 |
| CELL[14].OUT_BEL[12] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID6 |
| CELL[14].OUT_BEL[13] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID5 |
| CELL[14].OUT_BEL[14] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID4 |
| CELL[14].OUT_BEL[15] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID3 |
| CELL[14].OUT_BEL[16] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID2 |
| CELL[14].OUT_BEL[17] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID1 |
| CELL[14].OUT_BEL[18] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RID0 |
| CELL[14].OUT_BEL[19] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RRESP1 |
| CELL[14].OUT_BEL[20] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RRESP0 |
| CELL[14].OUT_BEL[21] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RPOISON |
| CELL[14].OUT_BEL[22] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR7 |
| CELL[14].OUT_BEL[23] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR6 |
| CELL[14].OUT_BEL[24] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR5 |
| CELL[14].OUT_BEL[25] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR4 |
| CELL[14].OUT_BEL[26] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR3 |
| CELL[14].OUT_BEL[27] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR2 |
| CELL[14].OUT_BEL[28] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR1 |
| CELL[14].OUT_BEL[29] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RDATA_PAR0 |
| CELL[14].OUT_BEL[30] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BVALID |
| CELL[14].OUT_BEL[31] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID7 |
| CELL[14].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE2 |
| CELL[14].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN1 |
| CELL[14].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT4 |
| CELL[14].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT1 |
| CELL[14].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN3 |
| CELL[14].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN0 |
| CELL[14].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL3 |
| CELL[14].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL0 |
| CELL[14].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE2 |
| CELL[14].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARBURST1 |
| CELL[14].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT2 |
| CELL[14].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARADDR_PAR1 |
| CELL[14].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE2 |
| CELL[14].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWBURST1 |
| CELL[14].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT2 |
| CELL[14].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWADDR_PAR1 |
| CELL[14].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WLAST |
| CELL[14].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_AWADDR_14_11_NIB7_CLB2PHY_WREN0 |
| CELL[14].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT5 |
| CELL[14].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT3 |
| CELL[14].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT2 |
| CELL[14].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_AWADDR_20_15_NIB7_CLB2PHY_T_TXBIT0 |
| CELL[14].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_AWADDR_21_NIB7_CLB2PHY_FIFO_RDEN |
| CELL[14].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN2 |
| CELL[14].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_ARADDR_14_11_NIB7_CLB2PHY_RDEN1 |
| CELL[14].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL5 |
| CELL[14].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL4 |
| CELL[14].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL2 |
| CELL[14].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_ARADDR_20_15_NIB7_CLB2PHY_IODELAY_SEL1 |
| CELL[14].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_ARADDR_21_NIB7_CLB2PHY_DLYCTL_EN_VTC |
| CELL[14].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARVALID |
| CELL[14].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE1 |
| CELL[14].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARSIZE0 |
| CELL[14].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARBURST0 |
| CELL[14].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARLOCK |
| CELL[14].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT1 |
| CELL[14].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARPROT0 |
| CELL[14].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_ARADDR_PAR0 |
| CELL[14].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWVALID |
| CELL[14].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE1 |
| CELL[14].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWSIZE0 |
| CELL[14].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWBURST0 |
| CELL[14].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWLOCK |
| CELL[14].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT1 |
| CELL[14].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWPROT0 |
| CELL[14].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_AWADDR_PAR0 |
| CELL[14].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WVALID |
| CELL[14].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_WPOISON |
| CELL[14].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_RREADY |
| CELL[15].OUT_BEL[0] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID6 |
| CELL[15].OUT_BEL[1] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID5 |
| CELL[15].OUT_BEL[2] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID4 |
| CELL[15].OUT_BEL[3] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID3 |
| CELL[15].OUT_BEL[4] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID2 |
| CELL[15].OUT_BEL[5] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID1 |
| CELL[15].OUT_BEL[6] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BID0 |
| CELL[15].OUT_BEL[7] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BRESP1 |
| CELL[15].OUT_BEL[8] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BRESP0 |
| CELL[15].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_FIFO_EMPTY |
| CELL[15].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_FIXDLY_RDY |
| CELL[15].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_PHY_RDY |
| CELL[15].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_GT_STATUS |
| CELL[15].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_MASTER_PD |
| CELL[15].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[15].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[15].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[15].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[15].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[15].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[15].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[15].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[15].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[15].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[15].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[15].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[15].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[15].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[15].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[15].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[15].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[15].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[15].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT1 |
| CELL[15].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN3 |
| CELL[15].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR30 |
| CELL[15].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR27 |
| CELL[15].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR24 |
| CELL[15].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR21 |
| CELL[15].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR18 |
| CELL[15].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR15 |
| CELL[15].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR12 |
| CELL[15].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR9 |
| CELL[15].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR6 |
| CELL[15].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR3 |
| CELL[15].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR0 |
| CELL[15].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWRITE |
| CELL[15].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA14 |
| CELL[15].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA11 |
| CELL[15].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA8 |
| CELL[15].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P1_BREADY |
| CELL[15].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR31 |
| CELL[15].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR29 |
| CELL[15].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR28 |
| CELL[15].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR26 |
| CELL[15].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR25 |
| CELL[15].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR23 |
| CELL[15].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR22 |
| CELL[15].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR20 |
| CELL[15].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR19 |
| CELL[15].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR17 |
| CELL[15].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR16 |
| CELL[15].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR14 |
| CELL[15].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR13 |
| CELL[15].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR11 |
| CELL[15].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR10 |
| CELL[15].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR8 |
| CELL[15].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR7 |
| CELL[15].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR5 |
| CELL[15].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR4 |
| CELL[15].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR2 |
| CELL[15].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PADDR1 |
| CELL[15].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PSELX |
| CELL[15].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PENABLE |
| CELL[15].IMUX_IMUX_DELAY[40] | LPDDRMC.FABRIC_MUX_SELECT_EN |
| CELL[15].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA15 |
| CELL[15].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA13 |
| CELL[15].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA12 |
| CELL[15].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA10 |
| CELL[15].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA9 |
| CELL[15].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA7 |
| CELL[15].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA6 |
| CELL[16].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[16].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[16].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[16].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[16].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[16].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[16].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[16].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[16].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[16].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[16].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[16].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[16].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[16].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[16].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[16].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[16].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[16].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[16].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[16].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[16].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[16].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[16].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[16].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[16].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[16].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[16].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[16].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[16].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[16].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[16].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA5 |
| CELL[16].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA2 |
| CELL[16].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR7 |
| CELL[16].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR4 |
| CELL[16].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR1 |
| CELL[16].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN2 |
| CELL[16].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT5 |
| CELL[16].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT2 |
| CELL[16].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2RIU_NIBBLE_SEL |
| CELL[16].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN2 |
| CELL[16].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL5 |
| CELL[16].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL2 |
| CELL[16].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_ARADDR_10_NIB6_CLB2PHY_DLYCTL_EN_VTC |
| CELL[16].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[16].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[16].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[16].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA4 |
| CELL[16].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA3 |
| CELL[16].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA1 |
| CELL[16].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_15_0_NIB6_CLB2RIU_WR_DATA0 |
| CELL[16].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR6 |
| CELL[16].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR5 |
| CELL[16].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR3 |
| CELL[16].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR2 |
| CELL[16].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WSTRB_7_0_NIB6_CLB2RIU_ADDR0 |
| CELL[16].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN3 |
| CELL[16].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN1 |
| CELL[16].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_AWADDR_3_0_NIB6_CLB2PHY_WREN0 |
| CELL[16].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT4 |
| CELL[16].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT3 |
| CELL[16].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT1 |
| CELL[16].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_AWADDR_9_4_NIB6_CLB2PHY_T_TXBIT0 |
| CELL[16].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_AWADDR_10_NIB6_CLB2PHY_FIFO_RDEN |
| CELL[16].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN3 |
| CELL[16].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN1 |
| CELL[16].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_ARADDR_3_0_NIB6_CLB2PHY_RDEN0 |
| CELL[16].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL4 |
| CELL[16].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL3 |
| CELL[16].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL1 |
| CELL[16].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_ARADDR_9_4_NIB6_CLB2PHY_IODELAY_SEL0 |
| CELL[16].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[16].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[16].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[16].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[16].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[16].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_ARID_7_0_NIB6_7_0_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[16].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[16].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[17].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[17].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[17].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[17].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[17].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[17].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[17].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT5 |
| CELL[17].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT4 |
| CELL[17].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT3 |
| CELL[17].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT2 |
| CELL[17].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT1 |
| CELL[17].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P6_IOB2CLB_DFT0 |
| CELL[17].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_2 |
| CELL[17].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_1 |
| CELL[17].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_0_0 |
| CELL[17].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_2 |
| CELL[17].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_1 |
| CELL[17].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P6_PHY2CLB_LP_I_1_0 |
| CELL[17].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P6_RIU2CLB_VALID |
| CELL[17].OUT_BEL[22] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA31 |
| CELL[17].OUT_BEL[23] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA30 |
| CELL[17].OUT_BEL[24] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA29 |
| CELL[17].OUT_BEL[25] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA28 |
| CELL[17].OUT_BEL[26] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA27 |
| CELL[17].OUT_BEL[27] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA26 |
| CELL[17].OUT_BEL[28] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA25 |
| CELL[17].OUT_BEL[29] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA24 |
| CELL[17].OUT_BEL[30] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA23 |
| CELL[17].OUT_BEL[31] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA22 |
| CELL[17].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT3 |
| CELL[17].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[17].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[17].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN3 |
| CELL[17].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_ARLEN_7_0_NIB6_15_8_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[17].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[17].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_ARUSER_10_0_NIB6_26_16_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI1_AWID_7_0_NIB6_34_27_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[17].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[17].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_AWLEN_7_0_NIB6_42_35_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[17].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[17].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[17].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[17].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[17].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[17].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[17].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_AWUSER_10_0_NIB6_53_43_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[17].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN5 |
| CELL[17].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN4 |
| CELL[17].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN2 |
| CELL[17].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN1 |
| CELL[18].OUT_BEL[3] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA21 |
| CELL[18].OUT_BEL[4] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA20 |
| CELL[18].OUT_BEL[5] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA19 |
| CELL[18].OUT_BEL[6] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA18 |
| CELL[18].OUT_BEL[7] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS15 |
| CELL[18].OUT_BEL[8] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS14 |
| CELL[18].OUT_BEL[9] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS13 |
| CELL[18].OUT_BEL[10] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS12 |
| CELL[18].OUT_BEL[11] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS11 |
| CELL[18].OUT_BEL[12] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS10 |
| CELL[18].OUT_BEL[13] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS9 |
| CELL[18].OUT_BEL[14] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS8 |
| CELL[18].OUT_BEL[15] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS7 |
| CELL[18].OUT_BEL[16] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS6 |
| CELL[18].OUT_BEL[17] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS5 |
| CELL[18].OUT_BEL[18] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS4 |
| CELL[18].OUT_BEL[19] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS3 |
| CELL[18].OUT_BEL[20] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS2 |
| CELL[18].OUT_BEL[21] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS1 |
| CELL[18].OUT_BEL[22] | LPDDRMC.CFI_NPI_BRIDGE_TO_FABRIC_STATUS0 |
| CELL[18].OUT_BEL[23] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA17 |
| CELL[18].OUT_BEL[24] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA16 |
| CELL[18].OUT_BEL[25] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA15 |
| CELL[18].OUT_BEL[26] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA14 |
| CELL[18].OUT_BEL[27] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA13 |
| CELL[18].OUT_BEL[28] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA12 |
| CELL[18].OUT_BEL[29] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA11 |
| CELL[18].OUT_BEL[30] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA10 |
| CELL[18].OUT_BEL[31] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA9 |
| CELL[18].IMUX_CTRL[0] | LPDDRMC.IFABRIC_APB_CLK |
| CELL[18].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_FIFO_CLK |
| CELL[18].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_CTRL_CLK |
| CELL[18].IMUX_CTRL[3] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2MC_DIV_CLK |
| CELL[18].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT11 |
| CELL[18].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI1_WDATA_PAR_5_0_NIB6_CLB2PHY_KEEPER_EN0 |
| CELL[18].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RST |
| CELL[18].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST3 |
| CELL[18].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST0 |
| CELL[18].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST3 |
| CELL[18].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST0 |
| CELL[18].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[18].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[18].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE3 |
| CELL[18].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE0 |
| CELL[18].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE3 |
| CELL[18].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE0 |
| CELL[18].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC3 |
| CELL[18].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC0 |
| CELL[18].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD3 |
| CELL[18].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD0 |
| CELL[18].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_PAR_7_6_NIB6_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[18].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_PAR_7_6_NIB6_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[18].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST5 |
| CELL[18].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST4 |
| CELL[18].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST2 |
| CELL[18].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_TXBIT_RST1 |
| CELL[18].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST5 |
| CELL[18].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST4 |
| CELL[18].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST2 |
| CELL[18].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_RXBIT_RST1 |
| CELL[18].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[18].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[18].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[18].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[18].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE5 |
| CELL[18].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE4 |
| CELL[18].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE2 |
| CELL[18].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IBUF_DISABLE1 |
| CELL[18].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE5 |
| CELL[18].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE4 |
| CELL[18].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE2 |
| CELL[18].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_CE1 |
| CELL[18].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC5 |
| CELL[18].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC4 |
| CELL[18].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC2 |
| CELL[18].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_INC1 |
| CELL[18].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD5 |
| CELL[18].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD4 |
| CELL[18].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD2 |
| CELL[18].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IODELAY_LD1 |
| CELL[18].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[18].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[19].OUT_BEL[3] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA8 |
| CELL[19].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA15 |
| CELL[19].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA14 |
| CELL[19].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA13 |
| CELL[19].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA12 |
| CELL[19].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA11 |
| CELL[19].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA10 |
| CELL[19].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA9 |
| CELL[19].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA8 |
| CELL[19].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA7 |
| CELL[19].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA6 |
| CELL[19].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA5 |
| CELL[19].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA4 |
| CELL[19].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA3 |
| CELL[19].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA2 |
| CELL[19].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA1 |
| CELL[19].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_15_0_NIB6_RIU2CLB_RD_DATA0 |
| CELL[19].OUT_BEL[20] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA7 |
| CELL[19].OUT_BEL[21] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA6 |
| CELL[19].OUT_BEL[22] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA5 |
| CELL[19].OUT_BEL[23] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA4 |
| CELL[19].OUT_BEL[24] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA3 |
| CELL[19].OUT_BEL[25] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA2 |
| CELL[19].OUT_BEL[26] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA1 |
| CELL[19].OUT_BEL[27] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PRDATA0 |
| CELL[19].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_6 |
| CELL[19].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_4 |
| CELL[19].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_2 |
| CELL[19].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_0 |
| CELL[19].IMUX_BYP_DELAY[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN1 |
| CELL[19].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN7 |
| CELL[19].IMUX_BYP_DELAY[14] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN10 |
| CELL[19].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[19].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[19].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[19].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[19].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[19].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[19].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_0 |
| CELL[19].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[19].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA31 |
| CELL[19].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA28 |
| CELL[19].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA25 |
| CELL[19].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA22 |
| CELL[19].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA19 |
| CELL[19].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA16 |
| CELL[19].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_4 |
| CELL[19].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_1 |
| CELL[19].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[19].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[19].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[19].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[19].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[19].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[19].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[19].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[19].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[19].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[19].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_2 |
| CELL[19].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_PD_EN_1_1 |
| CELL[19].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_0_BIT2 |
| CELL[19].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[19].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[19].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P6_CLB2RIU_WR_EN |
| CELL[19].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA30 |
| CELL[19].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA29 |
| CELL[19].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA27 |
| CELL[19].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA26 |
| CELL[19].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA24 |
| CELL[19].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA23 |
| CELL[19].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA21 |
| CELL[19].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA20 |
| CELL[19].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA18 |
| CELL[19].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA17 |
| CELL[19].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA15 |
| CELL[19].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_6 |
| CELL[19].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_2 |
| CELL[19].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_0 |
| CELL[19].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_3 |
| CELL[19].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_5 |
| CELL[20].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_1 |
| CELL[20].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_3 |
| CELL[20].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_5 |
| CELL[20].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_63_56_NIB6_PHY2CLB_RD_DQ5_7 |
| CELL[20].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_6 |
| CELL[20].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_4 |
| CELL[20].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_2 |
| CELL[20].OUT_BEL[10] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_0 |
| CELL[20].OUT_BEL[11] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_1 |
| CELL[20].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_3 |
| CELL[20].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_5 |
| CELL[20].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_55_48_NIB6_PHY2CLB_RD_DQ4_7 |
| CELL[20].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_6 |
| CELL[20].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_4 |
| CELL[20].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_2 |
| CELL[20].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_0 |
| CELL[20].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_1 |
| CELL[20].OUT_BEL[20] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_3 |
| CELL[20].OUT_BEL[21] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_5 |
| CELL[20].OUT_BEL[22] | LPDDRMC.AXI1_RDATA_47_40_NIB6_PHY2CLB_RD_DQ3_7 |
| CELL[20].OUT_BEL[23] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_6 |
| CELL[20].OUT_BEL[24] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_4 |
| CELL[20].OUT_BEL[25] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_2 |
| CELL[20].OUT_BEL[26] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_0 |
| CELL[20].OUT_BEL[27] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_1 |
| CELL[20].OUT_BEL[28] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_3 |
| CELL[20].OUT_BEL[29] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_5 |
| CELL[20].OUT_BEL[30] | LPDDRMC.AXI1_RDATA_39_32_NIB6_PHY2CLB_RD_DQ2_7 |
| CELL[20].OUT_BEL[31] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_6 |
| CELL[20].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA13 |
| CELL[20].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_6 |
| CELL[20].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_0 |
| CELL[20].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_5 |
| CELL[20].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_4 |
| CELL[20].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_1 |
| CELL[20].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_7 |
| CELL[20].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA8 |
| CELL[20].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA5 |
| CELL[20].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_2 |
| CELL[20].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_3 |
| CELL[20].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_6 |
| CELL[20].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_0 |
| CELL[20].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_5 |
| CELL[20].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA3 |
| CELL[20].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI1_WDATA_63_56_NIB6_CLB2PHY_WR_DQ5_7 |
| CELL[20].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA14 |
| CELL[20].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA12 |
| CELL[20].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA11 |
| CELL[20].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_4 |
| CELL[20].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_2 |
| CELL[20].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_1 |
| CELL[20].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_3 |
| CELL[20].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI1_WDATA_55_48_NIB6_CLB2PHY_WR_DQ4_7 |
| CELL[20].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_6 |
| CELL[20].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_2 |
| CELL[20].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_0 |
| CELL[20].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_3 |
| CELL[20].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI1_WDATA_47_40_NIB6_CLB2PHY_WR_DQ3_5 |
| CELL[20].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA10 |
| CELL[20].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA9 |
| CELL[20].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA7 |
| CELL[20].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA6 |
| CELL[20].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_6 |
| CELL[20].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_4 |
| CELL[20].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_0 |
| CELL[20].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_1 |
| CELL[20].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_5 |
| CELL[20].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI1_WDATA_39_32_NIB6_CLB2PHY_WR_DQ2_7 |
| CELL[20].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_4 |
| CELL[20].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_2 |
| CELL[20].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_1 |
| CELL[20].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_3 |
| CELL[20].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI1_WDATA_31_24_NIB6_CLB2PHY_WR_DQ1_7 |
| CELL[20].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA4 |
| CELL[20].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA2 |
| CELL[20].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA1 |
| CELL[21].OUT_BEL[3] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_4 |
| CELL[21].OUT_BEL[4] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_2 |
| CELL[21].OUT_BEL[5] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_0 |
| CELL[21].OUT_BEL[6] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_1 |
| CELL[21].OUT_BEL[7] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_3 |
| CELL[21].OUT_BEL[8] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_5 |
| CELL[21].OUT_BEL[9] | LPDDRMC.AXI1_RDATA_31_24_NIB6_PHY2CLB_RD_DQ1_7 |
| CELL[21].OUT_BEL[10] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PREADY |
| CELL[21].OUT_BEL[11] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PSLVERR |
| CELL[21].OUT_BEL[12] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_6 |
| CELL[21].OUT_BEL[13] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_4 |
| CELL[21].OUT_BEL[14] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_2 |
| CELL[21].OUT_BEL[15] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_0 |
| CELL[21].OUT_BEL[16] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_1 |
| CELL[21].OUT_BEL[17] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_3 |
| CELL[21].OUT_BEL[18] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_5 |
| CELL[21].OUT_BEL[19] | LPDDRMC.AXI1_RDATA_23_16_NIB6_PHY2CLB_RD_DQ0_7 |
| CELL[21].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_7 |
| CELL[21].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_5 |
| CELL[21].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_3 |
| CELL[21].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_1 |
| CELL[21].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_0 |
| CELL[21].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_2 |
| CELL[21].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_4 |
| CELL[21].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ0_6 |
| CELL[21].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_7 |
| CELL[21].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_5 |
| CELL[21].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_3 |
| CELL[21].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_1 |
| CELL[21].IMUX_BYP_DELAY[6] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT3 |
| CELL[21].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN5 |
| CELL[21].IMUX_BYP_DELAY[12] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT4 |
| CELL[21].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_4 |
| CELL[21].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_1 |
| CELL[21].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_7 |
| CELL[21].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_3 |
| CELL[21].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_2 |
| CELL[21].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_7 |
| CELL[21].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_1 |
| CELL[21].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_4 |
| CELL[21].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_5 |
| CELL[21].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_0 |
| CELL[21].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_6 |
| CELL[21].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_3 |
| CELL[21].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_2 |
| CELL[21].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RST |
| CELL[21].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST3 |
| CELL[21].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_APB_FABRIC2BRIDGE_PWDATA0 |
| CELL[21].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_6 |
| CELL[21].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_2 |
| CELL[21].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_0 |
| CELL[21].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_3 |
| CELL[21].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI1_WDATA_23_16_NIB6_CLB2PHY_WR_DQ0_5 |
| CELL[21].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_7 |
| CELL[21].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_5 |
| CELL[21].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_1 |
| CELL[21].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_0 |
| CELL[21].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_4 |
| CELL[21].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ0_6 |
| CELL[21].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_5 |
| CELL[21].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_3 |
| CELL[21].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_0 |
| CELL[21].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_2 |
| CELL[21].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ1_6 |
| CELL[21].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_7 |
| CELL[21].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_3 |
| CELL[21].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_1 |
| CELL[21].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_2 |
| CELL[21].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ2_4 |
| CELL[21].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_7 |
| CELL[21].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_5 |
| CELL[21].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_1 |
| CELL[21].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_0 |
| CELL[21].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_4 |
| CELL[21].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ3_6 |
| CELL[21].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST5 |
| CELL[21].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST4 |
| CELL[21].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST2 |
| CELL[21].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST1 |
| CELL[22].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_0 |
| CELL[22].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_2 |
| CELL[22].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_4 |
| CELL[22].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ1_6 |
| CELL[22].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_7 |
| CELL[22].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_5 |
| CELL[22].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_3 |
| CELL[22].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_1 |
| CELL[22].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_0 |
| CELL[22].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_2 |
| CELL[22].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_4 |
| CELL[22].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ2_6 |
| CELL[22].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_7 |
| CELL[22].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_5 |
| CELL[22].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_3 |
| CELL[22].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_1 |
| CELL[22].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_0 |
| CELL[22].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_2 |
| CELL[22].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_4 |
| CELL[22].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ3_6 |
| CELL[22].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_7 |
| CELL[22].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_5 |
| CELL[22].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_3 |
| CELL[22].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_1 |
| CELL[22].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_0 |
| CELL[22].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_2 |
| CELL[22].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_4 |
| CELL[22].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ4_6 |
| CELL[22].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_7 |
| CELL[22].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2MC_DIV_CLK |
| CELL[22].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_CTRL_CLK |
| CELL[22].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_FIFO_CLK |
| CELL[22].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN2 |
| CELL[22].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST4 |
| CELL[22].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST1 |
| CELL[22].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WREN2 |
| CELL[22].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT5 |
| CELL[22].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT2 |
| CELL[22].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN3 |
| CELL[22].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_7 |
| CELL[22].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_1 |
| CELL[22].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_4 |
| CELL[22].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_FIFO_RDEN |
| CELL[22].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[22].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[22].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE3 |
| CELL[22].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE0 |
| CELL[22].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE4 |
| CELL[22].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_TXBIT_RST0 |
| CELL[22].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST5 |
| CELL[22].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST3 |
| CELL[22].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST2 |
| CELL[22].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RXBIT_RST0 |
| CELL[22].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WREN3 |
| CELL[22].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WREN1 |
| CELL[22].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WREN0 |
| CELL[22].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT4 |
| CELL[22].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT3 |
| CELL[22].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT1 |
| CELL[22].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_T_TXBIT0 |
| CELL[22].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN2 |
| CELL[22].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN1 |
| CELL[22].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_5 |
| CELL[22].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_3 |
| CELL[22].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_0 |
| CELL[22].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_2 |
| CELL[22].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ4_6 |
| CELL[22].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_RDEN0 |
| CELL[22].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[22].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[22].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[22].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[22].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE5 |
| CELL[22].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE4 |
| CELL[22].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE2 |
| CELL[22].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IBUF_DISABLE1 |
| CELL[22].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_DLYCTL_EN_VTC |
| CELL[22].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE5 |
| CELL[22].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE3 |
| CELL[22].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE2 |
| CELL[23].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_5 |
| CELL[23].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_3 |
| CELL[23].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_1 |
| CELL[23].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_0 |
| CELL[23].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_2 |
| CELL[23].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_4 |
| CELL[23].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_RD_DQ5_6 |
| CELL[23].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_FIFO_EMPTY |
| CELL[23].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_FIXDLY_RDY |
| CELL[23].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_PHY_RDY |
| CELL[23].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_GT_STATUS |
| CELL[23].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_MASTER_PD |
| CELL[23].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[23].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[23].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[23].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[23].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[23].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[23].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[23].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[23].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[23].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[23].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[23].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[23].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[23].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[23].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[23].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[23].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[23].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT8 |
| CELL[23].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE1 |
| CELL[23].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC4 |
| CELL[23].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC1 |
| CELL[23].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_7 |
| CELL[23].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_1 |
| CELL[23].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_4 |
| CELL[23].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD3 |
| CELL[23].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD0 |
| CELL[23].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[23].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[23].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[23].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[23].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[23].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[23].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[23].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[23].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CE0 |
| CELL[23].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC5 |
| CELL[23].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC3 |
| CELL[23].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC2 |
| CELL[23].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_INC0 |
| CELL[23].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD5 |
| CELL[23].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_5 |
| CELL[23].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_3 |
| CELL[23].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_0 |
| CELL[23].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_2 |
| CELL[23].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_WR_DQ5_6 |
| CELL[23].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD4 |
| CELL[23].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD2 |
| CELL[23].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_LD1 |
| CELL[23].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[23].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[23].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[23].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[23].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[23].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[23].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[23].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[23].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[23].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[23].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[23].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[23].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[23].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[23].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[23].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[23].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[23].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[24].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[24].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[24].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[24].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[24].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[24].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[24].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[24].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[24].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[24].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[24].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[24].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[24].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[24].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[24].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[24].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[24].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[24].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[24].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[24].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[24].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[24].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[24].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[24].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[24].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[24].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[24].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[24].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[24].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[24].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT2 |
| CELL[24].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG9 |
| CELL[24].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[24].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[24].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[24].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[24].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[24].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[24].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[24].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[24].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[24].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL4 |
| CELL[24].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL1 |
| CELL[24].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[24].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[24].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[24].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[24].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[24].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[24].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[24].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[24].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[24].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[24].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[24].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[24].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[24].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[24].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[24].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[24].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[24].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[24].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[24].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[24].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[24].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[24].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[24].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL5 |
| CELL[24].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL3 |
| CELL[24].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL2 |
| CELL[24].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IODELAY_SEL0 |
| CELL[24].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[24].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[24].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[24].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[24].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[24].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[24].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[24].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[24].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[25].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[25].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[25].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[25].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[25].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[25].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[25].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[25].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[25].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT5 |
| CELL[25].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT4 |
| CELL[25].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT3 |
| CELL[25].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT2 |
| CELL[25].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT1 |
| CELL[25].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_IOB2CLB_DFT0 |
| CELL[25].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_2 |
| CELL[25].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_1 |
| CELL[25].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_0_0 |
| CELL[25].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_2 |
| CELL[25].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_1 |
| CELL[25].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_PHY2CLB_LP_I_1_0 |
| CELL[25].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA15 |
| CELL[25].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA14 |
| CELL[25].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA13 |
| CELL[25].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA12 |
| CELL[25].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA11 |
| CELL[25].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA10 |
| CELL[25].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA9 |
| CELL[25].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA8 |
| CELL[25].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA7 |
| CELL[25].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[25].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_2 |
| CELL[25].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[25].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[25].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN5 |
| CELL[25].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN2 |
| CELL[25].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR7 |
| CELL[25].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR4 |
| CELL[25].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR1 |
| CELL[25].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA14 |
| CELL[25].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA11 |
| CELL[25].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA8 |
| CELL[25].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA5 |
| CELL[25].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA2 |
| CELL[25].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_EN |
| CELL[25].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[25].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[25].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[25].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[25].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_1 |
| CELL[25].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_PD_EN_1_0 |
| CELL[25].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[25].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[25].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[25].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[25].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN4 |
| CELL[25].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN3 |
| CELL[25].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN1 |
| CELL[25].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2PHY_KEEPER_EN0 |
| CELL[25].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR6 |
| CELL[25].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR5 |
| CELL[25].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR3 |
| CELL[25].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR2 |
| CELL[25].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_ADDR0 |
| CELL[25].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA15 |
| CELL[25].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA13 |
| CELL[25].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA12 |
| CELL[25].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA10 |
| CELL[25].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA9 |
| CELL[25].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA7 |
| CELL[25].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA6 |
| CELL[25].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA4 |
| CELL[25].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA3 |
| CELL[25].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA1 |
| CELL[25].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_WR_DATA0 |
| CELL[25].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_0_3 |
| CELL[25].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_0_2 |
| CELL[26].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA6 |
| CELL[26].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA5 |
| CELL[26].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA4 |
| CELL[26].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA3 |
| CELL[26].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA2 |
| CELL[26].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA1 |
| CELL[26].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_RD_DATA0 |
| CELL[26].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P10_RIU2CLB_VALID |
| CELL[26].OUT_BEL[11] | LPDDRMC.IF_DMC_FABRIC_REF_USR_PORT_AVAILABLE |
| CELL[26].OUT_BEL[12] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_0_3 |
| CELL[26].OUT_BEL[13] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_0_2 |
| CELL[26].OUT_BEL[14] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_0_1 |
| CELL[26].OUT_BEL[15] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_0_0 |
| CELL[26].OUT_BEL[16] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_1_1 |
| CELL[26].OUT_BEL[17] | LPDDRMC.IF_DMC_FABRIC_REF_ACK_1_0 |
| CELL[26].OUT_BEL[18] | LPDDRMC.IF_DMC_FABRIC_CAL_BUSY |
| CELL[26].OUT_BEL[19] | LPDDRMC.IF_DMC_FABRIC_CAL_DONE |
| CELL[26].OUT_BEL[20] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC9 |
| CELL[26].OUT_BEL[21] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC8 |
| CELL[26].OUT_BEL[22] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC7 |
| CELL[26].OUT_BEL[23] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC6 |
| CELL[26].OUT_BEL[24] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC5 |
| CELL[26].OUT_BEL[25] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC4 |
| CELL[26].OUT_BEL[26] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC3 |
| CELL[26].OUT_BEL[27] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC2 |
| CELL[26].OUT_BEL[28] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC1 |
| CELL[26].OUT_BEL[29] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_OUT_EXT_DDRMC0 |
| CELL[26].OUT_BEL[30] | LPDDRMC.IF_DMC_FABRIC_SCAN_CNTRL_CHNL_OUT_EXT_DDRMC1 |
| CELL[26].OUT_BEL[31] | LPDDRMC.IF_DMC_FABRIC_SCAN_CNTRL_CHNL_OUT_EXT_DDRMC0 |
| CELL[26].IMUX_CTRL[0] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_TRACE_CLK |
| CELL[26].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT9 |
| CELL[26].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN9 |
| CELL[26].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_1_1 |
| CELL[26].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P10_CLB2RIU_NIBBLE_SEL |
| CELL[26].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_TRACE_TREADY |
| CELL[26].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_DMC_FABRIC_BLOCK_PERIODIC_CAL |
| CELL[26].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_DMC_FABRIC_CSSD_TRIG_IN_N_EXT |
| CELL[26].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I23 |
| CELL[26].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I20 |
| CELL[26].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I17 |
| CELL[26].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I14 |
| CELL[26].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I11 |
| CELL[26].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I8 |
| CELL[26].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I5 |
| CELL[26].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I2 |
| CELL[26].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTRDCI_USR_RST |
| CELL[26].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_3 |
| CELL[26].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_0_1 |
| CELL[26].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_0_0 |
| CELL[26].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_DMC_FABRIC_REF_RANK_EN_1_0 |
| CELL[26].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_DMC_FABRIC_EXMON_CLEAR_IN |
| CELL[26].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_TRIG |
| CELL[26].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_ACK |
| CELL[26].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_TRACE_RST_N |
| CELL[26].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_DMC_FABRIC_BLI2UB_UART_RX |
| CELL[26].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_DMC_FABRIC_BLI2ILA_TRIG |
| CELL[26].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_DMC_FABRIC_BLI2ILA_ACK |
| CELL[26].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2IOB_PUDC_B |
| CELL[26].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_RST_N |
| CELL[26].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I22 |
| CELL[26].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I21 |
| CELL[26].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I19 |
| CELL[26].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I18 |
| CELL[26].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I16 |
| CELL[26].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I15 |
| CELL[26].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I13 |
| CELL[26].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I12 |
| CELL[26].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I10 |
| CELL[26].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I9 |
| CELL[26].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I7 |
| CELL[26].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I6 |
| CELL[26].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I4 |
| CELL[26].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I3 |
| CELL[26].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I1 |
| CELL[26].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CLB2CTR_DCI_TEST_I_CLOCK |
| CELL[26].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_7 |
| CELL[26].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_5 |
| CELL[26].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_1 |
| CELL[26].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_0 |
| CELL[27].OUT_BEL[3] | LPDDRMC.IF_DMC_FABRIC_CSSD_CLKSTP_BCAST |
| CELL[27].OUT_BEL[4] | LPDDRMC.IF_DMC_FABRIC_EXMON_CLEAR_OUT |
| CELL[27].OUT_BEL[5] | LPDDRMC.IF_DMC_FABRIC_LPDDRMC_SPARE1 |
| CELL[27].OUT_BEL[6] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_ACK |
| CELL[27].OUT_BEL[7] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRIG |
| CELL[27].OUT_BEL[8] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA15 |
| CELL[27].OUT_BEL[9] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA14 |
| CELL[27].OUT_BEL[10] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA13 |
| CELL[27].OUT_BEL[11] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA12 |
| CELL[27].OUT_BEL[12] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA11 |
| CELL[27].OUT_BEL[13] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA10 |
| CELL[27].OUT_BEL[14] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA9 |
| CELL[27].OUT_BEL[15] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA8 |
| CELL[27].OUT_BEL[16] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA7 |
| CELL[27].OUT_BEL[17] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA6 |
| CELL[27].OUT_BEL[18] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA5 |
| CELL[27].OUT_BEL[19] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA4 |
| CELL[27].OUT_BEL[20] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA3 |
| CELL[27].OUT_BEL[21] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA2 |
| CELL[27].OUT_BEL[22] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA1 |
| CELL[27].OUT_BEL[23] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TDATA0 |
| CELL[27].OUT_BEL[24] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_TRACE_TVALID |
| CELL[27].OUT_BEL[25] | LPDDRMC.IF_DMC_FABRIC_UB2BLI_UART_TX |
| CELL[27].OUT_BEL[26] | LPDDRMC.IF_DMC_FABRIC_ILA2BLI_ACK |
| CELL[27].OUT_BEL[27] | LPDDRMC.IF_DMC_FABRIC_ILA2BLI_TRIG |
| CELL[27].OUT_BEL[29] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O21 |
| CELL[27].OUT_BEL[30] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O23 |
| CELL[27].OUT_BEL[31] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O22 |
| CELL[27].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_EDT_UPDT_N_EXT |
| CELL[27].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_6 |
| CELL[27].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_3 |
| CELL[27].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_2 |
| CELL[27].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_7 |
| CELL[27].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_1 |
| CELL[27].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_4 |
| CELL[27].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_5 |
| CELL[27].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_0 |
| CELL[27].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_6 |
| CELL[27].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_3 |
| CELL[27].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_2 |
| CELL[27].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[27].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[27].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE3 |
| CELL[27].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE0 |
| CELL[27].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_2 |
| CELL[27].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ0_4 |
| CELL[27].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_7 |
| CELL[27].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_5 |
| CELL[27].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_1 |
| CELL[27].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_0 |
| CELL[27].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_4 |
| CELL[27].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ1_6 |
| CELL[27].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_5 |
| CELL[27].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_3 |
| CELL[27].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_0 |
| CELL[27].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_2 |
| CELL[27].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ2_6 |
| CELL[27].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_7 |
| CELL[27].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_3 |
| CELL[27].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_1 |
| CELL[27].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_2 |
| CELL[27].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ3_4 |
| CELL[27].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_7 |
| CELL[27].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_5 |
| CELL[27].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_1 |
| CELL[27].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_0 |
| CELL[27].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_4 |
| CELL[27].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ4_6 |
| CELL[27].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[27].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[27].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE5 |
| CELL[27].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE4 |
| CELL[27].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE2 |
| CELL[27].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IBUF_DISABLE1 |
| CELL[27].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DLYCTL_EN_VTC |
| CELL[27].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE5 |
| CELL[28].OUT_BEL[3] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_LOCK |
| CELL[28].OUT_BEL[4] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O20 |
| CELL[28].OUT_BEL[5] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O19 |
| CELL[28].OUT_BEL[6] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O18 |
| CELL[28].OUT_BEL[7] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O17 |
| CELL[28].OUT_BEL[8] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O16 |
| CELL[28].OUT_BEL[9] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O15 |
| CELL[28].OUT_BEL[10] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O14 |
| CELL[28].OUT_BEL[11] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O13 |
| CELL[28].OUT_BEL[12] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O12 |
| CELL[28].OUT_BEL[13] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O11 |
| CELL[28].OUT_BEL[14] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O10 |
| CELL[28].OUT_BEL[15] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O9 |
| CELL[28].OUT_BEL[16] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O8 |
| CELL[28].OUT_BEL[17] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O7 |
| CELL[28].OUT_BEL[18] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O6 |
| CELL[28].OUT_BEL[19] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O5 |
| CELL[28].OUT_BEL[20] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O4 |
| CELL[28].OUT_BEL[21] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O3 |
| CELL[28].OUT_BEL[22] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O2 |
| CELL[28].OUT_BEL[23] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O1 |
| CELL[28].OUT_BEL[24] | LPDDRMC.IF_XPIO_DCI_FABRIC_DMC_OABUT_CTR2CLB_DCI_TEST_O0 |
| CELL[28].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_PHY_RDY |
| CELL[28].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_GT_STATUS |
| CELL[28].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_MASTER_PD |
| CELL[28].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[28].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[28].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_7 |
| CELL[28].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_5 |
| CELL[28].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN3 |
| CELL[28].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE4 |
| CELL[28].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_5 |
| CELL[28].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_3 |
| CELL[28].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE3 |
| CELL[28].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_1 |
| CELL[28].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE2 |
| CELL[28].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE1 |
| CELL[28].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CE0 |
| CELL[28].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_0 |
| CELL[28].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC5 |
| CELL[28].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_2 |
| CELL[28].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_4 |
| CELL[28].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC4 |
| CELL[28].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_6 |
| CELL[28].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC3 |
| CELL[28].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WR_DQ5_7 |
| CELL[29].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_3 |
| CELL[29].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_1 |
| CELL[29].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_0 |
| CELL[29].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_2 |
| CELL[29].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_4 |
| CELL[29].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ0_6 |
| CELL[29].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[29].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[29].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[29].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[29].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[29].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[29].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_7 |
| CELL[29].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_5 |
| CELL[29].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_3 |
| CELL[29].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_1 |
| CELL[29].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_0 |
| CELL[29].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_2 |
| CELL[29].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_4 |
| CELL[29].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ1_6 |
| CELL[29].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[29].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[29].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[29].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[29].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[29].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_7 |
| CELL[29].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_FIFO_EMPTY |
| CELL[29].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_FIXDLY_RDY |
| CELL[29].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_5 |
| CELL[29].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT0 |
| CELL[29].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RST |
| CELL[29].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC1 |
| CELL[29].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC0 |
| CELL[29].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST5 |
| CELL[29].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD5 |
| CELL[29].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST4 |
| CELL[29].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD4 |
| CELL[29].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST3 |
| CELL[29].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD3 |
| CELL[29].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST2 |
| CELL[29].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD2 |
| CELL[29].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST1 |
| CELL[29].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD1 |
| CELL[29].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_TXBIT_RST0 |
| CELL[29].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_LD0 |
| CELL[29].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_INC2 |
| CELL[30].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_3 |
| CELL[30].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_1 |
| CELL[30].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_0 |
| CELL[30].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_2 |
| CELL[30].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_4 |
| CELL[30].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ2_6 |
| CELL[30].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[30].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[30].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[30].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[30].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[30].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_7 |
| CELL[30].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_5 |
| CELL[30].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_3 |
| CELL[30].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_1 |
| CELL[30].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_0 |
| CELL[30].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_2 |
| CELL[30].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_4 |
| CELL[30].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ3_6 |
| CELL[30].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[30].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[30].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[30].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[30].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[30].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_7 |
| CELL[30].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_5 |
| CELL[30].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_3 |
| CELL[30].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_1 |
| CELL[30].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_0 |
| CELL[30].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2MC_DIV_CLK |
| CELL[30].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_CTRL_CLK |
| CELL[30].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_FIFO_CLK |
| CELL[30].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN9 |
| CELL[30].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG4 |
| CELL[30].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[30].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST4 |
| CELL[30].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[30].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST3 |
| CELL[30].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[30].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST2 |
| CELL[30].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[30].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST1 |
| CELL[30].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[30].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST0 |
| CELL[30].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[30].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WREN3 |
| CELL[30].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[30].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WREN2 |
| CELL[30].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[30].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RXBIT_RST5 |
| CELL[31].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_2 |
| CELL[31].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_4 |
| CELL[31].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ4_6 |
| CELL[31].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[31].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[31].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[31].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[31].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[31].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[31].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[31].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[31].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_7 |
| CELL[31].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_5 |
| CELL[31].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_3 |
| CELL[31].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[31].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_1 |
| CELL[31].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_0 |
| CELL[31].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_2 |
| CELL[31].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_4 |
| CELL[31].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_RD_DQ5_6 |
| CELL[31].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[31].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[31].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[31].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[31].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[31].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[31].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[31].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[31].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[31].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT9 |
| CELL[31].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[31].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WREN0 |
| CELL[31].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[31].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT5 |
| CELL[31].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[31].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT4 |
| CELL[31].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[31].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT3 |
| CELL[31].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[31].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT2 |
| CELL[31].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[31].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT1 |
| CELL[31].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[31].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_T_TXBIT0 |
| CELL[31].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[31].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_WREN1 |
| CELL[32].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[32].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[32].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[32].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[32].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[32].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[32].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[32].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[32].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[32].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[32].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[32].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[32].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[32].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT5 |
| CELL[32].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT4 |
| CELL[32].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT3 |
| CELL[32].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT2 |
| CELL[32].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT1 |
| CELL[32].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_IOB2CLB_DFT0 |
| CELL[32].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_2 |
| CELL[32].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_1 |
| CELL[32].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_0_0 |
| CELL[32].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_2 |
| CELL[32].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_1 |
| CELL[32].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_PHY2CLB_LP_I_1_0 |
| CELL[32].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA15 |
| CELL[32].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA14 |
| CELL[32].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA13 |
| CELL[32].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_VALID |
| CELL[32].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT0 |
| CELL[32].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN2 |
| CELL[32].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[32].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_FIFO_RDEN |
| CELL[32].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[32].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[32].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[32].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[32].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[32].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[32].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[32].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[32].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[32].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[32].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[32].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[32].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN3 |
| CELL[32].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[32].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[32].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN1 |
| CELL[32].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_RDEN0 |
| CELL[32].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[32].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[32].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[32].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[32].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[32].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[32].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[32].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[32].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[32].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[32].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[32].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[32].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[32].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[32].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[32].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[32].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[32].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[32].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[32].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[32].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[32].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[32].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[32].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[32].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[32].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL5 |
| CELL[32].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL4 |
| CELL[33].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA12 |
| CELL[33].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA11 |
| CELL[33].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA10 |
| CELL[33].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA9 |
| CELL[33].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA8 |
| CELL[33].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA7 |
| CELL[33].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA6 |
| CELL[33].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA5 |
| CELL[33].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA4 |
| CELL[33].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA3 |
| CELL[33].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA2 |
| CELL[33].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA1 |
| CELL[33].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_RIU2CLB_RD_DATA0 |
| CELL[33].OUT_BEL[16] | LPDDRMC.CFG2IOB_PUDC_B_O |
| CELL[33].OUT_BEL[18] | LPDDRMC.IJTAG_RESET_TAP_O |
| CELL[33].OUT_BEL[21] | LPDDRMC.CAPTURE_DR_O |
| CELL[33].OUT_BEL[22] | LPDDRMC.SELECT_DR_O |
| CELL[33].OUT_BEL[26] | LPDDRMC.IJTAG_TDO_OABUT |
| CELL[33].OUT_BEL[27] | LPDDRMC.IJTAG_TDO_RETURN_EXT |
| CELL[33].OUT_BEL[28] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT2 |
| CELL[33].OUT_BEL[29] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT6 |
| CELL[33].OUT_BEL[30] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT10 |
| CELL[33].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG7 |
| CELL[33].IMUX_IMUX_DELAY[0] | ABUS_SWITCH_XP5IO[0].TEST_ANALOGBUS_SEL_B |
| CELL[33].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL1 |
| CELL[33].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[33].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[33].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[33].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[33].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[33].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[33].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_1 |
| CELL[33].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[33].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[33].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN4 |
| CELL[33].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN1 |
| CELL[33].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR6 |
| CELL[33].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR3 |
| CELL[33].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR0 |
| CELL[33].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL3 |
| CELL[33].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL2 |
| CELL[33].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IODELAY_SEL0 |
| CELL[33].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[33].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[33].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[33].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[33].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[33].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[33].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[33].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[33].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[33].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[33].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[33].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[33].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_2 |
| CELL[33].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_PD_EN_1_0 |
| CELL[33].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[33].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[33].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[33].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[33].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN5 |
| CELL[33].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN3 |
| CELL[33].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN2 |
| CELL[33].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2PHY_KEEPER_EN0 |
| CELL[33].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR7 |
| CELL[33].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR5 |
| CELL[33].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR4 |
| CELL[33].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR2 |
| CELL[33].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_ADDR1 |
| CELL[33].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA15 |
| CELL[33].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA14 |
| CELL[34].OUT_BEL[3] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT4 |
| CELL[34].OUT_BEL[4] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT0 |
| CELL[34].OUT_BEL[5] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT7 |
| CELL[34].OUT_BEL[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION6 |
| CELL[34].OUT_BEL[7] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION4 |
| CELL[34].OUT_BEL[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT8 |
| CELL[34].OUT_BEL[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION2 |
| CELL[34].OUT_BEL[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT9 |
| CELL[34].OUT_BEL[11] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT10 |
| CELL[34].OUT_BEL[12] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION0 |
| CELL[34].OUT_BEL[13] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION8 |
| CELL[34].OUT_BEL[14] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION10 |
| CELL[34].OUT_BEL[15] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT0 |
| CELL[34].OUT_BEL[16] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT2 |
| CELL[34].OUT_BEL[17] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT1 |
| CELL[34].OUT_BEL[18] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT5 |
| CELL[34].OUT_BEL[19] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT3 |
| CELL[34].OUT_BEL[20] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT4 |
| CELL[34].OUT_BEL[21] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT8 |
| CELL[34].OUT_BEL[22] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT6 |
| CELL[34].OUT_BEL[23] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT3 |
| CELL[34].OUT_BEL[24] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT1 |
| CELL[34].OUT_BEL[25] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION11 |
| CELL[34].OUT_BEL[26] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION9 |
| CELL[34].OUT_BEL[27] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION5 |
| CELL[34].OUT_BEL[28] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION3 |
| CELL[34].OUT_BEL[29] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION1 |
| CELL[34].OUT_BEL[30] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_DFX_UNEXPECTED_ACTIVATION7 |
| CELL[34].OUT_BEL[31] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT5 |
| CELL[34].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_FIFO_CLK |
| CELL[34].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_CTRL_CLK |
| CELL[34].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2MC_DIV_CLK |
| CELL[34].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN1 |
| CELL[34].IMUX_IMUX_DELAY[0] | ABUS_SWITCH_XP5IO[1].TEST_ANALOGBUS_SEL_B |
| CELL[34].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA11 |
| CELL[34].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA8 |
| CELL[34].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA5 |
| CELL[34].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA2 |
| CELL[34].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_EN |
| CELL[34].IMUX_IMUX_DELAY[9] | LPDDRMC.IJTAG_TDI_EXT |
| CELL[34].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST5 |
| CELL[34].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST2 |
| CELL[34].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST5 |
| CELL[34].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST2 |
| CELL[34].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WREN3 |
| CELL[34].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WREN0 |
| CELL[34].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA13 |
| CELL[34].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA12 |
| CELL[34].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA10 |
| CELL[34].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA9 |
| CELL[34].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA7 |
| CELL[34].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA6 |
| CELL[34].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA4 |
| CELL[34].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA3 |
| CELL[34].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA1 |
| CELL[34].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_WR_DATA0 |
| CELL[34].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P5_CLB2RIU_NIBBLE_SEL |
| CELL[34].IMUX_IMUX_DELAY[27] | LPDDRMC.CFG2IOB_PUDC_B |
| CELL[34].IMUX_IMUX_DELAY[28] | LPDDRMC.IJTAG_RESET_TAP |
| CELL[34].IMUX_IMUX_DELAY[30] | LPDDRMC.CAPTURE_DR |
| CELL[34].IMUX_IMUX_DELAY[31] | LPDDRMC.SELECT_DR |
| CELL[34].IMUX_IMUX_DELAY[34] | LPDDRMC.IJTAG_TDI_RETURN_EXT |
| CELL[34].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RST |
| CELL[34].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST4 |
| CELL[34].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST3 |
| CELL[34].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST1 |
| CELL[34].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_TXBIT_RST0 |
| CELL[34].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST4 |
| CELL[34].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST3 |
| CELL[34].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST1 |
| CELL[34].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RXBIT_RST0 |
| CELL[34].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WREN2 |
| CELL[34].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WREN1 |
| CELL[34].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT5 |
| CELL[34].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT4 |
| CELL[35].OUT_BEL[3] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT7 |
| CELL[35].OUT_BEL[4] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_COMP_OUT9 |
| CELL[35].OUT_BEL[5] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT0 |
| CELL[35].OUT_BEL[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT2 |
| CELL[35].OUT_BEL[7] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT4 |
| CELL[35].OUT_BEL[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT6 |
| CELL[35].OUT_BEL[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT8 |
| CELL[35].OUT_BEL[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_OUT10 |
| CELL[35].OUT_BEL[11] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT1 |
| CELL[35].OUT_BEL[12] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT3 |
| CELL[35].OUT_BEL[13] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT5 |
| CELL[35].OUT_BEL[14] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT7 |
| CELL[35].OUT_BEL[15] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_PHY2CLB_SCAN_CNTRL_CHNL_OUT9 |
| CELL[35].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_FIFO_EMPTY |
| CELL[35].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_FIXDLY_RDY |
| CELL[35].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_PHY_RDY |
| CELL[35].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_GT_STATUS |
| CELL[35].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_MASTER_PD |
| CELL[35].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[35].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[35].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[35].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[35].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[35].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[35].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[35].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[35].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[35].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[35].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[35].IMUX_BYP_DELAY[8] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT4 |
| CELL[35].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT3 |
| CELL[35].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT0 |
| CELL[35].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN1 |
| CELL[35].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[35].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[35].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE5 |
| CELL[35].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE2 |
| CELL[35].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DLYCTL_EN_VTC |
| CELL[35].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE3 |
| CELL[35].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE0 |
| CELL[35].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC3 |
| CELL[35].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC0 |
| CELL[35].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD3 |
| CELL[35].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD0 |
| CELL[35].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[35].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[35].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT2 |
| CELL[35].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_T_TXBIT1 |
| CELL[35].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN3 |
| CELL[35].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN2 |
| CELL[35].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_RDEN0 |
| CELL[35].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_FIFO_RDEN |
| CELL[35].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[35].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[35].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[35].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[35].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE4 |
| CELL[35].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE3 |
| CELL[35].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE1 |
| CELL[35].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IBUF_DISABLE0 |
| CELL[35].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE5 |
| CELL[35].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE4 |
| CELL[35].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE2 |
| CELL[35].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CE1 |
| CELL[35].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC5 |
| CELL[35].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC4 |
| CELL[35].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC2 |
| CELL[35].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_INC1 |
| CELL[35].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD5 |
| CELL[35].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD4 |
| CELL[35].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD2 |
| CELL[35].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_LD1 |
| CELL[35].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[35].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[35].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[35].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[35].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[35].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[36].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[36].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[36].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[36].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[36].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[36].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[36].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[36].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[36].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[36].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[36].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[36].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[36].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[36].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[36].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[36].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[36].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[36].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[36].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[36].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[36].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[36].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[36].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[36].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[36].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[36].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[36].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[36].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[36].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[36].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[36].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[36].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[36].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[36].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[36].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[36].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[36].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[36].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[36].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[36].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[36].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[36].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[36].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[36].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[36].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[36].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[36].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[36].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[36].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[36].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[36].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[36].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[36].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[36].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[36].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[36].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[36].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[36].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[36].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[36].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[36].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[36].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[36].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[36].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[36].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[36].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[36].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[36].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[36].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[36].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[36].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[36].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[36].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[36].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[36].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[36].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[36].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[36].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL5 |
| CELL[37].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[37].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[37].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[37].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[37].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[37].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[37].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[37].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[37].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[37].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[37].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[37].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[37].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT5 |
| CELL[37].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT4 |
| CELL[37].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT3 |
| CELL[37].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT2 |
| CELL[37].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT1 |
| CELL[37].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_IOB2CLB_DFT0 |
| CELL[37].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_2 |
| CELL[37].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_1 |
| CELL[37].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_0_0 |
| CELL[37].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_2 |
| CELL[37].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_1 |
| CELL[37].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_LP_I_1_0 |
| CELL[37].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA15 |
| CELL[37].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA14 |
| CELL[37].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA13 |
| CELL[37].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA12 |
| CELL[37].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA11 |
| CELL[37].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA10 |
| CELL[37].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA9 |
| CELL[37].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA8 |
| CELL[37].IMUX_BYP_DELAY[7] | LPDDRMC.IF_DMC_FABRIC_SCAN_CNTRL_CHNL_IN_EXT_DDRMC1 |
| CELL[37].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN5 |
| CELL[37].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL4 |
| CELL[37].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL1 |
| CELL[37].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[37].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[37].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[37].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[37].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[37].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[37].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_6 |
| CELL[37].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_0 |
| CELL[37].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_5 |
| CELL[37].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_4 |
| CELL[37].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_1 |
| CELL[37].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_7 |
| CELL[37].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_4 |
| CELL[37].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_1 |
| CELL[37].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL3 |
| CELL[37].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL2 |
| CELL[37].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IODELAY_SEL0 |
| CELL[37].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[37].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[37].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[37].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[37].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[37].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[37].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[37].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[37].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[37].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[37].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[37].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[37].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_NIBBLE_SEL |
| CELL[37].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_4 |
| CELL[37].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_2 |
| CELL[37].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_1 |
| CELL[37].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_3 |
| CELL[37].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ5_7 |
| CELL[37].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_6 |
| CELL[37].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_2 |
| CELL[37].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_0 |
| CELL[37].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_3 |
| CELL[37].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ4_5 |
| CELL[37].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_2 |
| CELL[37].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_6 |
| CELL[37].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_2 |
| CELL[37].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_0 |
| CELL[37].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_3 |
| CELL[37].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_5 |
| CELL[38].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA7 |
| CELL[38].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA6 |
| CELL[38].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA5 |
| CELL[38].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA4 |
| CELL[38].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA3 |
| CELL[38].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA2 |
| CELL[38].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA1 |
| CELL[38].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_RD_DATA0 |
| CELL[38].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_RIU2CLB_VALID |
| CELL[38].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_6 |
| CELL[38].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_4 |
| CELL[38].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_2 |
| CELL[38].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_0 |
| CELL[38].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_1 |
| CELL[38].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_3 |
| CELL[38].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_5 |
| CELL[38].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ5_7 |
| CELL[38].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_6 |
| CELL[38].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_4 |
| CELL[38].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_2 |
| CELL[38].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_0 |
| CELL[38].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_1 |
| CELL[38].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_3 |
| CELL[38].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_5 |
| CELL[38].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ4_7 |
| CELL[38].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_6 |
| CELL[38].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_4 |
| CELL[38].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_2 |
| CELL[38].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_0 |
| CELL[38].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_1 |
| CELL[38].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_3 |
| CELL[38].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_5 |
| CELL[38].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2MC_DIV_CLK |
| CELL[38].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_FIFO_CLK |
| CELL[38].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_CTRL_CLK |
| CELL[38].IMUX_BYP_DELAY[8] | LPDDRMC.IF_DMC_FABRIC_SCAN_MODE_RST_N_EXT |
| CELL[38].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ3_7 |
| CELL[38].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[38].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[38].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN5 |
| CELL[38].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_6 |
| CELL[38].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_0 |
| CELL[38].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_5 |
| CELL[38].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN1 |
| CELL[38].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR6 |
| CELL[38].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR3 |
| CELL[38].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR0 |
| CELL[38].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA13 |
| CELL[38].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA10 |
| CELL[38].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA7 |
| CELL[38].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA4 |
| CELL[38].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA1 |
| CELL[38].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_1 |
| CELL[38].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_PD_EN_1_0 |
| CELL[38].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[38].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[38].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[38].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[38].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN4 |
| CELL[38].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN3 |
| CELL[38].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_4 |
| CELL[38].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_2 |
| CELL[38].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_1 |
| CELL[38].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_3 |
| CELL[38].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ2_7 |
| CELL[38].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN2 |
| CELL[38].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_KEEPER_EN0 |
| CELL[38].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR7 |
| CELL[38].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR5 |
| CELL[38].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR4 |
| CELL[38].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR2 |
| CELL[38].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_ADDR1 |
| CELL[38].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA15 |
| CELL[38].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA14 |
| CELL[38].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA12 |
| CELL[38].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA11 |
| CELL[38].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA9 |
| CELL[38].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA8 |
| CELL[38].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA6 |
| CELL[38].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA5 |
| CELL[38].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA3 |
| CELL[38].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA2 |
| CELL[38].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_DATA0 |
| CELL[38].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2RIU_WR_EN |
| CELL[39].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ3_7 |
| CELL[39].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_6 |
| CELL[39].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_4 |
| CELL[39].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_2 |
| CELL[39].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_0 |
| CELL[39].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_1 |
| CELL[39].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_3 |
| CELL[39].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_5 |
| CELL[39].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ2_7 |
| CELL[39].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_6 |
| CELL[39].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_4 |
| CELL[39].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_2 |
| CELL[39].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_0 |
| CELL[39].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_1 |
| CELL[39].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_3 |
| CELL[39].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_5 |
| CELL[39].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ1_7 |
| CELL[39].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_6 |
| CELL[39].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_4 |
| CELL[39].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_2 |
| CELL[39].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_0 |
| CELL[39].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_1 |
| CELL[39].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_3 |
| CELL[39].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_5 |
| CELL[39].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_PHY2CLB_RD_DQ0_7 |
| CELL[39].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_7 |
| CELL[39].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_5 |
| CELL[39].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_3 |
| CELL[39].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_1 |
| CELL[39].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_0 |
| CELL[39].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_2 |
| CELL[39].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_4 |
| CELL[39].IMUX_BYP_DELAY[7] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT6 |
| CELL[39].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG1 |
| CELL[39].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_MODE_RST_B |
| CELL[39].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_6 |
| CELL[39].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_0 |
| CELL[39].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_5 |
| CELL[39].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_4 |
| CELL[39].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_1 |
| CELL[39].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_7 |
| CELL[39].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_3 |
| CELL[39].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_2 |
| CELL[39].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_7 |
| CELL[39].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_1 |
| CELL[39].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_4 |
| CELL[39].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST5 |
| CELL[39].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST2 |
| CELL[39].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST5 |
| CELL[39].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST2 |
| CELL[39].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[39].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_4 |
| CELL[39].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_2 |
| CELL[39].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_1 |
| CELL[39].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_3 |
| CELL[39].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ1_7 |
| CELL[39].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_6 |
| CELL[39].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_2 |
| CELL[39].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_0 |
| CELL[39].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_3 |
| CELL[39].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P4_CLB2PHY_WR_DQ0_5 |
| CELL[39].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_7 |
| CELL[39].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_5 |
| CELL[39].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_1 |
| CELL[39].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_0 |
| CELL[39].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_4 |
| CELL[39].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_215_208_NIB3_CLB2PHY_WR_DQ0_6 |
| CELL[39].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_5 |
| CELL[39].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_3 |
| CELL[39].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_0 |
| CELL[39].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_2 |
| CELL[39].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_WDATA_223_216_NIB3_CLB2PHY_WR_DQ1_6 |
| CELL[39].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RST |
| CELL[39].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST4 |
| CELL[39].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST3 |
| CELL[39].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST1 |
| CELL[39].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_TXBIT_RST0 |
| CELL[39].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST4 |
| CELL[39].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST3 |
| CELL[39].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST1 |
| CELL[39].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_RXBIT_RST0 |
| CELL[39].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[39].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[40].OUT_BEL[0] | LPDDRMC.AXI0_RDATA_215_208_NIB3_PHY2CLB_RD_DQ0_6 |
| CELL[40].OUT_BEL[1] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_7 |
| CELL[40].OUT_BEL[2] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_5 |
| CELL[40].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_3 |
| CELL[40].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_1 |
| CELL[40].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_0 |
| CELL[40].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_2 |
| CELL[40].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_4 |
| CELL[40].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_223_216_NIB3_PHY2CLB_RD_DQ1_6 |
| CELL[40].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_7 |
| CELL[40].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_5 |
| CELL[40].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_3 |
| CELL[40].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_1 |
| CELL[40].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_0 |
| CELL[40].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_2 |
| CELL[40].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_4 |
| CELL[40].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_231_224_NIB3_PHY2CLB_RD_DQ2_6 |
| CELL[40].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_7 |
| CELL[40].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_5 |
| CELL[40].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_3 |
| CELL[40].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_1 |
| CELL[40].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_0 |
| CELL[40].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_2 |
| CELL[40].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_4 |
| CELL[40].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_239_232_NIB3_PHY2CLB_RD_DQ3_6 |
| CELL[40].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_FIFO_EMPTY |
| CELL[40].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_FIXDLY_RDY |
| CELL[40].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_PHY_RDY |
| CELL[40].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_GT_STATUS |
| CELL[40].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_MASTER_PD |
| CELL[40].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT5 |
| CELL[40].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT4 |
| CELL[40].IMUX_BYP_DELAY[7] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CLK_B |
| CELL[40].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG6 |
| CELL[40].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[40].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE5 |
| CELL[40].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE2 |
| CELL[40].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE5 |
| CELL[40].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_5 |
| CELL[40].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_0 |
| CELL[40].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_6 |
| CELL[40].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE1 |
| CELL[40].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC4 |
| CELL[40].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC1 |
| CELL[40].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD4 |
| CELL[40].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD1 |
| CELL[40].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[40].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[40].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[40].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[40].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[40].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[40].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE4 |
| CELL[40].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE3 |
| CELL[40].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE1 |
| CELL[40].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IBUF_DISABLE0 |
| CELL[40].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE4 |
| CELL[40].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_7 |
| CELL[40].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_3 |
| CELL[40].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_1 |
| CELL[40].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_2 |
| CELL[40].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_231_224_NIB3_CLB2PHY_WR_DQ2_4 |
| CELL[40].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE3 |
| CELL[40].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE2 |
| CELL[40].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_CE0 |
| CELL[40].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC5 |
| CELL[40].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC3 |
| CELL[40].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC2 |
| CELL[40].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_INC0 |
| CELL[40].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD5 |
| CELL[40].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD3 |
| CELL[40].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD2 |
| CELL[40].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_IODELAY_LD0 |
| CELL[40].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[40].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[40].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[40].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[40].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[40].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[40].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[40].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[40].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[41].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT3 |
| CELL[41].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT2 |
| CELL[41].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT1 |
| CELL[41].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P3_IOB2CLB_DFT0 |
| CELL[41].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_2 |
| CELL[41].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_1 |
| CELL[41].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_0_0 |
| CELL[41].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_2 |
| CELL[41].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_1 |
| CELL[41].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P3_PHY2CLB_LP_I_1_0 |
| CELL[41].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P3_RIU2CLB_VALID |
| CELL[41].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_7 |
| CELL[41].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_5 |
| CELL[41].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_3 |
| CELL[41].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_1 |
| CELL[41].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_0 |
| CELL[41].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_2 |
| CELL[41].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_4 |
| CELL[41].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_247_240_NIB3_PHY2CLB_RD_DQ4_6 |
| CELL[41].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_7 |
| CELL[41].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_5 |
| CELL[41].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_3 |
| CELL[41].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_1 |
| CELL[41].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_0 |
| CELL[41].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_2 |
| CELL[41].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_4 |
| CELL[41].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_255_248_NIB3_PHY2CLB_RD_DQ5_6 |
| CELL[41].OUT_BEL[27] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[41].OUT_BEL[28] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[41].OUT_BEL[29] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[41].OUT_BEL[30] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[41].OUT_BEL[31] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[41].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN4 |
| CELL[41].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_3 |
| CELL[41].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_2 |
| CELL[41].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[41].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_3 |
| CELL[41].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_2 |
| CELL[41].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_7 |
| CELL[41].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_1 |
| CELL[41].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_4 |
| CELL[41].IMUX_IMUX_DELAY[9] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[41].IMUX_IMUX_DELAY[10] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[41].IMUX_IMUX_DELAY[11] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[41].IMUX_IMUX_DELAY[12] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[41].IMUX_IMUX_DELAY[13] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[41].IMUX_IMUX_DELAY[14] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[41].IMUX_IMUX_DELAY[15] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[41].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_7 |
| CELL[41].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_5 |
| CELL[41].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_1 |
| CELL[41].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_0 |
| CELL[41].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_4 |
| CELL[41].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WDATA_239_232_NIB3_CLB2PHY_WR_DQ3_6 |
| CELL[41].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_7 |
| CELL[41].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_5 |
| CELL[41].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_1 |
| CELL[41].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_0 |
| CELL[41].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_4 |
| CELL[41].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_247_240_NIB3_CLB2PHY_WR_DQ4_6 |
| CELL[41].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_5 |
| CELL[41].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_3 |
| CELL[41].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_0 |
| CELL[41].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_2 |
| CELL[41].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_255_248_NIB3_CLB2PHY_WR_DQ5_6 |
| CELL[41].IMUX_IMUX_DELAY[33] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[41].IMUX_IMUX_DELAY[34] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[41].IMUX_IMUX_DELAY[35] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[41].IMUX_IMUX_DELAY[36] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[41].IMUX_IMUX_DELAY[37] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[41].IMUX_IMUX_DELAY[38] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[41].IMUX_IMUX_DELAY[39] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[41].IMUX_IMUX_DELAY[40] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[41].IMUX_IMUX_DELAY[41] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[41].IMUX_IMUX_DELAY[42] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[41].IMUX_IMUX_DELAY[43] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[41].IMUX_IMUX_DELAY[44] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[41].IMUX_IMUX_DELAY[45] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[41].IMUX_IMUX_DELAY[46] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[41].IMUX_IMUX_DELAY[47] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[42].OUT_BEL[0] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[42].OUT_BEL[1] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[42].OUT_BEL[2] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[42].OUT_BEL[3] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[42].OUT_BEL[4] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[42].OUT_BEL[5] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[42].OUT_BEL[6] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[42].OUT_BEL[7] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[42].OUT_BEL[8] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[42].OUT_BEL[9] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[42].OUT_BEL[10] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[42].OUT_BEL[11] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[42].OUT_BEL[12] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[42].OUT_BEL[13] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[42].OUT_BEL[14] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[42].OUT_BEL[15] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[42].OUT_BEL[16] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[42].OUT_BEL[17] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[42].OUT_BEL[18] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[42].OUT_BEL[19] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[42].OUT_BEL[20] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[42].OUT_BEL[21] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[42].OUT_BEL[22] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[42].OUT_BEL[23] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[42].OUT_BEL[24] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[42].OUT_BEL[25] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[42].OUT_BEL[26] | LPDDRMC.MAXI_DCWDATA_31_0_NIB3_31_0_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[42].OUT_BEL[27] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[42].OUT_BEL[28] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[42].OUT_BEL[29] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[42].OUT_BEL[30] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[42].OUT_BEL[31] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[42].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN5 |
| CELL[42].IMUX_IMUX_DELAY[0] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[42].IMUX_IMUX_DELAY[1] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[42].IMUX_IMUX_DELAY[2] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[42].IMUX_IMUX_DELAY[3] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[42].IMUX_IMUX_DELAY[4] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[42].IMUX_IMUX_DELAY[5] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[42].IMUX_IMUX_DELAY[6] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[42].IMUX_IMUX_DELAY[7] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[42].IMUX_IMUX_DELAY[8] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[42].IMUX_IMUX_DELAY[9] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[42].IMUX_IMUX_DELAY[10] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[42].IMUX_IMUX_DELAY[11] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[42].IMUX_IMUX_DELAY[12] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[42].IMUX_IMUX_DELAY[13] | LPDDRMC.MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_1 |
| CELL[42].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA15 |
| CELL[42].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA12 |
| CELL[42].IMUX_IMUX_DELAY[16] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[42].IMUX_IMUX_DELAY[17] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[42].IMUX_IMUX_DELAY[18] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[42].IMUX_IMUX_DELAY[19] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[42].IMUX_IMUX_DELAY[20] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[42].IMUX_IMUX_DELAY[21] | LPDDRMC.MAXI_DCRDATA_31_0_NIB3_31_0_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[42].IMUX_IMUX_DELAY[22] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[42].IMUX_IMUX_DELAY[23] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[42].IMUX_IMUX_DELAY[24] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[42].IMUX_IMUX_DELAY[25] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[42].IMUX_IMUX_DELAY[26] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[42].IMUX_IMUX_DELAY[27] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[42].IMUX_IMUX_DELAY[28] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[42].IMUX_IMUX_DELAY[29] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[42].IMUX_IMUX_DELAY[30] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[42].IMUX_IMUX_DELAY[31] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[42].IMUX_IMUX_DELAY[32] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[42].IMUX_IMUX_DELAY[33] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[42].IMUX_IMUX_DELAY[34] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[42].IMUX_IMUX_DELAY[35] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[42].IMUX_IMUX_DELAY[36] | LPDDRMC.MAXI_ICRDATA_21_0_NIB3_53_32_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[42].IMUX_IMUX_DELAY[37] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[42].IMUX_IMUX_DELAY[38] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[42].IMUX_IMUX_DELAY[39] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[42].IMUX_IMUX_DELAY[40] | LPDDRMC.MAXI_ICRDATA_27_22_NIB3_5_0_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[42].IMUX_IMUX_DELAY[41] | LPDDRMC.MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_2 |
| CELL[42].IMUX_IMUX_DELAY[42] | LPDDRMC.MAXI_ICRDATA_30_28_NIB3_2_0_CLB2PHY_PD_EN_1_0 |
| CELL[42].IMUX_IMUX_DELAY[43] | LPDDRMC.MAXI_ICRDATA_31_NIB3_CLB2RIU_WR_EN |
| CELL[42].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA14 |
| CELL[42].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA13 |
| CELL[42].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA11 |
| CELL[42].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA10 |
| CELL[43].OUT_BEL[2] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[43].OUT_BEL[3] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[43].OUT_BEL[4] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[43].OUT_BEL[5] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[43].OUT_BEL[6] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[43].OUT_BEL[7] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[43].OUT_BEL[8] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[43].OUT_BEL[9] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[43].OUT_BEL[10] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[43].OUT_BEL[11] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[43].OUT_BEL[12] | LPDDRMC.MAXI_ICARADDR_15_0_NIB3_47_32_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[43].OUT_BEL[13] | LPDDRMC.MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[43].OUT_BEL[14] | LPDDRMC.MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[43].OUT_BEL[15] | LPDDRMC.MAXI_ICARSIZE_2_0_NIB3_50_48_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[43].OUT_BEL[16] | LPDDRMC.MAXI_ICARBURST_1_0_NIB3_52_51_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[43].OUT_BEL[17] | LPDDRMC.MAXI_ICARBURST_1_0_NIB3_52_51_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[43].OUT_BEL[18] | LPDDRMC.MAXI_ICARVALID_NIB3_53_PHY2CLB_IODELAY_CNTVALUEOUT |
| CELL[43].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA15 |
| CELL[43].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA14 |
| CELL[43].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA13 |
| CELL[43].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA12 |
| CELL[43].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA11 |
| CELL[43].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA10 |
| CELL[43].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA9 |
| CELL[43].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA8 |
| CELL[43].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA7 |
| CELL[43].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA6 |
| CELL[43].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA5 |
| CELL[43].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA4 |
| CELL[43].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA3 |
| CELL[43].IMUX_CTRL[0] | LPDDRMC.IF_UBLAZE_FABRIC_BLI2UB_CLK |
| CELL[43].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN6 |
| CELL[43].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA9 |
| CELL[43].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA7 |
| CELL[43].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA4 |
| CELL[43].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA1 |
| CELL[43].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR6 |
| CELL[43].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR3 |
| CELL[43].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR0 |
| CELL[43].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN1 |
| CELL[43].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT4 |
| CELL[43].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT1 |
| CELL[43].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN3 |
| CELL[43].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN0 |
| CELL[43].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL3 |
| CELL[43].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL0 |
| CELL[43].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[43].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN5 |
| CELL[43].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA8 |
| CELL[43].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2RIU_NIBBLE_SEL |
| CELL[43].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA6 |
| CELL[43].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA5 |
| CELL[43].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA3 |
| CELL[43].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA2 |
| CELL[43].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_207_192_NIB3_CLB2RIU_WR_DATA0 |
| CELL[43].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR7 |
| CELL[43].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR5 |
| CELL[43].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR4 |
| CELL[43].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR2 |
| CELL[43].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WSTRB_31_24_NIB3_CLB2RIU_ADDR1 |
| CELL[43].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN3 |
| CELL[43].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN2 |
| CELL[43].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_AWADDR_36_33_NIB3_CLB2PHY_WREN0 |
| CELL[43].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT5 |
| CELL[43].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT3 |
| CELL[43].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT2 |
| CELL[43].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_AWADDR_42_37_NIB3_CLB2PHY_T_TXBIT0 |
| CELL[43].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_AWADDR_43_NIB3_CLB2PHY_FIFO_RDEN |
| CELL[43].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN2 |
| CELL[43].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_ARADDR_36_33_NIB3_CLB2PHY_RDEN1 |
| CELL[43].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL5 |
| CELL[43].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL4 |
| CELL[43].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL2 |
| CELL[43].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_ARADDR_42_37_NIB3_CLB2PHY_IODELAY_SEL1 |
| CELL[43].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_ARADDR_43_NIB3_CLB2PHY_DLYCTL_EN_VTC |
| CELL[43].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[43].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[43].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[43].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN4 |
| CELL[43].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN3 |
| CELL[44].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA2 |
| CELL[44].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA1 |
| CELL[44].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_207_192_NIB3_RIU2CLB_RD_DATA0 |
| CELL[44].OUT_BEL[6] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN2 |
| CELL[44].OUT_BEL[7] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN1 |
| CELL[44].OUT_BEL[8] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN0 |
| CELL[44].OUT_BEL[9] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_RREADY |
| CELL[44].OUT_BEL[10] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE1 |
| CELL[44].OUT_BEL[11] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_AWVALID |
| CELL[44].OUT_BEL[12] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_WLAST |
| CELL[44].OUT_BEL[13] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_WVALID |
| CELL[44].OUT_BEL[14] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_BREADY |
| CELL[44].OUT_BEL[15] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE1 |
| CELL[44].OUT_BEL[16] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARBURST1 |
| CELL[44].OUT_BEL[17] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARVALID |
| CELL[44].OUT_BEL[18] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_RREADY |
| CELL[44].OUT_BEL[19] | LPDDRMC.IF_UBLAZE_FABRIC_UB_MISC_OUT1 |
| CELL[44].OUT_BEL[20] | LPDDRMC.IF_UBLAZE_FABRIC_UB_MISC_OUT0 |
| CELL[44].OUT_BEL[21] | LPDDRMC.IF_UBLAZE_FABRIC_UB2BLI_SELF_REF_DONE |
| CELL[44].OUT_BEL[22] | LPDDRMC.IF_UBLAZE_FABRIC_UB2BLI_DRAM_POWER_OFF_DONE |
| CELL[44].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_FIFO_EMPTY |
| CELL[44].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_FIXDLY_RDY |
| CELL[44].OUT_BEL[25] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_TDO |
| CELL[44].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_PHY_RDY |
| CELL[44].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_GT_STATUS |
| CELL[44].OUT_BEL[28] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARBURST0 |
| CELL[44].OUT_BEL[29] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE0 |
| CELL[44].OUT_BEL[30] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARSIZE2 |
| CELL[44].OUT_BEL[31] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE0 |
| CELL[44].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN6 |
| CELL[44].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN4 |
| CELL[44].IMUX_BYP_DELAY[11] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT11 |
| CELL[44].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN2 |
| CELL[44].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARREADY |
| CELL[44].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_RRESP0 |
| CELL[44].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_WREADY |
| CELL[44].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_BVALID |
| CELL[44].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_RRESP1 |
| CELL[44].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_UBLAZE_FABRIC_BLI2UB_RST |
| CELL[44].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_UBLAZE_FABRIC_UB_MISC_IN0 |
| CELL[44].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_CAPTURE |
| CELL[44].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_SEL |
| CELL[44].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_TDI |
| CELL[44].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA15 |
| CELL[44].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA12 |
| CELL[44].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA9 |
| CELL[44].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA6 |
| CELL[44].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA3 |
| CELL[44].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN1 |
| CELL[44].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P3_CLB2PHY_KEEPER_EN0 |
| CELL[44].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_RLAST |
| CELL[44].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_RRESP1 |
| CELL[44].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_RVALID |
| CELL[44].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_AWREADY |
| CELL[44].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_BRESP1 |
| CELL[44].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_BRESP0 |
| CELL[44].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_ARREADY |
| CELL[44].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_RLAST |
| CELL[44].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_RRESP0 |
| CELL[44].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_RVALID |
| CELL[44].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_UBLAZE_FABRIC_UB_MISC_IN2 |
| CELL[44].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_UBLAZE_FABRIC_UB_MISC_IN1 |
| CELL[44].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_UBLAZE_FABRIC_BLI2UB_SELF_REF_REQ |
| CELL[44].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_UBLAZE_FABRIC_BLI2UB_DRAM_POWER_OFF_REQ |
| CELL[44].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_DRCK |
| CELL[44].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_RESET |
| CELL[44].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_SHIFT |
| CELL[44].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_TCK |
| CELL[44].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_TMS |
| CELL[44].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_UBLAZE_FABRIC_BSCAN_EXT_UPDATE |
| CELL[44].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA14 |
| CELL[44].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA13 |
| CELL[44].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA11 |
| CELL[44].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA10 |
| CELL[44].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA8 |
| CELL[44].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA7 |
| CELL[44].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA5 |
| CELL[44].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA4 |
| CELL[44].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA2 |
| CELL[44].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA1 |
| CELL[45].OUT_BEL[3] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_DC_AWSIZE2 |
| CELL[45].OUT_BEL[4] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN3 |
| CELL[45].OUT_BEL[5] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN4 |
| CELL[45].OUT_BEL[6] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN5 |
| CELL[45].OUT_BEL[7] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN6 |
| CELL[45].OUT_BEL[8] | LPDDRMC.IF_UBLAZE_FABRIC_M_AXI_IC_ARLEN7 |
| CELL[45].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_MASTER_PD |
| CELL[45].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT5 |
| CELL[45].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT4 |
| CELL[45].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT3 |
| CELL[45].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT2 |
| CELL[45].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT1 |
| CELL[45].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P2_IOB2CLB_DFT0 |
| CELL[45].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_2 |
| CELL[45].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_1 |
| CELL[45].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_0_0 |
| CELL[45].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_2 |
| CELL[45].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_1 |
| CELL[45].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P2_PHY2CLB_LP_I_1_0 |
| CELL[45].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P2_RIU2CLB_VALID |
| CELL[45].OUT_BEL[24] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[45].OUT_BEL[25] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[45].OUT_BEL[26] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[45].OUT_BEL[27] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[45].OUT_BEL[28] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[45].OUT_BEL[29] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[45].OUT_BEL[30] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[45].OUT_BEL[31] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[45].IMUX_BYP_DELAY[8] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT12 |
| CELL[45].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN2 |
| CELL[45].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN8 |
| CELL[45].IMUX_BYP_DELAY[11] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT7 |
| CELL[45].IMUX_BYP_DELAY[12] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_EDT_UPDT_B |
| CELL[45].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI0_WDATA_143_128_NIB2_CLB2RIU_WR_DATA0 |
| CELL[45].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR5 |
| CELL[45].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR2 |
| CELL[45].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN3 |
| CELL[45].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN0 |
| CELL[45].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT3 |
| CELL[45].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT0 |
| CELL[45].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN2 |
| CELL[45].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL5 |
| CELL[45].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL2 |
| CELL[45].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_ARADDR_32_NIB2_CLB2PHY_DLYCTL_EN_VTC |
| CELL[45].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[45].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[45].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[45].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[45].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[45].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR7 |
| CELL[45].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR6 |
| CELL[45].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR4 |
| CELL[45].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR3 |
| CELL[45].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR1 |
| CELL[45].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WSTRB_23_16_NIB2_CLB2RIU_ADDR0 |
| CELL[45].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN2 |
| CELL[45].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_AWADDR_25_22_NIB2_CLB2PHY_WREN1 |
| CELL[45].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT5 |
| CELL[45].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT4 |
| CELL[45].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT2 |
| CELL[45].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_AWADDR_31_26_NIB2_CLB2PHY_T_TXBIT1 |
| CELL[45].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_AWADDR_32_NIB2_CLB2PHY_FIFO_RDEN |
| CELL[45].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN3 |
| CELL[45].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN1 |
| CELL[45].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_ARADDR_25_22_NIB2_CLB2PHY_RDEN0 |
| CELL[45].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL4 |
| CELL[45].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL3 |
| CELL[45].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL1 |
| CELL[45].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_ARADDR_31_26_NIB2_CLB2PHY_IODELAY_SEL0 |
| CELL[45].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[45].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[45].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[45].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[45].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[45].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_ARID_7_0_NIB2_7_0_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[45].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[45].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[45].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[45].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[45].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_ARLEN_7_0_NIB2_15_8_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[45].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[46].OUT_BEL[3] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[46].OUT_BEL[4] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[46].OUT_BEL[5] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[46].OUT_BEL[6] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[46].OUT_BEL[7] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[46].OUT_BEL[8] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[46].OUT_BEL[9] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[46].OUT_BEL[10] | LPDDRMC.MAXI_DCAWADDR_15_0_NIB2_15_0_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[46].OUT_BEL[11] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[46].OUT_BEL[12] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[46].OUT_BEL[13] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[46].OUT_BEL[14] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[46].OUT_BEL[15] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[46].OUT_BEL[16] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[46].OUT_BEL[17] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[46].OUT_BEL[18] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[46].OUT_BEL[19] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[46].OUT_BEL[20] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[46].OUT_BEL[21] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[46].OUT_BEL[22] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[46].OUT_BEL[23] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[46].OUT_BEL[24] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[46].OUT_BEL[25] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[46].OUT_BEL[26] | LPDDRMC.MAXI_DCARADDR_15_0_NIB2_31_16_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[46].OUT_BEL[27] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[46].OUT_BEL[28] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[46].OUT_BEL[29] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[46].OUT_BEL[30] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[46].OUT_BEL[31] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[46].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2MC_DIV_CLK |
| CELL[46].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_FIFO_CLK |
| CELL[46].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_CTRL_CLK |
| CELL[46].IMUX_IMUX_DELAY[0] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[46].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[46].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[46].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[46].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[46].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[46].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[46].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[46].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[46].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[46].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[46].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[46].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[46].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN3 |
| CELL[46].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN0 |
| CELL[46].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RST |
| CELL[46].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[46].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[46].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[46].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[46].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[46].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_ARUSER_10_0_NIB2_26_16_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[46].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[46].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[46].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[46].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[46].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[46].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_AWID_7_0_NIB2_34_27_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[46].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[46].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[46].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[46].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[46].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_AWLEN_7_0_NIB2_42_35_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[46].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[46].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[46].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[46].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[46].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[46].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[46].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_AWUSER_10_0_NIB2_53_43_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[46].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN5 |
| CELL[46].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN4 |
| CELL[46].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN2 |
| CELL[46].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_PAR_5_0_NIB2_CLB2PHY_KEEPER_EN1 |
| CELL[46].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_PAR_7_6_NIB2_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[46].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_PAR_7_6_NIB2_1_0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[46].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST5 |
| CELL[46].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST4 |
| CELL[47].OUT_BEL[3] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[47].OUT_BEL[4] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[5] | LPDDRMC.MAXI_DCAWLEN_7_0_NIB2_39_32_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[6] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[47].OUT_BEL[7] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[47].OUT_BEL[8] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[47].OUT_BEL[9] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[47].OUT_BEL[10] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[47].OUT_BEL[11] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[47].OUT_BEL[12] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[13] | LPDDRMC.MAXI_DCARLEN_7_0_NIB2_47_40_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[14] | LPDDRMC.MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[47].OUT_BEL[15] | LPDDRMC.MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[47].OUT_BEL[16] | LPDDRMC.MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[17] | LPDDRMC.MAXI_DCWSTRB_3_0_NIB2_51_48_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[18] | LPDDRMC.MAXI_DCAWBURST_1_0_NIB2_53_52_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[47].OUT_BEL[19] | LPDDRMC.MAXI_DCAWBURST_1_0_NIB2_53_52_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[47].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA15 |
| CELL[47].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA14 |
| CELL[47].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA13 |
| CELL[47].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA12 |
| CELL[47].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA11 |
| CELL[47].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA10 |
| CELL[47].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA9 |
| CELL[47].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA8 |
| CELL[47].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA7 |
| CELL[47].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA6 |
| CELL[47].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA5 |
| CELL[47].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA4 |
| CELL[47].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST1 |
| CELL[47].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST4 |
| CELL[47].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST1 |
| CELL[47].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[47].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[47].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE4 |
| CELL[47].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE1 |
| CELL[47].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE4 |
| CELL[47].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE1 |
| CELL[47].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC4 |
| CELL[47].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC1 |
| CELL[47].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD4 |
| CELL[47].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD1 |
| CELL[47].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_6 |
| CELL[47].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_0 |
| CELL[47].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST3 |
| CELL[47].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST2 |
| CELL[47].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_TXBIT_RST0 |
| CELL[47].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST5 |
| CELL[47].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST3 |
| CELL[47].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST2 |
| CELL[47].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_RXBIT_RST0 |
| CELL[47].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[47].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[47].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[47].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[47].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE5 |
| CELL[47].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE3 |
| CELL[47].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE2 |
| CELL[47].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IBUF_DISABLE0 |
| CELL[47].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE5 |
| CELL[47].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE3 |
| CELL[47].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE2 |
| CELL[47].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_CE0 |
| CELL[47].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC5 |
| CELL[47].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC3 |
| CELL[47].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC2 |
| CELL[47].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_INC0 |
| CELL[47].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD5 |
| CELL[47].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD3 |
| CELL[47].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD2 |
| CELL[47].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IODELAY_LD0 |
| CELL[47].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[47].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_4 |
| CELL[47].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_2 |
| CELL[47].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_1 |
| CELL[47].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_3 |
| CELL[48].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA3 |
| CELL[48].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA2 |
| CELL[48].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA1 |
| CELL[48].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_143_128_NIB2_RIU2CLB_RD_DATA0 |
| CELL[48].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_6 |
| CELL[48].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_4 |
| CELL[48].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_2 |
| CELL[48].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_0 |
| CELL[48].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_1 |
| CELL[48].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_3 |
| CELL[48].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_5 |
| CELL[48].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_191_184_NIB2_PHY2CLB_RD_DQ5_7 |
| CELL[48].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_6 |
| CELL[48].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_4 |
| CELL[48].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_2 |
| CELL[48].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_0 |
| CELL[48].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_1 |
| CELL[48].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_3 |
| CELL[48].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_5 |
| CELL[48].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_183_176_NIB2_PHY2CLB_RD_DQ4_7 |
| CELL[48].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_6 |
| CELL[48].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_4 |
| CELL[48].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_2 |
| CELL[48].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_0 |
| CELL[48].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_1 |
| CELL[48].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_3 |
| CELL[48].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_5 |
| CELL[48].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_175_168_NIB2_PHY2CLB_RD_DQ3_7 |
| CELL[48].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_6 |
| CELL[48].IMUX_CTRL[0] | LPDDRMC.AXIA0_CLK |
| CELL[48].IMUX_BYP_DELAY[9] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT10 |
| CELL[48].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_CNTRL_CHNL_IN8 |
| CELL[48].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[48].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[48].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_6 |
| CELL[48].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_0 |
| CELL[48].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_5 |
| CELL[48].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_4 |
| CELL[48].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_1 |
| CELL[48].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_7 |
| CELL[48].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[48].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[48].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_2 |
| CELL[48].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_3 |
| CELL[48].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2RIU_NIBBLE_SEL |
| CELL[48].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_2 |
| CELL[48].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_3 |
| CELL[48].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_5 |
| CELL[48].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_WDATA_191_184_NIB2_CLB2PHY_WR_DQ5_7 |
| CELL[48].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[48].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[48].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[48].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[48].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_4 |
| CELL[48].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_2 |
| CELL[48].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_1 |
| CELL[48].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_3 |
| CELL[48].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_183_176_NIB2_CLB2PHY_WR_DQ4_7 |
| CELL[48].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_6 |
| CELL[48].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_2 |
| CELL[48].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_0 |
| CELL[48].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_3 |
| CELL[48].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_175_168_NIB2_CLB2PHY_WR_DQ3_5 |
| CELL[48].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[48].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[48].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[48].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[48].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_6 |
| CELL[48].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_4 |
| CELL[48].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_0 |
| CELL[48].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_1 |
| CELL[48].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_5 |
| CELL[48].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_167_160_NIB2_CLB2PHY_WR_DQ2_7 |
| CELL[48].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_6 |
| CELL[48].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_4 |
| CELL[48].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_0 |
| CELL[48].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_1 |
| CELL[48].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_5 |
| CELL[48].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_159_152_NIB2_CLB2PHY_WR_DQ1_7 |
| CELL[49].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_4 |
| CELL[49].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_2 |
| CELL[49].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_0 |
| CELL[49].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_1 |
| CELL[49].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_3 |
| CELL[49].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_5 |
| CELL[49].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_167_160_NIB2_PHY2CLB_RD_DQ2_7 |
| CELL[49].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_6 |
| CELL[49].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_4 |
| CELL[49].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_2 |
| CELL[49].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_0 |
| CELL[49].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_1 |
| CELL[49].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_3 |
| CELL[49].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_5 |
| CELL[49].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_159_152_NIB2_PHY2CLB_RD_DQ1_7 |
| CELL[49].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_6 |
| CELL[49].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_4 |
| CELL[49].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_2 |
| CELL[49].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_0 |
| CELL[49].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_1 |
| CELL[49].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_3 |
| CELL[49].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_5 |
| CELL[49].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_151_144_NIB2_PHY2CLB_RD_DQ0_7 |
| CELL[49].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_7 |
| CELL[49].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_5 |
| CELL[49].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_3 |
| CELL[49].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_1 |
| CELL[49].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_0 |
| CELL[49].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_2 |
| CELL[49].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2MC_DIV_CLK |
| CELL[49].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_CTRL_CLK |
| CELL[49].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_FIFO_CLK |
| CELL[49].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG5 |
| CELL[49].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CLK_N_EXT |
| CELL[49].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[49].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_2 |
| CELL[49].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_0_BIT2 |
| CELL[49].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[49].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_4 |
| CELL[49].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_1 |
| CELL[49].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_7 |
| CELL[49].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_3 |
| CELL[49].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_2 |
| CELL[49].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RST |
| CELL[49].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST3 |
| CELL[49].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST0 |
| CELL[49].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST3 |
| CELL[49].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST0 |
| CELL[49].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_5 |
| CELL[49].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[49].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[49].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[49].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[49].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_1 |
| CELL[49].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_PD_EN_1_0 |
| CELL[49].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[49].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[49].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P2_CLB2RIU_WR_EN |
| CELL[49].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_6 |
| CELL[49].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_2 |
| CELL[49].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_0 |
| CELL[49].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_3 |
| CELL[49].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_151_144_NIB2_CLB2PHY_WR_DQ0_5 |
| CELL[49].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_7 |
| CELL[49].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_5 |
| CELL[49].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_1 |
| CELL[49].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_0 |
| CELL[49].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_4 |
| CELL[49].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_WDATA_87_80_NIB1_CLB2PHY_WR_DQ0_6 |
| CELL[49].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST5 |
| CELL[49].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST4 |
| CELL[49].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST2 |
| CELL[49].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_TXBIT_RST1 |
| CELL[49].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST5 |
| CELL[49].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST4 |
| CELL[49].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST2 |
| CELL[49].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_RXBIT_RST1 |
| CELL[49].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[49].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_7 |
| CELL[49].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_3 |
| CELL[49].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_1 |
| CELL[50].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_4 |
| CELL[50].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_87_80_NIB1_PHY2CLB_RD_DQ0_6 |
| CELL[50].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_7 |
| CELL[50].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_5 |
| CELL[50].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_3 |
| CELL[50].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_1 |
| CELL[50].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_0 |
| CELL[50].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_2 |
| CELL[50].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_4 |
| CELL[50].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_95_88_NIB1_PHY2CLB_RD_DQ1_6 |
| CELL[50].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_7 |
| CELL[50].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_5 |
| CELL[50].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_3 |
| CELL[50].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_1 |
| CELL[50].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_0 |
| CELL[50].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_2 |
| CELL[50].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_4 |
| CELL[50].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_103_96_NIB1_PHY2CLB_RD_DQ2_6 |
| CELL[50].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_7 |
| CELL[50].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_5 |
| CELL[50].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_3 |
| CELL[50].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_1 |
| CELL[50].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_0 |
| CELL[50].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_2 |
| CELL[50].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_4 |
| CELL[50].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_111_104_NIB1_PHY2CLB_RD_DQ3_6 |
| CELL[50].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_7 |
| CELL[50].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_5 |
| CELL[50].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_3 |
| CELL[50].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_4 |
| CELL[50].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[50].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[50].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE3 |
| CELL[50].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE0 |
| CELL[50].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE3 |
| CELL[50].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE0 |
| CELL[50].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC3 |
| CELL[50].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC0 |
| CELL[50].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD3 |
| CELL[50].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD0 |
| CELL[50].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_5 |
| CELL[50].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_0 |
| CELL[50].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_6 |
| CELL[50].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[50].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_0 |
| CELL[50].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_2 |
| CELL[50].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WDATA_95_88_NIB1_CLB2PHY_WR_DQ1_6 |
| CELL[50].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[50].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[50].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[50].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE5 |
| CELL[50].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE4 |
| CELL[50].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE2 |
| CELL[50].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IBUF_DISABLE1 |
| CELL[50].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE5 |
| CELL[50].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE4 |
| CELL[50].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE2 |
| CELL[50].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CE1 |
| CELL[50].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC5 |
| CELL[50].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC4 |
| CELL[50].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC2 |
| CELL[50].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_INC1 |
| CELL[50].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD5 |
| CELL[50].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD4 |
| CELL[50].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD2 |
| CELL[50].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_LD1 |
| CELL[50].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[50].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_7 |
| CELL[50].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_3 |
| CELL[50].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_1 |
| CELL[50].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_2 |
| CELL[50].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_103_96_NIB1_CLB2PHY_WR_DQ2_4 |
| CELL[50].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[50].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[50].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[50].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[51].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_1 |
| CELL[51].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_0 |
| CELL[51].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_2 |
| CELL[51].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_4 |
| CELL[51].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_119_112_NIB1_PHY2CLB_RD_DQ4_6 |
| CELL[51].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_FIFO_EMPTY |
| CELL[51].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_FIXDLY_RDY |
| CELL[51].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_PHY_RDY |
| CELL[51].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_GT_STATUS |
| CELL[51].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_MASTER_PD |
| CELL[51].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[51].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[51].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[51].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[51].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[51].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[51].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[51].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[51].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[51].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[51].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[51].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[51].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[51].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[51].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[51].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[51].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_7 |
| CELL[51].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_5 |
| CELL[51].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_3 |
| CELL[51].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT6 |
| CELL[51].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[51].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[51].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[51].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[51].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[51].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[51].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[51].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[51].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_3 |
| CELL[51].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_2 |
| CELL[51].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_7 |
| CELL[51].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_1 |
| CELL[51].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_4 |
| CELL[51].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_5 |
| CELL[51].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_0 |
| CELL[51].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[51].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[51].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[51].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[51].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[51].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[51].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[51].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[51].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[51].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[51].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[51].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[51].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[51].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[51].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[51].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[51].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_7 |
| CELL[51].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_5 |
| CELL[51].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_1 |
| CELL[51].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_0 |
| CELL[51].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_4 |
| CELL[51].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_WDATA_111_104_NIB1_CLB2PHY_WR_DQ3_6 |
| CELL[51].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_5 |
| CELL[51].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_3 |
| CELL[51].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_0 |
| CELL[51].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_2 |
| CELL[51].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_119_112_NIB1_CLB2PHY_WR_DQ4_6 |
| CELL[51].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_7 |
| CELL[51].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_3 |
| CELL[51].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_1 |
| CELL[51].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_2 |
| CELL[51].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_4 |
| CELL[52].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_1 |
| CELL[52].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_0 |
| CELL[52].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_2 |
| CELL[52].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_4 |
| CELL[52].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_127_120_NIB1_PHY2CLB_RD_DQ5_6 |
| CELL[52].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[52].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[52].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[52].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[52].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[52].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[52].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[52].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[52].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[52].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[52].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[52].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[52].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[52].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[52].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[52].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[52].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[52].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[52].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[52].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[52].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[52].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[52].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[52].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[52].IMUX_BYP_DELAY[6] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN8 |
| CELL[52].IMUX_BYP_DELAY[9] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN0 |
| CELL[52].IMUX_BYP_DELAY[10] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG2 |
| CELL[52].IMUX_BYP_DELAY[13] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN9 |
| CELL[52].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[52].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[52].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[52].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[52].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[52].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[52].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[52].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[52].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[52].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[52].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[52].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[52].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[52].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[52].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_1 |
| CELL[52].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_127_120_NIB1_CLB2PHY_WR_DQ5_6 |
| CELL[52].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[52].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[52].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[52].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[52].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[52].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[52].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[52].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[52].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[52].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[52].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[52].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[52].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[52].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[52].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[52].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[52].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[52].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[52].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[52].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[52].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[52].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[52].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[52].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[52].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[52].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[52].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[52].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[52].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_2 |
| CELL[52].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_PD_EN_1_0 |
| CELL[52].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[53].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[53].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[53].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[53].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[53].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[53].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[53].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[53].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[53].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[53].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[53].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[53].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[53].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[53].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[53].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT5 |
| CELL[53].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT4 |
| CELL[53].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT3 |
| CELL[53].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT2 |
| CELL[53].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT1 |
| CELL[53].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_IOB2CLB_DFT0 |
| CELL[53].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_2 |
| CELL[53].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_1 |
| CELL[53].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_0_0 |
| CELL[53].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_2 |
| CELL[53].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_1 |
| CELL[53].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P1_PHY2CLB_LP_I_1_0 |
| CELL[53].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P1_RIU2CLB_VALID |
| CELL[53].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA15 |
| CELL[53].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA14 |
| CELL[53].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[53].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN5 |
| CELL[53].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN2 |
| CELL[53].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2RIU_WR_EN |
| CELL[53].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA14 |
| CELL[53].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA11 |
| CELL[53].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA8 |
| CELL[53].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA5 |
| CELL[53].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA2 |
| CELL[53].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR7 |
| CELL[53].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR4 |
| CELL[53].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR1 |
| CELL[53].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN2 |
| CELL[53].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT5 |
| CELL[53].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT2 |
| CELL[53].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[53].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[53].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[53].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[53].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN4 |
| CELL[53].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN3 |
| CELL[53].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN1 |
| CELL[53].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2PHY_KEEPER_EN0 |
| CELL[53].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P1_CLB2RIU_NIBBLE_SEL |
| CELL[53].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA15 |
| CELL[53].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA13 |
| CELL[53].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA12 |
| CELL[53].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA10 |
| CELL[53].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA9 |
| CELL[53].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA7 |
| CELL[53].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA6 |
| CELL[53].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA4 |
| CELL[53].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA3 |
| CELL[53].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA1 |
| CELL[53].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_WDATA_79_64_NIB1_CLB2RIU_WR_DATA0 |
| CELL[53].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR6 |
| CELL[53].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR5 |
| CELL[53].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR3 |
| CELL[53].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR2 |
| CELL[53].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WSTRB_15_8_NIB1_CLB2RIU_ADDR0 |
| CELL[53].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN3 |
| CELL[53].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN1 |
| CELL[53].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_AWADDR_14_11_NIB1_CLB2PHY_WREN0 |
| CELL[53].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT4 |
| CELL[53].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT3 |
| CELL[53].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT1 |
| CELL[53].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_AWADDR_20_15_NIB1_CLB2PHY_T_TXBIT0 |
| CELL[54].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA13 |
| CELL[54].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA12 |
| CELL[54].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA11 |
| CELL[54].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA10 |
| CELL[54].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA9 |
| CELL[54].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA8 |
| CELL[54].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA7 |
| CELL[54].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA6 |
| CELL[54].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA5 |
| CELL[54].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA4 |
| CELL[54].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA3 |
| CELL[54].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA2 |
| CELL[54].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA1 |
| CELL[54].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_79_64_NIB1_RIU2CLB_RD_DATA0 |
| CELL[54].OUT_BEL[17] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARREADY |
| CELL[54].OUT_BEL[18] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWREADY |
| CELL[54].OUT_BEL[19] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WREADY |
| CELL[54].OUT_BEL[20] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RVALID |
| CELL[54].OUT_BEL[21] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RLAST |
| CELL[54].OUT_BEL[22] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID7 |
| CELL[54].OUT_BEL[23] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID6 |
| CELL[54].OUT_BEL[24] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID5 |
| CELL[54].OUT_BEL[25] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID4 |
| CELL[54].OUT_BEL[26] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID3 |
| CELL[54].OUT_BEL[27] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID2 |
| CELL[54].OUT_BEL[28] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID1 |
| CELL[54].OUT_BEL[29] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RID0 |
| CELL[54].OUT_BEL[30] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RRESP1 |
| CELL[54].OUT_BEL[31] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RRESP0 |
| CELL[54].IMUX_BYP_DELAY[10] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT10 |
| CELL[54].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN2 |
| CELL[54].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL5 |
| CELL[54].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL2 |
| CELL[54].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_ARADDR_21_NIB1_CLB2PHY_DLYCTL_EN_VTC |
| CELL[54].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE1 |
| CELL[54].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARBURST0 |
| CELL[54].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT1 |
| CELL[54].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARADDR_PAR0 |
| CELL[54].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE1 |
| CELL[54].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWBURST0 |
| CELL[54].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT1 |
| CELL[54].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWADDR_PAR0 |
| CELL[54].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WPOISON |
| CELL[54].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA15 |
| CELL[54].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA12 |
| CELL[54].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_AWADDR_21_NIB1_CLB2PHY_FIFO_RDEN |
| CELL[54].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN3 |
| CELL[54].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN1 |
| CELL[54].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_ARADDR_14_11_NIB1_CLB2PHY_RDEN0 |
| CELL[54].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL4 |
| CELL[54].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL3 |
| CELL[54].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL1 |
| CELL[54].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_ARADDR_20_15_NIB1_CLB2PHY_IODELAY_SEL0 |
| CELL[54].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARVALID |
| CELL[54].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE2 |
| CELL[54].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARSIZE0 |
| CELL[54].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARBURST1 |
| CELL[54].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARLOCK |
| CELL[54].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT2 |
| CELL[54].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARPROT0 |
| CELL[54].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_ARADDR_PAR1 |
| CELL[54].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWVALID |
| CELL[54].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE2 |
| CELL[54].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWSIZE0 |
| CELL[54].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWBURST1 |
| CELL[54].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWLOCK |
| CELL[54].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT2 |
| CELL[54].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWPROT0 |
| CELL[54].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_AWADDR_PAR1 |
| CELL[54].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WVALID |
| CELL[54].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_WLAST |
| CELL[54].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RREADY |
| CELL[54].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BREADY |
| CELL[54].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA14 |
| CELL[54].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA13 |
| CELL[54].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA11 |
| CELL[54].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA10 |
| CELL[55].OUT_BEL[3] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RPOISON |
| CELL[55].OUT_BEL[4] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR7 |
| CELL[55].OUT_BEL[5] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR6 |
| CELL[55].OUT_BEL[6] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR5 |
| CELL[55].OUT_BEL[7] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR4 |
| CELL[55].OUT_BEL[8] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR3 |
| CELL[55].OUT_BEL[9] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR2 |
| CELL[55].OUT_BEL[10] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR1 |
| CELL[55].OUT_BEL[11] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_RDATA_PAR0 |
| CELL[55].OUT_BEL[12] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BVALID |
| CELL[55].OUT_BEL[13] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID7 |
| CELL[55].OUT_BEL[14] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID6 |
| CELL[55].OUT_BEL[15] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID5 |
| CELL[55].OUT_BEL[16] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID4 |
| CELL[55].OUT_BEL[17] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID3 |
| CELL[55].OUT_BEL[18] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID2 |
| CELL[55].OUT_BEL[19] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID1 |
| CELL[55].OUT_BEL[20] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BID0 |
| CELL[55].OUT_BEL[21] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BRESP1 |
| CELL[55].OUT_BEL[22] | LPDDRMC.IF_LPDDRMC_RMUX_AXI_DC_TOP_P0_BRESP0 |
| CELL[55].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_FIFO_EMPTY |
| CELL[55].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_FIXDLY_RDY |
| CELL[55].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_PHY_RDY |
| CELL[55].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_GT_STATUS |
| CELL[55].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_MASTER_PD |
| CELL[55].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT53 |
| CELL[55].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT52 |
| CELL[55].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT51 |
| CELL[55].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT50 |
| CELL[55].IMUX_BYP_DELAY[7] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_EN_B |
| CELL[55].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN7 |
| CELL[55].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA7 |
| CELL[55].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA4 |
| CELL[55].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA1 |
| CELL[55].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR6 |
| CELL[55].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR3 |
| CELL[55].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR0 |
| CELL[55].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST4 |
| CELL[55].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST1 |
| CELL[55].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST4 |
| CELL[55].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST1 |
| CELL[55].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS4 |
| CELL[55].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS1 |
| CELL[55].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE4 |
| CELL[55].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE1 |
| CELL[55].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE4 |
| CELL[55].IMUX_IMUX_DELAY[16] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA9 |
| CELL[55].IMUX_IMUX_DELAY[17] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA8 |
| CELL[55].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA6 |
| CELL[55].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA5 |
| CELL[55].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA3 |
| CELL[55].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA2 |
| CELL[55].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_15_0_NIB0_CLB2RIU_WR_DATA0 |
| CELL[55].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR7 |
| CELL[55].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR5 |
| CELL[55].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR4 |
| CELL[55].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR2 |
| CELL[55].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WSTRB_7_0_NIB0_CLB2RIU_ADDR1 |
| CELL[55].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RST |
| CELL[55].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST5 |
| CELL[55].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST3 |
| CELL[55].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST2 |
| CELL[55].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_TXBIT_RST0 |
| CELL[55].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST5 |
| CELL[55].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST3 |
| CELL[55].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST2 |
| CELL[55].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_RXBIT_RST0 |
| CELL[55].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS5 |
| CELL[55].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS3 |
| CELL[55].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS2 |
| CELL[55].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_DYNAMIC_DCI_TS0 |
| CELL[55].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE5 |
| CELL[55].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE3 |
| CELL[55].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE2 |
| CELL[55].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IBUF_DISABLE0 |
| CELL[55].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE5 |
| CELL[55].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE3 |
| CELL[55].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE2 |
| CELL[56].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT49 |
| CELL[56].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT48 |
| CELL[56].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT47 |
| CELL[56].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT46 |
| CELL[56].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT45 |
| CELL[56].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT44 |
| CELL[56].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT43 |
| CELL[56].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT42 |
| CELL[56].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT41 |
| CELL[56].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT40 |
| CELL[56].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT39 |
| CELL[56].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT38 |
| CELL[56].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT37 |
| CELL[56].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT36 |
| CELL[56].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT35 |
| CELL[56].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT34 |
| CELL[56].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT33 |
| CELL[56].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT32 |
| CELL[56].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT31 |
| CELL[56].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT30 |
| CELL[56].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT29 |
| CELL[56].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT28 |
| CELL[56].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT27 |
| CELL[56].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT26 |
| CELL[56].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT25 |
| CELL[56].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT24 |
| CELL[56].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT23 |
| CELL[56].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT22 |
| CELL[56].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT21 |
| CELL[56].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT20 |
| CELL[56].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT19 |
| CELL[56].IMUX_CTRL[0] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2MC_DIV_CLK |
| CELL[56].IMUX_CTRL[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_CTRL_CLK |
| CELL[56].IMUX_CTRL[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_FIFO_CLK |
| CELL[56].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC5 |
| CELL[56].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC2 |
| CELL[56].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD5 |
| CELL[56].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD2 |
| CELL[56].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN53 |
| CELL[56].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN50 |
| CELL[56].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN47 |
| CELL[56].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN44 |
| CELL[56].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN41 |
| CELL[56].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN38 |
| CELL[56].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN35 |
| CELL[56].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN32 |
| CELL[56].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN29 |
| CELL[56].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN26 |
| CELL[56].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN23 |
| CELL[56].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE1 |
| CELL[56].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CE0 |
| CELL[56].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC4 |
| CELL[56].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC3 |
| CELL[56].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC1 |
| CELL[56].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_INC0 |
| CELL[56].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD4 |
| CELL[56].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD3 |
| CELL[56].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD1 |
| CELL[56].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_LD0 |
| CELL[56].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN52 |
| CELL[56].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN51 |
| CELL[56].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN49 |
| CELL[56].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN48 |
| CELL[56].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN46 |
| CELL[56].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN45 |
| CELL[56].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN43 |
| CELL[56].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN42 |
| CELL[56].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN40 |
| CELL[56].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN39 |
| CELL[56].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN37 |
| CELL[56].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN36 |
| CELL[56].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN34 |
| CELL[56].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN33 |
| CELL[56].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN31 |
| CELL[56].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN30 |
| CELL[56].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN28 |
| CELL[56].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN27 |
| CELL[56].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN25 |
| CELL[56].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN24 |
| CELL[56].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN22 |
| CELL[56].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN21 |
| CELL[57].OUT_BEL[0] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT18 |
| CELL[57].OUT_BEL[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT17 |
| CELL[57].OUT_BEL[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT16 |
| CELL[57].OUT_BEL[3] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT15 |
| CELL[57].OUT_BEL[4] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT14 |
| CELL[57].OUT_BEL[5] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT13 |
| CELL[57].OUT_BEL[6] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT12 |
| CELL[57].OUT_BEL[7] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT11 |
| CELL[57].OUT_BEL[8] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT10 |
| CELL[57].OUT_BEL[9] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT9 |
| CELL[57].OUT_BEL[10] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT8 |
| CELL[57].OUT_BEL[11] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT7 |
| CELL[57].OUT_BEL[12] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT6 |
| CELL[57].OUT_BEL[13] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT5 |
| CELL[57].OUT_BEL[14] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT4 |
| CELL[57].OUT_BEL[15] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT3 |
| CELL[57].OUT_BEL[16] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT2 |
| CELL[57].OUT_BEL[17] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT1 |
| CELL[57].OUT_BEL[18] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_IODELAY_CNTVALUEOUT0 |
| CELL[57].OUT_BEL[19] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT5 |
| CELL[57].OUT_BEL[20] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT4 |
| CELL[57].OUT_BEL[21] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT3 |
| CELL[57].OUT_BEL[22] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT2 |
| CELL[57].OUT_BEL[23] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT1 |
| CELL[57].OUT_BEL[24] | LPDDRMC.IF_HSM_CLB2PHY_P0_IOB2CLB_DFT0 |
| CELL[57].OUT_BEL[25] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_2 |
| CELL[57].OUT_BEL[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_1 |
| CELL[57].OUT_BEL[27] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_0_0 |
| CELL[57].OUT_BEL[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_2 |
| CELL[57].OUT_BEL[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_1 |
| CELL[57].OUT_BEL[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_PHY2CLB_LP_I_1_0 |
| CELL[57].OUT_BEL[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_RIU2CLB_VALID |
| CELL[57].IMUX_BYP_DELAY[7] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_IN1 |
| CELL[57].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG10 |
| CELL[57].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN20 |
| CELL[57].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN17 |
| CELL[57].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN14 |
| CELL[57].IMUX_IMUX_DELAY[3] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN11 |
| CELL[57].IMUX_IMUX_DELAY[4] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN8 |
| CELL[57].IMUX_IMUX_DELAY[5] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN5 |
| CELL[57].IMUX_IMUX_DELAY[6] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN2 |
| CELL[57].IMUX_IMUX_DELAY[7] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC5 |
| CELL[57].IMUX_IMUX_DELAY[8] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC2 |
| CELL[57].IMUX_IMUX_DELAY[9] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC5 |
| CELL[57].IMUX_IMUX_DELAY[10] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC2 |
| CELL[57].IMUX_IMUX_DELAY[11] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN2 |
| CELL[57].IMUX_IMUX_DELAY[12] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_2 |
| CELL[57].IMUX_IMUX_DELAY[13] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_2 |
| CELL[57].IMUX_IMUX_DELAY[14] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_2 |
| CELL[57].IMUX_IMUX_DELAY[15] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_2 |
| CELL[57].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN19 |
| CELL[57].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN18 |
| CELL[57].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN16 |
| CELL[57].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN15 |
| CELL[57].IMUX_IMUX_DELAY[20] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN13 |
| CELL[57].IMUX_IMUX_DELAY[21] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN12 |
| CELL[57].IMUX_IMUX_DELAY[22] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN10 |
| CELL[57].IMUX_IMUX_DELAY[23] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN9 |
| CELL[57].IMUX_IMUX_DELAY[24] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN7 |
| CELL[57].IMUX_IMUX_DELAY[25] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN6 |
| CELL[57].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN4 |
| CELL[57].IMUX_IMUX_DELAY[27] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN3 |
| CELL[57].IMUX_IMUX_DELAY[28] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN1 |
| CELL[57].IMUX_IMUX_DELAY[29] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IODELAY_CNTVALUEIN0 |
| CELL[57].IMUX_IMUX_DELAY[30] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC4 |
| CELL[57].IMUX_IMUX_DELAY[31] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC3 |
| CELL[57].IMUX_IMUX_DELAY[32] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC1 |
| CELL[57].IMUX_IMUX_DELAY[33] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_IDELAY_EN_VTC0 |
| CELL[57].IMUX_IMUX_DELAY[34] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC4 |
| CELL[57].IMUX_IMUX_DELAY[35] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC3 |
| CELL[57].IMUX_IMUX_DELAY[36] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC1 |
| CELL[57].IMUX_IMUX_DELAY[37] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_ODELAY_EN_VTC0 |
| CELL[57].IMUX_IMUX_DELAY[38] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN1 |
| CELL[57].IMUX_IMUX_DELAY[39] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_RX_DIS_OR_TERM_EN0 |
| CELL[57].IMUX_IMUX_DELAY[40] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_1 |
| CELL[57].IMUX_IMUX_DELAY[41] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_T_OR_PD_EN_0_0 |
| CELL[57].IMUX_IMUX_DELAY[42] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_1 |
| CELL[57].IMUX_IMUX_DELAY[43] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_PD_EN_1_0 |
| CELL[57].IMUX_IMUX_DELAY[44] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_1 |
| CELL[57].IMUX_IMUX_DELAY[45] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_0_0 |
| CELL[57].IMUX_IMUX_DELAY[46] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_1 |
| CELL[57].IMUX_IMUX_DELAY[47] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_LP_TX_O_OR_PU_EN_1_0 |
| CELL[58].OUT_BEL[0] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA15 |
| CELL[58].OUT_BEL[1] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA14 |
| CELL[58].OUT_BEL[2] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA13 |
| CELL[58].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA12 |
| CELL[58].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA11 |
| CELL[58].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA10 |
| CELL[58].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA9 |
| CELL[58].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA8 |
| CELL[58].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA7 |
| CELL[58].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA6 |
| CELL[58].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA5 |
| CELL[58].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA4 |
| CELL[58].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA3 |
| CELL[58].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA2 |
| CELL[58].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA1 |
| CELL[58].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_15_0_NIB0_RIU2CLB_RD_DATA0 |
| CELL[58].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_6 |
| CELL[58].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_4 |
| CELL[58].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_2 |
| CELL[58].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_0 |
| CELL[58].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_1 |
| CELL[58].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_3 |
| CELL[58].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_5 |
| CELL[58].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_63_56_NIB0_PHY2CLB_RD_DQ5_7 |
| CELL[58].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_6 |
| CELL[58].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_4 |
| CELL[58].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_2 |
| CELL[58].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_0 |
| CELL[58].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_1 |
| CELL[58].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_3 |
| CELL[58].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_5 |
| CELL[58].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_55_48_NIB0_PHY2CLB_RD_DQ4_7 |
| CELL[58].IMUX_BYP_DELAY[7] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_MASK_IN_EXT1 |
| CELL[58].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_CSSD_TRIG3 |
| CELL[58].IMUX_IMUX_DELAY[0] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN5 |
| CELL[58].IMUX_IMUX_DELAY[1] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN2 |
| CELL[58].IMUX_IMUX_DELAY[2] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2RIU_WR_EN |
| CELL[58].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_2 |
| CELL[58].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_3 |
| CELL[58].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN3 |
| CELL[58].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN0 |
| CELL[58].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT3 |
| CELL[58].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT0 |
| CELL[58].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN2 |
| CELL[58].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL5 |
| CELL[58].IMUX_IMUX_DELAY[11] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL2 |
| CELL[58].IMUX_IMUX_DELAY[12] | LPDDRMC.AXI0_ARADDR_10_NIB0_CLB2PHY_DLYCTL_EN_VTC |
| CELL[58].IMUX_IMUX_DELAY[13] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_2 |
| CELL[58].IMUX_IMUX_DELAY[14] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_3 |
| CELL[58].IMUX_IMUX_DELAY[15] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_6 |
| CELL[58].IMUX_IMUX_DELAY[16] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN4 |
| CELL[58].IMUX_IMUX_DELAY[17] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN3 |
| CELL[58].IMUX_IMUX_DELAY[18] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN1 |
| CELL[58].IMUX_IMUX_DELAY[19] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2PHY_KEEPER_EN0 |
| CELL[58].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_6 |
| CELL[58].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_4 |
| CELL[58].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_0 |
| CELL[58].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_1 |
| CELL[58].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_5 |
| CELL[58].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_63_56_NIB0_CLB2PHY_WR_DQ5_7 |
| CELL[58].IMUX_IMUX_DELAY[26] | LPDDRMC.AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN2 |
| CELL[58].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_AWADDR_3_0_NIB0_CLB2PHY_WREN1 |
| CELL[58].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT5 |
| CELL[58].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT4 |
| CELL[58].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT2 |
| CELL[58].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_AWADDR_9_4_NIB0_CLB2PHY_T_TXBIT1 |
| CELL[58].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_AWADDR_10_NIB0_CLB2PHY_FIFO_RDEN |
| CELL[58].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN3 |
| CELL[58].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN1 |
| CELL[58].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_ARADDR_3_0_NIB0_CLB2PHY_RDEN0 |
| CELL[58].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL4 |
| CELL[58].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL3 |
| CELL[58].IMUX_IMUX_DELAY[38] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL1 |
| CELL[58].IMUX_IMUX_DELAY[39] | LPDDRMC.AXI0_ARADDR_9_4_NIB0_CLB2PHY_IODELAY_SEL0 |
| CELL[58].IMUX_IMUX_DELAY[40] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_6 |
| CELL[58].IMUX_IMUX_DELAY[41] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_4 |
| CELL[58].IMUX_IMUX_DELAY[42] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_0 |
| CELL[58].IMUX_IMUX_DELAY[43] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_1 |
| CELL[58].IMUX_IMUX_DELAY[44] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_5 |
| CELL[58].IMUX_IMUX_DELAY[45] | LPDDRMC.AXI0_WDATA_55_48_NIB0_CLB2PHY_WR_DQ4_7 |
| CELL[58].IMUX_IMUX_DELAY[46] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_4 |
| CELL[58].IMUX_IMUX_DELAY[47] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_2 |
| CELL[59].OUT_BEL[0] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_6 |
| CELL[59].OUT_BEL[1] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_4 |
| CELL[59].OUT_BEL[2] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_2 |
| CELL[59].OUT_BEL[3] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_0 |
| CELL[59].OUT_BEL[4] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_1 |
| CELL[59].OUT_BEL[5] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_3 |
| CELL[59].OUT_BEL[6] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_5 |
| CELL[59].OUT_BEL[7] | LPDDRMC.AXI0_RDATA_47_40_NIB0_PHY2CLB_RD_DQ3_7 |
| CELL[59].OUT_BEL[8] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_6 |
| CELL[59].OUT_BEL[9] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_4 |
| CELL[59].OUT_BEL[10] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_2 |
| CELL[59].OUT_BEL[11] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_0 |
| CELL[59].OUT_BEL[12] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_1 |
| CELL[59].OUT_BEL[13] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_3 |
| CELL[59].OUT_BEL[14] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_5 |
| CELL[59].OUT_BEL[15] | LPDDRMC.AXI0_RDATA_39_32_NIB0_PHY2CLB_RD_DQ2_7 |
| CELL[59].OUT_BEL[16] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_6 |
| CELL[59].OUT_BEL[17] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_4 |
| CELL[59].OUT_BEL[18] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_2 |
| CELL[59].OUT_BEL[19] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_0 |
| CELL[59].OUT_BEL[20] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_1 |
| CELL[59].OUT_BEL[21] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_3 |
| CELL[59].OUT_BEL[22] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_5 |
| CELL[59].OUT_BEL[23] | LPDDRMC.AXI0_RDATA_31_24_NIB0_PHY2CLB_RD_DQ1_7 |
| CELL[59].OUT_BEL[24] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_6 |
| CELL[59].OUT_BEL[25] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_4 |
| CELL[59].OUT_BEL[26] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_2 |
| CELL[59].OUT_BEL[27] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_0 |
| CELL[59].OUT_BEL[28] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_1 |
| CELL[59].OUT_BEL[29] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_3 |
| CELL[59].OUT_BEL[30] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_5 |
| CELL[59].OUT_BEL[31] | LPDDRMC.AXI0_RDATA_23_16_NIB0_PHY2CLB_RD_DQ0_7 |
| CELL[59].IMUX_BYP_DELAY[7] | LPDDRMC.IF_DMC_FABRIC_SCAN_CHNL_IN_EXT2 |
| CELL[59].IMUX_BYP_DELAY[8] | LPDDRMC.IF_XPIO_DFX_DFXCNTRL_DMC_OABUT_CLB2PHY_SCAN_COMP_IN0 |
| CELL[59].IMUX_IMUX_DELAY[1] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_0 |
| CELL[59].IMUX_IMUX_DELAY[2] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_5 |
| CELL[59].IMUX_IMUX_DELAY[3] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_4 |
| CELL[59].IMUX_IMUX_DELAY[4] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_1 |
| CELL[59].IMUX_IMUX_DELAY[5] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_7 |
| CELL[59].IMUX_IMUX_DELAY[6] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_4 |
| CELL[59].IMUX_IMUX_DELAY[7] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_1 |
| CELL[59].IMUX_IMUX_DELAY[8] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_7 |
| CELL[59].IMUX_IMUX_DELAY[9] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_2 |
| CELL[59].IMUX_IMUX_DELAY[10] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_3 |
| CELL[59].IMUX_IMUX_DELAY[18] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_1 |
| CELL[59].IMUX_IMUX_DELAY[19] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_3 |
| CELL[59].IMUX_IMUX_DELAY[20] | LPDDRMC.AXI0_WDATA_47_40_NIB0_CLB2PHY_WR_DQ3_7 |
| CELL[59].IMUX_IMUX_DELAY[21] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_6 |
| CELL[59].IMUX_IMUX_DELAY[22] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_2 |
| CELL[59].IMUX_IMUX_DELAY[23] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_0 |
| CELL[59].IMUX_IMUX_DELAY[24] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_3 |
| CELL[59].IMUX_IMUX_DELAY[25] | LPDDRMC.AXI0_WDATA_39_32_NIB0_CLB2PHY_WR_DQ2_5 |
| CELL[59].IMUX_IMUX_DELAY[26] | LPDDRMC.IF_HSM_CLB2PHY_P0_CLB2RIU_NIBBLE_SEL |
| CELL[59].IMUX_IMUX_DELAY[27] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_6 |
| CELL[59].IMUX_IMUX_DELAY[28] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_2 |
| CELL[59].IMUX_IMUX_DELAY[29] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_0 |
| CELL[59].IMUX_IMUX_DELAY[30] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_3 |
| CELL[59].IMUX_IMUX_DELAY[31] | LPDDRMC.AXI0_WDATA_31_24_NIB0_CLB2PHY_WR_DQ1_5 |
| CELL[59].IMUX_IMUX_DELAY[32] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_6 |
| CELL[59].IMUX_IMUX_DELAY[33] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_4 |
| CELL[59].IMUX_IMUX_DELAY[34] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_0 |
| CELL[59].IMUX_IMUX_DELAY[35] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_1 |
| CELL[59].IMUX_IMUX_DELAY[36] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_5 |
| CELL[59].IMUX_IMUX_DELAY[37] | LPDDRMC.AXI0_WDATA_23_16_NIB0_CLB2PHY_WR_DQ0_7 |