I/O Buffers (Virtex 2 Pro)
TODO: document
| Name | IOSTD:V2P:PDRIVE | IOSTD:V2P:NDRIVE | |||||||
|---|---|---|---|---|---|---|---|---|---|
| [3] | [2] | [1] | [0] | [4] | [3] | [2] | [1] | [0] | |
| BLVDS_25 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 |
| GTL | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
| GTLP | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| GTLP_DCI | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| GTL_DCI | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
| HSTL_I | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| HSTL_II | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| HSTL_III | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_18 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_DCI | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_III_DCI_18 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| HSTL_II_18 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| HSTL_II_DCI | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| HSTL_II_DCI_18 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| HSTL_IV | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| HSTL_IV_18 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| HSTL_IV_DCI | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| HSTL_IV_DCI_18 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| HSTL_I_18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| HSTL_I_DCI | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| HSTL_I_DCI_18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| LVCMOS15.12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS15.16 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 |
| LVCMOS15.2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |
| LVCMOS15.4 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| LVCMOS15.6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| LVCMOS15.8 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
| LVCMOS18.12 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS18.16 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| LVCMOS18.2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |
| LVCMOS18.4 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| LVCMOS18.6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| LVCMOS18.8 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| LVCMOS25.12 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS25.16 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| LVCMOS25.2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVCMOS25.24 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS25.4 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
| LVCMOS25.6 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
| LVCMOS25.8 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| LVCMOS33.12 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| LVCMOS33.16 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| LVCMOS33.2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVCMOS33.24 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
| LVCMOS33.4 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
| LVCMOS33.6 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
| LVCMOS33.8 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 |
| LVPECL_25 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |
| LVTTL.12 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| LVTTL.16 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| LVTTL.2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVTTL.24 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 |
| LVTTL.4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| LVTTL.6 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
| LVTTL.8 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| PCI33_3 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 |
| PCI66_3 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 |
| PCIX | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| SSTL18_I | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| SSTL18_II | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 |
| SSTL18_II_DCI | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 |
| SSTL18_I_DCI | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| SSTL2_I | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
| SSTL2_II | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1 |
| SSTL2_II_DCI | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
| SSTL2_I_DCI | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| Name | IOSTD:V2P:SLEW | ||||
|---|---|---|---|---|---|
| [4] | [3] | [2] | [1] | [0] | |
| BLVDS_25 | 0 | 1 | 1 | 1 | 1 |
| GTL | 0 | 0 | 0 | 1 | 1 |
| GTLP | 1 | 0 | 0 | 1 | 1 |
| GTLP_DCI | 1 | 1 | 1 | 0 | 0 |
| GTL_DCI | 0 | 1 | 1 | 0 | 0 |
| HSLVDCI_15 | 1 | 1 | 1 | 1 | 1 |
| HSLVDCI_18 | 1 | 1 | 1 | 1 | 1 |
| HSLVDCI_25 | 1 | 1 | 1 | 1 | 1 |
| HSLVDCI_33 | 1 | 1 | 1 | 1 | 1 |
| HSTL_I | 0 | 1 | 1 | 1 | 1 |
| HSTL_II | 0 | 1 | 1 | 1 | 1 |
| HSTL_III | 0 | 1 | 1 | 1 | 1 |
| HSTL_III_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_III_DCI | 0 | 1 | 1 | 1 | 1 |
| HSTL_III_DCI_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_II_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_II_DCI | 0 | 1 | 1 | 1 | 1 |
| HSTL_II_DCI_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_IV | 0 | 1 | 1 | 1 | 1 |
| HSTL_IV_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_IV_DCI | 0 | 0 | 0 | 0 | 0 |
| HSTL_IV_DCI_18 | 0 | 0 | 0 | 0 | 0 |
| HSTL_I_18 | 0 | 1 | 1 | 1 | 1 |
| HSTL_I_DCI | 0 | 1 | 1 | 1 | 1 |
| HSTL_I_DCI_18 | 0 | 1 | 1 | 1 | 1 |
| LVCMOS15.FAST | 1 | 1 | 1 | 1 | 1 |
| LVCMOS15.SLOW | 0 | 0 | 0 | 0 | 0 |
| LVCMOS18.FAST | 1 | 1 | 1 | 1 | 1 |
| LVCMOS18.SLOW | 0 | 0 | 0 | 0 | 0 |
| LVCMOS25.FAST | 1 | 1 | 1 | 1 | 1 |
| LVCMOS25.SLOW | 0 | 0 | 0 | 0 | 0 |
| LVCMOS33.FAST | 1 | 1 | 1 | 1 | 1 |
| LVCMOS33.SLOW | 0 | 0 | 0 | 0 | 0 |
| LVDCI_15 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_18 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_25 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_33 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_DV2_15 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_DV2_18 | 1 | 1 | 1 | 1 | 1 |
| LVDCI_DV2_25 | 1 | 1 | 1 | 1 | 1 |
| LVPECL_25 | 0 | 1 | 1 | 0 | 1 |
| LVTTL.FAST | 1 | 1 | 1 | 1 | 1 |
| LVTTL.SLOW | 0 | 0 | 0 | 0 | 0 |
| PCI33_3 | 0 | 0 | 0 | 0 | 0 |
| PCI66_3 | 0 | 0 | 0 | 0 | 0 |
| PCIX | 0 | 1 | 1 | 1 | 1 |
| SSTL18_I | 0 | 1 | 1 | 0 | 1 |
| SSTL18_II | 0 | 1 | 1 | 0 | 1 |
| SSTL18_II_DCI | 1 | 1 | 1 | 0 | 1 |
| SSTL18_I_DCI | 1 | 1 | 1 | 1 | 1 |
| SSTL2_I | 1 | 1 | 1 | 1 | 1 |
| SSTL2_II | 1 | 1 | 1 | 1 | 1 |
| SSTL2_II_DCI | 1 | 1 | 1 | 1 | 1 |
| SSTL2_I_DCI | 1 | 1 | 1 | 1 | 1 |
| VR | 1 | 1 | 1 | 1 | 1 |
| Name | IOSTD:V2P:OUTPUT_MISC | |
|---|---|---|
| [1] | [0] | |
| BLVDS_25 | 0 | 0 |
| GTL | 0 | 1 |
| GTLP | 0 | 1 |
| GTLP_DCI | 0 | 1 |
| GTL_DCI | 1 | 1 |
| HSLVDCI_15 | 0 | 0 |
| HSLVDCI_18 | 0 | 0 |
| HSLVDCI_25 | 0 | 0 |
| HSLVDCI_33 | 0 | 0 |
| HSTL_I | 0 | 0 |
| HSTL_II | 0 | 0 |
| HSTL_III | 1 | 0 |
| HSTL_III_18 | 1 | 0 |
| HSTL_III_DCI | 1 | 0 |
| HSTL_III_DCI_18 | 1 | 0 |
| HSTL_II_18 | 0 | 0 |
| HSTL_II_DCI | 1 | 0 |
| HSTL_II_DCI_18 | 1 | 0 |
| HSTL_IV | 1 | 0 |
| HSTL_IV_18 | 1 | 0 |
| HSTL_IV_DCI | 1 | 1 |
| HSTL_IV_DCI_18 | 1 | 1 |
| HSTL_I_18 | 0 | 0 |
| HSTL_I_DCI | 0 | 0 |
| HSTL_I_DCI_18 | 0 | 0 |
| LVCMOS15 | 0 | 0 |
| LVCMOS18 | 0 | 0 |
| LVCMOS25 | 0 | 0 |
| LVCMOS33 | 0 | 0 |
| LVDCI_15 | 0 | 0 |
| LVDCI_18 | 0 | 0 |
| LVDCI_25 | 0 | 0 |
| LVDCI_33 | 0 | 0 |
| LVDCI_DV2_15 | 0 | 0 |
| LVDCI_DV2_18 | 0 | 0 |
| LVDCI_DV2_25 | 0 | 0 |
| LVPECL_25 | 0 | 0 |
| LVTTL | 0 | 0 |
| PCI33_3 | 0 | 0 |
| PCI66_3 | 0 | 0 |
| PCIX | 0 | 0 |
| SSTL18_I | 0 | 0 |
| SSTL18_II | 0 | 0 |
| SSTL18_II_DCI | 0 | 0 |
| SSTL18_I_DCI | 0 | 0 |
| SSTL2_I | 0 | 0 |
| SSTL2_II | 0 | 0 |
| SSTL2_II_DCI | 0 | 1 |
| SSTL2_I_DCI | 0 | 0 |
| Name | IOSTD:V2P:OUTPUT_DIFF | |||
|---|---|---|---|---|
| [3] | [2] | [1] | [0] | |
| LDT_25 | 1 | 0 | 1 | 0 |
| LVDSEXT_25 | 0 | 1 | 1 | 0 |
| LVDSEXT_25_DCI | 0 | 1 | 1 | 0 |
| LVDS_25 | 0 | 0 | 1 | 0 |
| LVDS_25_DCI | 0 | 0 | 1 | 0 |
| OFF | 0 | 0 | 0 | 0 |
| TERM | 0 | 0 | 0 | 1 |
| ULVDS_25 | 1 | 0 | 1 | 0 |
| Name | IOSTD:V2P:LVDSBIAS | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] | |
| LDT_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVDSEXT_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVDSEXT_25_DCI | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVDS_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| LVDS_25_DCI | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| ULVDS_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| Name | IOSTD:V2P:PMASK_TERM_SPLIT | IOSTD:V2P:NMASK_TERM_SPLIT | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| [4] | [3] | [2] | [1] | [0] | [4] | [3] | [2] | [1] | [0] | |
| HSTL_II_DCI | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| HSTL_II_DCI_18 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| HSTL_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| HSTL_I_DCI_18 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVDSEXT_25_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| LVDS_25_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| SSTL18_II_DCI | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 |
| SSTL18_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| SSTL2_II_DCI | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 |
| SSTL2_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Name | IOSTD:V2P:PMASK_TERM_VCC | ||||
|---|---|---|---|---|---|
| [4] | [3] | [2] | [1] | [0] | |
| GTLP_DCI | 0 | 0 | 0 | 0 | 0 |
| GTL_DCI | 0 | 0 | 0 | 0 | 0 |
| HSTL_III_DCI | 0 | 0 | 0 | 0 | 0 |
| HSTL_III_DCI_18 | 0 | 0 | 0 | 0 | 0 |
| HSTL_IV_DCI | 0 | 0 | 1 | 0 | 0 |
| HSTL_IV_DCI_18 | 0 | 0 | 1 | 0 | 0 |
| OFF | 0 | 0 | 0 | 0 | 0 |
Tile IOB_V2P_NW1
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F21.B6 | 0.F18.B7 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
|---|---|---|---|
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[2]:OUTPUT_DIFF | 0.F9.B11 | 0.F6.B9 | 0.F3.B9 | 0.F12.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_NW1_ALT
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F17.B8 | 0.F12.B9 | 0.F9.B11 | 0.F21.B11 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F7.B8 | 0.F4.B6 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
Tile IOB_V2P_NE1
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F17.B8 | 0.F12.B9 | 0.F9.B11 | 0.F21.B11 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F7.B8 | 0.F4.B6 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
Tile IOB_V2P_NE1_ALT
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F21.B6 | 0.F18.B7 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
|---|---|---|---|
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[2]:OUTPUT_DIFF | 0.F9.B11 | 0.F6.B9 | 0.F3.B9 | 0.F12.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_NW2
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 1.F9.B9 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[3]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
| IOB[4]:DCI_MODE | 1.F10.B11 | 1.F12.B6 | 1.F12.B7 | 1.F12.B10 |
| IOB[5]:DCI_MODE | 1.F4.B11 | 1.F6.B6 | 1.F6.B8 | 1.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[0]:VR | 0.F20.B8 |
| IOB[1]:BREFCLK_ENABLE | 0.F12.B11 |
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[1]:VR | 0.F12.B8 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| IOB[3]:DISABLE_GTS | 1.F21.B10 |
| IOB[4]:DISABLE_GTS | 1.F13.B11 |
| IOB[5]:DISABLE_GTS | 1.F7.B11 |
| IOB[5]:VREF | 1.F7.B7 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[3]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
| IOB[4]:IBUF_MODE | 1.F10.B8 | 1.F10.B7 | 1.F13.B10 |
| IOB[5]:IBUF_MODE | 1.F4.B10 | 1.F4.B6 | 1.F7.B8 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[3]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
| IOB[4]:NDRIVE | 1.F11.B11 | 1.F11.B10 | 1.F11.B6 | 1.F8.B6 | 1.F8.B11 |
| IOB[5]:NDRIVE | 1.F5.B9 | 1.F5.B6 | 1.F5.B8 | 1.F0.B6 | 1.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[3]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[3]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| IOB[4]:OUTPUT_ENABLE | 1.F13.B8 | 1.F13.B6 |
| IOB[4]:OUTPUT_MISC | 1.F8.B10 | 1.F8.B9 |
| IOB[5]:OUTPUT_ENABLE | 1.F7.B10 | 1.F7.B6 |
| IOB[5]:OUTPUT_MISC | 1.F0.B10 | 1.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[3]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
| IOB[4]:PDRIVE | 1.F11.B9 | 1.F11.B7 | 1.F11.B8 | 1.F8.B8 |
| IOB[5]:PDRIVE | 1.F5.B11 | 1.F5.B7 | 1.F5.B10 | 1.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[3]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
| IOB[4]:PULL | 1.F10.B6 | 1.F10.B9 | 1.F10.B10 |
| IOB[5]:PULL | 1.F4.B7 | 1.F4.B8 | 1.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[3]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
| IOB[4]:SLEW | 1.F9.B8 | 1.F9.B6 | 1.F8.B7 | 1.F9.B10 | 1.F9.B7 |
| IOB[5]:SLEW | 1.F3.B8 | 1.F3.B6 | 1.F0.B7 | 1.F3.B7 | 1.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F17.B8 | 0.F12.B9 | 0.F9.B11 | 0.F21.B11 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 0.F3.B9 | 1.F21.B11 | 1.F17.B8 | 0.F6.B9 |
| IOB[5]:OUTPUT_DIFF | 1.F9.B11 | 1.F6.B9 | 1.F3.B9 | 1.F12.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_NE2
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 1.F9.B9 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[3]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
| IOB[4]:DCI_MODE | 1.F10.B11 | 1.F12.B6 | 1.F12.B7 | 1.F12.B10 |
| IOB[5]:DCI_MODE | 1.F4.B11 | 1.F6.B6 | 1.F6.B8 | 1.F6.B10 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[0]:VREF | 0.F21.B9 |
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| IOB[3]:DISABLE_GTS | 1.F21.B10 |
| IOB[4]:DISABLE_GTS | 1.F13.B11 |
| IOB[4]:VR | 1.F12.B8 |
| IOB[5]:BREFCLK_ENABLE | 1.F6.B11 |
| IOB[5]:DISABLE_GTS | 1.F7.B11 |
| IOB[5]:VR | 1.F6.B7 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[3]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
| IOB[4]:IBUF_MODE | 1.F10.B8 | 1.F10.B7 | 1.F13.B10 |
| IOB[5]:IBUF_MODE | 1.F4.B10 | 1.F4.B6 | 1.F7.B8 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[3]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
| IOB[4]:NDRIVE | 1.F11.B11 | 1.F11.B10 | 1.F11.B6 | 1.F8.B6 | 1.F8.B11 |
| IOB[5]:NDRIVE | 1.F5.B9 | 1.F5.B6 | 1.F5.B8 | 1.F0.B6 | 1.F0.B9 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[3]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[3]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| IOB[4]:OUTPUT_ENABLE | 1.F13.B8 | 1.F13.B6 |
| IOB[4]:OUTPUT_MISC | 1.F8.B10 | 1.F8.B9 |
| IOB[5]:OUTPUT_ENABLE | 1.F7.B10 | 1.F7.B6 |
| IOB[5]:OUTPUT_MISC | 1.F0.B10 | 1.F0.B11 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[3]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
| IOB[4]:PDRIVE | 1.F11.B9 | 1.F11.B7 | 1.F11.B8 | 1.F8.B8 |
| IOB[5]:PDRIVE | 1.F5.B11 | 1.F5.B7 | 1.F5.B10 | 1.F0.B8 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[3]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
| IOB[4]:PULL | 1.F10.B6 | 1.F10.B9 | 1.F10.B10 |
| IOB[5]:PULL | 1.F4.B7 | 1.F4.B8 | 1.F4.B9 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[3]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
| IOB[4]:SLEW | 1.F9.B8 | 1.F9.B6 | 1.F8.B7 | 1.F9.B10 | 1.F9.B7 |
| IOB[5]:SLEW | 1.F3.B8 | 1.F3.B6 | 1.F0.B7 | 1.F3.B7 | 1.F3.B10 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F17.B8 | 0.F12.B9 | 0.F9.B11 | 0.F21.B11 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 0.F3.B9 | 1.F21.B11 | 1.F17.B8 | 0.F6.B9 |
| IOB[5]:OUTPUT_DIFF | 1.F9.B11 | 1.F6.B9 | 1.F3.B9 | 1.F12.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_NE2_CLK
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | IOB[3]:OUTPUT_MISC[1] | ~IOB[3]:DCIUPDATEMODE_ASREQUIRED | IOB[3]:DCI_MODE[3] | IOB[3]:NDRIVE[4] | IOB[3]:DCI_MODE[0] | IOB[3]:OUTPUT_DIFF[2] |
| B10 | - | - | - | - | BREFCLK_INT:ENABLE[0] | - | - | - | - | - | - | - | - | - | - | - | IOB[3]:NDRIVE[0] | IOB[3]:SLEW[3] | IOB[3]:PULL[0] | IOB[3]:NDRIVE[3] | IOB[3]:DCI_MODE[1] | IOB[3]:DISABLE_GTS |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | IOB[3]:OUTPUT_MISC[0] | IOB[3]:SLEW[4] | IOB[3]:PULL[1] | IOB[3]:PDRIVE[3] | - | - |
| B8 | - | - | - | - | - | - | - | BREFCLK_INT:ENABLE[1] | - | - | - | - | - | - | - | - | IOB[3]:SLEW[2] | IOB[3]:OUTPUT_DIFF[1] | IOB[3]:PULL[2] | ~IOB[3]:PDRIVE[1] | - | IOB[3]:OUTPUT_ENABLE[1] |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~IOB[3]:NDRIVE[1] | IOB[3]:SLEW[0] | IOB[3]:IBUF_MODE[1] | IOB[3]:PDRIVE[2] | IOB[3]:DCI_MODE[2] | IOB[3]:OUTPUT_ENABLE[0] |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~IOB[3]:PDRIVE[0] | IOB[3]:SLEW[1] | IOB[3]:IBUF_MODE[2] | ~IOB[3]:NDRIVE[2] | - | IOB[3]:IBUF_MODE[0] |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| BREFCLK_INT:ENABLE | 1.F7.B8 | 1.F4.B10 |
|---|---|---|
| IOB[0]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[0]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[2]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[3]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[3]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[3]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F21.B10 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F7.B11 |
| IOB[3]:DISABLE_GTS | 1.F21.B10 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[2]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[3]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[3]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[3]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[3]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[3]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F17.B8 | 0.F12.B9 | 0.F9.B11 | 0.F21.B11 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 0.F3.B9 | 1.F21.B11 | 1.F17.B8 | 0.F6.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_ES2
Cells: 2
Bitstream
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B60 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B33 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B6 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B60 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B33 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B6 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 1.F2.B67 | 1.F2.B75 | 1.F3.B74 | 1.F2.B74 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 1.F2.B40 | 1.F2.B48 | 1.F3.B47 | 1.F2.B47 |
| IOB[2]:DCI_MODE | 1.F2.B13 | 1.F2.B21 | 1.F3.B20 | 1.F2.B20 |
| IOB[3]:DCI_MODE | 0.F2.B67 | 0.F2.B75 | 0.F3.B74 | 0.F2.B74 |
| IOB[4]:DCI_MODE | 0.F2.B40 | 0.F2.B48 | 0.F3.B47 | 0.F2.B47 |
| IOB[5]:DCI_MODE | 0.F2.B13 | 0.F2.B21 | 0.F3.B20 | 0.F2.B20 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 1.F2.B72 |
|---|---|
| IOB[0]:VREF | 1.F3.B71 |
| IOB[1]:DISABLE_GTS | 1.F2.B45 |
| IOB[2]:DISABLE_GTS | 1.F2.B18 |
| IOB[3]:DISABLE_GTS | 0.F2.B72 |
| IOB[4]:DISABLE_GTS | 0.F2.B45 |
| IOB[4]:VR | 0.F3.B48 |
| IOB[5]:DISABLE_GTS | 0.F2.B18 |
| IOB[5]:VR | 0.F3.B21 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 1.F3.B69 | 1.F2.B69 | 1.F2.B70 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 1.F3.B42 | 1.F2.B42 | 1.F2.B43 |
| IOB[2]:IBUF_MODE | 1.F3.B15 | 1.F2.B15 | 1.F2.B16 |
| IOB[3]:IBUF_MODE | 0.F3.B69 | 0.F2.B69 | 0.F2.B70 |
| IOB[4]:IBUF_MODE | 0.F3.B42 | 0.F2.B42 | 0.F2.B43 |
| IOB[5]:IBUF_MODE | 0.F3.B15 | 0.F2.B15 | 0.F2.B16 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 1.F2.B66 | 1.F2.B65 | 1.F2.B64 | 1.F2.B63 | 1.F2.B62 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 1.F2.B39 | 1.F2.B38 | 1.F2.B37 | 1.F2.B36 | 1.F2.B35 |
| IOB[2]:NDRIVE | 1.F2.B12 | 1.F2.B11 | 1.F2.B10 | 1.F2.B9 | 1.F2.B8 |
| IOB[3]:NDRIVE | 0.F2.B66 | 0.F2.B65 | 0.F2.B64 | 0.F2.B63 | 0.F2.B62 |
| IOB[4]:NDRIVE | 0.F2.B39 | 0.F2.B38 | 0.F2.B37 | 0.F2.B36 | 0.F2.B35 |
| IOB[5]:NDRIVE | 0.F2.B12 | 0.F2.B11 | 0.F2.B10 | 0.F2.B9 | 0.F2.B8 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 1.F3.B70 | 1.F2.B71 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 1.F3.B61 | 1.F2.B61 |
| IOB[1]:OUTPUT_ENABLE | 1.F3.B43 | 1.F2.B44 |
| IOB[1]:OUTPUT_MISC | 1.F3.B34 | 1.F2.B34 |
| IOB[2]:OUTPUT_ENABLE | 1.F3.B16 | 1.F2.B17 |
| IOB[2]:OUTPUT_MISC | 1.F3.B7 | 1.F2.B7 |
| IOB[3]:OUTPUT_ENABLE | 0.F3.B70 | 0.F2.B71 |
| IOB[3]:OUTPUT_MISC | 0.F3.B61 | 0.F2.B61 |
| IOB[4]:OUTPUT_ENABLE | 0.F3.B43 | 0.F2.B44 |
| IOB[4]:OUTPUT_MISC | 0.F3.B34 | 0.F2.B34 |
| IOB[5]:OUTPUT_ENABLE | 0.F3.B16 | 0.F2.B17 |
| IOB[5]:OUTPUT_MISC | 0.F3.B7 | 0.F2.B7 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 1.F3.B66 | 1.F3.B65 | 1.F3.B64 | 1.F3.B63 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 1.F3.B39 | 1.F3.B38 | 1.F3.B37 | 1.F3.B36 |
| IOB[2]:PDRIVE | 1.F3.B12 | 1.F3.B11 | 1.F3.B10 | 1.F3.B9 |
| IOB[3]:PDRIVE | 0.F3.B66 | 0.F3.B65 | 0.F3.B64 | 0.F3.B63 |
| IOB[4]:PDRIVE | 0.F3.B39 | 0.F3.B38 | 0.F3.B37 | 0.F3.B36 |
| IOB[5]:PDRIVE | 0.F3.B12 | 0.F3.B11 | 0.F3.B10 | 0.F3.B9 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 1.F3.B68 | 1.F2.B68 | 1.F3.B67 |
|---|---|---|---|
| IOB[1]:PULL | 1.F3.B41 | 1.F2.B41 | 1.F3.B40 |
| IOB[2]:PULL | 1.F3.B14 | 1.F2.B14 | 1.F3.B13 |
| IOB[3]:PULL | 0.F3.B68 | 0.F2.B68 | 0.F3.B67 |
| IOB[4]:PULL | 0.F3.B41 | 0.F2.B41 | 0.F3.B40 |
| IOB[5]:PULL | 0.F3.B14 | 0.F2.B14 | 0.F3.B13 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 1.F3.B58 | 1.F3.B62 | 1.F2.B58 | 1.F2.B59 | 1.F3.B59 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 1.F3.B31 | 1.F3.B35 | 1.F2.B31 | 1.F2.B32 | 1.F3.B32 |
| IOB[2]:SLEW | 1.F3.B4 | 1.F3.B8 | 1.F2.B4 | 1.F2.B5 | 1.F3.B5 |
| IOB[3]:SLEW | 0.F3.B58 | 0.F3.B62 | 0.F2.B58 | 0.F2.B59 | 0.F3.B59 |
| IOB[4]:SLEW | 0.F3.B31 | 0.F3.B35 | 0.F2.B31 | 0.F2.B32 | 0.F3.B32 |
| IOB[5]:SLEW | 0.F3.B4 | 0.F3.B8 | 0.F2.B4 | 0.F2.B5 | 0.F3.B5 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 1.F2.B60 | 1.F2.B46 | 1.F2.B33 | 1.F2.B73 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 1.F2.B6 | 0.F2.B73 | 0.F2.B60 | 1.F2.B19 |
| IOB[5]:OUTPUT_DIFF | 0.F2.B33 | 0.F2.B19 | 0.F2.B6 | 0.F2.B46 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_EN2
Cells: 2
Bitstream
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B60 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B33 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B6 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B60 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B33 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B6 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 1.F2.B67 | 1.F2.B75 | 1.F3.B74 | 1.F2.B74 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 1.F2.B40 | 1.F2.B48 | 1.F3.B47 | 1.F2.B47 |
| IOB[2]:DCI_MODE | 1.F2.B13 | 1.F2.B21 | 1.F3.B20 | 1.F2.B20 |
| IOB[3]:DCI_MODE | 0.F2.B67 | 0.F2.B75 | 0.F3.B74 | 0.F2.B74 |
| IOB[4]:DCI_MODE | 0.F2.B40 | 0.F2.B48 | 0.F3.B47 | 0.F2.B47 |
| IOB[5]:DCI_MODE | 0.F2.B13 | 0.F2.B21 | 0.F3.B20 | 0.F2.B20 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 1.F2.B72 |
|---|---|
| IOB[0]:VR | 1.F3.B75 |
| IOB[0]:VREF | 1.F3.B71 |
| IOB[1]:DISABLE_GTS | 1.F2.B45 |
| IOB[1]:VR | 1.F3.B48 |
| IOB[2]:DISABLE_GTS | 1.F2.B18 |
| IOB[3]:DISABLE_GTS | 0.F2.B72 |
| IOB[4]:DISABLE_GTS | 0.F2.B45 |
| IOB[5]:DISABLE_GTS | 0.F2.B18 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 1.F3.B69 | 1.F2.B69 | 1.F2.B70 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 1.F3.B42 | 1.F2.B42 | 1.F2.B43 |
| IOB[2]:IBUF_MODE | 1.F3.B15 | 1.F2.B15 | 1.F2.B16 |
| IOB[3]:IBUF_MODE | 0.F3.B69 | 0.F2.B69 | 0.F2.B70 |
| IOB[4]:IBUF_MODE | 0.F3.B42 | 0.F2.B42 | 0.F2.B43 |
| IOB[5]:IBUF_MODE | 0.F3.B15 | 0.F2.B15 | 0.F2.B16 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 1.F2.B66 | 1.F2.B65 | 1.F2.B64 | 1.F2.B63 | 1.F2.B62 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 1.F2.B39 | 1.F2.B38 | 1.F2.B37 | 1.F2.B36 | 1.F2.B35 |
| IOB[2]:NDRIVE | 1.F2.B12 | 1.F2.B11 | 1.F2.B10 | 1.F2.B9 | 1.F2.B8 |
| IOB[3]:NDRIVE | 0.F2.B66 | 0.F2.B65 | 0.F2.B64 | 0.F2.B63 | 0.F2.B62 |
| IOB[4]:NDRIVE | 0.F2.B39 | 0.F2.B38 | 0.F2.B37 | 0.F2.B36 | 0.F2.B35 |
| IOB[5]:NDRIVE | 0.F2.B12 | 0.F2.B11 | 0.F2.B10 | 0.F2.B9 | 0.F2.B8 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 1.F3.B70 | 1.F2.B71 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 1.F3.B61 | 1.F2.B61 |
| IOB[1]:OUTPUT_ENABLE | 1.F3.B43 | 1.F2.B44 |
| IOB[1]:OUTPUT_MISC | 1.F3.B34 | 1.F2.B34 |
| IOB[2]:OUTPUT_ENABLE | 1.F3.B16 | 1.F2.B17 |
| IOB[2]:OUTPUT_MISC | 1.F3.B7 | 1.F2.B7 |
| IOB[3]:OUTPUT_ENABLE | 0.F3.B70 | 0.F2.B71 |
| IOB[3]:OUTPUT_MISC | 0.F3.B61 | 0.F2.B61 |
| IOB[4]:OUTPUT_ENABLE | 0.F3.B43 | 0.F2.B44 |
| IOB[4]:OUTPUT_MISC | 0.F3.B34 | 0.F2.B34 |
| IOB[5]:OUTPUT_ENABLE | 0.F3.B16 | 0.F2.B17 |
| IOB[5]:OUTPUT_MISC | 0.F3.B7 | 0.F2.B7 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 1.F3.B66 | 1.F3.B65 | 1.F3.B64 | 1.F3.B63 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 1.F3.B39 | 1.F3.B38 | 1.F3.B37 | 1.F3.B36 |
| IOB[2]:PDRIVE | 1.F3.B12 | 1.F3.B11 | 1.F3.B10 | 1.F3.B9 |
| IOB[3]:PDRIVE | 0.F3.B66 | 0.F3.B65 | 0.F3.B64 | 0.F3.B63 |
| IOB[4]:PDRIVE | 0.F3.B39 | 0.F3.B38 | 0.F3.B37 | 0.F3.B36 |
| IOB[5]:PDRIVE | 0.F3.B12 | 0.F3.B11 | 0.F3.B10 | 0.F3.B9 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 1.F3.B68 | 1.F2.B68 | 1.F3.B67 |
|---|---|---|---|
| IOB[1]:PULL | 1.F3.B41 | 1.F2.B41 | 1.F3.B40 |
| IOB[2]:PULL | 1.F3.B14 | 1.F2.B14 | 1.F3.B13 |
| IOB[3]:PULL | 0.F3.B68 | 0.F2.B68 | 0.F3.B67 |
| IOB[4]:PULL | 0.F3.B41 | 0.F2.B41 | 0.F3.B40 |
| IOB[5]:PULL | 0.F3.B14 | 0.F2.B14 | 0.F3.B13 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 1.F3.B58 | 1.F3.B62 | 1.F2.B58 | 1.F2.B59 | 1.F3.B59 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 1.F3.B31 | 1.F3.B35 | 1.F2.B31 | 1.F2.B32 | 1.F3.B32 |
| IOB[2]:SLEW | 1.F3.B4 | 1.F3.B8 | 1.F2.B4 | 1.F2.B5 | 1.F3.B5 |
| IOB[3]:SLEW | 0.F3.B58 | 0.F3.B62 | 0.F2.B58 | 0.F2.B59 | 0.F3.B59 |
| IOB[4]:SLEW | 0.F3.B31 | 0.F3.B35 | 0.F2.B31 | 0.F2.B32 | 0.F3.B32 |
| IOB[5]:SLEW | 0.F3.B4 | 0.F3.B8 | 0.F2.B4 | 0.F2.B5 | 0.F3.B5 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 1.F2.B60 | 1.F2.B46 | 1.F2.B33 | 1.F2.B73 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 1.F2.B6 | 0.F2.B73 | 0.F2.B60 | 1.F2.B19 |
| IOB[5]:OUTPUT_DIFF | 0.F2.B33 | 0.F2.B19 | 0.F2.B6 | 0.F2.B46 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_SW1
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F7.B11 |
|---|---|
| IOB[0]:VR | 0.F6.B7 |
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[1]:VR | 0.F12.B8 |
| IOB[2]:DISABLE_GTS | 0.F21.B10 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[2]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F3.B9 | 0.F12.B9 | 0.F9.B11 | 0.F6.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[2]:IBUF_MODE | 0.F18.B6 | 0.F21.B6 | 0.F18.B7 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
Tile IOB_V2P_SW1_ALT
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F7.B11 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F21.B10 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F4.B10 | 0.F7.B8 | 0.F4.B6 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[2]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
|---|---|---|---|
| IOB[2]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[2]:OUTPUT_DIFF | 0.F9.B11 | 0.F21.B11 | 0.F17.B8 | 0.F12.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_SE1
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F7.B11 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[1]:VR | 0.F12.B8 |
| IOB[2]:DISABLE_GTS | 0.F21.B10 |
| IOB[2]:VR | 0.F20.B8 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F4.B10 | 0.F7.B8 | 0.F4.B6 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[2]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
|---|---|---|---|
| IOB[2]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[2]:OUTPUT_DIFF | 0.F9.B11 | 0.F21.B11 | 0.F17.B8 | 0.F12.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_SE1_ALT
Cells: 1
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[2]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F7.B11 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F13.B11 |
| IOB[2]:DISABLE_GTS | 0.F21.B10 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[2]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[1]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[2]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[2]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[2]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[2]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 0.F3.B9 | 0.F12.B9 | 0.F9.B11 | 0.F6.B9 |
|---|---|---|---|---|
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[2]:IBUF_MODE | 0.F18.B6 | 0.F21.B6 | 0.F18.B7 |
|---|---|---|---|
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| CMOS | 1 | 1 | 1 |
Tile IOB_V2P_SW2
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 1.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 1.F4.B11 | 1.F6.B6 | 1.F6.B8 | 1.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 1.F10.B11 | 1.F12.B6 | 1.F12.B7 | 1.F12.B10 |
| IOB[2]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
| IOB[3]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[4]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[5]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 1.F7.B11 |
|---|---|
| IOB[0]:VREF | 1.F7.B7 |
| IOB[1]:DISABLE_GTS | 1.F13.B11 |
| IOB[2]:DISABLE_GTS | 1.F21.B10 |
| IOB[3]:DISABLE_GTS | 0.F7.B11 |
| IOB[4]:DISABLE_GTS | 0.F13.B11 |
| IOB[4]:VREF | 0.F13.B7 |
| IOB[5]:BREFCLK_ENABLE | 0.F20.B6 |
| IOB[5]:DISABLE_GTS | 0.F21.B10 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 1.F4.B10 | 1.F4.B6 | 1.F7.B8 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 1.F10.B8 | 1.F10.B7 | 1.F13.B10 |
| IOB[2]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
| IOB[3]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[4]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[5]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 1.F5.B9 | 1.F5.B6 | 1.F5.B8 | 1.F0.B6 | 1.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 1.F11.B11 | 1.F11.B10 | 1.F11.B6 | 1.F8.B6 | 1.F8.B11 |
| IOB[2]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
| IOB[3]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[4]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[5]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 1.F7.B10 | 1.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 1.F0.B10 | 1.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 1.F13.B8 | 1.F13.B6 |
| IOB[1]:OUTPUT_MISC | 1.F8.B10 | 1.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[2]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| IOB[3]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[3]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[4]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[4]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[5]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[5]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 1.F5.B11 | 1.F5.B7 | 1.F5.B10 | 1.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 1.F11.B9 | 1.F11.B7 | 1.F11.B8 | 1.F8.B8 |
| IOB[2]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
| IOB[3]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[4]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[5]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 1.F4.B7 | 1.F4.B8 | 1.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 1.F10.B6 | 1.F10.B9 | 1.F10.B10 |
| IOB[2]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
| IOB[3]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[4]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[5]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 1.F3.B8 | 1.F3.B6 | 1.F0.B7 | 1.F3.B7 | 1.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 1.F9.B8 | 1.F9.B6 | 1.F8.B7 | 1.F9.B10 | 1.F9.B7 |
| IOB[2]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
| IOB[3]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[4]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[5]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 1.F3.B9 | 1.F12.B9 | 1.F9.B11 | 1.F6.B9 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 1.F17.B8 | 0.F6.B9 | 0.F3.B9 | 1.F21.B11 |
| IOB[5]:OUTPUT_DIFF | 0.F9.B11 | 0.F21.B11 | 0.F17.B8 | 0.F12.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_SE2
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B11 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 1.F9.B9 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 1.F4.B11 | 1.F6.B6 | 1.F6.B8 | 1.F6.B10 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 1.F10.B11 | 1.F12.B6 | 1.F12.B7 | 1.F12.B10 |
| IOB[2]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
| IOB[3]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[4]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[5]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 1.F7.B11 |
|---|---|
| IOB[1]:BREFCLK_ENABLE | 1.F12.B11 |
| IOB[1]:DISABLE_GTS | 1.F13.B11 |
| IOB[1]:VREF | 1.F13.B7 |
| IOB[2]:DISABLE_GTS | 1.F21.B10 |
| IOB[3]:DISABLE_GTS | 0.F7.B11 |
| IOB[4]:DISABLE_GTS | 0.F13.B11 |
| IOB[5]:DISABLE_GTS | 0.F21.B10 |
| IOB[5]:VREF | 0.F21.B9 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 1.F4.B10 | 1.F4.B6 | 1.F7.B8 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 1.F10.B8 | 1.F10.B7 | 1.F13.B10 |
| IOB[2]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
| IOB[3]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[4]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[5]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 1.F5.B9 | 1.F5.B6 | 1.F5.B8 | 1.F0.B6 | 1.F0.B9 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 1.F11.B11 | 1.F11.B10 | 1.F11.B6 | 1.F8.B6 | 1.F8.B11 |
| IOB[2]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
| IOB[3]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[4]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[5]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 1.F7.B10 | 1.F7.B6 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 1.F0.B10 | 1.F0.B11 |
| IOB[1]:OUTPUT_ENABLE | 1.F13.B8 | 1.F13.B6 |
| IOB[1]:OUTPUT_MISC | 1.F8.B10 | 1.F8.B9 |
| IOB[2]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[2]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| IOB[3]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[3]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[4]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[4]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[5]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[5]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 1.F5.B11 | 1.F5.B7 | 1.F5.B10 | 1.F0.B8 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 1.F11.B9 | 1.F11.B7 | 1.F11.B8 | 1.F8.B8 |
| IOB[2]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
| IOB[3]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[4]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[5]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 1.F4.B7 | 1.F4.B8 | 1.F4.B9 |
|---|---|---|---|
| IOB[1]:PULL | 1.F10.B6 | 1.F10.B9 | 1.F10.B10 |
| IOB[2]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
| IOB[3]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[4]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[5]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 1.F3.B8 | 1.F3.B6 | 1.F0.B7 | 1.F3.B7 | 1.F3.B10 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 1.F9.B8 | 1.F9.B6 | 1.F8.B7 | 1.F9.B10 | 1.F9.B7 |
| IOB[2]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
| IOB[3]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[4]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[5]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[1]:OUTPUT_DIFF | 1.F3.B9 | 1.F12.B9 | 1.F9.B11 | 1.F6.B9 |
|---|---|---|---|---|
| IOB[3]:OUTPUT_DIFF | 1.F17.B8 | 0.F6.B9 | 0.F3.B9 | 1.F21.B11 |
| IOB[5]:OUTPUT_DIFF | 0.F9.B11 | 0.F21.B11 | 0.F17.B8 | 0.F12.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_SE2_CLK
Cells: 2
Bitstream
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11 | F12 | F13 | F14 | F15 | F16 | F17 | F18 | F19 | F20 | F21 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | IOB[2]:OUTPUT_MISC[1] | ~IOB[2]:DCIUPDATEMODE_ASREQUIRED | IOB[2]:DCI_MODE[3] | IOB[2]:NDRIVE[4] | IOB[2]:DCI_MODE[0] | IOB[3]:OUTPUT_DIFF[0] |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | BREFCLK_INT:ENABLE[1] | - | - | IOB[2]:NDRIVE[0] | IOB[2]:SLEW[3] | IOB[2]:PULL[0] | IOB[2]:NDRIVE[3] | IOB[2]:DCI_MODE[1] | IOB[2]:DISABLE_GTS |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | IOB[2]:OUTPUT_MISC[0] | IOB[2]:SLEW[4] | IOB[2]:PULL[1] | IOB[2]:PDRIVE[3] | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | BREFCLK_INT:ENABLE[0] | - | - | - | - | - | IOB[2]:SLEW[2] | IOB[3]:OUTPUT_DIFF[3] | IOB[2]:PULL[2] | ~IOB[2]:PDRIVE[1] | - | IOB[2]:OUTPUT_ENABLE[1] |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~IOB[2]:NDRIVE[1] | IOB[2]:SLEW[0] | IOB[2]:IBUF_MODE[1] | IOB[2]:PDRIVE[2] | IOB[2]:DCI_MODE[2] | IOB[2]:OUTPUT_ENABLE[0] |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~IOB[2]:PDRIVE[0] | IOB[2]:SLEW[1] | IOB[2]:IBUF_MODE[2] | ~IOB[2]:NDRIVE[2] | - | IOB[2]:IBUF_MODE[0] |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| BREFCLK_INT:ENABLE | 1.F13.B10 | 1.F10.B8 |
|---|---|---|
| IOB[2]:OUTPUT_ENABLE | 1.F21.B8 | 1.F21.B7 |
| IOB[2]:OUTPUT_MISC | 1.F16.B11 | 1.F16.B9 |
| IOB[3]:OUTPUT_ENABLE | 0.F7.B10 | 0.F7.B6 |
| IOB[3]:OUTPUT_MISC | 0.F0.B10 | 0.F0.B11 |
| IOB[4]:OUTPUT_ENABLE | 0.F13.B8 | 0.F13.B6 |
| IOB[4]:OUTPUT_MISC | 0.F8.B10 | 0.F8.B9 |
| IOB[5]:OUTPUT_ENABLE | 0.F21.B8 | 0.F21.B7 |
| IOB[5]:OUTPUT_MISC | 0.F16.B11 | 0.F16.B9 |
| non-inverted | [1] | [0] |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 1.F17.B11 |
|---|---|
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B11 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 0.F9.B9 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 0.F17.B11 |
| inverted | ~[0] |
| IOB[2]:DCI_MODE | 1.F18.B11 | 1.F20.B7 | 1.F20.B10 | 1.F20.B11 |
|---|---|---|---|---|
| IOB[3]:DCI_MODE | 0.F4.B11 | 0.F6.B6 | 0.F6.B8 | 0.F6.B10 |
| IOB[4]:DCI_MODE | 0.F10.B11 | 0.F12.B6 | 0.F12.B7 | 0.F12.B10 |
| IOB[5]:DCI_MODE | 0.F18.B11 | 0.F20.B7 | 0.F20.B10 | 0.F20.B11 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[2]:DISABLE_GTS | 1.F21.B10 |
|---|---|
| IOB[3]:DISABLE_GTS | 0.F7.B11 |
| IOB[4]:DISABLE_GTS | 0.F13.B11 |
| IOB[5]:DISABLE_GTS | 0.F21.B10 |
| non-inverted | [0] |
| IOB[2]:IBUF_MODE | 1.F18.B6 | 1.F18.B7 | 1.F21.B6 |
|---|---|---|---|
| IOB[3]:IBUF_MODE | 0.F4.B10 | 0.F4.B6 | 0.F7.B8 |
| IOB[4]:IBUF_MODE | 0.F10.B8 | 0.F10.B7 | 0.F13.B10 |
| IOB[5]:IBUF_MODE | 0.F18.B6 | 0.F18.B7 | 0.F21.B6 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[2]:NDRIVE | 1.F19.B11 | 1.F19.B10 | 1.F19.B6 | 1.F16.B7 | 1.F16.B10 |
|---|---|---|---|---|---|
| IOB[3]:NDRIVE | 0.F5.B9 | 0.F5.B6 | 0.F5.B8 | 0.F0.B6 | 0.F0.B9 |
| IOB[4]:NDRIVE | 0.F11.B11 | 0.F11.B10 | 0.F11.B6 | 0.F8.B6 | 0.F8.B11 |
| IOB[5]:NDRIVE | 0.F19.B11 | 0.F19.B10 | 0.F19.B6 | 0.F16.B7 | 0.F16.B10 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[2]:PDRIVE | 1.F19.B9 | 1.F19.B7 | 1.F19.B8 | 1.F16.B6 |
|---|---|---|---|---|
| IOB[3]:PDRIVE | 0.F5.B11 | 0.F5.B7 | 0.F5.B10 | 0.F0.B8 |
| IOB[4]:PDRIVE | 0.F11.B9 | 0.F11.B7 | 0.F11.B8 | 0.F8.B8 |
| IOB[5]:PDRIVE | 0.F19.B9 | 0.F19.B7 | 0.F19.B8 | 0.F16.B6 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[2]:PULL | 1.F18.B8 | 1.F18.B9 | 1.F18.B10 |
|---|---|---|---|
| IOB[3]:PULL | 0.F4.B7 | 0.F4.B8 | 0.F4.B9 |
| IOB[4]:PULL | 0.F10.B6 | 0.F10.B9 | 0.F10.B10 |
| IOB[5]:PULL | 0.F18.B8 | 0.F18.B9 | 0.F18.B10 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[2]:SLEW | 1.F17.B9 | 1.F17.B10 | 1.F16.B8 | 1.F17.B6 | 1.F17.B7 |
|---|---|---|---|---|---|
| IOB[3]:SLEW | 0.F3.B8 | 0.F3.B6 | 0.F0.B7 | 0.F3.B7 | 0.F3.B10 |
| IOB[4]:SLEW | 0.F9.B8 | 0.F9.B6 | 0.F8.B7 | 0.F9.B10 | 0.F9.B7 |
| IOB[5]:SLEW | 0.F17.B9 | 0.F17.B10 | 0.F16.B8 | 0.F17.B6 | 0.F17.B7 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
| IOB[3]:OUTPUT_DIFF | 1.F17.B8 | 0.F6.B9 | 0.F3.B9 | 1.F21.B11 |
|---|---|---|---|---|
| IOB[5]:OUTPUT_DIFF | 0.F9.B11 | 0.F21.B11 | 0.F17.B8 | 0.F12.B9 |
| non-inverted | [3] | [2] | [1] | [0] |
Tile IOB_V2P_WS2
Cells: 2
Bitstream
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B6 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B33 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B60 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B6 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B33 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B60 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F2.B13 | 0.F2.B21 | 0.F3.B20 | 0.F2.B20 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F2.B40 | 0.F2.B48 | 0.F3.B47 | 0.F2.B47 |
| IOB[2]:DCI_MODE | 0.F2.B67 | 0.F2.B75 | 0.F3.B74 | 0.F2.B74 |
| IOB[3]:DCI_MODE | 1.F2.B13 | 1.F2.B21 | 1.F3.B20 | 1.F2.B20 |
| IOB[4]:DCI_MODE | 1.F2.B40 | 1.F2.B48 | 1.F3.B47 | 1.F2.B47 |
| IOB[5]:DCI_MODE | 1.F2.B67 | 1.F2.B75 | 1.F3.B74 | 1.F2.B74 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F2.B18 |
|---|---|
| IOB[0]:VR | 0.F3.B21 |
| IOB[1]:DISABLE_GTS | 0.F2.B45 |
| IOB[1]:VR | 0.F3.B48 |
| IOB[2]:DISABLE_GTS | 0.F2.B72 |
| IOB[3]:DISABLE_GTS | 1.F2.B18 |
| IOB[4]:DISABLE_GTS | 1.F2.B45 |
| IOB[5]:DISABLE_GTS | 1.F2.B72 |
| IOB[5]:VREF | 1.F3.B71 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F3.B15 | 0.F2.B15 | 0.F2.B16 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F3.B42 | 0.F2.B42 | 0.F2.B43 |
| IOB[2]:IBUF_MODE | 0.F3.B69 | 0.F2.B69 | 0.F2.B70 |
| IOB[3]:IBUF_MODE | 1.F3.B15 | 1.F2.B15 | 1.F2.B16 |
| IOB[4]:IBUF_MODE | 1.F3.B42 | 1.F2.B42 | 1.F2.B43 |
| IOB[5]:IBUF_MODE | 1.F3.B69 | 1.F2.B69 | 1.F2.B70 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F2.B12 | 0.F2.B11 | 0.F2.B10 | 0.F2.B9 | 0.F2.B8 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F2.B39 | 0.F2.B38 | 0.F2.B37 | 0.F2.B36 | 0.F2.B35 |
| IOB[2]:NDRIVE | 0.F2.B66 | 0.F2.B65 | 0.F2.B64 | 0.F2.B63 | 0.F2.B62 |
| IOB[3]:NDRIVE | 1.F2.B12 | 1.F2.B11 | 1.F2.B10 | 1.F2.B9 | 1.F2.B8 |
| IOB[4]:NDRIVE | 1.F2.B39 | 1.F2.B38 | 1.F2.B37 | 1.F2.B36 | 1.F2.B35 |
| IOB[5]:NDRIVE | 1.F2.B66 | 1.F2.B65 | 1.F2.B64 | 1.F2.B63 | 1.F2.B62 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_DIFF | 0.F2.B33 | 0.F2.B19 | 0.F2.B6 | 0.F2.B46 |
|---|---|---|---|---|
| IOB[2]:OUTPUT_DIFF | 1.F2.B6 | 0.F2.B73 | 0.F2.B60 | 1.F2.B19 |
| IOB[4]:OUTPUT_DIFF | 1.F2.B60 | 1.F2.B46 | 1.F2.B33 | 1.F2.B73 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F3.B16 | 0.F2.B17 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F3.B7 | 0.F2.B7 |
| IOB[1]:OUTPUT_ENABLE | 0.F3.B43 | 0.F2.B44 |
| IOB[1]:OUTPUT_MISC | 0.F3.B34 | 0.F2.B34 |
| IOB[2]:OUTPUT_ENABLE | 0.F3.B70 | 0.F2.B71 |
| IOB[2]:OUTPUT_MISC | 0.F3.B61 | 0.F2.B61 |
| IOB[3]:OUTPUT_ENABLE | 1.F3.B16 | 1.F2.B17 |
| IOB[3]:OUTPUT_MISC | 1.F3.B7 | 1.F2.B7 |
| IOB[4]:OUTPUT_ENABLE | 1.F3.B43 | 1.F2.B44 |
| IOB[4]:OUTPUT_MISC | 1.F3.B34 | 1.F2.B34 |
| IOB[5]:OUTPUT_ENABLE | 1.F3.B70 | 1.F2.B71 |
| IOB[5]:OUTPUT_MISC | 1.F3.B61 | 1.F2.B61 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F3.B12 | 0.F3.B11 | 0.F3.B10 | 0.F3.B9 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F3.B39 | 0.F3.B38 | 0.F3.B37 | 0.F3.B36 |
| IOB[2]:PDRIVE | 0.F3.B66 | 0.F3.B65 | 0.F3.B64 | 0.F3.B63 |
| IOB[3]:PDRIVE | 1.F3.B12 | 1.F3.B11 | 1.F3.B10 | 1.F3.B9 |
| IOB[4]:PDRIVE | 1.F3.B39 | 1.F3.B38 | 1.F3.B37 | 1.F3.B36 |
| IOB[5]:PDRIVE | 1.F3.B66 | 1.F3.B65 | 1.F3.B64 | 1.F3.B63 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F3.B14 | 0.F2.B14 | 0.F3.B13 |
|---|---|---|---|
| IOB[1]:PULL | 0.F3.B41 | 0.F2.B41 | 0.F3.B40 |
| IOB[2]:PULL | 0.F3.B68 | 0.F2.B68 | 0.F3.B67 |
| IOB[3]:PULL | 1.F3.B14 | 1.F2.B14 | 1.F3.B13 |
| IOB[4]:PULL | 1.F3.B41 | 1.F2.B41 | 1.F3.B40 |
| IOB[5]:PULL | 1.F3.B68 | 1.F2.B68 | 1.F3.B67 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B4 | 0.F3.B8 | 0.F2.B4 | 0.F2.B5 | 0.F3.B5 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F3.B31 | 0.F3.B35 | 0.F2.B31 | 0.F2.B32 | 0.F3.B32 |
| IOB[2]:SLEW | 0.F3.B58 | 0.F3.B62 | 0.F2.B58 | 0.F2.B59 | 0.F3.B59 |
| IOB[3]:SLEW | 1.F3.B4 | 1.F3.B8 | 1.F2.B4 | 1.F2.B5 | 1.F3.B5 |
| IOB[4]:SLEW | 1.F3.B31 | 1.F3.B35 | 1.F2.B31 | 1.F2.B32 | 1.F3.B32 |
| IOB[5]:SLEW | 1.F3.B58 | 1.F3.B62 | 1.F2.B58 | 1.F2.B59 | 1.F3.B59 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |
Tile IOB_V2P_WN2
Cells: 2
Bitstream
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| Bit | Frame | |||
|---|---|---|---|---|
| F0 | F1 | F2 | F3 | |
| B79 | - | - | - | - |
| B78 | - | - | - | - |
| B77 | - | - | - | - |
| B76 | - | - | - | - |
| B75 | - | - | - | - |
| B74 | - | - | - | - |
| B73 | - | - | - | - |
| B72 | - | - | - | - |
| B71 | - | - | - | - |
| B70 | - | - | - | - |
| B69 | - | - | - | - |
| B68 | - | - | - | - |
| B67 | - | - | - | - |
| B66 | - | - | - | - |
| B65 | - | - | - | - |
| B64 | - | - | - | - |
| B63 | - | - | - | - |
| B62 | - | - | - | - |
| B61 | - | - | - | - |
| B60 | - | - | - | - |
| B59 | - | - | - | - |
| B58 | - | - | - | - |
| B57 | - | - | - | - |
| B56 | - | - | - | - |
| B55 | - | - | - | - |
| B54 | - | - | - | - |
| B53 | - | - | - | - |
| B52 | - | - | - | - |
| B51 | - | - | - | - |
| B50 | - | - | - | - |
| B49 | - | - | - | - |
| B48 | - | - | - | - |
| B47 | - | - | - | - |
| B46 | - | - | - | - |
| B45 | - | - | - | - |
| B44 | - | - | - | - |
| B43 | - | - | - | - |
| B42 | - | - | - | - |
| B41 | - | - | - | - |
| B40 | - | - | - | - |
| B39 | - | - | - | - |
| B38 | - | - | - | - |
| B37 | - | - | - | - |
| B36 | - | - | - | - |
| B35 | - | - | - | - |
| B34 | - | - | - | - |
| B33 | - | - | - | - |
| B32 | - | - | - | - |
| B31 | - | - | - | - |
| B30 | - | - | - | - |
| B29 | - | - | - | - |
| B28 | - | - | - | - |
| B27 | - | - | - | - |
| B26 | - | - | - | - |
| B25 | - | - | - | - |
| B24 | - | - | - | - |
| B23 | - | - | - | - |
| B22 | - | - | - | - |
| B21 | - | - | - | - |
| B20 | - | - | - | - |
| B19 | - | - | - | - |
| B18 | - | - | - | - |
| B17 | - | - | - | - |
| B16 | - | - | - | - |
| B15 | - | - | - | - |
| B14 | - | - | - | - |
| B13 | - | - | - | - |
| B12 | - | - | - | - |
| B11 | - | - | - | - |
| B10 | - | - | - | - |
| B9 | - | - | - | - |
| B8 | - | - | - | - |
| B7 | - | - | - | - |
| B6 | - | - | - | - |
| B5 | - | - | - | - |
| B4 | - | - | - | - |
| B3 | - | - | - | - |
| B2 | - | - | - | - |
| B1 | - | - | - | - |
| B0 | - | - | - | - |
| IOB[0]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B6 |
|---|---|
| IOB[1]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B33 |
| IOB[2]:DCIUPDATEMODE_ASREQUIRED | 0.F3.B60 |
| IOB[3]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B6 |
| IOB[4]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B33 |
| IOB[5]:DCIUPDATEMODE_ASREQUIRED | 1.F3.B60 |
| inverted | ~[0] |
| IOB[0]:DCI_MODE | 0.F2.B13 | 0.F2.B21 | 0.F3.B20 | 0.F2.B20 |
|---|---|---|---|---|
| IOB[1]:DCI_MODE | 0.F2.B40 | 0.F2.B48 | 0.F3.B47 | 0.F2.B47 |
| IOB[2]:DCI_MODE | 0.F2.B67 | 0.F2.B75 | 0.F3.B74 | 0.F2.B74 |
| IOB[3]:DCI_MODE | 1.F2.B13 | 1.F2.B21 | 1.F3.B20 | 1.F2.B20 |
| IOB[4]:DCI_MODE | 1.F2.B40 | 1.F2.B48 | 1.F3.B47 | 1.F2.B47 |
| IOB[5]:DCI_MODE | 1.F2.B67 | 1.F2.B75 | 1.F3.B74 | 1.F2.B74 |
| NONE | 0 | 0 | 0 | 0 |
| OUTPUT | 0 | 0 | 0 | 1 |
| OUTPUT_HALF | 0 | 0 | 1 | 0 |
| TERM_SPLIT | 0 | 1 | 0 | 0 |
| TERM_VCC | 1 | 0 | 1 | 1 |
| IOB[0]:DISABLE_GTS | 0.F2.B18 |
|---|---|
| IOB[1]:DISABLE_GTS | 0.F2.B45 |
| IOB[2]:DISABLE_GTS | 0.F2.B72 |
| IOB[3]:DISABLE_GTS | 1.F2.B18 |
| IOB[4]:DISABLE_GTS | 1.F2.B45 |
| IOB[4]:VR | 1.F3.B48 |
| IOB[5]:DISABLE_GTS | 1.F2.B72 |
| IOB[5]:VR | 1.F3.B75 |
| IOB[5]:VREF | 1.F3.B71 |
| non-inverted | [0] |
| IOB[0]:IBUF_MODE | 0.F3.B15 | 0.F2.B15 | 0.F2.B16 |
|---|---|---|---|
| IOB[1]:IBUF_MODE | 0.F3.B42 | 0.F2.B42 | 0.F2.B43 |
| IOB[2]:IBUF_MODE | 0.F3.B69 | 0.F2.B69 | 0.F2.B70 |
| IOB[3]:IBUF_MODE | 1.F3.B15 | 1.F2.B15 | 1.F2.B16 |
| IOB[4]:IBUF_MODE | 1.F3.B42 | 1.F2.B42 | 1.F2.B43 |
| IOB[5]:IBUF_MODE | 1.F3.B69 | 1.F2.B69 | 1.F2.B70 |
| NONE | 0 | 0 | 0 |
| VREF | 0 | 1 | 1 |
| DIFF | 1 | 0 | 1 |
| CMOS | 1 | 1 | 1 |
| IOB[0]:NDRIVE | 0.F2.B12 | 0.F2.B11 | 0.F2.B10 | 0.F2.B9 | 0.F2.B8 |
|---|---|---|---|---|---|
| IOB[1]:NDRIVE | 0.F2.B39 | 0.F2.B38 | 0.F2.B37 | 0.F2.B36 | 0.F2.B35 |
| IOB[2]:NDRIVE | 0.F2.B66 | 0.F2.B65 | 0.F2.B64 | 0.F2.B63 | 0.F2.B62 |
| IOB[3]:NDRIVE | 1.F2.B12 | 1.F2.B11 | 1.F2.B10 | 1.F2.B9 | 1.F2.B8 |
| IOB[4]:NDRIVE | 1.F2.B39 | 1.F2.B38 | 1.F2.B37 | 1.F2.B36 | 1.F2.B35 |
| IOB[5]:NDRIVE | 1.F2.B66 | 1.F2.B65 | 1.F2.B64 | 1.F2.B63 | 1.F2.B62 |
| mixed inversion | [4] | [3] | ~[2] | ~[1] | [0] |
| IOB[0]:OUTPUT_DIFF | 0.F2.B33 | 0.F2.B19 | 0.F2.B6 | 0.F2.B46 |
|---|---|---|---|---|
| IOB[2]:OUTPUT_DIFF | 1.F2.B6 | 0.F2.B73 | 0.F2.B60 | 1.F2.B19 |
| IOB[4]:OUTPUT_DIFF | 1.F2.B60 | 1.F2.B46 | 1.F2.B33 | 1.F2.B73 |
| non-inverted | [3] | [2] | [1] | [0] |
| IOB[0]:OUTPUT_ENABLE | 0.F3.B16 | 0.F2.B17 |
|---|---|---|
| IOB[0]:OUTPUT_MISC | 0.F3.B7 | 0.F2.B7 |
| IOB[1]:OUTPUT_ENABLE | 0.F3.B43 | 0.F2.B44 |
| IOB[1]:OUTPUT_MISC | 0.F3.B34 | 0.F2.B34 |
| IOB[2]:OUTPUT_ENABLE | 0.F3.B70 | 0.F2.B71 |
| IOB[2]:OUTPUT_MISC | 0.F3.B61 | 0.F2.B61 |
| IOB[3]:OUTPUT_ENABLE | 1.F3.B16 | 1.F2.B17 |
| IOB[3]:OUTPUT_MISC | 1.F3.B7 | 1.F2.B7 |
| IOB[4]:OUTPUT_ENABLE | 1.F3.B43 | 1.F2.B44 |
| IOB[4]:OUTPUT_MISC | 1.F3.B34 | 1.F2.B34 |
| IOB[5]:OUTPUT_ENABLE | 1.F3.B70 | 1.F2.B71 |
| IOB[5]:OUTPUT_MISC | 1.F3.B61 | 1.F2.B61 |
| non-inverted | [1] | [0] |
| IOB[0]:PDRIVE | 0.F3.B12 | 0.F3.B11 | 0.F3.B10 | 0.F3.B9 |
|---|---|---|---|---|
| IOB[1]:PDRIVE | 0.F3.B39 | 0.F3.B38 | 0.F3.B37 | 0.F3.B36 |
| IOB[2]:PDRIVE | 0.F3.B66 | 0.F3.B65 | 0.F3.B64 | 0.F3.B63 |
| IOB[3]:PDRIVE | 1.F3.B12 | 1.F3.B11 | 1.F3.B10 | 1.F3.B9 |
| IOB[4]:PDRIVE | 1.F3.B39 | 1.F3.B38 | 1.F3.B37 | 1.F3.B36 |
| IOB[5]:PDRIVE | 1.F3.B66 | 1.F3.B65 | 1.F3.B64 | 1.F3.B63 |
| mixed inversion | [3] | [2] | ~[1] | ~[0] |
| IOB[0]:PULL | 0.F3.B14 | 0.F2.B14 | 0.F3.B13 |
|---|---|---|---|
| IOB[1]:PULL | 0.F3.B41 | 0.F2.B41 | 0.F3.B40 |
| IOB[2]:PULL | 0.F3.B68 | 0.F2.B68 | 0.F3.B67 |
| IOB[3]:PULL | 1.F3.B14 | 1.F2.B14 | 1.F3.B13 |
| IOB[4]:PULL | 1.F3.B41 | 1.F2.B41 | 1.F3.B40 |
| IOB[5]:PULL | 1.F3.B68 | 1.F2.B68 | 1.F3.B67 |
| PULLDOWN | 0 | 0 | 0 |
| NONE | 0 | 0 | 1 |
| PULLUP | 0 | 1 | 1 |
| KEEPER | 1 | 0 | 1 |
| IOB[0]:SLEW | 0.F3.B4 | 0.F3.B8 | 0.F2.B4 | 0.F2.B5 | 0.F3.B5 |
|---|---|---|---|---|---|
| IOB[1]:SLEW | 0.F3.B31 | 0.F3.B35 | 0.F2.B31 | 0.F2.B32 | 0.F3.B32 |
| IOB[2]:SLEW | 0.F3.B58 | 0.F3.B62 | 0.F2.B58 | 0.F2.B59 | 0.F3.B59 |
| IOB[3]:SLEW | 1.F3.B4 | 1.F3.B8 | 1.F2.B4 | 1.F2.B5 | 1.F3.B5 |
| IOB[4]:SLEW | 1.F3.B31 | 1.F3.B35 | 1.F2.B31 | 1.F2.B32 | 1.F3.B32 |
| IOB[5]:SLEW | 1.F3.B58 | 1.F3.B62 | 1.F2.B58 | 1.F2.B59 | 1.F3.B59 |
| non-inverted | [4] | [3] | [2] | [1] | [0] |