GTH transceivers

TODO: document

Tile GTH

Cells: 40

Bels GTH_QUAD

virtex6 GTH bel GTH_QUAD pins
Pin	Direction	GTH_QUAD
DISABLEDRP	in	CELL[11].IMUX_IMUX_DELAY[26]
DCLK	in	CELL[10].IMUX_CLK[1] invert by !MAIN[9][28][43]
DEN	in	CELL[11].IMUX_IMUX_DELAY[40]
DWE	in	CELL[11].IMUX_IMUX_DELAY[24]
DADDR[0]	in	CELL[10].IMUX_IMUX_DELAY[26]
DADDR[1]	in	CELL[10].IMUX_IMUX_DELAY[10]
DADDR[2]	in	CELL[10].IMUX_IMUX_DELAY[18]
DADDR[3]	in	CELL[10].IMUX_IMUX_DELAY[33]
DADDR[4]	in	CELL[10].IMUX_IMUX_DELAY[25]
DADDR[5]	in	CELL[10].IMUX_IMUX_DELAY[17]
DADDR[6]	in	CELL[10].IMUX_IMUX_DELAY[40]
DADDR[7]	in	CELL[10].IMUX_IMUX_DELAY[24]
DADDR[8]	in	CELL[10].IMUX_IMUX_DELAY[8]
DADDR[9]	in	CELL[10].IMUX_IMUX_DELAY[16]
DADDR[10]	in	CELL[19].IMUX_IMUX_DELAY[39]
DADDR[11]	in	CELL[19].IMUX_IMUX_DELAY[31]
DADDR[12]	in	CELL[19].IMUX_IMUX_DELAY[15]
DADDR[13]	in	CELL[19].IMUX_IMUX_DELAY[30]
DADDR[14]	in	CELL[19].IMUX_IMUX_DELAY[14]
DADDR[15]	in	CELL[19].IMUX_IMUX_DELAY[22]
DI[0]	in	CELL[10].IMUX_IMUX_DELAY[39]
DI[1]	in	CELL[10].IMUX_IMUX_DELAY[31]
DI[2]	in	CELL[10].IMUX_IMUX_DELAY[15]
DI[3]	in	CELL[10].IMUX_IMUX_DELAY[30]
DI[4]	in	CELL[10].IMUX_IMUX_DELAY[14]
DI[5]	in	CELL[10].IMUX_IMUX_DELAY[22]
DI[6]	in	CELL[10].IMUX_IMUX_DELAY[37]
DI[7]	in	CELL[10].IMUX_IMUX_DELAY[29]
DI[8]	in	CELL[10].IMUX_IMUX_DELAY[21]
DI[9]	in	CELL[10].IMUX_IMUX_DELAY[28]
DI[10]	in	CELL[10].IMUX_IMUX_DELAY[12]
DI[11]	in	CELL[10].IMUX_IMUX_DELAY[4]
DI[12]	in	CELL[10].IMUX_IMUX_DELAY[35]
DI[13]	in	CELL[10].IMUX_IMUX_DELAY[19]
DI[14]	in	CELL[10].IMUX_IMUX_DELAY[3]
DI[15]	in	CELL[10].IMUX_IMUX_DELAY[42]
MGMTPCSREGRD	in	CELL[19].IMUX_IMUX_DELAY[7]
MGMTPCSREGWR	in	CELL[17].IMUX_IMUX_DELAY[7]
MGMTPCSLANESEL[0]	in	CELL[16].IMUX_IMUX_DELAY[39]
MGMTPCSLANESEL[1]	in	CELL[16].IMUX_IMUX_DELAY[31]
MGMTPCSLANESEL[2]	in	CELL[17].IMUX_IMUX_DELAY[39]
MGMTPCSLANESEL[3]	in	CELL[17].IMUX_IMUX_DELAY[31]
MGMTPCSMMDADDR[0]	in	CELL[17].IMUX_IMUX_DELAY[24]
MGMTPCSMMDADDR[1]	in	CELL[18].IMUX_IMUX_DELAY[18]
MGMTPCSMMDADDR[2]	in	CELL[18].IMUX_IMUX_DELAY[3]
MGMTPCSMMDADDR[3]	in	CELL[17].IMUX_IMUX_DELAY[28]
MGMTPCSMMDADDR[4]	in	CELL[18].IMUX_IMUX_DELAY[7]
MGMTPCSREGADDR[0]	in	CELL[19].IMUX_IMUX_DELAY[28]
MGMTPCSREGADDR[1]	in	CELL[19].IMUX_IMUX_DELAY[35]
MGMTPCSREGADDR[2]	in	CELL[19].IMUX_IMUX_DELAY[19]
MGMTPCSREGADDR[3]	in	CELL[19].IMUX_IMUX_DELAY[42]
MGMTPCSREGADDR[4]	in	CELL[19].IMUX_IMUX_DELAY[26]
MGMTPCSREGADDR[5]	in	CELL[19].IMUX_IMUX_DELAY[33]
MGMTPCSREGADDR[6]	in	CELL[19].IMUX_IMUX_DELAY[17]
MGMTPCSREGADDR[7]	in	CELL[19].IMUX_IMUX_DELAY[10]
MGMTPCSREGADDR[8]	in	CELL[19].IMUX_IMUX_DELAY[1]
MGMTPCSREGADDR[9]	in	CELL[19].IMUX_IMUX_DELAY[25]
MGMTPCSREGADDR[10]	in	CELL[19].IMUX_IMUX_DELAY[16]
MGMTPCSREGADDR[11]	in	CELL[19].IMUX_IMUX_DELAY[40]
MGMTPCSREGADDR[12]	in	CELL[19].IMUX_IMUX_DELAY[8]
MGMTPCSREGADDR[13]	in	CELL[19].IMUX_IMUX_DELAY[12]
MGMTPCSREGADDR[14]	in	CELL[19].IMUX_IMUX_DELAY[4]
MGMTPCSREGADDR[15]	in	CELL[19].IMUX_IMUX_DELAY[24]
MGMTPCSWRDATA[0]	in	CELL[18].IMUX_IMUX_DELAY[28]
MGMTPCSWRDATA[1]	in	CELL[18].IMUX_IMUX_DELAY[35]
MGMTPCSWRDATA[2]	in	CELL[18].IMUX_IMUX_DELAY[19]
MGMTPCSWRDATA[3]	in	CELL[18].IMUX_IMUX_DELAY[42]
MGMTPCSWRDATA[4]	in	CELL[18].IMUX_IMUX_DELAY[26]
MGMTPCSWRDATA[5]	in	CELL[18].IMUX_IMUX_DELAY[33]
MGMTPCSWRDATA[6]	in	CELL[18].IMUX_IMUX_DELAY[17]
MGMTPCSWRDATA[7]	in	CELL[18].IMUX_IMUX_DELAY[10]
MGMTPCSWRDATA[8]	in	CELL[18].IMUX_IMUX_DELAY[1]
MGMTPCSWRDATA[9]	in	CELL[18].IMUX_IMUX_DELAY[25]
MGMTPCSWRDATA[10]	in	CELL[18].IMUX_IMUX_DELAY[16]
MGMTPCSWRDATA[11]	in	CELL[18].IMUX_IMUX_DELAY[40]
MGMTPCSWRDATA[12]	in	CELL[18].IMUX_IMUX_DELAY[8]
MGMTPCSWRDATA[13]	in	CELL[18].IMUX_IMUX_DELAY[12]
MGMTPCSWRDATA[14]	in	CELL[18].IMUX_IMUX_DELAY[4]
MGMTPCSWRDATA[15]	in	CELL[18].IMUX_IMUX_DELAY[24]
GREFCLK	in	CELL[20].IMUX_CLK[1]
GTHINIT	in	CELL[16].IMUX_IMUX_DELAY[26]
GTHRESET	in	CELL[16].IMUX_IMUX_DELAY[16]
CLKTESTSIG[0]	in	CELL[5].IMUX_IMUX_DELAY[28]
CLKTESTSIG[1]	in	CELL[5].IMUX_IMUX_DELAY[29]
CLKTESTSIG[2]	in	CELL[15].IMUX_IMUX_DELAY[28]
CLKTESTSIG[3]	in	CELL[15].IMUX_IMUX_DELAY[29]
CLKTESTSIG[4]	in	CELL[25].IMUX_IMUX_DELAY[20]
CLKTESTSIG[5]	in	CELL[25].IMUX_IMUX_DELAY[45]
CLKTESTSIG[6]	in	CELL[24].IMUX_IMUX_DELAY[19]
CLKTESTSIG[7]	in	CELL[24].IMUX_IMUX_DELAY[18]
CLKTESTSIG[8]	in	CELL[20].IMUX_IMUX_DELAY[0]
CLKTESTSIG[9]	in	CELL[20].IMUX_IMUX_DELAY[8]
GTHX2LANE01	in	CELL[16].IMUX_IMUX_DELAY[40]
GTHX2LANE23	in	CELL[16].IMUX_IMUX_DELAY[24]
GTHX4LANE	in	CELL[16].IMUX_IMUX_DELAY[8]
PLLPCSCLKDIV[0]	in	CELL[29].IMUX_IMUX_DELAY[39]
PLLPCSCLKDIV[1]	in	CELL[29].IMUX_IMUX_DELAY[31]
PLLPCSCLKDIV[2]	in	CELL[29].IMUX_IMUX_DELAY[15]
PLLPCSCLKDIV[3]	in	CELL[29].IMUX_IMUX_DELAY[30]
PLLPCSCLKDIV[4]	in	CELL[29].IMUX_IMUX_DELAY[14]
PLLPCSCLKDIV[5]	in	CELL[29].IMUX_IMUX_DELAY[22]
PLLREFCLKSEL[0]	in	CELL[29].IMUX_IMUX_DELAY[29]
PLLREFCLKSEL[1]	in	CELL[29].IMUX_IMUX_DELAY[37]
PLLREFCLKSEL[2]	in	CELL[29].IMUX_IMUX_DELAY[21]
DFETRAINCTRL0	in	CELL[5].IMUX_IMUX_DELAY[35]
POWERDOWN0	in	CELL[5].IMUX_IMUX_DELAY[3]
RXBUFRESET0	in	CELL[7].IMUX_IMUX_DELAY[15]
RXENCOMMADET0	in	CELL[3].IMUX_IMUX_DELAY[42]
RXPOLARITY0	in	CELL[5].IMUX_IMUX_DELAY[14]
RXPOWERDOWN0[0]	in	CELL[5].IMUX_IMUX_DELAY[10]
RXPOWERDOWN0[1]	in	CELL[5].IMUX_IMUX_DELAY[18]
RXRATE0[0]	in	CELL[5].IMUX_IMUX_DELAY[24]
RXRATE0[1]	in	CELL[5].IMUX_IMUX_DELAY[40]
RXSLIP0	in	CELL[4].IMUX_IMUX_DELAY[24]
RXUSERCLKIN0	in	CELL[8].IMUX_CLK[1] invert by !MAIN[9][29][47]
SAMPLERATE0[0]	in	CELL[5].IMUX_IMUX_DELAY[1]
SAMPLERATE0[1]	in	CELL[5].IMUX_IMUX_DELAY[17]
SAMPLERATE0[2]	in	CELL[5].IMUX_IMUX_DELAY[33]
TXBUFRESET0	in	CELL[6].IMUX_IMUX_DELAY[15]
TXCTRL0[0]	in	CELL[1].IMUX_IMUX_DELAY[28]
TXCTRL0[1]	in	CELL[2].IMUX_IMUX_DELAY[28]
TXCTRL0[2]	in	CELL[3].IMUX_IMUX_DELAY[28]
TXCTRL0[3]	in	CELL[4].IMUX_IMUX_DELAY[28]
TXCTRL0[4]	in	CELL[4].IMUX_IMUX_DELAY[12]
TXCTRL0[5]	in	CELL[3].IMUX_IMUX_DELAY[12]
TXCTRL0[6]	in	CELL[2].IMUX_IMUX_DELAY[12]
TXCTRL0[7]	in	CELL[1].IMUX_IMUX_DELAY[12]
TXDATA0[0]	in	CELL[1].IMUX_IMUX_DELAY[39]
TXDATA0[1]	in	CELL[2].IMUX_IMUX_DELAY[39]
TXDATA0[2]	in	CELL[3].IMUX_IMUX_DELAY[39]
TXDATA0[3]	in	CELL[4].IMUX_IMUX_DELAY[39]
TXDATA0[4]	in	CELL[1].IMUX_IMUX_DELAY[37]
TXDATA0[5]	in	CELL[2].IMUX_IMUX_DELAY[37]
TXDATA0[6]	in	CELL[3].IMUX_IMUX_DELAY[37]
TXDATA0[7]	in	CELL[4].IMUX_IMUX_DELAY[37]
TXDATA0[8]	in	CELL[1].IMUX_IMUX_DELAY[31]
TXDATA0[9]	in	CELL[2].IMUX_IMUX_DELAY[31]
TXDATA0[10]	in	CELL[3].IMUX_IMUX_DELAY[31]
TXDATA0[11]	in	CELL[4].IMUX_IMUX_DELAY[31]
TXDATA0[12]	in	CELL[1].IMUX_IMUX_DELAY[29]
TXDATA0[13]	in	CELL[2].IMUX_IMUX_DELAY[29]
TXDATA0[14]	in	CELL[3].IMUX_IMUX_DELAY[29]
TXDATA0[15]	in	CELL[4].IMUX_IMUX_DELAY[29]
TXDATA0[16]	in	CELL[1].IMUX_IMUX_DELAY[22]
TXDATA0[17]	in	CELL[2].IMUX_IMUX_DELAY[22]
TXDATA0[18]	in	CELL[3].IMUX_IMUX_DELAY[22]
TXDATA0[19]	in	CELL[4].IMUX_IMUX_DELAY[22]
TXDATA0[20]	in	CELL[1].IMUX_IMUX_DELAY[18]
TXDATA0[21]	in	CELL[2].IMUX_IMUX_DELAY[18]
TXDATA0[22]	in	CELL[3].IMUX_IMUX_DELAY[18]
TXDATA0[23]	in	CELL[4].IMUX_IMUX_DELAY[18]
TXDATA0[24]	in	CELL[1].IMUX_IMUX_DELAY[5]
TXDATA0[25]	in	CELL[2].IMUX_IMUX_DELAY[5]
TXDATA0[26]	in	CELL[3].IMUX_IMUX_DELAY[5]
TXDATA0[27]	in	CELL[4].IMUX_IMUX_DELAY[5]
TXDATA0[28]	in	CELL[1].IMUX_IMUX_DELAY[1]
TXDATA0[29]	in	CELL[2].IMUX_IMUX_DELAY[1]
TXDATA0[30]	in	CELL[3].IMUX_IMUX_DELAY[1]
TXDATA0[31]	in	CELL[4].IMUX_IMUX_DELAY[1]
TXDATA0[32]	in	CELL[1].IMUX_IMUX_DELAY[14]
TXDATA0[33]	in	CELL[2].IMUX_IMUX_DELAY[14]
TXDATA0[34]	in	CELL[3].IMUX_IMUX_DELAY[14]
TXDATA0[35]	in	CELL[4].IMUX_IMUX_DELAY[14]
TXDATA0[36]	in	CELL[1].IMUX_IMUX_DELAY[10]
TXDATA0[37]	in	CELL[2].IMUX_IMUX_DELAY[10]
TXDATA0[38]	in	CELL[3].IMUX_IMUX_DELAY[10]
TXDATA0[39]	in	CELL[4].IMUX_IMUX_DELAY[10]
TXDATA0[40]	in	CELL[1].IMUX_IMUX_DELAY[19]
TXDATA0[41]	in	CELL[2].IMUX_IMUX_DELAY[19]
TXDATA0[42]	in	CELL[3].IMUX_IMUX_DELAY[19]
TXDATA0[43]	in	CELL[4].IMUX_IMUX_DELAY[19]
TXDATA0[44]	in	CELL[1].IMUX_IMUX_DELAY[35]
TXDATA0[45]	in	CELL[2].IMUX_IMUX_DELAY[35]
TXDATA0[46]	in	CELL[3].IMUX_IMUX_DELAY[35]
TXDATA0[47]	in	CELL[4].IMUX_IMUX_DELAY[35]
TXDATA0[48]	in	CELL[1].IMUX_IMUX_DELAY[16]
TXDATA0[49]	in	CELL[2].IMUX_IMUX_DELAY[16]
TXDATA0[50]	in	CELL[3].IMUX_IMUX_DELAY[16]
TXDATA0[51]	in	CELL[4].IMUX_IMUX_DELAY[16]
TXDATA0[52]	in	CELL[1].IMUX_IMUX_DELAY[33]
TXDATA0[53]	in	CELL[2].IMUX_IMUX_DELAY[33]
TXDATA0[54]	in	CELL[3].IMUX_IMUX_DELAY[33]
TXDATA0[55]	in	CELL[4].IMUX_IMUX_DELAY[33]
TXDATA0[56]	in	CELL[1].IMUX_IMUX_DELAY[8]
TXDATA0[57]	in	CELL[2].IMUX_IMUX_DELAY[8]
TXDATA0[58]	in	CELL[3].IMUX_IMUX_DELAY[8]
TXDATA0[59]	in	CELL[4].IMUX_IMUX_DELAY[8]
TXDATA0[60]	in	CELL[1].IMUX_IMUX_DELAY[25]
TXDATA0[61]	in	CELL[2].IMUX_IMUX_DELAY[25]
TXDATA0[62]	in	CELL[3].IMUX_IMUX_DELAY[25]
TXDATA0[63]	in	CELL[4].IMUX_IMUX_DELAY[25]
TXDATAMSB0[0]	in	CELL[2].IMUX_IMUX_DELAY[7]
TXDATAMSB0[1]	in	CELL[2].IMUX_IMUX_DELAY[30]
TXDATAMSB0[2]	in	CELL[3].IMUX_IMUX_DELAY[17]
TXDATAMSB0[3]	in	CELL[3].IMUX_IMUX_DELAY[15]
TXDATAMSB0[4]	in	CELL[3].IMUX_IMUX_DELAY[7]
TXDATAMSB0[5]	in	CELL[3].IMUX_IMUX_DELAY[30]
TXDATAMSB0[6]	in	CELL[4].IMUX_IMUX_DELAY[17]
TXDATAMSB0[7]	in	CELL[4].IMUX_IMUX_DELAY[15]
TXDEEMPH0	in	CELL[4].IMUX_IMUX_DELAY[42]
TXMARGIN0[0]	in	CELL[5].IMUX_IMUX_DELAY[15]
TXMARGIN0[1]	in	CELL[5].IMUX_IMUX_DELAY[31]
TXMARGIN0[2]	in	CELL[5].IMUX_IMUX_DELAY[39]
TXPOWERDOWN0[0]	in	CELL[5].IMUX_IMUX_DELAY[26]
TXPOWERDOWN0[1]	in	CELL[5].IMUX_IMUX_DELAY[42]
TXRATE0[0]	in	CELL[5].IMUX_IMUX_DELAY[8]
TXRATE0[1]	in	CELL[5].IMUX_IMUX_DELAY[16]
TXUSERCLKIN0	in	CELL[2].IMUX_CLK[1] invert by !MAIN[9][29][45]
DFETRAINCTRL1	in	CELL[15].IMUX_IMUX_DELAY[35]
POWERDOWN1	in	CELL[15].IMUX_IMUX_DELAY[3]
RXBUFRESET1	in	CELL[17].IMUX_IMUX_DELAY[15]
RXENCOMMADET1	in	CELL[13].IMUX_IMUX_DELAY[42]
RXPOLARITY1	in	CELL[15].IMUX_IMUX_DELAY[14]
RXPOWERDOWN1[0]	in	CELL[15].IMUX_IMUX_DELAY[10]
RXPOWERDOWN1[1]	in	CELL[15].IMUX_IMUX_DELAY[18]
RXRATE1[0]	in	CELL[15].IMUX_IMUX_DELAY[24]
RXRATE1[1]	in	CELL[15].IMUX_IMUX_DELAY[40]
RXSLIP1	in	CELL[14].IMUX_IMUX_DELAY[24]
RXUSERCLKIN1	in	CELL[18].IMUX_CLK[1] invert by !MAIN[9][28][47]
SAMPLERATE1[0]	in	CELL[15].IMUX_IMUX_DELAY[1]
SAMPLERATE1[1]	in	CELL[15].IMUX_IMUX_DELAY[17]
SAMPLERATE1[2]	in	CELL[15].IMUX_IMUX_DELAY[33]
TXBUFRESET1	in	CELL[16].IMUX_IMUX_DELAY[15]
TXCTRL1[0]	in	CELL[11].IMUX_IMUX_DELAY[28]
TXCTRL1[1]	in	CELL[12].IMUX_IMUX_DELAY[28]
TXCTRL1[2]	in	CELL[13].IMUX_IMUX_DELAY[28]
TXCTRL1[3]	in	CELL[14].IMUX_IMUX_DELAY[28]
TXCTRL1[4]	in	CELL[14].IMUX_IMUX_DELAY[12]
TXCTRL1[5]	in	CELL[13].IMUX_IMUX_DELAY[12]
TXCTRL1[6]	in	CELL[12].IMUX_IMUX_DELAY[12]
TXCTRL1[7]	in	CELL[11].IMUX_IMUX_DELAY[12]
TXDATA1[0]	in	CELL[11].IMUX_IMUX_DELAY[39]
TXDATA1[1]	in	CELL[12].IMUX_IMUX_DELAY[39]
TXDATA1[2]	in	CELL[13].IMUX_IMUX_DELAY[39]
TXDATA1[3]	in	CELL[14].IMUX_IMUX_DELAY[39]
TXDATA1[4]	in	CELL[11].IMUX_IMUX_DELAY[37]
TXDATA1[5]	in	CELL[12].IMUX_IMUX_DELAY[37]
TXDATA1[6]	in	CELL[13].IMUX_IMUX_DELAY[37]
TXDATA1[7]	in	CELL[14].IMUX_IMUX_DELAY[37]
TXDATA1[8]	in	CELL[11].IMUX_IMUX_DELAY[31]
TXDATA1[9]	in	CELL[12].IMUX_IMUX_DELAY[31]
TXDATA1[10]	in	CELL[13].IMUX_IMUX_DELAY[31]
TXDATA1[11]	in	CELL[14].IMUX_IMUX_DELAY[31]
TXDATA1[12]	in	CELL[11].IMUX_IMUX_DELAY[29]
TXDATA1[13]	in	CELL[12].IMUX_IMUX_DELAY[29]
TXDATA1[14]	in	CELL[13].IMUX_IMUX_DELAY[29]
TXDATA1[15]	in	CELL[14].IMUX_IMUX_DELAY[29]
TXDATA1[16]	in	CELL[11].IMUX_IMUX_DELAY[22]
TXDATA1[17]	in	CELL[12].IMUX_IMUX_DELAY[22]
TXDATA1[18]	in	CELL[13].IMUX_IMUX_DELAY[22]
TXDATA1[19]	in	CELL[14].IMUX_IMUX_DELAY[22]
TXDATA1[20]	in	CELL[11].IMUX_IMUX_DELAY[18]
TXDATA1[21]	in	CELL[12].IMUX_IMUX_DELAY[18]
TXDATA1[22]	in	CELL[13].IMUX_IMUX_DELAY[18]
TXDATA1[23]	in	CELL[14].IMUX_IMUX_DELAY[18]
TXDATA1[24]	in	CELL[11].IMUX_IMUX_DELAY[5]
TXDATA1[25]	in	CELL[12].IMUX_IMUX_DELAY[5]
TXDATA1[26]	in	CELL[13].IMUX_IMUX_DELAY[5]
TXDATA1[27]	in	CELL[14].IMUX_IMUX_DELAY[5]
TXDATA1[28]	in	CELL[11].IMUX_IMUX_DELAY[1]
TXDATA1[29]	in	CELL[12].IMUX_IMUX_DELAY[1]
TXDATA1[30]	in	CELL[13].IMUX_IMUX_DELAY[1]
TXDATA1[31]	in	CELL[14].IMUX_IMUX_DELAY[1]
TXDATA1[32]	in	CELL[11].IMUX_IMUX_DELAY[14]
TXDATA1[33]	in	CELL[12].IMUX_IMUX_DELAY[14]
TXDATA1[34]	in	CELL[13].IMUX_IMUX_DELAY[14]
TXDATA1[35]	in	CELL[14].IMUX_IMUX_DELAY[14]
TXDATA1[36]	in	CELL[11].IMUX_IMUX_DELAY[10]
TXDATA1[37]	in	CELL[12].IMUX_IMUX_DELAY[10]
TXDATA1[38]	in	CELL[13].IMUX_IMUX_DELAY[10]
TXDATA1[39]	in	CELL[14].IMUX_IMUX_DELAY[10]
TXDATA1[40]	in	CELL[11].IMUX_IMUX_DELAY[19]
TXDATA1[41]	in	CELL[12].IMUX_IMUX_DELAY[19]
TXDATA1[42]	in	CELL[13].IMUX_IMUX_DELAY[19]
TXDATA1[43]	in	CELL[14].IMUX_IMUX_DELAY[19]
TXDATA1[44]	in	CELL[11].IMUX_IMUX_DELAY[35]
TXDATA1[45]	in	CELL[12].IMUX_IMUX_DELAY[35]
TXDATA1[46]	in	CELL[13].IMUX_IMUX_DELAY[35]
TXDATA1[47]	in	CELL[14].IMUX_IMUX_DELAY[35]
TXDATA1[48]	in	CELL[11].IMUX_IMUX_DELAY[16]
TXDATA1[49]	in	CELL[12].IMUX_IMUX_DELAY[16]
TXDATA1[50]	in	CELL[13].IMUX_IMUX_DELAY[16]
TXDATA1[51]	in	CELL[14].IMUX_IMUX_DELAY[16]
TXDATA1[52]	in	CELL[11].IMUX_IMUX_DELAY[33]
TXDATA1[53]	in	CELL[12].IMUX_IMUX_DELAY[33]
TXDATA1[54]	in	CELL[13].IMUX_IMUX_DELAY[33]
TXDATA1[55]	in	CELL[14].IMUX_IMUX_DELAY[33]
TXDATA1[56]	in	CELL[11].IMUX_IMUX_DELAY[8]
TXDATA1[57]	in	CELL[12].IMUX_IMUX_DELAY[8]
TXDATA1[58]	in	CELL[13].IMUX_IMUX_DELAY[8]
TXDATA1[59]	in	CELL[14].IMUX_IMUX_DELAY[8]
TXDATA1[60]	in	CELL[11].IMUX_IMUX_DELAY[25]
TXDATA1[61]	in	CELL[12].IMUX_IMUX_DELAY[25]
TXDATA1[62]	in	CELL[13].IMUX_IMUX_DELAY[25]
TXDATA1[63]	in	CELL[14].IMUX_IMUX_DELAY[25]
TXDATAMSB1[0]	in	CELL[12].IMUX_IMUX_DELAY[7]
TXDATAMSB1[1]	in	CELL[12].IMUX_IMUX_DELAY[30]
TXDATAMSB1[2]	in	CELL[13].IMUX_IMUX_DELAY[17]
TXDATAMSB1[3]	in	CELL[13].IMUX_IMUX_DELAY[15]
TXDATAMSB1[4]	in	CELL[13].IMUX_IMUX_DELAY[7]
TXDATAMSB1[5]	in	CELL[13].IMUX_IMUX_DELAY[30]
TXDATAMSB1[6]	in	CELL[14].IMUX_IMUX_DELAY[17]
TXDATAMSB1[7]	in	CELL[14].IMUX_IMUX_DELAY[15]
TXDEEMPH1	in	CELL[14].IMUX_IMUX_DELAY[42]
TXMARGIN1[0]	in	CELL[15].IMUX_IMUX_DELAY[15]
TXMARGIN1[1]	in	CELL[15].IMUX_IMUX_DELAY[31]
TXMARGIN1[2]	in	CELL[15].IMUX_IMUX_DELAY[39]
TXPOWERDOWN1[0]	in	CELL[15].IMUX_IMUX_DELAY[26]
TXPOWERDOWN1[1]	in	CELL[15].IMUX_IMUX_DELAY[42]
TXRATE1[0]	in	CELL[15].IMUX_IMUX_DELAY[8]
TXRATE1[1]	in	CELL[15].IMUX_IMUX_DELAY[16]
TXUSERCLKIN1	in	CELL[12].IMUX_CLK[1] invert by !MAIN[9][28][45]
DFETRAINCTRL2	in	CELL[34].IMUX_IMUX_DELAY[12]
POWERDOWN2	in	CELL[34].IMUX_IMUX_DELAY[44]
RXBUFRESET2	in	CELL[32].IMUX_IMUX_DELAY[32]
RXENCOMMADET2	in	CELL[36].IMUX_IMUX_DELAY[5]
RXPOLARITY2	in	CELL[34].IMUX_IMUX_DELAY[33]
RXPOWERDOWN2[0]	in	CELL[34].IMUX_IMUX_DELAY[37]
RXPOWERDOWN2[1]	in	CELL[34].IMUX_IMUX_DELAY[29]
RXRATE2[0]	in	CELL[34].IMUX_IMUX_DELAY[23]
RXRATE2[1]	in	CELL[34].IMUX_IMUX_DELAY[7]
RXSLIP2	in	CELL[35].IMUX_IMUX_DELAY[15]
RXUSERCLKIN2	in	CELL[31].IMUX_CLK[0] invert by !MAIN[9][29][46]
SAMPLERATE2[0]	in	CELL[34].IMUX_IMUX_DELAY[38]
SAMPLERATE2[1]	in	CELL[34].IMUX_IMUX_DELAY[30]
SAMPLERATE2[2]	in	CELL[34].IMUX_IMUX_DELAY[22]
TXBUFRESET2	in	CELL[33].IMUX_IMUX_DELAY[32]
TXCTRL2[0]	in	CELL[38].IMUX_IMUX_DELAY[11]
TXCTRL2[1]	in	CELL[37].IMUX_IMUX_DELAY[11]
TXCTRL2[2]	in	CELL[36].IMUX_IMUX_DELAY[19]
TXCTRL2[3]	in	CELL[35].IMUX_IMUX_DELAY[3]
TXCTRL2[4]	in	CELL[35].IMUX_IMUX_DELAY[35]
TXCTRL2[5]	in	CELL[36].IMUX_IMUX_DELAY[27]
TXCTRL2[6]	in	CELL[37].IMUX_IMUX_DELAY[35]
TXCTRL2[7]	in	CELL[38].IMUX_IMUX_DELAY[35]
TXDATA2[0]	in	CELL[38].IMUX_IMUX_DELAY[0]
TXDATA2[1]	in	CELL[37].IMUX_IMUX_DELAY[16]
TXDATA2[2]	in	CELL[36].IMUX_IMUX_DELAY[0]
TXDATA2[3]	in	CELL[35].IMUX_IMUX_DELAY[0]
TXDATA2[4]	in	CELL[38].IMUX_IMUX_DELAY[18]
TXDATA2[5]	in	CELL[37].IMUX_IMUX_DELAY[18]
TXDATA2[6]	in	CELL[36].IMUX_IMUX_DELAY[18]
TXDATA2[7]	in	CELL[35].IMUX_IMUX_DELAY[18]
TXDATA2[8]	in	CELL[38].IMUX_IMUX_DELAY[8]
TXDATA2[9]	in	CELL[37].IMUX_IMUX_DELAY[24]
TXDATA2[10]	in	CELL[36].IMUX_IMUX_DELAY[8]
TXDATA2[11]	in	CELL[35].IMUX_IMUX_DELAY[16]
TXDATA2[12]	in	CELL[38].IMUX_IMUX_DELAY[26]
TXDATA2[13]	in	CELL[37].IMUX_IMUX_DELAY[26]
TXDATA2[14]	in	CELL[36].IMUX_IMUX_DELAY[26]
TXDATA2[15]	in	CELL[35].IMUX_IMUX_DELAY[26]
TXDATA2[16]	in	CELL[38].IMUX_IMUX_DELAY[17]
TXDATA2[17]	in	CELL[37].IMUX_IMUX_DELAY[17]
TXDATA2[18]	in	CELL[36].IMUX_IMUX_DELAY[33]
TXDATA2[19]	in	CELL[35].IMUX_IMUX_DELAY[25]
TXDATA2[20]	in	CELL[38].IMUX_IMUX_DELAY[21]
TXDATA2[21]	in	CELL[37].IMUX_IMUX_DELAY[29]
TXDATA2[22]	in	CELL[36].IMUX_IMUX_DELAY[29]
TXDATA2[23]	in	CELL[35].IMUX_IMUX_DELAY[29]
TXDATA2[24]	in	CELL[38].IMUX_IMUX_DELAY[42]
TXDATA2[25]	in	CELL[37].IMUX_IMUX_DELAY[42]
TXDATA2[26]	in	CELL[36].IMUX_IMUX_DELAY[42]
TXDATA2[27]	in	CELL[35].IMUX_IMUX_DELAY[42]
TXDATA2[28]	in	CELL[38].IMUX_IMUX_DELAY[46]
TXDATA2[29]	in	CELL[37].IMUX_IMUX_DELAY[38]
TXDATA2[30]	in	CELL[36].IMUX_IMUX_DELAY[46]
TXDATA2[31]	in	CELL[35].IMUX_IMUX_DELAY[46]
TXDATA2[32]	in	CELL[38].IMUX_IMUX_DELAY[25]
TXDATA2[33]	in	CELL[37].IMUX_IMUX_DELAY[33]
TXDATA2[34]	in	CELL[36].IMUX_IMUX_DELAY[41]
TXDATA2[35]	in	CELL[35].IMUX_IMUX_DELAY[33]
TXDATA2[36]	in	CELL[38].IMUX_IMUX_DELAY[37]
TXDATA2[37]	in	CELL[37].IMUX_IMUX_DELAY[37]
TXDATA2[38]	in	CELL[36].IMUX_IMUX_DELAY[37]
TXDATA2[39]	in	CELL[35].IMUX_IMUX_DELAY[37]
TXDATA2[40]	in	CELL[38].IMUX_IMUX_DELAY[28]
TXDATA2[41]	in	CELL[37].IMUX_IMUX_DELAY[28]
TXDATA2[42]	in	CELL[36].IMUX_IMUX_DELAY[28]
TXDATA2[43]	in	CELL[35].IMUX_IMUX_DELAY[28]
TXDATA2[44]	in	CELL[38].IMUX_IMUX_DELAY[12]
TXDATA2[45]	in	CELL[37].IMUX_IMUX_DELAY[12]
TXDATA2[46]	in	CELL[36].IMUX_IMUX_DELAY[4]
TXDATA2[47]	in	CELL[35].IMUX_IMUX_DELAY[12]
TXDATA2[48]	in	CELL[38].IMUX_IMUX_DELAY[23]
TXDATA2[49]	in	CELL[37].IMUX_IMUX_DELAY[23]
TXDATA2[50]	in	CELL[36].IMUX_IMUX_DELAY[23]
TXDATA2[51]	in	CELL[35].IMUX_IMUX_DELAY[23]
TXDATA2[52]	in	CELL[38].IMUX_IMUX_DELAY[6]
TXDATA2[53]	in	CELL[37].IMUX_IMUX_DELAY[6]
TXDATA2[54]	in	CELL[36].IMUX_IMUX_DELAY[6]
TXDATA2[55]	in	CELL[35].IMUX_IMUX_DELAY[14]
TXDATA2[56]	in	CELL[38].IMUX_IMUX_DELAY[39]
TXDATA2[57]	in	CELL[37].IMUX_IMUX_DELAY[31]
TXDATA2[58]	in	CELL[36].IMUX_IMUX_DELAY[39]
TXDATA2[59]	in	CELL[35].IMUX_IMUX_DELAY[39]
TXDATA2[60]	in	CELL[38].IMUX_IMUX_DELAY[14]
TXDATA2[61]	in	CELL[37].IMUX_IMUX_DELAY[14]
TXDATA2[62]	in	CELL[36].IMUX_IMUX_DELAY[22]
TXDATA2[63]	in	CELL[35].IMUX_IMUX_DELAY[22]
TXDATAMSB2[0]	in	CELL[37].IMUX_IMUX_DELAY[40]
TXDATAMSB2[1]	in	CELL[37].IMUX_IMUX_DELAY[9]
TXDATAMSB2[2]	in	CELL[36].IMUX_IMUX_DELAY[38]
TXDATAMSB2[3]	in	CELL[36].IMUX_IMUX_DELAY[32]
TXDATAMSB2[4]	in	CELL[36].IMUX_IMUX_DELAY[40]
TXDATAMSB2[5]	in	CELL[36].IMUX_IMUX_DELAY[25]
TXDATAMSB2[6]	in	CELL[35].IMUX_IMUX_DELAY[30]
TXDATAMSB2[7]	in	CELL[35].IMUX_IMUX_DELAY[40]
TXDEEMPH2	in	CELL[35].IMUX_IMUX_DELAY[5]
TXMARGIN2[0]	in	CELL[34].IMUX_IMUX_DELAY[32]
TXMARGIN2[1]	in	CELL[34].IMUX_IMUX_DELAY[16]
TXMARGIN2[2]	in	CELL[34].IMUX_IMUX_DELAY[8]
TXPOWERDOWN2[0]	in	CELL[34].IMUX_IMUX_DELAY[13]
TXPOWERDOWN2[1]	in	CELL[34].IMUX_IMUX_DELAY[5]
TXRATE2[0]	in	CELL[34].IMUX_IMUX_DELAY[47]
TXRATE2[1]	in	CELL[34].IMUX_IMUX_DELAY[31]
TXUSERCLKIN2	in	CELL[37].IMUX_CLK[0] invert by !MAIN[9][29][44]
DFETRAINCTRL3	in	CELL[24].IMUX_IMUX_DELAY[12]
POWERDOWN3	in	CELL[24].IMUX_IMUX_DELAY[44]
RXBUFRESET3	in	CELL[22].IMUX_IMUX_DELAY[32]
RXENCOMMADET3	in	CELL[26].IMUX_IMUX_DELAY[5]
RXPOLARITY3	in	CELL[24].IMUX_IMUX_DELAY[33]
RXPOWERDOWN3[0]	in	CELL[24].IMUX_IMUX_DELAY[37]
RXPOWERDOWN3[1]	in	CELL[24].IMUX_IMUX_DELAY[29]
RXRATE3[0]	in	CELL[24].IMUX_IMUX_DELAY[23]
RXRATE3[1]	in	CELL[24].IMUX_IMUX_DELAY[7]
RXSLIP3	in	CELL[25].IMUX_IMUX_DELAY[15]
RXUSERCLKIN3	in	CELL[21].IMUX_CLK[0] invert by !MAIN[9][28][46]
SAMPLERATE3[0]	in	CELL[24].IMUX_IMUX_DELAY[38]
SAMPLERATE3[1]	in	CELL[24].IMUX_IMUX_DELAY[30]
SAMPLERATE3[2]	in	CELL[24].IMUX_IMUX_DELAY[22]
TXBUFRESET3	in	CELL[23].IMUX_IMUX_DELAY[32]
TXCTRL3[0]	in	CELL[28].IMUX_IMUX_DELAY[11]
TXCTRL3[1]	in	CELL[27].IMUX_IMUX_DELAY[11]
TXCTRL3[2]	in	CELL[26].IMUX_IMUX_DELAY[19]
TXCTRL3[3]	in	CELL[25].IMUX_IMUX_DELAY[3]
TXCTRL3[4]	in	CELL[25].IMUX_IMUX_DELAY[35]
TXCTRL3[5]	in	CELL[26].IMUX_IMUX_DELAY[27]
TXCTRL3[6]	in	CELL[27].IMUX_IMUX_DELAY[35]
TXCTRL3[7]	in	CELL[28].IMUX_IMUX_DELAY[35]
TXDATA3[0]	in	CELL[28].IMUX_IMUX_DELAY[0]
TXDATA3[1]	in	CELL[27].IMUX_IMUX_DELAY[16]
TXDATA3[2]	in	CELL[26].IMUX_IMUX_DELAY[0]
TXDATA3[3]	in	CELL[25].IMUX_IMUX_DELAY[0]
TXDATA3[4]	in	CELL[28].IMUX_IMUX_DELAY[18]
TXDATA3[5]	in	CELL[27].IMUX_IMUX_DELAY[18]
TXDATA3[6]	in	CELL[26].IMUX_IMUX_DELAY[18]
TXDATA3[7]	in	CELL[25].IMUX_IMUX_DELAY[18]
TXDATA3[8]	in	CELL[28].IMUX_IMUX_DELAY[8]
TXDATA3[9]	in	CELL[27].IMUX_IMUX_DELAY[24]
TXDATA3[10]	in	CELL[26].IMUX_IMUX_DELAY[8]
TXDATA3[11]	in	CELL[25].IMUX_IMUX_DELAY[16]
TXDATA3[12]	in	CELL[28].IMUX_IMUX_DELAY[26]
TXDATA3[13]	in	CELL[27].IMUX_IMUX_DELAY[26]
TXDATA3[14]	in	CELL[26].IMUX_IMUX_DELAY[26]
TXDATA3[15]	in	CELL[25].IMUX_IMUX_DELAY[26]
TXDATA3[16]	in	CELL[28].IMUX_IMUX_DELAY[17]
TXDATA3[17]	in	CELL[27].IMUX_IMUX_DELAY[17]
TXDATA3[18]	in	CELL[26].IMUX_IMUX_DELAY[33]
TXDATA3[19]	in	CELL[25].IMUX_IMUX_DELAY[25]
TXDATA3[20]	in	CELL[28].IMUX_IMUX_DELAY[21]
TXDATA3[21]	in	CELL[27].IMUX_IMUX_DELAY[29]
TXDATA3[22]	in	CELL[26].IMUX_IMUX_DELAY[29]
TXDATA3[23]	in	CELL[25].IMUX_IMUX_DELAY[29]
TXDATA3[24]	in	CELL[28].IMUX_IMUX_DELAY[42]
TXDATA3[25]	in	CELL[27].IMUX_IMUX_DELAY[42]
TXDATA3[26]	in	CELL[26].IMUX_IMUX_DELAY[42]
TXDATA3[27]	in	CELL[25].IMUX_IMUX_DELAY[42]
TXDATA3[28]	in	CELL[28].IMUX_IMUX_DELAY[46]
TXDATA3[29]	in	CELL[27].IMUX_IMUX_DELAY[38]
TXDATA3[30]	in	CELL[26].IMUX_IMUX_DELAY[46]
TXDATA3[31]	in	CELL[25].IMUX_IMUX_DELAY[46]
TXDATA3[32]	in	CELL[28].IMUX_IMUX_DELAY[25]
TXDATA3[33]	in	CELL[27].IMUX_IMUX_DELAY[33]
TXDATA3[34]	in	CELL[26].IMUX_IMUX_DELAY[41]
TXDATA3[35]	in	CELL[25].IMUX_IMUX_DELAY[33]
TXDATA3[36]	in	CELL[28].IMUX_IMUX_DELAY[37]
TXDATA3[37]	in	CELL[27].IMUX_IMUX_DELAY[37]
TXDATA3[38]	in	CELL[26].IMUX_IMUX_DELAY[37]
TXDATA3[39]	in	CELL[25].IMUX_IMUX_DELAY[37]
TXDATA3[40]	in	CELL[28].IMUX_IMUX_DELAY[28]
TXDATA3[41]	in	CELL[27].IMUX_IMUX_DELAY[28]
TXDATA3[42]	in	CELL[26].IMUX_IMUX_DELAY[28]
TXDATA3[43]	in	CELL[25].IMUX_IMUX_DELAY[28]
TXDATA3[44]	in	CELL[28].IMUX_IMUX_DELAY[12]
TXDATA3[45]	in	CELL[27].IMUX_IMUX_DELAY[12]
TXDATA3[46]	in	CELL[26].IMUX_IMUX_DELAY[4]
TXDATA3[47]	in	CELL[25].IMUX_IMUX_DELAY[12]
TXDATA3[48]	in	CELL[28].IMUX_IMUX_DELAY[23]
TXDATA3[49]	in	CELL[27].IMUX_IMUX_DELAY[23]
TXDATA3[50]	in	CELL[26].IMUX_IMUX_DELAY[23]
TXDATA3[51]	in	CELL[25].IMUX_IMUX_DELAY[23]
TXDATA3[52]	in	CELL[28].IMUX_IMUX_DELAY[6]
TXDATA3[53]	in	CELL[27].IMUX_IMUX_DELAY[6]
TXDATA3[54]	in	CELL[26].IMUX_IMUX_DELAY[6]
TXDATA3[55]	in	CELL[25].IMUX_IMUX_DELAY[14]
TXDATA3[56]	in	CELL[28].IMUX_IMUX_DELAY[39]
TXDATA3[57]	in	CELL[27].IMUX_IMUX_DELAY[31]
TXDATA3[58]	in	CELL[26].IMUX_IMUX_DELAY[39]
TXDATA3[59]	in	CELL[25].IMUX_IMUX_DELAY[39]
TXDATA3[60]	in	CELL[28].IMUX_IMUX_DELAY[14]
TXDATA3[61]	in	CELL[27].IMUX_IMUX_DELAY[14]
TXDATA3[62]	in	CELL[26].IMUX_IMUX_DELAY[22]
TXDATA3[63]	in	CELL[25].IMUX_IMUX_DELAY[22]
TXDATAMSB3[0]	in	CELL[27].IMUX_IMUX_DELAY[40]
TXDATAMSB3[1]	in	CELL[27].IMUX_IMUX_DELAY[9]
TXDATAMSB3[2]	in	CELL[26].IMUX_IMUX_DELAY[38]
TXDATAMSB3[3]	in	CELL[26].IMUX_IMUX_DELAY[32]
TXDATAMSB3[4]	in	CELL[26].IMUX_IMUX_DELAY[40]
TXDATAMSB3[5]	in	CELL[26].IMUX_IMUX_DELAY[25]
TXDATAMSB3[6]	in	CELL[25].IMUX_IMUX_DELAY[30]
TXDATAMSB3[7]	in	CELL[25].IMUX_IMUX_DELAY[40]
TXDEEMPH3	in	CELL[25].IMUX_IMUX_DELAY[5]
TXMARGIN3[0]	in	CELL[24].IMUX_IMUX_DELAY[32]
TXMARGIN3[1]	in	CELL[24].IMUX_IMUX_DELAY[16]
TXMARGIN3[2]	in	CELL[24].IMUX_IMUX_DELAY[8]
TXPOWERDOWN3[0]	in	CELL[24].IMUX_IMUX_DELAY[13]
TXPOWERDOWN3[1]	in	CELL[24].IMUX_IMUX_DELAY[5]
TXRATE3[0]	in	CELL[24].IMUX_IMUX_DELAY[47]
TXRATE3[1]	in	CELL[24].IMUX_IMUX_DELAY[31]
TXUSERCLKIN3	in	CELL[27].IMUX_CLK[0] invert by !MAIN[9][28][44]
SCANCLK	in	CELL[21].IMUX_CLK[1] invert by !MAIN[9][28][41]
SCANENB	in	CELL[4].IMUX_IMUX_DELAY[4]
SCANMODEB	in	CELL[32].IMUX_IMUX_DELAY[4]
SCANIN[0]	in	CELL[1].IMUX_IMUX_DELAY[4]
SCANIN[1]	in	CELL[3].IMUX_IMUX_DELAY[4]
SCANIN[2]	in	CELL[5].IMUX_IMUX_DELAY[4]
SCANIN[3]	in	CELL[8].IMUX_IMUX_DELAY[4]
SCANIN[4]	in	CELL[11].IMUX_IMUX_DELAY[4]
SCANIN[5]	in	CELL[12].IMUX_IMUX_DELAY[4]
SCANIN[6]	in	CELL[15].IMUX_IMUX_DELAY[4]
SCANIN[7]	in	CELL[16].IMUX_IMUX_DELAY[4]
SCANIN[8]	in	CELL[20].IMUX_IMUX_DELAY[4]
SCANIN[9]	in	CELL[22].IMUX_IMUX_DELAY[4]
SCANIN[10]	in	CELL[24].IMUX_IMUX_DELAY[4]
SCANIN[11]	in	CELL[27].IMUX_IMUX_DELAY[4]
SCANIN[12]	in	CELL[29].IMUX_IMUX_DELAY[4]
SCANIN[13]	in	CELL[31].IMUX_IMUX_DELAY[4]
SCANIN[14]	in	CELL[34].IMUX_IMUX_DELAY[4]
SCANIN[15]	in	CELL[36].IMUX_IMUX_DELAY[12]
SDSIDDQMODE	in	CELL[17].IMUX_IMUX_DELAY[33]
SDSSCANARST	in	CELL[17].IMUX_IMUX_DELAY[8]
SDSSCANCLK	in	CELL[17].IMUX_CLK[1] invert by !MAIN[9][28][42]
SDSSCANENB	in	CELL[17].IMUX_IMUX_DELAY[35]
TPCLK	in	CELL[17].IMUX_CLK[0] invert by !MAIN[9][29][41]
TPDI	in	CELL[17].IMUX_IMUX_DELAY[19]
TPEXE	in	CELL[17].IMUX_IMUX_DELAY[3]
TPRST	in	CELL[17].IMUX_IMUX_DELAY[12]
TPSENB	in	CELL[17].IMUX_IMUX_DELAY[16]
TSTNOISECLK	in	CELL[16].IMUX_CLK[1] invert by !MAIN[9][29][42]
TSTNOISESRC	in	CELL[17].IMUX_IMUX_DELAY[4]
DRDY	out	CELL[10].OUT_BEL[20]
DRPDO[0]	out	CELL[13].OUT_BEL[18]
DRPDO[1]	out	CELL[13].OUT_BEL[11]
DRPDO[2]	out	CELL[11].OUT_BEL[11]
DRPDO[3]	out	CELL[12].OUT_BEL[19]
DRPDO[4]	out	CELL[13].OUT_BEL[19]
DRPDO[5]	out	CELL[11].OUT_BEL[19]
DRPDO[6]	out	CELL[12].OUT_BEL[18]
DRPDO[7]	out	CELL[12].OUT_BEL[11]
DRPDO[8]	out	CELL[11].OUT_BEL[18]
DRPDO[9]	out	CELL[10].OUT_BEL[18]
DRPDO[10]	out	CELL[10].OUT_BEL[11]
DRPDO[11]	out	CELL[10].OUT_BEL[19]
DRPDO[12]	out	CELL[10].OUT_BEL[9]
DRPDO[13]	out	CELL[10].OUT_BEL[12]
DRPDO[14]	out	CELL[10].OUT_BEL[8]
DRPDO[15]	out	CELL[10].OUT_BEL[22]
MGMTPCSRDDATA[0]	out	CELL[23].OUT_BEL[22]
MGMTPCSRDDATA[1]	out	CELL[23].OUT_BEL[3]
MGMTPCSRDDATA[2]	out	CELL[21].OUT_BEL[11]
MGMTPCSRDDATA[3]	out	CELL[22].OUT_BEL[19]
MGMTPCSRDDATA[4]	out	CELL[23].OUT_BEL[19]
MGMTPCSRDDATA[5]	out	CELL[21].OUT_BEL[19]
MGMTPCSRDDATA[6]	out	CELL[22].OUT_BEL[18]
MGMTPCSRDDATA[7]	out	CELL[22].OUT_BEL[11]
MGMTPCSRDDATA[8]	out	CELL[21].OUT_BEL[18]
MGMTPCSRDDATA[9]	out	CELL[20].OUT_BEL[0]
MGMTPCSRDDATA[10]	out	CELL[20].OUT_BEL[11]
MGMTPCSRDDATA[11]	out	CELL[20].OUT_BEL[19]
MGMTPCSRDDATA[12]	out	CELL[20].OUT_BEL[9]
MGMTPCSRDDATA[13]	out	CELL[20].OUT_BEL[1]
MGMTPCSRDDATA[14]	out	CELL[19].OUT_BEL[11]
MGMTPCSRDDATA[15]	out	CELL[20].OUT_BEL[22]
MGMTPCSRDACK	out	CELL[20].OUT_BEL[20]
GTHINITDONE	out	CELL[0].OUT_BEL[17]
RESETDONE1	out	CELL[10].OUT_BEL[17]
RESETDONE2	out	CELL[39].OUT_BEL[8]
RESETDONE3	out	CELL[29].OUT_BEL[8]
RXCODEERR0[0]	out	CELL[1].OUT_BEL[21]
RXCODEERR0[1]	out	CELL[2].OUT_BEL[21]
RXCODEERR0[2]	out	CELL[1].OUT_BEL[3]
RXCODEERR0[3]	out	CELL[2].OUT_BEL[3]
RXCODEERR0[4]	out	CELL[2].OUT_BEL[17]
RXCODEERR0[5]	out	CELL[2].OUT_BEL[7]
RXCODEERR0[6]	out	CELL[1].OUT_BEL[6]
RXCODEERR0[7]	out	CELL[2].OUT_BEL[6]
RXCTRL0[0]	out	CELL[9].OUT_BEL[22]
RXCTRL0[1]	out	CELL[8].OUT_BEL[22]
RXCTRL0[2]	out	CELL[9].OUT_BEL[12]
RXCTRL0[3]	out	CELL[8].OUT_BEL[12]
RXCTRL0[4]	out	CELL[7].OUT_BEL[12]
RXCTRL0[5]	out	CELL[6].OUT_BEL[22]
RXCTRL0[6]	out	CELL[7].OUT_BEL[22]
RXCTRL0[7]	out	CELL[6].OUT_BEL[12]
RXCTRLACK0	out	CELL[5].OUT_BEL[22]
RXDATA0[0]	out	CELL[9].OUT_BEL[3]
RXDATA0[1]	out	CELL[9].OUT_BEL[9]
RXDATA0[2]	out	CELL[9].OUT_BEL[21]
RXDATA0[3]	out	CELL[9].OUT_BEL[7]
RXDATA0[4]	out	CELL[9].OUT_BEL[20]
RXDATA0[5]	out	CELL[9].OUT_BEL[8]
RXDATA0[6]	out	CELL[9].OUT_BEL[6]
RXDATA0[7]	out	CELL[9].OUT_BEL[17]
RXDATA0[8]	out	CELL[9].OUT_BEL[23]
RXDATA0[9]	out	CELL[8].OUT_BEL[23]
RXDATA0[10]	out	CELL[8].OUT_BEL[21]
RXDATA0[11]	out	CELL[8].OUT_BEL[3]
RXDATA0[12]	out	CELL[8].OUT_BEL[6]
RXDATA0[13]	out	CELL[8].OUT_BEL[8]
RXDATA0[14]	out	CELL[8].OUT_BEL[20]
RXDATA0[15]	out	CELL[8].OUT_BEL[9]
RXDATA0[16]	out	CELL[8].OUT_BEL[17]
RXDATA0[17]	out	CELL[8].OUT_BEL[7]
RXDATA0[18]	out	CELL[7].OUT_BEL[21]
RXDATA0[19]	out	CELL[7].OUT_BEL[3]
RXDATA0[20]	out	CELL[7].OUT_BEL[17]
RXDATA0[21]	out	CELL[7].OUT_BEL[9]
RXDATA0[22]	out	CELL[7].OUT_BEL[20]
RXDATA0[23]	out	CELL[7].OUT_BEL[8]
RXDATA0[24]	out	CELL[7].OUT_BEL[6]
RXDATA0[25]	out	CELL[7].OUT_BEL[7]
RXDATA0[26]	out	CELL[6].OUT_BEL[20]
RXDATA0[27]	out	CELL[6].OUT_BEL[6]
RXDATA0[28]	out	CELL[7].OUT_BEL[23]
RXDATA0[29]	out	CELL[6].OUT_BEL[23]
RXDATA0[30]	out	CELL[6].OUT_BEL[9]
RXDATA0[31]	out	CELL[6].OUT_BEL[8]
RXDATA0[32]	out	CELL[6].OUT_BEL[21]
RXDATA0[33]	out	CELL[6].OUT_BEL[17]
RXDATA0[34]	out	CELL[6].OUT_BEL[3]
RXDATA0[35]	out	CELL[6].OUT_BEL[7]
RXDATA0[36]	out	CELL[5].OUT_BEL[9]
RXDATA0[37]	out	CELL[5].OUT_BEL[12]
RXDATA0[38]	out	CELL[5].OUT_BEL[23]
RXDATA0[39]	out	CELL[5].OUT_BEL[17]
RXDATA0[40]	out	CELL[5].OUT_BEL[8]
RXDATA0[41]	out	CELL[5].OUT_BEL[3]
RXDATA0[42]	out	CELL[5].OUT_BEL[20]
RXDATA0[43]	out	CELL[5].OUT_BEL[7]
RXDATA0[44]	out	CELL[5].OUT_BEL[6]
RXDATA0[45]	out	CELL[5].OUT_BEL[21]
RXDATA0[46]	out	CELL[4].OUT_BEL[23]
RXDATA0[47]	out	CELL[4].OUT_BEL[21]
RXDATA0[48]	out	CELL[4].OUT_BEL[6]
RXDATA0[49]	out	CELL[4].OUT_BEL[20]
RXDATA0[50]	out	CELL[4].OUT_BEL[9]
RXDATA0[51]	out	CELL[4].OUT_BEL[8]
RXDATA0[52]	out	CELL[4].OUT_BEL[17]
RXDATA0[53]	out	CELL[4].OUT_BEL[3]
RXDATA0[54]	out	CELL[4].OUT_BEL[7]
RXDATA0[55]	out	CELL[3].OUT_BEL[23]
RXDATA0[56]	out	CELL[3].OUT_BEL[21]
RXDATA0[57]	out	CELL[3].OUT_BEL[17]
RXDATA0[58]	out	CELL[3].OUT_BEL[6]
RXDATA0[59]	out	CELL[3].OUT_BEL[9]
RXDATA0[60]	out	CELL[3].OUT_BEL[3]
RXDATA0[61]	out	CELL[3].OUT_BEL[7]
RXDATA0[62]	out	CELL[3].OUT_BEL[20]
RXDATA0[63]	out	CELL[3].OUT_BEL[8]
RXDATATAP0	out	CELL[8].OUT_BEL[2]
RXDISPERR0[0]	out	CELL[1].OUT_BEL[20]
RXDISPERR0[1]	out	CELL[2].OUT_BEL[20]
RXDISPERR0[2]	out	CELL[1].OUT_BEL[23]
RXDISPERR0[3]	out	CELL[2].OUT_BEL[23]
RXDISPERR0[4]	out	CELL[1].OUT_BEL[9]
RXDISPERR0[5]	out	CELL[2].OUT_BEL[9]
RXDISPERR0[6]	out	CELL[1].OUT_BEL[8]
RXDISPERR0[7]	out	CELL[2].OUT_BEL[8]
RXPCSCLKSMPL0	out	CELL[9].OUT_BEL[2]
RXUSERCLKOUT0	out	CELL[20].MGT_ROW[0]
RXVALID0[0]	out	CELL[4].OUT_BEL[11]
RXVALID0[1]	out	CELL[5].OUT_BEL[11]
RXVALID0[2]	out	CELL[6].OUT_BEL[11]
RXVALID0[3]	out	CELL[7].OUT_BEL[11]
RXVALID0[4]	out	CELL[4].OUT_BEL[18]
RXVALID0[5]	out	CELL[5].OUT_BEL[18]
RXVALID0[6]	out	CELL[6].OUT_BEL[18]
RXVALID0[7]	out	CELL[7].OUT_BEL[18]
TXCTRLACK0	out	CELL[0].OUT_BEL[6]
TXDATATAP10	out	CELL[0].OUT_BEL[2]
TXDATATAP20	out	CELL[3].OUT_BEL[2]
TXPCSCLKSMPL0	out	CELL[4].OUT_BEL[2]
TXUSERCLKOUT0	out	CELL[20].MGT_ROW[2]
RXCODEERR1[0]	out	CELL[11].OUT_BEL[21]
RXCODEERR1[1]	out	CELL[12].OUT_BEL[21]
RXCODEERR1[2]	out	CELL[11].OUT_BEL[3]
RXCODEERR1[3]	out	CELL[12].OUT_BEL[3]
RXCODEERR1[4]	out	CELL[12].OUT_BEL[17]
RXCODEERR1[5]	out	CELL[12].OUT_BEL[7]
RXCODEERR1[6]	out	CELL[11].OUT_BEL[6]
RXCODEERR1[7]	out	CELL[12].OUT_BEL[6]
RXCTRL1[0]	out	CELL[19].OUT_BEL[22]
RXCTRL1[1]	out	CELL[18].OUT_BEL[22]
RXCTRL1[2]	out	CELL[19].OUT_BEL[12]
RXCTRL1[3]	out	CELL[18].OUT_BEL[12]
RXCTRL1[4]	out	CELL[17].OUT_BEL[12]
RXCTRL1[5]	out	CELL[16].OUT_BEL[22]
RXCTRL1[6]	out	CELL[17].OUT_BEL[22]
RXCTRL1[7]	out	CELL[16].OUT_BEL[12]
RXCTRLACK1	out	CELL[15].OUT_BEL[22]
RXDATA1[0]	out	CELL[19].OUT_BEL[3]
RXDATA1[1]	out	CELL[19].OUT_BEL[9]
RXDATA1[2]	out	CELL[19].OUT_BEL[21]
RXDATA1[3]	out	CELL[19].OUT_BEL[7]
RXDATA1[4]	out	CELL[19].OUT_BEL[20]
RXDATA1[5]	out	CELL[19].OUT_BEL[8]
RXDATA1[6]	out	CELL[19].OUT_BEL[6]
RXDATA1[7]	out	CELL[19].OUT_BEL[17]
RXDATA1[8]	out	CELL[19].OUT_BEL[23]
RXDATA1[9]	out	CELL[18].OUT_BEL[23]
RXDATA1[10]	out	CELL[18].OUT_BEL[21]
RXDATA1[11]	out	CELL[18].OUT_BEL[3]
RXDATA1[12]	out	CELL[18].OUT_BEL[6]
RXDATA1[13]	out	CELL[18].OUT_BEL[8]
RXDATA1[14]	out	CELL[18].OUT_BEL[20]
RXDATA1[15]	out	CELL[18].OUT_BEL[9]
RXDATA1[16]	out	CELL[18].OUT_BEL[17]
RXDATA1[17]	out	CELL[18].OUT_BEL[7]
RXDATA1[18]	out	CELL[17].OUT_BEL[21]
RXDATA1[19]	out	CELL[17].OUT_BEL[3]
RXDATA1[20]	out	CELL[17].OUT_BEL[17]
RXDATA1[21]	out	CELL[17].OUT_BEL[9]
RXDATA1[22]	out	CELL[17].OUT_BEL[20]
RXDATA1[23]	out	CELL[17].OUT_BEL[8]
RXDATA1[24]	out	CELL[17].OUT_BEL[6]
RXDATA1[25]	out	CELL[17].OUT_BEL[7]
RXDATA1[26]	out	CELL[16].OUT_BEL[20]
RXDATA1[27]	out	CELL[16].OUT_BEL[6]
RXDATA1[28]	out	CELL[17].OUT_BEL[23]
RXDATA1[29]	out	CELL[16].OUT_BEL[23]
RXDATA1[30]	out	CELL[16].OUT_BEL[9]
RXDATA1[31]	out	CELL[16].OUT_BEL[8]
RXDATA1[32]	out	CELL[16].OUT_BEL[21]
RXDATA1[33]	out	CELL[16].OUT_BEL[17]
RXDATA1[34]	out	CELL[16].OUT_BEL[3]
RXDATA1[35]	out	CELL[16].OUT_BEL[7]
RXDATA1[36]	out	CELL[15].OUT_BEL[9]
RXDATA1[37]	out	CELL[15].OUT_BEL[12]
RXDATA1[38]	out	CELL[15].OUT_BEL[23]
RXDATA1[39]	out	CELL[15].OUT_BEL[17]
RXDATA1[40]	out	CELL[15].OUT_BEL[8]
RXDATA1[41]	out	CELL[15].OUT_BEL[3]
RXDATA1[42]	out	CELL[15].OUT_BEL[20]
RXDATA1[43]	out	CELL[15].OUT_BEL[7]
RXDATA1[44]	out	CELL[15].OUT_BEL[6]
RXDATA1[45]	out	CELL[15].OUT_BEL[21]
RXDATA1[46]	out	CELL[14].OUT_BEL[23]
RXDATA1[47]	out	CELL[14].OUT_BEL[21]
RXDATA1[48]	out	CELL[14].OUT_BEL[6]
RXDATA1[49]	out	CELL[14].OUT_BEL[20]
RXDATA1[50]	out	CELL[14].OUT_BEL[9]
RXDATA1[51]	out	CELL[14].OUT_BEL[8]
RXDATA1[52]	out	CELL[14].OUT_BEL[17]
RXDATA1[53]	out	CELL[14].OUT_BEL[3]
RXDATA1[54]	out	CELL[14].OUT_BEL[7]
RXDATA1[55]	out	CELL[13].OUT_BEL[23]
RXDATA1[56]	out	CELL[13].OUT_BEL[21]
RXDATA1[57]	out	CELL[13].OUT_BEL[17]
RXDATA1[58]	out	CELL[13].OUT_BEL[6]
RXDATA1[59]	out	CELL[13].OUT_BEL[9]
RXDATA1[60]	out	CELL[13].OUT_BEL[3]
RXDATA1[61]	out	CELL[13].OUT_BEL[7]
RXDATA1[62]	out	CELL[13].OUT_BEL[20]
RXDATA1[63]	out	CELL[13].OUT_BEL[8]
RXDATATAP1	out	CELL[18].OUT_BEL[2]
RXDISPERR1[0]	out	CELL[11].OUT_BEL[20]
RXDISPERR1[1]	out	CELL[12].OUT_BEL[20]
RXDISPERR1[2]	out	CELL[11].OUT_BEL[23]
RXDISPERR1[3]	out	CELL[12].OUT_BEL[23]
RXDISPERR1[4]	out	CELL[11].OUT_BEL[9]
RXDISPERR1[5]	out	CELL[12].OUT_BEL[9]
RXDISPERR1[6]	out	CELL[11].OUT_BEL[8]
RXDISPERR1[7]	out	CELL[12].OUT_BEL[8]
RXPCSCLKSMPL1	out	CELL[19].OUT_BEL[2]
RXUSERCLKOUT1	out	CELL[20].MGT_ROW[1]
RXVALID1[0]	out	CELL[14].OUT_BEL[11]
RXVALID1[1]	out	CELL[15].OUT_BEL[11]
RXVALID1[2]	out	CELL[16].OUT_BEL[11]
RXVALID1[3]	out	CELL[17].OUT_BEL[11]
RXVALID1[4]	out	CELL[14].OUT_BEL[18]
RXVALID1[5]	out	CELL[15].OUT_BEL[18]
RXVALID1[6]	out	CELL[16].OUT_BEL[18]
RXVALID1[7]	out	CELL[17].OUT_BEL[18]
TXCTRLACK1	out	CELL[10].OUT_BEL[6]
TXDATATAP11	out	CELL[10].OUT_BEL[2]
TXDATATAP21	out	CELL[13].OUT_BEL[2]
TXPCSCLKSMPL1	out	CELL[14].OUT_BEL[2]
TXUSERCLKOUT1	out	CELL[20].MGT_ROW[3]
RXCODEERR2[0]	out	CELL[38].OUT_BEL[18]
RXCODEERR2[1]	out	CELL[37].OUT_BEL[18]
RXCODEERR2[2]	out	CELL[38].OUT_BEL[12]
RXCODEERR2[3]	out	CELL[37].OUT_BEL[12]
RXCODEERR2[4]	out	CELL[37].OUT_BEL[8]
RXCODEERR2[5]	out	CELL[37].OUT_BEL[4]
RXCODEERR2[6]	out	CELL[38].OUT_BEL[9]
RXCODEERR2[7]	out	CELL[37].OUT_BEL[9]
RXCTRL2[0]	out	CELL[30].OUT_BEL[15]
RXCTRL2[1]	out	CELL[31].OUT_BEL[15]
RXCTRL2[2]	out	CELL[30].OUT_BEL[21]
RXCTRL2[3]	out	CELL[31].OUT_BEL[3]
RXCTRL2[4]	out	CELL[32].OUT_BEL[3]
RXCTRL2[5]	out	CELL[33].OUT_BEL[15]
RXCTRL2[6]	out	CELL[32].OUT_BEL[15]
RXCTRL2[7]	out	CELL[33].OUT_BEL[21]
RXCTRLACK2	out	CELL[34].OUT_BEL[15]
RXDATA2[0]	out	CELL[30].OUT_BEL[12]
RXDATA2[1]	out	CELL[30].OUT_BEL[16]
RXDATA2[2]	out	CELL[30].OUT_BEL[18]
RXDATA2[3]	out	CELL[30].OUT_BEL[4]
RXDATA2[4]	out	CELL[30].OUT_BEL[13]
RXDATA2[5]	out	CELL[30].OUT_BEL[7]
RXDATA2[6]	out	CELL[30].OUT_BEL[23]
RXDATA2[7]	out	CELL[30].OUT_BEL[8]
RXDATA2[8]	out	CELL[30].OUT_BEL[14]
RXDATA2[9]	out	CELL[31].OUT_BEL[14]
RXDATA2[10]	out	CELL[31].OUT_BEL[12]
RXDATA2[11]	out	CELL[31].OUT_BEL[0]
RXDATA2[12]	out	CELL[31].OUT_BEL[9]
RXDATA2[13]	out	CELL[31].OUT_BEL[7]
RXDATA2[14]	out	CELL[31].OUT_BEL[13]
RXDATA2[15]	out	CELL[31].OUT_BEL[16]
RXDATA2[16]	out	CELL[30].OUT_BEL[17]
RXDATA2[17]	out	CELL[31].OUT_BEL[8]
RXDATA2[18]	out	CELL[32].OUT_BEL[12]
RXDATA2[19]	out	CELL[32].OUT_BEL[0]
RXDATA2[20]	out	CELL[31].OUT_BEL[17]
RXDATA2[21]	out	CELL[32].OUT_BEL[16]
RXDATA2[22]	out	CELL[32].OUT_BEL[13]
RXDATA2[23]	out	CELL[32].OUT_BEL[7]
RXDATA2[24]	out	CELL[32].OUT_BEL[9]
RXDATA2[25]	out	CELL[32].OUT_BEL[8]
RXDATA2[26]	out	CELL[33].OUT_BEL[13]
RXDATA2[27]	out	CELL[33].OUT_BEL[9]
RXDATA2[28]	out	CELL[32].OUT_BEL[14]
RXDATA2[29]	out	CELL[33].OUT_BEL[14]
RXDATA2[30]	out	CELL[33].OUT_BEL[16]
RXDATA2[31]	out	CELL[33].OUT_BEL[7]
RXDATA2[32]	out	CELL[33].OUT_BEL[12]
RXDATA2[33]	out	CELL[33].OUT_BEL[8]
RXDATA2[34]	out	CELL[33].OUT_BEL[0]
RXDATA2[35]	out	CELL[33].OUT_BEL[4]
RXDATA2[36]	out	CELL[34].OUT_BEL[16]
RXDATA2[37]	out	CELL[34].OUT_BEL[21]
RXDATA2[38]	out	CELL[34].OUT_BEL[14]
RXDATA2[39]	out	CELL[34].OUT_BEL[8]
RXDATA2[40]	out	CELL[34].OUT_BEL[17]
RXDATA2[41]	out	CELL[34].OUT_BEL[0]
RXDATA2[42]	out	CELL[34].OUT_BEL[13]
RXDATA2[43]	out	CELL[34].OUT_BEL[4]
RXDATA2[44]	out	CELL[34].OUT_BEL[9]
RXDATA2[45]	out	CELL[34].OUT_BEL[12]
RXDATA2[46]	out	CELL[35].OUT_BEL[14]
RXDATA2[47]	out	CELL[35].OUT_BEL[12]
RXDATA2[48]	out	CELL[35].OUT_BEL[9]
RXDATA2[49]	out	CELL[35].OUT_BEL[13]
RXDATA2[50]	out	CELL[35].OUT_BEL[6]
RXDATA2[51]	out	CELL[35].OUT_BEL[7]
RXDATA2[52]	out	CELL[35].OUT_BEL[8]
RXDATA2[53]	out	CELL[35].OUT_BEL[0]
RXDATA2[54]	out	CELL[35].OUT_BEL[4]
RXDATA2[55]	out	CELL[36].OUT_BEL[16]
RXDATA2[56]	out	CELL[36].OUT_BEL[12]
RXDATA2[57]	out	CELL[35].OUT_BEL[17]
RXDATA2[58]	out	CELL[36].OUT_BEL[9]
RXDATA2[59]	out	CELL[36].OUT_BEL[6]
RXDATA2[60]	out	CELL[36].OUT_BEL[0]
RXDATA2[61]	out	CELL[36].OUT_BEL[8]
RXDATA2[62]	out	CELL[36].OUT_BEL[13]
RXDATA2[63]	out	CELL[36].OUT_BEL[7]
RXDATATAP2	out	CELL[38].OUT_BEL[2]
RXDISPERR2[0]	out	CELL[38].OUT_BEL[13]
RXDISPERR2[1]	out	CELL[37].OUT_BEL[13]
RXDISPERR2[2]	out	CELL[38].OUT_BEL[16]
RXDISPERR2[3]	out	CELL[37].OUT_BEL[14]
RXDISPERR2[4]	out	CELL[38].OUT_BEL[6]
RXDISPERR2[5]	out	CELL[37].OUT_BEL[16]
RXDISPERR2[6]	out	CELL[38].OUT_BEL[7]
RXDISPERR2[7]	out	CELL[37].OUT_BEL[7]
RXPCSCLKSMPL2	out	CELL[39].OUT_BEL[2]
RXUSERCLKOUT2	out	CELL[20].MGT_ROW[6]
RXVALID2[0]	out	CELL[35].OUT_BEL[18]
RXVALID2[1]	out	CELL[34].OUT_BEL[18]
RXVALID2[2]	out	CELL[33].OUT_BEL[18]
RXVALID2[3]	out	CELL[32].OUT_BEL[4]
RXVALID2[4]	out	CELL[35].OUT_BEL[11]
RXVALID2[5]	out	CELL[34].OUT_BEL[11]
RXVALID2[6]	out	CELL[33].OUT_BEL[11]
RXVALID2[7]	out	CELL[32].OUT_BEL[21]
TXCTRLACK2	out	CELL[39].OUT_BEL[9]
TXDATATAP12	out	CELL[30].OUT_BEL[2]
TXDATATAP22	out	CELL[33].OUT_BEL[2]
TXPCSCLKSMPL2	out	CELL[34].OUT_BEL[2]
TXUSERCLKOUT2	out	CELL[20].MGT_ROW[8]
RXCODEERR3[0]	out	CELL[28].OUT_BEL[18]
RXCODEERR3[1]	out	CELL[27].OUT_BEL[18]
RXCODEERR3[2]	out	CELL[28].OUT_BEL[12]
RXCODEERR3[3]	out	CELL[27].OUT_BEL[12]
RXCODEERR3[4]	out	CELL[27].OUT_BEL[8]
RXCODEERR3[5]	out	CELL[27].OUT_BEL[4]
RXCODEERR3[6]	out	CELL[28].OUT_BEL[9]
RXCODEERR3[7]	out	CELL[27].OUT_BEL[9]
RXCTRL3[0]	out	CELL[20].OUT_BEL[15]
RXCTRL3[1]	out	CELL[21].OUT_BEL[15]
RXCTRL3[2]	out	CELL[20].OUT_BEL[21]
RXCTRL3[3]	out	CELL[21].OUT_BEL[3]
RXCTRL3[4]	out	CELL[22].OUT_BEL[3]
RXCTRL3[5]	out	CELL[23].OUT_BEL[15]
RXCTRL3[6]	out	CELL[22].OUT_BEL[15]
RXCTRL3[7]	out	CELL[23].OUT_BEL[21]
RXCTRLACK3	out	CELL[24].OUT_BEL[15]
RXDATA3[0]	out	CELL[20].OUT_BEL[12]
RXDATA3[1]	out	CELL[20].OUT_BEL[16]
RXDATA3[2]	out	CELL[20].OUT_BEL[18]
RXDATA3[3]	out	CELL[20].OUT_BEL[4]
RXDATA3[4]	out	CELL[20].OUT_BEL[13]
RXDATA3[5]	out	CELL[20].OUT_BEL[7]
RXDATA3[6]	out	CELL[20].OUT_BEL[23]
RXDATA3[7]	out	CELL[20].OUT_BEL[8]
RXDATA3[8]	out	CELL[20].OUT_BEL[14]
RXDATA3[9]	out	CELL[21].OUT_BEL[14]
RXDATA3[10]	out	CELL[21].OUT_BEL[12]
RXDATA3[11]	out	CELL[21].OUT_BEL[0]
RXDATA3[12]	out	CELL[21].OUT_BEL[9]
RXDATA3[13]	out	CELL[21].OUT_BEL[7]
RXDATA3[14]	out	CELL[21].OUT_BEL[13]
RXDATA3[15]	out	CELL[21].OUT_BEL[16]
RXDATA3[16]	out	CELL[20].OUT_BEL[17]
RXDATA3[17]	out	CELL[21].OUT_BEL[8]
RXDATA3[18]	out	CELL[22].OUT_BEL[12]
RXDATA3[19]	out	CELL[22].OUT_BEL[0]
RXDATA3[20]	out	CELL[21].OUT_BEL[17]
RXDATA3[21]	out	CELL[22].OUT_BEL[16]
RXDATA3[22]	out	CELL[22].OUT_BEL[13]
RXDATA3[23]	out	CELL[22].OUT_BEL[7]
RXDATA3[24]	out	CELL[22].OUT_BEL[9]
RXDATA3[25]	out	CELL[22].OUT_BEL[8]
RXDATA3[26]	out	CELL[23].OUT_BEL[13]
RXDATA3[27]	out	CELL[23].OUT_BEL[9]
RXDATA3[28]	out	CELL[22].OUT_BEL[14]
RXDATA3[29]	out	CELL[23].OUT_BEL[14]
RXDATA3[30]	out	CELL[23].OUT_BEL[16]
RXDATA3[31]	out	CELL[23].OUT_BEL[7]
RXDATA3[32]	out	CELL[23].OUT_BEL[12]
RXDATA3[33]	out	CELL[23].OUT_BEL[8]
RXDATA3[34]	out	CELL[23].OUT_BEL[0]
RXDATA3[35]	out	CELL[23].OUT_BEL[4]
RXDATA3[36]	out	CELL[24].OUT_BEL[16]
RXDATA3[37]	out	CELL[24].OUT_BEL[21]
RXDATA3[38]	out	CELL[24].OUT_BEL[14]
RXDATA3[39]	out	CELL[24].OUT_BEL[8]
RXDATA3[40]	out	CELL[24].OUT_BEL[17]
RXDATA3[41]	out	CELL[24].OUT_BEL[0]
RXDATA3[42]	out	CELL[24].OUT_BEL[13]
RXDATA3[43]	out	CELL[24].OUT_BEL[4]
RXDATA3[44]	out	CELL[24].OUT_BEL[9]
RXDATA3[45]	out	CELL[24].OUT_BEL[12]
RXDATA3[46]	out	CELL[25].OUT_BEL[14]
RXDATA3[47]	out	CELL[25].OUT_BEL[12]
RXDATA3[48]	out	CELL[25].OUT_BEL[9]
RXDATA3[49]	out	CELL[25].OUT_BEL[13]
RXDATA3[50]	out	CELL[25].OUT_BEL[6]
RXDATA3[51]	out	CELL[25].OUT_BEL[7]
RXDATA3[52]	out	CELL[25].OUT_BEL[8]
RXDATA3[53]	out	CELL[25].OUT_BEL[0]
RXDATA3[54]	out	CELL[25].OUT_BEL[4]
RXDATA3[55]	out	CELL[26].OUT_BEL[16]
RXDATA3[56]	out	CELL[26].OUT_BEL[12]
RXDATA3[57]	out	CELL[25].OUT_BEL[17]
RXDATA3[58]	out	CELL[26].OUT_BEL[9]
RXDATA3[59]	out	CELL[26].OUT_BEL[6]
RXDATA3[60]	out	CELL[26].OUT_BEL[0]
RXDATA3[61]	out	CELL[26].OUT_BEL[8]
RXDATA3[62]	out	CELL[26].OUT_BEL[13]
RXDATA3[63]	out	CELL[26].OUT_BEL[7]
RXDATATAP3	out	CELL[28].OUT_BEL[2]
RXDISPERR3[0]	out	CELL[28].OUT_BEL[13]
RXDISPERR3[1]	out	CELL[27].OUT_BEL[13]
RXDISPERR3[2]	out	CELL[28].OUT_BEL[16]
RXDISPERR3[3]	out	CELL[27].OUT_BEL[14]
RXDISPERR3[4]	out	CELL[28].OUT_BEL[6]
RXDISPERR3[5]	out	CELL[27].OUT_BEL[16]
RXDISPERR3[6]	out	CELL[28].OUT_BEL[7]
RXDISPERR3[7]	out	CELL[27].OUT_BEL[7]
RXPCSCLKSMPL3	out	CELL[29].OUT_BEL[2]
RXUSERCLKOUT3	out	CELL[20].MGT_ROW[7]
RXVALID3[0]	out	CELL[25].OUT_BEL[18]
RXVALID3[1]	out	CELL[24].OUT_BEL[18]
RXVALID3[2]	out	CELL[23].OUT_BEL[18]
RXVALID3[3]	out	CELL[22].OUT_BEL[4]
RXVALID3[4]	out	CELL[25].OUT_BEL[11]
RXVALID3[5]	out	CELL[24].OUT_BEL[11]
RXVALID3[6]	out	CELL[23].OUT_BEL[11]
RXVALID3[7]	out	CELL[22].OUT_BEL[21]
TXCTRLACK3	out	CELL[29].OUT_BEL[9]
TXDATATAP13	out	CELL[20].OUT_BEL[2]
TXDATATAP23	out	CELL[23].OUT_BEL[2]
TXPCSCLKSMPL3	out	CELL[24].OUT_BEL[2]
TXUSERCLKOUT3	out	CELL[20].MGT_ROW[9]
SCANOUT[0]	out	CELL[1].OUT_BEL[4]
SCANOUT[1]	out	CELL[3].OUT_BEL[4]
SCANOUT[2]	out	CELL[5].OUT_BEL[4]
SCANOUT[3]	out	CELL[8].OUT_BEL[4]
SCANOUT[4]	out	CELL[11].OUT_BEL[4]
SCANOUT[5]	out	CELL[12].OUT_BEL[4]
SCANOUT[6]	out	CELL[15].OUT_BEL[4]
SCANOUT[7]	out	CELL[16].OUT_BEL[4]
SCANOUT[8]	out	CELL[20].OUT_BEL[5]
SCANOUT[9]	out	CELL[22].OUT_BEL[22]
SCANOUT[10]	out	CELL[24].OUT_BEL[22]
SCANOUT[11]	out	CELL[27].OUT_BEL[0]
SCANOUT[12]	out	CELL[29].OUT_BEL[4]
SCANOUT[13]	out	CELL[31].OUT_BEL[4]
SCANOUT[14]	out	CELL[34].OUT_BEL[22]
SCANOUT[15]	out	CELL[36].OUT_BEL[4]
SDSTSTFBCLK	out	CELL[16].OUT_BEL[19]
SDSTSTTDO	out	CELL[15].OUT_BEL[19]
TPDO	out	CELL[14].OUT_BEL[19]
TSTNOISEMON	out	CELL[17].OUT_BEL[19]
TSTPATH	out	CELL[20].MGT_ROW[4]
TSTREFCLKFAB	out	CELL[11].OUT_BEL[12]
TSTREFCLKOUT	out	CELL[20].MGT_ROW[5]

virtex6 GTH bel GTH_QUAD attribute bits
Attribute	GTH_QUAD
DRP[0] bit 0	MAIN[0][28][0]
DRP[0] bit 1	MAIN[0][29][0]
DRP[0] bit 2	MAIN[0][28][1]
DRP[0] bit 3	MAIN[0][29][1]
DRP[0] bit 4	MAIN[0][28][2]
DRP[0] bit 5	MAIN[0][29][2]
DRP[0] bit 6	MAIN[0][28][3]
DRP[0] bit 7	MAIN[0][29][3]
DRP[0] bit 8	MAIN[0][28][4]
DRP[0] bit 9	MAIN[0][29][4]
DRP[0] bit 10	MAIN[0][28][5]
DRP[0] bit 11	MAIN[0][29][5]
DRP[0] bit 12	MAIN[0][28][6]
DRP[0] bit 13	MAIN[0][29][6]
DRP[0] bit 14	MAIN[0][28][7]
DRP[0] bit 15	MAIN[0][29][7]
DRP[1] bit 0	MAIN[0][28][8]
DRP[1] bit 1	MAIN[0][29][8]
DRP[1] bit 2	MAIN[0][28][9]
DRP[1] bit 3	MAIN[0][29][9]
DRP[1] bit 4	MAIN[0][28][10]
DRP[1] bit 5	MAIN[0][29][10]
DRP[1] bit 6	MAIN[0][28][11]
DRP[1] bit 7	MAIN[0][29][11]
DRP[1] bit 8	MAIN[0][28][12]
DRP[1] bit 9	MAIN[0][29][12]
DRP[1] bit 10	MAIN[0][28][13]
DRP[1] bit 11	MAIN[0][29][13]
DRP[1] bit 12	MAIN[0][28][14]
DRP[1] bit 13	MAIN[0][29][14]
DRP[1] bit 14	MAIN[0][28][15]
DRP[1] bit 15	MAIN[0][29][15]
DRP[2] bit 0	MAIN[0][28][16]
DRP[2] bit 1	MAIN[0][29][16]
DRP[2] bit 2	MAIN[0][28][17]
DRP[2] bit 3	MAIN[0][29][17]
DRP[2] bit 4	MAIN[0][28][18]
DRP[2] bit 5	MAIN[0][29][18]
DRP[2] bit 6	MAIN[0][28][19]
DRP[2] bit 7	MAIN[0][29][19]
DRP[2] bit 8	MAIN[0][28][20]
DRP[2] bit 9	MAIN[0][29][20]
DRP[2] bit 10	MAIN[0][28][21]
DRP[2] bit 11	MAIN[0][29][21]
DRP[2] bit 12	MAIN[0][28][22]
DRP[2] bit 13	MAIN[0][29][22]
DRP[2] bit 14	MAIN[0][28][23]
DRP[2] bit 15	MAIN[0][29][23]
DRP[3] bit 0	MAIN[0][28][24]
DRP[3] bit 1	MAIN[0][29][24]
DRP[3] bit 2	MAIN[0][28][25]
DRP[3] bit 3	MAIN[0][29][25]
DRP[3] bit 4	MAIN[0][28][26]
DRP[3] bit 5	MAIN[0][29][26]
DRP[3] bit 6	MAIN[0][28][27]
DRP[3] bit 7	MAIN[0][29][27]
DRP[3] bit 8	MAIN[0][28][28]
DRP[3] bit 9	MAIN[0][29][28]
DRP[3] bit 10	MAIN[0][28][29]
DRP[3] bit 11	MAIN[0][29][29]
DRP[3] bit 12	MAIN[0][28][30]
DRP[3] bit 13	MAIN[0][29][30]
DRP[3] bit 14	MAIN[0][28][31]
DRP[3] bit 15	MAIN[0][29][31]
DRP[4] bit 0	MAIN[0][28][32]
DRP[4] bit 1	MAIN[0][29][32]
DRP[4] bit 2	MAIN[0][28][33]
DRP[4] bit 3	MAIN[0][29][33]
DRP[4] bit 4	MAIN[0][28][34]
DRP[4] bit 5	MAIN[0][29][34]
DRP[4] bit 6	MAIN[0][28][35]
DRP[4] bit 7	MAIN[0][29][35]
DRP[4] bit 8	MAIN[0][28][36]
DRP[4] bit 9	MAIN[0][29][36]
DRP[4] bit 10	MAIN[0][28][37]
DRP[4] bit 11	MAIN[0][29][37]
DRP[4] bit 12	MAIN[0][28][38]
DRP[4] bit 13	MAIN[0][29][38]
DRP[4] bit 14	MAIN[0][28][39]
DRP[4] bit 15	MAIN[0][29][39]
DRP[5] bit 0	MAIN[0][28][40]
DRP[5] bit 1	MAIN[0][29][40]
DRP[5] bit 2	MAIN[0][28][41]
DRP[5] bit 3	MAIN[0][29][41]
DRP[5] bit 4	MAIN[0][28][42]
DRP[5] bit 5	MAIN[0][29][42]
DRP[5] bit 6	MAIN[0][28][43]
DRP[5] bit 7	MAIN[0][29][43]
DRP[5] bit 8	MAIN[0][28][44]
DRP[5] bit 9	MAIN[0][29][44]
DRP[5] bit 10	MAIN[0][28][45]
DRP[5] bit 11	MAIN[0][29][45]
DRP[5] bit 12	MAIN[0][28][46]
DRP[5] bit 13	MAIN[0][29][46]
DRP[5] bit 14	MAIN[0][28][47]
DRP[5] bit 15	MAIN[0][29][47]
DRP[6] bit 0	MAIN[0][28][48]
DRP[6] bit 1	MAIN[0][29][48]
DRP[6] bit 2	MAIN[0][28][49]
DRP[6] bit 3	MAIN[0][29][49]
DRP[6] bit 4	MAIN[0][28][50]
DRP[6] bit 5	MAIN[0][29][50]
DRP[6] bit 6	MAIN[0][28][51]
DRP[6] bit 7	MAIN[0][29][51]
DRP[6] bit 8	MAIN[0][28][52]
DRP[6] bit 9	MAIN[0][29][52]
DRP[6] bit 10	MAIN[0][28][53]
DRP[6] bit 11	MAIN[0][29][53]
DRP[6] bit 12	MAIN[0][28][54]
DRP[6] bit 13	MAIN[0][29][54]
DRP[6] bit 14	MAIN[0][28][55]
DRP[6] bit 15	MAIN[0][29][55]
DRP[7] bit 0	MAIN[0][28][56]
DRP[7] bit 1	MAIN[0][29][56]
DRP[7] bit 2	MAIN[0][28][57]
DRP[7] bit 3	MAIN[0][29][57]
DRP[7] bit 4	MAIN[0][28][58]
DRP[7] bit 5	MAIN[0][29][58]
DRP[7] bit 6	MAIN[0][28][59]
DRP[7] bit 7	MAIN[0][29][59]
DRP[7] bit 8	MAIN[0][28][60]
DRP[7] bit 9	MAIN[0][29][60]
DRP[7] bit 10	MAIN[0][28][61]
DRP[7] bit 11	MAIN[0][29][61]
DRP[7] bit 12	MAIN[0][28][62]
DRP[7] bit 13	MAIN[0][29][62]
DRP[7] bit 14	MAIN[0][28][63]
DRP[7] bit 15	MAIN[0][29][63]
DRP[8] bit 0	MAIN[1][28][0]
DRP[8] bit 1	MAIN[1][29][0]
DRP[8] bit 2	MAIN[1][28][1]
DRP[8] bit 3	MAIN[1][29][1]
DRP[8] bit 4	MAIN[1][28][2]
DRP[8] bit 5	MAIN[1][29][2]
DRP[8] bit 6	MAIN[1][28][3]
DRP[8] bit 7	MAIN[1][29][3]
DRP[8] bit 8	MAIN[1][28][4]
DRP[8] bit 9	MAIN[1][29][4]
DRP[8] bit 10	MAIN[1][28][5]
DRP[8] bit 11	MAIN[1][29][5]
DRP[8] bit 12	MAIN[1][28][6]
DRP[8] bit 13	MAIN[1][29][6]
DRP[8] bit 14	MAIN[1][28][7]
DRP[8] bit 15	MAIN[1][29][7]
DRP[9] bit 0	MAIN[1][28][8]
DRP[9] bit 1	MAIN[1][29][8]
DRP[9] bit 2	MAIN[1][28][9]
DRP[9] bit 3	MAIN[1][29][9]
DRP[9] bit 4	MAIN[1][28][10]
DRP[9] bit 5	MAIN[1][29][10]
DRP[9] bit 6	MAIN[1][28][11]
DRP[9] bit 7	MAIN[1][29][11]
DRP[9] bit 8	MAIN[1][28][12]
DRP[9] bit 9	MAIN[1][29][12]
DRP[9] bit 10	MAIN[1][28][13]
DRP[9] bit 11	MAIN[1][29][13]
DRP[9] bit 12	MAIN[1][28][14]
DRP[9] bit 13	MAIN[1][29][14]
DRP[9] bit 14	MAIN[1][28][15]
DRP[9] bit 15	MAIN[1][29][15]
DRP[10] bit 0	MAIN[1][28][16]
DRP[10] bit 1	MAIN[1][29][16]
DRP[10] bit 2	MAIN[1][28][17]
DRP[10] bit 3	MAIN[1][29][17]
DRP[10] bit 4	MAIN[1][28][18]
DRP[10] bit 5	MAIN[1][29][18]
DRP[10] bit 6	MAIN[1][28][19]
DRP[10] bit 7	MAIN[1][29][19]
DRP[10] bit 8	MAIN[1][28][20]
DRP[10] bit 9	MAIN[1][29][20]
DRP[10] bit 10	MAIN[1][28][21]
DRP[10] bit 11	MAIN[1][29][21]
DRP[10] bit 12	MAIN[1][28][22]
DRP[10] bit 13	MAIN[1][29][22]
DRP[10] bit 14	MAIN[1][28][23]
DRP[10] bit 15	MAIN[1][29][23]
DRP[11] bit 0	MAIN[1][28][24]
DRP[11] bit 1	MAIN[1][29][24]
DRP[11] bit 2	MAIN[1][28][25]
DRP[11] bit 3	MAIN[1][29][25]
DRP[11] bit 4	MAIN[1][28][26]
DRP[11] bit 5	MAIN[1][29][26]
DRP[11] bit 6	MAIN[1][28][27]
DRP[11] bit 7	MAIN[1][29][27]
DRP[11] bit 8	MAIN[1][28][28]
DRP[11] bit 9	MAIN[1][29][28]
DRP[11] bit 10	MAIN[1][28][29]
DRP[11] bit 11	MAIN[1][29][29]
DRP[11] bit 12	MAIN[1][28][30]
DRP[11] bit 13	MAIN[1][29][30]
DRP[11] bit 14	MAIN[1][28][31]
DRP[11] bit 15	MAIN[1][29][31]
DRP[12] bit 0	MAIN[1][28][32]
DRP[12] bit 1	MAIN[1][29][32]
DRP[12] bit 2	MAIN[1][28][33]
DRP[12] bit 3	MAIN[1][29][33]
DRP[12] bit 4	MAIN[1][28][34]
DRP[12] bit 5	MAIN[1][29][34]
DRP[12] bit 6	MAIN[1][28][35]
DRP[12] bit 7	MAIN[1][29][35]
DRP[12] bit 8	MAIN[1][28][36]
DRP[12] bit 9	MAIN[1][29][36]
DRP[12] bit 10	MAIN[1][28][37]
DRP[12] bit 11	MAIN[1][29][37]
DRP[12] bit 12	MAIN[1][28][38]
DRP[12] bit 13	MAIN[1][29][38]
DRP[12] bit 14	MAIN[1][28][39]
DRP[12] bit 15	MAIN[1][29][39]
DRP[13] bit 0	MAIN[1][28][40]
DRP[13] bit 1	MAIN[1][29][40]
DRP[13] bit 2	MAIN[1][28][41]
DRP[13] bit 3	MAIN[1][29][41]
DRP[13] bit 4	MAIN[1][28][42]
DRP[13] bit 5	MAIN[1][29][42]
DRP[13] bit 6	MAIN[1][28][43]
DRP[13] bit 7	MAIN[1][29][43]
DRP[13] bit 8	MAIN[1][28][44]
DRP[13] bit 9	MAIN[1][29][44]
DRP[13] bit 10	MAIN[1][28][45]
DRP[13] bit 11	MAIN[1][29][45]
DRP[13] bit 12	MAIN[1][28][46]
DRP[13] bit 13	MAIN[1][29][46]
DRP[13] bit 14	MAIN[1][28][47]
DRP[13] bit 15	MAIN[1][29][47]
DRP[14] bit 0	MAIN[1][28][48]
DRP[14] bit 1	MAIN[1][29][48]
DRP[14] bit 2	MAIN[1][28][49]
DRP[14] bit 3	MAIN[1][29][49]
DRP[14] bit 4	MAIN[1][28][50]
DRP[14] bit 5	MAIN[1][29][50]
DRP[14] bit 6	MAIN[1][28][51]
DRP[14] bit 7	MAIN[1][29][51]
DRP[14] bit 8	MAIN[1][28][52]
DRP[14] bit 9	MAIN[1][29][52]
DRP[14] bit 10	MAIN[1][28][53]
DRP[14] bit 11	MAIN[1][29][53]
DRP[14] bit 12	MAIN[1][28][54]
DRP[14] bit 13	MAIN[1][29][54]
DRP[14] bit 14	MAIN[1][28][55]
DRP[14] bit 15	MAIN[1][29][55]
DRP[15] bit 0	MAIN[1][28][56]
DRP[15] bit 1	MAIN[1][29][56]
DRP[15] bit 2	MAIN[1][28][57]
DRP[15] bit 3	MAIN[1][29][57]
DRP[15] bit 4	MAIN[1][28][58]
DRP[15] bit 5	MAIN[1][29][58]
DRP[15] bit 6	MAIN[1][28][59]
DRP[15] bit 7	MAIN[1][29][59]
DRP[15] bit 8	MAIN[1][28][60]
DRP[15] bit 9	MAIN[1][29][60]
DRP[15] bit 10	MAIN[1][28][61]
DRP[15] bit 11	MAIN[1][29][61]
DRP[15] bit 12	MAIN[1][28][62]
DRP[15] bit 13	MAIN[1][29][62]
DRP[15] bit 14	MAIN[1][28][63]
DRP[15] bit 15	MAIN[1][29][63]
DRP[16] bit 0	MAIN[2][28][0]
DRP[16] bit 1	MAIN[2][29][0]
DRP[16] bit 2	MAIN[2][28][1]
DRP[16] bit 3	MAIN[2][29][1]
DRP[16] bit 4	MAIN[2][28][2]
DRP[16] bit 5	MAIN[2][29][2]
DRP[16] bit 6	MAIN[2][28][3]
DRP[16] bit 7	MAIN[2][29][3]
DRP[16] bit 8	MAIN[2][28][4]
DRP[16] bit 9	MAIN[2][29][4]
DRP[16] bit 10	MAIN[2][28][5]
DRP[16] bit 11	MAIN[2][29][5]
DRP[16] bit 12	MAIN[2][28][6]
DRP[16] bit 13	MAIN[2][29][6]
DRP[16] bit 14	MAIN[2][28][7]
DRP[16] bit 15	MAIN[2][29][7]
DRP[17] bit 0	MAIN[2][28][8]
DRP[17] bit 1	MAIN[2][29][8]
DRP[17] bit 2	MAIN[2][28][9]
DRP[17] bit 3	MAIN[2][29][9]
DRP[17] bit 4	MAIN[2][28][10]
DRP[17] bit 5	MAIN[2][29][10]
DRP[17] bit 6	MAIN[2][28][11]
DRP[17] bit 7	MAIN[2][29][11]
DRP[17] bit 8	MAIN[2][28][12]
DRP[17] bit 9	MAIN[2][29][12]
DRP[17] bit 10	MAIN[2][28][13]
DRP[17] bit 11	MAIN[2][29][13]
DRP[17] bit 12	MAIN[2][28][14]
DRP[17] bit 13	MAIN[2][29][14]
DRP[17] bit 14	MAIN[2][28][15]
DRP[17] bit 15	MAIN[2][29][15]
DRP[18] bit 0	MAIN[2][28][16]
DRP[18] bit 1	MAIN[2][29][16]
DRP[18] bit 2	MAIN[2][28][17]
DRP[18] bit 3	MAIN[2][29][17]
DRP[18] bit 4	MAIN[2][28][18]
DRP[18] bit 5	MAIN[2][29][18]
DRP[18] bit 6	MAIN[2][28][19]
DRP[18] bit 7	MAIN[2][29][19]
DRP[18] bit 8	MAIN[2][28][20]
DRP[18] bit 9	MAIN[2][29][20]
DRP[18] bit 10	MAIN[2][28][21]
DRP[18] bit 11	MAIN[2][29][21]
DRP[18] bit 12	MAIN[2][28][22]
DRP[18] bit 13	MAIN[2][29][22]
DRP[18] bit 14	MAIN[2][28][23]
DRP[18] bit 15	MAIN[2][29][23]
DRP[19] bit 0	MAIN[2][28][24]
DRP[19] bit 1	MAIN[2][29][24]
DRP[19] bit 2	MAIN[2][28][25]
DRP[19] bit 3	MAIN[2][29][25]
DRP[19] bit 4	MAIN[2][28][26]
DRP[19] bit 5	MAIN[2][29][26]
DRP[19] bit 6	MAIN[2][28][27]
DRP[19] bit 7	MAIN[2][29][27]
DRP[19] bit 8	MAIN[2][28][28]
DRP[19] bit 9	MAIN[2][29][28]
DRP[19] bit 10	MAIN[2][28][29]
DRP[19] bit 11	MAIN[2][29][29]
DRP[19] bit 12	MAIN[2][28][30]
DRP[19] bit 13	MAIN[2][29][30]
DRP[19] bit 14	MAIN[2][28][31]
DRP[19] bit 15	MAIN[2][29][31]
DRP[20] bit 0	MAIN[2][28][32]
DRP[20] bit 1	MAIN[2][29][32]
DRP[20] bit 2	MAIN[2][28][33]
DRP[20] bit 3	MAIN[2][29][33]
DRP[20] bit 4	MAIN[2][28][34]
DRP[20] bit 5	MAIN[2][29][34]
DRP[20] bit 6	MAIN[2][28][35]
DRP[20] bit 7	MAIN[2][29][35]
DRP[20] bit 8	MAIN[2][28][36]
DRP[20] bit 9	MAIN[2][29][36]
DRP[20] bit 10	MAIN[2][28][37]
DRP[20] bit 11	MAIN[2][29][37]
DRP[20] bit 12	MAIN[2][28][38]
DRP[20] bit 13	MAIN[2][29][38]
DRP[20] bit 14	MAIN[2][28][39]
DRP[20] bit 15	MAIN[2][29][39]
DRP[21] bit 0	MAIN[2][28][40]
DRP[21] bit 1	MAIN[2][29][40]
DRP[21] bit 2	MAIN[2][28][41]
DRP[21] bit 3	MAIN[2][29][41]
DRP[21] bit 4	MAIN[2][28][42]
DRP[21] bit 5	MAIN[2][29][42]
DRP[21] bit 6	MAIN[2][28][43]
DRP[21] bit 7	MAIN[2][29][43]
DRP[21] bit 8	MAIN[2][28][44]
DRP[21] bit 9	MAIN[2][29][44]
DRP[21] bit 10	MAIN[2][28][45]
DRP[21] bit 11	MAIN[2][29][45]
DRP[21] bit 12	MAIN[2][28][46]
DRP[21] bit 13	MAIN[2][29][46]
DRP[21] bit 14	MAIN[2][28][47]
DRP[21] bit 15	MAIN[2][29][47]
DRP[22] bit 0	MAIN[2][28][48]
DRP[22] bit 1	MAIN[2][29][48]
DRP[22] bit 2	MAIN[2][28][49]
DRP[22] bit 3	MAIN[2][29][49]
DRP[22] bit 4	MAIN[2][28][50]
DRP[22] bit 5	MAIN[2][29][50]
DRP[22] bit 6	MAIN[2][28][51]
DRP[22] bit 7	MAIN[2][29][51]
DRP[22] bit 8	MAIN[2][28][52]
DRP[22] bit 9	MAIN[2][29][52]
DRP[22] bit 10	MAIN[2][28][53]
DRP[22] bit 11	MAIN[2][29][53]
DRP[22] bit 12	MAIN[2][28][54]
DRP[22] bit 13	MAIN[2][29][54]
DRP[22] bit 14	MAIN[2][28][55]
DRP[22] bit 15	MAIN[2][29][55]
DRP[23] bit 0	MAIN[2][28][56]
DRP[23] bit 1	MAIN[2][29][56]
DRP[23] bit 2	MAIN[2][28][57]
DRP[23] bit 3	MAIN[2][29][57]
DRP[23] bit 4	MAIN[2][28][58]
DRP[23] bit 5	MAIN[2][29][58]
DRP[23] bit 6	MAIN[2][28][59]
DRP[23] bit 7	MAIN[2][29][59]
DRP[23] bit 8	MAIN[2][28][60]
DRP[23] bit 9	MAIN[2][29][60]
DRP[23] bit 10	MAIN[2][28][61]
DRP[23] bit 11	MAIN[2][29][61]
DRP[23] bit 12	MAIN[2][28][62]
DRP[23] bit 13	MAIN[2][29][62]
DRP[23] bit 14	MAIN[2][28][63]
DRP[23] bit 15	MAIN[2][29][63]
DRP[24] bit 0	MAIN[3][28][0]
DRP[24] bit 1	MAIN[3][29][0]
DRP[24] bit 2	MAIN[3][28][1]
DRP[24] bit 3	MAIN[3][29][1]
DRP[24] bit 4	MAIN[3][28][2]
DRP[24] bit 5	MAIN[3][29][2]
DRP[24] bit 6	MAIN[3][28][3]
DRP[24] bit 7	MAIN[3][29][3]
DRP[24] bit 8	MAIN[3][28][4]
DRP[24] bit 9	MAIN[3][29][4]
DRP[24] bit 10	MAIN[3][28][5]
DRP[24] bit 11	MAIN[3][29][5]
DRP[24] bit 12	MAIN[3][28][6]
DRP[24] bit 13	MAIN[3][29][6]
DRP[24] bit 14	MAIN[3][28][7]
DRP[24] bit 15	MAIN[3][29][7]
DRP[25] bit 0	MAIN[3][28][8]
DRP[25] bit 1	MAIN[3][29][8]
DRP[25] bit 2	MAIN[3][28][9]
DRP[25] bit 3	MAIN[3][29][9]
DRP[25] bit 4	MAIN[3][28][10]
DRP[25] bit 5	MAIN[3][29][10]
DRP[25] bit 6	MAIN[3][28][11]
DRP[25] bit 7	MAIN[3][29][11]
DRP[25] bit 8	MAIN[3][28][12]
DRP[25] bit 9	MAIN[3][29][12]
DRP[25] bit 10	MAIN[3][28][13]
DRP[25] bit 11	MAIN[3][29][13]
DRP[25] bit 12	MAIN[3][28][14]
DRP[25] bit 13	MAIN[3][29][14]
DRP[25] bit 14	MAIN[3][28][15]
DRP[25] bit 15	MAIN[3][29][15]
DRP[26] bit 0	MAIN[3][28][16]
DRP[26] bit 1	MAIN[3][29][16]
DRP[26] bit 2	MAIN[3][28][17]
DRP[26] bit 3	MAIN[3][29][17]
DRP[26] bit 4	MAIN[3][28][18]
DRP[26] bit 5	MAIN[3][29][18]
DRP[26] bit 6	MAIN[3][28][19]
DRP[26] bit 7	MAIN[3][29][19]
DRP[26] bit 8	MAIN[3][28][20]
DRP[26] bit 9	MAIN[3][29][20]
DRP[26] bit 10	MAIN[3][28][21]
DRP[26] bit 11	MAIN[3][29][21]
DRP[26] bit 12	MAIN[3][28][22]
DRP[26] bit 13	MAIN[3][29][22]
DRP[26] bit 14	MAIN[3][28][23]
DRP[26] bit 15	MAIN[3][29][23]
DRP[27] bit 0	MAIN[3][28][24]
DRP[27] bit 1	MAIN[3][29][24]
DRP[27] bit 2	MAIN[3][28][25]
DRP[27] bit 3	MAIN[3][29][25]
DRP[27] bit 4	MAIN[3][28][26]
DRP[27] bit 5	MAIN[3][29][26]
DRP[27] bit 6	MAIN[3][28][27]
DRP[27] bit 7	MAIN[3][29][27]
DRP[27] bit 8	MAIN[3][28][28]
DRP[27] bit 9	MAIN[3][29][28]
DRP[27] bit 10	MAIN[3][28][29]
DRP[27] bit 11	MAIN[3][29][29]
DRP[27] bit 12	MAIN[3][28][30]
DRP[27] bit 13	MAIN[3][29][30]
DRP[27] bit 14	MAIN[3][28][31]
DRP[27] bit 15	MAIN[3][29][31]
DRP[28] bit 0	MAIN[3][28][32]
DRP[28] bit 1	MAIN[3][29][32]
DRP[28] bit 2	MAIN[3][28][33]
DRP[28] bit 3	MAIN[3][29][33]
DRP[28] bit 4	MAIN[3][28][34]
DRP[28] bit 5	MAIN[3][29][34]
DRP[28] bit 6	MAIN[3][28][35]
DRP[28] bit 7	MAIN[3][29][35]
DRP[28] bit 8	MAIN[3][28][36]
DRP[28] bit 9	MAIN[3][29][36]
DRP[28] bit 10	MAIN[3][28][37]
DRP[28] bit 11	MAIN[3][29][37]
DRP[28] bit 12	MAIN[3][28][38]
DRP[28] bit 13	MAIN[3][29][38]
DRP[28] bit 14	MAIN[3][28][39]
DRP[28] bit 15	MAIN[3][29][39]
DRP[29] bit 0	MAIN[3][28][40]
DRP[29] bit 1	MAIN[3][29][40]
DRP[29] bit 2	MAIN[3][28][41]
DRP[29] bit 3	MAIN[3][29][41]
DRP[29] bit 4	MAIN[3][28][42]
DRP[29] bit 5	MAIN[3][29][42]
DRP[29] bit 6	MAIN[3][28][43]
DRP[29] bit 7	MAIN[3][29][43]
DRP[29] bit 8	MAIN[3][28][44]
DRP[29] bit 9	MAIN[3][29][44]
DRP[29] bit 10	MAIN[3][28][45]
DRP[29] bit 11	MAIN[3][29][45]
DRP[29] bit 12	MAIN[3][28][46]
DRP[29] bit 13	MAIN[3][29][46]
DRP[29] bit 14	MAIN[3][28][47]
DRP[29] bit 15	MAIN[3][29][47]
DRP[30] bit 0	MAIN[3][28][48]
DRP[30] bit 1	MAIN[3][29][48]
DRP[30] bit 2	MAIN[3][28][49]
DRP[30] bit 3	MAIN[3][29][49]
DRP[30] bit 4	MAIN[3][28][50]
DRP[30] bit 5	MAIN[3][29][50]
DRP[30] bit 6	MAIN[3][28][51]
DRP[30] bit 7	MAIN[3][29][51]
DRP[30] bit 8	MAIN[3][28][52]
DRP[30] bit 9	MAIN[3][29][52]
DRP[30] bit 10	MAIN[3][28][53]
DRP[30] bit 11	MAIN[3][29][53]
DRP[30] bit 12	MAIN[3][28][54]
DRP[30] bit 13	MAIN[3][29][54]
DRP[30] bit 14	MAIN[3][28][55]
DRP[30] bit 15	MAIN[3][29][55]
DRP[31] bit 0	MAIN[3][28][56]
DRP[31] bit 1	MAIN[3][29][56]
DRP[31] bit 2	MAIN[3][28][57]
DRP[31] bit 3	MAIN[3][29][57]
DRP[31] bit 4	MAIN[3][28][58]
DRP[31] bit 5	MAIN[3][29][58]
DRP[31] bit 6	MAIN[3][28][59]
DRP[31] bit 7	MAIN[3][29][59]
DRP[31] bit 8	MAIN[3][28][60]
DRP[31] bit 9	MAIN[3][29][60]
DRP[31] bit 10	MAIN[3][28][61]
DRP[31] bit 11	MAIN[3][29][61]
DRP[31] bit 12	MAIN[3][28][62]
DRP[31] bit 13	MAIN[3][29][62]
DRP[31] bit 14	MAIN[3][28][63]
DRP[31] bit 15	MAIN[3][29][63]
DRP[32] bit 0	MAIN[4][28][0]
DRP[32] bit 1	MAIN[4][29][0]
DRP[32] bit 2	MAIN[4][28][1]
DRP[32] bit 3	MAIN[4][29][1]
DRP[32] bit 4	MAIN[4][28][2]
DRP[32] bit 5	MAIN[4][29][2]
DRP[32] bit 6	MAIN[4][28][3]
DRP[32] bit 7	MAIN[4][29][3]
DRP[32] bit 8	MAIN[4][28][4]
DRP[32] bit 9	MAIN[4][29][4]
DRP[32] bit 10	MAIN[4][28][5]
DRP[32] bit 11	MAIN[4][29][5]
DRP[32] bit 12	MAIN[4][28][6]
DRP[32] bit 13	MAIN[4][29][6]
DRP[32] bit 14	MAIN[4][28][7]
DRP[32] bit 15	MAIN[4][29][7]
DRP[33] bit 0	MAIN[4][28][8]
DRP[33] bit 1	MAIN[4][29][8]
DRP[33] bit 2	MAIN[4][28][9]
DRP[33] bit 3	MAIN[4][29][9]
DRP[33] bit 4	MAIN[4][28][10]
DRP[33] bit 5	MAIN[4][29][10]
DRP[33] bit 6	MAIN[4][28][11]
DRP[33] bit 7	MAIN[4][29][11]
DRP[33] bit 8	MAIN[4][28][12]
DRP[33] bit 9	MAIN[4][29][12]
DRP[33] bit 10	MAIN[4][28][13]
DRP[33] bit 11	MAIN[4][29][13]
DRP[33] bit 12	MAIN[4][28][14]
DRP[33] bit 13	MAIN[4][29][14]
DRP[33] bit 14	MAIN[4][28][15]
DRP[33] bit 15	MAIN[4][29][15]
DRP[34] bit 0	MAIN[4][28][16]
DRP[34] bit 1	MAIN[4][29][16]
DRP[34] bit 2	MAIN[4][28][17]
DRP[34] bit 3	MAIN[4][29][17]
DRP[34] bit 4	MAIN[4][28][18]
DRP[34] bit 5	MAIN[4][29][18]
DRP[34] bit 6	MAIN[4][28][19]
DRP[34] bit 7	MAIN[4][29][19]
DRP[34] bit 8	MAIN[4][28][20]
DRP[34] bit 9	MAIN[4][29][20]
DRP[34] bit 10	MAIN[4][28][21]
DRP[34] bit 11	MAIN[4][29][21]
DRP[34] bit 12	MAIN[4][28][22]
DRP[34] bit 13	MAIN[4][29][22]
DRP[34] bit 14	MAIN[4][28][23]
DRP[34] bit 15	MAIN[4][29][23]
DRP[35] bit 0	MAIN[4][28][24]
DRP[35] bit 1	MAIN[4][29][24]
DRP[35] bit 2	MAIN[4][28][25]
DRP[35] bit 3	MAIN[4][29][25]
DRP[35] bit 4	MAIN[4][28][26]
DRP[35] bit 5	MAIN[4][29][26]
DRP[35] bit 6	MAIN[4][28][27]
DRP[35] bit 7	MAIN[4][29][27]
DRP[35] bit 8	MAIN[4][28][28]
DRP[35] bit 9	MAIN[4][29][28]
DRP[35] bit 10	MAIN[4][28][29]
DRP[35] bit 11	MAIN[4][29][29]
DRP[35] bit 12	MAIN[4][28][30]
DRP[35] bit 13	MAIN[4][29][30]
DRP[35] bit 14	MAIN[4][28][31]
DRP[35] bit 15	MAIN[4][29][31]
DRP[36] bit 0	MAIN[4][28][32]
DRP[36] bit 1	MAIN[4][29][32]
DRP[36] bit 2	MAIN[4][28][33]
DRP[36] bit 3	MAIN[4][29][33]
DRP[36] bit 4	MAIN[4][28][34]
DRP[36] bit 5	MAIN[4][29][34]
DRP[36] bit 6	MAIN[4][28][35]
DRP[36] bit 7	MAIN[4][29][35]
DRP[36] bit 8	MAIN[4][28][36]
DRP[36] bit 9	MAIN[4][29][36]
DRP[36] bit 10	MAIN[4][28][37]
DRP[36] bit 11	MAIN[4][29][37]
DRP[36] bit 12	MAIN[4][28][38]
DRP[36] bit 13	MAIN[4][29][38]
DRP[36] bit 14	MAIN[4][28][39]
DRP[36] bit 15	MAIN[4][29][39]
DRP[37] bit 0	MAIN[4][28][40]
DRP[37] bit 1	MAIN[4][29][40]
DRP[37] bit 2	MAIN[4][28][41]
DRP[37] bit 3	MAIN[4][29][41]
DRP[37] bit 4	MAIN[4][28][42]
DRP[37] bit 5	MAIN[4][29][42]
DRP[37] bit 6	MAIN[4][28][43]
DRP[37] bit 7	MAIN[4][29][43]
DRP[37] bit 8	MAIN[4][28][44]
DRP[37] bit 9	MAIN[4][29][44]
DRP[37] bit 10	MAIN[4][28][45]
DRP[37] bit 11	MAIN[4][29][45]
DRP[37] bit 12	MAIN[4][28][46]
DRP[37] bit 13	MAIN[4][29][46]
DRP[37] bit 14	MAIN[4][28][47]
DRP[37] bit 15	MAIN[4][29][47]
DRP[38] bit 0	MAIN[4][28][48]
DRP[38] bit 1	MAIN[4][29][48]
DRP[38] bit 2	MAIN[4][28][49]
DRP[38] bit 3	MAIN[4][29][49]
DRP[38] bit 4	MAIN[4][28][50]
DRP[38] bit 5	MAIN[4][29][50]
DRP[38] bit 6	MAIN[4][28][51]
DRP[38] bit 7	MAIN[4][29][51]
DRP[38] bit 8	MAIN[4][28][52]
DRP[38] bit 9	MAIN[4][29][52]
DRP[38] bit 10	MAIN[4][28][53]
DRP[38] bit 11	MAIN[4][29][53]
DRP[38] bit 12	MAIN[4][28][54]
DRP[38] bit 13	MAIN[4][29][54]
DRP[38] bit 14	MAIN[4][28][55]
DRP[38] bit 15	MAIN[4][29][55]
DRP[39] bit 0	MAIN[4][28][56]
DRP[39] bit 1	MAIN[4][29][56]
DRP[39] bit 2	MAIN[4][28][57]
DRP[39] bit 3	MAIN[4][29][57]
DRP[39] bit 4	MAIN[4][28][58]
DRP[39] bit 5	MAIN[4][29][58]
DRP[39] bit 6	MAIN[4][28][59]
DRP[39] bit 7	MAIN[4][29][59]
DRP[39] bit 8	MAIN[4][28][60]
DRP[39] bit 9	MAIN[4][29][60]
DRP[39] bit 10	MAIN[4][28][61]
DRP[39] bit 11	MAIN[4][29][61]
DRP[39] bit 12	MAIN[4][28][62]
DRP[39] bit 13	MAIN[4][29][62]
DRP[39] bit 14	MAIN[4][28][63]
DRP[39] bit 15	MAIN[4][29][63]
DRP[40] bit 0	MAIN[5][28][0]
DRP[40] bit 1	MAIN[5][29][0]
DRP[40] bit 2	MAIN[5][28][1]
DRP[40] bit 3	MAIN[5][29][1]
DRP[40] bit 4	MAIN[5][28][2]
DRP[40] bit 5	MAIN[5][29][2]
DRP[40] bit 6	MAIN[5][28][3]
DRP[40] bit 7	MAIN[5][29][3]
DRP[40] bit 8	MAIN[5][28][4]
DRP[40] bit 9	MAIN[5][29][4]
DRP[40] bit 10	MAIN[5][28][5]
DRP[40] bit 11	MAIN[5][29][5]
DRP[40] bit 12	MAIN[5][28][6]
DRP[40] bit 13	MAIN[5][29][6]
DRP[40] bit 14	MAIN[5][28][7]
DRP[40] bit 15	MAIN[5][29][7]
DRP[41] bit 0	MAIN[5][28][8]
DRP[41] bit 1	MAIN[5][29][8]
DRP[41] bit 2	MAIN[5][28][9]
DRP[41] bit 3	MAIN[5][29][9]
DRP[41] bit 4	MAIN[5][28][10]
DRP[41] bit 5	MAIN[5][29][10]
DRP[41] bit 6	MAIN[5][28][11]
DRP[41] bit 7	MAIN[5][29][11]
DRP[41] bit 8	MAIN[5][28][12]
DRP[41] bit 9	MAIN[5][29][12]
DRP[41] bit 10	MAIN[5][28][13]
DRP[41] bit 11	MAIN[5][29][13]
DRP[41] bit 12	MAIN[5][28][14]
DRP[41] bit 13	MAIN[5][29][14]
DRP[41] bit 14	MAIN[5][28][15]
DRP[41] bit 15	MAIN[5][29][15]
DRP[42] bit 0	MAIN[5][28][16]
DRP[42] bit 1	MAIN[5][29][16]
DRP[42] bit 2	MAIN[5][28][17]
DRP[42] bit 3	MAIN[5][29][17]
DRP[42] bit 4	MAIN[5][28][18]
DRP[42] bit 5	MAIN[5][29][18]
DRP[42] bit 6	MAIN[5][28][19]
DRP[42] bit 7	MAIN[5][29][19]
DRP[42] bit 8	MAIN[5][28][20]
DRP[42] bit 9	MAIN[5][29][20]
DRP[42] bit 10	MAIN[5][28][21]
DRP[42] bit 11	MAIN[5][29][21]
DRP[42] bit 12	MAIN[5][28][22]
DRP[42] bit 13	MAIN[5][29][22]
DRP[42] bit 14	MAIN[5][28][23]
DRP[42] bit 15	MAIN[5][29][23]
DRP[43] bit 0	MAIN[5][28][24]
DRP[43] bit 1	MAIN[5][29][24]
DRP[43] bit 2	MAIN[5][28][25]
DRP[43] bit 3	MAIN[5][29][25]
DRP[43] bit 4	MAIN[5][28][26]
DRP[43] bit 5	MAIN[5][29][26]
DRP[43] bit 6	MAIN[5][28][27]
DRP[43] bit 7	MAIN[5][29][27]
DRP[43] bit 8	MAIN[5][28][28]
DRP[43] bit 9	MAIN[5][29][28]
DRP[43] bit 10	MAIN[5][28][29]
DRP[43] bit 11	MAIN[5][29][29]
DRP[43] bit 12	MAIN[5][28][30]
DRP[43] bit 13	MAIN[5][29][30]
DRP[43] bit 14	MAIN[5][28][31]
DRP[43] bit 15	MAIN[5][29][31]
DRP[44] bit 0	MAIN[5][28][32]
DRP[44] bit 1	MAIN[5][29][32]
DRP[44] bit 2	MAIN[5][28][33]
DRP[44] bit 3	MAIN[5][29][33]
DRP[44] bit 4	MAIN[5][28][34]
DRP[44] bit 5	MAIN[5][29][34]
DRP[44] bit 6	MAIN[5][28][35]
DRP[44] bit 7	MAIN[5][29][35]
DRP[44] bit 8	MAIN[5][28][36]
DRP[44] bit 9	MAIN[5][29][36]
DRP[44] bit 10	MAIN[5][28][37]
DRP[44] bit 11	MAIN[5][29][37]
DRP[44] bit 12	MAIN[5][28][38]
DRP[44] bit 13	MAIN[5][29][38]
DRP[44] bit 14	MAIN[5][28][39]
DRP[44] bit 15	MAIN[5][29][39]
DRP[45] bit 0	MAIN[5][28][40]
DRP[45] bit 1	MAIN[5][29][40]
DRP[45] bit 2	MAIN[5][28][41]
DRP[45] bit 3	MAIN[5][29][41]
DRP[45] bit 4	MAIN[5][28][42]
DRP[45] bit 5	MAIN[5][29][42]
DRP[45] bit 6	MAIN[5][28][43]
DRP[45] bit 7	MAIN[5][29][43]
DRP[45] bit 8	MAIN[5][28][44]
DRP[45] bit 9	MAIN[5][29][44]
DRP[45] bit 10	MAIN[5][28][45]
DRP[45] bit 11	MAIN[5][29][45]
DRP[45] bit 12	MAIN[5][28][46]
DRP[45] bit 13	MAIN[5][29][46]
DRP[45] bit 14	MAIN[5][28][47]
DRP[45] bit 15	MAIN[5][29][47]
DRP[46] bit 0	MAIN[5][28][48]
DRP[46] bit 1	MAIN[5][29][48]
DRP[46] bit 2	MAIN[5][28][49]
DRP[46] bit 3	MAIN[5][29][49]
DRP[46] bit 4	MAIN[5][28][50]
DRP[46] bit 5	MAIN[5][29][50]
DRP[46] bit 6	MAIN[5][28][51]
DRP[46] bit 7	MAIN[5][29][51]
DRP[46] bit 8	MAIN[5][28][52]
DRP[46] bit 9	MAIN[5][29][52]
DRP[46] bit 10	MAIN[5][28][53]
DRP[46] bit 11	MAIN[5][29][53]
DRP[46] bit 12	MAIN[5][28][54]
DRP[46] bit 13	MAIN[5][29][54]
DRP[46] bit 14	MAIN[5][28][55]
DRP[46] bit 15	MAIN[5][29][55]
DRP[47] bit 0	MAIN[5][28][56]
DRP[47] bit 1	MAIN[5][29][56]
DRP[47] bit 2	MAIN[5][28][57]
DRP[47] bit 3	MAIN[5][29][57]
DRP[47] bit 4	MAIN[5][28][58]
DRP[47] bit 5	MAIN[5][29][58]
DRP[47] bit 6	MAIN[5][28][59]
DRP[47] bit 7	MAIN[5][29][59]
DRP[47] bit 8	MAIN[5][28][60]
DRP[47] bit 9	MAIN[5][29][60]
DRP[47] bit 10	MAIN[5][28][61]
DRP[47] bit 11	MAIN[5][29][61]
DRP[47] bit 12	MAIN[5][28][62]
DRP[47] bit 13	MAIN[5][29][62]
DRP[47] bit 14	MAIN[5][28][63]
DRP[47] bit 15	MAIN[5][29][63]
DRP[48] bit 0	MAIN[6][28][0]
DRP[48] bit 1	MAIN[6][29][0]
DRP[48] bit 2	MAIN[6][28][1]
DRP[48] bit 3	MAIN[6][29][1]
DRP[48] bit 4	MAIN[6][28][2]
DRP[48] bit 5	MAIN[6][29][2]
DRP[48] bit 6	MAIN[6][28][3]
DRP[48] bit 7	MAIN[6][29][3]
DRP[48] bit 8	MAIN[6][28][4]
DRP[48] bit 9	MAIN[6][29][4]
DRP[48] bit 10	MAIN[6][28][5]
DRP[48] bit 11	MAIN[6][29][5]
DRP[48] bit 12	MAIN[6][28][6]
DRP[48] bit 13	MAIN[6][29][6]
DRP[48] bit 14	MAIN[6][28][7]
DRP[48] bit 15	MAIN[6][29][7]
DRP[49] bit 0	MAIN[6][28][8]
DRP[49] bit 1	MAIN[6][29][8]
DRP[49] bit 2	MAIN[6][28][9]
DRP[49] bit 3	MAIN[6][29][9]
DRP[49] bit 4	MAIN[6][28][10]
DRP[49] bit 5	MAIN[6][29][10]
DRP[49] bit 6	MAIN[6][28][11]
DRP[49] bit 7	MAIN[6][29][11]
DRP[49] bit 8	MAIN[6][28][12]
DRP[49] bit 9	MAIN[6][29][12]
DRP[49] bit 10	MAIN[6][28][13]
DRP[49] bit 11	MAIN[6][29][13]
DRP[49] bit 12	MAIN[6][28][14]
DRP[49] bit 13	MAIN[6][29][14]
DRP[49] bit 14	MAIN[6][28][15]
DRP[49] bit 15	MAIN[6][29][15]
DRP[50] bit 0	MAIN[6][28][16]
DRP[50] bit 1	MAIN[6][29][16]
DRP[50] bit 2	MAIN[6][28][17]
DRP[50] bit 3	MAIN[6][29][17]
DRP[50] bit 4	MAIN[6][28][18]
DRP[50] bit 5	MAIN[6][29][18]
DRP[50] bit 6	MAIN[6][28][19]
DRP[50] bit 7	MAIN[6][29][19]
DRP[50] bit 8	MAIN[6][28][20]
DRP[50] bit 9	MAIN[6][29][20]
DRP[50] bit 10	MAIN[6][28][21]
DRP[50] bit 11	MAIN[6][29][21]
DRP[50] bit 12	MAIN[6][28][22]
DRP[50] bit 13	MAIN[6][29][22]
DRP[50] bit 14	MAIN[6][28][23]
DRP[50] bit 15	MAIN[6][29][23]
DRP[51] bit 0	MAIN[6][28][24]
DRP[51] bit 1	MAIN[6][29][24]
DRP[51] bit 2	MAIN[6][28][25]
DRP[51] bit 3	MAIN[6][29][25]
DRP[51] bit 4	MAIN[6][28][26]
DRP[51] bit 5	MAIN[6][29][26]
DRP[51] bit 6	MAIN[6][28][27]
DRP[51] bit 7	MAIN[6][29][27]
DRP[51] bit 8	MAIN[6][28][28]
DRP[51] bit 9	MAIN[6][29][28]
DRP[51] bit 10	MAIN[6][28][29]
DRP[51] bit 11	MAIN[6][29][29]
DRP[51] bit 12	MAIN[6][28][30]
DRP[51] bit 13	MAIN[6][29][30]
DRP[51] bit 14	MAIN[6][28][31]
DRP[51] bit 15	MAIN[6][29][31]
DRP[52] bit 0	MAIN[6][28][32]
DRP[52] bit 1	MAIN[6][29][32]
DRP[52] bit 2	MAIN[6][28][33]
DRP[52] bit 3	MAIN[6][29][33]
DRP[52] bit 4	MAIN[6][28][34]
DRP[52] bit 5	MAIN[6][29][34]
DRP[52] bit 6	MAIN[6][28][35]
DRP[52] bit 7	MAIN[6][29][35]
DRP[52] bit 8	MAIN[6][28][36]
DRP[52] bit 9	MAIN[6][29][36]
DRP[52] bit 10	MAIN[6][28][37]
DRP[52] bit 11	MAIN[6][29][37]
DRP[52] bit 12	MAIN[6][28][38]
DRP[52] bit 13	MAIN[6][29][38]
DRP[52] bit 14	MAIN[6][28][39]
DRP[52] bit 15	MAIN[6][29][39]
DRP[53] bit 0	MAIN[6][28][40]
DRP[53] bit 1	MAIN[6][29][40]
DRP[53] bit 2	MAIN[6][28][41]
DRP[53] bit 3	MAIN[6][29][41]
DRP[53] bit 4	MAIN[6][28][42]
DRP[53] bit 5	MAIN[6][29][42]
DRP[53] bit 6	MAIN[6][28][43]
DRP[53] bit 7	MAIN[6][29][43]
DRP[53] bit 8	MAIN[6][28][44]
DRP[53] bit 9	MAIN[6][29][44]
DRP[53] bit 10	MAIN[6][28][45]
DRP[53] bit 11	MAIN[6][29][45]
DRP[53] bit 12	MAIN[6][28][46]
DRP[53] bit 13	MAIN[6][29][46]
DRP[53] bit 14	MAIN[6][28][47]
DRP[53] bit 15	MAIN[6][29][47]
DRP[54] bit 0	MAIN[6][28][48]
DRP[54] bit 1	MAIN[6][29][48]
DRP[54] bit 2	MAIN[6][28][49]
DRP[54] bit 3	MAIN[6][29][49]
DRP[54] bit 4	MAIN[6][28][50]
DRP[54] bit 5	MAIN[6][29][50]
DRP[54] bit 6	MAIN[6][28][51]
DRP[54] bit 7	MAIN[6][29][51]
DRP[54] bit 8	MAIN[6][28][52]
DRP[54] bit 9	MAIN[6][29][52]
DRP[54] bit 10	MAIN[6][28][53]
DRP[54] bit 11	MAIN[6][29][53]
DRP[54] bit 12	MAIN[6][28][54]
DRP[54] bit 13	MAIN[6][29][54]
DRP[54] bit 14	MAIN[6][28][55]
DRP[54] bit 15	MAIN[6][29][55]
DRP[55] bit 0	MAIN[6][28][56]
DRP[55] bit 1	MAIN[6][29][56]
DRP[55] bit 2	MAIN[6][28][57]
DRP[55] bit 3	MAIN[6][29][57]
DRP[55] bit 4	MAIN[6][28][58]
DRP[55] bit 5	MAIN[6][29][58]
DRP[55] bit 6	MAIN[6][28][59]
DRP[55] bit 7	MAIN[6][29][59]
DRP[55] bit 8	MAIN[6][28][60]
DRP[55] bit 9	MAIN[6][29][60]
DRP[55] bit 10	MAIN[6][28][61]
DRP[55] bit 11	MAIN[6][29][61]
DRP[55] bit 12	MAIN[6][28][62]
DRP[55] bit 13	MAIN[6][29][62]
DRP[55] bit 14	MAIN[6][28][63]
DRP[55] bit 15	MAIN[6][29][63]
DRP[56] bit 0	MAIN[7][28][0]
DRP[56] bit 1	MAIN[7][29][0]
DRP[56] bit 2	MAIN[7][28][1]
DRP[56] bit 3	MAIN[7][29][1]
DRP[56] bit 4	MAIN[7][28][2]
DRP[56] bit 5	MAIN[7][29][2]
DRP[56] bit 6	MAIN[7][28][3]
DRP[56] bit 7	MAIN[7][29][3]
DRP[56] bit 8	MAIN[7][28][4]
DRP[56] bit 9	MAIN[7][29][4]
DRP[56] bit 10	MAIN[7][28][5]
DRP[56] bit 11	MAIN[7][29][5]
DRP[56] bit 12	MAIN[7][28][6]
DRP[56] bit 13	MAIN[7][29][6]
DRP[56] bit 14	MAIN[7][28][7]
DRP[56] bit 15	MAIN[7][29][7]
DRP[57] bit 0	MAIN[7][28][8]
DRP[57] bit 1	MAIN[7][29][8]
DRP[57] bit 2	MAIN[7][28][9]
DRP[57] bit 3	MAIN[7][29][9]
DRP[57] bit 4	MAIN[7][28][10]
DRP[57] bit 5	MAIN[7][29][10]
DRP[57] bit 6	MAIN[7][28][11]
DRP[57] bit 7	MAIN[7][29][11]
DRP[57] bit 8	MAIN[7][28][12]
DRP[57] bit 9	MAIN[7][29][12]
DRP[57] bit 10	MAIN[7][28][13]
DRP[57] bit 11	MAIN[7][29][13]
DRP[57] bit 12	MAIN[7][28][14]
DRP[57] bit 13	MAIN[7][29][14]
DRP[57] bit 14	MAIN[7][28][15]
DRP[57] bit 15	MAIN[7][29][15]
DRP[58] bit 0	MAIN[7][28][16]
DRP[58] bit 1	MAIN[7][29][16]
DRP[58] bit 2	MAIN[7][28][17]
DRP[58] bit 3	MAIN[7][29][17]
DRP[58] bit 4	MAIN[7][28][18]
DRP[58] bit 5	MAIN[7][29][18]
DRP[58] bit 6	MAIN[7][28][19]
DRP[58] bit 7	MAIN[7][29][19]
DRP[58] bit 8	MAIN[7][28][20]
DRP[58] bit 9	MAIN[7][29][20]
DRP[58] bit 10	MAIN[7][28][21]
DRP[58] bit 11	MAIN[7][29][21]
DRP[58] bit 12	MAIN[7][28][22]
DRP[58] bit 13	MAIN[7][29][22]
DRP[58] bit 14	MAIN[7][28][23]
DRP[58] bit 15	MAIN[7][29][23]
DRP[59] bit 0	MAIN[7][28][24]
DRP[59] bit 1	MAIN[7][29][24]
DRP[59] bit 2	MAIN[7][28][25]
DRP[59] bit 3	MAIN[7][29][25]
DRP[59] bit 4	MAIN[7][28][26]
DRP[59] bit 5	MAIN[7][29][26]
DRP[59] bit 6	MAIN[7][28][27]
DRP[59] bit 7	MAIN[7][29][27]
DRP[59] bit 8	MAIN[7][28][28]
DRP[59] bit 9	MAIN[7][29][28]
DRP[59] bit 10	MAIN[7][28][29]
DRP[59] bit 11	MAIN[7][29][29]
DRP[59] bit 12	MAIN[7][28][30]
DRP[59] bit 13	MAIN[7][29][30]
DRP[59] bit 14	MAIN[7][28][31]
DRP[59] bit 15	MAIN[7][29][31]
DRP[60] bit 0	MAIN[7][28][32]
DRP[60] bit 1	MAIN[7][29][32]
DRP[60] bit 2	MAIN[7][28][33]
DRP[60] bit 3	MAIN[7][29][33]
DRP[60] bit 4	MAIN[7][28][34]
DRP[60] bit 5	MAIN[7][29][34]
DRP[60] bit 6	MAIN[7][28][35]
DRP[60] bit 7	MAIN[7][29][35]
DRP[60] bit 8	MAIN[7][28][36]
DRP[60] bit 9	MAIN[7][29][36]
DRP[60] bit 10	MAIN[7][28][37]
DRP[60] bit 11	MAIN[7][29][37]
DRP[60] bit 12	MAIN[7][28][38]
DRP[60] bit 13	MAIN[7][29][38]
DRP[60] bit 14	MAIN[7][28][39]
DRP[60] bit 15	MAIN[7][29][39]
DRP[61] bit 0	MAIN[7][28][40]
DRP[61] bit 1	MAIN[7][29][40]
DRP[61] bit 2	MAIN[7][28][41]
DRP[61] bit 3	MAIN[7][29][41]
DRP[61] bit 4	MAIN[7][28][42]
DRP[61] bit 5	MAIN[7][29][42]
DRP[61] bit 6	MAIN[7][28][43]
DRP[61] bit 7	MAIN[7][29][43]
DRP[61] bit 8	MAIN[7][28][44]
DRP[61] bit 9	MAIN[7][29][44]
DRP[61] bit 10	MAIN[7][28][45]
DRP[61] bit 11	MAIN[7][29][45]
DRP[61] bit 12	MAIN[7][28][46]
DRP[61] bit 13	MAIN[7][29][46]
DRP[61] bit 14	MAIN[7][28][47]
DRP[61] bit 15	MAIN[7][29][47]
DRP[62] bit 0	MAIN[7][28][48]
DRP[62] bit 1	MAIN[7][29][48]
DRP[62] bit 2	MAIN[7][28][49]
DRP[62] bit 3	MAIN[7][29][49]
DRP[62] bit 4	MAIN[7][28][50]
DRP[62] bit 5	MAIN[7][29][50]
DRP[62] bit 6	MAIN[7][28][51]
DRP[62] bit 7	MAIN[7][29][51]
DRP[62] bit 8	MAIN[7][28][52]
DRP[62] bit 9	MAIN[7][29][52]
DRP[62] bit 10	MAIN[7][28][53]
DRP[62] bit 11	MAIN[7][29][53]
DRP[62] bit 12	MAIN[7][28][54]
DRP[62] bit 13	MAIN[7][29][54]
DRP[62] bit 14	MAIN[7][28][55]
DRP[62] bit 15	MAIN[7][29][55]
DRP[63] bit 0	MAIN[7][28][56]
DRP[63] bit 1	MAIN[7][29][56]
DRP[63] bit 2	MAIN[7][28][57]
DRP[63] bit 3	MAIN[7][29][57]
DRP[63] bit 4	MAIN[7][28][58]
DRP[63] bit 5	MAIN[7][29][58]
DRP[63] bit 6	MAIN[7][28][59]
DRP[63] bit 7	MAIN[7][29][59]
DRP[63] bit 8	MAIN[7][28][60]
DRP[63] bit 9	MAIN[7][29][60]
DRP[63] bit 10	MAIN[7][28][61]
DRP[63] bit 11	MAIN[7][29][61]
DRP[63] bit 12	MAIN[7][28][62]
DRP[63] bit 13	MAIN[7][29][62]
DRP[63] bit 14	MAIN[7][28][63]
DRP[63] bit 15	MAIN[7][29][63]
DRP[64] bit 0	MAIN[8][28][0]
DRP[64] bit 1	MAIN[8][29][0]
DRP[64] bit 2	MAIN[8][28][1]
DRP[64] bit 3	MAIN[8][29][1]
DRP[64] bit 4	MAIN[8][28][2]
DRP[64] bit 5	MAIN[8][29][2]
DRP[64] bit 6	MAIN[8][28][3]
DRP[64] bit 7	MAIN[8][29][3]
DRP[64] bit 8	MAIN[8][28][4]
DRP[64] bit 9	MAIN[8][29][4]
DRP[64] bit 10	MAIN[8][28][5]
DRP[64] bit 11	MAIN[8][29][5]
DRP[64] bit 12	MAIN[8][28][6]
DRP[64] bit 13	MAIN[8][29][6]
DRP[64] bit 14	MAIN[8][28][7]
DRP[64] bit 15	MAIN[8][29][7]
DRP[65] bit 0	MAIN[8][28][8]
DRP[65] bit 1	MAIN[8][29][8]
DRP[65] bit 2	MAIN[8][28][9]
DRP[65] bit 3	MAIN[8][29][9]
DRP[65] bit 4	MAIN[8][28][10]
DRP[65] bit 5	MAIN[8][29][10]
DRP[65] bit 6	MAIN[8][28][11]
DRP[65] bit 7	MAIN[8][29][11]
DRP[65] bit 8	MAIN[8][28][12]
DRP[65] bit 9	MAIN[8][29][12]
DRP[65] bit 10	MAIN[8][28][13]
DRP[65] bit 11	MAIN[8][29][13]
DRP[65] bit 12	MAIN[8][28][14]
DRP[65] bit 13	MAIN[8][29][14]
DRP[65] bit 14	MAIN[8][28][15]
DRP[65] bit 15	MAIN[8][29][15]
DRP[66] bit 0	MAIN[8][28][16]
DRP[66] bit 1	MAIN[8][29][16]
DRP[66] bit 2	MAIN[8][28][17]
DRP[66] bit 3	MAIN[8][29][17]
DRP[66] bit 4	MAIN[8][28][18]
DRP[66] bit 5	MAIN[8][29][18]
DRP[66] bit 6	MAIN[8][28][19]
DRP[66] bit 7	MAIN[8][29][19]
DRP[66] bit 8	MAIN[8][28][20]
DRP[66] bit 9	MAIN[8][29][20]
DRP[66] bit 10	MAIN[8][28][21]
DRP[66] bit 11	MAIN[8][29][21]
DRP[66] bit 12	MAIN[8][28][22]
DRP[66] bit 13	MAIN[8][29][22]
DRP[66] bit 14	MAIN[8][28][23]
DRP[66] bit 15	MAIN[8][29][23]
DRP[67] bit 0	MAIN[8][28][24]
DRP[67] bit 1	MAIN[8][29][24]
DRP[67] bit 2	MAIN[8][28][25]
DRP[67] bit 3	MAIN[8][29][25]
DRP[67] bit 4	MAIN[8][28][26]
DRP[67] bit 5	MAIN[8][29][26]
DRP[67] bit 6	MAIN[8][28][27]
DRP[67] bit 7	MAIN[8][29][27]
DRP[67] bit 8	MAIN[8][28][28]
DRP[67] bit 9	MAIN[8][29][28]
DRP[67] bit 10	MAIN[8][28][29]
DRP[67] bit 11	MAIN[8][29][29]
DRP[67] bit 12	MAIN[8][28][30]
DRP[67] bit 13	MAIN[8][29][30]
DRP[67] bit 14	MAIN[8][28][31]
DRP[67] bit 15	MAIN[8][29][31]
DRP[68] bit 0	MAIN[8][28][32]
DRP[68] bit 1	MAIN[8][29][32]
DRP[68] bit 2	MAIN[8][28][33]
DRP[68] bit 3	MAIN[8][29][33]
DRP[68] bit 4	MAIN[8][28][34]
DRP[68] bit 5	MAIN[8][29][34]
DRP[68] bit 6	MAIN[8][28][35]
DRP[68] bit 7	MAIN[8][29][35]
DRP[68] bit 8	MAIN[8][28][36]
DRP[68] bit 9	MAIN[8][29][36]
DRP[68] bit 10	MAIN[8][28][37]
DRP[68] bit 11	MAIN[8][29][37]
DRP[68] bit 12	MAIN[8][28][38]
DRP[68] bit 13	MAIN[8][29][38]
DRP[68] bit 14	MAIN[8][28][39]
DRP[68] bit 15	MAIN[8][29][39]
DRP[69] bit 0	MAIN[8][28][40]
DRP[69] bit 1	MAIN[8][29][40]
DRP[69] bit 2	MAIN[8][28][41]
DRP[69] bit 3	MAIN[8][29][41]
DRP[69] bit 4	MAIN[8][28][42]
DRP[69] bit 5	MAIN[8][29][42]
DRP[69] bit 6	MAIN[8][28][43]
DRP[69] bit 7	MAIN[8][29][43]
DRP[69] bit 8	MAIN[8][28][44]
DRP[69] bit 9	MAIN[8][29][44]
DRP[69] bit 10	MAIN[8][28][45]
DRP[69] bit 11	MAIN[8][29][45]
DRP[69] bit 12	MAIN[8][28][46]
DRP[69] bit 13	MAIN[8][29][46]
DRP[69] bit 14	MAIN[8][28][47]
DRP[69] bit 15	MAIN[8][29][47]
DRP[70] bit 0	MAIN[8][28][48]
DRP[70] bit 1	MAIN[8][29][48]
DRP[70] bit 2	MAIN[8][28][49]
DRP[70] bit 3	MAIN[8][29][49]
DRP[70] bit 4	MAIN[8][28][50]
DRP[70] bit 5	MAIN[8][29][50]
DRP[70] bit 6	MAIN[8][28][51]
DRP[70] bit 7	MAIN[8][29][51]
DRP[70] bit 8	MAIN[8][28][52]
DRP[70] bit 9	MAIN[8][29][52]
DRP[70] bit 10	MAIN[8][28][53]
DRP[70] bit 11	MAIN[8][29][53]
DRP[70] bit 12	MAIN[8][28][54]
DRP[70] bit 13	MAIN[8][29][54]
DRP[70] bit 14	MAIN[8][28][55]
DRP[70] bit 15	MAIN[8][29][55]
DRP[71] bit 0	MAIN[8][28][56]
DRP[71] bit 1	MAIN[8][29][56]
DRP[71] bit 2	MAIN[8][28][57]
DRP[71] bit 3	MAIN[8][29][57]
DRP[71] bit 4	MAIN[8][28][58]
DRP[71] bit 5	MAIN[8][29][58]
DRP[71] bit 6	MAIN[8][28][59]
DRP[71] bit 7	MAIN[8][29][59]
DRP[71] bit 8	MAIN[8][28][60]
DRP[71] bit 9	MAIN[8][29][60]
DRP[71] bit 10	MAIN[8][28][61]
DRP[71] bit 11	MAIN[8][29][61]
DRP[71] bit 12	MAIN[8][28][62]
DRP[71] bit 13	MAIN[8][29][62]
DRP[71] bit 14	MAIN[8][28][63]
DRP[71] bit 15	MAIN[8][29][63]
DRP[72] bit 0	MAIN[9][28][0]
DRP[72] bit 1	MAIN[9][29][0]
DRP[72] bit 2	MAIN[9][28][1]
DRP[72] bit 3	MAIN[9][29][1]
DRP[72] bit 4	MAIN[9][28][2]
DRP[72] bit 5	MAIN[9][29][2]
DRP[72] bit 6	MAIN[9][28][3]
DRP[72] bit 7	MAIN[9][29][3]
DRP[72] bit 8	MAIN[9][28][4]
DRP[72] bit 9	MAIN[9][29][4]
DRP[72] bit 10	MAIN[9][28][5]
DRP[72] bit 11	MAIN[9][29][5]
DRP[72] bit 12	MAIN[9][28][6]
DRP[72] bit 13	MAIN[9][29][6]
DRP[72] bit 14	MAIN[9][28][7]
DRP[72] bit 15	MAIN[9][29][7]
DRP[73] bit 0	MAIN[9][28][8]
DRP[73] bit 1	MAIN[9][29][8]
DRP[73] bit 2	MAIN[9][28][9]
DRP[73] bit 3	MAIN[9][29][9]
DRP[73] bit 4	MAIN[9][28][10]
DRP[73] bit 5	MAIN[9][29][10]
DRP[73] bit 6	MAIN[9][28][11]
DRP[73] bit 7	MAIN[9][29][11]
DRP[73] bit 8	MAIN[9][28][12]
DRP[73] bit 9	MAIN[9][29][12]
DRP[73] bit 10	MAIN[9][28][13]
DRP[73] bit 11	MAIN[9][29][13]
DRP[73] bit 12	MAIN[9][28][14]
DRP[73] bit 13	MAIN[9][29][14]
DRP[73] bit 14	MAIN[9][28][15]
DRP[73] bit 15	MAIN[9][29][15]
DRP[74] bit 0	MAIN[9][28][16]
DRP[74] bit 1	MAIN[9][29][16]
DRP[74] bit 2	MAIN[9][28][17]
DRP[74] bit 3	MAIN[9][29][17]
DRP[74] bit 4	MAIN[9][28][18]
DRP[74] bit 5	MAIN[9][29][18]
DRP[74] bit 6	MAIN[9][28][19]
DRP[74] bit 7	MAIN[9][29][19]
DRP[74] bit 8	MAIN[9][28][20]
DRP[74] bit 9	MAIN[9][29][20]
DRP[74] bit 10	MAIN[9][28][21]
DRP[74] bit 11	MAIN[9][29][21]
DRP[74] bit 12	MAIN[9][28][22]
DRP[74] bit 13	MAIN[9][29][22]
DRP[74] bit 14	MAIN[9][28][23]
DRP[74] bit 15	MAIN[9][29][23]
DRP[75] bit 0	MAIN[9][28][24]
DRP[75] bit 1	MAIN[9][29][24]
DRP[75] bit 2	MAIN[9][28][25]
DRP[75] bit 3	MAIN[9][29][25]
DRP[75] bit 4	MAIN[9][28][26]
DRP[75] bit 5	MAIN[9][29][26]
DRP[75] bit 6	MAIN[9][28][27]
DRP[75] bit 7	MAIN[9][29][27]
DRP[75] bit 8	MAIN[9][28][28]
DRP[75] bit 9	MAIN[9][29][28]
DRP[75] bit 10	MAIN[9][28][29]
DRP[75] bit 11	MAIN[9][29][29]
DRP[75] bit 12	MAIN[9][28][30]
DRP[75] bit 13	MAIN[9][29][30]
DRP[75] bit 14	MAIN[9][28][31]
DRP[75] bit 15	MAIN[9][29][31]
DRP[76] bit 0	MAIN[9][28][32]
DRP[76] bit 1	MAIN[9][29][32]
DRP[76] bit 2	MAIN[9][28][33]
DRP[76] bit 3	MAIN[9][29][33]
DRP[76] bit 4	MAIN[9][28][34]
DRP[76] bit 5	MAIN[9][29][34]
DRP[76] bit 6	MAIN[9][28][35]
DRP[76] bit 7	MAIN[9][29][35]
DRP[76] bit 8	MAIN[9][28][36]
DRP[76] bit 9	MAIN[9][29][36]
DRP[76] bit 10	MAIN[9][28][37]
DRP[76] bit 11	MAIN[9][29][37]
DRP[76] bit 12	MAIN[9][28][38]
DRP[76] bit 13	MAIN[9][29][38]
DRP[76] bit 14	MAIN[9][28][39]
DRP[76] bit 15	MAIN[9][29][39]
DRP[77] bit 0	MAIN[9][28][40]
DRP[77] bit 1	MAIN[9][29][40]
DRP[77] bit 2	MAIN[9][28][41]
DRP[77] bit 3	MAIN[9][29][41]
DRP[77] bit 4	MAIN[9][28][42]
DRP[77] bit 5	MAIN[9][29][42]
DRP[77] bit 6	MAIN[9][28][43]
DRP[77] bit 7	MAIN[9][29][43]
DRP[77] bit 8	MAIN[9][28][44]
DRP[77] bit 9	MAIN[9][29][44]
DRP[77] bit 10	MAIN[9][28][45]
DRP[77] bit 11	MAIN[9][29][45]
DRP[77] bit 12	MAIN[9][28][46]
DRP[77] bit 13	MAIN[9][29][46]
DRP[77] bit 14	MAIN[9][28][47]
DRP[77] bit 15	MAIN[9][29][47]
DRP[78] bit 0	MAIN[9][28][48]
DRP[78] bit 1	MAIN[9][29][48]
DRP[78] bit 2	MAIN[9][28][49]
DRP[78] bit 3	MAIN[9][29][49]
DRP[78] bit 4	MAIN[9][28][50]
DRP[78] bit 5	MAIN[9][29][50]
DRP[78] bit 6	MAIN[9][28][51]
DRP[78] bit 7	MAIN[9][29][51]
DRP[78] bit 8	MAIN[9][28][52]
DRP[78] bit 9	MAIN[9][29][52]
DRP[78] bit 10	MAIN[9][28][53]
DRP[78] bit 11	MAIN[9][29][53]
DRP[78] bit 12	MAIN[9][28][54]
DRP[78] bit 13	MAIN[9][29][54]
DRP[78] bit 14	MAIN[9][28][55]
DRP[78] bit 15	MAIN[9][29][55]
DRP[79] bit 0	MAIN[9][28][56]
DRP[79] bit 1	MAIN[9][29][56]
DRP[79] bit 2	MAIN[9][28][57]
DRP[79] bit 3	MAIN[9][29][57]
DRP[79] bit 4	MAIN[9][28][58]
DRP[79] bit 5	MAIN[9][29][58]
DRP[79] bit 6	MAIN[9][28][59]
DRP[79] bit 7	MAIN[9][29][59]
DRP[79] bit 8	MAIN[9][28][60]
DRP[79] bit 9	MAIN[9][29][60]
DRP[79] bit 10	MAIN[9][28][61]
DRP[79] bit 11	MAIN[9][29][61]
DRP[79] bit 12	MAIN[9][28][62]
DRP[79] bit 13	MAIN[9][29][62]
DRP[79] bit 14	MAIN[9][28][63]
DRP[79] bit 15	MAIN[9][29][63]
DRP[80] bit 0	MAIN[10][28][0]
DRP[80] bit 1	MAIN[10][29][0]
DRP[80] bit 2	MAIN[10][28][1]
DRP[80] bit 3	MAIN[10][29][1]
DRP[80] bit 4	MAIN[10][28][2]
DRP[80] bit 5	MAIN[10][29][2]
DRP[80] bit 6	MAIN[10][28][3]
DRP[80] bit 7	MAIN[10][29][3]
DRP[80] bit 8	MAIN[10][28][4]
DRP[80] bit 9	MAIN[10][29][4]
DRP[80] bit 10	MAIN[10][28][5]
DRP[80] bit 11	MAIN[10][29][5]
DRP[80] bit 12	MAIN[10][28][6]
DRP[80] bit 13	MAIN[10][29][6]
DRP[80] bit 14	MAIN[10][28][7]
DRP[80] bit 15	MAIN[10][29][7]
DRP[81] bit 0	MAIN[10][28][8]
DRP[81] bit 1	MAIN[10][29][8]
DRP[81] bit 2	MAIN[10][28][9]
DRP[81] bit 3	MAIN[10][29][9]
DRP[81] bit 4	MAIN[10][28][10]
DRP[81] bit 5	MAIN[10][29][10]
DRP[81] bit 6	MAIN[10][28][11]
DRP[81] bit 7	MAIN[10][29][11]
DRP[81] bit 8	MAIN[10][28][12]
DRP[81] bit 9	MAIN[10][29][12]
DRP[81] bit 10	MAIN[10][28][13]
DRP[81] bit 11	MAIN[10][29][13]
DRP[81] bit 12	MAIN[10][28][14]
DRP[81] bit 13	MAIN[10][29][14]
DRP[81] bit 14	MAIN[10][28][15]
DRP[81] bit 15	MAIN[10][29][15]
DRP[82] bit 0	MAIN[10][28][16]
DRP[82] bit 1	MAIN[10][29][16]
DRP[82] bit 2	MAIN[10][28][17]
DRP[82] bit 3	MAIN[10][29][17]
DRP[82] bit 4	MAIN[10][28][18]
DRP[82] bit 5	MAIN[10][29][18]
DRP[82] bit 6	MAIN[10][28][19]
DRP[82] bit 7	MAIN[10][29][19]
DRP[82] bit 8	MAIN[10][28][20]
DRP[82] bit 9	MAIN[10][29][20]
DRP[82] bit 10	MAIN[10][28][21]
DRP[82] bit 11	MAIN[10][29][21]
DRP[82] bit 12	MAIN[10][28][22]
DRP[82] bit 13	MAIN[10][29][22]
DRP[82] bit 14	MAIN[10][28][23]
DRP[82] bit 15	MAIN[10][29][23]
DRP[83] bit 0	MAIN[10][28][24]
DRP[83] bit 1	MAIN[10][29][24]
DRP[83] bit 2	MAIN[10][28][25]
DRP[83] bit 3	MAIN[10][29][25]
DRP[83] bit 4	MAIN[10][28][26]
DRP[83] bit 5	MAIN[10][29][26]
DRP[83] bit 6	MAIN[10][28][27]
DRP[83] bit 7	MAIN[10][29][27]
DRP[83] bit 8	MAIN[10][28][28]
DRP[83] bit 9	MAIN[10][29][28]
DRP[83] bit 10	MAIN[10][28][29]
DRP[83] bit 11	MAIN[10][29][29]
DRP[83] bit 12	MAIN[10][28][30]
DRP[83] bit 13	MAIN[10][29][30]
DRP[83] bit 14	MAIN[10][28][31]
DRP[83] bit 15	MAIN[10][29][31]
DRP[84] bit 0	MAIN[10][28][32]
DRP[84] bit 1	MAIN[10][29][32]
DRP[84] bit 2	MAIN[10][28][33]
DRP[84] bit 3	MAIN[10][29][33]
DRP[84] bit 4	MAIN[10][28][34]
DRP[84] bit 5	MAIN[10][29][34]
DRP[84] bit 6	MAIN[10][28][35]
DRP[84] bit 7	MAIN[10][29][35]
DRP[84] bit 8	MAIN[10][28][36]
DRP[84] bit 9	MAIN[10][29][36]
DRP[84] bit 10	MAIN[10][28][37]
DRP[84] bit 11	MAIN[10][29][37]
DRP[84] bit 12	MAIN[10][28][38]
DRP[84] bit 13	MAIN[10][29][38]
DRP[84] bit 14	MAIN[10][28][39]
DRP[84] bit 15	MAIN[10][29][39]
DRP[85] bit 0	MAIN[10][28][40]
DRP[85] bit 1	MAIN[10][29][40]
DRP[85] bit 2	MAIN[10][28][41]
DRP[85] bit 3	MAIN[10][29][41]
DRP[85] bit 4	MAIN[10][28][42]
DRP[85] bit 5	MAIN[10][29][42]
DRP[85] bit 6	MAIN[10][28][43]
DRP[85] bit 7	MAIN[10][29][43]
DRP[85] bit 8	MAIN[10][28][44]
DRP[85] bit 9	MAIN[10][29][44]
DRP[85] bit 10	MAIN[10][28][45]
DRP[85] bit 11	MAIN[10][29][45]
DRP[85] bit 12	MAIN[10][28][46]
DRP[85] bit 13	MAIN[10][29][46]
DRP[85] bit 14	MAIN[10][28][47]
DRP[85] bit 15	MAIN[10][29][47]
DRP[86] bit 0	MAIN[10][28][48]
DRP[86] bit 1	MAIN[10][29][48]
DRP[86] bit 2	MAIN[10][28][49]
DRP[86] bit 3	MAIN[10][29][49]
DRP[86] bit 4	MAIN[10][28][50]
DRP[86] bit 5	MAIN[10][29][50]
DRP[86] bit 6	MAIN[10][28][51]
DRP[86] bit 7	MAIN[10][29][51]
DRP[86] bit 8	MAIN[10][28][52]
DRP[86] bit 9	MAIN[10][29][52]
DRP[86] bit 10	MAIN[10][28][53]
DRP[86] bit 11	MAIN[10][29][53]
DRP[86] bit 12	MAIN[10][28][54]
DRP[86] bit 13	MAIN[10][29][54]
DRP[86] bit 14	MAIN[10][28][55]
DRP[86] bit 15	MAIN[10][29][55]
DRP[87] bit 0	MAIN[10][28][56]
DRP[87] bit 1	MAIN[10][29][56]
DRP[87] bit 2	MAIN[10][28][57]
DRP[87] bit 3	MAIN[10][29][57]
DRP[87] bit 4	MAIN[10][28][58]
DRP[87] bit 5	MAIN[10][29][58]
DRP[87] bit 6	MAIN[10][28][59]
DRP[87] bit 7	MAIN[10][29][59]
DRP[87] bit 8	MAIN[10][28][60]
DRP[87] bit 9	MAIN[10][29][60]
DRP[87] bit 10	MAIN[10][28][61]
DRP[87] bit 11	MAIN[10][29][61]
DRP[87] bit 12	MAIN[10][28][62]
DRP[87] bit 13	MAIN[10][29][62]
DRP[87] bit 14	MAIN[10][28][63]
DRP[87] bit 15	MAIN[10][29][63]
DRP[88] bit 0	MAIN[11][28][0]
DRP[88] bit 1	MAIN[11][29][0]
DRP[88] bit 2	MAIN[11][28][1]
DRP[88] bit 3	MAIN[11][29][1]
DRP[88] bit 4	MAIN[11][28][2]
DRP[88] bit 5	MAIN[11][29][2]
DRP[88] bit 6	MAIN[11][28][3]
DRP[88] bit 7	MAIN[11][29][3]
DRP[88] bit 8	MAIN[11][28][4]
DRP[88] bit 9	MAIN[11][29][4]
DRP[88] bit 10	MAIN[11][28][5]
DRP[88] bit 11	MAIN[11][29][5]
DRP[88] bit 12	MAIN[11][28][6]
DRP[88] bit 13	MAIN[11][29][6]
DRP[88] bit 14	MAIN[11][28][7]
DRP[88] bit 15	MAIN[11][29][7]
DRP[89] bit 0	MAIN[11][28][8]
DRP[89] bit 1	MAIN[11][29][8]
DRP[89] bit 2	MAIN[11][28][9]
DRP[89] bit 3	MAIN[11][29][9]
DRP[89] bit 4	MAIN[11][28][10]
DRP[89] bit 5	MAIN[11][29][10]
DRP[89] bit 6	MAIN[11][28][11]
DRP[89] bit 7	MAIN[11][29][11]
DRP[89] bit 8	MAIN[11][28][12]
DRP[89] bit 9	MAIN[11][29][12]
DRP[89] bit 10	MAIN[11][28][13]
DRP[89] bit 11	MAIN[11][29][13]
DRP[89] bit 12	MAIN[11][28][14]
DRP[89] bit 13	MAIN[11][29][14]
DRP[89] bit 14	MAIN[11][28][15]
DRP[89] bit 15	MAIN[11][29][15]
DRP[90] bit 0	MAIN[11][28][16]
DRP[90] bit 1	MAIN[11][29][16]
DRP[90] bit 2	MAIN[11][28][17]
DRP[90] bit 3	MAIN[11][29][17]
DRP[90] bit 4	MAIN[11][28][18]
DRP[90] bit 5	MAIN[11][29][18]
DRP[90] bit 6	MAIN[11][28][19]
DRP[90] bit 7	MAIN[11][29][19]
DRP[90] bit 8	MAIN[11][28][20]
DRP[90] bit 9	MAIN[11][29][20]
DRP[90] bit 10	MAIN[11][28][21]
DRP[90] bit 11	MAIN[11][29][21]
DRP[90] bit 12	MAIN[11][28][22]
DRP[90] bit 13	MAIN[11][29][22]
DRP[90] bit 14	MAIN[11][28][23]
DRP[90] bit 15	MAIN[11][29][23]
DRP[91] bit 0	MAIN[11][28][24]
DRP[91] bit 1	MAIN[11][29][24]
DRP[91] bit 2	MAIN[11][28][25]
DRP[91] bit 3	MAIN[11][29][25]
DRP[91] bit 4	MAIN[11][28][26]
DRP[91] bit 5	MAIN[11][29][26]
DRP[91] bit 6	MAIN[11][28][27]
DRP[91] bit 7	MAIN[11][29][27]
DRP[91] bit 8	MAIN[11][28][28]
DRP[91] bit 9	MAIN[11][29][28]
DRP[91] bit 10	MAIN[11][28][29]
DRP[91] bit 11	MAIN[11][29][29]
DRP[91] bit 12	MAIN[11][28][30]
DRP[91] bit 13	MAIN[11][29][30]
DRP[91] bit 14	MAIN[11][28][31]
DRP[91] bit 15	MAIN[11][29][31]
DRP[92] bit 0	MAIN[11][28][32]
DRP[92] bit 1	MAIN[11][29][32]
DRP[92] bit 2	MAIN[11][28][33]
DRP[92] bit 3	MAIN[11][29][33]
DRP[92] bit 4	MAIN[11][28][34]
DRP[92] bit 5	MAIN[11][29][34]
DRP[92] bit 6	MAIN[11][28][35]
DRP[92] bit 7	MAIN[11][29][35]
DRP[92] bit 8	MAIN[11][28][36]
DRP[92] bit 9	MAIN[11][29][36]
DRP[92] bit 10	MAIN[11][28][37]
DRP[92] bit 11	MAIN[11][29][37]
DRP[92] bit 12	MAIN[11][28][38]
DRP[92] bit 13	MAIN[11][29][38]
DRP[92] bit 14	MAIN[11][28][39]
DRP[92] bit 15	MAIN[11][29][39]
DRP[93] bit 0	MAIN[11][28][40]
DRP[93] bit 1	MAIN[11][29][40]
DRP[93] bit 2	MAIN[11][28][41]
DRP[93] bit 3	MAIN[11][29][41]
DRP[93] bit 4	MAIN[11][28][42]
DRP[93] bit 5	MAIN[11][29][42]
DRP[93] bit 6	MAIN[11][28][43]
DRP[93] bit 7	MAIN[11][29][43]
DRP[93] bit 8	MAIN[11][28][44]
DRP[93] bit 9	MAIN[11][29][44]
DRP[93] bit 10	MAIN[11][28][45]
DRP[93] bit 11	MAIN[11][29][45]
DRP[93] bit 12	MAIN[11][28][46]
DRP[93] bit 13	MAIN[11][29][46]
DRP[93] bit 14	MAIN[11][28][47]
DRP[93] bit 15	MAIN[11][29][47]
DRP[94] bit 0	MAIN[11][28][48]
DRP[94] bit 1	MAIN[11][29][48]
DRP[94] bit 2	MAIN[11][28][49]
DRP[94] bit 3	MAIN[11][29][49]
DRP[94] bit 4	MAIN[11][28][50]
DRP[94] bit 5	MAIN[11][29][50]
DRP[94] bit 6	MAIN[11][28][51]
DRP[94] bit 7	MAIN[11][29][51]
DRP[94] bit 8	MAIN[11][28][52]
DRP[94] bit 9	MAIN[11][29][52]
DRP[94] bit 10	MAIN[11][28][53]
DRP[94] bit 11	MAIN[11][29][53]
DRP[94] bit 12	MAIN[11][28][54]
DRP[94] bit 13	MAIN[11][29][54]
DRP[94] bit 14	MAIN[11][28][55]
DRP[94] bit 15	MAIN[11][29][55]
DRP[95] bit 0	MAIN[11][28][56]
DRP[95] bit 1	MAIN[11][29][56]
DRP[95] bit 2	MAIN[11][28][57]
DRP[95] bit 3	MAIN[11][29][57]
DRP[95] bit 4	MAIN[11][28][58]
DRP[95] bit 5	MAIN[11][29][58]
DRP[95] bit 6	MAIN[11][28][59]
DRP[95] bit 7	MAIN[11][29][59]
DRP[95] bit 8	MAIN[11][28][60]
DRP[95] bit 9	MAIN[11][29][60]
DRP[95] bit 10	MAIN[11][28][61]
DRP[95] bit 11	MAIN[11][29][61]
DRP[95] bit 12	MAIN[11][28][62]
DRP[95] bit 13	MAIN[11][29][62]
DRP[95] bit 14	MAIN[11][28][63]
DRP[95] bit 15	MAIN[11][29][63]
DRP[96] bit 0	MAIN[12][28][0]
DRP[96] bit 1	MAIN[12][29][0]
DRP[96] bit 2	MAIN[12][28][1]
DRP[96] bit 3	MAIN[12][29][1]
DRP[96] bit 4	MAIN[12][28][2]
DRP[96] bit 5	MAIN[12][29][2]
DRP[96] bit 6	MAIN[12][28][3]
DRP[96] bit 7	MAIN[12][29][3]
DRP[96] bit 8	MAIN[12][28][4]
DRP[96] bit 9	MAIN[12][29][4]
DRP[96] bit 10	MAIN[12][28][5]
DRP[96] bit 11	MAIN[12][29][5]
DRP[96] bit 12	MAIN[12][28][6]
DRP[96] bit 13	MAIN[12][29][6]
DRP[96] bit 14	MAIN[12][28][7]
DRP[96] bit 15	MAIN[12][29][7]
DRP[97] bit 0	MAIN[12][28][8]
DRP[97] bit 1	MAIN[12][29][8]
DRP[97] bit 2	MAIN[12][28][9]
DRP[97] bit 3	MAIN[12][29][9]
DRP[97] bit 4	MAIN[12][28][10]
DRP[97] bit 5	MAIN[12][29][10]
DRP[97] bit 6	MAIN[12][28][11]
DRP[97] bit 7	MAIN[12][29][11]
DRP[97] bit 8	MAIN[12][28][12]
DRP[97] bit 9	MAIN[12][29][12]
DRP[97] bit 10	MAIN[12][28][13]
DRP[97] bit 11	MAIN[12][29][13]
DRP[97] bit 12	MAIN[12][28][14]
DRP[97] bit 13	MAIN[12][29][14]
DRP[97] bit 14	MAIN[12][28][15]
DRP[97] bit 15	MAIN[12][29][15]
DRP[98] bit 0	MAIN[12][28][16]
DRP[98] bit 1	MAIN[12][29][16]
DRP[98] bit 2	MAIN[12][28][17]
DRP[98] bit 3	MAIN[12][29][17]
DRP[98] bit 4	MAIN[12][28][18]
DRP[98] bit 5	MAIN[12][29][18]
DRP[98] bit 6	MAIN[12][28][19]
DRP[98] bit 7	MAIN[12][29][19]
DRP[98] bit 8	MAIN[12][28][20]
DRP[98] bit 9	MAIN[12][29][20]
DRP[98] bit 10	MAIN[12][28][21]
DRP[98] bit 11	MAIN[12][29][21]
DRP[98] bit 12	MAIN[12][28][22]
DRP[98] bit 13	MAIN[12][29][22]
DRP[98] bit 14	MAIN[12][28][23]
DRP[98] bit 15	MAIN[12][29][23]
DRP[99] bit 0	MAIN[12][28][24]
DRP[99] bit 1	MAIN[12][29][24]
DRP[99] bit 2	MAIN[12][28][25]
DRP[99] bit 3	MAIN[12][29][25]
DRP[99] bit 4	MAIN[12][28][26]
DRP[99] bit 5	MAIN[12][29][26]
DRP[99] bit 6	MAIN[12][28][27]
DRP[99] bit 7	MAIN[12][29][27]
DRP[99] bit 8	MAIN[12][28][28]
DRP[99] bit 9	MAIN[12][29][28]
DRP[99] bit 10	MAIN[12][28][29]
DRP[99] bit 11	MAIN[12][29][29]
DRP[99] bit 12	MAIN[12][28][30]
DRP[99] bit 13	MAIN[12][29][30]
DRP[99] bit 14	MAIN[12][28][31]
DRP[99] bit 15	MAIN[12][29][31]
DRP[100] bit 0	MAIN[12][28][32]
DRP[100] bit 1	MAIN[12][29][32]
DRP[100] bit 2	MAIN[12][28][33]
DRP[100] bit 3	MAIN[12][29][33]
DRP[100] bit 4	MAIN[12][28][34]
DRP[100] bit 5	MAIN[12][29][34]
DRP[100] bit 6	MAIN[12][28][35]
DRP[100] bit 7	MAIN[12][29][35]
DRP[100] bit 8	MAIN[12][28][36]
DRP[100] bit 9	MAIN[12][29][36]
DRP[100] bit 10	MAIN[12][28][37]
DRP[100] bit 11	MAIN[12][29][37]
DRP[100] bit 12	MAIN[12][28][38]
DRP[100] bit 13	MAIN[12][29][38]
DRP[100] bit 14	MAIN[12][28][39]
DRP[100] bit 15	MAIN[12][29][39]
DRP[101] bit 0	MAIN[12][28][40]
DRP[101] bit 1	MAIN[12][29][40]
DRP[101] bit 2	MAIN[12][28][41]
DRP[101] bit 3	MAIN[12][29][41]
DRP[101] bit 4	MAIN[12][28][42]
DRP[101] bit 5	MAIN[12][29][42]
DRP[101] bit 6	MAIN[12][28][43]
DRP[101] bit 7	MAIN[12][29][43]
DRP[101] bit 8	MAIN[12][28][44]
DRP[101] bit 9	MAIN[12][29][44]
DRP[101] bit 10	MAIN[12][28][45]
DRP[101] bit 11	MAIN[12][29][45]
DRP[101] bit 12	MAIN[12][28][46]
DRP[101] bit 13	MAIN[12][29][46]
DRP[101] bit 14	MAIN[12][28][47]
DRP[101] bit 15	MAIN[12][29][47]
DRP[102] bit 0	MAIN[12][28][48]
DRP[102] bit 1	MAIN[12][29][48]
DRP[102] bit 2	MAIN[12][28][49]
DRP[102] bit 3	MAIN[12][29][49]
DRP[102] bit 4	MAIN[12][28][50]
DRP[102] bit 5	MAIN[12][29][50]
DRP[102] bit 6	MAIN[12][28][51]
DRP[102] bit 7	MAIN[12][29][51]
DRP[102] bit 8	MAIN[12][28][52]
DRP[102] bit 9	MAIN[12][29][52]
DRP[102] bit 10	MAIN[12][28][53]
DRP[102] bit 11	MAIN[12][29][53]
DRP[102] bit 12	MAIN[12][28][54]
DRP[102] bit 13	MAIN[12][29][54]
DRP[102] bit 14	MAIN[12][28][55]
DRP[102] bit 15	MAIN[12][29][55]
DRP[103] bit 0	MAIN[12][28][56]
DRP[103] bit 1	MAIN[12][29][56]
DRP[103] bit 2	MAIN[12][28][57]
DRP[103] bit 3	MAIN[12][29][57]
DRP[103] bit 4	MAIN[12][28][58]
DRP[103] bit 5	MAIN[12][29][58]
DRP[103] bit 6	MAIN[12][28][59]
DRP[103] bit 7	MAIN[12][29][59]
DRP[103] bit 8	MAIN[12][28][60]
DRP[103] bit 9	MAIN[12][29][60]
DRP[103] bit 10	MAIN[12][28][61]
DRP[103] bit 11	MAIN[12][29][61]
DRP[103] bit 12	MAIN[12][28][62]
DRP[103] bit 13	MAIN[12][29][62]
DRP[103] bit 14	MAIN[12][28][63]
DRP[103] bit 15	MAIN[12][29][63]
DRP[104] bit 0	MAIN[13][28][0]
DRP[104] bit 1	MAIN[13][29][0]
DRP[104] bit 2	MAIN[13][28][1]
DRP[104] bit 3	MAIN[13][29][1]
DRP[104] bit 4	MAIN[13][28][2]
DRP[104] bit 5	MAIN[13][29][2]
DRP[104] bit 6	MAIN[13][28][3]
DRP[104] bit 7	MAIN[13][29][3]
DRP[104] bit 8	MAIN[13][28][4]
DRP[104] bit 9	MAIN[13][29][4]
DRP[104] bit 10	MAIN[13][28][5]
DRP[104] bit 11	MAIN[13][29][5]
DRP[104] bit 12	MAIN[13][28][6]
DRP[104] bit 13	MAIN[13][29][6]
DRP[104] bit 14	MAIN[13][28][7]
DRP[104] bit 15	MAIN[13][29][7]
DRP[105] bit 0	MAIN[13][28][8]
DRP[105] bit 1	MAIN[13][29][8]
DRP[105] bit 2	MAIN[13][28][9]
DRP[105] bit 3	MAIN[13][29][9]
DRP[105] bit 4	MAIN[13][28][10]
DRP[105] bit 5	MAIN[13][29][10]
DRP[105] bit 6	MAIN[13][28][11]
DRP[105] bit 7	MAIN[13][29][11]
DRP[105] bit 8	MAIN[13][28][12]
DRP[105] bit 9	MAIN[13][29][12]
DRP[105] bit 10	MAIN[13][28][13]
DRP[105] bit 11	MAIN[13][29][13]
DRP[105] bit 12	MAIN[13][28][14]
DRP[105] bit 13	MAIN[13][29][14]
DRP[105] bit 14	MAIN[13][28][15]
DRP[105] bit 15	MAIN[13][29][15]
DRP[106] bit 0	MAIN[13][28][16]
DRP[106] bit 1	MAIN[13][29][16]
DRP[106] bit 2	MAIN[13][28][17]
DRP[106] bit 3	MAIN[13][29][17]
DRP[106] bit 4	MAIN[13][28][18]
DRP[106] bit 5	MAIN[13][29][18]
DRP[106] bit 6	MAIN[13][28][19]
DRP[106] bit 7	MAIN[13][29][19]
DRP[106] bit 8	MAIN[13][28][20]
DRP[106] bit 9	MAIN[13][29][20]
DRP[106] bit 10	MAIN[13][28][21]
DRP[106] bit 11	MAIN[13][29][21]
DRP[106] bit 12	MAIN[13][28][22]
DRP[106] bit 13	MAIN[13][29][22]
DRP[106] bit 14	MAIN[13][28][23]
DRP[106] bit 15	MAIN[13][29][23]
DRP[107] bit 0	MAIN[13][28][24]
DRP[107] bit 1	MAIN[13][29][24]
DRP[107] bit 2	MAIN[13][28][25]
DRP[107] bit 3	MAIN[13][29][25]
DRP[107] bit 4	MAIN[13][28][26]
DRP[107] bit 5	MAIN[13][29][26]
DRP[107] bit 6	MAIN[13][28][27]
DRP[107] bit 7	MAIN[13][29][27]
DRP[107] bit 8	MAIN[13][28][28]
DRP[107] bit 9	MAIN[13][29][28]
DRP[107] bit 10	MAIN[13][28][29]
DRP[107] bit 11	MAIN[13][29][29]
DRP[107] bit 12	MAIN[13][28][30]
DRP[107] bit 13	MAIN[13][29][30]
DRP[107] bit 14	MAIN[13][28][31]
DRP[107] bit 15	MAIN[13][29][31]
DRP[108] bit 0	MAIN[13][28][32]
DRP[108] bit 1	MAIN[13][29][32]
DRP[108] bit 2	MAIN[13][28][33]
DRP[108] bit 3	MAIN[13][29][33]
DRP[108] bit 4	MAIN[13][28][34]
DRP[108] bit 5	MAIN[13][29][34]
DRP[108] bit 6	MAIN[13][28][35]
DRP[108] bit 7	MAIN[13][29][35]
DRP[108] bit 8	MAIN[13][28][36]
DRP[108] bit 9	MAIN[13][29][36]
DRP[108] bit 10	MAIN[13][28][37]
DRP[108] bit 11	MAIN[13][29][37]
DRP[108] bit 12	MAIN[13][28][38]
DRP[108] bit 13	MAIN[13][29][38]
DRP[108] bit 14	MAIN[13][28][39]
DRP[108] bit 15	MAIN[13][29][39]
DRP[109] bit 0	MAIN[13][28][40]
DRP[109] bit 1	MAIN[13][29][40]
DRP[109] bit 2	MAIN[13][28][41]
DRP[109] bit 3	MAIN[13][29][41]
DRP[109] bit 4	MAIN[13][28][42]
DRP[109] bit 5	MAIN[13][29][42]
DRP[109] bit 6	MAIN[13][28][43]
DRP[109] bit 7	MAIN[13][29][43]
DRP[109] bit 8	MAIN[13][28][44]
DRP[109] bit 9	MAIN[13][29][44]
DRP[109] bit 10	MAIN[13][28][45]
DRP[109] bit 11	MAIN[13][29][45]
DRP[109] bit 12	MAIN[13][28][46]
DRP[109] bit 13	MAIN[13][29][46]
DRP[109] bit 14	MAIN[13][28][47]
DRP[109] bit 15	MAIN[13][29][47]
DRP[110] bit 0	MAIN[13][28][48]
DRP[110] bit 1	MAIN[13][29][48]
DRP[110] bit 2	MAIN[13][28][49]
DRP[110] bit 3	MAIN[13][29][49]
DRP[110] bit 4	MAIN[13][28][50]
DRP[110] bit 5	MAIN[13][29][50]
DRP[110] bit 6	MAIN[13][28][51]
DRP[110] bit 7	MAIN[13][29][51]
DRP[110] bit 8	MAIN[13][28][52]
DRP[110] bit 9	MAIN[13][29][52]
DRP[110] bit 10	MAIN[13][28][53]
DRP[110] bit 11	MAIN[13][29][53]
DRP[110] bit 12	MAIN[13][28][54]
DRP[110] bit 13	MAIN[13][29][54]
DRP[110] bit 14	MAIN[13][28][55]
DRP[110] bit 15	MAIN[13][29][55]
DRP[111] bit 0	MAIN[13][28][56]
DRP[111] bit 1	MAIN[13][29][56]
DRP[111] bit 2	MAIN[13][28][57]
DRP[111] bit 3	MAIN[13][29][57]
DRP[111] bit 4	MAIN[13][28][58]
DRP[111] bit 5	MAIN[13][29][58]
DRP[111] bit 6	MAIN[13][28][59]
DRP[111] bit 7	MAIN[13][29][59]
DRP[111] bit 8	MAIN[13][28][60]
DRP[111] bit 9	MAIN[13][29][60]
DRP[111] bit 10	MAIN[13][28][61]
DRP[111] bit 11	MAIN[13][29][61]
DRP[111] bit 12	MAIN[13][28][62]
DRP[111] bit 13	MAIN[13][29][62]
DRP[111] bit 14	MAIN[13][28][63]
DRP[111] bit 15	MAIN[13][29][63]
DRP[112] bit 0	MAIN[14][28][0]
DRP[112] bit 1	MAIN[14][29][0]
DRP[112] bit 2	MAIN[14][28][1]
DRP[112] bit 3	MAIN[14][29][1]
DRP[112] bit 4	MAIN[14][28][2]
DRP[112] bit 5	MAIN[14][29][2]
DRP[112] bit 6	MAIN[14][28][3]
DRP[112] bit 7	MAIN[14][29][3]
DRP[112] bit 8	MAIN[14][28][4]
DRP[112] bit 9	MAIN[14][29][4]
DRP[112] bit 10	MAIN[14][28][5]
DRP[112] bit 11	MAIN[14][29][5]
DRP[112] bit 12	MAIN[14][28][6]
DRP[112] bit 13	MAIN[14][29][6]
DRP[112] bit 14	MAIN[14][28][7]
DRP[112] bit 15	MAIN[14][29][7]
DRP[113] bit 0	MAIN[14][28][8]
DRP[113] bit 1	MAIN[14][29][8]
DRP[113] bit 2	MAIN[14][28][9]
DRP[113] bit 3	MAIN[14][29][9]
DRP[113] bit 4	MAIN[14][28][10]
DRP[113] bit 5	MAIN[14][29][10]
DRP[113] bit 6	MAIN[14][28][11]
DRP[113] bit 7	MAIN[14][29][11]
DRP[113] bit 8	MAIN[14][28][12]
DRP[113] bit 9	MAIN[14][29][12]
DRP[113] bit 10	MAIN[14][28][13]
DRP[113] bit 11	MAIN[14][29][13]
DRP[113] bit 12	MAIN[14][28][14]
DRP[113] bit 13	MAIN[14][29][14]
DRP[113] bit 14	MAIN[14][28][15]
DRP[113] bit 15	MAIN[14][29][15]
DRP[114] bit 0	MAIN[14][28][16]
DRP[114] bit 1	MAIN[14][29][16]
DRP[114] bit 2	MAIN[14][28][17]
DRP[114] bit 3	MAIN[14][29][17]
DRP[114] bit 4	MAIN[14][28][18]
DRP[114] bit 5	MAIN[14][29][18]
DRP[114] bit 6	MAIN[14][28][19]
DRP[114] bit 7	MAIN[14][29][19]
DRP[114] bit 8	MAIN[14][28][20]
DRP[114] bit 9	MAIN[14][29][20]
DRP[114] bit 10	MAIN[14][28][21]
DRP[114] bit 11	MAIN[14][29][21]
DRP[114] bit 12	MAIN[14][28][22]
DRP[114] bit 13	MAIN[14][29][22]
DRP[114] bit 14	MAIN[14][28][23]
DRP[114] bit 15	MAIN[14][29][23]
DRP[115] bit 0	MAIN[14][28][24]
DRP[115] bit 1	MAIN[14][29][24]
DRP[115] bit 2	MAIN[14][28][25]
DRP[115] bit 3	MAIN[14][29][25]
DRP[115] bit 4	MAIN[14][28][26]
DRP[115] bit 5	MAIN[14][29][26]
DRP[115] bit 6	MAIN[14][28][27]
DRP[115] bit 7	MAIN[14][29][27]
DRP[115] bit 8	MAIN[14][28][28]
DRP[115] bit 9	MAIN[14][29][28]
DRP[115] bit 10	MAIN[14][28][29]
DRP[115] bit 11	MAIN[14][29][29]
DRP[115] bit 12	MAIN[14][28][30]
DRP[115] bit 13	MAIN[14][29][30]
DRP[115] bit 14	MAIN[14][28][31]
DRP[115] bit 15	MAIN[14][29][31]
DRP[116] bit 0	MAIN[14][28][32]
DRP[116] bit 1	MAIN[14][29][32]
DRP[116] bit 2	MAIN[14][28][33]
DRP[116] bit 3	MAIN[14][29][33]
DRP[116] bit 4	MAIN[14][28][34]
DRP[116] bit 5	MAIN[14][29][34]
DRP[116] bit 6	MAIN[14][28][35]
DRP[116] bit 7	MAIN[14][29][35]
DRP[116] bit 8	MAIN[14][28][36]
DRP[116] bit 9	MAIN[14][29][36]
DRP[116] bit 10	MAIN[14][28][37]
DRP[116] bit 11	MAIN[14][29][37]
DRP[116] bit 12	MAIN[14][28][38]
DRP[116] bit 13	MAIN[14][29][38]
DRP[116] bit 14	MAIN[14][28][39]
DRP[116] bit 15	MAIN[14][29][39]
DRP[117] bit 0	MAIN[14][28][40]
DRP[117] bit 1	MAIN[14][29][40]
DRP[117] bit 2	MAIN[14][28][41]
DRP[117] bit 3	MAIN[14][29][41]
DRP[117] bit 4	MAIN[14][28][42]
DRP[117] bit 5	MAIN[14][29][42]
DRP[117] bit 6	MAIN[14][28][43]
DRP[117] bit 7	MAIN[14][29][43]
DRP[117] bit 8	MAIN[14][28][44]
DRP[117] bit 9	MAIN[14][29][44]
DRP[117] bit 10	MAIN[14][28][45]
DRP[117] bit 11	MAIN[14][29][45]
DRP[117] bit 12	MAIN[14][28][46]
DRP[117] bit 13	MAIN[14][29][46]
DRP[117] bit 14	MAIN[14][28][47]
DRP[117] bit 15	MAIN[14][29][47]
DRP[118] bit 0	MAIN[14][28][48]
DRP[118] bit 1	MAIN[14][29][48]
DRP[118] bit 2	MAIN[14][28][49]
DRP[118] bit 3	MAIN[14][29][49]
DRP[118] bit 4	MAIN[14][28][50]
DRP[118] bit 5	MAIN[14][29][50]
DRP[118] bit 6	MAIN[14][28][51]
DRP[118] bit 7	MAIN[14][29][51]
DRP[118] bit 8	MAIN[14][28][52]
DRP[118] bit 9	MAIN[14][29][52]
DRP[118] bit 10	MAIN[14][28][53]
DRP[118] bit 11	MAIN[14][29][53]
DRP[118] bit 12	MAIN[14][28][54]
DRP[118] bit 13	MAIN[14][29][54]
DRP[118] bit 14	MAIN[14][28][55]
DRP[118] bit 15	MAIN[14][29][55]
DRP[119] bit 0	MAIN[14][28][56]
DRP[119] bit 1	MAIN[14][29][56]
DRP[119] bit 2	MAIN[14][28][57]
DRP[119] bit 3	MAIN[14][29][57]
DRP[119] bit 4	MAIN[14][28][58]
DRP[119] bit 5	MAIN[14][29][58]
DRP[119] bit 6	MAIN[14][28][59]
DRP[119] bit 7	MAIN[14][29][59]
DRP[119] bit 8	MAIN[14][28][60]
DRP[119] bit 9	MAIN[14][29][60]
DRP[119] bit 10	MAIN[14][28][61]
DRP[119] bit 11	MAIN[14][29][61]
DRP[119] bit 12	MAIN[14][28][62]
DRP[119] bit 13	MAIN[14][29][62]
DRP[119] bit 14	MAIN[14][28][63]
DRP[119] bit 15	MAIN[14][29][63]
DRP[120] bit 0	MAIN[15][28][0]
DRP[120] bit 1	MAIN[15][29][0]
DRP[120] bit 2	MAIN[15][28][1]
DRP[120] bit 3	MAIN[15][29][1]
DRP[120] bit 4	MAIN[15][28][2]
DRP[120] bit 5	MAIN[15][29][2]
DRP[120] bit 6	MAIN[15][28][3]
DRP[120] bit 7	MAIN[15][29][3]
DRP[120] bit 8	MAIN[15][28][4]
DRP[120] bit 9	MAIN[15][29][4]
DRP[120] bit 10	MAIN[15][28][5]
DRP[120] bit 11	MAIN[15][29][5]
DRP[120] bit 12	MAIN[15][28][6]
DRP[120] bit 13	MAIN[15][29][6]
DRP[120] bit 14	MAIN[15][28][7]
DRP[120] bit 15	MAIN[15][29][7]
DRP[121] bit 0	MAIN[15][28][8]
DRP[121] bit 1	MAIN[15][29][8]
DRP[121] bit 2	MAIN[15][28][9]
DRP[121] bit 3	MAIN[15][29][9]
DRP[121] bit 4	MAIN[15][28][10]
DRP[121] bit 5	MAIN[15][29][10]
DRP[121] bit 6	MAIN[15][28][11]
DRP[121] bit 7	MAIN[15][29][11]
DRP[121] bit 8	MAIN[15][28][12]
DRP[121] bit 9	MAIN[15][29][12]
DRP[121] bit 10	MAIN[15][28][13]
DRP[121] bit 11	MAIN[15][29][13]
DRP[121] bit 12	MAIN[15][28][14]
DRP[121] bit 13	MAIN[15][29][14]
DRP[121] bit 14	MAIN[15][28][15]
DRP[121] bit 15	MAIN[15][29][15]
DRP[122] bit 0	MAIN[15][28][16]
DRP[122] bit 1	MAIN[15][29][16]
DRP[122] bit 2	MAIN[15][28][17]
DRP[122] bit 3	MAIN[15][29][17]
DRP[122] bit 4	MAIN[15][28][18]
DRP[122] bit 5	MAIN[15][29][18]
DRP[122] bit 6	MAIN[15][28][19]
DRP[122] bit 7	MAIN[15][29][19]
DRP[122] bit 8	MAIN[15][28][20]
DRP[122] bit 9	MAIN[15][29][20]
DRP[122] bit 10	MAIN[15][28][21]
DRP[122] bit 11	MAIN[15][29][21]
DRP[122] bit 12	MAIN[15][28][22]
DRP[122] bit 13	MAIN[15][29][22]
DRP[122] bit 14	MAIN[15][28][23]
DRP[122] bit 15	MAIN[15][29][23]
DRP[123] bit 0	MAIN[15][28][24]
DRP[123] bit 1	MAIN[15][29][24]
DRP[123] bit 2	MAIN[15][28][25]
DRP[123] bit 3	MAIN[15][29][25]
DRP[123] bit 4	MAIN[15][28][26]
DRP[123] bit 5	MAIN[15][29][26]
DRP[123] bit 6	MAIN[15][28][27]
DRP[123] bit 7	MAIN[15][29][27]
DRP[123] bit 8	MAIN[15][28][28]
DRP[123] bit 9	MAIN[15][29][28]
DRP[123] bit 10	MAIN[15][28][29]
DRP[123] bit 11	MAIN[15][29][29]
DRP[123] bit 12	MAIN[15][28][30]
DRP[123] bit 13	MAIN[15][29][30]
DRP[123] bit 14	MAIN[15][28][31]
DRP[123] bit 15	MAIN[15][29][31]
DRP[124] bit 0	MAIN[15][28][32]
DRP[124] bit 1	MAIN[15][29][32]
DRP[124] bit 2	MAIN[15][28][33]
DRP[124] bit 3	MAIN[15][29][33]
DRP[124] bit 4	MAIN[15][28][34]
DRP[124] bit 5	MAIN[15][29][34]
DRP[124] bit 6	MAIN[15][28][35]
DRP[124] bit 7	MAIN[15][29][35]
DRP[124] bit 8	MAIN[15][28][36]
DRP[124] bit 9	MAIN[15][29][36]
DRP[124] bit 10	MAIN[15][28][37]
DRP[124] bit 11	MAIN[15][29][37]
DRP[124] bit 12	MAIN[15][28][38]
DRP[124] bit 13	MAIN[15][29][38]
DRP[124] bit 14	MAIN[15][28][39]
DRP[124] bit 15	MAIN[15][29][39]
DRP[125] bit 0	MAIN[15][28][40]
DRP[125] bit 1	MAIN[15][29][40]
DRP[125] bit 2	MAIN[15][28][41]
DRP[125] bit 3	MAIN[15][29][41]
DRP[125] bit 4	MAIN[15][28][42]
DRP[125] bit 5	MAIN[15][29][42]
DRP[125] bit 6	MAIN[15][28][43]
DRP[125] bit 7	MAIN[15][29][43]
DRP[125] bit 8	MAIN[15][28][44]
DRP[125] bit 9	MAIN[15][29][44]
DRP[125] bit 10	MAIN[15][28][45]
DRP[125] bit 11	MAIN[15][29][45]
DRP[125] bit 12	MAIN[15][28][46]
DRP[125] bit 13	MAIN[15][29][46]
DRP[125] bit 14	MAIN[15][28][47]
DRP[125] bit 15	MAIN[15][29][47]
DRP[126] bit 0	MAIN[15][28][48]
DRP[126] bit 1	MAIN[15][29][48]
DRP[126] bit 2	MAIN[15][28][49]
DRP[126] bit 3	MAIN[15][29][49]
DRP[126] bit 4	MAIN[15][28][50]
DRP[126] bit 5	MAIN[15][29][50]
DRP[126] bit 6	MAIN[15][28][51]
DRP[126] bit 7	MAIN[15][29][51]
DRP[126] bit 8	MAIN[15][28][52]
DRP[126] bit 9	MAIN[15][29][52]
DRP[126] bit 10	MAIN[15][28][53]
DRP[126] bit 11	MAIN[15][29][53]
DRP[126] bit 12	MAIN[15][28][54]
DRP[126] bit 13	MAIN[15][29][54]
DRP[126] bit 14	MAIN[15][28][55]
DRP[126] bit 15	MAIN[15][29][55]
DRP[127] bit 0	MAIN[15][28][56]
DRP[127] bit 1	MAIN[15][29][56]
DRP[127] bit 2	MAIN[15][28][57]
DRP[127] bit 3	MAIN[15][29][57]
DRP[127] bit 4	MAIN[15][28][58]
DRP[127] bit 5	MAIN[15][29][58]
DRP[127] bit 6	MAIN[15][28][59]
DRP[127] bit 7	MAIN[15][29][59]
DRP[127] bit 8	MAIN[15][28][60]
DRP[127] bit 9	MAIN[15][29][60]
DRP[127] bit 10	MAIN[15][28][61]
DRP[127] bit 11	MAIN[15][29][61]
DRP[127] bit 12	MAIN[15][28][62]
DRP[127] bit 13	MAIN[15][29][62]
DRP[127] bit 14	MAIN[15][28][63]
DRP[127] bit 15	MAIN[15][29][63]
DRP[128] bit 0	MAIN[16][28][0]
DRP[128] bit 1	MAIN[16][29][0]
DRP[128] bit 2	MAIN[16][28][1]
DRP[128] bit 3	MAIN[16][29][1]
DRP[128] bit 4	MAIN[16][28][2]
DRP[128] bit 5	MAIN[16][29][2]
DRP[128] bit 6	MAIN[16][28][3]
DRP[128] bit 7	MAIN[16][29][3]
DRP[128] bit 8	MAIN[16][28][4]
DRP[128] bit 9	MAIN[16][29][4]
DRP[128] bit 10	MAIN[16][28][5]
DRP[128] bit 11	MAIN[16][29][5]
DRP[128] bit 12	MAIN[16][28][6]
DRP[128] bit 13	MAIN[16][29][6]
DRP[128] bit 14	MAIN[16][28][7]
DRP[128] bit 15	MAIN[16][29][7]
DRP[129] bit 0	MAIN[16][28][8]
DRP[129] bit 1	MAIN[16][29][8]
DRP[129] bit 2	MAIN[16][28][9]
DRP[129] bit 3	MAIN[16][29][9]
DRP[129] bit 4	MAIN[16][28][10]
DRP[129] bit 5	MAIN[16][29][10]
DRP[129] bit 6	MAIN[16][28][11]
DRP[129] bit 7	MAIN[16][29][11]
DRP[129] bit 8	MAIN[16][28][12]
DRP[129] bit 9	MAIN[16][29][12]
DRP[129] bit 10	MAIN[16][28][13]
DRP[129] bit 11	MAIN[16][29][13]
DRP[129] bit 12	MAIN[16][28][14]
DRP[129] bit 13	MAIN[16][29][14]
DRP[129] bit 14	MAIN[16][28][15]
DRP[129] bit 15	MAIN[16][29][15]
DRP[130] bit 0	MAIN[16][28][16]
DRP[130] bit 1	MAIN[16][29][16]
DRP[130] bit 2	MAIN[16][28][17]
DRP[130] bit 3	MAIN[16][29][17]
DRP[130] bit 4	MAIN[16][28][18]
DRP[130] bit 5	MAIN[16][29][18]
DRP[130] bit 6	MAIN[16][28][19]
DRP[130] bit 7	MAIN[16][29][19]
DRP[130] bit 8	MAIN[16][28][20]
DRP[130] bit 9	MAIN[16][29][20]
DRP[130] bit 10	MAIN[16][28][21]
DRP[130] bit 11	MAIN[16][29][21]
DRP[130] bit 12	MAIN[16][28][22]
DRP[130] bit 13	MAIN[16][29][22]
DRP[130] bit 14	MAIN[16][28][23]
DRP[130] bit 15	MAIN[16][29][23]
DRP[131] bit 0	MAIN[16][28][24]
DRP[131] bit 1	MAIN[16][29][24]
DRP[131] bit 2	MAIN[16][28][25]
DRP[131] bit 3	MAIN[16][29][25]
DRP[131] bit 4	MAIN[16][28][26]
DRP[131] bit 5	MAIN[16][29][26]
DRP[131] bit 6	MAIN[16][28][27]
DRP[131] bit 7	MAIN[16][29][27]
DRP[131] bit 8	MAIN[16][28][28]
DRP[131] bit 9	MAIN[16][29][28]
DRP[131] bit 10	MAIN[16][28][29]
DRP[131] bit 11	MAIN[16][29][29]
DRP[131] bit 12	MAIN[16][28][30]
DRP[131] bit 13	MAIN[16][29][30]
DRP[131] bit 14	MAIN[16][28][31]
DRP[131] bit 15	MAIN[16][29][31]
DRP[132] bit 0	MAIN[16][28][32]
DRP[132] bit 1	MAIN[16][29][32]
DRP[132] bit 2	MAIN[16][28][33]
DRP[132] bit 3	MAIN[16][29][33]
DRP[132] bit 4	MAIN[16][28][34]
DRP[132] bit 5	MAIN[16][29][34]
DRP[132] bit 6	MAIN[16][28][35]
DRP[132] bit 7	MAIN[16][29][35]
DRP[132] bit 8	MAIN[16][28][36]
DRP[132] bit 9	MAIN[16][29][36]
DRP[132] bit 10	MAIN[16][28][37]
DRP[132] bit 11	MAIN[16][29][37]
DRP[132] bit 12	MAIN[16][28][38]
DRP[132] bit 13	MAIN[16][29][38]
DRP[132] bit 14	MAIN[16][28][39]
DRP[132] bit 15	MAIN[16][29][39]
DRP[133] bit 0	MAIN[16][28][40]
DRP[133] bit 1	MAIN[16][29][40]
DRP[133] bit 2	MAIN[16][28][41]
DRP[133] bit 3	MAIN[16][29][41]
DRP[133] bit 4	MAIN[16][28][42]
DRP[133] bit 5	MAIN[16][29][42]
DRP[133] bit 6	MAIN[16][28][43]
DRP[133] bit 7	MAIN[16][29][43]
DRP[133] bit 8	MAIN[16][28][44]
DRP[133] bit 9	MAIN[16][29][44]
DRP[133] bit 10	MAIN[16][28][45]
DRP[133] bit 11	MAIN[16][29][45]
DRP[133] bit 12	MAIN[16][28][46]
DRP[133] bit 13	MAIN[16][29][46]
DRP[133] bit 14	MAIN[16][28][47]
DRP[133] bit 15	MAIN[16][29][47]
DRP[134] bit 0	MAIN[16][28][48]
DRP[134] bit 1	MAIN[16][29][48]
DRP[134] bit 2	MAIN[16][28][49]
DRP[134] bit 3	MAIN[16][29][49]
DRP[134] bit 4	MAIN[16][28][50]
DRP[134] bit 5	MAIN[16][29][50]
DRP[134] bit 6	MAIN[16][28][51]
DRP[134] bit 7	MAIN[16][29][51]
DRP[134] bit 8	MAIN[16][28][52]
DRP[134] bit 9	MAIN[16][29][52]
DRP[134] bit 10	MAIN[16][28][53]
DRP[134] bit 11	MAIN[16][29][53]
DRP[134] bit 12	MAIN[16][28][54]
DRP[134] bit 13	MAIN[16][29][54]
DRP[134] bit 14	MAIN[16][28][55]
DRP[134] bit 15	MAIN[16][29][55]
DRP[135] bit 0	MAIN[16][28][56]
DRP[135] bit 1	MAIN[16][29][56]
DRP[135] bit 2	MAIN[16][28][57]
DRP[135] bit 3	MAIN[16][29][57]
DRP[135] bit 4	MAIN[16][28][58]
DRP[135] bit 5	MAIN[16][29][58]
DRP[135] bit 6	MAIN[16][28][59]
DRP[135] bit 7	MAIN[16][29][59]
DRP[135] bit 8	MAIN[16][28][60]
DRP[135] bit 9	MAIN[16][29][60]
DRP[135] bit 10	MAIN[16][28][61]
DRP[135] bit 11	MAIN[16][29][61]
DRP[135] bit 12	MAIN[16][28][62]
DRP[135] bit 13	MAIN[16][29][62]
DRP[135] bit 14	MAIN[16][28][63]
DRP[135] bit 15	MAIN[16][29][63]
DRP[136] bit 0	MAIN[17][28][0]
DRP[136] bit 1	MAIN[17][29][0]
DRP[136] bit 2	MAIN[17][28][1]
DRP[136] bit 3	MAIN[17][29][1]
DRP[136] bit 4	MAIN[17][28][2]
DRP[136] bit 5	MAIN[17][29][2]
DRP[136] bit 6	MAIN[17][28][3]
DRP[136] bit 7	MAIN[17][29][3]
DRP[136] bit 8	MAIN[17][28][4]
DRP[136] bit 9	MAIN[17][29][4]
DRP[136] bit 10	MAIN[17][28][5]
DRP[136] bit 11	MAIN[17][29][5]
DRP[136] bit 12	MAIN[17][28][6]
DRP[136] bit 13	MAIN[17][29][6]
DRP[136] bit 14	MAIN[17][28][7]
DRP[136] bit 15	MAIN[17][29][7]
DRP[137] bit 0	MAIN[17][28][8]
DRP[137] bit 1	MAIN[17][29][8]
DRP[137] bit 2	MAIN[17][28][9]
DRP[137] bit 3	MAIN[17][29][9]
DRP[137] bit 4	MAIN[17][28][10]
DRP[137] bit 5	MAIN[17][29][10]
DRP[137] bit 6	MAIN[17][28][11]
DRP[137] bit 7	MAIN[17][29][11]
DRP[137] bit 8	MAIN[17][28][12]
DRP[137] bit 9	MAIN[17][29][12]
DRP[137] bit 10	MAIN[17][28][13]
DRP[137] bit 11	MAIN[17][29][13]
DRP[137] bit 12	MAIN[17][28][14]
DRP[137] bit 13	MAIN[17][29][14]
DRP[137] bit 14	MAIN[17][28][15]
DRP[137] bit 15	MAIN[17][29][15]
DRP[138] bit 0	MAIN[17][28][16]
DRP[138] bit 1	MAIN[17][29][16]
DRP[138] bit 2	MAIN[17][28][17]
DRP[138] bit 3	MAIN[17][29][17]
DRP[138] bit 4	MAIN[17][28][18]
DRP[138] bit 5	MAIN[17][29][18]
DRP[138] bit 6	MAIN[17][28][19]
DRP[138] bit 7	MAIN[17][29][19]
DRP[138] bit 8	MAIN[17][28][20]
DRP[138] bit 9	MAIN[17][29][20]
DRP[138] bit 10	MAIN[17][28][21]
DRP[138] bit 11	MAIN[17][29][21]
DRP[138] bit 12	MAIN[17][28][22]
DRP[138] bit 13	MAIN[17][29][22]
DRP[138] bit 14	MAIN[17][28][23]
DRP[138] bit 15	MAIN[17][29][23]
DRP[139] bit 0	MAIN[17][28][24]
DRP[139] bit 1	MAIN[17][29][24]
DRP[139] bit 2	MAIN[17][28][25]
DRP[139] bit 3	MAIN[17][29][25]
DRP[139] bit 4	MAIN[17][28][26]
DRP[139] bit 5	MAIN[17][29][26]
DRP[139] bit 6	MAIN[17][28][27]
DRP[139] bit 7	MAIN[17][29][27]
DRP[139] bit 8	MAIN[17][28][28]
DRP[139] bit 9	MAIN[17][29][28]
DRP[139] bit 10	MAIN[17][28][29]
DRP[139] bit 11	MAIN[17][29][29]
DRP[139] bit 12	MAIN[17][28][30]
DRP[139] bit 13	MAIN[17][29][30]
DRP[139] bit 14	MAIN[17][28][31]
DRP[139] bit 15	MAIN[17][29][31]
DRP[140] bit 0	MAIN[17][28][32]
DRP[140] bit 1	MAIN[17][29][32]
DRP[140] bit 2	MAIN[17][28][33]
DRP[140] bit 3	MAIN[17][29][33]
DRP[140] bit 4	MAIN[17][28][34]
DRP[140] bit 5	MAIN[17][29][34]
DRP[140] bit 6	MAIN[17][28][35]
DRP[140] bit 7	MAIN[17][29][35]
DRP[140] bit 8	MAIN[17][28][36]
DRP[140] bit 9	MAIN[17][29][36]
DRP[140] bit 10	MAIN[17][28][37]
DRP[140] bit 11	MAIN[17][29][37]
DRP[140] bit 12	MAIN[17][28][38]
DRP[140] bit 13	MAIN[17][29][38]
DRP[140] bit 14	MAIN[17][28][39]
DRP[140] bit 15	MAIN[17][29][39]
DRP[141] bit 0	MAIN[17][28][40]
DRP[141] bit 1	MAIN[17][29][40]
DRP[141] bit 2	MAIN[17][28][41]
DRP[141] bit 3	MAIN[17][29][41]
DRP[141] bit 4	MAIN[17][28][42]
DRP[141] bit 5	MAIN[17][29][42]
DRP[141] bit 6	MAIN[17][28][43]
DRP[141] bit 7	MAIN[17][29][43]
DRP[141] bit 8	MAIN[17][28][44]
DRP[141] bit 9	MAIN[17][29][44]
DRP[141] bit 10	MAIN[17][28][45]
DRP[141] bit 11	MAIN[17][29][45]
DRP[141] bit 12	MAIN[17][28][46]
DRP[141] bit 13	MAIN[17][29][46]
DRP[141] bit 14	MAIN[17][28][47]
DRP[141] bit 15	MAIN[17][29][47]
DRP[142] bit 0	MAIN[17][28][48]
DRP[142] bit 1	MAIN[17][29][48]
DRP[142] bit 2	MAIN[17][28][49]
DRP[142] bit 3	MAIN[17][29][49]
DRP[142] bit 4	MAIN[17][28][50]
DRP[142] bit 5	MAIN[17][29][50]
DRP[142] bit 6	MAIN[17][28][51]
DRP[142] bit 7	MAIN[17][29][51]
DRP[142] bit 8	MAIN[17][28][52]
DRP[142] bit 9	MAIN[17][29][52]
DRP[142] bit 10	MAIN[17][28][53]
DRP[142] bit 11	MAIN[17][29][53]
DRP[142] bit 12	MAIN[17][28][54]
DRP[142] bit 13	MAIN[17][29][54]
DRP[142] bit 14	MAIN[17][28][55]
DRP[142] bit 15	MAIN[17][29][55]
DRP[143] bit 0	MAIN[17][28][56]
DRP[143] bit 1	MAIN[17][29][56]
DRP[143] bit 2	MAIN[17][28][57]
DRP[143] bit 3	MAIN[17][29][57]
DRP[143] bit 4	MAIN[17][28][58]
DRP[143] bit 5	MAIN[17][29][58]
DRP[143] bit 6	MAIN[17][28][59]
DRP[143] bit 7	MAIN[17][29][59]
DRP[143] bit 8	MAIN[17][28][60]
DRP[143] bit 9	MAIN[17][29][60]
DRP[143] bit 10	MAIN[17][28][61]
DRP[143] bit 11	MAIN[17][29][61]
DRP[143] bit 12	MAIN[17][28][62]
DRP[143] bit 13	MAIN[17][29][62]
DRP[143] bit 14	MAIN[17][28][63]
DRP[143] bit 15	MAIN[17][29][63]
DRP[144] bit 0	MAIN[18][28][0]
DRP[144] bit 1	MAIN[18][29][0]
DRP[144] bit 2	MAIN[18][28][1]
DRP[144] bit 3	MAIN[18][29][1]
DRP[144] bit 4	MAIN[18][28][2]
DRP[144] bit 5	MAIN[18][29][2]
DRP[144] bit 6	MAIN[18][28][3]
DRP[144] bit 7	MAIN[18][29][3]
DRP[144] bit 8	MAIN[18][28][4]
DRP[144] bit 9	MAIN[18][29][4]
DRP[144] bit 10	MAIN[18][28][5]
DRP[144] bit 11	MAIN[18][29][5]
DRP[144] bit 12	MAIN[18][28][6]
DRP[144] bit 13	MAIN[18][29][6]
DRP[144] bit 14	MAIN[18][28][7]
DRP[144] bit 15	MAIN[18][29][7]
DRP[145] bit 0	MAIN[18][28][8]
DRP[145] bit 1	MAIN[18][29][8]
DRP[145] bit 2	MAIN[18][28][9]
DRP[145] bit 3	MAIN[18][29][9]
DRP[145] bit 4	MAIN[18][28][10]
DRP[145] bit 5	MAIN[18][29][10]
DRP[145] bit 6	MAIN[18][28][11]
DRP[145] bit 7	MAIN[18][29][11]
DRP[145] bit 8	MAIN[18][28][12]
DRP[145] bit 9	MAIN[18][29][12]
DRP[145] bit 10	MAIN[18][28][13]
DRP[145] bit 11	MAIN[18][29][13]
DRP[145] bit 12	MAIN[18][28][14]
DRP[145] bit 13	MAIN[18][29][14]
DRP[145] bit 14	MAIN[18][28][15]
DRP[145] bit 15	MAIN[18][29][15]
DRP[146] bit 0	MAIN[18][28][16]
DRP[146] bit 1	MAIN[18][29][16]
DRP[146] bit 2	MAIN[18][28][17]
DRP[146] bit 3	MAIN[18][29][17]
DRP[146] bit 4	MAIN[18][28][18]
DRP[146] bit 5	MAIN[18][29][18]
DRP[146] bit 6	MAIN[18][28][19]
DRP[146] bit 7	MAIN[18][29][19]
DRP[146] bit 8	MAIN[18][28][20]
DRP[146] bit 9	MAIN[18][29][20]
DRP[146] bit 10	MAIN[18][28][21]
DRP[146] bit 11	MAIN[18][29][21]
DRP[146] bit 12	MAIN[18][28][22]
DRP[146] bit 13	MAIN[18][29][22]
DRP[146] bit 14	MAIN[18][28][23]
DRP[146] bit 15	MAIN[18][29][23]
DRP[147] bit 0	MAIN[18][28][24]
DRP[147] bit 1	MAIN[18][29][24]
DRP[147] bit 2	MAIN[18][28][25]
DRP[147] bit 3	MAIN[18][29][25]
DRP[147] bit 4	MAIN[18][28][26]
DRP[147] bit 5	MAIN[18][29][26]
DRP[147] bit 6	MAIN[18][28][27]
DRP[147] bit 7	MAIN[18][29][27]
DRP[147] bit 8	MAIN[18][28][28]
DRP[147] bit 9	MAIN[18][29][28]
DRP[147] bit 10	MAIN[18][28][29]
DRP[147] bit 11	MAIN[18][29][29]
DRP[147] bit 12	MAIN[18][28][30]
DRP[147] bit 13	MAIN[18][29][30]
DRP[147] bit 14	MAIN[18][28][31]
DRP[147] bit 15	MAIN[18][29][31]
DRP[148] bit 0	MAIN[18][28][32]
DRP[148] bit 1	MAIN[18][29][32]
DRP[148] bit 2	MAIN[18][28][33]
DRP[148] bit 3	MAIN[18][29][33]
DRP[148] bit 4	MAIN[18][28][34]
DRP[148] bit 5	MAIN[18][29][34]
DRP[148] bit 6	MAIN[18][28][35]
DRP[148] bit 7	MAIN[18][29][35]
DRP[148] bit 8	MAIN[18][28][36]
DRP[148] bit 9	MAIN[18][29][36]
DRP[148] bit 10	MAIN[18][28][37]
DRP[148] bit 11	MAIN[18][29][37]
DRP[148] bit 12	MAIN[18][28][38]
DRP[148] bit 13	MAIN[18][29][38]
DRP[148] bit 14	MAIN[18][28][39]
DRP[148] bit 15	MAIN[18][29][39]
DRP[149] bit 0	MAIN[18][28][40]
DRP[149] bit 1	MAIN[18][29][40]
DRP[149] bit 2	MAIN[18][28][41]
DRP[149] bit 3	MAIN[18][29][41]
DRP[149] bit 4	MAIN[18][28][42]
DRP[149] bit 5	MAIN[18][29][42]
DRP[149] bit 6	MAIN[18][28][43]
DRP[149] bit 7	MAIN[18][29][43]
DRP[149] bit 8	MAIN[18][28][44]
DRP[149] bit 9	MAIN[18][29][44]
DRP[149] bit 10	MAIN[18][28][45]
DRP[149] bit 11	MAIN[18][29][45]
DRP[149] bit 12	MAIN[18][28][46]
DRP[149] bit 13	MAIN[18][29][46]
DRP[149] bit 14	MAIN[18][28][47]
DRP[149] bit 15	MAIN[18][29][47]
DRP[150] bit 0	MAIN[18][28][48]
DRP[150] bit 1	MAIN[18][29][48]
DRP[150] bit 2	MAIN[18][28][49]
DRP[150] bit 3	MAIN[18][29][49]
DRP[150] bit 4	MAIN[18][28][50]
DRP[150] bit 5	MAIN[18][29][50]
DRP[150] bit 6	MAIN[18][28][51]
DRP[150] bit 7	MAIN[18][29][51]
DRP[150] bit 8	MAIN[18][28][52]
DRP[150] bit 9	MAIN[18][29][52]
DRP[150] bit 10	MAIN[18][28][53]
DRP[150] bit 11	MAIN[18][29][53]
DRP[150] bit 12	MAIN[18][28][54]
DRP[150] bit 13	MAIN[18][29][54]
DRP[150] bit 14	MAIN[18][28][55]
DRP[150] bit 15	MAIN[18][29][55]
DRP[151] bit 0	MAIN[18][28][56]
DRP[151] bit 1	MAIN[18][29][56]
DRP[151] bit 2	MAIN[18][28][57]
DRP[151] bit 3	MAIN[18][29][57]
DRP[151] bit 4	MAIN[18][28][58]
DRP[151] bit 5	MAIN[18][29][58]
DRP[151] bit 6	MAIN[18][28][59]
DRP[151] bit 7	MAIN[18][29][59]
DRP[151] bit 8	MAIN[18][28][60]
DRP[151] bit 9	MAIN[18][29][60]
DRP[151] bit 10	MAIN[18][28][61]
DRP[151] bit 11	MAIN[18][29][61]
DRP[151] bit 12	MAIN[18][28][62]
DRP[151] bit 13	MAIN[18][29][62]
DRP[151] bit 14	MAIN[18][28][63]
DRP[151] bit 15	MAIN[18][29][63]
DRP[152] bit 0	MAIN[19][28][0]
DRP[152] bit 1	MAIN[19][29][0]
DRP[152] bit 2	MAIN[19][28][1]
DRP[152] bit 3	MAIN[19][29][1]
DRP[152] bit 4	MAIN[19][28][2]
DRP[152] bit 5	MAIN[19][29][2]
DRP[152] bit 6	MAIN[19][28][3]
DRP[152] bit 7	MAIN[19][29][3]
DRP[152] bit 8	MAIN[19][28][4]
DRP[152] bit 9	MAIN[19][29][4]
DRP[152] bit 10	MAIN[19][28][5]
DRP[152] bit 11	MAIN[19][29][5]
DRP[152] bit 12	MAIN[19][28][6]
DRP[152] bit 13	MAIN[19][29][6]
DRP[152] bit 14	MAIN[19][28][7]
DRP[152] bit 15	MAIN[19][29][7]
DRP[153] bit 0	MAIN[19][28][8]
DRP[153] bit 1	MAIN[19][29][8]
DRP[153] bit 2	MAIN[19][28][9]
DRP[153] bit 3	MAIN[19][29][9]
DRP[153] bit 4	MAIN[19][28][10]
DRP[153] bit 5	MAIN[19][29][10]
DRP[153] bit 6	MAIN[19][28][11]
DRP[153] bit 7	MAIN[19][29][11]
DRP[153] bit 8	MAIN[19][28][12]
DRP[153] bit 9	MAIN[19][29][12]
DRP[153] bit 10	MAIN[19][28][13]
DRP[153] bit 11	MAIN[19][29][13]
DRP[153] bit 12	MAIN[19][28][14]
DRP[153] bit 13	MAIN[19][29][14]
DRP[153] bit 14	MAIN[19][28][15]
DRP[153] bit 15	MAIN[19][29][15]
DRP[154] bit 0	MAIN[19][28][16]
DRP[154] bit 1	MAIN[19][29][16]
DRP[154] bit 2	MAIN[19][28][17]
DRP[154] bit 3	MAIN[19][29][17]
DRP[154] bit 4	MAIN[19][28][18]
DRP[154] bit 5	MAIN[19][29][18]
DRP[154] bit 6	MAIN[19][28][19]
DRP[154] bit 7	MAIN[19][29][19]
DRP[154] bit 8	MAIN[19][28][20]
DRP[154] bit 9	MAIN[19][29][20]
DRP[154] bit 10	MAIN[19][28][21]
DRP[154] bit 11	MAIN[19][29][21]
DRP[154] bit 12	MAIN[19][28][22]
DRP[154] bit 13	MAIN[19][29][22]
DRP[154] bit 14	MAIN[19][28][23]
DRP[154] bit 15	MAIN[19][29][23]
DRP[155] bit 0	MAIN[19][28][24]
DRP[155] bit 1	MAIN[19][29][24]
DRP[155] bit 2	MAIN[19][28][25]
DRP[155] bit 3	MAIN[19][29][25]
DRP[155] bit 4	MAIN[19][28][26]
DRP[155] bit 5	MAIN[19][29][26]
DRP[155] bit 6	MAIN[19][28][27]
DRP[155] bit 7	MAIN[19][29][27]
DRP[155] bit 8	MAIN[19][28][28]
DRP[155] bit 9	MAIN[19][29][28]
DRP[155] bit 10	MAIN[19][28][29]
DRP[155] bit 11	MAIN[19][29][29]
DRP[155] bit 12	MAIN[19][28][30]
DRP[155] bit 13	MAIN[19][29][30]
DRP[155] bit 14	MAIN[19][28][31]
DRP[155] bit 15	MAIN[19][29][31]
DRP[156] bit 0	MAIN[19][28][32]
DRP[156] bit 1	MAIN[19][29][32]
DRP[156] bit 2	MAIN[19][28][33]
DRP[156] bit 3	MAIN[19][29][33]
DRP[156] bit 4	MAIN[19][28][34]
DRP[156] bit 5	MAIN[19][29][34]
DRP[156] bit 6	MAIN[19][28][35]
DRP[156] bit 7	MAIN[19][29][35]
DRP[156] bit 8	MAIN[19][28][36]
DRP[156] bit 9	MAIN[19][29][36]
DRP[156] bit 10	MAIN[19][28][37]
DRP[156] bit 11	MAIN[19][29][37]
DRP[156] bit 12	MAIN[19][28][38]
DRP[156] bit 13	MAIN[19][29][38]
DRP[156] bit 14	MAIN[19][28][39]
DRP[156] bit 15	MAIN[19][29][39]
DRP[157] bit 0	MAIN[19][28][40]
DRP[157] bit 1	MAIN[19][29][40]
DRP[157] bit 2	MAIN[19][28][41]
DRP[157] bit 3	MAIN[19][29][41]
DRP[157] bit 4	MAIN[19][28][42]
DRP[157] bit 5	MAIN[19][29][42]
DRP[157] bit 6	MAIN[19][28][43]
DRP[157] bit 7	MAIN[19][29][43]
DRP[157] bit 8	MAIN[19][28][44]
DRP[157] bit 9	MAIN[19][29][44]
DRP[157] bit 10	MAIN[19][28][45]
DRP[157] bit 11	MAIN[19][29][45]
DRP[157] bit 12	MAIN[19][28][46]
DRP[157] bit 13	MAIN[19][29][46]
DRP[157] bit 14	MAIN[19][28][47]
DRP[157] bit 15	MAIN[19][29][47]
DRP[158] bit 0	MAIN[19][28][48]
DRP[158] bit 1	MAIN[19][29][48]
DRP[158] bit 2	MAIN[19][28][49]
DRP[158] bit 3	MAIN[19][29][49]
DRP[158] bit 4	MAIN[19][28][50]
DRP[158] bit 5	MAIN[19][29][50]
DRP[158] bit 6	MAIN[19][28][51]
DRP[158] bit 7	MAIN[19][29][51]
DRP[158] bit 8	MAIN[19][28][52]
DRP[158] bit 9	MAIN[19][29][52]
DRP[158] bit 10	MAIN[19][28][53]
DRP[158] bit 11	MAIN[19][29][53]
DRP[158] bit 12	MAIN[19][28][54]
DRP[158] bit 13	MAIN[19][29][54]
DRP[158] bit 14	MAIN[19][28][55]
DRP[158] bit 15	MAIN[19][29][55]
DRP[159] bit 0	MAIN[19][28][56]
DRP[159] bit 1	MAIN[19][29][56]
DRP[159] bit 2	MAIN[19][28][57]
DRP[159] bit 3	MAIN[19][29][57]
DRP[159] bit 4	MAIN[19][28][58]
DRP[159] bit 5	MAIN[19][29][58]
DRP[159] bit 6	MAIN[19][28][59]
DRP[159] bit 7	MAIN[19][29][59]
DRP[159] bit 8	MAIN[19][28][60]
DRP[159] bit 9	MAIN[19][29][60]
DRP[159] bit 10	MAIN[19][28][61]
DRP[159] bit 11	MAIN[19][29][61]
DRP[159] bit 12	MAIN[19][28][62]
DRP[159] bit 13	MAIN[19][29][62]
DRP[159] bit 14	MAIN[19][28][63]
DRP[159] bit 15	MAIN[19][29][63]
DRP[160] bit 0	MAIN[20][28][0]
DRP[160] bit 1	MAIN[20][29][0]
DRP[160] bit 2	MAIN[20][28][1]
DRP[160] bit 3	MAIN[20][29][1]
DRP[160] bit 4	MAIN[20][28][2]
DRP[160] bit 5	MAIN[20][29][2]
DRP[160] bit 6	MAIN[20][28][3]
DRP[160] bit 7	MAIN[20][29][3]
DRP[160] bit 8	MAIN[20][28][4]
DRP[160] bit 9	MAIN[20][29][4]
DRP[160] bit 10	MAIN[20][28][5]
DRP[160] bit 11	MAIN[20][29][5]
DRP[160] bit 12	MAIN[20][28][6]
DRP[160] bit 13	MAIN[20][29][6]
DRP[160] bit 14	MAIN[20][28][7]
DRP[160] bit 15	MAIN[20][29][7]
DRP[161] bit 0	MAIN[20][28][8]
DRP[161] bit 1	MAIN[20][29][8]
DRP[161] bit 2	MAIN[20][28][9]
DRP[161] bit 3	MAIN[20][29][9]
DRP[161] bit 4	MAIN[20][28][10]
DRP[161] bit 5	MAIN[20][29][10]
DRP[161] bit 6	MAIN[20][28][11]
DRP[161] bit 7	MAIN[20][29][11]
DRP[161] bit 8	MAIN[20][28][12]
DRP[161] bit 9	MAIN[20][29][12]
DRP[161] bit 10	MAIN[20][28][13]
DRP[161] bit 11	MAIN[20][29][13]
DRP[161] bit 12	MAIN[20][28][14]
DRP[161] bit 13	MAIN[20][29][14]
DRP[161] bit 14	MAIN[20][28][15]
DRP[161] bit 15	MAIN[20][29][15]
DRP[162] bit 0	MAIN[20][28][16]
DRP[162] bit 1	MAIN[20][29][16]
DRP[162] bit 2	MAIN[20][28][17]
DRP[162] bit 3	MAIN[20][29][17]
DRP[162] bit 4	MAIN[20][28][18]
DRP[162] bit 5	MAIN[20][29][18]
DRP[162] bit 6	MAIN[20][28][19]
DRP[162] bit 7	MAIN[20][29][19]
DRP[162] bit 8	MAIN[20][28][20]
DRP[162] bit 9	MAIN[20][29][20]
DRP[162] bit 10	MAIN[20][28][21]
DRP[162] bit 11	MAIN[20][29][21]
DRP[162] bit 12	MAIN[20][28][22]
DRP[162] bit 13	MAIN[20][29][22]
DRP[162] bit 14	MAIN[20][28][23]
DRP[162] bit 15	MAIN[20][29][23]
DRP[163] bit 0	MAIN[20][28][24]
DRP[163] bit 1	MAIN[20][29][24]
DRP[163] bit 2	MAIN[20][28][25]
DRP[163] bit 3	MAIN[20][29][25]
DRP[163] bit 4	MAIN[20][28][26]
DRP[163] bit 5	MAIN[20][29][26]
DRP[163] bit 6	MAIN[20][28][27]
DRP[163] bit 7	MAIN[20][29][27]
DRP[163] bit 8	MAIN[20][28][28]
DRP[163] bit 9	MAIN[20][29][28]
DRP[163] bit 10	MAIN[20][28][29]
DRP[163] bit 11	MAIN[20][29][29]
DRP[163] bit 12	MAIN[20][28][30]
DRP[163] bit 13	MAIN[20][29][30]
DRP[163] bit 14	MAIN[20][28][31]
DRP[163] bit 15	MAIN[20][29][31]
DRP[164] bit 0	MAIN[20][28][32]
DRP[164] bit 1	MAIN[20][29][32]
DRP[164] bit 2	MAIN[20][28][33]
DRP[164] bit 3	MAIN[20][29][33]
DRP[164] bit 4	MAIN[20][28][34]
DRP[164] bit 5	MAIN[20][29][34]
DRP[164] bit 6	MAIN[20][28][35]
DRP[164] bit 7	MAIN[20][29][35]
DRP[164] bit 8	MAIN[20][28][36]
DRP[164] bit 9	MAIN[20][29][36]
DRP[164] bit 10	MAIN[20][28][37]
DRP[164] bit 11	MAIN[20][29][37]
DRP[164] bit 12	MAIN[20][28][38]
DRP[164] bit 13	MAIN[20][29][38]
DRP[164] bit 14	MAIN[20][28][39]
DRP[164] bit 15	MAIN[20][29][39]
DRP[165] bit 0	MAIN[20][28][40]
DRP[165] bit 1	MAIN[20][29][40]
DRP[165] bit 2	MAIN[20][28][41]
DRP[165] bit 3	MAIN[20][29][41]
DRP[165] bit 4	MAIN[20][28][42]
DRP[165] bit 5	MAIN[20][29][42]
DRP[165] bit 6	MAIN[20][28][43]
DRP[165] bit 7	MAIN[20][29][43]
DRP[165] bit 8	MAIN[20][28][44]
DRP[165] bit 9	MAIN[20][29][44]
DRP[165] bit 10	MAIN[20][28][45]
DRP[165] bit 11	MAIN[20][29][45]
DRP[165] bit 12	MAIN[20][28][46]
DRP[165] bit 13	MAIN[20][29][46]
DRP[165] bit 14	MAIN[20][28][47]
DRP[165] bit 15	MAIN[20][29][47]
DRP[166] bit 0	MAIN[20][28][48]
DRP[166] bit 1	MAIN[20][29][48]
DRP[166] bit 2	MAIN[20][28][49]
DRP[166] bit 3	MAIN[20][29][49]
DRP[166] bit 4	MAIN[20][28][50]
DRP[166] bit 5	MAIN[20][29][50]
DRP[166] bit 6	MAIN[20][28][51]
DRP[166] bit 7	MAIN[20][29][51]
DRP[166] bit 8	MAIN[20][28][52]
DRP[166] bit 9	MAIN[20][29][52]
DRP[166] bit 10	MAIN[20][28][53]
DRP[166] bit 11	MAIN[20][29][53]
DRP[166] bit 12	MAIN[20][28][54]
DRP[166] bit 13	MAIN[20][29][54]
DRP[166] bit 14	MAIN[20][28][55]
DRP[166] bit 15	MAIN[20][29][55]
DRP[167] bit 0	MAIN[20][28][56]
DRP[167] bit 1	MAIN[20][29][56]
DRP[167] bit 2	MAIN[20][28][57]
DRP[167] bit 3	MAIN[20][29][57]
DRP[167] bit 4	MAIN[20][28][58]
DRP[167] bit 5	MAIN[20][29][58]
DRP[167] bit 6	MAIN[20][28][59]
DRP[167] bit 7	MAIN[20][29][59]
DRP[167] bit 8	MAIN[20][28][60]
DRP[167] bit 9	MAIN[20][29][60]
DRP[167] bit 10	MAIN[20][28][61]
DRP[167] bit 11	MAIN[20][29][61]
DRP[167] bit 12	MAIN[20][28][62]
DRP[167] bit 13	MAIN[20][29][62]
DRP[167] bit 14	MAIN[20][28][63]
DRP[167] bit 15	MAIN[20][29][63]
DRP[168] bit 0	MAIN[21][28][0]
DRP[168] bit 1	MAIN[21][29][0]
DRP[168] bit 2	MAIN[21][28][1]
DRP[168] bit 3	MAIN[21][29][1]
DRP[168] bit 4	MAIN[21][28][2]
DRP[168] bit 5	MAIN[21][29][2]
DRP[168] bit 6	MAIN[21][28][3]
DRP[168] bit 7	MAIN[21][29][3]
DRP[168] bit 8	MAIN[21][28][4]
DRP[168] bit 9	MAIN[21][29][4]
DRP[168] bit 10	MAIN[21][28][5]
DRP[168] bit 11	MAIN[21][29][5]
DRP[168] bit 12	MAIN[21][28][6]
DRP[168] bit 13	MAIN[21][29][6]
DRP[168] bit 14	MAIN[21][28][7]
DRP[168] bit 15	MAIN[21][29][7]
DRP[169] bit 0	MAIN[21][28][8]
DRP[169] bit 1	MAIN[21][29][8]
DRP[169] bit 2	MAIN[21][28][9]
DRP[169] bit 3	MAIN[21][29][9]
DRP[169] bit 4	MAIN[21][28][10]
DRP[169] bit 5	MAIN[21][29][10]
DRP[169] bit 6	MAIN[21][28][11]
DRP[169] bit 7	MAIN[21][29][11]
DRP[169] bit 8	MAIN[21][28][12]
DRP[169] bit 9	MAIN[21][29][12]
DRP[169] bit 10	MAIN[21][28][13]
DRP[169] bit 11	MAIN[21][29][13]
DRP[169] bit 12	MAIN[21][28][14]
DRP[169] bit 13	MAIN[21][29][14]
DRP[169] bit 14	MAIN[21][28][15]
DRP[169] bit 15	MAIN[21][29][15]
DRP[170] bit 0	MAIN[21][28][16]
DRP[170] bit 1	MAIN[21][29][16]
DRP[170] bit 2	MAIN[21][28][17]
DRP[170] bit 3	MAIN[21][29][17]
DRP[170] bit 4	MAIN[21][28][18]
DRP[170] bit 5	MAIN[21][29][18]
DRP[170] bit 6	MAIN[21][28][19]
DRP[170] bit 7	MAIN[21][29][19]
DRP[170] bit 8	MAIN[21][28][20]
DRP[170] bit 9	MAIN[21][29][20]
DRP[170] bit 10	MAIN[21][28][21]
DRP[170] bit 11	MAIN[21][29][21]
DRP[170] bit 12	MAIN[21][28][22]
DRP[170] bit 13	MAIN[21][29][22]
DRP[170] bit 14	MAIN[21][28][23]
DRP[170] bit 15	MAIN[21][29][23]
DRP[171] bit 0	MAIN[21][28][24]
DRP[171] bit 1	MAIN[21][29][24]
DRP[171] bit 2	MAIN[21][28][25]
DRP[171] bit 3	MAIN[21][29][25]
DRP[171] bit 4	MAIN[21][28][26]
DRP[171] bit 5	MAIN[21][29][26]
DRP[171] bit 6	MAIN[21][28][27]
DRP[171] bit 7	MAIN[21][29][27]
DRP[171] bit 8	MAIN[21][28][28]
DRP[171] bit 9	MAIN[21][29][28]
DRP[171] bit 10	MAIN[21][28][29]
DRP[171] bit 11	MAIN[21][29][29]
DRP[171] bit 12	MAIN[21][28][30]
DRP[171] bit 13	MAIN[21][29][30]
DRP[171] bit 14	MAIN[21][28][31]
DRP[171] bit 15	MAIN[21][29][31]
DRP[172] bit 0	MAIN[21][28][32]
DRP[172] bit 1	MAIN[21][29][32]
DRP[172] bit 2	MAIN[21][28][33]
DRP[172] bit 3	MAIN[21][29][33]
DRP[172] bit 4	MAIN[21][28][34]
DRP[172] bit 5	MAIN[21][29][34]
DRP[172] bit 6	MAIN[21][28][35]
DRP[172] bit 7	MAIN[21][29][35]
DRP[172] bit 8	MAIN[21][28][36]
DRP[172] bit 9	MAIN[21][29][36]
DRP[172] bit 10	MAIN[21][28][37]
DRP[172] bit 11	MAIN[21][29][37]
DRP[172] bit 12	MAIN[21][28][38]
DRP[172] bit 13	MAIN[21][29][38]
DRP[172] bit 14	MAIN[21][28][39]
DRP[172] bit 15	MAIN[21][29][39]
DRP[173] bit 0	MAIN[21][28][40]
DRP[173] bit 1	MAIN[21][29][40]
DRP[173] bit 2	MAIN[21][28][41]
DRP[173] bit 3	MAIN[21][29][41]
DRP[173] bit 4	MAIN[21][28][42]
DRP[173] bit 5	MAIN[21][29][42]
DRP[173] bit 6	MAIN[21][28][43]
DRP[173] bit 7	MAIN[21][29][43]
DRP[173] bit 8	MAIN[21][28][44]
DRP[173] bit 9	MAIN[21][29][44]
DRP[173] bit 10	MAIN[21][28][45]
DRP[173] bit 11	MAIN[21][29][45]
DRP[173] bit 12	MAIN[21][28][46]
DRP[173] bit 13	MAIN[21][29][46]
DRP[173] bit 14	MAIN[21][28][47]
DRP[173] bit 15	MAIN[21][29][47]
DRP[174] bit 0	MAIN[21][28][48]
DRP[174] bit 1	MAIN[21][29][48]
DRP[174] bit 2	MAIN[21][28][49]
DRP[174] bit 3	MAIN[21][29][49]
DRP[174] bit 4	MAIN[21][28][50]
DRP[174] bit 5	MAIN[21][29][50]
DRP[174] bit 6	MAIN[21][28][51]
DRP[174] bit 7	MAIN[21][29][51]
DRP[174] bit 8	MAIN[21][28][52]
DRP[174] bit 9	MAIN[21][29][52]
DRP[174] bit 10	MAIN[21][28][53]
DRP[174] bit 11	MAIN[21][29][53]
DRP[174] bit 12	MAIN[21][28][54]
DRP[174] bit 13	MAIN[21][29][54]
DRP[174] bit 14	MAIN[21][28][55]
DRP[174] bit 15	MAIN[21][29][55]
DRP[175] bit 0	MAIN[21][28][56]
DRP[175] bit 1	MAIN[21][29][56]
DRP[175] bit 2	MAIN[21][28][57]
DRP[175] bit 3	MAIN[21][29][57]
DRP[175] bit 4	MAIN[21][28][58]
DRP[175] bit 5	MAIN[21][29][58]
DRP[175] bit 6	MAIN[21][28][59]
DRP[175] bit 7	MAIN[21][29][59]
DRP[175] bit 8	MAIN[21][28][60]
DRP[175] bit 9	MAIN[21][29][60]
DRP[175] bit 10	MAIN[21][28][61]
DRP[175] bit 11	MAIN[21][29][61]
DRP[175] bit 12	MAIN[21][28][62]
DRP[175] bit 13	MAIN[21][29][62]
DRP[175] bit 14	MAIN[21][28][63]
DRP[175] bit 15	MAIN[21][29][63]
DRP[176] bit 0	MAIN[22][28][0]
DRP[176] bit 1	MAIN[22][29][0]
DRP[176] bit 2	MAIN[22][28][1]
DRP[176] bit 3	MAIN[22][29][1]
DRP[176] bit 4	MAIN[22][28][2]
DRP[176] bit 5	MAIN[22][29][2]
DRP[176] bit 6	MAIN[22][28][3]
DRP[176] bit 7	MAIN[22][29][3]
DRP[176] bit 8	MAIN[22][28][4]
DRP[176] bit 9	MAIN[22][29][4]
DRP[176] bit 10	MAIN[22][28][5]
DRP[176] bit 11	MAIN[22][29][5]
DRP[176] bit 12	MAIN[22][28][6]
DRP[176] bit 13	MAIN[22][29][6]
DRP[176] bit 14	MAIN[22][28][7]
DRP[176] bit 15	MAIN[22][29][7]
DRP[177] bit 0	MAIN[22][28][8]
DRP[177] bit 1	MAIN[22][29][8]
DRP[177] bit 2	MAIN[22][28][9]
DRP[177] bit 3	MAIN[22][29][9]
DRP[177] bit 4	MAIN[22][28][10]
DRP[177] bit 5	MAIN[22][29][10]
DRP[177] bit 6	MAIN[22][28][11]
DRP[177] bit 7	MAIN[22][29][11]
DRP[177] bit 8	MAIN[22][28][12]
DRP[177] bit 9	MAIN[22][29][12]
DRP[177] bit 10	MAIN[22][28][13]
DRP[177] bit 11	MAIN[22][29][13]
DRP[177] bit 12	MAIN[22][28][14]
DRP[177] bit 13	MAIN[22][29][14]
DRP[177] bit 14	MAIN[22][28][15]
DRP[177] bit 15	MAIN[22][29][15]
DRP[178] bit 0	MAIN[22][28][16]
DRP[178] bit 1	MAIN[22][29][16]
DRP[178] bit 2	MAIN[22][28][17]
DRP[178] bit 3	MAIN[22][29][17]
DRP[178] bit 4	MAIN[22][28][18]
DRP[178] bit 5	MAIN[22][29][18]
DRP[178] bit 6	MAIN[22][28][19]
DRP[178] bit 7	MAIN[22][29][19]
DRP[178] bit 8	MAIN[22][28][20]
DRP[178] bit 9	MAIN[22][29][20]
DRP[178] bit 10	MAIN[22][28][21]
DRP[178] bit 11	MAIN[22][29][21]
DRP[178] bit 12	MAIN[22][28][22]
DRP[178] bit 13	MAIN[22][29][22]
DRP[178] bit 14	MAIN[22][28][23]
DRP[178] bit 15	MAIN[22][29][23]
DRP[179] bit 0	MAIN[22][28][24]
DRP[179] bit 1	MAIN[22][29][24]
DRP[179] bit 2	MAIN[22][28][25]
DRP[179] bit 3	MAIN[22][29][25]
DRP[179] bit 4	MAIN[22][28][26]
DRP[179] bit 5	MAIN[22][29][26]
DRP[179] bit 6	MAIN[22][28][27]
DRP[179] bit 7	MAIN[22][29][27]
DRP[179] bit 8	MAIN[22][28][28]
DRP[179] bit 9	MAIN[22][29][28]
DRP[179] bit 10	MAIN[22][28][29]
DRP[179] bit 11	MAIN[22][29][29]
DRP[179] bit 12	MAIN[22][28][30]
DRP[179] bit 13	MAIN[22][29][30]
DRP[179] bit 14	MAIN[22][28][31]
DRP[179] bit 15	MAIN[22][29][31]
DRP[180] bit 0	MAIN[22][28][32]
DRP[180] bit 1	MAIN[22][29][32]
DRP[180] bit 2	MAIN[22][28][33]
DRP[180] bit 3	MAIN[22][29][33]
DRP[180] bit 4	MAIN[22][28][34]
DRP[180] bit 5	MAIN[22][29][34]
DRP[180] bit 6	MAIN[22][28][35]
DRP[180] bit 7	MAIN[22][29][35]
DRP[180] bit 8	MAIN[22][28][36]
DRP[180] bit 9	MAIN[22][29][36]
DRP[180] bit 10	MAIN[22][28][37]
DRP[180] bit 11	MAIN[22][29][37]
DRP[180] bit 12	MAIN[22][28][38]
DRP[180] bit 13	MAIN[22][29][38]
DRP[180] bit 14	MAIN[22][28][39]
DRP[180] bit 15	MAIN[22][29][39]
DRP[181] bit 0	MAIN[22][28][40]
DRP[181] bit 1	MAIN[22][29][40]
DRP[181] bit 2	MAIN[22][28][41]
DRP[181] bit 3	MAIN[22][29][41]
DRP[181] bit 4	MAIN[22][28][42]
DRP[181] bit 5	MAIN[22][29][42]
DRP[181] bit 6	MAIN[22][28][43]
DRP[181] bit 7	MAIN[22][29][43]
DRP[181] bit 8	MAIN[22][28][44]
DRP[181] bit 9	MAIN[22][29][44]
DRP[181] bit 10	MAIN[22][28][45]
DRP[181] bit 11	MAIN[22][29][45]
DRP[181] bit 12	MAIN[22][28][46]
DRP[181] bit 13	MAIN[22][29][46]
DRP[181] bit 14	MAIN[22][28][47]
DRP[181] bit 15	MAIN[22][29][47]
DRP[182] bit 0	MAIN[22][28][48]
DRP[182] bit 1	MAIN[22][29][48]
DRP[182] bit 2	MAIN[22][28][49]
DRP[182] bit 3	MAIN[22][29][49]
DRP[182] bit 4	MAIN[22][28][50]
DRP[182] bit 5	MAIN[22][29][50]
DRP[182] bit 6	MAIN[22][28][51]
DRP[182] bit 7	MAIN[22][29][51]
DRP[182] bit 8	MAIN[22][28][52]
DRP[182] bit 9	MAIN[22][29][52]
DRP[182] bit 10	MAIN[22][28][53]
DRP[182] bit 11	MAIN[22][29][53]
DRP[182] bit 12	MAIN[22][28][54]
DRP[182] bit 13	MAIN[22][29][54]
DRP[182] bit 14	MAIN[22][28][55]
DRP[182] bit 15	MAIN[22][29][55]
DRP[183] bit 0	MAIN[22][28][56]
DRP[183] bit 1	MAIN[22][29][56]
DRP[183] bit 2	MAIN[22][28][57]
DRP[183] bit 3	MAIN[22][29][57]
DRP[183] bit 4	MAIN[22][28][58]
DRP[183] bit 5	MAIN[22][29][58]
DRP[183] bit 6	MAIN[22][28][59]
DRP[183] bit 7	MAIN[22][29][59]
DRP[183] bit 8	MAIN[22][28][60]
DRP[183] bit 9	MAIN[22][29][60]
DRP[183] bit 10	MAIN[22][28][61]
DRP[183] bit 11	MAIN[22][29][61]
DRP[183] bit 12	MAIN[22][28][62]
DRP[183] bit 13	MAIN[22][29][62]
DRP[183] bit 14	MAIN[22][28][63]
DRP[183] bit 15	MAIN[22][29][63]
DRP[184] bit 0	MAIN[23][28][0]
DRP[184] bit 1	MAIN[23][29][0]
DRP[184] bit 2	MAIN[23][28][1]
DRP[184] bit 3	MAIN[23][29][1]
DRP[184] bit 4	MAIN[23][28][2]
DRP[184] bit 5	MAIN[23][29][2]
DRP[184] bit 6	MAIN[23][28][3]
DRP[184] bit 7	MAIN[23][29][3]
DRP[184] bit 8	MAIN[23][28][4]
DRP[184] bit 9	MAIN[23][29][4]
DRP[184] bit 10	MAIN[23][28][5]
DRP[184] bit 11	MAIN[23][29][5]
DRP[184] bit 12	MAIN[23][28][6]
DRP[184] bit 13	MAIN[23][29][6]
DRP[184] bit 14	MAIN[23][28][7]
DRP[184] bit 15	MAIN[23][29][7]
DRP[185] bit 0	MAIN[23][28][8]
DRP[185] bit 1	MAIN[23][29][8]
DRP[185] bit 2	MAIN[23][28][9]
DRP[185] bit 3	MAIN[23][29][9]
DRP[185] bit 4	MAIN[23][28][10]
DRP[185] bit 5	MAIN[23][29][10]
DRP[185] bit 6	MAIN[23][28][11]
DRP[185] bit 7	MAIN[23][29][11]
DRP[185] bit 8	MAIN[23][28][12]
DRP[185] bit 9	MAIN[23][29][12]
DRP[185] bit 10	MAIN[23][28][13]
DRP[185] bit 11	MAIN[23][29][13]
DRP[185] bit 12	MAIN[23][28][14]
DRP[185] bit 13	MAIN[23][29][14]
DRP[185] bit 14	MAIN[23][28][15]
DRP[185] bit 15	MAIN[23][29][15]
DRP[186] bit 0	MAIN[23][28][16]
DRP[186] bit 1	MAIN[23][29][16]
DRP[186] bit 2	MAIN[23][28][17]
DRP[186] bit 3	MAIN[23][29][17]
DRP[186] bit 4	MAIN[23][28][18]
DRP[186] bit 5	MAIN[23][29][18]
DRP[186] bit 6	MAIN[23][28][19]
DRP[186] bit 7	MAIN[23][29][19]
DRP[186] bit 8	MAIN[23][28][20]
DRP[186] bit 9	MAIN[23][29][20]
DRP[186] bit 10	MAIN[23][28][21]
DRP[186] bit 11	MAIN[23][29][21]
DRP[186] bit 12	MAIN[23][28][22]
DRP[186] bit 13	MAIN[23][29][22]
DRP[186] bit 14	MAIN[23][28][23]
DRP[186] bit 15	MAIN[23][29][23]
DRP[187] bit 0	MAIN[23][28][24]
DRP[187] bit 1	MAIN[23][29][24]
DRP[187] bit 2	MAIN[23][28][25]
DRP[187] bit 3	MAIN[23][29][25]
DRP[187] bit 4	MAIN[23][28][26]
DRP[187] bit 5	MAIN[23][29][26]
DRP[187] bit 6	MAIN[23][28][27]
DRP[187] bit 7	MAIN[23][29][27]
DRP[187] bit 8	MAIN[23][28][28]
DRP[187] bit 9	MAIN[23][29][28]
DRP[187] bit 10	MAIN[23][28][29]
DRP[187] bit 11	MAIN[23][29][29]
DRP[187] bit 12	MAIN[23][28][30]
DRP[187] bit 13	MAIN[23][29][30]
DRP[187] bit 14	MAIN[23][28][31]
DRP[187] bit 15	MAIN[23][29][31]
DRP[188] bit 0	MAIN[23][28][32]
DRP[188] bit 1	MAIN[23][29][32]
DRP[188] bit 2	MAIN[23][28][33]
DRP[188] bit 3	MAIN[23][29][33]
DRP[188] bit 4	MAIN[23][28][34]
DRP[188] bit 5	MAIN[23][29][34]
DRP[188] bit 6	MAIN[23][28][35]
DRP[188] bit 7	MAIN[23][29][35]
DRP[188] bit 8	MAIN[23][28][36]
DRP[188] bit 9	MAIN[23][29][36]
DRP[188] bit 10	MAIN[23][28][37]
DRP[188] bit 11	MAIN[23][29][37]
DRP[188] bit 12	MAIN[23][28][38]
DRP[188] bit 13	MAIN[23][29][38]
DRP[188] bit 14	MAIN[23][28][39]
DRP[188] bit 15	MAIN[23][29][39]
DRP[189] bit 0	MAIN[23][28][40]
DRP[189] bit 1	MAIN[23][29][40]
DRP[189] bit 2	MAIN[23][28][41]
DRP[189] bit 3	MAIN[23][29][41]
DRP[189] bit 4	MAIN[23][28][42]
DRP[189] bit 5	MAIN[23][29][42]
DRP[189] bit 6	MAIN[23][28][43]
DRP[189] bit 7	MAIN[23][29][43]
DRP[189] bit 8	MAIN[23][28][44]
DRP[189] bit 9	MAIN[23][29][44]
DRP[189] bit 10	MAIN[23][28][45]
DRP[189] bit 11	MAIN[23][29][45]
DRP[189] bit 12	MAIN[23][28][46]
DRP[189] bit 13	MAIN[23][29][46]
DRP[189] bit 14	MAIN[23][28][47]
DRP[189] bit 15	MAIN[23][29][47]
DRP[190] bit 0	MAIN[23][28][48]
DRP[190] bit 1	MAIN[23][29][48]
DRP[190] bit 2	MAIN[23][28][49]
DRP[190] bit 3	MAIN[23][29][49]
DRP[190] bit 4	MAIN[23][28][50]
DRP[190] bit 5	MAIN[23][29][50]
DRP[190] bit 6	MAIN[23][28][51]
DRP[190] bit 7	MAIN[23][29][51]
DRP[190] bit 8	MAIN[23][28][52]
DRP[190] bit 9	MAIN[23][29][52]
DRP[190] bit 10	MAIN[23][28][53]
DRP[190] bit 11	MAIN[23][29][53]
DRP[190] bit 12	MAIN[23][28][54]
DRP[190] bit 13	MAIN[23][29][54]
DRP[190] bit 14	MAIN[23][28][55]
DRP[190] bit 15	MAIN[23][29][55]
DRP[191] bit 0	MAIN[23][28][56]
DRP[191] bit 1	MAIN[23][29][56]
DRP[191] bit 2	MAIN[23][28][57]
DRP[191] bit 3	MAIN[23][29][57]
DRP[191] bit 4	MAIN[23][28][58]
DRP[191] bit 5	MAIN[23][29][58]
DRP[191] bit 6	MAIN[23][28][59]
DRP[191] bit 7	MAIN[23][29][59]
DRP[191] bit 8	MAIN[23][28][60]
DRP[191] bit 9	MAIN[23][29][60]
DRP[191] bit 10	MAIN[23][28][61]
DRP[191] bit 11	MAIN[23][29][61]
DRP[191] bit 12	MAIN[23][28][62]
DRP[191] bit 13	MAIN[23][29][62]
DRP[191] bit 14	MAIN[23][28][63]
DRP[191] bit 15	MAIN[23][29][63]
DRP[192] bit 0	MAIN[24][28][0]
DRP[192] bit 1	MAIN[24][29][0]
DRP[192] bit 2	MAIN[24][28][1]
DRP[192] bit 3	MAIN[24][29][1]
DRP[192] bit 4	MAIN[24][28][2]
DRP[192] bit 5	MAIN[24][29][2]
DRP[192] bit 6	MAIN[24][28][3]
DRP[192] bit 7	MAIN[24][29][3]
DRP[192] bit 8	MAIN[24][28][4]
DRP[192] bit 9	MAIN[24][29][4]
DRP[192] bit 10	MAIN[24][28][5]
DRP[192] bit 11	MAIN[24][29][5]
DRP[192] bit 12	MAIN[24][28][6]
DRP[192] bit 13	MAIN[24][29][6]
DRP[192] bit 14	MAIN[24][28][7]
DRP[192] bit 15	MAIN[24][29][7]
DRP[193] bit 0	MAIN[24][28][8]
DRP[193] bit 1	MAIN[24][29][8]
DRP[193] bit 2	MAIN[24][28][9]
DRP[193] bit 3	MAIN[24][29][9]
DRP[193] bit 4	MAIN[24][28][10]
DRP[193] bit 5	MAIN[24][29][10]
DRP[193] bit 6	MAIN[24][28][11]
DRP[193] bit 7	MAIN[24][29][11]
DRP[193] bit 8	MAIN[24][28][12]
DRP[193] bit 9	MAIN[24][29][12]
DRP[193] bit 10	MAIN[24][28][13]
DRP[193] bit 11	MAIN[24][29][13]
DRP[193] bit 12	MAIN[24][28][14]
DRP[193] bit 13	MAIN[24][29][14]
DRP[193] bit 14	MAIN[24][28][15]
DRP[193] bit 15	MAIN[24][29][15]
DRP[194] bit 0	MAIN[24][28][16]
DRP[194] bit 1	MAIN[24][29][16]
DRP[194] bit 2	MAIN[24][28][17]
DRP[194] bit 3	MAIN[24][29][17]
DRP[194] bit 4	MAIN[24][28][18]
DRP[194] bit 5	MAIN[24][29][18]
DRP[194] bit 6	MAIN[24][28][19]
DRP[194] bit 7	MAIN[24][29][19]
DRP[194] bit 8	MAIN[24][28][20]
DRP[194] bit 9	MAIN[24][29][20]
DRP[194] bit 10	MAIN[24][28][21]
DRP[194] bit 11	MAIN[24][29][21]
DRP[194] bit 12	MAIN[24][28][22]
DRP[194] bit 13	MAIN[24][29][22]
DRP[194] bit 14	MAIN[24][28][23]
DRP[194] bit 15	MAIN[24][29][23]
DRP[195] bit 0	MAIN[24][28][24]
DRP[195] bit 1	MAIN[24][29][24]
DRP[195] bit 2	MAIN[24][28][25]
DRP[195] bit 3	MAIN[24][29][25]
DRP[195] bit 4	MAIN[24][28][26]
DRP[195] bit 5	MAIN[24][29][26]
DRP[195] bit 6	MAIN[24][28][27]
DRP[195] bit 7	MAIN[24][29][27]
DRP[195] bit 8	MAIN[24][28][28]
DRP[195] bit 9	MAIN[24][29][28]
DRP[195] bit 10	MAIN[24][28][29]
DRP[195] bit 11	MAIN[24][29][29]
DRP[195] bit 12	MAIN[24][28][30]
DRP[195] bit 13	MAIN[24][29][30]
DRP[195] bit 14	MAIN[24][28][31]
DRP[195] bit 15	MAIN[24][29][31]
DRP[196] bit 0	MAIN[24][28][32]
DRP[196] bit 1	MAIN[24][29][32]
DRP[196] bit 2	MAIN[24][28][33]
DRP[196] bit 3	MAIN[24][29][33]
DRP[196] bit 4	MAIN[24][28][34]
DRP[196] bit 5	MAIN[24][29][34]
DRP[196] bit 6	MAIN[24][28][35]
DRP[196] bit 7	MAIN[24][29][35]
DRP[196] bit 8	MAIN[24][28][36]
DRP[196] bit 9	MAIN[24][29][36]
DRP[196] bit 10	MAIN[24][28][37]
DRP[196] bit 11	MAIN[24][29][37]
DRP[196] bit 12	MAIN[24][28][38]
DRP[196] bit 13	MAIN[24][29][38]
DRP[196] bit 14	MAIN[24][28][39]
DRP[196] bit 15	MAIN[24][29][39]
DRP[197] bit 0	MAIN[24][28][40]
DRP[197] bit 1	MAIN[24][29][40]
DRP[197] bit 2	MAIN[24][28][41]
DRP[197] bit 3	MAIN[24][29][41]
DRP[197] bit 4	MAIN[24][28][42]
DRP[197] bit 5	MAIN[24][29][42]
DRP[197] bit 6	MAIN[24][28][43]
DRP[197] bit 7	MAIN[24][29][43]
DRP[197] bit 8	MAIN[24][28][44]
DRP[197] bit 9	MAIN[24][29][44]
DRP[197] bit 10	MAIN[24][28][45]
DRP[197] bit 11	MAIN[24][29][45]
DRP[197] bit 12	MAIN[24][28][46]
DRP[197] bit 13	MAIN[24][29][46]
DRP[197] bit 14	MAIN[24][28][47]
DRP[197] bit 15	MAIN[24][29][47]
DRP[198] bit 0	MAIN[24][28][48]
DRP[198] bit 1	MAIN[24][29][48]
DRP[198] bit 2	MAIN[24][28][49]
DRP[198] bit 3	MAIN[24][29][49]
DRP[198] bit 4	MAIN[24][28][50]
DRP[198] bit 5	MAIN[24][29][50]
DRP[198] bit 6	MAIN[24][28][51]
DRP[198] bit 7	MAIN[24][29][51]
DRP[198] bit 8	MAIN[24][28][52]
DRP[198] bit 9	MAIN[24][29][52]
DRP[198] bit 10	MAIN[24][28][53]
DRP[198] bit 11	MAIN[24][29][53]
DRP[198] bit 12	MAIN[24][28][54]
DRP[198] bit 13	MAIN[24][29][54]
DRP[198] bit 14	MAIN[24][28][55]
DRP[198] bit 15	MAIN[24][29][55]
DRP[199] bit 0	MAIN[24][28][56]
DRP[199] bit 1	MAIN[24][29][56]
DRP[199] bit 2	MAIN[24][28][57]
DRP[199] bit 3	MAIN[24][29][57]
DRP[199] bit 4	MAIN[24][28][58]
DRP[199] bit 5	MAIN[24][29][58]
DRP[199] bit 6	MAIN[24][28][59]
DRP[199] bit 7	MAIN[24][29][59]
DRP[199] bit 8	MAIN[24][28][60]
DRP[199] bit 9	MAIN[24][29][60]
DRP[199] bit 10	MAIN[24][28][61]
DRP[199] bit 11	MAIN[24][29][61]
DRP[199] bit 12	MAIN[24][28][62]
DRP[199] bit 13	MAIN[24][29][62]
DRP[199] bit 14	MAIN[24][28][63]
DRP[199] bit 15	MAIN[24][29][63]
DRP[200] bit 0	MAIN[25][28][0]
DRP[200] bit 1	MAIN[25][29][0]
DRP[200] bit 2	MAIN[25][28][1]
DRP[200] bit 3	MAIN[25][29][1]
DRP[200] bit 4	MAIN[25][28][2]
DRP[200] bit 5	MAIN[25][29][2]
DRP[200] bit 6	MAIN[25][28][3]
DRP[200] bit 7	MAIN[25][29][3]
DRP[200] bit 8	MAIN[25][28][4]
DRP[200] bit 9	MAIN[25][29][4]
DRP[200] bit 10	MAIN[25][28][5]
DRP[200] bit 11	MAIN[25][29][5]
DRP[200] bit 12	MAIN[25][28][6]
DRP[200] bit 13	MAIN[25][29][6]
DRP[200] bit 14	MAIN[25][28][7]
DRP[200] bit 15	MAIN[25][29][7]
DRP[201] bit 0	MAIN[25][28][8]
DRP[201] bit 1	MAIN[25][29][8]
DRP[201] bit 2	MAIN[25][28][9]
DRP[201] bit 3	MAIN[25][29][9]
DRP[201] bit 4	MAIN[25][28][10]
DRP[201] bit 5	MAIN[25][29][10]
DRP[201] bit 6	MAIN[25][28][11]
DRP[201] bit 7	MAIN[25][29][11]
DRP[201] bit 8	MAIN[25][28][12]
DRP[201] bit 9	MAIN[25][29][12]
DRP[201] bit 10	MAIN[25][28][13]
DRP[201] bit 11	MAIN[25][29][13]
DRP[201] bit 12	MAIN[25][28][14]
DRP[201] bit 13	MAIN[25][29][14]
DRP[201] bit 14	MAIN[25][28][15]
DRP[201] bit 15	MAIN[25][29][15]
DRP[202] bit 0	MAIN[25][28][16]
DRP[202] bit 1	MAIN[25][29][16]
DRP[202] bit 2	MAIN[25][28][17]
DRP[202] bit 3	MAIN[25][29][17]
DRP[202] bit 4	MAIN[25][28][18]
DRP[202] bit 5	MAIN[25][29][18]
DRP[202] bit 6	MAIN[25][28][19]
DRP[202] bit 7	MAIN[25][29][19]
DRP[202] bit 8	MAIN[25][28][20]
DRP[202] bit 9	MAIN[25][29][20]
DRP[202] bit 10	MAIN[25][28][21]
DRP[202] bit 11	MAIN[25][29][21]
DRP[202] bit 12	MAIN[25][28][22]
DRP[202] bit 13	MAIN[25][29][22]
DRP[202] bit 14	MAIN[25][28][23]
DRP[202] bit 15	MAIN[25][29][23]
DRP[203] bit 0	MAIN[25][28][24]
DRP[203] bit 1	MAIN[25][29][24]
DRP[203] bit 2	MAIN[25][28][25]
DRP[203] bit 3	MAIN[25][29][25]
DRP[203] bit 4	MAIN[25][28][26]
DRP[203] bit 5	MAIN[25][29][26]
DRP[203] bit 6	MAIN[25][28][27]
DRP[203] bit 7	MAIN[25][29][27]
DRP[203] bit 8	MAIN[25][28][28]
DRP[203] bit 9	MAIN[25][29][28]
DRP[203] bit 10	MAIN[25][28][29]
DRP[203] bit 11	MAIN[25][29][29]
DRP[203] bit 12	MAIN[25][28][30]
DRP[203] bit 13	MAIN[25][29][30]
DRP[203] bit 14	MAIN[25][28][31]
DRP[203] bit 15	MAIN[25][29][31]
DRP[204] bit 0	MAIN[25][28][32]
DRP[204] bit 1	MAIN[25][29][32]
DRP[204] bit 2	MAIN[25][28][33]
DRP[204] bit 3	MAIN[25][29][33]
DRP[204] bit 4	MAIN[25][28][34]
DRP[204] bit 5	MAIN[25][29][34]
DRP[204] bit 6	MAIN[25][28][35]
DRP[204] bit 7	MAIN[25][29][35]
DRP[204] bit 8	MAIN[25][28][36]
DRP[204] bit 9	MAIN[25][29][36]
DRP[204] bit 10	MAIN[25][28][37]
DRP[204] bit 11	MAIN[25][29][37]
DRP[204] bit 12	MAIN[25][28][38]
DRP[204] bit 13	MAIN[25][29][38]
DRP[204] bit 14	MAIN[25][28][39]
DRP[204] bit 15	MAIN[25][29][39]
DRP[205] bit 0	MAIN[25][28][40]
DRP[205] bit 1	MAIN[25][29][40]
DRP[205] bit 2	MAIN[25][28][41]
DRP[205] bit 3	MAIN[25][29][41]
DRP[205] bit 4	MAIN[25][28][42]
DRP[205] bit 5	MAIN[25][29][42]
DRP[205] bit 6	MAIN[25][28][43]
DRP[205] bit 7	MAIN[25][29][43]
DRP[205] bit 8	MAIN[25][28][44]
DRP[205] bit 9	MAIN[25][29][44]
DRP[205] bit 10	MAIN[25][28][45]
DRP[205] bit 11	MAIN[25][29][45]
DRP[205] bit 12	MAIN[25][28][46]
DRP[205] bit 13	MAIN[25][29][46]
DRP[205] bit 14	MAIN[25][28][47]
DRP[205] bit 15	MAIN[25][29][47]
DRP[206] bit 0	MAIN[25][28][48]
DRP[206] bit 1	MAIN[25][29][48]
DRP[206] bit 2	MAIN[25][28][49]
DRP[206] bit 3	MAIN[25][29][49]
DRP[206] bit 4	MAIN[25][28][50]
DRP[206] bit 5	MAIN[25][29][50]
DRP[206] bit 6	MAIN[25][28][51]
DRP[206] bit 7	MAIN[25][29][51]
DRP[206] bit 8	MAIN[25][28][52]
DRP[206] bit 9	MAIN[25][29][52]
DRP[206] bit 10	MAIN[25][28][53]
DRP[206] bit 11	MAIN[25][29][53]
DRP[206] bit 12	MAIN[25][28][54]
DRP[206] bit 13	MAIN[25][29][54]
DRP[206] bit 14	MAIN[25][28][55]
DRP[206] bit 15	MAIN[25][29][55]
DRP[207] bit 0	MAIN[25][28][56]
DRP[207] bit 1	MAIN[25][29][56]
DRP[207] bit 2	MAIN[25][28][57]
DRP[207] bit 3	MAIN[25][29][57]
DRP[207] bit 4	MAIN[25][28][58]
DRP[207] bit 5	MAIN[25][29][58]
DRP[207] bit 6	MAIN[25][28][59]
DRP[207] bit 7	MAIN[25][29][59]
DRP[207] bit 8	MAIN[25][28][60]
DRP[207] bit 9	MAIN[25][29][60]
DRP[207] bit 10	MAIN[25][28][61]
DRP[207] bit 11	MAIN[25][29][61]
DRP[207] bit 12	MAIN[25][28][62]
DRP[207] bit 13	MAIN[25][29][62]
DRP[207] bit 14	MAIN[25][28][63]
DRP[207] bit 15	MAIN[25][29][63]
DRP[208] bit 0	MAIN[26][28][0]
DRP[208] bit 1	MAIN[26][29][0]
DRP[208] bit 2	MAIN[26][28][1]
DRP[208] bit 3	MAIN[26][29][1]
DRP[208] bit 4	MAIN[26][28][2]
DRP[208] bit 5	MAIN[26][29][2]
DRP[208] bit 6	MAIN[26][28][3]
DRP[208] bit 7	MAIN[26][29][3]
DRP[208] bit 8	MAIN[26][28][4]
DRP[208] bit 9	MAIN[26][29][4]
DRP[208] bit 10	MAIN[26][28][5]
DRP[208] bit 11	MAIN[26][29][5]
DRP[208] bit 12	MAIN[26][28][6]
DRP[208] bit 13	MAIN[26][29][6]
DRP[208] bit 14	MAIN[26][28][7]
DRP[208] bit 15	MAIN[26][29][7]
DRP[209] bit 0	MAIN[26][28][8]
DRP[209] bit 1	MAIN[26][29][8]
DRP[209] bit 2	MAIN[26][28][9]
DRP[209] bit 3	MAIN[26][29][9]
DRP[209] bit 4	MAIN[26][28][10]
DRP[209] bit 5	MAIN[26][29][10]
DRP[209] bit 6	MAIN[26][28][11]
DRP[209] bit 7	MAIN[26][29][11]
DRP[209] bit 8	MAIN[26][28][12]
DRP[209] bit 9	MAIN[26][29][12]
DRP[209] bit 10	MAIN[26][28][13]
DRP[209] bit 11	MAIN[26][29][13]
DRP[209] bit 12	MAIN[26][28][14]
DRP[209] bit 13	MAIN[26][29][14]
DRP[209] bit 14	MAIN[26][28][15]
DRP[209] bit 15	MAIN[26][29][15]
DRP[210] bit 0	MAIN[26][28][16]
DRP[210] bit 1	MAIN[26][29][16]
DRP[210] bit 2	MAIN[26][28][17]
DRP[210] bit 3	MAIN[26][29][17]
DRP[210] bit 4	MAIN[26][28][18]
DRP[210] bit 5	MAIN[26][29][18]
DRP[210] bit 6	MAIN[26][28][19]
DRP[210] bit 7	MAIN[26][29][19]
DRP[210] bit 8	MAIN[26][28][20]
DRP[210] bit 9	MAIN[26][29][20]
DRP[210] bit 10	MAIN[26][28][21]
DRP[210] bit 11	MAIN[26][29][21]
DRP[210] bit 12	MAIN[26][28][22]
DRP[210] bit 13	MAIN[26][29][22]
DRP[210] bit 14	MAIN[26][28][23]
DRP[210] bit 15	MAIN[26][29][23]
DRP[211] bit 0	MAIN[26][28][24]
DRP[211] bit 1	MAIN[26][29][24]
DRP[211] bit 2	MAIN[26][28][25]
DRP[211] bit 3	MAIN[26][29][25]
DRP[211] bit 4	MAIN[26][28][26]
DRP[211] bit 5	MAIN[26][29][26]
DRP[211] bit 6	MAIN[26][28][27]
DRP[211] bit 7	MAIN[26][29][27]
DRP[211] bit 8	MAIN[26][28][28]
DRP[211] bit 9	MAIN[26][29][28]
DRP[211] bit 10	MAIN[26][28][29]
DRP[211] bit 11	MAIN[26][29][29]
DRP[211] bit 12	MAIN[26][28][30]
DRP[211] bit 13	MAIN[26][29][30]
DRP[211] bit 14	MAIN[26][28][31]
DRP[211] bit 15	MAIN[26][29][31]
DRP[212] bit 0	MAIN[26][28][32]
DRP[212] bit 1	MAIN[26][29][32]
DRP[212] bit 2	MAIN[26][28][33]
DRP[212] bit 3	MAIN[26][29][33]
DRP[212] bit 4	MAIN[26][28][34]
DRP[212] bit 5	MAIN[26][29][34]
DRP[212] bit 6	MAIN[26][28][35]
DRP[212] bit 7	MAIN[26][29][35]
DRP[212] bit 8	MAIN[26][28][36]
DRP[212] bit 9	MAIN[26][29][36]
DRP[212] bit 10	MAIN[26][28][37]
DRP[212] bit 11	MAIN[26][29][37]
DRP[212] bit 12	MAIN[26][28][38]
DRP[212] bit 13	MAIN[26][29][38]
DRP[212] bit 14	MAIN[26][28][39]
DRP[212] bit 15	MAIN[26][29][39]
DRP[213] bit 0	MAIN[26][28][40]
DRP[213] bit 1	MAIN[26][29][40]
DRP[213] bit 2	MAIN[26][28][41]
DRP[213] bit 3	MAIN[26][29][41]
DRP[213] bit 4	MAIN[26][28][42]
DRP[213] bit 5	MAIN[26][29][42]
DRP[213] bit 6	MAIN[26][28][43]
DRP[213] bit 7	MAIN[26][29][43]
DRP[213] bit 8	MAIN[26][28][44]
DRP[213] bit 9	MAIN[26][29][44]
DRP[213] bit 10	MAIN[26][28][45]
DRP[213] bit 11	MAIN[26][29][45]
DRP[213] bit 12	MAIN[26][28][46]
DRP[213] bit 13	MAIN[26][29][46]
DRP[213] bit 14	MAIN[26][28][47]
DRP[213] bit 15	MAIN[26][29][47]
DRP[214] bit 0	MAIN[26][28][48]
DRP[214] bit 1	MAIN[26][29][48]
DRP[214] bit 2	MAIN[26][28][49]
DRP[214] bit 3	MAIN[26][29][49]
DRP[214] bit 4	MAIN[26][28][50]
DRP[214] bit 5	MAIN[26][29][50]
DRP[214] bit 6	MAIN[26][28][51]
DRP[214] bit 7	MAIN[26][29][51]
DRP[214] bit 8	MAIN[26][28][52]
DRP[214] bit 9	MAIN[26][29][52]
DRP[214] bit 10	MAIN[26][28][53]
DRP[214] bit 11	MAIN[26][29][53]
DRP[214] bit 12	MAIN[26][28][54]
DRP[214] bit 13	MAIN[26][29][54]
DRP[214] bit 14	MAIN[26][28][55]
DRP[214] bit 15	MAIN[26][29][55]
DRP[215] bit 0	MAIN[26][28][56]
DRP[215] bit 1	MAIN[26][29][56]
DRP[215] bit 2	MAIN[26][28][57]
DRP[215] bit 3	MAIN[26][29][57]
DRP[215] bit 4	MAIN[26][28][58]
DRP[215] bit 5	MAIN[26][29][58]
DRP[215] bit 6	MAIN[26][28][59]
DRP[215] bit 7	MAIN[26][29][59]
DRP[215] bit 8	MAIN[26][28][60]
DRP[215] bit 9	MAIN[26][29][60]
DRP[215] bit 10	MAIN[26][28][61]
DRP[215] bit 11	MAIN[26][29][61]
DRP[215] bit 12	MAIN[26][28][62]
DRP[215] bit 13	MAIN[26][29][62]
DRP[215] bit 14	MAIN[26][28][63]
DRP[215] bit 15	MAIN[26][29][63]
DRP[216] bit 0	MAIN[27][28][0]
DRP[216] bit 1	MAIN[27][29][0]
DRP[216] bit 2	MAIN[27][28][1]
DRP[216] bit 3	MAIN[27][29][1]
DRP[216] bit 4	MAIN[27][28][2]
DRP[216] bit 5	MAIN[27][29][2]
DRP[216] bit 6	MAIN[27][28][3]
DRP[216] bit 7	MAIN[27][29][3]
DRP[216] bit 8	MAIN[27][28][4]
DRP[216] bit 9	MAIN[27][29][4]
DRP[216] bit 10	MAIN[27][28][5]
DRP[216] bit 11	MAIN[27][29][5]
DRP[216] bit 12	MAIN[27][28][6]
DRP[216] bit 13	MAIN[27][29][6]
DRP[216] bit 14	MAIN[27][28][7]
DRP[216] bit 15	MAIN[27][29][7]
DRP[217] bit 0	MAIN[27][28][8]
DRP[217] bit 1	MAIN[27][29][8]
DRP[217] bit 2	MAIN[27][28][9]
DRP[217] bit 3	MAIN[27][29][9]
DRP[217] bit 4	MAIN[27][28][10]
DRP[217] bit 5	MAIN[27][29][10]
DRP[217] bit 6	MAIN[27][28][11]
DRP[217] bit 7	MAIN[27][29][11]
DRP[217] bit 8	MAIN[27][28][12]
DRP[217] bit 9	MAIN[27][29][12]
DRP[217] bit 10	MAIN[27][28][13]
DRP[217] bit 11	MAIN[27][29][13]
DRP[217] bit 12	MAIN[27][28][14]
DRP[217] bit 13	MAIN[27][29][14]
DRP[217] bit 14	MAIN[27][28][15]
DRP[217] bit 15	MAIN[27][29][15]
DRP[218] bit 0	MAIN[27][28][16]
DRP[218] bit 1	MAIN[27][29][16]
DRP[218] bit 2	MAIN[27][28][17]
DRP[218] bit 3	MAIN[27][29][17]
DRP[218] bit 4	MAIN[27][28][18]
DRP[218] bit 5	MAIN[27][29][18]
DRP[218] bit 6	MAIN[27][28][19]
DRP[218] bit 7	MAIN[27][29][19]
DRP[218] bit 8	MAIN[27][28][20]
DRP[218] bit 9	MAIN[27][29][20]
DRP[218] bit 10	MAIN[27][28][21]
DRP[218] bit 11	MAIN[27][29][21]
DRP[218] bit 12	MAIN[27][28][22]
DRP[218] bit 13	MAIN[27][29][22]
DRP[218] bit 14	MAIN[27][28][23]
DRP[218] bit 15	MAIN[27][29][23]
DRP[219] bit 0	MAIN[27][28][24]
DRP[219] bit 1	MAIN[27][29][24]
DRP[219] bit 2	MAIN[27][28][25]
DRP[219] bit 3	MAIN[27][29][25]
DRP[219] bit 4	MAIN[27][28][26]
DRP[219] bit 5	MAIN[27][29][26]
DRP[219] bit 6	MAIN[27][28][27]
DRP[219] bit 7	MAIN[27][29][27]
DRP[219] bit 8	MAIN[27][28][28]
DRP[219] bit 9	MAIN[27][29][28]
DRP[219] bit 10	MAIN[27][28][29]
DRP[219] bit 11	MAIN[27][29][29]
DRP[219] bit 12	MAIN[27][28][30]
DRP[219] bit 13	MAIN[27][29][30]
DRP[219] bit 14	MAIN[27][28][31]
DRP[219] bit 15	MAIN[27][29][31]
DRP[220] bit 0	MAIN[27][28][32]
DRP[220] bit 1	MAIN[27][29][32]
DRP[220] bit 2	MAIN[27][28][33]
DRP[220] bit 3	MAIN[27][29][33]
DRP[220] bit 4	MAIN[27][28][34]
DRP[220] bit 5	MAIN[27][29][34]
DRP[220] bit 6	MAIN[27][28][35]
DRP[220] bit 7	MAIN[27][29][35]
DRP[220] bit 8	MAIN[27][28][36]
DRP[220] bit 9	MAIN[27][29][36]
DRP[220] bit 10	MAIN[27][28][37]
DRP[220] bit 11	MAIN[27][29][37]
DRP[220] bit 12	MAIN[27][28][38]
DRP[220] bit 13	MAIN[27][29][38]
DRP[220] bit 14	MAIN[27][28][39]
DRP[220] bit 15	MAIN[27][29][39]
DRP[221] bit 0	MAIN[27][28][40]
DRP[221] bit 1	MAIN[27][29][40]
DRP[221] bit 2	MAIN[27][28][41]
DRP[221] bit 3	MAIN[27][29][41]
DRP[221] bit 4	MAIN[27][28][42]
DRP[221] bit 5	MAIN[27][29][42]
DRP[221] bit 6	MAIN[27][28][43]
DRP[221] bit 7	MAIN[27][29][43]
DRP[221] bit 8	MAIN[27][28][44]
DRP[221] bit 9	MAIN[27][29][44]
DRP[221] bit 10	MAIN[27][28][45]
DRP[221] bit 11	MAIN[27][29][45]
DRP[221] bit 12	MAIN[27][28][46]
DRP[221] bit 13	MAIN[27][29][46]
DRP[221] bit 14	MAIN[27][28][47]
DRP[221] bit 15	MAIN[27][29][47]
DRP[222] bit 0	MAIN[27][28][48]
DRP[222] bit 1	MAIN[27][29][48]
DRP[222] bit 2	MAIN[27][28][49]
DRP[222] bit 3	MAIN[27][29][49]
DRP[222] bit 4	MAIN[27][28][50]
DRP[222] bit 5	MAIN[27][29][50]
DRP[222] bit 6	MAIN[27][28][51]
DRP[222] bit 7	MAIN[27][29][51]
DRP[222] bit 8	MAIN[27][28][52]
DRP[222] bit 9	MAIN[27][29][52]
DRP[222] bit 10	MAIN[27][28][53]
DRP[222] bit 11	MAIN[27][29][53]
DRP[222] bit 12	MAIN[27][28][54]
DRP[222] bit 13	MAIN[27][29][54]
DRP[222] bit 14	MAIN[27][28][55]
DRP[222] bit 15	MAIN[27][29][55]
DRP[223] bit 0	MAIN[27][28][56]
DRP[223] bit 1	MAIN[27][29][56]
DRP[223] bit 2	MAIN[27][28][57]
DRP[223] bit 3	MAIN[27][29][57]
DRP[223] bit 4	MAIN[27][28][58]
DRP[223] bit 5	MAIN[27][29][58]
DRP[223] bit 6	MAIN[27][28][59]
DRP[223] bit 7	MAIN[27][29][59]
DRP[223] bit 8	MAIN[27][28][60]
DRP[223] bit 9	MAIN[27][29][60]
DRP[223] bit 10	MAIN[27][28][61]
DRP[223] bit 11	MAIN[27][29][61]
DRP[223] bit 12	MAIN[27][28][62]
DRP[223] bit 13	MAIN[27][29][62]
DRP[223] bit 14	MAIN[27][28][63]
DRP[223] bit 15	MAIN[27][29][63]
DRP[224] bit 0	MAIN[28][28][0]
DRP[224] bit 1	MAIN[28][29][0]
DRP[224] bit 2	MAIN[28][28][1]
DRP[224] bit 3	MAIN[28][29][1]
DRP[224] bit 4	MAIN[28][28][2]
DRP[224] bit 5	MAIN[28][29][2]
DRP[224] bit 6	MAIN[28][28][3]
DRP[224] bit 7	MAIN[28][29][3]
DRP[224] bit 8	MAIN[28][28][4]
DRP[224] bit 9	MAIN[28][29][4]
DRP[224] bit 10	MAIN[28][28][5]
DRP[224] bit 11	MAIN[28][29][5]
DRP[224] bit 12	MAIN[28][28][6]
DRP[224] bit 13	MAIN[28][29][6]
DRP[224] bit 14	MAIN[28][28][7]
DRP[224] bit 15	MAIN[28][29][7]
DRP[225] bit 0	MAIN[28][28][8]
DRP[225] bit 1	MAIN[28][29][8]
DRP[225] bit 2	MAIN[28][28][9]
DRP[225] bit 3	MAIN[28][29][9]
DRP[225] bit 4	MAIN[28][28][10]
DRP[225] bit 5	MAIN[28][29][10]
DRP[225] bit 6	MAIN[28][28][11]
DRP[225] bit 7	MAIN[28][29][11]
DRP[225] bit 8	MAIN[28][28][12]
DRP[225] bit 9	MAIN[28][29][12]
DRP[225] bit 10	MAIN[28][28][13]
DRP[225] bit 11	MAIN[28][29][13]
DRP[225] bit 12	MAIN[28][28][14]
DRP[225] bit 13	MAIN[28][29][14]
DRP[225] bit 14	MAIN[28][28][15]
DRP[225] bit 15	MAIN[28][29][15]
DRP[226] bit 0	MAIN[28][28][16]
DRP[226] bit 1	MAIN[28][29][16]
DRP[226] bit 2	MAIN[28][28][17]
DRP[226] bit 3	MAIN[28][29][17]
DRP[226] bit 4	MAIN[28][28][18]
DRP[226] bit 5	MAIN[28][29][18]
DRP[226] bit 6	MAIN[28][28][19]
DRP[226] bit 7	MAIN[28][29][19]
DRP[226] bit 8	MAIN[28][28][20]
DRP[226] bit 9	MAIN[28][29][20]
DRP[226] bit 10	MAIN[28][28][21]
DRP[226] bit 11	MAIN[28][29][21]
DRP[226] bit 12	MAIN[28][28][22]
DRP[226] bit 13	MAIN[28][29][22]
DRP[226] bit 14	MAIN[28][28][23]
DRP[226] bit 15	MAIN[28][29][23]
DRP[227] bit 0	MAIN[28][28][24]
DRP[227] bit 1	MAIN[28][29][24]
DRP[227] bit 2	MAIN[28][28][25]
DRP[227] bit 3	MAIN[28][29][25]
DRP[227] bit 4	MAIN[28][28][26]
DRP[227] bit 5	MAIN[28][29][26]
DRP[227] bit 6	MAIN[28][28][27]
DRP[227] bit 7	MAIN[28][29][27]
DRP[227] bit 8	MAIN[28][28][28]
DRP[227] bit 9	MAIN[28][29][28]
DRP[227] bit 10	MAIN[28][28][29]
DRP[227] bit 11	MAIN[28][29][29]
DRP[227] bit 12	MAIN[28][28][30]
DRP[227] bit 13	MAIN[28][29][30]
DRP[227] bit 14	MAIN[28][28][31]
DRP[227] bit 15	MAIN[28][29][31]
DRP[228] bit 0	MAIN[28][28][32]
DRP[228] bit 1	MAIN[28][29][32]
DRP[228] bit 2	MAIN[28][28][33]
DRP[228] bit 3	MAIN[28][29][33]
DRP[228] bit 4	MAIN[28][28][34]
DRP[228] bit 5	MAIN[28][29][34]
DRP[228] bit 6	MAIN[28][28][35]
DRP[228] bit 7	MAIN[28][29][35]
DRP[228] bit 8	MAIN[28][28][36]
DRP[228] bit 9	MAIN[28][29][36]
DRP[228] bit 10	MAIN[28][28][37]
DRP[228] bit 11	MAIN[28][29][37]
DRP[228] bit 12	MAIN[28][28][38]
DRP[228] bit 13	MAIN[28][29][38]
DRP[228] bit 14	MAIN[28][28][39]
DRP[228] bit 15	MAIN[28][29][39]
DRP[229] bit 0	MAIN[28][28][40]
DRP[229] bit 1	MAIN[28][29][40]
DRP[229] bit 2	MAIN[28][28][41]
DRP[229] bit 3	MAIN[28][29][41]
DRP[229] bit 4	MAIN[28][28][42]
DRP[229] bit 5	MAIN[28][29][42]
DRP[229] bit 6	MAIN[28][28][43]
DRP[229] bit 7	MAIN[28][29][43]
DRP[229] bit 8	MAIN[28][28][44]
DRP[229] bit 9	MAIN[28][29][44]
DRP[229] bit 10	MAIN[28][28][45]
DRP[229] bit 11	MAIN[28][29][45]
DRP[229] bit 12	MAIN[28][28][46]
DRP[229] bit 13	MAIN[28][29][46]
DRP[229] bit 14	MAIN[28][28][47]
DRP[229] bit 15	MAIN[28][29][47]
DRP[230] bit 0	MAIN[28][28][48]
DRP[230] bit 1	MAIN[28][29][48]
DRP[230] bit 2	MAIN[28][28][49]
DRP[230] bit 3	MAIN[28][29][49]
DRP[230] bit 4	MAIN[28][28][50]
DRP[230] bit 5	MAIN[28][29][50]
DRP[230] bit 6	MAIN[28][28][51]
DRP[230] bit 7	MAIN[28][29][51]
DRP[230] bit 8	MAIN[28][28][52]
DRP[230] bit 9	MAIN[28][29][52]
DRP[230] bit 10	MAIN[28][28][53]
DRP[230] bit 11	MAIN[28][29][53]
DRP[230] bit 12	MAIN[28][28][54]
DRP[230] bit 13	MAIN[28][29][54]
DRP[230] bit 14	MAIN[28][28][55]
DRP[230] bit 15	MAIN[28][29][55]
DRP[231] bit 0	MAIN[28][28][56]
DRP[231] bit 1	MAIN[28][29][56]
DRP[231] bit 2	MAIN[28][28][57]
DRP[231] bit 3	MAIN[28][29][57]
DRP[231] bit 4	MAIN[28][28][58]
DRP[231] bit 5	MAIN[28][29][58]
DRP[231] bit 6	MAIN[28][28][59]
DRP[231] bit 7	MAIN[28][29][59]
DRP[231] bit 8	MAIN[28][28][60]
DRP[231] bit 9	MAIN[28][29][60]
DRP[231] bit 10	MAIN[28][28][61]
DRP[231] bit 11	MAIN[28][29][61]
DRP[231] bit 12	MAIN[28][28][62]
DRP[231] bit 13	MAIN[28][29][62]
DRP[231] bit 14	MAIN[28][28][63]
DRP[231] bit 15	MAIN[28][29][63]
DRP[232] bit 0	MAIN[29][28][0]
DRP[232] bit 1	MAIN[29][29][0]
DRP[232] bit 2	MAIN[29][28][1]
DRP[232] bit 3	MAIN[29][29][1]
DRP[232] bit 4	MAIN[29][28][2]
DRP[232] bit 5	MAIN[29][29][2]
DRP[232] bit 6	MAIN[29][28][3]
DRP[232] bit 7	MAIN[29][29][3]
DRP[232] bit 8	MAIN[29][28][4]
DRP[232] bit 9	MAIN[29][29][4]
DRP[232] bit 10	MAIN[29][28][5]
DRP[232] bit 11	MAIN[29][29][5]
DRP[232] bit 12	MAIN[29][28][6]
DRP[232] bit 13	MAIN[29][29][6]
DRP[232] bit 14	MAIN[29][28][7]
DRP[232] bit 15	MAIN[29][29][7]
DRP[233] bit 0	MAIN[29][28][8]
DRP[233] bit 1	MAIN[29][29][8]
DRP[233] bit 2	MAIN[29][28][9]
DRP[233] bit 3	MAIN[29][29][9]
DRP[233] bit 4	MAIN[29][28][10]
DRP[233] bit 5	MAIN[29][29][10]
DRP[233] bit 6	MAIN[29][28][11]
DRP[233] bit 7	MAIN[29][29][11]
DRP[233] bit 8	MAIN[29][28][12]
DRP[233] bit 9	MAIN[29][29][12]
DRP[233] bit 10	MAIN[29][28][13]
DRP[233] bit 11	MAIN[29][29][13]
DRP[233] bit 12	MAIN[29][28][14]
DRP[233] bit 13	MAIN[29][29][14]
DRP[233] bit 14	MAIN[29][28][15]
DRP[233] bit 15	MAIN[29][29][15]
DRP[234] bit 0	MAIN[29][28][16]
DRP[234] bit 1	MAIN[29][29][16]
DRP[234] bit 2	MAIN[29][28][17]
DRP[234] bit 3	MAIN[29][29][17]
DRP[234] bit 4	MAIN[29][28][18]
DRP[234] bit 5	MAIN[29][29][18]
DRP[234] bit 6	MAIN[29][28][19]
DRP[234] bit 7	MAIN[29][29][19]
DRP[234] bit 8	MAIN[29][28][20]
DRP[234] bit 9	MAIN[29][29][20]
DRP[234] bit 10	MAIN[29][28][21]
DRP[234] bit 11	MAIN[29][29][21]
DRP[234] bit 12	MAIN[29][28][22]
DRP[234] bit 13	MAIN[29][29][22]
DRP[234] bit 14	MAIN[29][28][23]
DRP[234] bit 15	MAIN[29][29][23]
DRP[235] bit 0	MAIN[29][28][24]
DRP[235] bit 1	MAIN[29][29][24]
DRP[235] bit 2	MAIN[29][28][25]
DRP[235] bit 3	MAIN[29][29][25]
DRP[235] bit 4	MAIN[29][28][26]
DRP[235] bit 5	MAIN[29][29][26]
DRP[235] bit 6	MAIN[29][28][27]
DRP[235] bit 7	MAIN[29][29][27]
DRP[235] bit 8	MAIN[29][28][28]
DRP[235] bit 9	MAIN[29][29][28]
DRP[235] bit 10	MAIN[29][28][29]
DRP[235] bit 11	MAIN[29][29][29]
DRP[235] bit 12	MAIN[29][28][30]
DRP[235] bit 13	MAIN[29][29][30]
DRP[235] bit 14	MAIN[29][28][31]
DRP[235] bit 15	MAIN[29][29][31]
DRP[236] bit 0	MAIN[29][28][32]
DRP[236] bit 1	MAIN[29][29][32]
DRP[236] bit 2	MAIN[29][28][33]
DRP[236] bit 3	MAIN[29][29][33]
DRP[236] bit 4	MAIN[29][28][34]
DRP[236] bit 5	MAIN[29][29][34]
DRP[236] bit 6	MAIN[29][28][35]
DRP[236] bit 7	MAIN[29][29][35]
DRP[236] bit 8	MAIN[29][28][36]
DRP[236] bit 9	MAIN[29][29][36]
DRP[236] bit 10	MAIN[29][28][37]
DRP[236] bit 11	MAIN[29][29][37]
DRP[236] bit 12	MAIN[29][28][38]
DRP[236] bit 13	MAIN[29][29][38]
DRP[236] bit 14	MAIN[29][28][39]
DRP[236] bit 15	MAIN[29][29][39]
DRP[237] bit 0	MAIN[29][28][40]
DRP[237] bit 1	MAIN[29][29][40]
DRP[237] bit 2	MAIN[29][28][41]
DRP[237] bit 3	MAIN[29][29][41]
DRP[237] bit 4	MAIN[29][28][42]
DRP[237] bit 5	MAIN[29][29][42]
DRP[237] bit 6	MAIN[29][28][43]
DRP[237] bit 7	MAIN[29][29][43]
DRP[237] bit 8	MAIN[29][28][44]
DRP[237] bit 9	MAIN[29][29][44]
DRP[237] bit 10	MAIN[29][28][45]
DRP[237] bit 11	MAIN[29][29][45]
DRP[237] bit 12	MAIN[29][28][46]
DRP[237] bit 13	MAIN[29][29][46]
DRP[237] bit 14	MAIN[29][28][47]
DRP[237] bit 15	MAIN[29][29][47]
DRP[238] bit 0	MAIN[29][28][48]
DRP[238] bit 1	MAIN[29][29][48]
DRP[238] bit 2	MAIN[29][28][49]
DRP[238] bit 3	MAIN[29][29][49]
DRP[238] bit 4	MAIN[29][28][50]
DRP[238] bit 5	MAIN[29][29][50]
DRP[238] bit 6	MAIN[29][28][51]
DRP[238] bit 7	MAIN[29][29][51]
DRP[238] bit 8	MAIN[29][28][52]
DRP[238] bit 9	MAIN[29][29][52]
DRP[238] bit 10	MAIN[29][28][53]
DRP[238] bit 11	MAIN[29][29][53]
DRP[238] bit 12	MAIN[29][28][54]
DRP[238] bit 13	MAIN[29][29][54]
DRP[238] bit 14	MAIN[29][28][55]
DRP[238] bit 15	MAIN[29][29][55]
DRP[239] bit 0	MAIN[29][28][56]
DRP[239] bit 1	MAIN[29][29][56]
DRP[239] bit 2	MAIN[29][28][57]
DRP[239] bit 3	MAIN[29][29][57]
DRP[239] bit 4	MAIN[29][28][58]
DRP[239] bit 5	MAIN[29][29][58]
DRP[239] bit 6	MAIN[29][28][59]
DRP[239] bit 7	MAIN[29][29][59]
DRP[239] bit 8	MAIN[29][28][60]
DRP[239] bit 9	MAIN[29][29][60]
DRP[239] bit 10	MAIN[29][28][61]
DRP[239] bit 11	MAIN[29][29][61]
DRP[239] bit 12	MAIN[29][28][62]
DRP[239] bit 13	MAIN[29][29][62]
DRP[239] bit 14	MAIN[29][28][63]
DRP[239] bit 15	MAIN[29][29][63]
DRP[240] bit 0	MAIN[30][28][0]
DRP[240] bit 1	MAIN[30][29][0]
DRP[240] bit 2	MAIN[30][28][1]
DRP[240] bit 3	MAIN[30][29][1]
DRP[240] bit 4	MAIN[30][28][2]
DRP[240] bit 5	MAIN[30][29][2]
DRP[240] bit 6	MAIN[30][28][3]
DRP[240] bit 7	MAIN[30][29][3]
DRP[240] bit 8	MAIN[30][28][4]
DRP[240] bit 9	MAIN[30][29][4]
DRP[240] bit 10	MAIN[30][28][5]
DRP[240] bit 11	MAIN[30][29][5]
DRP[240] bit 12	MAIN[30][28][6]
DRP[240] bit 13	MAIN[30][29][6]
DRP[240] bit 14	MAIN[30][28][7]
DRP[240] bit 15	MAIN[30][29][7]
DRP[241] bit 0	MAIN[30][28][8]
DRP[241] bit 1	MAIN[30][29][8]
DRP[241] bit 2	MAIN[30][28][9]
DRP[241] bit 3	MAIN[30][29][9]
DRP[241] bit 4	MAIN[30][28][10]
DRP[241] bit 5	MAIN[30][29][10]
DRP[241] bit 6	MAIN[30][28][11]
DRP[241] bit 7	MAIN[30][29][11]
DRP[241] bit 8	MAIN[30][28][12]
DRP[241] bit 9	MAIN[30][29][12]
DRP[241] bit 10	MAIN[30][28][13]
DRP[241] bit 11	MAIN[30][29][13]
DRP[241] bit 12	MAIN[30][28][14]
DRP[241] bit 13	MAIN[30][29][14]
DRP[241] bit 14	MAIN[30][28][15]
DRP[241] bit 15	MAIN[30][29][15]
DRP[242] bit 0	MAIN[30][28][16]
DRP[242] bit 1	MAIN[30][29][16]
DRP[242] bit 2	MAIN[30][28][17]
DRP[242] bit 3	MAIN[30][29][17]
DRP[242] bit 4	MAIN[30][28][18]
DRP[242] bit 5	MAIN[30][29][18]
DRP[242] bit 6	MAIN[30][28][19]
DRP[242] bit 7	MAIN[30][29][19]
DRP[242] bit 8	MAIN[30][28][20]
DRP[242] bit 9	MAIN[30][29][20]
DRP[242] bit 10	MAIN[30][28][21]
DRP[242] bit 11	MAIN[30][29][21]
DRP[242] bit 12	MAIN[30][28][22]
DRP[242] bit 13	MAIN[30][29][22]
DRP[242] bit 14	MAIN[30][28][23]
DRP[242] bit 15	MAIN[30][29][23]
DRP[243] bit 0	MAIN[30][28][24]
DRP[243] bit 1	MAIN[30][29][24]
DRP[243] bit 2	MAIN[30][28][25]
DRP[243] bit 3	MAIN[30][29][25]
DRP[243] bit 4	MAIN[30][28][26]
DRP[243] bit 5	MAIN[30][29][26]
DRP[243] bit 6	MAIN[30][28][27]
DRP[243] bit 7	MAIN[30][29][27]
DRP[243] bit 8	MAIN[30][28][28]
DRP[243] bit 9	MAIN[30][29][28]
DRP[243] bit 10	MAIN[30][28][29]
DRP[243] bit 11	MAIN[30][29][29]
DRP[243] bit 12	MAIN[30][28][30]
DRP[243] bit 13	MAIN[30][29][30]
DRP[243] bit 14	MAIN[30][28][31]
DRP[243] bit 15	MAIN[30][29][31]
DRP[244] bit 0	MAIN[30][28][32]
DRP[244] bit 1	MAIN[30][29][32]
DRP[244] bit 2	MAIN[30][28][33]
DRP[244] bit 3	MAIN[30][29][33]
DRP[244] bit 4	MAIN[30][28][34]
DRP[244] bit 5	MAIN[30][29][34]
DRP[244] bit 6	MAIN[30][28][35]
DRP[244] bit 7	MAIN[30][29][35]
DRP[244] bit 8	MAIN[30][28][36]
DRP[244] bit 9	MAIN[30][29][36]
DRP[244] bit 10	MAIN[30][28][37]
DRP[244] bit 11	MAIN[30][29][37]
DRP[244] bit 12	MAIN[30][28][38]
DRP[244] bit 13	MAIN[30][29][38]
DRP[244] bit 14	MAIN[30][28][39]
DRP[244] bit 15	MAIN[30][29][39]
DRP[245] bit 0	MAIN[30][28][40]
DRP[245] bit 1	MAIN[30][29][40]
DRP[245] bit 2	MAIN[30][28][41]
DRP[245] bit 3	MAIN[30][29][41]
DRP[245] bit 4	MAIN[30][28][42]
DRP[245] bit 5	MAIN[30][29][42]
DRP[245] bit 6	MAIN[30][28][43]
DRP[245] bit 7	MAIN[30][29][43]
DRP[245] bit 8	MAIN[30][28][44]
DRP[245] bit 9	MAIN[30][29][44]
DRP[245] bit 10	MAIN[30][28][45]
DRP[245] bit 11	MAIN[30][29][45]
DRP[245] bit 12	MAIN[30][28][46]
DRP[245] bit 13	MAIN[30][29][46]
DRP[245] bit 14	MAIN[30][28][47]
DRP[245] bit 15	MAIN[30][29][47]
DRP[246] bit 0	MAIN[30][28][48]
DRP[246] bit 1	MAIN[30][29][48]
DRP[246] bit 2	MAIN[30][28][49]
DRP[246] bit 3	MAIN[30][29][49]
DRP[246] bit 4	MAIN[30][28][50]
DRP[246] bit 5	MAIN[30][29][50]
DRP[246] bit 6	MAIN[30][28][51]
DRP[246] bit 7	MAIN[30][29][51]
DRP[246] bit 8	MAIN[30][28][52]
DRP[246] bit 9	MAIN[30][29][52]
DRP[246] bit 10	MAIN[30][28][53]
DRP[246] bit 11	MAIN[30][29][53]
DRP[246] bit 12	MAIN[30][28][54]
DRP[246] bit 13	MAIN[30][29][54]
DRP[246] bit 14	MAIN[30][28][55]
DRP[246] bit 15	MAIN[30][29][55]
DRP[247] bit 0	MAIN[30][28][56]
DRP[247] bit 1	MAIN[30][29][56]
DRP[247] bit 2	MAIN[30][28][57]
DRP[247] bit 3	MAIN[30][29][57]
DRP[247] bit 4	MAIN[30][28][58]
DRP[247] bit 5	MAIN[30][29][58]
DRP[247] bit 6	MAIN[30][28][59]
DRP[247] bit 7	MAIN[30][29][59]
DRP[247] bit 8	MAIN[30][28][60]
DRP[247] bit 9	MAIN[30][29][60]
DRP[247] bit 10	MAIN[30][28][61]
DRP[247] bit 11	MAIN[30][29][61]
DRP[247] bit 12	MAIN[30][28][62]
DRP[247] bit 13	MAIN[30][29][62]
DRP[247] bit 14	MAIN[30][28][63]
DRP[247] bit 15	MAIN[30][29][63]
DRP[248] bit 0	MAIN[31][28][0]
DRP[248] bit 1	MAIN[31][29][0]
DRP[248] bit 2	MAIN[31][28][1]
DRP[248] bit 3	MAIN[31][29][1]
DRP[248] bit 4	MAIN[31][28][2]
DRP[248] bit 5	MAIN[31][29][2]
DRP[248] bit 6	MAIN[31][28][3]
DRP[248] bit 7	MAIN[31][29][3]
DRP[248] bit 8	MAIN[31][28][4]
DRP[248] bit 9	MAIN[31][29][4]
DRP[248] bit 10	MAIN[31][28][5]
DRP[248] bit 11	MAIN[31][29][5]
DRP[248] bit 12	MAIN[31][28][6]
DRP[248] bit 13	MAIN[31][29][6]
DRP[248] bit 14	MAIN[31][28][7]
DRP[248] bit 15	MAIN[31][29][7]
DRP[249] bit 0	MAIN[31][28][8]
DRP[249] bit 1	MAIN[31][29][8]
DRP[249] bit 2	MAIN[31][28][9]
DRP[249] bit 3	MAIN[31][29][9]
DRP[249] bit 4	MAIN[31][28][10]
DRP[249] bit 5	MAIN[31][29][10]
DRP[249] bit 6	MAIN[31][28][11]
DRP[249] bit 7	MAIN[31][29][11]
DRP[249] bit 8	MAIN[31][28][12]
DRP[249] bit 9	MAIN[31][29][12]
DRP[249] bit 10	MAIN[31][28][13]
DRP[249] bit 11	MAIN[31][29][13]
DRP[249] bit 12	MAIN[31][28][14]
DRP[249] bit 13	MAIN[31][29][14]
DRP[249] bit 14	MAIN[31][28][15]
DRP[249] bit 15	MAIN[31][29][15]
DRP[250] bit 0	MAIN[31][28][16]
DRP[250] bit 1	MAIN[31][29][16]
DRP[250] bit 2	MAIN[31][28][17]
DRP[250] bit 3	MAIN[31][29][17]
DRP[250] bit 4	MAIN[31][28][18]
DRP[250] bit 5	MAIN[31][29][18]
DRP[250] bit 6	MAIN[31][28][19]
DRP[250] bit 7	MAIN[31][29][19]
DRP[250] bit 8	MAIN[31][28][20]
DRP[250] bit 9	MAIN[31][29][20]
DRP[250] bit 10	MAIN[31][28][21]
DRP[250] bit 11	MAIN[31][29][21]
DRP[250] bit 12	MAIN[31][28][22]
DRP[250] bit 13	MAIN[31][29][22]
DRP[250] bit 14	MAIN[31][28][23]
DRP[250] bit 15	MAIN[31][29][23]
DRP[251] bit 0	MAIN[31][28][24]
DRP[251] bit 1	MAIN[31][29][24]
DRP[251] bit 2	MAIN[31][28][25]
DRP[251] bit 3	MAIN[31][29][25]
DRP[251] bit 4	MAIN[31][28][26]
DRP[251] bit 5	MAIN[31][29][26]
DRP[251] bit 6	MAIN[31][28][27]
DRP[251] bit 7	MAIN[31][29][27]
DRP[251] bit 8	MAIN[31][28][28]
DRP[251] bit 9	MAIN[31][29][28]
DRP[251] bit 10	MAIN[31][28][29]
DRP[251] bit 11	MAIN[31][29][29]
DRP[251] bit 12	MAIN[31][28][30]
DRP[251] bit 13	MAIN[31][29][30]
DRP[251] bit 14	MAIN[31][28][31]
DRP[251] bit 15	MAIN[31][29][31]
DRP[252] bit 0	MAIN[31][28][32]
DRP[252] bit 1	MAIN[31][29][32]
DRP[252] bit 2	MAIN[31][28][33]
DRP[252] bit 3	MAIN[31][29][33]
DRP[252] bit 4	MAIN[31][28][34]
DRP[252] bit 5	MAIN[31][29][34]
DRP[252] bit 6	MAIN[31][28][35]
DRP[252] bit 7	MAIN[31][29][35]
DRP[252] bit 8	MAIN[31][28][36]
DRP[252] bit 9	MAIN[31][29][36]
DRP[252] bit 10	MAIN[31][28][37]
DRP[252] bit 11	MAIN[31][29][37]
DRP[252] bit 12	MAIN[31][28][38]
DRP[252] bit 13	MAIN[31][29][38]
DRP[252] bit 14	MAIN[31][28][39]
DRP[252] bit 15	MAIN[31][29][39]
DRP[253] bit 0	MAIN[31][28][40]
DRP[253] bit 1	MAIN[31][29][40]
DRP[253] bit 2	MAIN[31][28][41]
DRP[253] bit 3	MAIN[31][29][41]
DRP[253] bit 4	MAIN[31][28][42]
DRP[253] bit 5	MAIN[31][29][42]
DRP[253] bit 6	MAIN[31][28][43]
DRP[253] bit 7	MAIN[31][29][43]
DRP[253] bit 8	MAIN[31][28][44]
DRP[253] bit 9	MAIN[31][29][44]
DRP[253] bit 10	MAIN[31][28][45]
DRP[253] bit 11	MAIN[31][29][45]
DRP[253] bit 12	MAIN[31][28][46]
DRP[253] bit 13	MAIN[31][29][46]
DRP[253] bit 14	MAIN[31][28][47]
DRP[253] bit 15	MAIN[31][29][47]
DRP[254] bit 0	MAIN[31][28][48]
DRP[254] bit 1	MAIN[31][29][48]
DRP[254] bit 2	MAIN[31][28][49]
DRP[254] bit 3	MAIN[31][29][49]
DRP[254] bit 4	MAIN[31][28][50]
DRP[254] bit 5	MAIN[31][29][50]
DRP[254] bit 6	MAIN[31][28][51]
DRP[254] bit 7	MAIN[31][29][51]
DRP[254] bit 8	MAIN[31][28][52]
DRP[254] bit 9	MAIN[31][29][52]
DRP[254] bit 10	MAIN[31][28][53]
DRP[254] bit 11	MAIN[31][29][53]
DRP[254] bit 12	MAIN[31][28][54]
DRP[254] bit 13	MAIN[31][29][54]
DRP[254] bit 14	MAIN[31][28][55]
DRP[254] bit 15	MAIN[31][29][55]
DRP[255] bit 0	MAIN[31][28][56]
DRP[255] bit 1	MAIN[31][29][56]
DRP[255] bit 2	MAIN[31][28][57]
DRP[255] bit 3	MAIN[31][29][57]
DRP[255] bit 4	MAIN[31][28][58]
DRP[255] bit 5	MAIN[31][29][58]
DRP[255] bit 6	MAIN[31][28][59]
DRP[255] bit 7	MAIN[31][29][59]
DRP[255] bit 8	MAIN[31][28][60]
DRP[255] bit 9	MAIN[31][29][60]
DRP[255] bit 10	MAIN[31][28][61]
DRP[255] bit 11	MAIN[31][29][61]
DRP[255] bit 12	MAIN[31][28][62]
DRP[255] bit 13	MAIN[31][29][62]
DRP[255] bit 14	MAIN[31][28][63]
DRP[255] bit 15	MAIN[31][29][63]
DRP[256] bit 0	MAIN[32][28][0]
DRP[256] bit 1	MAIN[32][29][0]
DRP[256] bit 2	MAIN[32][28][1]
DRP[256] bit 3	MAIN[32][29][1]
DRP[256] bit 4	MAIN[32][28][2]
DRP[256] bit 5	MAIN[32][29][2]
DRP[256] bit 6	MAIN[32][28][3]
DRP[256] bit 7	MAIN[32][29][3]
DRP[256] bit 8	MAIN[32][28][4]
DRP[256] bit 9	MAIN[32][29][4]
DRP[256] bit 10	MAIN[32][28][5]
DRP[256] bit 11	MAIN[32][29][5]
DRP[256] bit 12	MAIN[32][28][6]
DRP[256] bit 13	MAIN[32][29][6]
DRP[256] bit 14	MAIN[32][28][7]
DRP[256] bit 15	MAIN[32][29][7]
DRP[257] bit 0	MAIN[32][28][8]
DRP[257] bit 1	MAIN[32][29][8]
DRP[257] bit 2	MAIN[32][28][9]
DRP[257] bit 3	MAIN[32][29][9]
DRP[257] bit 4	MAIN[32][28][10]
DRP[257] bit 5	MAIN[32][29][10]
DRP[257] bit 6	MAIN[32][28][11]
DRP[257] bit 7	MAIN[32][29][11]
DRP[257] bit 8	MAIN[32][28][12]
DRP[257] bit 9	MAIN[32][29][12]
DRP[257] bit 10	MAIN[32][28][13]
DRP[257] bit 11	MAIN[32][29][13]
DRP[257] bit 12	MAIN[32][28][14]
DRP[257] bit 13	MAIN[32][29][14]
DRP[257] bit 14	MAIN[32][28][15]
DRP[257] bit 15	MAIN[32][29][15]
DRP[258] bit 0	MAIN[32][28][16]
DRP[258] bit 1	MAIN[32][29][16]
DRP[258] bit 2	MAIN[32][28][17]
DRP[258] bit 3	MAIN[32][29][17]
DRP[258] bit 4	MAIN[32][28][18]
DRP[258] bit 5	MAIN[32][29][18]
DRP[258] bit 6	MAIN[32][28][19]
DRP[258] bit 7	MAIN[32][29][19]
DRP[258] bit 8	MAIN[32][28][20]
DRP[258] bit 9	MAIN[32][29][20]
DRP[258] bit 10	MAIN[32][28][21]
DRP[258] bit 11	MAIN[32][29][21]
DRP[258] bit 12	MAIN[32][28][22]
DRP[258] bit 13	MAIN[32][29][22]
DRP[258] bit 14	MAIN[32][28][23]
DRP[258] bit 15	MAIN[32][29][23]
DRP[259] bit 0	MAIN[32][28][24]
DRP[259] bit 1	MAIN[32][29][24]
DRP[259] bit 2	MAIN[32][28][25]
DRP[259] bit 3	MAIN[32][29][25]
DRP[259] bit 4	MAIN[32][28][26]
DRP[259] bit 5	MAIN[32][29][26]
DRP[259] bit 6	MAIN[32][28][27]
DRP[259] bit 7	MAIN[32][29][27]
DRP[259] bit 8	MAIN[32][28][28]
DRP[259] bit 9	MAIN[32][29][28]
DRP[259] bit 10	MAIN[32][28][29]
DRP[259] bit 11	MAIN[32][29][29]
DRP[259] bit 12	MAIN[32][28][30]
DRP[259] bit 13	MAIN[32][29][30]
DRP[259] bit 14	MAIN[32][28][31]
DRP[259] bit 15	MAIN[32][29][31]
DRP[260] bit 0	MAIN[32][28][32]
DRP[260] bit 1	MAIN[32][29][32]
DRP[260] bit 2	MAIN[32][28][33]
DRP[260] bit 3	MAIN[32][29][33]
DRP[260] bit 4	MAIN[32][28][34]
DRP[260] bit 5	MAIN[32][29][34]
DRP[260] bit 6	MAIN[32][28][35]
DRP[260] bit 7	MAIN[32][29][35]
DRP[260] bit 8	MAIN[32][28][36]
DRP[260] bit 9	MAIN[32][29][36]
DRP[260] bit 10	MAIN[32][28][37]
DRP[260] bit 11	MAIN[32][29][37]
DRP[260] bit 12	MAIN[32][28][38]
DRP[260] bit 13	MAIN[32][29][38]
DRP[260] bit 14	MAIN[32][28][39]
DRP[260] bit 15	MAIN[32][29][39]
DRP[261] bit 0	MAIN[32][28][40]
DRP[261] bit 1	MAIN[32][29][40]
DRP[261] bit 2	MAIN[32][28][41]
DRP[261] bit 3	MAIN[32][29][41]
DRP[261] bit 4	MAIN[32][28][42]
DRP[261] bit 5	MAIN[32][29][42]
DRP[261] bit 6	MAIN[32][28][43]
DRP[261] bit 7	MAIN[32][29][43]
DRP[261] bit 8	MAIN[32][28][44]
DRP[261] bit 9	MAIN[32][29][44]
DRP[261] bit 10	MAIN[32][28][45]
DRP[261] bit 11	MAIN[32][29][45]
DRP[261] bit 12	MAIN[32][28][46]
DRP[261] bit 13	MAIN[32][29][46]
DRP[261] bit 14	MAIN[32][28][47]
DRP[261] bit 15	MAIN[32][29][47]
DRP[262] bit 0	MAIN[32][28][48]
DRP[262] bit 1	MAIN[32][29][48]
DRP[262] bit 2	MAIN[32][28][49]
DRP[262] bit 3	MAIN[32][29][49]
DRP[262] bit 4	MAIN[32][28][50]
DRP[262] bit 5	MAIN[32][29][50]
DRP[262] bit 6	MAIN[32][28][51]
DRP[262] bit 7	MAIN[32][29][51]
DRP[262] bit 8	MAIN[32][28][52]
DRP[262] bit 9	MAIN[32][29][52]
DRP[262] bit 10	MAIN[32][28][53]
DRP[262] bit 11	MAIN[32][29][53]
DRP[262] bit 12	MAIN[32][28][54]
DRP[262] bit 13	MAIN[32][29][54]
DRP[262] bit 14	MAIN[32][28][55]
DRP[262] bit 15	MAIN[32][29][55]
DRP[263] bit 0	MAIN[32][28][56]
DRP[263] bit 1	MAIN[32][29][56]
DRP[263] bit 2	MAIN[32][28][57]
DRP[263] bit 3	MAIN[32][29][57]
DRP[263] bit 4	MAIN[32][28][58]
DRP[263] bit 5	MAIN[32][29][58]
DRP[263] bit 6	MAIN[32][28][59]
DRP[263] bit 7	MAIN[32][29][59]
DRP[263] bit 8	MAIN[32][28][60]
DRP[263] bit 9	MAIN[32][29][60]
DRP[263] bit 10	MAIN[32][28][61]
DRP[263] bit 11	MAIN[32][29][61]
DRP[263] bit 12	MAIN[32][28][62]
DRP[263] bit 13	MAIN[32][29][62]
DRP[263] bit 14	MAIN[32][28][63]
DRP[263] bit 15	MAIN[32][29][63]
DRP[264] bit 0	MAIN[33][28][0]
DRP[264] bit 1	MAIN[33][29][0]
DRP[264] bit 2	MAIN[33][28][1]
DRP[264] bit 3	MAIN[33][29][1]
DRP[264] bit 4	MAIN[33][28][2]
DRP[264] bit 5	MAIN[33][29][2]
DRP[264] bit 6	MAIN[33][28][3]
DRP[264] bit 7	MAIN[33][29][3]
DRP[264] bit 8	MAIN[33][28][4]
DRP[264] bit 9	MAIN[33][29][4]
DRP[264] bit 10	MAIN[33][28][5]
DRP[264] bit 11	MAIN[33][29][5]
DRP[264] bit 12	MAIN[33][28][6]
DRP[264] bit 13	MAIN[33][29][6]
DRP[264] bit 14	MAIN[33][28][7]
DRP[264] bit 15	MAIN[33][29][7]
DRP[265] bit 0	MAIN[33][28][8]
DRP[265] bit 1	MAIN[33][29][8]
DRP[265] bit 2	MAIN[33][28][9]
DRP[265] bit 3	MAIN[33][29][9]
DRP[265] bit 4	MAIN[33][28][10]
DRP[265] bit 5	MAIN[33][29][10]
DRP[265] bit 6	MAIN[33][28][11]
DRP[265] bit 7	MAIN[33][29][11]
DRP[265] bit 8	MAIN[33][28][12]
DRP[265] bit 9	MAIN[33][29][12]
DRP[265] bit 10	MAIN[33][28][13]
DRP[265] bit 11	MAIN[33][29][13]
DRP[265] bit 12	MAIN[33][28][14]
DRP[265] bit 13	MAIN[33][29][14]
DRP[265] bit 14	MAIN[33][28][15]
DRP[265] bit 15	MAIN[33][29][15]
DRP[266] bit 0	MAIN[33][28][16]
DRP[266] bit 1	MAIN[33][29][16]
DRP[266] bit 2	MAIN[33][28][17]
DRP[266] bit 3	MAIN[33][29][17]
DRP[266] bit 4	MAIN[33][28][18]
DRP[266] bit 5	MAIN[33][29][18]
DRP[266] bit 6	MAIN[33][28][19]
DRP[266] bit 7	MAIN[33][29][19]
DRP[266] bit 8	MAIN[33][28][20]
DRP[266] bit 9	MAIN[33][29][20]
DRP[266] bit 10	MAIN[33][28][21]
DRP[266] bit 11	MAIN[33][29][21]
DRP[266] bit 12	MAIN[33][28][22]
DRP[266] bit 13	MAIN[33][29][22]
DRP[266] bit 14	MAIN[33][28][23]
DRP[266] bit 15	MAIN[33][29][23]
DRP[267] bit 0	MAIN[33][28][24]
DRP[267] bit 1	MAIN[33][29][24]
DRP[267] bit 2	MAIN[33][28][25]
DRP[267] bit 3	MAIN[33][29][25]
DRP[267] bit 4	MAIN[33][28][26]
DRP[267] bit 5	MAIN[33][29][26]
DRP[267] bit 6	MAIN[33][28][27]
DRP[267] bit 7	MAIN[33][29][27]
DRP[267] bit 8	MAIN[33][28][28]
DRP[267] bit 9	MAIN[33][29][28]
DRP[267] bit 10	MAIN[33][28][29]
DRP[267] bit 11	MAIN[33][29][29]
DRP[267] bit 12	MAIN[33][28][30]
DRP[267] bit 13	MAIN[33][29][30]
DRP[267] bit 14	MAIN[33][28][31]
DRP[267] bit 15	MAIN[33][29][31]
DRP[268] bit 0	MAIN[33][28][32]
DRP[268] bit 1	MAIN[33][29][32]
DRP[268] bit 2	MAIN[33][28][33]
DRP[268] bit 3	MAIN[33][29][33]
DRP[268] bit 4	MAIN[33][28][34]
DRP[268] bit 5	MAIN[33][29][34]
DRP[268] bit 6	MAIN[33][28][35]
DRP[268] bit 7	MAIN[33][29][35]
DRP[268] bit 8	MAIN[33][28][36]
DRP[268] bit 9	MAIN[33][29][36]
DRP[268] bit 10	MAIN[33][28][37]
DRP[268] bit 11	MAIN[33][29][37]
DRP[268] bit 12	MAIN[33][28][38]
DRP[268] bit 13	MAIN[33][29][38]
DRP[268] bit 14	MAIN[33][28][39]
DRP[268] bit 15	MAIN[33][29][39]
DRP[269] bit 0	MAIN[33][28][40]
DRP[269] bit 1	MAIN[33][29][40]
DRP[269] bit 2	MAIN[33][28][41]
DRP[269] bit 3	MAIN[33][29][41]
DRP[269] bit 4	MAIN[33][28][42]
DRP[269] bit 5	MAIN[33][29][42]
DRP[269] bit 6	MAIN[33][28][43]
DRP[269] bit 7	MAIN[33][29][43]
DRP[269] bit 8	MAIN[33][28][44]
DRP[269] bit 9	MAIN[33][29][44]
DRP[269] bit 10	MAIN[33][28][45]
DRP[269] bit 11	MAIN[33][29][45]
DRP[269] bit 12	MAIN[33][28][46]
DRP[269] bit 13	MAIN[33][29][46]
DRP[269] bit 14	MAIN[33][28][47]
DRP[269] bit 15	MAIN[33][29][47]
DRP[270] bit 0	MAIN[33][28][48]
DRP[270] bit 1	MAIN[33][29][48]
DRP[270] bit 2	MAIN[33][28][49]
DRP[270] bit 3	MAIN[33][29][49]
DRP[270] bit 4	MAIN[33][28][50]
DRP[270] bit 5	MAIN[33][29][50]
DRP[270] bit 6	MAIN[33][28][51]
DRP[270] bit 7	MAIN[33][29][51]
DRP[270] bit 8	MAIN[33][28][52]
DRP[270] bit 9	MAIN[33][29][52]
DRP[270] bit 10	MAIN[33][28][53]
DRP[270] bit 11	MAIN[33][29][53]
DRP[270] bit 12	MAIN[33][28][54]
DRP[270] bit 13	MAIN[33][29][54]
DRP[270] bit 14	MAIN[33][28][55]
DRP[270] bit 15	MAIN[33][29][55]
DRP[271] bit 0	MAIN[33][28][56]
DRP[271] bit 1	MAIN[33][29][56]
DRP[271] bit 2	MAIN[33][28][57]
DRP[271] bit 3	MAIN[33][29][57]
DRP[271] bit 4	MAIN[33][28][58]
DRP[271] bit 5	MAIN[33][29][58]
DRP[271] bit 6	MAIN[33][28][59]
DRP[271] bit 7	MAIN[33][29][59]
DRP[271] bit 8	MAIN[33][28][60]
DRP[271] bit 9	MAIN[33][29][60]
DRP[271] bit 10	MAIN[33][28][61]
DRP[271] bit 11	MAIN[33][29][61]
DRP[271] bit 12	MAIN[33][28][62]
DRP[271] bit 13	MAIN[33][29][62]
DRP[271] bit 14	MAIN[33][28][63]
DRP[271] bit 15	MAIN[33][29][63]
DRP[272] bit 0	MAIN[34][28][0]
DRP[272] bit 1	MAIN[34][29][0]
DRP[272] bit 2	MAIN[34][28][1]
DRP[272] bit 3	MAIN[34][29][1]
DRP[272] bit 4	MAIN[34][28][2]
DRP[272] bit 5	MAIN[34][29][2]
DRP[272] bit 6	MAIN[34][28][3]
DRP[272] bit 7	MAIN[34][29][3]
DRP[272] bit 8	MAIN[34][28][4]
DRP[272] bit 9	MAIN[34][29][4]
DRP[272] bit 10	MAIN[34][28][5]
DRP[272] bit 11	MAIN[34][29][5]
DRP[272] bit 12	MAIN[34][28][6]
DRP[272] bit 13	MAIN[34][29][6]
DRP[272] bit 14	MAIN[34][28][7]
DRP[272] bit 15	MAIN[34][29][7]
DRP[273] bit 0	MAIN[34][28][8]
DRP[273] bit 1	MAIN[34][29][8]
DRP[273] bit 2	MAIN[34][28][9]
DRP[273] bit 3	MAIN[34][29][9]
DRP[273] bit 4	MAIN[34][28][10]
DRP[273] bit 5	MAIN[34][29][10]
DRP[273] bit 6	MAIN[34][28][11]
DRP[273] bit 7	MAIN[34][29][11]
DRP[273] bit 8	MAIN[34][28][12]
DRP[273] bit 9	MAIN[34][29][12]
DRP[273] bit 10	MAIN[34][28][13]
DRP[273] bit 11	MAIN[34][29][13]
DRP[273] bit 12	MAIN[34][28][14]
DRP[273] bit 13	MAIN[34][29][14]
DRP[273] bit 14	MAIN[34][28][15]
DRP[273] bit 15	MAIN[34][29][15]
DRP[274] bit 0	MAIN[34][28][16]
DRP[274] bit 1	MAIN[34][29][16]
DRP[274] bit 2	MAIN[34][28][17]
DRP[274] bit 3	MAIN[34][29][17]
DRP[274] bit 4	MAIN[34][28][18]
DRP[274] bit 5	MAIN[34][29][18]
DRP[274] bit 6	MAIN[34][28][19]
DRP[274] bit 7	MAIN[34][29][19]
DRP[274] bit 8	MAIN[34][28][20]
DRP[274] bit 9	MAIN[34][29][20]
DRP[274] bit 10	MAIN[34][28][21]
DRP[274] bit 11	MAIN[34][29][21]
DRP[274] bit 12	MAIN[34][28][22]
DRP[274] bit 13	MAIN[34][29][22]
DRP[274] bit 14	MAIN[34][28][23]
DRP[274] bit 15	MAIN[34][29][23]
DRP[275] bit 0	MAIN[34][28][24]
DRP[275] bit 1	MAIN[34][29][24]
DRP[275] bit 2	MAIN[34][28][25]
DRP[275] bit 3	MAIN[34][29][25]
DRP[275] bit 4	MAIN[34][28][26]
DRP[275] bit 5	MAIN[34][29][26]
DRP[275] bit 6	MAIN[34][28][27]
DRP[275] bit 7	MAIN[34][29][27]
DRP[275] bit 8	MAIN[34][28][28]
DRP[275] bit 9	MAIN[34][29][28]
DRP[275] bit 10	MAIN[34][28][29]
DRP[275] bit 11	MAIN[34][29][29]
DRP[275] bit 12	MAIN[34][28][30]
DRP[275] bit 13	MAIN[34][29][30]
DRP[275] bit 14	MAIN[34][28][31]
DRP[275] bit 15	MAIN[34][29][31]
DRP[276] bit 0	MAIN[34][28][32]
DRP[276] bit 1	MAIN[34][29][32]
DRP[276] bit 2	MAIN[34][28][33]
DRP[276] bit 3	MAIN[34][29][33]
DRP[276] bit 4	MAIN[34][28][34]
DRP[276] bit 5	MAIN[34][29][34]
DRP[276] bit 6	MAIN[34][28][35]
DRP[276] bit 7	MAIN[34][29][35]
DRP[276] bit 8	MAIN[34][28][36]
DRP[276] bit 9	MAIN[34][29][36]
DRP[276] bit 10	MAIN[34][28][37]
DRP[276] bit 11	MAIN[34][29][37]
DRP[276] bit 12	MAIN[34][28][38]
DRP[276] bit 13	MAIN[34][29][38]
DRP[276] bit 14	MAIN[34][28][39]
DRP[276] bit 15	MAIN[34][29][39]
DRP[277] bit 0	MAIN[34][28][40]
DRP[277] bit 1	MAIN[34][29][40]
DRP[277] bit 2	MAIN[34][28][41]
DRP[277] bit 3	MAIN[34][29][41]
DRP[277] bit 4	MAIN[34][28][42]
DRP[277] bit 5	MAIN[34][29][42]
DRP[277] bit 6	MAIN[34][28][43]
DRP[277] bit 7	MAIN[34][29][43]
DRP[277] bit 8	MAIN[34][28][44]
DRP[277] bit 9	MAIN[34][29][44]
DRP[277] bit 10	MAIN[34][28][45]
DRP[277] bit 11	MAIN[34][29][45]
DRP[277] bit 12	MAIN[34][28][46]
DRP[277] bit 13	MAIN[34][29][46]
DRP[277] bit 14	MAIN[34][28][47]
DRP[277] bit 15	MAIN[34][29][47]
DRP[278] bit 0	MAIN[34][28][48]
DRP[278] bit 1	MAIN[34][29][48]
DRP[278] bit 2	MAIN[34][28][49]
DRP[278] bit 3	MAIN[34][29][49]
DRP[278] bit 4	MAIN[34][28][50]
DRP[278] bit 5	MAIN[34][29][50]
DRP[278] bit 6	MAIN[34][28][51]
DRP[278] bit 7	MAIN[34][29][51]
DRP[278] bit 8	MAIN[34][28][52]
DRP[278] bit 9	MAIN[34][29][52]
DRP[278] bit 10	MAIN[34][28][53]
DRP[278] bit 11	MAIN[34][29][53]
DRP[278] bit 12	MAIN[34][28][54]
DRP[278] bit 13	MAIN[34][29][54]
DRP[278] bit 14	MAIN[34][28][55]
DRP[278] bit 15	MAIN[34][29][55]
DRP[279] bit 0	MAIN[34][28][56]
DRP[279] bit 1	MAIN[34][29][56]
DRP[279] bit 2	MAIN[34][28][57]
DRP[279] bit 3	MAIN[34][29][57]
DRP[279] bit 4	MAIN[34][28][58]
DRP[279] bit 5	MAIN[34][29][58]
DRP[279] bit 6	MAIN[34][28][59]
DRP[279] bit 7	MAIN[34][29][59]
DRP[279] bit 8	MAIN[34][28][60]
DRP[279] bit 9	MAIN[34][29][60]
DRP[279] bit 10	MAIN[34][28][61]
DRP[279] bit 11	MAIN[34][29][61]
DRP[279] bit 12	MAIN[34][28][62]
DRP[279] bit 13	MAIN[34][29][62]
DRP[279] bit 14	MAIN[34][28][63]
DRP[279] bit 15	MAIN[34][29][63]
DRP[280] bit 0	MAIN[35][28][0]
DRP[280] bit 1	MAIN[35][29][0]
DRP[280] bit 2	MAIN[35][28][1]
DRP[280] bit 3	MAIN[35][29][1]
DRP[280] bit 4	MAIN[35][28][2]
DRP[280] bit 5	MAIN[35][29][2]
DRP[280] bit 6	MAIN[35][28][3]
DRP[280] bit 7	MAIN[35][29][3]
DRP[280] bit 8	MAIN[35][28][4]
DRP[280] bit 9	MAIN[35][29][4]
DRP[280] bit 10	MAIN[35][28][5]
DRP[280] bit 11	MAIN[35][29][5]
DRP[280] bit 12	MAIN[35][28][6]
DRP[280] bit 13	MAIN[35][29][6]
DRP[280] bit 14	MAIN[35][28][7]
DRP[280] bit 15	MAIN[35][29][7]
DRP[281] bit 0	MAIN[35][28][8]
DRP[281] bit 1	MAIN[35][29][8]
DRP[281] bit 2	MAIN[35][28][9]
DRP[281] bit 3	MAIN[35][29][9]
DRP[281] bit 4	MAIN[35][28][10]
DRP[281] bit 5	MAIN[35][29][10]
DRP[281] bit 6	MAIN[35][28][11]
DRP[281] bit 7	MAIN[35][29][11]
DRP[281] bit 8	MAIN[35][28][12]
DRP[281] bit 9	MAIN[35][29][12]
DRP[281] bit 10	MAIN[35][28][13]
DRP[281] bit 11	MAIN[35][29][13]
DRP[281] bit 12	MAIN[35][28][14]
DRP[281] bit 13	MAIN[35][29][14]
DRP[281] bit 14	MAIN[35][28][15]
DRP[281] bit 15	MAIN[35][29][15]
DRP[282] bit 0	MAIN[35][28][16]
DRP[282] bit 1	MAIN[35][29][16]
DRP[282] bit 2	MAIN[35][28][17]
DRP[282] bit 3	MAIN[35][29][17]
DRP[282] bit 4	MAIN[35][28][18]
DRP[282] bit 5	MAIN[35][29][18]
DRP[282] bit 6	MAIN[35][28][19]
DRP[282] bit 7	MAIN[35][29][19]
DRP[282] bit 8	MAIN[35][28][20]
DRP[282] bit 9	MAIN[35][29][20]
DRP[282] bit 10	MAIN[35][28][21]
DRP[282] bit 11	MAIN[35][29][21]
DRP[282] bit 12	MAIN[35][28][22]
DRP[282] bit 13	MAIN[35][29][22]
DRP[282] bit 14	MAIN[35][28][23]
DRP[282] bit 15	MAIN[35][29][23]
DRP[283] bit 0	MAIN[35][28][24]
DRP[283] bit 1	MAIN[35][29][24]
DRP[283] bit 2	MAIN[35][28][25]
DRP[283] bit 3	MAIN[35][29][25]
DRP[283] bit 4	MAIN[35][28][26]
DRP[283] bit 5	MAIN[35][29][26]
DRP[283] bit 6	MAIN[35][28][27]
DRP[283] bit 7	MAIN[35][29][27]
DRP[283] bit 8	MAIN[35][28][28]
DRP[283] bit 9	MAIN[35][29][28]
DRP[283] bit 10	MAIN[35][28][29]
DRP[283] bit 11	MAIN[35][29][29]
DRP[283] bit 12	MAIN[35][28][30]
DRP[283] bit 13	MAIN[35][29][30]
DRP[283] bit 14	MAIN[35][28][31]
DRP[283] bit 15	MAIN[35][29][31]
DRP[284] bit 0	MAIN[35][28][32]
DRP[284] bit 1	MAIN[35][29][32]
DRP[284] bit 2	MAIN[35][28][33]
DRP[284] bit 3	MAIN[35][29][33]
DRP[284] bit 4	MAIN[35][28][34]
DRP[284] bit 5	MAIN[35][29][34]
DRP[284] bit 6	MAIN[35][28][35]
DRP[284] bit 7	MAIN[35][29][35]
DRP[284] bit 8	MAIN[35][28][36]
DRP[284] bit 9	MAIN[35][29][36]
DRP[284] bit 10	MAIN[35][28][37]
DRP[284] bit 11	MAIN[35][29][37]
DRP[284] bit 12	MAIN[35][28][38]
DRP[284] bit 13	MAIN[35][29][38]
DRP[284] bit 14	MAIN[35][28][39]
DRP[284] bit 15	MAIN[35][29][39]
DRP[285] bit 0	MAIN[35][28][40]
DRP[285] bit 1	MAIN[35][29][40]
DRP[285] bit 2	MAIN[35][28][41]
DRP[285] bit 3	MAIN[35][29][41]
DRP[285] bit 4	MAIN[35][28][42]
DRP[285] bit 5	MAIN[35][29][42]
DRP[285] bit 6	MAIN[35][28][43]
DRP[285] bit 7	MAIN[35][29][43]
DRP[285] bit 8	MAIN[35][28][44]
DRP[285] bit 9	MAIN[35][29][44]
DRP[285] bit 10	MAIN[35][28][45]
DRP[285] bit 11	MAIN[35][29][45]
DRP[285] bit 12	MAIN[35][28][46]
DRP[285] bit 13	MAIN[35][29][46]
DRP[285] bit 14	MAIN[35][28][47]
DRP[285] bit 15	MAIN[35][29][47]
DRP[286] bit 0	MAIN[35][28][48]
DRP[286] bit 1	MAIN[35][29][48]
DRP[286] bit 2	MAIN[35][28][49]
DRP[286] bit 3	MAIN[35][29][49]
DRP[286] bit 4	MAIN[35][28][50]
DRP[286] bit 5	MAIN[35][29][50]
DRP[286] bit 6	MAIN[35][28][51]
DRP[286] bit 7	MAIN[35][29][51]
DRP[286] bit 8	MAIN[35][28][52]
DRP[286] bit 9	MAIN[35][29][52]
DRP[286] bit 10	MAIN[35][28][53]
DRP[286] bit 11	MAIN[35][29][53]
DRP[286] bit 12	MAIN[35][28][54]
DRP[286] bit 13	MAIN[35][29][54]
DRP[286] bit 14	MAIN[35][28][55]
DRP[286] bit 15	MAIN[35][29][55]
DRP[287] bit 0	MAIN[35][28][56]
DRP[287] bit 1	MAIN[35][29][56]
DRP[287] bit 2	MAIN[35][28][57]
DRP[287] bit 3	MAIN[35][29][57]
DRP[287] bit 4	MAIN[35][28][58]
DRP[287] bit 5	MAIN[35][29][58]
DRP[287] bit 6	MAIN[35][28][59]
DRP[287] bit 7	MAIN[35][29][59]
DRP[287] bit 8	MAIN[35][28][60]
DRP[287] bit 9	MAIN[35][29][60]
DRP[287] bit 10	MAIN[35][28][61]
DRP[287] bit 11	MAIN[35][29][61]
DRP[287] bit 12	MAIN[35][28][62]
DRP[287] bit 13	MAIN[35][29][62]
DRP[287] bit 14	MAIN[35][28][63]
DRP[287] bit 15	MAIN[35][29][63]
DRP[288] bit 0	MAIN[36][28][0]
DRP[288] bit 1	MAIN[36][29][0]
DRP[288] bit 2	MAIN[36][28][1]
DRP[288] bit 3	MAIN[36][29][1]
DRP[288] bit 4	MAIN[36][28][2]
DRP[288] bit 5	MAIN[36][29][2]
DRP[288] bit 6	MAIN[36][28][3]
DRP[288] bit 7	MAIN[36][29][3]
DRP[288] bit 8	MAIN[36][28][4]
DRP[288] bit 9	MAIN[36][29][4]
DRP[288] bit 10	MAIN[36][28][5]
DRP[288] bit 11	MAIN[36][29][5]
DRP[288] bit 12	MAIN[36][28][6]
DRP[288] bit 13	MAIN[36][29][6]
DRP[288] bit 14	MAIN[36][28][7]
DRP[288] bit 15	MAIN[36][29][7]
DRP[289] bit 0	MAIN[36][28][8]
DRP[289] bit 1	MAIN[36][29][8]
DRP[289] bit 2	MAIN[36][28][9]
DRP[289] bit 3	MAIN[36][29][9]
DRP[289] bit 4	MAIN[36][28][10]
DRP[289] bit 5	MAIN[36][29][10]
DRP[289] bit 6	MAIN[36][28][11]
DRP[289] bit 7	MAIN[36][29][11]
DRP[289] bit 8	MAIN[36][28][12]
DRP[289] bit 9	MAIN[36][29][12]
DRP[289] bit 10	MAIN[36][28][13]
DRP[289] bit 11	MAIN[36][29][13]
DRP[289] bit 12	MAIN[36][28][14]
DRP[289] bit 13	MAIN[36][29][14]
DRP[289] bit 14	MAIN[36][28][15]
DRP[289] bit 15	MAIN[36][29][15]
DRP[290] bit 0	MAIN[36][28][16]
DRP[290] bit 1	MAIN[36][29][16]
DRP[290] bit 2	MAIN[36][28][17]
DRP[290] bit 3	MAIN[36][29][17]
DRP[290] bit 4	MAIN[36][28][18]
DRP[290] bit 5	MAIN[36][29][18]
DRP[290] bit 6	MAIN[36][28][19]
DRP[290] bit 7	MAIN[36][29][19]
DRP[290] bit 8	MAIN[36][28][20]
DRP[290] bit 9	MAIN[36][29][20]
DRP[290] bit 10	MAIN[36][28][21]
DRP[290] bit 11	MAIN[36][29][21]
DRP[290] bit 12	MAIN[36][28][22]
DRP[290] bit 13	MAIN[36][29][22]
DRP[290] bit 14	MAIN[36][28][23]
DRP[290] bit 15	MAIN[36][29][23]
DRP[291] bit 0	MAIN[36][28][24]
DRP[291] bit 1	MAIN[36][29][24]
DRP[291] bit 2	MAIN[36][28][25]
DRP[291] bit 3	MAIN[36][29][25]
DRP[291] bit 4	MAIN[36][28][26]
DRP[291] bit 5	MAIN[36][29][26]
DRP[291] bit 6	MAIN[36][28][27]
DRP[291] bit 7	MAIN[36][29][27]
DRP[291] bit 8	MAIN[36][28][28]
DRP[291] bit 9	MAIN[36][29][28]
DRP[291] bit 10	MAIN[36][28][29]
DRP[291] bit 11	MAIN[36][29][29]
DRP[291] bit 12	MAIN[36][28][30]
DRP[291] bit 13	MAIN[36][29][30]
DRP[291] bit 14	MAIN[36][28][31]
DRP[291] bit 15	MAIN[36][29][31]
DRP[292] bit 0	MAIN[36][28][32]
DRP[292] bit 1	MAIN[36][29][32]
DRP[292] bit 2	MAIN[36][28][33]
DRP[292] bit 3	MAIN[36][29][33]
DRP[292] bit 4	MAIN[36][28][34]
DRP[292] bit 5	MAIN[36][29][34]
DRP[292] bit 6	MAIN[36][28][35]
DRP[292] bit 7	MAIN[36][29][35]
DRP[292] bit 8	MAIN[36][28][36]
DRP[292] bit 9	MAIN[36][29][36]
DRP[292] bit 10	MAIN[36][28][37]
DRP[292] bit 11	MAIN[36][29][37]
DRP[292] bit 12	MAIN[36][28][38]
DRP[292] bit 13	MAIN[36][29][38]
DRP[292] bit 14	MAIN[36][28][39]
DRP[292] bit 15	MAIN[36][29][39]
DRP[293] bit 0	MAIN[36][28][40]
DRP[293] bit 1	MAIN[36][29][40]
DRP[293] bit 2	MAIN[36][28][41]
DRP[293] bit 3	MAIN[36][29][41]
DRP[293] bit 4	MAIN[36][28][42]
DRP[293] bit 5	MAIN[36][29][42]
DRP[293] bit 6	MAIN[36][28][43]
DRP[293] bit 7	MAIN[36][29][43]
DRP[293] bit 8	MAIN[36][28][44]
DRP[293] bit 9	MAIN[36][29][44]
DRP[293] bit 10	MAIN[36][28][45]
DRP[293] bit 11	MAIN[36][29][45]
DRP[293] bit 12	MAIN[36][28][46]
DRP[293] bit 13	MAIN[36][29][46]
DRP[293] bit 14	MAIN[36][28][47]
DRP[293] bit 15	MAIN[36][29][47]
DRP[294] bit 0	MAIN[36][28][48]
DRP[294] bit 1	MAIN[36][29][48]
DRP[294] bit 2	MAIN[36][28][49]
DRP[294] bit 3	MAIN[36][29][49]
DRP[294] bit 4	MAIN[36][28][50]
DRP[294] bit 5	MAIN[36][29][50]
DRP[294] bit 6	MAIN[36][28][51]
DRP[294] bit 7	MAIN[36][29][51]
DRP[294] bit 8	MAIN[36][28][52]
DRP[294] bit 9	MAIN[36][29][52]
DRP[294] bit 10	MAIN[36][28][53]
DRP[294] bit 11	MAIN[36][29][53]
DRP[294] bit 12	MAIN[36][28][54]
DRP[294] bit 13	MAIN[36][29][54]
DRP[294] bit 14	MAIN[36][28][55]
DRP[294] bit 15	MAIN[36][29][55]
DRP[295] bit 0	MAIN[36][28][56]
DRP[295] bit 1	MAIN[36][29][56]
DRP[295] bit 2	MAIN[36][28][57]
DRP[295] bit 3	MAIN[36][29][57]
DRP[295] bit 4	MAIN[36][28][58]
DRP[295] bit 5	MAIN[36][29][58]
DRP[295] bit 6	MAIN[36][28][59]
DRP[295] bit 7	MAIN[36][29][59]
DRP[295] bit 8	MAIN[36][28][60]
DRP[295] bit 9	MAIN[36][29][60]
DRP[295] bit 10	MAIN[36][28][61]
DRP[295] bit 11	MAIN[36][29][61]
DRP[295] bit 12	MAIN[36][28][62]
DRP[295] bit 13	MAIN[36][29][62]
DRP[295] bit 14	MAIN[36][28][63]
DRP[295] bit 15	MAIN[36][29][63]
DRP[296] bit 0	MAIN[37][28][0]
DRP[296] bit 1	MAIN[37][29][0]
DRP[296] bit 2	MAIN[37][28][1]
DRP[296] bit 3	MAIN[37][29][1]
DRP[296] bit 4	MAIN[37][28][2]
DRP[296] bit 5	MAIN[37][29][2]
DRP[296] bit 6	MAIN[37][28][3]
DRP[296] bit 7	MAIN[37][29][3]
DRP[296] bit 8	MAIN[37][28][4]
DRP[296] bit 9	MAIN[37][29][4]
DRP[296] bit 10	MAIN[37][28][5]
DRP[296] bit 11	MAIN[37][29][5]
DRP[296] bit 12	MAIN[37][28][6]
DRP[296] bit 13	MAIN[37][29][6]
DRP[296] bit 14	MAIN[37][28][7]
DRP[296] bit 15	MAIN[37][29][7]
DRP[297] bit 0	MAIN[37][28][8]
DRP[297] bit 1	MAIN[37][29][8]
DRP[297] bit 2	MAIN[37][28][9]
DRP[297] bit 3	MAIN[37][29][9]
DRP[297] bit 4	MAIN[37][28][10]
DRP[297] bit 5	MAIN[37][29][10]
DRP[297] bit 6	MAIN[37][28][11]
DRP[297] bit 7	MAIN[37][29][11]
DRP[297] bit 8	MAIN[37][28][12]
DRP[297] bit 9	MAIN[37][29][12]
DRP[297] bit 10	MAIN[37][28][13]
DRP[297] bit 11	MAIN[37][29][13]
DRP[297] bit 12	MAIN[37][28][14]
DRP[297] bit 13	MAIN[37][29][14]
DRP[297] bit 14	MAIN[37][28][15]
DRP[297] bit 15	MAIN[37][29][15]
DRP[298] bit 0	MAIN[37][28][16]
DRP[298] bit 1	MAIN[37][29][16]
DRP[298] bit 2	MAIN[37][28][17]
DRP[298] bit 3	MAIN[37][29][17]
DRP[298] bit 4	MAIN[37][28][18]
DRP[298] bit 5	MAIN[37][29][18]
DRP[298] bit 6	MAIN[37][28][19]
DRP[298] bit 7	MAIN[37][29][19]
DRP[298] bit 8	MAIN[37][28][20]
DRP[298] bit 9	MAIN[37][29][20]
DRP[298] bit 10	MAIN[37][28][21]
DRP[298] bit 11	MAIN[37][29][21]
DRP[298] bit 12	MAIN[37][28][22]
DRP[298] bit 13	MAIN[37][29][22]
DRP[298] bit 14	MAIN[37][28][23]
DRP[298] bit 15	MAIN[37][29][23]
DRP[299] bit 0	MAIN[37][28][24]
DRP[299] bit 1	MAIN[37][29][24]
DRP[299] bit 2	MAIN[37][28][25]
DRP[299] bit 3	MAIN[37][29][25]
DRP[299] bit 4	MAIN[37][28][26]
DRP[299] bit 5	MAIN[37][29][26]
DRP[299] bit 6	MAIN[37][28][27]
DRP[299] bit 7	MAIN[37][29][27]
DRP[299] bit 8	MAIN[37][28][28]
DRP[299] bit 9	MAIN[37][29][28]
DRP[299] bit 10	MAIN[37][28][29]
DRP[299] bit 11	MAIN[37][29][29]
DRP[299] bit 12	MAIN[37][28][30]
DRP[299] bit 13	MAIN[37][29][30]
DRP[299] bit 14	MAIN[37][28][31]
DRP[299] bit 15	MAIN[37][29][31]
DRP[300] bit 0	MAIN[37][28][32]
DRP[300] bit 1	MAIN[37][29][32]
DRP[300] bit 2	MAIN[37][28][33]
DRP[300] bit 3	MAIN[37][29][33]
DRP[300] bit 4	MAIN[37][28][34]
DRP[300] bit 5	MAIN[37][29][34]
DRP[300] bit 6	MAIN[37][28][35]
DRP[300] bit 7	MAIN[37][29][35]
DRP[300] bit 8	MAIN[37][28][36]
DRP[300] bit 9	MAIN[37][29][36]
DRP[300] bit 10	MAIN[37][28][37]
DRP[300] bit 11	MAIN[37][29][37]
DRP[300] bit 12	MAIN[37][28][38]
DRP[300] bit 13	MAIN[37][29][38]
DRP[300] bit 14	MAIN[37][28][39]
DRP[300] bit 15	MAIN[37][29][39]
DRP[301] bit 0	MAIN[37][28][40]
DRP[301] bit 1	MAIN[37][29][40]
DRP[301] bit 2	MAIN[37][28][41]
DRP[301] bit 3	MAIN[37][29][41]
DRP[301] bit 4	MAIN[37][28][42]
DRP[301] bit 5	MAIN[37][29][42]
DRP[301] bit 6	MAIN[37][28][43]
DRP[301] bit 7	MAIN[37][29][43]
DRP[301] bit 8	MAIN[37][28][44]
DRP[301] bit 9	MAIN[37][29][44]
DRP[301] bit 10	MAIN[37][28][45]
DRP[301] bit 11	MAIN[37][29][45]
DRP[301] bit 12	MAIN[37][28][46]
DRP[301] bit 13	MAIN[37][29][46]
DRP[301] bit 14	MAIN[37][28][47]
DRP[301] bit 15	MAIN[37][29][47]
DRP[302] bit 0	MAIN[37][28][48]
DRP[302] bit 1	MAIN[37][29][48]
DRP[302] bit 2	MAIN[37][28][49]
DRP[302] bit 3	MAIN[37][29][49]
DRP[302] bit 4	MAIN[37][28][50]
DRP[302] bit 5	MAIN[37][29][50]
DRP[302] bit 6	MAIN[37][28][51]
DRP[302] bit 7	MAIN[37][29][51]
DRP[302] bit 8	MAIN[37][28][52]
DRP[302] bit 9	MAIN[37][29][52]
DRP[302] bit 10	MAIN[37][28][53]
DRP[302] bit 11	MAIN[37][29][53]
DRP[302] bit 12	MAIN[37][28][54]
DRP[302] bit 13	MAIN[37][29][54]
DRP[302] bit 14	MAIN[37][28][55]
DRP[302] bit 15	MAIN[37][29][55]
DRP[303] bit 0	MAIN[37][28][56]
DRP[303] bit 1	MAIN[37][29][56]
DRP[303] bit 2	MAIN[37][28][57]
DRP[303] bit 3	MAIN[37][29][57]
DRP[303] bit 4	MAIN[37][28][58]
DRP[303] bit 5	MAIN[37][29][58]
DRP[303] bit 6	MAIN[37][28][59]
DRP[303] bit 7	MAIN[37][29][59]
DRP[303] bit 8	MAIN[37][28][60]
DRP[303] bit 9	MAIN[37][29][60]
DRP[303] bit 10	MAIN[37][28][61]
DRP[303] bit 11	MAIN[37][29][61]
DRP[303] bit 12	MAIN[37][28][62]
DRP[303] bit 13	MAIN[37][29][62]
DRP[303] bit 14	MAIN[37][28][63]
DRP[303] bit 15	MAIN[37][29][63]
DRP[304] bit 0	MAIN[38][28][0]
DRP[304] bit 1	MAIN[38][29][0]
DRP[304] bit 2	MAIN[38][28][1]
DRP[304] bit 3	MAIN[38][29][1]
DRP[304] bit 4	MAIN[38][28][2]
DRP[304] bit 5	MAIN[38][29][2]
DRP[304] bit 6	MAIN[38][28][3]
DRP[304] bit 7	MAIN[38][29][3]
DRP[304] bit 8	MAIN[38][28][4]
DRP[304] bit 9	MAIN[38][29][4]
DRP[304] bit 10	MAIN[38][28][5]
DRP[304] bit 11	MAIN[38][29][5]
DRP[304] bit 12	MAIN[38][28][6]
DRP[304] bit 13	MAIN[38][29][6]
DRP[304] bit 14	MAIN[38][28][7]
DRP[304] bit 15	MAIN[38][29][7]
DRP[305] bit 0	MAIN[38][28][8]
DRP[305] bit 1	MAIN[38][29][8]
DRP[305] bit 2	MAIN[38][28][9]
DRP[305] bit 3	MAIN[38][29][9]
DRP[305] bit 4	MAIN[38][28][10]
DRP[305] bit 5	MAIN[38][29][10]
DRP[305] bit 6	MAIN[38][28][11]
DRP[305] bit 7	MAIN[38][29][11]
DRP[305] bit 8	MAIN[38][28][12]
DRP[305] bit 9	MAIN[38][29][12]
DRP[305] bit 10	MAIN[38][28][13]
DRP[305] bit 11	MAIN[38][29][13]
DRP[305] bit 12	MAIN[38][28][14]
DRP[305] bit 13	MAIN[38][29][14]
DRP[305] bit 14	MAIN[38][28][15]
DRP[305] bit 15	MAIN[38][29][15]
DRP[306] bit 0	MAIN[38][28][16]
DRP[306] bit 1	MAIN[38][29][16]
DRP[306] bit 2	MAIN[38][28][17]
DRP[306] bit 3	MAIN[38][29][17]
DRP[306] bit 4	MAIN[38][28][18]
DRP[306] bit 5	MAIN[38][29][18]
DRP[306] bit 6	MAIN[38][28][19]
DRP[306] bit 7	MAIN[38][29][19]
DRP[306] bit 8	MAIN[38][28][20]
DRP[306] bit 9	MAIN[38][29][20]
DRP[306] bit 10	MAIN[38][28][21]
DRP[306] bit 11	MAIN[38][29][21]
DRP[306] bit 12	MAIN[38][28][22]
DRP[306] bit 13	MAIN[38][29][22]
DRP[306] bit 14	MAIN[38][28][23]
DRP[306] bit 15	MAIN[38][29][23]
DRP[307] bit 0	MAIN[38][28][24]
DRP[307] bit 1	MAIN[38][29][24]
DRP[307] bit 2	MAIN[38][28][25]
DRP[307] bit 3	MAIN[38][29][25]
DRP[307] bit 4	MAIN[38][28][26]
DRP[307] bit 5	MAIN[38][29][26]
DRP[307] bit 6	MAIN[38][28][27]
DRP[307] bit 7	MAIN[38][29][27]
DRP[307] bit 8	MAIN[38][28][28]
DRP[307] bit 9	MAIN[38][29][28]
DRP[307] bit 10	MAIN[38][28][29]
DRP[307] bit 11	MAIN[38][29][29]
DRP[307] bit 12	MAIN[38][28][30]
DRP[307] bit 13	MAIN[38][29][30]
DRP[307] bit 14	MAIN[38][28][31]
DRP[307] bit 15	MAIN[38][29][31]
DRP[308] bit 0	MAIN[38][28][32]
DRP[308] bit 1	MAIN[38][29][32]
DRP[308] bit 2	MAIN[38][28][33]
DRP[308] bit 3	MAIN[38][29][33]
DRP[308] bit 4	MAIN[38][28][34]
DRP[308] bit 5	MAIN[38][29][34]
DRP[308] bit 6	MAIN[38][28][35]
DRP[308] bit 7	MAIN[38][29][35]
DRP[308] bit 8	MAIN[38][28][36]
DRP[308] bit 9	MAIN[38][29][36]
DRP[308] bit 10	MAIN[38][28][37]
DRP[308] bit 11	MAIN[38][29][37]
DRP[308] bit 12	MAIN[38][28][38]
DRP[308] bit 13	MAIN[38][29][38]
DRP[308] bit 14	MAIN[38][28][39]
DRP[308] bit 15	MAIN[38][29][39]
DRP[309] bit 0	MAIN[38][28][40]
DRP[309] bit 1	MAIN[38][29][40]
DRP[309] bit 2	MAIN[38][28][41]
DRP[309] bit 3	MAIN[38][29][41]
DRP[309] bit 4	MAIN[38][28][42]
DRP[309] bit 5	MAIN[38][29][42]
DRP[309] bit 6	MAIN[38][28][43]
DRP[309] bit 7	MAIN[38][29][43]
DRP[309] bit 8	MAIN[38][28][44]
DRP[309] bit 9	MAIN[38][29][44]
DRP[309] bit 10	MAIN[38][28][45]
DRP[309] bit 11	MAIN[38][29][45]
DRP[309] bit 12	MAIN[38][28][46]
DRP[309] bit 13	MAIN[38][29][46]
DRP[309] bit 14	MAIN[38][28][47]
DRP[309] bit 15	MAIN[38][29][47]
DRP[310] bit 0	MAIN[38][28][48]
DRP[310] bit 1	MAIN[38][29][48]
DRP[310] bit 2	MAIN[38][28][49]
DRP[310] bit 3	MAIN[38][29][49]
DRP[310] bit 4	MAIN[38][28][50]
DRP[310] bit 5	MAIN[38][29][50]
DRP[310] bit 6	MAIN[38][28][51]
DRP[310] bit 7	MAIN[38][29][51]
DRP[310] bit 8	MAIN[38][28][52]
DRP[310] bit 9	MAIN[38][29][52]
DRP[310] bit 10	MAIN[38][28][53]
DRP[310] bit 11	MAIN[38][29][53]
DRP[310] bit 12	MAIN[38][28][54]
DRP[310] bit 13	MAIN[38][29][54]
DRP[310] bit 14	MAIN[38][28][55]
DRP[310] bit 15	MAIN[38][29][55]
DRP[311] bit 0	MAIN[38][28][56]
DRP[311] bit 1	MAIN[38][29][56]
DRP[311] bit 2	MAIN[38][28][57]
DRP[311] bit 3	MAIN[38][29][57]
DRP[311] bit 4	MAIN[38][28][58]
DRP[311] bit 5	MAIN[38][29][58]
DRP[311] bit 6	MAIN[38][28][59]
DRP[311] bit 7	MAIN[38][29][59]
DRP[311] bit 8	MAIN[38][28][60]
DRP[311] bit 9	MAIN[38][29][60]
DRP[311] bit 10	MAIN[38][28][61]
DRP[311] bit 11	MAIN[38][29][61]
DRP[311] bit 12	MAIN[38][28][62]
DRP[311] bit 13	MAIN[38][29][62]
DRP[311] bit 14	MAIN[38][28][63]
DRP[311] bit 15	MAIN[38][29][63]
DRP[312] bit 0	MAIN[39][28][0]
DRP[312] bit 1	MAIN[39][29][0]
DRP[312] bit 2	MAIN[39][28][1]
DRP[312] bit 3	MAIN[39][29][1]
DRP[312] bit 4	MAIN[39][28][2]
DRP[312] bit 5	MAIN[39][29][2]
DRP[312] bit 6	MAIN[39][28][3]
DRP[312] bit 7	MAIN[39][29][3]
DRP[312] bit 8	MAIN[39][28][4]
DRP[312] bit 9	MAIN[39][29][4]
DRP[312] bit 10	MAIN[39][28][5]
DRP[312] bit 11	MAIN[39][29][5]
DRP[312] bit 12	MAIN[39][28][6]
DRP[312] bit 13	MAIN[39][29][6]
DRP[312] bit 14	MAIN[39][28][7]
DRP[312] bit 15	MAIN[39][29][7]
DRP[313] bit 0	MAIN[39][28][8]
DRP[313] bit 1	MAIN[39][29][8]
DRP[313] bit 2	MAIN[39][28][9]
DRP[313] bit 3	MAIN[39][29][9]
DRP[313] bit 4	MAIN[39][28][10]
DRP[313] bit 5	MAIN[39][29][10]
DRP[313] bit 6	MAIN[39][28][11]
DRP[313] bit 7	MAIN[39][29][11]
DRP[313] bit 8	MAIN[39][28][12]
DRP[313] bit 9	MAIN[39][29][12]
DRP[313] bit 10	MAIN[39][28][13]
DRP[313] bit 11	MAIN[39][29][13]
DRP[313] bit 12	MAIN[39][28][14]
DRP[313] bit 13	MAIN[39][29][14]
DRP[313] bit 14	MAIN[39][28][15]
DRP[313] bit 15	MAIN[39][29][15]
DRP[314] bit 0	MAIN[39][28][16]
DRP[314] bit 1	MAIN[39][29][16]
DRP[314] bit 2	MAIN[39][28][17]
DRP[314] bit 3	MAIN[39][29][17]
DRP[314] bit 4	MAIN[39][28][18]
DRP[314] bit 5	MAIN[39][29][18]
DRP[314] bit 6	MAIN[39][28][19]
DRP[314] bit 7	MAIN[39][29][19]
DRP[314] bit 8	MAIN[39][28][20]
DRP[314] bit 9	MAIN[39][29][20]
DRP[314] bit 10	MAIN[39][28][21]
DRP[314] bit 11	MAIN[39][29][21]
DRP[314] bit 12	MAIN[39][28][22]
DRP[314] bit 13	MAIN[39][29][22]
DRP[314] bit 14	MAIN[39][28][23]
DRP[314] bit 15	MAIN[39][29][23]
DRP[315] bit 0	MAIN[39][28][24]
DRP[315] bit 1	MAIN[39][29][24]
DRP[315] bit 2	MAIN[39][28][25]
DRP[315] bit 3	MAIN[39][29][25]
DRP[315] bit 4	MAIN[39][28][26]
DRP[315] bit 5	MAIN[39][29][26]
DRP[315] bit 6	MAIN[39][28][27]
DRP[315] bit 7	MAIN[39][29][27]
DRP[315] bit 8	MAIN[39][28][28]
DRP[315] bit 9	MAIN[39][29][28]
DRP[315] bit 10	MAIN[39][28][29]
DRP[315] bit 11	MAIN[39][29][29]
DRP[315] bit 12	MAIN[39][28][30]
DRP[315] bit 13	MAIN[39][29][30]
DRP[315] bit 14	MAIN[39][28][31]
DRP[315] bit 15	MAIN[39][29][31]
DRP[316] bit 0	MAIN[39][28][32]
DRP[316] bit 1	MAIN[39][29][32]
DRP[316] bit 2	MAIN[39][28][33]
DRP[316] bit 3	MAIN[39][29][33]
DRP[316] bit 4	MAIN[39][28][34]
DRP[316] bit 5	MAIN[39][29][34]
DRP[316] bit 6	MAIN[39][28][35]
DRP[316] bit 7	MAIN[39][29][35]
DRP[316] bit 8	MAIN[39][28][36]
DRP[316] bit 9	MAIN[39][29][36]
DRP[316] bit 10	MAIN[39][28][37]
DRP[316] bit 11	MAIN[39][29][37]
DRP[316] bit 12	MAIN[39][28][38]
DRP[316] bit 13	MAIN[39][29][38]
DRP[316] bit 14	MAIN[39][28][39]
DRP[316] bit 15	MAIN[39][29][39]
DRP[317] bit 0	MAIN[39][28][40]
DRP[317] bit 1	MAIN[39][29][40]
DRP[317] bit 2	MAIN[39][28][41]
DRP[317] bit 3	MAIN[39][29][41]
DRP[317] bit 4	MAIN[39][28][42]
DRP[317] bit 5	MAIN[39][29][42]
DRP[317] bit 6	MAIN[39][28][43]
DRP[317] bit 7	MAIN[39][29][43]
DRP[317] bit 8	MAIN[39][28][44]
DRP[317] bit 9	MAIN[39][29][44]
DRP[317] bit 10	MAIN[39][28][45]
DRP[317] bit 11	MAIN[39][29][45]
DRP[317] bit 12	MAIN[39][28][46]
DRP[317] bit 13	MAIN[39][29][46]
DRP[317] bit 14	MAIN[39][28][47]
DRP[317] bit 15	MAIN[39][29][47]
DRP[318] bit 0	MAIN[39][28][48]
DRP[318] bit 1	MAIN[39][29][48]
DRP[318] bit 2	MAIN[39][28][49]
DRP[318] bit 3	MAIN[39][29][49]
DRP[318] bit 4	MAIN[39][28][50]
DRP[318] bit 5	MAIN[39][29][50]
DRP[318] bit 6	MAIN[39][28][51]
DRP[318] bit 7	MAIN[39][29][51]
DRP[318] bit 8	MAIN[39][28][52]
DRP[318] bit 9	MAIN[39][29][52]
DRP[318] bit 10	MAIN[39][28][53]
DRP[318] bit 11	MAIN[39][29][53]
DRP[318] bit 12	MAIN[39][28][54]
DRP[318] bit 13	MAIN[39][29][54]
DRP[318] bit 14	MAIN[39][28][55]
DRP[318] bit 15	MAIN[39][29][55]
DRP[319] bit 0	MAIN[39][28][56]
DRP[319] bit 1	MAIN[39][29][56]
DRP[319] bit 2	MAIN[39][28][57]
DRP[319] bit 3	MAIN[39][29][57]
DRP[319] bit 4	MAIN[39][28][58]
DRP[319] bit 5	MAIN[39][29][58]
DRP[319] bit 6	MAIN[39][28][59]
DRP[319] bit 7	MAIN[39][29][59]
DRP[319] bit 8	MAIN[39][28][60]
DRP[319] bit 9	MAIN[39][29][60]
DRP[319] bit 10	MAIN[39][28][61]
DRP[319] bit 11	MAIN[39][29][61]
DRP[319] bit 12	MAIN[39][28][62]
DRP[319] bit 13	MAIN[39][29][62]
DRP[319] bit 14	MAIN[39][28][63]
DRP[319] bit 15	MAIN[39][29][63]
ENABLE	MAIN[9][29][43]
CLKTESTSIG_SEL	[enum: GTH_QUAD_CLKTESTSIG_SEL]
MUX_REFCLK	[enum: GTH_QUAD_MUX_REFCLK]
RX_FABRIC_WIDTH0	[enum: GTH_QUAD_FABRIC_WIDTH]
TX_FABRIC_WIDTH0	[enum: GTH_QUAD_FABRIC_WIDTH]
GTH_CFG_PWRUP_LANE0 bit 0	MAIN[9][29][48]
TST_PCS_LOOPBACK_LANE0 bit 0	MAIN[9][28][48]
BUFFER_CONFIG_LANE0 bit 0	MAIN[9][28][56]
BUFFER_CONFIG_LANE0 bit 1	MAIN[9][29][56]
BUFFER_CONFIG_LANE0 bit 2	MAIN[9][28][57]
BUFFER_CONFIG_LANE0 bit 3	MAIN[9][29][57]
BUFFER_CONFIG_LANE0 bit 4	MAIN[9][28][58]
BUFFER_CONFIG_LANE0 bit 5	MAIN[9][29][58]
BUFFER_CONFIG_LANE0 bit 6	MAIN[9][28][59]
BUFFER_CONFIG_LANE0 bit 7	MAIN[9][29][59]
BUFFER_CONFIG_LANE0 bit 8	MAIN[9][28][60]
BUFFER_CONFIG_LANE0 bit 9	MAIN[9][29][60]
BUFFER_CONFIG_LANE0 bit 10	MAIN[9][28][61]
BUFFER_CONFIG_LANE0 bit 11	MAIN[9][29][61]
BUFFER_CONFIG_LANE0 bit 12	MAIN[9][28][62]
BUFFER_CONFIG_LANE0 bit 13	MAIN[9][29][62]
BUFFER_CONFIG_LANE0 bit 14	MAIN[9][28][63]
BUFFER_CONFIG_LANE0 bit 15	MAIN[9][29][63]
DFE_TRAIN_CTRL_LANE0 bit 0	MAIN[7][28][16]
DFE_TRAIN_CTRL_LANE0 bit 1	MAIN[7][29][16]
DFE_TRAIN_CTRL_LANE0 bit 2	MAIN[7][28][17]
DFE_TRAIN_CTRL_LANE0 bit 3	MAIN[7][29][17]
DFE_TRAIN_CTRL_LANE0 bit 4	MAIN[7][28][18]
DFE_TRAIN_CTRL_LANE0 bit 5	MAIN[7][29][18]
DFE_TRAIN_CTRL_LANE0 bit 6	MAIN[7][28][19]
DFE_TRAIN_CTRL_LANE0 bit 7	MAIN[7][29][19]
DFE_TRAIN_CTRL_LANE0 bit 8	MAIN[7][28][20]
DFE_TRAIN_CTRL_LANE0 bit 9	MAIN[7][29][20]
DFE_TRAIN_CTRL_LANE0 bit 10	MAIN[7][28][21]
DFE_TRAIN_CTRL_LANE0 bit 11	MAIN[7][29][21]
DFE_TRAIN_CTRL_LANE0 bit 12	MAIN[7][28][22]
DFE_TRAIN_CTRL_LANE0 bit 13	MAIN[7][29][22]
DFE_TRAIN_CTRL_LANE0 bit 14	MAIN[7][28][23]
DFE_TRAIN_CTRL_LANE0 bit 15	MAIN[7][29][23]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 0	MAIN[1][28][40]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 1	MAIN[1][29][40]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 2	MAIN[1][28][41]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 3	MAIN[1][29][41]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 4	MAIN[1][28][42]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 5	MAIN[1][29][42]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 6	MAIN[1][28][43]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 7	MAIN[1][29][43]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 8	MAIN[1][28][44]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 9	MAIN[1][29][44]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 10	MAIN[1][28][45]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 11	MAIN[1][29][45]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 12	MAIN[1][28][46]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 13	MAIN[1][29][46]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 14	MAIN[1][28][47]
E10GBASEKR_LD_COEFF_UPD_LANE0 bit 15	MAIN[1][29][47]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 0	MAIN[1][28][32]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 1	MAIN[1][29][32]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 2	MAIN[1][28][33]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 3	MAIN[1][29][33]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 4	MAIN[1][28][34]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 5	MAIN[1][29][34]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 6	MAIN[1][28][35]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 7	MAIN[1][29][35]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 8	MAIN[1][28][36]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 9	MAIN[1][29][36]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 10	MAIN[1][28][37]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 11	MAIN[1][29][37]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 12	MAIN[1][28][38]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 13	MAIN[1][29][38]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 14	MAIN[1][28][39]
E10GBASEKR_LP_COEFF_UPD_LANE0 bit 15	MAIN[1][29][39]
E10GBASEKR_PMA_CTRL_LANE0 bit 0	MAIN[1][28][24]
E10GBASEKR_PMA_CTRL_LANE0 bit 1	MAIN[1][29][24]
E10GBASEKR_PMA_CTRL_LANE0 bit 2	MAIN[1][28][25]
E10GBASEKR_PMA_CTRL_LANE0 bit 3	MAIN[1][29][25]
E10GBASEKR_PMA_CTRL_LANE0 bit 4	MAIN[1][28][26]
E10GBASEKR_PMA_CTRL_LANE0 bit 5	MAIN[1][29][26]
E10GBASEKR_PMA_CTRL_LANE0 bit 6	MAIN[1][28][27]
E10GBASEKR_PMA_CTRL_LANE0 bit 7	MAIN[1][29][27]
E10GBASEKR_PMA_CTRL_LANE0 bit 8	MAIN[1][28][28]
E10GBASEKR_PMA_CTRL_LANE0 bit 9	MAIN[1][29][28]
E10GBASEKR_PMA_CTRL_LANE0 bit 10	MAIN[1][28][29]
E10GBASEKR_PMA_CTRL_LANE0 bit 11	MAIN[1][29][29]
E10GBASEKR_PMA_CTRL_LANE0 bit 12	MAIN[1][28][30]
E10GBASEKR_PMA_CTRL_LANE0 bit 13	MAIN[1][29][30]
E10GBASEKR_PMA_CTRL_LANE0 bit 14	MAIN[1][28][31]
E10GBASEKR_PMA_CTRL_LANE0 bit 15	MAIN[1][29][31]
E10GBASEKX_CTRL_LANE0 bit 0	MAIN[1][28][48]
E10GBASEKX_CTRL_LANE0 bit 1	MAIN[1][29][48]
E10GBASEKX_CTRL_LANE0 bit 2	MAIN[1][28][49]
E10GBASEKX_CTRL_LANE0 bit 3	MAIN[1][29][49]
E10GBASEKX_CTRL_LANE0 bit 4	MAIN[1][28][50]
E10GBASEKX_CTRL_LANE0 bit 5	MAIN[1][29][50]
E10GBASEKX_CTRL_LANE0 bit 6	MAIN[1][28][51]
E10GBASEKX_CTRL_LANE0 bit 7	MAIN[1][29][51]
E10GBASEKX_CTRL_LANE0 bit 8	MAIN[1][28][52]
E10GBASEKX_CTRL_LANE0 bit 9	MAIN[1][29][52]
E10GBASEKX_CTRL_LANE0 bit 10	MAIN[1][28][53]
E10GBASEKX_CTRL_LANE0 bit 11	MAIN[1][29][53]
E10GBASEKX_CTRL_LANE0 bit 12	MAIN[1][28][54]
E10GBASEKX_CTRL_LANE0 bit 13	MAIN[1][29][54]
E10GBASEKX_CTRL_LANE0 bit 14	MAIN[1][28][55]
E10GBASEKX_CTRL_LANE0 bit 15	MAIN[1][29][55]
E10GBASER_PCS_CFG_LANE0 bit 0	MAIN[12][28][16]
E10GBASER_PCS_CFG_LANE0 bit 1	MAIN[12][29][16]
E10GBASER_PCS_CFG_LANE0 bit 2	MAIN[12][28][17]
E10GBASER_PCS_CFG_LANE0 bit 3	MAIN[12][29][17]
E10GBASER_PCS_CFG_LANE0 bit 4	MAIN[12][28][18]
E10GBASER_PCS_CFG_LANE0 bit 5	MAIN[12][29][18]
E10GBASER_PCS_CFG_LANE0 bit 6	MAIN[12][28][19]
E10GBASER_PCS_CFG_LANE0 bit 7	MAIN[12][29][19]
E10GBASER_PCS_CFG_LANE0 bit 8	MAIN[12][28][20]
E10GBASER_PCS_CFG_LANE0 bit 9	MAIN[12][29][20]
E10GBASER_PCS_CFG_LANE0 bit 10	MAIN[12][28][21]
E10GBASER_PCS_CFG_LANE0 bit 11	MAIN[12][29][21]
E10GBASER_PCS_CFG_LANE0 bit 12	MAIN[12][28][22]
E10GBASER_PCS_CFG_LANE0 bit 13	MAIN[12][29][22]
E10GBASER_PCS_CFG_LANE0 bit 14	MAIN[12][28][23]
E10GBASER_PCS_CFG_LANE0 bit 15	MAIN[12][29][23]
E10GBASER_PCS_SEEDA0_LANE0 bit 0	MAIN[8][28][24]
E10GBASER_PCS_SEEDA0_LANE0 bit 1	MAIN[8][29][24]
E10GBASER_PCS_SEEDA0_LANE0 bit 2	MAIN[8][28][25]
E10GBASER_PCS_SEEDA0_LANE0 bit 3	MAIN[8][29][25]
E10GBASER_PCS_SEEDA0_LANE0 bit 4	MAIN[8][28][26]
E10GBASER_PCS_SEEDA0_LANE0 bit 5	MAIN[8][29][26]
E10GBASER_PCS_SEEDA0_LANE0 bit 6	MAIN[8][28][27]
E10GBASER_PCS_SEEDA0_LANE0 bit 7	MAIN[8][29][27]
E10GBASER_PCS_SEEDA0_LANE0 bit 8	MAIN[8][28][28]
E10GBASER_PCS_SEEDA0_LANE0 bit 9	MAIN[8][29][28]
E10GBASER_PCS_SEEDA0_LANE0 bit 10	MAIN[8][28][29]
E10GBASER_PCS_SEEDA0_LANE0 bit 11	MAIN[8][29][29]
E10GBASER_PCS_SEEDA0_LANE0 bit 12	MAIN[8][28][30]
E10GBASER_PCS_SEEDA0_LANE0 bit 13	MAIN[8][29][30]
E10GBASER_PCS_SEEDA0_LANE0 bit 14	MAIN[8][28][31]
E10GBASER_PCS_SEEDA0_LANE0 bit 15	MAIN[8][29][31]
E10GBASER_PCS_SEEDA1_LANE0 bit 0	MAIN[8][28][32]
E10GBASER_PCS_SEEDA1_LANE0 bit 1	MAIN[8][29][32]
E10GBASER_PCS_SEEDA1_LANE0 bit 2	MAIN[8][28][33]
E10GBASER_PCS_SEEDA1_LANE0 bit 3	MAIN[8][29][33]
E10GBASER_PCS_SEEDA1_LANE0 bit 4	MAIN[8][28][34]
E10GBASER_PCS_SEEDA1_LANE0 bit 5	MAIN[8][29][34]
E10GBASER_PCS_SEEDA1_LANE0 bit 6	MAIN[8][28][35]
E10GBASER_PCS_SEEDA1_LANE0 bit 7	MAIN[8][29][35]
E10GBASER_PCS_SEEDA1_LANE0 bit 8	MAIN[8][28][36]
E10GBASER_PCS_SEEDA1_LANE0 bit 9	MAIN[8][29][36]
E10GBASER_PCS_SEEDA1_LANE0 bit 10	MAIN[8][28][37]
E10GBASER_PCS_SEEDA1_LANE0 bit 11	MAIN[8][29][37]
E10GBASER_PCS_SEEDA1_LANE0 bit 12	MAIN[8][28][38]
E10GBASER_PCS_SEEDA1_LANE0 bit 13	MAIN[8][29][38]
E10GBASER_PCS_SEEDA1_LANE0 bit 14	MAIN[8][28][39]
E10GBASER_PCS_SEEDA1_LANE0 bit 15	MAIN[8][29][39]
E10GBASER_PCS_SEEDA2_LANE0 bit 0	MAIN[8][28][40]
E10GBASER_PCS_SEEDA2_LANE0 bit 1	MAIN[8][29][40]
E10GBASER_PCS_SEEDA2_LANE0 bit 2	MAIN[8][28][41]
E10GBASER_PCS_SEEDA2_LANE0 bit 3	MAIN[8][29][41]
E10GBASER_PCS_SEEDA2_LANE0 bit 4	MAIN[8][28][42]
E10GBASER_PCS_SEEDA2_LANE0 bit 5	MAIN[8][29][42]
E10GBASER_PCS_SEEDA2_LANE0 bit 6	MAIN[8][28][43]
E10GBASER_PCS_SEEDA2_LANE0 bit 7	MAIN[8][29][43]
E10GBASER_PCS_SEEDA2_LANE0 bit 8	MAIN[8][28][44]
E10GBASER_PCS_SEEDA2_LANE0 bit 9	MAIN[8][29][44]
E10GBASER_PCS_SEEDA2_LANE0 bit 10	MAIN[8][28][45]
E10GBASER_PCS_SEEDA2_LANE0 bit 11	MAIN[8][29][45]
E10GBASER_PCS_SEEDA2_LANE0 bit 12	MAIN[8][28][46]
E10GBASER_PCS_SEEDA2_LANE0 bit 13	MAIN[8][29][46]
E10GBASER_PCS_SEEDA2_LANE0 bit 14	MAIN[8][28][47]
E10GBASER_PCS_SEEDA2_LANE0 bit 15	MAIN[8][29][47]
E10GBASER_PCS_SEEDA3_LANE0 bit 0	MAIN[8][28][48]
E10GBASER_PCS_SEEDA3_LANE0 bit 1	MAIN[8][29][48]
E10GBASER_PCS_SEEDA3_LANE0 bit 2	MAIN[8][28][49]
E10GBASER_PCS_SEEDA3_LANE0 bit 3	MAIN[8][29][49]
E10GBASER_PCS_SEEDA3_LANE0 bit 4	MAIN[8][28][50]
E10GBASER_PCS_SEEDA3_LANE0 bit 5	MAIN[8][29][50]
E10GBASER_PCS_SEEDA3_LANE0 bit 6	MAIN[8][28][51]
E10GBASER_PCS_SEEDA3_LANE0 bit 7	MAIN[8][29][51]
E10GBASER_PCS_SEEDA3_LANE0 bit 8	MAIN[8][28][52]
E10GBASER_PCS_SEEDA3_LANE0 bit 9	MAIN[8][29][52]
E10GBASER_PCS_SEEDA3_LANE0 bit 10	MAIN[8][28][53]
E10GBASER_PCS_SEEDA3_LANE0 bit 11	MAIN[8][29][53]
E10GBASER_PCS_SEEDA3_LANE0 bit 12	MAIN[8][28][54]
E10GBASER_PCS_SEEDA3_LANE0 bit 13	MAIN[8][29][54]
E10GBASER_PCS_SEEDA3_LANE0 bit 14	MAIN[8][28][55]
E10GBASER_PCS_SEEDA3_LANE0 bit 15	MAIN[8][29][55]
E10GBASER_PCS_SEEDB0_LANE0 bit 0	MAIN[8][28][56]
E10GBASER_PCS_SEEDB0_LANE0 bit 1	MAIN[8][29][56]
E10GBASER_PCS_SEEDB0_LANE0 bit 2	MAIN[8][28][57]
E10GBASER_PCS_SEEDB0_LANE0 bit 3	MAIN[8][29][57]
E10GBASER_PCS_SEEDB0_LANE0 bit 4	MAIN[8][28][58]
E10GBASER_PCS_SEEDB0_LANE0 bit 5	MAIN[8][29][58]
E10GBASER_PCS_SEEDB0_LANE0 bit 6	MAIN[8][28][59]
E10GBASER_PCS_SEEDB0_LANE0 bit 7	MAIN[8][29][59]
E10GBASER_PCS_SEEDB0_LANE0 bit 8	MAIN[8][28][60]
E10GBASER_PCS_SEEDB0_LANE0 bit 9	MAIN[8][29][60]
E10GBASER_PCS_SEEDB0_LANE0 bit 10	MAIN[8][28][61]
E10GBASER_PCS_SEEDB0_LANE0 bit 11	MAIN[8][29][61]
E10GBASER_PCS_SEEDB0_LANE0 bit 12	MAIN[8][28][62]
E10GBASER_PCS_SEEDB0_LANE0 bit 13	MAIN[8][29][62]
E10GBASER_PCS_SEEDB0_LANE0 bit 14	MAIN[8][28][63]
E10GBASER_PCS_SEEDB0_LANE0 bit 15	MAIN[8][29][63]
E10GBASER_PCS_SEEDB1_LANE0 bit 0	MAIN[9][28][0]
E10GBASER_PCS_SEEDB1_LANE0 bit 1	MAIN[9][29][0]
E10GBASER_PCS_SEEDB1_LANE0 bit 2	MAIN[9][28][1]
E10GBASER_PCS_SEEDB1_LANE0 bit 3	MAIN[9][29][1]
E10GBASER_PCS_SEEDB1_LANE0 bit 4	MAIN[9][28][2]
E10GBASER_PCS_SEEDB1_LANE0 bit 5	MAIN[9][29][2]
E10GBASER_PCS_SEEDB1_LANE0 bit 6	MAIN[9][28][3]
E10GBASER_PCS_SEEDB1_LANE0 bit 7	MAIN[9][29][3]
E10GBASER_PCS_SEEDB1_LANE0 bit 8	MAIN[9][28][4]
E10GBASER_PCS_SEEDB1_LANE0 bit 9	MAIN[9][29][4]
E10GBASER_PCS_SEEDB1_LANE0 bit 10	MAIN[9][28][5]
E10GBASER_PCS_SEEDB1_LANE0 bit 11	MAIN[9][29][5]
E10GBASER_PCS_SEEDB1_LANE0 bit 12	MAIN[9][28][6]
E10GBASER_PCS_SEEDB1_LANE0 bit 13	MAIN[9][29][6]
E10GBASER_PCS_SEEDB1_LANE0 bit 14	MAIN[9][28][7]
E10GBASER_PCS_SEEDB1_LANE0 bit 15	MAIN[9][29][7]
E10GBASER_PCS_SEEDB2_LANE0 bit 0	MAIN[9][28][8]
E10GBASER_PCS_SEEDB2_LANE0 bit 1	MAIN[9][29][8]
E10GBASER_PCS_SEEDB2_LANE0 bit 2	MAIN[9][28][9]
E10GBASER_PCS_SEEDB2_LANE0 bit 3	MAIN[9][29][9]
E10GBASER_PCS_SEEDB2_LANE0 bit 4	MAIN[9][28][10]
E10GBASER_PCS_SEEDB2_LANE0 bit 5	MAIN[9][29][10]
E10GBASER_PCS_SEEDB2_LANE0 bit 6	MAIN[9][28][11]
E10GBASER_PCS_SEEDB2_LANE0 bit 7	MAIN[9][29][11]
E10GBASER_PCS_SEEDB2_LANE0 bit 8	MAIN[9][28][12]
E10GBASER_PCS_SEEDB2_LANE0 bit 9	MAIN[9][29][12]
E10GBASER_PCS_SEEDB2_LANE0 bit 10	MAIN[9][28][13]
E10GBASER_PCS_SEEDB2_LANE0 bit 11	MAIN[9][29][13]
E10GBASER_PCS_SEEDB2_LANE0 bit 12	MAIN[9][28][14]
E10GBASER_PCS_SEEDB2_LANE0 bit 13	MAIN[9][29][14]
E10GBASER_PCS_SEEDB2_LANE0 bit 14	MAIN[9][28][15]
E10GBASER_PCS_SEEDB2_LANE0 bit 15	MAIN[9][29][15]
E10GBASER_PCS_SEEDB3_LANE0 bit 0	MAIN[9][28][16]
E10GBASER_PCS_SEEDB3_LANE0 bit 1	MAIN[9][29][16]
E10GBASER_PCS_SEEDB3_LANE0 bit 2	MAIN[9][28][17]
E10GBASER_PCS_SEEDB3_LANE0 bit 3	MAIN[9][29][17]
E10GBASER_PCS_SEEDB3_LANE0 bit 4	MAIN[9][28][18]
E10GBASER_PCS_SEEDB3_LANE0 bit 5	MAIN[9][29][18]
E10GBASER_PCS_SEEDB3_LANE0 bit 6	MAIN[9][28][19]
E10GBASER_PCS_SEEDB3_LANE0 bit 7	MAIN[9][29][19]
E10GBASER_PCS_SEEDB3_LANE0 bit 8	MAIN[9][28][20]
E10GBASER_PCS_SEEDB3_LANE0 bit 9	MAIN[9][29][20]
E10GBASER_PCS_SEEDB3_LANE0 bit 10	MAIN[9][28][21]
E10GBASER_PCS_SEEDB3_LANE0 bit 11	MAIN[9][29][21]
E10GBASER_PCS_SEEDB3_LANE0 bit 12	MAIN[9][28][22]
E10GBASER_PCS_SEEDB3_LANE0 bit 13	MAIN[9][29][22]
E10GBASER_PCS_SEEDB3_LANE0 bit 14	MAIN[9][28][23]
E10GBASER_PCS_SEEDB3_LANE0 bit 15	MAIN[9][29][23]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 0	MAIN[9][28][24]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 1	MAIN[9][29][24]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 2	MAIN[9][28][25]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 3	MAIN[9][29][25]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 4	MAIN[9][28][26]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 5	MAIN[9][29][26]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 6	MAIN[9][28][27]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 7	MAIN[9][29][27]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 8	MAIN[9][28][28]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 9	MAIN[9][29][28]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 10	MAIN[9][28][29]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 11	MAIN[9][29][29]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 12	MAIN[9][28][30]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 13	MAIN[9][29][30]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 14	MAIN[9][28][31]
E10GBASER_PCS_TEST_CTRL_LANE0 bit 15	MAIN[9][29][31]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 0	MAIN[8][28][16]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 1	MAIN[8][29][16]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 2	MAIN[8][28][17]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 3	MAIN[8][29][17]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 4	MAIN[8][28][18]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 5	MAIN[8][29][18]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 6	MAIN[8][28][19]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 7	MAIN[8][29][19]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 8	MAIN[8][28][20]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 9	MAIN[8][29][20]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 10	MAIN[8][28][21]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 11	MAIN[8][29][21]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 12	MAIN[8][28][22]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 13	MAIN[8][29][22]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 14	MAIN[8][28][23]
E10GBASEX_PCS_TSTCTRL_LANE0 bit 15	MAIN[8][29][23]
LANE_PWR_CTRL_LANE0 bit 0	MAIN[7][28][24]
LANE_PWR_CTRL_LANE0 bit 1	MAIN[7][29][24]
LANE_PWR_CTRL_LANE0 bit 2	MAIN[7][28][25]
LANE_PWR_CTRL_LANE0 bit 3	MAIN[7][29][25]
LANE_PWR_CTRL_LANE0 bit 4	MAIN[7][28][26]
LANE_PWR_CTRL_LANE0 bit 5	MAIN[7][29][26]
LANE_PWR_CTRL_LANE0 bit 6	MAIN[7][28][27]
LANE_PWR_CTRL_LANE0 bit 7	MAIN[7][29][27]
LANE_PWR_CTRL_LANE0 bit 8	MAIN[7][28][28]
LANE_PWR_CTRL_LANE0 bit 9	MAIN[7][29][28]
LANE_PWR_CTRL_LANE0 bit 10	MAIN[7][28][29]
LANE_PWR_CTRL_LANE0 bit 11	MAIN[7][29][29]
LANE_PWR_CTRL_LANE0 bit 12	MAIN[7][28][30]
LANE_PWR_CTRL_LANE0 bit 13	MAIN[7][29][30]
LANE_PWR_CTRL_LANE0 bit 14	MAIN[7][28][31]
LANE_PWR_CTRL_LANE0 bit 15	MAIN[7][29][31]
LNK_TRN_CFG_LANE0 bit 0	MAIN[7][28][48]
LNK_TRN_CFG_LANE0 bit 1	MAIN[7][29][48]
LNK_TRN_CFG_LANE0 bit 2	MAIN[7][28][49]
LNK_TRN_CFG_LANE0 bit 3	MAIN[7][29][49]
LNK_TRN_CFG_LANE0 bit 4	MAIN[7][28][50]
LNK_TRN_CFG_LANE0 bit 5	MAIN[7][29][50]
LNK_TRN_CFG_LANE0 bit 6	MAIN[7][28][51]
LNK_TRN_CFG_LANE0 bit 7	MAIN[7][29][51]
LNK_TRN_CFG_LANE0 bit 8	MAIN[7][28][52]
LNK_TRN_CFG_LANE0 bit 9	MAIN[7][29][52]
LNK_TRN_CFG_LANE0 bit 10	MAIN[7][28][53]
LNK_TRN_CFG_LANE0 bit 11	MAIN[7][29][53]
LNK_TRN_CFG_LANE0 bit 12	MAIN[7][28][54]
LNK_TRN_CFG_LANE0 bit 13	MAIN[7][29][54]
LNK_TRN_CFG_LANE0 bit 14	MAIN[7][28][55]
LNK_TRN_CFG_LANE0 bit 15	MAIN[7][29][55]
LNK_TRN_COEFF_REQ_LANE0 bit 0	MAIN[7][28][56]
LNK_TRN_COEFF_REQ_LANE0 bit 1	MAIN[7][29][56]
LNK_TRN_COEFF_REQ_LANE0 bit 2	MAIN[7][28][57]
LNK_TRN_COEFF_REQ_LANE0 bit 3	MAIN[7][29][57]
LNK_TRN_COEFF_REQ_LANE0 bit 4	MAIN[7][28][58]
LNK_TRN_COEFF_REQ_LANE0 bit 5	MAIN[7][29][58]
LNK_TRN_COEFF_REQ_LANE0 bit 6	MAIN[7][28][59]
LNK_TRN_COEFF_REQ_LANE0 bit 7	MAIN[7][29][59]
LNK_TRN_COEFF_REQ_LANE0 bit 8	MAIN[7][28][60]
LNK_TRN_COEFF_REQ_LANE0 bit 9	MAIN[7][29][60]
LNK_TRN_COEFF_REQ_LANE0 bit 10	MAIN[7][28][61]
LNK_TRN_COEFF_REQ_LANE0 bit 11	MAIN[7][29][61]
LNK_TRN_COEFF_REQ_LANE0 bit 12	MAIN[7][28][62]
LNK_TRN_COEFF_REQ_LANE0 bit 13	MAIN[7][29][62]
LNK_TRN_COEFF_REQ_LANE0 bit 14	MAIN[7][28][63]
LNK_TRN_COEFF_REQ_LANE0 bit 15	MAIN[7][29][63]
PCS_ABILITY_LANE0 bit 0	MAIN[12][28][0]
PCS_ABILITY_LANE0 bit 1	MAIN[12][29][0]
PCS_ABILITY_LANE0 bit 2	MAIN[12][28][1]
PCS_ABILITY_LANE0 bit 3	MAIN[12][29][1]
PCS_ABILITY_LANE0 bit 4	MAIN[12][28][2]
PCS_ABILITY_LANE0 bit 5	MAIN[12][29][2]
PCS_ABILITY_LANE0 bit 6	MAIN[12][28][3]
PCS_ABILITY_LANE0 bit 7	MAIN[12][29][3]
PCS_ABILITY_LANE0 bit 8	MAIN[12][28][4]
PCS_ABILITY_LANE0 bit 9	MAIN[12][29][4]
PCS_ABILITY_LANE0 bit 10	MAIN[12][28][5]
PCS_ABILITY_LANE0 bit 11	MAIN[12][29][5]
PCS_ABILITY_LANE0 bit 12	MAIN[12][28][6]
PCS_ABILITY_LANE0 bit 13	MAIN[12][29][6]
PCS_ABILITY_LANE0 bit 14	MAIN[12][28][7]
PCS_ABILITY_LANE0 bit 15	MAIN[12][29][7]
PCS_CTRL1_LANE0 bit 0	MAIN[8][28][0]
PCS_CTRL1_LANE0 bit 1	MAIN[8][29][0]
PCS_CTRL1_LANE0 bit 2	MAIN[8][28][1]
PCS_CTRL1_LANE0 bit 3	MAIN[8][29][1]
PCS_CTRL1_LANE0 bit 4	MAIN[8][28][2]
PCS_CTRL1_LANE0 bit 5	MAIN[8][29][2]
PCS_CTRL1_LANE0 bit 6	MAIN[8][28][3]
PCS_CTRL1_LANE0 bit 7	MAIN[8][29][3]
PCS_CTRL1_LANE0 bit 8	MAIN[8][28][4]
PCS_CTRL1_LANE0 bit 9	MAIN[8][29][4]
PCS_CTRL1_LANE0 bit 10	MAIN[8][28][5]
PCS_CTRL1_LANE0 bit 11	MAIN[8][29][5]
PCS_CTRL1_LANE0 bit 12	MAIN[8][28][6]
PCS_CTRL1_LANE0 bit 13	MAIN[8][29][6]
PCS_CTRL1_LANE0 bit 14	MAIN[8][28][7]
PCS_CTRL1_LANE0 bit 15	MAIN[8][29][7]
PCS_CTRL2_LANE0 bit 0	MAIN[8][28][8]
PCS_CTRL2_LANE0 bit 1	MAIN[8][29][8]
PCS_CTRL2_LANE0 bit 2	MAIN[8][28][9]
PCS_CTRL2_LANE0 bit 3	MAIN[8][29][9]
PCS_CTRL2_LANE0 bit 4	MAIN[8][28][10]
PCS_CTRL2_LANE0 bit 5	MAIN[8][29][10]
PCS_CTRL2_LANE0 bit 6	MAIN[8][28][11]
PCS_CTRL2_LANE0 bit 7	MAIN[8][29][11]
PCS_CTRL2_LANE0 bit 8	MAIN[8][28][12]
PCS_CTRL2_LANE0 bit 9	MAIN[8][29][12]
PCS_CTRL2_LANE0 bit 10	MAIN[8][28][13]
PCS_CTRL2_LANE0 bit 11	MAIN[8][29][13]
PCS_CTRL2_LANE0 bit 12	MAIN[8][28][14]
PCS_CTRL2_LANE0 bit 13	MAIN[8][29][14]
PCS_CTRL2_LANE0 bit 14	MAIN[8][28][15]
PCS_CTRL2_LANE0 bit 15	MAIN[8][29][15]
PCS_MISC_CFG_0_LANE0 bit 0	MAIN[11][28][8]
PCS_MISC_CFG_0_LANE0 bit 1	MAIN[11][29][8]
PCS_MISC_CFG_0_LANE0 bit 2	MAIN[11][28][9]
PCS_MISC_CFG_0_LANE0 bit 3	MAIN[11][29][9]
PCS_MISC_CFG_0_LANE0 bit 4	MAIN[11][28][10]
PCS_MISC_CFG_0_LANE0 bit 5	MAIN[11][29][10]
PCS_MISC_CFG_0_LANE0 bit 6	MAIN[11][28][11]
PCS_MISC_CFG_0_LANE0 bit 7	MAIN[11][29][11]
PCS_MISC_CFG_0_LANE0 bit 8	MAIN[11][28][12]
PCS_MISC_CFG_0_LANE0 bit 9	MAIN[11][29][12]
PCS_MISC_CFG_0_LANE0 bit 10	MAIN[11][28][13]
PCS_MISC_CFG_0_LANE0 bit 11	MAIN[11][29][13]
PCS_MISC_CFG_0_LANE0 bit 12	MAIN[11][28][14]
PCS_MISC_CFG_0_LANE0 bit 13	MAIN[11][29][14]
PCS_MISC_CFG_0_LANE0 bit 14	MAIN[11][28][15]
PCS_MISC_CFG_0_LANE0 bit 15	MAIN[11][29][15]
PCS_MISC_CFG_1_LANE0 bit 0	MAIN[11][28][48]
PCS_MISC_CFG_1_LANE0 bit 1	MAIN[11][29][48]
PCS_MISC_CFG_1_LANE0 bit 2	MAIN[11][28][49]
PCS_MISC_CFG_1_LANE0 bit 3	MAIN[11][29][49]
PCS_MISC_CFG_1_LANE0 bit 4	MAIN[11][28][50]
PCS_MISC_CFG_1_LANE0 bit 5	MAIN[11][29][50]
PCS_MISC_CFG_1_LANE0 bit 6	MAIN[11][28][51]
PCS_MISC_CFG_1_LANE0 bit 7	MAIN[11][29][51]
PCS_MISC_CFG_1_LANE0 bit 8	MAIN[11][28][52]
PCS_MISC_CFG_1_LANE0 bit 9	MAIN[11][29][52]
PCS_MISC_CFG_1_LANE0 bit 10	MAIN[11][28][53]
PCS_MISC_CFG_1_LANE0 bit 11	MAIN[11][29][53]
PCS_MISC_CFG_1_LANE0 bit 12	MAIN[11][28][54]
PCS_MISC_CFG_1_LANE0 bit 13	MAIN[11][29][54]
PCS_MISC_CFG_1_LANE0 bit 14	MAIN[11][28][55]
PCS_MISC_CFG_1_LANE0 bit 15	MAIN[11][29][55]
PCS_MODE_LANE0 bit 0	MAIN[9][28][32]
PCS_MODE_LANE0 bit 1	MAIN[9][29][32]
PCS_MODE_LANE0 bit 2	MAIN[9][28][33]
PCS_MODE_LANE0 bit 3	MAIN[9][29][33]
PCS_MODE_LANE0 bit 4	MAIN[9][28][34]
PCS_MODE_LANE0 bit 5	MAIN[9][29][34]
PCS_MODE_LANE0 bit 6	MAIN[9][28][35]
PCS_MODE_LANE0 bit 7	MAIN[9][29][35]
PCS_MODE_LANE0 bit 8	MAIN[9][28][36]
PCS_MODE_LANE0 bit 9	MAIN[9][29][36]
PCS_MODE_LANE0 bit 10	MAIN[9][28][37]
PCS_MODE_LANE0 bit 11	MAIN[9][29][37]
PCS_MODE_LANE0 bit 12	MAIN[9][28][38]
PCS_MODE_LANE0 bit 13	MAIN[9][29][38]
PCS_MODE_LANE0 bit 14	MAIN[9][28][39]
PCS_MODE_LANE0 bit 15	MAIN[9][29][39]
PCS_RESET_1_LANE0 bit 0	MAIN[11][28][56]
PCS_RESET_1_LANE0 bit 1	MAIN[11][29][56]
PCS_RESET_1_LANE0 bit 2	MAIN[11][28][57]
PCS_RESET_1_LANE0 bit 3	MAIN[11][29][57]
PCS_RESET_1_LANE0 bit 4	MAIN[11][28][58]
PCS_RESET_1_LANE0 bit 5	MAIN[11][29][58]
PCS_RESET_1_LANE0 bit 6	MAIN[11][28][59]
PCS_RESET_1_LANE0 bit 7	MAIN[11][29][59]
PCS_RESET_1_LANE0 bit 8	MAIN[11][28][60]
PCS_RESET_1_LANE0 bit 9	MAIN[11][29][60]
PCS_RESET_1_LANE0 bit 10	MAIN[11][28][61]
PCS_RESET_1_LANE0 bit 11	MAIN[11][29][61]
PCS_RESET_1_LANE0 bit 12	MAIN[11][28][62]
PCS_RESET_1_LANE0 bit 13	MAIN[11][29][62]
PCS_RESET_1_LANE0 bit 14	MAIN[11][28][63]
PCS_RESET_1_LANE0 bit 15	MAIN[11][29][63]
PCS_RESET_LANE0 bit 0	MAIN[11][28][32]
PCS_RESET_LANE0 bit 1	MAIN[11][29][32]
PCS_RESET_LANE0 bit 2	MAIN[11][28][33]
PCS_RESET_LANE0 bit 3	MAIN[11][29][33]
PCS_RESET_LANE0 bit 4	MAIN[11][28][34]
PCS_RESET_LANE0 bit 5	MAIN[11][29][34]
PCS_RESET_LANE0 bit 6	MAIN[11][28][35]
PCS_RESET_LANE0 bit 7	MAIN[11][29][35]
PCS_RESET_LANE0 bit 8	MAIN[11][28][36]
PCS_RESET_LANE0 bit 9	MAIN[11][29][36]
PCS_RESET_LANE0 bit 10	MAIN[11][28][37]
PCS_RESET_LANE0 bit 11	MAIN[11][29][37]
PCS_RESET_LANE0 bit 12	MAIN[11][28][38]
PCS_RESET_LANE0 bit 13	MAIN[11][29][38]
PCS_RESET_LANE0 bit 14	MAIN[11][28][39]
PCS_RESET_LANE0 bit 15	MAIN[11][29][39]
PCS_TYPE_LANE0 bit 0	MAIN[12][28][8]
PCS_TYPE_LANE0 bit 1	MAIN[12][29][8]
PCS_TYPE_LANE0 bit 2	MAIN[12][28][9]
PCS_TYPE_LANE0 bit 3	MAIN[12][29][9]
PCS_TYPE_LANE0 bit 4	MAIN[12][28][10]
PCS_TYPE_LANE0 bit 5	MAIN[12][29][10]
PCS_TYPE_LANE0 bit 6	MAIN[12][28][11]
PCS_TYPE_LANE0 bit 7	MAIN[12][29][11]
PCS_TYPE_LANE0 bit 8	MAIN[12][28][12]
PCS_TYPE_LANE0 bit 9	MAIN[12][29][12]
PCS_TYPE_LANE0 bit 10	MAIN[12][28][13]
PCS_TYPE_LANE0 bit 11	MAIN[12][29][13]
PCS_TYPE_LANE0 bit 12	MAIN[12][28][14]
PCS_TYPE_LANE0 bit 13	MAIN[12][29][14]
PCS_TYPE_LANE0 bit 14	MAIN[12][28][15]
PCS_TYPE_LANE0 bit 15	MAIN[12][29][15]
PMA_CTRL1_LANE0 bit 0	MAIN[1][28][0]
PMA_CTRL1_LANE0 bit 1	MAIN[1][29][0]
PMA_CTRL1_LANE0 bit 2	MAIN[1][28][1]
PMA_CTRL1_LANE0 bit 3	MAIN[1][29][1]
PMA_CTRL1_LANE0 bit 4	MAIN[1][28][2]
PMA_CTRL1_LANE0 bit 5	MAIN[1][29][2]
PMA_CTRL1_LANE0 bit 6	MAIN[1][28][3]
PMA_CTRL1_LANE0 bit 7	MAIN[1][29][3]
PMA_CTRL1_LANE0 bit 8	MAIN[1][28][4]
PMA_CTRL1_LANE0 bit 9	MAIN[1][29][4]
PMA_CTRL1_LANE0 bit 10	MAIN[1][28][5]
PMA_CTRL1_LANE0 bit 11	MAIN[1][29][5]
PMA_CTRL1_LANE0 bit 12	MAIN[1][28][6]
PMA_CTRL1_LANE0 bit 13	MAIN[1][29][6]
PMA_CTRL1_LANE0 bit 14	MAIN[1][28][7]
PMA_CTRL1_LANE0 bit 15	MAIN[1][29][7]
PMA_CTRL2_LANE0 bit 0	MAIN[1][28][8]
PMA_CTRL2_LANE0 bit 1	MAIN[1][29][8]
PMA_CTRL2_LANE0 bit 2	MAIN[1][28][9]
PMA_CTRL2_LANE0 bit 3	MAIN[1][29][9]
PMA_CTRL2_LANE0 bit 4	MAIN[1][28][10]
PMA_CTRL2_LANE0 bit 5	MAIN[1][29][10]
PMA_CTRL2_LANE0 bit 6	MAIN[1][28][11]
PMA_CTRL2_LANE0 bit 7	MAIN[1][29][11]
PMA_CTRL2_LANE0 bit 8	MAIN[1][28][12]
PMA_CTRL2_LANE0 bit 9	MAIN[1][29][12]
PMA_CTRL2_LANE0 bit 10	MAIN[1][28][13]
PMA_CTRL2_LANE0 bit 11	MAIN[1][29][13]
PMA_CTRL2_LANE0 bit 12	MAIN[1][28][14]
PMA_CTRL2_LANE0 bit 13	MAIN[1][29][14]
PMA_CTRL2_LANE0 bit 14	MAIN[1][28][15]
PMA_CTRL2_LANE0 bit 15	MAIN[1][29][15]
PMA_LPBK_CTRL_LANE0 bit 0	MAIN[7][28][8]
PMA_LPBK_CTRL_LANE0 bit 1	MAIN[7][29][8]
PMA_LPBK_CTRL_LANE0 bit 2	MAIN[7][28][9]
PMA_LPBK_CTRL_LANE0 bit 3	MAIN[7][29][9]
PMA_LPBK_CTRL_LANE0 bit 4	MAIN[7][28][10]
PMA_LPBK_CTRL_LANE0 bit 5	MAIN[7][29][10]
PMA_LPBK_CTRL_LANE0 bit 6	MAIN[7][28][11]
PMA_LPBK_CTRL_LANE0 bit 7	MAIN[7][29][11]
PMA_LPBK_CTRL_LANE0 bit 8	MAIN[7][28][12]
PMA_LPBK_CTRL_LANE0 bit 9	MAIN[7][29][12]
PMA_LPBK_CTRL_LANE0 bit 10	MAIN[7][28][13]
PMA_LPBK_CTRL_LANE0 bit 11	MAIN[7][29][13]
PMA_LPBK_CTRL_LANE0 bit 12	MAIN[7][28][14]
PMA_LPBK_CTRL_LANE0 bit 13	MAIN[7][29][14]
PMA_LPBK_CTRL_LANE0 bit 14	MAIN[7][28][15]
PMA_LPBK_CTRL_LANE0 bit 15	MAIN[7][29][15]
PRBS_BER_CFG0_LANE0 bit 0	MAIN[11][28][16]
PRBS_BER_CFG0_LANE0 bit 1	MAIN[11][29][16]
PRBS_BER_CFG0_LANE0 bit 2	MAIN[11][28][17]
PRBS_BER_CFG0_LANE0 bit 3	MAIN[11][29][17]
PRBS_BER_CFG0_LANE0 bit 4	MAIN[11][28][18]
PRBS_BER_CFG0_LANE0 bit 5	MAIN[11][29][18]
PRBS_BER_CFG0_LANE0 bit 6	MAIN[11][28][19]
PRBS_BER_CFG0_LANE0 bit 7	MAIN[11][29][19]
PRBS_BER_CFG0_LANE0 bit 8	MAIN[11][28][20]
PRBS_BER_CFG0_LANE0 bit 9	MAIN[11][29][20]
PRBS_BER_CFG0_LANE0 bit 10	MAIN[11][28][21]
PRBS_BER_CFG0_LANE0 bit 11	MAIN[11][29][21]
PRBS_BER_CFG0_LANE0 bit 12	MAIN[11][28][22]
PRBS_BER_CFG0_LANE0 bit 13	MAIN[11][29][22]
PRBS_BER_CFG0_LANE0 bit 14	MAIN[11][28][23]
PRBS_BER_CFG0_LANE0 bit 15	MAIN[11][29][23]
PRBS_BER_CFG1_LANE0 bit 0	MAIN[11][28][24]
PRBS_BER_CFG1_LANE0 bit 1	MAIN[11][29][24]
PRBS_BER_CFG1_LANE0 bit 2	MAIN[11][28][25]
PRBS_BER_CFG1_LANE0 bit 3	MAIN[11][29][25]
PRBS_BER_CFG1_LANE0 bit 4	MAIN[11][28][26]
PRBS_BER_CFG1_LANE0 bit 5	MAIN[11][29][26]
PRBS_BER_CFG1_LANE0 bit 6	MAIN[11][28][27]
PRBS_BER_CFG1_LANE0 bit 7	MAIN[11][29][27]
PRBS_BER_CFG1_LANE0 bit 8	MAIN[11][28][28]
PRBS_BER_CFG1_LANE0 bit 9	MAIN[11][29][28]
PRBS_BER_CFG1_LANE0 bit 10	MAIN[11][28][29]
PRBS_BER_CFG1_LANE0 bit 11	MAIN[11][29][29]
PRBS_BER_CFG1_LANE0 bit 12	MAIN[11][28][30]
PRBS_BER_CFG1_LANE0 bit 13	MAIN[11][29][30]
PRBS_BER_CFG1_LANE0 bit 14	MAIN[11][28][31]
PRBS_BER_CFG1_LANE0 bit 15	MAIN[11][29][31]
PRBS_CFG_LANE0 bit 0	MAIN[11][28][40]
PRBS_CFG_LANE0 bit 1	MAIN[11][29][40]
PRBS_CFG_LANE0 bit 2	MAIN[11][28][41]
PRBS_CFG_LANE0 bit 3	MAIN[11][29][41]
PRBS_CFG_LANE0 bit 4	MAIN[11][28][42]
PRBS_CFG_LANE0 bit 5	MAIN[11][29][42]
PRBS_CFG_LANE0 bit 6	MAIN[11][28][43]
PRBS_CFG_LANE0 bit 7	MAIN[11][29][43]
PRBS_CFG_LANE0 bit 8	MAIN[11][28][44]
PRBS_CFG_LANE0 bit 9	MAIN[11][29][44]
PRBS_CFG_LANE0 bit 10	MAIN[11][28][45]
PRBS_CFG_LANE0 bit 11	MAIN[11][29][45]
PRBS_CFG_LANE0 bit 12	MAIN[11][28][46]
PRBS_CFG_LANE0 bit 13	MAIN[11][29][46]
PRBS_CFG_LANE0 bit 14	MAIN[11][28][47]
PRBS_CFG_LANE0 bit 15	MAIN[11][29][47]
RX_AEQ_VAL0_LANE0 bit 0	MAIN[5][28][56]
RX_AEQ_VAL0_LANE0 bit 1	MAIN[5][29][56]
RX_AEQ_VAL0_LANE0 bit 2	MAIN[5][28][57]
RX_AEQ_VAL0_LANE0 bit 3	MAIN[5][29][57]
RX_AEQ_VAL0_LANE0 bit 4	MAIN[5][28][58]
RX_AEQ_VAL0_LANE0 bit 5	MAIN[5][29][58]
RX_AEQ_VAL0_LANE0 bit 6	MAIN[5][28][59]
RX_AEQ_VAL0_LANE0 bit 7	MAIN[5][29][59]
RX_AEQ_VAL0_LANE0 bit 8	MAIN[5][28][60]
RX_AEQ_VAL0_LANE0 bit 9	MAIN[5][29][60]
RX_AEQ_VAL0_LANE0 bit 10	MAIN[5][28][61]
RX_AEQ_VAL0_LANE0 bit 11	MAIN[5][29][61]
RX_AEQ_VAL0_LANE0 bit 12	MAIN[5][28][62]
RX_AEQ_VAL0_LANE0 bit 13	MAIN[5][29][62]
RX_AEQ_VAL0_LANE0 bit 14	MAIN[5][28][63]
RX_AEQ_VAL0_LANE0 bit 15	MAIN[5][29][63]
RX_AEQ_VAL1_LANE0 bit 0	MAIN[6][28][0]
RX_AEQ_VAL1_LANE0 bit 1	MAIN[6][29][0]
RX_AEQ_VAL1_LANE0 bit 2	MAIN[6][28][1]
RX_AEQ_VAL1_LANE0 bit 3	MAIN[6][29][1]
RX_AEQ_VAL1_LANE0 bit 4	MAIN[6][28][2]
RX_AEQ_VAL1_LANE0 bit 5	MAIN[6][29][2]
RX_AEQ_VAL1_LANE0 bit 6	MAIN[6][28][3]
RX_AEQ_VAL1_LANE0 bit 7	MAIN[6][29][3]
RX_AEQ_VAL1_LANE0 bit 8	MAIN[6][28][4]
RX_AEQ_VAL1_LANE0 bit 9	MAIN[6][29][4]
RX_AEQ_VAL1_LANE0 bit 10	MAIN[6][28][5]
RX_AEQ_VAL1_LANE0 bit 11	MAIN[6][29][5]
RX_AEQ_VAL1_LANE0 bit 12	MAIN[6][28][6]
RX_AEQ_VAL1_LANE0 bit 13	MAIN[6][29][6]
RX_AEQ_VAL1_LANE0 bit 14	MAIN[6][28][7]
RX_AEQ_VAL1_LANE0 bit 15	MAIN[6][29][7]
RX_AGC_CTRL_LANE0 bit 0	MAIN[5][28][0]
RX_AGC_CTRL_LANE0 bit 1	MAIN[5][29][0]
RX_AGC_CTRL_LANE0 bit 2	MAIN[5][28][1]
RX_AGC_CTRL_LANE0 bit 3	MAIN[5][29][1]
RX_AGC_CTRL_LANE0 bit 4	MAIN[5][28][2]
RX_AGC_CTRL_LANE0 bit 5	MAIN[5][29][2]
RX_AGC_CTRL_LANE0 bit 6	MAIN[5][28][3]
RX_AGC_CTRL_LANE0 bit 7	MAIN[5][29][3]
RX_AGC_CTRL_LANE0 bit 8	MAIN[5][28][4]
RX_AGC_CTRL_LANE0 bit 9	MAIN[5][29][4]
RX_AGC_CTRL_LANE0 bit 10	MAIN[5][28][5]
RX_AGC_CTRL_LANE0 bit 11	MAIN[5][29][5]
RX_AGC_CTRL_LANE0 bit 12	MAIN[5][28][6]
RX_AGC_CTRL_LANE0 bit 13	MAIN[5][29][6]
RX_AGC_CTRL_LANE0 bit 14	MAIN[5][28][7]
RX_AGC_CTRL_LANE0 bit 15	MAIN[5][29][7]
RX_CDR_CTRL0_LANE0 bit 0	MAIN[5][28][16]
RX_CDR_CTRL0_LANE0 bit 1	MAIN[5][29][16]
RX_CDR_CTRL0_LANE0 bit 2	MAIN[5][28][17]
RX_CDR_CTRL0_LANE0 bit 3	MAIN[5][29][17]
RX_CDR_CTRL0_LANE0 bit 4	MAIN[5][28][18]
RX_CDR_CTRL0_LANE0 bit 5	MAIN[5][29][18]
RX_CDR_CTRL0_LANE0 bit 6	MAIN[5][28][19]
RX_CDR_CTRL0_LANE0 bit 7	MAIN[5][29][19]
RX_CDR_CTRL0_LANE0 bit 8	MAIN[5][28][20]
RX_CDR_CTRL0_LANE0 bit 9	MAIN[5][29][20]
RX_CDR_CTRL0_LANE0 bit 10	MAIN[5][28][21]
RX_CDR_CTRL0_LANE0 bit 11	MAIN[5][29][21]
RX_CDR_CTRL0_LANE0 bit 12	MAIN[5][28][22]
RX_CDR_CTRL0_LANE0 bit 13	MAIN[5][29][22]
RX_CDR_CTRL0_LANE0 bit 14	MAIN[5][28][23]
RX_CDR_CTRL0_LANE0 bit 15	MAIN[5][29][23]
RX_CDR_CTRL1_LANE0 bit 0	MAIN[5][28][24]
RX_CDR_CTRL1_LANE0 bit 1	MAIN[5][29][24]
RX_CDR_CTRL1_LANE0 bit 2	MAIN[5][28][25]
RX_CDR_CTRL1_LANE0 bit 3	MAIN[5][29][25]
RX_CDR_CTRL1_LANE0 bit 4	MAIN[5][28][26]
RX_CDR_CTRL1_LANE0 bit 5	MAIN[5][29][26]
RX_CDR_CTRL1_LANE0 bit 6	MAIN[5][28][27]
RX_CDR_CTRL1_LANE0 bit 7	MAIN[5][29][27]
RX_CDR_CTRL1_LANE0 bit 8	MAIN[5][28][28]
RX_CDR_CTRL1_LANE0 bit 9	MAIN[5][29][28]
RX_CDR_CTRL1_LANE0 bit 10	MAIN[5][28][29]
RX_CDR_CTRL1_LANE0 bit 11	MAIN[5][29][29]
RX_CDR_CTRL1_LANE0 bit 12	MAIN[5][28][30]
RX_CDR_CTRL1_LANE0 bit 13	MAIN[5][29][30]
RX_CDR_CTRL1_LANE0 bit 14	MAIN[5][28][31]
RX_CDR_CTRL1_LANE0 bit 15	MAIN[5][29][31]
RX_CDR_CTRL2_LANE0 bit 0	MAIN[5][28][32]
RX_CDR_CTRL2_LANE0 bit 1	MAIN[5][29][32]
RX_CDR_CTRL2_LANE0 bit 2	MAIN[5][28][33]
RX_CDR_CTRL2_LANE0 bit 3	MAIN[5][29][33]
RX_CDR_CTRL2_LANE0 bit 4	MAIN[5][28][34]
RX_CDR_CTRL2_LANE0 bit 5	MAIN[5][29][34]
RX_CDR_CTRL2_LANE0 bit 6	MAIN[5][28][35]
RX_CDR_CTRL2_LANE0 bit 7	MAIN[5][29][35]
RX_CDR_CTRL2_LANE0 bit 8	MAIN[5][28][36]
RX_CDR_CTRL2_LANE0 bit 9	MAIN[5][29][36]
RX_CDR_CTRL2_LANE0 bit 10	MAIN[5][28][37]
RX_CDR_CTRL2_LANE0 bit 11	MAIN[5][29][37]
RX_CDR_CTRL2_LANE0 bit 12	MAIN[5][28][38]
RX_CDR_CTRL2_LANE0 bit 13	MAIN[5][29][38]
RX_CDR_CTRL2_LANE0 bit 14	MAIN[5][28][39]
RX_CDR_CTRL2_LANE0 bit 15	MAIN[5][29][39]
RX_CFG0_LANE0 bit 0	MAIN[4][28][40]
RX_CFG0_LANE0 bit 1	MAIN[4][29][40]
RX_CFG0_LANE0 bit 2	MAIN[4][28][41]
RX_CFG0_LANE0 bit 3	MAIN[4][29][41]
RX_CFG0_LANE0 bit 4	MAIN[4][28][42]
RX_CFG0_LANE0 bit 5	MAIN[4][29][42]
RX_CFG0_LANE0 bit 6	MAIN[4][28][43]
RX_CFG0_LANE0 bit 7	MAIN[4][29][43]
RX_CFG0_LANE0 bit 8	MAIN[4][28][44]
RX_CFG0_LANE0 bit 9	MAIN[4][29][44]
RX_CFG0_LANE0 bit 10	MAIN[4][28][45]
RX_CFG0_LANE0 bit 11	MAIN[4][29][45]
RX_CFG0_LANE0 bit 12	MAIN[4][28][46]
RX_CFG0_LANE0 bit 13	MAIN[4][29][46]
RX_CFG0_LANE0 bit 14	MAIN[4][28][47]
RX_CFG0_LANE0 bit 15	MAIN[4][29][47]
RX_CFG1_LANE0 bit 0	MAIN[4][28][48]
RX_CFG1_LANE0 bit 1	MAIN[4][29][48]
RX_CFG1_LANE0 bit 2	MAIN[4][28][49]
RX_CFG1_LANE0 bit 3	MAIN[4][29][49]
RX_CFG1_LANE0 bit 4	MAIN[4][28][50]
RX_CFG1_LANE0 bit 5	MAIN[4][29][50]
RX_CFG1_LANE0 bit 6	MAIN[4][28][51]
RX_CFG1_LANE0 bit 7	MAIN[4][29][51]
RX_CFG1_LANE0 bit 8	MAIN[4][28][52]
RX_CFG1_LANE0 bit 9	MAIN[4][29][52]
RX_CFG1_LANE0 bit 10	MAIN[4][28][53]
RX_CFG1_LANE0 bit 11	MAIN[4][29][53]
RX_CFG1_LANE0 bit 12	MAIN[4][28][54]
RX_CFG1_LANE0 bit 13	MAIN[4][29][54]
RX_CFG1_LANE0 bit 14	MAIN[4][28][55]
RX_CFG1_LANE0 bit 15	MAIN[4][29][55]
RX_CFG2_LANE0 bit 0	MAIN[4][28][56]
RX_CFG2_LANE0 bit 1	MAIN[4][29][56]
RX_CFG2_LANE0 bit 2	MAIN[4][28][57]
RX_CFG2_LANE0 bit 3	MAIN[4][29][57]
RX_CFG2_LANE0 bit 4	MAIN[4][28][58]
RX_CFG2_LANE0 bit 5	MAIN[4][29][58]
RX_CFG2_LANE0 bit 6	MAIN[4][28][59]
RX_CFG2_LANE0 bit 7	MAIN[4][29][59]
RX_CFG2_LANE0 bit 8	MAIN[4][28][60]
RX_CFG2_LANE0 bit 9	MAIN[4][29][60]
RX_CFG2_LANE0 bit 10	MAIN[4][28][61]
RX_CFG2_LANE0 bit 11	MAIN[4][29][61]
RX_CFG2_LANE0 bit 12	MAIN[4][28][62]
RX_CFG2_LANE0 bit 13	MAIN[4][29][62]
RX_CFG2_LANE0 bit 14	MAIN[4][28][63]
RX_CFG2_LANE0 bit 15	MAIN[4][29][63]
RX_CTLE_CTRL_LANE0 bit 0	MAIN[6][28][8]
RX_CTLE_CTRL_LANE0 bit 1	MAIN[6][29][8]
RX_CTLE_CTRL_LANE0 bit 2	MAIN[6][28][9]
RX_CTLE_CTRL_LANE0 bit 3	MAIN[6][29][9]
RX_CTLE_CTRL_LANE0 bit 4	MAIN[6][28][10]
RX_CTLE_CTRL_LANE0 bit 5	MAIN[6][29][10]
RX_CTLE_CTRL_LANE0 bit 6	MAIN[6][28][11]
RX_CTLE_CTRL_LANE0 bit 7	MAIN[6][29][11]
RX_CTLE_CTRL_LANE0 bit 8	MAIN[6][28][12]
RX_CTLE_CTRL_LANE0 bit 9	MAIN[6][29][12]
RX_CTLE_CTRL_LANE0 bit 10	MAIN[6][28][13]
RX_CTLE_CTRL_LANE0 bit 11	MAIN[6][29][13]
RX_CTLE_CTRL_LANE0 bit 12	MAIN[6][28][14]
RX_CTLE_CTRL_LANE0 bit 13	MAIN[6][29][14]
RX_CTLE_CTRL_LANE0 bit 14	MAIN[6][28][15]
RX_CTLE_CTRL_LANE0 bit 15	MAIN[6][29][15]
RX_CTRL_OVRD_LANE0 bit 0	MAIN[7][28][40]
RX_CTRL_OVRD_LANE0 bit 1	MAIN[7][29][40]
RX_CTRL_OVRD_LANE0 bit 2	MAIN[7][28][41]
RX_CTRL_OVRD_LANE0 bit 3	MAIN[7][29][41]
RX_CTRL_OVRD_LANE0 bit 4	MAIN[7][28][42]
RX_CTRL_OVRD_LANE0 bit 5	MAIN[7][29][42]
RX_CTRL_OVRD_LANE0 bit 6	MAIN[7][28][43]
RX_CTRL_OVRD_LANE0 bit 7	MAIN[7][29][43]
RX_CTRL_OVRD_LANE0 bit 8	MAIN[7][28][44]
RX_CTRL_OVRD_LANE0 bit 9	MAIN[7][29][44]
RX_CTRL_OVRD_LANE0 bit 10	MAIN[7][28][45]
RX_CTRL_OVRD_LANE0 bit 11	MAIN[7][29][45]
RX_CTRL_OVRD_LANE0 bit 12	MAIN[7][28][46]
RX_CTRL_OVRD_LANE0 bit 13	MAIN[7][29][46]
RX_CTRL_OVRD_LANE0 bit 14	MAIN[7][28][47]
RX_CTRL_OVRD_LANE0 bit 15	MAIN[7][29][47]
RX_LOOP_CTRL_LANE0 bit 0	MAIN[5][28][8]
RX_LOOP_CTRL_LANE0 bit 1	MAIN[5][29][8]
RX_LOOP_CTRL_LANE0 bit 2	MAIN[5][28][9]
RX_LOOP_CTRL_LANE0 bit 3	MAIN[5][29][9]
RX_LOOP_CTRL_LANE0 bit 4	MAIN[5][28][10]
RX_LOOP_CTRL_LANE0 bit 5	MAIN[5][29][10]
RX_LOOP_CTRL_LANE0 bit 6	MAIN[5][28][11]
RX_LOOP_CTRL_LANE0 bit 7	MAIN[5][29][11]
RX_LOOP_CTRL_LANE0 bit 8	MAIN[5][28][12]
RX_LOOP_CTRL_LANE0 bit 9	MAIN[5][29][12]
RX_LOOP_CTRL_LANE0 bit 10	MAIN[5][28][13]
RX_LOOP_CTRL_LANE0 bit 11	MAIN[5][29][13]
RX_LOOP_CTRL_LANE0 bit 12	MAIN[5][28][14]
RX_LOOP_CTRL_LANE0 bit 13	MAIN[5][29][14]
RX_LOOP_CTRL_LANE0 bit 14	MAIN[5][28][15]
RX_LOOP_CTRL_LANE0 bit 15	MAIN[5][29][15]
RX_MVAL0_LANE0 bit 0	MAIN[5][28][40]
RX_MVAL0_LANE0 bit 1	MAIN[5][29][40]
RX_MVAL0_LANE0 bit 2	MAIN[5][28][41]
RX_MVAL0_LANE0 bit 3	MAIN[5][29][41]
RX_MVAL0_LANE0 bit 4	MAIN[5][28][42]
RX_MVAL0_LANE0 bit 5	MAIN[5][29][42]
RX_MVAL0_LANE0 bit 6	MAIN[5][28][43]
RX_MVAL0_LANE0 bit 7	MAIN[5][29][43]
RX_MVAL0_LANE0 bit 8	MAIN[5][28][44]
RX_MVAL0_LANE0 bit 9	MAIN[5][29][44]
RX_MVAL0_LANE0 bit 10	MAIN[5][28][45]
RX_MVAL0_LANE0 bit 11	MAIN[5][29][45]
RX_MVAL0_LANE0 bit 12	MAIN[5][28][46]
RX_MVAL0_LANE0 bit 13	MAIN[5][29][46]
RX_MVAL0_LANE0 bit 14	MAIN[5][28][47]
RX_MVAL0_LANE0 bit 15	MAIN[5][29][47]
RX_MVAL1_LANE0 bit 0	MAIN[5][28][48]
RX_MVAL1_LANE0 bit 1	MAIN[5][29][48]
RX_MVAL1_LANE0 bit 2	MAIN[5][28][49]
RX_MVAL1_LANE0 bit 3	MAIN[5][29][49]
RX_MVAL1_LANE0 bit 4	MAIN[5][28][50]
RX_MVAL1_LANE0 bit 5	MAIN[5][29][50]
RX_MVAL1_LANE0 bit 6	MAIN[5][28][51]
RX_MVAL1_LANE0 bit 7	MAIN[5][29][51]
RX_MVAL1_LANE0 bit 8	MAIN[5][28][52]
RX_MVAL1_LANE0 bit 9	MAIN[5][29][52]
RX_MVAL1_LANE0 bit 10	MAIN[5][28][53]
RX_MVAL1_LANE0 bit 11	MAIN[5][29][53]
RX_MVAL1_LANE0 bit 12	MAIN[5][28][54]
RX_MVAL1_LANE0 bit 13	MAIN[5][29][54]
RX_MVAL1_LANE0 bit 14	MAIN[5][28][55]
RX_MVAL1_LANE0 bit 15	MAIN[5][29][55]
TERM_CTRL_LANE0 bit 0	MAIN[7][28][0]
TERM_CTRL_LANE0 bit 1	MAIN[7][29][0]
TERM_CTRL_LANE0 bit 2	MAIN[7][28][1]
TERM_CTRL_LANE0 bit 3	MAIN[7][29][1]
TERM_CTRL_LANE0 bit 4	MAIN[7][28][2]
TERM_CTRL_LANE0 bit 5	MAIN[7][29][2]
TERM_CTRL_LANE0 bit 6	MAIN[7][28][3]
TERM_CTRL_LANE0 bit 7	MAIN[7][29][3]
TERM_CTRL_LANE0 bit 8	MAIN[7][28][4]
TERM_CTRL_LANE0 bit 9	MAIN[7][29][4]
TERM_CTRL_LANE0 bit 10	MAIN[7][28][5]
TERM_CTRL_LANE0 bit 11	MAIN[7][29][5]
TERM_CTRL_LANE0 bit 12	MAIN[7][28][6]
TERM_CTRL_LANE0 bit 13	MAIN[7][29][6]
TERM_CTRL_LANE0 bit 14	MAIN[7][28][7]
TERM_CTRL_LANE0 bit 15	MAIN[7][29][7]
TX_CFG0_LANE0 bit 0	MAIN[6][28][16]
TX_CFG0_LANE0 bit 1	MAIN[6][29][16]
TX_CFG0_LANE0 bit 2	MAIN[6][28][17]
TX_CFG0_LANE0 bit 3	MAIN[6][29][17]
TX_CFG0_LANE0 bit 4	MAIN[6][28][18]
TX_CFG0_LANE0 bit 5	MAIN[6][29][18]
TX_CFG0_LANE0 bit 6	MAIN[6][28][19]
TX_CFG0_LANE0 bit 7	MAIN[6][29][19]
TX_CFG0_LANE0 bit 8	MAIN[6][28][20]
TX_CFG0_LANE0 bit 9	MAIN[6][29][20]
TX_CFG0_LANE0 bit 10	MAIN[6][28][21]
TX_CFG0_LANE0 bit 11	MAIN[6][29][21]
TX_CFG0_LANE0 bit 12	MAIN[6][28][22]
TX_CFG0_LANE0 bit 13	MAIN[6][29][22]
TX_CFG0_LANE0 bit 14	MAIN[6][28][23]
TX_CFG0_LANE0 bit 15	MAIN[6][29][23]
TX_CFG1_LANE0 bit 0	MAIN[6][28][24]
TX_CFG1_LANE0 bit 1	MAIN[6][29][24]
TX_CFG1_LANE0 bit 2	MAIN[6][28][25]
TX_CFG1_LANE0 bit 3	MAIN[6][29][25]
TX_CFG1_LANE0 bit 4	MAIN[6][28][26]
TX_CFG1_LANE0 bit 5	MAIN[6][29][26]
TX_CFG1_LANE0 bit 6	MAIN[6][28][27]
TX_CFG1_LANE0 bit 7	MAIN[6][29][27]
TX_CFG1_LANE0 bit 8	MAIN[6][28][28]
TX_CFG1_LANE0 bit 9	MAIN[6][29][28]
TX_CFG1_LANE0 bit 10	MAIN[6][28][29]
TX_CFG1_LANE0 bit 11	MAIN[6][29][29]
TX_CFG1_LANE0 bit 12	MAIN[6][28][30]
TX_CFG1_LANE0 bit 13	MAIN[6][29][30]
TX_CFG1_LANE0 bit 14	MAIN[6][28][31]
TX_CFG1_LANE0 bit 15	MAIN[6][29][31]
TX_CFG2_LANE0 bit 0	MAIN[6][28][32]
TX_CFG2_LANE0 bit 1	MAIN[6][29][32]
TX_CFG2_LANE0 bit 2	MAIN[6][28][33]
TX_CFG2_LANE0 bit 3	MAIN[6][29][33]
TX_CFG2_LANE0 bit 4	MAIN[6][28][34]
TX_CFG2_LANE0 bit 5	MAIN[6][29][34]
TX_CFG2_LANE0 bit 6	MAIN[6][28][35]
TX_CFG2_LANE0 bit 7	MAIN[6][29][35]
TX_CFG2_LANE0 bit 8	MAIN[6][28][36]
TX_CFG2_LANE0 bit 9	MAIN[6][29][36]
TX_CFG2_LANE0 bit 10	MAIN[6][28][37]
TX_CFG2_LANE0 bit 11	MAIN[6][29][37]
TX_CFG2_LANE0 bit 12	MAIN[6][28][38]
TX_CFG2_LANE0 bit 13	MAIN[6][29][38]
TX_CFG2_LANE0 bit 14	MAIN[6][28][39]
TX_CFG2_LANE0 bit 15	MAIN[6][29][39]
TX_CLK_SEL0_LANE0 bit 0	MAIN[6][28][48]
TX_CLK_SEL0_LANE0 bit 1	MAIN[6][29][48]
TX_CLK_SEL0_LANE0 bit 2	MAIN[6][28][49]
TX_CLK_SEL0_LANE0 bit 3	MAIN[6][29][49]
TX_CLK_SEL0_LANE0 bit 4	MAIN[6][28][50]
TX_CLK_SEL0_LANE0 bit 5	MAIN[6][29][50]
TX_CLK_SEL0_LANE0 bit 6	MAIN[6][28][51]
TX_CLK_SEL0_LANE0 bit 7	MAIN[6][29][51]
TX_CLK_SEL0_LANE0 bit 8	MAIN[6][28][52]
TX_CLK_SEL0_LANE0 bit 9	MAIN[6][29][52]
TX_CLK_SEL0_LANE0 bit 10	MAIN[6][28][53]
TX_CLK_SEL0_LANE0 bit 11	MAIN[6][29][53]
TX_CLK_SEL0_LANE0 bit 12	MAIN[6][28][54]
TX_CLK_SEL0_LANE0 bit 13	MAIN[6][29][54]
TX_CLK_SEL0_LANE0 bit 14	MAIN[6][28][55]
TX_CLK_SEL0_LANE0 bit 15	MAIN[6][29][55]
TX_CLK_SEL1_LANE0 bit 0	MAIN[6][28][56]
TX_CLK_SEL1_LANE0 bit 1	MAIN[6][29][56]
TX_CLK_SEL1_LANE0 bit 2	MAIN[6][28][57]
TX_CLK_SEL1_LANE0 bit 3	MAIN[6][29][57]
TX_CLK_SEL1_LANE0 bit 4	MAIN[6][28][58]
TX_CLK_SEL1_LANE0 bit 5	MAIN[6][29][58]
TX_CLK_SEL1_LANE0 bit 6	MAIN[6][28][59]
TX_CLK_SEL1_LANE0 bit 7	MAIN[6][29][59]
TX_CLK_SEL1_LANE0 bit 8	MAIN[6][28][60]
TX_CLK_SEL1_LANE0 bit 9	MAIN[6][29][60]
TX_CLK_SEL1_LANE0 bit 10	MAIN[6][28][61]
TX_CLK_SEL1_LANE0 bit 11	MAIN[6][29][61]
TX_CLK_SEL1_LANE0 bit 12	MAIN[6][28][62]
TX_CLK_SEL1_LANE0 bit 13	MAIN[6][29][62]
TX_CLK_SEL1_LANE0 bit 14	MAIN[6][28][63]
TX_CLK_SEL1_LANE0 bit 15	MAIN[6][29][63]
TX_DISABLE_LANE0 bit 0	MAIN[1][28][16]
TX_DISABLE_LANE0 bit 1	MAIN[1][29][16]
TX_DISABLE_LANE0 bit 2	MAIN[1][28][17]
TX_DISABLE_LANE0 bit 3	MAIN[1][29][17]
TX_DISABLE_LANE0 bit 4	MAIN[1][28][18]
TX_DISABLE_LANE0 bit 5	MAIN[1][29][18]
TX_DISABLE_LANE0 bit 6	MAIN[1][28][19]
TX_DISABLE_LANE0 bit 7	MAIN[1][29][19]
TX_DISABLE_LANE0 bit 8	MAIN[1][28][20]
TX_DISABLE_LANE0 bit 9	MAIN[1][29][20]
TX_DISABLE_LANE0 bit 10	MAIN[1][28][21]
TX_DISABLE_LANE0 bit 11	MAIN[1][29][21]
TX_DISABLE_LANE0 bit 12	MAIN[1][28][22]
TX_DISABLE_LANE0 bit 13	MAIN[1][29][22]
TX_DISABLE_LANE0 bit 14	MAIN[1][28][23]
TX_DISABLE_LANE0 bit 15	MAIN[1][29][23]
TX_PREEMPH_LANE0 bit 0	MAIN[6][28][40]
TX_PREEMPH_LANE0 bit 1	MAIN[6][29][40]
TX_PREEMPH_LANE0 bit 2	MAIN[6][28][41]
TX_PREEMPH_LANE0 bit 3	MAIN[6][29][41]
TX_PREEMPH_LANE0 bit 4	MAIN[6][28][42]
TX_PREEMPH_LANE0 bit 5	MAIN[6][29][42]
TX_PREEMPH_LANE0 bit 6	MAIN[6][28][43]
TX_PREEMPH_LANE0 bit 7	MAIN[6][29][43]
TX_PREEMPH_LANE0 bit 8	MAIN[6][28][44]
TX_PREEMPH_LANE0 bit 9	MAIN[6][29][44]
TX_PREEMPH_LANE0 bit 10	MAIN[6][28][45]
TX_PREEMPH_LANE0 bit 11	MAIN[6][29][45]
TX_PREEMPH_LANE0 bit 12	MAIN[6][28][46]
TX_PREEMPH_LANE0 bit 13	MAIN[6][29][46]
TX_PREEMPH_LANE0 bit 14	MAIN[6][28][47]
TX_PREEMPH_LANE0 bit 15	MAIN[6][29][47]
TX_PWR_RATE_OVRD_LANE0 bit 0	MAIN[7][28][32]
TX_PWR_RATE_OVRD_LANE0 bit 1	MAIN[7][29][32]
TX_PWR_RATE_OVRD_LANE0 bit 2	MAIN[7][28][33]
TX_PWR_RATE_OVRD_LANE0 bit 3	MAIN[7][29][33]
TX_PWR_RATE_OVRD_LANE0 bit 4	MAIN[7][28][34]
TX_PWR_RATE_OVRD_LANE0 bit 5	MAIN[7][29][34]
TX_PWR_RATE_OVRD_LANE0 bit 6	MAIN[7][28][35]
TX_PWR_RATE_OVRD_LANE0 bit 7	MAIN[7][29][35]
TX_PWR_RATE_OVRD_LANE0 bit 8	MAIN[7][28][36]
TX_PWR_RATE_OVRD_LANE0 bit 9	MAIN[7][29][36]
TX_PWR_RATE_OVRD_LANE0 bit 10	MAIN[7][28][37]
TX_PWR_RATE_OVRD_LANE0 bit 11	MAIN[7][29][37]
TX_PWR_RATE_OVRD_LANE0 bit 12	MAIN[7][28][38]
TX_PWR_RATE_OVRD_LANE0 bit 13	MAIN[7][29][38]
TX_PWR_RATE_OVRD_LANE0 bit 14	MAIN[7][28][39]
TX_PWR_RATE_OVRD_LANE0 bit 15	MAIN[7][29][39]
RX_FABRIC_WIDTH1	[enum: GTH_QUAD_FABRIC_WIDTH]
TX_FABRIC_WIDTH1	[enum: GTH_QUAD_FABRIC_WIDTH]
GTH_CFG_PWRUP_LANE1 bit 0	MAIN[10][29][8]
TST_PCS_LOOPBACK_LANE1 bit 0	MAIN[10][28][8]
BUFFER_CONFIG_LANE1 bit 0	MAIN[10][28][16]
BUFFER_CONFIG_LANE1 bit 1	MAIN[10][29][16]
BUFFER_CONFIG_LANE1 bit 2	MAIN[10][28][17]
BUFFER_CONFIG_LANE1 bit 3	MAIN[10][29][17]
BUFFER_CONFIG_LANE1 bit 4	MAIN[10][28][18]
BUFFER_CONFIG_LANE1 bit 5	MAIN[10][29][18]
BUFFER_CONFIG_LANE1 bit 6	MAIN[10][28][19]
BUFFER_CONFIG_LANE1 bit 7	MAIN[10][29][19]
BUFFER_CONFIG_LANE1 bit 8	MAIN[10][28][20]
BUFFER_CONFIG_LANE1 bit 9	MAIN[10][29][20]
BUFFER_CONFIG_LANE1 bit 10	MAIN[10][28][21]
BUFFER_CONFIG_LANE1 bit 11	MAIN[10][29][21]
BUFFER_CONFIG_LANE1 bit 12	MAIN[10][28][22]
BUFFER_CONFIG_LANE1 bit 13	MAIN[10][29][22]
BUFFER_CONFIG_LANE1 bit 14	MAIN[10][28][23]
BUFFER_CONFIG_LANE1 bit 15	MAIN[10][29][23]
DFE_TRAIN_CTRL_LANE1 bit 0	MAIN[17][28][16]
DFE_TRAIN_CTRL_LANE1 bit 1	MAIN[17][29][16]
DFE_TRAIN_CTRL_LANE1 bit 2	MAIN[17][28][17]
DFE_TRAIN_CTRL_LANE1 bit 3	MAIN[17][29][17]
DFE_TRAIN_CTRL_LANE1 bit 4	MAIN[17][28][18]
DFE_TRAIN_CTRL_LANE1 bit 5	MAIN[17][29][18]
DFE_TRAIN_CTRL_LANE1 bit 6	MAIN[17][28][19]
DFE_TRAIN_CTRL_LANE1 bit 7	MAIN[17][29][19]
DFE_TRAIN_CTRL_LANE1 bit 8	MAIN[17][28][20]
DFE_TRAIN_CTRL_LANE1 bit 9	MAIN[17][29][20]
DFE_TRAIN_CTRL_LANE1 bit 10	MAIN[17][28][21]
DFE_TRAIN_CTRL_LANE1 bit 11	MAIN[17][29][21]
DFE_TRAIN_CTRL_LANE1 bit 12	MAIN[17][28][22]
DFE_TRAIN_CTRL_LANE1 bit 13	MAIN[17][29][22]
DFE_TRAIN_CTRL_LANE1 bit 14	MAIN[17][28][23]
DFE_TRAIN_CTRL_LANE1 bit 15	MAIN[17][29][23]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 0	MAIN[14][28][24]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 1	MAIN[14][29][24]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 2	MAIN[14][28][25]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 3	MAIN[14][29][25]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 4	MAIN[14][28][26]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 5	MAIN[14][29][26]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 6	MAIN[14][28][27]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 7	MAIN[14][29][27]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 8	MAIN[14][28][28]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 9	MAIN[14][29][28]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 10	MAIN[14][28][29]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 11	MAIN[14][29][29]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 12	MAIN[14][28][30]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 13	MAIN[14][29][30]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 14	MAIN[14][28][31]
E10GBASEKR_LD_COEFF_UPD_LANE1 bit 15	MAIN[14][29][31]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 0	MAIN[14][28][16]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 1	MAIN[14][29][16]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 2	MAIN[14][28][17]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 3	MAIN[14][29][17]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 4	MAIN[14][28][18]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 5	MAIN[14][29][18]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 6	MAIN[14][28][19]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 7	MAIN[14][29][19]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 8	MAIN[14][28][20]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 9	MAIN[14][29][20]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 10	MAIN[14][28][21]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 11	MAIN[14][29][21]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 12	MAIN[14][28][22]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 13	MAIN[14][29][22]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 14	MAIN[14][28][23]
E10GBASEKR_LP_COEFF_UPD_LANE1 bit 15	MAIN[14][29][23]
E10GBASEKR_PMA_CTRL_LANE1 bit 0	MAIN[14][28][8]
E10GBASEKR_PMA_CTRL_LANE1 bit 1	MAIN[14][29][8]
E10GBASEKR_PMA_CTRL_LANE1 bit 2	MAIN[14][28][9]
E10GBASEKR_PMA_CTRL_LANE1 bit 3	MAIN[14][29][9]
E10GBASEKR_PMA_CTRL_LANE1 bit 4	MAIN[14][28][10]
E10GBASEKR_PMA_CTRL_LANE1 bit 5	MAIN[14][29][10]
E10GBASEKR_PMA_CTRL_LANE1 bit 6	MAIN[14][28][11]
E10GBASEKR_PMA_CTRL_LANE1 bit 7	MAIN[14][29][11]
E10GBASEKR_PMA_CTRL_LANE1 bit 8	MAIN[14][28][12]
E10GBASEKR_PMA_CTRL_LANE1 bit 9	MAIN[14][29][12]
E10GBASEKR_PMA_CTRL_LANE1 bit 10	MAIN[14][28][13]
E10GBASEKR_PMA_CTRL_LANE1 bit 11	MAIN[14][29][13]
E10GBASEKR_PMA_CTRL_LANE1 bit 12	MAIN[14][28][14]
E10GBASEKR_PMA_CTRL_LANE1 bit 13	MAIN[14][29][14]
E10GBASEKR_PMA_CTRL_LANE1 bit 14	MAIN[14][28][15]
E10GBASEKR_PMA_CTRL_LANE1 bit 15	MAIN[14][29][15]
E10GBASEKX_CTRL_LANE1 bit 0	MAIN[14][28][32]
E10GBASEKX_CTRL_LANE1 bit 1	MAIN[14][29][32]
E10GBASEKX_CTRL_LANE1 bit 2	MAIN[14][28][33]
E10GBASEKX_CTRL_LANE1 bit 3	MAIN[14][29][33]
E10GBASEKX_CTRL_LANE1 bit 4	MAIN[14][28][34]
E10GBASEKX_CTRL_LANE1 bit 5	MAIN[14][29][34]
E10GBASEKX_CTRL_LANE1 bit 6	MAIN[14][28][35]
E10GBASEKX_CTRL_LANE1 bit 7	MAIN[14][29][35]
E10GBASEKX_CTRL_LANE1 bit 8	MAIN[14][28][36]
E10GBASEKX_CTRL_LANE1 bit 9	MAIN[14][29][36]
E10GBASEKX_CTRL_LANE1 bit 10	MAIN[14][28][37]
E10GBASEKX_CTRL_LANE1 bit 11	MAIN[14][29][37]
E10GBASEKX_CTRL_LANE1 bit 12	MAIN[14][28][38]
E10GBASEKX_CTRL_LANE1 bit 13	MAIN[14][29][38]
E10GBASEKX_CTRL_LANE1 bit 14	MAIN[14][28][39]
E10GBASEKX_CTRL_LANE1 bit 15	MAIN[14][29][39]
E10GBASER_PCS_CFG_LANE1 bit 0	MAIN[20][28][40]
E10GBASER_PCS_CFG_LANE1 bit 1	MAIN[20][29][40]
E10GBASER_PCS_CFG_LANE1 bit 2	MAIN[20][28][41]
E10GBASER_PCS_CFG_LANE1 bit 3	MAIN[20][29][41]
E10GBASER_PCS_CFG_LANE1 bit 4	MAIN[20][28][42]
E10GBASER_PCS_CFG_LANE1 bit 5	MAIN[20][29][42]
E10GBASER_PCS_CFG_LANE1 bit 6	MAIN[20][28][43]
E10GBASER_PCS_CFG_LANE1 bit 7	MAIN[20][29][43]
E10GBASER_PCS_CFG_LANE1 bit 8	MAIN[20][28][44]
E10GBASER_PCS_CFG_LANE1 bit 9	MAIN[20][29][44]
E10GBASER_PCS_CFG_LANE1 bit 10	MAIN[20][28][45]
E10GBASER_PCS_CFG_LANE1 bit 11	MAIN[20][29][45]
E10GBASER_PCS_CFG_LANE1 bit 12	MAIN[20][28][46]
E10GBASER_PCS_CFG_LANE1 bit 13	MAIN[20][29][46]
E10GBASER_PCS_CFG_LANE1 bit 14	MAIN[20][28][47]
E10GBASER_PCS_CFG_LANE1 bit 15	MAIN[20][29][47]
E10GBASER_PCS_SEEDA0_LANE1 bit 0	MAIN[18][28][24]
E10GBASER_PCS_SEEDA0_LANE1 bit 1	MAIN[18][29][24]
E10GBASER_PCS_SEEDA0_LANE1 bit 2	MAIN[18][28][25]
E10GBASER_PCS_SEEDA0_LANE1 bit 3	MAIN[18][29][25]
E10GBASER_PCS_SEEDA0_LANE1 bit 4	MAIN[18][28][26]
E10GBASER_PCS_SEEDA0_LANE1 bit 5	MAIN[18][29][26]
E10GBASER_PCS_SEEDA0_LANE1 bit 6	MAIN[18][28][27]
E10GBASER_PCS_SEEDA0_LANE1 bit 7	MAIN[18][29][27]
E10GBASER_PCS_SEEDA0_LANE1 bit 8	MAIN[18][28][28]
E10GBASER_PCS_SEEDA0_LANE1 bit 9	MAIN[18][29][28]
E10GBASER_PCS_SEEDA0_LANE1 bit 10	MAIN[18][28][29]
E10GBASER_PCS_SEEDA0_LANE1 bit 11	MAIN[18][29][29]
E10GBASER_PCS_SEEDA0_LANE1 bit 12	MAIN[18][28][30]
E10GBASER_PCS_SEEDA0_LANE1 bit 13	MAIN[18][29][30]
E10GBASER_PCS_SEEDA0_LANE1 bit 14	MAIN[18][28][31]
E10GBASER_PCS_SEEDA0_LANE1 bit 15	MAIN[18][29][31]
E10GBASER_PCS_SEEDA1_LANE1 bit 0	MAIN[18][28][32]
E10GBASER_PCS_SEEDA1_LANE1 bit 1	MAIN[18][29][32]
E10GBASER_PCS_SEEDA1_LANE1 bit 2	MAIN[18][28][33]
E10GBASER_PCS_SEEDA1_LANE1 bit 3	MAIN[18][29][33]
E10GBASER_PCS_SEEDA1_LANE1 bit 4	MAIN[18][28][34]
E10GBASER_PCS_SEEDA1_LANE1 bit 5	MAIN[18][29][34]
E10GBASER_PCS_SEEDA1_LANE1 bit 6	MAIN[18][28][35]
E10GBASER_PCS_SEEDA1_LANE1 bit 7	MAIN[18][29][35]
E10GBASER_PCS_SEEDA1_LANE1 bit 8	MAIN[18][28][36]
E10GBASER_PCS_SEEDA1_LANE1 bit 9	MAIN[18][29][36]
E10GBASER_PCS_SEEDA1_LANE1 bit 10	MAIN[18][28][37]
E10GBASER_PCS_SEEDA1_LANE1 bit 11	MAIN[18][29][37]
E10GBASER_PCS_SEEDA1_LANE1 bit 12	MAIN[18][28][38]
E10GBASER_PCS_SEEDA1_LANE1 bit 13	MAIN[18][29][38]
E10GBASER_PCS_SEEDA1_LANE1 bit 14	MAIN[18][28][39]
E10GBASER_PCS_SEEDA1_LANE1 bit 15	MAIN[18][29][39]
E10GBASER_PCS_SEEDA2_LANE1 bit 0	MAIN[18][28][40]
E10GBASER_PCS_SEEDA2_LANE1 bit 1	MAIN[18][29][40]
E10GBASER_PCS_SEEDA2_LANE1 bit 2	MAIN[18][28][41]
E10GBASER_PCS_SEEDA2_LANE1 bit 3	MAIN[18][29][41]
E10GBASER_PCS_SEEDA2_LANE1 bit 4	MAIN[18][28][42]
E10GBASER_PCS_SEEDA2_LANE1 bit 5	MAIN[18][29][42]
E10GBASER_PCS_SEEDA2_LANE1 bit 6	MAIN[18][28][43]
E10GBASER_PCS_SEEDA2_LANE1 bit 7	MAIN[18][29][43]
E10GBASER_PCS_SEEDA2_LANE1 bit 8	MAIN[18][28][44]
E10GBASER_PCS_SEEDA2_LANE1 bit 9	MAIN[18][29][44]
E10GBASER_PCS_SEEDA2_LANE1 bit 10	MAIN[18][28][45]
E10GBASER_PCS_SEEDA2_LANE1 bit 11	MAIN[18][29][45]
E10GBASER_PCS_SEEDA2_LANE1 bit 12	MAIN[18][28][46]
E10GBASER_PCS_SEEDA2_LANE1 bit 13	MAIN[18][29][46]
E10GBASER_PCS_SEEDA2_LANE1 bit 14	MAIN[18][28][47]
E10GBASER_PCS_SEEDA2_LANE1 bit 15	MAIN[18][29][47]
E10GBASER_PCS_SEEDA3_LANE1 bit 0	MAIN[18][28][48]
E10GBASER_PCS_SEEDA3_LANE1 bit 1	MAIN[18][29][48]
E10GBASER_PCS_SEEDA3_LANE1 bit 2	MAIN[18][28][49]
E10GBASER_PCS_SEEDA3_LANE1 bit 3	MAIN[18][29][49]
E10GBASER_PCS_SEEDA3_LANE1 bit 4	MAIN[18][28][50]
E10GBASER_PCS_SEEDA3_LANE1 bit 5	MAIN[18][29][50]
E10GBASER_PCS_SEEDA3_LANE1 bit 6	MAIN[18][28][51]
E10GBASER_PCS_SEEDA3_LANE1 bit 7	MAIN[18][29][51]
E10GBASER_PCS_SEEDA3_LANE1 bit 8	MAIN[18][28][52]
E10GBASER_PCS_SEEDA3_LANE1 bit 9	MAIN[18][29][52]
E10GBASER_PCS_SEEDA3_LANE1 bit 10	MAIN[18][28][53]
E10GBASER_PCS_SEEDA3_LANE1 bit 11	MAIN[18][29][53]
E10GBASER_PCS_SEEDA3_LANE1 bit 12	MAIN[18][28][54]
E10GBASER_PCS_SEEDA3_LANE1 bit 13	MAIN[18][29][54]
E10GBASER_PCS_SEEDA3_LANE1 bit 14	MAIN[18][28][55]
E10GBASER_PCS_SEEDA3_LANE1 bit 15	MAIN[18][29][55]
E10GBASER_PCS_SEEDB0_LANE1 bit 0	MAIN[18][28][56]
E10GBASER_PCS_SEEDB0_LANE1 bit 1	MAIN[18][29][56]
E10GBASER_PCS_SEEDB0_LANE1 bit 2	MAIN[18][28][57]
E10GBASER_PCS_SEEDB0_LANE1 bit 3	MAIN[18][29][57]
E10GBASER_PCS_SEEDB0_LANE1 bit 4	MAIN[18][28][58]
E10GBASER_PCS_SEEDB0_LANE1 bit 5	MAIN[18][29][58]
E10GBASER_PCS_SEEDB0_LANE1 bit 6	MAIN[18][28][59]
E10GBASER_PCS_SEEDB0_LANE1 bit 7	MAIN[18][29][59]
E10GBASER_PCS_SEEDB0_LANE1 bit 8	MAIN[18][28][60]
E10GBASER_PCS_SEEDB0_LANE1 bit 9	MAIN[18][29][60]
E10GBASER_PCS_SEEDB0_LANE1 bit 10	MAIN[18][28][61]
E10GBASER_PCS_SEEDB0_LANE1 bit 11	MAIN[18][29][61]
E10GBASER_PCS_SEEDB0_LANE1 bit 12	MAIN[18][28][62]
E10GBASER_PCS_SEEDB0_LANE1 bit 13	MAIN[18][29][62]
E10GBASER_PCS_SEEDB0_LANE1 bit 14	MAIN[18][28][63]
E10GBASER_PCS_SEEDB0_LANE1 bit 15	MAIN[18][29][63]
E10GBASER_PCS_SEEDB1_LANE1 bit 0	MAIN[19][28][0]
E10GBASER_PCS_SEEDB1_LANE1 bit 1	MAIN[19][29][0]
E10GBASER_PCS_SEEDB1_LANE1 bit 2	MAIN[19][28][1]
E10GBASER_PCS_SEEDB1_LANE1 bit 3	MAIN[19][29][1]
E10GBASER_PCS_SEEDB1_LANE1 bit 4	MAIN[19][28][2]
E10GBASER_PCS_SEEDB1_LANE1 bit 5	MAIN[19][29][2]
E10GBASER_PCS_SEEDB1_LANE1 bit 6	MAIN[19][28][3]
E10GBASER_PCS_SEEDB1_LANE1 bit 7	MAIN[19][29][3]
E10GBASER_PCS_SEEDB1_LANE1 bit 8	MAIN[19][28][4]
E10GBASER_PCS_SEEDB1_LANE1 bit 9	MAIN[19][29][4]
E10GBASER_PCS_SEEDB1_LANE1 bit 10	MAIN[19][28][5]
E10GBASER_PCS_SEEDB1_LANE1 bit 11	MAIN[19][29][5]
E10GBASER_PCS_SEEDB1_LANE1 bit 12	MAIN[19][28][6]
E10GBASER_PCS_SEEDB1_LANE1 bit 13	MAIN[19][29][6]
E10GBASER_PCS_SEEDB1_LANE1 bit 14	MAIN[19][28][7]
E10GBASER_PCS_SEEDB1_LANE1 bit 15	MAIN[19][29][7]
E10GBASER_PCS_SEEDB2_LANE1 bit 0	MAIN[19][28][8]
E10GBASER_PCS_SEEDB2_LANE1 bit 1	MAIN[19][29][8]
E10GBASER_PCS_SEEDB2_LANE1 bit 2	MAIN[19][28][9]
E10GBASER_PCS_SEEDB2_LANE1 bit 3	MAIN[19][29][9]
E10GBASER_PCS_SEEDB2_LANE1 bit 4	MAIN[19][28][10]
E10GBASER_PCS_SEEDB2_LANE1 bit 5	MAIN[19][29][10]
E10GBASER_PCS_SEEDB2_LANE1 bit 6	MAIN[19][28][11]
E10GBASER_PCS_SEEDB2_LANE1 bit 7	MAIN[19][29][11]
E10GBASER_PCS_SEEDB2_LANE1 bit 8	MAIN[19][28][12]
E10GBASER_PCS_SEEDB2_LANE1 bit 9	MAIN[19][29][12]
E10GBASER_PCS_SEEDB2_LANE1 bit 10	MAIN[19][28][13]
E10GBASER_PCS_SEEDB2_LANE1 bit 11	MAIN[19][29][13]
E10GBASER_PCS_SEEDB2_LANE1 bit 12	MAIN[19][28][14]
E10GBASER_PCS_SEEDB2_LANE1 bit 13	MAIN[19][29][14]
E10GBASER_PCS_SEEDB2_LANE1 bit 14	MAIN[19][28][15]
E10GBASER_PCS_SEEDB2_LANE1 bit 15	MAIN[19][29][15]
E10GBASER_PCS_SEEDB3_LANE1 bit 0	MAIN[19][28][16]
E10GBASER_PCS_SEEDB3_LANE1 bit 1	MAIN[19][29][16]
E10GBASER_PCS_SEEDB3_LANE1 bit 2	MAIN[19][28][17]
E10GBASER_PCS_SEEDB3_LANE1 bit 3	MAIN[19][29][17]
E10GBASER_PCS_SEEDB3_LANE1 bit 4	MAIN[19][28][18]
E10GBASER_PCS_SEEDB3_LANE1 bit 5	MAIN[19][29][18]
E10GBASER_PCS_SEEDB3_LANE1 bit 6	MAIN[19][28][19]
E10GBASER_PCS_SEEDB3_LANE1 bit 7	MAIN[19][29][19]
E10GBASER_PCS_SEEDB3_LANE1 bit 8	MAIN[19][28][20]
E10GBASER_PCS_SEEDB3_LANE1 bit 9	MAIN[19][29][20]
E10GBASER_PCS_SEEDB3_LANE1 bit 10	MAIN[19][28][21]
E10GBASER_PCS_SEEDB3_LANE1 bit 11	MAIN[19][29][21]
E10GBASER_PCS_SEEDB3_LANE1 bit 12	MAIN[19][28][22]
E10GBASER_PCS_SEEDB3_LANE1 bit 13	MAIN[19][29][22]
E10GBASER_PCS_SEEDB3_LANE1 bit 14	MAIN[19][28][23]
E10GBASER_PCS_SEEDB3_LANE1 bit 15	MAIN[19][29][23]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 0	MAIN[19][28][24]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 1	MAIN[19][29][24]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 2	MAIN[19][28][25]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 3	MAIN[19][29][25]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 4	MAIN[19][28][26]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 5	MAIN[19][29][26]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 6	MAIN[19][28][27]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 7	MAIN[19][29][27]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 8	MAIN[19][28][28]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 9	MAIN[19][29][28]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 10	MAIN[19][28][29]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 11	MAIN[19][29][29]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 12	MAIN[19][28][30]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 13	MAIN[19][29][30]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 14	MAIN[19][28][31]
E10GBASER_PCS_TEST_CTRL_LANE1 bit 15	MAIN[19][29][31]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 0	MAIN[18][28][16]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 1	MAIN[18][29][16]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 2	MAIN[18][28][17]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 3	MAIN[18][29][17]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 4	MAIN[18][28][18]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 5	MAIN[18][29][18]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 6	MAIN[18][28][19]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 7	MAIN[18][29][19]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 8	MAIN[18][28][20]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 9	MAIN[18][29][20]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 10	MAIN[18][28][21]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 11	MAIN[18][29][21]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 12	MAIN[18][28][22]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 13	MAIN[18][29][22]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 14	MAIN[18][28][23]
E10GBASEX_PCS_TSTCTRL_LANE1 bit 15	MAIN[18][29][23]
LANE_PWR_CTRL_LANE1 bit 0	MAIN[17][28][24]
LANE_PWR_CTRL_LANE1 bit 1	MAIN[17][29][24]
LANE_PWR_CTRL_LANE1 bit 2	MAIN[17][28][25]
LANE_PWR_CTRL_LANE1 bit 3	MAIN[17][29][25]
LANE_PWR_CTRL_LANE1 bit 4	MAIN[17][28][26]
LANE_PWR_CTRL_LANE1 bit 5	MAIN[17][29][26]
LANE_PWR_CTRL_LANE1 bit 6	MAIN[17][28][27]
LANE_PWR_CTRL_LANE1 bit 7	MAIN[17][29][27]
LANE_PWR_CTRL_LANE1 bit 8	MAIN[17][28][28]
LANE_PWR_CTRL_LANE1 bit 9	MAIN[17][29][28]
LANE_PWR_CTRL_LANE1 bit 10	MAIN[17][28][29]
LANE_PWR_CTRL_LANE1 bit 11	MAIN[17][29][29]
LANE_PWR_CTRL_LANE1 bit 12	MAIN[17][28][30]
LANE_PWR_CTRL_LANE1 bit 13	MAIN[17][29][30]
LANE_PWR_CTRL_LANE1 bit 14	MAIN[17][28][31]
LANE_PWR_CTRL_LANE1 bit 15	MAIN[17][29][31]
LNK_TRN_CFG_LANE1 bit 0	MAIN[17][28][48]
LNK_TRN_CFG_LANE1 bit 1	MAIN[17][29][48]
LNK_TRN_CFG_LANE1 bit 2	MAIN[17][28][49]
LNK_TRN_CFG_LANE1 bit 3	MAIN[17][29][49]
LNK_TRN_CFG_LANE1 bit 4	MAIN[17][28][50]
LNK_TRN_CFG_LANE1 bit 5	MAIN[17][29][50]
LNK_TRN_CFG_LANE1 bit 6	MAIN[17][28][51]
LNK_TRN_CFG_LANE1 bit 7	MAIN[17][29][51]
LNK_TRN_CFG_LANE1 bit 8	MAIN[17][28][52]
LNK_TRN_CFG_LANE1 bit 9	MAIN[17][29][52]
LNK_TRN_CFG_LANE1 bit 10	MAIN[17][28][53]
LNK_TRN_CFG_LANE1 bit 11	MAIN[17][29][53]
LNK_TRN_CFG_LANE1 bit 12	MAIN[17][28][54]
LNK_TRN_CFG_LANE1 bit 13	MAIN[17][29][54]
LNK_TRN_CFG_LANE1 bit 14	MAIN[17][28][55]
LNK_TRN_CFG_LANE1 bit 15	MAIN[17][29][55]
LNK_TRN_COEFF_REQ_LANE1 bit 0	MAIN[17][28][56]
LNK_TRN_COEFF_REQ_LANE1 bit 1	MAIN[17][29][56]
LNK_TRN_COEFF_REQ_LANE1 bit 2	MAIN[17][28][57]
LNK_TRN_COEFF_REQ_LANE1 bit 3	MAIN[17][29][57]
LNK_TRN_COEFF_REQ_LANE1 bit 4	MAIN[17][28][58]
LNK_TRN_COEFF_REQ_LANE1 bit 5	MAIN[17][29][58]
LNK_TRN_COEFF_REQ_LANE1 bit 6	MAIN[17][28][59]
LNK_TRN_COEFF_REQ_LANE1 bit 7	MAIN[17][29][59]
LNK_TRN_COEFF_REQ_LANE1 bit 8	MAIN[17][28][60]
LNK_TRN_COEFF_REQ_LANE1 bit 9	MAIN[17][29][60]
LNK_TRN_COEFF_REQ_LANE1 bit 10	MAIN[17][28][61]
LNK_TRN_COEFF_REQ_LANE1 bit 11	MAIN[17][29][61]
LNK_TRN_COEFF_REQ_LANE1 bit 12	MAIN[17][28][62]
LNK_TRN_COEFF_REQ_LANE1 bit 13	MAIN[17][29][62]
LNK_TRN_COEFF_REQ_LANE1 bit 14	MAIN[17][28][63]
LNK_TRN_COEFF_REQ_LANE1 bit 15	MAIN[17][29][63]
PCS_ABILITY_LANE1 bit 0	MAIN[20][28][24]
PCS_ABILITY_LANE1 bit 1	MAIN[20][29][24]
PCS_ABILITY_LANE1 bit 2	MAIN[20][28][25]
PCS_ABILITY_LANE1 bit 3	MAIN[20][29][25]
PCS_ABILITY_LANE1 bit 4	MAIN[20][28][26]
PCS_ABILITY_LANE1 bit 5	MAIN[20][29][26]
PCS_ABILITY_LANE1 bit 6	MAIN[20][28][27]
PCS_ABILITY_LANE1 bit 7	MAIN[20][29][27]
PCS_ABILITY_LANE1 bit 8	MAIN[20][28][28]
PCS_ABILITY_LANE1 bit 9	MAIN[20][29][28]
PCS_ABILITY_LANE1 bit 10	MAIN[20][28][29]
PCS_ABILITY_LANE1 bit 11	MAIN[20][29][29]
PCS_ABILITY_LANE1 bit 12	MAIN[20][28][30]
PCS_ABILITY_LANE1 bit 13	MAIN[20][29][30]
PCS_ABILITY_LANE1 bit 14	MAIN[20][28][31]
PCS_ABILITY_LANE1 bit 15	MAIN[20][29][31]
PCS_CTRL1_LANE1 bit 0	MAIN[18][28][0]
PCS_CTRL1_LANE1 bit 1	MAIN[18][29][0]
PCS_CTRL1_LANE1 bit 2	MAIN[18][28][1]
PCS_CTRL1_LANE1 bit 3	MAIN[18][29][1]
PCS_CTRL1_LANE1 bit 4	MAIN[18][28][2]
PCS_CTRL1_LANE1 bit 5	MAIN[18][29][2]
PCS_CTRL1_LANE1 bit 6	MAIN[18][28][3]
PCS_CTRL1_LANE1 bit 7	MAIN[18][29][3]
PCS_CTRL1_LANE1 bit 8	MAIN[18][28][4]
PCS_CTRL1_LANE1 bit 9	MAIN[18][29][4]
PCS_CTRL1_LANE1 bit 10	MAIN[18][28][5]
PCS_CTRL1_LANE1 bit 11	MAIN[18][29][5]
PCS_CTRL1_LANE1 bit 12	MAIN[18][28][6]
PCS_CTRL1_LANE1 bit 13	MAIN[18][29][6]
PCS_CTRL1_LANE1 bit 14	MAIN[18][28][7]
PCS_CTRL1_LANE1 bit 15	MAIN[18][29][7]
PCS_CTRL2_LANE1 bit 0	MAIN[18][28][8]
PCS_CTRL2_LANE1 bit 1	MAIN[18][29][8]
PCS_CTRL2_LANE1 bit 2	MAIN[18][28][9]
PCS_CTRL2_LANE1 bit 3	MAIN[18][29][9]
PCS_CTRL2_LANE1 bit 4	MAIN[18][28][10]
PCS_CTRL2_LANE1 bit 5	MAIN[18][29][10]
PCS_CTRL2_LANE1 bit 6	MAIN[18][28][11]
PCS_CTRL2_LANE1 bit 7	MAIN[18][29][11]
PCS_CTRL2_LANE1 bit 8	MAIN[18][28][12]
PCS_CTRL2_LANE1 bit 9	MAIN[18][29][12]
PCS_CTRL2_LANE1 bit 10	MAIN[18][28][13]
PCS_CTRL2_LANE1 bit 11	MAIN[18][29][13]
PCS_CTRL2_LANE1 bit 12	MAIN[18][28][14]
PCS_CTRL2_LANE1 bit 13	MAIN[18][29][14]
PCS_CTRL2_LANE1 bit 14	MAIN[18][28][15]
PCS_CTRL2_LANE1 bit 15	MAIN[18][29][15]
PCS_MISC_CFG_0_LANE1 bit 0	MAIN[19][28][32]
PCS_MISC_CFG_0_LANE1 bit 1	MAIN[19][29][32]
PCS_MISC_CFG_0_LANE1 bit 2	MAIN[19][28][33]
PCS_MISC_CFG_0_LANE1 bit 3	MAIN[19][29][33]
PCS_MISC_CFG_0_LANE1 bit 4	MAIN[19][28][34]
PCS_MISC_CFG_0_LANE1 bit 5	MAIN[19][29][34]
PCS_MISC_CFG_0_LANE1 bit 6	MAIN[19][28][35]
PCS_MISC_CFG_0_LANE1 bit 7	MAIN[19][29][35]
PCS_MISC_CFG_0_LANE1 bit 8	MAIN[19][28][36]
PCS_MISC_CFG_0_LANE1 bit 9	MAIN[19][29][36]
PCS_MISC_CFG_0_LANE1 bit 10	MAIN[19][28][37]
PCS_MISC_CFG_0_LANE1 bit 11	MAIN[19][29][37]
PCS_MISC_CFG_0_LANE1 bit 12	MAIN[19][28][38]
PCS_MISC_CFG_0_LANE1 bit 13	MAIN[19][29][38]
PCS_MISC_CFG_0_LANE1 bit 14	MAIN[19][28][39]
PCS_MISC_CFG_0_LANE1 bit 15	MAIN[19][29][39]
PCS_MISC_CFG_1_LANE1 bit 0	MAIN[20][28][8]
PCS_MISC_CFG_1_LANE1 bit 1	MAIN[20][29][8]
PCS_MISC_CFG_1_LANE1 bit 2	MAIN[20][28][9]
PCS_MISC_CFG_1_LANE1 bit 3	MAIN[20][29][9]
PCS_MISC_CFG_1_LANE1 bit 4	MAIN[20][28][10]
PCS_MISC_CFG_1_LANE1 bit 5	MAIN[20][29][10]
PCS_MISC_CFG_1_LANE1 bit 6	MAIN[20][28][11]
PCS_MISC_CFG_1_LANE1 bit 7	MAIN[20][29][11]
PCS_MISC_CFG_1_LANE1 bit 8	MAIN[20][28][12]
PCS_MISC_CFG_1_LANE1 bit 9	MAIN[20][29][12]
PCS_MISC_CFG_1_LANE1 bit 10	MAIN[20][28][13]
PCS_MISC_CFG_1_LANE1 bit 11	MAIN[20][29][13]
PCS_MISC_CFG_1_LANE1 bit 12	MAIN[20][28][14]
PCS_MISC_CFG_1_LANE1 bit 13	MAIN[20][29][14]
PCS_MISC_CFG_1_LANE1 bit 14	MAIN[20][28][15]
PCS_MISC_CFG_1_LANE1 bit 15	MAIN[20][29][15]
PCS_MODE_LANE1 bit 0	MAIN[10][28][0]
PCS_MODE_LANE1 bit 1	MAIN[10][29][0]
PCS_MODE_LANE1 bit 2	MAIN[10][28][1]
PCS_MODE_LANE1 bit 3	MAIN[10][29][1]
PCS_MODE_LANE1 bit 4	MAIN[10][28][2]
PCS_MODE_LANE1 bit 5	MAIN[10][29][2]
PCS_MODE_LANE1 bit 6	MAIN[10][28][3]
PCS_MODE_LANE1 bit 7	MAIN[10][29][3]
PCS_MODE_LANE1 bit 8	MAIN[10][28][4]
PCS_MODE_LANE1 bit 9	MAIN[10][29][4]
PCS_MODE_LANE1 bit 10	MAIN[10][28][5]
PCS_MODE_LANE1 bit 11	MAIN[10][29][5]
PCS_MODE_LANE1 bit 12	MAIN[10][28][6]
PCS_MODE_LANE1 bit 13	MAIN[10][29][6]
PCS_MODE_LANE1 bit 14	MAIN[10][28][7]
PCS_MODE_LANE1 bit 15	MAIN[10][29][7]
PCS_RESET_1_LANE1 bit 0	MAIN[20][28][16]
PCS_RESET_1_LANE1 bit 1	MAIN[20][29][16]
PCS_RESET_1_LANE1 bit 2	MAIN[20][28][17]
PCS_RESET_1_LANE1 bit 3	MAIN[20][29][17]
PCS_RESET_1_LANE1 bit 4	MAIN[20][28][18]
PCS_RESET_1_LANE1 bit 5	MAIN[20][29][18]
PCS_RESET_1_LANE1 bit 6	MAIN[20][28][19]
PCS_RESET_1_LANE1 bit 7	MAIN[20][29][19]
PCS_RESET_1_LANE1 bit 8	MAIN[20][28][20]
PCS_RESET_1_LANE1 bit 9	MAIN[20][29][20]
PCS_RESET_1_LANE1 bit 10	MAIN[20][28][21]
PCS_RESET_1_LANE1 bit 11	MAIN[20][29][21]
PCS_RESET_1_LANE1 bit 12	MAIN[20][28][22]
PCS_RESET_1_LANE1 bit 13	MAIN[20][29][22]
PCS_RESET_1_LANE1 bit 14	MAIN[20][28][23]
PCS_RESET_1_LANE1 bit 15	MAIN[20][29][23]
PCS_RESET_LANE1 bit 0	MAIN[19][28][56]
PCS_RESET_LANE1 bit 1	MAIN[19][29][56]
PCS_RESET_LANE1 bit 2	MAIN[19][28][57]
PCS_RESET_LANE1 bit 3	MAIN[19][29][57]
PCS_RESET_LANE1 bit 4	MAIN[19][28][58]
PCS_RESET_LANE1 bit 5	MAIN[19][29][58]
PCS_RESET_LANE1 bit 6	MAIN[19][28][59]
PCS_RESET_LANE1 bit 7	MAIN[19][29][59]
PCS_RESET_LANE1 bit 8	MAIN[19][28][60]
PCS_RESET_LANE1 bit 9	MAIN[19][29][60]
PCS_RESET_LANE1 bit 10	MAIN[19][28][61]
PCS_RESET_LANE1 bit 11	MAIN[19][29][61]
PCS_RESET_LANE1 bit 12	MAIN[19][28][62]
PCS_RESET_LANE1 bit 13	MAIN[19][29][62]
PCS_RESET_LANE1 bit 14	MAIN[19][28][63]
PCS_RESET_LANE1 bit 15	MAIN[19][29][63]
PCS_TYPE_LANE1 bit 0	MAIN[20][28][32]
PCS_TYPE_LANE1 bit 1	MAIN[20][29][32]
PCS_TYPE_LANE1 bit 2	MAIN[20][28][33]
PCS_TYPE_LANE1 bit 3	MAIN[20][29][33]
PCS_TYPE_LANE1 bit 4	MAIN[20][28][34]
PCS_TYPE_LANE1 bit 5	MAIN[20][29][34]
PCS_TYPE_LANE1 bit 6	MAIN[20][28][35]
PCS_TYPE_LANE1 bit 7	MAIN[20][29][35]
PCS_TYPE_LANE1 bit 8	MAIN[20][28][36]
PCS_TYPE_LANE1 bit 9	MAIN[20][29][36]
PCS_TYPE_LANE1 bit 10	MAIN[20][28][37]
PCS_TYPE_LANE1 bit 11	MAIN[20][29][37]
PCS_TYPE_LANE1 bit 12	MAIN[20][28][38]
PCS_TYPE_LANE1 bit 13	MAIN[20][29][38]
PCS_TYPE_LANE1 bit 14	MAIN[20][28][39]
PCS_TYPE_LANE1 bit 15	MAIN[20][29][39]
PMA_CTRL1_LANE1 bit 0	MAIN[13][28][48]
PMA_CTRL1_LANE1 bit 1	MAIN[13][29][48]
PMA_CTRL1_LANE1 bit 2	MAIN[13][28][49]
PMA_CTRL1_LANE1 bit 3	MAIN[13][29][49]
PMA_CTRL1_LANE1 bit 4	MAIN[13][28][50]
PMA_CTRL1_LANE1 bit 5	MAIN[13][29][50]
PMA_CTRL1_LANE1 bit 6	MAIN[13][28][51]
PMA_CTRL1_LANE1 bit 7	MAIN[13][29][51]
PMA_CTRL1_LANE1 bit 8	MAIN[13][28][52]
PMA_CTRL1_LANE1 bit 9	MAIN[13][29][52]
PMA_CTRL1_LANE1 bit 10	MAIN[13][28][53]
PMA_CTRL1_LANE1 bit 11	MAIN[13][29][53]
PMA_CTRL1_LANE1 bit 12	MAIN[13][28][54]
PMA_CTRL1_LANE1 bit 13	MAIN[13][29][54]
PMA_CTRL1_LANE1 bit 14	MAIN[13][28][55]
PMA_CTRL1_LANE1 bit 15	MAIN[13][29][55]
PMA_CTRL2_LANE1 bit 0	MAIN[13][28][56]
PMA_CTRL2_LANE1 bit 1	MAIN[13][29][56]
PMA_CTRL2_LANE1 bit 2	MAIN[13][28][57]
PMA_CTRL2_LANE1 bit 3	MAIN[13][29][57]
PMA_CTRL2_LANE1 bit 4	MAIN[13][28][58]
PMA_CTRL2_LANE1 bit 5	MAIN[13][29][58]
PMA_CTRL2_LANE1 bit 6	MAIN[13][28][59]
PMA_CTRL2_LANE1 bit 7	MAIN[13][29][59]
PMA_CTRL2_LANE1 bit 8	MAIN[13][28][60]
PMA_CTRL2_LANE1 bit 9	MAIN[13][29][60]
PMA_CTRL2_LANE1 bit 10	MAIN[13][28][61]
PMA_CTRL2_LANE1 bit 11	MAIN[13][29][61]
PMA_CTRL2_LANE1 bit 12	MAIN[13][28][62]
PMA_CTRL2_LANE1 bit 13	MAIN[13][29][62]
PMA_CTRL2_LANE1 bit 14	MAIN[13][28][63]
PMA_CTRL2_LANE1 bit 15	MAIN[13][29][63]
PMA_LPBK_CTRL_LANE1 bit 0	MAIN[17][28][8]
PMA_LPBK_CTRL_LANE1 bit 1	MAIN[17][29][8]
PMA_LPBK_CTRL_LANE1 bit 2	MAIN[17][28][9]
PMA_LPBK_CTRL_LANE1 bit 3	MAIN[17][29][9]
PMA_LPBK_CTRL_LANE1 bit 4	MAIN[17][28][10]
PMA_LPBK_CTRL_LANE1 bit 5	MAIN[17][29][10]
PMA_LPBK_CTRL_LANE1 bit 6	MAIN[17][28][11]
PMA_LPBK_CTRL_LANE1 bit 7	MAIN[17][29][11]
PMA_LPBK_CTRL_LANE1 bit 8	MAIN[17][28][12]
PMA_LPBK_CTRL_LANE1 bit 9	MAIN[17][29][12]
PMA_LPBK_CTRL_LANE1 bit 10	MAIN[17][28][13]
PMA_LPBK_CTRL_LANE1 bit 11	MAIN[17][29][13]
PMA_LPBK_CTRL_LANE1 bit 12	MAIN[17][28][14]
PMA_LPBK_CTRL_LANE1 bit 13	MAIN[17][29][14]
PMA_LPBK_CTRL_LANE1 bit 14	MAIN[17][28][15]
PMA_LPBK_CTRL_LANE1 bit 15	MAIN[17][29][15]
PRBS_BER_CFG0_LANE1 bit 0	MAIN[19][28][40]
PRBS_BER_CFG0_LANE1 bit 1	MAIN[19][29][40]
PRBS_BER_CFG0_LANE1 bit 2	MAIN[19][28][41]
PRBS_BER_CFG0_LANE1 bit 3	MAIN[19][29][41]
PRBS_BER_CFG0_LANE1 bit 4	MAIN[19][28][42]
PRBS_BER_CFG0_LANE1 bit 5	MAIN[19][29][42]
PRBS_BER_CFG0_LANE1 bit 6	MAIN[19][28][43]
PRBS_BER_CFG0_LANE1 bit 7	MAIN[19][29][43]
PRBS_BER_CFG0_LANE1 bit 8	MAIN[19][28][44]
PRBS_BER_CFG0_LANE1 bit 9	MAIN[19][29][44]
PRBS_BER_CFG0_LANE1 bit 10	MAIN[19][28][45]
PRBS_BER_CFG0_LANE1 bit 11	MAIN[19][29][45]
PRBS_BER_CFG0_LANE1 bit 12	MAIN[19][28][46]
PRBS_BER_CFG0_LANE1 bit 13	MAIN[19][29][46]
PRBS_BER_CFG0_LANE1 bit 14	MAIN[19][28][47]
PRBS_BER_CFG0_LANE1 bit 15	MAIN[19][29][47]
PRBS_BER_CFG1_LANE1 bit 0	MAIN[19][28][48]
PRBS_BER_CFG1_LANE1 bit 1	MAIN[19][29][48]
PRBS_BER_CFG1_LANE1 bit 2	MAIN[19][28][49]
PRBS_BER_CFG1_LANE1 bit 3	MAIN[19][29][49]
PRBS_BER_CFG1_LANE1 bit 4	MAIN[19][28][50]
PRBS_BER_CFG1_LANE1 bit 5	MAIN[19][29][50]
PRBS_BER_CFG1_LANE1 bit 6	MAIN[19][28][51]
PRBS_BER_CFG1_LANE1 bit 7	MAIN[19][29][51]
PRBS_BER_CFG1_LANE1 bit 8	MAIN[19][28][52]
PRBS_BER_CFG1_LANE1 bit 9	MAIN[19][29][52]
PRBS_BER_CFG1_LANE1 bit 10	MAIN[19][28][53]
PRBS_BER_CFG1_LANE1 bit 11	MAIN[19][29][53]
PRBS_BER_CFG1_LANE1 bit 12	MAIN[19][28][54]
PRBS_BER_CFG1_LANE1 bit 13	MAIN[19][29][54]
PRBS_BER_CFG1_LANE1 bit 14	MAIN[19][28][55]
PRBS_BER_CFG1_LANE1 bit 15	MAIN[19][29][55]
PRBS_CFG_LANE1 bit 0	MAIN[20][28][0]
PRBS_CFG_LANE1 bit 1	MAIN[20][29][0]
PRBS_CFG_LANE1 bit 2	MAIN[20][28][1]
PRBS_CFG_LANE1 bit 3	MAIN[20][29][1]
PRBS_CFG_LANE1 bit 4	MAIN[20][28][2]
PRBS_CFG_LANE1 bit 5	MAIN[20][29][2]
PRBS_CFG_LANE1 bit 6	MAIN[20][28][3]
PRBS_CFG_LANE1 bit 7	MAIN[20][29][3]
PRBS_CFG_LANE1 bit 8	MAIN[20][28][4]
PRBS_CFG_LANE1 bit 9	MAIN[20][29][4]
PRBS_CFG_LANE1 bit 10	MAIN[20][28][5]
PRBS_CFG_LANE1 bit 11	MAIN[20][29][5]
PRBS_CFG_LANE1 bit 12	MAIN[20][28][6]
PRBS_CFG_LANE1 bit 13	MAIN[20][29][6]
PRBS_CFG_LANE1 bit 14	MAIN[20][28][7]
PRBS_CFG_LANE1 bit 15	MAIN[20][29][7]
RX_AEQ_VAL0_LANE1 bit 0	MAIN[15][28][56]
RX_AEQ_VAL0_LANE1 bit 1	MAIN[15][29][56]
RX_AEQ_VAL0_LANE1 bit 2	MAIN[15][28][57]
RX_AEQ_VAL0_LANE1 bit 3	MAIN[15][29][57]
RX_AEQ_VAL0_LANE1 bit 4	MAIN[15][28][58]
RX_AEQ_VAL0_LANE1 bit 5	MAIN[15][29][58]
RX_AEQ_VAL0_LANE1 bit 6	MAIN[15][28][59]
RX_AEQ_VAL0_LANE1 bit 7	MAIN[15][29][59]
RX_AEQ_VAL0_LANE1 bit 8	MAIN[15][28][60]
RX_AEQ_VAL0_LANE1 bit 9	MAIN[15][29][60]
RX_AEQ_VAL0_LANE1 bit 10	MAIN[15][28][61]
RX_AEQ_VAL0_LANE1 bit 11	MAIN[15][29][61]
RX_AEQ_VAL0_LANE1 bit 12	MAIN[15][28][62]
RX_AEQ_VAL0_LANE1 bit 13	MAIN[15][29][62]
RX_AEQ_VAL0_LANE1 bit 14	MAIN[15][28][63]
RX_AEQ_VAL0_LANE1 bit 15	MAIN[15][29][63]
RX_AEQ_VAL1_LANE1 bit 0	MAIN[16][28][0]
RX_AEQ_VAL1_LANE1 bit 1	MAIN[16][29][0]
RX_AEQ_VAL1_LANE1 bit 2	MAIN[16][28][1]
RX_AEQ_VAL1_LANE1 bit 3	MAIN[16][29][1]
RX_AEQ_VAL1_LANE1 bit 4	MAIN[16][28][2]
RX_AEQ_VAL1_LANE1 bit 5	MAIN[16][29][2]
RX_AEQ_VAL1_LANE1 bit 6	MAIN[16][28][3]
RX_AEQ_VAL1_LANE1 bit 7	MAIN[16][29][3]
RX_AEQ_VAL1_LANE1 bit 8	MAIN[16][28][4]
RX_AEQ_VAL1_LANE1 bit 9	MAIN[16][29][4]
RX_AEQ_VAL1_LANE1 bit 10	MAIN[16][28][5]
RX_AEQ_VAL1_LANE1 bit 11	MAIN[16][29][5]
RX_AEQ_VAL1_LANE1 bit 12	MAIN[16][28][6]
RX_AEQ_VAL1_LANE1 bit 13	MAIN[16][29][6]
RX_AEQ_VAL1_LANE1 bit 14	MAIN[16][28][7]
RX_AEQ_VAL1_LANE1 bit 15	MAIN[16][29][7]
RX_AGC_CTRL_LANE1 bit 0	MAIN[15][28][0]
RX_AGC_CTRL_LANE1 bit 1	MAIN[15][29][0]
RX_AGC_CTRL_LANE1 bit 2	MAIN[15][28][1]
RX_AGC_CTRL_LANE1 bit 3	MAIN[15][29][1]
RX_AGC_CTRL_LANE1 bit 4	MAIN[15][28][2]
RX_AGC_CTRL_LANE1 bit 5	MAIN[15][29][2]
RX_AGC_CTRL_LANE1 bit 6	MAIN[15][28][3]
RX_AGC_CTRL_LANE1 bit 7	MAIN[15][29][3]
RX_AGC_CTRL_LANE1 bit 8	MAIN[15][28][4]
RX_AGC_CTRL_LANE1 bit 9	MAIN[15][29][4]
RX_AGC_CTRL_LANE1 bit 10	MAIN[15][28][5]
RX_AGC_CTRL_LANE1 bit 11	MAIN[15][29][5]
RX_AGC_CTRL_LANE1 bit 12	MAIN[15][28][6]
RX_AGC_CTRL_LANE1 bit 13	MAIN[15][29][6]
RX_AGC_CTRL_LANE1 bit 14	MAIN[15][28][7]
RX_AGC_CTRL_LANE1 bit 15	MAIN[15][29][7]
RX_CDR_CTRL0_LANE1 bit 0	MAIN[15][28][16]
RX_CDR_CTRL0_LANE1 bit 1	MAIN[15][29][16]
RX_CDR_CTRL0_LANE1 bit 2	MAIN[15][28][17]
RX_CDR_CTRL0_LANE1 bit 3	MAIN[15][29][17]
RX_CDR_CTRL0_LANE1 bit 4	MAIN[15][28][18]
RX_CDR_CTRL0_LANE1 bit 5	MAIN[15][29][18]
RX_CDR_CTRL0_LANE1 bit 6	MAIN[15][28][19]
RX_CDR_CTRL0_LANE1 bit 7	MAIN[15][29][19]
RX_CDR_CTRL0_LANE1 bit 8	MAIN[15][28][20]
RX_CDR_CTRL0_LANE1 bit 9	MAIN[15][29][20]
RX_CDR_CTRL0_LANE1 bit 10	MAIN[15][28][21]
RX_CDR_CTRL0_LANE1 bit 11	MAIN[15][29][21]
RX_CDR_CTRL0_LANE1 bit 12	MAIN[15][28][22]
RX_CDR_CTRL0_LANE1 bit 13	MAIN[15][29][22]
RX_CDR_CTRL0_LANE1 bit 14	MAIN[15][28][23]
RX_CDR_CTRL0_LANE1 bit 15	MAIN[15][29][23]
RX_CDR_CTRL1_LANE1 bit 0	MAIN[15][28][24]
RX_CDR_CTRL1_LANE1 bit 1	MAIN[15][29][24]
RX_CDR_CTRL1_LANE1 bit 2	MAIN[15][28][25]
RX_CDR_CTRL1_LANE1 bit 3	MAIN[15][29][25]
RX_CDR_CTRL1_LANE1 bit 4	MAIN[15][28][26]
RX_CDR_CTRL1_LANE1 bit 5	MAIN[15][29][26]
RX_CDR_CTRL1_LANE1 bit 6	MAIN[15][28][27]
RX_CDR_CTRL1_LANE1 bit 7	MAIN[15][29][27]
RX_CDR_CTRL1_LANE1 bit 8	MAIN[15][28][28]
RX_CDR_CTRL1_LANE1 bit 9	MAIN[15][29][28]
RX_CDR_CTRL1_LANE1 bit 10	MAIN[15][28][29]
RX_CDR_CTRL1_LANE1 bit 11	MAIN[15][29][29]
RX_CDR_CTRL1_LANE1 bit 12	MAIN[15][28][30]
RX_CDR_CTRL1_LANE1 bit 13	MAIN[15][29][30]
RX_CDR_CTRL1_LANE1 bit 14	MAIN[15][28][31]
RX_CDR_CTRL1_LANE1 bit 15	MAIN[15][29][31]
RX_CDR_CTRL2_LANE1 bit 0	MAIN[15][28][32]
RX_CDR_CTRL2_LANE1 bit 1	MAIN[15][29][32]
RX_CDR_CTRL2_LANE1 bit 2	MAIN[15][28][33]
RX_CDR_CTRL2_LANE1 bit 3	MAIN[15][29][33]
RX_CDR_CTRL2_LANE1 bit 4	MAIN[15][28][34]
RX_CDR_CTRL2_LANE1 bit 5	MAIN[15][29][34]
RX_CDR_CTRL2_LANE1 bit 6	MAIN[15][28][35]
RX_CDR_CTRL2_LANE1 bit 7	MAIN[15][29][35]
RX_CDR_CTRL2_LANE1 bit 8	MAIN[15][28][36]
RX_CDR_CTRL2_LANE1 bit 9	MAIN[15][29][36]
RX_CDR_CTRL2_LANE1 bit 10	MAIN[15][28][37]
RX_CDR_CTRL2_LANE1 bit 11	MAIN[15][29][37]
RX_CDR_CTRL2_LANE1 bit 12	MAIN[15][28][38]
RX_CDR_CTRL2_LANE1 bit 13	MAIN[15][29][38]
RX_CDR_CTRL2_LANE1 bit 14	MAIN[15][28][39]
RX_CDR_CTRL2_LANE1 bit 15	MAIN[15][29][39]
RX_CFG0_LANE1 bit 0	MAIN[14][28][40]
RX_CFG0_LANE1 bit 1	MAIN[14][29][40]
RX_CFG0_LANE1 bit 2	MAIN[14][28][41]
RX_CFG0_LANE1 bit 3	MAIN[14][29][41]
RX_CFG0_LANE1 bit 4	MAIN[14][28][42]
RX_CFG0_LANE1 bit 5	MAIN[14][29][42]
RX_CFG0_LANE1 bit 6	MAIN[14][28][43]
RX_CFG0_LANE1 bit 7	MAIN[14][29][43]
RX_CFG0_LANE1 bit 8	MAIN[14][28][44]
RX_CFG0_LANE1 bit 9	MAIN[14][29][44]
RX_CFG0_LANE1 bit 10	MAIN[14][28][45]
RX_CFG0_LANE1 bit 11	MAIN[14][29][45]
RX_CFG0_LANE1 bit 12	MAIN[14][28][46]
RX_CFG0_LANE1 bit 13	MAIN[14][29][46]
RX_CFG0_LANE1 bit 14	MAIN[14][28][47]
RX_CFG0_LANE1 bit 15	MAIN[14][29][47]
RX_CFG1_LANE1 bit 0	MAIN[14][28][48]
RX_CFG1_LANE1 bit 1	MAIN[14][29][48]
RX_CFG1_LANE1 bit 2	MAIN[14][28][49]
RX_CFG1_LANE1 bit 3	MAIN[14][29][49]
RX_CFG1_LANE1 bit 4	MAIN[14][28][50]
RX_CFG1_LANE1 bit 5	MAIN[14][29][50]
RX_CFG1_LANE1 bit 6	MAIN[14][28][51]
RX_CFG1_LANE1 bit 7	MAIN[14][29][51]
RX_CFG1_LANE1 bit 8	MAIN[14][28][52]
RX_CFG1_LANE1 bit 9	MAIN[14][29][52]
RX_CFG1_LANE1 bit 10	MAIN[14][28][53]
RX_CFG1_LANE1 bit 11	MAIN[14][29][53]
RX_CFG1_LANE1 bit 12	MAIN[14][28][54]
RX_CFG1_LANE1 bit 13	MAIN[14][29][54]
RX_CFG1_LANE1 bit 14	MAIN[14][28][55]
RX_CFG1_LANE1 bit 15	MAIN[14][29][55]
RX_CFG2_LANE1 bit 0	MAIN[14][28][56]
RX_CFG2_LANE1 bit 1	MAIN[14][29][56]
RX_CFG2_LANE1 bit 2	MAIN[14][28][57]
RX_CFG2_LANE1 bit 3	MAIN[14][29][57]
RX_CFG2_LANE1 bit 4	MAIN[14][28][58]
RX_CFG2_LANE1 bit 5	MAIN[14][29][58]
RX_CFG2_LANE1 bit 6	MAIN[14][28][59]
RX_CFG2_LANE1 bit 7	MAIN[14][29][59]
RX_CFG2_LANE1 bit 8	MAIN[14][28][60]
RX_CFG2_LANE1 bit 9	MAIN[14][29][60]
RX_CFG2_LANE1 bit 10	MAIN[14][28][61]
RX_CFG2_LANE1 bit 11	MAIN[14][29][61]
RX_CFG2_LANE1 bit 12	MAIN[14][28][62]
RX_CFG2_LANE1 bit 13	MAIN[14][29][62]
RX_CFG2_LANE1 bit 14	MAIN[14][28][63]
RX_CFG2_LANE1 bit 15	MAIN[14][29][63]
RX_CTLE_CTRL_LANE1 bit 0	MAIN[16][28][8]
RX_CTLE_CTRL_LANE1 bit 1	MAIN[16][29][8]
RX_CTLE_CTRL_LANE1 bit 2	MAIN[16][28][9]
RX_CTLE_CTRL_LANE1 bit 3	MAIN[16][29][9]
RX_CTLE_CTRL_LANE1 bit 4	MAIN[16][28][10]
RX_CTLE_CTRL_LANE1 bit 5	MAIN[16][29][10]
RX_CTLE_CTRL_LANE1 bit 6	MAIN[16][28][11]
RX_CTLE_CTRL_LANE1 bit 7	MAIN[16][29][11]
RX_CTLE_CTRL_LANE1 bit 8	MAIN[16][28][12]
RX_CTLE_CTRL_LANE1 bit 9	MAIN[16][29][12]
RX_CTLE_CTRL_LANE1 bit 10	MAIN[16][28][13]
RX_CTLE_CTRL_LANE1 bit 11	MAIN[16][29][13]
RX_CTLE_CTRL_LANE1 bit 12	MAIN[16][28][14]
RX_CTLE_CTRL_LANE1 bit 13	MAIN[16][29][14]
RX_CTLE_CTRL_LANE1 bit 14	MAIN[16][28][15]
RX_CTLE_CTRL_LANE1 bit 15	MAIN[16][29][15]
RX_CTRL_OVRD_LANE1 bit 0	MAIN[17][28][40]
RX_CTRL_OVRD_LANE1 bit 1	MAIN[17][29][40]
RX_CTRL_OVRD_LANE1 bit 2	MAIN[17][28][41]
RX_CTRL_OVRD_LANE1 bit 3	MAIN[17][29][41]
RX_CTRL_OVRD_LANE1 bit 4	MAIN[17][28][42]
RX_CTRL_OVRD_LANE1 bit 5	MAIN[17][29][42]
RX_CTRL_OVRD_LANE1 bit 6	MAIN[17][28][43]
RX_CTRL_OVRD_LANE1 bit 7	MAIN[17][29][43]
RX_CTRL_OVRD_LANE1 bit 8	MAIN[17][28][44]
RX_CTRL_OVRD_LANE1 bit 9	MAIN[17][29][44]
RX_CTRL_OVRD_LANE1 bit 10	MAIN[17][28][45]
RX_CTRL_OVRD_LANE1 bit 11	MAIN[17][29][45]
RX_CTRL_OVRD_LANE1 bit 12	MAIN[17][28][46]
RX_CTRL_OVRD_LANE1 bit 13	MAIN[17][29][46]
RX_CTRL_OVRD_LANE1 bit 14	MAIN[17][28][47]
RX_CTRL_OVRD_LANE1 bit 15	MAIN[17][29][47]
RX_LOOP_CTRL_LANE1 bit 0	MAIN[15][28][8]
RX_LOOP_CTRL_LANE1 bit 1	MAIN[15][29][8]
RX_LOOP_CTRL_LANE1 bit 2	MAIN[15][28][9]
RX_LOOP_CTRL_LANE1 bit 3	MAIN[15][29][9]
RX_LOOP_CTRL_LANE1 bit 4	MAIN[15][28][10]
RX_LOOP_CTRL_LANE1 bit 5	MAIN[15][29][10]
RX_LOOP_CTRL_LANE1 bit 6	MAIN[15][28][11]
RX_LOOP_CTRL_LANE1 bit 7	MAIN[15][29][11]
RX_LOOP_CTRL_LANE1 bit 8	MAIN[15][28][12]
RX_LOOP_CTRL_LANE1 bit 9	MAIN[15][29][12]
RX_LOOP_CTRL_LANE1 bit 10	MAIN[15][28][13]
RX_LOOP_CTRL_LANE1 bit 11	MAIN[15][29][13]
RX_LOOP_CTRL_LANE1 bit 12	MAIN[15][28][14]
RX_LOOP_CTRL_LANE1 bit 13	MAIN[15][29][14]
RX_LOOP_CTRL_LANE1 bit 14	MAIN[15][28][15]
RX_LOOP_CTRL_LANE1 bit 15	MAIN[15][29][15]
RX_MVAL0_LANE1 bit 0	MAIN[15][28][40]
RX_MVAL0_LANE1 bit 1	MAIN[15][29][40]
RX_MVAL0_LANE1 bit 2	MAIN[15][28][41]
RX_MVAL0_LANE1 bit 3	MAIN[15][29][41]
RX_MVAL0_LANE1 bit 4	MAIN[15][28][42]
RX_MVAL0_LANE1 bit 5	MAIN[15][29][42]
RX_MVAL0_LANE1 bit 6	MAIN[15][28][43]
RX_MVAL0_LANE1 bit 7	MAIN[15][29][43]
RX_MVAL0_LANE1 bit 8	MAIN[15][28][44]
RX_MVAL0_LANE1 bit 9	MAIN[15][29][44]
RX_MVAL0_LANE1 bit 10	MAIN[15][28][45]
RX_MVAL0_LANE1 bit 11	MAIN[15][29][45]
RX_MVAL0_LANE1 bit 12	MAIN[15][28][46]
RX_MVAL0_LANE1 bit 13	MAIN[15][29][46]
RX_MVAL0_LANE1 bit 14	MAIN[15][28][47]
RX_MVAL0_LANE1 bit 15	MAIN[15][29][47]
RX_MVAL1_LANE1 bit 0	MAIN[15][28][48]
RX_MVAL1_LANE1 bit 1	MAIN[15][29][48]
RX_MVAL1_LANE1 bit 2	MAIN[15][28][49]
RX_MVAL1_LANE1 bit 3	MAIN[15][29][49]
RX_MVAL1_LANE1 bit 4	MAIN[15][28][50]
RX_MVAL1_LANE1 bit 5	MAIN[15][29][50]
RX_MVAL1_LANE1 bit 6	MAIN[15][28][51]
RX_MVAL1_LANE1 bit 7	MAIN[15][29][51]
RX_MVAL1_LANE1 bit 8	MAIN[15][28][52]
RX_MVAL1_LANE1 bit 9	MAIN[15][29][52]
RX_MVAL1_LANE1 bit 10	MAIN[15][28][53]
RX_MVAL1_LANE1 bit 11	MAIN[15][29][53]
RX_MVAL1_LANE1 bit 12	MAIN[15][28][54]
RX_MVAL1_LANE1 bit 13	MAIN[15][29][54]
RX_MVAL1_LANE1 bit 14	MAIN[15][28][55]
RX_MVAL1_LANE1 bit 15	MAIN[15][29][55]
TERM_CTRL_LANE1 bit 0	MAIN[17][28][0]
TERM_CTRL_LANE1 bit 1	MAIN[17][29][0]
TERM_CTRL_LANE1 bit 2	MAIN[17][28][1]
TERM_CTRL_LANE1 bit 3	MAIN[17][29][1]
TERM_CTRL_LANE1 bit 4	MAIN[17][28][2]
TERM_CTRL_LANE1 bit 5	MAIN[17][29][2]
TERM_CTRL_LANE1 bit 6	MAIN[17][28][3]
TERM_CTRL_LANE1 bit 7	MAIN[17][29][3]
TERM_CTRL_LANE1 bit 8	MAIN[17][28][4]
TERM_CTRL_LANE1 bit 9	MAIN[17][29][4]
TERM_CTRL_LANE1 bit 10	MAIN[17][28][5]
TERM_CTRL_LANE1 bit 11	MAIN[17][29][5]
TERM_CTRL_LANE1 bit 12	MAIN[17][28][6]
TERM_CTRL_LANE1 bit 13	MAIN[17][29][6]
TERM_CTRL_LANE1 bit 14	MAIN[17][28][7]
TERM_CTRL_LANE1 bit 15	MAIN[17][29][7]
TX_CFG0_LANE1 bit 0	MAIN[16][28][16]
TX_CFG0_LANE1 bit 1	MAIN[16][29][16]
TX_CFG0_LANE1 bit 2	MAIN[16][28][17]
TX_CFG0_LANE1 bit 3	MAIN[16][29][17]
TX_CFG0_LANE1 bit 4	MAIN[16][28][18]
TX_CFG0_LANE1 bit 5	MAIN[16][29][18]
TX_CFG0_LANE1 bit 6	MAIN[16][28][19]
TX_CFG0_LANE1 bit 7	MAIN[16][29][19]
TX_CFG0_LANE1 bit 8	MAIN[16][28][20]
TX_CFG0_LANE1 bit 9	MAIN[16][29][20]
TX_CFG0_LANE1 bit 10	MAIN[16][28][21]
TX_CFG0_LANE1 bit 11	MAIN[16][29][21]
TX_CFG0_LANE1 bit 12	MAIN[16][28][22]
TX_CFG0_LANE1 bit 13	MAIN[16][29][22]
TX_CFG0_LANE1 bit 14	MAIN[16][28][23]
TX_CFG0_LANE1 bit 15	MAIN[16][29][23]
TX_CFG1_LANE1 bit 0	MAIN[16][28][24]
TX_CFG1_LANE1 bit 1	MAIN[16][29][24]
TX_CFG1_LANE1 bit 2	MAIN[16][28][25]
TX_CFG1_LANE1 bit 3	MAIN[16][29][25]
TX_CFG1_LANE1 bit 4	MAIN[16][28][26]
TX_CFG1_LANE1 bit 5	MAIN[16][29][26]
TX_CFG1_LANE1 bit 6	MAIN[16][28][27]
TX_CFG1_LANE1 bit 7	MAIN[16][29][27]
TX_CFG1_LANE1 bit 8	MAIN[16][28][28]
TX_CFG1_LANE1 bit 9	MAIN[16][29][28]
TX_CFG1_LANE1 bit 10	MAIN[16][28][29]
TX_CFG1_LANE1 bit 11	MAIN[16][29][29]
TX_CFG1_LANE1 bit 12	MAIN[16][28][30]
TX_CFG1_LANE1 bit 13	MAIN[16][29][30]
TX_CFG1_LANE1 bit 14	MAIN[16][28][31]
TX_CFG1_LANE1 bit 15	MAIN[16][29][31]
TX_CFG2_LANE1 bit 0	MAIN[16][28][32]
TX_CFG2_LANE1 bit 1	MAIN[16][29][32]
TX_CFG2_LANE1 bit 2	MAIN[16][28][33]
TX_CFG2_LANE1 bit 3	MAIN[16][29][33]
TX_CFG2_LANE1 bit 4	MAIN[16][28][34]
TX_CFG2_LANE1 bit 5	MAIN[16][29][34]
TX_CFG2_LANE1 bit 6	MAIN[16][28][35]
TX_CFG2_LANE1 bit 7	MAIN[16][29][35]
TX_CFG2_LANE1 bit 8	MAIN[16][28][36]
TX_CFG2_LANE1 bit 9	MAIN[16][29][36]
TX_CFG2_LANE1 bit 10	MAIN[16][28][37]
TX_CFG2_LANE1 bit 11	MAIN[16][29][37]
TX_CFG2_LANE1 bit 12	MAIN[16][28][38]
TX_CFG2_LANE1 bit 13	MAIN[16][29][38]
TX_CFG2_LANE1 bit 14	MAIN[16][28][39]
TX_CFG2_LANE1 bit 15	MAIN[16][29][39]
TX_CLK_SEL0_LANE1 bit 0	MAIN[16][28][48]
TX_CLK_SEL0_LANE1 bit 1	MAIN[16][29][48]
TX_CLK_SEL0_LANE1 bit 2	MAIN[16][28][49]
TX_CLK_SEL0_LANE1 bit 3	MAIN[16][29][49]
TX_CLK_SEL0_LANE1 bit 4	MAIN[16][28][50]
TX_CLK_SEL0_LANE1 bit 5	MAIN[16][29][50]
TX_CLK_SEL0_LANE1 bit 6	MAIN[16][28][51]
TX_CLK_SEL0_LANE1 bit 7	MAIN[16][29][51]
TX_CLK_SEL0_LANE1 bit 8	MAIN[16][28][52]
TX_CLK_SEL0_LANE1 bit 9	MAIN[16][29][52]
TX_CLK_SEL0_LANE1 bit 10	MAIN[16][28][53]
TX_CLK_SEL0_LANE1 bit 11	MAIN[16][29][53]
TX_CLK_SEL0_LANE1 bit 12	MAIN[16][28][54]
TX_CLK_SEL0_LANE1 bit 13	MAIN[16][29][54]
TX_CLK_SEL0_LANE1 bit 14	MAIN[16][28][55]
TX_CLK_SEL0_LANE1 bit 15	MAIN[16][29][55]
TX_CLK_SEL1_LANE1 bit 0	MAIN[16][28][56]
TX_CLK_SEL1_LANE1 bit 1	MAIN[16][29][56]
TX_CLK_SEL1_LANE1 bit 2	MAIN[16][28][57]
TX_CLK_SEL1_LANE1 bit 3	MAIN[16][29][57]
TX_CLK_SEL1_LANE1 bit 4	MAIN[16][28][58]
TX_CLK_SEL1_LANE1 bit 5	MAIN[16][29][58]
TX_CLK_SEL1_LANE1 bit 6	MAIN[16][28][59]
TX_CLK_SEL1_LANE1 bit 7	MAIN[16][29][59]
TX_CLK_SEL1_LANE1 bit 8	MAIN[16][28][60]
TX_CLK_SEL1_LANE1 bit 9	MAIN[16][29][60]
TX_CLK_SEL1_LANE1 bit 10	MAIN[16][28][61]
TX_CLK_SEL1_LANE1 bit 11	MAIN[16][29][61]
TX_CLK_SEL1_LANE1 bit 12	MAIN[16][28][62]
TX_CLK_SEL1_LANE1 bit 13	MAIN[16][29][62]
TX_CLK_SEL1_LANE1 bit 14	MAIN[16][28][63]
TX_CLK_SEL1_LANE1 bit 15	MAIN[16][29][63]
TX_DISABLE_LANE1 bit 0	MAIN[14][28][0]
TX_DISABLE_LANE1 bit 1	MAIN[14][29][0]
TX_DISABLE_LANE1 bit 2	MAIN[14][28][1]
TX_DISABLE_LANE1 bit 3	MAIN[14][29][1]
TX_DISABLE_LANE1 bit 4	MAIN[14][28][2]
TX_DISABLE_LANE1 bit 5	MAIN[14][29][2]
TX_DISABLE_LANE1 bit 6	MAIN[14][28][3]
TX_DISABLE_LANE1 bit 7	MAIN[14][29][3]
TX_DISABLE_LANE1 bit 8	MAIN[14][28][4]
TX_DISABLE_LANE1 bit 9	MAIN[14][29][4]
TX_DISABLE_LANE1 bit 10	MAIN[14][28][5]
TX_DISABLE_LANE1 bit 11	MAIN[14][29][5]
TX_DISABLE_LANE1 bit 12	MAIN[14][28][6]
TX_DISABLE_LANE1 bit 13	MAIN[14][29][6]
TX_DISABLE_LANE1 bit 14	MAIN[14][28][7]
TX_DISABLE_LANE1 bit 15	MAIN[14][29][7]
TX_PREEMPH_LANE1 bit 0	MAIN[16][28][40]
TX_PREEMPH_LANE1 bit 1	MAIN[16][29][40]
TX_PREEMPH_LANE1 bit 2	MAIN[16][28][41]
TX_PREEMPH_LANE1 bit 3	MAIN[16][29][41]
TX_PREEMPH_LANE1 bit 4	MAIN[16][28][42]
TX_PREEMPH_LANE1 bit 5	MAIN[16][29][42]
TX_PREEMPH_LANE1 bit 6	MAIN[16][28][43]
TX_PREEMPH_LANE1 bit 7	MAIN[16][29][43]
TX_PREEMPH_LANE1 bit 8	MAIN[16][28][44]
TX_PREEMPH_LANE1 bit 9	MAIN[16][29][44]
TX_PREEMPH_LANE1 bit 10	MAIN[16][28][45]
TX_PREEMPH_LANE1 bit 11	MAIN[16][29][45]
TX_PREEMPH_LANE1 bit 12	MAIN[16][28][46]
TX_PREEMPH_LANE1 bit 13	MAIN[16][29][46]
TX_PREEMPH_LANE1 bit 14	MAIN[16][28][47]
TX_PREEMPH_LANE1 bit 15	MAIN[16][29][47]
TX_PWR_RATE_OVRD_LANE1 bit 0	MAIN[17][28][32]
TX_PWR_RATE_OVRD_LANE1 bit 1	MAIN[17][29][32]
TX_PWR_RATE_OVRD_LANE1 bit 2	MAIN[17][28][33]
TX_PWR_RATE_OVRD_LANE1 bit 3	MAIN[17][29][33]
TX_PWR_RATE_OVRD_LANE1 bit 4	MAIN[17][28][34]
TX_PWR_RATE_OVRD_LANE1 bit 5	MAIN[17][29][34]
TX_PWR_RATE_OVRD_LANE1 bit 6	MAIN[17][28][35]
TX_PWR_RATE_OVRD_LANE1 bit 7	MAIN[17][29][35]
TX_PWR_RATE_OVRD_LANE1 bit 8	MAIN[17][28][36]
TX_PWR_RATE_OVRD_LANE1 bit 9	MAIN[17][29][36]
TX_PWR_RATE_OVRD_LANE1 bit 10	MAIN[17][28][37]
TX_PWR_RATE_OVRD_LANE1 bit 11	MAIN[17][29][37]
TX_PWR_RATE_OVRD_LANE1 bit 12	MAIN[17][28][38]
TX_PWR_RATE_OVRD_LANE1 bit 13	MAIN[17][29][38]
TX_PWR_RATE_OVRD_LANE1 bit 14	MAIN[17][28][39]
TX_PWR_RATE_OVRD_LANE1 bit 15	MAIN[17][29][39]
RX_FABRIC_WIDTH2	[enum: GTH_QUAD_FABRIC_WIDTH]
TX_FABRIC_WIDTH2	[enum: GTH_QUAD_FABRIC_WIDTH]
GTH_CFG_PWRUP_LANE2 bit 0	MAIN[30][29][8]
TST_PCS_LOOPBACK_LANE2 bit 0	MAIN[30][28][8]
BUFFER_CONFIG_LANE2 bit 0	MAIN[30][28][0]
BUFFER_CONFIG_LANE2 bit 1	MAIN[30][29][0]
BUFFER_CONFIG_LANE2 bit 2	MAIN[30][28][1]
BUFFER_CONFIG_LANE2 bit 3	MAIN[30][29][1]
BUFFER_CONFIG_LANE2 bit 4	MAIN[30][28][2]
BUFFER_CONFIG_LANE2 bit 5	MAIN[30][29][2]
BUFFER_CONFIG_LANE2 bit 6	MAIN[30][28][3]
BUFFER_CONFIG_LANE2 bit 7	MAIN[30][29][3]
BUFFER_CONFIG_LANE2 bit 8	MAIN[30][28][4]
BUFFER_CONFIG_LANE2 bit 9	MAIN[30][29][4]
BUFFER_CONFIG_LANE2 bit 10	MAIN[30][28][5]
BUFFER_CONFIG_LANE2 bit 11	MAIN[30][29][5]
BUFFER_CONFIG_LANE2 bit 12	MAIN[30][28][6]
BUFFER_CONFIG_LANE2 bit 13	MAIN[30][29][6]
BUFFER_CONFIG_LANE2 bit 14	MAIN[30][28][7]
BUFFER_CONFIG_LANE2 bit 15	MAIN[30][29][7]
DFE_TRAIN_CTRL_LANE2 bit 0	MAIN[24][28][16]
DFE_TRAIN_CTRL_LANE2 bit 1	MAIN[24][29][16]
DFE_TRAIN_CTRL_LANE2 bit 2	MAIN[24][28][17]
DFE_TRAIN_CTRL_LANE2 bit 3	MAIN[24][29][17]
DFE_TRAIN_CTRL_LANE2 bit 4	MAIN[24][28][18]
DFE_TRAIN_CTRL_LANE2 bit 5	MAIN[24][29][18]
DFE_TRAIN_CTRL_LANE2 bit 6	MAIN[24][28][19]
DFE_TRAIN_CTRL_LANE2 bit 7	MAIN[24][29][19]
DFE_TRAIN_CTRL_LANE2 bit 8	MAIN[24][28][20]
DFE_TRAIN_CTRL_LANE2 bit 9	MAIN[24][29][20]
DFE_TRAIN_CTRL_LANE2 bit 10	MAIN[24][28][21]
DFE_TRAIN_CTRL_LANE2 bit 11	MAIN[24][29][21]
DFE_TRAIN_CTRL_LANE2 bit 12	MAIN[24][28][22]
DFE_TRAIN_CTRL_LANE2 bit 13	MAIN[24][29][22]
DFE_TRAIN_CTRL_LANE2 bit 14	MAIN[24][28][23]
DFE_TRAIN_CTRL_LANE2 bit 15	MAIN[24][29][23]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 0	MAIN[21][28][24]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 1	MAIN[21][29][24]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 2	MAIN[21][28][25]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 3	MAIN[21][29][25]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 4	MAIN[21][28][26]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 5	MAIN[21][29][26]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 6	MAIN[21][28][27]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 7	MAIN[21][29][27]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 8	MAIN[21][28][28]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 9	MAIN[21][29][28]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 10	MAIN[21][28][29]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 11	MAIN[21][29][29]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 12	MAIN[21][28][30]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 13	MAIN[21][29][30]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 14	MAIN[21][28][31]
E10GBASEKR_LD_COEFF_UPD_LANE2 bit 15	MAIN[21][29][31]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 0	MAIN[21][28][16]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 1	MAIN[21][29][16]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 2	MAIN[21][28][17]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 3	MAIN[21][29][17]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 4	MAIN[21][28][18]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 5	MAIN[21][29][18]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 6	MAIN[21][28][19]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 7	MAIN[21][29][19]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 8	MAIN[21][28][20]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 9	MAIN[21][29][20]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 10	MAIN[21][28][21]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 11	MAIN[21][29][21]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 12	MAIN[21][28][22]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 13	MAIN[21][29][22]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 14	MAIN[21][28][23]
E10GBASEKR_LP_COEFF_UPD_LANE2 bit 15	MAIN[21][29][23]
E10GBASEKR_PMA_CTRL_LANE2 bit 0	MAIN[21][28][8]
E10GBASEKR_PMA_CTRL_LANE2 bit 1	MAIN[21][29][8]
E10GBASEKR_PMA_CTRL_LANE2 bit 2	MAIN[21][28][9]
E10GBASEKR_PMA_CTRL_LANE2 bit 3	MAIN[21][29][9]
E10GBASEKR_PMA_CTRL_LANE2 bit 4	MAIN[21][28][10]
E10GBASEKR_PMA_CTRL_LANE2 bit 5	MAIN[21][29][10]
E10GBASEKR_PMA_CTRL_LANE2 bit 6	MAIN[21][28][11]
E10GBASEKR_PMA_CTRL_LANE2 bit 7	MAIN[21][29][11]
E10GBASEKR_PMA_CTRL_LANE2 bit 8	MAIN[21][28][12]
E10GBASEKR_PMA_CTRL_LANE2 bit 9	MAIN[21][29][12]
E10GBASEKR_PMA_CTRL_LANE2 bit 10	MAIN[21][28][13]
E10GBASEKR_PMA_CTRL_LANE2 bit 11	MAIN[21][29][13]
E10GBASEKR_PMA_CTRL_LANE2 bit 12	MAIN[21][28][14]
E10GBASEKR_PMA_CTRL_LANE2 bit 13	MAIN[21][29][14]
E10GBASEKR_PMA_CTRL_LANE2 bit 14	MAIN[21][28][15]
E10GBASEKR_PMA_CTRL_LANE2 bit 15	MAIN[21][29][15]
E10GBASEKX_CTRL_LANE2 bit 0	MAIN[21][28][32]
E10GBASEKX_CTRL_LANE2 bit 1	MAIN[21][29][32]
E10GBASEKX_CTRL_LANE2 bit 2	MAIN[21][28][33]
E10GBASEKX_CTRL_LANE2 bit 3	MAIN[21][29][33]
E10GBASEKX_CTRL_LANE2 bit 4	MAIN[21][28][34]
E10GBASEKX_CTRL_LANE2 bit 5	MAIN[21][29][34]
E10GBASEKX_CTRL_LANE2 bit 6	MAIN[21][28][35]
E10GBASEKX_CTRL_LANE2 bit 7	MAIN[21][29][35]
E10GBASEKX_CTRL_LANE2 bit 8	MAIN[21][28][36]
E10GBASEKX_CTRL_LANE2 bit 9	MAIN[21][29][36]
E10GBASEKX_CTRL_LANE2 bit 10	MAIN[21][28][37]
E10GBASEKX_CTRL_LANE2 bit 11	MAIN[21][29][37]
E10GBASEKX_CTRL_LANE2 bit 12	MAIN[21][28][38]
E10GBASEKX_CTRL_LANE2 bit 13	MAIN[21][29][38]
E10GBASEKX_CTRL_LANE2 bit 14	MAIN[21][28][39]
E10GBASEKX_CTRL_LANE2 bit 15	MAIN[21][29][39]
E10GBASER_PCS_CFG_LANE2 bit 0	MAIN[27][28][40]
E10GBASER_PCS_CFG_LANE2 bit 1	MAIN[27][29][40]
E10GBASER_PCS_CFG_LANE2 bit 2	MAIN[27][28][41]
E10GBASER_PCS_CFG_LANE2 bit 3	MAIN[27][29][41]
E10GBASER_PCS_CFG_LANE2 bit 4	MAIN[27][28][42]
E10GBASER_PCS_CFG_LANE2 bit 5	MAIN[27][29][42]
E10GBASER_PCS_CFG_LANE2 bit 6	MAIN[27][28][43]
E10GBASER_PCS_CFG_LANE2 bit 7	MAIN[27][29][43]
E10GBASER_PCS_CFG_LANE2 bit 8	MAIN[27][28][44]
E10GBASER_PCS_CFG_LANE2 bit 9	MAIN[27][29][44]
E10GBASER_PCS_CFG_LANE2 bit 10	MAIN[27][28][45]
E10GBASER_PCS_CFG_LANE2 bit 11	MAIN[27][29][45]
E10GBASER_PCS_CFG_LANE2 bit 12	MAIN[27][28][46]
E10GBASER_PCS_CFG_LANE2 bit 13	MAIN[27][29][46]
E10GBASER_PCS_CFG_LANE2 bit 14	MAIN[27][28][47]
E10GBASER_PCS_CFG_LANE2 bit 15	MAIN[27][29][47]
E10GBASER_PCS_SEEDA0_LANE2 bit 0	MAIN[25][28][24]
E10GBASER_PCS_SEEDA0_LANE2 bit 1	MAIN[25][29][24]
E10GBASER_PCS_SEEDA0_LANE2 bit 2	MAIN[25][28][25]
E10GBASER_PCS_SEEDA0_LANE2 bit 3	MAIN[25][29][25]
E10GBASER_PCS_SEEDA0_LANE2 bit 4	MAIN[25][28][26]
E10GBASER_PCS_SEEDA0_LANE2 bit 5	MAIN[25][29][26]
E10GBASER_PCS_SEEDA0_LANE2 bit 6	MAIN[25][28][27]
E10GBASER_PCS_SEEDA0_LANE2 bit 7	MAIN[25][29][27]
E10GBASER_PCS_SEEDA0_LANE2 bit 8	MAIN[25][28][28]
E10GBASER_PCS_SEEDA0_LANE2 bit 9	MAIN[25][29][28]
E10GBASER_PCS_SEEDA0_LANE2 bit 10	MAIN[25][28][29]
E10GBASER_PCS_SEEDA0_LANE2 bit 11	MAIN[25][29][29]
E10GBASER_PCS_SEEDA0_LANE2 bit 12	MAIN[25][28][30]
E10GBASER_PCS_SEEDA0_LANE2 bit 13	MAIN[25][29][30]
E10GBASER_PCS_SEEDA0_LANE2 bit 14	MAIN[25][28][31]
E10GBASER_PCS_SEEDA0_LANE2 bit 15	MAIN[25][29][31]
E10GBASER_PCS_SEEDA1_LANE2 bit 0	MAIN[25][28][32]
E10GBASER_PCS_SEEDA1_LANE2 bit 1	MAIN[25][29][32]
E10GBASER_PCS_SEEDA1_LANE2 bit 2	MAIN[25][28][33]
E10GBASER_PCS_SEEDA1_LANE2 bit 3	MAIN[25][29][33]
E10GBASER_PCS_SEEDA1_LANE2 bit 4	MAIN[25][28][34]
E10GBASER_PCS_SEEDA1_LANE2 bit 5	MAIN[25][29][34]
E10GBASER_PCS_SEEDA1_LANE2 bit 6	MAIN[25][28][35]
E10GBASER_PCS_SEEDA1_LANE2 bit 7	MAIN[25][29][35]
E10GBASER_PCS_SEEDA1_LANE2 bit 8	MAIN[25][28][36]
E10GBASER_PCS_SEEDA1_LANE2 bit 9	MAIN[25][29][36]
E10GBASER_PCS_SEEDA1_LANE2 bit 10	MAIN[25][28][37]
E10GBASER_PCS_SEEDA1_LANE2 bit 11	MAIN[25][29][37]
E10GBASER_PCS_SEEDA1_LANE2 bit 12	MAIN[25][28][38]
E10GBASER_PCS_SEEDA1_LANE2 bit 13	MAIN[25][29][38]
E10GBASER_PCS_SEEDA1_LANE2 bit 14	MAIN[25][28][39]
E10GBASER_PCS_SEEDA1_LANE2 bit 15	MAIN[25][29][39]
E10GBASER_PCS_SEEDA2_LANE2 bit 0	MAIN[25][28][40]
E10GBASER_PCS_SEEDA2_LANE2 bit 1	MAIN[25][29][40]
E10GBASER_PCS_SEEDA2_LANE2 bit 2	MAIN[25][28][41]
E10GBASER_PCS_SEEDA2_LANE2 bit 3	MAIN[25][29][41]
E10GBASER_PCS_SEEDA2_LANE2 bit 4	MAIN[25][28][42]
E10GBASER_PCS_SEEDA2_LANE2 bit 5	MAIN[25][29][42]
E10GBASER_PCS_SEEDA2_LANE2 bit 6	MAIN[25][28][43]
E10GBASER_PCS_SEEDA2_LANE2 bit 7	MAIN[25][29][43]
E10GBASER_PCS_SEEDA2_LANE2 bit 8	MAIN[25][28][44]
E10GBASER_PCS_SEEDA2_LANE2 bit 9	MAIN[25][29][44]
E10GBASER_PCS_SEEDA2_LANE2 bit 10	MAIN[25][28][45]
E10GBASER_PCS_SEEDA2_LANE2 bit 11	MAIN[25][29][45]
E10GBASER_PCS_SEEDA2_LANE2 bit 12	MAIN[25][28][46]
E10GBASER_PCS_SEEDA2_LANE2 bit 13	MAIN[25][29][46]
E10GBASER_PCS_SEEDA2_LANE2 bit 14	MAIN[25][28][47]
E10GBASER_PCS_SEEDA2_LANE2 bit 15	MAIN[25][29][47]
E10GBASER_PCS_SEEDA3_LANE2 bit 0	MAIN[25][28][48]
E10GBASER_PCS_SEEDA3_LANE2 bit 1	MAIN[25][29][48]
E10GBASER_PCS_SEEDA3_LANE2 bit 2	MAIN[25][28][49]
E10GBASER_PCS_SEEDA3_LANE2 bit 3	MAIN[25][29][49]
E10GBASER_PCS_SEEDA3_LANE2 bit 4	MAIN[25][28][50]
E10GBASER_PCS_SEEDA3_LANE2 bit 5	MAIN[25][29][50]
E10GBASER_PCS_SEEDA3_LANE2 bit 6	MAIN[25][28][51]
E10GBASER_PCS_SEEDA3_LANE2 bit 7	MAIN[25][29][51]
E10GBASER_PCS_SEEDA3_LANE2 bit 8	MAIN[25][28][52]
E10GBASER_PCS_SEEDA3_LANE2 bit 9	MAIN[25][29][52]
E10GBASER_PCS_SEEDA3_LANE2 bit 10	MAIN[25][28][53]
E10GBASER_PCS_SEEDA3_LANE2 bit 11	MAIN[25][29][53]
E10GBASER_PCS_SEEDA3_LANE2 bit 12	MAIN[25][28][54]
E10GBASER_PCS_SEEDA3_LANE2 bit 13	MAIN[25][29][54]
E10GBASER_PCS_SEEDA3_LANE2 bit 14	MAIN[25][28][55]
E10GBASER_PCS_SEEDA3_LANE2 bit 15	MAIN[25][29][55]
E10GBASER_PCS_SEEDB0_LANE2 bit 0	MAIN[25][28][56]
E10GBASER_PCS_SEEDB0_LANE2 bit 1	MAIN[25][29][56]
E10GBASER_PCS_SEEDB0_LANE2 bit 2	MAIN[25][28][57]
E10GBASER_PCS_SEEDB0_LANE2 bit 3	MAIN[25][29][57]
E10GBASER_PCS_SEEDB0_LANE2 bit 4	MAIN[25][28][58]
E10GBASER_PCS_SEEDB0_LANE2 bit 5	MAIN[25][29][58]
E10GBASER_PCS_SEEDB0_LANE2 bit 6	MAIN[25][28][59]
E10GBASER_PCS_SEEDB0_LANE2 bit 7	MAIN[25][29][59]
E10GBASER_PCS_SEEDB0_LANE2 bit 8	MAIN[25][28][60]
E10GBASER_PCS_SEEDB0_LANE2 bit 9	MAIN[25][29][60]
E10GBASER_PCS_SEEDB0_LANE2 bit 10	MAIN[25][28][61]
E10GBASER_PCS_SEEDB0_LANE2 bit 11	MAIN[25][29][61]
E10GBASER_PCS_SEEDB0_LANE2 bit 12	MAIN[25][28][62]
E10GBASER_PCS_SEEDB0_LANE2 bit 13	MAIN[25][29][62]
E10GBASER_PCS_SEEDB0_LANE2 bit 14	MAIN[25][28][63]
E10GBASER_PCS_SEEDB0_LANE2 bit 15	MAIN[25][29][63]
E10GBASER_PCS_SEEDB1_LANE2 bit 0	MAIN[26][28][0]
E10GBASER_PCS_SEEDB1_LANE2 bit 1	MAIN[26][29][0]
E10GBASER_PCS_SEEDB1_LANE2 bit 2	MAIN[26][28][1]
E10GBASER_PCS_SEEDB1_LANE2 bit 3	MAIN[26][29][1]
E10GBASER_PCS_SEEDB1_LANE2 bit 4	MAIN[26][28][2]
E10GBASER_PCS_SEEDB1_LANE2 bit 5	MAIN[26][29][2]
E10GBASER_PCS_SEEDB1_LANE2 bit 6	MAIN[26][28][3]
E10GBASER_PCS_SEEDB1_LANE2 bit 7	MAIN[26][29][3]
E10GBASER_PCS_SEEDB1_LANE2 bit 8	MAIN[26][28][4]
E10GBASER_PCS_SEEDB1_LANE2 bit 9	MAIN[26][29][4]
E10GBASER_PCS_SEEDB1_LANE2 bit 10	MAIN[26][28][5]
E10GBASER_PCS_SEEDB1_LANE2 bit 11	MAIN[26][29][5]
E10GBASER_PCS_SEEDB1_LANE2 bit 12	MAIN[26][28][6]
E10GBASER_PCS_SEEDB1_LANE2 bit 13	MAIN[26][29][6]
E10GBASER_PCS_SEEDB1_LANE2 bit 14	MAIN[26][28][7]
E10GBASER_PCS_SEEDB1_LANE2 bit 15	MAIN[26][29][7]
E10GBASER_PCS_SEEDB2_LANE2 bit 0	MAIN[26][28][8]
E10GBASER_PCS_SEEDB2_LANE2 bit 1	MAIN[26][29][8]
E10GBASER_PCS_SEEDB2_LANE2 bit 2	MAIN[26][28][9]
E10GBASER_PCS_SEEDB2_LANE2 bit 3	MAIN[26][29][9]
E10GBASER_PCS_SEEDB2_LANE2 bit 4	MAIN[26][28][10]
E10GBASER_PCS_SEEDB2_LANE2 bit 5	MAIN[26][29][10]
E10GBASER_PCS_SEEDB2_LANE2 bit 6	MAIN[26][28][11]
E10GBASER_PCS_SEEDB2_LANE2 bit 7	MAIN[26][29][11]
E10GBASER_PCS_SEEDB2_LANE2 bit 8	MAIN[26][28][12]
E10GBASER_PCS_SEEDB2_LANE2 bit 9	MAIN[26][29][12]
E10GBASER_PCS_SEEDB2_LANE2 bit 10	MAIN[26][28][13]
E10GBASER_PCS_SEEDB2_LANE2 bit 11	MAIN[26][29][13]
E10GBASER_PCS_SEEDB2_LANE2 bit 12	MAIN[26][28][14]
E10GBASER_PCS_SEEDB2_LANE2 bit 13	MAIN[26][29][14]
E10GBASER_PCS_SEEDB2_LANE2 bit 14	MAIN[26][28][15]
E10GBASER_PCS_SEEDB2_LANE2 bit 15	MAIN[26][29][15]
E10GBASER_PCS_SEEDB3_LANE2 bit 0	MAIN[26][28][16]
E10GBASER_PCS_SEEDB3_LANE2 bit 1	MAIN[26][29][16]
E10GBASER_PCS_SEEDB3_LANE2 bit 2	MAIN[26][28][17]
E10GBASER_PCS_SEEDB3_LANE2 bit 3	MAIN[26][29][17]
E10GBASER_PCS_SEEDB3_LANE2 bit 4	MAIN[26][28][18]
E10GBASER_PCS_SEEDB3_LANE2 bit 5	MAIN[26][29][18]
E10GBASER_PCS_SEEDB3_LANE2 bit 6	MAIN[26][28][19]
E10GBASER_PCS_SEEDB3_LANE2 bit 7	MAIN[26][29][19]
E10GBASER_PCS_SEEDB3_LANE2 bit 8	MAIN[26][28][20]
E10GBASER_PCS_SEEDB3_LANE2 bit 9	MAIN[26][29][20]
E10GBASER_PCS_SEEDB3_LANE2 bit 10	MAIN[26][28][21]
E10GBASER_PCS_SEEDB3_LANE2 bit 11	MAIN[26][29][21]
E10GBASER_PCS_SEEDB3_LANE2 bit 12	MAIN[26][28][22]
E10GBASER_PCS_SEEDB3_LANE2 bit 13	MAIN[26][29][22]
E10GBASER_PCS_SEEDB3_LANE2 bit 14	MAIN[26][28][23]
E10GBASER_PCS_SEEDB3_LANE2 bit 15	MAIN[26][29][23]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 0	MAIN[26][28][24]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 1	MAIN[26][29][24]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 2	MAIN[26][28][25]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 3	MAIN[26][29][25]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 4	MAIN[26][28][26]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 5	MAIN[26][29][26]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 6	MAIN[26][28][27]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 7	MAIN[26][29][27]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 8	MAIN[26][28][28]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 9	MAIN[26][29][28]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 10	MAIN[26][28][29]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 11	MAIN[26][29][29]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 12	MAIN[26][28][30]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 13	MAIN[26][29][30]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 14	MAIN[26][28][31]
E10GBASER_PCS_TEST_CTRL_LANE2 bit 15	MAIN[26][29][31]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 0	MAIN[25][28][16]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 1	MAIN[25][29][16]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 2	MAIN[25][28][17]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 3	MAIN[25][29][17]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 4	MAIN[25][28][18]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 5	MAIN[25][29][18]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 6	MAIN[25][28][19]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 7	MAIN[25][29][19]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 8	MAIN[25][28][20]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 9	MAIN[25][29][20]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 10	MAIN[25][28][21]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 11	MAIN[25][29][21]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 12	MAIN[25][28][22]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 13	MAIN[25][29][22]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 14	MAIN[25][28][23]
E10GBASEX_PCS_TSTCTRL_LANE2 bit 15	MAIN[25][29][23]
LANE_PWR_CTRL_LANE2 bit 0	MAIN[24][28][24]
LANE_PWR_CTRL_LANE2 bit 1	MAIN[24][29][24]
LANE_PWR_CTRL_LANE2 bit 2	MAIN[24][28][25]
LANE_PWR_CTRL_LANE2 bit 3	MAIN[24][29][25]
LANE_PWR_CTRL_LANE2 bit 4	MAIN[24][28][26]
LANE_PWR_CTRL_LANE2 bit 5	MAIN[24][29][26]
LANE_PWR_CTRL_LANE2 bit 6	MAIN[24][28][27]
LANE_PWR_CTRL_LANE2 bit 7	MAIN[24][29][27]
LANE_PWR_CTRL_LANE2 bit 8	MAIN[24][28][28]
LANE_PWR_CTRL_LANE2 bit 9	MAIN[24][29][28]
LANE_PWR_CTRL_LANE2 bit 10	MAIN[24][28][29]
LANE_PWR_CTRL_LANE2 bit 11	MAIN[24][29][29]
LANE_PWR_CTRL_LANE2 bit 12	MAIN[24][28][30]
LANE_PWR_CTRL_LANE2 bit 13	MAIN[24][29][30]
LANE_PWR_CTRL_LANE2 bit 14	MAIN[24][28][31]
LANE_PWR_CTRL_LANE2 bit 15	MAIN[24][29][31]
LNK_TRN_CFG_LANE2 bit 0	MAIN[24][28][48]
LNK_TRN_CFG_LANE2 bit 1	MAIN[24][29][48]
LNK_TRN_CFG_LANE2 bit 2	MAIN[24][28][49]
LNK_TRN_CFG_LANE2 bit 3	MAIN[24][29][49]
LNK_TRN_CFG_LANE2 bit 4	MAIN[24][28][50]
LNK_TRN_CFG_LANE2 bit 5	MAIN[24][29][50]
LNK_TRN_CFG_LANE2 bit 6	MAIN[24][28][51]
LNK_TRN_CFG_LANE2 bit 7	MAIN[24][29][51]
LNK_TRN_CFG_LANE2 bit 8	MAIN[24][28][52]
LNK_TRN_CFG_LANE2 bit 9	MAIN[24][29][52]
LNK_TRN_CFG_LANE2 bit 10	MAIN[24][28][53]
LNK_TRN_CFG_LANE2 bit 11	MAIN[24][29][53]
LNK_TRN_CFG_LANE2 bit 12	MAIN[24][28][54]
LNK_TRN_CFG_LANE2 bit 13	MAIN[24][29][54]
LNK_TRN_CFG_LANE2 bit 14	MAIN[24][28][55]
LNK_TRN_CFG_LANE2 bit 15	MAIN[24][29][55]
LNK_TRN_COEFF_REQ_LANE2 bit 0	MAIN[24][28][56]
LNK_TRN_COEFF_REQ_LANE2 bit 1	MAIN[24][29][56]
LNK_TRN_COEFF_REQ_LANE2 bit 2	MAIN[24][28][57]
LNK_TRN_COEFF_REQ_LANE2 bit 3	MAIN[24][29][57]
LNK_TRN_COEFF_REQ_LANE2 bit 4	MAIN[24][28][58]
LNK_TRN_COEFF_REQ_LANE2 bit 5	MAIN[24][29][58]
LNK_TRN_COEFF_REQ_LANE2 bit 6	MAIN[24][28][59]
LNK_TRN_COEFF_REQ_LANE2 bit 7	MAIN[24][29][59]
LNK_TRN_COEFF_REQ_LANE2 bit 8	MAIN[24][28][60]
LNK_TRN_COEFF_REQ_LANE2 bit 9	MAIN[24][29][60]
LNK_TRN_COEFF_REQ_LANE2 bit 10	MAIN[24][28][61]
LNK_TRN_COEFF_REQ_LANE2 bit 11	MAIN[24][29][61]
LNK_TRN_COEFF_REQ_LANE2 bit 12	MAIN[24][28][62]
LNK_TRN_COEFF_REQ_LANE2 bit 13	MAIN[24][29][62]
LNK_TRN_COEFF_REQ_LANE2 bit 14	MAIN[24][28][63]
LNK_TRN_COEFF_REQ_LANE2 bit 15	MAIN[24][29][63]
PCS_ABILITY_LANE2 bit 0	MAIN[27][28][24]
PCS_ABILITY_LANE2 bit 1	MAIN[27][29][24]
PCS_ABILITY_LANE2 bit 2	MAIN[27][28][25]
PCS_ABILITY_LANE2 bit 3	MAIN[27][29][25]
PCS_ABILITY_LANE2 bit 4	MAIN[27][28][26]
PCS_ABILITY_LANE2 bit 5	MAIN[27][29][26]
PCS_ABILITY_LANE2 bit 6	MAIN[27][28][27]
PCS_ABILITY_LANE2 bit 7	MAIN[27][29][27]
PCS_ABILITY_LANE2 bit 8	MAIN[27][28][28]
PCS_ABILITY_LANE2 bit 9	MAIN[27][29][28]
PCS_ABILITY_LANE2 bit 10	MAIN[27][28][29]
PCS_ABILITY_LANE2 bit 11	MAIN[27][29][29]
PCS_ABILITY_LANE2 bit 12	MAIN[27][28][30]
PCS_ABILITY_LANE2 bit 13	MAIN[27][29][30]
PCS_ABILITY_LANE2 bit 14	MAIN[27][28][31]
PCS_ABILITY_LANE2 bit 15	MAIN[27][29][31]
PCS_CTRL1_LANE2 bit 0	MAIN[25][28][0]
PCS_CTRL1_LANE2 bit 1	MAIN[25][29][0]
PCS_CTRL1_LANE2 bit 2	MAIN[25][28][1]
PCS_CTRL1_LANE2 bit 3	MAIN[25][29][1]
PCS_CTRL1_LANE2 bit 4	MAIN[25][28][2]
PCS_CTRL1_LANE2 bit 5	MAIN[25][29][2]
PCS_CTRL1_LANE2 bit 6	MAIN[25][28][3]
PCS_CTRL1_LANE2 bit 7	MAIN[25][29][3]
PCS_CTRL1_LANE2 bit 8	MAIN[25][28][4]
PCS_CTRL1_LANE2 bit 9	MAIN[25][29][4]
PCS_CTRL1_LANE2 bit 10	MAIN[25][28][5]
PCS_CTRL1_LANE2 bit 11	MAIN[25][29][5]
PCS_CTRL1_LANE2 bit 12	MAIN[25][28][6]
PCS_CTRL1_LANE2 bit 13	MAIN[25][29][6]
PCS_CTRL1_LANE2 bit 14	MAIN[25][28][7]
PCS_CTRL1_LANE2 bit 15	MAIN[25][29][7]
PCS_CTRL2_LANE2 bit 0	MAIN[25][28][8]
PCS_CTRL2_LANE2 bit 1	MAIN[25][29][8]
PCS_CTRL2_LANE2 bit 2	MAIN[25][28][9]
PCS_CTRL2_LANE2 bit 3	MAIN[25][29][9]
PCS_CTRL2_LANE2 bit 4	MAIN[25][28][10]
PCS_CTRL2_LANE2 bit 5	MAIN[25][29][10]
PCS_CTRL2_LANE2 bit 6	MAIN[25][28][11]
PCS_CTRL2_LANE2 bit 7	MAIN[25][29][11]
PCS_CTRL2_LANE2 bit 8	MAIN[25][28][12]
PCS_CTRL2_LANE2 bit 9	MAIN[25][29][12]
PCS_CTRL2_LANE2 bit 10	MAIN[25][28][13]
PCS_CTRL2_LANE2 bit 11	MAIN[25][29][13]
PCS_CTRL2_LANE2 bit 12	MAIN[25][28][14]
PCS_CTRL2_LANE2 bit 13	MAIN[25][29][14]
PCS_CTRL2_LANE2 bit 14	MAIN[25][28][15]
PCS_CTRL2_LANE2 bit 15	MAIN[25][29][15]
PCS_MISC_CFG_0_LANE2 bit 0	MAIN[26][28][32]
PCS_MISC_CFG_0_LANE2 bit 1	MAIN[26][29][32]
PCS_MISC_CFG_0_LANE2 bit 2	MAIN[26][28][33]
PCS_MISC_CFG_0_LANE2 bit 3	MAIN[26][29][33]
PCS_MISC_CFG_0_LANE2 bit 4	MAIN[26][28][34]
PCS_MISC_CFG_0_LANE2 bit 5	MAIN[26][29][34]
PCS_MISC_CFG_0_LANE2 bit 6	MAIN[26][28][35]
PCS_MISC_CFG_0_LANE2 bit 7	MAIN[26][29][35]
PCS_MISC_CFG_0_LANE2 bit 8	MAIN[26][28][36]
PCS_MISC_CFG_0_LANE2 bit 9	MAIN[26][29][36]
PCS_MISC_CFG_0_LANE2 bit 10	MAIN[26][28][37]
PCS_MISC_CFG_0_LANE2 bit 11	MAIN[26][29][37]
PCS_MISC_CFG_0_LANE2 bit 12	MAIN[26][28][38]
PCS_MISC_CFG_0_LANE2 bit 13	MAIN[26][29][38]
PCS_MISC_CFG_0_LANE2 bit 14	MAIN[26][28][39]
PCS_MISC_CFG_0_LANE2 bit 15	MAIN[26][29][39]
PCS_MISC_CFG_1_LANE2 bit 0	MAIN[27][28][8]
PCS_MISC_CFG_1_LANE2 bit 1	MAIN[27][29][8]
PCS_MISC_CFG_1_LANE2 bit 2	MAIN[27][28][9]
PCS_MISC_CFG_1_LANE2 bit 3	MAIN[27][29][9]
PCS_MISC_CFG_1_LANE2 bit 4	MAIN[27][28][10]
PCS_MISC_CFG_1_LANE2 bit 5	MAIN[27][29][10]
PCS_MISC_CFG_1_LANE2 bit 6	MAIN[27][28][11]
PCS_MISC_CFG_1_LANE2 bit 7	MAIN[27][29][11]
PCS_MISC_CFG_1_LANE2 bit 8	MAIN[27][28][12]
PCS_MISC_CFG_1_LANE2 bit 9	MAIN[27][29][12]
PCS_MISC_CFG_1_LANE2 bit 10	MAIN[27][28][13]
PCS_MISC_CFG_1_LANE2 bit 11	MAIN[27][29][13]
PCS_MISC_CFG_1_LANE2 bit 12	MAIN[27][28][14]
PCS_MISC_CFG_1_LANE2 bit 13	MAIN[27][29][14]
PCS_MISC_CFG_1_LANE2 bit 14	MAIN[27][28][15]
PCS_MISC_CFG_1_LANE2 bit 15	MAIN[27][29][15]
PCS_MODE_LANE2 bit 0	MAIN[30][28][24]
PCS_MODE_LANE2 bit 1	MAIN[30][29][24]
PCS_MODE_LANE2 bit 2	MAIN[30][28][25]
PCS_MODE_LANE2 bit 3	MAIN[30][29][25]
PCS_MODE_LANE2 bit 4	MAIN[30][28][26]
PCS_MODE_LANE2 bit 5	MAIN[30][29][26]
PCS_MODE_LANE2 bit 6	MAIN[30][28][27]
PCS_MODE_LANE2 bit 7	MAIN[30][29][27]
PCS_MODE_LANE2 bit 8	MAIN[30][28][28]
PCS_MODE_LANE2 bit 9	MAIN[30][29][28]
PCS_MODE_LANE2 bit 10	MAIN[30][28][29]
PCS_MODE_LANE2 bit 11	MAIN[30][29][29]
PCS_MODE_LANE2 bit 12	MAIN[30][28][30]
PCS_MODE_LANE2 bit 13	MAIN[30][29][30]
PCS_MODE_LANE2 bit 14	MAIN[30][28][31]
PCS_MODE_LANE2 bit 15	MAIN[30][29][31]
PCS_RESET_1_LANE2 bit 0	MAIN[27][28][16]
PCS_RESET_1_LANE2 bit 1	MAIN[27][29][16]
PCS_RESET_1_LANE2 bit 2	MAIN[27][28][17]
PCS_RESET_1_LANE2 bit 3	MAIN[27][29][17]
PCS_RESET_1_LANE2 bit 4	MAIN[27][28][18]
PCS_RESET_1_LANE2 bit 5	MAIN[27][29][18]
PCS_RESET_1_LANE2 bit 6	MAIN[27][28][19]
PCS_RESET_1_LANE2 bit 7	MAIN[27][29][19]
PCS_RESET_1_LANE2 bit 8	MAIN[27][28][20]
PCS_RESET_1_LANE2 bit 9	MAIN[27][29][20]
PCS_RESET_1_LANE2 bit 10	MAIN[27][28][21]
PCS_RESET_1_LANE2 bit 11	MAIN[27][29][21]
PCS_RESET_1_LANE2 bit 12	MAIN[27][28][22]
PCS_RESET_1_LANE2 bit 13	MAIN[27][29][22]
PCS_RESET_1_LANE2 bit 14	MAIN[27][28][23]
PCS_RESET_1_LANE2 bit 15	MAIN[27][29][23]
PCS_RESET_LANE2 bit 0	MAIN[26][28][56]
PCS_RESET_LANE2 bit 1	MAIN[26][29][56]
PCS_RESET_LANE2 bit 2	MAIN[26][28][57]
PCS_RESET_LANE2 bit 3	MAIN[26][29][57]
PCS_RESET_LANE2 bit 4	MAIN[26][28][58]
PCS_RESET_LANE2 bit 5	MAIN[26][29][58]
PCS_RESET_LANE2 bit 6	MAIN[26][28][59]
PCS_RESET_LANE2 bit 7	MAIN[26][29][59]
PCS_RESET_LANE2 bit 8	MAIN[26][28][60]
PCS_RESET_LANE2 bit 9	MAIN[26][29][60]
PCS_RESET_LANE2 bit 10	MAIN[26][28][61]
PCS_RESET_LANE2 bit 11	MAIN[26][29][61]
PCS_RESET_LANE2 bit 12	MAIN[26][28][62]
PCS_RESET_LANE2 bit 13	MAIN[26][29][62]
PCS_RESET_LANE2 bit 14	MAIN[26][28][63]
PCS_RESET_LANE2 bit 15	MAIN[26][29][63]
PCS_TYPE_LANE2 bit 0	MAIN[27][28][32]
PCS_TYPE_LANE2 bit 1	MAIN[27][29][32]
PCS_TYPE_LANE2 bit 2	MAIN[27][28][33]
PCS_TYPE_LANE2 bit 3	MAIN[27][29][33]
PCS_TYPE_LANE2 bit 4	MAIN[27][28][34]
PCS_TYPE_LANE2 bit 5	MAIN[27][29][34]
PCS_TYPE_LANE2 bit 6	MAIN[27][28][35]
PCS_TYPE_LANE2 bit 7	MAIN[27][29][35]
PCS_TYPE_LANE2 bit 8	MAIN[27][28][36]
PCS_TYPE_LANE2 bit 9	MAIN[27][29][36]
PCS_TYPE_LANE2 bit 10	MAIN[27][28][37]
PCS_TYPE_LANE2 bit 11	MAIN[27][29][37]
PCS_TYPE_LANE2 bit 12	MAIN[27][28][38]
PCS_TYPE_LANE2 bit 13	MAIN[27][29][38]
PCS_TYPE_LANE2 bit 14	MAIN[27][28][39]
PCS_TYPE_LANE2 bit 15	MAIN[27][29][39]
PMA_CTRL1_LANE2 bit 0	MAIN[20][28][48]
PMA_CTRL1_LANE2 bit 1	MAIN[20][29][48]
PMA_CTRL1_LANE2 bit 2	MAIN[20][28][49]
PMA_CTRL1_LANE2 bit 3	MAIN[20][29][49]
PMA_CTRL1_LANE2 bit 4	MAIN[20][28][50]
PMA_CTRL1_LANE2 bit 5	MAIN[20][29][50]
PMA_CTRL1_LANE2 bit 6	MAIN[20][28][51]
PMA_CTRL1_LANE2 bit 7	MAIN[20][29][51]
PMA_CTRL1_LANE2 bit 8	MAIN[20][28][52]
PMA_CTRL1_LANE2 bit 9	MAIN[20][29][52]
PMA_CTRL1_LANE2 bit 10	MAIN[20][28][53]
PMA_CTRL1_LANE2 bit 11	MAIN[20][29][53]
PMA_CTRL1_LANE2 bit 12	MAIN[20][28][54]
PMA_CTRL1_LANE2 bit 13	MAIN[20][29][54]
PMA_CTRL1_LANE2 bit 14	MAIN[20][28][55]
PMA_CTRL1_LANE2 bit 15	MAIN[20][29][55]
PMA_CTRL2_LANE2 bit 0	MAIN[20][28][56]
PMA_CTRL2_LANE2 bit 1	MAIN[20][29][56]
PMA_CTRL2_LANE2 bit 2	MAIN[20][28][57]
PMA_CTRL2_LANE2 bit 3	MAIN[20][29][57]
PMA_CTRL2_LANE2 bit 4	MAIN[20][28][58]
PMA_CTRL2_LANE2 bit 5	MAIN[20][29][58]
PMA_CTRL2_LANE2 bit 6	MAIN[20][28][59]
PMA_CTRL2_LANE2 bit 7	MAIN[20][29][59]
PMA_CTRL2_LANE2 bit 8	MAIN[20][28][60]
PMA_CTRL2_LANE2 bit 9	MAIN[20][29][60]
PMA_CTRL2_LANE2 bit 10	MAIN[20][28][61]
PMA_CTRL2_LANE2 bit 11	MAIN[20][29][61]
PMA_CTRL2_LANE2 bit 12	MAIN[20][28][62]
PMA_CTRL2_LANE2 bit 13	MAIN[20][29][62]
PMA_CTRL2_LANE2 bit 14	MAIN[20][28][63]
PMA_CTRL2_LANE2 bit 15	MAIN[20][29][63]
PMA_LPBK_CTRL_LANE2 bit 0	MAIN[24][28][8]
PMA_LPBK_CTRL_LANE2 bit 1	MAIN[24][29][8]
PMA_LPBK_CTRL_LANE2 bit 2	MAIN[24][28][9]
PMA_LPBK_CTRL_LANE2 bit 3	MAIN[24][29][9]
PMA_LPBK_CTRL_LANE2 bit 4	MAIN[24][28][10]
PMA_LPBK_CTRL_LANE2 bit 5	MAIN[24][29][10]
PMA_LPBK_CTRL_LANE2 bit 6	MAIN[24][28][11]
PMA_LPBK_CTRL_LANE2 bit 7	MAIN[24][29][11]
PMA_LPBK_CTRL_LANE2 bit 8	MAIN[24][28][12]
PMA_LPBK_CTRL_LANE2 bit 9	MAIN[24][29][12]
PMA_LPBK_CTRL_LANE2 bit 10	MAIN[24][28][13]
PMA_LPBK_CTRL_LANE2 bit 11	MAIN[24][29][13]
PMA_LPBK_CTRL_LANE2 bit 12	MAIN[24][28][14]
PMA_LPBK_CTRL_LANE2 bit 13	MAIN[24][29][14]
PMA_LPBK_CTRL_LANE2 bit 14	MAIN[24][28][15]
PMA_LPBK_CTRL_LANE2 bit 15	MAIN[24][29][15]
PRBS_BER_CFG0_LANE2 bit 0	MAIN[26][28][40]
PRBS_BER_CFG0_LANE2 bit 1	MAIN[26][29][40]
PRBS_BER_CFG0_LANE2 bit 2	MAIN[26][28][41]
PRBS_BER_CFG0_LANE2 bit 3	MAIN[26][29][41]
PRBS_BER_CFG0_LANE2 bit 4	MAIN[26][28][42]
PRBS_BER_CFG0_LANE2 bit 5	MAIN[26][29][42]
PRBS_BER_CFG0_LANE2 bit 6	MAIN[26][28][43]
PRBS_BER_CFG0_LANE2 bit 7	MAIN[26][29][43]
PRBS_BER_CFG0_LANE2 bit 8	MAIN[26][28][44]
PRBS_BER_CFG0_LANE2 bit 9	MAIN[26][29][44]
PRBS_BER_CFG0_LANE2 bit 10	MAIN[26][28][45]
PRBS_BER_CFG0_LANE2 bit 11	MAIN[26][29][45]
PRBS_BER_CFG0_LANE2 bit 12	MAIN[26][28][46]
PRBS_BER_CFG0_LANE2 bit 13	MAIN[26][29][46]
PRBS_BER_CFG0_LANE2 bit 14	MAIN[26][28][47]
PRBS_BER_CFG0_LANE2 bit 15	MAIN[26][29][47]
PRBS_BER_CFG1_LANE2 bit 0	MAIN[26][28][48]
PRBS_BER_CFG1_LANE2 bit 1	MAIN[26][29][48]
PRBS_BER_CFG1_LANE2 bit 2	MAIN[26][28][49]
PRBS_BER_CFG1_LANE2 bit 3	MAIN[26][29][49]
PRBS_BER_CFG1_LANE2 bit 4	MAIN[26][28][50]
PRBS_BER_CFG1_LANE2 bit 5	MAIN[26][29][50]
PRBS_BER_CFG1_LANE2 bit 6	MAIN[26][28][51]
PRBS_BER_CFG1_LANE2 bit 7	MAIN[26][29][51]
PRBS_BER_CFG1_LANE2 bit 8	MAIN[26][28][52]
PRBS_BER_CFG1_LANE2 bit 9	MAIN[26][29][52]
PRBS_BER_CFG1_LANE2 bit 10	MAIN[26][28][53]
PRBS_BER_CFG1_LANE2 bit 11	MAIN[26][29][53]
PRBS_BER_CFG1_LANE2 bit 12	MAIN[26][28][54]
PRBS_BER_CFG1_LANE2 bit 13	MAIN[26][29][54]
PRBS_BER_CFG1_LANE2 bit 14	MAIN[26][28][55]
PRBS_BER_CFG1_LANE2 bit 15	MAIN[26][29][55]
PRBS_CFG_LANE2 bit 0	MAIN[27][28][0]
PRBS_CFG_LANE2 bit 1	MAIN[27][29][0]
PRBS_CFG_LANE2 bit 2	MAIN[27][28][1]
PRBS_CFG_LANE2 bit 3	MAIN[27][29][1]
PRBS_CFG_LANE2 bit 4	MAIN[27][28][2]
PRBS_CFG_LANE2 bit 5	MAIN[27][29][2]
PRBS_CFG_LANE2 bit 6	MAIN[27][28][3]
PRBS_CFG_LANE2 bit 7	MAIN[27][29][3]
PRBS_CFG_LANE2 bit 8	MAIN[27][28][4]
PRBS_CFG_LANE2 bit 9	MAIN[27][29][4]
PRBS_CFG_LANE2 bit 10	MAIN[27][28][5]
PRBS_CFG_LANE2 bit 11	MAIN[27][29][5]
PRBS_CFG_LANE2 bit 12	MAIN[27][28][6]
PRBS_CFG_LANE2 bit 13	MAIN[27][29][6]
PRBS_CFG_LANE2 bit 14	MAIN[27][28][7]
PRBS_CFG_LANE2 bit 15	MAIN[27][29][7]
RX_AEQ_VAL0_LANE2 bit 0	MAIN[22][28][56]
RX_AEQ_VAL0_LANE2 bit 1	MAIN[22][29][56]
RX_AEQ_VAL0_LANE2 bit 2	MAIN[22][28][57]
RX_AEQ_VAL0_LANE2 bit 3	MAIN[22][29][57]
RX_AEQ_VAL0_LANE2 bit 4	MAIN[22][28][58]
RX_AEQ_VAL0_LANE2 bit 5	MAIN[22][29][58]
RX_AEQ_VAL0_LANE2 bit 6	MAIN[22][28][59]
RX_AEQ_VAL0_LANE2 bit 7	MAIN[22][29][59]
RX_AEQ_VAL0_LANE2 bit 8	MAIN[22][28][60]
RX_AEQ_VAL0_LANE2 bit 9	MAIN[22][29][60]
RX_AEQ_VAL0_LANE2 bit 10	MAIN[22][28][61]
RX_AEQ_VAL0_LANE2 bit 11	MAIN[22][29][61]
RX_AEQ_VAL0_LANE2 bit 12	MAIN[22][28][62]
RX_AEQ_VAL0_LANE2 bit 13	MAIN[22][29][62]
RX_AEQ_VAL0_LANE2 bit 14	MAIN[22][28][63]
RX_AEQ_VAL0_LANE2 bit 15	MAIN[22][29][63]
RX_AEQ_VAL1_LANE2 bit 0	MAIN[23][28][0]
RX_AEQ_VAL1_LANE2 bit 1	MAIN[23][29][0]
RX_AEQ_VAL1_LANE2 bit 2	MAIN[23][28][1]
RX_AEQ_VAL1_LANE2 bit 3	MAIN[23][29][1]
RX_AEQ_VAL1_LANE2 bit 4	MAIN[23][28][2]
RX_AEQ_VAL1_LANE2 bit 5	MAIN[23][29][2]
RX_AEQ_VAL1_LANE2 bit 6	MAIN[23][28][3]
RX_AEQ_VAL1_LANE2 bit 7	MAIN[23][29][3]
RX_AEQ_VAL1_LANE2 bit 8	MAIN[23][28][4]
RX_AEQ_VAL1_LANE2 bit 9	MAIN[23][29][4]
RX_AEQ_VAL1_LANE2 bit 10	MAIN[23][28][5]
RX_AEQ_VAL1_LANE2 bit 11	MAIN[23][29][5]
RX_AEQ_VAL1_LANE2 bit 12	MAIN[23][28][6]
RX_AEQ_VAL1_LANE2 bit 13	MAIN[23][29][6]
RX_AEQ_VAL1_LANE2 bit 14	MAIN[23][28][7]
RX_AEQ_VAL1_LANE2 bit 15	MAIN[23][29][7]
RX_AGC_CTRL_LANE2 bit 0	MAIN[22][28][0]
RX_AGC_CTRL_LANE2 bit 1	MAIN[22][29][0]
RX_AGC_CTRL_LANE2 bit 2	MAIN[22][28][1]
RX_AGC_CTRL_LANE2 bit 3	MAIN[22][29][1]
RX_AGC_CTRL_LANE2 bit 4	MAIN[22][28][2]
RX_AGC_CTRL_LANE2 bit 5	MAIN[22][29][2]
RX_AGC_CTRL_LANE2 bit 6	MAIN[22][28][3]
RX_AGC_CTRL_LANE2 bit 7	MAIN[22][29][3]
RX_AGC_CTRL_LANE2 bit 8	MAIN[22][28][4]
RX_AGC_CTRL_LANE2 bit 9	MAIN[22][29][4]
RX_AGC_CTRL_LANE2 bit 10	MAIN[22][28][5]
RX_AGC_CTRL_LANE2 bit 11	MAIN[22][29][5]
RX_AGC_CTRL_LANE2 bit 12	MAIN[22][28][6]
RX_AGC_CTRL_LANE2 bit 13	MAIN[22][29][6]
RX_AGC_CTRL_LANE2 bit 14	MAIN[22][28][7]
RX_AGC_CTRL_LANE2 bit 15	MAIN[22][29][7]
RX_CDR_CTRL0_LANE2 bit 0	MAIN[22][28][16]
RX_CDR_CTRL0_LANE2 bit 1	MAIN[22][29][16]
RX_CDR_CTRL0_LANE2 bit 2	MAIN[22][28][17]
RX_CDR_CTRL0_LANE2 bit 3	MAIN[22][29][17]
RX_CDR_CTRL0_LANE2 bit 4	MAIN[22][28][18]
RX_CDR_CTRL0_LANE2 bit 5	MAIN[22][29][18]
RX_CDR_CTRL0_LANE2 bit 6	MAIN[22][28][19]
RX_CDR_CTRL0_LANE2 bit 7	MAIN[22][29][19]
RX_CDR_CTRL0_LANE2 bit 8	MAIN[22][28][20]
RX_CDR_CTRL0_LANE2 bit 9	MAIN[22][29][20]
RX_CDR_CTRL0_LANE2 bit 10	MAIN[22][28][21]
RX_CDR_CTRL0_LANE2 bit 11	MAIN[22][29][21]
RX_CDR_CTRL0_LANE2 bit 12	MAIN[22][28][22]
RX_CDR_CTRL0_LANE2 bit 13	MAIN[22][29][22]
RX_CDR_CTRL0_LANE2 bit 14	MAIN[22][28][23]
RX_CDR_CTRL0_LANE2 bit 15	MAIN[22][29][23]
RX_CDR_CTRL1_LANE2 bit 0	MAIN[22][28][24]
RX_CDR_CTRL1_LANE2 bit 1	MAIN[22][29][24]
RX_CDR_CTRL1_LANE2 bit 2	MAIN[22][28][25]
RX_CDR_CTRL1_LANE2 bit 3	MAIN[22][29][25]
RX_CDR_CTRL1_LANE2 bit 4	MAIN[22][28][26]
RX_CDR_CTRL1_LANE2 bit 5	MAIN[22][29][26]
RX_CDR_CTRL1_LANE2 bit 6	MAIN[22][28][27]
RX_CDR_CTRL1_LANE2 bit 7	MAIN[22][29][27]
RX_CDR_CTRL1_LANE2 bit 8	MAIN[22][28][28]
RX_CDR_CTRL1_LANE2 bit 9	MAIN[22][29][28]
RX_CDR_CTRL1_LANE2 bit 10	MAIN[22][28][29]
RX_CDR_CTRL1_LANE2 bit 11	MAIN[22][29][29]
RX_CDR_CTRL1_LANE2 bit 12	MAIN[22][28][30]
RX_CDR_CTRL1_LANE2 bit 13	MAIN[22][29][30]
RX_CDR_CTRL1_LANE2 bit 14	MAIN[22][28][31]
RX_CDR_CTRL1_LANE2 bit 15	MAIN[22][29][31]
RX_CDR_CTRL2_LANE2 bit 0	MAIN[22][28][32]
RX_CDR_CTRL2_LANE2 bit 1	MAIN[22][29][32]
RX_CDR_CTRL2_LANE2 bit 2	MAIN[22][28][33]
RX_CDR_CTRL2_LANE2 bit 3	MAIN[22][29][33]
RX_CDR_CTRL2_LANE2 bit 4	MAIN[22][28][34]
RX_CDR_CTRL2_LANE2 bit 5	MAIN[22][29][34]
RX_CDR_CTRL2_LANE2 bit 6	MAIN[22][28][35]
RX_CDR_CTRL2_LANE2 bit 7	MAIN[22][29][35]
RX_CDR_CTRL2_LANE2 bit 8	MAIN[22][28][36]
RX_CDR_CTRL2_LANE2 bit 9	MAIN[22][29][36]
RX_CDR_CTRL2_LANE2 bit 10	MAIN[22][28][37]
RX_CDR_CTRL2_LANE2 bit 11	MAIN[22][29][37]
RX_CDR_CTRL2_LANE2 bit 12	MAIN[22][28][38]
RX_CDR_CTRL2_LANE2 bit 13	MAIN[22][29][38]
RX_CDR_CTRL2_LANE2 bit 14	MAIN[22][28][39]
RX_CDR_CTRL2_LANE2 bit 15	MAIN[22][29][39]
RX_CFG0_LANE2 bit 0	MAIN[21][28][40]
RX_CFG0_LANE2 bit 1	MAIN[21][29][40]
RX_CFG0_LANE2 bit 2	MAIN[21][28][41]
RX_CFG0_LANE2 bit 3	MAIN[21][29][41]
RX_CFG0_LANE2 bit 4	MAIN[21][28][42]
RX_CFG0_LANE2 bit 5	MAIN[21][29][42]
RX_CFG0_LANE2 bit 6	MAIN[21][28][43]
RX_CFG0_LANE2 bit 7	MAIN[21][29][43]
RX_CFG0_LANE2 bit 8	MAIN[21][28][44]
RX_CFG0_LANE2 bit 9	MAIN[21][29][44]
RX_CFG0_LANE2 bit 10	MAIN[21][28][45]
RX_CFG0_LANE2 bit 11	MAIN[21][29][45]
RX_CFG0_LANE2 bit 12	MAIN[21][28][46]
RX_CFG0_LANE2 bit 13	MAIN[21][29][46]
RX_CFG0_LANE2 bit 14	MAIN[21][28][47]
RX_CFG0_LANE2 bit 15	MAIN[21][29][47]
RX_CFG1_LANE2 bit 0	MAIN[21][28][48]
RX_CFG1_LANE2 bit 1	MAIN[21][29][48]
RX_CFG1_LANE2 bit 2	MAIN[21][28][49]
RX_CFG1_LANE2 bit 3	MAIN[21][29][49]
RX_CFG1_LANE2 bit 4	MAIN[21][28][50]
RX_CFG1_LANE2 bit 5	MAIN[21][29][50]
RX_CFG1_LANE2 bit 6	MAIN[21][28][51]
RX_CFG1_LANE2 bit 7	MAIN[21][29][51]
RX_CFG1_LANE2 bit 8	MAIN[21][28][52]
RX_CFG1_LANE2 bit 9	MAIN[21][29][52]
RX_CFG1_LANE2 bit 10	MAIN[21][28][53]
RX_CFG1_LANE2 bit 11	MAIN[21][29][53]
RX_CFG1_LANE2 bit 12	MAIN[21][28][54]
RX_CFG1_LANE2 bit 13	MAIN[21][29][54]
RX_CFG1_LANE2 bit 14	MAIN[21][28][55]
RX_CFG1_LANE2 bit 15	MAIN[21][29][55]
RX_CFG2_LANE2 bit 0	MAIN[21][28][56]
RX_CFG2_LANE2 bit 1	MAIN[21][29][56]
RX_CFG2_LANE2 bit 2	MAIN[21][28][57]
RX_CFG2_LANE2 bit 3	MAIN[21][29][57]
RX_CFG2_LANE2 bit 4	MAIN[21][28][58]
RX_CFG2_LANE2 bit 5	MAIN[21][29][58]
RX_CFG2_LANE2 bit 6	MAIN[21][28][59]
RX_CFG2_LANE2 bit 7	MAIN[21][29][59]
RX_CFG2_LANE2 bit 8	MAIN[21][28][60]
RX_CFG2_LANE2 bit 9	MAIN[21][29][60]
RX_CFG2_LANE2 bit 10	MAIN[21][28][61]
RX_CFG2_LANE2 bit 11	MAIN[21][29][61]
RX_CFG2_LANE2 bit 12	MAIN[21][28][62]
RX_CFG2_LANE2 bit 13	MAIN[21][29][62]
RX_CFG2_LANE2 bit 14	MAIN[21][28][63]
RX_CFG2_LANE2 bit 15	MAIN[21][29][63]
RX_CTLE_CTRL_LANE2 bit 0	MAIN[23][28][8]
RX_CTLE_CTRL_LANE2 bit 1	MAIN[23][29][8]
RX_CTLE_CTRL_LANE2 bit 2	MAIN[23][28][9]
RX_CTLE_CTRL_LANE2 bit 3	MAIN[23][29][9]
RX_CTLE_CTRL_LANE2 bit 4	MAIN[23][28][10]
RX_CTLE_CTRL_LANE2 bit 5	MAIN[23][29][10]
RX_CTLE_CTRL_LANE2 bit 6	MAIN[23][28][11]
RX_CTLE_CTRL_LANE2 bit 7	MAIN[23][29][11]
RX_CTLE_CTRL_LANE2 bit 8	MAIN[23][28][12]
RX_CTLE_CTRL_LANE2 bit 9	MAIN[23][29][12]
RX_CTLE_CTRL_LANE2 bit 10	MAIN[23][28][13]
RX_CTLE_CTRL_LANE2 bit 11	MAIN[23][29][13]
RX_CTLE_CTRL_LANE2 bit 12	MAIN[23][28][14]
RX_CTLE_CTRL_LANE2 bit 13	MAIN[23][29][14]
RX_CTLE_CTRL_LANE2 bit 14	MAIN[23][28][15]
RX_CTLE_CTRL_LANE2 bit 15	MAIN[23][29][15]
RX_CTRL_OVRD_LANE2 bit 0	MAIN[24][28][40]
RX_CTRL_OVRD_LANE2 bit 1	MAIN[24][29][40]
RX_CTRL_OVRD_LANE2 bit 2	MAIN[24][28][41]
RX_CTRL_OVRD_LANE2 bit 3	MAIN[24][29][41]
RX_CTRL_OVRD_LANE2 bit 4	MAIN[24][28][42]
RX_CTRL_OVRD_LANE2 bit 5	MAIN[24][29][42]
RX_CTRL_OVRD_LANE2 bit 6	MAIN[24][28][43]
RX_CTRL_OVRD_LANE2 bit 7	MAIN[24][29][43]
RX_CTRL_OVRD_LANE2 bit 8	MAIN[24][28][44]
RX_CTRL_OVRD_LANE2 bit 9	MAIN[24][29][44]
RX_CTRL_OVRD_LANE2 bit 10	MAIN[24][28][45]
RX_CTRL_OVRD_LANE2 bit 11	MAIN[24][29][45]
RX_CTRL_OVRD_LANE2 bit 12	MAIN[24][28][46]
RX_CTRL_OVRD_LANE2 bit 13	MAIN[24][29][46]
RX_CTRL_OVRD_LANE2 bit 14	MAIN[24][28][47]
RX_CTRL_OVRD_LANE2 bit 15	MAIN[24][29][47]
RX_LOOP_CTRL_LANE2 bit 0	MAIN[22][28][8]
RX_LOOP_CTRL_LANE2 bit 1	MAIN[22][29][8]
RX_LOOP_CTRL_LANE2 bit 2	MAIN[22][28][9]
RX_LOOP_CTRL_LANE2 bit 3	MAIN[22][29][9]
RX_LOOP_CTRL_LANE2 bit 4	MAIN[22][28][10]
RX_LOOP_CTRL_LANE2 bit 5	MAIN[22][29][10]
RX_LOOP_CTRL_LANE2 bit 6	MAIN[22][28][11]
RX_LOOP_CTRL_LANE2 bit 7	MAIN[22][29][11]
RX_LOOP_CTRL_LANE2 bit 8	MAIN[22][28][12]
RX_LOOP_CTRL_LANE2 bit 9	MAIN[22][29][12]
RX_LOOP_CTRL_LANE2 bit 10	MAIN[22][28][13]
RX_LOOP_CTRL_LANE2 bit 11	MAIN[22][29][13]
RX_LOOP_CTRL_LANE2 bit 12	MAIN[22][28][14]
RX_LOOP_CTRL_LANE2 bit 13	MAIN[22][29][14]
RX_LOOP_CTRL_LANE2 bit 14	MAIN[22][28][15]
RX_LOOP_CTRL_LANE2 bit 15	MAIN[22][29][15]
RX_MVAL0_LANE2 bit 0	MAIN[22][28][40]
RX_MVAL0_LANE2 bit 1	MAIN[22][29][40]
RX_MVAL0_LANE2 bit 2	MAIN[22][28][41]
RX_MVAL0_LANE2 bit 3	MAIN[22][29][41]
RX_MVAL0_LANE2 bit 4	MAIN[22][28][42]
RX_MVAL0_LANE2 bit 5	MAIN[22][29][42]
RX_MVAL0_LANE2 bit 6	MAIN[22][28][43]
RX_MVAL0_LANE2 bit 7	MAIN[22][29][43]
RX_MVAL0_LANE2 bit 8	MAIN[22][28][44]
RX_MVAL0_LANE2 bit 9	MAIN[22][29][44]
RX_MVAL0_LANE2 bit 10	MAIN[22][28][45]
RX_MVAL0_LANE2 bit 11	MAIN[22][29][45]
RX_MVAL0_LANE2 bit 12	MAIN[22][28][46]
RX_MVAL0_LANE2 bit 13	MAIN[22][29][46]
RX_MVAL0_LANE2 bit 14	MAIN[22][28][47]
RX_MVAL0_LANE2 bit 15	MAIN[22][29][47]
RX_MVAL1_LANE2 bit 0	MAIN[22][28][48]
RX_MVAL1_LANE2 bit 1	MAIN[22][29][48]
RX_MVAL1_LANE2 bit 2	MAIN[22][28][49]
RX_MVAL1_LANE2 bit 3	MAIN[22][29][49]
RX_MVAL1_LANE2 bit 4	MAIN[22][28][50]
RX_MVAL1_LANE2 bit 5	MAIN[22][29][50]
RX_MVAL1_LANE2 bit 6	MAIN[22][28][51]
RX_MVAL1_LANE2 bit 7	MAIN[22][29][51]
RX_MVAL1_LANE2 bit 8	MAIN[22][28][52]
RX_MVAL1_LANE2 bit 9	MAIN[22][29][52]
RX_MVAL1_LANE2 bit 10	MAIN[22][28][53]
RX_MVAL1_LANE2 bit 11	MAIN[22][29][53]
RX_MVAL1_LANE2 bit 12	MAIN[22][28][54]
RX_MVAL1_LANE2 bit 13	MAIN[22][29][54]
RX_MVAL1_LANE2 bit 14	MAIN[22][28][55]
RX_MVAL1_LANE2 bit 15	MAIN[22][29][55]
TERM_CTRL_LANE2 bit 0	MAIN[24][28][0]
TERM_CTRL_LANE2 bit 1	MAIN[24][29][0]
TERM_CTRL_LANE2 bit 2	MAIN[24][28][1]
TERM_CTRL_LANE2 bit 3	MAIN[24][29][1]
TERM_CTRL_LANE2 bit 4	MAIN[24][28][2]
TERM_CTRL_LANE2 bit 5	MAIN[24][29][2]
TERM_CTRL_LANE2 bit 6	MAIN[24][28][3]
TERM_CTRL_LANE2 bit 7	MAIN[24][29][3]
TERM_CTRL_LANE2 bit 8	MAIN[24][28][4]
TERM_CTRL_LANE2 bit 9	MAIN[24][29][4]
TERM_CTRL_LANE2 bit 10	MAIN[24][28][5]
TERM_CTRL_LANE2 bit 11	MAIN[24][29][5]
TERM_CTRL_LANE2 bit 12	MAIN[24][28][6]
TERM_CTRL_LANE2 bit 13	MAIN[24][29][6]
TERM_CTRL_LANE2 bit 14	MAIN[24][28][7]
TERM_CTRL_LANE2 bit 15	MAIN[24][29][7]
TX_CFG0_LANE2 bit 0	MAIN[23][28][16]
TX_CFG0_LANE2 bit 1	MAIN[23][29][16]
TX_CFG0_LANE2 bit 2	MAIN[23][28][17]
TX_CFG0_LANE2 bit 3	MAIN[23][29][17]
TX_CFG0_LANE2 bit 4	MAIN[23][28][18]
TX_CFG0_LANE2 bit 5	MAIN[23][29][18]
TX_CFG0_LANE2 bit 6	MAIN[23][28][19]
TX_CFG0_LANE2 bit 7	MAIN[23][29][19]
TX_CFG0_LANE2 bit 8	MAIN[23][28][20]
TX_CFG0_LANE2 bit 9	MAIN[23][29][20]
TX_CFG0_LANE2 bit 10	MAIN[23][28][21]
TX_CFG0_LANE2 bit 11	MAIN[23][29][21]
TX_CFG0_LANE2 bit 12	MAIN[23][28][22]
TX_CFG0_LANE2 bit 13	MAIN[23][29][22]
TX_CFG0_LANE2 bit 14	MAIN[23][28][23]
TX_CFG0_LANE2 bit 15	MAIN[23][29][23]
TX_CFG1_LANE2 bit 0	MAIN[23][28][24]
TX_CFG1_LANE2 bit 1	MAIN[23][29][24]
TX_CFG1_LANE2 bit 2	MAIN[23][28][25]
TX_CFG1_LANE2 bit 3	MAIN[23][29][25]
TX_CFG1_LANE2 bit 4	MAIN[23][28][26]
TX_CFG1_LANE2 bit 5	MAIN[23][29][26]
TX_CFG1_LANE2 bit 6	MAIN[23][28][27]
TX_CFG1_LANE2 bit 7	MAIN[23][29][27]
TX_CFG1_LANE2 bit 8	MAIN[23][28][28]
TX_CFG1_LANE2 bit 9	MAIN[23][29][28]
TX_CFG1_LANE2 bit 10	MAIN[23][28][29]
TX_CFG1_LANE2 bit 11	MAIN[23][29][29]
TX_CFG1_LANE2 bit 12	MAIN[23][28][30]
TX_CFG1_LANE2 bit 13	MAIN[23][29][30]
TX_CFG1_LANE2 bit 14	MAIN[23][28][31]
TX_CFG1_LANE2 bit 15	MAIN[23][29][31]
TX_CFG2_LANE2 bit 0	MAIN[23][28][32]
TX_CFG2_LANE2 bit 1	MAIN[23][29][32]
TX_CFG2_LANE2 bit 2	MAIN[23][28][33]
TX_CFG2_LANE2 bit 3	MAIN[23][29][33]
TX_CFG2_LANE2 bit 4	MAIN[23][28][34]
TX_CFG2_LANE2 bit 5	MAIN[23][29][34]
TX_CFG2_LANE2 bit 6	MAIN[23][28][35]
TX_CFG2_LANE2 bit 7	MAIN[23][29][35]
TX_CFG2_LANE2 bit 8	MAIN[23][28][36]
TX_CFG2_LANE2 bit 9	MAIN[23][29][36]
TX_CFG2_LANE2 bit 10	MAIN[23][28][37]
TX_CFG2_LANE2 bit 11	MAIN[23][29][37]
TX_CFG2_LANE2 bit 12	MAIN[23][28][38]
TX_CFG2_LANE2 bit 13	MAIN[23][29][38]
TX_CFG2_LANE2 bit 14	MAIN[23][28][39]
TX_CFG2_LANE2 bit 15	MAIN[23][29][39]
TX_CLK_SEL0_LANE2 bit 0	MAIN[23][28][48]
TX_CLK_SEL0_LANE2 bit 1	MAIN[23][29][48]
TX_CLK_SEL0_LANE2 bit 2	MAIN[23][28][49]
TX_CLK_SEL0_LANE2 bit 3	MAIN[23][29][49]
TX_CLK_SEL0_LANE2 bit 4	MAIN[23][28][50]
TX_CLK_SEL0_LANE2 bit 5	MAIN[23][29][50]
TX_CLK_SEL0_LANE2 bit 6	MAIN[23][28][51]
TX_CLK_SEL0_LANE2 bit 7	MAIN[23][29][51]
TX_CLK_SEL0_LANE2 bit 8	MAIN[23][28][52]
TX_CLK_SEL0_LANE2 bit 9	MAIN[23][29][52]
TX_CLK_SEL0_LANE2 bit 10	MAIN[23][28][53]
TX_CLK_SEL0_LANE2 bit 11	MAIN[23][29][53]
TX_CLK_SEL0_LANE2 bit 12	MAIN[23][28][54]
TX_CLK_SEL0_LANE2 bit 13	MAIN[23][29][54]
TX_CLK_SEL0_LANE2 bit 14	MAIN[23][28][55]
TX_CLK_SEL0_LANE2 bit 15	MAIN[23][29][55]
TX_CLK_SEL1_LANE2 bit 0	MAIN[23][28][56]
TX_CLK_SEL1_LANE2 bit 1	MAIN[23][29][56]
TX_CLK_SEL1_LANE2 bit 2	MAIN[23][28][57]
TX_CLK_SEL1_LANE2 bit 3	MAIN[23][29][57]
TX_CLK_SEL1_LANE2 bit 4	MAIN[23][28][58]
TX_CLK_SEL1_LANE2 bit 5	MAIN[23][29][58]
TX_CLK_SEL1_LANE2 bit 6	MAIN[23][28][59]
TX_CLK_SEL1_LANE2 bit 7	MAIN[23][29][59]
TX_CLK_SEL1_LANE2 bit 8	MAIN[23][28][60]
TX_CLK_SEL1_LANE2 bit 9	MAIN[23][29][60]
TX_CLK_SEL1_LANE2 bit 10	MAIN[23][28][61]
TX_CLK_SEL1_LANE2 bit 11	MAIN[23][29][61]
TX_CLK_SEL1_LANE2 bit 12	MAIN[23][28][62]
TX_CLK_SEL1_LANE2 bit 13	MAIN[23][29][62]
TX_CLK_SEL1_LANE2 bit 14	MAIN[23][28][63]
TX_CLK_SEL1_LANE2 bit 15	MAIN[23][29][63]
TX_DISABLE_LANE2 bit 0	MAIN[21][28][0]
TX_DISABLE_LANE2 bit 1	MAIN[21][29][0]
TX_DISABLE_LANE2 bit 2	MAIN[21][28][1]
TX_DISABLE_LANE2 bit 3	MAIN[21][29][1]
TX_DISABLE_LANE2 bit 4	MAIN[21][28][2]
TX_DISABLE_LANE2 bit 5	MAIN[21][29][2]
TX_DISABLE_LANE2 bit 6	MAIN[21][28][3]
TX_DISABLE_LANE2 bit 7	MAIN[21][29][3]
TX_DISABLE_LANE2 bit 8	MAIN[21][28][4]
TX_DISABLE_LANE2 bit 9	MAIN[21][29][4]
TX_DISABLE_LANE2 bit 10	MAIN[21][28][5]
TX_DISABLE_LANE2 bit 11	MAIN[21][29][5]
TX_DISABLE_LANE2 bit 12	MAIN[21][28][6]
TX_DISABLE_LANE2 bit 13	MAIN[21][29][6]
TX_DISABLE_LANE2 bit 14	MAIN[21][28][7]
TX_DISABLE_LANE2 bit 15	MAIN[21][29][7]
TX_PREEMPH_LANE2 bit 0	MAIN[23][28][40]
TX_PREEMPH_LANE2 bit 1	MAIN[23][29][40]
TX_PREEMPH_LANE2 bit 2	MAIN[23][28][41]
TX_PREEMPH_LANE2 bit 3	MAIN[23][29][41]
TX_PREEMPH_LANE2 bit 4	MAIN[23][28][42]
TX_PREEMPH_LANE2 bit 5	MAIN[23][29][42]
TX_PREEMPH_LANE2 bit 6	MAIN[23][28][43]
TX_PREEMPH_LANE2 bit 7	MAIN[23][29][43]
TX_PREEMPH_LANE2 bit 8	MAIN[23][28][44]
TX_PREEMPH_LANE2 bit 9	MAIN[23][29][44]
TX_PREEMPH_LANE2 bit 10	MAIN[23][28][45]
TX_PREEMPH_LANE2 bit 11	MAIN[23][29][45]
TX_PREEMPH_LANE2 bit 12	MAIN[23][28][46]
TX_PREEMPH_LANE2 bit 13	MAIN[23][29][46]
TX_PREEMPH_LANE2 bit 14	MAIN[23][28][47]
TX_PREEMPH_LANE2 bit 15	MAIN[23][29][47]
TX_PWR_RATE_OVRD_LANE2 bit 0	MAIN[24][28][32]
TX_PWR_RATE_OVRD_LANE2 bit 1	MAIN[24][29][32]
TX_PWR_RATE_OVRD_LANE2 bit 2	MAIN[24][28][33]
TX_PWR_RATE_OVRD_LANE2 bit 3	MAIN[24][29][33]
TX_PWR_RATE_OVRD_LANE2 bit 4	MAIN[24][28][34]
TX_PWR_RATE_OVRD_LANE2 bit 5	MAIN[24][29][34]
TX_PWR_RATE_OVRD_LANE2 bit 6	MAIN[24][28][35]
TX_PWR_RATE_OVRD_LANE2 bit 7	MAIN[24][29][35]
TX_PWR_RATE_OVRD_LANE2 bit 8	MAIN[24][28][36]
TX_PWR_RATE_OVRD_LANE2 bit 9	MAIN[24][29][36]
TX_PWR_RATE_OVRD_LANE2 bit 10	MAIN[24][28][37]
TX_PWR_RATE_OVRD_LANE2 bit 11	MAIN[24][29][37]
TX_PWR_RATE_OVRD_LANE2 bit 12	MAIN[24][28][38]
TX_PWR_RATE_OVRD_LANE2 bit 13	MAIN[24][29][38]
TX_PWR_RATE_OVRD_LANE2 bit 14	MAIN[24][28][39]
TX_PWR_RATE_OVRD_LANE2 bit 15	MAIN[24][29][39]
RX_FABRIC_WIDTH3	[enum: GTH_QUAD_FABRIC_WIDTH]
TX_FABRIC_WIDTH3	[enum: GTH_QUAD_FABRIC_WIDTH]
GTH_CFG_PWRUP_LANE3 bit 0	MAIN[29][29][48]
TST_PCS_LOOPBACK_LANE3 bit 0	MAIN[29][28][48]
BUFFER_CONFIG_LANE3 bit 0	MAIN[29][28][40]
BUFFER_CONFIG_LANE3 bit 1	MAIN[29][29][40]
BUFFER_CONFIG_LANE3 bit 2	MAIN[29][28][41]
BUFFER_CONFIG_LANE3 bit 3	MAIN[29][29][41]
BUFFER_CONFIG_LANE3 bit 4	MAIN[29][28][42]
BUFFER_CONFIG_LANE3 bit 5	MAIN[29][29][42]
BUFFER_CONFIG_LANE3 bit 6	MAIN[29][28][43]
BUFFER_CONFIG_LANE3 bit 7	MAIN[29][29][43]
BUFFER_CONFIG_LANE3 bit 8	MAIN[29][28][44]
BUFFER_CONFIG_LANE3 bit 9	MAIN[29][29][44]
BUFFER_CONFIG_LANE3 bit 10	MAIN[29][28][45]
BUFFER_CONFIG_LANE3 bit 11	MAIN[29][29][45]
BUFFER_CONFIG_LANE3 bit 12	MAIN[29][28][46]
BUFFER_CONFIG_LANE3 bit 13	MAIN[29][29][46]
BUFFER_CONFIG_LANE3 bit 14	MAIN[29][28][47]
BUFFER_CONFIG_LANE3 bit 15	MAIN[29][29][47]
DFE_TRAIN_CTRL_LANE3 bit 0	MAIN[32][28][40]
DFE_TRAIN_CTRL_LANE3 bit 1	MAIN[32][29][40]
DFE_TRAIN_CTRL_LANE3 bit 2	MAIN[32][28][41]
DFE_TRAIN_CTRL_LANE3 bit 3	MAIN[32][29][41]
DFE_TRAIN_CTRL_LANE3 bit 4	MAIN[32][28][42]
DFE_TRAIN_CTRL_LANE3 bit 5	MAIN[32][29][42]
DFE_TRAIN_CTRL_LANE3 bit 6	MAIN[32][28][43]
DFE_TRAIN_CTRL_LANE3 bit 7	MAIN[32][29][43]
DFE_TRAIN_CTRL_LANE3 bit 8	MAIN[32][28][44]
DFE_TRAIN_CTRL_LANE3 bit 9	MAIN[32][29][44]
DFE_TRAIN_CTRL_LANE3 bit 10	MAIN[32][28][45]
DFE_TRAIN_CTRL_LANE3 bit 11	MAIN[32][29][45]
DFE_TRAIN_CTRL_LANE3 bit 12	MAIN[32][28][46]
DFE_TRAIN_CTRL_LANE3 bit 13	MAIN[32][29][46]
DFE_TRAIN_CTRL_LANE3 bit 14	MAIN[32][28][47]
DFE_TRAIN_CTRL_LANE3 bit 15	MAIN[32][29][47]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 0	MAIN[28][28][56]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 1	MAIN[28][29][56]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 2	MAIN[28][28][57]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 3	MAIN[28][29][57]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 4	MAIN[28][28][58]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 5	MAIN[28][29][58]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 6	MAIN[28][28][59]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 7	MAIN[28][29][59]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 8	MAIN[28][28][60]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 9	MAIN[28][29][60]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 10	MAIN[28][28][61]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 11	MAIN[28][29][61]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 12	MAIN[28][28][62]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 13	MAIN[28][29][62]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 14	MAIN[28][28][63]
E10GBASEKR_LD_COEFF_UPD_LANE3 bit 15	MAIN[28][29][63]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 0	MAIN[28][28][48]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 1	MAIN[28][29][48]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 2	MAIN[28][28][49]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 3	MAIN[28][29][49]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 4	MAIN[28][28][50]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 5	MAIN[28][29][50]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 6	MAIN[28][28][51]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 7	MAIN[28][29][51]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 8	MAIN[28][28][52]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 9	MAIN[28][29][52]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 10	MAIN[28][28][53]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 11	MAIN[28][29][53]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 12	MAIN[28][28][54]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 13	MAIN[28][29][54]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 14	MAIN[28][28][55]
E10GBASEKR_LP_COEFF_UPD_LANE3 bit 15	MAIN[28][29][55]
E10GBASEKR_PMA_CTRL_LANE3 bit 0	MAIN[28][28][40]
E10GBASEKR_PMA_CTRL_LANE3 bit 1	MAIN[28][29][40]
E10GBASEKR_PMA_CTRL_LANE3 bit 2	MAIN[28][28][41]
E10GBASEKR_PMA_CTRL_LANE3 bit 3	MAIN[28][29][41]
E10GBASEKR_PMA_CTRL_LANE3 bit 4	MAIN[28][28][42]
E10GBASEKR_PMA_CTRL_LANE3 bit 5	MAIN[28][29][42]
E10GBASEKR_PMA_CTRL_LANE3 bit 6	MAIN[28][28][43]
E10GBASEKR_PMA_CTRL_LANE3 bit 7	MAIN[28][29][43]
E10GBASEKR_PMA_CTRL_LANE3 bit 8	MAIN[28][28][44]
E10GBASEKR_PMA_CTRL_LANE3 bit 9	MAIN[28][29][44]
E10GBASEKR_PMA_CTRL_LANE3 bit 10	MAIN[28][28][45]
E10GBASEKR_PMA_CTRL_LANE3 bit 11	MAIN[28][29][45]
E10GBASEKR_PMA_CTRL_LANE3 bit 12	MAIN[28][28][46]
E10GBASEKR_PMA_CTRL_LANE3 bit 13	MAIN[28][29][46]
E10GBASEKR_PMA_CTRL_LANE3 bit 14	MAIN[28][28][47]
E10GBASEKR_PMA_CTRL_LANE3 bit 15	MAIN[28][29][47]
E10GBASEKX_CTRL_LANE3 bit 0	MAIN[29][28][0]
E10GBASEKX_CTRL_LANE3 bit 1	MAIN[29][29][0]
E10GBASEKX_CTRL_LANE3 bit 2	MAIN[29][28][1]
E10GBASEKX_CTRL_LANE3 bit 3	MAIN[29][29][1]
E10GBASEKX_CTRL_LANE3 bit 4	MAIN[29][28][2]
E10GBASEKX_CTRL_LANE3 bit 5	MAIN[29][29][2]
E10GBASEKX_CTRL_LANE3 bit 6	MAIN[29][28][3]
E10GBASEKX_CTRL_LANE3 bit 7	MAIN[29][29][3]
E10GBASEKX_CTRL_LANE3 bit 8	MAIN[29][28][4]
E10GBASEKX_CTRL_LANE3 bit 9	MAIN[29][29][4]
E10GBASEKX_CTRL_LANE3 bit 10	MAIN[29][28][5]
E10GBASEKX_CTRL_LANE3 bit 11	MAIN[29][29][5]
E10GBASEKX_CTRL_LANE3 bit 12	MAIN[29][28][6]
E10GBASEKX_CTRL_LANE3 bit 13	MAIN[29][29][6]
E10GBASEKX_CTRL_LANE3 bit 14	MAIN[29][28][7]
E10GBASEKX_CTRL_LANE3 bit 15	MAIN[29][29][7]
E10GBASER_PCS_CFG_LANE3 bit 0	MAIN[36][28][0]
E10GBASER_PCS_CFG_LANE3 bit 1	MAIN[36][29][0]
E10GBASER_PCS_CFG_LANE3 bit 2	MAIN[36][28][1]
E10GBASER_PCS_CFG_LANE3 bit 3	MAIN[36][29][1]
E10GBASER_PCS_CFG_LANE3 bit 4	MAIN[36][28][2]
E10GBASER_PCS_CFG_LANE3 bit 5	MAIN[36][29][2]
E10GBASER_PCS_CFG_LANE3 bit 6	MAIN[36][28][3]
E10GBASER_PCS_CFG_LANE3 bit 7	MAIN[36][29][3]
E10GBASER_PCS_CFG_LANE3 bit 8	MAIN[36][28][4]
E10GBASER_PCS_CFG_LANE3 bit 9	MAIN[36][29][4]
E10GBASER_PCS_CFG_LANE3 bit 10	MAIN[36][28][5]
E10GBASER_PCS_CFG_LANE3 bit 11	MAIN[36][29][5]
E10GBASER_PCS_CFG_LANE3 bit 12	MAIN[36][28][6]
E10GBASER_PCS_CFG_LANE3 bit 13	MAIN[36][29][6]
E10GBASER_PCS_CFG_LANE3 bit 14	MAIN[36][28][7]
E10GBASER_PCS_CFG_LANE3 bit 15	MAIN[36][29][7]
E10GBASER_PCS_SEEDA0_LANE3 bit 0	MAIN[33][28][48]
E10GBASER_PCS_SEEDA0_LANE3 bit 1	MAIN[33][29][48]
E10GBASER_PCS_SEEDA0_LANE3 bit 2	MAIN[33][28][49]
E10GBASER_PCS_SEEDA0_LANE3 bit 3	MAIN[33][29][49]
E10GBASER_PCS_SEEDA0_LANE3 bit 4	MAIN[33][28][50]
E10GBASER_PCS_SEEDA0_LANE3 bit 5	MAIN[33][29][50]
E10GBASER_PCS_SEEDA0_LANE3 bit 6	MAIN[33][28][51]
E10GBASER_PCS_SEEDA0_LANE3 bit 7	MAIN[33][29][51]
E10GBASER_PCS_SEEDA0_LANE3 bit 8	MAIN[33][28][52]
E10GBASER_PCS_SEEDA0_LANE3 bit 9	MAIN[33][29][52]
E10GBASER_PCS_SEEDA0_LANE3 bit 10	MAIN[33][28][53]
E10GBASER_PCS_SEEDA0_LANE3 bit 11	MAIN[33][29][53]
E10GBASER_PCS_SEEDA0_LANE3 bit 12	MAIN[33][28][54]
E10GBASER_PCS_SEEDA0_LANE3 bit 13	MAIN[33][29][54]
E10GBASER_PCS_SEEDA0_LANE3 bit 14	MAIN[33][28][55]
E10GBASER_PCS_SEEDA0_LANE3 bit 15	MAIN[33][29][55]
E10GBASER_PCS_SEEDA1_LANE3 bit 0	MAIN[33][28][56]
E10GBASER_PCS_SEEDA1_LANE3 bit 1	MAIN[33][29][56]
E10GBASER_PCS_SEEDA1_LANE3 bit 2	MAIN[33][28][57]
E10GBASER_PCS_SEEDA1_LANE3 bit 3	MAIN[33][29][57]
E10GBASER_PCS_SEEDA1_LANE3 bit 4	MAIN[33][28][58]
E10GBASER_PCS_SEEDA1_LANE3 bit 5	MAIN[33][29][58]
E10GBASER_PCS_SEEDA1_LANE3 bit 6	MAIN[33][28][59]
E10GBASER_PCS_SEEDA1_LANE3 bit 7	MAIN[33][29][59]
E10GBASER_PCS_SEEDA1_LANE3 bit 8	MAIN[33][28][60]
E10GBASER_PCS_SEEDA1_LANE3 bit 9	MAIN[33][29][60]
E10GBASER_PCS_SEEDA1_LANE3 bit 10	MAIN[33][28][61]
E10GBASER_PCS_SEEDA1_LANE3 bit 11	MAIN[33][29][61]
E10GBASER_PCS_SEEDA1_LANE3 bit 12	MAIN[33][28][62]
E10GBASER_PCS_SEEDA1_LANE3 bit 13	MAIN[33][29][62]
E10GBASER_PCS_SEEDA1_LANE3 bit 14	MAIN[33][28][63]
E10GBASER_PCS_SEEDA1_LANE3 bit 15	MAIN[33][29][63]
E10GBASER_PCS_SEEDA2_LANE3 bit 0	MAIN[34][28][0]
E10GBASER_PCS_SEEDA2_LANE3 bit 1	MAIN[34][29][0]
E10GBASER_PCS_SEEDA2_LANE3 bit 2	MAIN[34][28][1]
E10GBASER_PCS_SEEDA2_LANE3 bit 3	MAIN[34][29][1]
E10GBASER_PCS_SEEDA2_LANE3 bit 4	MAIN[34][28][2]
E10GBASER_PCS_SEEDA2_LANE3 bit 5	MAIN[34][29][2]
E10GBASER_PCS_SEEDA2_LANE3 bit 6	MAIN[34][28][3]
E10GBASER_PCS_SEEDA2_LANE3 bit 7	MAIN[34][29][3]
E10GBASER_PCS_SEEDA2_LANE3 bit 8	MAIN[34][28][4]
E10GBASER_PCS_SEEDA2_LANE3 bit 9	MAIN[34][29][4]
E10GBASER_PCS_SEEDA2_LANE3 bit 10	MAIN[34][28][5]
E10GBASER_PCS_SEEDA2_LANE3 bit 11	MAIN[34][29][5]
E10GBASER_PCS_SEEDA2_LANE3 bit 12	MAIN[34][28][6]
E10GBASER_PCS_SEEDA2_LANE3 bit 13	MAIN[34][29][6]
E10GBASER_PCS_SEEDA2_LANE3 bit 14	MAIN[34][28][7]
E10GBASER_PCS_SEEDA2_LANE3 bit 15	MAIN[34][29][7]
E10GBASER_PCS_SEEDA3_LANE3 bit 0	MAIN[34][28][8]
E10GBASER_PCS_SEEDA3_LANE3 bit 1	MAIN[34][29][8]
E10GBASER_PCS_SEEDA3_LANE3 bit 2	MAIN[34][28][9]
E10GBASER_PCS_SEEDA3_LANE3 bit 3	MAIN[34][29][9]
E10GBASER_PCS_SEEDA3_LANE3 bit 4	MAIN[34][28][10]
E10GBASER_PCS_SEEDA3_LANE3 bit 5	MAIN[34][29][10]
E10GBASER_PCS_SEEDA3_LANE3 bit 6	MAIN[34][28][11]
E10GBASER_PCS_SEEDA3_LANE3 bit 7	MAIN[34][29][11]
E10GBASER_PCS_SEEDA3_LANE3 bit 8	MAIN[34][28][12]
E10GBASER_PCS_SEEDA3_LANE3 bit 9	MAIN[34][29][12]
E10GBASER_PCS_SEEDA3_LANE3 bit 10	MAIN[34][28][13]
E10GBASER_PCS_SEEDA3_LANE3 bit 11	MAIN[34][29][13]
E10GBASER_PCS_SEEDA3_LANE3 bit 12	MAIN[34][28][14]
E10GBASER_PCS_SEEDA3_LANE3 bit 13	MAIN[34][29][14]
E10GBASER_PCS_SEEDA3_LANE3 bit 14	MAIN[34][28][15]
E10GBASER_PCS_SEEDA3_LANE3 bit 15	MAIN[34][29][15]
E10GBASER_PCS_SEEDB0_LANE3 bit 0	MAIN[34][28][16]
E10GBASER_PCS_SEEDB0_LANE3 bit 1	MAIN[34][29][16]
E10GBASER_PCS_SEEDB0_LANE3 bit 2	MAIN[34][28][17]
E10GBASER_PCS_SEEDB0_LANE3 bit 3	MAIN[34][29][17]
E10GBASER_PCS_SEEDB0_LANE3 bit 4	MAIN[34][28][18]
E10GBASER_PCS_SEEDB0_LANE3 bit 5	MAIN[34][29][18]
E10GBASER_PCS_SEEDB0_LANE3 bit 6	MAIN[34][28][19]
E10GBASER_PCS_SEEDB0_LANE3 bit 7	MAIN[34][29][19]
E10GBASER_PCS_SEEDB0_LANE3 bit 8	MAIN[34][28][20]
E10GBASER_PCS_SEEDB0_LANE3 bit 9	MAIN[34][29][20]
E10GBASER_PCS_SEEDB0_LANE3 bit 10	MAIN[34][28][21]
E10GBASER_PCS_SEEDB0_LANE3 bit 11	MAIN[34][29][21]
E10GBASER_PCS_SEEDB0_LANE3 bit 12	MAIN[34][28][22]
E10GBASER_PCS_SEEDB0_LANE3 bit 13	MAIN[34][29][22]
E10GBASER_PCS_SEEDB0_LANE3 bit 14	MAIN[34][28][23]
E10GBASER_PCS_SEEDB0_LANE3 bit 15	MAIN[34][29][23]
E10GBASER_PCS_SEEDB1_LANE3 bit 0	MAIN[34][28][24]
E10GBASER_PCS_SEEDB1_LANE3 bit 1	MAIN[34][29][24]
E10GBASER_PCS_SEEDB1_LANE3 bit 2	MAIN[34][28][25]
E10GBASER_PCS_SEEDB1_LANE3 bit 3	MAIN[34][29][25]
E10GBASER_PCS_SEEDB1_LANE3 bit 4	MAIN[34][28][26]
E10GBASER_PCS_SEEDB1_LANE3 bit 5	MAIN[34][29][26]
E10GBASER_PCS_SEEDB1_LANE3 bit 6	MAIN[34][28][27]
E10GBASER_PCS_SEEDB1_LANE3 bit 7	MAIN[34][29][27]
E10GBASER_PCS_SEEDB1_LANE3 bit 8	MAIN[34][28][28]
E10GBASER_PCS_SEEDB1_LANE3 bit 9	MAIN[34][29][28]
E10GBASER_PCS_SEEDB1_LANE3 bit 10	MAIN[34][28][29]
E10GBASER_PCS_SEEDB1_LANE3 bit 11	MAIN[34][29][29]
E10GBASER_PCS_SEEDB1_LANE3 bit 12	MAIN[34][28][30]
E10GBASER_PCS_SEEDB1_LANE3 bit 13	MAIN[34][29][30]
E10GBASER_PCS_SEEDB1_LANE3 bit 14	MAIN[34][28][31]
E10GBASER_PCS_SEEDB1_LANE3 bit 15	MAIN[34][29][31]
E10GBASER_PCS_SEEDB2_LANE3 bit 0	MAIN[34][28][32]
E10GBASER_PCS_SEEDB2_LANE3 bit 1	MAIN[34][29][32]
E10GBASER_PCS_SEEDB2_LANE3 bit 2	MAIN[34][28][33]
E10GBASER_PCS_SEEDB2_LANE3 bit 3	MAIN[34][29][33]
E10GBASER_PCS_SEEDB2_LANE3 bit 4	MAIN[34][28][34]
E10GBASER_PCS_SEEDB2_LANE3 bit 5	MAIN[34][29][34]
E10GBASER_PCS_SEEDB2_LANE3 bit 6	MAIN[34][28][35]
E10GBASER_PCS_SEEDB2_LANE3 bit 7	MAIN[34][29][35]
E10GBASER_PCS_SEEDB2_LANE3 bit 8	MAIN[34][28][36]
E10GBASER_PCS_SEEDB2_LANE3 bit 9	MAIN[34][29][36]
E10GBASER_PCS_SEEDB2_LANE3 bit 10	MAIN[34][28][37]
E10GBASER_PCS_SEEDB2_LANE3 bit 11	MAIN[34][29][37]
E10GBASER_PCS_SEEDB2_LANE3 bit 12	MAIN[34][28][38]
E10GBASER_PCS_SEEDB2_LANE3 bit 13	MAIN[34][29][38]
E10GBASER_PCS_SEEDB2_LANE3 bit 14	MAIN[34][28][39]
E10GBASER_PCS_SEEDB2_LANE3 bit 15	MAIN[34][29][39]
E10GBASER_PCS_SEEDB3_LANE3 bit 0	MAIN[34][28][40]
E10GBASER_PCS_SEEDB3_LANE3 bit 1	MAIN[34][29][40]
E10GBASER_PCS_SEEDB3_LANE3 bit 2	MAIN[34][28][41]
E10GBASER_PCS_SEEDB3_LANE3 bit 3	MAIN[34][29][41]
E10GBASER_PCS_SEEDB3_LANE3 bit 4	MAIN[34][28][42]
E10GBASER_PCS_SEEDB3_LANE3 bit 5	MAIN[34][29][42]
E10GBASER_PCS_SEEDB3_LANE3 bit 6	MAIN[34][28][43]
E10GBASER_PCS_SEEDB3_LANE3 bit 7	MAIN[34][29][43]
E10GBASER_PCS_SEEDB3_LANE3 bit 8	MAIN[34][28][44]
E10GBASER_PCS_SEEDB3_LANE3 bit 9	MAIN[34][29][44]
E10GBASER_PCS_SEEDB3_LANE3 bit 10	MAIN[34][28][45]
E10GBASER_PCS_SEEDB3_LANE3 bit 11	MAIN[34][29][45]
E10GBASER_PCS_SEEDB3_LANE3 bit 12	MAIN[34][28][46]
E10GBASER_PCS_SEEDB3_LANE3 bit 13	MAIN[34][29][46]
E10GBASER_PCS_SEEDB3_LANE3 bit 14	MAIN[34][28][47]
E10GBASER_PCS_SEEDB3_LANE3 bit 15	MAIN[34][29][47]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 0	MAIN[34][28][48]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 1	MAIN[34][29][48]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 2	MAIN[34][28][49]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 3	MAIN[34][29][49]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 4	MAIN[34][28][50]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 5	MAIN[34][29][50]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 6	MAIN[34][28][51]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 7	MAIN[34][29][51]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 8	MAIN[34][28][52]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 9	MAIN[34][29][52]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 10	MAIN[34][28][53]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 11	MAIN[34][29][53]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 12	MAIN[34][28][54]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 13	MAIN[34][29][54]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 14	MAIN[34][28][55]
E10GBASER_PCS_TEST_CTRL_LANE3 bit 15	MAIN[34][29][55]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 0	MAIN[33][28][40]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 1	MAIN[33][29][40]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 2	MAIN[33][28][41]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 3	MAIN[33][29][41]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 4	MAIN[33][28][42]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 5	MAIN[33][29][42]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 6	MAIN[33][28][43]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 7	MAIN[33][29][43]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 8	MAIN[33][28][44]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 9	MAIN[33][29][44]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 10	MAIN[33][28][45]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 11	MAIN[33][29][45]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 12	MAIN[33][28][46]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 13	MAIN[33][29][46]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 14	MAIN[33][28][47]
E10GBASEX_PCS_TSTCTRL_LANE3 bit 15	MAIN[33][29][47]
LANE_PWR_CTRL_LANE3 bit 0	MAIN[32][28][48]
LANE_PWR_CTRL_LANE3 bit 1	MAIN[32][29][48]
LANE_PWR_CTRL_LANE3 bit 2	MAIN[32][28][49]
LANE_PWR_CTRL_LANE3 bit 3	MAIN[32][29][49]
LANE_PWR_CTRL_LANE3 bit 4	MAIN[32][28][50]
LANE_PWR_CTRL_LANE3 bit 5	MAIN[32][29][50]
LANE_PWR_CTRL_LANE3 bit 6	MAIN[32][28][51]
LANE_PWR_CTRL_LANE3 bit 7	MAIN[32][29][51]
LANE_PWR_CTRL_LANE3 bit 8	MAIN[32][28][52]
LANE_PWR_CTRL_LANE3 bit 9	MAIN[32][29][52]
LANE_PWR_CTRL_LANE3 bit 10	MAIN[32][28][53]
LANE_PWR_CTRL_LANE3 bit 11	MAIN[32][29][53]
LANE_PWR_CTRL_LANE3 bit 12	MAIN[32][28][54]
LANE_PWR_CTRL_LANE3 bit 13	MAIN[32][29][54]
LANE_PWR_CTRL_LANE3 bit 14	MAIN[32][28][55]
LANE_PWR_CTRL_LANE3 bit 15	MAIN[32][29][55]
LNK_TRN_CFG_LANE3 bit 0	MAIN[33][28][8]
LNK_TRN_CFG_LANE3 bit 1	MAIN[33][29][8]
LNK_TRN_CFG_LANE3 bit 2	MAIN[33][28][9]
LNK_TRN_CFG_LANE3 bit 3	MAIN[33][29][9]
LNK_TRN_CFG_LANE3 bit 4	MAIN[33][28][10]
LNK_TRN_CFG_LANE3 bit 5	MAIN[33][29][10]
LNK_TRN_CFG_LANE3 bit 6	MAIN[33][28][11]
LNK_TRN_CFG_LANE3 bit 7	MAIN[33][29][11]
LNK_TRN_CFG_LANE3 bit 8	MAIN[33][28][12]
LNK_TRN_CFG_LANE3 bit 9	MAIN[33][29][12]
LNK_TRN_CFG_LANE3 bit 10	MAIN[33][28][13]
LNK_TRN_CFG_LANE3 bit 11	MAIN[33][29][13]
LNK_TRN_CFG_LANE3 bit 12	MAIN[33][28][14]
LNK_TRN_CFG_LANE3 bit 13	MAIN[33][29][14]
LNK_TRN_CFG_LANE3 bit 14	MAIN[33][28][15]
LNK_TRN_CFG_LANE3 bit 15	MAIN[33][29][15]
LNK_TRN_COEFF_REQ_LANE3 bit 0	MAIN[33][28][16]
LNK_TRN_COEFF_REQ_LANE3 bit 1	MAIN[33][29][16]
LNK_TRN_COEFF_REQ_LANE3 bit 2	MAIN[33][28][17]
LNK_TRN_COEFF_REQ_LANE3 bit 3	MAIN[33][29][17]
LNK_TRN_COEFF_REQ_LANE3 bit 4	MAIN[33][28][18]
LNK_TRN_COEFF_REQ_LANE3 bit 5	MAIN[33][29][18]
LNK_TRN_COEFF_REQ_LANE3 bit 6	MAIN[33][28][19]
LNK_TRN_COEFF_REQ_LANE3 bit 7	MAIN[33][29][19]
LNK_TRN_COEFF_REQ_LANE3 bit 8	MAIN[33][28][20]
LNK_TRN_COEFF_REQ_LANE3 bit 9	MAIN[33][29][20]
LNK_TRN_COEFF_REQ_LANE3 bit 10	MAIN[33][28][21]
LNK_TRN_COEFF_REQ_LANE3 bit 11	MAIN[33][29][21]
LNK_TRN_COEFF_REQ_LANE3 bit 12	MAIN[33][28][22]
LNK_TRN_COEFF_REQ_LANE3 bit 13	MAIN[33][29][22]
LNK_TRN_COEFF_REQ_LANE3 bit 14	MAIN[33][28][23]
LNK_TRN_COEFF_REQ_LANE3 bit 15	MAIN[33][29][23]
PCS_ABILITY_LANE3 bit 0	MAIN[35][28][48]
PCS_ABILITY_LANE3 bit 1	MAIN[35][29][48]
PCS_ABILITY_LANE3 bit 2	MAIN[35][28][49]
PCS_ABILITY_LANE3 bit 3	MAIN[35][29][49]
PCS_ABILITY_LANE3 bit 4	MAIN[35][28][50]
PCS_ABILITY_LANE3 bit 5	MAIN[35][29][50]
PCS_ABILITY_LANE3 bit 6	MAIN[35][28][51]
PCS_ABILITY_LANE3 bit 7	MAIN[35][29][51]
PCS_ABILITY_LANE3 bit 8	MAIN[35][28][52]
PCS_ABILITY_LANE3 bit 9	MAIN[35][29][52]
PCS_ABILITY_LANE3 bit 10	MAIN[35][28][53]
PCS_ABILITY_LANE3 bit 11	MAIN[35][29][53]
PCS_ABILITY_LANE3 bit 12	MAIN[35][28][54]
PCS_ABILITY_LANE3 bit 13	MAIN[35][29][54]
PCS_ABILITY_LANE3 bit 14	MAIN[35][28][55]
PCS_ABILITY_LANE3 bit 15	MAIN[35][29][55]
PCS_CTRL1_LANE3 bit 0	MAIN[33][28][24]
PCS_CTRL1_LANE3 bit 1	MAIN[33][29][24]
PCS_CTRL1_LANE3 bit 2	MAIN[33][28][25]
PCS_CTRL1_LANE3 bit 3	MAIN[33][29][25]
PCS_CTRL1_LANE3 bit 4	MAIN[33][28][26]
PCS_CTRL1_LANE3 bit 5	MAIN[33][29][26]
PCS_CTRL1_LANE3 bit 6	MAIN[33][28][27]
PCS_CTRL1_LANE3 bit 7	MAIN[33][29][27]
PCS_CTRL1_LANE3 bit 8	MAIN[33][28][28]
PCS_CTRL1_LANE3 bit 9	MAIN[33][29][28]
PCS_CTRL1_LANE3 bit 10	MAIN[33][28][29]
PCS_CTRL1_LANE3 bit 11	MAIN[33][29][29]
PCS_CTRL1_LANE3 bit 12	MAIN[33][28][30]
PCS_CTRL1_LANE3 bit 13	MAIN[33][29][30]
PCS_CTRL1_LANE3 bit 14	MAIN[33][28][31]
PCS_CTRL1_LANE3 bit 15	MAIN[33][29][31]
PCS_CTRL2_LANE3 bit 0	MAIN[33][28][32]
PCS_CTRL2_LANE3 bit 1	MAIN[33][29][32]
PCS_CTRL2_LANE3 bit 2	MAIN[33][28][33]
PCS_CTRL2_LANE3 bit 3	MAIN[33][29][33]
PCS_CTRL2_LANE3 bit 4	MAIN[33][28][34]
PCS_CTRL2_LANE3 bit 5	MAIN[33][29][34]
PCS_CTRL2_LANE3 bit 6	MAIN[33][28][35]
PCS_CTRL2_LANE3 bit 7	MAIN[33][29][35]
PCS_CTRL2_LANE3 bit 8	MAIN[33][28][36]
PCS_CTRL2_LANE3 bit 9	MAIN[33][29][36]
PCS_CTRL2_LANE3 bit 10	MAIN[33][28][37]
PCS_CTRL2_LANE3 bit 11	MAIN[33][29][37]
PCS_CTRL2_LANE3 bit 12	MAIN[33][28][38]
PCS_CTRL2_LANE3 bit 13	MAIN[33][29][38]
PCS_CTRL2_LANE3 bit 14	MAIN[33][28][39]
PCS_CTRL2_LANE3 bit 15	MAIN[33][29][39]
PCS_MISC_CFG_0_LANE3 bit 0	MAIN[34][28][56]
PCS_MISC_CFG_0_LANE3 bit 1	MAIN[34][29][56]
PCS_MISC_CFG_0_LANE3 bit 2	MAIN[34][28][57]
PCS_MISC_CFG_0_LANE3 bit 3	MAIN[34][29][57]
PCS_MISC_CFG_0_LANE3 bit 4	MAIN[34][28][58]
PCS_MISC_CFG_0_LANE3 bit 5	MAIN[34][29][58]
PCS_MISC_CFG_0_LANE3 bit 6	MAIN[34][28][59]
PCS_MISC_CFG_0_LANE3 bit 7	MAIN[34][29][59]
PCS_MISC_CFG_0_LANE3 bit 8	MAIN[34][28][60]
PCS_MISC_CFG_0_LANE3 bit 9	MAIN[34][29][60]
PCS_MISC_CFG_0_LANE3 bit 10	MAIN[34][28][61]
PCS_MISC_CFG_0_LANE3 bit 11	MAIN[34][29][61]
PCS_MISC_CFG_0_LANE3 bit 12	MAIN[34][28][62]
PCS_MISC_CFG_0_LANE3 bit 13	MAIN[34][29][62]
PCS_MISC_CFG_0_LANE3 bit 14	MAIN[34][28][63]
PCS_MISC_CFG_0_LANE3 bit 15	MAIN[34][29][63]
PCS_MISC_CFG_1_LANE3 bit 0	MAIN[35][28][32]
PCS_MISC_CFG_1_LANE3 bit 1	MAIN[35][29][32]
PCS_MISC_CFG_1_LANE3 bit 2	MAIN[35][28][33]
PCS_MISC_CFG_1_LANE3 bit 3	MAIN[35][29][33]
PCS_MISC_CFG_1_LANE3 bit 4	MAIN[35][28][34]
PCS_MISC_CFG_1_LANE3 bit 5	MAIN[35][29][34]
PCS_MISC_CFG_1_LANE3 bit 6	MAIN[35][28][35]
PCS_MISC_CFG_1_LANE3 bit 7	MAIN[35][29][35]
PCS_MISC_CFG_1_LANE3 bit 8	MAIN[35][28][36]
PCS_MISC_CFG_1_LANE3 bit 9	MAIN[35][29][36]
PCS_MISC_CFG_1_LANE3 bit 10	MAIN[35][28][37]
PCS_MISC_CFG_1_LANE3 bit 11	MAIN[35][29][37]
PCS_MISC_CFG_1_LANE3 bit 12	MAIN[35][28][38]
PCS_MISC_CFG_1_LANE3 bit 13	MAIN[35][29][38]
PCS_MISC_CFG_1_LANE3 bit 14	MAIN[35][28][39]
PCS_MISC_CFG_1_LANE3 bit 15	MAIN[35][29][39]
PCS_MODE_LANE3 bit 0	MAIN[29][28][56]
PCS_MODE_LANE3 bit 1	MAIN[29][29][56]
PCS_MODE_LANE3 bit 2	MAIN[29][28][57]
PCS_MODE_LANE3 bit 3	MAIN[29][29][57]
PCS_MODE_LANE3 bit 4	MAIN[29][28][58]
PCS_MODE_LANE3 bit 5	MAIN[29][29][58]
PCS_MODE_LANE3 bit 6	MAIN[29][28][59]
PCS_MODE_LANE3 bit 7	MAIN[29][29][59]
PCS_MODE_LANE3 bit 8	MAIN[29][28][60]
PCS_MODE_LANE3 bit 9	MAIN[29][29][60]
PCS_MODE_LANE3 bit 10	MAIN[29][28][61]
PCS_MODE_LANE3 bit 11	MAIN[29][29][61]
PCS_MODE_LANE3 bit 12	MAIN[29][28][62]
PCS_MODE_LANE3 bit 13	MAIN[29][29][62]
PCS_MODE_LANE3 bit 14	MAIN[29][28][63]
PCS_MODE_LANE3 bit 15	MAIN[29][29][63]
PCS_RESET_1_LANE3 bit 0	MAIN[35][28][40]
PCS_RESET_1_LANE3 bit 1	MAIN[35][29][40]
PCS_RESET_1_LANE3 bit 2	MAIN[35][28][41]
PCS_RESET_1_LANE3 bit 3	MAIN[35][29][41]
PCS_RESET_1_LANE3 bit 4	MAIN[35][28][42]
PCS_RESET_1_LANE3 bit 5	MAIN[35][29][42]
PCS_RESET_1_LANE3 bit 6	MAIN[35][28][43]
PCS_RESET_1_LANE3 bit 7	MAIN[35][29][43]
PCS_RESET_1_LANE3 bit 8	MAIN[35][28][44]
PCS_RESET_1_LANE3 bit 9	MAIN[35][29][44]
PCS_RESET_1_LANE3 bit 10	MAIN[35][28][45]
PCS_RESET_1_LANE3 bit 11	MAIN[35][29][45]
PCS_RESET_1_LANE3 bit 12	MAIN[35][28][46]
PCS_RESET_1_LANE3 bit 13	MAIN[35][29][46]
PCS_RESET_1_LANE3 bit 14	MAIN[35][28][47]
PCS_RESET_1_LANE3 bit 15	MAIN[35][29][47]
PCS_RESET_LANE3 bit 0	MAIN[35][28][16]
PCS_RESET_LANE3 bit 1	MAIN[35][29][16]
PCS_RESET_LANE3 bit 2	MAIN[35][28][17]
PCS_RESET_LANE3 bit 3	MAIN[35][29][17]
PCS_RESET_LANE3 bit 4	MAIN[35][28][18]
PCS_RESET_LANE3 bit 5	MAIN[35][29][18]
PCS_RESET_LANE3 bit 6	MAIN[35][28][19]
PCS_RESET_LANE3 bit 7	MAIN[35][29][19]
PCS_RESET_LANE3 bit 8	MAIN[35][28][20]
PCS_RESET_LANE3 bit 9	MAIN[35][29][20]
PCS_RESET_LANE3 bit 10	MAIN[35][28][21]
PCS_RESET_LANE3 bit 11	MAIN[35][29][21]
PCS_RESET_LANE3 bit 12	MAIN[35][28][22]
PCS_RESET_LANE3 bit 13	MAIN[35][29][22]
PCS_RESET_LANE3 bit 14	MAIN[35][28][23]
PCS_RESET_LANE3 bit 15	MAIN[35][29][23]
PCS_TYPE_LANE3 bit 0	MAIN[35][28][56]
PCS_TYPE_LANE3 bit 1	MAIN[35][29][56]
PCS_TYPE_LANE3 bit 2	MAIN[35][28][57]
PCS_TYPE_LANE3 bit 3	MAIN[35][29][57]
PCS_TYPE_LANE3 bit 4	MAIN[35][28][58]
PCS_TYPE_LANE3 bit 5	MAIN[35][29][58]
PCS_TYPE_LANE3 bit 6	MAIN[35][28][59]
PCS_TYPE_LANE3 bit 7	MAIN[35][29][59]
PCS_TYPE_LANE3 bit 8	MAIN[35][28][60]
PCS_TYPE_LANE3 bit 9	MAIN[35][29][60]
PCS_TYPE_LANE3 bit 10	MAIN[35][28][61]
PCS_TYPE_LANE3 bit 11	MAIN[35][29][61]
PCS_TYPE_LANE3 bit 12	MAIN[35][28][62]
PCS_TYPE_LANE3 bit 13	MAIN[35][29][62]
PCS_TYPE_LANE3 bit 14	MAIN[35][28][63]
PCS_TYPE_LANE3 bit 15	MAIN[35][29][63]
PMA_CTRL1_LANE3 bit 0	MAIN[28][28][16]
PMA_CTRL1_LANE3 bit 1	MAIN[28][29][16]
PMA_CTRL1_LANE3 bit 2	MAIN[28][28][17]
PMA_CTRL1_LANE3 bit 3	MAIN[28][29][17]
PMA_CTRL1_LANE3 bit 4	MAIN[28][28][18]
PMA_CTRL1_LANE3 bit 5	MAIN[28][29][18]
PMA_CTRL1_LANE3 bit 6	MAIN[28][28][19]
PMA_CTRL1_LANE3 bit 7	MAIN[28][29][19]
PMA_CTRL1_LANE3 bit 8	MAIN[28][28][20]
PMA_CTRL1_LANE3 bit 9	MAIN[28][29][20]
PMA_CTRL1_LANE3 bit 10	MAIN[28][28][21]
PMA_CTRL1_LANE3 bit 11	MAIN[28][29][21]
PMA_CTRL1_LANE3 bit 12	MAIN[28][28][22]
PMA_CTRL1_LANE3 bit 13	MAIN[28][29][22]
PMA_CTRL1_LANE3 bit 14	MAIN[28][28][23]
PMA_CTRL1_LANE3 bit 15	MAIN[28][29][23]
PMA_CTRL2_LANE3 bit 0	MAIN[28][28][24]
PMA_CTRL2_LANE3 bit 1	MAIN[28][29][24]
PMA_CTRL2_LANE3 bit 2	MAIN[28][28][25]
PMA_CTRL2_LANE3 bit 3	MAIN[28][29][25]
PMA_CTRL2_LANE3 bit 4	MAIN[28][28][26]
PMA_CTRL2_LANE3 bit 5	MAIN[28][29][26]
PMA_CTRL2_LANE3 bit 6	MAIN[28][28][27]
PMA_CTRL2_LANE3 bit 7	MAIN[28][29][27]
PMA_CTRL2_LANE3 bit 8	MAIN[28][28][28]
PMA_CTRL2_LANE3 bit 9	MAIN[28][29][28]
PMA_CTRL2_LANE3 bit 10	MAIN[28][28][29]
PMA_CTRL2_LANE3 bit 11	MAIN[28][29][29]
PMA_CTRL2_LANE3 bit 12	MAIN[28][28][30]
PMA_CTRL2_LANE3 bit 13	MAIN[28][29][30]
PMA_CTRL2_LANE3 bit 14	MAIN[28][28][31]
PMA_CTRL2_LANE3 bit 15	MAIN[28][29][31]
PMA_LPBK_CTRL_LANE3 bit 0	MAIN[32][28][32]
PMA_LPBK_CTRL_LANE3 bit 1	MAIN[32][29][32]
PMA_LPBK_CTRL_LANE3 bit 2	MAIN[32][28][33]
PMA_LPBK_CTRL_LANE3 bit 3	MAIN[32][29][33]
PMA_LPBK_CTRL_LANE3 bit 4	MAIN[32][28][34]
PMA_LPBK_CTRL_LANE3 bit 5	MAIN[32][29][34]
PMA_LPBK_CTRL_LANE3 bit 6	MAIN[32][28][35]
PMA_LPBK_CTRL_LANE3 bit 7	MAIN[32][29][35]
PMA_LPBK_CTRL_LANE3 bit 8	MAIN[32][28][36]
PMA_LPBK_CTRL_LANE3 bit 9	MAIN[32][29][36]
PMA_LPBK_CTRL_LANE3 bit 10	MAIN[32][28][37]
PMA_LPBK_CTRL_LANE3 bit 11	MAIN[32][29][37]
PMA_LPBK_CTRL_LANE3 bit 12	MAIN[32][28][38]
PMA_LPBK_CTRL_LANE3 bit 13	MAIN[32][29][38]
PMA_LPBK_CTRL_LANE3 bit 14	MAIN[32][28][39]
PMA_LPBK_CTRL_LANE3 bit 15	MAIN[32][29][39]
PRBS_BER_CFG0_LANE3 bit 0	MAIN[35][28][0]
PRBS_BER_CFG0_LANE3 bit 1	MAIN[35][29][0]
PRBS_BER_CFG0_LANE3 bit 2	MAIN[35][28][1]
PRBS_BER_CFG0_LANE3 bit 3	MAIN[35][29][1]
PRBS_BER_CFG0_LANE3 bit 4	MAIN[35][28][2]
PRBS_BER_CFG0_LANE3 bit 5	MAIN[35][29][2]
PRBS_BER_CFG0_LANE3 bit 6	MAIN[35][28][3]
PRBS_BER_CFG0_LANE3 bit 7	MAIN[35][29][3]
PRBS_BER_CFG0_LANE3 bit 8	MAIN[35][28][4]
PRBS_BER_CFG0_LANE3 bit 9	MAIN[35][29][4]
PRBS_BER_CFG0_LANE3 bit 10	MAIN[35][28][5]
PRBS_BER_CFG0_LANE3 bit 11	MAIN[35][29][5]
PRBS_BER_CFG0_LANE3 bit 12	MAIN[35][28][6]
PRBS_BER_CFG0_LANE3 bit 13	MAIN[35][29][6]
PRBS_BER_CFG0_LANE3 bit 14	MAIN[35][28][7]
PRBS_BER_CFG0_LANE3 bit 15	MAIN[35][29][7]
PRBS_BER_CFG1_LANE3 bit 0	MAIN[35][28][8]
PRBS_BER_CFG1_LANE3 bit 1	MAIN[35][29][8]
PRBS_BER_CFG1_LANE3 bit 2	MAIN[35][28][9]
PRBS_BER_CFG1_LANE3 bit 3	MAIN[35][29][9]
PRBS_BER_CFG1_LANE3 bit 4	MAIN[35][28][10]
PRBS_BER_CFG1_LANE3 bit 5	MAIN[35][29][10]
PRBS_BER_CFG1_LANE3 bit 6	MAIN[35][28][11]
PRBS_BER_CFG1_LANE3 bit 7	MAIN[35][29][11]
PRBS_BER_CFG1_LANE3 bit 8	MAIN[35][28][12]
PRBS_BER_CFG1_LANE3 bit 9	MAIN[35][29][12]
PRBS_BER_CFG1_LANE3 bit 10	MAIN[35][28][13]
PRBS_BER_CFG1_LANE3 bit 11	MAIN[35][29][13]
PRBS_BER_CFG1_LANE3 bit 12	MAIN[35][28][14]
PRBS_BER_CFG1_LANE3 bit 13	MAIN[35][29][14]
PRBS_BER_CFG1_LANE3 bit 14	MAIN[35][28][15]
PRBS_BER_CFG1_LANE3 bit 15	MAIN[35][29][15]
PRBS_CFG_LANE3 bit 0	MAIN[35][28][24]
PRBS_CFG_LANE3 bit 1	MAIN[35][29][24]
PRBS_CFG_LANE3 bit 2	MAIN[35][28][25]
PRBS_CFG_LANE3 bit 3	MAIN[35][29][25]
PRBS_CFG_LANE3 bit 4	MAIN[35][28][26]
PRBS_CFG_LANE3 bit 5	MAIN[35][29][26]
PRBS_CFG_LANE3 bit 6	MAIN[35][28][27]
PRBS_CFG_LANE3 bit 7	MAIN[35][29][27]
PRBS_CFG_LANE3 bit 8	MAIN[35][28][28]
PRBS_CFG_LANE3 bit 9	MAIN[35][29][28]
PRBS_CFG_LANE3 bit 10	MAIN[35][28][29]
PRBS_CFG_LANE3 bit 11	MAIN[35][29][29]
PRBS_CFG_LANE3 bit 12	MAIN[35][28][30]
PRBS_CFG_LANE3 bit 13	MAIN[35][29][30]
PRBS_CFG_LANE3 bit 14	MAIN[35][28][31]
PRBS_CFG_LANE3 bit 15	MAIN[35][29][31]
RX_AEQ_VAL0_LANE3 bit 0	MAIN[31][28][16]
RX_AEQ_VAL0_LANE3 bit 1	MAIN[31][29][16]
RX_AEQ_VAL0_LANE3 bit 2	MAIN[31][28][17]
RX_AEQ_VAL0_LANE3 bit 3	MAIN[31][29][17]
RX_AEQ_VAL0_LANE3 bit 4	MAIN[31][28][18]
RX_AEQ_VAL0_LANE3 bit 5	MAIN[31][29][18]
RX_AEQ_VAL0_LANE3 bit 6	MAIN[31][28][19]
RX_AEQ_VAL0_LANE3 bit 7	MAIN[31][29][19]
RX_AEQ_VAL0_LANE3 bit 8	MAIN[31][28][20]
RX_AEQ_VAL0_LANE3 bit 9	MAIN[31][29][20]
RX_AEQ_VAL0_LANE3 bit 10	MAIN[31][28][21]
RX_AEQ_VAL0_LANE3 bit 11	MAIN[31][29][21]
RX_AEQ_VAL0_LANE3 bit 12	MAIN[31][28][22]
RX_AEQ_VAL0_LANE3 bit 13	MAIN[31][29][22]
RX_AEQ_VAL0_LANE3 bit 14	MAIN[31][28][23]
RX_AEQ_VAL0_LANE3 bit 15	MAIN[31][29][23]
RX_AEQ_VAL1_LANE3 bit 0	MAIN[31][28][24]
RX_AEQ_VAL1_LANE3 bit 1	MAIN[31][29][24]
RX_AEQ_VAL1_LANE3 bit 2	MAIN[31][28][25]
RX_AEQ_VAL1_LANE3 bit 3	MAIN[31][29][25]
RX_AEQ_VAL1_LANE3 bit 4	MAIN[31][28][26]
RX_AEQ_VAL1_LANE3 bit 5	MAIN[31][29][26]
RX_AEQ_VAL1_LANE3 bit 6	MAIN[31][28][27]
RX_AEQ_VAL1_LANE3 bit 7	MAIN[31][29][27]
RX_AEQ_VAL1_LANE3 bit 8	MAIN[31][28][28]
RX_AEQ_VAL1_LANE3 bit 9	MAIN[31][29][28]
RX_AEQ_VAL1_LANE3 bit 10	MAIN[31][28][29]
RX_AEQ_VAL1_LANE3 bit 11	MAIN[31][29][29]
RX_AEQ_VAL1_LANE3 bit 12	MAIN[31][28][30]
RX_AEQ_VAL1_LANE3 bit 13	MAIN[31][29][30]
RX_AEQ_VAL1_LANE3 bit 14	MAIN[31][28][31]
RX_AEQ_VAL1_LANE3 bit 15	MAIN[31][29][31]
RX_AGC_CTRL_LANE3 bit 0	MAIN[29][28][32]
RX_AGC_CTRL_LANE3 bit 1	MAIN[29][29][32]
RX_AGC_CTRL_LANE3 bit 2	MAIN[29][28][33]
RX_AGC_CTRL_LANE3 bit 3	MAIN[29][29][33]
RX_AGC_CTRL_LANE3 bit 4	MAIN[29][28][34]
RX_AGC_CTRL_LANE3 bit 5	MAIN[29][29][34]
RX_AGC_CTRL_LANE3 bit 6	MAIN[29][28][35]
RX_AGC_CTRL_LANE3 bit 7	MAIN[29][29][35]
RX_AGC_CTRL_LANE3 bit 8	MAIN[29][28][36]
RX_AGC_CTRL_LANE3 bit 9	MAIN[29][29][36]
RX_AGC_CTRL_LANE3 bit 10	MAIN[29][28][37]
RX_AGC_CTRL_LANE3 bit 11	MAIN[29][29][37]
RX_AGC_CTRL_LANE3 bit 12	MAIN[29][28][38]
RX_AGC_CTRL_LANE3 bit 13	MAIN[29][29][38]
RX_AGC_CTRL_LANE3 bit 14	MAIN[29][28][39]
RX_AGC_CTRL_LANE3 bit 15	MAIN[29][29][39]
RX_CDR_CTRL0_LANE3 bit 0	MAIN[30][28][40]
RX_CDR_CTRL0_LANE3 bit 1	MAIN[30][29][40]
RX_CDR_CTRL0_LANE3 bit 2	MAIN[30][28][41]
RX_CDR_CTRL0_LANE3 bit 3	MAIN[30][29][41]
RX_CDR_CTRL0_LANE3 bit 4	MAIN[30][28][42]
RX_CDR_CTRL0_LANE3 bit 5	MAIN[30][29][42]
RX_CDR_CTRL0_LANE3 bit 6	MAIN[30][28][43]
RX_CDR_CTRL0_LANE3 bit 7	MAIN[30][29][43]
RX_CDR_CTRL0_LANE3 bit 8	MAIN[30][28][44]
RX_CDR_CTRL0_LANE3 bit 9	MAIN[30][29][44]
RX_CDR_CTRL0_LANE3 bit 10	MAIN[30][28][45]
RX_CDR_CTRL0_LANE3 bit 11	MAIN[30][29][45]
RX_CDR_CTRL0_LANE3 bit 12	MAIN[30][28][46]
RX_CDR_CTRL0_LANE3 bit 13	MAIN[30][29][46]
RX_CDR_CTRL0_LANE3 bit 14	MAIN[30][28][47]
RX_CDR_CTRL0_LANE3 bit 15	MAIN[30][29][47]
RX_CDR_CTRL1_LANE3 bit 0	MAIN[30][28][48]
RX_CDR_CTRL1_LANE3 bit 1	MAIN[30][29][48]
RX_CDR_CTRL1_LANE3 bit 2	MAIN[30][28][49]
RX_CDR_CTRL1_LANE3 bit 3	MAIN[30][29][49]
RX_CDR_CTRL1_LANE3 bit 4	MAIN[30][28][50]
RX_CDR_CTRL1_LANE3 bit 5	MAIN[30][29][50]
RX_CDR_CTRL1_LANE3 bit 6	MAIN[30][28][51]
RX_CDR_CTRL1_LANE3 bit 7	MAIN[30][29][51]
RX_CDR_CTRL1_LANE3 bit 8	MAIN[30][28][52]
RX_CDR_CTRL1_LANE3 bit 9	MAIN[30][29][52]
RX_CDR_CTRL1_LANE3 bit 10	MAIN[30][28][53]
RX_CDR_CTRL1_LANE3 bit 11	MAIN[30][29][53]
RX_CDR_CTRL1_LANE3 bit 12	MAIN[30][28][54]
RX_CDR_CTRL1_LANE3 bit 13	MAIN[30][29][54]
RX_CDR_CTRL1_LANE3 bit 14	MAIN[30][28][55]
RX_CDR_CTRL1_LANE3 bit 15	MAIN[30][29][55]
RX_CDR_CTRL2_LANE3 bit 0	MAIN[30][28][56]
RX_CDR_CTRL2_LANE3 bit 1	MAIN[30][29][56]
RX_CDR_CTRL2_LANE3 bit 2	MAIN[30][28][57]
RX_CDR_CTRL2_LANE3 bit 3	MAIN[30][29][57]
RX_CDR_CTRL2_LANE3 bit 4	MAIN[30][28][58]
RX_CDR_CTRL2_LANE3 bit 5	MAIN[30][29][58]
RX_CDR_CTRL2_LANE3 bit 6	MAIN[30][28][59]
RX_CDR_CTRL2_LANE3 bit 7	MAIN[30][29][59]
RX_CDR_CTRL2_LANE3 bit 8	MAIN[30][28][60]
RX_CDR_CTRL2_LANE3 bit 9	MAIN[30][29][60]
RX_CDR_CTRL2_LANE3 bit 10	MAIN[30][28][61]
RX_CDR_CTRL2_LANE3 bit 11	MAIN[30][29][61]
RX_CDR_CTRL2_LANE3 bit 12	MAIN[30][28][62]
RX_CDR_CTRL2_LANE3 bit 13	MAIN[30][29][62]
RX_CDR_CTRL2_LANE3 bit 14	MAIN[30][28][63]
RX_CDR_CTRL2_LANE3 bit 15	MAIN[30][29][63]
RX_CFG0_LANE3 bit 0	MAIN[29][28][8]
RX_CFG0_LANE3 bit 1	MAIN[29][29][8]
RX_CFG0_LANE3 bit 2	MAIN[29][28][9]
RX_CFG0_LANE3 bit 3	MAIN[29][29][9]
RX_CFG0_LANE3 bit 4	MAIN[29][28][10]
RX_CFG0_LANE3 bit 5	MAIN[29][29][10]
RX_CFG0_LANE3 bit 6	MAIN[29][28][11]
RX_CFG0_LANE3 bit 7	MAIN[29][29][11]
RX_CFG0_LANE3 bit 8	MAIN[29][28][12]
RX_CFG0_LANE3 bit 9	MAIN[29][29][12]
RX_CFG0_LANE3 bit 10	MAIN[29][28][13]
RX_CFG0_LANE3 bit 11	MAIN[29][29][13]
RX_CFG0_LANE3 bit 12	MAIN[29][28][14]
RX_CFG0_LANE3 bit 13	MAIN[29][29][14]
RX_CFG0_LANE3 bit 14	MAIN[29][28][15]
RX_CFG0_LANE3 bit 15	MAIN[29][29][15]
RX_CFG1_LANE3 bit 0	MAIN[29][28][16]
RX_CFG1_LANE3 bit 1	MAIN[29][29][16]
RX_CFG1_LANE3 bit 2	MAIN[29][28][17]
RX_CFG1_LANE3 bit 3	MAIN[29][29][17]
RX_CFG1_LANE3 bit 4	MAIN[29][28][18]
RX_CFG1_LANE3 bit 5	MAIN[29][29][18]
RX_CFG1_LANE3 bit 6	MAIN[29][28][19]
RX_CFG1_LANE3 bit 7	MAIN[29][29][19]
RX_CFG1_LANE3 bit 8	MAIN[29][28][20]
RX_CFG1_LANE3 bit 9	MAIN[29][29][20]
RX_CFG1_LANE3 bit 10	MAIN[29][28][21]
RX_CFG1_LANE3 bit 11	MAIN[29][29][21]
RX_CFG1_LANE3 bit 12	MAIN[29][28][22]
RX_CFG1_LANE3 bit 13	MAIN[29][29][22]
RX_CFG1_LANE3 bit 14	MAIN[29][28][23]
RX_CFG1_LANE3 bit 15	MAIN[29][29][23]
RX_CFG2_LANE3 bit 0	MAIN[29][28][24]
RX_CFG2_LANE3 bit 1	MAIN[29][29][24]
RX_CFG2_LANE3 bit 2	MAIN[29][28][25]
RX_CFG2_LANE3 bit 3	MAIN[29][29][25]
RX_CFG2_LANE3 bit 4	MAIN[29][28][26]
RX_CFG2_LANE3 bit 5	MAIN[29][29][26]
RX_CFG2_LANE3 bit 6	MAIN[29][28][27]
RX_CFG2_LANE3 bit 7	MAIN[29][29][27]
RX_CFG2_LANE3 bit 8	MAIN[29][28][28]
RX_CFG2_LANE3 bit 9	MAIN[29][29][28]
RX_CFG2_LANE3 bit 10	MAIN[29][28][29]
RX_CFG2_LANE3 bit 11	MAIN[29][29][29]
RX_CFG2_LANE3 bit 12	MAIN[29][28][30]
RX_CFG2_LANE3 bit 13	MAIN[29][29][30]
RX_CFG2_LANE3 bit 14	MAIN[29][28][31]
RX_CFG2_LANE3 bit 15	MAIN[29][29][31]
RX_CTLE_CTRL_LANE3 bit 0	MAIN[31][28][32]
RX_CTLE_CTRL_LANE3 bit 1	MAIN[31][29][32]
RX_CTLE_CTRL_LANE3 bit 2	MAIN[31][28][33]
RX_CTLE_CTRL_LANE3 bit 3	MAIN[31][29][33]
RX_CTLE_CTRL_LANE3 bit 4	MAIN[31][28][34]
RX_CTLE_CTRL_LANE3 bit 5	MAIN[31][29][34]
RX_CTLE_CTRL_LANE3 bit 6	MAIN[31][28][35]
RX_CTLE_CTRL_LANE3 bit 7	MAIN[31][29][35]
RX_CTLE_CTRL_LANE3 bit 8	MAIN[31][28][36]
RX_CTLE_CTRL_LANE3 bit 9	MAIN[31][29][36]
RX_CTLE_CTRL_LANE3 bit 10	MAIN[31][28][37]
RX_CTLE_CTRL_LANE3 bit 11	MAIN[31][29][37]
RX_CTLE_CTRL_LANE3 bit 12	MAIN[31][28][38]
RX_CTLE_CTRL_LANE3 bit 13	MAIN[31][29][38]
RX_CTLE_CTRL_LANE3 bit 14	MAIN[31][28][39]
RX_CTLE_CTRL_LANE3 bit 15	MAIN[31][29][39]
RX_CTRL_OVRD_LANE3 bit 0	MAIN[33][28][0]
RX_CTRL_OVRD_LANE3 bit 1	MAIN[33][29][0]
RX_CTRL_OVRD_LANE3 bit 2	MAIN[33][28][1]
RX_CTRL_OVRD_LANE3 bit 3	MAIN[33][29][1]
RX_CTRL_OVRD_LANE3 bit 4	MAIN[33][28][2]
RX_CTRL_OVRD_LANE3 bit 5	MAIN[33][29][2]
RX_CTRL_OVRD_LANE3 bit 6	MAIN[33][28][3]
RX_CTRL_OVRD_LANE3 bit 7	MAIN[33][29][3]
RX_CTRL_OVRD_LANE3 bit 8	MAIN[33][28][4]
RX_CTRL_OVRD_LANE3 bit 9	MAIN[33][29][4]
RX_CTRL_OVRD_LANE3 bit 10	MAIN[33][28][5]
RX_CTRL_OVRD_LANE3 bit 11	MAIN[33][29][5]
RX_CTRL_OVRD_LANE3 bit 12	MAIN[33][28][6]
RX_CTRL_OVRD_LANE3 bit 13	MAIN[33][29][6]
RX_CTRL_OVRD_LANE3 bit 14	MAIN[33][28][7]
RX_CTRL_OVRD_LANE3 bit 15	MAIN[33][29][7]
RX_LOOP_CTRL_LANE3 bit 0	MAIN[30][28][32]
RX_LOOP_CTRL_LANE3 bit 1	MAIN[30][29][32]
RX_LOOP_CTRL_LANE3 bit 2	MAIN[30][28][33]
RX_LOOP_CTRL_LANE3 bit 3	MAIN[30][29][33]
RX_LOOP_CTRL_LANE3 bit 4	MAIN[30][28][34]
RX_LOOP_CTRL_LANE3 bit 5	MAIN[30][29][34]
RX_LOOP_CTRL_LANE3 bit 6	MAIN[30][28][35]
RX_LOOP_CTRL_LANE3 bit 7	MAIN[30][29][35]
RX_LOOP_CTRL_LANE3 bit 8	MAIN[30][28][36]
RX_LOOP_CTRL_LANE3 bit 9	MAIN[30][29][36]
RX_LOOP_CTRL_LANE3 bit 10	MAIN[30][28][37]
RX_LOOP_CTRL_LANE3 bit 11	MAIN[30][29][37]
RX_LOOP_CTRL_LANE3 bit 12	MAIN[30][28][38]
RX_LOOP_CTRL_LANE3 bit 13	MAIN[30][29][38]
RX_LOOP_CTRL_LANE3 bit 14	MAIN[30][28][39]
RX_LOOP_CTRL_LANE3 bit 15	MAIN[30][29][39]
RX_MVAL0_LANE3 bit 0	MAIN[31][28][0]
RX_MVAL0_LANE3 bit 1	MAIN[31][29][0]
RX_MVAL0_LANE3 bit 2	MAIN[31][28][1]
RX_MVAL0_LANE3 bit 3	MAIN[31][29][1]
RX_MVAL0_LANE3 bit 4	MAIN[31][28][2]
RX_MVAL0_LANE3 bit 5	MAIN[31][29][2]
RX_MVAL0_LANE3 bit 6	MAIN[31][28][3]
RX_MVAL0_LANE3 bit 7	MAIN[31][29][3]
RX_MVAL0_LANE3 bit 8	MAIN[31][28][4]
RX_MVAL0_LANE3 bit 9	MAIN[31][29][4]
RX_MVAL0_LANE3 bit 10	MAIN[31][28][5]
RX_MVAL0_LANE3 bit 11	MAIN[31][29][5]
RX_MVAL0_LANE3 bit 12	MAIN[31][28][6]
RX_MVAL0_LANE3 bit 13	MAIN[31][29][6]
RX_MVAL0_LANE3 bit 14	MAIN[31][28][7]
RX_MVAL0_LANE3 bit 15	MAIN[31][29][7]
RX_MVAL1_LANE3 bit 0	MAIN[31][28][8]
RX_MVAL1_LANE3 bit 1	MAIN[31][29][8]
RX_MVAL1_LANE3 bit 2	MAIN[31][28][9]
RX_MVAL1_LANE3 bit 3	MAIN[31][29][9]
RX_MVAL1_LANE3 bit 4	MAIN[31][28][10]
RX_MVAL1_LANE3 bit 5	MAIN[31][29][10]
RX_MVAL1_LANE3 bit 6	MAIN[31][28][11]
RX_MVAL1_LANE3 bit 7	MAIN[31][29][11]
RX_MVAL1_LANE3 bit 8	MAIN[31][28][12]
RX_MVAL1_LANE3 bit 9	MAIN[31][29][12]
RX_MVAL1_LANE3 bit 10	MAIN[31][28][13]
RX_MVAL1_LANE3 bit 11	MAIN[31][29][13]
RX_MVAL1_LANE3 bit 12	MAIN[31][28][14]
RX_MVAL1_LANE3 bit 13	MAIN[31][29][14]
RX_MVAL1_LANE3 bit 14	MAIN[31][28][15]
RX_MVAL1_LANE3 bit 15	MAIN[31][29][15]
TERM_CTRL_LANE3 bit 0	MAIN[32][28][24]
TERM_CTRL_LANE3 bit 1	MAIN[32][29][24]
TERM_CTRL_LANE3 bit 2	MAIN[32][28][25]
TERM_CTRL_LANE3 bit 3	MAIN[32][29][25]
TERM_CTRL_LANE3 bit 4	MAIN[32][28][26]
TERM_CTRL_LANE3 bit 5	MAIN[32][29][26]
TERM_CTRL_LANE3 bit 6	MAIN[32][28][27]
TERM_CTRL_LANE3 bit 7	MAIN[32][29][27]
TERM_CTRL_LANE3 bit 8	MAIN[32][28][28]
TERM_CTRL_LANE3 bit 9	MAIN[32][29][28]
TERM_CTRL_LANE3 bit 10	MAIN[32][28][29]
TERM_CTRL_LANE3 bit 11	MAIN[32][29][29]
TERM_CTRL_LANE3 bit 12	MAIN[32][28][30]
TERM_CTRL_LANE3 bit 13	MAIN[32][29][30]
TERM_CTRL_LANE3 bit 14	MAIN[32][28][31]
TERM_CTRL_LANE3 bit 15	MAIN[32][29][31]
TX_CFG0_LANE3 bit 0	MAIN[31][28][40]
TX_CFG0_LANE3 bit 1	MAIN[31][29][40]
TX_CFG0_LANE3 bit 2	MAIN[31][28][41]
TX_CFG0_LANE3 bit 3	MAIN[31][29][41]
TX_CFG0_LANE3 bit 4	MAIN[31][28][42]
TX_CFG0_LANE3 bit 5	MAIN[31][29][42]
TX_CFG0_LANE3 bit 6	MAIN[31][28][43]
TX_CFG0_LANE3 bit 7	MAIN[31][29][43]
TX_CFG0_LANE3 bit 8	MAIN[31][28][44]
TX_CFG0_LANE3 bit 9	MAIN[31][29][44]
TX_CFG0_LANE3 bit 10	MAIN[31][28][45]
TX_CFG0_LANE3 bit 11	MAIN[31][29][45]
TX_CFG0_LANE3 bit 12	MAIN[31][28][46]
TX_CFG0_LANE3 bit 13	MAIN[31][29][46]
TX_CFG0_LANE3 bit 14	MAIN[31][28][47]
TX_CFG0_LANE3 bit 15	MAIN[31][29][47]
TX_CFG1_LANE3 bit 0	MAIN[31][28][48]
TX_CFG1_LANE3 bit 1	MAIN[31][29][48]
TX_CFG1_LANE3 bit 2	MAIN[31][28][49]
TX_CFG1_LANE3 bit 3	MAIN[31][29][49]
TX_CFG1_LANE3 bit 4	MAIN[31][28][50]
TX_CFG1_LANE3 bit 5	MAIN[31][29][50]
TX_CFG1_LANE3 bit 6	MAIN[31][28][51]
TX_CFG1_LANE3 bit 7	MAIN[31][29][51]
TX_CFG1_LANE3 bit 8	MAIN[31][28][52]
TX_CFG1_LANE3 bit 9	MAIN[31][29][52]
TX_CFG1_LANE3 bit 10	MAIN[31][28][53]
TX_CFG1_LANE3 bit 11	MAIN[31][29][53]
TX_CFG1_LANE3 bit 12	MAIN[31][28][54]
TX_CFG1_LANE3 bit 13	MAIN[31][29][54]
TX_CFG1_LANE3 bit 14	MAIN[31][28][55]
TX_CFG1_LANE3 bit 15	MAIN[31][29][55]
TX_CFG2_LANE3 bit 0	MAIN[31][28][56]
TX_CFG2_LANE3 bit 1	MAIN[31][29][56]
TX_CFG2_LANE3 bit 2	MAIN[31][28][57]
TX_CFG2_LANE3 bit 3	MAIN[31][29][57]
TX_CFG2_LANE3 bit 4	MAIN[31][28][58]
TX_CFG2_LANE3 bit 5	MAIN[31][29][58]
TX_CFG2_LANE3 bit 6	MAIN[31][28][59]
TX_CFG2_LANE3 bit 7	MAIN[31][29][59]
TX_CFG2_LANE3 bit 8	MAIN[31][28][60]
TX_CFG2_LANE3 bit 9	MAIN[31][29][60]
TX_CFG2_LANE3 bit 10	MAIN[31][28][61]
TX_CFG2_LANE3 bit 11	MAIN[31][29][61]
TX_CFG2_LANE3 bit 12	MAIN[31][28][62]
TX_CFG2_LANE3 bit 13	MAIN[31][29][62]
TX_CFG2_LANE3 bit 14	MAIN[31][28][63]
TX_CFG2_LANE3 bit 15	MAIN[31][29][63]
TX_CLK_SEL0_LANE3 bit 0	MAIN[32][28][8]
TX_CLK_SEL0_LANE3 bit 1	MAIN[32][29][8]
TX_CLK_SEL0_LANE3 bit 2	MAIN[32][28][9]
TX_CLK_SEL0_LANE3 bit 3	MAIN[32][29][9]
TX_CLK_SEL0_LANE3 bit 4	MAIN[32][28][10]
TX_CLK_SEL0_LANE3 bit 5	MAIN[32][29][10]
TX_CLK_SEL0_LANE3 bit 6	MAIN[32][28][11]
TX_CLK_SEL0_LANE3 bit 7	MAIN[32][29][11]
TX_CLK_SEL0_LANE3 bit 8	MAIN[32][28][12]
TX_CLK_SEL0_LANE3 bit 9	MAIN[32][29][12]
TX_CLK_SEL0_LANE3 bit 10	MAIN[32][28][13]
TX_CLK_SEL0_LANE3 bit 11	MAIN[32][29][13]
TX_CLK_SEL0_LANE3 bit 12	MAIN[32][28][14]
TX_CLK_SEL0_LANE3 bit 13	MAIN[32][29][14]
TX_CLK_SEL0_LANE3 bit 14	MAIN[32][28][15]
TX_CLK_SEL0_LANE3 bit 15	MAIN[32][29][15]
TX_CLK_SEL1_LANE3 bit 0	MAIN[32][28][16]
TX_CLK_SEL1_LANE3 bit 1	MAIN[32][29][16]
TX_CLK_SEL1_LANE3 bit 2	MAIN[32][28][17]
TX_CLK_SEL1_LANE3 bit 3	MAIN[32][29][17]
TX_CLK_SEL1_LANE3 bit 4	MAIN[32][28][18]
TX_CLK_SEL1_LANE3 bit 5	MAIN[32][29][18]
TX_CLK_SEL1_LANE3 bit 6	MAIN[32][28][19]
TX_CLK_SEL1_LANE3 bit 7	MAIN[32][29][19]
TX_CLK_SEL1_LANE3 bit 8	MAIN[32][28][20]
TX_CLK_SEL1_LANE3 bit 9	MAIN[32][29][20]
TX_CLK_SEL1_LANE3 bit 10	MAIN[32][28][21]
TX_CLK_SEL1_LANE3 bit 11	MAIN[32][29][21]
TX_CLK_SEL1_LANE3 bit 12	MAIN[32][28][22]
TX_CLK_SEL1_LANE3 bit 13	MAIN[32][29][22]
TX_CLK_SEL1_LANE3 bit 14	MAIN[32][28][23]
TX_CLK_SEL1_LANE3 bit 15	MAIN[32][29][23]
TX_DISABLE_LANE3 bit 0	MAIN[28][28][32]
TX_DISABLE_LANE3 bit 1	MAIN[28][29][32]
TX_DISABLE_LANE3 bit 2	MAIN[28][28][33]
TX_DISABLE_LANE3 bit 3	MAIN[28][29][33]
TX_DISABLE_LANE3 bit 4	MAIN[28][28][34]
TX_DISABLE_LANE3 bit 5	MAIN[28][29][34]
TX_DISABLE_LANE3 bit 6	MAIN[28][28][35]
TX_DISABLE_LANE3 bit 7	MAIN[28][29][35]
TX_DISABLE_LANE3 bit 8	MAIN[28][28][36]
TX_DISABLE_LANE3 bit 9	MAIN[28][29][36]
TX_DISABLE_LANE3 bit 10	MAIN[28][28][37]
TX_DISABLE_LANE3 bit 11	MAIN[28][29][37]
TX_DISABLE_LANE3 bit 12	MAIN[28][28][38]
TX_DISABLE_LANE3 bit 13	MAIN[28][29][38]
TX_DISABLE_LANE3 bit 14	MAIN[28][28][39]
TX_DISABLE_LANE3 bit 15	MAIN[28][29][39]
TX_PREEMPH_LANE3 bit 0	MAIN[32][28][0]
TX_PREEMPH_LANE3 bit 1	MAIN[32][29][0]
TX_PREEMPH_LANE3 bit 2	MAIN[32][28][1]
TX_PREEMPH_LANE3 bit 3	MAIN[32][29][1]
TX_PREEMPH_LANE3 bit 4	MAIN[32][28][2]
TX_PREEMPH_LANE3 bit 5	MAIN[32][29][2]
TX_PREEMPH_LANE3 bit 6	MAIN[32][28][3]
TX_PREEMPH_LANE3 bit 7	MAIN[32][29][3]
TX_PREEMPH_LANE3 bit 8	MAIN[32][28][4]
TX_PREEMPH_LANE3 bit 9	MAIN[32][29][4]
TX_PREEMPH_LANE3 bit 10	MAIN[32][28][5]
TX_PREEMPH_LANE3 bit 11	MAIN[32][29][5]
TX_PREEMPH_LANE3 bit 12	MAIN[32][28][6]
TX_PREEMPH_LANE3 bit 13	MAIN[32][29][6]
TX_PREEMPH_LANE3 bit 14	MAIN[32][28][7]
TX_PREEMPH_LANE3 bit 15	MAIN[32][29][7]
TX_PWR_RATE_OVRD_LANE3 bit 0	MAIN[32][28][56]
TX_PWR_RATE_OVRD_LANE3 bit 1	MAIN[32][29][56]
TX_PWR_RATE_OVRD_LANE3 bit 2	MAIN[32][28][57]
TX_PWR_RATE_OVRD_LANE3 bit 3	MAIN[32][29][57]
TX_PWR_RATE_OVRD_LANE3 bit 4	MAIN[32][28][58]
TX_PWR_RATE_OVRD_LANE3 bit 5	MAIN[32][29][58]
TX_PWR_RATE_OVRD_LANE3 bit 6	MAIN[32][28][59]
TX_PWR_RATE_OVRD_LANE3 bit 7	MAIN[32][29][59]
TX_PWR_RATE_OVRD_LANE3 bit 8	MAIN[32][28][60]
TX_PWR_RATE_OVRD_LANE3 bit 9	MAIN[32][29][60]
TX_PWR_RATE_OVRD_LANE3 bit 10	MAIN[32][28][61]
TX_PWR_RATE_OVRD_LANE3 bit 11	MAIN[32][29][61]
TX_PWR_RATE_OVRD_LANE3 bit 12	MAIN[32][28][62]
TX_PWR_RATE_OVRD_LANE3 bit 13	MAIN[32][29][62]
TX_PWR_RATE_OVRD_LANE3 bit 14	MAIN[32][28][63]
TX_PWR_RATE_OVRD_LANE3 bit 15	MAIN[32][29][63]
BER_CONST_PTRN0 bit 0	MAIN[10][28][24]
BER_CONST_PTRN0 bit 1	MAIN[10][29][24]
BER_CONST_PTRN0 bit 2	MAIN[10][28][25]
BER_CONST_PTRN0 bit 3	MAIN[10][29][25]
BER_CONST_PTRN0 bit 4	MAIN[10][28][26]
BER_CONST_PTRN0 bit 5	MAIN[10][29][26]
BER_CONST_PTRN0 bit 6	MAIN[10][28][27]
BER_CONST_PTRN0 bit 7	MAIN[10][29][27]
BER_CONST_PTRN0 bit 8	MAIN[10][28][28]
BER_CONST_PTRN0 bit 9	MAIN[10][29][28]
BER_CONST_PTRN0 bit 10	MAIN[10][28][29]
BER_CONST_PTRN0 bit 11	MAIN[10][29][29]
BER_CONST_PTRN0 bit 12	MAIN[10][28][30]
BER_CONST_PTRN0 bit 13	MAIN[10][29][30]
BER_CONST_PTRN0 bit 14	MAIN[10][28][31]
BER_CONST_PTRN0 bit 15	MAIN[10][29][31]
BER_CONST_PTRN1 bit 0	MAIN[10][28][32]
BER_CONST_PTRN1 bit 1	MAIN[10][29][32]
BER_CONST_PTRN1 bit 2	MAIN[10][28][33]
BER_CONST_PTRN1 bit 3	MAIN[10][29][33]
BER_CONST_PTRN1 bit 4	MAIN[10][28][34]
BER_CONST_PTRN1 bit 5	MAIN[10][29][34]
BER_CONST_PTRN1 bit 6	MAIN[10][28][35]
BER_CONST_PTRN1 bit 7	MAIN[10][29][35]
BER_CONST_PTRN1 bit 8	MAIN[10][28][36]
BER_CONST_PTRN1 bit 9	MAIN[10][29][36]
BER_CONST_PTRN1 bit 10	MAIN[10][28][37]
BER_CONST_PTRN1 bit 11	MAIN[10][29][37]
BER_CONST_PTRN1 bit 12	MAIN[10][28][38]
BER_CONST_PTRN1 bit 13	MAIN[10][29][38]
BER_CONST_PTRN1 bit 14	MAIN[10][28][39]
BER_CONST_PTRN1 bit 15	MAIN[10][29][39]
DLL_CFG0 bit 0	MAIN[2][28][8]
DLL_CFG0 bit 1	MAIN[2][29][8]
DLL_CFG0 bit 2	MAIN[2][28][9]
DLL_CFG0 bit 3	MAIN[2][29][9]
DLL_CFG0 bit 4	MAIN[2][28][10]
DLL_CFG0 bit 5	MAIN[2][29][10]
DLL_CFG0 bit 6	MAIN[2][28][11]
DLL_CFG0 bit 7	MAIN[2][29][11]
DLL_CFG0 bit 8	MAIN[2][28][12]
DLL_CFG0 bit 9	MAIN[2][29][12]
DLL_CFG0 bit 10	MAIN[2][28][13]
DLL_CFG0 bit 11	MAIN[2][29][13]
DLL_CFG0 bit 12	MAIN[2][28][14]
DLL_CFG0 bit 13	MAIN[2][29][14]
DLL_CFG0 bit 14	MAIN[2][28][15]
DLL_CFG0 bit 15	MAIN[2][29][15]
DLL_CFG1 bit 0	MAIN[4][28][16]
DLL_CFG1 bit 1	MAIN[4][29][16]
DLL_CFG1 bit 2	MAIN[4][28][17]
DLL_CFG1 bit 3	MAIN[4][29][17]
DLL_CFG1 bit 4	MAIN[4][28][18]
DLL_CFG1 bit 5	MAIN[4][29][18]
DLL_CFG1 bit 6	MAIN[4][28][19]
DLL_CFG1 bit 7	MAIN[4][29][19]
DLL_CFG1 bit 8	MAIN[4][28][20]
DLL_CFG1 bit 9	MAIN[4][29][20]
DLL_CFG1 bit 10	MAIN[4][28][21]
DLL_CFG1 bit 11	MAIN[4][29][21]
DLL_CFG1 bit 12	MAIN[4][28][22]
DLL_CFG1 bit 13	MAIN[4][29][22]
DLL_CFG1 bit 14	MAIN[4][28][23]
DLL_CFG1 bit 15	MAIN[4][29][23]
GLBL0_NOISE_CTRL bit 0	MAIN[3][28][0]
GLBL0_NOISE_CTRL bit 1	MAIN[3][29][0]
GLBL0_NOISE_CTRL bit 2	MAIN[3][28][1]
GLBL0_NOISE_CTRL bit 3	MAIN[3][29][1]
GLBL0_NOISE_CTRL bit 4	MAIN[3][28][2]
GLBL0_NOISE_CTRL bit 5	MAIN[3][29][2]
GLBL0_NOISE_CTRL bit 6	MAIN[3][28][3]
GLBL0_NOISE_CTRL bit 7	MAIN[3][29][3]
GLBL0_NOISE_CTRL bit 8	MAIN[3][28][4]
GLBL0_NOISE_CTRL bit 9	MAIN[3][29][4]
GLBL0_NOISE_CTRL bit 10	MAIN[3][28][5]
GLBL0_NOISE_CTRL bit 11	MAIN[3][29][5]
GLBL0_NOISE_CTRL bit 12	MAIN[3][28][6]
GLBL0_NOISE_CTRL bit 13	MAIN[3][29][6]
GLBL0_NOISE_CTRL bit 14	MAIN[3][28][7]
GLBL0_NOISE_CTRL bit 15	MAIN[3][29][7]
GLBL_AMON_SEL bit 0	MAIN[2][28][32]
GLBL_AMON_SEL bit 1	MAIN[2][29][32]
GLBL_AMON_SEL bit 2	MAIN[2][28][33]
GLBL_AMON_SEL bit 3	MAIN[2][29][33]
GLBL_AMON_SEL bit 4	MAIN[2][28][34]
GLBL_AMON_SEL bit 5	MAIN[2][29][34]
GLBL_AMON_SEL bit 6	MAIN[2][28][35]
GLBL_AMON_SEL bit 7	MAIN[2][29][35]
GLBL_AMON_SEL bit 8	MAIN[2][28][36]
GLBL_AMON_SEL bit 9	MAIN[2][29][36]
GLBL_AMON_SEL bit 10	MAIN[2][28][37]
GLBL_AMON_SEL bit 11	MAIN[2][29][37]
GLBL_AMON_SEL bit 12	MAIN[2][28][38]
GLBL_AMON_SEL bit 13	MAIN[2][29][38]
GLBL_AMON_SEL bit 14	MAIN[2][28][39]
GLBL_AMON_SEL bit 15	MAIN[2][29][39]
GLBL_DMON_SEL bit 0	MAIN[2][28][48]
GLBL_DMON_SEL bit 1	MAIN[2][29][48]
GLBL_DMON_SEL bit 2	MAIN[2][28][49]
GLBL_DMON_SEL bit 3	MAIN[2][29][49]
GLBL_DMON_SEL bit 4	MAIN[2][28][50]
GLBL_DMON_SEL bit 5	MAIN[2][29][50]
GLBL_DMON_SEL bit 6	MAIN[2][28][51]
GLBL_DMON_SEL bit 7	MAIN[2][29][51]
GLBL_DMON_SEL bit 8	MAIN[2][28][52]
GLBL_DMON_SEL bit 9	MAIN[2][29][52]
GLBL_DMON_SEL bit 10	MAIN[2][28][53]
GLBL_DMON_SEL bit 11	MAIN[2][29][53]
GLBL_DMON_SEL bit 12	MAIN[2][28][54]
GLBL_DMON_SEL bit 13	MAIN[2][29][54]
GLBL_DMON_SEL bit 14	MAIN[2][28][55]
GLBL_DMON_SEL bit 15	MAIN[2][29][55]
GLBL_PWR_CTRL bit 0	MAIN[4][28][0]
GLBL_PWR_CTRL bit 1	MAIN[4][29][0]
GLBL_PWR_CTRL bit 2	MAIN[4][28][1]
GLBL_PWR_CTRL bit 3	MAIN[4][29][1]
GLBL_PWR_CTRL bit 4	MAIN[4][28][2]
GLBL_PWR_CTRL bit 5	MAIN[4][29][2]
GLBL_PWR_CTRL bit 6	MAIN[4][28][3]
GLBL_PWR_CTRL bit 7	MAIN[4][29][3]
GLBL_PWR_CTRL bit 8	MAIN[4][28][4]
GLBL_PWR_CTRL bit 9	MAIN[4][29][4]
GLBL_PWR_CTRL bit 10	MAIN[4][28][5]
GLBL_PWR_CTRL bit 11	MAIN[4][29][5]
GLBL_PWR_CTRL bit 12	MAIN[4][28][6]
GLBL_PWR_CTRL bit 13	MAIN[4][29][6]
GLBL_PWR_CTRL bit 14	MAIN[4][28][7]
GLBL_PWR_CTRL bit 15	MAIN[4][29][7]
LANE_AMON_SEL bit 0	MAIN[2][28][40]
LANE_AMON_SEL bit 1	MAIN[2][29][40]
LANE_AMON_SEL bit 2	MAIN[2][28][41]
LANE_AMON_SEL bit 3	MAIN[2][29][41]
LANE_AMON_SEL bit 4	MAIN[2][28][42]
LANE_AMON_SEL bit 5	MAIN[2][29][42]
LANE_AMON_SEL bit 6	MAIN[2][28][43]
LANE_AMON_SEL bit 7	MAIN[2][29][43]
LANE_AMON_SEL bit 8	MAIN[2][28][44]
LANE_AMON_SEL bit 9	MAIN[2][29][44]
LANE_AMON_SEL bit 10	MAIN[2][28][45]
LANE_AMON_SEL bit 11	MAIN[2][29][45]
LANE_AMON_SEL bit 12	MAIN[2][28][46]
LANE_AMON_SEL bit 13	MAIN[2][29][46]
LANE_AMON_SEL bit 14	MAIN[2][28][47]
LANE_AMON_SEL bit 15	MAIN[2][29][47]
LANE_DMON_SEL bit 0	MAIN[2][28][56]
LANE_DMON_SEL bit 1	MAIN[2][29][56]
LANE_DMON_SEL bit 2	MAIN[2][28][57]
LANE_DMON_SEL bit 3	MAIN[2][29][57]
LANE_DMON_SEL bit 4	MAIN[2][28][58]
LANE_DMON_SEL bit 5	MAIN[2][29][58]
LANE_DMON_SEL bit 6	MAIN[2][28][59]
LANE_DMON_SEL bit 7	MAIN[2][29][59]
LANE_DMON_SEL bit 8	MAIN[2][28][60]
LANE_DMON_SEL bit 9	MAIN[2][29][60]
LANE_DMON_SEL bit 10	MAIN[2][28][61]
LANE_DMON_SEL bit 11	MAIN[2][29][61]
LANE_DMON_SEL bit 12	MAIN[2][28][62]
LANE_DMON_SEL bit 13	MAIN[2][29][62]
LANE_DMON_SEL bit 14	MAIN[2][28][63]
LANE_DMON_SEL bit 15	MAIN[2][29][63]
LANE_LNK_CFGOVRD bit 0	MAIN[10][28][40]
LANE_LNK_CFGOVRD bit 1	MAIN[10][29][40]
LANE_LNK_CFGOVRD bit 2	MAIN[10][28][41]
LANE_LNK_CFGOVRD bit 3	MAIN[10][29][41]
LANE_LNK_CFGOVRD bit 4	MAIN[10][28][42]
LANE_LNK_CFGOVRD bit 5	MAIN[10][29][42]
LANE_LNK_CFGOVRD bit 6	MAIN[10][28][43]
LANE_LNK_CFGOVRD bit 7	MAIN[10][29][43]
LANE_LNK_CFGOVRD bit 8	MAIN[10][28][44]
LANE_LNK_CFGOVRD bit 9	MAIN[10][29][44]
LANE_LNK_CFGOVRD bit 10	MAIN[10][28][45]
LANE_LNK_CFGOVRD bit 11	MAIN[10][29][45]
LANE_LNK_CFGOVRD bit 12	MAIN[10][28][46]
LANE_LNK_CFGOVRD bit 13	MAIN[10][29][46]
LANE_LNK_CFGOVRD bit 14	MAIN[10][28][47]
LANE_LNK_CFGOVRD bit 15	MAIN[10][29][47]
MISC_CFG bit 0	MAIN[2][28][16]
MISC_CFG bit 1	MAIN[2][29][16]
MISC_CFG bit 2	MAIN[2][28][17]
MISC_CFG bit 3	MAIN[2][29][17]
MISC_CFG bit 4	MAIN[2][28][18]
MISC_CFG bit 5	MAIN[2][29][18]
MISC_CFG bit 6	MAIN[2][28][19]
MISC_CFG bit 7	MAIN[2][29][19]
MISC_CFG bit 8	MAIN[2][28][20]
MISC_CFG bit 9	MAIN[2][29][20]
MISC_CFG bit 10	MAIN[2][28][21]
MISC_CFG bit 11	MAIN[2][29][21]
MISC_CFG bit 12	MAIN[2][28][22]
MISC_CFG bit 13	MAIN[2][29][22]
MISC_CFG bit 14	MAIN[2][28][23]
MISC_CFG bit 15	MAIN[2][29][23]
MODE_CFG1 bit 0	MAIN[12][28][56]
MODE_CFG1 bit 1	MAIN[12][29][56]
MODE_CFG1 bit 2	MAIN[12][28][57]
MODE_CFG1 bit 3	MAIN[12][29][57]
MODE_CFG1 bit 4	MAIN[12][28][58]
MODE_CFG1 bit 5	MAIN[12][29][58]
MODE_CFG1 bit 6	MAIN[12][28][59]
MODE_CFG1 bit 7	MAIN[12][29][59]
MODE_CFG1 bit 8	MAIN[12][28][60]
MODE_CFG1 bit 9	MAIN[12][29][60]
MODE_CFG1 bit 10	MAIN[12][28][61]
MODE_CFG1 bit 11	MAIN[12][29][61]
MODE_CFG1 bit 12	MAIN[12][28][62]
MODE_CFG1 bit 13	MAIN[12][29][62]
MODE_CFG1 bit 14	MAIN[12][28][63]
MODE_CFG1 bit 15	MAIN[12][29][63]
MODE_CFG2 bit 0	MAIN[13][28][0]
MODE_CFG2 bit 1	MAIN[13][29][0]
MODE_CFG2 bit 2	MAIN[13][28][1]
MODE_CFG2 bit 3	MAIN[13][29][1]
MODE_CFG2 bit 4	MAIN[13][28][2]
MODE_CFG2 bit 5	MAIN[13][29][2]
MODE_CFG2 bit 6	MAIN[13][28][3]
MODE_CFG2 bit 7	MAIN[13][29][3]
MODE_CFG2 bit 8	MAIN[13][28][4]
MODE_CFG2 bit 9	MAIN[13][29][4]
MODE_CFG2 bit 10	MAIN[13][28][5]
MODE_CFG2 bit 11	MAIN[13][29][5]
MODE_CFG2 bit 12	MAIN[13][28][6]
MODE_CFG2 bit 13	MAIN[13][29][6]
MODE_CFG2 bit 14	MAIN[13][28][7]
MODE_CFG2 bit 15	MAIN[13][29][7]
MODE_CFG3 bit 0	MAIN[13][28][8]
MODE_CFG3 bit 1	MAIN[13][29][8]
MODE_CFG3 bit 2	MAIN[13][28][9]
MODE_CFG3 bit 3	MAIN[13][29][9]
MODE_CFG3 bit 4	MAIN[13][28][10]
MODE_CFG3 bit 5	MAIN[13][29][10]
MODE_CFG3 bit 6	MAIN[13][28][11]
MODE_CFG3 bit 7	MAIN[13][29][11]
MODE_CFG3 bit 8	MAIN[13][28][12]
MODE_CFG3 bit 9	MAIN[13][29][12]
MODE_CFG3 bit 10	MAIN[13][28][13]
MODE_CFG3 bit 11	MAIN[13][29][13]
MODE_CFG3 bit 12	MAIN[13][28][14]
MODE_CFG3 bit 13	MAIN[13][29][14]
MODE_CFG3 bit 14	MAIN[13][28][15]
MODE_CFG3 bit 15	MAIN[13][29][15]
MODE_CFG4 bit 0	MAIN[13][28][16]
MODE_CFG4 bit 1	MAIN[13][29][16]
MODE_CFG4 bit 2	MAIN[13][28][17]
MODE_CFG4 bit 3	MAIN[13][29][17]
MODE_CFG4 bit 4	MAIN[13][28][18]
MODE_CFG4 bit 5	MAIN[13][29][18]
MODE_CFG4 bit 6	MAIN[13][28][19]
MODE_CFG4 bit 7	MAIN[13][29][19]
MODE_CFG4 bit 8	MAIN[13][28][20]
MODE_CFG4 bit 9	MAIN[13][29][20]
MODE_CFG4 bit 10	MAIN[13][28][21]
MODE_CFG4 bit 11	MAIN[13][29][21]
MODE_CFG4 bit 12	MAIN[13][28][22]
MODE_CFG4 bit 13	MAIN[13][29][22]
MODE_CFG4 bit 14	MAIN[13][28][23]
MODE_CFG4 bit 15	MAIN[13][29][23]
MODE_CFG5 bit 0	MAIN[13][28][24]
MODE_CFG5 bit 1	MAIN[13][29][24]
MODE_CFG5 bit 2	MAIN[13][28][25]
MODE_CFG5 bit 3	MAIN[13][29][25]
MODE_CFG5 bit 4	MAIN[13][28][26]
MODE_CFG5 bit 5	MAIN[13][29][26]
MODE_CFG5 bit 6	MAIN[13][28][27]
MODE_CFG5 bit 7	MAIN[13][29][27]
MODE_CFG5 bit 8	MAIN[13][28][28]
MODE_CFG5 bit 9	MAIN[13][29][28]
MODE_CFG5 bit 10	MAIN[13][28][29]
MODE_CFG5 bit 11	MAIN[13][29][29]
MODE_CFG5 bit 12	MAIN[13][28][30]
MODE_CFG5 bit 13	MAIN[13][29][30]
MODE_CFG5 bit 14	MAIN[13][28][31]
MODE_CFG5 bit 15	MAIN[13][29][31]
MODE_CFG6 bit 0	MAIN[13][28][32]
MODE_CFG6 bit 1	MAIN[13][29][32]
MODE_CFG6 bit 2	MAIN[13][28][33]
MODE_CFG6 bit 3	MAIN[13][29][33]
MODE_CFG6 bit 4	MAIN[13][28][34]
MODE_CFG6 bit 5	MAIN[13][29][34]
MODE_CFG6 bit 6	MAIN[13][28][35]
MODE_CFG6 bit 7	MAIN[13][29][35]
MODE_CFG6 bit 8	MAIN[13][28][36]
MODE_CFG6 bit 9	MAIN[13][29][36]
MODE_CFG6 bit 10	MAIN[13][28][37]
MODE_CFG6 bit 11	MAIN[13][29][37]
MODE_CFG6 bit 12	MAIN[13][28][38]
MODE_CFG6 bit 13	MAIN[13][29][38]
MODE_CFG6 bit 14	MAIN[13][28][39]
MODE_CFG6 bit 15	MAIN[13][29][39]
MODE_CFG7 bit 0	MAIN[13][28][40]
MODE_CFG7 bit 1	MAIN[13][29][40]
MODE_CFG7 bit 2	MAIN[13][28][41]
MODE_CFG7 bit 3	MAIN[13][29][41]
MODE_CFG7 bit 4	MAIN[13][28][42]
MODE_CFG7 bit 5	MAIN[13][29][42]
MODE_CFG7 bit 6	MAIN[13][28][43]
MODE_CFG7 bit 7	MAIN[13][29][43]
MODE_CFG7 bit 8	MAIN[13][28][44]
MODE_CFG7 bit 9	MAIN[13][29][44]
MODE_CFG7 bit 10	MAIN[13][28][45]
MODE_CFG7 bit 11	MAIN[13][29][45]
MODE_CFG7 bit 12	MAIN[13][28][46]
MODE_CFG7 bit 13	MAIN[13][29][46]
MODE_CFG7 bit 14	MAIN[13][28][47]
MODE_CFG7 bit 15	MAIN[13][29][47]
PLL_CFG0 bit 0	MAIN[1][28][56]
PLL_CFG0 bit 1	MAIN[1][29][56]
PLL_CFG0 bit 2	MAIN[1][28][57]
PLL_CFG0 bit 3	MAIN[1][29][57]
PLL_CFG0 bit 4	MAIN[1][28][58]
PLL_CFG0 bit 5	MAIN[1][29][58]
PLL_CFG0 bit 6	MAIN[1][28][59]
PLL_CFG0 bit 7	MAIN[1][29][59]
PLL_CFG0 bit 8	MAIN[1][28][60]
PLL_CFG0 bit 9	MAIN[1][29][60]
PLL_CFG0 bit 10	MAIN[1][28][61]
PLL_CFG0 bit 11	MAIN[1][29][61]
PLL_CFG0 bit 12	MAIN[1][28][62]
PLL_CFG0 bit 13	MAIN[1][29][62]
PLL_CFG0 bit 14	MAIN[1][28][63]
PLL_CFG0 bit 15	MAIN[1][29][63]
PLL_CFG1 bit 0	MAIN[2][28][0]
PLL_CFG1 bit 1	MAIN[2][29][0]
PLL_CFG1 bit 2	MAIN[2][28][1]
PLL_CFG1 bit 3	MAIN[2][29][1]
PLL_CFG1 bit 4	MAIN[2][28][2]
PLL_CFG1 bit 5	MAIN[2][29][2]
PLL_CFG1 bit 6	MAIN[2][28][3]
PLL_CFG1 bit 7	MAIN[2][29][3]
PLL_CFG1 bit 8	MAIN[2][28][4]
PLL_CFG1 bit 9	MAIN[2][29][4]
PLL_CFG1 bit 10	MAIN[2][28][5]
PLL_CFG1 bit 11	MAIN[2][29][5]
PLL_CFG1 bit 12	MAIN[2][28][6]
PLL_CFG1 bit 13	MAIN[2][29][6]
PLL_CFG1 bit 14	MAIN[2][28][7]
PLL_CFG1 bit 15	MAIN[2][29][7]
PLL_CFG2 bit 0	MAIN[3][28][8]
PLL_CFG2 bit 1	MAIN[3][29][8]
PLL_CFG2 bit 2	MAIN[3][28][9]
PLL_CFG2 bit 3	MAIN[3][29][9]
PLL_CFG2 bit 4	MAIN[3][28][10]
PLL_CFG2 bit 5	MAIN[3][29][10]
PLL_CFG2 bit 6	MAIN[3][28][11]
PLL_CFG2 bit 7	MAIN[3][29][11]
PLL_CFG2 bit 8	MAIN[3][28][12]
PLL_CFG2 bit 9	MAIN[3][29][12]
PLL_CFG2 bit 10	MAIN[3][28][13]
PLL_CFG2 bit 11	MAIN[3][29][13]
PLL_CFG2 bit 12	MAIN[3][28][14]
PLL_CFG2 bit 13	MAIN[3][29][14]
PLL_CFG2 bit 14	MAIN[3][28][15]
PLL_CFG2 bit 15	MAIN[3][29][15]
PTRN_CFG0_LSB bit 0	MAIN[10][28][56]
PTRN_CFG0_LSB bit 1	MAIN[10][29][56]
PTRN_CFG0_LSB bit 2	MAIN[10][28][57]
PTRN_CFG0_LSB bit 3	MAIN[10][29][57]
PTRN_CFG0_LSB bit 4	MAIN[10][28][58]
PTRN_CFG0_LSB bit 5	MAIN[10][29][58]
PTRN_CFG0_LSB bit 6	MAIN[10][28][59]
PTRN_CFG0_LSB bit 7	MAIN[10][29][59]
PTRN_CFG0_LSB bit 8	MAIN[10][28][60]
PTRN_CFG0_LSB bit 9	MAIN[10][29][60]
PTRN_CFG0_LSB bit 10	MAIN[10][28][61]
PTRN_CFG0_LSB bit 11	MAIN[10][29][61]
PTRN_CFG0_LSB bit 12	MAIN[10][28][62]
PTRN_CFG0_LSB bit 13	MAIN[10][29][62]
PTRN_CFG0_LSB bit 14	MAIN[10][28][63]
PTRN_CFG0_LSB bit 15	MAIN[10][29][63]
PTRN_CFG0_MSB bit 0	MAIN[10][28][48]
PTRN_CFG0_MSB bit 1	MAIN[10][29][48]
PTRN_CFG0_MSB bit 2	MAIN[10][28][49]
PTRN_CFG0_MSB bit 3	MAIN[10][29][49]
PTRN_CFG0_MSB bit 4	MAIN[10][28][50]
PTRN_CFG0_MSB bit 5	MAIN[10][29][50]
PTRN_CFG0_MSB bit 6	MAIN[10][28][51]
PTRN_CFG0_MSB bit 7	MAIN[10][29][51]
PTRN_CFG0_MSB bit 8	MAIN[10][28][52]
PTRN_CFG0_MSB bit 9	MAIN[10][29][52]
PTRN_CFG0_MSB bit 10	MAIN[10][28][53]
PTRN_CFG0_MSB bit 11	MAIN[10][29][53]
PTRN_CFG0_MSB bit 12	MAIN[10][28][54]
PTRN_CFG0_MSB bit 13	MAIN[10][29][54]
PTRN_CFG0_MSB bit 14	MAIN[10][28][55]
PTRN_CFG0_MSB bit 15	MAIN[10][29][55]
PTRN_LEN_CFG bit 0	MAIN[11][28][0]
PTRN_LEN_CFG bit 1	MAIN[11][29][0]
PTRN_LEN_CFG bit 2	MAIN[11][28][1]
PTRN_LEN_CFG bit 3	MAIN[11][29][1]
PTRN_LEN_CFG bit 4	MAIN[11][28][2]
PTRN_LEN_CFG bit 5	MAIN[11][29][2]
PTRN_LEN_CFG bit 6	MAIN[11][28][3]
PTRN_LEN_CFG bit 7	MAIN[11][29][3]
PTRN_LEN_CFG bit 8	MAIN[11][28][4]
PTRN_LEN_CFG bit 9	MAIN[11][29][4]
PTRN_LEN_CFG bit 10	MAIN[11][28][5]
PTRN_LEN_CFG bit 11	MAIN[11][29][5]
PTRN_LEN_CFG bit 12	MAIN[11][28][6]
PTRN_LEN_CFG bit 13	MAIN[11][29][6]
PTRN_LEN_CFG bit 14	MAIN[11][28][7]
PTRN_LEN_CFG bit 15	MAIN[11][29][7]
PWRUP_DLY bit 0	MAIN[4][28][8]
PWRUP_DLY bit 1	MAIN[4][29][8]
PWRUP_DLY bit 2	MAIN[4][28][9]
PWRUP_DLY bit 3	MAIN[4][29][9]
PWRUP_DLY bit 4	MAIN[4][28][10]
PWRUP_DLY bit 5	MAIN[4][29][10]
PWRUP_DLY bit 6	MAIN[4][28][11]
PWRUP_DLY bit 7	MAIN[4][29][11]
PWRUP_DLY bit 8	MAIN[4][28][12]
PWRUP_DLY bit 9	MAIN[4][29][12]
PWRUP_DLY bit 10	MAIN[4][28][13]
PWRUP_DLY bit 11	MAIN[4][29][13]
PWRUP_DLY bit 12	MAIN[4][28][14]
PWRUP_DLY bit 13	MAIN[4][29][14]
PWRUP_DLY bit 14	MAIN[4][28][15]
PWRUP_DLY bit 15	MAIN[4][29][15]
RX_P0S_CTRL bit 0	MAIN[3][28][24]
RX_P0S_CTRL bit 1	MAIN[3][29][24]
RX_P0S_CTRL bit 2	MAIN[3][28][25]
RX_P0S_CTRL bit 3	MAIN[3][29][25]
RX_P0S_CTRL bit 4	MAIN[3][28][26]
RX_P0S_CTRL bit 5	MAIN[3][29][26]
RX_P0S_CTRL bit 6	MAIN[3][28][27]
RX_P0S_CTRL bit 7	MAIN[3][29][27]
RX_P0S_CTRL bit 8	MAIN[3][28][28]
RX_P0S_CTRL bit 9	MAIN[3][29][28]
RX_P0S_CTRL bit 10	MAIN[3][28][29]
RX_P0S_CTRL bit 11	MAIN[3][29][29]
RX_P0S_CTRL bit 12	MAIN[3][28][30]
RX_P0S_CTRL bit 13	MAIN[3][29][30]
RX_P0S_CTRL bit 14	MAIN[3][28][31]
RX_P0S_CTRL bit 15	MAIN[3][29][31]
RX_P0_CTRL bit 0	MAIN[3][28][16]
RX_P0_CTRL bit 1	MAIN[3][29][16]
RX_P0_CTRL bit 2	MAIN[3][28][17]
RX_P0_CTRL bit 3	MAIN[3][29][17]
RX_P0_CTRL bit 4	MAIN[3][28][18]
RX_P0_CTRL bit 5	MAIN[3][29][18]
RX_P0_CTRL bit 6	MAIN[3][28][19]
RX_P0_CTRL bit 7	MAIN[3][29][19]
RX_P0_CTRL bit 8	MAIN[3][28][20]
RX_P0_CTRL bit 9	MAIN[3][29][20]
RX_P0_CTRL bit 10	MAIN[3][28][21]
RX_P0_CTRL bit 11	MAIN[3][29][21]
RX_P0_CTRL bit 12	MAIN[3][28][22]
RX_P0_CTRL bit 13	MAIN[3][29][22]
RX_P0_CTRL bit 14	MAIN[3][28][23]
RX_P0_CTRL bit 15	MAIN[3][29][23]
RX_P1_CTRL bit 0	MAIN[3][28][32]
RX_P1_CTRL bit 1	MAIN[3][29][32]
RX_P1_CTRL bit 2	MAIN[3][28][33]
RX_P1_CTRL bit 3	MAIN[3][29][33]
RX_P1_CTRL bit 4	MAIN[3][28][34]
RX_P1_CTRL bit 5	MAIN[3][29][34]
RX_P1_CTRL bit 6	MAIN[3][28][35]
RX_P1_CTRL bit 7	MAIN[3][29][35]
RX_P1_CTRL bit 8	MAIN[3][28][36]
RX_P1_CTRL bit 9	MAIN[3][29][36]
RX_P1_CTRL bit 10	MAIN[3][28][37]
RX_P1_CTRL bit 11	MAIN[3][29][37]
RX_P1_CTRL bit 12	MAIN[3][28][38]
RX_P1_CTRL bit 13	MAIN[3][29][38]
RX_P1_CTRL bit 14	MAIN[3][28][39]
RX_P1_CTRL bit 15	MAIN[3][29][39]
RX_P2_CTRL bit 0	MAIN[3][28][40]
RX_P2_CTRL bit 1	MAIN[3][29][40]
RX_P2_CTRL bit 2	MAIN[3][28][41]
RX_P2_CTRL bit 3	MAIN[3][29][41]
RX_P2_CTRL bit 4	MAIN[3][28][42]
RX_P2_CTRL bit 5	MAIN[3][29][42]
RX_P2_CTRL bit 6	MAIN[3][28][43]
RX_P2_CTRL bit 7	MAIN[3][29][43]
RX_P2_CTRL bit 8	MAIN[3][28][44]
RX_P2_CTRL bit 9	MAIN[3][29][44]
RX_P2_CTRL bit 10	MAIN[3][28][45]
RX_P2_CTRL bit 11	MAIN[3][29][45]
RX_P2_CTRL bit 12	MAIN[3][28][46]
RX_P2_CTRL bit 13	MAIN[3][29][46]
RX_P2_CTRL bit 14	MAIN[3][28][47]
RX_P2_CTRL bit 15	MAIN[3][29][47]
RX_PI_CTRL0 bit 0	MAIN[4][28][24]
RX_PI_CTRL0 bit 1	MAIN[4][29][24]
RX_PI_CTRL0 bit 2	MAIN[4][28][25]
RX_PI_CTRL0 bit 3	MAIN[4][29][25]
RX_PI_CTRL0 bit 4	MAIN[4][28][26]
RX_PI_CTRL0 bit 5	MAIN[4][29][26]
RX_PI_CTRL0 bit 6	MAIN[4][28][27]
RX_PI_CTRL0 bit 7	MAIN[4][29][27]
RX_PI_CTRL0 bit 8	MAIN[4][28][28]
RX_PI_CTRL0 bit 9	MAIN[4][29][28]
RX_PI_CTRL0 bit 10	MAIN[4][28][29]
RX_PI_CTRL0 bit 11	MAIN[4][29][29]
RX_PI_CTRL0 bit 12	MAIN[4][28][30]
RX_PI_CTRL0 bit 13	MAIN[4][29][30]
RX_PI_CTRL0 bit 14	MAIN[4][28][31]
RX_PI_CTRL0 bit 15	MAIN[4][29][31]
RX_PI_CTRL1 bit 0	MAIN[4][28][32]
RX_PI_CTRL1 bit 1	MAIN[4][29][32]
RX_PI_CTRL1 bit 2	MAIN[4][28][33]
RX_PI_CTRL1 bit 3	MAIN[4][29][33]
RX_PI_CTRL1 bit 4	MAIN[4][28][34]
RX_PI_CTRL1 bit 5	MAIN[4][29][34]
RX_PI_CTRL1 bit 6	MAIN[4][28][35]
RX_PI_CTRL1 bit 7	MAIN[4][29][35]
RX_PI_CTRL1 bit 8	MAIN[4][28][36]
RX_PI_CTRL1 bit 9	MAIN[4][29][36]
RX_PI_CTRL1 bit 10	MAIN[4][28][37]
RX_PI_CTRL1 bit 11	MAIN[4][29][37]
RX_PI_CTRL1 bit 12	MAIN[4][28][38]
RX_PI_CTRL1 bit 13	MAIN[4][29][38]
RX_PI_CTRL1 bit 14	MAIN[4][28][39]
RX_PI_CTRL1 bit 15	MAIN[4][29][39]
SLICE_CFG bit 0	MAIN[2][28][24]
SLICE_CFG bit 1	MAIN[2][29][24]
SLICE_CFG bit 2	MAIN[2][28][25]
SLICE_CFG bit 3	MAIN[2][29][25]
SLICE_CFG bit 4	MAIN[2][28][26]
SLICE_CFG bit 5	MAIN[2][29][26]
SLICE_CFG bit 6	MAIN[2][28][27]
SLICE_CFG bit 7	MAIN[2][29][27]
SLICE_CFG bit 8	MAIN[2][28][28]
SLICE_CFG bit 9	MAIN[2][29][28]
SLICE_CFG bit 10	MAIN[2][28][29]
SLICE_CFG bit 11	MAIN[2][29][29]
SLICE_CFG bit 12	MAIN[2][28][30]
SLICE_CFG bit 13	MAIN[2][29][30]
SLICE_CFG bit 14	MAIN[2][28][31]
SLICE_CFG bit 15	MAIN[2][29][31]
SLICE_NOISE_CTRL_0_LANE01 bit 0	MAIN[12][28][24]
SLICE_NOISE_CTRL_0_LANE01 bit 1	MAIN[12][29][24]
SLICE_NOISE_CTRL_0_LANE01 bit 2	MAIN[12][28][25]
SLICE_NOISE_CTRL_0_LANE01 bit 3	MAIN[12][29][25]
SLICE_NOISE_CTRL_0_LANE01 bit 4	MAIN[12][28][26]
SLICE_NOISE_CTRL_0_LANE01 bit 5	MAIN[12][29][26]
SLICE_NOISE_CTRL_0_LANE01 bit 6	MAIN[12][28][27]
SLICE_NOISE_CTRL_0_LANE01 bit 7	MAIN[12][29][27]
SLICE_NOISE_CTRL_0_LANE01 bit 8	MAIN[12][28][28]
SLICE_NOISE_CTRL_0_LANE01 bit 9	MAIN[12][29][28]
SLICE_NOISE_CTRL_0_LANE01 bit 10	MAIN[12][28][29]
SLICE_NOISE_CTRL_0_LANE01 bit 11	MAIN[12][29][29]
SLICE_NOISE_CTRL_0_LANE01 bit 12	MAIN[12][28][30]
SLICE_NOISE_CTRL_0_LANE01 bit 13	MAIN[12][29][30]
SLICE_NOISE_CTRL_0_LANE01 bit 14	MAIN[12][28][31]
SLICE_NOISE_CTRL_0_LANE01 bit 15	MAIN[12][29][31]
SLICE_NOISE_CTRL_0_LANE23 bit 0	MAIN[27][28][48]
SLICE_NOISE_CTRL_0_LANE23 bit 1	MAIN[27][29][48]
SLICE_NOISE_CTRL_0_LANE23 bit 2	MAIN[27][28][49]
SLICE_NOISE_CTRL_0_LANE23 bit 3	MAIN[27][29][49]
SLICE_NOISE_CTRL_0_LANE23 bit 4	MAIN[27][28][50]
SLICE_NOISE_CTRL_0_LANE23 bit 5	MAIN[27][29][50]
SLICE_NOISE_CTRL_0_LANE23 bit 6	MAIN[27][28][51]
SLICE_NOISE_CTRL_0_LANE23 bit 7	MAIN[27][29][51]
SLICE_NOISE_CTRL_0_LANE23 bit 8	MAIN[27][28][52]
SLICE_NOISE_CTRL_0_LANE23 bit 9	MAIN[27][29][52]
SLICE_NOISE_CTRL_0_LANE23 bit 10	MAIN[27][28][53]
SLICE_NOISE_CTRL_0_LANE23 bit 11	MAIN[27][29][53]
SLICE_NOISE_CTRL_0_LANE23 bit 12	MAIN[27][28][54]
SLICE_NOISE_CTRL_0_LANE23 bit 13	MAIN[27][29][54]
SLICE_NOISE_CTRL_0_LANE23 bit 14	MAIN[27][28][55]
SLICE_NOISE_CTRL_0_LANE23 bit 15	MAIN[27][29][55]
SLICE_NOISE_CTRL_1_LANE01 bit 0	MAIN[12][28][32]
SLICE_NOISE_CTRL_1_LANE01 bit 1	MAIN[12][29][32]
SLICE_NOISE_CTRL_1_LANE01 bit 2	MAIN[12][28][33]
SLICE_NOISE_CTRL_1_LANE01 bit 3	MAIN[12][29][33]
SLICE_NOISE_CTRL_1_LANE01 bit 4	MAIN[12][28][34]
SLICE_NOISE_CTRL_1_LANE01 bit 5	MAIN[12][29][34]
SLICE_NOISE_CTRL_1_LANE01 bit 6	MAIN[12][28][35]
SLICE_NOISE_CTRL_1_LANE01 bit 7	MAIN[12][29][35]
SLICE_NOISE_CTRL_1_LANE01 bit 8	MAIN[12][28][36]
SLICE_NOISE_CTRL_1_LANE01 bit 9	MAIN[12][29][36]
SLICE_NOISE_CTRL_1_LANE01 bit 10	MAIN[12][28][37]
SLICE_NOISE_CTRL_1_LANE01 bit 11	MAIN[12][29][37]
SLICE_NOISE_CTRL_1_LANE01 bit 12	MAIN[12][28][38]
SLICE_NOISE_CTRL_1_LANE01 bit 13	MAIN[12][29][38]
SLICE_NOISE_CTRL_1_LANE01 bit 14	MAIN[12][28][39]
SLICE_NOISE_CTRL_1_LANE01 bit 15	MAIN[12][29][39]
SLICE_NOISE_CTRL_1_LANE23 bit 0	MAIN[27][28][56]
SLICE_NOISE_CTRL_1_LANE23 bit 1	MAIN[27][29][56]
SLICE_NOISE_CTRL_1_LANE23 bit 2	MAIN[27][28][57]
SLICE_NOISE_CTRL_1_LANE23 bit 3	MAIN[27][29][57]
SLICE_NOISE_CTRL_1_LANE23 bit 4	MAIN[27][28][58]
SLICE_NOISE_CTRL_1_LANE23 bit 5	MAIN[27][29][58]
SLICE_NOISE_CTRL_1_LANE23 bit 6	MAIN[27][28][59]
SLICE_NOISE_CTRL_1_LANE23 bit 7	MAIN[27][29][59]
SLICE_NOISE_CTRL_1_LANE23 bit 8	MAIN[27][28][60]
SLICE_NOISE_CTRL_1_LANE23 bit 9	MAIN[27][29][60]
SLICE_NOISE_CTRL_1_LANE23 bit 10	MAIN[27][28][61]
SLICE_NOISE_CTRL_1_LANE23 bit 11	MAIN[27][29][61]
SLICE_NOISE_CTRL_1_LANE23 bit 12	MAIN[27][28][62]
SLICE_NOISE_CTRL_1_LANE23 bit 13	MAIN[27][29][62]
SLICE_NOISE_CTRL_1_LANE23 bit 14	MAIN[27][28][63]
SLICE_NOISE_CTRL_1_LANE23 bit 15	MAIN[27][29][63]
SLICE_NOISE_CTRL_2_LANE01 bit 0	MAIN[12][28][40]
SLICE_NOISE_CTRL_2_LANE01 bit 1	MAIN[12][29][40]
SLICE_NOISE_CTRL_2_LANE01 bit 2	MAIN[12][28][41]
SLICE_NOISE_CTRL_2_LANE01 bit 3	MAIN[12][29][41]
SLICE_NOISE_CTRL_2_LANE01 bit 4	MAIN[12][28][42]
SLICE_NOISE_CTRL_2_LANE01 bit 5	MAIN[12][29][42]
SLICE_NOISE_CTRL_2_LANE01 bit 6	MAIN[12][28][43]
SLICE_NOISE_CTRL_2_LANE01 bit 7	MAIN[12][29][43]
SLICE_NOISE_CTRL_2_LANE01 bit 8	MAIN[12][28][44]
SLICE_NOISE_CTRL_2_LANE01 bit 9	MAIN[12][29][44]
SLICE_NOISE_CTRL_2_LANE01 bit 10	MAIN[12][28][45]
SLICE_NOISE_CTRL_2_LANE01 bit 11	MAIN[12][29][45]
SLICE_NOISE_CTRL_2_LANE01 bit 12	MAIN[12][28][46]
SLICE_NOISE_CTRL_2_LANE01 bit 13	MAIN[12][29][46]
SLICE_NOISE_CTRL_2_LANE01 bit 14	MAIN[12][28][47]
SLICE_NOISE_CTRL_2_LANE01 bit 15	MAIN[12][29][47]
SLICE_NOISE_CTRL_2_LANE23 bit 0	MAIN[28][28][0]
SLICE_NOISE_CTRL_2_LANE23 bit 1	MAIN[28][29][0]
SLICE_NOISE_CTRL_2_LANE23 bit 2	MAIN[28][28][1]
SLICE_NOISE_CTRL_2_LANE23 bit 3	MAIN[28][29][1]
SLICE_NOISE_CTRL_2_LANE23 bit 4	MAIN[28][28][2]
SLICE_NOISE_CTRL_2_LANE23 bit 5	MAIN[28][29][2]
SLICE_NOISE_CTRL_2_LANE23 bit 6	MAIN[28][28][3]
SLICE_NOISE_CTRL_2_LANE23 bit 7	MAIN[28][29][3]
SLICE_NOISE_CTRL_2_LANE23 bit 8	MAIN[28][28][4]
SLICE_NOISE_CTRL_2_LANE23 bit 9	MAIN[28][29][4]
SLICE_NOISE_CTRL_2_LANE23 bit 10	MAIN[28][28][5]
SLICE_NOISE_CTRL_2_LANE23 bit 11	MAIN[28][29][5]
SLICE_NOISE_CTRL_2_LANE23 bit 12	MAIN[28][28][6]
SLICE_NOISE_CTRL_2_LANE23 bit 13	MAIN[28][29][6]
SLICE_NOISE_CTRL_2_LANE23 bit 14	MAIN[28][28][7]
SLICE_NOISE_CTRL_2_LANE23 bit 15	MAIN[28][29][7]
SLICE_TX_RESET_LANE01 bit 0	MAIN[12][28][48]
SLICE_TX_RESET_LANE01 bit 1	MAIN[12][29][48]
SLICE_TX_RESET_LANE01 bit 2	MAIN[12][28][49]
SLICE_TX_RESET_LANE01 bit 3	MAIN[12][29][49]
SLICE_TX_RESET_LANE01 bit 4	MAIN[12][28][50]
SLICE_TX_RESET_LANE01 bit 5	MAIN[12][29][50]
SLICE_TX_RESET_LANE01 bit 6	MAIN[12][28][51]
SLICE_TX_RESET_LANE01 bit 7	MAIN[12][29][51]
SLICE_TX_RESET_LANE01 bit 8	MAIN[12][28][52]
SLICE_TX_RESET_LANE01 bit 9	MAIN[12][29][52]
SLICE_TX_RESET_LANE01 bit 10	MAIN[12][28][53]
SLICE_TX_RESET_LANE01 bit 11	MAIN[12][29][53]
SLICE_TX_RESET_LANE01 bit 12	MAIN[12][28][54]
SLICE_TX_RESET_LANE01 bit 13	MAIN[12][29][54]
SLICE_TX_RESET_LANE01 bit 14	MAIN[12][28][55]
SLICE_TX_RESET_LANE01 bit 15	MAIN[12][29][55]
SLICE_TX_RESET_LANE23 bit 0	MAIN[28][28][8]
SLICE_TX_RESET_LANE23 bit 1	MAIN[28][29][8]
SLICE_TX_RESET_LANE23 bit 2	MAIN[28][28][9]
SLICE_TX_RESET_LANE23 bit 3	MAIN[28][29][9]
SLICE_TX_RESET_LANE23 bit 4	MAIN[28][28][10]
SLICE_TX_RESET_LANE23 bit 5	MAIN[28][29][10]
SLICE_TX_RESET_LANE23 bit 6	MAIN[28][28][11]
SLICE_TX_RESET_LANE23 bit 7	MAIN[28][29][11]
SLICE_TX_RESET_LANE23 bit 8	MAIN[28][28][12]
SLICE_TX_RESET_LANE23 bit 9	MAIN[28][29][12]
SLICE_TX_RESET_LANE23 bit 10	MAIN[28][28][13]
SLICE_TX_RESET_LANE23 bit 11	MAIN[28][29][13]
SLICE_TX_RESET_LANE23 bit 12	MAIN[28][28][14]
SLICE_TX_RESET_LANE23 bit 13	MAIN[28][29][14]
SLICE_TX_RESET_LANE23 bit 14	MAIN[28][28][15]
SLICE_TX_RESET_LANE23 bit 15	MAIN[28][29][15]
TX_P0P0S_CTRL bit 0	MAIN[3][28][48]
TX_P0P0S_CTRL bit 1	MAIN[3][29][48]
TX_P0P0S_CTRL bit 2	MAIN[3][28][49]
TX_P0P0S_CTRL bit 3	MAIN[3][29][49]
TX_P0P0S_CTRL bit 4	MAIN[3][28][50]
TX_P0P0S_CTRL bit 5	MAIN[3][29][50]
TX_P0P0S_CTRL bit 6	MAIN[3][28][51]
TX_P0P0S_CTRL bit 7	MAIN[3][29][51]
TX_P0P0S_CTRL bit 8	MAIN[3][28][52]
TX_P0P0S_CTRL bit 9	MAIN[3][29][52]
TX_P0P0S_CTRL bit 10	MAIN[3][28][53]
TX_P0P0S_CTRL bit 11	MAIN[3][29][53]
TX_P0P0S_CTRL bit 12	MAIN[3][28][54]
TX_P0P0S_CTRL bit 13	MAIN[3][29][54]
TX_P0P0S_CTRL bit 14	MAIN[3][28][55]
TX_P0P0S_CTRL bit 15	MAIN[3][29][55]
TX_P1P2_CTRL bit 0	MAIN[3][28][56]
TX_P1P2_CTRL bit 1	MAIN[3][29][56]
TX_P1P2_CTRL bit 2	MAIN[3][28][57]
TX_P1P2_CTRL bit 3	MAIN[3][29][57]
TX_P1P2_CTRL bit 4	MAIN[3][28][58]
TX_P1P2_CTRL bit 5	MAIN[3][29][58]
TX_P1P2_CTRL bit 6	MAIN[3][28][59]
TX_P1P2_CTRL bit 7	MAIN[3][29][59]
TX_P1P2_CTRL bit 8	MAIN[3][28][60]
TX_P1P2_CTRL bit 9	MAIN[3][29][60]
TX_P1P2_CTRL bit 10	MAIN[3][28][61]
TX_P1P2_CTRL bit 11	MAIN[3][29][61]
TX_P1P2_CTRL bit 12	MAIN[3][28][62]
TX_P1P2_CTRL bit 13	MAIN[3][29][62]
TX_P1P2_CTRL bit 14	MAIN[3][28][63]
TX_P1P2_CTRL bit 15	MAIN[3][29][63]

virtex6 GTH enum GTH_QUAD_CLKTESTSIG_SEL
GTH_QUAD.CLKTESTSIG_SEL	MAIN[9][28][40]
CLKTESTSIG	1
USER_OPERATION	0

virtex6 GTH enum GTH_QUAD_MUX_REFCLK
GTH_QUAD.MUX_REFCLK	MAIN[3][29][14]	MAIN[3][28][14]	MAIN[3][29][13]	MAIN[3][28][13]
NONE	0	0	0	0
REFCLK_IN	0	0	0	1
GREFCLK	0	0	1	1
REFCLK_NORTH	0	1	0	1
REFCLK_SOUTH	1	1	0	1

virtex6 GTH enum GTH_QUAD_FABRIC_WIDTH
GTH_QUAD.RX_FABRIC_WIDTH0	MAIN[9][29][53]	MAIN[9][28][53]	MAIN[9][29][52]
GTH_QUAD.TX_FABRIC_WIDTH0	MAIN[9][29][55]	MAIN[9][28][55]	MAIN[9][29][54]
GTH_QUAD.RX_FABRIC_WIDTH1	MAIN[10][29][13]	MAIN[10][28][13]	MAIN[10][29][12]
GTH_QUAD.TX_FABRIC_WIDTH1	MAIN[10][29][15]	MAIN[10][28][15]	MAIN[10][29][14]
GTH_QUAD.RX_FABRIC_WIDTH2	MAIN[30][29][13]	MAIN[30][28][13]	MAIN[30][29][12]
GTH_QUAD.TX_FABRIC_WIDTH2	MAIN[30][29][15]	MAIN[30][28][15]	MAIN[30][29][14]
GTH_QUAD.RX_FABRIC_WIDTH3	MAIN[29][29][53]	MAIN[29][28][53]	MAIN[29][29][52]
GTH_QUAD.TX_FABRIC_WIDTH3	MAIN[29][29][55]	MAIN[29][28][55]	MAIN[29][29][54]
_16_20	0	0	0
_32	0	1	1
_40	1	0	1
_64	0	1	0
_80	1	1	0
_64_66	1	1	1

Bel wires

virtex6 GTH bel wires
Wire	Pins
CELL[0].OUT_BEL[2]	GTH_QUAD.TXDATATAP10
CELL[0].OUT_BEL[6]	GTH_QUAD.TXCTRLACK0
CELL[0].OUT_BEL[17]	GTH_QUAD.GTHINITDONE
CELL[1].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA0[28]
CELL[1].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[0]
CELL[1].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA0[24]
CELL[1].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA0[56]
CELL[1].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA0[36]
CELL[1].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL0[7]
CELL[1].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA0[32]
CELL[1].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA0[48]
CELL[1].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA0[20]
CELL[1].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA0[40]
CELL[1].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA0[16]
CELL[1].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA0[60]
CELL[1].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL0[0]
CELL[1].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA0[12]
CELL[1].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA0[8]
CELL[1].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA0[52]
CELL[1].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA0[44]
CELL[1].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA0[4]
CELL[1].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA0[0]
CELL[1].OUT_BEL[3]	GTH_QUAD.RXCODEERR0[2]
CELL[1].OUT_BEL[4]	GTH_QUAD.SCANOUT[0]
CELL[1].OUT_BEL[6]	GTH_QUAD.RXCODEERR0[6]
CELL[1].OUT_BEL[8]	GTH_QUAD.RXDISPERR0[6]
CELL[1].OUT_BEL[9]	GTH_QUAD.RXDISPERR0[4]
CELL[1].OUT_BEL[20]	GTH_QUAD.RXDISPERR0[0]
CELL[1].OUT_BEL[21]	GTH_QUAD.RXCODEERR0[0]
CELL[1].OUT_BEL[23]	GTH_QUAD.RXDISPERR0[2]
CELL[2].IMUX_CLK[1]	GTH_QUAD.TXUSERCLKIN0
CELL[2].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA0[29]
CELL[2].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA0[25]
CELL[2].IMUX_IMUX_DELAY[7]	GTH_QUAD.TXDATAMSB0[0]
CELL[2].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA0[57]
CELL[2].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA0[37]
CELL[2].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL0[6]
CELL[2].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA0[33]
CELL[2].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA0[49]
CELL[2].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA0[21]
CELL[2].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA0[41]
CELL[2].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA0[17]
CELL[2].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA0[61]
CELL[2].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL0[1]
CELL[2].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA0[13]
CELL[2].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB0[1]
CELL[2].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA0[9]
CELL[2].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA0[53]
CELL[2].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA0[45]
CELL[2].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA0[5]
CELL[2].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA0[1]
CELL[2].OUT_BEL[3]	GTH_QUAD.RXCODEERR0[3]
CELL[2].OUT_BEL[6]	GTH_QUAD.RXCODEERR0[7]
CELL[2].OUT_BEL[7]	GTH_QUAD.RXCODEERR0[5]
CELL[2].OUT_BEL[8]	GTH_QUAD.RXDISPERR0[7]
CELL[2].OUT_BEL[9]	GTH_QUAD.RXDISPERR0[5]
CELL[2].OUT_BEL[17]	GTH_QUAD.RXCODEERR0[4]
CELL[2].OUT_BEL[20]	GTH_QUAD.RXDISPERR0[1]
CELL[2].OUT_BEL[21]	GTH_QUAD.RXCODEERR0[1]
CELL[2].OUT_BEL[23]	GTH_QUAD.RXDISPERR0[3]
CELL[3].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA0[30]
CELL[3].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[1]
CELL[3].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA0[26]
CELL[3].IMUX_IMUX_DELAY[7]	GTH_QUAD.TXDATAMSB0[4]
CELL[3].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA0[58]
CELL[3].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA0[38]
CELL[3].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL0[5]
CELL[3].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA0[34]
CELL[3].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXDATAMSB0[3]
CELL[3].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA0[50]
CELL[3].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATAMSB0[2]
CELL[3].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA0[22]
CELL[3].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA0[42]
CELL[3].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA0[18]
CELL[3].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA0[62]
CELL[3].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL0[2]
CELL[3].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA0[14]
CELL[3].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB0[5]
CELL[3].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA0[10]
CELL[3].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA0[54]
CELL[3].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA0[46]
CELL[3].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA0[6]
CELL[3].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA0[2]
CELL[3].IMUX_IMUX_DELAY[42]	GTH_QUAD.RXENCOMMADET0
CELL[3].OUT_BEL[2]	GTH_QUAD.TXDATATAP20
CELL[3].OUT_BEL[3]	GTH_QUAD.RXDATA0[60]
CELL[3].OUT_BEL[4]	GTH_QUAD.SCANOUT[1]
CELL[3].OUT_BEL[6]	GTH_QUAD.RXDATA0[58]
CELL[3].OUT_BEL[7]	GTH_QUAD.RXDATA0[61]
CELL[3].OUT_BEL[8]	GTH_QUAD.RXDATA0[63]
CELL[3].OUT_BEL[9]	GTH_QUAD.RXDATA0[59]
CELL[3].OUT_BEL[17]	GTH_QUAD.RXDATA0[57]
CELL[3].OUT_BEL[20]	GTH_QUAD.RXDATA0[62]
CELL[3].OUT_BEL[21]	GTH_QUAD.RXDATA0[56]
CELL[3].OUT_BEL[23]	GTH_QUAD.RXDATA0[55]
CELL[4].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA0[31]
CELL[4].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANENB
CELL[4].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA0[27]
CELL[4].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA0[59]
CELL[4].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA0[39]
CELL[4].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL0[4]
CELL[4].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA0[35]
CELL[4].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXDATAMSB0[7]
CELL[4].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA0[51]
CELL[4].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATAMSB0[6]
CELL[4].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA0[23]
CELL[4].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA0[43]
CELL[4].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA0[19]
CELL[4].IMUX_IMUX_DELAY[24]	GTH_QUAD.RXSLIP0
CELL[4].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA0[63]
CELL[4].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL0[3]
CELL[4].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA0[15]
CELL[4].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA0[11]
CELL[4].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA0[55]
CELL[4].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA0[47]
CELL[4].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA0[7]
CELL[4].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA0[3]
CELL[4].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDEEMPH0
CELL[4].OUT_BEL[2]	GTH_QUAD.TXPCSCLKSMPL0
CELL[4].OUT_BEL[3]	GTH_QUAD.RXDATA0[53]
CELL[4].OUT_BEL[6]	GTH_QUAD.RXDATA0[48]
CELL[4].OUT_BEL[7]	GTH_QUAD.RXDATA0[54]
CELL[4].OUT_BEL[8]	GTH_QUAD.RXDATA0[51]
CELL[4].OUT_BEL[9]	GTH_QUAD.RXDATA0[50]
CELL[4].OUT_BEL[11]	GTH_QUAD.RXVALID0[0]
CELL[4].OUT_BEL[17]	GTH_QUAD.RXDATA0[52]
CELL[4].OUT_BEL[18]	GTH_QUAD.RXVALID0[4]
CELL[4].OUT_BEL[20]	GTH_QUAD.RXDATA0[49]
CELL[4].OUT_BEL[21]	GTH_QUAD.RXDATA0[47]
CELL[4].OUT_BEL[23]	GTH_QUAD.RXDATA0[46]
CELL[5].IMUX_IMUX_DELAY[1]	GTH_QUAD.SAMPLERATE0[0]
CELL[5].IMUX_IMUX_DELAY[3]	GTH_QUAD.POWERDOWN0
CELL[5].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[2]
CELL[5].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXRATE0[0]
CELL[5].IMUX_IMUX_DELAY[10]	GTH_QUAD.RXPOWERDOWN0[0]
CELL[5].IMUX_IMUX_DELAY[14]	GTH_QUAD.RXPOLARITY0
CELL[5].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXMARGIN0[0]
CELL[5].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXRATE0[1]
CELL[5].IMUX_IMUX_DELAY[17]	GTH_QUAD.SAMPLERATE0[1]
CELL[5].IMUX_IMUX_DELAY[18]	GTH_QUAD.RXPOWERDOWN0[1]
CELL[5].IMUX_IMUX_DELAY[24]	GTH_QUAD.RXRATE0[0]
CELL[5].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXPOWERDOWN0[0]
CELL[5].IMUX_IMUX_DELAY[28]	GTH_QUAD.CLKTESTSIG[0]
CELL[5].IMUX_IMUX_DELAY[29]	GTH_QUAD.CLKTESTSIG[1]
CELL[5].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXMARGIN0[1]
CELL[5].IMUX_IMUX_DELAY[33]	GTH_QUAD.SAMPLERATE0[2]
CELL[5].IMUX_IMUX_DELAY[35]	GTH_QUAD.DFETRAINCTRL0
CELL[5].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXMARGIN0[2]
CELL[5].IMUX_IMUX_DELAY[40]	GTH_QUAD.RXRATE0[1]
CELL[5].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXPOWERDOWN0[1]
CELL[5].OUT_BEL[3]	GTH_QUAD.RXDATA0[41]
CELL[5].OUT_BEL[4]	GTH_QUAD.SCANOUT[2]
CELL[5].OUT_BEL[6]	GTH_QUAD.RXDATA0[44]
CELL[5].OUT_BEL[7]	GTH_QUAD.RXDATA0[43]
CELL[5].OUT_BEL[8]	GTH_QUAD.RXDATA0[40]
CELL[5].OUT_BEL[9]	GTH_QUAD.RXDATA0[36]
CELL[5].OUT_BEL[11]	GTH_QUAD.RXVALID0[1]
CELL[5].OUT_BEL[12]	GTH_QUAD.RXDATA0[37]
CELL[5].OUT_BEL[17]	GTH_QUAD.RXDATA0[39]
CELL[5].OUT_BEL[18]	GTH_QUAD.RXVALID0[5]
CELL[5].OUT_BEL[20]	GTH_QUAD.RXDATA0[42]
CELL[5].OUT_BEL[21]	GTH_QUAD.RXDATA0[45]
CELL[5].OUT_BEL[22]	GTH_QUAD.RXCTRLACK0
CELL[5].OUT_BEL[23]	GTH_QUAD.RXDATA0[38]
CELL[6].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXBUFRESET0
CELL[6].OUT_BEL[3]	GTH_QUAD.RXDATA0[34]
CELL[6].OUT_BEL[6]	GTH_QUAD.RXDATA0[27]
CELL[6].OUT_BEL[7]	GTH_QUAD.RXDATA0[35]
CELL[6].OUT_BEL[8]	GTH_QUAD.RXDATA0[31]
CELL[6].OUT_BEL[9]	GTH_QUAD.RXDATA0[30]
CELL[6].OUT_BEL[11]	GTH_QUAD.RXVALID0[2]
CELL[6].OUT_BEL[12]	GTH_QUAD.RXCTRL0[7]
CELL[6].OUT_BEL[17]	GTH_QUAD.RXDATA0[33]
CELL[6].OUT_BEL[18]	GTH_QUAD.RXVALID0[6]
CELL[6].OUT_BEL[20]	GTH_QUAD.RXDATA0[26]
CELL[6].OUT_BEL[21]	GTH_QUAD.RXDATA0[32]
CELL[6].OUT_BEL[22]	GTH_QUAD.RXCTRL0[5]
CELL[6].OUT_BEL[23]	GTH_QUAD.RXDATA0[29]
CELL[7].IMUX_IMUX_DELAY[15]	GTH_QUAD.RXBUFRESET0
CELL[7].OUT_BEL[3]	GTH_QUAD.RXDATA0[19]
CELL[7].OUT_BEL[6]	GTH_QUAD.RXDATA0[24]
CELL[7].OUT_BEL[7]	GTH_QUAD.RXDATA0[25]
CELL[7].OUT_BEL[8]	GTH_QUAD.RXDATA0[23]
CELL[7].OUT_BEL[9]	GTH_QUAD.RXDATA0[21]
CELL[7].OUT_BEL[11]	GTH_QUAD.RXVALID0[3]
CELL[7].OUT_BEL[12]	GTH_QUAD.RXCTRL0[4]
CELL[7].OUT_BEL[17]	GTH_QUAD.RXDATA0[20]
CELL[7].OUT_BEL[18]	GTH_QUAD.RXVALID0[7]
CELL[7].OUT_BEL[20]	GTH_QUAD.RXDATA0[22]
CELL[7].OUT_BEL[21]	GTH_QUAD.RXDATA0[18]
CELL[7].OUT_BEL[22]	GTH_QUAD.RXCTRL0[6]
CELL[7].OUT_BEL[23]	GTH_QUAD.RXDATA0[28]
CELL[8].IMUX_CLK[1]	GTH_QUAD.RXUSERCLKIN0
CELL[8].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[3]
CELL[8].OUT_BEL[2]	GTH_QUAD.RXDATATAP0
CELL[8].OUT_BEL[3]	GTH_QUAD.RXDATA0[11]
CELL[8].OUT_BEL[4]	GTH_QUAD.SCANOUT[3]
CELL[8].OUT_BEL[6]	GTH_QUAD.RXDATA0[12]
CELL[8].OUT_BEL[7]	GTH_QUAD.RXDATA0[17]
CELL[8].OUT_BEL[8]	GTH_QUAD.RXDATA0[13]
CELL[8].OUT_BEL[9]	GTH_QUAD.RXDATA0[15]
CELL[8].OUT_BEL[12]	GTH_QUAD.RXCTRL0[3]
CELL[8].OUT_BEL[17]	GTH_QUAD.RXDATA0[16]
CELL[8].OUT_BEL[20]	GTH_QUAD.RXDATA0[14]
CELL[8].OUT_BEL[21]	GTH_QUAD.RXDATA0[10]
CELL[8].OUT_BEL[22]	GTH_QUAD.RXCTRL0[1]
CELL[8].OUT_BEL[23]	GTH_QUAD.RXDATA0[9]
CELL[9].OUT_BEL[2]	GTH_QUAD.RXPCSCLKSMPL0
CELL[9].OUT_BEL[3]	GTH_QUAD.RXDATA0[0]
CELL[9].OUT_BEL[6]	GTH_QUAD.RXDATA0[6]
CELL[9].OUT_BEL[7]	GTH_QUAD.RXDATA0[3]
CELL[9].OUT_BEL[8]	GTH_QUAD.RXDATA0[5]
CELL[9].OUT_BEL[9]	GTH_QUAD.RXDATA0[1]
CELL[9].OUT_BEL[12]	GTH_QUAD.RXCTRL0[2]
CELL[9].OUT_BEL[17]	GTH_QUAD.RXDATA0[7]
CELL[9].OUT_BEL[20]	GTH_QUAD.RXDATA0[4]
CELL[9].OUT_BEL[21]	GTH_QUAD.RXDATA0[2]
CELL[9].OUT_BEL[22]	GTH_QUAD.RXCTRL0[0]
CELL[9].OUT_BEL[23]	GTH_QUAD.RXDATA0[8]
CELL[10].IMUX_CLK[1]	GTH_QUAD.DCLK
CELL[10].IMUX_IMUX_DELAY[3]	GTH_QUAD.DI[14]
CELL[10].IMUX_IMUX_DELAY[4]	GTH_QUAD.DI[11]
CELL[10].IMUX_IMUX_DELAY[8]	GTH_QUAD.DADDR[8]
CELL[10].IMUX_IMUX_DELAY[10]	GTH_QUAD.DADDR[1]
CELL[10].IMUX_IMUX_DELAY[12]	GTH_QUAD.DI[10]
CELL[10].IMUX_IMUX_DELAY[14]	GTH_QUAD.DI[4]
CELL[10].IMUX_IMUX_DELAY[15]	GTH_QUAD.DI[2]
CELL[10].IMUX_IMUX_DELAY[16]	GTH_QUAD.DADDR[9]
CELL[10].IMUX_IMUX_DELAY[17]	GTH_QUAD.DADDR[5]
CELL[10].IMUX_IMUX_DELAY[18]	GTH_QUAD.DADDR[2]
CELL[10].IMUX_IMUX_DELAY[19]	GTH_QUAD.DI[13]
CELL[10].IMUX_IMUX_DELAY[21]	GTH_QUAD.DI[8]
CELL[10].IMUX_IMUX_DELAY[22]	GTH_QUAD.DI[5]
CELL[10].IMUX_IMUX_DELAY[24]	GTH_QUAD.DADDR[7]
CELL[10].IMUX_IMUX_DELAY[25]	GTH_QUAD.DADDR[4]
CELL[10].IMUX_IMUX_DELAY[26]	GTH_QUAD.DADDR[0]
CELL[10].IMUX_IMUX_DELAY[28]	GTH_QUAD.DI[9]
CELL[10].IMUX_IMUX_DELAY[29]	GTH_QUAD.DI[7]
CELL[10].IMUX_IMUX_DELAY[30]	GTH_QUAD.DI[3]
CELL[10].IMUX_IMUX_DELAY[31]	GTH_QUAD.DI[1]
CELL[10].IMUX_IMUX_DELAY[33]	GTH_QUAD.DADDR[3]
CELL[10].IMUX_IMUX_DELAY[35]	GTH_QUAD.DI[12]
CELL[10].IMUX_IMUX_DELAY[37]	GTH_QUAD.DI[6]
CELL[10].IMUX_IMUX_DELAY[39]	GTH_QUAD.DI[0]
CELL[10].IMUX_IMUX_DELAY[40]	GTH_QUAD.DADDR[6]
CELL[10].IMUX_IMUX_DELAY[42]	GTH_QUAD.DI[15]
CELL[10].OUT_BEL[2]	GTH_QUAD.TXDATATAP11
CELL[10].OUT_BEL[6]	GTH_QUAD.TXCTRLACK1
CELL[10].OUT_BEL[8]	GTH_QUAD.DRPDO[14]
CELL[10].OUT_BEL[9]	GTH_QUAD.DRPDO[12]
CELL[10].OUT_BEL[11]	GTH_QUAD.DRPDO[10]
CELL[10].OUT_BEL[12]	GTH_QUAD.DRPDO[13]
CELL[10].OUT_BEL[17]	GTH_QUAD.RESETDONE1
CELL[10].OUT_BEL[18]	GTH_QUAD.DRPDO[9]
CELL[10].OUT_BEL[19]	GTH_QUAD.DRPDO[11]
CELL[10].OUT_BEL[20]	GTH_QUAD.DRDY
CELL[10].OUT_BEL[22]	GTH_QUAD.DRPDO[15]
CELL[11].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA1[28]
CELL[11].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[4]
CELL[11].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA1[24]
CELL[11].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA1[56]
CELL[11].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA1[36]
CELL[11].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL1[7]
CELL[11].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA1[32]
CELL[11].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA1[48]
CELL[11].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA1[20]
CELL[11].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA1[40]
CELL[11].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA1[16]
CELL[11].IMUX_IMUX_DELAY[24]	GTH_QUAD.DWE
CELL[11].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA1[60]
CELL[11].IMUX_IMUX_DELAY[26]	GTH_QUAD.DISABLEDRP
CELL[11].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL1[0]
CELL[11].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA1[12]
CELL[11].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA1[8]
CELL[11].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA1[52]
CELL[11].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA1[44]
CELL[11].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA1[4]
CELL[11].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA1[0]
CELL[11].IMUX_IMUX_DELAY[40]	GTH_QUAD.DEN
CELL[11].OUT_BEL[3]	GTH_QUAD.RXCODEERR1[2]
CELL[11].OUT_BEL[4]	GTH_QUAD.SCANOUT[4]
CELL[11].OUT_BEL[6]	GTH_QUAD.RXCODEERR1[6]
CELL[11].OUT_BEL[8]	GTH_QUAD.RXDISPERR1[6]
CELL[11].OUT_BEL[9]	GTH_QUAD.RXDISPERR1[4]
CELL[11].OUT_BEL[11]	GTH_QUAD.DRPDO[2]
CELL[11].OUT_BEL[12]	GTH_QUAD.TSTREFCLKFAB
CELL[11].OUT_BEL[18]	GTH_QUAD.DRPDO[8]
CELL[11].OUT_BEL[19]	GTH_QUAD.DRPDO[5]
CELL[11].OUT_BEL[20]	GTH_QUAD.RXDISPERR1[0]
CELL[11].OUT_BEL[21]	GTH_QUAD.RXCODEERR1[0]
CELL[11].OUT_BEL[23]	GTH_QUAD.RXDISPERR1[2]
CELL[12].IMUX_CLK[1]	GTH_QUAD.TXUSERCLKIN1
CELL[12].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA1[29]
CELL[12].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[5]
CELL[12].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA1[25]
CELL[12].IMUX_IMUX_DELAY[7]	GTH_QUAD.TXDATAMSB1[0]
CELL[12].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA1[57]
CELL[12].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA1[37]
CELL[12].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL1[6]
CELL[12].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA1[33]
CELL[12].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA1[49]
CELL[12].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA1[21]
CELL[12].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA1[41]
CELL[12].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA1[17]
CELL[12].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA1[61]
CELL[12].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL1[1]
CELL[12].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA1[13]
CELL[12].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB1[1]
CELL[12].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA1[9]
CELL[12].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA1[53]
CELL[12].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA1[45]
CELL[12].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA1[5]
CELL[12].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA1[1]
CELL[12].OUT_BEL[3]	GTH_QUAD.RXCODEERR1[3]
CELL[12].OUT_BEL[4]	GTH_QUAD.SCANOUT[5]
CELL[12].OUT_BEL[6]	GTH_QUAD.RXCODEERR1[7]
CELL[12].OUT_BEL[7]	GTH_QUAD.RXCODEERR1[5]
CELL[12].OUT_BEL[8]	GTH_QUAD.RXDISPERR1[7]
CELL[12].OUT_BEL[9]	GTH_QUAD.RXDISPERR1[5]
CELL[12].OUT_BEL[11]	GTH_QUAD.DRPDO[7]
CELL[12].OUT_BEL[17]	GTH_QUAD.RXCODEERR1[4]
CELL[12].OUT_BEL[18]	GTH_QUAD.DRPDO[6]
CELL[12].OUT_BEL[19]	GTH_QUAD.DRPDO[3]
CELL[12].OUT_BEL[20]	GTH_QUAD.RXDISPERR1[1]
CELL[12].OUT_BEL[21]	GTH_QUAD.RXCODEERR1[1]
CELL[12].OUT_BEL[23]	GTH_QUAD.RXDISPERR1[3]
CELL[13].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA1[30]
CELL[13].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA1[26]
CELL[13].IMUX_IMUX_DELAY[7]	GTH_QUAD.TXDATAMSB1[4]
CELL[13].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA1[58]
CELL[13].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA1[38]
CELL[13].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL1[5]
CELL[13].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA1[34]
CELL[13].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXDATAMSB1[3]
CELL[13].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA1[50]
CELL[13].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATAMSB1[2]
CELL[13].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA1[22]
CELL[13].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA1[42]
CELL[13].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA1[18]
CELL[13].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA1[62]
CELL[13].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL1[2]
CELL[13].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA1[14]
CELL[13].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB1[5]
CELL[13].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA1[10]
CELL[13].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA1[54]
CELL[13].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA1[46]
CELL[13].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA1[6]
CELL[13].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA1[2]
CELL[13].IMUX_IMUX_DELAY[42]	GTH_QUAD.RXENCOMMADET1
CELL[13].OUT_BEL[2]	GTH_QUAD.TXDATATAP21
CELL[13].OUT_BEL[3]	GTH_QUAD.RXDATA1[60]
CELL[13].OUT_BEL[6]	GTH_QUAD.RXDATA1[58]
CELL[13].OUT_BEL[7]	GTH_QUAD.RXDATA1[61]
CELL[13].OUT_BEL[8]	GTH_QUAD.RXDATA1[63]
CELL[13].OUT_BEL[9]	GTH_QUAD.RXDATA1[59]
CELL[13].OUT_BEL[11]	GTH_QUAD.DRPDO[1]
CELL[13].OUT_BEL[17]	GTH_QUAD.RXDATA1[57]
CELL[13].OUT_BEL[18]	GTH_QUAD.DRPDO[0]
CELL[13].OUT_BEL[19]	GTH_QUAD.DRPDO[4]
CELL[13].OUT_BEL[20]	GTH_QUAD.RXDATA1[62]
CELL[13].OUT_BEL[21]	GTH_QUAD.RXDATA1[56]
CELL[13].OUT_BEL[23]	GTH_QUAD.RXDATA1[55]
CELL[14].IMUX_IMUX_DELAY[1]	GTH_QUAD.TXDATA1[31]
CELL[14].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDATA1[27]
CELL[14].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA1[59]
CELL[14].IMUX_IMUX_DELAY[10]	GTH_QUAD.TXDATA1[39]
CELL[14].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXCTRL1[4]
CELL[14].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA1[35]
CELL[14].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXDATAMSB1[7]
CELL[14].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA1[51]
CELL[14].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATAMSB1[6]
CELL[14].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA1[23]
CELL[14].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXDATA1[43]
CELL[14].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA1[19]
CELL[14].IMUX_IMUX_DELAY[24]	GTH_QUAD.RXSLIP1
CELL[14].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA1[63]
CELL[14].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXCTRL1[3]
CELL[14].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA1[15]
CELL[14].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA1[11]
CELL[14].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA1[55]
CELL[14].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXDATA1[47]
CELL[14].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA1[7]
CELL[14].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA1[3]
CELL[14].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDEEMPH1
CELL[14].OUT_BEL[2]	GTH_QUAD.TXPCSCLKSMPL1
CELL[14].OUT_BEL[3]	GTH_QUAD.RXDATA1[53]
CELL[14].OUT_BEL[6]	GTH_QUAD.RXDATA1[48]
CELL[14].OUT_BEL[7]	GTH_QUAD.RXDATA1[54]
CELL[14].OUT_BEL[8]	GTH_QUAD.RXDATA1[51]
CELL[14].OUT_BEL[9]	GTH_QUAD.RXDATA1[50]
CELL[14].OUT_BEL[11]	GTH_QUAD.RXVALID1[0]
CELL[14].OUT_BEL[17]	GTH_QUAD.RXDATA1[52]
CELL[14].OUT_BEL[18]	GTH_QUAD.RXVALID1[4]
CELL[14].OUT_BEL[19]	GTH_QUAD.TPDO
CELL[14].OUT_BEL[20]	GTH_QUAD.RXDATA1[49]
CELL[14].OUT_BEL[21]	GTH_QUAD.RXDATA1[47]
CELL[14].OUT_BEL[23]	GTH_QUAD.RXDATA1[46]
CELL[15].IMUX_IMUX_DELAY[1]	GTH_QUAD.SAMPLERATE1[0]
CELL[15].IMUX_IMUX_DELAY[3]	GTH_QUAD.POWERDOWN1
CELL[15].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[6]
CELL[15].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXRATE1[0]
CELL[15].IMUX_IMUX_DELAY[10]	GTH_QUAD.RXPOWERDOWN1[0]
CELL[15].IMUX_IMUX_DELAY[14]	GTH_QUAD.RXPOLARITY1
CELL[15].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXMARGIN1[0]
CELL[15].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXRATE1[1]
CELL[15].IMUX_IMUX_DELAY[17]	GTH_QUAD.SAMPLERATE1[1]
CELL[15].IMUX_IMUX_DELAY[18]	GTH_QUAD.RXPOWERDOWN1[1]
CELL[15].IMUX_IMUX_DELAY[24]	GTH_QUAD.RXRATE1[0]
CELL[15].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXPOWERDOWN1[0]
CELL[15].IMUX_IMUX_DELAY[28]	GTH_QUAD.CLKTESTSIG[2]
CELL[15].IMUX_IMUX_DELAY[29]	GTH_QUAD.CLKTESTSIG[3]
CELL[15].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXMARGIN1[1]
CELL[15].IMUX_IMUX_DELAY[33]	GTH_QUAD.SAMPLERATE1[2]
CELL[15].IMUX_IMUX_DELAY[35]	GTH_QUAD.DFETRAINCTRL1
CELL[15].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXMARGIN1[2]
CELL[15].IMUX_IMUX_DELAY[40]	GTH_QUAD.RXRATE1[1]
CELL[15].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXPOWERDOWN1[1]
CELL[15].OUT_BEL[3]	GTH_QUAD.RXDATA1[41]
CELL[15].OUT_BEL[4]	GTH_QUAD.SCANOUT[6]
CELL[15].OUT_BEL[6]	GTH_QUAD.RXDATA1[44]
CELL[15].OUT_BEL[7]	GTH_QUAD.RXDATA1[43]
CELL[15].OUT_BEL[8]	GTH_QUAD.RXDATA1[40]
CELL[15].OUT_BEL[9]	GTH_QUAD.RXDATA1[36]
CELL[15].OUT_BEL[11]	GTH_QUAD.RXVALID1[1]
CELL[15].OUT_BEL[12]	GTH_QUAD.RXDATA1[37]
CELL[15].OUT_BEL[17]	GTH_QUAD.RXDATA1[39]
CELL[15].OUT_BEL[18]	GTH_QUAD.RXVALID1[5]
CELL[15].OUT_BEL[19]	GTH_QUAD.SDSTSTTDO
CELL[15].OUT_BEL[20]	GTH_QUAD.RXDATA1[42]
CELL[15].OUT_BEL[21]	GTH_QUAD.RXDATA1[45]
CELL[15].OUT_BEL[22]	GTH_QUAD.RXCTRLACK1
CELL[15].OUT_BEL[23]	GTH_QUAD.RXDATA1[38]
CELL[16].IMUX_CLK[1]	GTH_QUAD.TSTNOISECLK
CELL[16].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[7]
CELL[16].IMUX_IMUX_DELAY[8]	GTH_QUAD.GTHX4LANE
CELL[16].IMUX_IMUX_DELAY[15]	GTH_QUAD.TXBUFRESET1
CELL[16].IMUX_IMUX_DELAY[16]	GTH_QUAD.GTHRESET
CELL[16].IMUX_IMUX_DELAY[24]	GTH_QUAD.GTHX2LANE23
CELL[16].IMUX_IMUX_DELAY[26]	GTH_QUAD.GTHINIT
CELL[16].IMUX_IMUX_DELAY[31]	GTH_QUAD.MGMTPCSLANESEL[1]
CELL[16].IMUX_IMUX_DELAY[39]	GTH_QUAD.MGMTPCSLANESEL[0]
CELL[16].IMUX_IMUX_DELAY[40]	GTH_QUAD.GTHX2LANE01
CELL[16].OUT_BEL[3]	GTH_QUAD.RXDATA1[34]
CELL[16].OUT_BEL[4]	GTH_QUAD.SCANOUT[7]
CELL[16].OUT_BEL[6]	GTH_QUAD.RXDATA1[27]
CELL[16].OUT_BEL[7]	GTH_QUAD.RXDATA1[35]
CELL[16].OUT_BEL[8]	GTH_QUAD.RXDATA1[31]
CELL[16].OUT_BEL[9]	GTH_QUAD.RXDATA1[30]
CELL[16].OUT_BEL[11]	GTH_QUAD.RXVALID1[2]
CELL[16].OUT_BEL[12]	GTH_QUAD.RXCTRL1[7]
CELL[16].OUT_BEL[17]	GTH_QUAD.RXDATA1[33]
CELL[16].OUT_BEL[18]	GTH_QUAD.RXVALID1[6]
CELL[16].OUT_BEL[19]	GTH_QUAD.SDSTSTFBCLK
CELL[16].OUT_BEL[20]	GTH_QUAD.RXDATA1[26]
CELL[16].OUT_BEL[21]	GTH_QUAD.RXDATA1[32]
CELL[16].OUT_BEL[22]	GTH_QUAD.RXCTRL1[5]
CELL[16].OUT_BEL[23]	GTH_QUAD.RXDATA1[29]
CELL[17].IMUX_CLK[0]	GTH_QUAD.TPCLK
CELL[17].IMUX_CLK[1]	GTH_QUAD.SDSSCANCLK
CELL[17].IMUX_IMUX_DELAY[3]	GTH_QUAD.TPEXE
CELL[17].IMUX_IMUX_DELAY[4]	GTH_QUAD.TSTNOISESRC
CELL[17].IMUX_IMUX_DELAY[7]	GTH_QUAD.MGMTPCSREGWR
CELL[17].IMUX_IMUX_DELAY[8]	GTH_QUAD.SDSSCANARST
CELL[17].IMUX_IMUX_DELAY[12]	GTH_QUAD.TPRST
CELL[17].IMUX_IMUX_DELAY[15]	GTH_QUAD.RXBUFRESET1
CELL[17].IMUX_IMUX_DELAY[16]	GTH_QUAD.TPSENB
CELL[17].IMUX_IMUX_DELAY[19]	GTH_QUAD.TPDI
CELL[17].IMUX_IMUX_DELAY[24]	GTH_QUAD.MGMTPCSMMDADDR[0]
CELL[17].IMUX_IMUX_DELAY[28]	GTH_QUAD.MGMTPCSMMDADDR[3]
CELL[17].IMUX_IMUX_DELAY[31]	GTH_QUAD.MGMTPCSLANESEL[3]
CELL[17].IMUX_IMUX_DELAY[33]	GTH_QUAD.SDSIDDQMODE
CELL[17].IMUX_IMUX_DELAY[35]	GTH_QUAD.SDSSCANENB
CELL[17].IMUX_IMUX_DELAY[39]	GTH_QUAD.MGMTPCSLANESEL[2]
CELL[17].OUT_BEL[3]	GTH_QUAD.RXDATA1[19]
CELL[17].OUT_BEL[6]	GTH_QUAD.RXDATA1[24]
CELL[17].OUT_BEL[7]	GTH_QUAD.RXDATA1[25]
CELL[17].OUT_BEL[8]	GTH_QUAD.RXDATA1[23]
CELL[17].OUT_BEL[9]	GTH_QUAD.RXDATA1[21]
CELL[17].OUT_BEL[11]	GTH_QUAD.RXVALID1[3]
CELL[17].OUT_BEL[12]	GTH_QUAD.RXCTRL1[4]
CELL[17].OUT_BEL[17]	GTH_QUAD.RXDATA1[20]
CELL[17].OUT_BEL[18]	GTH_QUAD.RXVALID1[7]
CELL[17].OUT_BEL[19]	GTH_QUAD.TSTNOISEMON
CELL[17].OUT_BEL[20]	GTH_QUAD.RXDATA1[22]
CELL[17].OUT_BEL[21]	GTH_QUAD.RXDATA1[18]
CELL[17].OUT_BEL[22]	GTH_QUAD.RXCTRL1[6]
CELL[17].OUT_BEL[23]	GTH_QUAD.RXDATA1[28]
CELL[18].IMUX_CLK[1]	GTH_QUAD.RXUSERCLKIN1
CELL[18].IMUX_IMUX_DELAY[1]	GTH_QUAD.MGMTPCSWRDATA[8]
CELL[18].IMUX_IMUX_DELAY[3]	GTH_QUAD.MGMTPCSMMDADDR[2]
CELL[18].IMUX_IMUX_DELAY[4]	GTH_QUAD.MGMTPCSWRDATA[14]
CELL[18].IMUX_IMUX_DELAY[7]	GTH_QUAD.MGMTPCSMMDADDR[4]
CELL[18].IMUX_IMUX_DELAY[8]	GTH_QUAD.MGMTPCSWRDATA[12]
CELL[18].IMUX_IMUX_DELAY[10]	GTH_QUAD.MGMTPCSWRDATA[7]
CELL[18].IMUX_IMUX_DELAY[12]	GTH_QUAD.MGMTPCSWRDATA[13]
CELL[18].IMUX_IMUX_DELAY[16]	GTH_QUAD.MGMTPCSWRDATA[10]
CELL[18].IMUX_IMUX_DELAY[17]	GTH_QUAD.MGMTPCSWRDATA[6]
CELL[18].IMUX_IMUX_DELAY[18]	GTH_QUAD.MGMTPCSMMDADDR[1]
CELL[18].IMUX_IMUX_DELAY[19]	GTH_QUAD.MGMTPCSWRDATA[2]
CELL[18].IMUX_IMUX_DELAY[24]	GTH_QUAD.MGMTPCSWRDATA[15]
CELL[18].IMUX_IMUX_DELAY[25]	GTH_QUAD.MGMTPCSWRDATA[9]
CELL[18].IMUX_IMUX_DELAY[26]	GTH_QUAD.MGMTPCSWRDATA[4]
CELL[18].IMUX_IMUX_DELAY[28]	GTH_QUAD.MGMTPCSWRDATA[0]
CELL[18].IMUX_IMUX_DELAY[33]	GTH_QUAD.MGMTPCSWRDATA[5]
CELL[18].IMUX_IMUX_DELAY[35]	GTH_QUAD.MGMTPCSWRDATA[1]
CELL[18].IMUX_IMUX_DELAY[40]	GTH_QUAD.MGMTPCSWRDATA[11]
CELL[18].IMUX_IMUX_DELAY[42]	GTH_QUAD.MGMTPCSWRDATA[3]
CELL[18].OUT_BEL[2]	GTH_QUAD.RXDATATAP1
CELL[18].OUT_BEL[3]	GTH_QUAD.RXDATA1[11]
CELL[18].OUT_BEL[6]	GTH_QUAD.RXDATA1[12]
CELL[18].OUT_BEL[7]	GTH_QUAD.RXDATA1[17]
CELL[18].OUT_BEL[8]	GTH_QUAD.RXDATA1[13]
CELL[18].OUT_BEL[9]	GTH_QUAD.RXDATA1[15]
CELL[18].OUT_BEL[12]	GTH_QUAD.RXCTRL1[3]
CELL[18].OUT_BEL[17]	GTH_QUAD.RXDATA1[16]
CELL[18].OUT_BEL[20]	GTH_QUAD.RXDATA1[14]
CELL[18].OUT_BEL[21]	GTH_QUAD.RXDATA1[10]
CELL[18].OUT_BEL[22]	GTH_QUAD.RXCTRL1[1]
CELL[18].OUT_BEL[23]	GTH_QUAD.RXDATA1[9]
CELL[19].IMUX_IMUX_DELAY[1]	GTH_QUAD.MGMTPCSREGADDR[8]
CELL[19].IMUX_IMUX_DELAY[4]	GTH_QUAD.MGMTPCSREGADDR[14]
CELL[19].IMUX_IMUX_DELAY[7]	GTH_QUAD.MGMTPCSREGRD
CELL[19].IMUX_IMUX_DELAY[8]	GTH_QUAD.MGMTPCSREGADDR[12]
CELL[19].IMUX_IMUX_DELAY[10]	GTH_QUAD.MGMTPCSREGADDR[7]
CELL[19].IMUX_IMUX_DELAY[12]	GTH_QUAD.MGMTPCSREGADDR[13]
CELL[19].IMUX_IMUX_DELAY[14]	GTH_QUAD.DADDR[14]
CELL[19].IMUX_IMUX_DELAY[15]	GTH_QUAD.DADDR[12]
CELL[19].IMUX_IMUX_DELAY[16]	GTH_QUAD.MGMTPCSREGADDR[10]
CELL[19].IMUX_IMUX_DELAY[17]	GTH_QUAD.MGMTPCSREGADDR[6]
CELL[19].IMUX_IMUX_DELAY[19]	GTH_QUAD.MGMTPCSREGADDR[2]
CELL[19].IMUX_IMUX_DELAY[22]	GTH_QUAD.DADDR[15]
CELL[19].IMUX_IMUX_DELAY[24]	GTH_QUAD.MGMTPCSREGADDR[15]
CELL[19].IMUX_IMUX_DELAY[25]	GTH_QUAD.MGMTPCSREGADDR[9]
CELL[19].IMUX_IMUX_DELAY[26]	GTH_QUAD.MGMTPCSREGADDR[4]
CELL[19].IMUX_IMUX_DELAY[28]	GTH_QUAD.MGMTPCSREGADDR[0]
CELL[19].IMUX_IMUX_DELAY[30]	GTH_QUAD.DADDR[13]
CELL[19].IMUX_IMUX_DELAY[31]	GTH_QUAD.DADDR[11]
CELL[19].IMUX_IMUX_DELAY[33]	GTH_QUAD.MGMTPCSREGADDR[5]
CELL[19].IMUX_IMUX_DELAY[35]	GTH_QUAD.MGMTPCSREGADDR[1]
CELL[19].IMUX_IMUX_DELAY[39]	GTH_QUAD.DADDR[10]
CELL[19].IMUX_IMUX_DELAY[40]	GTH_QUAD.MGMTPCSREGADDR[11]
CELL[19].IMUX_IMUX_DELAY[42]	GTH_QUAD.MGMTPCSREGADDR[3]
CELL[19].OUT_BEL[2]	GTH_QUAD.RXPCSCLKSMPL1
CELL[19].OUT_BEL[3]	GTH_QUAD.RXDATA1[0]
CELL[19].OUT_BEL[6]	GTH_QUAD.RXDATA1[6]
CELL[19].OUT_BEL[7]	GTH_QUAD.RXDATA1[3]
CELL[19].OUT_BEL[8]	GTH_QUAD.RXDATA1[5]
CELL[19].OUT_BEL[9]	GTH_QUAD.RXDATA1[1]
CELL[19].OUT_BEL[11]	GTH_QUAD.MGMTPCSRDDATA[14]
CELL[19].OUT_BEL[12]	GTH_QUAD.RXCTRL1[2]
CELL[19].OUT_BEL[17]	GTH_QUAD.RXDATA1[7]
CELL[19].OUT_BEL[20]	GTH_QUAD.RXDATA1[4]
CELL[19].OUT_BEL[21]	GTH_QUAD.RXDATA1[2]
CELL[19].OUT_BEL[22]	GTH_QUAD.RXCTRL1[0]
CELL[19].OUT_BEL[23]	GTH_QUAD.RXDATA1[8]
CELL[20].IMUX_CLK[1]	GTH_QUAD.GREFCLK
CELL[20].IMUX_IMUX_DELAY[0]	GTH_QUAD.CLKTESTSIG[8]
CELL[20].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[8]
CELL[20].IMUX_IMUX_DELAY[8]	GTH_QUAD.CLKTESTSIG[9]
CELL[20].OUT_BEL[0]	GTH_QUAD.MGMTPCSRDDATA[9]
CELL[20].OUT_BEL[1]	GTH_QUAD.MGMTPCSRDDATA[13]
CELL[20].OUT_BEL[2]	GTH_QUAD.TXDATATAP13
CELL[20].OUT_BEL[4]	GTH_QUAD.RXDATA3[3]
CELL[20].OUT_BEL[5]	GTH_QUAD.SCANOUT[8]
CELL[20].OUT_BEL[7]	GTH_QUAD.RXDATA3[5]
CELL[20].OUT_BEL[8]	GTH_QUAD.RXDATA3[7]
CELL[20].OUT_BEL[9]	GTH_QUAD.MGMTPCSRDDATA[12]
CELL[20].OUT_BEL[11]	GTH_QUAD.MGMTPCSRDDATA[10]
CELL[20].OUT_BEL[12]	GTH_QUAD.RXDATA3[0]
CELL[20].OUT_BEL[13]	GTH_QUAD.RXDATA3[4]
CELL[20].OUT_BEL[14]	GTH_QUAD.RXDATA3[8]
CELL[20].OUT_BEL[15]	GTH_QUAD.RXCTRL3[0]
CELL[20].OUT_BEL[16]	GTH_QUAD.RXDATA3[1]
CELL[20].OUT_BEL[17]	GTH_QUAD.RXDATA3[16]
CELL[20].OUT_BEL[18]	GTH_QUAD.RXDATA3[2]
CELL[20].OUT_BEL[19]	GTH_QUAD.MGMTPCSRDDATA[11]
CELL[20].OUT_BEL[20]	GTH_QUAD.MGMTPCSRDACK
CELL[20].OUT_BEL[21]	GTH_QUAD.RXCTRL3[2]
CELL[20].OUT_BEL[22]	GTH_QUAD.MGMTPCSRDDATA[15]
CELL[20].OUT_BEL[23]	GTH_QUAD.RXDATA3[6]
CELL[20].MGT_ROW[0]	GTH_QUAD.RXUSERCLKOUT0
CELL[20].MGT_ROW[1]	GTH_QUAD.RXUSERCLKOUT1
CELL[20].MGT_ROW[2]	GTH_QUAD.TXUSERCLKOUT0
CELL[20].MGT_ROW[3]	GTH_QUAD.TXUSERCLKOUT1
CELL[20].MGT_ROW[4]	GTH_QUAD.TSTPATH
CELL[20].MGT_ROW[5]	GTH_QUAD.TSTREFCLKOUT
CELL[20].MGT_ROW[6]	GTH_QUAD.RXUSERCLKOUT2
CELL[20].MGT_ROW[7]	GTH_QUAD.RXUSERCLKOUT3
CELL[20].MGT_ROW[8]	GTH_QUAD.TXUSERCLKOUT2
CELL[20].MGT_ROW[9]	GTH_QUAD.TXUSERCLKOUT3
CELL[21].IMUX_CLK[0]	GTH_QUAD.RXUSERCLKIN3
CELL[21].IMUX_CLK[1]	GTH_QUAD.SCANCLK
CELL[21].OUT_BEL[0]	GTH_QUAD.RXDATA3[11]
CELL[21].OUT_BEL[3]	GTH_QUAD.RXCTRL3[3]
CELL[21].OUT_BEL[7]	GTH_QUAD.RXDATA3[13]
CELL[21].OUT_BEL[8]	GTH_QUAD.RXDATA3[17]
CELL[21].OUT_BEL[9]	GTH_QUAD.RXDATA3[12]
CELL[21].OUT_BEL[11]	GTH_QUAD.MGMTPCSRDDATA[2]
CELL[21].OUT_BEL[12]	GTH_QUAD.RXDATA3[10]
CELL[21].OUT_BEL[13]	GTH_QUAD.RXDATA3[14]
CELL[21].OUT_BEL[14]	GTH_QUAD.RXDATA3[9]
CELL[21].OUT_BEL[15]	GTH_QUAD.RXCTRL3[1]
CELL[21].OUT_BEL[16]	GTH_QUAD.RXDATA3[15]
CELL[21].OUT_BEL[17]	GTH_QUAD.RXDATA3[20]
CELL[21].OUT_BEL[18]	GTH_QUAD.MGMTPCSRDDATA[8]
CELL[21].OUT_BEL[19]	GTH_QUAD.MGMTPCSRDDATA[5]
CELL[22].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[9]
CELL[22].IMUX_IMUX_DELAY[32]	GTH_QUAD.RXBUFRESET3
CELL[22].OUT_BEL[0]	GTH_QUAD.RXDATA3[19]
CELL[22].OUT_BEL[3]	GTH_QUAD.RXCTRL3[4]
CELL[22].OUT_BEL[4]	GTH_QUAD.RXVALID3[3]
CELL[22].OUT_BEL[7]	GTH_QUAD.RXDATA3[23]
CELL[22].OUT_BEL[8]	GTH_QUAD.RXDATA3[25]
CELL[22].OUT_BEL[9]	GTH_QUAD.RXDATA3[24]
CELL[22].OUT_BEL[11]	GTH_QUAD.MGMTPCSRDDATA[7]
CELL[22].OUT_BEL[12]	GTH_QUAD.RXDATA3[18]
CELL[22].OUT_BEL[13]	GTH_QUAD.RXDATA3[22]
CELL[22].OUT_BEL[14]	GTH_QUAD.RXDATA3[28]
CELL[22].OUT_BEL[15]	GTH_QUAD.RXCTRL3[6]
CELL[22].OUT_BEL[16]	GTH_QUAD.RXDATA3[21]
CELL[22].OUT_BEL[18]	GTH_QUAD.MGMTPCSRDDATA[6]
CELL[22].OUT_BEL[19]	GTH_QUAD.MGMTPCSRDDATA[3]
CELL[22].OUT_BEL[21]	GTH_QUAD.RXVALID3[7]
CELL[22].OUT_BEL[22]	GTH_QUAD.SCANOUT[9]
CELL[23].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXBUFRESET3
CELL[23].OUT_BEL[0]	GTH_QUAD.RXDATA3[34]
CELL[23].OUT_BEL[2]	GTH_QUAD.TXDATATAP23
CELL[23].OUT_BEL[3]	GTH_QUAD.MGMTPCSRDDATA[1]
CELL[23].OUT_BEL[4]	GTH_QUAD.RXDATA3[35]
CELL[23].OUT_BEL[7]	GTH_QUAD.RXDATA3[31]
CELL[23].OUT_BEL[8]	GTH_QUAD.RXDATA3[33]
CELL[23].OUT_BEL[9]	GTH_QUAD.RXDATA3[27]
CELL[23].OUT_BEL[11]	GTH_QUAD.RXVALID3[6]
CELL[23].OUT_BEL[12]	GTH_QUAD.RXDATA3[32]
CELL[23].OUT_BEL[13]	GTH_QUAD.RXDATA3[26]
CELL[23].OUT_BEL[14]	GTH_QUAD.RXDATA3[29]
CELL[23].OUT_BEL[15]	GTH_QUAD.RXCTRL3[5]
CELL[23].OUT_BEL[16]	GTH_QUAD.RXDATA3[30]
CELL[23].OUT_BEL[18]	GTH_QUAD.RXVALID3[2]
CELL[23].OUT_BEL[19]	GTH_QUAD.MGMTPCSRDDATA[4]
CELL[23].OUT_BEL[21]	GTH_QUAD.RXCTRL3[7]
CELL[23].OUT_BEL[22]	GTH_QUAD.MGMTPCSRDDATA[0]
CELL[24].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[10]
CELL[24].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXPOWERDOWN3[1]
CELL[24].IMUX_IMUX_DELAY[7]	GTH_QUAD.RXRATE3[1]
CELL[24].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXMARGIN3[2]
CELL[24].IMUX_IMUX_DELAY[12]	GTH_QUAD.DFETRAINCTRL3
CELL[24].IMUX_IMUX_DELAY[13]	GTH_QUAD.TXPOWERDOWN3[0]
CELL[24].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXMARGIN3[1]
CELL[24].IMUX_IMUX_DELAY[18]	GTH_QUAD.CLKTESTSIG[7]
CELL[24].IMUX_IMUX_DELAY[19]	GTH_QUAD.CLKTESTSIG[6]
CELL[24].IMUX_IMUX_DELAY[22]	GTH_QUAD.SAMPLERATE3[2]
CELL[24].IMUX_IMUX_DELAY[23]	GTH_QUAD.RXRATE3[0]
CELL[24].IMUX_IMUX_DELAY[29]	GTH_QUAD.RXPOWERDOWN3[1]
CELL[24].IMUX_IMUX_DELAY[30]	GTH_QUAD.SAMPLERATE3[1]
CELL[24].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXRATE3[1]
CELL[24].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXMARGIN3[0]
CELL[24].IMUX_IMUX_DELAY[33]	GTH_QUAD.RXPOLARITY3
CELL[24].IMUX_IMUX_DELAY[37]	GTH_QUAD.RXPOWERDOWN3[0]
CELL[24].IMUX_IMUX_DELAY[38]	GTH_QUAD.SAMPLERATE3[0]
CELL[24].IMUX_IMUX_DELAY[44]	GTH_QUAD.POWERDOWN3
CELL[24].IMUX_IMUX_DELAY[47]	GTH_QUAD.TXRATE3[0]
CELL[24].OUT_BEL[0]	GTH_QUAD.RXDATA3[41]
CELL[24].OUT_BEL[2]	GTH_QUAD.TXPCSCLKSMPL3
CELL[24].OUT_BEL[4]	GTH_QUAD.RXDATA3[43]
CELL[24].OUT_BEL[8]	GTH_QUAD.RXDATA3[39]
CELL[24].OUT_BEL[9]	GTH_QUAD.RXDATA3[44]
CELL[24].OUT_BEL[11]	GTH_QUAD.RXVALID3[5]
CELL[24].OUT_BEL[12]	GTH_QUAD.RXDATA3[45]
CELL[24].OUT_BEL[13]	GTH_QUAD.RXDATA3[42]
CELL[24].OUT_BEL[14]	GTH_QUAD.RXDATA3[38]
CELL[24].OUT_BEL[15]	GTH_QUAD.RXCTRLACK3
CELL[24].OUT_BEL[16]	GTH_QUAD.RXDATA3[36]
CELL[24].OUT_BEL[17]	GTH_QUAD.RXDATA3[40]
CELL[24].OUT_BEL[18]	GTH_QUAD.RXVALID3[1]
CELL[24].OUT_BEL[21]	GTH_QUAD.RXDATA3[37]
CELL[24].OUT_BEL[22]	GTH_QUAD.SCANOUT[10]
CELL[25].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA3[3]
CELL[25].IMUX_IMUX_DELAY[3]	GTH_QUAD.TXCTRL3[3]
CELL[25].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDEEMPH3
CELL[25].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA3[47]
CELL[25].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA3[55]
CELL[25].IMUX_IMUX_DELAY[15]	GTH_QUAD.RXSLIP3
CELL[25].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA3[11]
CELL[25].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA3[7]
CELL[25].IMUX_IMUX_DELAY[20]	GTH_QUAD.CLKTESTSIG[4]
CELL[25].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA3[63]
CELL[25].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA3[51]
CELL[25].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA3[19]
CELL[25].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA3[15]
CELL[25].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA3[43]
CELL[25].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA3[23]
CELL[25].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB3[6]
CELL[25].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA3[35]
CELL[25].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL3[4]
CELL[25].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA3[39]
CELL[25].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA3[59]
CELL[25].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB3[7]
CELL[25].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA3[27]
CELL[25].IMUX_IMUX_DELAY[45]	GTH_QUAD.CLKTESTSIG[5]
CELL[25].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA3[31]
CELL[25].OUT_BEL[0]	GTH_QUAD.RXDATA3[53]
CELL[25].OUT_BEL[4]	GTH_QUAD.RXDATA3[54]
CELL[25].OUT_BEL[6]	GTH_QUAD.RXDATA3[50]
CELL[25].OUT_BEL[7]	GTH_QUAD.RXDATA3[51]
CELL[25].OUT_BEL[8]	GTH_QUAD.RXDATA3[52]
CELL[25].OUT_BEL[9]	GTH_QUAD.RXDATA3[48]
CELL[25].OUT_BEL[11]	GTH_QUAD.RXVALID3[4]
CELL[25].OUT_BEL[12]	GTH_QUAD.RXDATA3[47]
CELL[25].OUT_BEL[13]	GTH_QUAD.RXDATA3[49]
CELL[25].OUT_BEL[14]	GTH_QUAD.RXDATA3[46]
CELL[25].OUT_BEL[17]	GTH_QUAD.RXDATA3[57]
CELL[25].OUT_BEL[18]	GTH_QUAD.RXVALID3[0]
CELL[26].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA3[2]
CELL[26].IMUX_IMUX_DELAY[4]	GTH_QUAD.TXDATA3[46]
CELL[26].IMUX_IMUX_DELAY[5]	GTH_QUAD.RXENCOMMADET3
CELL[26].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA3[54]
CELL[26].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA3[10]
CELL[26].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA3[6]
CELL[26].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXCTRL3[2]
CELL[26].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA3[62]
CELL[26].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA3[50]
CELL[26].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATAMSB3[5]
CELL[26].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA3[14]
CELL[26].IMUX_IMUX_DELAY[27]	GTH_QUAD.TXCTRL3[5]
CELL[26].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA3[42]
CELL[26].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA3[22]
CELL[26].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXDATAMSB3[3]
CELL[26].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA3[18]
CELL[26].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA3[38]
CELL[26].IMUX_IMUX_DELAY[38]	GTH_QUAD.TXDATAMSB3[2]
CELL[26].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA3[58]
CELL[26].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB3[4]
CELL[26].IMUX_IMUX_DELAY[41]	GTH_QUAD.TXDATA3[34]
CELL[26].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA3[26]
CELL[26].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA3[30]
CELL[26].OUT_BEL[0]	GTH_QUAD.RXDATA3[60]
CELL[26].OUT_BEL[6]	GTH_QUAD.RXDATA3[59]
CELL[26].OUT_BEL[7]	GTH_QUAD.RXDATA3[63]
CELL[26].OUT_BEL[8]	GTH_QUAD.RXDATA3[61]
CELL[26].OUT_BEL[9]	GTH_QUAD.RXDATA3[58]
CELL[26].OUT_BEL[12]	GTH_QUAD.RXDATA3[56]
CELL[26].OUT_BEL[13]	GTH_QUAD.RXDATA3[62]
CELL[26].OUT_BEL[16]	GTH_QUAD.RXDATA3[55]
CELL[27].IMUX_CLK[0]	GTH_QUAD.TXUSERCLKIN3
CELL[27].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[11]
CELL[27].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA3[53]
CELL[27].IMUX_IMUX_DELAY[9]	GTH_QUAD.TXDATAMSB3[1]
CELL[27].IMUX_IMUX_DELAY[11]	GTH_QUAD.TXCTRL3[1]
CELL[27].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA3[45]
CELL[27].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA3[61]
CELL[27].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA3[1]
CELL[27].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATA3[17]
CELL[27].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA3[5]
CELL[27].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA3[49]
CELL[27].IMUX_IMUX_DELAY[24]	GTH_QUAD.TXDATA3[9]
CELL[27].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA3[13]
CELL[27].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA3[41]
CELL[27].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA3[21]
CELL[27].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA3[57]
CELL[27].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA3[33]
CELL[27].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL3[6]
CELL[27].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA3[37]
CELL[27].IMUX_IMUX_DELAY[38]	GTH_QUAD.TXDATA3[29]
CELL[27].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB3[0]
CELL[27].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA3[25]
CELL[27].OUT_BEL[0]	GTH_QUAD.SCANOUT[11]
CELL[27].OUT_BEL[4]	GTH_QUAD.RXCODEERR3[5]
CELL[27].OUT_BEL[7]	GTH_QUAD.RXDISPERR3[7]
CELL[27].OUT_BEL[8]	GTH_QUAD.RXCODEERR3[4]
CELL[27].OUT_BEL[9]	GTH_QUAD.RXCODEERR3[7]
CELL[27].OUT_BEL[12]	GTH_QUAD.RXCODEERR3[3]
CELL[27].OUT_BEL[13]	GTH_QUAD.RXDISPERR3[1]
CELL[27].OUT_BEL[14]	GTH_QUAD.RXDISPERR3[3]
CELL[27].OUT_BEL[16]	GTH_QUAD.RXDISPERR3[5]
CELL[27].OUT_BEL[18]	GTH_QUAD.RXCODEERR3[1]
CELL[28].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA3[0]
CELL[28].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA3[52]
CELL[28].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA3[8]
CELL[28].IMUX_IMUX_DELAY[11]	GTH_QUAD.TXCTRL3[0]
CELL[28].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA3[44]
CELL[28].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA3[60]
CELL[28].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATA3[16]
CELL[28].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA3[4]
CELL[28].IMUX_IMUX_DELAY[21]	GTH_QUAD.TXDATA3[20]
CELL[28].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA3[48]
CELL[28].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA3[32]
CELL[28].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA3[12]
CELL[28].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA3[40]
CELL[28].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL3[7]
CELL[28].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA3[36]
CELL[28].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA3[56]
CELL[28].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA3[24]
CELL[28].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA3[28]
CELL[28].OUT_BEL[2]	GTH_QUAD.RXDATATAP3
CELL[28].OUT_BEL[6]	GTH_QUAD.RXDISPERR3[4]
CELL[28].OUT_BEL[7]	GTH_QUAD.RXDISPERR3[6]
CELL[28].OUT_BEL[9]	GTH_QUAD.RXCODEERR3[6]
CELL[28].OUT_BEL[12]	GTH_QUAD.RXCODEERR3[2]
CELL[28].OUT_BEL[13]	GTH_QUAD.RXDISPERR3[0]
CELL[28].OUT_BEL[16]	GTH_QUAD.RXDISPERR3[2]
CELL[28].OUT_BEL[18]	GTH_QUAD.RXCODEERR3[0]
CELL[29].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[12]
CELL[29].IMUX_IMUX_DELAY[14]	GTH_QUAD.PLLPCSCLKDIV[4]
CELL[29].IMUX_IMUX_DELAY[15]	GTH_QUAD.PLLPCSCLKDIV[2]
CELL[29].IMUX_IMUX_DELAY[21]	GTH_QUAD.PLLREFCLKSEL[2]
CELL[29].IMUX_IMUX_DELAY[22]	GTH_QUAD.PLLPCSCLKDIV[5]
CELL[29].IMUX_IMUX_DELAY[29]	GTH_QUAD.PLLREFCLKSEL[0]
CELL[29].IMUX_IMUX_DELAY[30]	GTH_QUAD.PLLPCSCLKDIV[3]
CELL[29].IMUX_IMUX_DELAY[31]	GTH_QUAD.PLLPCSCLKDIV[1]
CELL[29].IMUX_IMUX_DELAY[37]	GTH_QUAD.PLLREFCLKSEL[1]
CELL[29].IMUX_IMUX_DELAY[39]	GTH_QUAD.PLLPCSCLKDIV[0]
CELL[29].OUT_BEL[2]	GTH_QUAD.RXPCSCLKSMPL3
CELL[29].OUT_BEL[4]	GTH_QUAD.SCANOUT[12]
CELL[29].OUT_BEL[8]	GTH_QUAD.RESETDONE3
CELL[29].OUT_BEL[9]	GTH_QUAD.TXCTRLACK3
CELL[30].OUT_BEL[2]	GTH_QUAD.TXDATATAP12
CELL[30].OUT_BEL[4]	GTH_QUAD.RXDATA2[3]
CELL[30].OUT_BEL[7]	GTH_QUAD.RXDATA2[5]
CELL[30].OUT_BEL[8]	GTH_QUAD.RXDATA2[7]
CELL[30].OUT_BEL[12]	GTH_QUAD.RXDATA2[0]
CELL[30].OUT_BEL[13]	GTH_QUAD.RXDATA2[4]
CELL[30].OUT_BEL[14]	GTH_QUAD.RXDATA2[8]
CELL[30].OUT_BEL[15]	GTH_QUAD.RXCTRL2[0]
CELL[30].OUT_BEL[16]	GTH_QUAD.RXDATA2[1]
CELL[30].OUT_BEL[17]	GTH_QUAD.RXDATA2[16]
CELL[30].OUT_BEL[18]	GTH_QUAD.RXDATA2[2]
CELL[30].OUT_BEL[21]	GTH_QUAD.RXCTRL2[2]
CELL[30].OUT_BEL[23]	GTH_QUAD.RXDATA2[6]
CELL[31].IMUX_CLK[0]	GTH_QUAD.RXUSERCLKIN2
CELL[31].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[13]
CELL[31].OUT_BEL[0]	GTH_QUAD.RXDATA2[11]
CELL[31].OUT_BEL[3]	GTH_QUAD.RXCTRL2[3]
CELL[31].OUT_BEL[4]	GTH_QUAD.SCANOUT[13]
CELL[31].OUT_BEL[7]	GTH_QUAD.RXDATA2[13]
CELL[31].OUT_BEL[8]	GTH_QUAD.RXDATA2[17]
CELL[31].OUT_BEL[9]	GTH_QUAD.RXDATA2[12]
CELL[31].OUT_BEL[12]	GTH_QUAD.RXDATA2[10]
CELL[31].OUT_BEL[13]	GTH_QUAD.RXDATA2[14]
CELL[31].OUT_BEL[14]	GTH_QUAD.RXDATA2[9]
CELL[31].OUT_BEL[15]	GTH_QUAD.RXCTRL2[1]
CELL[31].OUT_BEL[16]	GTH_QUAD.RXDATA2[15]
CELL[31].OUT_BEL[17]	GTH_QUAD.RXDATA2[20]
CELL[32].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANMODEB
CELL[32].IMUX_IMUX_DELAY[32]	GTH_QUAD.RXBUFRESET2
CELL[32].OUT_BEL[0]	GTH_QUAD.RXDATA2[19]
CELL[32].OUT_BEL[3]	GTH_QUAD.RXCTRL2[4]
CELL[32].OUT_BEL[4]	GTH_QUAD.RXVALID2[3]
CELL[32].OUT_BEL[7]	GTH_QUAD.RXDATA2[23]
CELL[32].OUT_BEL[8]	GTH_QUAD.RXDATA2[25]
CELL[32].OUT_BEL[9]	GTH_QUAD.RXDATA2[24]
CELL[32].OUT_BEL[12]	GTH_QUAD.RXDATA2[18]
CELL[32].OUT_BEL[13]	GTH_QUAD.RXDATA2[22]
CELL[32].OUT_BEL[14]	GTH_QUAD.RXDATA2[28]
CELL[32].OUT_BEL[15]	GTH_QUAD.RXCTRL2[6]
CELL[32].OUT_BEL[16]	GTH_QUAD.RXDATA2[21]
CELL[32].OUT_BEL[21]	GTH_QUAD.RXVALID2[7]
CELL[33].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXBUFRESET2
CELL[33].OUT_BEL[0]	GTH_QUAD.RXDATA2[34]
CELL[33].OUT_BEL[2]	GTH_QUAD.TXDATATAP22
CELL[33].OUT_BEL[4]	GTH_QUAD.RXDATA2[35]
CELL[33].OUT_BEL[7]	GTH_QUAD.RXDATA2[31]
CELL[33].OUT_BEL[8]	GTH_QUAD.RXDATA2[33]
CELL[33].OUT_BEL[9]	GTH_QUAD.RXDATA2[27]
CELL[33].OUT_BEL[11]	GTH_QUAD.RXVALID2[6]
CELL[33].OUT_BEL[12]	GTH_QUAD.RXDATA2[32]
CELL[33].OUT_BEL[13]	GTH_QUAD.RXDATA2[26]
CELL[33].OUT_BEL[14]	GTH_QUAD.RXDATA2[29]
CELL[33].OUT_BEL[15]	GTH_QUAD.RXCTRL2[5]
CELL[33].OUT_BEL[16]	GTH_QUAD.RXDATA2[30]
CELL[33].OUT_BEL[18]	GTH_QUAD.RXVALID2[2]
CELL[33].OUT_BEL[21]	GTH_QUAD.RXCTRL2[7]
CELL[34].IMUX_IMUX_DELAY[4]	GTH_QUAD.SCANIN[14]
CELL[34].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXPOWERDOWN2[1]
CELL[34].IMUX_IMUX_DELAY[7]	GTH_QUAD.RXRATE2[1]
CELL[34].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXMARGIN2[2]
CELL[34].IMUX_IMUX_DELAY[12]	GTH_QUAD.DFETRAINCTRL2
CELL[34].IMUX_IMUX_DELAY[13]	GTH_QUAD.TXPOWERDOWN2[0]
CELL[34].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXMARGIN2[1]
CELL[34].IMUX_IMUX_DELAY[22]	GTH_QUAD.SAMPLERATE2[2]
CELL[34].IMUX_IMUX_DELAY[23]	GTH_QUAD.RXRATE2[0]
CELL[34].IMUX_IMUX_DELAY[29]	GTH_QUAD.RXPOWERDOWN2[1]
CELL[34].IMUX_IMUX_DELAY[30]	GTH_QUAD.SAMPLERATE2[1]
CELL[34].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXRATE2[1]
CELL[34].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXMARGIN2[0]
CELL[34].IMUX_IMUX_DELAY[33]	GTH_QUAD.RXPOLARITY2
CELL[34].IMUX_IMUX_DELAY[37]	GTH_QUAD.RXPOWERDOWN2[0]
CELL[34].IMUX_IMUX_DELAY[38]	GTH_QUAD.SAMPLERATE2[0]
CELL[34].IMUX_IMUX_DELAY[44]	GTH_QUAD.POWERDOWN2
CELL[34].IMUX_IMUX_DELAY[47]	GTH_QUAD.TXRATE2[0]
CELL[34].OUT_BEL[0]	GTH_QUAD.RXDATA2[41]
CELL[34].OUT_BEL[2]	GTH_QUAD.TXPCSCLKSMPL2
CELL[34].OUT_BEL[4]	GTH_QUAD.RXDATA2[43]
CELL[34].OUT_BEL[8]	GTH_QUAD.RXDATA2[39]
CELL[34].OUT_BEL[9]	GTH_QUAD.RXDATA2[44]
CELL[34].OUT_BEL[11]	GTH_QUAD.RXVALID2[5]
CELL[34].OUT_BEL[12]	GTH_QUAD.RXDATA2[45]
CELL[34].OUT_BEL[13]	GTH_QUAD.RXDATA2[42]
CELL[34].OUT_BEL[14]	GTH_QUAD.RXDATA2[38]
CELL[34].OUT_BEL[15]	GTH_QUAD.RXCTRLACK2
CELL[34].OUT_BEL[16]	GTH_QUAD.RXDATA2[36]
CELL[34].OUT_BEL[17]	GTH_QUAD.RXDATA2[40]
CELL[34].OUT_BEL[18]	GTH_QUAD.RXVALID2[1]
CELL[34].OUT_BEL[21]	GTH_QUAD.RXDATA2[37]
CELL[34].OUT_BEL[22]	GTH_QUAD.SCANOUT[14]
CELL[35].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA2[3]
CELL[35].IMUX_IMUX_DELAY[3]	GTH_QUAD.TXCTRL2[3]
CELL[35].IMUX_IMUX_DELAY[5]	GTH_QUAD.TXDEEMPH2
CELL[35].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA2[47]
CELL[35].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA2[55]
CELL[35].IMUX_IMUX_DELAY[15]	GTH_QUAD.RXSLIP2
CELL[35].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA2[11]
CELL[35].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA2[7]
CELL[35].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA2[63]
CELL[35].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA2[51]
CELL[35].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA2[19]
CELL[35].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA2[15]
CELL[35].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA2[43]
CELL[35].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA2[23]
CELL[35].IMUX_IMUX_DELAY[30]	GTH_QUAD.TXDATAMSB2[6]
CELL[35].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA2[35]
CELL[35].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL2[4]
CELL[35].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA2[39]
CELL[35].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA2[59]
CELL[35].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB2[7]
CELL[35].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA2[27]
CELL[35].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA2[31]
CELL[35].OUT_BEL[0]	GTH_QUAD.RXDATA2[53]
CELL[35].OUT_BEL[4]	GTH_QUAD.RXDATA2[54]
CELL[35].OUT_BEL[6]	GTH_QUAD.RXDATA2[50]
CELL[35].OUT_BEL[7]	GTH_QUAD.RXDATA2[51]
CELL[35].OUT_BEL[8]	GTH_QUAD.RXDATA2[52]
CELL[35].OUT_BEL[9]	GTH_QUAD.RXDATA2[48]
CELL[35].OUT_BEL[11]	GTH_QUAD.RXVALID2[4]
CELL[35].OUT_BEL[12]	GTH_QUAD.RXDATA2[47]
CELL[35].OUT_BEL[13]	GTH_QUAD.RXDATA2[49]
CELL[35].OUT_BEL[14]	GTH_QUAD.RXDATA2[46]
CELL[35].OUT_BEL[17]	GTH_QUAD.RXDATA2[57]
CELL[35].OUT_BEL[18]	GTH_QUAD.RXVALID2[0]
CELL[36].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA2[2]
CELL[36].IMUX_IMUX_DELAY[4]	GTH_QUAD.TXDATA2[46]
CELL[36].IMUX_IMUX_DELAY[5]	GTH_QUAD.RXENCOMMADET2
CELL[36].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA2[54]
CELL[36].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA2[10]
CELL[36].IMUX_IMUX_DELAY[12]	GTH_QUAD.SCANIN[15]
CELL[36].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA2[6]
CELL[36].IMUX_IMUX_DELAY[19]	GTH_QUAD.TXCTRL2[2]
CELL[36].IMUX_IMUX_DELAY[22]	GTH_QUAD.TXDATA2[62]
CELL[36].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA2[50]
CELL[36].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATAMSB2[5]
CELL[36].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA2[14]
CELL[36].IMUX_IMUX_DELAY[27]	GTH_QUAD.TXCTRL2[5]
CELL[36].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA2[42]
CELL[36].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA2[22]
CELL[36].IMUX_IMUX_DELAY[32]	GTH_QUAD.TXDATAMSB2[3]
CELL[36].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA2[18]
CELL[36].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA2[38]
CELL[36].IMUX_IMUX_DELAY[38]	GTH_QUAD.TXDATAMSB2[2]
CELL[36].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA2[58]
CELL[36].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB2[4]
CELL[36].IMUX_IMUX_DELAY[41]	GTH_QUAD.TXDATA2[34]
CELL[36].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA2[26]
CELL[36].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA2[30]
CELL[36].OUT_BEL[0]	GTH_QUAD.RXDATA2[60]
CELL[36].OUT_BEL[4]	GTH_QUAD.SCANOUT[15]
CELL[36].OUT_BEL[6]	GTH_QUAD.RXDATA2[59]
CELL[36].OUT_BEL[7]	GTH_QUAD.RXDATA2[63]
CELL[36].OUT_BEL[8]	GTH_QUAD.RXDATA2[61]
CELL[36].OUT_BEL[9]	GTH_QUAD.RXDATA2[58]
CELL[36].OUT_BEL[12]	GTH_QUAD.RXDATA2[56]
CELL[36].OUT_BEL[13]	GTH_QUAD.RXDATA2[62]
CELL[36].OUT_BEL[16]	GTH_QUAD.RXDATA2[55]
CELL[37].IMUX_CLK[0]	GTH_QUAD.TXUSERCLKIN2
CELL[37].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA2[53]
CELL[37].IMUX_IMUX_DELAY[9]	GTH_QUAD.TXDATAMSB2[1]
CELL[37].IMUX_IMUX_DELAY[11]	GTH_QUAD.TXCTRL2[1]
CELL[37].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA2[45]
CELL[37].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA2[61]
CELL[37].IMUX_IMUX_DELAY[16]	GTH_QUAD.TXDATA2[1]
CELL[37].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATA2[17]
CELL[37].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA2[5]
CELL[37].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA2[49]
CELL[37].IMUX_IMUX_DELAY[24]	GTH_QUAD.TXDATA2[9]
CELL[37].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA2[13]
CELL[37].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA2[41]
CELL[37].IMUX_IMUX_DELAY[29]	GTH_QUAD.TXDATA2[21]
CELL[37].IMUX_IMUX_DELAY[31]	GTH_QUAD.TXDATA2[57]
CELL[37].IMUX_IMUX_DELAY[33]	GTH_QUAD.TXDATA2[33]
CELL[37].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL2[6]
CELL[37].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA2[37]
CELL[37].IMUX_IMUX_DELAY[38]	GTH_QUAD.TXDATA2[29]
CELL[37].IMUX_IMUX_DELAY[40]	GTH_QUAD.TXDATAMSB2[0]
CELL[37].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA2[25]
CELL[37].OUT_BEL[4]	GTH_QUAD.RXCODEERR2[5]
CELL[37].OUT_BEL[7]	GTH_QUAD.RXDISPERR2[7]
CELL[37].OUT_BEL[8]	GTH_QUAD.RXCODEERR2[4]
CELL[37].OUT_BEL[9]	GTH_QUAD.RXCODEERR2[7]
CELL[37].OUT_BEL[12]	GTH_QUAD.RXCODEERR2[3]
CELL[37].OUT_BEL[13]	GTH_QUAD.RXDISPERR2[1]
CELL[37].OUT_BEL[14]	GTH_QUAD.RXDISPERR2[3]
CELL[37].OUT_BEL[16]	GTH_QUAD.RXDISPERR2[5]
CELL[37].OUT_BEL[18]	GTH_QUAD.RXCODEERR2[1]
CELL[38].IMUX_IMUX_DELAY[0]	GTH_QUAD.TXDATA2[0]
CELL[38].IMUX_IMUX_DELAY[6]	GTH_QUAD.TXDATA2[52]
CELL[38].IMUX_IMUX_DELAY[8]	GTH_QUAD.TXDATA2[8]
CELL[38].IMUX_IMUX_DELAY[11]	GTH_QUAD.TXCTRL2[0]
CELL[38].IMUX_IMUX_DELAY[12]	GTH_QUAD.TXDATA2[44]
CELL[38].IMUX_IMUX_DELAY[14]	GTH_QUAD.TXDATA2[60]
CELL[38].IMUX_IMUX_DELAY[17]	GTH_QUAD.TXDATA2[16]
CELL[38].IMUX_IMUX_DELAY[18]	GTH_QUAD.TXDATA2[4]
CELL[38].IMUX_IMUX_DELAY[21]	GTH_QUAD.TXDATA2[20]
CELL[38].IMUX_IMUX_DELAY[23]	GTH_QUAD.TXDATA2[48]
CELL[38].IMUX_IMUX_DELAY[25]	GTH_QUAD.TXDATA2[32]
CELL[38].IMUX_IMUX_DELAY[26]	GTH_QUAD.TXDATA2[12]
CELL[38].IMUX_IMUX_DELAY[28]	GTH_QUAD.TXDATA2[40]
CELL[38].IMUX_IMUX_DELAY[35]	GTH_QUAD.TXCTRL2[7]
CELL[38].IMUX_IMUX_DELAY[37]	GTH_QUAD.TXDATA2[36]
CELL[38].IMUX_IMUX_DELAY[39]	GTH_QUAD.TXDATA2[56]
CELL[38].IMUX_IMUX_DELAY[42]	GTH_QUAD.TXDATA2[24]
CELL[38].IMUX_IMUX_DELAY[46]	GTH_QUAD.TXDATA2[28]
CELL[38].OUT_BEL[2]	GTH_QUAD.RXDATATAP2
CELL[38].OUT_BEL[6]	GTH_QUAD.RXDISPERR2[4]
CELL[38].OUT_BEL[7]	GTH_QUAD.RXDISPERR2[6]
CELL[38].OUT_BEL[9]	GTH_QUAD.RXCODEERR2[6]
CELL[38].OUT_BEL[12]	GTH_QUAD.RXCODEERR2[2]
CELL[38].OUT_BEL[13]	GTH_QUAD.RXDISPERR2[0]
CELL[38].OUT_BEL[16]	GTH_QUAD.RXDISPERR2[2]
CELL[38].OUT_BEL[18]	GTH_QUAD.RXCODEERR2[0]
CELL[39].OUT_BEL[2]	GTH_QUAD.RXPCSCLKSMPL2
CELL[39].OUT_BEL[8]	GTH_QUAD.RESETDONE2
CELL[39].OUT_BEL[9]	GTH_QUAD.TXCTRLACK2

Bitstream

virtex6 GTH rect MAIN[0]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 14	GTH_QUAD: DRP[7] bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 12	GTH_QUAD: DRP[7] bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 10	GTH_QUAD: DRP[7] bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 8	GTH_QUAD: DRP[7] bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 6	GTH_QUAD: DRP[7] bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 4	GTH_QUAD: DRP[7] bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 2	GTH_QUAD: DRP[7] bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[7] bit 0	GTH_QUAD: DRP[7] bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 14	GTH_QUAD: DRP[6] bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 12	GTH_QUAD: DRP[6] bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 10	GTH_QUAD: DRP[6] bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 8	GTH_QUAD: DRP[6] bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 6	GTH_QUAD: DRP[6] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 4	GTH_QUAD: DRP[6] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 2	GTH_QUAD: DRP[6] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[6] bit 0	GTH_QUAD: DRP[6] bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 14	GTH_QUAD: DRP[5] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 12	GTH_QUAD: DRP[5] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 10	GTH_QUAD: DRP[5] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 8	GTH_QUAD: DRP[5] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 6	GTH_QUAD: DRP[5] bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 4	GTH_QUAD: DRP[5] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 2	GTH_QUAD: DRP[5] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[5] bit 0	GTH_QUAD: DRP[5] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 14	GTH_QUAD: DRP[4] bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 12	GTH_QUAD: DRP[4] bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 10	GTH_QUAD: DRP[4] bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 8	GTH_QUAD: DRP[4] bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 6	GTH_QUAD: DRP[4] bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 4	GTH_QUAD: DRP[4] bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 2	GTH_QUAD: DRP[4] bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[4] bit 0	GTH_QUAD: DRP[4] bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 14	GTH_QUAD: DRP[3] bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 12	GTH_QUAD: DRP[3] bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 10	GTH_QUAD: DRP[3] bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 8	GTH_QUAD: DRP[3] bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 6	GTH_QUAD: DRP[3] bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 4	GTH_QUAD: DRP[3] bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 2	GTH_QUAD: DRP[3] bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[3] bit 0	GTH_QUAD: DRP[3] bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 14	GTH_QUAD: DRP[2] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 12	GTH_QUAD: DRP[2] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 10	GTH_QUAD: DRP[2] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 8	GTH_QUAD: DRP[2] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 6	GTH_QUAD: DRP[2] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 4	GTH_QUAD: DRP[2] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 2	GTH_QUAD: DRP[2] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[2] bit 0	GTH_QUAD: DRP[2] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 14	GTH_QUAD: DRP[1] bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 12	GTH_QUAD: DRP[1] bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 10	GTH_QUAD: DRP[1] bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 8	GTH_QUAD: DRP[1] bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 6	GTH_QUAD: DRP[1] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 4	GTH_QUAD: DRP[1] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 2	GTH_QUAD: DRP[1] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[1] bit 0	GTH_QUAD: DRP[1] bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 14	GTH_QUAD: DRP[0] bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 12	GTH_QUAD: DRP[0] bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 10	GTH_QUAD: DRP[0] bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 8	GTH_QUAD: DRP[0] bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 6	GTH_QUAD: DRP[0] bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 4	GTH_QUAD: DRP[0] bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 2	GTH_QUAD: DRP[0] bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[0] bit 0	GTH_QUAD: DRP[0] bit 1

virtex6 GTH rect MAIN[1]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 14 GTH_QUAD: PLL_CFG0 bit 14	GTH_QUAD: DRP[15] bit 15 GTH_QUAD: PLL_CFG0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 12 GTH_QUAD: PLL_CFG0 bit 12	GTH_QUAD: DRP[15] bit 13 GTH_QUAD: PLL_CFG0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 10 GTH_QUAD: PLL_CFG0 bit 10	GTH_QUAD: DRP[15] bit 11 GTH_QUAD: PLL_CFG0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 8 GTH_QUAD: PLL_CFG0 bit 8	GTH_QUAD: DRP[15] bit 9 GTH_QUAD: PLL_CFG0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 6 GTH_QUAD: PLL_CFG0 bit 6	GTH_QUAD: DRP[15] bit 7 GTH_QUAD: PLL_CFG0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 4 GTH_QUAD: PLL_CFG0 bit 4	GTH_QUAD: DRP[15] bit 5 GTH_QUAD: PLL_CFG0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 2 GTH_QUAD: PLL_CFG0 bit 2	GTH_QUAD: DRP[15] bit 3 GTH_QUAD: PLL_CFG0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[15] bit 0 GTH_QUAD: PLL_CFG0 bit 0	GTH_QUAD: DRP[15] bit 1 GTH_QUAD: PLL_CFG0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 14 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 14	GTH_QUAD: DRP[14] bit 15 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 12 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 12	GTH_QUAD: DRP[14] bit 13 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 10 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 10	GTH_QUAD: DRP[14] bit 11 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 8 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 8	GTH_QUAD: DRP[14] bit 9 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 6 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 6	GTH_QUAD: DRP[14] bit 7 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 4 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 4	GTH_QUAD: DRP[14] bit 5 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 2 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 2	GTH_QUAD: DRP[14] bit 3 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[14] bit 0 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 0	GTH_QUAD: DRP[14] bit 1 GTH_QUAD: E10GBASEKX_CTRL_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 14 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 14	GTH_QUAD: DRP[13] bit 15 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 12 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 12	GTH_QUAD: DRP[13] bit 13 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 10 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 10	GTH_QUAD: DRP[13] bit 11 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 8 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 8	GTH_QUAD: DRP[13] bit 9 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 6 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 6	GTH_QUAD: DRP[13] bit 7 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 4 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 4	GTH_QUAD: DRP[13] bit 5 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 2 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 2	GTH_QUAD: DRP[13] bit 3 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[13] bit 0 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 0	GTH_QUAD: DRP[13] bit 1 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 14 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 14	GTH_QUAD: DRP[12] bit 15 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 12 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 12	GTH_QUAD: DRP[12] bit 13 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 10 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 10	GTH_QUAD: DRP[12] bit 11 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 8 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 8	GTH_QUAD: DRP[12] bit 9 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 6 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 6	GTH_QUAD: DRP[12] bit 7 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 4 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 4	GTH_QUAD: DRP[12] bit 5 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 2 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 2	GTH_QUAD: DRP[12] bit 3 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[12] bit 0 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 0	GTH_QUAD: DRP[12] bit 1 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 14 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 14	GTH_QUAD: DRP[11] bit 15 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 12 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 12	GTH_QUAD: DRP[11] bit 13 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 10 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 10	GTH_QUAD: DRP[11] bit 11 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 8 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 8	GTH_QUAD: DRP[11] bit 9 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 6 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 6	GTH_QUAD: DRP[11] bit 7 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 4 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 4	GTH_QUAD: DRP[11] bit 5 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 2 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 2	GTH_QUAD: DRP[11] bit 3 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[11] bit 0 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 0	GTH_QUAD: DRP[11] bit 1 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 14 GTH_QUAD: TX_DISABLE_LANE0 bit 14	GTH_QUAD: DRP[10] bit 15 GTH_QUAD: TX_DISABLE_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 12 GTH_QUAD: TX_DISABLE_LANE0 bit 12	GTH_QUAD: DRP[10] bit 13 GTH_QUAD: TX_DISABLE_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 10 GTH_QUAD: TX_DISABLE_LANE0 bit 10	GTH_QUAD: DRP[10] bit 11 GTH_QUAD: TX_DISABLE_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 8 GTH_QUAD: TX_DISABLE_LANE0 bit 8	GTH_QUAD: DRP[10] bit 9 GTH_QUAD: TX_DISABLE_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 6 GTH_QUAD: TX_DISABLE_LANE0 bit 6	GTH_QUAD: DRP[10] bit 7 GTH_QUAD: TX_DISABLE_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 4 GTH_QUAD: TX_DISABLE_LANE0 bit 4	GTH_QUAD: DRP[10] bit 5 GTH_QUAD: TX_DISABLE_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 2 GTH_QUAD: TX_DISABLE_LANE0 bit 2	GTH_QUAD: DRP[10] bit 3 GTH_QUAD: TX_DISABLE_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[10] bit 0 GTH_QUAD: TX_DISABLE_LANE0 bit 0	GTH_QUAD: DRP[10] bit 1 GTH_QUAD: TX_DISABLE_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 14 GTH_QUAD: PMA_CTRL2_LANE0 bit 14	GTH_QUAD: DRP[9] bit 15 GTH_QUAD: PMA_CTRL2_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 12 GTH_QUAD: PMA_CTRL2_LANE0 bit 12	GTH_QUAD: DRP[9] bit 13 GTH_QUAD: PMA_CTRL2_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 10 GTH_QUAD: PMA_CTRL2_LANE0 bit 10	GTH_QUAD: DRP[9] bit 11 GTH_QUAD: PMA_CTRL2_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 8 GTH_QUAD: PMA_CTRL2_LANE0 bit 8	GTH_QUAD: DRP[9] bit 9 GTH_QUAD: PMA_CTRL2_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 6 GTH_QUAD: PMA_CTRL2_LANE0 bit 6	GTH_QUAD: DRP[9] bit 7 GTH_QUAD: PMA_CTRL2_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 4 GTH_QUAD: PMA_CTRL2_LANE0 bit 4	GTH_QUAD: DRP[9] bit 5 GTH_QUAD: PMA_CTRL2_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 2 GTH_QUAD: PMA_CTRL2_LANE0 bit 2	GTH_QUAD: DRP[9] bit 3 GTH_QUAD: PMA_CTRL2_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[9] bit 0 GTH_QUAD: PMA_CTRL2_LANE0 bit 0	GTH_QUAD: DRP[9] bit 1 GTH_QUAD: PMA_CTRL2_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 14 GTH_QUAD: PMA_CTRL1_LANE0 bit 14	GTH_QUAD: DRP[8] bit 15 GTH_QUAD: PMA_CTRL1_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 12 GTH_QUAD: PMA_CTRL1_LANE0 bit 12	GTH_QUAD: DRP[8] bit 13 GTH_QUAD: PMA_CTRL1_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 10 GTH_QUAD: PMA_CTRL1_LANE0 bit 10	GTH_QUAD: DRP[8] bit 11 GTH_QUAD: PMA_CTRL1_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 8 GTH_QUAD: PMA_CTRL1_LANE0 bit 8	GTH_QUAD: DRP[8] bit 9 GTH_QUAD: PMA_CTRL1_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 6 GTH_QUAD: PMA_CTRL1_LANE0 bit 6	GTH_QUAD: DRP[8] bit 7 GTH_QUAD: PMA_CTRL1_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 4 GTH_QUAD: PMA_CTRL1_LANE0 bit 4	GTH_QUAD: DRP[8] bit 5 GTH_QUAD: PMA_CTRL1_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 2 GTH_QUAD: PMA_CTRL1_LANE0 bit 2	GTH_QUAD: DRP[8] bit 3 GTH_QUAD: PMA_CTRL1_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[8] bit 0 GTH_QUAD: PMA_CTRL1_LANE0 bit 0	GTH_QUAD: DRP[8] bit 1 GTH_QUAD: PMA_CTRL1_LANE0 bit 1

virtex6 GTH rect MAIN[2]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 14 GTH_QUAD: LANE_DMON_SEL bit 14	GTH_QUAD: DRP[23] bit 15 GTH_QUAD: LANE_DMON_SEL bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 12 GTH_QUAD: LANE_DMON_SEL bit 12	GTH_QUAD: DRP[23] bit 13 GTH_QUAD: LANE_DMON_SEL bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 10 GTH_QUAD: LANE_DMON_SEL bit 10	GTH_QUAD: DRP[23] bit 11 GTH_QUAD: LANE_DMON_SEL bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 8 GTH_QUAD: LANE_DMON_SEL bit 8	GTH_QUAD: DRP[23] bit 9 GTH_QUAD: LANE_DMON_SEL bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 6 GTH_QUAD: LANE_DMON_SEL bit 6	GTH_QUAD: DRP[23] bit 7 GTH_QUAD: LANE_DMON_SEL bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 4 GTH_QUAD: LANE_DMON_SEL bit 4	GTH_QUAD: DRP[23] bit 5 GTH_QUAD: LANE_DMON_SEL bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 2 GTH_QUAD: LANE_DMON_SEL bit 2	GTH_QUAD: DRP[23] bit 3 GTH_QUAD: LANE_DMON_SEL bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[23] bit 0 GTH_QUAD: LANE_DMON_SEL bit 0	GTH_QUAD: DRP[23] bit 1 GTH_QUAD: LANE_DMON_SEL bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 14 GTH_QUAD: GLBL_DMON_SEL bit 14	GTH_QUAD: DRP[22] bit 15 GTH_QUAD: GLBL_DMON_SEL bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 12 GTH_QUAD: GLBL_DMON_SEL bit 12	GTH_QUAD: DRP[22] bit 13 GTH_QUAD: GLBL_DMON_SEL bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 10 GTH_QUAD: GLBL_DMON_SEL bit 10	GTH_QUAD: DRP[22] bit 11 GTH_QUAD: GLBL_DMON_SEL bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 8 GTH_QUAD: GLBL_DMON_SEL bit 8	GTH_QUAD: DRP[22] bit 9 GTH_QUAD: GLBL_DMON_SEL bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 6 GTH_QUAD: GLBL_DMON_SEL bit 6	GTH_QUAD: DRP[22] bit 7 GTH_QUAD: GLBL_DMON_SEL bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 4 GTH_QUAD: GLBL_DMON_SEL bit 4	GTH_QUAD: DRP[22] bit 5 GTH_QUAD: GLBL_DMON_SEL bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 2 GTH_QUAD: GLBL_DMON_SEL bit 2	GTH_QUAD: DRP[22] bit 3 GTH_QUAD: GLBL_DMON_SEL bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[22] bit 0 GTH_QUAD: GLBL_DMON_SEL bit 0	GTH_QUAD: DRP[22] bit 1 GTH_QUAD: GLBL_DMON_SEL bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 14 GTH_QUAD: LANE_AMON_SEL bit 14	GTH_QUAD: DRP[21] bit 15 GTH_QUAD: LANE_AMON_SEL bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 12 GTH_QUAD: LANE_AMON_SEL bit 12	GTH_QUAD: DRP[21] bit 13 GTH_QUAD: LANE_AMON_SEL bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 10 GTH_QUAD: LANE_AMON_SEL bit 10	GTH_QUAD: DRP[21] bit 11 GTH_QUAD: LANE_AMON_SEL bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 8 GTH_QUAD: LANE_AMON_SEL bit 8	GTH_QUAD: DRP[21] bit 9 GTH_QUAD: LANE_AMON_SEL bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 6 GTH_QUAD: LANE_AMON_SEL bit 6	GTH_QUAD: DRP[21] bit 7 GTH_QUAD: LANE_AMON_SEL bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 4 GTH_QUAD: LANE_AMON_SEL bit 4	GTH_QUAD: DRP[21] bit 5 GTH_QUAD: LANE_AMON_SEL bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 2 GTH_QUAD: LANE_AMON_SEL bit 2	GTH_QUAD: DRP[21] bit 3 GTH_QUAD: LANE_AMON_SEL bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[21] bit 0 GTH_QUAD: LANE_AMON_SEL bit 0	GTH_QUAD: DRP[21] bit 1 GTH_QUAD: LANE_AMON_SEL bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 14 GTH_QUAD: GLBL_AMON_SEL bit 14	GTH_QUAD: DRP[20] bit 15 GTH_QUAD: GLBL_AMON_SEL bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 12 GTH_QUAD: GLBL_AMON_SEL bit 12	GTH_QUAD: DRP[20] bit 13 GTH_QUAD: GLBL_AMON_SEL bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 10 GTH_QUAD: GLBL_AMON_SEL bit 10	GTH_QUAD: DRP[20] bit 11 GTH_QUAD: GLBL_AMON_SEL bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 8 GTH_QUAD: GLBL_AMON_SEL bit 8	GTH_QUAD: DRP[20] bit 9 GTH_QUAD: GLBL_AMON_SEL bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 6 GTH_QUAD: GLBL_AMON_SEL bit 6	GTH_QUAD: DRP[20] bit 7 GTH_QUAD: GLBL_AMON_SEL bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 4 GTH_QUAD: GLBL_AMON_SEL bit 4	GTH_QUAD: DRP[20] bit 5 GTH_QUAD: GLBL_AMON_SEL bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 2 GTH_QUAD: GLBL_AMON_SEL bit 2	GTH_QUAD: DRP[20] bit 3 GTH_QUAD: GLBL_AMON_SEL bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[20] bit 0 GTH_QUAD: GLBL_AMON_SEL bit 0	GTH_QUAD: DRP[20] bit 1 GTH_QUAD: GLBL_AMON_SEL bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 14 GTH_QUAD: SLICE_CFG bit 14	GTH_QUAD: DRP[19] bit 15 GTH_QUAD: SLICE_CFG bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 12 GTH_QUAD: SLICE_CFG bit 12	GTH_QUAD: DRP[19] bit 13 GTH_QUAD: SLICE_CFG bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 10 GTH_QUAD: SLICE_CFG bit 10	GTH_QUAD: DRP[19] bit 11 GTH_QUAD: SLICE_CFG bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 8 GTH_QUAD: SLICE_CFG bit 8	GTH_QUAD: DRP[19] bit 9 GTH_QUAD: SLICE_CFG bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 6 GTH_QUAD: SLICE_CFG bit 6	GTH_QUAD: DRP[19] bit 7 GTH_QUAD: SLICE_CFG bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 4 GTH_QUAD: SLICE_CFG bit 4	GTH_QUAD: DRP[19] bit 5 GTH_QUAD: SLICE_CFG bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 2 GTH_QUAD: SLICE_CFG bit 2	GTH_QUAD: DRP[19] bit 3 GTH_QUAD: SLICE_CFG bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[19] bit 0 GTH_QUAD: SLICE_CFG bit 0	GTH_QUAD: DRP[19] bit 1 GTH_QUAD: SLICE_CFG bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 14 GTH_QUAD: MISC_CFG bit 14	GTH_QUAD: DRP[18] bit 15 GTH_QUAD: MISC_CFG bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 12 GTH_QUAD: MISC_CFG bit 12	GTH_QUAD: DRP[18] bit 13 GTH_QUAD: MISC_CFG bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 10 GTH_QUAD: MISC_CFG bit 10	GTH_QUAD: DRP[18] bit 11 GTH_QUAD: MISC_CFG bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 8 GTH_QUAD: MISC_CFG bit 8	GTH_QUAD: DRP[18] bit 9 GTH_QUAD: MISC_CFG bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 6 GTH_QUAD: MISC_CFG bit 6	GTH_QUAD: DRP[18] bit 7 GTH_QUAD: MISC_CFG bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 4 GTH_QUAD: MISC_CFG bit 4	GTH_QUAD: DRP[18] bit 5 GTH_QUAD: MISC_CFG bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 2 GTH_QUAD: MISC_CFG bit 2	GTH_QUAD: DRP[18] bit 3 GTH_QUAD: MISC_CFG bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[18] bit 0 GTH_QUAD: MISC_CFG bit 0	GTH_QUAD: DRP[18] bit 1 GTH_QUAD: MISC_CFG bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 14 GTH_QUAD: DLL_CFG0 bit 14	GTH_QUAD: DRP[17] bit 15 GTH_QUAD: DLL_CFG0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 12 GTH_QUAD: DLL_CFG0 bit 12	GTH_QUAD: DRP[17] bit 13 GTH_QUAD: DLL_CFG0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 10 GTH_QUAD: DLL_CFG0 bit 10	GTH_QUAD: DRP[17] bit 11 GTH_QUAD: DLL_CFG0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 8 GTH_QUAD: DLL_CFG0 bit 8	GTH_QUAD: DRP[17] bit 9 GTH_QUAD: DLL_CFG0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 6 GTH_QUAD: DLL_CFG0 bit 6	GTH_QUAD: DRP[17] bit 7 GTH_QUAD: DLL_CFG0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 4 GTH_QUAD: DLL_CFG0 bit 4	GTH_QUAD: DRP[17] bit 5 GTH_QUAD: DLL_CFG0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 2 GTH_QUAD: DLL_CFG0 bit 2	GTH_QUAD: DRP[17] bit 3 GTH_QUAD: DLL_CFG0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[17] bit 0 GTH_QUAD: DLL_CFG0 bit 0	GTH_QUAD: DRP[17] bit 1 GTH_QUAD: DLL_CFG0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 14 GTH_QUAD: PLL_CFG1 bit 14	GTH_QUAD: DRP[16] bit 15 GTH_QUAD: PLL_CFG1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 12 GTH_QUAD: PLL_CFG1 bit 12	GTH_QUAD: DRP[16] bit 13 GTH_QUAD: PLL_CFG1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 10 GTH_QUAD: PLL_CFG1 bit 10	GTH_QUAD: DRP[16] bit 11 GTH_QUAD: PLL_CFG1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 8 GTH_QUAD: PLL_CFG1 bit 8	GTH_QUAD: DRP[16] bit 9 GTH_QUAD: PLL_CFG1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 6 GTH_QUAD: PLL_CFG1 bit 6	GTH_QUAD: DRP[16] bit 7 GTH_QUAD: PLL_CFG1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 4 GTH_QUAD: PLL_CFG1 bit 4	GTH_QUAD: DRP[16] bit 5 GTH_QUAD: PLL_CFG1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 2 GTH_QUAD: PLL_CFG1 bit 2	GTH_QUAD: DRP[16] bit 3 GTH_QUAD: PLL_CFG1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[16] bit 0 GTH_QUAD: PLL_CFG1 bit 0	GTH_QUAD: DRP[16] bit 1 GTH_QUAD: PLL_CFG1 bit 1

virtex6 GTH rect MAIN[3]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 14 GTH_QUAD: TX_P1P2_CTRL bit 14	GTH_QUAD: DRP[31] bit 15 GTH_QUAD: TX_P1P2_CTRL bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 12 GTH_QUAD: TX_P1P2_CTRL bit 12	GTH_QUAD: DRP[31] bit 13 GTH_QUAD: TX_P1P2_CTRL bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 10 GTH_QUAD: TX_P1P2_CTRL bit 10	GTH_QUAD: DRP[31] bit 11 GTH_QUAD: TX_P1P2_CTRL bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 8 GTH_QUAD: TX_P1P2_CTRL bit 8	GTH_QUAD: DRP[31] bit 9 GTH_QUAD: TX_P1P2_CTRL bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 6 GTH_QUAD: TX_P1P2_CTRL bit 6	GTH_QUAD: DRP[31] bit 7 GTH_QUAD: TX_P1P2_CTRL bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 4 GTH_QUAD: TX_P1P2_CTRL bit 4	GTH_QUAD: DRP[31] bit 5 GTH_QUAD: TX_P1P2_CTRL bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 2 GTH_QUAD: TX_P1P2_CTRL bit 2	GTH_QUAD: DRP[31] bit 3 GTH_QUAD: TX_P1P2_CTRL bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[31] bit 0 GTH_QUAD: TX_P1P2_CTRL bit 0	GTH_QUAD: DRP[31] bit 1 GTH_QUAD: TX_P1P2_CTRL bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 14 GTH_QUAD: TX_P0P0S_CTRL bit 14	GTH_QUAD: DRP[30] bit 15 GTH_QUAD: TX_P0P0S_CTRL bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 12 GTH_QUAD: TX_P0P0S_CTRL bit 12	GTH_QUAD: DRP[30] bit 13 GTH_QUAD: TX_P0P0S_CTRL bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 10 GTH_QUAD: TX_P0P0S_CTRL bit 10	GTH_QUAD: DRP[30] bit 11 GTH_QUAD: TX_P0P0S_CTRL bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 8 GTH_QUAD: TX_P0P0S_CTRL bit 8	GTH_QUAD: DRP[30] bit 9 GTH_QUAD: TX_P0P0S_CTRL bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 6 GTH_QUAD: TX_P0P0S_CTRL bit 6	GTH_QUAD: DRP[30] bit 7 GTH_QUAD: TX_P0P0S_CTRL bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 4 GTH_QUAD: TX_P0P0S_CTRL bit 4	GTH_QUAD: DRP[30] bit 5 GTH_QUAD: TX_P0P0S_CTRL bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 2 GTH_QUAD: TX_P0P0S_CTRL bit 2	GTH_QUAD: DRP[30] bit 3 GTH_QUAD: TX_P0P0S_CTRL bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[30] bit 0 GTH_QUAD: TX_P0P0S_CTRL bit 0	GTH_QUAD: DRP[30] bit 1 GTH_QUAD: TX_P0P0S_CTRL bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 14 GTH_QUAD: RX_P2_CTRL bit 14	GTH_QUAD: DRP[29] bit 15 GTH_QUAD: RX_P2_CTRL bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 12 GTH_QUAD: RX_P2_CTRL bit 12	GTH_QUAD: DRP[29] bit 13 GTH_QUAD: RX_P2_CTRL bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 10 GTH_QUAD: RX_P2_CTRL bit 10	GTH_QUAD: DRP[29] bit 11 GTH_QUAD: RX_P2_CTRL bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 8 GTH_QUAD: RX_P2_CTRL bit 8	GTH_QUAD: DRP[29] bit 9 GTH_QUAD: RX_P2_CTRL bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 6 GTH_QUAD: RX_P2_CTRL bit 6	GTH_QUAD: DRP[29] bit 7 GTH_QUAD: RX_P2_CTRL bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 4 GTH_QUAD: RX_P2_CTRL bit 4	GTH_QUAD: DRP[29] bit 5 GTH_QUAD: RX_P2_CTRL bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 2 GTH_QUAD: RX_P2_CTRL bit 2	GTH_QUAD: DRP[29] bit 3 GTH_QUAD: RX_P2_CTRL bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[29] bit 0 GTH_QUAD: RX_P2_CTRL bit 0	GTH_QUAD: DRP[29] bit 1 GTH_QUAD: RX_P2_CTRL bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 14 GTH_QUAD: RX_P1_CTRL bit 14	GTH_QUAD: DRP[28] bit 15 GTH_QUAD: RX_P1_CTRL bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 12 GTH_QUAD: RX_P1_CTRL bit 12	GTH_QUAD: DRP[28] bit 13 GTH_QUAD: RX_P1_CTRL bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 10 GTH_QUAD: RX_P1_CTRL bit 10	GTH_QUAD: DRP[28] bit 11 GTH_QUAD: RX_P1_CTRL bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 8 GTH_QUAD: RX_P1_CTRL bit 8	GTH_QUAD: DRP[28] bit 9 GTH_QUAD: RX_P1_CTRL bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 6 GTH_QUAD: RX_P1_CTRL bit 6	GTH_QUAD: DRP[28] bit 7 GTH_QUAD: RX_P1_CTRL bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 4 GTH_QUAD: RX_P1_CTRL bit 4	GTH_QUAD: DRP[28] bit 5 GTH_QUAD: RX_P1_CTRL bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 2 GTH_QUAD: RX_P1_CTRL bit 2	GTH_QUAD: DRP[28] bit 3 GTH_QUAD: RX_P1_CTRL bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[28] bit 0 GTH_QUAD: RX_P1_CTRL bit 0	GTH_QUAD: DRP[28] bit 1 GTH_QUAD: RX_P1_CTRL bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 14 GTH_QUAD: RX_P0S_CTRL bit 14	GTH_QUAD: DRP[27] bit 15 GTH_QUAD: RX_P0S_CTRL bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 12 GTH_QUAD: RX_P0S_CTRL bit 12	GTH_QUAD: DRP[27] bit 13 GTH_QUAD: RX_P0S_CTRL bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 10 GTH_QUAD: RX_P0S_CTRL bit 10	GTH_QUAD: DRP[27] bit 11 GTH_QUAD: RX_P0S_CTRL bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 8 GTH_QUAD: RX_P0S_CTRL bit 8	GTH_QUAD: DRP[27] bit 9 GTH_QUAD: RX_P0S_CTRL bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 6 GTH_QUAD: RX_P0S_CTRL bit 6	GTH_QUAD: DRP[27] bit 7 GTH_QUAD: RX_P0S_CTRL bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 4 GTH_QUAD: RX_P0S_CTRL bit 4	GTH_QUAD: DRP[27] bit 5 GTH_QUAD: RX_P0S_CTRL bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 2 GTH_QUAD: RX_P0S_CTRL bit 2	GTH_QUAD: DRP[27] bit 3 GTH_QUAD: RX_P0S_CTRL bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[27] bit 0 GTH_QUAD: RX_P0S_CTRL bit 0	GTH_QUAD: DRP[27] bit 1 GTH_QUAD: RX_P0S_CTRL bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 14 GTH_QUAD: RX_P0_CTRL bit 14	GTH_QUAD: DRP[26] bit 15 GTH_QUAD: RX_P0_CTRL bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 12 GTH_QUAD: RX_P0_CTRL bit 12	GTH_QUAD: DRP[26] bit 13 GTH_QUAD: RX_P0_CTRL bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 10 GTH_QUAD: RX_P0_CTRL bit 10	GTH_QUAD: DRP[26] bit 11 GTH_QUAD: RX_P0_CTRL bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 8 GTH_QUAD: RX_P0_CTRL bit 8	GTH_QUAD: DRP[26] bit 9 GTH_QUAD: RX_P0_CTRL bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 6 GTH_QUAD: RX_P0_CTRL bit 6	GTH_QUAD: DRP[26] bit 7 GTH_QUAD: RX_P0_CTRL bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 4 GTH_QUAD: RX_P0_CTRL bit 4	GTH_QUAD: DRP[26] bit 5 GTH_QUAD: RX_P0_CTRL bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 2 GTH_QUAD: RX_P0_CTRL bit 2	GTH_QUAD: DRP[26] bit 3 GTH_QUAD: RX_P0_CTRL bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[26] bit 0 GTH_QUAD: RX_P0_CTRL bit 0	GTH_QUAD: DRP[26] bit 1 GTH_QUAD: RX_P0_CTRL bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 14 GTH_QUAD: PLL_CFG2 bit 14	GTH_QUAD: DRP[25] bit 15 GTH_QUAD: PLL_CFG2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 12 GTH_QUAD: PLL_CFG2 bit 12 GTH_QUAD: MUX_REFCLK bit 2	GTH_QUAD: DRP[25] bit 13 GTH_QUAD: PLL_CFG2 bit 13 GTH_QUAD: MUX_REFCLK bit 3
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 10 GTH_QUAD: PLL_CFG2 bit 10 GTH_QUAD: MUX_REFCLK bit 0	GTH_QUAD: DRP[25] bit 11 GTH_QUAD: PLL_CFG2 bit 11 GTH_QUAD: MUX_REFCLK bit 1
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 8 GTH_QUAD: PLL_CFG2 bit 8	GTH_QUAD: DRP[25] bit 9 GTH_QUAD: PLL_CFG2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 6 GTH_QUAD: PLL_CFG2 bit 6	GTH_QUAD: DRP[25] bit 7 GTH_QUAD: PLL_CFG2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 4 GTH_QUAD: PLL_CFG2 bit 4	GTH_QUAD: DRP[25] bit 5 GTH_QUAD: PLL_CFG2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 2 GTH_QUAD: PLL_CFG2 bit 2	GTH_QUAD: DRP[25] bit 3 GTH_QUAD: PLL_CFG2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[25] bit 0 GTH_QUAD: PLL_CFG2 bit 0	GTH_QUAD: DRP[25] bit 1 GTH_QUAD: PLL_CFG2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 14 GTH_QUAD: GLBL0_NOISE_CTRL bit 14	GTH_QUAD: DRP[24] bit 15 GTH_QUAD: GLBL0_NOISE_CTRL bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 12 GTH_QUAD: GLBL0_NOISE_CTRL bit 12	GTH_QUAD: DRP[24] bit 13 GTH_QUAD: GLBL0_NOISE_CTRL bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 10 GTH_QUAD: GLBL0_NOISE_CTRL bit 10	GTH_QUAD: DRP[24] bit 11 GTH_QUAD: GLBL0_NOISE_CTRL bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 8 GTH_QUAD: GLBL0_NOISE_CTRL bit 8	GTH_QUAD: DRP[24] bit 9 GTH_QUAD: GLBL0_NOISE_CTRL bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 6 GTH_QUAD: GLBL0_NOISE_CTRL bit 6	GTH_QUAD: DRP[24] bit 7 GTH_QUAD: GLBL0_NOISE_CTRL bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 4 GTH_QUAD: GLBL0_NOISE_CTRL bit 4	GTH_QUAD: DRP[24] bit 5 GTH_QUAD: GLBL0_NOISE_CTRL bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 2 GTH_QUAD: GLBL0_NOISE_CTRL bit 2	GTH_QUAD: DRP[24] bit 3 GTH_QUAD: GLBL0_NOISE_CTRL bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[24] bit 0 GTH_QUAD: GLBL0_NOISE_CTRL bit 0	GTH_QUAD: DRP[24] bit 1 GTH_QUAD: GLBL0_NOISE_CTRL bit 1

virtex6 GTH rect MAIN[4]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 14 GTH_QUAD: RX_CFG2_LANE0 bit 14	GTH_QUAD: DRP[39] bit 15 GTH_QUAD: RX_CFG2_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 12 GTH_QUAD: RX_CFG2_LANE0 bit 12	GTH_QUAD: DRP[39] bit 13 GTH_QUAD: RX_CFG2_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 10 GTH_QUAD: RX_CFG2_LANE0 bit 10	GTH_QUAD: DRP[39] bit 11 GTH_QUAD: RX_CFG2_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 8 GTH_QUAD: RX_CFG2_LANE0 bit 8	GTH_QUAD: DRP[39] bit 9 GTH_QUAD: RX_CFG2_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 6 GTH_QUAD: RX_CFG2_LANE0 bit 6	GTH_QUAD: DRP[39] bit 7 GTH_QUAD: RX_CFG2_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 4 GTH_QUAD: RX_CFG2_LANE0 bit 4	GTH_QUAD: DRP[39] bit 5 GTH_QUAD: RX_CFG2_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 2 GTH_QUAD: RX_CFG2_LANE0 bit 2	GTH_QUAD: DRP[39] bit 3 GTH_QUAD: RX_CFG2_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[39] bit 0 GTH_QUAD: RX_CFG2_LANE0 bit 0	GTH_QUAD: DRP[39] bit 1 GTH_QUAD: RX_CFG2_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 14 GTH_QUAD: RX_CFG1_LANE0 bit 14	GTH_QUAD: DRP[38] bit 15 GTH_QUAD: RX_CFG1_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 12 GTH_QUAD: RX_CFG1_LANE0 bit 12	GTH_QUAD: DRP[38] bit 13 GTH_QUAD: RX_CFG1_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 10 GTH_QUAD: RX_CFG1_LANE0 bit 10	GTH_QUAD: DRP[38] bit 11 GTH_QUAD: RX_CFG1_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 8 GTH_QUAD: RX_CFG1_LANE0 bit 8	GTH_QUAD: DRP[38] bit 9 GTH_QUAD: RX_CFG1_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 6 GTH_QUAD: RX_CFG1_LANE0 bit 6	GTH_QUAD: DRP[38] bit 7 GTH_QUAD: RX_CFG1_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 4 GTH_QUAD: RX_CFG1_LANE0 bit 4	GTH_QUAD: DRP[38] bit 5 GTH_QUAD: RX_CFG1_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 2 GTH_QUAD: RX_CFG1_LANE0 bit 2	GTH_QUAD: DRP[38] bit 3 GTH_QUAD: RX_CFG1_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[38] bit 0 GTH_QUAD: RX_CFG1_LANE0 bit 0	GTH_QUAD: DRP[38] bit 1 GTH_QUAD: RX_CFG1_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 14 GTH_QUAD: RX_CFG0_LANE0 bit 14	GTH_QUAD: DRP[37] bit 15 GTH_QUAD: RX_CFG0_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 12 GTH_QUAD: RX_CFG0_LANE0 bit 12	GTH_QUAD: DRP[37] bit 13 GTH_QUAD: RX_CFG0_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 10 GTH_QUAD: RX_CFG0_LANE0 bit 10	GTH_QUAD: DRP[37] bit 11 GTH_QUAD: RX_CFG0_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 8 GTH_QUAD: RX_CFG0_LANE0 bit 8	GTH_QUAD: DRP[37] bit 9 GTH_QUAD: RX_CFG0_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 6 GTH_QUAD: RX_CFG0_LANE0 bit 6	GTH_QUAD: DRP[37] bit 7 GTH_QUAD: RX_CFG0_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 4 GTH_QUAD: RX_CFG0_LANE0 bit 4	GTH_QUAD: DRP[37] bit 5 GTH_QUAD: RX_CFG0_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 2 GTH_QUAD: RX_CFG0_LANE0 bit 2	GTH_QUAD: DRP[37] bit 3 GTH_QUAD: RX_CFG0_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[37] bit 0 GTH_QUAD: RX_CFG0_LANE0 bit 0	GTH_QUAD: DRP[37] bit 1 GTH_QUAD: RX_CFG0_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 14 GTH_QUAD: RX_PI_CTRL1 bit 14	GTH_QUAD: DRP[36] bit 15 GTH_QUAD: RX_PI_CTRL1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 12 GTH_QUAD: RX_PI_CTRL1 bit 12	GTH_QUAD: DRP[36] bit 13 GTH_QUAD: RX_PI_CTRL1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 10 GTH_QUAD: RX_PI_CTRL1 bit 10	GTH_QUAD: DRP[36] bit 11 GTH_QUAD: RX_PI_CTRL1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 8 GTH_QUAD: RX_PI_CTRL1 bit 8	GTH_QUAD: DRP[36] bit 9 GTH_QUAD: RX_PI_CTRL1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 6 GTH_QUAD: RX_PI_CTRL1 bit 6	GTH_QUAD: DRP[36] bit 7 GTH_QUAD: RX_PI_CTRL1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 4 GTH_QUAD: RX_PI_CTRL1 bit 4	GTH_QUAD: DRP[36] bit 5 GTH_QUAD: RX_PI_CTRL1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 2 GTH_QUAD: RX_PI_CTRL1 bit 2	GTH_QUAD: DRP[36] bit 3 GTH_QUAD: RX_PI_CTRL1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[36] bit 0 GTH_QUAD: RX_PI_CTRL1 bit 0	GTH_QUAD: DRP[36] bit 1 GTH_QUAD: RX_PI_CTRL1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 14 GTH_QUAD: RX_PI_CTRL0 bit 14	GTH_QUAD: DRP[35] bit 15 GTH_QUAD: RX_PI_CTRL0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 12 GTH_QUAD: RX_PI_CTRL0 bit 12	GTH_QUAD: DRP[35] bit 13 GTH_QUAD: RX_PI_CTRL0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 10 GTH_QUAD: RX_PI_CTRL0 bit 10	GTH_QUAD: DRP[35] bit 11 GTH_QUAD: RX_PI_CTRL0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 8 GTH_QUAD: RX_PI_CTRL0 bit 8	GTH_QUAD: DRP[35] bit 9 GTH_QUAD: RX_PI_CTRL0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 6 GTH_QUAD: RX_PI_CTRL0 bit 6	GTH_QUAD: DRP[35] bit 7 GTH_QUAD: RX_PI_CTRL0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 4 GTH_QUAD: RX_PI_CTRL0 bit 4	GTH_QUAD: DRP[35] bit 5 GTH_QUAD: RX_PI_CTRL0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 2 GTH_QUAD: RX_PI_CTRL0 bit 2	GTH_QUAD: DRP[35] bit 3 GTH_QUAD: RX_PI_CTRL0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[35] bit 0 GTH_QUAD: RX_PI_CTRL0 bit 0	GTH_QUAD: DRP[35] bit 1 GTH_QUAD: RX_PI_CTRL0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 14 GTH_QUAD: DLL_CFG1 bit 14	GTH_QUAD: DRP[34] bit 15 GTH_QUAD: DLL_CFG1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 12 GTH_QUAD: DLL_CFG1 bit 12	GTH_QUAD: DRP[34] bit 13 GTH_QUAD: DLL_CFG1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 10 GTH_QUAD: DLL_CFG1 bit 10	GTH_QUAD: DRP[34] bit 11 GTH_QUAD: DLL_CFG1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 8 GTH_QUAD: DLL_CFG1 bit 8	GTH_QUAD: DRP[34] bit 9 GTH_QUAD: DLL_CFG1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 6 GTH_QUAD: DLL_CFG1 bit 6	GTH_QUAD: DRP[34] bit 7 GTH_QUAD: DLL_CFG1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 4 GTH_QUAD: DLL_CFG1 bit 4	GTH_QUAD: DRP[34] bit 5 GTH_QUAD: DLL_CFG1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 2 GTH_QUAD: DLL_CFG1 bit 2	GTH_QUAD: DRP[34] bit 3 GTH_QUAD: DLL_CFG1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[34] bit 0 GTH_QUAD: DLL_CFG1 bit 0	GTH_QUAD: DRP[34] bit 1 GTH_QUAD: DLL_CFG1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 14 GTH_QUAD: PWRUP_DLY bit 14	GTH_QUAD: DRP[33] bit 15 GTH_QUAD: PWRUP_DLY bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 12 GTH_QUAD: PWRUP_DLY bit 12	GTH_QUAD: DRP[33] bit 13 GTH_QUAD: PWRUP_DLY bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 10 GTH_QUAD: PWRUP_DLY bit 10	GTH_QUAD: DRP[33] bit 11 GTH_QUAD: PWRUP_DLY bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 8 GTH_QUAD: PWRUP_DLY bit 8	GTH_QUAD: DRP[33] bit 9 GTH_QUAD: PWRUP_DLY bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 6 GTH_QUAD: PWRUP_DLY bit 6	GTH_QUAD: DRP[33] bit 7 GTH_QUAD: PWRUP_DLY bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 4 GTH_QUAD: PWRUP_DLY bit 4	GTH_QUAD: DRP[33] bit 5 GTH_QUAD: PWRUP_DLY bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 2 GTH_QUAD: PWRUP_DLY bit 2	GTH_QUAD: DRP[33] bit 3 GTH_QUAD: PWRUP_DLY bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[33] bit 0 GTH_QUAD: PWRUP_DLY bit 0	GTH_QUAD: DRP[33] bit 1 GTH_QUAD: PWRUP_DLY bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 14 GTH_QUAD: GLBL_PWR_CTRL bit 14	GTH_QUAD: DRP[32] bit 15 GTH_QUAD: GLBL_PWR_CTRL bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 12 GTH_QUAD: GLBL_PWR_CTRL bit 12	GTH_QUAD: DRP[32] bit 13 GTH_QUAD: GLBL_PWR_CTRL bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 10 GTH_QUAD: GLBL_PWR_CTRL bit 10	GTH_QUAD: DRP[32] bit 11 GTH_QUAD: GLBL_PWR_CTRL bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 8 GTH_QUAD: GLBL_PWR_CTRL bit 8	GTH_QUAD: DRP[32] bit 9 GTH_QUAD: GLBL_PWR_CTRL bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 6 GTH_QUAD: GLBL_PWR_CTRL bit 6	GTH_QUAD: DRP[32] bit 7 GTH_QUAD: GLBL_PWR_CTRL bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 4 GTH_QUAD: GLBL_PWR_CTRL bit 4	GTH_QUAD: DRP[32] bit 5 GTH_QUAD: GLBL_PWR_CTRL bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 2 GTH_QUAD: GLBL_PWR_CTRL bit 2	GTH_QUAD: DRP[32] bit 3 GTH_QUAD: GLBL_PWR_CTRL bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[32] bit 0 GTH_QUAD: GLBL_PWR_CTRL bit 0	GTH_QUAD: DRP[32] bit 1 GTH_QUAD: GLBL_PWR_CTRL bit 1

virtex6 GTH rect MAIN[5]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 14 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 14	GTH_QUAD: DRP[47] bit 15 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 12 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 12	GTH_QUAD: DRP[47] bit 13 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 10 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 10	GTH_QUAD: DRP[47] bit 11 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 8 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 8	GTH_QUAD: DRP[47] bit 9 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 6 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 6	GTH_QUAD: DRP[47] bit 7 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 4 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 4	GTH_QUAD: DRP[47] bit 5 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 2 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 2	GTH_QUAD: DRP[47] bit 3 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[47] bit 0 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 0	GTH_QUAD: DRP[47] bit 1 GTH_QUAD: RX_AEQ_VAL0_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 14 GTH_QUAD: RX_MVAL1_LANE0 bit 14	GTH_QUAD: DRP[46] bit 15 GTH_QUAD: RX_MVAL1_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 12 GTH_QUAD: RX_MVAL1_LANE0 bit 12	GTH_QUAD: DRP[46] bit 13 GTH_QUAD: RX_MVAL1_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 10 GTH_QUAD: RX_MVAL1_LANE0 bit 10	GTH_QUAD: DRP[46] bit 11 GTH_QUAD: RX_MVAL1_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 8 GTH_QUAD: RX_MVAL1_LANE0 bit 8	GTH_QUAD: DRP[46] bit 9 GTH_QUAD: RX_MVAL1_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 6 GTH_QUAD: RX_MVAL1_LANE0 bit 6	GTH_QUAD: DRP[46] bit 7 GTH_QUAD: RX_MVAL1_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 4 GTH_QUAD: RX_MVAL1_LANE0 bit 4	GTH_QUAD: DRP[46] bit 5 GTH_QUAD: RX_MVAL1_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 2 GTH_QUAD: RX_MVAL1_LANE0 bit 2	GTH_QUAD: DRP[46] bit 3 GTH_QUAD: RX_MVAL1_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[46] bit 0 GTH_QUAD: RX_MVAL1_LANE0 bit 0	GTH_QUAD: DRP[46] bit 1 GTH_QUAD: RX_MVAL1_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 14 GTH_QUAD: RX_MVAL0_LANE0 bit 14	GTH_QUAD: DRP[45] bit 15 GTH_QUAD: RX_MVAL0_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 12 GTH_QUAD: RX_MVAL0_LANE0 bit 12	GTH_QUAD: DRP[45] bit 13 GTH_QUAD: RX_MVAL0_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 10 GTH_QUAD: RX_MVAL0_LANE0 bit 10	GTH_QUAD: DRP[45] bit 11 GTH_QUAD: RX_MVAL0_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 8 GTH_QUAD: RX_MVAL0_LANE0 bit 8	GTH_QUAD: DRP[45] bit 9 GTH_QUAD: RX_MVAL0_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 6 GTH_QUAD: RX_MVAL0_LANE0 bit 6	GTH_QUAD: DRP[45] bit 7 GTH_QUAD: RX_MVAL0_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 4 GTH_QUAD: RX_MVAL0_LANE0 bit 4	GTH_QUAD: DRP[45] bit 5 GTH_QUAD: RX_MVAL0_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 2 GTH_QUAD: RX_MVAL0_LANE0 bit 2	GTH_QUAD: DRP[45] bit 3 GTH_QUAD: RX_MVAL0_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[45] bit 0 GTH_QUAD: RX_MVAL0_LANE0 bit 0	GTH_QUAD: DRP[45] bit 1 GTH_QUAD: RX_MVAL0_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 14 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 14	GTH_QUAD: DRP[44] bit 15 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 12 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 12	GTH_QUAD: DRP[44] bit 13 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 10 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 10	GTH_QUAD: DRP[44] bit 11 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 8 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 8	GTH_QUAD: DRP[44] bit 9 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 6 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 6	GTH_QUAD: DRP[44] bit 7 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 4 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 4	GTH_QUAD: DRP[44] bit 5 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 2 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 2	GTH_QUAD: DRP[44] bit 3 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[44] bit 0 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 0	GTH_QUAD: DRP[44] bit 1 GTH_QUAD: RX_CDR_CTRL2_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 14 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 14	GTH_QUAD: DRP[43] bit 15 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 12 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 12	GTH_QUAD: DRP[43] bit 13 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 10 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 10	GTH_QUAD: DRP[43] bit 11 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 8 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 8	GTH_QUAD: DRP[43] bit 9 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 6 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 6	GTH_QUAD: DRP[43] bit 7 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 4 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 4	GTH_QUAD: DRP[43] bit 5 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 2 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 2	GTH_QUAD: DRP[43] bit 3 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[43] bit 0 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 0	GTH_QUAD: DRP[43] bit 1 GTH_QUAD: RX_CDR_CTRL1_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 14 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 14	GTH_QUAD: DRP[42] bit 15 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 12 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 12	GTH_QUAD: DRP[42] bit 13 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 10 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 10	GTH_QUAD: DRP[42] bit 11 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 8 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 8	GTH_QUAD: DRP[42] bit 9 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 6 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 6	GTH_QUAD: DRP[42] bit 7 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 4 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 4	GTH_QUAD: DRP[42] bit 5 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 2 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 2	GTH_QUAD: DRP[42] bit 3 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[42] bit 0 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 0	GTH_QUAD: DRP[42] bit 1 GTH_QUAD: RX_CDR_CTRL0_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 14 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 14	GTH_QUAD: DRP[41] bit 15 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 12 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 12	GTH_QUAD: DRP[41] bit 13 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 10 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 10	GTH_QUAD: DRP[41] bit 11 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 8 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 8	GTH_QUAD: DRP[41] bit 9 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 6 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 6	GTH_QUAD: DRP[41] bit 7 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 4 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 4	GTH_QUAD: DRP[41] bit 5 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 2 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 2	GTH_QUAD: DRP[41] bit 3 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[41] bit 0 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 0	GTH_QUAD: DRP[41] bit 1 GTH_QUAD: RX_LOOP_CTRL_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 14 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 14	GTH_QUAD: DRP[40] bit 15 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 12 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 12	GTH_QUAD: DRP[40] bit 13 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 10 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 10	GTH_QUAD: DRP[40] bit 11 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 8 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 8	GTH_QUAD: DRP[40] bit 9 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 6 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 6	GTH_QUAD: DRP[40] bit 7 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 4 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 4	GTH_QUAD: DRP[40] bit 5 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 2 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 2	GTH_QUAD: DRP[40] bit 3 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[40] bit 0 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 0	GTH_QUAD: DRP[40] bit 1 GTH_QUAD: RX_AGC_CTRL_LANE0 bit 1

virtex6 GTH rect MAIN[6]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 14 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 14	GTH_QUAD: DRP[55] bit 15 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 12 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 12	GTH_QUAD: DRP[55] bit 13 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 10 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 10	GTH_QUAD: DRP[55] bit 11 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 8 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 8	GTH_QUAD: DRP[55] bit 9 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 6 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 6	GTH_QUAD: DRP[55] bit 7 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 4 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 4	GTH_QUAD: DRP[55] bit 5 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 2 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 2	GTH_QUAD: DRP[55] bit 3 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[55] bit 0 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 0	GTH_QUAD: DRP[55] bit 1 GTH_QUAD: TX_CLK_SEL1_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 14 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 14	GTH_QUAD: DRP[54] bit 15 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 12 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 12	GTH_QUAD: DRP[54] bit 13 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 10 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 10	GTH_QUAD: DRP[54] bit 11 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 8 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 8	GTH_QUAD: DRP[54] bit 9 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 6 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 6	GTH_QUAD: DRP[54] bit 7 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 4 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 4	GTH_QUAD: DRP[54] bit 5 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 2 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 2	GTH_QUAD: DRP[54] bit 3 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[54] bit 0 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 0	GTH_QUAD: DRP[54] bit 1 GTH_QUAD: TX_CLK_SEL0_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 14 GTH_QUAD: TX_PREEMPH_LANE0 bit 14	GTH_QUAD: DRP[53] bit 15 GTH_QUAD: TX_PREEMPH_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 12 GTH_QUAD: TX_PREEMPH_LANE0 bit 12	GTH_QUAD: DRP[53] bit 13 GTH_QUAD: TX_PREEMPH_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 10 GTH_QUAD: TX_PREEMPH_LANE0 bit 10	GTH_QUAD: DRP[53] bit 11 GTH_QUAD: TX_PREEMPH_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 8 GTH_QUAD: TX_PREEMPH_LANE0 bit 8	GTH_QUAD: DRP[53] bit 9 GTH_QUAD: TX_PREEMPH_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 6 GTH_QUAD: TX_PREEMPH_LANE0 bit 6	GTH_QUAD: DRP[53] bit 7 GTH_QUAD: TX_PREEMPH_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 4 GTH_QUAD: TX_PREEMPH_LANE0 bit 4	GTH_QUAD: DRP[53] bit 5 GTH_QUAD: TX_PREEMPH_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 2 GTH_QUAD: TX_PREEMPH_LANE0 bit 2	GTH_QUAD: DRP[53] bit 3 GTH_QUAD: TX_PREEMPH_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[53] bit 0 GTH_QUAD: TX_PREEMPH_LANE0 bit 0	GTH_QUAD: DRP[53] bit 1 GTH_QUAD: TX_PREEMPH_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 14 GTH_QUAD: TX_CFG2_LANE0 bit 14	GTH_QUAD: DRP[52] bit 15 GTH_QUAD: TX_CFG2_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 12 GTH_QUAD: TX_CFG2_LANE0 bit 12	GTH_QUAD: DRP[52] bit 13 GTH_QUAD: TX_CFG2_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 10 GTH_QUAD: TX_CFG2_LANE0 bit 10	GTH_QUAD: DRP[52] bit 11 GTH_QUAD: TX_CFG2_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 8 GTH_QUAD: TX_CFG2_LANE0 bit 8	GTH_QUAD: DRP[52] bit 9 GTH_QUAD: TX_CFG2_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 6 GTH_QUAD: TX_CFG2_LANE0 bit 6	GTH_QUAD: DRP[52] bit 7 GTH_QUAD: TX_CFG2_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 4 GTH_QUAD: TX_CFG2_LANE0 bit 4	GTH_QUAD: DRP[52] bit 5 GTH_QUAD: TX_CFG2_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 2 GTH_QUAD: TX_CFG2_LANE0 bit 2	GTH_QUAD: DRP[52] bit 3 GTH_QUAD: TX_CFG2_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[52] bit 0 GTH_QUAD: TX_CFG2_LANE0 bit 0	GTH_QUAD: DRP[52] bit 1 GTH_QUAD: TX_CFG2_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 14 GTH_QUAD: TX_CFG1_LANE0 bit 14	GTH_QUAD: DRP[51] bit 15 GTH_QUAD: TX_CFG1_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 12 GTH_QUAD: TX_CFG1_LANE0 bit 12	GTH_QUAD: DRP[51] bit 13 GTH_QUAD: TX_CFG1_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 10 GTH_QUAD: TX_CFG1_LANE0 bit 10	GTH_QUAD: DRP[51] bit 11 GTH_QUAD: TX_CFG1_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 8 GTH_QUAD: TX_CFG1_LANE0 bit 8	GTH_QUAD: DRP[51] bit 9 GTH_QUAD: TX_CFG1_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 6 GTH_QUAD: TX_CFG1_LANE0 bit 6	GTH_QUAD: DRP[51] bit 7 GTH_QUAD: TX_CFG1_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 4 GTH_QUAD: TX_CFG1_LANE0 bit 4	GTH_QUAD: DRP[51] bit 5 GTH_QUAD: TX_CFG1_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 2 GTH_QUAD: TX_CFG1_LANE0 bit 2	GTH_QUAD: DRP[51] bit 3 GTH_QUAD: TX_CFG1_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[51] bit 0 GTH_QUAD: TX_CFG1_LANE0 bit 0	GTH_QUAD: DRP[51] bit 1 GTH_QUAD: TX_CFG1_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 14 GTH_QUAD: TX_CFG0_LANE0 bit 14	GTH_QUAD: DRP[50] bit 15 GTH_QUAD: TX_CFG0_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 12 GTH_QUAD: TX_CFG0_LANE0 bit 12	GTH_QUAD: DRP[50] bit 13 GTH_QUAD: TX_CFG0_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 10 GTH_QUAD: TX_CFG0_LANE0 bit 10	GTH_QUAD: DRP[50] bit 11 GTH_QUAD: TX_CFG0_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 8 GTH_QUAD: TX_CFG0_LANE0 bit 8	GTH_QUAD: DRP[50] bit 9 GTH_QUAD: TX_CFG0_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 6 GTH_QUAD: TX_CFG0_LANE0 bit 6	GTH_QUAD: DRP[50] bit 7 GTH_QUAD: TX_CFG0_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 4 GTH_QUAD: TX_CFG0_LANE0 bit 4	GTH_QUAD: DRP[50] bit 5 GTH_QUAD: TX_CFG0_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 2 GTH_QUAD: TX_CFG0_LANE0 bit 2	GTH_QUAD: DRP[50] bit 3 GTH_QUAD: TX_CFG0_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[50] bit 0 GTH_QUAD: TX_CFG0_LANE0 bit 0	GTH_QUAD: DRP[50] bit 1 GTH_QUAD: TX_CFG0_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 14 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 14	GTH_QUAD: DRP[49] bit 15 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 12 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 12	GTH_QUAD: DRP[49] bit 13 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 10 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 10	GTH_QUAD: DRP[49] bit 11 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 8 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 8	GTH_QUAD: DRP[49] bit 9 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 6 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 6	GTH_QUAD: DRP[49] bit 7 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 4 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 4	GTH_QUAD: DRP[49] bit 5 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 2 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 2	GTH_QUAD: DRP[49] bit 3 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[49] bit 0 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 0	GTH_QUAD: DRP[49] bit 1 GTH_QUAD: RX_CTLE_CTRL_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 14 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 14	GTH_QUAD: DRP[48] bit 15 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 12 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 12	GTH_QUAD: DRP[48] bit 13 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 10 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 10	GTH_QUAD: DRP[48] bit 11 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 8 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 8	GTH_QUAD: DRP[48] bit 9 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 6 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 6	GTH_QUAD: DRP[48] bit 7 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 4 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 4	GTH_QUAD: DRP[48] bit 5 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 2 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 2	GTH_QUAD: DRP[48] bit 3 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[48] bit 0 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 0	GTH_QUAD: DRP[48] bit 1 GTH_QUAD: RX_AEQ_VAL1_LANE0 bit 1

virtex6 GTH rect MAIN[7]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 14 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 14	GTH_QUAD: DRP[63] bit 15 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 12 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 12	GTH_QUAD: DRP[63] bit 13 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 10 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 10	GTH_QUAD: DRP[63] bit 11 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 8 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 8	GTH_QUAD: DRP[63] bit 9 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 6 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 6	GTH_QUAD: DRP[63] bit 7 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 4 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 4	GTH_QUAD: DRP[63] bit 5 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 2 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 2	GTH_QUAD: DRP[63] bit 3 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[63] bit 0 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 0	GTH_QUAD: DRP[63] bit 1 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 14 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 14	GTH_QUAD: DRP[62] bit 15 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 12 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 12	GTH_QUAD: DRP[62] bit 13 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 10 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 10	GTH_QUAD: DRP[62] bit 11 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 8 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 8	GTH_QUAD: DRP[62] bit 9 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 6 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 6	GTH_QUAD: DRP[62] bit 7 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 4 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 4	GTH_QUAD: DRP[62] bit 5 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 2 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 2	GTH_QUAD: DRP[62] bit 3 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[62] bit 0 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 0	GTH_QUAD: DRP[62] bit 1 GTH_QUAD: LNK_TRN_CFG_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 14 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 14	GTH_QUAD: DRP[61] bit 15 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 12 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 12	GTH_QUAD: DRP[61] bit 13 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 10 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 10	GTH_QUAD: DRP[61] bit 11 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 8 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 8	GTH_QUAD: DRP[61] bit 9 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 6 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 6	GTH_QUAD: DRP[61] bit 7 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 4 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 4	GTH_QUAD: DRP[61] bit 5 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 2 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 2	GTH_QUAD: DRP[61] bit 3 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[61] bit 0 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 0	GTH_QUAD: DRP[61] bit 1 GTH_QUAD: RX_CTRL_OVRD_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 14 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 14	GTH_QUAD: DRP[60] bit 15 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 12 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 12	GTH_QUAD: DRP[60] bit 13 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 10 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 10	GTH_QUAD: DRP[60] bit 11 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 8 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 8	GTH_QUAD: DRP[60] bit 9 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 6 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 6	GTH_QUAD: DRP[60] bit 7 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 4 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 4	GTH_QUAD: DRP[60] bit 5 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 2 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 2	GTH_QUAD: DRP[60] bit 3 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[60] bit 0 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 0	GTH_QUAD: DRP[60] bit 1 GTH_QUAD: TX_PWR_RATE_OVRD_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 14 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 14	GTH_QUAD: DRP[59] bit 15 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 12 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 12	GTH_QUAD: DRP[59] bit 13 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 10 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 10	GTH_QUAD: DRP[59] bit 11 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 8 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 8	GTH_QUAD: DRP[59] bit 9 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 6 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 6	GTH_QUAD: DRP[59] bit 7 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 4 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 4	GTH_QUAD: DRP[59] bit 5 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 2 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 2	GTH_QUAD: DRP[59] bit 3 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[59] bit 0 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 0	GTH_QUAD: DRP[59] bit 1 GTH_QUAD: LANE_PWR_CTRL_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 14 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 14	GTH_QUAD: DRP[58] bit 15 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 12 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 12	GTH_QUAD: DRP[58] bit 13 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 10 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 10	GTH_QUAD: DRP[58] bit 11 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 8 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 8	GTH_QUAD: DRP[58] bit 9 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 6 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 6	GTH_QUAD: DRP[58] bit 7 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 4 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 4	GTH_QUAD: DRP[58] bit 5 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 2 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 2	GTH_QUAD: DRP[58] bit 3 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[58] bit 0 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 0	GTH_QUAD: DRP[58] bit 1 GTH_QUAD: DFE_TRAIN_CTRL_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 14 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 14	GTH_QUAD: DRP[57] bit 15 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 12 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 12	GTH_QUAD: DRP[57] bit 13 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 10 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 10	GTH_QUAD: DRP[57] bit 11 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 8 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 8	GTH_QUAD: DRP[57] bit 9 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 6 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 6	GTH_QUAD: DRP[57] bit 7 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 4 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 4	GTH_QUAD: DRP[57] bit 5 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 2 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 2	GTH_QUAD: DRP[57] bit 3 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[57] bit 0 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 0	GTH_QUAD: DRP[57] bit 1 GTH_QUAD: PMA_LPBK_CTRL_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 14 GTH_QUAD: TERM_CTRL_LANE0 bit 14	GTH_QUAD: DRP[56] bit 15 GTH_QUAD: TERM_CTRL_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 12 GTH_QUAD: TERM_CTRL_LANE0 bit 12	GTH_QUAD: DRP[56] bit 13 GTH_QUAD: TERM_CTRL_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 10 GTH_QUAD: TERM_CTRL_LANE0 bit 10	GTH_QUAD: DRP[56] bit 11 GTH_QUAD: TERM_CTRL_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 8 GTH_QUAD: TERM_CTRL_LANE0 bit 8	GTH_QUAD: DRP[56] bit 9 GTH_QUAD: TERM_CTRL_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 6 GTH_QUAD: TERM_CTRL_LANE0 bit 6	GTH_QUAD: DRP[56] bit 7 GTH_QUAD: TERM_CTRL_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 4 GTH_QUAD: TERM_CTRL_LANE0 bit 4	GTH_QUAD: DRP[56] bit 5 GTH_QUAD: TERM_CTRL_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 2 GTH_QUAD: TERM_CTRL_LANE0 bit 2	GTH_QUAD: DRP[56] bit 3 GTH_QUAD: TERM_CTRL_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[56] bit 0 GTH_QUAD: TERM_CTRL_LANE0 bit 0	GTH_QUAD: DRP[56] bit 1 GTH_QUAD: TERM_CTRL_LANE0 bit 1

virtex6 GTH rect MAIN[8]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 14	GTH_QUAD: DRP[71] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 12	GTH_QUAD: DRP[71] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 10	GTH_QUAD: DRP[71] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 8	GTH_QUAD: DRP[71] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 6	GTH_QUAD: DRP[71] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 4	GTH_QUAD: DRP[71] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 2	GTH_QUAD: DRP[71] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[71] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 0	GTH_QUAD: DRP[71] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 14	GTH_QUAD: DRP[70] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 12	GTH_QUAD: DRP[70] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 10	GTH_QUAD: DRP[70] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 8	GTH_QUAD: DRP[70] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 6	GTH_QUAD: DRP[70] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 4	GTH_QUAD: DRP[70] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 2	GTH_QUAD: DRP[70] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[70] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 0	GTH_QUAD: DRP[70] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 14	GTH_QUAD: DRP[69] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 12	GTH_QUAD: DRP[69] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 10	GTH_QUAD: DRP[69] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 8	GTH_QUAD: DRP[69] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 6	GTH_QUAD: DRP[69] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 4	GTH_QUAD: DRP[69] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 2	GTH_QUAD: DRP[69] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[69] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 0	GTH_QUAD: DRP[69] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 14	GTH_QUAD: DRP[68] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 12	GTH_QUAD: DRP[68] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 10	GTH_QUAD: DRP[68] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 8	GTH_QUAD: DRP[68] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 6	GTH_QUAD: DRP[68] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 4	GTH_QUAD: DRP[68] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 2	GTH_QUAD: DRP[68] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[68] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 0	GTH_QUAD: DRP[68] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 14	GTH_QUAD: DRP[67] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 12	GTH_QUAD: DRP[67] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 10	GTH_QUAD: DRP[67] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 8	GTH_QUAD: DRP[67] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 6	GTH_QUAD: DRP[67] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 4	GTH_QUAD: DRP[67] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 2	GTH_QUAD: DRP[67] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[67] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 0	GTH_QUAD: DRP[67] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 14 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 14	GTH_QUAD: DRP[66] bit 15 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 12 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 12	GTH_QUAD: DRP[66] bit 13 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 10 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 10	GTH_QUAD: DRP[66] bit 11 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 8 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 8	GTH_QUAD: DRP[66] bit 9 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 6 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 6	GTH_QUAD: DRP[66] bit 7 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 4 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 4	GTH_QUAD: DRP[66] bit 5 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 2 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 2	GTH_QUAD: DRP[66] bit 3 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[66] bit 0 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 0	GTH_QUAD: DRP[66] bit 1 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 14 GTH_QUAD: PCS_CTRL2_LANE0 bit 14	GTH_QUAD: DRP[65] bit 15 GTH_QUAD: PCS_CTRL2_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 12 GTH_QUAD: PCS_CTRL2_LANE0 bit 12	GTH_QUAD: DRP[65] bit 13 GTH_QUAD: PCS_CTRL2_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 10 GTH_QUAD: PCS_CTRL2_LANE0 bit 10	GTH_QUAD: DRP[65] bit 11 GTH_QUAD: PCS_CTRL2_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 8 GTH_QUAD: PCS_CTRL2_LANE0 bit 8	GTH_QUAD: DRP[65] bit 9 GTH_QUAD: PCS_CTRL2_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 6 GTH_QUAD: PCS_CTRL2_LANE0 bit 6	GTH_QUAD: DRP[65] bit 7 GTH_QUAD: PCS_CTRL2_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 4 GTH_QUAD: PCS_CTRL2_LANE0 bit 4	GTH_QUAD: DRP[65] bit 5 GTH_QUAD: PCS_CTRL2_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 2 GTH_QUAD: PCS_CTRL2_LANE0 bit 2	GTH_QUAD: DRP[65] bit 3 GTH_QUAD: PCS_CTRL2_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[65] bit 0 GTH_QUAD: PCS_CTRL2_LANE0 bit 0	GTH_QUAD: DRP[65] bit 1 GTH_QUAD: PCS_CTRL2_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 14 GTH_QUAD: PCS_CTRL1_LANE0 bit 14	GTH_QUAD: DRP[64] bit 15 GTH_QUAD: PCS_CTRL1_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 12 GTH_QUAD: PCS_CTRL1_LANE0 bit 12	GTH_QUAD: DRP[64] bit 13 GTH_QUAD: PCS_CTRL1_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 10 GTH_QUAD: PCS_CTRL1_LANE0 bit 10	GTH_QUAD: DRP[64] bit 11 GTH_QUAD: PCS_CTRL1_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 8 GTH_QUAD: PCS_CTRL1_LANE0 bit 8	GTH_QUAD: DRP[64] bit 9 GTH_QUAD: PCS_CTRL1_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 6 GTH_QUAD: PCS_CTRL1_LANE0 bit 6	GTH_QUAD: DRP[64] bit 7 GTH_QUAD: PCS_CTRL1_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 4 GTH_QUAD: PCS_CTRL1_LANE0 bit 4	GTH_QUAD: DRP[64] bit 5 GTH_QUAD: PCS_CTRL1_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 2 GTH_QUAD: PCS_CTRL1_LANE0 bit 2	GTH_QUAD: DRP[64] bit 3 GTH_QUAD: PCS_CTRL1_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[64] bit 0 GTH_QUAD: PCS_CTRL1_LANE0 bit 0	GTH_QUAD: DRP[64] bit 1 GTH_QUAD: PCS_CTRL1_LANE0 bit 1

virtex6 GTH rect MAIN[9]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 14 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 14	GTH_QUAD: DRP[79] bit 15 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 12 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 12	GTH_QUAD: DRP[79] bit 13 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 10 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 10	GTH_QUAD: DRP[79] bit 11 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 8 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 8	GTH_QUAD: DRP[79] bit 9 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 6 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 6	GTH_QUAD: DRP[79] bit 7 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 4 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 4	GTH_QUAD: DRP[79] bit 5 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 2 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 2	GTH_QUAD: DRP[79] bit 3 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[79] bit 0 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 0	GTH_QUAD: DRP[79] bit 1 GTH_QUAD: BUFFER_CONFIG_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 14 GTH_QUAD: TX_FABRIC_WIDTH0 bit 1	GTH_QUAD: DRP[78] bit 15 GTH_QUAD: TX_FABRIC_WIDTH0 bit 2
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 12	GTH_QUAD: DRP[78] bit 13 GTH_QUAD: TX_FABRIC_WIDTH0 bit 0
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 10 GTH_QUAD: RX_FABRIC_WIDTH0 bit 1	GTH_QUAD: DRP[78] bit 11 GTH_QUAD: RX_FABRIC_WIDTH0 bit 2
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 8	GTH_QUAD: DRP[78] bit 9 GTH_QUAD: RX_FABRIC_WIDTH0 bit 0
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 6	GTH_QUAD: DRP[78] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 4	GTH_QUAD: DRP[78] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 2	GTH_QUAD: DRP[78] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[78] bit 0 GTH_QUAD: TST_PCS_LOOPBACK_LANE0 bit 0	GTH_QUAD: DRP[78] bit 1 GTH_QUAD: GTH_CFG_PWRUP_LANE0 bit 0
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert RXUSERCLKIN1 GTH_QUAD: DRP[77] bit 14	GTH_QUAD: !invert RXUSERCLKIN0 GTH_QUAD: DRP[77] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert RXUSERCLKIN3 GTH_QUAD: DRP[77] bit 12	GTH_QUAD: !invert RXUSERCLKIN2 GTH_QUAD: DRP[77] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert TXUSERCLKIN1 GTH_QUAD: DRP[77] bit 10	GTH_QUAD: !invert TXUSERCLKIN0 GTH_QUAD: DRP[77] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert TXUSERCLKIN3 GTH_QUAD: DRP[77] bit 8	GTH_QUAD: !invert TXUSERCLKIN2 GTH_QUAD: DRP[77] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert DCLK GTH_QUAD: DRP[77] bit 6	GTH_QUAD: DRP[77] bit 7 GTH_QUAD: ENABLE
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert SDSSCANCLK GTH_QUAD: DRP[77] bit 4	GTH_QUAD: !invert TSTNOISECLK GTH_QUAD: DRP[77] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: !invert SCANCLK GTH_QUAD: DRP[77] bit 2	GTH_QUAD: !invert TPCLK GTH_QUAD: DRP[77] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[77] bit 0 GTH_QUAD: CLKTESTSIG_SEL bit 0	GTH_QUAD: DRP[77] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 14 GTH_QUAD: PCS_MODE_LANE0 bit 14	GTH_QUAD: DRP[76] bit 15 GTH_QUAD: PCS_MODE_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 12 GTH_QUAD: PCS_MODE_LANE0 bit 12	GTH_QUAD: DRP[76] bit 13 GTH_QUAD: PCS_MODE_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 10 GTH_QUAD: PCS_MODE_LANE0 bit 10	GTH_QUAD: DRP[76] bit 11 GTH_QUAD: PCS_MODE_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 8 GTH_QUAD: PCS_MODE_LANE0 bit 8	GTH_QUAD: DRP[76] bit 9 GTH_QUAD: PCS_MODE_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 6 GTH_QUAD: PCS_MODE_LANE0 bit 6	GTH_QUAD: DRP[76] bit 7 GTH_QUAD: PCS_MODE_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 4 GTH_QUAD: PCS_MODE_LANE0 bit 4	GTH_QUAD: DRP[76] bit 5 GTH_QUAD: PCS_MODE_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 2 GTH_QUAD: PCS_MODE_LANE0 bit 2	GTH_QUAD: DRP[76] bit 3 GTH_QUAD: PCS_MODE_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[76] bit 0 GTH_QUAD: PCS_MODE_LANE0 bit 0	GTH_QUAD: DRP[76] bit 1 GTH_QUAD: PCS_MODE_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 14 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 14	GTH_QUAD: DRP[75] bit 15 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 12 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 12	GTH_QUAD: DRP[75] bit 13 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 10 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 10	GTH_QUAD: DRP[75] bit 11 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 8 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 8	GTH_QUAD: DRP[75] bit 9 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 6 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 6	GTH_QUAD: DRP[75] bit 7 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 4 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 4	GTH_QUAD: DRP[75] bit 5 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 2 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 2	GTH_QUAD: DRP[75] bit 3 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[75] bit 0 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 0	GTH_QUAD: DRP[75] bit 1 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 14	GTH_QUAD: DRP[74] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 12	GTH_QUAD: DRP[74] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 10	GTH_QUAD: DRP[74] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 8	GTH_QUAD: DRP[74] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 6	GTH_QUAD: DRP[74] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 4	GTH_QUAD: DRP[74] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 2	GTH_QUAD: DRP[74] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[74] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 0	GTH_QUAD: DRP[74] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 14	GTH_QUAD: DRP[73] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 12	GTH_QUAD: DRP[73] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 10	GTH_QUAD: DRP[73] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 8	GTH_QUAD: DRP[73] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 6	GTH_QUAD: DRP[73] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 4	GTH_QUAD: DRP[73] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 2	GTH_QUAD: DRP[73] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[73] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 0	GTH_QUAD: DRP[73] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 14	GTH_QUAD: DRP[72] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 12	GTH_QUAD: DRP[72] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 10	GTH_QUAD: DRP[72] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 8	GTH_QUAD: DRP[72] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 6	GTH_QUAD: DRP[72] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 4	GTH_QUAD: DRP[72] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 2	GTH_QUAD: DRP[72] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[72] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 0	GTH_QUAD: DRP[72] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE0 bit 1

virtex6 GTH rect MAIN[10]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 14 GTH_QUAD: PTRN_CFG0_LSB bit 14	GTH_QUAD: DRP[87] bit 15 GTH_QUAD: PTRN_CFG0_LSB bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 12 GTH_QUAD: PTRN_CFG0_LSB bit 12	GTH_QUAD: DRP[87] bit 13 GTH_QUAD: PTRN_CFG0_LSB bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 10 GTH_QUAD: PTRN_CFG0_LSB bit 10	GTH_QUAD: DRP[87] bit 11 GTH_QUAD: PTRN_CFG0_LSB bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 8 GTH_QUAD: PTRN_CFG0_LSB bit 8	GTH_QUAD: DRP[87] bit 9 GTH_QUAD: PTRN_CFG0_LSB bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 6 GTH_QUAD: PTRN_CFG0_LSB bit 6	GTH_QUAD: DRP[87] bit 7 GTH_QUAD: PTRN_CFG0_LSB bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 4 GTH_QUAD: PTRN_CFG0_LSB bit 4	GTH_QUAD: DRP[87] bit 5 GTH_QUAD: PTRN_CFG0_LSB bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 2 GTH_QUAD: PTRN_CFG0_LSB bit 2	GTH_QUAD: DRP[87] bit 3 GTH_QUAD: PTRN_CFG0_LSB bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[87] bit 0 GTH_QUAD: PTRN_CFG0_LSB bit 0	GTH_QUAD: DRP[87] bit 1 GTH_QUAD: PTRN_CFG0_LSB bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 14 GTH_QUAD: PTRN_CFG0_MSB bit 14	GTH_QUAD: DRP[86] bit 15 GTH_QUAD: PTRN_CFG0_MSB bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 12 GTH_QUAD: PTRN_CFG0_MSB bit 12	GTH_QUAD: DRP[86] bit 13 GTH_QUAD: PTRN_CFG0_MSB bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 10 GTH_QUAD: PTRN_CFG0_MSB bit 10	GTH_QUAD: DRP[86] bit 11 GTH_QUAD: PTRN_CFG0_MSB bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 8 GTH_QUAD: PTRN_CFG0_MSB bit 8	GTH_QUAD: DRP[86] bit 9 GTH_QUAD: PTRN_CFG0_MSB bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 6 GTH_QUAD: PTRN_CFG0_MSB bit 6	GTH_QUAD: DRP[86] bit 7 GTH_QUAD: PTRN_CFG0_MSB bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 4 GTH_QUAD: PTRN_CFG0_MSB bit 4	GTH_QUAD: DRP[86] bit 5 GTH_QUAD: PTRN_CFG0_MSB bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 2 GTH_QUAD: PTRN_CFG0_MSB bit 2	GTH_QUAD: DRP[86] bit 3 GTH_QUAD: PTRN_CFG0_MSB bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[86] bit 0 GTH_QUAD: PTRN_CFG0_MSB bit 0	GTH_QUAD: DRP[86] bit 1 GTH_QUAD: PTRN_CFG0_MSB bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 14 GTH_QUAD: LANE_LNK_CFGOVRD bit 14	GTH_QUAD: DRP[85] bit 15 GTH_QUAD: LANE_LNK_CFGOVRD bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 12 GTH_QUAD: LANE_LNK_CFGOVRD bit 12	GTH_QUAD: DRP[85] bit 13 GTH_QUAD: LANE_LNK_CFGOVRD bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 10 GTH_QUAD: LANE_LNK_CFGOVRD bit 10	GTH_QUAD: DRP[85] bit 11 GTH_QUAD: LANE_LNK_CFGOVRD bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 8 GTH_QUAD: LANE_LNK_CFGOVRD bit 8	GTH_QUAD: DRP[85] bit 9 GTH_QUAD: LANE_LNK_CFGOVRD bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 6 GTH_QUAD: LANE_LNK_CFGOVRD bit 6	GTH_QUAD: DRP[85] bit 7 GTH_QUAD: LANE_LNK_CFGOVRD bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 4 GTH_QUAD: LANE_LNK_CFGOVRD bit 4	GTH_QUAD: DRP[85] bit 5 GTH_QUAD: LANE_LNK_CFGOVRD bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 2 GTH_QUAD: LANE_LNK_CFGOVRD bit 2	GTH_QUAD: DRP[85] bit 3 GTH_QUAD: LANE_LNK_CFGOVRD bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[85] bit 0 GTH_QUAD: LANE_LNK_CFGOVRD bit 0	GTH_QUAD: DRP[85] bit 1 GTH_QUAD: LANE_LNK_CFGOVRD bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 14 GTH_QUAD: BER_CONST_PTRN1 bit 14	GTH_QUAD: DRP[84] bit 15 GTH_QUAD: BER_CONST_PTRN1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 12 GTH_QUAD: BER_CONST_PTRN1 bit 12	GTH_QUAD: DRP[84] bit 13 GTH_QUAD: BER_CONST_PTRN1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 10 GTH_QUAD: BER_CONST_PTRN1 bit 10	GTH_QUAD: DRP[84] bit 11 GTH_QUAD: BER_CONST_PTRN1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 8 GTH_QUAD: BER_CONST_PTRN1 bit 8	GTH_QUAD: DRP[84] bit 9 GTH_QUAD: BER_CONST_PTRN1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 6 GTH_QUAD: BER_CONST_PTRN1 bit 6	GTH_QUAD: DRP[84] bit 7 GTH_QUAD: BER_CONST_PTRN1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 4 GTH_QUAD: BER_CONST_PTRN1 bit 4	GTH_QUAD: DRP[84] bit 5 GTH_QUAD: BER_CONST_PTRN1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 2 GTH_QUAD: BER_CONST_PTRN1 bit 2	GTH_QUAD: DRP[84] bit 3 GTH_QUAD: BER_CONST_PTRN1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[84] bit 0 GTH_QUAD: BER_CONST_PTRN1 bit 0	GTH_QUAD: DRP[84] bit 1 GTH_QUAD: BER_CONST_PTRN1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 14 GTH_QUAD: BER_CONST_PTRN0 bit 14	GTH_QUAD: DRP[83] bit 15 GTH_QUAD: BER_CONST_PTRN0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 12 GTH_QUAD: BER_CONST_PTRN0 bit 12	GTH_QUAD: DRP[83] bit 13 GTH_QUAD: BER_CONST_PTRN0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 10 GTH_QUAD: BER_CONST_PTRN0 bit 10	GTH_QUAD: DRP[83] bit 11 GTH_QUAD: BER_CONST_PTRN0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 8 GTH_QUAD: BER_CONST_PTRN0 bit 8	GTH_QUAD: DRP[83] bit 9 GTH_QUAD: BER_CONST_PTRN0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 6 GTH_QUAD: BER_CONST_PTRN0 bit 6	GTH_QUAD: DRP[83] bit 7 GTH_QUAD: BER_CONST_PTRN0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 4 GTH_QUAD: BER_CONST_PTRN0 bit 4	GTH_QUAD: DRP[83] bit 5 GTH_QUAD: BER_CONST_PTRN0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 2 GTH_QUAD: BER_CONST_PTRN0 bit 2	GTH_QUAD: DRP[83] bit 3 GTH_QUAD: BER_CONST_PTRN0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[83] bit 0 GTH_QUAD: BER_CONST_PTRN0 bit 0	GTH_QUAD: DRP[83] bit 1 GTH_QUAD: BER_CONST_PTRN0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 14 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 14	GTH_QUAD: DRP[82] bit 15 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 12 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 12	GTH_QUAD: DRP[82] bit 13 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 10 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 10	GTH_QUAD: DRP[82] bit 11 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 8 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 8	GTH_QUAD: DRP[82] bit 9 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 6 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 6	GTH_QUAD: DRP[82] bit 7 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 4 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 4	GTH_QUAD: DRP[82] bit 5 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 2 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 2	GTH_QUAD: DRP[82] bit 3 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[82] bit 0 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 0	GTH_QUAD: DRP[82] bit 1 GTH_QUAD: BUFFER_CONFIG_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 14 GTH_QUAD: TX_FABRIC_WIDTH1 bit 1	GTH_QUAD: DRP[81] bit 15 GTH_QUAD: TX_FABRIC_WIDTH1 bit 2
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 12	GTH_QUAD: DRP[81] bit 13 GTH_QUAD: TX_FABRIC_WIDTH1 bit 0
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 10 GTH_QUAD: RX_FABRIC_WIDTH1 bit 1	GTH_QUAD: DRP[81] bit 11 GTH_QUAD: RX_FABRIC_WIDTH1 bit 2
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 8	GTH_QUAD: DRP[81] bit 9 GTH_QUAD: RX_FABRIC_WIDTH1 bit 0
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 6	GTH_QUAD: DRP[81] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 4	GTH_QUAD: DRP[81] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 2	GTH_QUAD: DRP[81] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[81] bit 0 GTH_QUAD: TST_PCS_LOOPBACK_LANE1 bit 0	GTH_QUAD: DRP[81] bit 1 GTH_QUAD: GTH_CFG_PWRUP_LANE1 bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 14 GTH_QUAD: PCS_MODE_LANE1 bit 14	GTH_QUAD: DRP[80] bit 15 GTH_QUAD: PCS_MODE_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 12 GTH_QUAD: PCS_MODE_LANE1 bit 12	GTH_QUAD: DRP[80] bit 13 GTH_QUAD: PCS_MODE_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 10 GTH_QUAD: PCS_MODE_LANE1 bit 10	GTH_QUAD: DRP[80] bit 11 GTH_QUAD: PCS_MODE_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 8 GTH_QUAD: PCS_MODE_LANE1 bit 8	GTH_QUAD: DRP[80] bit 9 GTH_QUAD: PCS_MODE_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 6 GTH_QUAD: PCS_MODE_LANE1 bit 6	GTH_QUAD: DRP[80] bit 7 GTH_QUAD: PCS_MODE_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 4 GTH_QUAD: PCS_MODE_LANE1 bit 4	GTH_QUAD: DRP[80] bit 5 GTH_QUAD: PCS_MODE_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 2 GTH_QUAD: PCS_MODE_LANE1 bit 2	GTH_QUAD: DRP[80] bit 3 GTH_QUAD: PCS_MODE_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[80] bit 0 GTH_QUAD: PCS_MODE_LANE1 bit 0	GTH_QUAD: DRP[80] bit 1 GTH_QUAD: PCS_MODE_LANE1 bit 1

virtex6 GTH rect MAIN[11]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 14 GTH_QUAD: PCS_RESET_1_LANE0 bit 14	GTH_QUAD: DRP[95] bit 15 GTH_QUAD: PCS_RESET_1_LANE0 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 12 GTH_QUAD: PCS_RESET_1_LANE0 bit 12	GTH_QUAD: DRP[95] bit 13 GTH_QUAD: PCS_RESET_1_LANE0 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 10 GTH_QUAD: PCS_RESET_1_LANE0 bit 10	GTH_QUAD: DRP[95] bit 11 GTH_QUAD: PCS_RESET_1_LANE0 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 8 GTH_QUAD: PCS_RESET_1_LANE0 bit 8	GTH_QUAD: DRP[95] bit 9 GTH_QUAD: PCS_RESET_1_LANE0 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 6 GTH_QUAD: PCS_RESET_1_LANE0 bit 6	GTH_QUAD: DRP[95] bit 7 GTH_QUAD: PCS_RESET_1_LANE0 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 4 GTH_QUAD: PCS_RESET_1_LANE0 bit 4	GTH_QUAD: DRP[95] bit 5 GTH_QUAD: PCS_RESET_1_LANE0 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 2 GTH_QUAD: PCS_RESET_1_LANE0 bit 2	GTH_QUAD: DRP[95] bit 3 GTH_QUAD: PCS_RESET_1_LANE0 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[95] bit 0 GTH_QUAD: PCS_RESET_1_LANE0 bit 0	GTH_QUAD: DRP[95] bit 1 GTH_QUAD: PCS_RESET_1_LANE0 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 14 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 14	GTH_QUAD: DRP[94] bit 15 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 12 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 12	GTH_QUAD: DRP[94] bit 13 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 10 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 10	GTH_QUAD: DRP[94] bit 11 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 8 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 8	GTH_QUAD: DRP[94] bit 9 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 6 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 6	GTH_QUAD: DRP[94] bit 7 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 4 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 4	GTH_QUAD: DRP[94] bit 5 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 2 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 2	GTH_QUAD: DRP[94] bit 3 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[94] bit 0 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 0	GTH_QUAD: DRP[94] bit 1 GTH_QUAD: PCS_MISC_CFG_1_LANE0 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 14 GTH_QUAD: PRBS_CFG_LANE0 bit 14	GTH_QUAD: DRP[93] bit 15 GTH_QUAD: PRBS_CFG_LANE0 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 12 GTH_QUAD: PRBS_CFG_LANE0 bit 12	GTH_QUAD: DRP[93] bit 13 GTH_QUAD: PRBS_CFG_LANE0 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 10 GTH_QUAD: PRBS_CFG_LANE0 bit 10	GTH_QUAD: DRP[93] bit 11 GTH_QUAD: PRBS_CFG_LANE0 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 8 GTH_QUAD: PRBS_CFG_LANE0 bit 8	GTH_QUAD: DRP[93] bit 9 GTH_QUAD: PRBS_CFG_LANE0 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 6 GTH_QUAD: PRBS_CFG_LANE0 bit 6	GTH_QUAD: DRP[93] bit 7 GTH_QUAD: PRBS_CFG_LANE0 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 4 GTH_QUAD: PRBS_CFG_LANE0 bit 4	GTH_QUAD: DRP[93] bit 5 GTH_QUAD: PRBS_CFG_LANE0 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 2 GTH_QUAD: PRBS_CFG_LANE0 bit 2	GTH_QUAD: DRP[93] bit 3 GTH_QUAD: PRBS_CFG_LANE0 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[93] bit 0 GTH_QUAD: PRBS_CFG_LANE0 bit 0	GTH_QUAD: DRP[93] bit 1 GTH_QUAD: PRBS_CFG_LANE0 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 14 GTH_QUAD: PCS_RESET_LANE0 bit 14	GTH_QUAD: DRP[92] bit 15 GTH_QUAD: PCS_RESET_LANE0 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 12 GTH_QUAD: PCS_RESET_LANE0 bit 12	GTH_QUAD: DRP[92] bit 13 GTH_QUAD: PCS_RESET_LANE0 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 10 GTH_QUAD: PCS_RESET_LANE0 bit 10	GTH_QUAD: DRP[92] bit 11 GTH_QUAD: PCS_RESET_LANE0 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 8 GTH_QUAD: PCS_RESET_LANE0 bit 8	GTH_QUAD: DRP[92] bit 9 GTH_QUAD: PCS_RESET_LANE0 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 6 GTH_QUAD: PCS_RESET_LANE0 bit 6	GTH_QUAD: DRP[92] bit 7 GTH_QUAD: PCS_RESET_LANE0 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 4 GTH_QUAD: PCS_RESET_LANE0 bit 4	GTH_QUAD: DRP[92] bit 5 GTH_QUAD: PCS_RESET_LANE0 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 2 GTH_QUAD: PCS_RESET_LANE0 bit 2	GTH_QUAD: DRP[92] bit 3 GTH_QUAD: PCS_RESET_LANE0 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[92] bit 0 GTH_QUAD: PCS_RESET_LANE0 bit 0	GTH_QUAD: DRP[92] bit 1 GTH_QUAD: PCS_RESET_LANE0 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 14 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 14	GTH_QUAD: DRP[91] bit 15 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 12 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 12	GTH_QUAD: DRP[91] bit 13 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 10 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 10	GTH_QUAD: DRP[91] bit 11 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 8 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 8	GTH_QUAD: DRP[91] bit 9 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 6 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 6	GTH_QUAD: DRP[91] bit 7 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 4 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 4	GTH_QUAD: DRP[91] bit 5 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 2 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 2	GTH_QUAD: DRP[91] bit 3 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[91] bit 0 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 0	GTH_QUAD: DRP[91] bit 1 GTH_QUAD: PRBS_BER_CFG1_LANE0 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 14 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 14	GTH_QUAD: DRP[90] bit 15 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 12 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 12	GTH_QUAD: DRP[90] bit 13 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 10 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 10	GTH_QUAD: DRP[90] bit 11 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 8 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 8	GTH_QUAD: DRP[90] bit 9 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 6 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 6	GTH_QUAD: DRP[90] bit 7 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 4 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 4	GTH_QUAD: DRP[90] bit 5 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 2 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 2	GTH_QUAD: DRP[90] bit 3 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[90] bit 0 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 0	GTH_QUAD: DRP[90] bit 1 GTH_QUAD: PRBS_BER_CFG0_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 14 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 14	GTH_QUAD: DRP[89] bit 15 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 12 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 12	GTH_QUAD: DRP[89] bit 13 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 10 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 10	GTH_QUAD: DRP[89] bit 11 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 8 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 8	GTH_QUAD: DRP[89] bit 9 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 6 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 6	GTH_QUAD: DRP[89] bit 7 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 4 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 4	GTH_QUAD: DRP[89] bit 5 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 2 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 2	GTH_QUAD: DRP[89] bit 3 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[89] bit 0 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 0	GTH_QUAD: DRP[89] bit 1 GTH_QUAD: PCS_MISC_CFG_0_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 14 GTH_QUAD: PTRN_LEN_CFG bit 14	GTH_QUAD: DRP[88] bit 15 GTH_QUAD: PTRN_LEN_CFG bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 12 GTH_QUAD: PTRN_LEN_CFG bit 12	GTH_QUAD: DRP[88] bit 13 GTH_QUAD: PTRN_LEN_CFG bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 10 GTH_QUAD: PTRN_LEN_CFG bit 10	GTH_QUAD: DRP[88] bit 11 GTH_QUAD: PTRN_LEN_CFG bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 8 GTH_QUAD: PTRN_LEN_CFG bit 8	GTH_QUAD: DRP[88] bit 9 GTH_QUAD: PTRN_LEN_CFG bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 6 GTH_QUAD: PTRN_LEN_CFG bit 6	GTH_QUAD: DRP[88] bit 7 GTH_QUAD: PTRN_LEN_CFG bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 4 GTH_QUAD: PTRN_LEN_CFG bit 4	GTH_QUAD: DRP[88] bit 5 GTH_QUAD: PTRN_LEN_CFG bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 2 GTH_QUAD: PTRN_LEN_CFG bit 2	GTH_QUAD: DRP[88] bit 3 GTH_QUAD: PTRN_LEN_CFG bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[88] bit 0 GTH_QUAD: PTRN_LEN_CFG bit 0	GTH_QUAD: DRP[88] bit 1 GTH_QUAD: PTRN_LEN_CFG bit 1

virtex6 GTH rect MAIN[12]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 14 GTH_QUAD: MODE_CFG1 bit 14	GTH_QUAD: DRP[103] bit 15 GTH_QUAD: MODE_CFG1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 12 GTH_QUAD: MODE_CFG1 bit 12	GTH_QUAD: DRP[103] bit 13 GTH_QUAD: MODE_CFG1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 10 GTH_QUAD: MODE_CFG1 bit 10	GTH_QUAD: DRP[103] bit 11 GTH_QUAD: MODE_CFG1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 8 GTH_QUAD: MODE_CFG1 bit 8	GTH_QUAD: DRP[103] bit 9 GTH_QUAD: MODE_CFG1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 6 GTH_QUAD: MODE_CFG1 bit 6	GTH_QUAD: DRP[103] bit 7 GTH_QUAD: MODE_CFG1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 4 GTH_QUAD: MODE_CFG1 bit 4	GTH_QUAD: DRP[103] bit 5 GTH_QUAD: MODE_CFG1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 2 GTH_QUAD: MODE_CFG1 bit 2	GTH_QUAD: DRP[103] bit 3 GTH_QUAD: MODE_CFG1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[103] bit 0 GTH_QUAD: MODE_CFG1 bit 0	GTH_QUAD: DRP[103] bit 1 GTH_QUAD: MODE_CFG1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 14 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 14	GTH_QUAD: DRP[102] bit 15 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 12 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 12	GTH_QUAD: DRP[102] bit 13 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 10 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 10	GTH_QUAD: DRP[102] bit 11 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 8 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 8	GTH_QUAD: DRP[102] bit 9 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 6 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 6	GTH_QUAD: DRP[102] bit 7 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 4 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 4	GTH_QUAD: DRP[102] bit 5 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 2 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 2	GTH_QUAD: DRP[102] bit 3 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[102] bit 0 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 0	GTH_QUAD: DRP[102] bit 1 GTH_QUAD: SLICE_TX_RESET_LANE01 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 14	GTH_QUAD: DRP[101] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 12	GTH_QUAD: DRP[101] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 10	GTH_QUAD: DRP[101] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 8	GTH_QUAD: DRP[101] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 6	GTH_QUAD: DRP[101] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 4	GTH_QUAD: DRP[101] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 2	GTH_QUAD: DRP[101] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[101] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 0	GTH_QUAD: DRP[101] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE01 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 14	GTH_QUAD: DRP[100] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 12	GTH_QUAD: DRP[100] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 10	GTH_QUAD: DRP[100] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 8	GTH_QUAD: DRP[100] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 6	GTH_QUAD: DRP[100] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 4	GTH_QUAD: DRP[100] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 2	GTH_QUAD: DRP[100] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[100] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 0	GTH_QUAD: DRP[100] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE01 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 14	GTH_QUAD: DRP[99] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 12	GTH_QUAD: DRP[99] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 10	GTH_QUAD: DRP[99] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 8	GTH_QUAD: DRP[99] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 6	GTH_QUAD: DRP[99] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 4	GTH_QUAD: DRP[99] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 2	GTH_QUAD: DRP[99] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[99] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 0	GTH_QUAD: DRP[99] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE01 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 14 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 14	GTH_QUAD: DRP[98] bit 15 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 12 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 12	GTH_QUAD: DRP[98] bit 13 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 10 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 10	GTH_QUAD: DRP[98] bit 11 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 8 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 8	GTH_QUAD: DRP[98] bit 9 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 6 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 6	GTH_QUAD: DRP[98] bit 7 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 4 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 4	GTH_QUAD: DRP[98] bit 5 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 2 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 2	GTH_QUAD: DRP[98] bit 3 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[98] bit 0 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 0	GTH_QUAD: DRP[98] bit 1 GTH_QUAD: E10GBASER_PCS_CFG_LANE0 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 14 GTH_QUAD: PCS_TYPE_LANE0 bit 14	GTH_QUAD: DRP[97] bit 15 GTH_QUAD: PCS_TYPE_LANE0 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 12 GTH_QUAD: PCS_TYPE_LANE0 bit 12	GTH_QUAD: DRP[97] bit 13 GTH_QUAD: PCS_TYPE_LANE0 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 10 GTH_QUAD: PCS_TYPE_LANE0 bit 10	GTH_QUAD: DRP[97] bit 11 GTH_QUAD: PCS_TYPE_LANE0 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 8 GTH_QUAD: PCS_TYPE_LANE0 bit 8	GTH_QUAD: DRP[97] bit 9 GTH_QUAD: PCS_TYPE_LANE0 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 6 GTH_QUAD: PCS_TYPE_LANE0 bit 6	GTH_QUAD: DRP[97] bit 7 GTH_QUAD: PCS_TYPE_LANE0 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 4 GTH_QUAD: PCS_TYPE_LANE0 bit 4	GTH_QUAD: DRP[97] bit 5 GTH_QUAD: PCS_TYPE_LANE0 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 2 GTH_QUAD: PCS_TYPE_LANE0 bit 2	GTH_QUAD: DRP[97] bit 3 GTH_QUAD: PCS_TYPE_LANE0 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[97] bit 0 GTH_QUAD: PCS_TYPE_LANE0 bit 0	GTH_QUAD: DRP[97] bit 1 GTH_QUAD: PCS_TYPE_LANE0 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 14 GTH_QUAD: PCS_ABILITY_LANE0 bit 14	GTH_QUAD: DRP[96] bit 15 GTH_QUAD: PCS_ABILITY_LANE0 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 12 GTH_QUAD: PCS_ABILITY_LANE0 bit 12	GTH_QUAD: DRP[96] bit 13 GTH_QUAD: PCS_ABILITY_LANE0 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 10 GTH_QUAD: PCS_ABILITY_LANE0 bit 10	GTH_QUAD: DRP[96] bit 11 GTH_QUAD: PCS_ABILITY_LANE0 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 8 GTH_QUAD: PCS_ABILITY_LANE0 bit 8	GTH_QUAD: DRP[96] bit 9 GTH_QUAD: PCS_ABILITY_LANE0 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 6 GTH_QUAD: PCS_ABILITY_LANE0 bit 6	GTH_QUAD: DRP[96] bit 7 GTH_QUAD: PCS_ABILITY_LANE0 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 4 GTH_QUAD: PCS_ABILITY_LANE0 bit 4	GTH_QUAD: DRP[96] bit 5 GTH_QUAD: PCS_ABILITY_LANE0 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 2 GTH_QUAD: PCS_ABILITY_LANE0 bit 2	GTH_QUAD: DRP[96] bit 3 GTH_QUAD: PCS_ABILITY_LANE0 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[96] bit 0 GTH_QUAD: PCS_ABILITY_LANE0 bit 0	GTH_QUAD: DRP[96] bit 1 GTH_QUAD: PCS_ABILITY_LANE0 bit 1

virtex6 GTH rect MAIN[13]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 14 GTH_QUAD: PMA_CTRL2_LANE1 bit 14	GTH_QUAD: DRP[111] bit 15 GTH_QUAD: PMA_CTRL2_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 12 GTH_QUAD: PMA_CTRL2_LANE1 bit 12	GTH_QUAD: DRP[111] bit 13 GTH_QUAD: PMA_CTRL2_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 10 GTH_QUAD: PMA_CTRL2_LANE1 bit 10	GTH_QUAD: DRP[111] bit 11 GTH_QUAD: PMA_CTRL2_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 8 GTH_QUAD: PMA_CTRL2_LANE1 bit 8	GTH_QUAD: DRP[111] bit 9 GTH_QUAD: PMA_CTRL2_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 6 GTH_QUAD: PMA_CTRL2_LANE1 bit 6	GTH_QUAD: DRP[111] bit 7 GTH_QUAD: PMA_CTRL2_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 4 GTH_QUAD: PMA_CTRL2_LANE1 bit 4	GTH_QUAD: DRP[111] bit 5 GTH_QUAD: PMA_CTRL2_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 2 GTH_QUAD: PMA_CTRL2_LANE1 bit 2	GTH_QUAD: DRP[111] bit 3 GTH_QUAD: PMA_CTRL2_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[111] bit 0 GTH_QUAD: PMA_CTRL2_LANE1 bit 0	GTH_QUAD: DRP[111] bit 1 GTH_QUAD: PMA_CTRL2_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 14 GTH_QUAD: PMA_CTRL1_LANE1 bit 14	GTH_QUAD: DRP[110] bit 15 GTH_QUAD: PMA_CTRL1_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 12 GTH_QUAD: PMA_CTRL1_LANE1 bit 12	GTH_QUAD: DRP[110] bit 13 GTH_QUAD: PMA_CTRL1_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 10 GTH_QUAD: PMA_CTRL1_LANE1 bit 10	GTH_QUAD: DRP[110] bit 11 GTH_QUAD: PMA_CTRL1_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 8 GTH_QUAD: PMA_CTRL1_LANE1 bit 8	GTH_QUAD: DRP[110] bit 9 GTH_QUAD: PMA_CTRL1_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 6 GTH_QUAD: PMA_CTRL1_LANE1 bit 6	GTH_QUAD: DRP[110] bit 7 GTH_QUAD: PMA_CTRL1_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 4 GTH_QUAD: PMA_CTRL1_LANE1 bit 4	GTH_QUAD: DRP[110] bit 5 GTH_QUAD: PMA_CTRL1_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 2 GTH_QUAD: PMA_CTRL1_LANE1 bit 2	GTH_QUAD: DRP[110] bit 3 GTH_QUAD: PMA_CTRL1_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[110] bit 0 GTH_QUAD: PMA_CTRL1_LANE1 bit 0	GTH_QUAD: DRP[110] bit 1 GTH_QUAD: PMA_CTRL1_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 14 GTH_QUAD: MODE_CFG7 bit 14	GTH_QUAD: DRP[109] bit 15 GTH_QUAD: MODE_CFG7 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 12 GTH_QUAD: MODE_CFG7 bit 12	GTH_QUAD: DRP[109] bit 13 GTH_QUAD: MODE_CFG7 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 10 GTH_QUAD: MODE_CFG7 bit 10	GTH_QUAD: DRP[109] bit 11 GTH_QUAD: MODE_CFG7 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 8 GTH_QUAD: MODE_CFG7 bit 8	GTH_QUAD: DRP[109] bit 9 GTH_QUAD: MODE_CFG7 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 6 GTH_QUAD: MODE_CFG7 bit 6	GTH_QUAD: DRP[109] bit 7 GTH_QUAD: MODE_CFG7 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 4 GTH_QUAD: MODE_CFG7 bit 4	GTH_QUAD: DRP[109] bit 5 GTH_QUAD: MODE_CFG7 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 2 GTH_QUAD: MODE_CFG7 bit 2	GTH_QUAD: DRP[109] bit 3 GTH_QUAD: MODE_CFG7 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[109] bit 0 GTH_QUAD: MODE_CFG7 bit 0	GTH_QUAD: DRP[109] bit 1 GTH_QUAD: MODE_CFG7 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 14 GTH_QUAD: MODE_CFG6 bit 14	GTH_QUAD: DRP[108] bit 15 GTH_QUAD: MODE_CFG6 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 12 GTH_QUAD: MODE_CFG6 bit 12	GTH_QUAD: DRP[108] bit 13 GTH_QUAD: MODE_CFG6 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 10 GTH_QUAD: MODE_CFG6 bit 10	GTH_QUAD: DRP[108] bit 11 GTH_QUAD: MODE_CFG6 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 8 GTH_QUAD: MODE_CFG6 bit 8	GTH_QUAD: DRP[108] bit 9 GTH_QUAD: MODE_CFG6 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 6 GTH_QUAD: MODE_CFG6 bit 6	GTH_QUAD: DRP[108] bit 7 GTH_QUAD: MODE_CFG6 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 4 GTH_QUAD: MODE_CFG6 bit 4	GTH_QUAD: DRP[108] bit 5 GTH_QUAD: MODE_CFG6 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 2 GTH_QUAD: MODE_CFG6 bit 2	GTH_QUAD: DRP[108] bit 3 GTH_QUAD: MODE_CFG6 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[108] bit 0 GTH_QUAD: MODE_CFG6 bit 0	GTH_QUAD: DRP[108] bit 1 GTH_QUAD: MODE_CFG6 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 14 GTH_QUAD: MODE_CFG5 bit 14	GTH_QUAD: DRP[107] bit 15 GTH_QUAD: MODE_CFG5 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 12 GTH_QUAD: MODE_CFG5 bit 12	GTH_QUAD: DRP[107] bit 13 GTH_QUAD: MODE_CFG5 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 10 GTH_QUAD: MODE_CFG5 bit 10	GTH_QUAD: DRP[107] bit 11 GTH_QUAD: MODE_CFG5 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 8 GTH_QUAD: MODE_CFG5 bit 8	GTH_QUAD: DRP[107] bit 9 GTH_QUAD: MODE_CFG5 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 6 GTH_QUAD: MODE_CFG5 bit 6	GTH_QUAD: DRP[107] bit 7 GTH_QUAD: MODE_CFG5 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 4 GTH_QUAD: MODE_CFG5 bit 4	GTH_QUAD: DRP[107] bit 5 GTH_QUAD: MODE_CFG5 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 2 GTH_QUAD: MODE_CFG5 bit 2	GTH_QUAD: DRP[107] bit 3 GTH_QUAD: MODE_CFG5 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[107] bit 0 GTH_QUAD: MODE_CFG5 bit 0	GTH_QUAD: DRP[107] bit 1 GTH_QUAD: MODE_CFG5 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 14 GTH_QUAD: MODE_CFG4 bit 14	GTH_QUAD: DRP[106] bit 15 GTH_QUAD: MODE_CFG4 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 12 GTH_QUAD: MODE_CFG4 bit 12	GTH_QUAD: DRP[106] bit 13 GTH_QUAD: MODE_CFG4 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 10 GTH_QUAD: MODE_CFG4 bit 10	GTH_QUAD: DRP[106] bit 11 GTH_QUAD: MODE_CFG4 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 8 GTH_QUAD: MODE_CFG4 bit 8	GTH_QUAD: DRP[106] bit 9 GTH_QUAD: MODE_CFG4 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 6 GTH_QUAD: MODE_CFG4 bit 6	GTH_QUAD: DRP[106] bit 7 GTH_QUAD: MODE_CFG4 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 4 GTH_QUAD: MODE_CFG4 bit 4	GTH_QUAD: DRP[106] bit 5 GTH_QUAD: MODE_CFG4 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 2 GTH_QUAD: MODE_CFG4 bit 2	GTH_QUAD: DRP[106] bit 3 GTH_QUAD: MODE_CFG4 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[106] bit 0 GTH_QUAD: MODE_CFG4 bit 0	GTH_QUAD: DRP[106] bit 1 GTH_QUAD: MODE_CFG4 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 14 GTH_QUAD: MODE_CFG3 bit 14	GTH_QUAD: DRP[105] bit 15 GTH_QUAD: MODE_CFG3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 12 GTH_QUAD: MODE_CFG3 bit 12	GTH_QUAD: DRP[105] bit 13 GTH_QUAD: MODE_CFG3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 10 GTH_QUAD: MODE_CFG3 bit 10	GTH_QUAD: DRP[105] bit 11 GTH_QUAD: MODE_CFG3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 8 GTH_QUAD: MODE_CFG3 bit 8	GTH_QUAD: DRP[105] bit 9 GTH_QUAD: MODE_CFG3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 6 GTH_QUAD: MODE_CFG3 bit 6	GTH_QUAD: DRP[105] bit 7 GTH_QUAD: MODE_CFG3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 4 GTH_QUAD: MODE_CFG3 bit 4	GTH_QUAD: DRP[105] bit 5 GTH_QUAD: MODE_CFG3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 2 GTH_QUAD: MODE_CFG3 bit 2	GTH_QUAD: DRP[105] bit 3 GTH_QUAD: MODE_CFG3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[105] bit 0 GTH_QUAD: MODE_CFG3 bit 0	GTH_QUAD: DRP[105] bit 1 GTH_QUAD: MODE_CFG3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 14 GTH_QUAD: MODE_CFG2 bit 14	GTH_QUAD: DRP[104] bit 15 GTH_QUAD: MODE_CFG2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 12 GTH_QUAD: MODE_CFG2 bit 12	GTH_QUAD: DRP[104] bit 13 GTH_QUAD: MODE_CFG2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 10 GTH_QUAD: MODE_CFG2 bit 10	GTH_QUAD: DRP[104] bit 11 GTH_QUAD: MODE_CFG2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 8 GTH_QUAD: MODE_CFG2 bit 8	GTH_QUAD: DRP[104] bit 9 GTH_QUAD: MODE_CFG2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 6 GTH_QUAD: MODE_CFG2 bit 6	GTH_QUAD: DRP[104] bit 7 GTH_QUAD: MODE_CFG2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 4 GTH_QUAD: MODE_CFG2 bit 4	GTH_QUAD: DRP[104] bit 5 GTH_QUAD: MODE_CFG2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 2 GTH_QUAD: MODE_CFG2 bit 2	GTH_QUAD: DRP[104] bit 3 GTH_QUAD: MODE_CFG2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[104] bit 0 GTH_QUAD: MODE_CFG2 bit 0	GTH_QUAD: DRP[104] bit 1 GTH_QUAD: MODE_CFG2 bit 1

virtex6 GTH rect MAIN[14]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 14 GTH_QUAD: RX_CFG2_LANE1 bit 14	GTH_QUAD: DRP[119] bit 15 GTH_QUAD: RX_CFG2_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 12 GTH_QUAD: RX_CFG2_LANE1 bit 12	GTH_QUAD: DRP[119] bit 13 GTH_QUAD: RX_CFG2_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 10 GTH_QUAD: RX_CFG2_LANE1 bit 10	GTH_QUAD: DRP[119] bit 11 GTH_QUAD: RX_CFG2_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 8 GTH_QUAD: RX_CFG2_LANE1 bit 8	GTH_QUAD: DRP[119] bit 9 GTH_QUAD: RX_CFG2_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 6 GTH_QUAD: RX_CFG2_LANE1 bit 6	GTH_QUAD: DRP[119] bit 7 GTH_QUAD: RX_CFG2_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 4 GTH_QUAD: RX_CFG2_LANE1 bit 4	GTH_QUAD: DRP[119] bit 5 GTH_QUAD: RX_CFG2_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 2 GTH_QUAD: RX_CFG2_LANE1 bit 2	GTH_QUAD: DRP[119] bit 3 GTH_QUAD: RX_CFG2_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[119] bit 0 GTH_QUAD: RX_CFG2_LANE1 bit 0	GTH_QUAD: DRP[119] bit 1 GTH_QUAD: RX_CFG2_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 14 GTH_QUAD: RX_CFG1_LANE1 bit 14	GTH_QUAD: DRP[118] bit 15 GTH_QUAD: RX_CFG1_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 12 GTH_QUAD: RX_CFG1_LANE1 bit 12	GTH_QUAD: DRP[118] bit 13 GTH_QUAD: RX_CFG1_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 10 GTH_QUAD: RX_CFG1_LANE1 bit 10	GTH_QUAD: DRP[118] bit 11 GTH_QUAD: RX_CFG1_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 8 GTH_QUAD: RX_CFG1_LANE1 bit 8	GTH_QUAD: DRP[118] bit 9 GTH_QUAD: RX_CFG1_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 6 GTH_QUAD: RX_CFG1_LANE1 bit 6	GTH_QUAD: DRP[118] bit 7 GTH_QUAD: RX_CFG1_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 4 GTH_QUAD: RX_CFG1_LANE1 bit 4	GTH_QUAD: DRP[118] bit 5 GTH_QUAD: RX_CFG1_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 2 GTH_QUAD: RX_CFG1_LANE1 bit 2	GTH_QUAD: DRP[118] bit 3 GTH_QUAD: RX_CFG1_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[118] bit 0 GTH_QUAD: RX_CFG1_LANE1 bit 0	GTH_QUAD: DRP[118] bit 1 GTH_QUAD: RX_CFG1_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 14 GTH_QUAD: RX_CFG0_LANE1 bit 14	GTH_QUAD: DRP[117] bit 15 GTH_QUAD: RX_CFG0_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 12 GTH_QUAD: RX_CFG0_LANE1 bit 12	GTH_QUAD: DRP[117] bit 13 GTH_QUAD: RX_CFG0_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 10 GTH_QUAD: RX_CFG0_LANE1 bit 10	GTH_QUAD: DRP[117] bit 11 GTH_QUAD: RX_CFG0_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 8 GTH_QUAD: RX_CFG0_LANE1 bit 8	GTH_QUAD: DRP[117] bit 9 GTH_QUAD: RX_CFG0_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 6 GTH_QUAD: RX_CFG0_LANE1 bit 6	GTH_QUAD: DRP[117] bit 7 GTH_QUAD: RX_CFG0_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 4 GTH_QUAD: RX_CFG0_LANE1 bit 4	GTH_QUAD: DRP[117] bit 5 GTH_QUAD: RX_CFG0_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 2 GTH_QUAD: RX_CFG0_LANE1 bit 2	GTH_QUAD: DRP[117] bit 3 GTH_QUAD: RX_CFG0_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[117] bit 0 GTH_QUAD: RX_CFG0_LANE1 bit 0	GTH_QUAD: DRP[117] bit 1 GTH_QUAD: RX_CFG0_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 14 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 14	GTH_QUAD: DRP[116] bit 15 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 12 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 12	GTH_QUAD: DRP[116] bit 13 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 10 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 10	GTH_QUAD: DRP[116] bit 11 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 8 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 8	GTH_QUAD: DRP[116] bit 9 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 6 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 6	GTH_QUAD: DRP[116] bit 7 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 4 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 4	GTH_QUAD: DRP[116] bit 5 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 2 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 2	GTH_QUAD: DRP[116] bit 3 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[116] bit 0 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 0	GTH_QUAD: DRP[116] bit 1 GTH_QUAD: E10GBASEKX_CTRL_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 14 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 14	GTH_QUAD: DRP[115] bit 15 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 12 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 12	GTH_QUAD: DRP[115] bit 13 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 10 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 10	GTH_QUAD: DRP[115] bit 11 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 8 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 8	GTH_QUAD: DRP[115] bit 9 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 6 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 6	GTH_QUAD: DRP[115] bit 7 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 4 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 4	GTH_QUAD: DRP[115] bit 5 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 2 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 2	GTH_QUAD: DRP[115] bit 3 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[115] bit 0 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 0	GTH_QUAD: DRP[115] bit 1 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 14 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 14	GTH_QUAD: DRP[114] bit 15 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 12 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 12	GTH_QUAD: DRP[114] bit 13 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 10 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 10	GTH_QUAD: DRP[114] bit 11 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 8 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 8	GTH_QUAD: DRP[114] bit 9 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 6 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 6	GTH_QUAD: DRP[114] bit 7 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 4 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 4	GTH_QUAD: DRP[114] bit 5 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 2 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 2	GTH_QUAD: DRP[114] bit 3 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[114] bit 0 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 0	GTH_QUAD: DRP[114] bit 1 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 14 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 14	GTH_QUAD: DRP[113] bit 15 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 12 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 12	GTH_QUAD: DRP[113] bit 13 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 10 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 10	GTH_QUAD: DRP[113] bit 11 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 8 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 8	GTH_QUAD: DRP[113] bit 9 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 6 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 6	GTH_QUAD: DRP[113] bit 7 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 4 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 4	GTH_QUAD: DRP[113] bit 5 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 2 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 2	GTH_QUAD: DRP[113] bit 3 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[113] bit 0 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 0	GTH_QUAD: DRP[113] bit 1 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 14 GTH_QUAD: TX_DISABLE_LANE1 bit 14	GTH_QUAD: DRP[112] bit 15 GTH_QUAD: TX_DISABLE_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 12 GTH_QUAD: TX_DISABLE_LANE1 bit 12	GTH_QUAD: DRP[112] bit 13 GTH_QUAD: TX_DISABLE_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 10 GTH_QUAD: TX_DISABLE_LANE1 bit 10	GTH_QUAD: DRP[112] bit 11 GTH_QUAD: TX_DISABLE_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 8 GTH_QUAD: TX_DISABLE_LANE1 bit 8	GTH_QUAD: DRP[112] bit 9 GTH_QUAD: TX_DISABLE_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 6 GTH_QUAD: TX_DISABLE_LANE1 bit 6	GTH_QUAD: DRP[112] bit 7 GTH_QUAD: TX_DISABLE_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 4 GTH_QUAD: TX_DISABLE_LANE1 bit 4	GTH_QUAD: DRP[112] bit 5 GTH_QUAD: TX_DISABLE_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 2 GTH_QUAD: TX_DISABLE_LANE1 bit 2	GTH_QUAD: DRP[112] bit 3 GTH_QUAD: TX_DISABLE_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[112] bit 0 GTH_QUAD: TX_DISABLE_LANE1 bit 0	GTH_QUAD: DRP[112] bit 1 GTH_QUAD: TX_DISABLE_LANE1 bit 1

virtex6 GTH rect MAIN[15]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 14 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 14	GTH_QUAD: DRP[127] bit 15 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 12 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 12	GTH_QUAD: DRP[127] bit 13 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 10 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 10	GTH_QUAD: DRP[127] bit 11 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 8 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 8	GTH_QUAD: DRP[127] bit 9 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 6 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 6	GTH_QUAD: DRP[127] bit 7 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 4 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 4	GTH_QUAD: DRP[127] bit 5 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 2 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 2	GTH_QUAD: DRP[127] bit 3 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[127] bit 0 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 0	GTH_QUAD: DRP[127] bit 1 GTH_QUAD: RX_AEQ_VAL0_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 14 GTH_QUAD: RX_MVAL1_LANE1 bit 14	GTH_QUAD: DRP[126] bit 15 GTH_QUAD: RX_MVAL1_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 12 GTH_QUAD: RX_MVAL1_LANE1 bit 12	GTH_QUAD: DRP[126] bit 13 GTH_QUAD: RX_MVAL1_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 10 GTH_QUAD: RX_MVAL1_LANE1 bit 10	GTH_QUAD: DRP[126] bit 11 GTH_QUAD: RX_MVAL1_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 8 GTH_QUAD: RX_MVAL1_LANE1 bit 8	GTH_QUAD: DRP[126] bit 9 GTH_QUAD: RX_MVAL1_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 6 GTH_QUAD: RX_MVAL1_LANE1 bit 6	GTH_QUAD: DRP[126] bit 7 GTH_QUAD: RX_MVAL1_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 4 GTH_QUAD: RX_MVAL1_LANE1 bit 4	GTH_QUAD: DRP[126] bit 5 GTH_QUAD: RX_MVAL1_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 2 GTH_QUAD: RX_MVAL1_LANE1 bit 2	GTH_QUAD: DRP[126] bit 3 GTH_QUAD: RX_MVAL1_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[126] bit 0 GTH_QUAD: RX_MVAL1_LANE1 bit 0	GTH_QUAD: DRP[126] bit 1 GTH_QUAD: RX_MVAL1_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 14 GTH_QUAD: RX_MVAL0_LANE1 bit 14	GTH_QUAD: DRP[125] bit 15 GTH_QUAD: RX_MVAL0_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 12 GTH_QUAD: RX_MVAL0_LANE1 bit 12	GTH_QUAD: DRP[125] bit 13 GTH_QUAD: RX_MVAL0_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 10 GTH_QUAD: RX_MVAL0_LANE1 bit 10	GTH_QUAD: DRP[125] bit 11 GTH_QUAD: RX_MVAL0_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 8 GTH_QUAD: RX_MVAL0_LANE1 bit 8	GTH_QUAD: DRP[125] bit 9 GTH_QUAD: RX_MVAL0_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 6 GTH_QUAD: RX_MVAL0_LANE1 bit 6	GTH_QUAD: DRP[125] bit 7 GTH_QUAD: RX_MVAL0_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 4 GTH_QUAD: RX_MVAL0_LANE1 bit 4	GTH_QUAD: DRP[125] bit 5 GTH_QUAD: RX_MVAL0_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 2 GTH_QUAD: RX_MVAL0_LANE1 bit 2	GTH_QUAD: DRP[125] bit 3 GTH_QUAD: RX_MVAL0_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[125] bit 0 GTH_QUAD: RX_MVAL0_LANE1 bit 0	GTH_QUAD: DRP[125] bit 1 GTH_QUAD: RX_MVAL0_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 14 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 14	GTH_QUAD: DRP[124] bit 15 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 12 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 12	GTH_QUAD: DRP[124] bit 13 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 10 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 10	GTH_QUAD: DRP[124] bit 11 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 8 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 8	GTH_QUAD: DRP[124] bit 9 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 6 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 6	GTH_QUAD: DRP[124] bit 7 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 4 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 4	GTH_QUAD: DRP[124] bit 5 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 2 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 2	GTH_QUAD: DRP[124] bit 3 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[124] bit 0 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 0	GTH_QUAD: DRP[124] bit 1 GTH_QUAD: RX_CDR_CTRL2_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 14 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 14	GTH_QUAD: DRP[123] bit 15 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 12 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 12	GTH_QUAD: DRP[123] bit 13 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 10 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 10	GTH_QUAD: DRP[123] bit 11 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 8 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 8	GTH_QUAD: DRP[123] bit 9 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 6 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 6	GTH_QUAD: DRP[123] bit 7 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 4 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 4	GTH_QUAD: DRP[123] bit 5 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 2 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 2	GTH_QUAD: DRP[123] bit 3 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[123] bit 0 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 0	GTH_QUAD: DRP[123] bit 1 GTH_QUAD: RX_CDR_CTRL1_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 14 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 14	GTH_QUAD: DRP[122] bit 15 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 12 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 12	GTH_QUAD: DRP[122] bit 13 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 10 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 10	GTH_QUAD: DRP[122] bit 11 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 8 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 8	GTH_QUAD: DRP[122] bit 9 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 6 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 6	GTH_QUAD: DRP[122] bit 7 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 4 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 4	GTH_QUAD: DRP[122] bit 5 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 2 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 2	GTH_QUAD: DRP[122] bit 3 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[122] bit 0 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 0	GTH_QUAD: DRP[122] bit 1 GTH_QUAD: RX_CDR_CTRL0_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 14 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 14	GTH_QUAD: DRP[121] bit 15 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 12 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 12	GTH_QUAD: DRP[121] bit 13 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 10 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 10	GTH_QUAD: DRP[121] bit 11 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 8 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 8	GTH_QUAD: DRP[121] bit 9 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 6 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 6	GTH_QUAD: DRP[121] bit 7 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 4 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 4	GTH_QUAD: DRP[121] bit 5 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 2 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 2	GTH_QUAD: DRP[121] bit 3 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[121] bit 0 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 0	GTH_QUAD: DRP[121] bit 1 GTH_QUAD: RX_LOOP_CTRL_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 14 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 14	GTH_QUAD: DRP[120] bit 15 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 12 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 12	GTH_QUAD: DRP[120] bit 13 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 10 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 10	GTH_QUAD: DRP[120] bit 11 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 8 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 8	GTH_QUAD: DRP[120] bit 9 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 6 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 6	GTH_QUAD: DRP[120] bit 7 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 4 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 4	GTH_QUAD: DRP[120] bit 5 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 2 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 2	GTH_QUAD: DRP[120] bit 3 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[120] bit 0 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 0	GTH_QUAD: DRP[120] bit 1 GTH_QUAD: RX_AGC_CTRL_LANE1 bit 1

virtex6 GTH rect MAIN[16]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 14 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 14	GTH_QUAD: DRP[135] bit 15 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 12 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 12	GTH_QUAD: DRP[135] bit 13 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 10 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 10	GTH_QUAD: DRP[135] bit 11 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 8 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 8	GTH_QUAD: DRP[135] bit 9 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 6 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 6	GTH_QUAD: DRP[135] bit 7 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 4 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 4	GTH_QUAD: DRP[135] bit 5 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 2 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 2	GTH_QUAD: DRP[135] bit 3 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[135] bit 0 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 0	GTH_QUAD: DRP[135] bit 1 GTH_QUAD: TX_CLK_SEL1_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 14 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 14	GTH_QUAD: DRP[134] bit 15 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 12 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 12	GTH_QUAD: DRP[134] bit 13 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 10 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 10	GTH_QUAD: DRP[134] bit 11 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 8 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 8	GTH_QUAD: DRP[134] bit 9 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 6 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 6	GTH_QUAD: DRP[134] bit 7 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 4 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 4	GTH_QUAD: DRP[134] bit 5 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 2 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 2	GTH_QUAD: DRP[134] bit 3 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[134] bit 0 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 0	GTH_QUAD: DRP[134] bit 1 GTH_QUAD: TX_CLK_SEL0_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 14 GTH_QUAD: TX_PREEMPH_LANE1 bit 14	GTH_QUAD: DRP[133] bit 15 GTH_QUAD: TX_PREEMPH_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 12 GTH_QUAD: TX_PREEMPH_LANE1 bit 12	GTH_QUAD: DRP[133] bit 13 GTH_QUAD: TX_PREEMPH_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 10 GTH_QUAD: TX_PREEMPH_LANE1 bit 10	GTH_QUAD: DRP[133] bit 11 GTH_QUAD: TX_PREEMPH_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 8 GTH_QUAD: TX_PREEMPH_LANE1 bit 8	GTH_QUAD: DRP[133] bit 9 GTH_QUAD: TX_PREEMPH_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 6 GTH_QUAD: TX_PREEMPH_LANE1 bit 6	GTH_QUAD: DRP[133] bit 7 GTH_QUAD: TX_PREEMPH_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 4 GTH_QUAD: TX_PREEMPH_LANE1 bit 4	GTH_QUAD: DRP[133] bit 5 GTH_QUAD: TX_PREEMPH_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 2 GTH_QUAD: TX_PREEMPH_LANE1 bit 2	GTH_QUAD: DRP[133] bit 3 GTH_QUAD: TX_PREEMPH_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[133] bit 0 GTH_QUAD: TX_PREEMPH_LANE1 bit 0	GTH_QUAD: DRP[133] bit 1 GTH_QUAD: TX_PREEMPH_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 14 GTH_QUAD: TX_CFG2_LANE1 bit 14	GTH_QUAD: DRP[132] bit 15 GTH_QUAD: TX_CFG2_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 12 GTH_QUAD: TX_CFG2_LANE1 bit 12	GTH_QUAD: DRP[132] bit 13 GTH_QUAD: TX_CFG2_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 10 GTH_QUAD: TX_CFG2_LANE1 bit 10	GTH_QUAD: DRP[132] bit 11 GTH_QUAD: TX_CFG2_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 8 GTH_QUAD: TX_CFG2_LANE1 bit 8	GTH_QUAD: DRP[132] bit 9 GTH_QUAD: TX_CFG2_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 6 GTH_QUAD: TX_CFG2_LANE1 bit 6	GTH_QUAD: DRP[132] bit 7 GTH_QUAD: TX_CFG2_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 4 GTH_QUAD: TX_CFG2_LANE1 bit 4	GTH_QUAD: DRP[132] bit 5 GTH_QUAD: TX_CFG2_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 2 GTH_QUAD: TX_CFG2_LANE1 bit 2	GTH_QUAD: DRP[132] bit 3 GTH_QUAD: TX_CFG2_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[132] bit 0 GTH_QUAD: TX_CFG2_LANE1 bit 0	GTH_QUAD: DRP[132] bit 1 GTH_QUAD: TX_CFG2_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 14 GTH_QUAD: TX_CFG1_LANE1 bit 14	GTH_QUAD: DRP[131] bit 15 GTH_QUAD: TX_CFG1_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 12 GTH_QUAD: TX_CFG1_LANE1 bit 12	GTH_QUAD: DRP[131] bit 13 GTH_QUAD: TX_CFG1_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 10 GTH_QUAD: TX_CFG1_LANE1 bit 10	GTH_QUAD: DRP[131] bit 11 GTH_QUAD: TX_CFG1_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 8 GTH_QUAD: TX_CFG1_LANE1 bit 8	GTH_QUAD: DRP[131] bit 9 GTH_QUAD: TX_CFG1_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 6 GTH_QUAD: TX_CFG1_LANE1 bit 6	GTH_QUAD: DRP[131] bit 7 GTH_QUAD: TX_CFG1_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 4 GTH_QUAD: TX_CFG1_LANE1 bit 4	GTH_QUAD: DRP[131] bit 5 GTH_QUAD: TX_CFG1_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 2 GTH_QUAD: TX_CFG1_LANE1 bit 2	GTH_QUAD: DRP[131] bit 3 GTH_QUAD: TX_CFG1_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[131] bit 0 GTH_QUAD: TX_CFG1_LANE1 bit 0	GTH_QUAD: DRP[131] bit 1 GTH_QUAD: TX_CFG1_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 14 GTH_QUAD: TX_CFG0_LANE1 bit 14	GTH_QUAD: DRP[130] bit 15 GTH_QUAD: TX_CFG0_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 12 GTH_QUAD: TX_CFG0_LANE1 bit 12	GTH_QUAD: DRP[130] bit 13 GTH_QUAD: TX_CFG0_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 10 GTH_QUAD: TX_CFG0_LANE1 bit 10	GTH_QUAD: DRP[130] bit 11 GTH_QUAD: TX_CFG0_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 8 GTH_QUAD: TX_CFG0_LANE1 bit 8	GTH_QUAD: DRP[130] bit 9 GTH_QUAD: TX_CFG0_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 6 GTH_QUAD: TX_CFG0_LANE1 bit 6	GTH_QUAD: DRP[130] bit 7 GTH_QUAD: TX_CFG0_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 4 GTH_QUAD: TX_CFG0_LANE1 bit 4	GTH_QUAD: DRP[130] bit 5 GTH_QUAD: TX_CFG0_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 2 GTH_QUAD: TX_CFG0_LANE1 bit 2	GTH_QUAD: DRP[130] bit 3 GTH_QUAD: TX_CFG0_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[130] bit 0 GTH_QUAD: TX_CFG0_LANE1 bit 0	GTH_QUAD: DRP[130] bit 1 GTH_QUAD: TX_CFG0_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 14 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 14	GTH_QUAD: DRP[129] bit 15 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 12 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 12	GTH_QUAD: DRP[129] bit 13 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 10 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 10	GTH_QUAD: DRP[129] bit 11 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 8 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 8	GTH_QUAD: DRP[129] bit 9 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 6 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 6	GTH_QUAD: DRP[129] bit 7 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 4 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 4	GTH_QUAD: DRP[129] bit 5 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 2 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 2	GTH_QUAD: DRP[129] bit 3 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[129] bit 0 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 0	GTH_QUAD: DRP[129] bit 1 GTH_QUAD: RX_CTLE_CTRL_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 14 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 14	GTH_QUAD: DRP[128] bit 15 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 12 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 12	GTH_QUAD: DRP[128] bit 13 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 10 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 10	GTH_QUAD: DRP[128] bit 11 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 8 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 8	GTH_QUAD: DRP[128] bit 9 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 6 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 6	GTH_QUAD: DRP[128] bit 7 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 4 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 4	GTH_QUAD: DRP[128] bit 5 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 2 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 2	GTH_QUAD: DRP[128] bit 3 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[128] bit 0 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 0	GTH_QUAD: DRP[128] bit 1 GTH_QUAD: RX_AEQ_VAL1_LANE1 bit 1

virtex6 GTH rect MAIN[17]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 14 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 14	GTH_QUAD: DRP[143] bit 15 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 12 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 12	GTH_QUAD: DRP[143] bit 13 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 10 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 10	GTH_QUAD: DRP[143] bit 11 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 8 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 8	GTH_QUAD: DRP[143] bit 9 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 6 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 6	GTH_QUAD: DRP[143] bit 7 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 4 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 4	GTH_QUAD: DRP[143] bit 5 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 2 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 2	GTH_QUAD: DRP[143] bit 3 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[143] bit 0 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 0	GTH_QUAD: DRP[143] bit 1 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 14 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 14	GTH_QUAD: DRP[142] bit 15 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 12 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 12	GTH_QUAD: DRP[142] bit 13 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 10 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 10	GTH_QUAD: DRP[142] bit 11 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 8 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 8	GTH_QUAD: DRP[142] bit 9 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 6 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 6	GTH_QUAD: DRP[142] bit 7 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 4 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 4	GTH_QUAD: DRP[142] bit 5 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 2 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 2	GTH_QUAD: DRP[142] bit 3 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[142] bit 0 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 0	GTH_QUAD: DRP[142] bit 1 GTH_QUAD: LNK_TRN_CFG_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 14 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 14	GTH_QUAD: DRP[141] bit 15 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 12 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 12	GTH_QUAD: DRP[141] bit 13 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 10 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 10	GTH_QUAD: DRP[141] bit 11 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 8 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 8	GTH_QUAD: DRP[141] bit 9 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 6 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 6	GTH_QUAD: DRP[141] bit 7 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 4 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 4	GTH_QUAD: DRP[141] bit 5 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 2 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 2	GTH_QUAD: DRP[141] bit 3 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[141] bit 0 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 0	GTH_QUAD: DRP[141] bit 1 GTH_QUAD: RX_CTRL_OVRD_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 14 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 14	GTH_QUAD: DRP[140] bit 15 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 12 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 12	GTH_QUAD: DRP[140] bit 13 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 10 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 10	GTH_QUAD: DRP[140] bit 11 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 8 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 8	GTH_QUAD: DRP[140] bit 9 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 6 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 6	GTH_QUAD: DRP[140] bit 7 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 4 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 4	GTH_QUAD: DRP[140] bit 5 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 2 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 2	GTH_QUAD: DRP[140] bit 3 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[140] bit 0 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 0	GTH_QUAD: DRP[140] bit 1 GTH_QUAD: TX_PWR_RATE_OVRD_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 14 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 14	GTH_QUAD: DRP[139] bit 15 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 12 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 12	GTH_QUAD: DRP[139] bit 13 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 10 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 10	GTH_QUAD: DRP[139] bit 11 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 8 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 8	GTH_QUAD: DRP[139] bit 9 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 6 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 6	GTH_QUAD: DRP[139] bit 7 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 4 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 4	GTH_QUAD: DRP[139] bit 5 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 2 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 2	GTH_QUAD: DRP[139] bit 3 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[139] bit 0 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 0	GTH_QUAD: DRP[139] bit 1 GTH_QUAD: LANE_PWR_CTRL_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 14 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 14	GTH_QUAD: DRP[138] bit 15 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 12 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 12	GTH_QUAD: DRP[138] bit 13 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 10 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 10	GTH_QUAD: DRP[138] bit 11 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 8 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 8	GTH_QUAD: DRP[138] bit 9 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 6 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 6	GTH_QUAD: DRP[138] bit 7 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 4 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 4	GTH_QUAD: DRP[138] bit 5 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 2 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 2	GTH_QUAD: DRP[138] bit 3 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[138] bit 0 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 0	GTH_QUAD: DRP[138] bit 1 GTH_QUAD: DFE_TRAIN_CTRL_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 14 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 14	GTH_QUAD: DRP[137] bit 15 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 12 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 12	GTH_QUAD: DRP[137] bit 13 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 10 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 10	GTH_QUAD: DRP[137] bit 11 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 8 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 8	GTH_QUAD: DRP[137] bit 9 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 6 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 6	GTH_QUAD: DRP[137] bit 7 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 4 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 4	GTH_QUAD: DRP[137] bit 5 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 2 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 2	GTH_QUAD: DRP[137] bit 3 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[137] bit 0 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 0	GTH_QUAD: DRP[137] bit 1 GTH_QUAD: PMA_LPBK_CTRL_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 14 GTH_QUAD: TERM_CTRL_LANE1 bit 14	GTH_QUAD: DRP[136] bit 15 GTH_QUAD: TERM_CTRL_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 12 GTH_QUAD: TERM_CTRL_LANE1 bit 12	GTH_QUAD: DRP[136] bit 13 GTH_QUAD: TERM_CTRL_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 10 GTH_QUAD: TERM_CTRL_LANE1 bit 10	GTH_QUAD: DRP[136] bit 11 GTH_QUAD: TERM_CTRL_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 8 GTH_QUAD: TERM_CTRL_LANE1 bit 8	GTH_QUAD: DRP[136] bit 9 GTH_QUAD: TERM_CTRL_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 6 GTH_QUAD: TERM_CTRL_LANE1 bit 6	GTH_QUAD: DRP[136] bit 7 GTH_QUAD: TERM_CTRL_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 4 GTH_QUAD: TERM_CTRL_LANE1 bit 4	GTH_QUAD: DRP[136] bit 5 GTH_QUAD: TERM_CTRL_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 2 GTH_QUAD: TERM_CTRL_LANE1 bit 2	GTH_QUAD: DRP[136] bit 3 GTH_QUAD: TERM_CTRL_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[136] bit 0 GTH_QUAD: TERM_CTRL_LANE1 bit 0	GTH_QUAD: DRP[136] bit 1 GTH_QUAD: TERM_CTRL_LANE1 bit 1

virtex6 GTH rect MAIN[18]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 14	GTH_QUAD: DRP[151] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 12	GTH_QUAD: DRP[151] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 10	GTH_QUAD: DRP[151] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 8	GTH_QUAD: DRP[151] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 6	GTH_QUAD: DRP[151] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 4	GTH_QUAD: DRP[151] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 2	GTH_QUAD: DRP[151] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[151] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 0	GTH_QUAD: DRP[151] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 14	GTH_QUAD: DRP[150] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 12	GTH_QUAD: DRP[150] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 10	GTH_QUAD: DRP[150] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 8	GTH_QUAD: DRP[150] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 6	GTH_QUAD: DRP[150] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 4	GTH_QUAD: DRP[150] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 2	GTH_QUAD: DRP[150] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[150] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 0	GTH_QUAD: DRP[150] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 14	GTH_QUAD: DRP[149] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 12	GTH_QUAD: DRP[149] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 10	GTH_QUAD: DRP[149] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 8	GTH_QUAD: DRP[149] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 6	GTH_QUAD: DRP[149] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 4	GTH_QUAD: DRP[149] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 2	GTH_QUAD: DRP[149] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[149] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 0	GTH_QUAD: DRP[149] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 14	GTH_QUAD: DRP[148] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 12	GTH_QUAD: DRP[148] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 10	GTH_QUAD: DRP[148] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 8	GTH_QUAD: DRP[148] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 6	GTH_QUAD: DRP[148] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 4	GTH_QUAD: DRP[148] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 2	GTH_QUAD: DRP[148] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[148] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 0	GTH_QUAD: DRP[148] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 14	GTH_QUAD: DRP[147] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 12	GTH_QUAD: DRP[147] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 10	GTH_QUAD: DRP[147] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 8	GTH_QUAD: DRP[147] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 6	GTH_QUAD: DRP[147] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 4	GTH_QUAD: DRP[147] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 2	GTH_QUAD: DRP[147] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[147] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 0	GTH_QUAD: DRP[147] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 14 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 14	GTH_QUAD: DRP[146] bit 15 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 12 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 12	GTH_QUAD: DRP[146] bit 13 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 10 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 10	GTH_QUAD: DRP[146] bit 11 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 8 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 8	GTH_QUAD: DRP[146] bit 9 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 6 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 6	GTH_QUAD: DRP[146] bit 7 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 4 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 4	GTH_QUAD: DRP[146] bit 5 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 2 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 2	GTH_QUAD: DRP[146] bit 3 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[146] bit 0 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 0	GTH_QUAD: DRP[146] bit 1 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 14 GTH_QUAD: PCS_CTRL2_LANE1 bit 14	GTH_QUAD: DRP[145] bit 15 GTH_QUAD: PCS_CTRL2_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 12 GTH_QUAD: PCS_CTRL2_LANE1 bit 12	GTH_QUAD: DRP[145] bit 13 GTH_QUAD: PCS_CTRL2_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 10 GTH_QUAD: PCS_CTRL2_LANE1 bit 10	GTH_QUAD: DRP[145] bit 11 GTH_QUAD: PCS_CTRL2_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 8 GTH_QUAD: PCS_CTRL2_LANE1 bit 8	GTH_QUAD: DRP[145] bit 9 GTH_QUAD: PCS_CTRL2_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 6 GTH_QUAD: PCS_CTRL2_LANE1 bit 6	GTH_QUAD: DRP[145] bit 7 GTH_QUAD: PCS_CTRL2_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 4 GTH_QUAD: PCS_CTRL2_LANE1 bit 4	GTH_QUAD: DRP[145] bit 5 GTH_QUAD: PCS_CTRL2_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 2 GTH_QUAD: PCS_CTRL2_LANE1 bit 2	GTH_QUAD: DRP[145] bit 3 GTH_QUAD: PCS_CTRL2_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[145] bit 0 GTH_QUAD: PCS_CTRL2_LANE1 bit 0	GTH_QUAD: DRP[145] bit 1 GTH_QUAD: PCS_CTRL2_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 14 GTH_QUAD: PCS_CTRL1_LANE1 bit 14	GTH_QUAD: DRP[144] bit 15 GTH_QUAD: PCS_CTRL1_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 12 GTH_QUAD: PCS_CTRL1_LANE1 bit 12	GTH_QUAD: DRP[144] bit 13 GTH_QUAD: PCS_CTRL1_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 10 GTH_QUAD: PCS_CTRL1_LANE1 bit 10	GTH_QUAD: DRP[144] bit 11 GTH_QUAD: PCS_CTRL1_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 8 GTH_QUAD: PCS_CTRL1_LANE1 bit 8	GTH_QUAD: DRP[144] bit 9 GTH_QUAD: PCS_CTRL1_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 6 GTH_QUAD: PCS_CTRL1_LANE1 bit 6	GTH_QUAD: DRP[144] bit 7 GTH_QUAD: PCS_CTRL1_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 4 GTH_QUAD: PCS_CTRL1_LANE1 bit 4	GTH_QUAD: DRP[144] bit 5 GTH_QUAD: PCS_CTRL1_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 2 GTH_QUAD: PCS_CTRL1_LANE1 bit 2	GTH_QUAD: DRP[144] bit 3 GTH_QUAD: PCS_CTRL1_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[144] bit 0 GTH_QUAD: PCS_CTRL1_LANE1 bit 0	GTH_QUAD: DRP[144] bit 1 GTH_QUAD: PCS_CTRL1_LANE1 bit 1

virtex6 GTH rect MAIN[19]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 14 GTH_QUAD: PCS_RESET_LANE1 bit 14	GTH_QUAD: DRP[159] bit 15 GTH_QUAD: PCS_RESET_LANE1 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 12 GTH_QUAD: PCS_RESET_LANE1 bit 12	GTH_QUAD: DRP[159] bit 13 GTH_QUAD: PCS_RESET_LANE1 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 10 GTH_QUAD: PCS_RESET_LANE1 bit 10	GTH_QUAD: DRP[159] bit 11 GTH_QUAD: PCS_RESET_LANE1 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 8 GTH_QUAD: PCS_RESET_LANE1 bit 8	GTH_QUAD: DRP[159] bit 9 GTH_QUAD: PCS_RESET_LANE1 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 6 GTH_QUAD: PCS_RESET_LANE1 bit 6	GTH_QUAD: DRP[159] bit 7 GTH_QUAD: PCS_RESET_LANE1 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 4 GTH_QUAD: PCS_RESET_LANE1 bit 4	GTH_QUAD: DRP[159] bit 5 GTH_QUAD: PCS_RESET_LANE1 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 2 GTH_QUAD: PCS_RESET_LANE1 bit 2	GTH_QUAD: DRP[159] bit 3 GTH_QUAD: PCS_RESET_LANE1 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[159] bit 0 GTH_QUAD: PCS_RESET_LANE1 bit 0	GTH_QUAD: DRP[159] bit 1 GTH_QUAD: PCS_RESET_LANE1 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 14 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 14	GTH_QUAD: DRP[158] bit 15 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 12 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 12	GTH_QUAD: DRP[158] bit 13 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 10 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 10	GTH_QUAD: DRP[158] bit 11 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 8 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 8	GTH_QUAD: DRP[158] bit 9 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 6 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 6	GTH_QUAD: DRP[158] bit 7 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 4 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 4	GTH_QUAD: DRP[158] bit 5 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 2 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 2	GTH_QUAD: DRP[158] bit 3 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[158] bit 0 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 0	GTH_QUAD: DRP[158] bit 1 GTH_QUAD: PRBS_BER_CFG1_LANE1 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 14 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 14	GTH_QUAD: DRP[157] bit 15 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 12 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 12	GTH_QUAD: DRP[157] bit 13 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 10 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 10	GTH_QUAD: DRP[157] bit 11 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 8 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 8	GTH_QUAD: DRP[157] bit 9 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 6 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 6	GTH_QUAD: DRP[157] bit 7 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 4 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 4	GTH_QUAD: DRP[157] bit 5 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 2 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 2	GTH_QUAD: DRP[157] bit 3 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[157] bit 0 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 0	GTH_QUAD: DRP[157] bit 1 GTH_QUAD: PRBS_BER_CFG0_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 14 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 14	GTH_QUAD: DRP[156] bit 15 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 12 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 12	GTH_QUAD: DRP[156] bit 13 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 10 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 10	GTH_QUAD: DRP[156] bit 11 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 8 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 8	GTH_QUAD: DRP[156] bit 9 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 6 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 6	GTH_QUAD: DRP[156] bit 7 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 4 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 4	GTH_QUAD: DRP[156] bit 5 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 2 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 2	GTH_QUAD: DRP[156] bit 3 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[156] bit 0 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 0	GTH_QUAD: DRP[156] bit 1 GTH_QUAD: PCS_MISC_CFG_0_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 14 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 14	GTH_QUAD: DRP[155] bit 15 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 12 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 12	GTH_QUAD: DRP[155] bit 13 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 10 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 10	GTH_QUAD: DRP[155] bit 11 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 8 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 8	GTH_QUAD: DRP[155] bit 9 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 6 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 6	GTH_QUAD: DRP[155] bit 7 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 4 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 4	GTH_QUAD: DRP[155] bit 5 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 2 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 2	GTH_QUAD: DRP[155] bit 3 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[155] bit 0 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 0	GTH_QUAD: DRP[155] bit 1 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 14	GTH_QUAD: DRP[154] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 12	GTH_QUAD: DRP[154] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 10	GTH_QUAD: DRP[154] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 8	GTH_QUAD: DRP[154] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 6	GTH_QUAD: DRP[154] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 4	GTH_QUAD: DRP[154] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 2	GTH_QUAD: DRP[154] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[154] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 0	GTH_QUAD: DRP[154] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 14	GTH_QUAD: DRP[153] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 12	GTH_QUAD: DRP[153] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 10	GTH_QUAD: DRP[153] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 8	GTH_QUAD: DRP[153] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 6	GTH_QUAD: DRP[153] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 4	GTH_QUAD: DRP[153] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 2	GTH_QUAD: DRP[153] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[153] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 0	GTH_QUAD: DRP[153] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 14	GTH_QUAD: DRP[152] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 12	GTH_QUAD: DRP[152] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 10	GTH_QUAD: DRP[152] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 8	GTH_QUAD: DRP[152] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 6	GTH_QUAD: DRP[152] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 4	GTH_QUAD: DRP[152] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 2	GTH_QUAD: DRP[152] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[152] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 0	GTH_QUAD: DRP[152] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE1 bit 1

virtex6 GTH rect MAIN[20]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 14 GTH_QUAD: PMA_CTRL2_LANE2 bit 14	GTH_QUAD: DRP[167] bit 15 GTH_QUAD: PMA_CTRL2_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 12 GTH_QUAD: PMA_CTRL2_LANE2 bit 12	GTH_QUAD: DRP[167] bit 13 GTH_QUAD: PMA_CTRL2_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 10 GTH_QUAD: PMA_CTRL2_LANE2 bit 10	GTH_QUAD: DRP[167] bit 11 GTH_QUAD: PMA_CTRL2_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 8 GTH_QUAD: PMA_CTRL2_LANE2 bit 8	GTH_QUAD: DRP[167] bit 9 GTH_QUAD: PMA_CTRL2_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 6 GTH_QUAD: PMA_CTRL2_LANE2 bit 6	GTH_QUAD: DRP[167] bit 7 GTH_QUAD: PMA_CTRL2_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 4 GTH_QUAD: PMA_CTRL2_LANE2 bit 4	GTH_QUAD: DRP[167] bit 5 GTH_QUAD: PMA_CTRL2_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 2 GTH_QUAD: PMA_CTRL2_LANE2 bit 2	GTH_QUAD: DRP[167] bit 3 GTH_QUAD: PMA_CTRL2_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[167] bit 0 GTH_QUAD: PMA_CTRL2_LANE2 bit 0	GTH_QUAD: DRP[167] bit 1 GTH_QUAD: PMA_CTRL2_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 14 GTH_QUAD: PMA_CTRL1_LANE2 bit 14	GTH_QUAD: DRP[166] bit 15 GTH_QUAD: PMA_CTRL1_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 12 GTH_QUAD: PMA_CTRL1_LANE2 bit 12	GTH_QUAD: DRP[166] bit 13 GTH_QUAD: PMA_CTRL1_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 10 GTH_QUAD: PMA_CTRL1_LANE2 bit 10	GTH_QUAD: DRP[166] bit 11 GTH_QUAD: PMA_CTRL1_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 8 GTH_QUAD: PMA_CTRL1_LANE2 bit 8	GTH_QUAD: DRP[166] bit 9 GTH_QUAD: PMA_CTRL1_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 6 GTH_QUAD: PMA_CTRL1_LANE2 bit 6	GTH_QUAD: DRP[166] bit 7 GTH_QUAD: PMA_CTRL1_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 4 GTH_QUAD: PMA_CTRL1_LANE2 bit 4	GTH_QUAD: DRP[166] bit 5 GTH_QUAD: PMA_CTRL1_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 2 GTH_QUAD: PMA_CTRL1_LANE2 bit 2	GTH_QUAD: DRP[166] bit 3 GTH_QUAD: PMA_CTRL1_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[166] bit 0 GTH_QUAD: PMA_CTRL1_LANE2 bit 0	GTH_QUAD: DRP[166] bit 1 GTH_QUAD: PMA_CTRL1_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 14 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 14	GTH_QUAD: DRP[165] bit 15 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 12 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 12	GTH_QUAD: DRP[165] bit 13 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 10 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 10	GTH_QUAD: DRP[165] bit 11 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 8 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 8	GTH_QUAD: DRP[165] bit 9 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 6 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 6	GTH_QUAD: DRP[165] bit 7 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 4 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 4	GTH_QUAD: DRP[165] bit 5 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 2 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 2	GTH_QUAD: DRP[165] bit 3 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[165] bit 0 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 0	GTH_QUAD: DRP[165] bit 1 GTH_QUAD: E10GBASER_PCS_CFG_LANE1 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 14 GTH_QUAD: PCS_TYPE_LANE1 bit 14	GTH_QUAD: DRP[164] bit 15 GTH_QUAD: PCS_TYPE_LANE1 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 12 GTH_QUAD: PCS_TYPE_LANE1 bit 12	GTH_QUAD: DRP[164] bit 13 GTH_QUAD: PCS_TYPE_LANE1 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 10 GTH_QUAD: PCS_TYPE_LANE1 bit 10	GTH_QUAD: DRP[164] bit 11 GTH_QUAD: PCS_TYPE_LANE1 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 8 GTH_QUAD: PCS_TYPE_LANE1 bit 8	GTH_QUAD: DRP[164] bit 9 GTH_QUAD: PCS_TYPE_LANE1 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 6 GTH_QUAD: PCS_TYPE_LANE1 bit 6	GTH_QUAD: DRP[164] bit 7 GTH_QUAD: PCS_TYPE_LANE1 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 4 GTH_QUAD: PCS_TYPE_LANE1 bit 4	GTH_QUAD: DRP[164] bit 5 GTH_QUAD: PCS_TYPE_LANE1 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 2 GTH_QUAD: PCS_TYPE_LANE1 bit 2	GTH_QUAD: DRP[164] bit 3 GTH_QUAD: PCS_TYPE_LANE1 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[164] bit 0 GTH_QUAD: PCS_TYPE_LANE1 bit 0	GTH_QUAD: DRP[164] bit 1 GTH_QUAD: PCS_TYPE_LANE1 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 14 GTH_QUAD: PCS_ABILITY_LANE1 bit 14	GTH_QUAD: DRP[163] bit 15 GTH_QUAD: PCS_ABILITY_LANE1 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 12 GTH_QUAD: PCS_ABILITY_LANE1 bit 12	GTH_QUAD: DRP[163] bit 13 GTH_QUAD: PCS_ABILITY_LANE1 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 10 GTH_QUAD: PCS_ABILITY_LANE1 bit 10	GTH_QUAD: DRP[163] bit 11 GTH_QUAD: PCS_ABILITY_LANE1 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 8 GTH_QUAD: PCS_ABILITY_LANE1 bit 8	GTH_QUAD: DRP[163] bit 9 GTH_QUAD: PCS_ABILITY_LANE1 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 6 GTH_QUAD: PCS_ABILITY_LANE1 bit 6	GTH_QUAD: DRP[163] bit 7 GTH_QUAD: PCS_ABILITY_LANE1 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 4 GTH_QUAD: PCS_ABILITY_LANE1 bit 4	GTH_QUAD: DRP[163] bit 5 GTH_QUAD: PCS_ABILITY_LANE1 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 2 GTH_QUAD: PCS_ABILITY_LANE1 bit 2	GTH_QUAD: DRP[163] bit 3 GTH_QUAD: PCS_ABILITY_LANE1 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[163] bit 0 GTH_QUAD: PCS_ABILITY_LANE1 bit 0	GTH_QUAD: DRP[163] bit 1 GTH_QUAD: PCS_ABILITY_LANE1 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 14 GTH_QUAD: PCS_RESET_1_LANE1 bit 14	GTH_QUAD: DRP[162] bit 15 GTH_QUAD: PCS_RESET_1_LANE1 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 12 GTH_QUAD: PCS_RESET_1_LANE1 bit 12	GTH_QUAD: DRP[162] bit 13 GTH_QUAD: PCS_RESET_1_LANE1 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 10 GTH_QUAD: PCS_RESET_1_LANE1 bit 10	GTH_QUAD: DRP[162] bit 11 GTH_QUAD: PCS_RESET_1_LANE1 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 8 GTH_QUAD: PCS_RESET_1_LANE1 bit 8	GTH_QUAD: DRP[162] bit 9 GTH_QUAD: PCS_RESET_1_LANE1 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 6 GTH_QUAD: PCS_RESET_1_LANE1 bit 6	GTH_QUAD: DRP[162] bit 7 GTH_QUAD: PCS_RESET_1_LANE1 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 4 GTH_QUAD: PCS_RESET_1_LANE1 bit 4	GTH_QUAD: DRP[162] bit 5 GTH_QUAD: PCS_RESET_1_LANE1 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 2 GTH_QUAD: PCS_RESET_1_LANE1 bit 2	GTH_QUAD: DRP[162] bit 3 GTH_QUAD: PCS_RESET_1_LANE1 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[162] bit 0 GTH_QUAD: PCS_RESET_1_LANE1 bit 0	GTH_QUAD: DRP[162] bit 1 GTH_QUAD: PCS_RESET_1_LANE1 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 14 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 14	GTH_QUAD: DRP[161] bit 15 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 12 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 12	GTH_QUAD: DRP[161] bit 13 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 10 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 10	GTH_QUAD: DRP[161] bit 11 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 8 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 8	GTH_QUAD: DRP[161] bit 9 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 6 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 6	GTH_QUAD: DRP[161] bit 7 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 4 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 4	GTH_QUAD: DRP[161] bit 5 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 2 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 2	GTH_QUAD: DRP[161] bit 3 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[161] bit 0 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 0	GTH_QUAD: DRP[161] bit 1 GTH_QUAD: PCS_MISC_CFG_1_LANE1 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 14 GTH_QUAD: PRBS_CFG_LANE1 bit 14	GTH_QUAD: DRP[160] bit 15 GTH_QUAD: PRBS_CFG_LANE1 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 12 GTH_QUAD: PRBS_CFG_LANE1 bit 12	GTH_QUAD: DRP[160] bit 13 GTH_QUAD: PRBS_CFG_LANE1 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 10 GTH_QUAD: PRBS_CFG_LANE1 bit 10	GTH_QUAD: DRP[160] bit 11 GTH_QUAD: PRBS_CFG_LANE1 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 8 GTH_QUAD: PRBS_CFG_LANE1 bit 8	GTH_QUAD: DRP[160] bit 9 GTH_QUAD: PRBS_CFG_LANE1 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 6 GTH_QUAD: PRBS_CFG_LANE1 bit 6	GTH_QUAD: DRP[160] bit 7 GTH_QUAD: PRBS_CFG_LANE1 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 4 GTH_QUAD: PRBS_CFG_LANE1 bit 4	GTH_QUAD: DRP[160] bit 5 GTH_QUAD: PRBS_CFG_LANE1 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 2 GTH_QUAD: PRBS_CFG_LANE1 bit 2	GTH_QUAD: DRP[160] bit 3 GTH_QUAD: PRBS_CFG_LANE1 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[160] bit 0 GTH_QUAD: PRBS_CFG_LANE1 bit 0	GTH_QUAD: DRP[160] bit 1 GTH_QUAD: PRBS_CFG_LANE1 bit 1

virtex6 GTH rect MAIN[21]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 14 GTH_QUAD: RX_CFG2_LANE2 bit 14	GTH_QUAD: DRP[175] bit 15 GTH_QUAD: RX_CFG2_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 12 GTH_QUAD: RX_CFG2_LANE2 bit 12	GTH_QUAD: DRP[175] bit 13 GTH_QUAD: RX_CFG2_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 10 GTH_QUAD: RX_CFG2_LANE2 bit 10	GTH_QUAD: DRP[175] bit 11 GTH_QUAD: RX_CFG2_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 8 GTH_QUAD: RX_CFG2_LANE2 bit 8	GTH_QUAD: DRP[175] bit 9 GTH_QUAD: RX_CFG2_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 6 GTH_QUAD: RX_CFG2_LANE2 bit 6	GTH_QUAD: DRP[175] bit 7 GTH_QUAD: RX_CFG2_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 4 GTH_QUAD: RX_CFG2_LANE2 bit 4	GTH_QUAD: DRP[175] bit 5 GTH_QUAD: RX_CFG2_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 2 GTH_QUAD: RX_CFG2_LANE2 bit 2	GTH_QUAD: DRP[175] bit 3 GTH_QUAD: RX_CFG2_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[175] bit 0 GTH_QUAD: RX_CFG2_LANE2 bit 0	GTH_QUAD: DRP[175] bit 1 GTH_QUAD: RX_CFG2_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 14 GTH_QUAD: RX_CFG1_LANE2 bit 14	GTH_QUAD: DRP[174] bit 15 GTH_QUAD: RX_CFG1_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 12 GTH_QUAD: RX_CFG1_LANE2 bit 12	GTH_QUAD: DRP[174] bit 13 GTH_QUAD: RX_CFG1_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 10 GTH_QUAD: RX_CFG1_LANE2 bit 10	GTH_QUAD: DRP[174] bit 11 GTH_QUAD: RX_CFG1_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 8 GTH_QUAD: RX_CFG1_LANE2 bit 8	GTH_QUAD: DRP[174] bit 9 GTH_QUAD: RX_CFG1_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 6 GTH_QUAD: RX_CFG1_LANE2 bit 6	GTH_QUAD: DRP[174] bit 7 GTH_QUAD: RX_CFG1_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 4 GTH_QUAD: RX_CFG1_LANE2 bit 4	GTH_QUAD: DRP[174] bit 5 GTH_QUAD: RX_CFG1_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 2 GTH_QUAD: RX_CFG1_LANE2 bit 2	GTH_QUAD: DRP[174] bit 3 GTH_QUAD: RX_CFG1_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[174] bit 0 GTH_QUAD: RX_CFG1_LANE2 bit 0	GTH_QUAD: DRP[174] bit 1 GTH_QUAD: RX_CFG1_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 14 GTH_QUAD: RX_CFG0_LANE2 bit 14	GTH_QUAD: DRP[173] bit 15 GTH_QUAD: RX_CFG0_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 12 GTH_QUAD: RX_CFG0_LANE2 bit 12	GTH_QUAD: DRP[173] bit 13 GTH_QUAD: RX_CFG0_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 10 GTH_QUAD: RX_CFG0_LANE2 bit 10	GTH_QUAD: DRP[173] bit 11 GTH_QUAD: RX_CFG0_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 8 GTH_QUAD: RX_CFG0_LANE2 bit 8	GTH_QUAD: DRP[173] bit 9 GTH_QUAD: RX_CFG0_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 6 GTH_QUAD: RX_CFG0_LANE2 bit 6	GTH_QUAD: DRP[173] bit 7 GTH_QUAD: RX_CFG0_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 4 GTH_QUAD: RX_CFG0_LANE2 bit 4	GTH_QUAD: DRP[173] bit 5 GTH_QUAD: RX_CFG0_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 2 GTH_QUAD: RX_CFG0_LANE2 bit 2	GTH_QUAD: DRP[173] bit 3 GTH_QUAD: RX_CFG0_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[173] bit 0 GTH_QUAD: RX_CFG0_LANE2 bit 0	GTH_QUAD: DRP[173] bit 1 GTH_QUAD: RX_CFG0_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 14 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 14	GTH_QUAD: DRP[172] bit 15 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 12 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 12	GTH_QUAD: DRP[172] bit 13 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 10 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 10	GTH_QUAD: DRP[172] bit 11 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 8 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 8	GTH_QUAD: DRP[172] bit 9 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 6 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 6	GTH_QUAD: DRP[172] bit 7 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 4 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 4	GTH_QUAD: DRP[172] bit 5 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 2 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 2	GTH_QUAD: DRP[172] bit 3 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[172] bit 0 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 0	GTH_QUAD: DRP[172] bit 1 GTH_QUAD: E10GBASEKX_CTRL_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 14 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 14	GTH_QUAD: DRP[171] bit 15 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 12 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 12	GTH_QUAD: DRP[171] bit 13 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 10 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 10	GTH_QUAD: DRP[171] bit 11 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 8 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 8	GTH_QUAD: DRP[171] bit 9 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 6 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 6	GTH_QUAD: DRP[171] bit 7 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 4 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 4	GTH_QUAD: DRP[171] bit 5 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 2 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 2	GTH_QUAD: DRP[171] bit 3 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[171] bit 0 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 0	GTH_QUAD: DRP[171] bit 1 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 14 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 14	GTH_QUAD: DRP[170] bit 15 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 12 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 12	GTH_QUAD: DRP[170] bit 13 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 10 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 10	GTH_QUAD: DRP[170] bit 11 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 8 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 8	GTH_QUAD: DRP[170] bit 9 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 6 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 6	GTH_QUAD: DRP[170] bit 7 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 4 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 4	GTH_QUAD: DRP[170] bit 5 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 2 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 2	GTH_QUAD: DRP[170] bit 3 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[170] bit 0 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 0	GTH_QUAD: DRP[170] bit 1 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 14 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 14	GTH_QUAD: DRP[169] bit 15 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 12 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 12	GTH_QUAD: DRP[169] bit 13 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 10 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 10	GTH_QUAD: DRP[169] bit 11 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 8 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 8	GTH_QUAD: DRP[169] bit 9 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 6 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 6	GTH_QUAD: DRP[169] bit 7 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 4 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 4	GTH_QUAD: DRP[169] bit 5 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 2 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 2	GTH_QUAD: DRP[169] bit 3 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[169] bit 0 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 0	GTH_QUAD: DRP[169] bit 1 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 14 GTH_QUAD: TX_DISABLE_LANE2 bit 14	GTH_QUAD: DRP[168] bit 15 GTH_QUAD: TX_DISABLE_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 12 GTH_QUAD: TX_DISABLE_LANE2 bit 12	GTH_QUAD: DRP[168] bit 13 GTH_QUAD: TX_DISABLE_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 10 GTH_QUAD: TX_DISABLE_LANE2 bit 10	GTH_QUAD: DRP[168] bit 11 GTH_QUAD: TX_DISABLE_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 8 GTH_QUAD: TX_DISABLE_LANE2 bit 8	GTH_QUAD: DRP[168] bit 9 GTH_QUAD: TX_DISABLE_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 6 GTH_QUAD: TX_DISABLE_LANE2 bit 6	GTH_QUAD: DRP[168] bit 7 GTH_QUAD: TX_DISABLE_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 4 GTH_QUAD: TX_DISABLE_LANE2 bit 4	GTH_QUAD: DRP[168] bit 5 GTH_QUAD: TX_DISABLE_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 2 GTH_QUAD: TX_DISABLE_LANE2 bit 2	GTH_QUAD: DRP[168] bit 3 GTH_QUAD: TX_DISABLE_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[168] bit 0 GTH_QUAD: TX_DISABLE_LANE2 bit 0	GTH_QUAD: DRP[168] bit 1 GTH_QUAD: TX_DISABLE_LANE2 bit 1

virtex6 GTH rect MAIN[22]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 14 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 14	GTH_QUAD: DRP[183] bit 15 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 12 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 12	GTH_QUAD: DRP[183] bit 13 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 10 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 10	GTH_QUAD: DRP[183] bit 11 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 8 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 8	GTH_QUAD: DRP[183] bit 9 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 6 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 6	GTH_QUAD: DRP[183] bit 7 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 4 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 4	GTH_QUAD: DRP[183] bit 5 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 2 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 2	GTH_QUAD: DRP[183] bit 3 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[183] bit 0 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 0	GTH_QUAD: DRP[183] bit 1 GTH_QUAD: RX_AEQ_VAL0_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 14 GTH_QUAD: RX_MVAL1_LANE2 bit 14	GTH_QUAD: DRP[182] bit 15 GTH_QUAD: RX_MVAL1_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 12 GTH_QUAD: RX_MVAL1_LANE2 bit 12	GTH_QUAD: DRP[182] bit 13 GTH_QUAD: RX_MVAL1_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 10 GTH_QUAD: RX_MVAL1_LANE2 bit 10	GTH_QUAD: DRP[182] bit 11 GTH_QUAD: RX_MVAL1_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 8 GTH_QUAD: RX_MVAL1_LANE2 bit 8	GTH_QUAD: DRP[182] bit 9 GTH_QUAD: RX_MVAL1_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 6 GTH_QUAD: RX_MVAL1_LANE2 bit 6	GTH_QUAD: DRP[182] bit 7 GTH_QUAD: RX_MVAL1_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 4 GTH_QUAD: RX_MVAL1_LANE2 bit 4	GTH_QUAD: DRP[182] bit 5 GTH_QUAD: RX_MVAL1_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 2 GTH_QUAD: RX_MVAL1_LANE2 bit 2	GTH_QUAD: DRP[182] bit 3 GTH_QUAD: RX_MVAL1_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[182] bit 0 GTH_QUAD: RX_MVAL1_LANE2 bit 0	GTH_QUAD: DRP[182] bit 1 GTH_QUAD: RX_MVAL1_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 14 GTH_QUAD: RX_MVAL0_LANE2 bit 14	GTH_QUAD: DRP[181] bit 15 GTH_QUAD: RX_MVAL0_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 12 GTH_QUAD: RX_MVAL0_LANE2 bit 12	GTH_QUAD: DRP[181] bit 13 GTH_QUAD: RX_MVAL0_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 10 GTH_QUAD: RX_MVAL0_LANE2 bit 10	GTH_QUAD: DRP[181] bit 11 GTH_QUAD: RX_MVAL0_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 8 GTH_QUAD: RX_MVAL0_LANE2 bit 8	GTH_QUAD: DRP[181] bit 9 GTH_QUAD: RX_MVAL0_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 6 GTH_QUAD: RX_MVAL0_LANE2 bit 6	GTH_QUAD: DRP[181] bit 7 GTH_QUAD: RX_MVAL0_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 4 GTH_QUAD: RX_MVAL0_LANE2 bit 4	GTH_QUAD: DRP[181] bit 5 GTH_QUAD: RX_MVAL0_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 2 GTH_QUAD: RX_MVAL0_LANE2 bit 2	GTH_QUAD: DRP[181] bit 3 GTH_QUAD: RX_MVAL0_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[181] bit 0 GTH_QUAD: RX_MVAL0_LANE2 bit 0	GTH_QUAD: DRP[181] bit 1 GTH_QUAD: RX_MVAL0_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 14 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 14	GTH_QUAD: DRP[180] bit 15 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 12 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 12	GTH_QUAD: DRP[180] bit 13 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 10 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 10	GTH_QUAD: DRP[180] bit 11 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 8 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 8	GTH_QUAD: DRP[180] bit 9 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 6 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 6	GTH_QUAD: DRP[180] bit 7 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 4 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 4	GTH_QUAD: DRP[180] bit 5 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 2 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 2	GTH_QUAD: DRP[180] bit 3 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[180] bit 0 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 0	GTH_QUAD: DRP[180] bit 1 GTH_QUAD: RX_CDR_CTRL2_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 14 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 14	GTH_QUAD: DRP[179] bit 15 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 12 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 12	GTH_QUAD: DRP[179] bit 13 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 10 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 10	GTH_QUAD: DRP[179] bit 11 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 8 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 8	GTH_QUAD: DRP[179] bit 9 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 6 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 6	GTH_QUAD: DRP[179] bit 7 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 4 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 4	GTH_QUAD: DRP[179] bit 5 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 2 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 2	GTH_QUAD: DRP[179] bit 3 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[179] bit 0 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 0	GTH_QUAD: DRP[179] bit 1 GTH_QUAD: RX_CDR_CTRL1_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 14 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 14	GTH_QUAD: DRP[178] bit 15 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 12 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 12	GTH_QUAD: DRP[178] bit 13 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 10 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 10	GTH_QUAD: DRP[178] bit 11 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 8 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 8	GTH_QUAD: DRP[178] bit 9 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 6 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 6	GTH_QUAD: DRP[178] bit 7 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 4 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 4	GTH_QUAD: DRP[178] bit 5 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 2 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 2	GTH_QUAD: DRP[178] bit 3 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[178] bit 0 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 0	GTH_QUAD: DRP[178] bit 1 GTH_QUAD: RX_CDR_CTRL0_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 14 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 14	GTH_QUAD: DRP[177] bit 15 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 12 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 12	GTH_QUAD: DRP[177] bit 13 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 10 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 10	GTH_QUAD: DRP[177] bit 11 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 8 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 8	GTH_QUAD: DRP[177] bit 9 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 6 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 6	GTH_QUAD: DRP[177] bit 7 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 4 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 4	GTH_QUAD: DRP[177] bit 5 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 2 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 2	GTH_QUAD: DRP[177] bit 3 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[177] bit 0 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 0	GTH_QUAD: DRP[177] bit 1 GTH_QUAD: RX_LOOP_CTRL_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 14 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 14	GTH_QUAD: DRP[176] bit 15 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 12 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 12	GTH_QUAD: DRP[176] bit 13 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 10 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 10	GTH_QUAD: DRP[176] bit 11 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 8 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 8	GTH_QUAD: DRP[176] bit 9 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 6 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 6	GTH_QUAD: DRP[176] bit 7 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 4 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 4	GTH_QUAD: DRP[176] bit 5 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 2 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 2	GTH_QUAD: DRP[176] bit 3 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[176] bit 0 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 0	GTH_QUAD: DRP[176] bit 1 GTH_QUAD: RX_AGC_CTRL_LANE2 bit 1

virtex6 GTH rect MAIN[23]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 14 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 14	GTH_QUAD: DRP[191] bit 15 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 12 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 12	GTH_QUAD: DRP[191] bit 13 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 10 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 10	GTH_QUAD: DRP[191] bit 11 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 8 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 8	GTH_QUAD: DRP[191] bit 9 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 6 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 6	GTH_QUAD: DRP[191] bit 7 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 4 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 4	GTH_QUAD: DRP[191] bit 5 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 2 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 2	GTH_QUAD: DRP[191] bit 3 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[191] bit 0 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 0	GTH_QUAD: DRP[191] bit 1 GTH_QUAD: TX_CLK_SEL1_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 14 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 14	GTH_QUAD: DRP[190] bit 15 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 12 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 12	GTH_QUAD: DRP[190] bit 13 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 10 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 10	GTH_QUAD: DRP[190] bit 11 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 8 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 8	GTH_QUAD: DRP[190] bit 9 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 6 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 6	GTH_QUAD: DRP[190] bit 7 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 4 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 4	GTH_QUAD: DRP[190] bit 5 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 2 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 2	GTH_QUAD: DRP[190] bit 3 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[190] bit 0 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 0	GTH_QUAD: DRP[190] bit 1 GTH_QUAD: TX_CLK_SEL0_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 14 GTH_QUAD: TX_PREEMPH_LANE2 bit 14	GTH_QUAD: DRP[189] bit 15 GTH_QUAD: TX_PREEMPH_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 12 GTH_QUAD: TX_PREEMPH_LANE2 bit 12	GTH_QUAD: DRP[189] bit 13 GTH_QUAD: TX_PREEMPH_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 10 GTH_QUAD: TX_PREEMPH_LANE2 bit 10	GTH_QUAD: DRP[189] bit 11 GTH_QUAD: TX_PREEMPH_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 8 GTH_QUAD: TX_PREEMPH_LANE2 bit 8	GTH_QUAD: DRP[189] bit 9 GTH_QUAD: TX_PREEMPH_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 6 GTH_QUAD: TX_PREEMPH_LANE2 bit 6	GTH_QUAD: DRP[189] bit 7 GTH_QUAD: TX_PREEMPH_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 4 GTH_QUAD: TX_PREEMPH_LANE2 bit 4	GTH_QUAD: DRP[189] bit 5 GTH_QUAD: TX_PREEMPH_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 2 GTH_QUAD: TX_PREEMPH_LANE2 bit 2	GTH_QUAD: DRP[189] bit 3 GTH_QUAD: TX_PREEMPH_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[189] bit 0 GTH_QUAD: TX_PREEMPH_LANE2 bit 0	GTH_QUAD: DRP[189] bit 1 GTH_QUAD: TX_PREEMPH_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 14 GTH_QUAD: TX_CFG2_LANE2 bit 14	GTH_QUAD: DRP[188] bit 15 GTH_QUAD: TX_CFG2_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 12 GTH_QUAD: TX_CFG2_LANE2 bit 12	GTH_QUAD: DRP[188] bit 13 GTH_QUAD: TX_CFG2_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 10 GTH_QUAD: TX_CFG2_LANE2 bit 10	GTH_QUAD: DRP[188] bit 11 GTH_QUAD: TX_CFG2_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 8 GTH_QUAD: TX_CFG2_LANE2 bit 8	GTH_QUAD: DRP[188] bit 9 GTH_QUAD: TX_CFG2_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 6 GTH_QUAD: TX_CFG2_LANE2 bit 6	GTH_QUAD: DRP[188] bit 7 GTH_QUAD: TX_CFG2_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 4 GTH_QUAD: TX_CFG2_LANE2 bit 4	GTH_QUAD: DRP[188] bit 5 GTH_QUAD: TX_CFG2_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 2 GTH_QUAD: TX_CFG2_LANE2 bit 2	GTH_QUAD: DRP[188] bit 3 GTH_QUAD: TX_CFG2_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[188] bit 0 GTH_QUAD: TX_CFG2_LANE2 bit 0	GTH_QUAD: DRP[188] bit 1 GTH_QUAD: TX_CFG2_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 14 GTH_QUAD: TX_CFG1_LANE2 bit 14	GTH_QUAD: DRP[187] bit 15 GTH_QUAD: TX_CFG1_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 12 GTH_QUAD: TX_CFG1_LANE2 bit 12	GTH_QUAD: DRP[187] bit 13 GTH_QUAD: TX_CFG1_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 10 GTH_QUAD: TX_CFG1_LANE2 bit 10	GTH_QUAD: DRP[187] bit 11 GTH_QUAD: TX_CFG1_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 8 GTH_QUAD: TX_CFG1_LANE2 bit 8	GTH_QUAD: DRP[187] bit 9 GTH_QUAD: TX_CFG1_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 6 GTH_QUAD: TX_CFG1_LANE2 bit 6	GTH_QUAD: DRP[187] bit 7 GTH_QUAD: TX_CFG1_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 4 GTH_QUAD: TX_CFG1_LANE2 bit 4	GTH_QUAD: DRP[187] bit 5 GTH_QUAD: TX_CFG1_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 2 GTH_QUAD: TX_CFG1_LANE2 bit 2	GTH_QUAD: DRP[187] bit 3 GTH_QUAD: TX_CFG1_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[187] bit 0 GTH_QUAD: TX_CFG1_LANE2 bit 0	GTH_QUAD: DRP[187] bit 1 GTH_QUAD: TX_CFG1_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 14 GTH_QUAD: TX_CFG0_LANE2 bit 14	GTH_QUAD: DRP[186] bit 15 GTH_QUAD: TX_CFG0_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 12 GTH_QUAD: TX_CFG0_LANE2 bit 12	GTH_QUAD: DRP[186] bit 13 GTH_QUAD: TX_CFG0_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 10 GTH_QUAD: TX_CFG0_LANE2 bit 10	GTH_QUAD: DRP[186] bit 11 GTH_QUAD: TX_CFG0_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 8 GTH_QUAD: TX_CFG0_LANE2 bit 8	GTH_QUAD: DRP[186] bit 9 GTH_QUAD: TX_CFG0_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 6 GTH_QUAD: TX_CFG0_LANE2 bit 6	GTH_QUAD: DRP[186] bit 7 GTH_QUAD: TX_CFG0_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 4 GTH_QUAD: TX_CFG0_LANE2 bit 4	GTH_QUAD: DRP[186] bit 5 GTH_QUAD: TX_CFG0_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 2 GTH_QUAD: TX_CFG0_LANE2 bit 2	GTH_QUAD: DRP[186] bit 3 GTH_QUAD: TX_CFG0_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[186] bit 0 GTH_QUAD: TX_CFG0_LANE2 bit 0	GTH_QUAD: DRP[186] bit 1 GTH_QUAD: TX_CFG0_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 14 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 14	GTH_QUAD: DRP[185] bit 15 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 12 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 12	GTH_QUAD: DRP[185] bit 13 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 10 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 10	GTH_QUAD: DRP[185] bit 11 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 8 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 8	GTH_QUAD: DRP[185] bit 9 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 6 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 6	GTH_QUAD: DRP[185] bit 7 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 4 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 4	GTH_QUAD: DRP[185] bit 5 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 2 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 2	GTH_QUAD: DRP[185] bit 3 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[185] bit 0 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 0	GTH_QUAD: DRP[185] bit 1 GTH_QUAD: RX_CTLE_CTRL_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 14 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 14	GTH_QUAD: DRP[184] bit 15 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 12 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 12	GTH_QUAD: DRP[184] bit 13 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 10 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 10	GTH_QUAD: DRP[184] bit 11 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 8 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 8	GTH_QUAD: DRP[184] bit 9 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 6 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 6	GTH_QUAD: DRP[184] bit 7 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 4 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 4	GTH_QUAD: DRP[184] bit 5 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 2 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 2	GTH_QUAD: DRP[184] bit 3 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[184] bit 0 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 0	GTH_QUAD: DRP[184] bit 1 GTH_QUAD: RX_AEQ_VAL1_LANE2 bit 1

virtex6 GTH rect MAIN[24]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 14 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 14	GTH_QUAD: DRP[199] bit 15 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 12 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 12	GTH_QUAD: DRP[199] bit 13 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 10 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 10	GTH_QUAD: DRP[199] bit 11 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 8 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 8	GTH_QUAD: DRP[199] bit 9 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 6 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 6	GTH_QUAD: DRP[199] bit 7 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 4 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 4	GTH_QUAD: DRP[199] bit 5 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 2 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 2	GTH_QUAD: DRP[199] bit 3 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[199] bit 0 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 0	GTH_QUAD: DRP[199] bit 1 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 14 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 14	GTH_QUAD: DRP[198] bit 15 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 12 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 12	GTH_QUAD: DRP[198] bit 13 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 10 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 10	GTH_QUAD: DRP[198] bit 11 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 8 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 8	GTH_QUAD: DRP[198] bit 9 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 6 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 6	GTH_QUAD: DRP[198] bit 7 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 4 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 4	GTH_QUAD: DRP[198] bit 5 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 2 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 2	GTH_QUAD: DRP[198] bit 3 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[198] bit 0 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 0	GTH_QUAD: DRP[198] bit 1 GTH_QUAD: LNK_TRN_CFG_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 14 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 14	GTH_QUAD: DRP[197] bit 15 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 12 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 12	GTH_QUAD: DRP[197] bit 13 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 10 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 10	GTH_QUAD: DRP[197] bit 11 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 8 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 8	GTH_QUAD: DRP[197] bit 9 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 6 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 6	GTH_QUAD: DRP[197] bit 7 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 4 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 4	GTH_QUAD: DRP[197] bit 5 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 2 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 2	GTH_QUAD: DRP[197] bit 3 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[197] bit 0 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 0	GTH_QUAD: DRP[197] bit 1 GTH_QUAD: RX_CTRL_OVRD_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 14 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 14	GTH_QUAD: DRP[196] bit 15 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 12 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 12	GTH_QUAD: DRP[196] bit 13 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 10 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 10	GTH_QUAD: DRP[196] bit 11 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 8 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 8	GTH_QUAD: DRP[196] bit 9 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 6 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 6	GTH_QUAD: DRP[196] bit 7 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 4 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 4	GTH_QUAD: DRP[196] bit 5 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 2 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 2	GTH_QUAD: DRP[196] bit 3 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[196] bit 0 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 0	GTH_QUAD: DRP[196] bit 1 GTH_QUAD: TX_PWR_RATE_OVRD_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 14 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 14	GTH_QUAD: DRP[195] bit 15 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 12 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 12	GTH_QUAD: DRP[195] bit 13 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 10 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 10	GTH_QUAD: DRP[195] bit 11 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 8 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 8	GTH_QUAD: DRP[195] bit 9 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 6 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 6	GTH_QUAD: DRP[195] bit 7 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 4 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 4	GTH_QUAD: DRP[195] bit 5 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 2 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 2	GTH_QUAD: DRP[195] bit 3 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[195] bit 0 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 0	GTH_QUAD: DRP[195] bit 1 GTH_QUAD: LANE_PWR_CTRL_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 14 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 14	GTH_QUAD: DRP[194] bit 15 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 12 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 12	GTH_QUAD: DRP[194] bit 13 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 10 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 10	GTH_QUAD: DRP[194] bit 11 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 8 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 8	GTH_QUAD: DRP[194] bit 9 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 6 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 6	GTH_QUAD: DRP[194] bit 7 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 4 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 4	GTH_QUAD: DRP[194] bit 5 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 2 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 2	GTH_QUAD: DRP[194] bit 3 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[194] bit 0 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 0	GTH_QUAD: DRP[194] bit 1 GTH_QUAD: DFE_TRAIN_CTRL_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 14 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 14	GTH_QUAD: DRP[193] bit 15 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 12 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 12	GTH_QUAD: DRP[193] bit 13 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 10 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 10	GTH_QUAD: DRP[193] bit 11 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 8 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 8	GTH_QUAD: DRP[193] bit 9 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 6 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 6	GTH_QUAD: DRP[193] bit 7 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 4 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 4	GTH_QUAD: DRP[193] bit 5 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 2 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 2	GTH_QUAD: DRP[193] bit 3 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[193] bit 0 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 0	GTH_QUAD: DRP[193] bit 1 GTH_QUAD: PMA_LPBK_CTRL_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 14 GTH_QUAD: TERM_CTRL_LANE2 bit 14	GTH_QUAD: DRP[192] bit 15 GTH_QUAD: TERM_CTRL_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 12 GTH_QUAD: TERM_CTRL_LANE2 bit 12	GTH_QUAD: DRP[192] bit 13 GTH_QUAD: TERM_CTRL_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 10 GTH_QUAD: TERM_CTRL_LANE2 bit 10	GTH_QUAD: DRP[192] bit 11 GTH_QUAD: TERM_CTRL_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 8 GTH_QUAD: TERM_CTRL_LANE2 bit 8	GTH_QUAD: DRP[192] bit 9 GTH_QUAD: TERM_CTRL_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 6 GTH_QUAD: TERM_CTRL_LANE2 bit 6	GTH_QUAD: DRP[192] bit 7 GTH_QUAD: TERM_CTRL_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 4 GTH_QUAD: TERM_CTRL_LANE2 bit 4	GTH_QUAD: DRP[192] bit 5 GTH_QUAD: TERM_CTRL_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 2 GTH_QUAD: TERM_CTRL_LANE2 bit 2	GTH_QUAD: DRP[192] bit 3 GTH_QUAD: TERM_CTRL_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[192] bit 0 GTH_QUAD: TERM_CTRL_LANE2 bit 0	GTH_QUAD: DRP[192] bit 1 GTH_QUAD: TERM_CTRL_LANE2 bit 1

virtex6 GTH rect MAIN[25]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 14	GTH_QUAD: DRP[207] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 12	GTH_QUAD: DRP[207] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 10	GTH_QUAD: DRP[207] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 8	GTH_QUAD: DRP[207] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 6	GTH_QUAD: DRP[207] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 4	GTH_QUAD: DRP[207] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 2	GTH_QUAD: DRP[207] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[207] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 0	GTH_QUAD: DRP[207] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 14	GTH_QUAD: DRP[206] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 12	GTH_QUAD: DRP[206] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 10	GTH_QUAD: DRP[206] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 8	GTH_QUAD: DRP[206] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 6	GTH_QUAD: DRP[206] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 4	GTH_QUAD: DRP[206] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 2	GTH_QUAD: DRP[206] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[206] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 0	GTH_QUAD: DRP[206] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 14	GTH_QUAD: DRP[205] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 12	GTH_QUAD: DRP[205] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 10	GTH_QUAD: DRP[205] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 8	GTH_QUAD: DRP[205] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 6	GTH_QUAD: DRP[205] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 4	GTH_QUAD: DRP[205] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 2	GTH_QUAD: DRP[205] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[205] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 0	GTH_QUAD: DRP[205] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 14	GTH_QUAD: DRP[204] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 12	GTH_QUAD: DRP[204] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 10	GTH_QUAD: DRP[204] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 8	GTH_QUAD: DRP[204] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 6	GTH_QUAD: DRP[204] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 4	GTH_QUAD: DRP[204] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 2	GTH_QUAD: DRP[204] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[204] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 0	GTH_QUAD: DRP[204] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 14	GTH_QUAD: DRP[203] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 12	GTH_QUAD: DRP[203] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 10	GTH_QUAD: DRP[203] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 8	GTH_QUAD: DRP[203] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 6	GTH_QUAD: DRP[203] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 4	GTH_QUAD: DRP[203] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 2	GTH_QUAD: DRP[203] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[203] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 0	GTH_QUAD: DRP[203] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 14 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 14	GTH_QUAD: DRP[202] bit 15 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 12 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 12	GTH_QUAD: DRP[202] bit 13 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 10 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 10	GTH_QUAD: DRP[202] bit 11 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 8 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 8	GTH_QUAD: DRP[202] bit 9 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 6 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 6	GTH_QUAD: DRP[202] bit 7 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 4 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 4	GTH_QUAD: DRP[202] bit 5 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 2 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 2	GTH_QUAD: DRP[202] bit 3 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[202] bit 0 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 0	GTH_QUAD: DRP[202] bit 1 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 14 GTH_QUAD: PCS_CTRL2_LANE2 bit 14	GTH_QUAD: DRP[201] bit 15 GTH_QUAD: PCS_CTRL2_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 12 GTH_QUAD: PCS_CTRL2_LANE2 bit 12	GTH_QUAD: DRP[201] bit 13 GTH_QUAD: PCS_CTRL2_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 10 GTH_QUAD: PCS_CTRL2_LANE2 bit 10	GTH_QUAD: DRP[201] bit 11 GTH_QUAD: PCS_CTRL2_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 8 GTH_QUAD: PCS_CTRL2_LANE2 bit 8	GTH_QUAD: DRP[201] bit 9 GTH_QUAD: PCS_CTRL2_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 6 GTH_QUAD: PCS_CTRL2_LANE2 bit 6	GTH_QUAD: DRP[201] bit 7 GTH_QUAD: PCS_CTRL2_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 4 GTH_QUAD: PCS_CTRL2_LANE2 bit 4	GTH_QUAD: DRP[201] bit 5 GTH_QUAD: PCS_CTRL2_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 2 GTH_QUAD: PCS_CTRL2_LANE2 bit 2	GTH_QUAD: DRP[201] bit 3 GTH_QUAD: PCS_CTRL2_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[201] bit 0 GTH_QUAD: PCS_CTRL2_LANE2 bit 0	GTH_QUAD: DRP[201] bit 1 GTH_QUAD: PCS_CTRL2_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 14 GTH_QUAD: PCS_CTRL1_LANE2 bit 14	GTH_QUAD: DRP[200] bit 15 GTH_QUAD: PCS_CTRL1_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 12 GTH_QUAD: PCS_CTRL1_LANE2 bit 12	GTH_QUAD: DRP[200] bit 13 GTH_QUAD: PCS_CTRL1_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 10 GTH_QUAD: PCS_CTRL1_LANE2 bit 10	GTH_QUAD: DRP[200] bit 11 GTH_QUAD: PCS_CTRL1_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 8 GTH_QUAD: PCS_CTRL1_LANE2 bit 8	GTH_QUAD: DRP[200] bit 9 GTH_QUAD: PCS_CTRL1_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 6 GTH_QUAD: PCS_CTRL1_LANE2 bit 6	GTH_QUAD: DRP[200] bit 7 GTH_QUAD: PCS_CTRL1_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 4 GTH_QUAD: PCS_CTRL1_LANE2 bit 4	GTH_QUAD: DRP[200] bit 5 GTH_QUAD: PCS_CTRL1_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 2 GTH_QUAD: PCS_CTRL1_LANE2 bit 2	GTH_QUAD: DRP[200] bit 3 GTH_QUAD: PCS_CTRL1_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[200] bit 0 GTH_QUAD: PCS_CTRL1_LANE2 bit 0	GTH_QUAD: DRP[200] bit 1 GTH_QUAD: PCS_CTRL1_LANE2 bit 1

virtex6 GTH rect MAIN[26]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 14 GTH_QUAD: PCS_RESET_LANE2 bit 14	GTH_QUAD: DRP[215] bit 15 GTH_QUAD: PCS_RESET_LANE2 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 12 GTH_QUAD: PCS_RESET_LANE2 bit 12	GTH_QUAD: DRP[215] bit 13 GTH_QUAD: PCS_RESET_LANE2 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 10 GTH_QUAD: PCS_RESET_LANE2 bit 10	GTH_QUAD: DRP[215] bit 11 GTH_QUAD: PCS_RESET_LANE2 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 8 GTH_QUAD: PCS_RESET_LANE2 bit 8	GTH_QUAD: DRP[215] bit 9 GTH_QUAD: PCS_RESET_LANE2 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 6 GTH_QUAD: PCS_RESET_LANE2 bit 6	GTH_QUAD: DRP[215] bit 7 GTH_QUAD: PCS_RESET_LANE2 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 4 GTH_QUAD: PCS_RESET_LANE2 bit 4	GTH_QUAD: DRP[215] bit 5 GTH_QUAD: PCS_RESET_LANE2 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 2 GTH_QUAD: PCS_RESET_LANE2 bit 2	GTH_QUAD: DRP[215] bit 3 GTH_QUAD: PCS_RESET_LANE2 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[215] bit 0 GTH_QUAD: PCS_RESET_LANE2 bit 0	GTH_QUAD: DRP[215] bit 1 GTH_QUAD: PCS_RESET_LANE2 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 14 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 14	GTH_QUAD: DRP[214] bit 15 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 12 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 12	GTH_QUAD: DRP[214] bit 13 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 10 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 10	GTH_QUAD: DRP[214] bit 11 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 8 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 8	GTH_QUAD: DRP[214] bit 9 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 6 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 6	GTH_QUAD: DRP[214] bit 7 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 4 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 4	GTH_QUAD: DRP[214] bit 5 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 2 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 2	GTH_QUAD: DRP[214] bit 3 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[214] bit 0 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 0	GTH_QUAD: DRP[214] bit 1 GTH_QUAD: PRBS_BER_CFG1_LANE2 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 14 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 14	GTH_QUAD: DRP[213] bit 15 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 12 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 12	GTH_QUAD: DRP[213] bit 13 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 10 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 10	GTH_QUAD: DRP[213] bit 11 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 8 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 8	GTH_QUAD: DRP[213] bit 9 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 6 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 6	GTH_QUAD: DRP[213] bit 7 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 4 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 4	GTH_QUAD: DRP[213] bit 5 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 2 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 2	GTH_QUAD: DRP[213] bit 3 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[213] bit 0 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 0	GTH_QUAD: DRP[213] bit 1 GTH_QUAD: PRBS_BER_CFG0_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 14 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 14	GTH_QUAD: DRP[212] bit 15 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 12 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 12	GTH_QUAD: DRP[212] bit 13 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 10 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 10	GTH_QUAD: DRP[212] bit 11 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 8 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 8	GTH_QUAD: DRP[212] bit 9 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 6 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 6	GTH_QUAD: DRP[212] bit 7 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 4 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 4	GTH_QUAD: DRP[212] bit 5 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 2 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 2	GTH_QUAD: DRP[212] bit 3 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[212] bit 0 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 0	GTH_QUAD: DRP[212] bit 1 GTH_QUAD: PCS_MISC_CFG_0_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 14 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 14	GTH_QUAD: DRP[211] bit 15 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 12 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 12	GTH_QUAD: DRP[211] bit 13 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 10 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 10	GTH_QUAD: DRP[211] bit 11 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 8 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 8	GTH_QUAD: DRP[211] bit 9 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 6 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 6	GTH_QUAD: DRP[211] bit 7 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 4 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 4	GTH_QUAD: DRP[211] bit 5 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 2 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 2	GTH_QUAD: DRP[211] bit 3 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[211] bit 0 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 0	GTH_QUAD: DRP[211] bit 1 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 14	GTH_QUAD: DRP[210] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 12	GTH_QUAD: DRP[210] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 10	GTH_QUAD: DRP[210] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 8	GTH_QUAD: DRP[210] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 6	GTH_QUAD: DRP[210] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 4	GTH_QUAD: DRP[210] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 2	GTH_QUAD: DRP[210] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[210] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 0	GTH_QUAD: DRP[210] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 14	GTH_QUAD: DRP[209] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 12	GTH_QUAD: DRP[209] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 10	GTH_QUAD: DRP[209] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 8	GTH_QUAD: DRP[209] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 6	GTH_QUAD: DRP[209] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 4	GTH_QUAD: DRP[209] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 2	GTH_QUAD: DRP[209] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[209] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 0	GTH_QUAD: DRP[209] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 14	GTH_QUAD: DRP[208] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 12	GTH_QUAD: DRP[208] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 10	GTH_QUAD: DRP[208] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 8	GTH_QUAD: DRP[208] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 6	GTH_QUAD: DRP[208] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 4	GTH_QUAD: DRP[208] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 2	GTH_QUAD: DRP[208] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[208] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 0	GTH_QUAD: DRP[208] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE2 bit 1

virtex6 GTH rect MAIN[27]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 14	GTH_QUAD: DRP[223] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 12	GTH_QUAD: DRP[223] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 10	GTH_QUAD: DRP[223] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 8	GTH_QUAD: DRP[223] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 6	GTH_QUAD: DRP[223] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 4	GTH_QUAD: DRP[223] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 2	GTH_QUAD: DRP[223] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[223] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 0	GTH_QUAD: DRP[223] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_1_LANE23 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 14	GTH_QUAD: DRP[222] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 12	GTH_QUAD: DRP[222] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 10	GTH_QUAD: DRP[222] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 8	GTH_QUAD: DRP[222] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 6	GTH_QUAD: DRP[222] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 4	GTH_QUAD: DRP[222] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 2	GTH_QUAD: DRP[222] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[222] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 0	GTH_QUAD: DRP[222] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_0_LANE23 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 14 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 14	GTH_QUAD: DRP[221] bit 15 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 12 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 12	GTH_QUAD: DRP[221] bit 13 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 10 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 10	GTH_QUAD: DRP[221] bit 11 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 8 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 8	GTH_QUAD: DRP[221] bit 9 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 6 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 6	GTH_QUAD: DRP[221] bit 7 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 4 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 4	GTH_QUAD: DRP[221] bit 5 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 2 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 2	GTH_QUAD: DRP[221] bit 3 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[221] bit 0 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 0	GTH_QUAD: DRP[221] bit 1 GTH_QUAD: E10GBASER_PCS_CFG_LANE2 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 14 GTH_QUAD: PCS_TYPE_LANE2 bit 14	GTH_QUAD: DRP[220] bit 15 GTH_QUAD: PCS_TYPE_LANE2 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 12 GTH_QUAD: PCS_TYPE_LANE2 bit 12	GTH_QUAD: DRP[220] bit 13 GTH_QUAD: PCS_TYPE_LANE2 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 10 GTH_QUAD: PCS_TYPE_LANE2 bit 10	GTH_QUAD: DRP[220] bit 11 GTH_QUAD: PCS_TYPE_LANE2 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 8 GTH_QUAD: PCS_TYPE_LANE2 bit 8	GTH_QUAD: DRP[220] bit 9 GTH_QUAD: PCS_TYPE_LANE2 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 6 GTH_QUAD: PCS_TYPE_LANE2 bit 6	GTH_QUAD: DRP[220] bit 7 GTH_QUAD: PCS_TYPE_LANE2 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 4 GTH_QUAD: PCS_TYPE_LANE2 bit 4	GTH_QUAD: DRP[220] bit 5 GTH_QUAD: PCS_TYPE_LANE2 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 2 GTH_QUAD: PCS_TYPE_LANE2 bit 2	GTH_QUAD: DRP[220] bit 3 GTH_QUAD: PCS_TYPE_LANE2 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[220] bit 0 GTH_QUAD: PCS_TYPE_LANE2 bit 0	GTH_QUAD: DRP[220] bit 1 GTH_QUAD: PCS_TYPE_LANE2 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 14 GTH_QUAD: PCS_ABILITY_LANE2 bit 14	GTH_QUAD: DRP[219] bit 15 GTH_QUAD: PCS_ABILITY_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 12 GTH_QUAD: PCS_ABILITY_LANE2 bit 12	GTH_QUAD: DRP[219] bit 13 GTH_QUAD: PCS_ABILITY_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 10 GTH_QUAD: PCS_ABILITY_LANE2 bit 10	GTH_QUAD: DRP[219] bit 11 GTH_QUAD: PCS_ABILITY_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 8 GTH_QUAD: PCS_ABILITY_LANE2 bit 8	GTH_QUAD: DRP[219] bit 9 GTH_QUAD: PCS_ABILITY_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 6 GTH_QUAD: PCS_ABILITY_LANE2 bit 6	GTH_QUAD: DRP[219] bit 7 GTH_QUAD: PCS_ABILITY_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 4 GTH_QUAD: PCS_ABILITY_LANE2 bit 4	GTH_QUAD: DRP[219] bit 5 GTH_QUAD: PCS_ABILITY_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 2 GTH_QUAD: PCS_ABILITY_LANE2 bit 2	GTH_QUAD: DRP[219] bit 3 GTH_QUAD: PCS_ABILITY_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[219] bit 0 GTH_QUAD: PCS_ABILITY_LANE2 bit 0	GTH_QUAD: DRP[219] bit 1 GTH_QUAD: PCS_ABILITY_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 14 GTH_QUAD: PCS_RESET_1_LANE2 bit 14	GTH_QUAD: DRP[218] bit 15 GTH_QUAD: PCS_RESET_1_LANE2 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 12 GTH_QUAD: PCS_RESET_1_LANE2 bit 12	GTH_QUAD: DRP[218] bit 13 GTH_QUAD: PCS_RESET_1_LANE2 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 10 GTH_QUAD: PCS_RESET_1_LANE2 bit 10	GTH_QUAD: DRP[218] bit 11 GTH_QUAD: PCS_RESET_1_LANE2 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 8 GTH_QUAD: PCS_RESET_1_LANE2 bit 8	GTH_QUAD: DRP[218] bit 9 GTH_QUAD: PCS_RESET_1_LANE2 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 6 GTH_QUAD: PCS_RESET_1_LANE2 bit 6	GTH_QUAD: DRP[218] bit 7 GTH_QUAD: PCS_RESET_1_LANE2 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 4 GTH_QUAD: PCS_RESET_1_LANE2 bit 4	GTH_QUAD: DRP[218] bit 5 GTH_QUAD: PCS_RESET_1_LANE2 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 2 GTH_QUAD: PCS_RESET_1_LANE2 bit 2	GTH_QUAD: DRP[218] bit 3 GTH_QUAD: PCS_RESET_1_LANE2 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[218] bit 0 GTH_QUAD: PCS_RESET_1_LANE2 bit 0	GTH_QUAD: DRP[218] bit 1 GTH_QUAD: PCS_RESET_1_LANE2 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 14 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 14	GTH_QUAD: DRP[217] bit 15 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 12 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 12	GTH_QUAD: DRP[217] bit 13 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 10 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 10	GTH_QUAD: DRP[217] bit 11 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 8 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 8	GTH_QUAD: DRP[217] bit 9 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 6 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 6	GTH_QUAD: DRP[217] bit 7 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 4 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 4	GTH_QUAD: DRP[217] bit 5 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 2 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 2	GTH_QUAD: DRP[217] bit 3 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[217] bit 0 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 0	GTH_QUAD: DRP[217] bit 1 GTH_QUAD: PCS_MISC_CFG_1_LANE2 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 14 GTH_QUAD: PRBS_CFG_LANE2 bit 14	GTH_QUAD: DRP[216] bit 15 GTH_QUAD: PRBS_CFG_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 12 GTH_QUAD: PRBS_CFG_LANE2 bit 12	GTH_QUAD: DRP[216] bit 13 GTH_QUAD: PRBS_CFG_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 10 GTH_QUAD: PRBS_CFG_LANE2 bit 10	GTH_QUAD: DRP[216] bit 11 GTH_QUAD: PRBS_CFG_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 8 GTH_QUAD: PRBS_CFG_LANE2 bit 8	GTH_QUAD: DRP[216] bit 9 GTH_QUAD: PRBS_CFG_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 6 GTH_QUAD: PRBS_CFG_LANE2 bit 6	GTH_QUAD: DRP[216] bit 7 GTH_QUAD: PRBS_CFG_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 4 GTH_QUAD: PRBS_CFG_LANE2 bit 4	GTH_QUAD: DRP[216] bit 5 GTH_QUAD: PRBS_CFG_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 2 GTH_QUAD: PRBS_CFG_LANE2 bit 2	GTH_QUAD: DRP[216] bit 3 GTH_QUAD: PRBS_CFG_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[216] bit 0 GTH_QUAD: PRBS_CFG_LANE2 bit 0	GTH_QUAD: DRP[216] bit 1 GTH_QUAD: PRBS_CFG_LANE2 bit 1

virtex6 GTH rect MAIN[28]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 14 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 14	GTH_QUAD: DRP[231] bit 15 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 12 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 12	GTH_QUAD: DRP[231] bit 13 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 10 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 10	GTH_QUAD: DRP[231] bit 11 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 8 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 8	GTH_QUAD: DRP[231] bit 9 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 6 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 6	GTH_QUAD: DRP[231] bit 7 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 4 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 4	GTH_QUAD: DRP[231] bit 5 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 2 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 2	GTH_QUAD: DRP[231] bit 3 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[231] bit 0 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 0	GTH_QUAD: DRP[231] bit 1 GTH_QUAD: E10GBASEKR_LD_COEFF_UPD_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 14 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 14	GTH_QUAD: DRP[230] bit 15 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 12 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 12	GTH_QUAD: DRP[230] bit 13 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 10 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 10	GTH_QUAD: DRP[230] bit 11 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 8 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 8	GTH_QUAD: DRP[230] bit 9 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 6 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 6	GTH_QUAD: DRP[230] bit 7 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 4 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 4	GTH_QUAD: DRP[230] bit 5 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 2 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 2	GTH_QUAD: DRP[230] bit 3 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[230] bit 0 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 0	GTH_QUAD: DRP[230] bit 1 GTH_QUAD: E10GBASEKR_LP_COEFF_UPD_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 14 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 14	GTH_QUAD: DRP[229] bit 15 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 12 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 12	GTH_QUAD: DRP[229] bit 13 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 10 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 10	GTH_QUAD: DRP[229] bit 11 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 8 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 8	GTH_QUAD: DRP[229] bit 9 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 6 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 6	GTH_QUAD: DRP[229] bit 7 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 4 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 4	GTH_QUAD: DRP[229] bit 5 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 2 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 2	GTH_QUAD: DRP[229] bit 3 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[229] bit 0 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 0	GTH_QUAD: DRP[229] bit 1 GTH_QUAD: E10GBASEKR_PMA_CTRL_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 14 GTH_QUAD: TX_DISABLE_LANE3 bit 14	GTH_QUAD: DRP[228] bit 15 GTH_QUAD: TX_DISABLE_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 12 GTH_QUAD: TX_DISABLE_LANE3 bit 12	GTH_QUAD: DRP[228] bit 13 GTH_QUAD: TX_DISABLE_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 10 GTH_QUAD: TX_DISABLE_LANE3 bit 10	GTH_QUAD: DRP[228] bit 11 GTH_QUAD: TX_DISABLE_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 8 GTH_QUAD: TX_DISABLE_LANE3 bit 8	GTH_QUAD: DRP[228] bit 9 GTH_QUAD: TX_DISABLE_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 6 GTH_QUAD: TX_DISABLE_LANE3 bit 6	GTH_QUAD: DRP[228] bit 7 GTH_QUAD: TX_DISABLE_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 4 GTH_QUAD: TX_DISABLE_LANE3 bit 4	GTH_QUAD: DRP[228] bit 5 GTH_QUAD: TX_DISABLE_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 2 GTH_QUAD: TX_DISABLE_LANE3 bit 2	GTH_QUAD: DRP[228] bit 3 GTH_QUAD: TX_DISABLE_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[228] bit 0 GTH_QUAD: TX_DISABLE_LANE3 bit 0	GTH_QUAD: DRP[228] bit 1 GTH_QUAD: TX_DISABLE_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 14 GTH_QUAD: PMA_CTRL2_LANE3 bit 14	GTH_QUAD: DRP[227] bit 15 GTH_QUAD: PMA_CTRL2_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 12 GTH_QUAD: PMA_CTRL2_LANE3 bit 12	GTH_QUAD: DRP[227] bit 13 GTH_QUAD: PMA_CTRL2_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 10 GTH_QUAD: PMA_CTRL2_LANE3 bit 10	GTH_QUAD: DRP[227] bit 11 GTH_QUAD: PMA_CTRL2_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 8 GTH_QUAD: PMA_CTRL2_LANE3 bit 8	GTH_QUAD: DRP[227] bit 9 GTH_QUAD: PMA_CTRL2_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 6 GTH_QUAD: PMA_CTRL2_LANE3 bit 6	GTH_QUAD: DRP[227] bit 7 GTH_QUAD: PMA_CTRL2_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 4 GTH_QUAD: PMA_CTRL2_LANE3 bit 4	GTH_QUAD: DRP[227] bit 5 GTH_QUAD: PMA_CTRL2_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 2 GTH_QUAD: PMA_CTRL2_LANE3 bit 2	GTH_QUAD: DRP[227] bit 3 GTH_QUAD: PMA_CTRL2_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[227] bit 0 GTH_QUAD: PMA_CTRL2_LANE3 bit 0	GTH_QUAD: DRP[227] bit 1 GTH_QUAD: PMA_CTRL2_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 14 GTH_QUAD: PMA_CTRL1_LANE3 bit 14	GTH_QUAD: DRP[226] bit 15 GTH_QUAD: PMA_CTRL1_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 12 GTH_QUAD: PMA_CTRL1_LANE3 bit 12	GTH_QUAD: DRP[226] bit 13 GTH_QUAD: PMA_CTRL1_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 10 GTH_QUAD: PMA_CTRL1_LANE3 bit 10	GTH_QUAD: DRP[226] bit 11 GTH_QUAD: PMA_CTRL1_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 8 GTH_QUAD: PMA_CTRL1_LANE3 bit 8	GTH_QUAD: DRP[226] bit 9 GTH_QUAD: PMA_CTRL1_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 6 GTH_QUAD: PMA_CTRL1_LANE3 bit 6	GTH_QUAD: DRP[226] bit 7 GTH_QUAD: PMA_CTRL1_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 4 GTH_QUAD: PMA_CTRL1_LANE3 bit 4	GTH_QUAD: DRP[226] bit 5 GTH_QUAD: PMA_CTRL1_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 2 GTH_QUAD: PMA_CTRL1_LANE3 bit 2	GTH_QUAD: DRP[226] bit 3 GTH_QUAD: PMA_CTRL1_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[226] bit 0 GTH_QUAD: PMA_CTRL1_LANE3 bit 0	GTH_QUAD: DRP[226] bit 1 GTH_QUAD: PMA_CTRL1_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 14 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 14	GTH_QUAD: DRP[225] bit 15 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 12 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 12	GTH_QUAD: DRP[225] bit 13 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 10 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 10	GTH_QUAD: DRP[225] bit 11 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 8 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 8	GTH_QUAD: DRP[225] bit 9 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 6 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 6	GTH_QUAD: DRP[225] bit 7 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 4 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 4	GTH_QUAD: DRP[225] bit 5 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 2 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 2	GTH_QUAD: DRP[225] bit 3 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[225] bit 0 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 0	GTH_QUAD: DRP[225] bit 1 GTH_QUAD: SLICE_TX_RESET_LANE23 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 14 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 14	GTH_QUAD: DRP[224] bit 15 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 12 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 12	GTH_QUAD: DRP[224] bit 13 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 10 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 10	GTH_QUAD: DRP[224] bit 11 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 8 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 8	GTH_QUAD: DRP[224] bit 9 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 6 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 6	GTH_QUAD: DRP[224] bit 7 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 4 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 4	GTH_QUAD: DRP[224] bit 5 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 2 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 2	GTH_QUAD: DRP[224] bit 3 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[224] bit 0 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 0	GTH_QUAD: DRP[224] bit 1 GTH_QUAD: SLICE_NOISE_CTRL_2_LANE23 bit 1

virtex6 GTH rect MAIN[29]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 14 GTH_QUAD: PCS_MODE_LANE3 bit 14	GTH_QUAD: DRP[239] bit 15 GTH_QUAD: PCS_MODE_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 12 GTH_QUAD: PCS_MODE_LANE3 bit 12	GTH_QUAD: DRP[239] bit 13 GTH_QUAD: PCS_MODE_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 10 GTH_QUAD: PCS_MODE_LANE3 bit 10	GTH_QUAD: DRP[239] bit 11 GTH_QUAD: PCS_MODE_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 8 GTH_QUAD: PCS_MODE_LANE3 bit 8	GTH_QUAD: DRP[239] bit 9 GTH_QUAD: PCS_MODE_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 6 GTH_QUAD: PCS_MODE_LANE3 bit 6	GTH_QUAD: DRP[239] bit 7 GTH_QUAD: PCS_MODE_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 4 GTH_QUAD: PCS_MODE_LANE3 bit 4	GTH_QUAD: DRP[239] bit 5 GTH_QUAD: PCS_MODE_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 2 GTH_QUAD: PCS_MODE_LANE3 bit 2	GTH_QUAD: DRP[239] bit 3 GTH_QUAD: PCS_MODE_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[239] bit 0 GTH_QUAD: PCS_MODE_LANE3 bit 0	GTH_QUAD: DRP[239] bit 1 GTH_QUAD: PCS_MODE_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 14 GTH_QUAD: TX_FABRIC_WIDTH3 bit 1	GTH_QUAD: DRP[238] bit 15 GTH_QUAD: TX_FABRIC_WIDTH3 bit 2
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 12	GTH_QUAD: DRP[238] bit 13 GTH_QUAD: TX_FABRIC_WIDTH3 bit 0
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 10 GTH_QUAD: RX_FABRIC_WIDTH3 bit 1	GTH_QUAD: DRP[238] bit 11 GTH_QUAD: RX_FABRIC_WIDTH3 bit 2
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 8	GTH_QUAD: DRP[238] bit 9 GTH_QUAD: RX_FABRIC_WIDTH3 bit 0
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 6	GTH_QUAD: DRP[238] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 4	GTH_QUAD: DRP[238] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 2	GTH_QUAD: DRP[238] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[238] bit 0 GTH_QUAD: TST_PCS_LOOPBACK_LANE3 bit 0	GTH_QUAD: DRP[238] bit 1 GTH_QUAD: GTH_CFG_PWRUP_LANE3 bit 0
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 14 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 14	GTH_QUAD: DRP[237] bit 15 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 12 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 12	GTH_QUAD: DRP[237] bit 13 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 10 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 10	GTH_QUAD: DRP[237] bit 11 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 8 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 8	GTH_QUAD: DRP[237] bit 9 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 6 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 6	GTH_QUAD: DRP[237] bit 7 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 4 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 4	GTH_QUAD: DRP[237] bit 5 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 2 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 2	GTH_QUAD: DRP[237] bit 3 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[237] bit 0 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 0	GTH_QUAD: DRP[237] bit 1 GTH_QUAD: BUFFER_CONFIG_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 14 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 14	GTH_QUAD: DRP[236] bit 15 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 12 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 12	GTH_QUAD: DRP[236] bit 13 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 10 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 10	GTH_QUAD: DRP[236] bit 11 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 8 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 8	GTH_QUAD: DRP[236] bit 9 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 6 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 6	GTH_QUAD: DRP[236] bit 7 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 4 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 4	GTH_QUAD: DRP[236] bit 5 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 2 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 2	GTH_QUAD: DRP[236] bit 3 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[236] bit 0 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 0	GTH_QUAD: DRP[236] bit 1 GTH_QUAD: RX_AGC_CTRL_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 14 GTH_QUAD: RX_CFG2_LANE3 bit 14	GTH_QUAD: DRP[235] bit 15 GTH_QUAD: RX_CFG2_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 12 GTH_QUAD: RX_CFG2_LANE3 bit 12	GTH_QUAD: DRP[235] bit 13 GTH_QUAD: RX_CFG2_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 10 GTH_QUAD: RX_CFG2_LANE3 bit 10	GTH_QUAD: DRP[235] bit 11 GTH_QUAD: RX_CFG2_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 8 GTH_QUAD: RX_CFG2_LANE3 bit 8	GTH_QUAD: DRP[235] bit 9 GTH_QUAD: RX_CFG2_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 6 GTH_QUAD: RX_CFG2_LANE3 bit 6	GTH_QUAD: DRP[235] bit 7 GTH_QUAD: RX_CFG2_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 4 GTH_QUAD: RX_CFG2_LANE3 bit 4	GTH_QUAD: DRP[235] bit 5 GTH_QUAD: RX_CFG2_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 2 GTH_QUAD: RX_CFG2_LANE3 bit 2	GTH_QUAD: DRP[235] bit 3 GTH_QUAD: RX_CFG2_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[235] bit 0 GTH_QUAD: RX_CFG2_LANE3 bit 0	GTH_QUAD: DRP[235] bit 1 GTH_QUAD: RX_CFG2_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 14 GTH_QUAD: RX_CFG1_LANE3 bit 14	GTH_QUAD: DRP[234] bit 15 GTH_QUAD: RX_CFG1_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 12 GTH_QUAD: RX_CFG1_LANE3 bit 12	GTH_QUAD: DRP[234] bit 13 GTH_QUAD: RX_CFG1_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 10 GTH_QUAD: RX_CFG1_LANE3 bit 10	GTH_QUAD: DRP[234] bit 11 GTH_QUAD: RX_CFG1_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 8 GTH_QUAD: RX_CFG1_LANE3 bit 8	GTH_QUAD: DRP[234] bit 9 GTH_QUAD: RX_CFG1_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 6 GTH_QUAD: RX_CFG1_LANE3 bit 6	GTH_QUAD: DRP[234] bit 7 GTH_QUAD: RX_CFG1_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 4 GTH_QUAD: RX_CFG1_LANE3 bit 4	GTH_QUAD: DRP[234] bit 5 GTH_QUAD: RX_CFG1_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 2 GTH_QUAD: RX_CFG1_LANE3 bit 2	GTH_QUAD: DRP[234] bit 3 GTH_QUAD: RX_CFG1_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[234] bit 0 GTH_QUAD: RX_CFG1_LANE3 bit 0	GTH_QUAD: DRP[234] bit 1 GTH_QUAD: RX_CFG1_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 14 GTH_QUAD: RX_CFG0_LANE3 bit 14	GTH_QUAD: DRP[233] bit 15 GTH_QUAD: RX_CFG0_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 12 GTH_QUAD: RX_CFG0_LANE3 bit 12	GTH_QUAD: DRP[233] bit 13 GTH_QUAD: RX_CFG0_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 10 GTH_QUAD: RX_CFG0_LANE3 bit 10	GTH_QUAD: DRP[233] bit 11 GTH_QUAD: RX_CFG0_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 8 GTH_QUAD: RX_CFG0_LANE3 bit 8	GTH_QUAD: DRP[233] bit 9 GTH_QUAD: RX_CFG0_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 6 GTH_QUAD: RX_CFG0_LANE3 bit 6	GTH_QUAD: DRP[233] bit 7 GTH_QUAD: RX_CFG0_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 4 GTH_QUAD: RX_CFG0_LANE3 bit 4	GTH_QUAD: DRP[233] bit 5 GTH_QUAD: RX_CFG0_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 2 GTH_QUAD: RX_CFG0_LANE3 bit 2	GTH_QUAD: DRP[233] bit 3 GTH_QUAD: RX_CFG0_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[233] bit 0 GTH_QUAD: RX_CFG0_LANE3 bit 0	GTH_QUAD: DRP[233] bit 1 GTH_QUAD: RX_CFG0_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 14 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 14	GTH_QUAD: DRP[232] bit 15 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 12 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 12	GTH_QUAD: DRP[232] bit 13 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 10 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 10	GTH_QUAD: DRP[232] bit 11 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 8 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 8	GTH_QUAD: DRP[232] bit 9 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 6 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 6	GTH_QUAD: DRP[232] bit 7 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 4 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 4	GTH_QUAD: DRP[232] bit 5 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 2 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 2	GTH_QUAD: DRP[232] bit 3 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[232] bit 0 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 0	GTH_QUAD: DRP[232] bit 1 GTH_QUAD: E10GBASEKX_CTRL_LANE3 bit 1

virtex6 GTH rect MAIN[30]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 14 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 14	GTH_QUAD: DRP[247] bit 15 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 12 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 12	GTH_QUAD: DRP[247] bit 13 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 10 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 10	GTH_QUAD: DRP[247] bit 11 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 8 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 8	GTH_QUAD: DRP[247] bit 9 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 6 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 6	GTH_QUAD: DRP[247] bit 7 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 4 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 4	GTH_QUAD: DRP[247] bit 5 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 2 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 2	GTH_QUAD: DRP[247] bit 3 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[247] bit 0 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 0	GTH_QUAD: DRP[247] bit 1 GTH_QUAD: RX_CDR_CTRL2_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 14 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 14	GTH_QUAD: DRP[246] bit 15 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 12 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 12	GTH_QUAD: DRP[246] bit 13 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 10 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 10	GTH_QUAD: DRP[246] bit 11 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 8 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 8	GTH_QUAD: DRP[246] bit 9 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 6 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 6	GTH_QUAD: DRP[246] bit 7 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 4 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 4	GTH_QUAD: DRP[246] bit 5 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 2 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 2	GTH_QUAD: DRP[246] bit 3 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[246] bit 0 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 0	GTH_QUAD: DRP[246] bit 1 GTH_QUAD: RX_CDR_CTRL1_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 14 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 14	GTH_QUAD: DRP[245] bit 15 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 12 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 12	GTH_QUAD: DRP[245] bit 13 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 10 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 10	GTH_QUAD: DRP[245] bit 11 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 8 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 8	GTH_QUAD: DRP[245] bit 9 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 6 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 6	GTH_QUAD: DRP[245] bit 7 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 4 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 4	GTH_QUAD: DRP[245] bit 5 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 2 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 2	GTH_QUAD: DRP[245] bit 3 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[245] bit 0 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 0	GTH_QUAD: DRP[245] bit 1 GTH_QUAD: RX_CDR_CTRL0_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 14 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 14	GTH_QUAD: DRP[244] bit 15 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 12 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 12	GTH_QUAD: DRP[244] bit 13 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 10 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 10	GTH_QUAD: DRP[244] bit 11 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 8 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 8	GTH_QUAD: DRP[244] bit 9 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 6 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 6	GTH_QUAD: DRP[244] bit 7 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 4 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 4	GTH_QUAD: DRP[244] bit 5 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 2 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 2	GTH_QUAD: DRP[244] bit 3 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[244] bit 0 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 0	GTH_QUAD: DRP[244] bit 1 GTH_QUAD: RX_LOOP_CTRL_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 14 GTH_QUAD: PCS_MODE_LANE2 bit 14	GTH_QUAD: DRP[243] bit 15 GTH_QUAD: PCS_MODE_LANE2 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 12 GTH_QUAD: PCS_MODE_LANE2 bit 12	GTH_QUAD: DRP[243] bit 13 GTH_QUAD: PCS_MODE_LANE2 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 10 GTH_QUAD: PCS_MODE_LANE2 bit 10	GTH_QUAD: DRP[243] bit 11 GTH_QUAD: PCS_MODE_LANE2 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 8 GTH_QUAD: PCS_MODE_LANE2 bit 8	GTH_QUAD: DRP[243] bit 9 GTH_QUAD: PCS_MODE_LANE2 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 6 GTH_QUAD: PCS_MODE_LANE2 bit 6	GTH_QUAD: DRP[243] bit 7 GTH_QUAD: PCS_MODE_LANE2 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 4 GTH_QUAD: PCS_MODE_LANE2 bit 4	GTH_QUAD: DRP[243] bit 5 GTH_QUAD: PCS_MODE_LANE2 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 2 GTH_QUAD: PCS_MODE_LANE2 bit 2	GTH_QUAD: DRP[243] bit 3 GTH_QUAD: PCS_MODE_LANE2 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[243] bit 0 GTH_QUAD: PCS_MODE_LANE2 bit 0	GTH_QUAD: DRP[243] bit 1 GTH_QUAD: PCS_MODE_LANE2 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 14	GTH_QUAD: DRP[242] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 12	GTH_QUAD: DRP[242] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 10	GTH_QUAD: DRP[242] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 8	GTH_QUAD: DRP[242] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 6	GTH_QUAD: DRP[242] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 4	GTH_QUAD: DRP[242] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 2	GTH_QUAD: DRP[242] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[242] bit 0	GTH_QUAD: DRP[242] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 14 GTH_QUAD: TX_FABRIC_WIDTH2 bit 1	GTH_QUAD: DRP[241] bit 15 GTH_QUAD: TX_FABRIC_WIDTH2 bit 2
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 12	GTH_QUAD: DRP[241] bit 13 GTH_QUAD: TX_FABRIC_WIDTH2 bit 0
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 10 GTH_QUAD: RX_FABRIC_WIDTH2 bit 1	GTH_QUAD: DRP[241] bit 11 GTH_QUAD: RX_FABRIC_WIDTH2 bit 2
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 8	GTH_QUAD: DRP[241] bit 9 GTH_QUAD: RX_FABRIC_WIDTH2 bit 0
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 6	GTH_QUAD: DRP[241] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 4	GTH_QUAD: DRP[241] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 2	GTH_QUAD: DRP[241] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[241] bit 0 GTH_QUAD: TST_PCS_LOOPBACK_LANE2 bit 0	GTH_QUAD: DRP[241] bit 1 GTH_QUAD: GTH_CFG_PWRUP_LANE2 bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 14 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 14	GTH_QUAD: DRP[240] bit 15 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 12 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 12	GTH_QUAD: DRP[240] bit 13 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 10 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 10	GTH_QUAD: DRP[240] bit 11 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 8 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 8	GTH_QUAD: DRP[240] bit 9 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 6 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 6	GTH_QUAD: DRP[240] bit 7 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 4 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 4	GTH_QUAD: DRP[240] bit 5 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 2 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 2	GTH_QUAD: DRP[240] bit 3 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[240] bit 0 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 0	GTH_QUAD: DRP[240] bit 1 GTH_QUAD: BUFFER_CONFIG_LANE2 bit 1

virtex6 GTH rect MAIN[31]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 14 GTH_QUAD: TX_CFG2_LANE3 bit 14	GTH_QUAD: DRP[255] bit 15 GTH_QUAD: TX_CFG2_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 12 GTH_QUAD: TX_CFG2_LANE3 bit 12	GTH_QUAD: DRP[255] bit 13 GTH_QUAD: TX_CFG2_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 10 GTH_QUAD: TX_CFG2_LANE3 bit 10	GTH_QUAD: DRP[255] bit 11 GTH_QUAD: TX_CFG2_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 8 GTH_QUAD: TX_CFG2_LANE3 bit 8	GTH_QUAD: DRP[255] bit 9 GTH_QUAD: TX_CFG2_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 6 GTH_QUAD: TX_CFG2_LANE3 bit 6	GTH_QUAD: DRP[255] bit 7 GTH_QUAD: TX_CFG2_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 4 GTH_QUAD: TX_CFG2_LANE3 bit 4	GTH_QUAD: DRP[255] bit 5 GTH_QUAD: TX_CFG2_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 2 GTH_QUAD: TX_CFG2_LANE3 bit 2	GTH_QUAD: DRP[255] bit 3 GTH_QUAD: TX_CFG2_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[255] bit 0 GTH_QUAD: TX_CFG2_LANE3 bit 0	GTH_QUAD: DRP[255] bit 1 GTH_QUAD: TX_CFG2_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 14 GTH_QUAD: TX_CFG1_LANE3 bit 14	GTH_QUAD: DRP[254] bit 15 GTH_QUAD: TX_CFG1_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 12 GTH_QUAD: TX_CFG1_LANE3 bit 12	GTH_QUAD: DRP[254] bit 13 GTH_QUAD: TX_CFG1_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 10 GTH_QUAD: TX_CFG1_LANE3 bit 10	GTH_QUAD: DRP[254] bit 11 GTH_QUAD: TX_CFG1_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 8 GTH_QUAD: TX_CFG1_LANE3 bit 8	GTH_QUAD: DRP[254] bit 9 GTH_QUAD: TX_CFG1_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 6 GTH_QUAD: TX_CFG1_LANE3 bit 6	GTH_QUAD: DRP[254] bit 7 GTH_QUAD: TX_CFG1_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 4 GTH_QUAD: TX_CFG1_LANE3 bit 4	GTH_QUAD: DRP[254] bit 5 GTH_QUAD: TX_CFG1_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 2 GTH_QUAD: TX_CFG1_LANE3 bit 2	GTH_QUAD: DRP[254] bit 3 GTH_QUAD: TX_CFG1_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[254] bit 0 GTH_QUAD: TX_CFG1_LANE3 bit 0	GTH_QUAD: DRP[254] bit 1 GTH_QUAD: TX_CFG1_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 14 GTH_QUAD: TX_CFG0_LANE3 bit 14	GTH_QUAD: DRP[253] bit 15 GTH_QUAD: TX_CFG0_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 12 GTH_QUAD: TX_CFG0_LANE3 bit 12	GTH_QUAD: DRP[253] bit 13 GTH_QUAD: TX_CFG0_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 10 GTH_QUAD: TX_CFG0_LANE3 bit 10	GTH_QUAD: DRP[253] bit 11 GTH_QUAD: TX_CFG0_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 8 GTH_QUAD: TX_CFG0_LANE3 bit 8	GTH_QUAD: DRP[253] bit 9 GTH_QUAD: TX_CFG0_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 6 GTH_QUAD: TX_CFG0_LANE3 bit 6	GTH_QUAD: DRP[253] bit 7 GTH_QUAD: TX_CFG0_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 4 GTH_QUAD: TX_CFG0_LANE3 bit 4	GTH_QUAD: DRP[253] bit 5 GTH_QUAD: TX_CFG0_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 2 GTH_QUAD: TX_CFG0_LANE3 bit 2	GTH_QUAD: DRP[253] bit 3 GTH_QUAD: TX_CFG0_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[253] bit 0 GTH_QUAD: TX_CFG0_LANE3 bit 0	GTH_QUAD: DRP[253] bit 1 GTH_QUAD: TX_CFG0_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 14 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 14	GTH_QUAD: DRP[252] bit 15 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 12 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 12	GTH_QUAD: DRP[252] bit 13 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 10 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 10	GTH_QUAD: DRP[252] bit 11 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 8 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 8	GTH_QUAD: DRP[252] bit 9 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 6 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 6	GTH_QUAD: DRP[252] bit 7 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 4 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 4	GTH_QUAD: DRP[252] bit 5 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 2 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 2	GTH_QUAD: DRP[252] bit 3 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[252] bit 0 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 0	GTH_QUAD: DRP[252] bit 1 GTH_QUAD: RX_CTLE_CTRL_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 14 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 14	GTH_QUAD: DRP[251] bit 15 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 12 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 12	GTH_QUAD: DRP[251] bit 13 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 10 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 10	GTH_QUAD: DRP[251] bit 11 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 8 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 8	GTH_QUAD: DRP[251] bit 9 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 6 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 6	GTH_QUAD: DRP[251] bit 7 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 4 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 4	GTH_QUAD: DRP[251] bit 5 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 2 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 2	GTH_QUAD: DRP[251] bit 3 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[251] bit 0 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 0	GTH_QUAD: DRP[251] bit 1 GTH_QUAD: RX_AEQ_VAL1_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 14 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 14	GTH_QUAD: DRP[250] bit 15 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 12 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 12	GTH_QUAD: DRP[250] bit 13 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 10 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 10	GTH_QUAD: DRP[250] bit 11 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 8 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 8	GTH_QUAD: DRP[250] bit 9 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 6 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 6	GTH_QUAD: DRP[250] bit 7 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 4 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 4	GTH_QUAD: DRP[250] bit 5 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 2 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 2	GTH_QUAD: DRP[250] bit 3 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[250] bit 0 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 0	GTH_QUAD: DRP[250] bit 1 GTH_QUAD: RX_AEQ_VAL0_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 14 GTH_QUAD: RX_MVAL1_LANE3 bit 14	GTH_QUAD: DRP[249] bit 15 GTH_QUAD: RX_MVAL1_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 12 GTH_QUAD: RX_MVAL1_LANE3 bit 12	GTH_QUAD: DRP[249] bit 13 GTH_QUAD: RX_MVAL1_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 10 GTH_QUAD: RX_MVAL1_LANE3 bit 10	GTH_QUAD: DRP[249] bit 11 GTH_QUAD: RX_MVAL1_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 8 GTH_QUAD: RX_MVAL1_LANE3 bit 8	GTH_QUAD: DRP[249] bit 9 GTH_QUAD: RX_MVAL1_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 6 GTH_QUAD: RX_MVAL1_LANE3 bit 6	GTH_QUAD: DRP[249] bit 7 GTH_QUAD: RX_MVAL1_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 4 GTH_QUAD: RX_MVAL1_LANE3 bit 4	GTH_QUAD: DRP[249] bit 5 GTH_QUAD: RX_MVAL1_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 2 GTH_QUAD: RX_MVAL1_LANE3 bit 2	GTH_QUAD: DRP[249] bit 3 GTH_QUAD: RX_MVAL1_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[249] bit 0 GTH_QUAD: RX_MVAL1_LANE3 bit 0	GTH_QUAD: DRP[249] bit 1 GTH_QUAD: RX_MVAL1_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 14 GTH_QUAD: RX_MVAL0_LANE3 bit 14	GTH_QUAD: DRP[248] bit 15 GTH_QUAD: RX_MVAL0_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 12 GTH_QUAD: RX_MVAL0_LANE3 bit 12	GTH_QUAD: DRP[248] bit 13 GTH_QUAD: RX_MVAL0_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 10 GTH_QUAD: RX_MVAL0_LANE3 bit 10	GTH_QUAD: DRP[248] bit 11 GTH_QUAD: RX_MVAL0_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 8 GTH_QUAD: RX_MVAL0_LANE3 bit 8	GTH_QUAD: DRP[248] bit 9 GTH_QUAD: RX_MVAL0_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 6 GTH_QUAD: RX_MVAL0_LANE3 bit 6	GTH_QUAD: DRP[248] bit 7 GTH_QUAD: RX_MVAL0_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 4 GTH_QUAD: RX_MVAL0_LANE3 bit 4	GTH_QUAD: DRP[248] bit 5 GTH_QUAD: RX_MVAL0_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 2 GTH_QUAD: RX_MVAL0_LANE3 bit 2	GTH_QUAD: DRP[248] bit 3 GTH_QUAD: RX_MVAL0_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[248] bit 0 GTH_QUAD: RX_MVAL0_LANE3 bit 0	GTH_QUAD: DRP[248] bit 1 GTH_QUAD: RX_MVAL0_LANE3 bit 1

virtex6 GTH rect MAIN[32]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 14 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 14	GTH_QUAD: DRP[263] bit 15 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 12 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 12	GTH_QUAD: DRP[263] bit 13 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 10 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 10	GTH_QUAD: DRP[263] bit 11 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 8 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 8	GTH_QUAD: DRP[263] bit 9 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 6 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 6	GTH_QUAD: DRP[263] bit 7 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 4 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 4	GTH_QUAD: DRP[263] bit 5 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 2 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 2	GTH_QUAD: DRP[263] bit 3 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[263] bit 0 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 0	GTH_QUAD: DRP[263] bit 1 GTH_QUAD: TX_PWR_RATE_OVRD_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 14 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 14	GTH_QUAD: DRP[262] bit 15 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 12 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 12	GTH_QUAD: DRP[262] bit 13 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 10 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 10	GTH_QUAD: DRP[262] bit 11 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 8 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 8	GTH_QUAD: DRP[262] bit 9 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 6 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 6	GTH_QUAD: DRP[262] bit 7 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 4 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 4	GTH_QUAD: DRP[262] bit 5 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 2 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 2	GTH_QUAD: DRP[262] bit 3 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[262] bit 0 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 0	GTH_QUAD: DRP[262] bit 1 GTH_QUAD: LANE_PWR_CTRL_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 14 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 14	GTH_QUAD: DRP[261] bit 15 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 12 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 12	GTH_QUAD: DRP[261] bit 13 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 10 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 10	GTH_QUAD: DRP[261] bit 11 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 8 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 8	GTH_QUAD: DRP[261] bit 9 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 6 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 6	GTH_QUAD: DRP[261] bit 7 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 4 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 4	GTH_QUAD: DRP[261] bit 5 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 2 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 2	GTH_QUAD: DRP[261] bit 3 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[261] bit 0 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 0	GTH_QUAD: DRP[261] bit 1 GTH_QUAD: DFE_TRAIN_CTRL_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 14 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 14	GTH_QUAD: DRP[260] bit 15 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 12 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 12	GTH_QUAD: DRP[260] bit 13 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 10 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 10	GTH_QUAD: DRP[260] bit 11 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 8 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 8	GTH_QUAD: DRP[260] bit 9 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 6 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 6	GTH_QUAD: DRP[260] bit 7 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 4 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 4	GTH_QUAD: DRP[260] bit 5 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 2 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 2	GTH_QUAD: DRP[260] bit 3 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[260] bit 0 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 0	GTH_QUAD: DRP[260] bit 1 GTH_QUAD: PMA_LPBK_CTRL_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 14 GTH_QUAD: TERM_CTRL_LANE3 bit 14	GTH_QUAD: DRP[259] bit 15 GTH_QUAD: TERM_CTRL_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 12 GTH_QUAD: TERM_CTRL_LANE3 bit 12	GTH_QUAD: DRP[259] bit 13 GTH_QUAD: TERM_CTRL_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 10 GTH_QUAD: TERM_CTRL_LANE3 bit 10	GTH_QUAD: DRP[259] bit 11 GTH_QUAD: TERM_CTRL_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 8 GTH_QUAD: TERM_CTRL_LANE3 bit 8	GTH_QUAD: DRP[259] bit 9 GTH_QUAD: TERM_CTRL_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 6 GTH_QUAD: TERM_CTRL_LANE3 bit 6	GTH_QUAD: DRP[259] bit 7 GTH_QUAD: TERM_CTRL_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 4 GTH_QUAD: TERM_CTRL_LANE3 bit 4	GTH_QUAD: DRP[259] bit 5 GTH_QUAD: TERM_CTRL_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 2 GTH_QUAD: TERM_CTRL_LANE3 bit 2	GTH_QUAD: DRP[259] bit 3 GTH_QUAD: TERM_CTRL_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[259] bit 0 GTH_QUAD: TERM_CTRL_LANE3 bit 0	GTH_QUAD: DRP[259] bit 1 GTH_QUAD: TERM_CTRL_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 14 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 14	GTH_QUAD: DRP[258] bit 15 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 12 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 12	GTH_QUAD: DRP[258] bit 13 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 10 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 10	GTH_QUAD: DRP[258] bit 11 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 8 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 8	GTH_QUAD: DRP[258] bit 9 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 6 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 6	GTH_QUAD: DRP[258] bit 7 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 4 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 4	GTH_QUAD: DRP[258] bit 5 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 2 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 2	GTH_QUAD: DRP[258] bit 3 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[258] bit 0 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 0	GTH_QUAD: DRP[258] bit 1 GTH_QUAD: TX_CLK_SEL1_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 14 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 14	GTH_QUAD: DRP[257] bit 15 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 12 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 12	GTH_QUAD: DRP[257] bit 13 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 10 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 10	GTH_QUAD: DRP[257] bit 11 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 8 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 8	GTH_QUAD: DRP[257] bit 9 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 6 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 6	GTH_QUAD: DRP[257] bit 7 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 4 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 4	GTH_QUAD: DRP[257] bit 5 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 2 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 2	GTH_QUAD: DRP[257] bit 3 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[257] bit 0 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 0	GTH_QUAD: DRP[257] bit 1 GTH_QUAD: TX_CLK_SEL0_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 14 GTH_QUAD: TX_PREEMPH_LANE3 bit 14	GTH_QUAD: DRP[256] bit 15 GTH_QUAD: TX_PREEMPH_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 12 GTH_QUAD: TX_PREEMPH_LANE3 bit 12	GTH_QUAD: DRP[256] bit 13 GTH_QUAD: TX_PREEMPH_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 10 GTH_QUAD: TX_PREEMPH_LANE3 bit 10	GTH_QUAD: DRP[256] bit 11 GTH_QUAD: TX_PREEMPH_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 8 GTH_QUAD: TX_PREEMPH_LANE3 bit 8	GTH_QUAD: DRP[256] bit 9 GTH_QUAD: TX_PREEMPH_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 6 GTH_QUAD: TX_PREEMPH_LANE3 bit 6	GTH_QUAD: DRP[256] bit 7 GTH_QUAD: TX_PREEMPH_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 4 GTH_QUAD: TX_PREEMPH_LANE3 bit 4	GTH_QUAD: DRP[256] bit 5 GTH_QUAD: TX_PREEMPH_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 2 GTH_QUAD: TX_PREEMPH_LANE3 bit 2	GTH_QUAD: DRP[256] bit 3 GTH_QUAD: TX_PREEMPH_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[256] bit 0 GTH_QUAD: TX_PREEMPH_LANE3 bit 0	GTH_QUAD: DRP[256] bit 1 GTH_QUAD: TX_PREEMPH_LANE3 bit 1

virtex6 GTH rect MAIN[33]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 14	GTH_QUAD: DRP[271] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 12	GTH_QUAD: DRP[271] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 10	GTH_QUAD: DRP[271] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 8	GTH_QUAD: DRP[271] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 6	GTH_QUAD: DRP[271] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 4	GTH_QUAD: DRP[271] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 2	GTH_QUAD: DRP[271] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[271] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 0	GTH_QUAD: DRP[271] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA1_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 14	GTH_QUAD: DRP[270] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 12	GTH_QUAD: DRP[270] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 10	GTH_QUAD: DRP[270] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 8	GTH_QUAD: DRP[270] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 6	GTH_QUAD: DRP[270] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 4	GTH_QUAD: DRP[270] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 2	GTH_QUAD: DRP[270] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[270] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 0	GTH_QUAD: DRP[270] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA0_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 14 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 14	GTH_QUAD: DRP[269] bit 15 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 12 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 12	GTH_QUAD: DRP[269] bit 13 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 10 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 10	GTH_QUAD: DRP[269] bit 11 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 8 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 8	GTH_QUAD: DRP[269] bit 9 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 6 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 6	GTH_QUAD: DRP[269] bit 7 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 4 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 4	GTH_QUAD: DRP[269] bit 5 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 2 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 2	GTH_QUAD: DRP[269] bit 3 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[269] bit 0 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 0	GTH_QUAD: DRP[269] bit 1 GTH_QUAD: E10GBASEX_PCS_TSTCTRL_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 14 GTH_QUAD: PCS_CTRL2_LANE3 bit 14	GTH_QUAD: DRP[268] bit 15 GTH_QUAD: PCS_CTRL2_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 12 GTH_QUAD: PCS_CTRL2_LANE3 bit 12	GTH_QUAD: DRP[268] bit 13 GTH_QUAD: PCS_CTRL2_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 10 GTH_QUAD: PCS_CTRL2_LANE3 bit 10	GTH_QUAD: DRP[268] bit 11 GTH_QUAD: PCS_CTRL2_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 8 GTH_QUAD: PCS_CTRL2_LANE3 bit 8	GTH_QUAD: DRP[268] bit 9 GTH_QUAD: PCS_CTRL2_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 6 GTH_QUAD: PCS_CTRL2_LANE3 bit 6	GTH_QUAD: DRP[268] bit 7 GTH_QUAD: PCS_CTRL2_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 4 GTH_QUAD: PCS_CTRL2_LANE3 bit 4	GTH_QUAD: DRP[268] bit 5 GTH_QUAD: PCS_CTRL2_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 2 GTH_QUAD: PCS_CTRL2_LANE3 bit 2	GTH_QUAD: DRP[268] bit 3 GTH_QUAD: PCS_CTRL2_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[268] bit 0 GTH_QUAD: PCS_CTRL2_LANE3 bit 0	GTH_QUAD: DRP[268] bit 1 GTH_QUAD: PCS_CTRL2_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 14 GTH_QUAD: PCS_CTRL1_LANE3 bit 14	GTH_QUAD: DRP[267] bit 15 GTH_QUAD: PCS_CTRL1_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 12 GTH_QUAD: PCS_CTRL1_LANE3 bit 12	GTH_QUAD: DRP[267] bit 13 GTH_QUAD: PCS_CTRL1_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 10 GTH_QUAD: PCS_CTRL1_LANE3 bit 10	GTH_QUAD: DRP[267] bit 11 GTH_QUAD: PCS_CTRL1_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 8 GTH_QUAD: PCS_CTRL1_LANE3 bit 8	GTH_QUAD: DRP[267] bit 9 GTH_QUAD: PCS_CTRL1_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 6 GTH_QUAD: PCS_CTRL1_LANE3 bit 6	GTH_QUAD: DRP[267] bit 7 GTH_QUAD: PCS_CTRL1_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 4 GTH_QUAD: PCS_CTRL1_LANE3 bit 4	GTH_QUAD: DRP[267] bit 5 GTH_QUAD: PCS_CTRL1_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 2 GTH_QUAD: PCS_CTRL1_LANE3 bit 2	GTH_QUAD: DRP[267] bit 3 GTH_QUAD: PCS_CTRL1_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[267] bit 0 GTH_QUAD: PCS_CTRL1_LANE3 bit 0	GTH_QUAD: DRP[267] bit 1 GTH_QUAD: PCS_CTRL1_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 14 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 14	GTH_QUAD: DRP[266] bit 15 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 12 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 12	GTH_QUAD: DRP[266] bit 13 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 10 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 10	GTH_QUAD: DRP[266] bit 11 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 8 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 8	GTH_QUAD: DRP[266] bit 9 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 6 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 6	GTH_QUAD: DRP[266] bit 7 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 4 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 4	GTH_QUAD: DRP[266] bit 5 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 2 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 2	GTH_QUAD: DRP[266] bit 3 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[266] bit 0 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 0	GTH_QUAD: DRP[266] bit 1 GTH_QUAD: LNK_TRN_COEFF_REQ_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 14 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 14	GTH_QUAD: DRP[265] bit 15 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 12 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 12	GTH_QUAD: DRP[265] bit 13 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 10 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 10	GTH_QUAD: DRP[265] bit 11 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 8 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 8	GTH_QUAD: DRP[265] bit 9 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 6 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 6	GTH_QUAD: DRP[265] bit 7 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 4 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 4	GTH_QUAD: DRP[265] bit 5 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 2 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 2	GTH_QUAD: DRP[265] bit 3 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[265] bit 0 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 0	GTH_QUAD: DRP[265] bit 1 GTH_QUAD: LNK_TRN_CFG_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 14 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 14	GTH_QUAD: DRP[264] bit 15 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 12 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 12	GTH_QUAD: DRP[264] bit 13 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 10 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 10	GTH_QUAD: DRP[264] bit 11 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 8 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 8	GTH_QUAD: DRP[264] bit 9 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 6 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 6	GTH_QUAD: DRP[264] bit 7 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 4 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 4	GTH_QUAD: DRP[264] bit 5 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 2 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 2	GTH_QUAD: DRP[264] bit 3 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[264] bit 0 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 0	GTH_QUAD: DRP[264] bit 1 GTH_QUAD: RX_CTRL_OVRD_LANE3 bit 1

virtex6 GTH rect MAIN[34]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 14 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 14	GTH_QUAD: DRP[279] bit 15 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 12 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 12	GTH_QUAD: DRP[279] bit 13 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 10 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 10	GTH_QUAD: DRP[279] bit 11 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 8 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 8	GTH_QUAD: DRP[279] bit 9 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 6 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 6	GTH_QUAD: DRP[279] bit 7 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 4 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 4	GTH_QUAD: DRP[279] bit 5 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 2 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 2	GTH_QUAD: DRP[279] bit 3 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[279] bit 0 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 0	GTH_QUAD: DRP[279] bit 1 GTH_QUAD: PCS_MISC_CFG_0_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 14 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 14	GTH_QUAD: DRP[278] bit 15 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 12 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 12	GTH_QUAD: DRP[278] bit 13 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 10 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 10	GTH_QUAD: DRP[278] bit 11 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 8 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 8	GTH_QUAD: DRP[278] bit 9 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 6 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 6	GTH_QUAD: DRP[278] bit 7 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 4 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 4	GTH_QUAD: DRP[278] bit 5 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 2 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 2	GTH_QUAD: DRP[278] bit 3 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[278] bit 0 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 0	GTH_QUAD: DRP[278] bit 1 GTH_QUAD: E10GBASER_PCS_TEST_CTRL_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 14	GTH_QUAD: DRP[277] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 12	GTH_QUAD: DRP[277] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 10	GTH_QUAD: DRP[277] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 8	GTH_QUAD: DRP[277] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 6	GTH_QUAD: DRP[277] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 4	GTH_QUAD: DRP[277] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 2	GTH_QUAD: DRP[277] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[277] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 0	GTH_QUAD: DRP[277] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB3_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 14	GTH_QUAD: DRP[276] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 12	GTH_QUAD: DRP[276] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 10	GTH_QUAD: DRP[276] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 8	GTH_QUAD: DRP[276] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 6	GTH_QUAD: DRP[276] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 4	GTH_QUAD: DRP[276] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 2	GTH_QUAD: DRP[276] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[276] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 0	GTH_QUAD: DRP[276] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB2_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 14	GTH_QUAD: DRP[275] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 12	GTH_QUAD: DRP[275] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 10	GTH_QUAD: DRP[275] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 8	GTH_QUAD: DRP[275] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 6	GTH_QUAD: DRP[275] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 4	GTH_QUAD: DRP[275] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 2	GTH_QUAD: DRP[275] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[275] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 0	GTH_QUAD: DRP[275] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB1_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 14	GTH_QUAD: DRP[274] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 12	GTH_QUAD: DRP[274] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 10	GTH_QUAD: DRP[274] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 8	GTH_QUAD: DRP[274] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 6	GTH_QUAD: DRP[274] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 4	GTH_QUAD: DRP[274] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 2	GTH_QUAD: DRP[274] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[274] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 0	GTH_QUAD: DRP[274] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDB0_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 14	GTH_QUAD: DRP[273] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 12	GTH_QUAD: DRP[273] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 10	GTH_QUAD: DRP[273] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 8	GTH_QUAD: DRP[273] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 6	GTH_QUAD: DRP[273] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 4	GTH_QUAD: DRP[273] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 2	GTH_QUAD: DRP[273] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[273] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 0	GTH_QUAD: DRP[273] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA3_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 14 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 14	GTH_QUAD: DRP[272] bit 15 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 12 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 12	GTH_QUAD: DRP[272] bit 13 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 10 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 10	GTH_QUAD: DRP[272] bit 11 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 8 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 8	GTH_QUAD: DRP[272] bit 9 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 6 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 6	GTH_QUAD: DRP[272] bit 7 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 4 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 4	GTH_QUAD: DRP[272] bit 5 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 2 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 2	GTH_QUAD: DRP[272] bit 3 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[272] bit 0 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 0	GTH_QUAD: DRP[272] bit 1 GTH_QUAD: E10GBASER_PCS_SEEDA2_LANE3 bit 1

virtex6 GTH rect MAIN[35]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 14 GTH_QUAD: PCS_TYPE_LANE3 bit 14	GTH_QUAD: DRP[287] bit 15 GTH_QUAD: PCS_TYPE_LANE3 bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 12 GTH_QUAD: PCS_TYPE_LANE3 bit 12	GTH_QUAD: DRP[287] bit 13 GTH_QUAD: PCS_TYPE_LANE3 bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 10 GTH_QUAD: PCS_TYPE_LANE3 bit 10	GTH_QUAD: DRP[287] bit 11 GTH_QUAD: PCS_TYPE_LANE3 bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 8 GTH_QUAD: PCS_TYPE_LANE3 bit 8	GTH_QUAD: DRP[287] bit 9 GTH_QUAD: PCS_TYPE_LANE3 bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 6 GTH_QUAD: PCS_TYPE_LANE3 bit 6	GTH_QUAD: DRP[287] bit 7 GTH_QUAD: PCS_TYPE_LANE3 bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 4 GTH_QUAD: PCS_TYPE_LANE3 bit 4	GTH_QUAD: DRP[287] bit 5 GTH_QUAD: PCS_TYPE_LANE3 bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 2 GTH_QUAD: PCS_TYPE_LANE3 bit 2	GTH_QUAD: DRP[287] bit 3 GTH_QUAD: PCS_TYPE_LANE3 bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[287] bit 0 GTH_QUAD: PCS_TYPE_LANE3 bit 0	GTH_QUAD: DRP[287] bit 1 GTH_QUAD: PCS_TYPE_LANE3 bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 14 GTH_QUAD: PCS_ABILITY_LANE3 bit 14	GTH_QUAD: DRP[286] bit 15 GTH_QUAD: PCS_ABILITY_LANE3 bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 12 GTH_QUAD: PCS_ABILITY_LANE3 bit 12	GTH_QUAD: DRP[286] bit 13 GTH_QUAD: PCS_ABILITY_LANE3 bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 10 GTH_QUAD: PCS_ABILITY_LANE3 bit 10	GTH_QUAD: DRP[286] bit 11 GTH_QUAD: PCS_ABILITY_LANE3 bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 8 GTH_QUAD: PCS_ABILITY_LANE3 bit 8	GTH_QUAD: DRP[286] bit 9 GTH_QUAD: PCS_ABILITY_LANE3 bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 6 GTH_QUAD: PCS_ABILITY_LANE3 bit 6	GTH_QUAD: DRP[286] bit 7 GTH_QUAD: PCS_ABILITY_LANE3 bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 4 GTH_QUAD: PCS_ABILITY_LANE3 bit 4	GTH_QUAD: DRP[286] bit 5 GTH_QUAD: PCS_ABILITY_LANE3 bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 2 GTH_QUAD: PCS_ABILITY_LANE3 bit 2	GTH_QUAD: DRP[286] bit 3 GTH_QUAD: PCS_ABILITY_LANE3 bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[286] bit 0 GTH_QUAD: PCS_ABILITY_LANE3 bit 0	GTH_QUAD: DRP[286] bit 1 GTH_QUAD: PCS_ABILITY_LANE3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 14 GTH_QUAD: PCS_RESET_1_LANE3 bit 14	GTH_QUAD: DRP[285] bit 15 GTH_QUAD: PCS_RESET_1_LANE3 bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 12 GTH_QUAD: PCS_RESET_1_LANE3 bit 12	GTH_QUAD: DRP[285] bit 13 GTH_QUAD: PCS_RESET_1_LANE3 bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 10 GTH_QUAD: PCS_RESET_1_LANE3 bit 10	GTH_QUAD: DRP[285] bit 11 GTH_QUAD: PCS_RESET_1_LANE3 bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 8 GTH_QUAD: PCS_RESET_1_LANE3 bit 8	GTH_QUAD: DRP[285] bit 9 GTH_QUAD: PCS_RESET_1_LANE3 bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 6 GTH_QUAD: PCS_RESET_1_LANE3 bit 6	GTH_QUAD: DRP[285] bit 7 GTH_QUAD: PCS_RESET_1_LANE3 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 4 GTH_QUAD: PCS_RESET_1_LANE3 bit 4	GTH_QUAD: DRP[285] bit 5 GTH_QUAD: PCS_RESET_1_LANE3 bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 2 GTH_QUAD: PCS_RESET_1_LANE3 bit 2	GTH_QUAD: DRP[285] bit 3 GTH_QUAD: PCS_RESET_1_LANE3 bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[285] bit 0 GTH_QUAD: PCS_RESET_1_LANE3 bit 0	GTH_QUAD: DRP[285] bit 1 GTH_QUAD: PCS_RESET_1_LANE3 bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 14 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 14	GTH_QUAD: DRP[284] bit 15 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 12 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 12	GTH_QUAD: DRP[284] bit 13 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 10 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 10	GTH_QUAD: DRP[284] bit 11 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 8 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 8	GTH_QUAD: DRP[284] bit 9 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 6 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 6	GTH_QUAD: DRP[284] bit 7 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 4 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 4	GTH_QUAD: DRP[284] bit 5 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 2 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 2	GTH_QUAD: DRP[284] bit 3 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[284] bit 0 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 0	GTH_QUAD: DRP[284] bit 1 GTH_QUAD: PCS_MISC_CFG_1_LANE3 bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 14 GTH_QUAD: PRBS_CFG_LANE3 bit 14	GTH_QUAD: DRP[283] bit 15 GTH_QUAD: PRBS_CFG_LANE3 bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 12 GTH_QUAD: PRBS_CFG_LANE3 bit 12	GTH_QUAD: DRP[283] bit 13 GTH_QUAD: PRBS_CFG_LANE3 bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 10 GTH_QUAD: PRBS_CFG_LANE3 bit 10	GTH_QUAD: DRP[283] bit 11 GTH_QUAD: PRBS_CFG_LANE3 bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 8 GTH_QUAD: PRBS_CFG_LANE3 bit 8	GTH_QUAD: DRP[283] bit 9 GTH_QUAD: PRBS_CFG_LANE3 bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 6 GTH_QUAD: PRBS_CFG_LANE3 bit 6	GTH_QUAD: DRP[283] bit 7 GTH_QUAD: PRBS_CFG_LANE3 bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 4 GTH_QUAD: PRBS_CFG_LANE3 bit 4	GTH_QUAD: DRP[283] bit 5 GTH_QUAD: PRBS_CFG_LANE3 bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 2 GTH_QUAD: PRBS_CFG_LANE3 bit 2	GTH_QUAD: DRP[283] bit 3 GTH_QUAD: PRBS_CFG_LANE3 bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[283] bit 0 GTH_QUAD: PRBS_CFG_LANE3 bit 0	GTH_QUAD: DRP[283] bit 1 GTH_QUAD: PRBS_CFG_LANE3 bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 14 GTH_QUAD: PCS_RESET_LANE3 bit 14	GTH_QUAD: DRP[282] bit 15 GTH_QUAD: PCS_RESET_LANE3 bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 12 GTH_QUAD: PCS_RESET_LANE3 bit 12	GTH_QUAD: DRP[282] bit 13 GTH_QUAD: PCS_RESET_LANE3 bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 10 GTH_QUAD: PCS_RESET_LANE3 bit 10	GTH_QUAD: DRP[282] bit 11 GTH_QUAD: PCS_RESET_LANE3 bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 8 GTH_QUAD: PCS_RESET_LANE3 bit 8	GTH_QUAD: DRP[282] bit 9 GTH_QUAD: PCS_RESET_LANE3 bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 6 GTH_QUAD: PCS_RESET_LANE3 bit 6	GTH_QUAD: DRP[282] bit 7 GTH_QUAD: PCS_RESET_LANE3 bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 4 GTH_QUAD: PCS_RESET_LANE3 bit 4	GTH_QUAD: DRP[282] bit 5 GTH_QUAD: PCS_RESET_LANE3 bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 2 GTH_QUAD: PCS_RESET_LANE3 bit 2	GTH_QUAD: DRP[282] bit 3 GTH_QUAD: PCS_RESET_LANE3 bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[282] bit 0 GTH_QUAD: PCS_RESET_LANE3 bit 0	GTH_QUAD: DRP[282] bit 1 GTH_QUAD: PCS_RESET_LANE3 bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 14 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 14	GTH_QUAD: DRP[281] bit 15 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 12 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 12	GTH_QUAD: DRP[281] bit 13 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 10 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 10	GTH_QUAD: DRP[281] bit 11 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 8 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 8	GTH_QUAD: DRP[281] bit 9 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 6 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 6	GTH_QUAD: DRP[281] bit 7 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 4 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 4	GTH_QUAD: DRP[281] bit 5 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 2 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 2	GTH_QUAD: DRP[281] bit 3 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[281] bit 0 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 0	GTH_QUAD: DRP[281] bit 1 GTH_QUAD: PRBS_BER_CFG1_LANE3 bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 14 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 14	GTH_QUAD: DRP[280] bit 15 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 12 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 12	GTH_QUAD: DRP[280] bit 13 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 10 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 10	GTH_QUAD: DRP[280] bit 11 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 8 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 8	GTH_QUAD: DRP[280] bit 9 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 6 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 6	GTH_QUAD: DRP[280] bit 7 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 4 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 4	GTH_QUAD: DRP[280] bit 5 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 2 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 2	GTH_QUAD: DRP[280] bit 3 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[280] bit 0 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 0	GTH_QUAD: DRP[280] bit 1 GTH_QUAD: PRBS_BER_CFG0_LANE3 bit 1

virtex6 GTH rect MAIN[36]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 14	GTH_QUAD: DRP[295] bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 12	GTH_QUAD: DRP[295] bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 10	GTH_QUAD: DRP[295] bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 8	GTH_QUAD: DRP[295] bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 6	GTH_QUAD: DRP[295] bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 4	GTH_QUAD: DRP[295] bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 2	GTH_QUAD: DRP[295] bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[295] bit 0	GTH_QUAD: DRP[295] bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 14	GTH_QUAD: DRP[294] bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 12	GTH_QUAD: DRP[294] bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 10	GTH_QUAD: DRP[294] bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 8	GTH_QUAD: DRP[294] bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 6	GTH_QUAD: DRP[294] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 4	GTH_QUAD: DRP[294] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 2	GTH_QUAD: DRP[294] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[294] bit 0	GTH_QUAD: DRP[294] bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 14	GTH_QUAD: DRP[293] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 12	GTH_QUAD: DRP[293] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 10	GTH_QUAD: DRP[293] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 8	GTH_QUAD: DRP[293] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 6	GTH_QUAD: DRP[293] bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 4	GTH_QUAD: DRP[293] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 2	GTH_QUAD: DRP[293] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[293] bit 0	GTH_QUAD: DRP[293] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 14	GTH_QUAD: DRP[292] bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 12	GTH_QUAD: DRP[292] bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 10	GTH_QUAD: DRP[292] bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 8	GTH_QUAD: DRP[292] bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 6	GTH_QUAD: DRP[292] bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 4	GTH_QUAD: DRP[292] bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 2	GTH_QUAD: DRP[292] bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[292] bit 0	GTH_QUAD: DRP[292] bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 14	GTH_QUAD: DRP[291] bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 12	GTH_QUAD: DRP[291] bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 10	GTH_QUAD: DRP[291] bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 8	GTH_QUAD: DRP[291] bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 6	GTH_QUAD: DRP[291] bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 4	GTH_QUAD: DRP[291] bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 2	GTH_QUAD: DRP[291] bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[291] bit 0	GTH_QUAD: DRP[291] bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 14	GTH_QUAD: DRP[290] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 12	GTH_QUAD: DRP[290] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 10	GTH_QUAD: DRP[290] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 8	GTH_QUAD: DRP[290] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 6	GTH_QUAD: DRP[290] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 4	GTH_QUAD: DRP[290] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 2	GTH_QUAD: DRP[290] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[290] bit 0	GTH_QUAD: DRP[290] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 14	GTH_QUAD: DRP[289] bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 12	GTH_QUAD: DRP[289] bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 10	GTH_QUAD: DRP[289] bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 8	GTH_QUAD: DRP[289] bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 6	GTH_QUAD: DRP[289] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 4	GTH_QUAD: DRP[289] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 2	GTH_QUAD: DRP[289] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[289] bit 0	GTH_QUAD: DRP[289] bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 14 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 14	GTH_QUAD: DRP[288] bit 15 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 12 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 12	GTH_QUAD: DRP[288] bit 13 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 10 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 10	GTH_QUAD: DRP[288] bit 11 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 8 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 8	GTH_QUAD: DRP[288] bit 9 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 6 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 6	GTH_QUAD: DRP[288] bit 7 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 4 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 4	GTH_QUAD: DRP[288] bit 5 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 2 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 2	GTH_QUAD: DRP[288] bit 3 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[288] bit 0 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 0	GTH_QUAD: DRP[288] bit 1 GTH_QUAD: E10GBASER_PCS_CFG_LANE3 bit 1

virtex6 GTH rect MAIN[37]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 14	GTH_QUAD: DRP[303] bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 12	GTH_QUAD: DRP[303] bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 10	GTH_QUAD: DRP[303] bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 8	GTH_QUAD: DRP[303] bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 6	GTH_QUAD: DRP[303] bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 4	GTH_QUAD: DRP[303] bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 2	GTH_QUAD: DRP[303] bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[303] bit 0	GTH_QUAD: DRP[303] bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 14	GTH_QUAD: DRP[302] bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 12	GTH_QUAD: DRP[302] bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 10	GTH_QUAD: DRP[302] bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 8	GTH_QUAD: DRP[302] bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 6	GTH_QUAD: DRP[302] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 4	GTH_QUAD: DRP[302] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 2	GTH_QUAD: DRP[302] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[302] bit 0	GTH_QUAD: DRP[302] bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 14	GTH_QUAD: DRP[301] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 12	GTH_QUAD: DRP[301] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 10	GTH_QUAD: DRP[301] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 8	GTH_QUAD: DRP[301] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 6	GTH_QUAD: DRP[301] bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 4	GTH_QUAD: DRP[301] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 2	GTH_QUAD: DRP[301] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[301] bit 0	GTH_QUAD: DRP[301] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 14	GTH_QUAD: DRP[300] bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 12	GTH_QUAD: DRP[300] bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 10	GTH_QUAD: DRP[300] bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 8	GTH_QUAD: DRP[300] bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 6	GTH_QUAD: DRP[300] bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 4	GTH_QUAD: DRP[300] bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 2	GTH_QUAD: DRP[300] bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[300] bit 0	GTH_QUAD: DRP[300] bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 14	GTH_QUAD: DRP[299] bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 12	GTH_QUAD: DRP[299] bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 10	GTH_QUAD: DRP[299] bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 8	GTH_QUAD: DRP[299] bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 6	GTH_QUAD: DRP[299] bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 4	GTH_QUAD: DRP[299] bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 2	GTH_QUAD: DRP[299] bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[299] bit 0	GTH_QUAD: DRP[299] bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 14	GTH_QUAD: DRP[298] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 12	GTH_QUAD: DRP[298] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 10	GTH_QUAD: DRP[298] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 8	GTH_QUAD: DRP[298] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 6	GTH_QUAD: DRP[298] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 4	GTH_QUAD: DRP[298] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 2	GTH_QUAD: DRP[298] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[298] bit 0	GTH_QUAD: DRP[298] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 14	GTH_QUAD: DRP[297] bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 12	GTH_QUAD: DRP[297] bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 10	GTH_QUAD: DRP[297] bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 8	GTH_QUAD: DRP[297] bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 6	GTH_QUAD: DRP[297] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 4	GTH_QUAD: DRP[297] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 2	GTH_QUAD: DRP[297] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[297] bit 0	GTH_QUAD: DRP[297] bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 14	GTH_QUAD: DRP[296] bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 12	GTH_QUAD: DRP[296] bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 10	GTH_QUAD: DRP[296] bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 8	GTH_QUAD: DRP[296] bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 6	GTH_QUAD: DRP[296] bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 4	GTH_QUAD: DRP[296] bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 2	GTH_QUAD: DRP[296] bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[296] bit 0	GTH_QUAD: DRP[296] bit 1

virtex6 GTH rect MAIN[38]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 14	GTH_QUAD: DRP[311] bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 12	GTH_QUAD: DRP[311] bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 10	GTH_QUAD: DRP[311] bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 8	GTH_QUAD: DRP[311] bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 6	GTH_QUAD: DRP[311] bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 4	GTH_QUAD: DRP[311] bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 2	GTH_QUAD: DRP[311] bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[311] bit 0	GTH_QUAD: DRP[311] bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 14	GTH_QUAD: DRP[310] bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 12	GTH_QUAD: DRP[310] bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 10	GTH_QUAD: DRP[310] bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 8	GTH_QUAD: DRP[310] bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 6	GTH_QUAD: DRP[310] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 4	GTH_QUAD: DRP[310] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 2	GTH_QUAD: DRP[310] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[310] bit 0	GTH_QUAD: DRP[310] bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 14	GTH_QUAD: DRP[309] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 12	GTH_QUAD: DRP[309] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 10	GTH_QUAD: DRP[309] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 8	GTH_QUAD: DRP[309] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 6	GTH_QUAD: DRP[309] bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 4	GTH_QUAD: DRP[309] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 2	GTH_QUAD: DRP[309] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[309] bit 0	GTH_QUAD: DRP[309] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 14	GTH_QUAD: DRP[308] bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 12	GTH_QUAD: DRP[308] bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 10	GTH_QUAD: DRP[308] bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 8	GTH_QUAD: DRP[308] bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 6	GTH_QUAD: DRP[308] bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 4	GTH_QUAD: DRP[308] bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 2	GTH_QUAD: DRP[308] bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[308] bit 0	GTH_QUAD: DRP[308] bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 14	GTH_QUAD: DRP[307] bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 12	GTH_QUAD: DRP[307] bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 10	GTH_QUAD: DRP[307] bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 8	GTH_QUAD: DRP[307] bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 6	GTH_QUAD: DRP[307] bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 4	GTH_QUAD: DRP[307] bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 2	GTH_QUAD: DRP[307] bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[307] bit 0	GTH_QUAD: DRP[307] bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 14	GTH_QUAD: DRP[306] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 12	GTH_QUAD: DRP[306] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 10	GTH_QUAD: DRP[306] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 8	GTH_QUAD: DRP[306] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 6	GTH_QUAD: DRP[306] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 4	GTH_QUAD: DRP[306] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 2	GTH_QUAD: DRP[306] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[306] bit 0	GTH_QUAD: DRP[306] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 14	GTH_QUAD: DRP[305] bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 12	GTH_QUAD: DRP[305] bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 10	GTH_QUAD: DRP[305] bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 8	GTH_QUAD: DRP[305] bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 6	GTH_QUAD: DRP[305] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 4	GTH_QUAD: DRP[305] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 2	GTH_QUAD: DRP[305] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[305] bit 0	GTH_QUAD: DRP[305] bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 14	GTH_QUAD: DRP[304] bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 12	GTH_QUAD: DRP[304] bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 10	GTH_QUAD: DRP[304] bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 8	GTH_QUAD: DRP[304] bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 6	GTH_QUAD: DRP[304] bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 4	GTH_QUAD: DRP[304] bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 2	GTH_QUAD: DRP[304] bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[304] bit 0	GTH_QUAD: DRP[304] bit 1

virtex6 GTH rect MAIN[39]
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 14	GTH_QUAD: DRP[319] bit 15
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 12	GTH_QUAD: DRP[319] bit 13
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 10	GTH_QUAD: DRP[319] bit 11
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 8	GTH_QUAD: DRP[319] bit 9
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 6	GTH_QUAD: DRP[319] bit 7
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 4	GTH_QUAD: DRP[319] bit 5
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 2	GTH_QUAD: DRP[319] bit 3
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[319] bit 0	GTH_QUAD: DRP[319] bit 1
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 14	GTH_QUAD: DRP[318] bit 15
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 12	GTH_QUAD: DRP[318] bit 13
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 10	GTH_QUAD: DRP[318] bit 11
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 8	GTH_QUAD: DRP[318] bit 9
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 6	GTH_QUAD: DRP[318] bit 7
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 4	GTH_QUAD: DRP[318] bit 5
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 2	GTH_QUAD: DRP[318] bit 3
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[318] bit 0	GTH_QUAD: DRP[318] bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 14	GTH_QUAD: DRP[317] bit 15
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 12	GTH_QUAD: DRP[317] bit 13
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 10	GTH_QUAD: DRP[317] bit 11
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 8	GTH_QUAD: DRP[317] bit 9
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 6	GTH_QUAD: DRP[317] bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 4	GTH_QUAD: DRP[317] bit 5
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 2	GTH_QUAD: DRP[317] bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[317] bit 0	GTH_QUAD: DRP[317] bit 1
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 14	GTH_QUAD: DRP[316] bit 15
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 12	GTH_QUAD: DRP[316] bit 13
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 10	GTH_QUAD: DRP[316] bit 11
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 8	GTH_QUAD: DRP[316] bit 9
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 6	GTH_QUAD: DRP[316] bit 7
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 4	GTH_QUAD: DRP[316] bit 5
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 2	GTH_QUAD: DRP[316] bit 3
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[316] bit 0	GTH_QUAD: DRP[316] bit 1
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 14	GTH_QUAD: DRP[315] bit 15
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 12	GTH_QUAD: DRP[315] bit 13
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 10	GTH_QUAD: DRP[315] bit 11
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 8	GTH_QUAD: DRP[315] bit 9
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 6	GTH_QUAD: DRP[315] bit 7
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 4	GTH_QUAD: DRP[315] bit 5
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 2	GTH_QUAD: DRP[315] bit 3
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[315] bit 0	GTH_QUAD: DRP[315] bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 14	GTH_QUAD: DRP[314] bit 15
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 12	GTH_QUAD: DRP[314] bit 13
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 10	GTH_QUAD: DRP[314] bit 11
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 8	GTH_QUAD: DRP[314] bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 6	GTH_QUAD: DRP[314] bit 7
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 4	GTH_QUAD: DRP[314] bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 2	GTH_QUAD: DRP[314] bit 3
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[314] bit 0	GTH_QUAD: DRP[314] bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 14	GTH_QUAD: DRP[313] bit 15
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 12	GTH_QUAD: DRP[313] bit 13
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 10	GTH_QUAD: DRP[313] bit 11
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 8	GTH_QUAD: DRP[313] bit 9
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 6	GTH_QUAD: DRP[313] bit 7
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 4	GTH_QUAD: DRP[313] bit 5
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 2	GTH_QUAD: DRP[313] bit 3
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[313] bit 0	GTH_QUAD: DRP[313] bit 1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 14	GTH_QUAD: DRP[312] bit 15
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 12	GTH_QUAD: DRP[312] bit 13
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 10	GTH_QUAD: DRP[312] bit 11
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 8	GTH_QUAD: DRP[312] bit 9
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 6	GTH_QUAD: DRP[312] bit 7
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 4	GTH_QUAD: DRP[312] bit 5
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 2	GTH_QUAD: DRP[312] bit 3
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTH_QUAD: DRP[312] bit 0	GTH_QUAD: DRP[312] bit 1

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