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PCI Express cores

Tile PCIE

Cells: 40 IRIs: 0

Bel PCIE

virtex6 PCIE bel PCIE
PinDirectionWires
CFGAERECRCCHECKENoutputTCELL10:OUT18
CFGAERECRCGENENoutputTCELL10:OUT19
CFGBYTEENN0inputTCELL16:IMUX.IMUX15
CFGBYTEENN1inputTCELL16:IMUX.IMUX16
CFGBYTEENN2inputTCELL15:IMUX.IMUX15
CFGBYTEENN3inputTCELL15:IMUX.IMUX16
CFGCOMMANDBUSMASTERENABLEoutputTCELL0:OUT15
CFGCOMMANDINTERRUPTDISABLEoutputTCELL21:OUT16
CFGCOMMANDIOENABLEoutputTCELL0:OUT13
CFGCOMMANDMEMENABLEoutputTCELL0:OUT14
CFGCOMMANDSERRENoutputTCELL0:OUT17
CFGDEVCONTROL2CPLTIMEOUTDISoutputTCELL10:OUT16
CFGDEVCONTROL2CPLTIMEOUTVAL0outputTCELL11:OUT16
CFGDEVCONTROL2CPLTIMEOUTVAL1outputTCELL11:OUT17
CFGDEVCONTROL2CPLTIMEOUTVAL2outputTCELL11:OUT19
CFGDEVCONTROL2CPLTIMEOUTVAL3outputTCELL11:OUT20
CFGDEVCONTROLAUXPOWERENoutputTCELL31:OUT17
CFGDEVCONTROLCORRERRREPORTINGENoutputTCELL23:OUT16
CFGDEVCONTROLENABLEROoutputTCELL29:OUT17
CFGDEVCONTROLEXTTAGENoutputTCELL30:OUT18
CFGDEVCONTROLFATALERRREPORTINGENoutputTCELL23:OUT18
CFGDEVCONTROLMAXPAYLOAD0outputTCELL29:OUT18
CFGDEVCONTROLMAXPAYLOAD1outputTCELL30:OUT16
CFGDEVCONTROLMAXPAYLOAD2outputTCELL30:OUT17
CFGDEVCONTROLMAXREADREQ0outputTCELL32:OUT17
CFGDEVCONTROLMAXREADREQ1outputTCELL32:OUT18
CFGDEVCONTROLMAXREADREQ2outputTCELL33:OUT16
CFGDEVCONTROLNONFATALREPORTINGENoutputTCELL23:OUT17
CFGDEVCONTROLNOSNOOPENoutputTCELL32:OUT16
CFGDEVCONTROLPHANTOMENoutputTCELL31:OUT16
CFGDEVCONTROLURERRREPORTINGENoutputTCELL29:OUT16
CFGDEVSTATUSCORRERRDETECTEDoutputTCELL21:OUT17
CFGDEVSTATUSFATALERRDETECTEDoutputTCELL22:OUT17
CFGDEVSTATUSNONFATALERRDETECTEDoutputTCELL22:OUT16
CFGDEVSTATUSURDETECTEDoutputTCELL22:OUT18
CFGDI0inputTCELL14:IMUX.IMUX14
CFGDI1inputTCELL14:IMUX.IMUX16
CFGDI10inputTCELL17:IMUX.IMUX9
CFGDI11inputTCELL17:IMUX.IMUX10
CFGDI12inputTCELL17:IMUX.IMUX11
CFGDI13inputTCELL17:IMUX.IMUX12
CFGDI14inputTCELL18:IMUX.IMUX9
CFGDI15inputTCELL18:IMUX.IMUX10
CFGDI16inputTCELL18:IMUX.IMUX11
CFGDI17inputTCELL18:IMUX.IMUX12
CFGDI18inputTCELL19:IMUX.IMUX9
CFGDI19inputTCELL19:IMUX.IMUX10
CFGDI2inputTCELL15:IMUX.IMUX10
CFGDI20inputTCELL19:IMUX.IMUX11
CFGDI21inputTCELL19:IMUX.IMUX12
CFGDI22inputTCELL18:IMUX.IMUX13
CFGDI23inputTCELL18:IMUX.IMUX14
CFGDI24inputTCELL18:IMUX.IMUX15
CFGDI25inputTCELL18:IMUX.IMUX16
CFGDI26inputTCELL17:IMUX.IMUX13
CFGDI27inputTCELL17:IMUX.IMUX14
CFGDI28inputTCELL17:IMUX.IMUX15
CFGDI29inputTCELL17:IMUX.IMUX16
CFGDI3inputTCELL15:IMUX.IMUX12
CFGDI30inputTCELL16:IMUX.IMUX13
CFGDI31inputTCELL16:IMUX.IMUX14
CFGDI4inputTCELL15:IMUX.IMUX13
CFGDI5inputTCELL15:IMUX.IMUX14
CFGDI6inputTCELL16:IMUX.IMUX9
CFGDI7inputTCELL16:IMUX.IMUX10
CFGDI8inputTCELL16:IMUX.IMUX11
CFGDI9inputTCELL16:IMUX.IMUX12
CFGDO0outputTCELL22:OUT15
CFGDO1outputTCELL23:OUT12
CFGDO10outputTCELL29:OUT12
CFGDO11outputTCELL29:OUT13
CFGDO12outputTCELL29:OUT14
CFGDO13outputTCELL29:OUT15
CFGDO14outputTCELL30:OUT12
CFGDO15outputTCELL30:OUT13
CFGDO16outputTCELL30:OUT14
CFGDO17outputTCELL30:OUT15
CFGDO18outputTCELL31:OUT12
CFGDO19outputTCELL31:OUT13
CFGDO2outputTCELL23:OUT13
CFGDO20outputTCELL31:OUT14
CFGDO21outputTCELL31:OUT15
CFGDO22outputTCELL32:OUT12
CFGDO23outputTCELL32:OUT13
CFGDO24outputTCELL32:OUT14
CFGDO25outputTCELL32:OUT15
CFGDO26outputTCELL33:OUT12
CFGDO27outputTCELL33:OUT13
CFGDO28outputTCELL33:OUT14
CFGDO29outputTCELL33:OUT15
CFGDO3outputTCELL23:OUT14
CFGDO30outputTCELL34:OUT14
CFGDO31outputTCELL35:OUT12
CFGDO4outputTCELL23:OUT15
CFGDO5outputTCELL24:OUT14
CFGDO6outputTCELL25:OUT12
CFGDO7outputTCELL26:OUT8
CFGDO8outputTCELL27:OUT4
CFGDO9outputTCELL28:OUT4
CFGDSBUSNUMBER0inputTCELL0:IMUX.IMUX10
CFGDSBUSNUMBER1inputTCELL0:IMUX.IMUX12
CFGDSBUSNUMBER2inputTCELL0:IMUX.IMUX14
CFGDSBUSNUMBER3inputTCELL0:IMUX.IMUX16
CFGDSBUSNUMBER4inputTCELL20:IMUX.IMUX10
CFGDSBUSNUMBER5inputTCELL20:IMUX.IMUX12
CFGDSBUSNUMBER6inputTCELL20:IMUX.IMUX14
CFGDSBUSNUMBER7inputTCELL20:IMUX.IMUX16
CFGDSDEVICENUMBER0inputTCELL21:IMUX.IMUX10
CFGDSDEVICENUMBER1inputTCELL21:IMUX.IMUX12
CFGDSDEVICENUMBER2inputTCELL21:IMUX.IMUX14
CFGDSDEVICENUMBER3inputTCELL21:IMUX.IMUX16
CFGDSDEVICENUMBER4inputTCELL22:IMUX.IMUX14
CFGDSFUNCTIONNUMBER0inputTCELL22:IMUX.IMUX16
CFGDSFUNCTIONNUMBER1inputTCELL22:IMUX.IMUX18
CFGDSFUNCTIONNUMBER2inputTCELL22:IMUX.IMUX19
CFGDSN0inputTCELL26:IMUX.IMUX19
CFGDSN1inputTCELL27:IMUX.IMUX16
CFGDSN10inputTCELL29:IMUX.IMUX17
CFGDSN11inputTCELL29:IMUX.IMUX18
CFGDSN12inputTCELL29:IMUX.IMUX19
CFGDSN13inputTCELL33:IMUX.IMUX14
CFGDSN14inputTCELL33:IMUX.IMUX16
CFGDSN15inputTCELL33:IMUX.IMUX17
CFGDSN16inputTCELL33:IMUX.IMUX18
CFGDSN17inputTCELL34:IMUX.IMUX18
CFGDSN18inputTCELL35:IMUX.IMUX15
CFGDSN19inputTCELL35:IMUX.IMUX16
CFGDSN2inputTCELL27:IMUX.IMUX17
CFGDSN20inputTCELL35:IMUX.IMUX17
CFGDSN21inputTCELL35:IMUX.IMUX18
CFGDSN22inputTCELL36:IMUX.IMUX13
CFGDSN23inputTCELL36:IMUX.IMUX14
CFGDSN24inputTCELL36:IMUX.IMUX15
CFGDSN25inputTCELL36:IMUX.IMUX16
CFGDSN26inputTCELL37:IMUX.IMUX13
CFGDSN27inputTCELL37:IMUX.IMUX14
CFGDSN28inputTCELL37:IMUX.IMUX15
CFGDSN29inputTCELL37:IMUX.IMUX16
CFGDSN3inputTCELL27:IMUX.IMUX18
CFGDSN30inputTCELL38:IMUX.IMUX13
CFGDSN31inputTCELL38:IMUX.IMUX14
CFGDSN32inputTCELL38:IMUX.IMUX15
CFGDSN33inputTCELL38:IMUX.IMUX16
CFGDSN34inputTCELL39:IMUX.IMUX13
CFGDSN35inputTCELL39:IMUX.IMUX14
CFGDSN36inputTCELL39:IMUX.IMUX15
CFGDSN37inputTCELL39:IMUX.IMUX16
CFGDSN38inputTCELL19:IMUX.IMUX17
CFGDSN39inputTCELL19:IMUX.IMUX18
CFGDSN4inputTCELL27:IMUX.IMUX19
CFGDSN40inputTCELL19:IMUX.IMUX19
CFGDSN41inputTCELL19:IMUX.IMUX20
CFGDSN42inputTCELL18:IMUX.IMUX21
CFGDSN43inputTCELL17:IMUX.IMUX21
CFGDSN44inputTCELL16:IMUX.IMUX21
CFGDSN45inputTCELL13:IMUX.IMUX18
CFGDSN46inputTCELL9:IMUX.IMUX16
CFGDSN47inputTCELL9:IMUX.IMUX17
CFGDSN48inputTCELL9:IMUX.IMUX18
CFGDSN49inputTCELL9:IMUX.IMUX19
CFGDSN5inputTCELL28:IMUX.IMUX16
CFGDSN50inputTCELL8:IMUX.IMUX16
CFGDSN51inputTCELL8:IMUX.IMUX17
CFGDSN52inputTCELL8:IMUX.IMUX18
CFGDSN53inputTCELL8:IMUX.IMUX19
CFGDSN54inputTCELL7:IMUX.IMUX16
CFGDSN55inputTCELL7:IMUX.IMUX17
CFGDSN56inputTCELL7:IMUX.IMUX18
CFGDSN57inputTCELL7:IMUX.IMUX19
CFGDSN58inputTCELL6:IMUX.IMUX16
CFGDSN59inputTCELL6:IMUX.IMUX17
CFGDSN6inputTCELL28:IMUX.IMUX17
CFGDSN60inputTCELL6:IMUX.IMUX18
CFGDSN61inputTCELL6:IMUX.IMUX19
CFGDSN62inputTCELL5:IMUX.IMUX18
CFGDSN63inputTCELL3:IMUX.IMUX18
CFGDSN7inputTCELL28:IMUX.IMUX18
CFGDSN8inputTCELL28:IMUX.IMUX19
CFGDSN9inputTCELL29:IMUX.IMUX16
CFGDWADDR0inputTCELL15:IMUX.IMUX17
CFGDWADDR1inputTCELL15:IMUX.IMUX18
CFGDWADDR2inputTCELL14:IMUX.IMUX17
CFGDWADDR3inputTCELL14:IMUX.IMUX18
CFGDWADDR4inputTCELL13:IMUX.IMUX9
CFGDWADDR5inputTCELL13:IMUX.IMUX10
CFGDWADDR6inputTCELL13:IMUX.IMUX11
CFGDWADDR7inputTCELL13:IMUX.IMUX12
CFGDWADDR8inputTCELL12:IMUX.IMUX6
CFGDWADDR9inputTCELL12:IMUX.IMUX8
CFGERRACSNinputTCELL9:IMUX.IMUX8
CFGERRAERHEADERLOG0inputTCELL9:IMUX.IMUX11
CFGERRAERHEADERLOG1inputTCELL8:IMUX.IMUX8
CFGERRAERHEADERLOG10inputTCELL6:IMUX.IMUX9
CFGERRAERHEADERLOG100inputTCELL35:IMUX.IMUX14
CFGERRAERHEADERLOG101inputTCELL36:IMUX.IMUX9
CFGERRAERHEADERLOG102inputTCELL36:IMUX.IMUX10
CFGERRAERHEADERLOG103inputTCELL36:IMUX.IMUX11
CFGERRAERHEADERLOG104inputTCELL36:IMUX.IMUX12
CFGERRAERHEADERLOG105inputTCELL37:IMUX.IMUX9
CFGERRAERHEADERLOG106inputTCELL37:IMUX.IMUX10
CFGERRAERHEADERLOG107inputTCELL37:IMUX.IMUX11
CFGERRAERHEADERLOG108inputTCELL37:IMUX.IMUX12
CFGERRAERHEADERLOG109inputTCELL38:IMUX.IMUX9
CFGERRAERHEADERLOG11inputTCELL6:IMUX.IMUX10
CFGERRAERHEADERLOG110inputTCELL38:IMUX.IMUX10
CFGERRAERHEADERLOG111inputTCELL38:IMUX.IMUX11
CFGERRAERHEADERLOG112inputTCELL38:IMUX.IMUX12
CFGERRAERHEADERLOG113inputTCELL39:IMUX.IMUX9
CFGERRAERHEADERLOG114inputTCELL39:IMUX.IMUX10
CFGERRAERHEADERLOG115inputTCELL39:IMUX.IMUX11
CFGERRAERHEADERLOG116inputTCELL39:IMUX.IMUX12
CFGERRAERHEADERLOG117inputTCELL19:IMUX.IMUX13
CFGERRAERHEADERLOG118inputTCELL19:IMUX.IMUX14
CFGERRAERHEADERLOG119inputTCELL19:IMUX.IMUX15
CFGERRAERHEADERLOG12inputTCELL6:IMUX.IMUX11
CFGERRAERHEADERLOG120inputTCELL19:IMUX.IMUX16
CFGERRAERHEADERLOG121inputTCELL18:IMUX.IMUX17
CFGERRAERHEADERLOG122inputTCELL18:IMUX.IMUX18
CFGERRAERHEADERLOG123inputTCELL18:IMUX.IMUX19
CFGERRAERHEADERLOG124inputTCELL18:IMUX.IMUX20
CFGERRAERHEADERLOG125inputTCELL17:IMUX.IMUX17
CFGERRAERHEADERLOG126inputTCELL17:IMUX.IMUX18
CFGERRAERHEADERLOG127inputTCELL17:IMUX.IMUX19
CFGERRAERHEADERLOG13inputTCELL5:IMUX.IMUX9
CFGERRAERHEADERLOG14inputTCELL5:IMUX.IMUX10
CFGERRAERHEADERLOG15inputTCELL5:IMUX.IMUX12
CFGERRAERHEADERLOG16inputTCELL5:IMUX.IMUX13
CFGERRAERHEADERLOG17inputTCELL4:IMUX.IMUX8
CFGERRAERHEADERLOG18inputTCELL4:IMUX.IMUX9
CFGERRAERHEADERLOG19inputTCELL4:IMUX.IMUX10
CFGERRAERHEADERLOG2inputTCELL8:IMUX.IMUX9
CFGERRAERHEADERLOG20inputTCELL4:IMUX.IMUX12
CFGERRAERHEADERLOG21inputTCELL3:IMUX.IMUX9
CFGERRAERHEADERLOG22inputTCELL3:IMUX.IMUX10
CFGERRAERHEADERLOG23inputTCELL3:IMUX.IMUX11
CFGERRAERHEADERLOG24inputTCELL3:IMUX.IMUX12
CFGERRAERHEADERLOG25inputTCELL2:IMUX.IMUX6
CFGERRAERHEADERLOG26inputTCELL2:IMUX.IMUX8
CFGERRAERHEADERLOG27inputTCELL2:IMUX.IMUX10
CFGERRAERHEADERLOG28inputTCELL2:IMUX.IMUX12
CFGERRAERHEADERLOG29inputTCELL1:IMUX.IMUX2
CFGERRAERHEADERLOG3inputTCELL8:IMUX.IMUX10
CFGERRAERHEADERLOG30inputTCELL1:IMUX.IMUX4
CFGERRAERHEADERLOG31inputTCELL1:IMUX.IMUX6
CFGERRAERHEADERLOG32inputTCELL1:IMUX.IMUX8
CFGERRAERHEADERLOG33inputTCELL0:IMUX.IMUX2
CFGERRAERHEADERLOG34inputTCELL0:IMUX.IMUX4
CFGERRAERHEADERLOG35inputTCELL0:IMUX.IMUX6
CFGERRAERHEADERLOG36inputTCELL0:IMUX.IMUX8
CFGERRAERHEADERLOG37inputTCELL20:IMUX.IMUX2
CFGERRAERHEADERLOG38inputTCELL20:IMUX.IMUX4
CFGERRAERHEADERLOG39inputTCELL20:IMUX.IMUX6
CFGERRAERHEADERLOG4inputTCELL8:IMUX.IMUX11
CFGERRAERHEADERLOG40inputTCELL20:IMUX.IMUX8
CFGERRAERHEADERLOG41inputTCELL21:IMUX.IMUX2
CFGERRAERHEADERLOG42inputTCELL21:IMUX.IMUX4
CFGERRAERHEADERLOG43inputTCELL21:IMUX.IMUX6
CFGERRAERHEADERLOG44inputTCELL21:IMUX.IMUX8
CFGERRAERHEADERLOG45inputTCELL22:IMUX.IMUX6
CFGERRAERHEADERLOG46inputTCELL22:IMUX.IMUX8
CFGERRAERHEADERLOG47inputTCELL22:IMUX.IMUX10
CFGERRAERHEADERLOG48inputTCELL22:IMUX.IMUX12
CFGERRAERHEADERLOG49inputTCELL23:IMUX.IMUX10
CFGERRAERHEADERLOG5inputTCELL7:IMUX.IMUX8
CFGERRAERHEADERLOG50inputTCELL23:IMUX.IMUX11
CFGERRAERHEADERLOG51inputTCELL23:IMUX.IMUX12
CFGERRAERHEADERLOG52inputTCELL23:IMUX.IMUX13
CFGERRAERHEADERLOG53inputTCELL24:IMUX.IMUX8
CFGERRAERHEADERLOG54inputTCELL24:IMUX.IMUX9
CFGERRAERHEADERLOG55inputTCELL24:IMUX.IMUX10
CFGERRAERHEADERLOG56inputTCELL24:IMUX.IMUX12
CFGERRAERHEADERLOG57inputTCELL25:IMUX.IMUX10
CFGERRAERHEADERLOG58inputTCELL25:IMUX.IMUX12
CFGERRAERHEADERLOG59inputTCELL25:IMUX.IMUX13
CFGERRAERHEADERLOG6inputTCELL7:IMUX.IMUX9
CFGERRAERHEADERLOG60inputTCELL25:IMUX.IMUX14
CFGERRAERHEADERLOG61inputTCELL26:IMUX.IMUX12
CFGERRAERHEADERLOG62inputTCELL26:IMUX.IMUX13
CFGERRAERHEADERLOG63inputTCELL26:IMUX.IMUX14
CFGERRAERHEADERLOG64inputTCELL26:IMUX.IMUX15
CFGERRAERHEADERLOG65inputTCELL27:IMUX.IMUX12
CFGERRAERHEADERLOG66inputTCELL27:IMUX.IMUX13
CFGERRAERHEADERLOG67inputTCELL27:IMUX.IMUX14
CFGERRAERHEADERLOG68inputTCELL27:IMUX.IMUX15
CFGERRAERHEADERLOG69inputTCELL28:IMUX.IMUX12
CFGERRAERHEADERLOG7inputTCELL7:IMUX.IMUX10
CFGERRAERHEADERLOG70inputTCELL28:IMUX.IMUX13
CFGERRAERHEADERLOG71inputTCELL28:IMUX.IMUX14
CFGERRAERHEADERLOG72inputTCELL28:IMUX.IMUX15
CFGERRAERHEADERLOG73inputTCELL29:IMUX.IMUX12
CFGERRAERHEADERLOG74inputTCELL29:IMUX.IMUX13
CFGERRAERHEADERLOG75inputTCELL29:IMUX.IMUX14
CFGERRAERHEADERLOG76inputTCELL29:IMUX.IMUX15
CFGERRAERHEADERLOG77inputTCELL30:IMUX.IMUX12
CFGERRAERHEADERLOG78inputTCELL30:IMUX.IMUX14
CFGERRAERHEADERLOG79inputTCELL30:IMUX.IMUX16
CFGERRAERHEADERLOG8inputTCELL7:IMUX.IMUX11
CFGERRAERHEADERLOG80inputTCELL30:IMUX.IMUX18
CFGERRAERHEADERLOG81inputTCELL31:IMUX.IMUX12
CFGERRAERHEADERLOG82inputTCELL31:IMUX.IMUX14
CFGERRAERHEADERLOG83inputTCELL31:IMUX.IMUX16
CFGERRAERHEADERLOG84inputTCELL31:IMUX.IMUX18
CFGERRAERHEADERLOG85inputTCELL32:IMUX.IMUX16
CFGERRAERHEADERLOG86inputTCELL32:IMUX.IMUX18
CFGERRAERHEADERLOG87inputTCELL32:IMUX.IMUX19
CFGERRAERHEADERLOG88inputTCELL32:IMUX.IMUX20
CFGERRAERHEADERLOG89inputTCELL33:IMUX.IMUX10
CFGERRAERHEADERLOG9inputTCELL6:IMUX.IMUX8
CFGERRAERHEADERLOG90inputTCELL33:IMUX.IMUX11
CFGERRAERHEADERLOG91inputTCELL33:IMUX.IMUX12
CFGERRAERHEADERLOG92inputTCELL33:IMUX.IMUX13
CFGERRAERHEADERLOG93inputTCELL34:IMUX.IMUX13
CFGERRAERHEADERLOG94inputTCELL34:IMUX.IMUX14
CFGERRAERHEADERLOG95inputTCELL34:IMUX.IMUX16
CFGERRAERHEADERLOG96inputTCELL34:IMUX.IMUX17
CFGERRAERHEADERLOG97inputTCELL35:IMUX.IMUX10
CFGERRAERHEADERLOG98inputTCELL35:IMUX.IMUX12
CFGERRAERHEADERLOG99inputTCELL35:IMUX.IMUX13
CFGERRAERHEADERLOGSETNoutputTCELL37:OUT4
CFGERRCORNinputTCELL11:IMUX.IMUX6
CFGERRCPLABORTNinputTCELL10:IMUX.IMUX6
CFGERRCPLRDYNoutputTCELL38:OUT4
CFGERRCPLTIMEOUTNinputTCELL10:IMUX.IMUX4
CFGERRCPLUNEXPECTNinputTCELL10:IMUX.IMUX8
CFGERRECRCNinputTCELL10:IMUX.IMUX2
CFGERRLOCKEDNinputTCELL9:IMUX.IMUX10
CFGERRPOSTEDNinputTCELL9:IMUX.IMUX9
CFGERRTLPCPLHEADER0inputTCELL17:IMUX.IMUX20
CFGERRTLPCPLHEADER1inputTCELL16:IMUX.IMUX17
CFGERRTLPCPLHEADER10inputTCELL12:IMUX.IMUX14
CFGERRTLPCPLHEADER11inputTCELL12:IMUX.IMUX16
CFGERRTLPCPLHEADER12inputTCELL12:IMUX.IMUX18
CFGERRTLPCPLHEADER13inputTCELL12:IMUX.IMUX19
CFGERRTLPCPLHEADER14inputTCELL11:IMUX.IMUX10
CFGERRTLPCPLHEADER15inputTCELL11:IMUX.IMUX12
CFGERRTLPCPLHEADER16inputTCELL11:IMUX.IMUX14
CFGERRTLPCPLHEADER17inputTCELL11:IMUX.IMUX16
CFGERRTLPCPLHEADER18inputTCELL10:IMUX.IMUX10
CFGERRTLPCPLHEADER19inputTCELL10:IMUX.IMUX12
CFGERRTLPCPLHEADER2inputTCELL16:IMUX.IMUX18
CFGERRTLPCPLHEADER20inputTCELL10:IMUX.IMUX14
CFGERRTLPCPLHEADER21inputTCELL10:IMUX.IMUX16
CFGERRTLPCPLHEADER22inputTCELL9:IMUX.IMUX12
CFGERRTLPCPLHEADER23inputTCELL9:IMUX.IMUX13
CFGERRTLPCPLHEADER24inputTCELL9:IMUX.IMUX14
CFGERRTLPCPLHEADER25inputTCELL9:IMUX.IMUX15
CFGERRTLPCPLHEADER26inputTCELL8:IMUX.IMUX12
CFGERRTLPCPLHEADER27inputTCELL8:IMUX.IMUX13
CFGERRTLPCPLHEADER28inputTCELL8:IMUX.IMUX14
CFGERRTLPCPLHEADER29inputTCELL8:IMUX.IMUX15
CFGERRTLPCPLHEADER3inputTCELL16:IMUX.IMUX19
CFGERRTLPCPLHEADER30inputTCELL7:IMUX.IMUX12
CFGERRTLPCPLHEADER31inputTCELL7:IMUX.IMUX13
CFGERRTLPCPLHEADER32inputTCELL7:IMUX.IMUX14
CFGERRTLPCPLHEADER33inputTCELL7:IMUX.IMUX15
CFGERRTLPCPLHEADER34inputTCELL6:IMUX.IMUX12
CFGERRTLPCPLHEADER35inputTCELL6:IMUX.IMUX13
CFGERRTLPCPLHEADER36inputTCELL6:IMUX.IMUX14
CFGERRTLPCPLHEADER37inputTCELL6:IMUX.IMUX15
CFGERRTLPCPLHEADER38inputTCELL5:IMUX.IMUX14
CFGERRTLPCPLHEADER39inputTCELL5:IMUX.IMUX15
CFGERRTLPCPLHEADER4inputTCELL16:IMUX.IMUX20
CFGERRTLPCPLHEADER40inputTCELL5:IMUX.IMUX16
CFGERRTLPCPLHEADER41inputTCELL5:IMUX.IMUX17
CFGERRTLPCPLHEADER42inputTCELL4:IMUX.IMUX13
CFGERRTLPCPLHEADER43inputTCELL4:IMUX.IMUX14
CFGERRTLPCPLHEADER44inputTCELL4:IMUX.IMUX16
CFGERRTLPCPLHEADER45inputTCELL4:IMUX.IMUX17
CFGERRTLPCPLHEADER46inputTCELL3:IMUX.IMUX13
CFGERRTLPCPLHEADER47inputTCELL3:IMUX.IMUX14
CFGERRTLPCPLHEADER5inputTCELL15:IMUX.IMUX20
CFGERRTLPCPLHEADER6inputTCELL13:IMUX.IMUX13
CFGERRTLPCPLHEADER7inputTCELL13:IMUX.IMUX14
CFGERRTLPCPLHEADER8inputTCELL13:IMUX.IMUX16
CFGERRTLPCPLHEADER9inputTCELL13:IMUX.IMUX17
CFGERRURNinputTCELL11:IMUX.IMUX8
CFGINTERRUPTASSERTNinputTCELL1:IMUX.IMUX16
CFGINTERRUPTDI0inputTCELL3:IMUX.IMUX17
CFGINTERRUPTDI1inputTCELL2:IMUX.IMUX14
CFGINTERRUPTDI2inputTCELL2:IMUX.IMUX16
CFGINTERRUPTDI3inputTCELL2:IMUX.IMUX18
CFGINTERRUPTDI4inputTCELL2:IMUX.IMUX19
CFGINTERRUPTDI5inputTCELL1:IMUX.IMUX10
CFGINTERRUPTDI6inputTCELL1:IMUX.IMUX12
CFGINTERRUPTDI7inputTCELL1:IMUX.IMUX14
CFGINTERRUPTDO0outputTCELL19:OUT13
CFGINTERRUPTDO1outputTCELL19:OUT14
CFGINTERRUPTDO2outputTCELL19:OUT15
CFGINTERRUPTDO3outputTCELL18:OUT4
CFGINTERRUPTDO4outputTCELL18:OUT8
CFGINTERRUPTDO5outputTCELL18:OUT9
CFGINTERRUPTDO6outputTCELL18:OUT10
CFGINTERRUPTDO7outputTCELL17:OUT4
CFGINTERRUPTMMENABLE0outputTCELL39:OUT13
CFGINTERRUPTMMENABLE1outputTCELL39:OUT14
CFGINTERRUPTMMENABLE2outputTCELL39:OUT15
CFGINTERRUPTMSIENABLEoutputTCELL19:OUT12
CFGINTERRUPTMSIXENABLEoutputTCELL17:OUT7
CFGINTERRUPTMSIXFMoutputTCELL17:OUT8
CFGINTERRUPTNinputTCELL3:IMUX.IMUX16
CFGINTERRUPTRDYNoutputTCELL39:OUT12
CFGLINKCONTROLASPMCONTROL0outputTCELL17:OUT10
CFGLINKCONTROLASPMCONTROL1outputTCELL16:OUT11
CFGLINKCONTROLAUTOBANDWIDTHINTENoutputTCELL12:OUT19
CFGLINKCONTROLBANDWIDTHINTENoutputTCELL12:OUT18
CFGLINKCONTROLCLOCKPMENoutputTCELL12:OUT16
CFGLINKCONTROLCOMMONCLOCKoutputTCELL13:OUT17
CFGLINKCONTROLEXTENDEDSYNCoutputTCELL13:OUT18
CFGLINKCONTROLHWAUTOWIDTHDISoutputTCELL12:OUT17
CFGLINKCONTROLLINKDISABLEoutputTCELL15:OUT13
CFGLINKCONTROLRCBoutputTCELL15:OUT12
CFGLINKCONTROLRETRAINLINKoutputTCELL15:OUT14
CFGLINKSTATUSAUTOBANDWIDTHSTATUSoutputTCELL18:OUT11
CFGLINKSTATUSBANDWITHSTATUSoutputTCELL19:OUT19
CFGLINKSTATUSCURRENTSPEED0outputTCELL33:OUT17
CFGLINKSTATUSCURRENTSPEED1outputTCELL33:OUT18
CFGLINKSTATUSDLLACTIVEoutputTCELL19:OUT18
CFGLINKSTATUSLINKTRAININGoutputTCELL19:OUT17
CFGLINKSTATUSNEGOTIATEDWIDTH0outputTCELL39:OUT16
CFGLINKSTATUSNEGOTIATEDWIDTH1outputTCELL39:OUT17
CFGLINKSTATUSNEGOTIATEDWIDTH2outputTCELL39:OUT18
CFGLINKSTATUSNEGOTIATEDWIDTH3outputTCELL19:OUT16
CFGMSGDATA0outputTCELL16:OUT5
CFGMSGDATA1outputTCELL16:OUT7
CFGMSGDATA10outputTCELL14:OUT13
CFGMSGDATA11outputTCELL13:OUT12
CFGMSGDATA12outputTCELL13:OUT13
CFGMSGDATA13outputTCELL13:OUT14
CFGMSGDATA14outputTCELL13:OUT15
CFGMSGDATA15outputTCELL12:OUT12
CFGMSGDATA2outputTCELL16:OUT8
CFGMSGDATA3outputTCELL16:OUT10
CFGMSGDATA4outputTCELL15:OUT8
CFGMSGDATA5outputTCELL15:OUT9
CFGMSGDATA6outputTCELL15:OUT10
CFGMSGDATA7outputTCELL15:OUT11
CFGMSGDATA8outputTCELL14:OUT11
CFGMSGDATA9outputTCELL14:OUT12
CFGMSGRECEIVEDoutputTCELL17:OUT9
CFGMSGRECEIVEDASSERTINTAoutputTCELL11:OUT12
CFGMSGRECEIVEDASSERTINTBoutputTCELL11:OUT14
CFGMSGRECEIVEDASSERTINTCoutputTCELL10:OUT12
CFGMSGRECEIVEDASSERTINTDoutputTCELL10:OUT14
CFGMSGRECEIVEDDEASSERTINTAoutputTCELL11:OUT13
CFGMSGRECEIVEDDEASSERTINTBoutputTCELL11:OUT15
CFGMSGRECEIVEDDEASSERTINTCoutputTCELL10:OUT13
CFGMSGRECEIVEDDEASSERTINTDoutputTCELL10:OUT15
CFGMSGRECEIVEDERRCORoutputTCELL12:OUT13
CFGMSGRECEIVEDERRFATALoutputTCELL12:OUT15
CFGMSGRECEIVEDERRNONFATALoutputTCELL12:OUT14
CFGMSGRECEIVEDPMASNAKoutputTCELL7:OUT10
CFGMSGRECEIVEDPMETOoutputTCELL9:OUT14
CFGMSGRECEIVEDPMETOACKoutputTCELL9:OUT13
CFGMSGRECEIVEDPMPMEoutputTCELL9:OUT12
CFGMSGRECEIVEDSETSLOTPOWERLIMIToutputTCELL9:OUT15
CFGMSGRECEIVEDUNLOCKoutputTCELL8:OUT10
CFGPCIELINKSTATE0outputTCELL6:OUT12
CFGPCIELINKSTATE1outputTCELL5:OUT12
CFGPCIELINKSTATE2outputTCELL4:OUT14
CFGPMCSRPMEENoutputTCELL12:OUT21
CFGPMCSRPMESTATUSoutputTCELL13:OUT20
CFGPMCSRPOWERSTATE0outputTCELL9:OUT23
CFGPMCSRPOWERSTATE1outputTCELL9:OUT22
CFGPMDIRECTASPML1NinputTCELL25:IMUX.IMUX16
CFGPMRCVASREQL1NoutputTCELL4:OUT15
CFGPMRCVENTERL1NoutputTCELL3:OUT12
CFGPMRCVENTERL23NoutputTCELL3:OUT13
CFGPMRCVREQACKNoutputTCELL3:OUT14
CFGPMSENDPMACKNinputTCELL25:IMUX.IMUX18
CFGPMSENDPMETONinputTCELL26:IMUX.IMUX17
CFGPMSENDPMNAKNinputTCELL26:IMUX.IMUX16
CFGPMTURNOFFOKNinputTCELL25:IMUX.IMUX17
CFGPMWAKENinputTCELL25:IMUX.IMUX15
CFGPORTNUMBER0inputTCELL23:IMUX.IMUX14
CFGPORTNUMBER1inputTCELL23:IMUX.IMUX16
CFGPORTNUMBER2inputTCELL23:IMUX.IMUX17
CFGPORTNUMBER3inputTCELL23:IMUX.IMUX18
CFGPORTNUMBER4inputTCELL24:IMUX.IMUX13
CFGPORTNUMBER5inputTCELL24:IMUX.IMUX14
CFGPORTNUMBER6inputTCELL24:IMUX.IMUX16
CFGPORTNUMBER7inputTCELL24:IMUX.IMUX17
CFGRDENNinputTCELL11:IMUX.IMUX4
CFGRDWRDONENoutputTCELL36:OUT8
CFGSLOTCONTROLELECTROMECHILCTLPULSEoutputTCELL10:OUT17
CFGTRANSACTIONoutputTCELL3:OUT15
CFGTRANSACTIONADDR0outputTCELL2:OUT13
CFGTRANSACTIONADDR1outputTCELL2:OUT14
CFGTRANSACTIONADDR2outputTCELL2:OUT15
CFGTRANSACTIONADDR3outputTCELL1:OUT12
CFGTRANSACTIONADDR4outputTCELL1:OUT13
CFGTRANSACTIONADDR5outputTCELL1:OUT14
CFGTRANSACTIONADDR6outputTCELL1:OUT15
CFGTRANSACTIONTYPEoutputTCELL2:OUT12
CFGTRNPENDINGNinputTCELL26:IMUX.IMUX18
CFGVCTCVCMAP0outputTCELL9:OUT16
CFGVCTCVCMAP1outputTCELL9:OUT17
CFGVCTCVCMAP2outputTCELL9:OUT18
CFGVCTCVCMAP3outputTCELL9:OUT19
CFGVCTCVCMAP4outputTCELL8:OUT12
CFGVCTCVCMAP5outputTCELL8:OUT13
CFGVCTCVCMAP6outputTCELL8:OUT14
CFGWRENNinputTCELL11:IMUX.IMUX2
CFGWRREADONLYNinputTCELL12:IMUX.IMUX12
CFGWRRW1CASRWNinputTCELL12:IMUX.IMUX10
CMRSTNinputTCELL20:IMUX.CTRL1
CMSTICKYRSTNinputTCELL21:IMUX.CTRL0
DBGMODE0inputTCELL7:IMUX.IMUX20
DBGMODE1inputTCELL6:IMUX.IMUX20
DBGSCLRAoutputTCELL30:OUT20
DBGSCLRBoutputTCELL31:OUT19
DBGSCLRCoutputTCELL32:OUT19
DBGSCLRDoutputTCELL32:OUT20
DBGSCLREoutputTCELL33:OUT19
DBGSCLRFoutputTCELL33:OUT20
DBGSCLRGoutputTCELL34:OUT15
DBGSCLRHoutputTCELL34:OUT16
DBGSCLRIoutputTCELL35:OUT13
DBGSCLRJoutputTCELL35:OUT14
DBGSCLRKoutputTCELL35:OUT15
DBGSUBMODEinputTCELL36:IMUX.IMUX21
DBGVECA0outputTCELL10:OUT21
DBGVECA1outputTCELL10:OUT22
DBGVECA10outputTCELL5:OUT15
DBGVECA11outputTCELL5:OUT17
DBGVECA12outputTCELL5:OUT21
DBGVECA13outputTCELL4:OUT18
DBGVECA14outputTCELL4:OUT20
DBGVECA15outputTCELL4:OUT22
DBGVECA16outputTCELL3:OUT20
DBGVECA17outputTCELL3:OUT21
DBGVECA18outputTCELL3:OUT22
DBGVECA19outputTCELL3:OUT23
DBGVECA2outputTCELL10:OUT23
DBGVECA20outputTCELL2:OUT20
DBGVECA21outputTCELL2:OUT21
DBGVECA22outputTCELL2:OUT22
DBGVECA23outputTCELL2:OUT23
DBGVECA24outputTCELL1:OUT21
DBGVECA25outputTCELL1:OUT23
DBGVECA26outputTCELL0:OUT19
DBGVECA27outputTCELL0:OUT20
DBGVECA28outputTCELL0:OUT21
DBGVECA29outputTCELL0:OUT22
DBGVECA3outputTCELL9:OUT20
DBGVECA30outputTCELL20:OUT21
DBGVECA31outputTCELL20:OUT22
DBGVECA32outputTCELL20:OUT23
DBGVECA33outputTCELL21:OUT20
DBGVECA34outputTCELL21:OUT21
DBGVECA35outputTCELL21:OUT23
DBGVECA36outputTCELL22:OUT21
DBGVECA37outputTCELL22:OUT22
DBGVECA38outputTCELL22:OUT23
DBGVECA39outputTCELL23:OUT21
DBGVECA4outputTCELL7:OUT13
DBGVECA40outputTCELL23:OUT22
DBGVECA41outputTCELL23:OUT23
DBGVECA42outputTCELL24:OUT18
DBGVECA43outputTCELL24:OUT20
DBGVECA44outputTCELL24:OUT22
DBGVECA45outputTCELL25:OUT17
DBGVECA46outputTCELL25:OUT21
DBGVECA47outputTCELL26:OUT13
DBGVECA48outputTCELL26:OUT14
DBGVECA49outputTCELL26:OUT15
DBGVECA5outputTCELL7:OUT14
DBGVECA50outputTCELL26:OUT18
DBGVECA51outputTCELL27:OUT11
DBGVECA52outputTCELL27:OUT12
DBGVECA53outputTCELL27:OUT13
DBGVECA54outputTCELL27:OUT14
DBGVECA55outputTCELL28:OUT11
DBGVECA56outputTCELL28:OUT12
DBGVECA57outputTCELL28:OUT13
DBGVECA58outputTCELL28:OUT14
DBGVECA59outputTCELL29:OUT21
DBGVECA6outputTCELL7:OUT15
DBGVECA60outputTCELL29:OUT22
DBGVECA61outputTCELL29:OUT23
DBGVECA62outputTCELL30:OUT21
DBGVECA63outputTCELL30:OUT22
DBGVECA7outputTCELL6:OUT15
DBGVECA8outputTCELL6:OUT18
DBGVECA9outputTCELL6:OUT22
DBGVECB0outputTCELL30:OUT23
DBGVECB1outputTCELL31:OUT20
DBGVECB10outputTCELL34:OUT18
DBGVECB11outputTCELL34:OUT20
DBGVECB12outputTCELL34:OUT22
DBGVECB13outputTCELL35:OUT17
DBGVECB14outputTCELL35:OUT21
DBGVECB15outputTCELL36:OUT13
DBGVECB16outputTCELL36:OUT14
DBGVECB17outputTCELL36:OUT15
DBGVECB18outputTCELL36:OUT18
DBGVECB19outputTCELL37:OUT11
DBGVECB2outputTCELL31:OUT21
DBGVECB20outputTCELL37:OUT12
DBGVECB21outputTCELL37:OUT13
DBGVECB22outputTCELL37:OUT14
DBGVECB23outputTCELL38:OUT11
DBGVECB24outputTCELL38:OUT12
DBGVECB25outputTCELL38:OUT13
DBGVECB26outputTCELL38:OUT14
DBGVECB27outputTCELL39:OUT21
DBGVECB28outputTCELL39:OUT22
DBGVECB29outputTCELL39:OUT23
DBGVECB3outputTCELL31:OUT23
DBGVECB30outputTCELL19:OUT23
DBGVECB31outputTCELL18:OUT14
DBGVECB32outputTCELL18:OUT15
DBGVECB33outputTCELL17:OUT13
DBGVECB34outputTCELL17:OUT14
DBGVECB35outputTCELL17:OUT15
DBGVECB36outputTCELL16:OUT14
DBGVECB37outputTCELL16:OUT15
DBGVECB38outputTCELL16:OUT22
DBGVECB39outputTCELL15:OUT17
DBGVECB4outputTCELL32:OUT21
DBGVECB40outputTCELL15:OUT21
DBGVECB41outputTCELL14:OUT18
DBGVECB42outputTCELL14:OUT20
DBGVECB43outputTCELL14:OUT22
DBGVECB44outputTCELL13:OUT21
DBGVECB45outputTCELL13:OUT22
DBGVECB46outputTCELL13:OUT23
DBGVECB47outputTCELL12:OUT22
DBGVECB48outputTCELL12:OUT23
DBGVECB49outputTCELL8:OUT11
DBGVECB5outputTCELL32:OUT22
DBGVECB50outputTCELL8:OUT15
DBGVECB51outputTCELL7:OUT11
DBGVECB52outputTCELL7:OUT12
DBGVECB53outputTCELL6:OUT13
DBGVECB54outputTCELL6:OUT14
DBGVECB55outputTCELL5:OUT13
DBGVECB56outputTCELL5:OUT14
DBGVECB57outputTCELL4:OUT16
DBGVECB58outputTCELL1:OUT20
DBGVECB59outputTCELL0:OUT23
DBGVECB6outputTCELL32:OUT23
DBGVECB60outputTCELL21:OUT19
DBGVECB61outputTCELL22:OUT19
DBGVECB62outputTCELL22:OUT20
DBGVECB63outputTCELL23:OUT19
DBGVECB7outputTCELL33:OUT21
DBGVECB8outputTCELL33:OUT22
DBGVECB9outputTCELL33:OUT23
DBGVECC0outputTCELL23:OUT20
DBGVECC1outputTCELL24:OUT15
DBGVECC10outputTCELL29:OUT20
DBGVECC11outputTCELL30:OUT19
DBGVECC2outputTCELL24:OUT16
DBGVECC3outputTCELL25:OUT13
DBGVECC4outputTCELL25:OUT14
DBGVECC5outputTCELL25:OUT15
DBGVECC6outputTCELL26:OUT22
DBGVECC7outputTCELL27:OUT15
DBGVECC8outputTCELL28:OUT15
DBGVECC9outputTCELL29:OUT19
DLRSTNinputTCELL22:IMUX.CTRL1
DRPCLKinputTCELL28:IMUX.CLK0
DRPDADDR0inputTCELL28:IMUX.IMUX20
DRPDADDR1inputTCELL29:IMUX.IMUX20
DRPDADDR2inputTCELL29:IMUX.IMUX21
DRPDADDR3inputTCELL29:IMUX.IMUX22
DRPDADDR4inputTCELL33:IMUX.IMUX19
DRPDADDR5inputTCELL35:IMUX.IMUX20
DRPDADDR6inputTCELL36:IMUX.IMUX17
DRPDADDR7inputTCELL36:IMUX.IMUX18
DRPDADDR8inputTCELL36:IMUX.IMUX19
DRPDENinputTCELL26:IMUX.IMUX20
DRPDI0inputTCELL36:IMUX.IMUX20
DRPDI1inputTCELL37:IMUX.IMUX17
DRPDI10inputTCELL39:IMUX.IMUX18
DRPDI11inputTCELL39:IMUX.IMUX19
DRPDI12inputTCELL39:IMUX.IMUX20
DRPDI13inputTCELL19:IMUX.IMUX21
DRPDI14inputTCELL9:IMUX.IMUX20
DRPDI15inputTCELL8:IMUX.IMUX20
DRPDI2inputTCELL37:IMUX.IMUX18
DRPDI3inputTCELL37:IMUX.IMUX19
DRPDI4inputTCELL37:IMUX.IMUX20
DRPDI5inputTCELL38:IMUX.IMUX17
DRPDI6inputTCELL38:IMUX.IMUX18
DRPDI7inputTCELL38:IMUX.IMUX19
DRPDI8inputTCELL38:IMUX.IMUX20
DRPDI9inputTCELL39:IMUX.IMUX17
DRPDO0outputTCELL3:OUT17
DRPDO1outputTCELL3:OUT18
DRPDO10outputTCELL19:OUT20
DRPDO11outputTCELL19:OUT21
DRPDO12outputTCELL12:OUT20
DRPDO13outputTCELL11:OUT21
DRPDO14outputTCELL11:OUT23
DRPDO15outputTCELL10:OUT20
DRPDO2outputTCELL3:OUT19
DRPDO3outputTCELL2:OUT16
DRPDO4outputTCELL2:OUT17
DRPDO5outputTCELL2:OUT18
DRPDO6outputTCELL2:OUT19
DRPDO7outputTCELL1:OUT16
DRPDO8outputTCELL1:OUT17
DRPDO9outputTCELL1:OUT19
DRPDRDYoutputTCELL3:OUT16
DRPDWEinputTCELL27:IMUX.IMUX20
FUNCLVLRSTNinputTCELL21:IMUX.CTRL1
LL2BADDLLPERRNoutputTCELL21:OUT12
LL2BADTLPERRNoutputTCELL0:OUT12
LL2PROTOCOLERRNoutputTCELL0:OUT11
LL2REPLAYROERRNoutputTCELL21:OUT13
LL2REPLAYTOERRNoutputTCELL21:OUT14
LL2SENDASREQL1NinputTCELL27:IMUX.IMUX11
LL2SENDENTERL1NinputTCELL27:IMUX.IMUX9
LL2SENDENTERL23NinputTCELL27:IMUX.IMUX10
LL2SUSPENDNOWNinputTCELL29:IMUX.IMUX9
LL2SUSPENDOKNoutputTCELL1:OUT8
LL2TFCINIT1SEQNoutputTCELL3:OUT11
LL2TFCINIT2SEQNoutputTCELL2:OUT8
LL2TLPRCVNinputTCELL27:IMUX.IMUX8
LNKCLKENoutputTCELL9:OUT21
MIMRXRADDR0outputTCELL37:OUT9
MIMRXRADDR1outputTCELL37:OUT10
MIMRXRADDR10outputTCELL19:OUT8
MIMRXRADDR11outputTCELL19:OUT9
MIMRXRADDR12outputTCELL19:OUT10
MIMRXRADDR2outputTCELL38:OUT7
MIMRXRADDR3outputTCELL38:OUT8
MIMRXRADDR4outputTCELL38:OUT9
MIMRXRADDR5outputTCELL38:OUT10
MIMRXRADDR6outputTCELL39:OUT8
MIMRXRADDR7outputTCELL39:OUT9
MIMRXRADDR8outputTCELL39:OUT10
MIMRXRADDR9outputTCELL39:OUT11
MIMRXRCEoutputTCELL18:OUT7
MIMRXRDATA0inputTCELL29:IMUX.IMUX6
MIMRXRDATA1inputTCELL29:IMUX.IMUX7
MIMRXRDATA10inputTCELL32:IMUX.IMUX6
MIMRXRDATA11inputTCELL32:IMUX.IMUX8
MIMRXRDATA12inputTCELL32:IMUX.IMUX10
MIMRXRDATA13inputTCELL32:IMUX.IMUX12
MIMRXRDATA14inputTCELL33:IMUX.IMUX5
MIMRXRDATA15inputTCELL33:IMUX.IMUX6
MIMRXRDATA16inputTCELL33:IMUX.IMUX7
MIMRXRDATA17inputTCELL33:IMUX.IMUX8
MIMRXRDATA18inputTCELL34:IMUX.IMUX6
MIMRXRDATA19inputTCELL34:IMUX.IMUX8
MIMRXRDATA2inputTCELL30:IMUX.IMUX2
MIMRXRDATA20inputTCELL34:IMUX.IMUX9
MIMRXRDATA21inputTCELL34:IMUX.IMUX10
MIMRXRDATA22inputTCELL35:IMUX.IMUX4
MIMRXRDATA23inputTCELL35:IMUX.IMUX6
MIMRXRDATA24inputTCELL35:IMUX.IMUX7
MIMRXRDATA25inputTCELL35:IMUX.IMUX8
MIMRXRDATA26inputTCELL36:IMUX.IMUX4
MIMRXRDATA27inputTCELL36:IMUX.IMUX5
MIMRXRDATA28inputTCELL36:IMUX.IMUX6
MIMRXRDATA29inputTCELL36:IMUX.IMUX7
MIMRXRDATA3inputTCELL30:IMUX.IMUX4
MIMRXRDATA30inputTCELL37:IMUX.IMUX4
MIMRXRDATA31inputTCELL37:IMUX.IMUX5
MIMRXRDATA32inputTCELL37:IMUX.IMUX6
MIMRXRDATA33inputTCELL37:IMUX.IMUX7
MIMRXRDATA34inputTCELL38:IMUX.IMUX4
MIMRXRDATA35inputTCELL38:IMUX.IMUX5
MIMRXRDATA36inputTCELL38:IMUX.IMUX6
MIMRXRDATA37inputTCELL38:IMUX.IMUX7
MIMRXRDATA38inputTCELL39:IMUX.IMUX4
MIMRXRDATA39inputTCELL39:IMUX.IMUX5
MIMRXRDATA4inputTCELL30:IMUX.IMUX6
MIMRXRDATA40inputTCELL39:IMUX.IMUX6
MIMRXRDATA41inputTCELL39:IMUX.IMUX7
MIMRXRDATA42inputTCELL19:IMUX.IMUX4
MIMRXRDATA43inputTCELL19:IMUX.IMUX5
MIMRXRDATA44inputTCELL19:IMUX.IMUX6
MIMRXRDATA45inputTCELL19:IMUX.IMUX7
MIMRXRDATA46inputTCELL18:IMUX.IMUX4
MIMRXRDATA47inputTCELL18:IMUX.IMUX5
MIMRXRDATA48inputTCELL18:IMUX.IMUX6
MIMRXRDATA49inputTCELL18:IMUX.IMUX7
MIMRXRDATA5inputTCELL30:IMUX.IMUX8
MIMRXRDATA50inputTCELL17:IMUX.IMUX4
MIMRXRDATA51inputTCELL17:IMUX.IMUX5
MIMRXRDATA52inputTCELL17:IMUX.IMUX6
MIMRXRDATA53inputTCELL17:IMUX.IMUX7
MIMRXRDATA54inputTCELL16:IMUX.IMUX4
MIMRXRDATA55inputTCELL16:IMUX.IMUX5
MIMRXRDATA56inputTCELL16:IMUX.IMUX6
MIMRXRDATA57inputTCELL16:IMUX.IMUX7
MIMRXRDATA58inputTCELL15:IMUX.IMUX4
MIMRXRDATA59inputTCELL15:IMUX.IMUX6
MIMRXRDATA6inputTCELL31:IMUX.IMUX2
MIMRXRDATA60inputTCELL15:IMUX.IMUX7
MIMRXRDATA61inputTCELL15:IMUX.IMUX8
MIMRXRDATA62inputTCELL14:IMUX.IMUX6
MIMRXRDATA63inputTCELL14:IMUX.IMUX8
MIMRXRDATA64inputTCELL14:IMUX.IMUX9
MIMRXRDATA65inputTCELL14:IMUX.IMUX10
MIMRXRDATA66inputTCELL13:IMUX.IMUX5
MIMRXRDATA67inputTCELL13:IMUX.IMUX6
MIMRXRDATA7inputTCELL31:IMUX.IMUX4
MIMRXRDATA8inputTCELL31:IMUX.IMUX6
MIMRXRDATA9inputTCELL31:IMUX.IMUX8
MIMRXRENoutputTCELL19:OUT11
MIMRXWADDR0outputTCELL34:OUT10
MIMRXWADDR1outputTCELL34:OUT11
MIMRXWADDR10outputTCELL36:OUT11
MIMRXWADDR11outputTCELL36:OUT12
MIMRXWADDR12outputTCELL37:OUT7
MIMRXWADDR2outputTCELL34:OUT12
MIMRXWADDR3outputTCELL34:OUT13
MIMRXWADDR4outputTCELL35:OUT8
MIMRXWADDR5outputTCELL35:OUT9
MIMRXWADDR6outputTCELL35:OUT10
MIMRXWADDR7outputTCELL35:OUT11
MIMRXWADDR8outputTCELL36:OUT9
MIMRXWADDR9outputTCELL36:OUT10
MIMRXWDATA0outputTCELL3:OUT5
MIMRXWDATA1outputTCELL3:OUT6
MIMRXWDATA10outputTCELL1:OUT7
MIMRXWDATA11outputTCELL0:OUT4
MIMRXWDATA12outputTCELL0:OUT5
MIMRXWDATA13outputTCELL0:OUT7
MIMRXWDATA14outputTCELL0:OUT8
MIMRXWDATA15outputTCELL20:OUT20
MIMRXWDATA16outputTCELL21:OUT8
MIMRXWDATA17outputTCELL21:OUT9
MIMRXWDATA18outputTCELL21:OUT10
MIMRXWDATA19outputTCELL21:OUT11
MIMRXWDATA2outputTCELL3:OUT7
MIMRXWDATA20outputTCELL22:OUT8
MIMRXWDATA21outputTCELL22:OUT9
MIMRXWDATA22outputTCELL22:OUT10
MIMRXWDATA23outputTCELL22:OUT11
MIMRXWDATA24outputTCELL23:OUT8
MIMRXWDATA25outputTCELL23:OUT9
MIMRXWDATA26outputTCELL23:OUT10
MIMRXWDATA27outputTCELL23:OUT11
MIMRXWDATA28outputTCELL24:OUT10
MIMRXWDATA29outputTCELL24:OUT11
MIMRXWDATA3outputTCELL2:OUT4
MIMRXWDATA30outputTCELL24:OUT12
MIMRXWDATA31outputTCELL24:OUT13
MIMRXWDATA32outputTCELL25:OUT8
MIMRXWDATA33outputTCELL25:OUT9
MIMRXWDATA34outputTCELL25:OUT10
MIMRXWDATA35outputTCELL25:OUT11
MIMRXWDATA36outputTCELL26:OUT9
MIMRXWDATA37outputTCELL26:OUT10
MIMRXWDATA38outputTCELL26:OUT11
MIMRXWDATA39outputTCELL26:OUT12
MIMRXWDATA4outputTCELL2:OUT5
MIMRXWDATA40outputTCELL27:OUT7
MIMRXWDATA41outputTCELL27:OUT8
MIMRXWDATA42outputTCELL27:OUT9
MIMRXWDATA43outputTCELL27:OUT10
MIMRXWDATA44outputTCELL28:OUT7
MIMRXWDATA45outputTCELL28:OUT8
MIMRXWDATA46outputTCELL28:OUT9
MIMRXWDATA47outputTCELL28:OUT10
MIMRXWDATA48outputTCELL29:OUT8
MIMRXWDATA49outputTCELL29:OUT9
MIMRXWDATA5outputTCELL2:OUT6
MIMRXWDATA50outputTCELL29:OUT10
MIMRXWDATA51outputTCELL29:OUT11
MIMRXWDATA52outputTCELL30:OUT8
MIMRXWDATA53outputTCELL30:OUT9
MIMRXWDATA54outputTCELL30:OUT10
MIMRXWDATA55outputTCELL30:OUT11
MIMRXWDATA56outputTCELL31:OUT8
MIMRXWDATA57outputTCELL31:OUT9
MIMRXWDATA58outputTCELL31:OUT10
MIMRXWDATA59outputTCELL31:OUT11
MIMRXWDATA6outputTCELL2:OUT7
MIMRXWDATA60outputTCELL32:OUT8
MIMRXWDATA61outputTCELL32:OUT9
MIMRXWDATA62outputTCELL32:OUT10
MIMRXWDATA63outputTCELL32:OUT11
MIMRXWDATA64outputTCELL33:OUT8
MIMRXWDATA65outputTCELL33:OUT9
MIMRXWDATA66outputTCELL33:OUT10
MIMRXWDATA67outputTCELL33:OUT11
MIMRXWDATA7outputTCELL1:OUT4
MIMRXWDATA8outputTCELL1:OUT5
MIMRXWDATA9outputTCELL1:OUT6
MIMRXWENoutputTCELL37:OUT8
MIMTXRADDR0outputTCELL7:OUT8
MIMTXRADDR1outputTCELL7:OUT9
MIMTXRADDR10outputTCELL4:OUT6
MIMTXRADDR11outputTCELL4:OUT7
MIMTXRADDR12outputTCELL4:OUT8
MIMTXRADDR2outputTCELL6:OUT5
MIMTXRADDR3outputTCELL6:OUT7
MIMTXRADDR4outputTCELL6:OUT8
MIMTXRADDR5outputTCELL6:OUT9
MIMTXRADDR6outputTCELL5:OUT4
MIMTXRADDR7outputTCELL5:OUT5
MIMTXRADDR8outputTCELL5:OUT6
MIMTXRADDR9outputTCELL5:OUT7
MIMTXRCEoutputTCELL3:OUT4
MIMTXRDATA0inputTCELL14:IMUX.IMUX0
MIMTXRDATA1inputTCELL14:IMUX.IMUX2
MIMTXRDATA10inputTCELL12:IMUX.IMUX4
MIMTXRDATA11inputTCELL11:IMUX.IMUX0
MIMTXRDATA12inputTCELL10:IMUX.IMUX0
MIMTXRDATA13inputTCELL9:IMUX.IMUX0
MIMTXRDATA14inputTCELL9:IMUX.IMUX1
MIMTXRDATA15inputTCELL9:IMUX.IMUX2
MIMTXRDATA16inputTCELL9:IMUX.IMUX3
MIMTXRDATA17inputTCELL8:IMUX.IMUX0
MIMTXRDATA18inputTCELL8:IMUX.IMUX1
MIMTXRDATA19inputTCELL8:IMUX.IMUX2
MIMTXRDATA2inputTCELL14:IMUX.IMUX4
MIMTXRDATA20inputTCELL8:IMUX.IMUX3
MIMTXRDATA21inputTCELL7:IMUX.IMUX0
MIMTXRDATA22inputTCELL7:IMUX.IMUX1
MIMTXRDATA23inputTCELL7:IMUX.IMUX2
MIMTXRDATA24inputTCELL7:IMUX.IMUX3
MIMTXRDATA25inputTCELL6:IMUX.IMUX0
MIMTXRDATA26inputTCELL6:IMUX.IMUX1
MIMTXRDATA27inputTCELL6:IMUX.IMUX2
MIMTXRDATA28inputTCELL6:IMUX.IMUX3
MIMTXRDATA29inputTCELL5:IMUX.IMUX0
MIMTXRDATA3inputTCELL14:IMUX.IMUX5
MIMTXRDATA30inputTCELL5:IMUX.IMUX1
MIMTXRDATA31inputTCELL5:IMUX.IMUX2
MIMTXRDATA32inputTCELL5:IMUX.IMUX3
MIMTXRDATA33inputTCELL4:IMUX.IMUX0
MIMTXRDATA34inputTCELL4:IMUX.IMUX2
MIMTXRDATA35inputTCELL4:IMUX.IMUX4
MIMTXRDATA36inputTCELL4:IMUX.IMUX5
MIMTXRDATA37inputTCELL3:IMUX.IMUX0
MIMTXRDATA38inputTCELL3:IMUX.IMUX2
MIMTXRDATA39inputTCELL3:IMUX.IMUX3
MIMTXRDATA4inputTCELL13:IMUX.IMUX0
MIMTXRDATA40inputTCELL3:IMUX.IMUX4
MIMTXRDATA41inputTCELL2:IMUX.IMUX0
MIMTXRDATA42inputTCELL2:IMUX.IMUX2
MIMTXRDATA43inputTCELL2:IMUX.IMUX4
MIMTXRDATA44inputTCELL1:IMUX.IMUX0
MIMTXRDATA45inputTCELL0:IMUX.IMUX0
MIMTXRDATA46inputTCELL23:IMUX.IMUX5
MIMTXRDATA47inputTCELL23:IMUX.IMUX6
MIMTXRDATA48inputTCELL23:IMUX.IMUX7
MIMTXRDATA49inputTCELL23:IMUX.IMUX8
MIMTXRDATA5inputTCELL13:IMUX.IMUX2
MIMTXRDATA50inputTCELL24:IMUX.IMUX6
MIMTXRDATA51inputTCELL25:IMUX.IMUX4
MIMTXRDATA52inputTCELL25:IMUX.IMUX6
MIMTXRDATA53inputTCELL25:IMUX.IMUX7
MIMTXRDATA54inputTCELL25:IMUX.IMUX8
MIMTXRDATA55inputTCELL26:IMUX.IMUX4
MIMTXRDATA56inputTCELL26:IMUX.IMUX5
MIMTXRDATA57inputTCELL26:IMUX.IMUX6
MIMTXRDATA58inputTCELL26:IMUX.IMUX7
MIMTXRDATA59inputTCELL27:IMUX.IMUX4
MIMTXRDATA6inputTCELL13:IMUX.IMUX3
MIMTXRDATA60inputTCELL27:IMUX.IMUX5
MIMTXRDATA61inputTCELL27:IMUX.IMUX6
MIMTXRDATA62inputTCELL27:IMUX.IMUX7
MIMTXRDATA63inputTCELL28:IMUX.IMUX4
MIMTXRDATA64inputTCELL28:IMUX.IMUX5
MIMTXRDATA65inputTCELL28:IMUX.IMUX6
MIMTXRDATA66inputTCELL28:IMUX.IMUX7
MIMTXRDATA67inputTCELL29:IMUX.IMUX4
MIMTXRDATA68inputTCELL29:IMUX.IMUX5
MIMTXRDATA7inputTCELL13:IMUX.IMUX4
MIMTXRDATA8inputTCELL12:IMUX.IMUX0
MIMTXRDATA9inputTCELL12:IMUX.IMUX2
MIMTXRENoutputTCELL4:OUT9
MIMTXWADDR0outputTCELL11:OUT4
MIMTXWADDR1outputTCELL11:OUT5
MIMTXWADDR10outputTCELL9:OUT6
MIMTXWADDR11outputTCELL9:OUT7
MIMTXWADDR12outputTCELL8:OUT8
MIMTXWADDR2outputTCELL11:OUT6
MIMTXWADDR3outputTCELL11:OUT7
MIMTXWADDR4outputTCELL10:OUT4
MIMTXWADDR5outputTCELL10:OUT5
MIMTXWADDR6outputTCELL10:OUT6
MIMTXWADDR7outputTCELL10:OUT7
MIMTXWADDR8outputTCELL9:OUT4
MIMTXWADDR9outputTCELL9:OUT5
MIMTXWDATA0outputTCELL22:OUT7
MIMTXWDATA1outputTCELL23:OUT4
MIMTXWDATA10outputTCELL25:OUT5
MIMTXWDATA11outputTCELL25:OUT6
MIMTXWDATA12outputTCELL25:OUT7
MIMTXWDATA13outputTCELL26:OUT5
MIMTXWDATA14outputTCELL26:OUT7
MIMTXWDATA15outputTCELL29:OUT4
MIMTXWDATA16outputTCELL29:OUT5
MIMTXWDATA17outputTCELL29:OUT6
MIMTXWDATA18outputTCELL29:OUT7
MIMTXWDATA19outputTCELL30:OUT4
MIMTXWDATA2outputTCELL23:OUT5
MIMTXWDATA20outputTCELL30:OUT5
MIMTXWDATA21outputTCELL30:OUT6
MIMTXWDATA22outputTCELL30:OUT7
MIMTXWDATA23outputTCELL31:OUT4
MIMTXWDATA24outputTCELL31:OUT5
MIMTXWDATA25outputTCELL31:OUT6
MIMTXWDATA26outputTCELL31:OUT7
MIMTXWDATA27outputTCELL32:OUT4
MIMTXWDATA28outputTCELL32:OUT5
MIMTXWDATA29outputTCELL32:OUT6
MIMTXWDATA3outputTCELL23:OUT6
MIMTXWDATA30outputTCELL32:OUT7
MIMTXWDATA31outputTCELL33:OUT4
MIMTXWDATA32outputTCELL33:OUT5
MIMTXWDATA33outputTCELL33:OUT6
MIMTXWDATA34outputTCELL33:OUT7
MIMTXWDATA35outputTCELL34:OUT6
MIMTXWDATA36outputTCELL34:OUT7
MIMTXWDATA37outputTCELL34:OUT8
MIMTXWDATA38outputTCELL34:OUT9
MIMTXWDATA39outputTCELL35:OUT4
MIMTXWDATA4outputTCELL23:OUT7
MIMTXWDATA40outputTCELL35:OUT5
MIMTXWDATA41outputTCELL35:OUT6
MIMTXWDATA42outputTCELL35:OUT7
MIMTXWDATA43outputTCELL36:OUT5
MIMTXWDATA44outputTCELL36:OUT7
MIMTXWDATA45outputTCELL39:OUT4
MIMTXWDATA46outputTCELL39:OUT5
MIMTXWDATA47outputTCELL39:OUT6
MIMTXWDATA48outputTCELL39:OUT7
MIMTXWDATA49outputTCELL19:OUT4
MIMTXWDATA5outputTCELL24:OUT6
MIMTXWDATA50outputTCELL19:OUT5
MIMTXWDATA51outputTCELL19:OUT6
MIMTXWDATA52outputTCELL19:OUT7
MIMTXWDATA53outputTCELL15:OUT4
MIMTXWDATA54outputTCELL15:OUT5
MIMTXWDATA55outputTCELL15:OUT6
MIMTXWDATA56outputTCELL15:OUT7
MIMTXWDATA57outputTCELL14:OUT6
MIMTXWDATA58outputTCELL14:OUT7
MIMTXWDATA59outputTCELL14:OUT8
MIMTXWDATA6outputTCELL24:OUT7
MIMTXWDATA60outputTCELL14:OUT9
MIMTXWDATA61outputTCELL13:OUT4
MIMTXWDATA62outputTCELL13:OUT5
MIMTXWDATA63outputTCELL13:OUT6
MIMTXWDATA64outputTCELL13:OUT7
MIMTXWDATA65outputTCELL12:OUT4
MIMTXWDATA66outputTCELL12:OUT5
MIMTXWDATA67outputTCELL12:OUT6
MIMTXWDATA68outputTCELL12:OUT7
MIMTXWDATA7outputTCELL24:OUT8
MIMTXWDATA8outputTCELL24:OUT9
MIMTXWDATA9outputTCELL25:OUT4
MIMTXWENoutputTCELL8:OUT9
PIPECLKinputTCELL29:IMUX.CLK1
PIPERX0CHANISALIGNEDinputTCELL33:IMUX.IMUX21
PIPERX0CHARISK0inputTCELL33:IMUX.IMUX23
PIPERX0CHARISK1inputTCELL32:IMUX.IMUX1
PIPERX0DATA0inputTCELL30:IMUX.IMUX3
PIPERX0DATA1inputTCELL30:IMUX.IMUX5
PIPERX0DATA10inputTCELL31:IMUX.IMUX7
PIPERX0DATA11inputTCELL31:IMUX.IMUX15
PIPERX0DATA12inputTCELL32:IMUX.IMUX5
PIPERX0DATA13inputTCELL32:IMUX.IMUX7
PIPERX0DATA14inputTCELL32:IMUX.IMUX11
PIPERX0DATA15inputTCELL32:IMUX.IMUX9
PIPERX0DATA2inputTCELL30:IMUX.IMUX15
PIPERX0DATA3inputTCELL30:IMUX.IMUX19
PIPERX0DATA4inputTCELL30:IMUX.IMUX1
PIPERX0DATA5inputTCELL30:IMUX.IMUX9
PIPERX0DATA6inputTCELL31:IMUX.IMUX1
PIPERX0DATA7inputTCELL31:IMUX.IMUX9
PIPERX0DATA8inputTCELL31:IMUX.IMUX3
PIPERX0DATA9inputTCELL31:IMUX.IMUX5
PIPERX0ELECIDLEinputTCELL35:IMUX.IMUX21
PIPERX0PHYSTATUSinputTCELL34:IMUX.IMUX11
PIPERX0POLARITYoutputTCELL31:OUT18
PIPERX0STATUS0inputTCELL34:IMUX.IMUX23
PIPERX0STATUS1inputTCELL34:IMUX.IMUX19
PIPERX0STATUS2inputTCELL34:IMUX.IMUX21
PIPERX0VALIDinputTCELL35:IMUX.IMUX19
PIPERX1CHANISALIGNEDinputTCELL23:IMUX.IMUX21
PIPERX1CHARISK0inputTCELL23:IMUX.IMUX23
PIPERX1CHARISK1inputTCELL22:IMUX.IMUX1
PIPERX1DATA0inputTCELL20:IMUX.IMUX3
PIPERX1DATA1inputTCELL20:IMUX.IMUX5
PIPERX1DATA10inputTCELL21:IMUX.IMUX7
PIPERX1DATA11inputTCELL21:IMUX.IMUX15
PIPERX1DATA12inputTCELL22:IMUX.IMUX5
PIPERX1DATA13inputTCELL22:IMUX.IMUX7
PIPERX1DATA14inputTCELL22:IMUX.IMUX11
PIPERX1DATA15inputTCELL22:IMUX.IMUX9
PIPERX1DATA2inputTCELL20:IMUX.IMUX15
PIPERX1DATA3inputTCELL20:IMUX.IMUX19
PIPERX1DATA4inputTCELL20:IMUX.IMUX1
PIPERX1DATA5inputTCELL20:IMUX.IMUX9
PIPERX1DATA6inputTCELL21:IMUX.IMUX1
PIPERX1DATA7inputTCELL21:IMUX.IMUX9
PIPERX1DATA8inputTCELL21:IMUX.IMUX3
PIPERX1DATA9inputTCELL21:IMUX.IMUX5
PIPERX1ELECIDLEinputTCELL25:IMUX.IMUX21
PIPERX1PHYSTATUSinputTCELL24:IMUX.IMUX11
PIPERX1POLARITYoutputTCELL21:OUT18
PIPERX1STATUS0inputTCELL24:IMUX.IMUX23
PIPERX1STATUS1inputTCELL24:IMUX.IMUX19
PIPERX1STATUS2inputTCELL24:IMUX.IMUX21
PIPERX1VALIDinputTCELL25:IMUX.IMUX19
PIPERX2CHANISALIGNEDinputTCELL13:IMUX.IMUX21
PIPERX2CHARISK0inputTCELL13:IMUX.IMUX23
PIPERX2CHARISK1inputTCELL12:IMUX.IMUX1
PIPERX2DATA0inputTCELL10:IMUX.IMUX3
PIPERX2DATA1inputTCELL10:IMUX.IMUX5
PIPERX2DATA10inputTCELL11:IMUX.IMUX7
PIPERX2DATA11inputTCELL11:IMUX.IMUX15
PIPERX2DATA12inputTCELL12:IMUX.IMUX5
PIPERX2DATA13inputTCELL12:IMUX.IMUX7
PIPERX2DATA14inputTCELL12:IMUX.IMUX11
PIPERX2DATA15inputTCELL12:IMUX.IMUX9
PIPERX2DATA2inputTCELL10:IMUX.IMUX15
PIPERX2DATA3inputTCELL10:IMUX.IMUX19
PIPERX2DATA4inputTCELL10:IMUX.IMUX1
PIPERX2DATA5inputTCELL10:IMUX.IMUX9
PIPERX2DATA6inputTCELL11:IMUX.IMUX1
PIPERX2DATA7inputTCELL11:IMUX.IMUX9
PIPERX2DATA8inputTCELL11:IMUX.IMUX3
PIPERX2DATA9inputTCELL11:IMUX.IMUX5
PIPERX2ELECIDLEinputTCELL15:IMUX.IMUX21
PIPERX2PHYSTATUSinputTCELL14:IMUX.IMUX11
PIPERX2POLARITYoutputTCELL11:OUT18
PIPERX2STATUS0inputTCELL14:IMUX.IMUX23
PIPERX2STATUS1inputTCELL14:IMUX.IMUX19
PIPERX2STATUS2inputTCELL14:IMUX.IMUX21
PIPERX2VALIDinputTCELL15:IMUX.IMUX19
PIPERX3CHANISALIGNEDinputTCELL3:IMUX.IMUX21
PIPERX3CHARISK0inputTCELL3:IMUX.IMUX23
PIPERX3CHARISK1inputTCELL2:IMUX.IMUX1
PIPERX3DATA0inputTCELL0:IMUX.IMUX3
PIPERX3DATA1inputTCELL0:IMUX.IMUX5
PIPERX3DATA10inputTCELL1:IMUX.IMUX7
PIPERX3DATA11inputTCELL1:IMUX.IMUX15
PIPERX3DATA12inputTCELL2:IMUX.IMUX5
PIPERX3DATA13inputTCELL2:IMUX.IMUX7
PIPERX3DATA14inputTCELL2:IMUX.IMUX11
PIPERX3DATA15inputTCELL2:IMUX.IMUX9
PIPERX3DATA2inputTCELL0:IMUX.IMUX15
PIPERX3DATA3inputTCELL0:IMUX.IMUX19
PIPERX3DATA4inputTCELL0:IMUX.IMUX1
PIPERX3DATA5inputTCELL0:IMUX.IMUX9
PIPERX3DATA6inputTCELL1:IMUX.IMUX1
PIPERX3DATA7inputTCELL1:IMUX.IMUX9
PIPERX3DATA8inputTCELL1:IMUX.IMUX3
PIPERX3DATA9inputTCELL1:IMUX.IMUX5
PIPERX3ELECIDLEinputTCELL5:IMUX.IMUX21
PIPERX3PHYSTATUSinputTCELL4:IMUX.IMUX11
PIPERX3POLARITYoutputTCELL1:OUT18
PIPERX3STATUS0inputTCELL4:IMUX.IMUX23
PIPERX3STATUS1inputTCELL4:IMUX.IMUX19
PIPERX3STATUS2inputTCELL4:IMUX.IMUX21
PIPERX3VALIDinputTCELL5:IMUX.IMUX19
PIPERX4CHANISALIGNEDinputTCELL33:IMUX.IMUX1
PIPERX4CHARISK0inputTCELL33:IMUX.IMUX15
PIPERX4CHARISK1inputTCELL32:IMUX.IMUX17
PIPERX4DATA0inputTCELL30:IMUX.IMUX11
PIPERX4DATA1inputTCELL30:IMUX.IMUX13
PIPERX4DATA10inputTCELL31:IMUX.IMUX19
PIPERX4DATA11inputTCELL31:IMUX.IMUX23
PIPERX4DATA12inputTCELL32:IMUX.IMUX13
PIPERX4DATA13inputTCELL32:IMUX.IMUX3
PIPERX4DATA14inputTCELL32:IMUX.IMUX15
PIPERX4DATA15inputTCELL32:IMUX.IMUX21
PIPERX4DATA2inputTCELL30:IMUX.IMUX7
PIPERX4DATA3inputTCELL30:IMUX.IMUX23
PIPERX4DATA4inputTCELL30:IMUX.IMUX17
PIPERX4DATA5inputTCELL30:IMUX.IMUX21
PIPERX4DATA6inputTCELL31:IMUX.IMUX17
PIPERX4DATA7inputTCELL31:IMUX.IMUX21
PIPERX4DATA8inputTCELL31:IMUX.IMUX11
PIPERX4DATA9inputTCELL31:IMUX.IMUX13
PIPERX4ELECIDLEinputTCELL35:IMUX.IMUX5
PIPERX4PHYSTATUSinputTCELL34:IMUX.IMUX15
PIPERX4POLARITYoutputTCELL31:OUT22
PIPERX4STATUS0inputTCELL34:IMUX.IMUX3
PIPERX4STATUS1inputTCELL34:IMUX.IMUX7
PIPERX4STATUS2inputTCELL34:IMUX.IMUX1
PIPERX4VALIDinputTCELL35:IMUX.IMUX11
PIPERX5CHANISALIGNEDinputTCELL23:IMUX.IMUX1
PIPERX5CHARISK0inputTCELL23:IMUX.IMUX15
PIPERX5CHARISK1inputTCELL22:IMUX.IMUX17
PIPERX5DATA0inputTCELL20:IMUX.IMUX11
PIPERX5DATA1inputTCELL20:IMUX.IMUX13
PIPERX5DATA10inputTCELL21:IMUX.IMUX19
PIPERX5DATA11inputTCELL21:IMUX.IMUX23
PIPERX5DATA12inputTCELL22:IMUX.IMUX13
PIPERX5DATA13inputTCELL22:IMUX.IMUX3
PIPERX5DATA14inputTCELL22:IMUX.IMUX15
PIPERX5DATA15inputTCELL22:IMUX.IMUX21
PIPERX5DATA2inputTCELL20:IMUX.IMUX7
PIPERX5DATA3inputTCELL20:IMUX.IMUX23
PIPERX5DATA4inputTCELL20:IMUX.IMUX17
PIPERX5DATA5inputTCELL20:IMUX.IMUX21
PIPERX5DATA6inputTCELL21:IMUX.IMUX17
PIPERX5DATA7inputTCELL21:IMUX.IMUX21
PIPERX5DATA8inputTCELL21:IMUX.IMUX11
PIPERX5DATA9inputTCELL21:IMUX.IMUX13
PIPERX5ELECIDLEinputTCELL25:IMUX.IMUX5
PIPERX5PHYSTATUSinputTCELL24:IMUX.IMUX15
PIPERX5POLARITYoutputTCELL21:OUT22
PIPERX5STATUS0inputTCELL24:IMUX.IMUX3
PIPERX5STATUS1inputTCELL24:IMUX.IMUX7
PIPERX5STATUS2inputTCELL24:IMUX.IMUX1
PIPERX5VALIDinputTCELL25:IMUX.IMUX11
PIPERX6CHANISALIGNEDinputTCELL13:IMUX.IMUX1
PIPERX6CHARISK0inputTCELL13:IMUX.IMUX15
PIPERX6CHARISK1inputTCELL12:IMUX.IMUX17
PIPERX6DATA0inputTCELL10:IMUX.IMUX11
PIPERX6DATA1inputTCELL10:IMUX.IMUX13
PIPERX6DATA10inputTCELL11:IMUX.IMUX19
PIPERX6DATA11inputTCELL11:IMUX.IMUX23
PIPERX6DATA12inputTCELL12:IMUX.IMUX13
PIPERX6DATA13inputTCELL12:IMUX.IMUX3
PIPERX6DATA14inputTCELL12:IMUX.IMUX15
PIPERX6DATA15inputTCELL12:IMUX.IMUX21
PIPERX6DATA2inputTCELL10:IMUX.IMUX7
PIPERX6DATA3inputTCELL10:IMUX.IMUX23
PIPERX6DATA4inputTCELL10:IMUX.IMUX17
PIPERX6DATA5inputTCELL10:IMUX.IMUX21
PIPERX6DATA6inputTCELL11:IMUX.IMUX17
PIPERX6DATA7inputTCELL11:IMUX.IMUX21
PIPERX6DATA8inputTCELL11:IMUX.IMUX11
PIPERX6DATA9inputTCELL11:IMUX.IMUX13
PIPERX6ELECIDLEinputTCELL15:IMUX.IMUX5
PIPERX6PHYSTATUSinputTCELL14:IMUX.IMUX15
PIPERX6POLARITYoutputTCELL11:OUT22
PIPERX6STATUS0inputTCELL14:IMUX.IMUX3
PIPERX6STATUS1inputTCELL14:IMUX.IMUX7
PIPERX6STATUS2inputTCELL14:IMUX.IMUX1
PIPERX6VALIDinputTCELL15:IMUX.IMUX11
PIPERX7CHANISALIGNEDinputTCELL3:IMUX.IMUX1
PIPERX7CHARISK0inputTCELL3:IMUX.IMUX15
PIPERX7CHARISK1inputTCELL2:IMUX.IMUX17
PIPERX7DATA0inputTCELL0:IMUX.IMUX11
PIPERX7DATA1inputTCELL0:IMUX.IMUX13
PIPERX7DATA10inputTCELL1:IMUX.IMUX19
PIPERX7DATA11inputTCELL1:IMUX.IMUX23
PIPERX7DATA12inputTCELL2:IMUX.IMUX13
PIPERX7DATA13inputTCELL2:IMUX.IMUX3
PIPERX7DATA14inputTCELL2:IMUX.IMUX15
PIPERX7DATA15inputTCELL2:IMUX.IMUX21
PIPERX7DATA2inputTCELL0:IMUX.IMUX7
PIPERX7DATA3inputTCELL0:IMUX.IMUX23
PIPERX7DATA4inputTCELL0:IMUX.IMUX17
PIPERX7DATA5inputTCELL0:IMUX.IMUX21
PIPERX7DATA6inputTCELL1:IMUX.IMUX17
PIPERX7DATA7inputTCELL1:IMUX.IMUX21
PIPERX7DATA8inputTCELL1:IMUX.IMUX11
PIPERX7DATA9inputTCELL1:IMUX.IMUX13
PIPERX7ELECIDLEinputTCELL5:IMUX.IMUX5
PIPERX7PHYSTATUSinputTCELL4:IMUX.IMUX15
PIPERX7POLARITYoutputTCELL1:OUT22
PIPERX7STATUS0inputTCELL4:IMUX.IMUX3
PIPERX7STATUS1inputTCELL4:IMUX.IMUX7
PIPERX7STATUS2inputTCELL4:IMUX.IMUX1
PIPERX7VALIDinputTCELL5:IMUX.IMUX11
PIPETX0CHARISK0outputTCELL35:OUT18
PIPETX0CHARISK1outputTCELL35:OUT23
PIPETX0COMPLIANCEoutputTCELL35:OUT16
PIPETX0DATA0outputTCELL38:OUT16
PIPETX0DATA1outputTCELL38:OUT21
PIPETX0DATA10outputTCELL37:OUT21
PIPETX0DATA11outputTCELL37:OUT1
PIPETX0DATA12outputTCELL36:OUT16
PIPETX0DATA13outputTCELL36:OUT6
PIPETX0DATA14outputTCELL36:OUT23
PIPETX0DATA15outputTCELL36:OUT21
PIPETX0DATA2outputTCELL38:OUT23
PIPETX0DATA3outputTCELL38:OUT1
PIPETX0DATA4outputTCELL38:OUT6
PIPETX0DATA5outputTCELL38:OUT18
PIPETX0DATA6outputTCELL37:OUT18
PIPETX0DATA7outputTCELL37:OUT16
PIPETX0DATA8outputTCELL37:OUT6
PIPETX0DATA9outputTCELL37:OUT23
PIPETX0ELECIDLEoutputTCELL34:OUT1
PIPETX0POWERDOWN0outputTCELL34:OUT21
PIPETX0POWERDOWN1outputTCELL34:OUT23
PIPETX1CHARISK0outputTCELL25:OUT18
PIPETX1CHARISK1outputTCELL25:OUT23
PIPETX1COMPLIANCEoutputTCELL25:OUT16
PIPETX1DATA0outputTCELL28:OUT16
PIPETX1DATA1outputTCELL28:OUT21
PIPETX1DATA10outputTCELL27:OUT21
PIPETX1DATA11outputTCELL27:OUT1
PIPETX1DATA12outputTCELL26:OUT16
PIPETX1DATA13outputTCELL26:OUT6
PIPETX1DATA14outputTCELL26:OUT23
PIPETX1DATA15outputTCELL26:OUT21
PIPETX1DATA2outputTCELL28:OUT23
PIPETX1DATA3outputTCELL28:OUT1
PIPETX1DATA4outputTCELL28:OUT6
PIPETX1DATA5outputTCELL28:OUT18
PIPETX1DATA6outputTCELL27:OUT18
PIPETX1DATA7outputTCELL27:OUT16
PIPETX1DATA8outputTCELL27:OUT6
PIPETX1DATA9outputTCELL27:OUT23
PIPETX1ELECIDLEoutputTCELL24:OUT1
PIPETX1POWERDOWN0outputTCELL24:OUT21
PIPETX1POWERDOWN1outputTCELL24:OUT23
PIPETX2CHARISK0outputTCELL15:OUT18
PIPETX2CHARISK1outputTCELL15:OUT23
PIPETX2COMPLIANCEoutputTCELL15:OUT16
PIPETX2DATA0outputTCELL18:OUT16
PIPETX2DATA1outputTCELL18:OUT21
PIPETX2DATA10outputTCELL17:OUT21
PIPETX2DATA11outputTCELL17:OUT1
PIPETX2DATA12outputTCELL16:OUT16
PIPETX2DATA13outputTCELL16:OUT6
PIPETX2DATA14outputTCELL16:OUT23
PIPETX2DATA15outputTCELL16:OUT21
PIPETX2DATA2outputTCELL18:OUT23
PIPETX2DATA3outputTCELL18:OUT1
PIPETX2DATA4outputTCELL18:OUT6
PIPETX2DATA5outputTCELL18:OUT18
PIPETX2DATA6outputTCELL17:OUT18
PIPETX2DATA7outputTCELL17:OUT16
PIPETX2DATA8outputTCELL17:OUT6
PIPETX2DATA9outputTCELL17:OUT23
PIPETX2ELECIDLEoutputTCELL14:OUT1
PIPETX2POWERDOWN0outputTCELL14:OUT21
PIPETX2POWERDOWN1outputTCELL14:OUT23
PIPETX3CHARISK0outputTCELL5:OUT18
PIPETX3CHARISK1outputTCELL5:OUT23
PIPETX3COMPLIANCEoutputTCELL5:OUT16
PIPETX3DATA0outputTCELL8:OUT16
PIPETX3DATA1outputTCELL8:OUT21
PIPETX3DATA10outputTCELL7:OUT21
PIPETX3DATA11outputTCELL7:OUT1
PIPETX3DATA12outputTCELL6:OUT16
PIPETX3DATA13outputTCELL6:OUT6
PIPETX3DATA14outputTCELL6:OUT23
PIPETX3DATA15outputTCELL6:OUT21
PIPETX3DATA2outputTCELL8:OUT23
PIPETX3DATA3outputTCELL8:OUT1
PIPETX3DATA4outputTCELL8:OUT6
PIPETX3DATA5outputTCELL8:OUT18
PIPETX3DATA6outputTCELL7:OUT18
PIPETX3DATA7outputTCELL7:OUT16
PIPETX3DATA8outputTCELL7:OUT6
PIPETX3DATA9outputTCELL7:OUT23
PIPETX3ELECIDLEoutputTCELL4:OUT1
PIPETX3POWERDOWN0outputTCELL4:OUT21
PIPETX3POWERDOWN1outputTCELL4:OUT23
PIPETX4CHARISK0outputTCELL35:OUT22
PIPETX4CHARISK1outputTCELL35:OUT19
PIPETX4COMPLIANCEoutputTCELL35:OUT20
PIPETX4DATA0outputTCELL38:OUT20
PIPETX4DATA1outputTCELL38:OUT17
PIPETX4DATA10outputTCELL37:OUT17
PIPETX4DATA11outputTCELL37:OUT5
PIPETX4DATA12outputTCELL36:OUT20
PIPETX4DATA13outputTCELL36:OUT2
PIPETX4DATA14outputTCELL36:OUT19
PIPETX4DATA15outputTCELL36:OUT17
PIPETX4DATA2outputTCELL38:OUT19
PIPETX4DATA3outputTCELL38:OUT5
PIPETX4DATA4outputTCELL38:OUT2
PIPETX4DATA5outputTCELL38:OUT22
PIPETX4DATA6outputTCELL37:OUT22
PIPETX4DATA7outputTCELL37:OUT20
PIPETX4DATA8outputTCELL37:OUT2
PIPETX4DATA9outputTCELL37:OUT19
PIPETX4ELECIDLEoutputTCELL34:OUT5
PIPETX4POWERDOWN0outputTCELL34:OUT17
PIPETX4POWERDOWN1outputTCELL34:OUT19
PIPETX5CHARISK0outputTCELL25:OUT22
PIPETX5CHARISK1outputTCELL25:OUT19
PIPETX5COMPLIANCEoutputTCELL25:OUT20
PIPETX5DATA0outputTCELL28:OUT20
PIPETX5DATA1outputTCELL28:OUT17
PIPETX5DATA10outputTCELL27:OUT17
PIPETX5DATA11outputTCELL27:OUT5
PIPETX5DATA12outputTCELL26:OUT20
PIPETX5DATA13outputTCELL26:OUT2
PIPETX5DATA14outputTCELL26:OUT19
PIPETX5DATA15outputTCELL26:OUT17
PIPETX5DATA2outputTCELL28:OUT19
PIPETX5DATA3outputTCELL28:OUT5
PIPETX5DATA4outputTCELL28:OUT2
PIPETX5DATA5outputTCELL28:OUT22
PIPETX5DATA6outputTCELL27:OUT22
PIPETX5DATA7outputTCELL27:OUT20
PIPETX5DATA8outputTCELL27:OUT2
PIPETX5DATA9outputTCELL27:OUT19
PIPETX5ELECIDLEoutputTCELL24:OUT5
PIPETX5POWERDOWN0outputTCELL24:OUT17
PIPETX5POWERDOWN1outputTCELL24:OUT19
PIPETX6CHARISK0outputTCELL15:OUT22
PIPETX6CHARISK1outputTCELL15:OUT19
PIPETX6COMPLIANCEoutputTCELL15:OUT20
PIPETX6DATA0outputTCELL18:OUT20
PIPETX6DATA1outputTCELL18:OUT17
PIPETX6DATA10outputTCELL17:OUT17
PIPETX6DATA11outputTCELL17:OUT5
PIPETX6DATA12outputTCELL16:OUT20
PIPETX6DATA13outputTCELL16:OUT2
PIPETX6DATA14outputTCELL16:OUT19
PIPETX6DATA15outputTCELL16:OUT17
PIPETX6DATA2outputTCELL18:OUT19
PIPETX6DATA3outputTCELL18:OUT5
PIPETX6DATA4outputTCELL18:OUT2
PIPETX6DATA5outputTCELL18:OUT22
PIPETX6DATA6outputTCELL17:OUT22
PIPETX6DATA7outputTCELL17:OUT20
PIPETX6DATA8outputTCELL17:OUT2
PIPETX6DATA9outputTCELL17:OUT19
PIPETX6ELECIDLEoutputTCELL14:OUT5
PIPETX6POWERDOWN0outputTCELL14:OUT17
PIPETX6POWERDOWN1outputTCELL14:OUT19
PIPETX7CHARISK0outputTCELL5:OUT22
PIPETX7CHARISK1outputTCELL5:OUT19
PIPETX7COMPLIANCEoutputTCELL5:OUT20
PIPETX7DATA0outputTCELL8:OUT20
PIPETX7DATA1outputTCELL8:OUT17
PIPETX7DATA10outputTCELL7:OUT17
PIPETX7DATA11outputTCELL7:OUT5
PIPETX7DATA12outputTCELL6:OUT20
PIPETX7DATA13outputTCELL6:OUT2
PIPETX7DATA14outputTCELL6:OUT19
PIPETX7DATA15outputTCELL6:OUT17
PIPETX7DATA2outputTCELL8:OUT19
PIPETX7DATA3outputTCELL8:OUT5
PIPETX7DATA4outputTCELL8:OUT2
PIPETX7DATA5outputTCELL8:OUT22
PIPETX7DATA6outputTCELL7:OUT22
PIPETX7DATA7outputTCELL7:OUT20
PIPETX7DATA8outputTCELL7:OUT2
PIPETX7DATA9outputTCELL7:OUT19
PIPETX7ELECIDLEoutputTCELL4:OUT5
PIPETX7POWERDOWN0outputTCELL4:OUT17
PIPETX7POWERDOWN1outputTCELL4:OUT19
PIPETXDEEMPHoutputTCELL13:OUT16
PIPETXMARGIN0outputTCELL0:OUT18
PIPETXMARGIN1outputTCELL0:OUT16
PIPETXMARGIN2outputTCELL0:OUT6
PIPETXRATEoutputTCELL16:OUT18
PIPETXRCVRDEToutputTCELL14:OUT15
PIPETXRESEToutputTCELL16:OUT9
PL2DIRECTEDLSTATE0inputTCELL28:IMUX.IMUX8
PL2DIRECTEDLSTATE1inputTCELL28:IMUX.IMUX9
PL2DIRECTEDLSTATE2inputTCELL28:IMUX.IMUX10
PL2DIRECTEDLSTATE3inputTCELL28:IMUX.IMUX11
PL2DIRECTEDLSTATE4inputTCELL29:IMUX.IMUX8
PL2LINKUPNoutputTCELL0:OUT9
PL2RECEIVERERRNoutputTCELL0:OUT10
PL2RECOVERYNoutputTCELL2:OUT10
PL2RXELECIDLEoutputTCELL2:OUT11
PL2SUSPENDOKoutputTCELL2:OUT9
PLDBGMODE0inputTCELL37:IMUX.IMUX21
PLDBGMODE1inputTCELL38:IMUX.IMUX21
PLDBGMODE2inputTCELL39:IMUX.IMUX21
PLDBGVEC0outputTCELL36:OUT22
PLDBGVEC1outputTCELL37:OUT15
PLDBGVEC10outputTCELL16:OUT12
PLDBGVEC11outputTCELL16:OUT13
PLDBGVEC2outputTCELL38:OUT15
PLDBGVEC3outputTCELL39:OUT19
PLDBGVEC4outputTCELL39:OUT20
PLDBGVEC5outputTCELL19:OUT22
PLDBGVEC6outputTCELL18:OUT12
PLDBGVEC7outputTCELL18:OUT13
PLDBGVEC8outputTCELL17:OUT11
PLDBGVEC9outputTCELL17:OUT12
PLDIRECTEDLINKAUTONinputTCELL23:IMUX.IMUX0
PLDIRECTEDLINKCHANGE0inputTCELL20:IMUX.IMUX0
PLDIRECTEDLINKCHANGE1inputTCELL21:IMUX.IMUX0
PLDIRECTEDLINKSPEEDinputTCELL22:IMUX.IMUX4
PLDIRECTEDLINKWIDTH0inputTCELL22:IMUX.IMUX0
PLDIRECTEDLINKWIDTH1inputTCELL22:IMUX.IMUX2
PLDOWNSTREAMDEEMPHSOURCEinputTCELL23:IMUX.IMUX3
PLINITIALLINKWIDTH0outputTCELL22:OUT0
PLINITIALLINKWIDTH1outputTCELL22:OUT1
PLINITIALLINKWIDTH2outputTCELL22:OUT2
PLLANEREVERSALMODE0outputTCELL20:OUT9
PLLANEREVERSALMODE1outputTCELL20:OUT10
PLLINKGEN2CAPoutputTCELL21:OUT2
PLLINKPARTNERGEN2SUPPORTEDoutputTCELL21:OUT3
PLLINKUPCFGCAPoutputTCELL21:OUT1
PLLTSSMSTATE0outputTCELL20:OUT3
PLLTSSMSTATE1outputTCELL20:OUT4
PLLTSSMSTATE2outputTCELL20:OUT5
PLLTSSMSTATE3outputTCELL20:OUT6
PLLTSSMSTATE4outputTCELL20:OUT7
PLLTSSMSTATE5outputTCELL20:OUT8
PLPHYLNKUPNoutputTCELL20:OUT11
PLRECEIVEDHOTRSToutputTCELL22:OUT13
PLRSTNinputTCELL23:IMUX.CTRL0
PLRXPMSTATE0outputTCELL20:OUT15
PLRXPMSTATE1outputTCELL21:OUT0
PLSELLNKRATEoutputTCELL20:OUT0
PLSELLNKWIDTH0outputTCELL20:OUT1
PLSELLNKWIDTH1outputTCELL20:OUT2
PLTRANSMITHOTRSTinputTCELL14:IMUX.IMUX13
PLTXPMSTATE0outputTCELL20:OUT12
PLTXPMSTATE1outputTCELL20:OUT13
PLTXPMSTATE2outputTCELL20:OUT14
PLUPSTREAMPREFERDEEMPHinputTCELL23:IMUX.IMUX2
PMVDIVIDE0inputTCELL15:IMUX.IMUX9
PMVDIVIDE1inputTCELL14:IMUX.IMUX12
PMVENABLENinputTCELL19:IMUX.IMUX8
PMVOUToutputTCELL21:OUT15
PMVSELECT0inputTCELL18:IMUX.IMUX8
PMVSELECT1inputTCELL17:IMUX.IMUX8
PMVSELECT2inputTCELL16:IMUX.IMUX8
RECEIVEDFUNCLVLRSTNoutputTCELL22:OUT14
SCANENABLENinputTCELL31:IMUX.IMUX10
SCANIN0inputTCELL32:IMUX.IMUX14
SCANIN1inputTCELL33:IMUX.IMUX9
SCANIN2inputTCELL34:IMUX.IMUX12
SCANIN3inputTCELL35:IMUX.IMUX9
SCANIN4inputTCELL36:IMUX.IMUX8
SCANIN5inputTCELL37:IMUX.IMUX8
SCANIN6inputTCELL38:IMUX.IMUX8
SCANIN7inputTCELL39:IMUX.IMUX8
SCANMODENinputTCELL30:IMUX.IMUX10
SYSRSTNinputTCELL20:IMUX.CTRL0
TL2ASPMSUSPENDCREDITCHECKNinputTCELL29:IMUX.IMUX11
TL2ASPMSUSPENDCREDITCHECKOKNoutputTCELL1:OUT11
TL2ASPMSUSPENDREQNoutputTCELL1:OUT10
TL2PPMSUSPENDOKNoutputTCELL1:OUT9
TL2PPMSUSPENDREQNinputTCELL29:IMUX.IMUX10
TLRSTNinputTCELL22:IMUX.CTRL0
TRNFCCPLD0outputTCELL0:OUT3
TRNFCCPLD1outputTCELL20:OUT16
TRNFCCPLD10outputTCELL22:OUT5
TRNFCCPLD11outputTCELL22:OUT6
TRNFCCPLD2outputTCELL20:OUT17
TRNFCCPLD3outputTCELL20:OUT18
TRNFCCPLD4outputTCELL20:OUT19
TRNFCCPLD5outputTCELL21:OUT4
TRNFCCPLD6outputTCELL21:OUT5
TRNFCCPLD7outputTCELL21:OUT6
TRNFCCPLD8outputTCELL21:OUT7
TRNFCCPLD9outputTCELL22:OUT4
TRNFCCPLH0outputTCELL2:OUT3
TRNFCCPLH1outputTCELL1:OUT0
TRNFCCPLH2outputTCELL1:OUT1
TRNFCCPLH3outputTCELL1:OUT2
TRNFCCPLH4outputTCELL1:OUT3
TRNFCCPLH5outputTCELL0:OUT0
TRNFCCPLH6outputTCELL0:OUT1
TRNFCCPLH7outputTCELL0:OUT2
TRNFCNPD0outputTCELL5:OUT3
TRNFCNPD1outputTCELL4:OUT0
TRNFCNPD10outputTCELL2:OUT1
TRNFCNPD11outputTCELL2:OUT2
TRNFCNPD2outputTCELL4:OUT2
TRNFCNPD3outputTCELL4:OUT3
TRNFCNPD4outputTCELL4:OUT4
TRNFCNPD5outputTCELL3:OUT0
TRNFCNPD6outputTCELL3:OUT1
TRNFCNPD7outputTCELL3:OUT2
TRNFCNPD8outputTCELL3:OUT3
TRNFCNPD9outputTCELL2:OUT0
TRNFCNPH0outputTCELL7:OUT7
TRNFCNPH1outputTCELL6:OUT0
TRNFCNPH2outputTCELL6:OUT1
TRNFCNPH3outputTCELL6:OUT3
TRNFCNPH4outputTCELL6:OUT4
TRNFCNPH5outputTCELL5:OUT0
TRNFCNPH6outputTCELL5:OUT1
TRNFCNPH7outputTCELL5:OUT2
TRNFCPD0outputTCELL10:OUT3
TRNFCPD1outputTCELL9:OUT0
TRNFCPD10outputTCELL7:OUT3
TRNFCPD11outputTCELL7:OUT4
TRNFCPD2outputTCELL9:OUT1
TRNFCPD3outputTCELL9:OUT2
TRNFCPD4outputTCELL9:OUT3
TRNFCPD5outputTCELL8:OUT0
TRNFCPD6outputTCELL8:OUT3
TRNFCPD7outputTCELL8:OUT4
TRNFCPD8outputTCELL8:OUT7
TRNFCPD9outputTCELL7:OUT0
TRNFCPH0outputTCELL12:OUT3
TRNFCPH1outputTCELL11:OUT0
TRNFCPH2outputTCELL11:OUT1
TRNFCPH3outputTCELL11:OUT2
TRNFCPH4outputTCELL11:OUT3
TRNFCPH5outputTCELL10:OUT0
TRNFCPH6outputTCELL10:OUT1
TRNFCPH7outputTCELL10:OUT2
TRNFCSEL0inputTCELL15:IMUX.IMUX1
TRNFCSEL1inputTCELL15:IMUX.IMUX2
TRNFCSEL2inputTCELL15:IMUX.IMUX3
TRNLNKUPNoutputTCELL12:OUT2
TRNRBARHITN0outputTCELL14:OUT4
TRNRBARHITN1outputTCELL13:OUT0
TRNRBARHITN2outputTCELL13:OUT1
TRNRBARHITN3outputTCELL13:OUT2
TRNRBARHITN4outputTCELL13:OUT3
TRNRBARHITN5outputTCELL12:OUT0
TRNRBARHITN6outputTCELL12:OUT1
TRNRD0outputTCELL25:OUT0
TRNRD1outputTCELL25:OUT1
TRNRD10outputTCELL28:OUT0
TRNRD11outputTCELL28:OUT3
TRNRD12outputTCELL29:OUT0
TRNRD13outputTCELL29:OUT1
TRNRD14outputTCELL29:OUT2
TRNRD15outputTCELL29:OUT3
TRNRD16outputTCELL30:OUT0
TRNRD17outputTCELL30:OUT1
TRNRD18outputTCELL30:OUT2
TRNRD19outputTCELL30:OUT3
TRNRD2outputTCELL25:OUT2
TRNRD20outputTCELL31:OUT0
TRNRD21outputTCELL31:OUT1
TRNRD22outputTCELL31:OUT2
TRNRD23outputTCELL31:OUT3
TRNRD24outputTCELL32:OUT0
TRNRD25outputTCELL32:OUT1
TRNRD26outputTCELL32:OUT2
TRNRD27outputTCELL32:OUT3
TRNRD28outputTCELL33:OUT0
TRNRD29outputTCELL33:OUT1
TRNRD3outputTCELL25:OUT3
TRNRD30outputTCELL33:OUT2
TRNRD31outputTCELL33:OUT3
TRNRD32outputTCELL34:OUT0
TRNRD33outputTCELL34:OUT2
TRNRD34outputTCELL34:OUT3
TRNRD35outputTCELL34:OUT4
TRNRD36outputTCELL35:OUT0
TRNRD37outputTCELL35:OUT1
TRNRD38outputTCELL35:OUT2
TRNRD39outputTCELL35:OUT3
TRNRD4outputTCELL26:OUT0
TRNRD40outputTCELL36:OUT0
TRNRD41outputTCELL36:OUT1
TRNRD42outputTCELL36:OUT3
TRNRD43outputTCELL36:OUT4
TRNRD44outputTCELL37:OUT0
TRNRD45outputTCELL37:OUT3
TRNRD46outputTCELL38:OUT0
TRNRD47outputTCELL38:OUT3
TRNRD48outputTCELL39:OUT0
TRNRD49outputTCELL39:OUT1
TRNRD5outputTCELL26:OUT1
TRNRD50outputTCELL39:OUT2
TRNRD51outputTCELL39:OUT3
TRNRD52outputTCELL19:OUT0
TRNRD53outputTCELL19:OUT1
TRNRD54outputTCELL19:OUT2
TRNRD55outputTCELL19:OUT3
TRNRD56outputTCELL18:OUT0
TRNRD57outputTCELL18:OUT3
TRNRD58outputTCELL17:OUT0
TRNRD59outputTCELL17:OUT3
TRNRD6outputTCELL26:OUT3
TRNRD60outputTCELL16:OUT0
TRNRD61outputTCELL16:OUT1
TRNRD62outputTCELL16:OUT3
TRNRD63outputTCELL16:OUT4
TRNRD7outputTCELL26:OUT4
TRNRD8outputTCELL27:OUT0
TRNRD9outputTCELL27:OUT3
TRNRDLLPDATA0outputTCELL13:OUT8
TRNRDLLPDATA1outputTCELL13:OUT9
TRNRDLLPDATA10outputTCELL11:OUT10
TRNRDLLPDATA11outputTCELL11:OUT11
TRNRDLLPDATA12outputTCELL10:OUT8
TRNRDLLPDATA13outputTCELL10:OUT9
TRNRDLLPDATA14outputTCELL10:OUT10
TRNRDLLPDATA15outputTCELL10:OUT11
TRNRDLLPDATA16outputTCELL9:OUT8
TRNRDLLPDATA17outputTCELL9:OUT9
TRNRDLLPDATA18outputTCELL9:OUT10
TRNRDLLPDATA19outputTCELL9:OUT11
TRNRDLLPDATA2outputTCELL13:OUT10
TRNRDLLPDATA20outputTCELL6:OUT10
TRNRDLLPDATA21outputTCELL6:OUT11
TRNRDLLPDATA22outputTCELL5:OUT8
TRNRDLLPDATA23outputTCELL5:OUT9
TRNRDLLPDATA24outputTCELL5:OUT10
TRNRDLLPDATA25outputTCELL5:OUT11
TRNRDLLPDATA26outputTCELL4:OUT10
TRNRDLLPDATA27outputTCELL4:OUT11
TRNRDLLPDATA28outputTCELL4:OUT12
TRNRDLLPDATA29outputTCELL4:OUT13
TRNRDLLPDATA3outputTCELL13:OUT11
TRNRDLLPDATA30outputTCELL3:OUT8
TRNRDLLPDATA31outputTCELL3:OUT9
TRNRDLLPDATA4outputTCELL12:OUT8
TRNRDLLPDATA5outputTCELL12:OUT9
TRNRDLLPDATA6outputTCELL12:OUT10
TRNRDLLPDATA7outputTCELL12:OUT11
TRNRDLLPDATA8outputTCELL11:OUT8
TRNRDLLPDATA9outputTCELL11:OUT9
TRNRDLLPSRCRDYNoutputTCELL3:OUT10
TRNRDSTRDYNinputTCELL16:IMUX.IMUX3
TRNRECRCERRNoutputTCELL14:OUT2
TRNREOFNoutputTCELL15:OUT2
TRNRERRFWDNoutputTCELL14:OUT3
TRNRNPOKNinputTCELL15:IMUX.IMUX0
TRNRREMNoutputTCELL15:OUT0
TRNRSOFNoutputTCELL15:OUT1
TRNRSRCDSCNoutputTCELL14:OUT0
TRNRSRCRDYNoutputTCELL15:OUT3
TRNTBUFAV0outputTCELL23:OUT1
TRNTBUFAV1outputTCELL23:OUT2
TRNTBUFAV2outputTCELL23:OUT3
TRNTBUFAV3outputTCELL24:OUT0
TRNTBUFAV4outputTCELL24:OUT2
TRNTBUFAV5outputTCELL24:OUT3
TRNTCFGGNTNinputTCELL16:IMUX.IMUX2
TRNTCFGREQNoutputTCELL24:OUT4
TRNTD0inputTCELL23:IMUX.IMUX4
TRNTD1inputTCELL24:IMUX.IMUX0
TRNTD10inputTCELL26:IMUX.IMUX1
TRNTD11inputTCELL26:IMUX.IMUX2
TRNTD12inputTCELL26:IMUX.IMUX3
TRNTD13inputTCELL27:IMUX.IMUX0
TRNTD14inputTCELL27:IMUX.IMUX1
TRNTD15inputTCELL27:IMUX.IMUX2
TRNTD16inputTCELL27:IMUX.IMUX3
TRNTD17inputTCELL28:IMUX.IMUX0
TRNTD18inputTCELL28:IMUX.IMUX1
TRNTD19inputTCELL28:IMUX.IMUX2
TRNTD2inputTCELL24:IMUX.IMUX2
TRNTD20inputTCELL28:IMUX.IMUX3
TRNTD21inputTCELL29:IMUX.IMUX0
TRNTD22inputTCELL29:IMUX.IMUX1
TRNTD23inputTCELL29:IMUX.IMUX2
TRNTD24inputTCELL29:IMUX.IMUX3
TRNTD25inputTCELL30:IMUX.IMUX0
TRNTD26inputTCELL31:IMUX.IMUX0
TRNTD27inputTCELL32:IMUX.IMUX0
TRNTD28inputTCELL32:IMUX.IMUX2
TRNTD29inputTCELL32:IMUX.IMUX4
TRNTD3inputTCELL24:IMUX.IMUX4
TRNTD30inputTCELL33:IMUX.IMUX0
TRNTD31inputTCELL33:IMUX.IMUX2
TRNTD32inputTCELL33:IMUX.IMUX3
TRNTD33inputTCELL33:IMUX.IMUX4
TRNTD34inputTCELL34:IMUX.IMUX0
TRNTD35inputTCELL34:IMUX.IMUX2
TRNTD36inputTCELL34:IMUX.IMUX4
TRNTD37inputTCELL34:IMUX.IMUX5
TRNTD38inputTCELL35:IMUX.IMUX0
TRNTD39inputTCELL35:IMUX.IMUX1
TRNTD4inputTCELL24:IMUX.IMUX5
TRNTD40inputTCELL35:IMUX.IMUX2
TRNTD41inputTCELL35:IMUX.IMUX3
TRNTD42inputTCELL36:IMUX.IMUX0
TRNTD43inputTCELL36:IMUX.IMUX1
TRNTD44inputTCELL36:IMUX.IMUX2
TRNTD45inputTCELL36:IMUX.IMUX3
TRNTD46inputTCELL37:IMUX.IMUX0
TRNTD47inputTCELL37:IMUX.IMUX1
TRNTD48inputTCELL37:IMUX.IMUX2
TRNTD49inputTCELL37:IMUX.IMUX3
TRNTD5inputTCELL25:IMUX.IMUX0
TRNTD50inputTCELL38:IMUX.IMUX0
TRNTD51inputTCELL38:IMUX.IMUX1
TRNTD52inputTCELL38:IMUX.IMUX2
TRNTD53inputTCELL38:IMUX.IMUX3
TRNTD54inputTCELL39:IMUX.IMUX0
TRNTD55inputTCELL39:IMUX.IMUX1
TRNTD56inputTCELL39:IMUX.IMUX2
TRNTD57inputTCELL39:IMUX.IMUX3
TRNTD58inputTCELL19:IMUX.IMUX0
TRNTD59inputTCELL19:IMUX.IMUX1
TRNTD6inputTCELL25:IMUX.IMUX1
TRNTD60inputTCELL19:IMUX.IMUX2
TRNTD61inputTCELL19:IMUX.IMUX3
TRNTD62inputTCELL18:IMUX.IMUX0
TRNTD63inputTCELL18:IMUX.IMUX1
TRNTD7inputTCELL25:IMUX.IMUX2
TRNTD8inputTCELL25:IMUX.IMUX3
TRNTD9inputTCELL26:IMUX.IMUX0
TRNTDLLPDATA0inputTCELL13:IMUX.IMUX7
TRNTDLLPDATA1inputTCELL13:IMUX.IMUX8
TRNTDLLPDATA10inputTCELL7:IMUX.IMUX4
TRNTDLLPDATA11inputTCELL7:IMUX.IMUX5
TRNTDLLPDATA12inputTCELL7:IMUX.IMUX6
TRNTDLLPDATA13inputTCELL7:IMUX.IMUX7
TRNTDLLPDATA14inputTCELL6:IMUX.IMUX4
TRNTDLLPDATA15inputTCELL6:IMUX.IMUX5
TRNTDLLPDATA16inputTCELL6:IMUX.IMUX6
TRNTDLLPDATA17inputTCELL6:IMUX.IMUX7
TRNTDLLPDATA18inputTCELL5:IMUX.IMUX4
TRNTDLLPDATA19inputTCELL5:IMUX.IMUX6
TRNTDLLPDATA2inputTCELL9:IMUX.IMUX4
TRNTDLLPDATA20inputTCELL5:IMUX.IMUX7
TRNTDLLPDATA21inputTCELL5:IMUX.IMUX8
TRNTDLLPDATA22inputTCELL4:IMUX.IMUX6
TRNTDLLPDATA23inputTCELL3:IMUX.IMUX5
TRNTDLLPDATA24inputTCELL3:IMUX.IMUX6
TRNTDLLPDATA25inputTCELL3:IMUX.IMUX7
TRNTDLLPDATA26inputTCELL3:IMUX.IMUX8
TRNTDLLPDATA27inputTCELL23:IMUX.IMUX9
TRNTDLLPDATA28inputTCELL25:IMUX.IMUX9
TRNTDLLPDATA29inputTCELL26:IMUX.IMUX8
TRNTDLLPDATA3inputTCELL9:IMUX.IMUX5
TRNTDLLPDATA30inputTCELL26:IMUX.IMUX9
TRNTDLLPDATA31inputTCELL26:IMUX.IMUX10
TRNTDLLPDATA4inputTCELL9:IMUX.IMUX6
TRNTDLLPDATA5inputTCELL9:IMUX.IMUX7
TRNTDLLPDATA6inputTCELL8:IMUX.IMUX4
TRNTDLLPDATA7inputTCELL8:IMUX.IMUX5
TRNTDLLPDATA8inputTCELL8:IMUX.IMUX6
TRNTDLLPDATA9inputTCELL8:IMUX.IMUX7
TRNTDLLPDSTRDYNoutputTCELL14:OUT10
TRNTDLLPSRCRDYNinputTCELL26:IMUX.IMUX11
TRNTDSTRDYNoutputTCELL22:OUT3
TRNTECRCGENNinputTCELL16:IMUX.IMUX0
TRNTEOFNinputTCELL17:IMUX.IMUX0
TRNTERRDROPNoutputTCELL23:OUT0
TRNTERRFWDNinputTCELL17:IMUX.IMUX3
TRNTREMNinputTCELL18:IMUX.IMUX2
TRNTSOFNinputTCELL18:IMUX.IMUX3
TRNTSRCDSCNinputTCELL17:IMUX.IMUX2
TRNTSRCRDYNinputTCELL17:IMUX.IMUX1
TRNTSTRNinputTCELL16:IMUX.IMUX1
USERCLKinputTCELL29:IMUX.CLK0
USERCLKPREBUFinputTCELL20:IMUX.CLK0
USERRSTNoutputTCELL22:OUT12
XILUNCONNOUT0outputTCELL15:OUT15
XILUNCONNOUT1outputTCELL14:OUT14
XILUNCONNOUT2outputTCELL14:OUT16
XILUNCONNOUT3outputTCELL13:OUT19

Bel wires

virtex6 PCIE bel wires
WirePins
TCELL0:IMUX.IMUX0PCIE.MIMTXRDATA45
TCELL0:IMUX.IMUX1PCIE.PIPERX3DATA4
TCELL0:IMUX.IMUX2PCIE.CFGERRAERHEADERLOG33
TCELL0:IMUX.IMUX3PCIE.PIPERX3DATA0
TCELL0:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG34
TCELL0:IMUX.IMUX5PCIE.PIPERX3DATA1
TCELL0:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG35
TCELL0:IMUX.IMUX7PCIE.PIPERX7DATA2
TCELL0:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG36
TCELL0:IMUX.IMUX9PCIE.PIPERX3DATA5
TCELL0:IMUX.IMUX10PCIE.CFGDSBUSNUMBER0
TCELL0:IMUX.IMUX11PCIE.PIPERX7DATA0
TCELL0:IMUX.IMUX12PCIE.CFGDSBUSNUMBER1
TCELL0:IMUX.IMUX13PCIE.PIPERX7DATA1
TCELL0:IMUX.IMUX14PCIE.CFGDSBUSNUMBER2
TCELL0:IMUX.IMUX15PCIE.PIPERX3DATA2
TCELL0:IMUX.IMUX16PCIE.CFGDSBUSNUMBER3
TCELL0:IMUX.IMUX17PCIE.PIPERX7DATA4
TCELL0:IMUX.IMUX19PCIE.PIPERX3DATA3
TCELL0:IMUX.IMUX21PCIE.PIPERX7DATA5
TCELL0:IMUX.IMUX23PCIE.PIPERX7DATA3
TCELL0:OUT0PCIE.TRNFCCPLH5
TCELL0:OUT1PCIE.TRNFCCPLH6
TCELL0:OUT2PCIE.TRNFCCPLH7
TCELL0:OUT3PCIE.TRNFCCPLD0
TCELL0:OUT4PCIE.MIMRXWDATA11
TCELL0:OUT5PCIE.MIMRXWDATA12
TCELL0:OUT6PCIE.PIPETXMARGIN2
TCELL0:OUT7PCIE.MIMRXWDATA13
TCELL0:OUT8PCIE.MIMRXWDATA14
TCELL0:OUT9PCIE.PL2LINKUPN
TCELL0:OUT10PCIE.PL2RECEIVERERRN
TCELL0:OUT11PCIE.LL2PROTOCOLERRN
TCELL0:OUT12PCIE.LL2BADTLPERRN
TCELL0:OUT13PCIE.CFGCOMMANDIOENABLE
TCELL0:OUT14PCIE.CFGCOMMANDMEMENABLE
TCELL0:OUT15PCIE.CFGCOMMANDBUSMASTERENABLE
TCELL0:OUT16PCIE.PIPETXMARGIN1
TCELL0:OUT17PCIE.CFGCOMMANDSERREN
TCELL0:OUT18PCIE.PIPETXMARGIN0
TCELL0:OUT19PCIE.DBGVECA26
TCELL0:OUT20PCIE.DBGVECA27
TCELL0:OUT21PCIE.DBGVECA28
TCELL0:OUT22PCIE.DBGVECA29
TCELL0:OUT23PCIE.DBGVECB59
TCELL1:IMUX.IMUX0PCIE.MIMTXRDATA44
TCELL1:IMUX.IMUX1PCIE.PIPERX3DATA6
TCELL1:IMUX.IMUX2PCIE.CFGERRAERHEADERLOG29
TCELL1:IMUX.IMUX3PCIE.PIPERX3DATA8
TCELL1:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG30
TCELL1:IMUX.IMUX5PCIE.PIPERX3DATA9
TCELL1:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG31
TCELL1:IMUX.IMUX7PCIE.PIPERX3DATA10
TCELL1:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG32
TCELL1:IMUX.IMUX9PCIE.PIPERX3DATA7
TCELL1:IMUX.IMUX10PCIE.CFGINTERRUPTDI5
TCELL1:IMUX.IMUX11PCIE.PIPERX7DATA8
TCELL1:IMUX.IMUX12PCIE.CFGINTERRUPTDI6
TCELL1:IMUX.IMUX13PCIE.PIPERX7DATA9
TCELL1:IMUX.IMUX14PCIE.CFGINTERRUPTDI7
TCELL1:IMUX.IMUX15PCIE.PIPERX3DATA11
TCELL1:IMUX.IMUX16PCIE.CFGINTERRUPTASSERTN
TCELL1:IMUX.IMUX17PCIE.PIPERX7DATA6
TCELL1:IMUX.IMUX19PCIE.PIPERX7DATA10
TCELL1:IMUX.IMUX21PCIE.PIPERX7DATA7
TCELL1:IMUX.IMUX23PCIE.PIPERX7DATA11
TCELL1:OUT0PCIE.TRNFCCPLH1
TCELL1:OUT1PCIE.TRNFCCPLH2
TCELL1:OUT2PCIE.TRNFCCPLH3
TCELL1:OUT3PCIE.TRNFCCPLH4
TCELL1:OUT4PCIE.MIMRXWDATA7
TCELL1:OUT5PCIE.MIMRXWDATA8
TCELL1:OUT6PCIE.MIMRXWDATA9
TCELL1:OUT7PCIE.MIMRXWDATA10
TCELL1:OUT8PCIE.LL2SUSPENDOKN
TCELL1:OUT9PCIE.TL2PPMSUSPENDOKN
TCELL1:OUT10PCIE.TL2ASPMSUSPENDREQN
TCELL1:OUT11PCIE.TL2ASPMSUSPENDCREDITCHECKOKN
TCELL1:OUT12PCIE.CFGTRANSACTIONADDR3
TCELL1:OUT13PCIE.CFGTRANSACTIONADDR4
TCELL1:OUT14PCIE.CFGTRANSACTIONADDR5
TCELL1:OUT15PCIE.CFGTRANSACTIONADDR6
TCELL1:OUT16PCIE.DRPDO7
TCELL1:OUT17PCIE.DRPDO8
TCELL1:OUT18PCIE.PIPERX3POLARITY
TCELL1:OUT19PCIE.DRPDO9
TCELL1:OUT20PCIE.DBGVECB58
TCELL1:OUT21PCIE.DBGVECA24
TCELL1:OUT22PCIE.PIPERX7POLARITY
TCELL1:OUT23PCIE.DBGVECA25
TCELL2:IMUX.IMUX0PCIE.MIMTXRDATA41
TCELL2:IMUX.IMUX1PCIE.PIPERX3CHARISK1
TCELL2:IMUX.IMUX2PCIE.MIMTXRDATA42
TCELL2:IMUX.IMUX3PCIE.PIPERX7DATA13
TCELL2:IMUX.IMUX4PCIE.MIMTXRDATA43
TCELL2:IMUX.IMUX5PCIE.PIPERX3DATA12
TCELL2:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG25
TCELL2:IMUX.IMUX7PCIE.PIPERX3DATA13
TCELL2:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG26
TCELL2:IMUX.IMUX9PCIE.PIPERX3DATA15
TCELL2:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG27
TCELL2:IMUX.IMUX11PCIE.PIPERX3DATA14
TCELL2:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG28
TCELL2:IMUX.IMUX13PCIE.PIPERX7DATA12
TCELL2:IMUX.IMUX14PCIE.CFGINTERRUPTDI1
TCELL2:IMUX.IMUX15PCIE.PIPERX7DATA14
TCELL2:IMUX.IMUX16PCIE.CFGINTERRUPTDI2
TCELL2:IMUX.IMUX17PCIE.PIPERX7CHARISK1
TCELL2:IMUX.IMUX18PCIE.CFGINTERRUPTDI3
TCELL2:IMUX.IMUX19PCIE.CFGINTERRUPTDI4
TCELL2:IMUX.IMUX21PCIE.PIPERX7DATA15
TCELL2:OUT0PCIE.TRNFCNPD9
TCELL2:OUT1PCIE.TRNFCNPD10
TCELL2:OUT2PCIE.TRNFCNPD11
TCELL2:OUT3PCIE.TRNFCCPLH0
TCELL2:OUT4PCIE.MIMRXWDATA3
TCELL2:OUT5PCIE.MIMRXWDATA4
TCELL2:OUT6PCIE.MIMRXWDATA5
TCELL2:OUT7PCIE.MIMRXWDATA6
TCELL2:OUT8PCIE.LL2TFCINIT2SEQN
TCELL2:OUT9PCIE.PL2SUSPENDOK
TCELL2:OUT10PCIE.PL2RECOVERYN
TCELL2:OUT11PCIE.PL2RXELECIDLE
TCELL2:OUT12PCIE.CFGTRANSACTIONTYPE
TCELL2:OUT13PCIE.CFGTRANSACTIONADDR0
TCELL2:OUT14PCIE.CFGTRANSACTIONADDR1
TCELL2:OUT15PCIE.CFGTRANSACTIONADDR2
TCELL2:OUT16PCIE.DRPDO3
TCELL2:OUT17PCIE.DRPDO4
TCELL2:OUT18PCIE.DRPDO5
TCELL2:OUT19PCIE.DRPDO6
TCELL2:OUT20PCIE.DBGVECA20
TCELL2:OUT21PCIE.DBGVECA21
TCELL2:OUT22PCIE.DBGVECA22
TCELL2:OUT23PCIE.DBGVECA23
TCELL3:IMUX.IMUX0PCIE.MIMTXRDATA37
TCELL3:IMUX.IMUX1PCIE.PIPERX7CHANISALIGNED
TCELL3:IMUX.IMUX2PCIE.MIMTXRDATA38
TCELL3:IMUX.IMUX3PCIE.MIMTXRDATA39
TCELL3:IMUX.IMUX4PCIE.MIMTXRDATA40
TCELL3:IMUX.IMUX5PCIE.TRNTDLLPDATA23
TCELL3:IMUX.IMUX6PCIE.TRNTDLLPDATA24
TCELL3:IMUX.IMUX7PCIE.TRNTDLLPDATA25
TCELL3:IMUX.IMUX8PCIE.TRNTDLLPDATA26
TCELL3:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG21
TCELL3:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG22
TCELL3:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG23
TCELL3:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG24
TCELL3:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER46
TCELL3:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER47
TCELL3:IMUX.IMUX15PCIE.PIPERX7CHARISK0
TCELL3:IMUX.IMUX16PCIE.CFGINTERRUPTN
TCELL3:IMUX.IMUX17PCIE.CFGINTERRUPTDI0
TCELL3:IMUX.IMUX18PCIE.CFGDSN63
TCELL3:IMUX.IMUX21PCIE.PIPERX3CHANISALIGNED
TCELL3:IMUX.IMUX23PCIE.PIPERX3CHARISK0
TCELL3:OUT0PCIE.TRNFCNPD5
TCELL3:OUT1PCIE.TRNFCNPD6
TCELL3:OUT2PCIE.TRNFCNPD7
TCELL3:OUT3PCIE.TRNFCNPD8
TCELL3:OUT4PCIE.MIMTXRCE
TCELL3:OUT5PCIE.MIMRXWDATA0
TCELL3:OUT6PCIE.MIMRXWDATA1
TCELL3:OUT7PCIE.MIMRXWDATA2
TCELL3:OUT8PCIE.TRNRDLLPDATA30
TCELL3:OUT9PCIE.TRNRDLLPDATA31
TCELL3:OUT10PCIE.TRNRDLLPSRCRDYN
TCELL3:OUT11PCIE.LL2TFCINIT1SEQN
TCELL3:OUT12PCIE.CFGPMRCVENTERL1N
TCELL3:OUT13PCIE.CFGPMRCVENTERL23N
TCELL3:OUT14PCIE.CFGPMRCVREQACKN
TCELL3:OUT15PCIE.CFGTRANSACTION
TCELL3:OUT16PCIE.DRPDRDY
TCELL3:OUT17PCIE.DRPDO0
TCELL3:OUT18PCIE.DRPDO1
TCELL3:OUT19PCIE.DRPDO2
TCELL3:OUT20PCIE.DBGVECA16
TCELL3:OUT21PCIE.DBGVECA17
TCELL3:OUT22PCIE.DBGVECA18
TCELL3:OUT23PCIE.DBGVECA19
TCELL4:IMUX.IMUX0PCIE.MIMTXRDATA33
TCELL4:IMUX.IMUX1PCIE.PIPERX7STATUS2
TCELL4:IMUX.IMUX2PCIE.MIMTXRDATA34
TCELL4:IMUX.IMUX3PCIE.PIPERX7STATUS0
TCELL4:IMUX.IMUX4PCIE.MIMTXRDATA35
TCELL4:IMUX.IMUX5PCIE.MIMTXRDATA36
TCELL4:IMUX.IMUX6PCIE.TRNTDLLPDATA22
TCELL4:IMUX.IMUX7PCIE.PIPERX7STATUS1
TCELL4:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG17
TCELL4:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG18
TCELL4:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG19
TCELL4:IMUX.IMUX11PCIE.PIPERX3PHYSTATUS
TCELL4:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG20
TCELL4:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER42
TCELL4:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER43
TCELL4:IMUX.IMUX15PCIE.PIPERX7PHYSTATUS
TCELL4:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER44
TCELL4:IMUX.IMUX17PCIE.CFGERRTLPCPLHEADER45
TCELL4:IMUX.IMUX19PCIE.PIPERX3STATUS1
TCELL4:IMUX.IMUX21PCIE.PIPERX3STATUS2
TCELL4:IMUX.IMUX23PCIE.PIPERX3STATUS0
TCELL4:OUT0PCIE.TRNFCNPD1
TCELL4:OUT1PCIE.PIPETX3ELECIDLE
TCELL4:OUT2PCIE.TRNFCNPD2
TCELL4:OUT3PCIE.TRNFCNPD3
TCELL4:OUT4PCIE.TRNFCNPD4
TCELL4:OUT5PCIE.PIPETX7ELECIDLE
TCELL4:OUT6PCIE.MIMTXRADDR10
TCELL4:OUT7PCIE.MIMTXRADDR11
TCELL4:OUT8PCIE.MIMTXRADDR12
TCELL4:OUT9PCIE.MIMTXREN
TCELL4:OUT10PCIE.TRNRDLLPDATA26
TCELL4:OUT11PCIE.TRNRDLLPDATA27
TCELL4:OUT12PCIE.TRNRDLLPDATA28
TCELL4:OUT13PCIE.TRNRDLLPDATA29
TCELL4:OUT14PCIE.CFGPCIELINKSTATE2
TCELL4:OUT15PCIE.CFGPMRCVASREQL1N
TCELL4:OUT16PCIE.DBGVECB57
TCELL4:OUT17PCIE.PIPETX7POWERDOWN0
TCELL4:OUT18PCIE.DBGVECA13
TCELL4:OUT19PCIE.PIPETX7POWERDOWN1
TCELL4:OUT20PCIE.DBGVECA14
TCELL4:OUT21PCIE.PIPETX3POWERDOWN0
TCELL4:OUT22PCIE.DBGVECA15
TCELL4:OUT23PCIE.PIPETX3POWERDOWN1
TCELL5:IMUX.IMUX0PCIE.MIMTXRDATA29
TCELL5:IMUX.IMUX1PCIE.MIMTXRDATA30
TCELL5:IMUX.IMUX2PCIE.MIMTXRDATA31
TCELL5:IMUX.IMUX3PCIE.MIMTXRDATA32
TCELL5:IMUX.IMUX4PCIE.TRNTDLLPDATA18
TCELL5:IMUX.IMUX5PCIE.PIPERX7ELECIDLE
TCELL5:IMUX.IMUX6PCIE.TRNTDLLPDATA19
TCELL5:IMUX.IMUX7PCIE.TRNTDLLPDATA20
TCELL5:IMUX.IMUX8PCIE.TRNTDLLPDATA21
TCELL5:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG13
TCELL5:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG14
TCELL5:IMUX.IMUX11PCIE.PIPERX7VALID
TCELL5:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG15
TCELL5:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG16
TCELL5:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER38
TCELL5:IMUX.IMUX15PCIE.CFGERRTLPCPLHEADER39
TCELL5:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER40
TCELL5:IMUX.IMUX17PCIE.CFGERRTLPCPLHEADER41
TCELL5:IMUX.IMUX18PCIE.CFGDSN62
TCELL5:IMUX.IMUX19PCIE.PIPERX3VALID
TCELL5:IMUX.IMUX21PCIE.PIPERX3ELECIDLE
TCELL5:OUT0PCIE.TRNFCNPH5
TCELL5:OUT1PCIE.TRNFCNPH6
TCELL5:OUT2PCIE.TRNFCNPH7
TCELL5:OUT3PCIE.TRNFCNPD0
TCELL5:OUT4PCIE.MIMTXRADDR6
TCELL5:OUT5PCIE.MIMTXRADDR7
TCELL5:OUT6PCIE.MIMTXRADDR8
TCELL5:OUT7PCIE.MIMTXRADDR9
TCELL5:OUT8PCIE.TRNRDLLPDATA22
TCELL5:OUT9PCIE.TRNRDLLPDATA23
TCELL5:OUT10PCIE.TRNRDLLPDATA24
TCELL5:OUT11PCIE.TRNRDLLPDATA25
TCELL5:OUT12PCIE.CFGPCIELINKSTATE1
TCELL5:OUT13PCIE.DBGVECB55
TCELL5:OUT14PCIE.DBGVECB56
TCELL5:OUT15PCIE.DBGVECA10
TCELL5:OUT16PCIE.PIPETX3COMPLIANCE
TCELL5:OUT17PCIE.DBGVECA11
TCELL5:OUT18PCIE.PIPETX3CHARISK0
TCELL5:OUT19PCIE.PIPETX7CHARISK1
TCELL5:OUT20PCIE.PIPETX7COMPLIANCE
TCELL5:OUT21PCIE.DBGVECA12
TCELL5:OUT22PCIE.PIPETX7CHARISK0
TCELL5:OUT23PCIE.PIPETX3CHARISK1
TCELL6:IMUX.IMUX0PCIE.MIMTXRDATA25
TCELL6:IMUX.IMUX1PCIE.MIMTXRDATA26
TCELL6:IMUX.IMUX2PCIE.MIMTXRDATA27
TCELL6:IMUX.IMUX3PCIE.MIMTXRDATA28
TCELL6:IMUX.IMUX4PCIE.TRNTDLLPDATA14
TCELL6:IMUX.IMUX5PCIE.TRNTDLLPDATA15
TCELL6:IMUX.IMUX6PCIE.TRNTDLLPDATA16
TCELL6:IMUX.IMUX7PCIE.TRNTDLLPDATA17
TCELL6:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG9
TCELL6:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG10
TCELL6:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG11
TCELL6:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG12
TCELL6:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER34
TCELL6:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER35
TCELL6:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER36
TCELL6:IMUX.IMUX15PCIE.CFGERRTLPCPLHEADER37
TCELL6:IMUX.IMUX16PCIE.CFGDSN58
TCELL6:IMUX.IMUX17PCIE.CFGDSN59
TCELL6:IMUX.IMUX18PCIE.CFGDSN60
TCELL6:IMUX.IMUX19PCIE.CFGDSN61
TCELL6:IMUX.IMUX20PCIE.DBGMODE1
TCELL6:OUT0PCIE.TRNFCNPH1
TCELL6:OUT1PCIE.TRNFCNPH2
TCELL6:OUT2PCIE.PIPETX7DATA13
TCELL6:OUT3PCIE.TRNFCNPH3
TCELL6:OUT4PCIE.TRNFCNPH4
TCELL6:OUT5PCIE.MIMTXRADDR2
TCELL6:OUT6PCIE.PIPETX3DATA13
TCELL6:OUT7PCIE.MIMTXRADDR3
TCELL6:OUT8PCIE.MIMTXRADDR4
TCELL6:OUT9PCIE.MIMTXRADDR5
TCELL6:OUT10PCIE.TRNRDLLPDATA20
TCELL6:OUT11PCIE.TRNRDLLPDATA21
TCELL6:OUT12PCIE.CFGPCIELINKSTATE0
TCELL6:OUT13PCIE.DBGVECB53
TCELL6:OUT14PCIE.DBGVECB54
TCELL6:OUT15PCIE.DBGVECA7
TCELL6:OUT16PCIE.PIPETX3DATA12
TCELL6:OUT17PCIE.PIPETX7DATA15
TCELL6:OUT18PCIE.DBGVECA8
TCELL6:OUT19PCIE.PIPETX7DATA14
TCELL6:OUT20PCIE.PIPETX7DATA12
TCELL6:OUT21PCIE.PIPETX3DATA15
TCELL6:OUT22PCIE.DBGVECA9
TCELL6:OUT23PCIE.PIPETX3DATA14
TCELL7:IMUX.IMUX0PCIE.MIMTXRDATA21
TCELL7:IMUX.IMUX1PCIE.MIMTXRDATA22
TCELL7:IMUX.IMUX2PCIE.MIMTXRDATA23
TCELL7:IMUX.IMUX3PCIE.MIMTXRDATA24
TCELL7:IMUX.IMUX4PCIE.TRNTDLLPDATA10
TCELL7:IMUX.IMUX5PCIE.TRNTDLLPDATA11
TCELL7:IMUX.IMUX6PCIE.TRNTDLLPDATA12
TCELL7:IMUX.IMUX7PCIE.TRNTDLLPDATA13
TCELL7:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG5
TCELL7:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG6
TCELL7:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG7
TCELL7:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG8
TCELL7:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER30
TCELL7:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER31
TCELL7:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER32
TCELL7:IMUX.IMUX15PCIE.CFGERRTLPCPLHEADER33
TCELL7:IMUX.IMUX16PCIE.CFGDSN54
TCELL7:IMUX.IMUX17PCIE.CFGDSN55
TCELL7:IMUX.IMUX18PCIE.CFGDSN56
TCELL7:IMUX.IMUX19PCIE.CFGDSN57
TCELL7:IMUX.IMUX20PCIE.DBGMODE0
TCELL7:OUT0PCIE.TRNFCPD9
TCELL7:OUT1PCIE.PIPETX3DATA11
TCELL7:OUT2PCIE.PIPETX7DATA8
TCELL7:OUT3PCIE.TRNFCPD10
TCELL7:OUT4PCIE.TRNFCPD11
TCELL7:OUT5PCIE.PIPETX7DATA11
TCELL7:OUT6PCIE.PIPETX3DATA8
TCELL7:OUT7PCIE.TRNFCNPH0
TCELL7:OUT8PCIE.MIMTXRADDR0
TCELL7:OUT9PCIE.MIMTXRADDR1
TCELL7:OUT10PCIE.CFGMSGRECEIVEDPMASNAK
TCELL7:OUT11PCIE.DBGVECB51
TCELL7:OUT12PCIE.DBGVECB52
TCELL7:OUT13PCIE.DBGVECA4
TCELL7:OUT14PCIE.DBGVECA5
TCELL7:OUT15PCIE.DBGVECA6
TCELL7:OUT16PCIE.PIPETX3DATA7
TCELL7:OUT17PCIE.PIPETX7DATA10
TCELL7:OUT18PCIE.PIPETX3DATA6
TCELL7:OUT19PCIE.PIPETX7DATA9
TCELL7:OUT20PCIE.PIPETX7DATA7
TCELL7:OUT21PCIE.PIPETX3DATA10
TCELL7:OUT22PCIE.PIPETX7DATA6
TCELL7:OUT23PCIE.PIPETX3DATA9
TCELL8:IMUX.IMUX0PCIE.MIMTXRDATA17
TCELL8:IMUX.IMUX1PCIE.MIMTXRDATA18
TCELL8:IMUX.IMUX2PCIE.MIMTXRDATA19
TCELL8:IMUX.IMUX3PCIE.MIMTXRDATA20
TCELL8:IMUX.IMUX4PCIE.TRNTDLLPDATA6
TCELL8:IMUX.IMUX5PCIE.TRNTDLLPDATA7
TCELL8:IMUX.IMUX6PCIE.TRNTDLLPDATA8
TCELL8:IMUX.IMUX7PCIE.TRNTDLLPDATA9
TCELL8:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG1
TCELL8:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG2
TCELL8:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG3
TCELL8:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG4
TCELL8:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER26
TCELL8:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER27
TCELL8:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER28
TCELL8:IMUX.IMUX15PCIE.CFGERRTLPCPLHEADER29
TCELL8:IMUX.IMUX16PCIE.CFGDSN50
TCELL8:IMUX.IMUX17PCIE.CFGDSN51
TCELL8:IMUX.IMUX18PCIE.CFGDSN52
TCELL8:IMUX.IMUX19PCIE.CFGDSN53
TCELL8:IMUX.IMUX20PCIE.DRPDI15
TCELL8:OUT0PCIE.TRNFCPD5
TCELL8:OUT1PCIE.PIPETX3DATA3
TCELL8:OUT2PCIE.PIPETX7DATA4
TCELL8:OUT3PCIE.TRNFCPD6
TCELL8:OUT4PCIE.TRNFCPD7
TCELL8:OUT5PCIE.PIPETX7DATA3
TCELL8:OUT6PCIE.PIPETX3DATA4
TCELL8:OUT7PCIE.TRNFCPD8
TCELL8:OUT8PCIE.MIMTXWADDR12
TCELL8:OUT9PCIE.MIMTXWEN
TCELL8:OUT10PCIE.CFGMSGRECEIVEDUNLOCK
TCELL8:OUT11PCIE.DBGVECB49
TCELL8:OUT12PCIE.CFGVCTCVCMAP4
TCELL8:OUT13PCIE.CFGVCTCVCMAP5
TCELL8:OUT14PCIE.CFGVCTCVCMAP6
TCELL8:OUT15PCIE.DBGVECB50
TCELL8:OUT16PCIE.PIPETX3DATA0
TCELL8:OUT17PCIE.PIPETX7DATA1
TCELL8:OUT18PCIE.PIPETX3DATA5
TCELL8:OUT19PCIE.PIPETX7DATA2
TCELL8:OUT20PCIE.PIPETX7DATA0
TCELL8:OUT21PCIE.PIPETX3DATA1
TCELL8:OUT22PCIE.PIPETX7DATA5
TCELL8:OUT23PCIE.PIPETX3DATA2
TCELL9:IMUX.IMUX0PCIE.MIMTXRDATA13
TCELL9:IMUX.IMUX1PCIE.MIMTXRDATA14
TCELL9:IMUX.IMUX2PCIE.MIMTXRDATA15
TCELL9:IMUX.IMUX3PCIE.MIMTXRDATA16
TCELL9:IMUX.IMUX4PCIE.TRNTDLLPDATA2
TCELL9:IMUX.IMUX5PCIE.TRNTDLLPDATA3
TCELL9:IMUX.IMUX6PCIE.TRNTDLLPDATA4
TCELL9:IMUX.IMUX7PCIE.TRNTDLLPDATA5
TCELL9:IMUX.IMUX8PCIE.CFGERRACSN
TCELL9:IMUX.IMUX9PCIE.CFGERRPOSTEDN
TCELL9:IMUX.IMUX10PCIE.CFGERRLOCKEDN
TCELL9:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG0
TCELL9:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER22
TCELL9:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER23
TCELL9:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER24
TCELL9:IMUX.IMUX15PCIE.CFGERRTLPCPLHEADER25
TCELL9:IMUX.IMUX16PCIE.CFGDSN46
TCELL9:IMUX.IMUX17PCIE.CFGDSN47
TCELL9:IMUX.IMUX18PCIE.CFGDSN48
TCELL9:IMUX.IMUX19PCIE.CFGDSN49
TCELL9:IMUX.IMUX20PCIE.DRPDI14
TCELL9:OUT0PCIE.TRNFCPD1
TCELL9:OUT1PCIE.TRNFCPD2
TCELL9:OUT2PCIE.TRNFCPD3
TCELL9:OUT3PCIE.TRNFCPD4
TCELL9:OUT4PCIE.MIMTXWADDR8
TCELL9:OUT5PCIE.MIMTXWADDR9
TCELL9:OUT6PCIE.MIMTXWADDR10
TCELL9:OUT7PCIE.MIMTXWADDR11
TCELL9:OUT8PCIE.TRNRDLLPDATA16
TCELL9:OUT9PCIE.TRNRDLLPDATA17
TCELL9:OUT10PCIE.TRNRDLLPDATA18
TCELL9:OUT11PCIE.TRNRDLLPDATA19
TCELL9:OUT12PCIE.CFGMSGRECEIVEDPMPME
TCELL9:OUT13PCIE.CFGMSGRECEIVEDPMETOACK
TCELL9:OUT14PCIE.CFGMSGRECEIVEDPMETO
TCELL9:OUT15PCIE.CFGMSGRECEIVEDSETSLOTPOWERLIMIT
TCELL9:OUT16PCIE.CFGVCTCVCMAP0
TCELL9:OUT17PCIE.CFGVCTCVCMAP1
TCELL9:OUT18PCIE.CFGVCTCVCMAP2
TCELL9:OUT19PCIE.CFGVCTCVCMAP3
TCELL9:OUT20PCIE.DBGVECA3
TCELL9:OUT21PCIE.LNKCLKEN
TCELL9:OUT22PCIE.CFGPMCSRPOWERSTATE1
TCELL9:OUT23PCIE.CFGPMCSRPOWERSTATE0
TCELL10:IMUX.IMUX0PCIE.MIMTXRDATA12
TCELL10:IMUX.IMUX1PCIE.PIPERX2DATA4
TCELL10:IMUX.IMUX2PCIE.CFGERRECRCN
TCELL10:IMUX.IMUX3PCIE.PIPERX2DATA0
TCELL10:IMUX.IMUX4PCIE.CFGERRCPLTIMEOUTN
TCELL10:IMUX.IMUX5PCIE.PIPERX2DATA1
TCELL10:IMUX.IMUX6PCIE.CFGERRCPLABORTN
TCELL10:IMUX.IMUX7PCIE.PIPERX6DATA2
TCELL10:IMUX.IMUX8PCIE.CFGERRCPLUNEXPECTN
TCELL10:IMUX.IMUX9PCIE.PIPERX2DATA5
TCELL10:IMUX.IMUX10PCIE.CFGERRTLPCPLHEADER18
TCELL10:IMUX.IMUX11PCIE.PIPERX6DATA0
TCELL10:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER19
TCELL10:IMUX.IMUX13PCIE.PIPERX6DATA1
TCELL10:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER20
TCELL10:IMUX.IMUX15PCIE.PIPERX2DATA2
TCELL10:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER21
TCELL10:IMUX.IMUX17PCIE.PIPERX6DATA4
TCELL10:IMUX.IMUX19PCIE.PIPERX2DATA3
TCELL10:IMUX.IMUX21PCIE.PIPERX6DATA5
TCELL10:IMUX.IMUX23PCIE.PIPERX6DATA3
TCELL10:OUT0PCIE.TRNFCPH5
TCELL10:OUT1PCIE.TRNFCPH6
TCELL10:OUT2PCIE.TRNFCPH7
TCELL10:OUT3PCIE.TRNFCPD0
TCELL10:OUT4PCIE.MIMTXWADDR4
TCELL10:OUT5PCIE.MIMTXWADDR5
TCELL10:OUT6PCIE.MIMTXWADDR6
TCELL10:OUT7PCIE.MIMTXWADDR7
TCELL10:OUT8PCIE.TRNRDLLPDATA12
TCELL10:OUT9PCIE.TRNRDLLPDATA13
TCELL10:OUT10PCIE.TRNRDLLPDATA14
TCELL10:OUT11PCIE.TRNRDLLPDATA15
TCELL10:OUT12PCIE.CFGMSGRECEIVEDASSERTINTC
TCELL10:OUT13PCIE.CFGMSGRECEIVEDDEASSERTINTC
TCELL10:OUT14PCIE.CFGMSGRECEIVEDASSERTINTD
TCELL10:OUT15PCIE.CFGMSGRECEIVEDDEASSERTINTD
TCELL10:OUT16PCIE.CFGDEVCONTROL2CPLTIMEOUTDIS
TCELL10:OUT17PCIE.CFGSLOTCONTROLELECTROMECHILCTLPULSE
TCELL10:OUT18PCIE.CFGAERECRCCHECKEN
TCELL10:OUT19PCIE.CFGAERECRCGENEN
TCELL10:OUT20PCIE.DRPDO15
TCELL10:OUT21PCIE.DBGVECA0
TCELL10:OUT22PCIE.DBGVECA1
TCELL10:OUT23PCIE.DBGVECA2
TCELL11:IMUX.IMUX0PCIE.MIMTXRDATA11
TCELL11:IMUX.IMUX1PCIE.PIPERX2DATA6
TCELL11:IMUX.IMUX2PCIE.CFGWRENN
TCELL11:IMUX.IMUX3PCIE.PIPERX2DATA8
TCELL11:IMUX.IMUX4PCIE.CFGRDENN
TCELL11:IMUX.IMUX5PCIE.PIPERX2DATA9
TCELL11:IMUX.IMUX6PCIE.CFGERRCORN
TCELL11:IMUX.IMUX7PCIE.PIPERX2DATA10
TCELL11:IMUX.IMUX8PCIE.CFGERRURN
TCELL11:IMUX.IMUX9PCIE.PIPERX2DATA7
TCELL11:IMUX.IMUX10PCIE.CFGERRTLPCPLHEADER14
TCELL11:IMUX.IMUX11PCIE.PIPERX6DATA8
TCELL11:IMUX.IMUX12PCIE.CFGERRTLPCPLHEADER15
TCELL11:IMUX.IMUX13PCIE.PIPERX6DATA9
TCELL11:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER16
TCELL11:IMUX.IMUX15PCIE.PIPERX2DATA11
TCELL11:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER17
TCELL11:IMUX.IMUX17PCIE.PIPERX6DATA6
TCELL11:IMUX.IMUX19PCIE.PIPERX6DATA10
TCELL11:IMUX.IMUX21PCIE.PIPERX6DATA7
TCELL11:IMUX.IMUX23PCIE.PIPERX6DATA11
TCELL11:OUT0PCIE.TRNFCPH1
TCELL11:OUT1PCIE.TRNFCPH2
TCELL11:OUT2PCIE.TRNFCPH3
TCELL11:OUT3PCIE.TRNFCPH4
TCELL11:OUT4PCIE.MIMTXWADDR0
TCELL11:OUT5PCIE.MIMTXWADDR1
TCELL11:OUT6PCIE.MIMTXWADDR2
TCELL11:OUT7PCIE.MIMTXWADDR3
TCELL11:OUT8PCIE.TRNRDLLPDATA8
TCELL11:OUT9PCIE.TRNRDLLPDATA9
TCELL11:OUT10PCIE.TRNRDLLPDATA10
TCELL11:OUT11PCIE.TRNRDLLPDATA11
TCELL11:OUT12PCIE.CFGMSGRECEIVEDASSERTINTA
TCELL11:OUT13PCIE.CFGMSGRECEIVEDDEASSERTINTA
TCELL11:OUT14PCIE.CFGMSGRECEIVEDASSERTINTB
TCELL11:OUT15PCIE.CFGMSGRECEIVEDDEASSERTINTB
TCELL11:OUT16PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL0
TCELL11:OUT17PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL1
TCELL11:OUT18PCIE.PIPERX2POLARITY
TCELL11:OUT19PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL2
TCELL11:OUT20PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL3
TCELL11:OUT21PCIE.DRPDO13
TCELL11:OUT22PCIE.PIPERX6POLARITY
TCELL11:OUT23PCIE.DRPDO14
TCELL12:IMUX.IMUX0PCIE.MIMTXRDATA8
TCELL12:IMUX.IMUX1PCIE.PIPERX2CHARISK1
TCELL12:IMUX.IMUX2PCIE.MIMTXRDATA9
TCELL12:IMUX.IMUX3PCIE.PIPERX6DATA13
TCELL12:IMUX.IMUX4PCIE.MIMTXRDATA10
TCELL12:IMUX.IMUX5PCIE.PIPERX2DATA12
TCELL12:IMUX.IMUX6PCIE.CFGDWADDR8
TCELL12:IMUX.IMUX7PCIE.PIPERX2DATA13
TCELL12:IMUX.IMUX8PCIE.CFGDWADDR9
TCELL12:IMUX.IMUX9PCIE.PIPERX2DATA15
TCELL12:IMUX.IMUX10PCIE.CFGWRRW1CASRWN
TCELL12:IMUX.IMUX11PCIE.PIPERX2DATA14
TCELL12:IMUX.IMUX12PCIE.CFGWRREADONLYN
TCELL12:IMUX.IMUX13PCIE.PIPERX6DATA12
TCELL12:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER10
TCELL12:IMUX.IMUX15PCIE.PIPERX6DATA14
TCELL12:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER11
TCELL12:IMUX.IMUX17PCIE.PIPERX6CHARISK1
TCELL12:IMUX.IMUX18PCIE.CFGERRTLPCPLHEADER12
TCELL12:IMUX.IMUX19PCIE.CFGERRTLPCPLHEADER13
TCELL12:IMUX.IMUX21PCIE.PIPERX6DATA15
TCELL12:OUT0PCIE.TRNRBARHITN5
TCELL12:OUT1PCIE.TRNRBARHITN6
TCELL12:OUT2PCIE.TRNLNKUPN
TCELL12:OUT3PCIE.TRNFCPH0
TCELL12:OUT4PCIE.MIMTXWDATA65
TCELL12:OUT5PCIE.MIMTXWDATA66
TCELL12:OUT6PCIE.MIMTXWDATA67
TCELL12:OUT7PCIE.MIMTXWDATA68
TCELL12:OUT8PCIE.TRNRDLLPDATA4
TCELL12:OUT9PCIE.TRNRDLLPDATA5
TCELL12:OUT10PCIE.TRNRDLLPDATA6
TCELL12:OUT11PCIE.TRNRDLLPDATA7
TCELL12:OUT12PCIE.CFGMSGDATA15
TCELL12:OUT13PCIE.CFGMSGRECEIVEDERRCOR
TCELL12:OUT14PCIE.CFGMSGRECEIVEDERRNONFATAL
TCELL12:OUT15PCIE.CFGMSGRECEIVEDERRFATAL
TCELL12:OUT16PCIE.CFGLINKCONTROLCLOCKPMEN
TCELL12:OUT17PCIE.CFGLINKCONTROLHWAUTOWIDTHDIS
TCELL12:OUT18PCIE.CFGLINKCONTROLBANDWIDTHINTEN
TCELL12:OUT19PCIE.CFGLINKCONTROLAUTOBANDWIDTHINTEN
TCELL12:OUT20PCIE.DRPDO12
TCELL12:OUT21PCIE.CFGPMCSRPMEEN
TCELL12:OUT22PCIE.DBGVECB47
TCELL12:OUT23PCIE.DBGVECB48
TCELL13:IMUX.IMUX0PCIE.MIMTXRDATA4
TCELL13:IMUX.IMUX1PCIE.PIPERX6CHANISALIGNED
TCELL13:IMUX.IMUX2PCIE.MIMTXRDATA5
TCELL13:IMUX.IMUX3PCIE.MIMTXRDATA6
TCELL13:IMUX.IMUX4PCIE.MIMTXRDATA7
TCELL13:IMUX.IMUX5PCIE.MIMRXRDATA66
TCELL13:IMUX.IMUX6PCIE.MIMRXRDATA67
TCELL13:IMUX.IMUX7PCIE.TRNTDLLPDATA0
TCELL13:IMUX.IMUX8PCIE.TRNTDLLPDATA1
TCELL13:IMUX.IMUX9PCIE.CFGDWADDR4
TCELL13:IMUX.IMUX10PCIE.CFGDWADDR5
TCELL13:IMUX.IMUX11PCIE.CFGDWADDR6
TCELL13:IMUX.IMUX12PCIE.CFGDWADDR7
TCELL13:IMUX.IMUX13PCIE.CFGERRTLPCPLHEADER6
TCELL13:IMUX.IMUX14PCIE.CFGERRTLPCPLHEADER7
TCELL13:IMUX.IMUX15PCIE.PIPERX6CHARISK0
TCELL13:IMUX.IMUX16PCIE.CFGERRTLPCPLHEADER8
TCELL13:IMUX.IMUX17PCIE.CFGERRTLPCPLHEADER9
TCELL13:IMUX.IMUX18PCIE.CFGDSN45
TCELL13:IMUX.IMUX21PCIE.PIPERX2CHANISALIGNED
TCELL13:IMUX.IMUX23PCIE.PIPERX2CHARISK0
TCELL13:OUT0PCIE.TRNRBARHITN1
TCELL13:OUT1PCIE.TRNRBARHITN2
TCELL13:OUT2PCIE.TRNRBARHITN3
TCELL13:OUT3PCIE.TRNRBARHITN4
TCELL13:OUT4PCIE.MIMTXWDATA61
TCELL13:OUT5PCIE.MIMTXWDATA62
TCELL13:OUT6PCIE.MIMTXWDATA63
TCELL13:OUT7PCIE.MIMTXWDATA64
TCELL13:OUT8PCIE.TRNRDLLPDATA0
TCELL13:OUT9PCIE.TRNRDLLPDATA1
TCELL13:OUT10PCIE.TRNRDLLPDATA2
TCELL13:OUT11PCIE.TRNRDLLPDATA3
TCELL13:OUT12PCIE.CFGMSGDATA11
TCELL13:OUT13PCIE.CFGMSGDATA12
TCELL13:OUT14PCIE.CFGMSGDATA13
TCELL13:OUT15PCIE.CFGMSGDATA14
TCELL13:OUT16PCIE.PIPETXDEEMPH
TCELL13:OUT17PCIE.CFGLINKCONTROLCOMMONCLOCK
TCELL13:OUT18PCIE.CFGLINKCONTROLEXTENDEDSYNC
TCELL13:OUT19PCIE.XILUNCONNOUT3
TCELL13:OUT20PCIE.CFGPMCSRPMESTATUS
TCELL13:OUT21PCIE.DBGVECB44
TCELL13:OUT22PCIE.DBGVECB45
TCELL13:OUT23PCIE.DBGVECB46
TCELL14:IMUX.IMUX0PCIE.MIMTXRDATA0
TCELL14:IMUX.IMUX1PCIE.PIPERX6STATUS2
TCELL14:IMUX.IMUX2PCIE.MIMTXRDATA1
TCELL14:IMUX.IMUX3PCIE.PIPERX6STATUS0
TCELL14:IMUX.IMUX4PCIE.MIMTXRDATA2
TCELL14:IMUX.IMUX5PCIE.MIMTXRDATA3
TCELL14:IMUX.IMUX6PCIE.MIMRXRDATA62
TCELL14:IMUX.IMUX7PCIE.PIPERX6STATUS1
TCELL14:IMUX.IMUX8PCIE.MIMRXRDATA63
TCELL14:IMUX.IMUX9PCIE.MIMRXRDATA64
TCELL14:IMUX.IMUX10PCIE.MIMRXRDATA65
TCELL14:IMUX.IMUX11PCIE.PIPERX2PHYSTATUS
TCELL14:IMUX.IMUX12PCIE.PMVDIVIDE1
TCELL14:IMUX.IMUX13PCIE.PLTRANSMITHOTRST
TCELL14:IMUX.IMUX14PCIE.CFGDI0
TCELL14:IMUX.IMUX15PCIE.PIPERX6PHYSTATUS
TCELL14:IMUX.IMUX16PCIE.CFGDI1
TCELL14:IMUX.IMUX17PCIE.CFGDWADDR2
TCELL14:IMUX.IMUX18PCIE.CFGDWADDR3
TCELL14:IMUX.IMUX19PCIE.PIPERX2STATUS1
TCELL14:IMUX.IMUX21PCIE.PIPERX2STATUS2
TCELL14:IMUX.IMUX23PCIE.PIPERX2STATUS0
TCELL14:OUT0PCIE.TRNRSRCDSCN
TCELL14:OUT1PCIE.PIPETX2ELECIDLE
TCELL14:OUT2PCIE.TRNRECRCERRN
TCELL14:OUT3PCIE.TRNRERRFWDN
TCELL14:OUT4PCIE.TRNRBARHITN0
TCELL14:OUT5PCIE.PIPETX6ELECIDLE
TCELL14:OUT6PCIE.MIMTXWDATA57
TCELL14:OUT7PCIE.MIMTXWDATA58
TCELL14:OUT8PCIE.MIMTXWDATA59
TCELL14:OUT9PCIE.MIMTXWDATA60
TCELL14:OUT10PCIE.TRNTDLLPDSTRDYN
TCELL14:OUT11PCIE.CFGMSGDATA8
TCELL14:OUT12PCIE.CFGMSGDATA9
TCELL14:OUT13PCIE.CFGMSGDATA10
TCELL14:OUT14PCIE.XILUNCONNOUT1
TCELL14:OUT15PCIE.PIPETXRCVRDET
TCELL14:OUT16PCIE.XILUNCONNOUT2
TCELL14:OUT17PCIE.PIPETX6POWERDOWN0
TCELL14:OUT18PCIE.DBGVECB41
TCELL14:OUT19PCIE.PIPETX6POWERDOWN1
TCELL14:OUT20PCIE.DBGVECB42
TCELL14:OUT21PCIE.PIPETX2POWERDOWN0
TCELL14:OUT22PCIE.DBGVECB43
TCELL14:OUT23PCIE.PIPETX2POWERDOWN1
TCELL15:IMUX.IMUX0PCIE.TRNRNPOKN
TCELL15:IMUX.IMUX1PCIE.TRNFCSEL0
TCELL15:IMUX.IMUX2PCIE.TRNFCSEL1
TCELL15:IMUX.IMUX3PCIE.TRNFCSEL2
TCELL15:IMUX.IMUX4PCIE.MIMRXRDATA58
TCELL15:IMUX.IMUX5PCIE.PIPERX6ELECIDLE
TCELL15:IMUX.IMUX6PCIE.MIMRXRDATA59
TCELL15:IMUX.IMUX7PCIE.MIMRXRDATA60
TCELL15:IMUX.IMUX8PCIE.MIMRXRDATA61
TCELL15:IMUX.IMUX9PCIE.PMVDIVIDE0
TCELL15:IMUX.IMUX10PCIE.CFGDI2
TCELL15:IMUX.IMUX11PCIE.PIPERX6VALID
TCELL15:IMUX.IMUX12PCIE.CFGDI3
TCELL15:IMUX.IMUX13PCIE.CFGDI4
TCELL15:IMUX.IMUX14PCIE.CFGDI5
TCELL15:IMUX.IMUX15PCIE.CFGBYTEENN2
TCELL15:IMUX.IMUX16PCIE.CFGBYTEENN3
TCELL15:IMUX.IMUX17PCIE.CFGDWADDR0
TCELL15:IMUX.IMUX18PCIE.CFGDWADDR1
TCELL15:IMUX.IMUX19PCIE.PIPERX2VALID
TCELL15:IMUX.IMUX20PCIE.CFGERRTLPCPLHEADER5
TCELL15:IMUX.IMUX21PCIE.PIPERX2ELECIDLE
TCELL15:OUT0PCIE.TRNRREMN
TCELL15:OUT1PCIE.TRNRSOFN
TCELL15:OUT2PCIE.TRNREOFN
TCELL15:OUT3PCIE.TRNRSRCRDYN
TCELL15:OUT4PCIE.MIMTXWDATA53
TCELL15:OUT5PCIE.MIMTXWDATA54
TCELL15:OUT6PCIE.MIMTXWDATA55
TCELL15:OUT7PCIE.MIMTXWDATA56
TCELL15:OUT8PCIE.CFGMSGDATA4
TCELL15:OUT9PCIE.CFGMSGDATA5
TCELL15:OUT10PCIE.CFGMSGDATA6
TCELL15:OUT11PCIE.CFGMSGDATA7
TCELL15:OUT12PCIE.CFGLINKCONTROLRCB
TCELL15:OUT13PCIE.CFGLINKCONTROLLINKDISABLE
TCELL15:OUT14PCIE.CFGLINKCONTROLRETRAINLINK
TCELL15:OUT15PCIE.XILUNCONNOUT0
TCELL15:OUT16PCIE.PIPETX2COMPLIANCE
TCELL15:OUT17PCIE.DBGVECB39
TCELL15:OUT18PCIE.PIPETX2CHARISK0
TCELL15:OUT19PCIE.PIPETX6CHARISK1
TCELL15:OUT20PCIE.PIPETX6COMPLIANCE
TCELL15:OUT21PCIE.DBGVECB40
TCELL15:OUT22PCIE.PIPETX6CHARISK0
TCELL15:OUT23PCIE.PIPETX2CHARISK1
TCELL16:IMUX.IMUX0PCIE.TRNTECRCGENN
TCELL16:IMUX.IMUX1PCIE.TRNTSTRN
TCELL16:IMUX.IMUX2PCIE.TRNTCFGGNTN
TCELL16:IMUX.IMUX3PCIE.TRNRDSTRDYN
TCELL16:IMUX.IMUX4PCIE.MIMRXRDATA54
TCELL16:IMUX.IMUX5PCIE.MIMRXRDATA55
TCELL16:IMUX.IMUX6PCIE.MIMRXRDATA56
TCELL16:IMUX.IMUX7PCIE.MIMRXRDATA57
TCELL16:IMUX.IMUX8PCIE.PMVSELECT2
TCELL16:IMUX.IMUX9PCIE.CFGDI6
TCELL16:IMUX.IMUX10PCIE.CFGDI7
TCELL16:IMUX.IMUX11PCIE.CFGDI8
TCELL16:IMUX.IMUX12PCIE.CFGDI9
TCELL16:IMUX.IMUX13PCIE.CFGDI30
TCELL16:IMUX.IMUX14PCIE.CFGDI31
TCELL16:IMUX.IMUX15PCIE.CFGBYTEENN0
TCELL16:IMUX.IMUX16PCIE.CFGBYTEENN1
TCELL16:IMUX.IMUX17PCIE.CFGERRTLPCPLHEADER1
TCELL16:IMUX.IMUX18PCIE.CFGERRTLPCPLHEADER2
TCELL16:IMUX.IMUX19PCIE.CFGERRTLPCPLHEADER3
TCELL16:IMUX.IMUX20PCIE.CFGERRTLPCPLHEADER4
TCELL16:IMUX.IMUX21PCIE.CFGDSN44
TCELL16:OUT0PCIE.TRNRD60
TCELL16:OUT1PCIE.TRNRD61
TCELL16:OUT2PCIE.PIPETX6DATA13
TCELL16:OUT3PCIE.TRNRD62
TCELL16:OUT4PCIE.TRNRD63
TCELL16:OUT5PCIE.CFGMSGDATA0
TCELL16:OUT6PCIE.PIPETX2DATA13
TCELL16:OUT7PCIE.CFGMSGDATA1
TCELL16:OUT8PCIE.CFGMSGDATA2
TCELL16:OUT9PCIE.PIPETXRESET
TCELL16:OUT10PCIE.CFGMSGDATA3
TCELL16:OUT11PCIE.CFGLINKCONTROLASPMCONTROL1
TCELL16:OUT12PCIE.PLDBGVEC10
TCELL16:OUT13PCIE.PLDBGVEC11
TCELL16:OUT14PCIE.DBGVECB36
TCELL16:OUT15PCIE.DBGVECB37
TCELL16:OUT16PCIE.PIPETX2DATA12
TCELL16:OUT17PCIE.PIPETX6DATA15
TCELL16:OUT18PCIE.PIPETXRATE
TCELL16:OUT19PCIE.PIPETX6DATA14
TCELL16:OUT20PCIE.PIPETX6DATA12
TCELL16:OUT21PCIE.PIPETX2DATA15
TCELL16:OUT22PCIE.DBGVECB38
TCELL16:OUT23PCIE.PIPETX2DATA14
TCELL17:IMUX.IMUX0PCIE.TRNTEOFN
TCELL17:IMUX.IMUX1PCIE.TRNTSRCRDYN
TCELL17:IMUX.IMUX2PCIE.TRNTSRCDSCN
TCELL17:IMUX.IMUX3PCIE.TRNTERRFWDN
TCELL17:IMUX.IMUX4PCIE.MIMRXRDATA50
TCELL17:IMUX.IMUX5PCIE.MIMRXRDATA51
TCELL17:IMUX.IMUX6PCIE.MIMRXRDATA52
TCELL17:IMUX.IMUX7PCIE.MIMRXRDATA53
TCELL17:IMUX.IMUX8PCIE.PMVSELECT1
TCELL17:IMUX.IMUX9PCIE.CFGDI10
TCELL17:IMUX.IMUX10PCIE.CFGDI11
TCELL17:IMUX.IMUX11PCIE.CFGDI12
TCELL17:IMUX.IMUX12PCIE.CFGDI13
TCELL17:IMUX.IMUX13PCIE.CFGDI26
TCELL17:IMUX.IMUX14PCIE.CFGDI27
TCELL17:IMUX.IMUX15PCIE.CFGDI28
TCELL17:IMUX.IMUX16PCIE.CFGDI29
TCELL17:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG125
TCELL17:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG126
TCELL17:IMUX.IMUX19PCIE.CFGERRAERHEADERLOG127
TCELL17:IMUX.IMUX20PCIE.CFGERRTLPCPLHEADER0
TCELL17:IMUX.IMUX21PCIE.CFGDSN43
TCELL17:OUT0PCIE.TRNRD58
TCELL17:OUT1PCIE.PIPETX2DATA11
TCELL17:OUT2PCIE.PIPETX6DATA8
TCELL17:OUT3PCIE.TRNRD59
TCELL17:OUT4PCIE.CFGINTERRUPTDO7
TCELL17:OUT5PCIE.PIPETX6DATA11
TCELL17:OUT6PCIE.PIPETX2DATA8
TCELL17:OUT7PCIE.CFGINTERRUPTMSIXENABLE
TCELL17:OUT8PCIE.CFGINTERRUPTMSIXFM
TCELL17:OUT9PCIE.CFGMSGRECEIVED
TCELL17:OUT10PCIE.CFGLINKCONTROLASPMCONTROL0
TCELL17:OUT11PCIE.PLDBGVEC8
TCELL17:OUT12PCIE.PLDBGVEC9
TCELL17:OUT13PCIE.DBGVECB33
TCELL17:OUT14PCIE.DBGVECB34
TCELL17:OUT15PCIE.DBGVECB35
TCELL17:OUT16PCIE.PIPETX2DATA7
TCELL17:OUT17PCIE.PIPETX6DATA10
TCELL17:OUT18PCIE.PIPETX2DATA6
TCELL17:OUT19PCIE.PIPETX6DATA9
TCELL17:OUT20PCIE.PIPETX6DATA7
TCELL17:OUT21PCIE.PIPETX2DATA10
TCELL17:OUT22PCIE.PIPETX6DATA6
TCELL17:OUT23PCIE.PIPETX2DATA9
TCELL18:IMUX.IMUX0PCIE.TRNTD62
TCELL18:IMUX.IMUX1PCIE.TRNTD63
TCELL18:IMUX.IMUX2PCIE.TRNTREMN
TCELL18:IMUX.IMUX3PCIE.TRNTSOFN
TCELL18:IMUX.IMUX4PCIE.MIMRXRDATA46
TCELL18:IMUX.IMUX5PCIE.MIMRXRDATA47
TCELL18:IMUX.IMUX6PCIE.MIMRXRDATA48
TCELL18:IMUX.IMUX7PCIE.MIMRXRDATA49
TCELL18:IMUX.IMUX8PCIE.PMVSELECT0
TCELL18:IMUX.IMUX9PCIE.CFGDI14
TCELL18:IMUX.IMUX10PCIE.CFGDI15
TCELL18:IMUX.IMUX11PCIE.CFGDI16
TCELL18:IMUX.IMUX12PCIE.CFGDI17
TCELL18:IMUX.IMUX13PCIE.CFGDI22
TCELL18:IMUX.IMUX14PCIE.CFGDI23
TCELL18:IMUX.IMUX15PCIE.CFGDI24
TCELL18:IMUX.IMUX16PCIE.CFGDI25
TCELL18:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG121
TCELL18:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG122
TCELL18:IMUX.IMUX19PCIE.CFGERRAERHEADERLOG123
TCELL18:IMUX.IMUX20PCIE.CFGERRAERHEADERLOG124
TCELL18:IMUX.IMUX21PCIE.CFGDSN42
TCELL18:OUT0PCIE.TRNRD56
TCELL18:OUT1PCIE.PIPETX2DATA3
TCELL18:OUT2PCIE.PIPETX6DATA4
TCELL18:OUT3PCIE.TRNRD57
TCELL18:OUT4PCIE.CFGINTERRUPTDO3
TCELL18:OUT5PCIE.PIPETX6DATA3
TCELL18:OUT6PCIE.PIPETX2DATA4
TCELL18:OUT7PCIE.MIMRXRCE
TCELL18:OUT8PCIE.CFGINTERRUPTDO4
TCELL18:OUT9PCIE.CFGINTERRUPTDO5
TCELL18:OUT10PCIE.CFGINTERRUPTDO6
TCELL18:OUT11PCIE.CFGLINKSTATUSAUTOBANDWIDTHSTATUS
TCELL18:OUT12PCIE.PLDBGVEC6
TCELL18:OUT13PCIE.PLDBGVEC7
TCELL18:OUT14PCIE.DBGVECB31
TCELL18:OUT15PCIE.DBGVECB32
TCELL18:OUT16PCIE.PIPETX2DATA0
TCELL18:OUT17PCIE.PIPETX6DATA1
TCELL18:OUT18PCIE.PIPETX2DATA5
TCELL18:OUT19PCIE.PIPETX6DATA2
TCELL18:OUT20PCIE.PIPETX6DATA0
TCELL18:OUT21PCIE.PIPETX2DATA1
TCELL18:OUT22PCIE.PIPETX6DATA5
TCELL18:OUT23PCIE.PIPETX2DATA2
TCELL19:IMUX.IMUX0PCIE.TRNTD58
TCELL19:IMUX.IMUX1PCIE.TRNTD59
TCELL19:IMUX.IMUX2PCIE.TRNTD60
TCELL19:IMUX.IMUX3PCIE.TRNTD61
TCELL19:IMUX.IMUX4PCIE.MIMRXRDATA42
TCELL19:IMUX.IMUX5PCIE.MIMRXRDATA43
TCELL19:IMUX.IMUX6PCIE.MIMRXRDATA44
TCELL19:IMUX.IMUX7PCIE.MIMRXRDATA45
TCELL19:IMUX.IMUX8PCIE.PMVENABLEN
TCELL19:IMUX.IMUX9PCIE.CFGDI18
TCELL19:IMUX.IMUX10PCIE.CFGDI19
TCELL19:IMUX.IMUX11PCIE.CFGDI20
TCELL19:IMUX.IMUX12PCIE.CFGDI21
TCELL19:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG117
TCELL19:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG118
TCELL19:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG119
TCELL19:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG120
TCELL19:IMUX.IMUX17PCIE.CFGDSN38
TCELL19:IMUX.IMUX18PCIE.CFGDSN39
TCELL19:IMUX.IMUX19PCIE.CFGDSN40
TCELL19:IMUX.IMUX20PCIE.CFGDSN41
TCELL19:IMUX.IMUX21PCIE.DRPDI13
TCELL19:OUT0PCIE.TRNRD52
TCELL19:OUT1PCIE.TRNRD53
TCELL19:OUT2PCIE.TRNRD54
TCELL19:OUT3PCIE.TRNRD55
TCELL19:OUT4PCIE.MIMTXWDATA49
TCELL19:OUT5PCIE.MIMTXWDATA50
TCELL19:OUT6PCIE.MIMTXWDATA51
TCELL19:OUT7PCIE.MIMTXWDATA52
TCELL19:OUT8PCIE.MIMRXRADDR10
TCELL19:OUT9PCIE.MIMRXRADDR11
TCELL19:OUT10PCIE.MIMRXRADDR12
TCELL19:OUT11PCIE.MIMRXREN
TCELL19:OUT12PCIE.CFGINTERRUPTMSIENABLE
TCELL19:OUT13PCIE.CFGINTERRUPTDO0
TCELL19:OUT14PCIE.CFGINTERRUPTDO1
TCELL19:OUT15PCIE.CFGINTERRUPTDO2
TCELL19:OUT16PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH3
TCELL19:OUT17PCIE.CFGLINKSTATUSLINKTRAINING
TCELL19:OUT18PCIE.CFGLINKSTATUSDLLACTIVE
TCELL19:OUT19PCIE.CFGLINKSTATUSBANDWITHSTATUS
TCELL19:OUT20PCIE.DRPDO10
TCELL19:OUT21PCIE.DRPDO11
TCELL19:OUT22PCIE.PLDBGVEC5
TCELL19:OUT23PCIE.DBGVECB30
TCELL20:IMUX.CLK0PCIE.USERCLKPREBUF
TCELL20:IMUX.CTRL0PCIE.SYSRSTN
TCELL20:IMUX.CTRL1PCIE.CMRSTN
TCELL20:IMUX.IMUX0PCIE.PLDIRECTEDLINKCHANGE0
TCELL20:IMUX.IMUX1PCIE.PIPERX1DATA4
TCELL20:IMUX.IMUX2PCIE.CFGERRAERHEADERLOG37
TCELL20:IMUX.IMUX3PCIE.PIPERX1DATA0
TCELL20:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG38
TCELL20:IMUX.IMUX5PCIE.PIPERX1DATA1
TCELL20:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG39
TCELL20:IMUX.IMUX7PCIE.PIPERX5DATA2
TCELL20:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG40
TCELL20:IMUX.IMUX9PCIE.PIPERX1DATA5
TCELL20:IMUX.IMUX10PCIE.CFGDSBUSNUMBER4
TCELL20:IMUX.IMUX11PCIE.PIPERX5DATA0
TCELL20:IMUX.IMUX12PCIE.CFGDSBUSNUMBER5
TCELL20:IMUX.IMUX13PCIE.PIPERX5DATA1
TCELL20:IMUX.IMUX14PCIE.CFGDSBUSNUMBER6
TCELL20:IMUX.IMUX15PCIE.PIPERX1DATA2
TCELL20:IMUX.IMUX16PCIE.CFGDSBUSNUMBER7
TCELL20:IMUX.IMUX17PCIE.PIPERX5DATA4
TCELL20:IMUX.IMUX19PCIE.PIPERX1DATA3
TCELL20:IMUX.IMUX21PCIE.PIPERX5DATA5
TCELL20:IMUX.IMUX23PCIE.PIPERX5DATA3
TCELL20:OUT0PCIE.PLSELLNKRATE
TCELL20:OUT1PCIE.PLSELLNKWIDTH0
TCELL20:OUT2PCIE.PLSELLNKWIDTH1
TCELL20:OUT3PCIE.PLLTSSMSTATE0
TCELL20:OUT4PCIE.PLLTSSMSTATE1
TCELL20:OUT5PCIE.PLLTSSMSTATE2
TCELL20:OUT6PCIE.PLLTSSMSTATE3
TCELL20:OUT7PCIE.PLLTSSMSTATE4
TCELL20:OUT8PCIE.PLLTSSMSTATE5
TCELL20:OUT9PCIE.PLLANEREVERSALMODE0
TCELL20:OUT10PCIE.PLLANEREVERSALMODE1
TCELL20:OUT11PCIE.PLPHYLNKUPN
TCELL20:OUT12PCIE.PLTXPMSTATE0
TCELL20:OUT13PCIE.PLTXPMSTATE1
TCELL20:OUT14PCIE.PLTXPMSTATE2
TCELL20:OUT15PCIE.PLRXPMSTATE0
TCELL20:OUT16PCIE.TRNFCCPLD1
TCELL20:OUT17PCIE.TRNFCCPLD2
TCELL20:OUT18PCIE.TRNFCCPLD3
TCELL20:OUT19PCIE.TRNFCCPLD4
TCELL20:OUT20PCIE.MIMRXWDATA15
TCELL20:OUT21PCIE.DBGVECA30
TCELL20:OUT22PCIE.DBGVECA31
TCELL20:OUT23PCIE.DBGVECA32
TCELL21:IMUX.CTRL0PCIE.CMSTICKYRSTN
TCELL21:IMUX.CTRL1PCIE.FUNCLVLRSTN
TCELL21:IMUX.IMUX0PCIE.PLDIRECTEDLINKCHANGE1
TCELL21:IMUX.IMUX1PCIE.PIPERX1DATA6
TCELL21:IMUX.IMUX2PCIE.CFGERRAERHEADERLOG41
TCELL21:IMUX.IMUX3PCIE.PIPERX1DATA8
TCELL21:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG42
TCELL21:IMUX.IMUX5PCIE.PIPERX1DATA9
TCELL21:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG43
TCELL21:IMUX.IMUX7PCIE.PIPERX1DATA10
TCELL21:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG44
TCELL21:IMUX.IMUX9PCIE.PIPERX1DATA7
TCELL21:IMUX.IMUX10PCIE.CFGDSDEVICENUMBER0
TCELL21:IMUX.IMUX11PCIE.PIPERX5DATA8
TCELL21:IMUX.IMUX12PCIE.CFGDSDEVICENUMBER1
TCELL21:IMUX.IMUX13PCIE.PIPERX5DATA9
TCELL21:IMUX.IMUX14PCIE.CFGDSDEVICENUMBER2
TCELL21:IMUX.IMUX15PCIE.PIPERX1DATA11
TCELL21:IMUX.IMUX16PCIE.CFGDSDEVICENUMBER3
TCELL21:IMUX.IMUX17PCIE.PIPERX5DATA6
TCELL21:IMUX.IMUX19PCIE.PIPERX5DATA10
TCELL21:IMUX.IMUX21PCIE.PIPERX5DATA7
TCELL21:IMUX.IMUX23PCIE.PIPERX5DATA11
TCELL21:OUT0PCIE.PLRXPMSTATE1
TCELL21:OUT1PCIE.PLLINKUPCFGCAP
TCELL21:OUT2PCIE.PLLINKGEN2CAP
TCELL21:OUT3PCIE.PLLINKPARTNERGEN2SUPPORTED
TCELL21:OUT4PCIE.TRNFCCPLD5
TCELL21:OUT5PCIE.TRNFCCPLD6
TCELL21:OUT6PCIE.TRNFCCPLD7
TCELL21:OUT7PCIE.TRNFCCPLD8
TCELL21:OUT8PCIE.MIMRXWDATA16
TCELL21:OUT9PCIE.MIMRXWDATA17
TCELL21:OUT10PCIE.MIMRXWDATA18
TCELL21:OUT11PCIE.MIMRXWDATA19
TCELL21:OUT12PCIE.LL2BADDLLPERRN
TCELL21:OUT13PCIE.LL2REPLAYROERRN
TCELL21:OUT14PCIE.LL2REPLAYTOERRN
TCELL21:OUT15PCIE.PMVOUT
TCELL21:OUT16PCIE.CFGCOMMANDINTERRUPTDISABLE
TCELL21:OUT17PCIE.CFGDEVSTATUSCORRERRDETECTED
TCELL21:OUT18PCIE.PIPERX1POLARITY
TCELL21:OUT19PCIE.DBGVECB60
TCELL21:OUT20PCIE.DBGVECA33
TCELL21:OUT21PCIE.DBGVECA34
TCELL21:OUT22PCIE.PIPERX5POLARITY
TCELL21:OUT23PCIE.DBGVECA35
TCELL22:IMUX.CTRL0PCIE.TLRSTN
TCELL22:IMUX.CTRL1PCIE.DLRSTN
TCELL22:IMUX.IMUX0PCIE.PLDIRECTEDLINKWIDTH0
TCELL22:IMUX.IMUX1PCIE.PIPERX1CHARISK1
TCELL22:IMUX.IMUX2PCIE.PLDIRECTEDLINKWIDTH1
TCELL22:IMUX.IMUX3PCIE.PIPERX5DATA13
TCELL22:IMUX.IMUX4PCIE.PLDIRECTEDLINKSPEED
TCELL22:IMUX.IMUX5PCIE.PIPERX1DATA12
TCELL22:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG45
TCELL22:IMUX.IMUX7PCIE.PIPERX1DATA13
TCELL22:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG46
TCELL22:IMUX.IMUX9PCIE.PIPERX1DATA15
TCELL22:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG47
TCELL22:IMUX.IMUX11PCIE.PIPERX1DATA14
TCELL22:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG48
TCELL22:IMUX.IMUX13PCIE.PIPERX5DATA12
TCELL22:IMUX.IMUX14PCIE.CFGDSDEVICENUMBER4
TCELL22:IMUX.IMUX15PCIE.PIPERX5DATA14
TCELL22:IMUX.IMUX16PCIE.CFGDSFUNCTIONNUMBER0
TCELL22:IMUX.IMUX17PCIE.PIPERX5CHARISK1
TCELL22:IMUX.IMUX18PCIE.CFGDSFUNCTIONNUMBER1
TCELL22:IMUX.IMUX19PCIE.CFGDSFUNCTIONNUMBER2
TCELL22:IMUX.IMUX21PCIE.PIPERX5DATA15
TCELL22:OUT0PCIE.PLINITIALLINKWIDTH0
TCELL22:OUT1PCIE.PLINITIALLINKWIDTH1
TCELL22:OUT2PCIE.PLINITIALLINKWIDTH2
TCELL22:OUT3PCIE.TRNTDSTRDYN
TCELL22:OUT4PCIE.TRNFCCPLD9
TCELL22:OUT5PCIE.TRNFCCPLD10
TCELL22:OUT6PCIE.TRNFCCPLD11
TCELL22:OUT7PCIE.MIMTXWDATA0
TCELL22:OUT8PCIE.MIMRXWDATA20
TCELL22:OUT9PCIE.MIMRXWDATA21
TCELL22:OUT10PCIE.MIMRXWDATA22
TCELL22:OUT11PCIE.MIMRXWDATA23
TCELL22:OUT12PCIE.USERRSTN
TCELL22:OUT13PCIE.PLRECEIVEDHOTRST
TCELL22:OUT14PCIE.RECEIVEDFUNCLVLRSTN
TCELL22:OUT15PCIE.CFGDO0
TCELL22:OUT16PCIE.CFGDEVSTATUSNONFATALERRDETECTED
TCELL22:OUT17PCIE.CFGDEVSTATUSFATALERRDETECTED
TCELL22:OUT18PCIE.CFGDEVSTATUSURDETECTED
TCELL22:OUT19PCIE.DBGVECB61
TCELL22:OUT20PCIE.DBGVECB62
TCELL22:OUT21PCIE.DBGVECA36
TCELL22:OUT22PCIE.DBGVECA37
TCELL22:OUT23PCIE.DBGVECA38
TCELL23:IMUX.CTRL0PCIE.PLRSTN
TCELL23:IMUX.IMUX0PCIE.PLDIRECTEDLINKAUTON
TCELL23:IMUX.IMUX1PCIE.PIPERX5CHANISALIGNED
TCELL23:IMUX.IMUX2PCIE.PLUPSTREAMPREFERDEEMPH
TCELL23:IMUX.IMUX3PCIE.PLDOWNSTREAMDEEMPHSOURCE
TCELL23:IMUX.IMUX4PCIE.TRNTD0
TCELL23:IMUX.IMUX5PCIE.MIMTXRDATA46
TCELL23:IMUX.IMUX6PCIE.MIMTXRDATA47
TCELL23:IMUX.IMUX7PCIE.MIMTXRDATA48
TCELL23:IMUX.IMUX8PCIE.MIMTXRDATA49
TCELL23:IMUX.IMUX9PCIE.TRNTDLLPDATA27
TCELL23:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG49
TCELL23:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG50
TCELL23:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG51
TCELL23:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG52
TCELL23:IMUX.IMUX14PCIE.CFGPORTNUMBER0
TCELL23:IMUX.IMUX15PCIE.PIPERX5CHARISK0
TCELL23:IMUX.IMUX16PCIE.CFGPORTNUMBER1
TCELL23:IMUX.IMUX17PCIE.CFGPORTNUMBER2
TCELL23:IMUX.IMUX18PCIE.CFGPORTNUMBER3
TCELL23:IMUX.IMUX21PCIE.PIPERX1CHANISALIGNED
TCELL23:IMUX.IMUX23PCIE.PIPERX1CHARISK0
TCELL23:OUT0PCIE.TRNTERRDROPN
TCELL23:OUT1PCIE.TRNTBUFAV0
TCELL23:OUT2PCIE.TRNTBUFAV1
TCELL23:OUT3PCIE.TRNTBUFAV2
TCELL23:OUT4PCIE.MIMTXWDATA1
TCELL23:OUT5PCIE.MIMTXWDATA2
TCELL23:OUT6PCIE.MIMTXWDATA3
TCELL23:OUT7PCIE.MIMTXWDATA4
TCELL23:OUT8PCIE.MIMRXWDATA24
TCELL23:OUT9PCIE.MIMRXWDATA25
TCELL23:OUT10PCIE.MIMRXWDATA26
TCELL23:OUT11PCIE.MIMRXWDATA27
TCELL23:OUT12PCIE.CFGDO1
TCELL23:OUT13PCIE.CFGDO2
TCELL23:OUT14PCIE.CFGDO3
TCELL23:OUT15PCIE.CFGDO4
TCELL23:OUT16PCIE.CFGDEVCONTROLCORRERRREPORTINGEN
TCELL23:OUT17PCIE.CFGDEVCONTROLNONFATALREPORTINGEN
TCELL23:OUT18PCIE.CFGDEVCONTROLFATALERRREPORTINGEN
TCELL23:OUT19PCIE.DBGVECB63
TCELL23:OUT20PCIE.DBGVECC0
TCELL23:OUT21PCIE.DBGVECA39
TCELL23:OUT22PCIE.DBGVECA40
TCELL23:OUT23PCIE.DBGVECA41
TCELL24:IMUX.IMUX0PCIE.TRNTD1
TCELL24:IMUX.IMUX1PCIE.PIPERX5STATUS2
TCELL24:IMUX.IMUX2PCIE.TRNTD2
TCELL24:IMUX.IMUX3PCIE.PIPERX5STATUS0
TCELL24:IMUX.IMUX4PCIE.TRNTD3
TCELL24:IMUX.IMUX5PCIE.TRNTD4
TCELL24:IMUX.IMUX6PCIE.MIMTXRDATA50
TCELL24:IMUX.IMUX7PCIE.PIPERX5STATUS1
TCELL24:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG53
TCELL24:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG54
TCELL24:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG55
TCELL24:IMUX.IMUX11PCIE.PIPERX1PHYSTATUS
TCELL24:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG56
TCELL24:IMUX.IMUX13PCIE.CFGPORTNUMBER4
TCELL24:IMUX.IMUX14PCIE.CFGPORTNUMBER5
TCELL24:IMUX.IMUX15PCIE.PIPERX5PHYSTATUS
TCELL24:IMUX.IMUX16PCIE.CFGPORTNUMBER6
TCELL24:IMUX.IMUX17PCIE.CFGPORTNUMBER7
TCELL24:IMUX.IMUX19PCIE.PIPERX1STATUS1
TCELL24:IMUX.IMUX21PCIE.PIPERX1STATUS2
TCELL24:IMUX.IMUX23PCIE.PIPERX1STATUS0
TCELL24:OUT0PCIE.TRNTBUFAV3
TCELL24:OUT1PCIE.PIPETX1ELECIDLE
TCELL24:OUT2PCIE.TRNTBUFAV4
TCELL24:OUT3PCIE.TRNTBUFAV5
TCELL24:OUT4PCIE.TRNTCFGREQN
TCELL24:OUT5PCIE.PIPETX5ELECIDLE
TCELL24:OUT6PCIE.MIMTXWDATA5
TCELL24:OUT7PCIE.MIMTXWDATA6
TCELL24:OUT8PCIE.MIMTXWDATA7
TCELL24:OUT9PCIE.MIMTXWDATA8
TCELL24:OUT10PCIE.MIMRXWDATA28
TCELL24:OUT11PCIE.MIMRXWDATA29
TCELL24:OUT12PCIE.MIMRXWDATA30
TCELL24:OUT13PCIE.MIMRXWDATA31
TCELL24:OUT14PCIE.CFGDO5
TCELL24:OUT15PCIE.DBGVECC1
TCELL24:OUT16PCIE.DBGVECC2
TCELL24:OUT17PCIE.PIPETX5POWERDOWN0
TCELL24:OUT18PCIE.DBGVECA42
TCELL24:OUT19PCIE.PIPETX5POWERDOWN1
TCELL24:OUT20PCIE.DBGVECA43
TCELL24:OUT21PCIE.PIPETX1POWERDOWN0
TCELL24:OUT22PCIE.DBGVECA44
TCELL24:OUT23PCIE.PIPETX1POWERDOWN1
TCELL25:IMUX.IMUX0PCIE.TRNTD5
TCELL25:IMUX.IMUX1PCIE.TRNTD6
TCELL25:IMUX.IMUX2PCIE.TRNTD7
TCELL25:IMUX.IMUX3PCIE.TRNTD8
TCELL25:IMUX.IMUX4PCIE.MIMTXRDATA51
TCELL25:IMUX.IMUX5PCIE.PIPERX5ELECIDLE
TCELL25:IMUX.IMUX6PCIE.MIMTXRDATA52
TCELL25:IMUX.IMUX7PCIE.MIMTXRDATA53
TCELL25:IMUX.IMUX8PCIE.MIMTXRDATA54
TCELL25:IMUX.IMUX9PCIE.TRNTDLLPDATA28
TCELL25:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG57
TCELL25:IMUX.IMUX11PCIE.PIPERX5VALID
TCELL25:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG58
TCELL25:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG59
TCELL25:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG60
TCELL25:IMUX.IMUX15PCIE.CFGPMWAKEN
TCELL25:IMUX.IMUX16PCIE.CFGPMDIRECTASPML1N
TCELL25:IMUX.IMUX17PCIE.CFGPMTURNOFFOKN
TCELL25:IMUX.IMUX18PCIE.CFGPMSENDPMACKN
TCELL25:IMUX.IMUX19PCIE.PIPERX1VALID
TCELL25:IMUX.IMUX21PCIE.PIPERX1ELECIDLE
TCELL25:OUT0PCIE.TRNRD0
TCELL25:OUT1PCIE.TRNRD1
TCELL25:OUT2PCIE.TRNRD2
TCELL25:OUT3PCIE.TRNRD3
TCELL25:OUT4PCIE.MIMTXWDATA9
TCELL25:OUT5PCIE.MIMTXWDATA10
TCELL25:OUT6PCIE.MIMTXWDATA11
TCELL25:OUT7PCIE.MIMTXWDATA12
TCELL25:OUT8PCIE.MIMRXWDATA32
TCELL25:OUT9PCIE.MIMRXWDATA33
TCELL25:OUT10PCIE.MIMRXWDATA34
TCELL25:OUT11PCIE.MIMRXWDATA35
TCELL25:OUT12PCIE.CFGDO6
TCELL25:OUT13PCIE.DBGVECC3
TCELL25:OUT14PCIE.DBGVECC4
TCELL25:OUT15PCIE.DBGVECC5
TCELL25:OUT16PCIE.PIPETX1COMPLIANCE
TCELL25:OUT17PCIE.DBGVECA45
TCELL25:OUT18PCIE.PIPETX1CHARISK0
TCELL25:OUT19PCIE.PIPETX5CHARISK1
TCELL25:OUT20PCIE.PIPETX5COMPLIANCE
TCELL25:OUT21PCIE.DBGVECA46
TCELL25:OUT22PCIE.PIPETX5CHARISK0
TCELL25:OUT23PCIE.PIPETX1CHARISK1
TCELL26:IMUX.IMUX0PCIE.TRNTD9
TCELL26:IMUX.IMUX1PCIE.TRNTD10
TCELL26:IMUX.IMUX2PCIE.TRNTD11
TCELL26:IMUX.IMUX3PCIE.TRNTD12
TCELL26:IMUX.IMUX4PCIE.MIMTXRDATA55
TCELL26:IMUX.IMUX5PCIE.MIMTXRDATA56
TCELL26:IMUX.IMUX6PCIE.MIMTXRDATA57
TCELL26:IMUX.IMUX7PCIE.MIMTXRDATA58
TCELL26:IMUX.IMUX8PCIE.TRNTDLLPDATA29
TCELL26:IMUX.IMUX9PCIE.TRNTDLLPDATA30
TCELL26:IMUX.IMUX10PCIE.TRNTDLLPDATA31
TCELL26:IMUX.IMUX11PCIE.TRNTDLLPSRCRDYN
TCELL26:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG61
TCELL26:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG62
TCELL26:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG63
TCELL26:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG64
TCELL26:IMUX.IMUX16PCIE.CFGPMSENDPMNAKN
TCELL26:IMUX.IMUX17PCIE.CFGPMSENDPMETON
TCELL26:IMUX.IMUX18PCIE.CFGTRNPENDINGN
TCELL26:IMUX.IMUX19PCIE.CFGDSN0
TCELL26:IMUX.IMUX20PCIE.DRPDEN
TCELL26:OUT0PCIE.TRNRD4
TCELL26:OUT1PCIE.TRNRD5
TCELL26:OUT2PCIE.PIPETX5DATA13
TCELL26:OUT3PCIE.TRNRD6
TCELL26:OUT4PCIE.TRNRD7
TCELL26:OUT5PCIE.MIMTXWDATA13
TCELL26:OUT6PCIE.PIPETX1DATA13
TCELL26:OUT7PCIE.MIMTXWDATA14
TCELL26:OUT8PCIE.CFGDO7
TCELL26:OUT9PCIE.MIMRXWDATA36
TCELL26:OUT10PCIE.MIMRXWDATA37
TCELL26:OUT11PCIE.MIMRXWDATA38
TCELL26:OUT12PCIE.MIMRXWDATA39
TCELL26:OUT13PCIE.DBGVECA47
TCELL26:OUT14PCIE.DBGVECA48
TCELL26:OUT15PCIE.DBGVECA49
TCELL26:OUT16PCIE.PIPETX1DATA12
TCELL26:OUT17PCIE.PIPETX5DATA15
TCELL26:OUT18PCIE.DBGVECA50
TCELL26:OUT19PCIE.PIPETX5DATA14
TCELL26:OUT20PCIE.PIPETX5DATA12
TCELL26:OUT21PCIE.PIPETX1DATA15
TCELL26:OUT22PCIE.DBGVECC6
TCELL26:OUT23PCIE.PIPETX1DATA14
TCELL27:IMUX.IMUX0PCIE.TRNTD13
TCELL27:IMUX.IMUX1PCIE.TRNTD14
TCELL27:IMUX.IMUX2PCIE.TRNTD15
TCELL27:IMUX.IMUX3PCIE.TRNTD16
TCELL27:IMUX.IMUX4PCIE.MIMTXRDATA59
TCELL27:IMUX.IMUX5PCIE.MIMTXRDATA60
TCELL27:IMUX.IMUX6PCIE.MIMTXRDATA61
TCELL27:IMUX.IMUX7PCIE.MIMTXRDATA62
TCELL27:IMUX.IMUX8PCIE.LL2TLPRCVN
TCELL27:IMUX.IMUX9PCIE.LL2SENDENTERL1N
TCELL27:IMUX.IMUX10PCIE.LL2SENDENTERL23N
TCELL27:IMUX.IMUX11PCIE.LL2SENDASREQL1N
TCELL27:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG65
TCELL27:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG66
TCELL27:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG67
TCELL27:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG68
TCELL27:IMUX.IMUX16PCIE.CFGDSN1
TCELL27:IMUX.IMUX17PCIE.CFGDSN2
TCELL27:IMUX.IMUX18PCIE.CFGDSN3
TCELL27:IMUX.IMUX19PCIE.CFGDSN4
TCELL27:IMUX.IMUX20PCIE.DRPDWE
TCELL27:OUT0PCIE.TRNRD8
TCELL27:OUT1PCIE.PIPETX1DATA11
TCELL27:OUT2PCIE.PIPETX5DATA8
TCELL27:OUT3PCIE.TRNRD9
TCELL27:OUT4PCIE.CFGDO8
TCELL27:OUT5PCIE.PIPETX5DATA11
TCELL27:OUT6PCIE.PIPETX1DATA8
TCELL27:OUT7PCIE.MIMRXWDATA40
TCELL27:OUT8PCIE.MIMRXWDATA41
TCELL27:OUT9PCIE.MIMRXWDATA42
TCELL27:OUT10PCIE.MIMRXWDATA43
TCELL27:OUT11PCIE.DBGVECA51
TCELL27:OUT12PCIE.DBGVECA52
TCELL27:OUT13PCIE.DBGVECA53
TCELL27:OUT14PCIE.DBGVECA54
TCELL27:OUT15PCIE.DBGVECC7
TCELL27:OUT16PCIE.PIPETX1DATA7
TCELL27:OUT17PCIE.PIPETX5DATA10
TCELL27:OUT18PCIE.PIPETX1DATA6
TCELL27:OUT19PCIE.PIPETX5DATA9
TCELL27:OUT20PCIE.PIPETX5DATA7
TCELL27:OUT21PCIE.PIPETX1DATA10
TCELL27:OUT22PCIE.PIPETX5DATA6
TCELL27:OUT23PCIE.PIPETX1DATA9
TCELL28:IMUX.CLK0PCIE.DRPCLK
TCELL28:IMUX.IMUX0PCIE.TRNTD17
TCELL28:IMUX.IMUX1PCIE.TRNTD18
TCELL28:IMUX.IMUX2PCIE.TRNTD19
TCELL28:IMUX.IMUX3PCIE.TRNTD20
TCELL28:IMUX.IMUX4PCIE.MIMTXRDATA63
TCELL28:IMUX.IMUX5PCIE.MIMTXRDATA64
TCELL28:IMUX.IMUX6PCIE.MIMTXRDATA65
TCELL28:IMUX.IMUX7PCIE.MIMTXRDATA66
TCELL28:IMUX.IMUX8PCIE.PL2DIRECTEDLSTATE0
TCELL28:IMUX.IMUX9PCIE.PL2DIRECTEDLSTATE1
TCELL28:IMUX.IMUX10PCIE.PL2DIRECTEDLSTATE2
TCELL28:IMUX.IMUX11PCIE.PL2DIRECTEDLSTATE3
TCELL28:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG69
TCELL28:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG70
TCELL28:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG71
TCELL28:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG72
TCELL28:IMUX.IMUX16PCIE.CFGDSN5
TCELL28:IMUX.IMUX17PCIE.CFGDSN6
TCELL28:IMUX.IMUX18PCIE.CFGDSN7
TCELL28:IMUX.IMUX19PCIE.CFGDSN8
TCELL28:IMUX.IMUX20PCIE.DRPDADDR0
TCELL28:OUT0PCIE.TRNRD10
TCELL28:OUT1PCIE.PIPETX1DATA3
TCELL28:OUT2PCIE.PIPETX5DATA4
TCELL28:OUT3PCIE.TRNRD11
TCELL28:OUT4PCIE.CFGDO9
TCELL28:OUT5PCIE.PIPETX5DATA3
TCELL28:OUT6PCIE.PIPETX1DATA4
TCELL28:OUT7PCIE.MIMRXWDATA44
TCELL28:OUT8PCIE.MIMRXWDATA45
TCELL28:OUT9PCIE.MIMRXWDATA46
TCELL28:OUT10PCIE.MIMRXWDATA47
TCELL28:OUT11PCIE.DBGVECA55
TCELL28:OUT12PCIE.DBGVECA56
TCELL28:OUT13PCIE.DBGVECA57
TCELL28:OUT14PCIE.DBGVECA58
TCELL28:OUT15PCIE.DBGVECC8
TCELL28:OUT16PCIE.PIPETX1DATA0
TCELL28:OUT17PCIE.PIPETX5DATA1
TCELL28:OUT18PCIE.PIPETX1DATA5
TCELL28:OUT19PCIE.PIPETX5DATA2
TCELL28:OUT20PCIE.PIPETX5DATA0
TCELL28:OUT21PCIE.PIPETX1DATA1
TCELL28:OUT22PCIE.PIPETX5DATA5
TCELL28:OUT23PCIE.PIPETX1DATA2
TCELL29:IMUX.CLK0PCIE.USERCLK
TCELL29:IMUX.CLK1PCIE.PIPECLK
TCELL29:IMUX.IMUX0PCIE.TRNTD21
TCELL29:IMUX.IMUX1PCIE.TRNTD22
TCELL29:IMUX.IMUX2PCIE.TRNTD23
TCELL29:IMUX.IMUX3PCIE.TRNTD24
TCELL29:IMUX.IMUX4PCIE.MIMTXRDATA67
TCELL29:IMUX.IMUX5PCIE.MIMTXRDATA68
TCELL29:IMUX.IMUX6PCIE.MIMRXRDATA0
TCELL29:IMUX.IMUX7PCIE.MIMRXRDATA1
TCELL29:IMUX.IMUX8PCIE.PL2DIRECTEDLSTATE4
TCELL29:IMUX.IMUX9PCIE.LL2SUSPENDNOWN
TCELL29:IMUX.IMUX10PCIE.TL2PPMSUSPENDREQN
TCELL29:IMUX.IMUX11PCIE.TL2ASPMSUSPENDCREDITCHECKN
TCELL29:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG73
TCELL29:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG74
TCELL29:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG75
TCELL29:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG76
TCELL29:IMUX.IMUX16PCIE.CFGDSN9
TCELL29:IMUX.IMUX17PCIE.CFGDSN10
TCELL29:IMUX.IMUX18PCIE.CFGDSN11
TCELL29:IMUX.IMUX19PCIE.CFGDSN12
TCELL29:IMUX.IMUX20PCIE.DRPDADDR1
TCELL29:IMUX.IMUX21PCIE.DRPDADDR2
TCELL29:IMUX.IMUX22PCIE.DRPDADDR3
TCELL29:OUT0PCIE.TRNRD12
TCELL29:OUT1PCIE.TRNRD13
TCELL29:OUT2PCIE.TRNRD14
TCELL29:OUT3PCIE.TRNRD15
TCELL29:OUT4PCIE.MIMTXWDATA15
TCELL29:OUT5PCIE.MIMTXWDATA16
TCELL29:OUT6PCIE.MIMTXWDATA17
TCELL29:OUT7PCIE.MIMTXWDATA18
TCELL29:OUT8PCIE.MIMRXWDATA48
TCELL29:OUT9PCIE.MIMRXWDATA49
TCELL29:OUT10PCIE.MIMRXWDATA50
TCELL29:OUT11PCIE.MIMRXWDATA51
TCELL29:OUT12PCIE.CFGDO10
TCELL29:OUT13PCIE.CFGDO11
TCELL29:OUT14PCIE.CFGDO12
TCELL29:OUT15PCIE.CFGDO13
TCELL29:OUT16PCIE.CFGDEVCONTROLURERRREPORTINGEN
TCELL29:OUT17PCIE.CFGDEVCONTROLENABLERO
TCELL29:OUT18PCIE.CFGDEVCONTROLMAXPAYLOAD0
TCELL29:OUT19PCIE.DBGVECC9
TCELL29:OUT20PCIE.DBGVECC10
TCELL29:OUT21PCIE.DBGVECA59
TCELL29:OUT22PCIE.DBGVECA60
TCELL29:OUT23PCIE.DBGVECA61
TCELL30:IMUX.IMUX0PCIE.TRNTD25
TCELL30:IMUX.IMUX1PCIE.PIPERX0DATA4
TCELL30:IMUX.IMUX2PCIE.MIMRXRDATA2
TCELL30:IMUX.IMUX3PCIE.PIPERX0DATA0
TCELL30:IMUX.IMUX4PCIE.MIMRXRDATA3
TCELL30:IMUX.IMUX5PCIE.PIPERX0DATA1
TCELL30:IMUX.IMUX6PCIE.MIMRXRDATA4
TCELL30:IMUX.IMUX7PCIE.PIPERX4DATA2
TCELL30:IMUX.IMUX8PCIE.MIMRXRDATA5
TCELL30:IMUX.IMUX9PCIE.PIPERX0DATA5
TCELL30:IMUX.IMUX10PCIE.SCANMODEN
TCELL30:IMUX.IMUX11PCIE.PIPERX4DATA0
TCELL30:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG77
TCELL30:IMUX.IMUX13PCIE.PIPERX4DATA1
TCELL30:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG78
TCELL30:IMUX.IMUX15PCIE.PIPERX0DATA2
TCELL30:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG79
TCELL30:IMUX.IMUX17PCIE.PIPERX4DATA4
TCELL30:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG80
TCELL30:IMUX.IMUX19PCIE.PIPERX0DATA3
TCELL30:IMUX.IMUX21PCIE.PIPERX4DATA5
TCELL30:IMUX.IMUX23PCIE.PIPERX4DATA3
TCELL30:OUT0PCIE.TRNRD16
TCELL30:OUT1PCIE.TRNRD17
TCELL30:OUT2PCIE.TRNRD18
TCELL30:OUT3PCIE.TRNRD19
TCELL30:OUT4PCIE.MIMTXWDATA19
TCELL30:OUT5PCIE.MIMTXWDATA20
TCELL30:OUT6PCIE.MIMTXWDATA21
TCELL30:OUT7PCIE.MIMTXWDATA22
TCELL30:OUT8PCIE.MIMRXWDATA52
TCELL30:OUT9PCIE.MIMRXWDATA53
TCELL30:OUT10PCIE.MIMRXWDATA54
TCELL30:OUT11PCIE.MIMRXWDATA55
TCELL30:OUT12PCIE.CFGDO14
TCELL30:OUT13PCIE.CFGDO15
TCELL30:OUT14PCIE.CFGDO16
TCELL30:OUT15PCIE.CFGDO17
TCELL30:OUT16PCIE.CFGDEVCONTROLMAXPAYLOAD1
TCELL30:OUT17PCIE.CFGDEVCONTROLMAXPAYLOAD2
TCELL30:OUT18PCIE.CFGDEVCONTROLEXTTAGEN
TCELL30:OUT19PCIE.DBGVECC11
TCELL30:OUT20PCIE.DBGSCLRA
TCELL30:OUT21PCIE.DBGVECA62
TCELL30:OUT22PCIE.DBGVECA63
TCELL30:OUT23PCIE.DBGVECB0
TCELL31:IMUX.IMUX0PCIE.TRNTD26
TCELL31:IMUX.IMUX1PCIE.PIPERX0DATA6
TCELL31:IMUX.IMUX2PCIE.MIMRXRDATA6
TCELL31:IMUX.IMUX3PCIE.PIPERX0DATA8
TCELL31:IMUX.IMUX4PCIE.MIMRXRDATA7
TCELL31:IMUX.IMUX5PCIE.PIPERX0DATA9
TCELL31:IMUX.IMUX6PCIE.MIMRXRDATA8
TCELL31:IMUX.IMUX7PCIE.PIPERX0DATA10
TCELL31:IMUX.IMUX8PCIE.MIMRXRDATA9
TCELL31:IMUX.IMUX9PCIE.PIPERX0DATA7
TCELL31:IMUX.IMUX10PCIE.SCANENABLEN
TCELL31:IMUX.IMUX11PCIE.PIPERX4DATA8
TCELL31:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG81
TCELL31:IMUX.IMUX13PCIE.PIPERX4DATA9
TCELL31:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG82
TCELL31:IMUX.IMUX15PCIE.PIPERX0DATA11
TCELL31:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG83
TCELL31:IMUX.IMUX17PCIE.PIPERX4DATA6
TCELL31:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG84
TCELL31:IMUX.IMUX19PCIE.PIPERX4DATA10
TCELL31:IMUX.IMUX21PCIE.PIPERX4DATA7
TCELL31:IMUX.IMUX23PCIE.PIPERX4DATA11
TCELL31:OUT0PCIE.TRNRD20
TCELL31:OUT1PCIE.TRNRD21
TCELL31:OUT2PCIE.TRNRD22
TCELL31:OUT3PCIE.TRNRD23
TCELL31:OUT4PCIE.MIMTXWDATA23
TCELL31:OUT5PCIE.MIMTXWDATA24
TCELL31:OUT6PCIE.MIMTXWDATA25
TCELL31:OUT7PCIE.MIMTXWDATA26
TCELL31:OUT8PCIE.MIMRXWDATA56
TCELL31:OUT9PCIE.MIMRXWDATA57
TCELL31:OUT10PCIE.MIMRXWDATA58
TCELL31:OUT11PCIE.MIMRXWDATA59
TCELL31:OUT12PCIE.CFGDO18
TCELL31:OUT13PCIE.CFGDO19
TCELL31:OUT14PCIE.CFGDO20
TCELL31:OUT15PCIE.CFGDO21
TCELL31:OUT16PCIE.CFGDEVCONTROLPHANTOMEN
TCELL31:OUT17PCIE.CFGDEVCONTROLAUXPOWEREN
TCELL31:OUT18PCIE.PIPERX0POLARITY
TCELL31:OUT19PCIE.DBGSCLRB
TCELL31:OUT20PCIE.DBGVECB1
TCELL31:OUT21PCIE.DBGVECB2
TCELL31:OUT22PCIE.PIPERX4POLARITY
TCELL31:OUT23PCIE.DBGVECB3
TCELL32:IMUX.IMUX0PCIE.TRNTD27
TCELL32:IMUX.IMUX1PCIE.PIPERX0CHARISK1
TCELL32:IMUX.IMUX2PCIE.TRNTD28
TCELL32:IMUX.IMUX3PCIE.PIPERX4DATA13
TCELL32:IMUX.IMUX4PCIE.TRNTD29
TCELL32:IMUX.IMUX5PCIE.PIPERX0DATA12
TCELL32:IMUX.IMUX6PCIE.MIMRXRDATA10
TCELL32:IMUX.IMUX7PCIE.PIPERX0DATA13
TCELL32:IMUX.IMUX8PCIE.MIMRXRDATA11
TCELL32:IMUX.IMUX9PCIE.PIPERX0DATA15
TCELL32:IMUX.IMUX10PCIE.MIMRXRDATA12
TCELL32:IMUX.IMUX11PCIE.PIPERX0DATA14
TCELL32:IMUX.IMUX12PCIE.MIMRXRDATA13
TCELL32:IMUX.IMUX13PCIE.PIPERX4DATA12
TCELL32:IMUX.IMUX14PCIE.SCANIN0
TCELL32:IMUX.IMUX15PCIE.PIPERX4DATA14
TCELL32:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG85
TCELL32:IMUX.IMUX17PCIE.PIPERX4CHARISK1
TCELL32:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG86
TCELL32:IMUX.IMUX19PCIE.CFGERRAERHEADERLOG87
TCELL32:IMUX.IMUX20PCIE.CFGERRAERHEADERLOG88
TCELL32:IMUX.IMUX21PCIE.PIPERX4DATA15
TCELL32:OUT0PCIE.TRNRD24
TCELL32:OUT1PCIE.TRNRD25
TCELL32:OUT2PCIE.TRNRD26
TCELL32:OUT3PCIE.TRNRD27
TCELL32:OUT4PCIE.MIMTXWDATA27
TCELL32:OUT5PCIE.MIMTXWDATA28
TCELL32:OUT6PCIE.MIMTXWDATA29
TCELL32:OUT7PCIE.MIMTXWDATA30
TCELL32:OUT8PCIE.MIMRXWDATA60
TCELL32:OUT9PCIE.MIMRXWDATA61
TCELL32:OUT10PCIE.MIMRXWDATA62
TCELL32:OUT11PCIE.MIMRXWDATA63
TCELL32:OUT12PCIE.CFGDO22
TCELL32:OUT13PCIE.CFGDO23
TCELL32:OUT14PCIE.CFGDO24
TCELL32:OUT15PCIE.CFGDO25
TCELL32:OUT16PCIE.CFGDEVCONTROLNOSNOOPEN
TCELL32:OUT17PCIE.CFGDEVCONTROLMAXREADREQ0
TCELL32:OUT18PCIE.CFGDEVCONTROLMAXREADREQ1
TCELL32:OUT19PCIE.DBGSCLRC
TCELL32:OUT20PCIE.DBGSCLRD
TCELL32:OUT21PCIE.DBGVECB4
TCELL32:OUT22PCIE.DBGVECB5
TCELL32:OUT23PCIE.DBGVECB6
TCELL33:IMUX.IMUX0PCIE.TRNTD30
TCELL33:IMUX.IMUX1PCIE.PIPERX4CHANISALIGNED
TCELL33:IMUX.IMUX2PCIE.TRNTD31
TCELL33:IMUX.IMUX3PCIE.TRNTD32
TCELL33:IMUX.IMUX4PCIE.TRNTD33
TCELL33:IMUX.IMUX5PCIE.MIMRXRDATA14
TCELL33:IMUX.IMUX6PCIE.MIMRXRDATA15
TCELL33:IMUX.IMUX7PCIE.MIMRXRDATA16
TCELL33:IMUX.IMUX8PCIE.MIMRXRDATA17
TCELL33:IMUX.IMUX9PCIE.SCANIN1
TCELL33:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG89
TCELL33:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG90
TCELL33:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG91
TCELL33:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG92
TCELL33:IMUX.IMUX14PCIE.CFGDSN13
TCELL33:IMUX.IMUX15PCIE.PIPERX4CHARISK0
TCELL33:IMUX.IMUX16PCIE.CFGDSN14
TCELL33:IMUX.IMUX17PCIE.CFGDSN15
TCELL33:IMUX.IMUX18PCIE.CFGDSN16
TCELL33:IMUX.IMUX19PCIE.DRPDADDR4
TCELL33:IMUX.IMUX21PCIE.PIPERX0CHANISALIGNED
TCELL33:IMUX.IMUX23PCIE.PIPERX0CHARISK0
TCELL33:OUT0PCIE.TRNRD28
TCELL33:OUT1PCIE.TRNRD29
TCELL33:OUT2PCIE.TRNRD30
TCELL33:OUT3PCIE.TRNRD31
TCELL33:OUT4PCIE.MIMTXWDATA31
TCELL33:OUT5PCIE.MIMTXWDATA32
TCELL33:OUT6PCIE.MIMTXWDATA33
TCELL33:OUT7PCIE.MIMTXWDATA34
TCELL33:OUT8PCIE.MIMRXWDATA64
TCELL33:OUT9PCIE.MIMRXWDATA65
TCELL33:OUT10PCIE.MIMRXWDATA66
TCELL33:OUT11PCIE.MIMRXWDATA67
TCELL33:OUT12PCIE.CFGDO26
TCELL33:OUT13PCIE.CFGDO27
TCELL33:OUT14PCIE.CFGDO28
TCELL33:OUT15PCIE.CFGDO29
TCELL33:OUT16PCIE.CFGDEVCONTROLMAXREADREQ2
TCELL33:OUT17PCIE.CFGLINKSTATUSCURRENTSPEED0
TCELL33:OUT18PCIE.CFGLINKSTATUSCURRENTSPEED1
TCELL33:OUT19PCIE.DBGSCLRE
TCELL33:OUT20PCIE.DBGSCLRF
TCELL33:OUT21PCIE.DBGVECB7
TCELL33:OUT22PCIE.DBGVECB8
TCELL33:OUT23PCIE.DBGVECB9
TCELL34:IMUX.IMUX0PCIE.TRNTD34
TCELL34:IMUX.IMUX1PCIE.PIPERX4STATUS2
TCELL34:IMUX.IMUX2PCIE.TRNTD35
TCELL34:IMUX.IMUX3PCIE.PIPERX4STATUS0
TCELL34:IMUX.IMUX4PCIE.TRNTD36
TCELL34:IMUX.IMUX5PCIE.TRNTD37
TCELL34:IMUX.IMUX6PCIE.MIMRXRDATA18
TCELL34:IMUX.IMUX7PCIE.PIPERX4STATUS1
TCELL34:IMUX.IMUX8PCIE.MIMRXRDATA19
TCELL34:IMUX.IMUX9PCIE.MIMRXRDATA20
TCELL34:IMUX.IMUX10PCIE.MIMRXRDATA21
TCELL34:IMUX.IMUX11PCIE.PIPERX0PHYSTATUS
TCELL34:IMUX.IMUX12PCIE.SCANIN2
TCELL34:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG93
TCELL34:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG94
TCELL34:IMUX.IMUX15PCIE.PIPERX4PHYSTATUS
TCELL34:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG95
TCELL34:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG96
TCELL34:IMUX.IMUX18PCIE.CFGDSN17
TCELL34:IMUX.IMUX19PCIE.PIPERX0STATUS1
TCELL34:IMUX.IMUX21PCIE.PIPERX0STATUS2
TCELL34:IMUX.IMUX23PCIE.PIPERX0STATUS0
TCELL34:OUT0PCIE.TRNRD32
TCELL34:OUT1PCIE.PIPETX0ELECIDLE
TCELL34:OUT2PCIE.TRNRD33
TCELL34:OUT3PCIE.TRNRD34
TCELL34:OUT4PCIE.TRNRD35
TCELL34:OUT5PCIE.PIPETX4ELECIDLE
TCELL34:OUT6PCIE.MIMTXWDATA35
TCELL34:OUT7PCIE.MIMTXWDATA36
TCELL34:OUT8PCIE.MIMTXWDATA37
TCELL34:OUT9PCIE.MIMTXWDATA38
TCELL34:OUT10PCIE.MIMRXWADDR0
TCELL34:OUT11PCIE.MIMRXWADDR1
TCELL34:OUT12PCIE.MIMRXWADDR2
TCELL34:OUT13PCIE.MIMRXWADDR3
TCELL34:OUT14PCIE.CFGDO30
TCELL34:OUT15PCIE.DBGSCLRG
TCELL34:OUT16PCIE.DBGSCLRH
TCELL34:OUT17PCIE.PIPETX4POWERDOWN0
TCELL34:OUT18PCIE.DBGVECB10
TCELL34:OUT19PCIE.PIPETX4POWERDOWN1
TCELL34:OUT20PCIE.DBGVECB11
TCELL34:OUT21PCIE.PIPETX0POWERDOWN0
TCELL34:OUT22PCIE.DBGVECB12
TCELL34:OUT23PCIE.PIPETX0POWERDOWN1
TCELL35:IMUX.IMUX0PCIE.TRNTD38
TCELL35:IMUX.IMUX1PCIE.TRNTD39
TCELL35:IMUX.IMUX2PCIE.TRNTD40
TCELL35:IMUX.IMUX3PCIE.TRNTD41
TCELL35:IMUX.IMUX4PCIE.MIMRXRDATA22
TCELL35:IMUX.IMUX5PCIE.PIPERX4ELECIDLE
TCELL35:IMUX.IMUX6PCIE.MIMRXRDATA23
TCELL35:IMUX.IMUX7PCIE.MIMRXRDATA24
TCELL35:IMUX.IMUX8PCIE.MIMRXRDATA25
TCELL35:IMUX.IMUX9PCIE.SCANIN3
TCELL35:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG97
TCELL35:IMUX.IMUX11PCIE.PIPERX4VALID
TCELL35:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG98
TCELL35:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG99
TCELL35:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG100
TCELL35:IMUX.IMUX15PCIE.CFGDSN18
TCELL35:IMUX.IMUX16PCIE.CFGDSN19
TCELL35:IMUX.IMUX17PCIE.CFGDSN20
TCELL35:IMUX.IMUX18PCIE.CFGDSN21
TCELL35:IMUX.IMUX19PCIE.PIPERX0VALID
TCELL35:IMUX.IMUX20PCIE.DRPDADDR5
TCELL35:IMUX.IMUX21PCIE.PIPERX0ELECIDLE
TCELL35:OUT0PCIE.TRNRD36
TCELL35:OUT1PCIE.TRNRD37
TCELL35:OUT2PCIE.TRNRD38
TCELL35:OUT3PCIE.TRNRD39
TCELL35:OUT4PCIE.MIMTXWDATA39
TCELL35:OUT5PCIE.MIMTXWDATA40
TCELL35:OUT6PCIE.MIMTXWDATA41
TCELL35:OUT7PCIE.MIMTXWDATA42
TCELL35:OUT8PCIE.MIMRXWADDR4
TCELL35:OUT9PCIE.MIMRXWADDR5
TCELL35:OUT10PCIE.MIMRXWADDR6
TCELL35:OUT11PCIE.MIMRXWADDR7
TCELL35:OUT12PCIE.CFGDO31
TCELL35:OUT13PCIE.DBGSCLRI
TCELL35:OUT14PCIE.DBGSCLRJ
TCELL35:OUT15PCIE.DBGSCLRK
TCELL35:OUT16PCIE.PIPETX0COMPLIANCE
TCELL35:OUT17PCIE.DBGVECB13
TCELL35:OUT18PCIE.PIPETX0CHARISK0
TCELL35:OUT19PCIE.PIPETX4CHARISK1
TCELL35:OUT20PCIE.PIPETX4COMPLIANCE
TCELL35:OUT21PCIE.DBGVECB14
TCELL35:OUT22PCIE.PIPETX4CHARISK0
TCELL35:OUT23PCIE.PIPETX0CHARISK1
TCELL36:IMUX.IMUX0PCIE.TRNTD42
TCELL36:IMUX.IMUX1PCIE.TRNTD43
TCELL36:IMUX.IMUX2PCIE.TRNTD44
TCELL36:IMUX.IMUX3PCIE.TRNTD45
TCELL36:IMUX.IMUX4PCIE.MIMRXRDATA26
TCELL36:IMUX.IMUX5PCIE.MIMRXRDATA27
TCELL36:IMUX.IMUX6PCIE.MIMRXRDATA28
TCELL36:IMUX.IMUX7PCIE.MIMRXRDATA29
TCELL36:IMUX.IMUX8PCIE.SCANIN4
TCELL36:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG101
TCELL36:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG102
TCELL36:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG103
TCELL36:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG104
TCELL36:IMUX.IMUX13PCIE.CFGDSN22
TCELL36:IMUX.IMUX14PCIE.CFGDSN23
TCELL36:IMUX.IMUX15PCIE.CFGDSN24
TCELL36:IMUX.IMUX16PCIE.CFGDSN25
TCELL36:IMUX.IMUX17PCIE.DRPDADDR6
TCELL36:IMUX.IMUX18PCIE.DRPDADDR7
TCELL36:IMUX.IMUX19PCIE.DRPDADDR8
TCELL36:IMUX.IMUX20PCIE.DRPDI0
TCELL36:IMUX.IMUX21PCIE.DBGSUBMODE
TCELL36:OUT0PCIE.TRNRD40
TCELL36:OUT1PCIE.TRNRD41
TCELL36:OUT2PCIE.PIPETX4DATA13
TCELL36:OUT3PCIE.TRNRD42
TCELL36:OUT4PCIE.TRNRD43
TCELL36:OUT5PCIE.MIMTXWDATA43
TCELL36:OUT6PCIE.PIPETX0DATA13
TCELL36:OUT7PCIE.MIMTXWDATA44
TCELL36:OUT8PCIE.CFGRDWRDONEN
TCELL36:OUT9PCIE.MIMRXWADDR8
TCELL36:OUT10PCIE.MIMRXWADDR9
TCELL36:OUT11PCIE.MIMRXWADDR10
TCELL36:OUT12PCIE.MIMRXWADDR11
TCELL36:OUT13PCIE.DBGVECB15
TCELL36:OUT14PCIE.DBGVECB16
TCELL36:OUT15PCIE.DBGVECB17
TCELL36:OUT16PCIE.PIPETX0DATA12
TCELL36:OUT17PCIE.PIPETX4DATA15
TCELL36:OUT18PCIE.DBGVECB18
TCELL36:OUT19PCIE.PIPETX4DATA14
TCELL36:OUT20PCIE.PIPETX4DATA12
TCELL36:OUT21PCIE.PIPETX0DATA15
TCELL36:OUT22PCIE.PLDBGVEC0
TCELL36:OUT23PCIE.PIPETX0DATA14
TCELL37:IMUX.IMUX0PCIE.TRNTD46
TCELL37:IMUX.IMUX1PCIE.TRNTD47
TCELL37:IMUX.IMUX2PCIE.TRNTD48
TCELL37:IMUX.IMUX3PCIE.TRNTD49
TCELL37:IMUX.IMUX4PCIE.MIMRXRDATA30
TCELL37:IMUX.IMUX5PCIE.MIMRXRDATA31
TCELL37:IMUX.IMUX6PCIE.MIMRXRDATA32
TCELL37:IMUX.IMUX7PCIE.MIMRXRDATA33
TCELL37:IMUX.IMUX8PCIE.SCANIN5
TCELL37:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG105
TCELL37:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG106
TCELL37:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG107
TCELL37:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG108
TCELL37:IMUX.IMUX13PCIE.CFGDSN26
TCELL37:IMUX.IMUX14PCIE.CFGDSN27
TCELL37:IMUX.IMUX15PCIE.CFGDSN28
TCELL37:IMUX.IMUX16PCIE.CFGDSN29
TCELL37:IMUX.IMUX17PCIE.DRPDI1
TCELL37:IMUX.IMUX18PCIE.DRPDI2
TCELL37:IMUX.IMUX19PCIE.DRPDI3
TCELL37:IMUX.IMUX20PCIE.DRPDI4
TCELL37:IMUX.IMUX21PCIE.PLDBGMODE0
TCELL37:OUT0PCIE.TRNRD44
TCELL37:OUT1PCIE.PIPETX0DATA11
TCELL37:OUT2PCIE.PIPETX4DATA8
TCELL37:OUT3PCIE.TRNRD45
TCELL37:OUT4PCIE.CFGERRAERHEADERLOGSETN
TCELL37:OUT5PCIE.PIPETX4DATA11
TCELL37:OUT6PCIE.PIPETX0DATA8
TCELL37:OUT7PCIE.MIMRXWADDR12
TCELL37:OUT8PCIE.MIMRXWEN
TCELL37:OUT9PCIE.MIMRXRADDR0
TCELL37:OUT10PCIE.MIMRXRADDR1
TCELL37:OUT11PCIE.DBGVECB19
TCELL37:OUT12PCIE.DBGVECB20
TCELL37:OUT13PCIE.DBGVECB21
TCELL37:OUT14PCIE.DBGVECB22
TCELL37:OUT15PCIE.PLDBGVEC1
TCELL37:OUT16PCIE.PIPETX0DATA7
TCELL37:OUT17PCIE.PIPETX4DATA10
TCELL37:OUT18PCIE.PIPETX0DATA6
TCELL37:OUT19PCIE.PIPETX4DATA9
TCELL37:OUT20PCIE.PIPETX4DATA7
TCELL37:OUT21PCIE.PIPETX0DATA10
TCELL37:OUT22PCIE.PIPETX4DATA6
TCELL37:OUT23PCIE.PIPETX0DATA9
TCELL38:IMUX.IMUX0PCIE.TRNTD50
TCELL38:IMUX.IMUX1PCIE.TRNTD51
TCELL38:IMUX.IMUX2PCIE.TRNTD52
TCELL38:IMUX.IMUX3PCIE.TRNTD53
TCELL38:IMUX.IMUX4PCIE.MIMRXRDATA34
TCELL38:IMUX.IMUX5PCIE.MIMRXRDATA35
TCELL38:IMUX.IMUX6PCIE.MIMRXRDATA36
TCELL38:IMUX.IMUX7PCIE.MIMRXRDATA37
TCELL38:IMUX.IMUX8PCIE.SCANIN6
TCELL38:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG109
TCELL38:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG110
TCELL38:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG111
TCELL38:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG112
TCELL38:IMUX.IMUX13PCIE.CFGDSN30
TCELL38:IMUX.IMUX14PCIE.CFGDSN31
TCELL38:IMUX.IMUX15PCIE.CFGDSN32
TCELL38:IMUX.IMUX16PCIE.CFGDSN33
TCELL38:IMUX.IMUX17PCIE.DRPDI5
TCELL38:IMUX.IMUX18PCIE.DRPDI6
TCELL38:IMUX.IMUX19PCIE.DRPDI7
TCELL38:IMUX.IMUX20PCIE.DRPDI8
TCELL38:IMUX.IMUX21PCIE.PLDBGMODE1
TCELL38:OUT0PCIE.TRNRD46
TCELL38:OUT1PCIE.PIPETX0DATA3
TCELL38:OUT2PCIE.PIPETX4DATA4
TCELL38:OUT3PCIE.TRNRD47
TCELL38:OUT4PCIE.CFGERRCPLRDYN
TCELL38:OUT5PCIE.PIPETX4DATA3
TCELL38:OUT6PCIE.PIPETX0DATA4
TCELL38:OUT7PCIE.MIMRXRADDR2
TCELL38:OUT8PCIE.MIMRXRADDR3
TCELL38:OUT9PCIE.MIMRXRADDR4
TCELL38:OUT10PCIE.MIMRXRADDR5
TCELL38:OUT11PCIE.DBGVECB23
TCELL38:OUT12PCIE.DBGVECB24
TCELL38:OUT13PCIE.DBGVECB25
TCELL38:OUT14PCIE.DBGVECB26
TCELL38:OUT15PCIE.PLDBGVEC2
TCELL38:OUT16PCIE.PIPETX0DATA0
TCELL38:OUT17PCIE.PIPETX4DATA1
TCELL38:OUT18PCIE.PIPETX0DATA5
TCELL38:OUT19PCIE.PIPETX4DATA2
TCELL38:OUT20PCIE.PIPETX4DATA0
TCELL38:OUT21PCIE.PIPETX0DATA1
TCELL38:OUT22PCIE.PIPETX4DATA5
TCELL38:OUT23PCIE.PIPETX0DATA2
TCELL39:IMUX.IMUX0PCIE.TRNTD54
TCELL39:IMUX.IMUX1PCIE.TRNTD55
TCELL39:IMUX.IMUX2PCIE.TRNTD56
TCELL39:IMUX.IMUX3PCIE.TRNTD57
TCELL39:IMUX.IMUX4PCIE.MIMRXRDATA38
TCELL39:IMUX.IMUX5PCIE.MIMRXRDATA39
TCELL39:IMUX.IMUX6PCIE.MIMRXRDATA40
TCELL39:IMUX.IMUX7PCIE.MIMRXRDATA41
TCELL39:IMUX.IMUX8PCIE.SCANIN7
TCELL39:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG113
TCELL39:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG114
TCELL39:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG115
TCELL39:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG116
TCELL39:IMUX.IMUX13PCIE.CFGDSN34
TCELL39:IMUX.IMUX14PCIE.CFGDSN35
TCELL39:IMUX.IMUX15PCIE.CFGDSN36
TCELL39:IMUX.IMUX16PCIE.CFGDSN37
TCELL39:IMUX.IMUX17PCIE.DRPDI9
TCELL39:IMUX.IMUX18PCIE.DRPDI10
TCELL39:IMUX.IMUX19PCIE.DRPDI11
TCELL39:IMUX.IMUX20PCIE.DRPDI12
TCELL39:IMUX.IMUX21PCIE.PLDBGMODE2
TCELL39:OUT0PCIE.TRNRD48
TCELL39:OUT1PCIE.TRNRD49
TCELL39:OUT2PCIE.TRNRD50
TCELL39:OUT3PCIE.TRNRD51
TCELL39:OUT4PCIE.MIMTXWDATA45
TCELL39:OUT5PCIE.MIMTXWDATA46
TCELL39:OUT6PCIE.MIMTXWDATA47
TCELL39:OUT7PCIE.MIMTXWDATA48
TCELL39:OUT8PCIE.MIMRXRADDR6
TCELL39:OUT9PCIE.MIMRXRADDR7
TCELL39:OUT10PCIE.MIMRXRADDR8
TCELL39:OUT11PCIE.MIMRXRADDR9
TCELL39:OUT12PCIE.CFGINTERRUPTRDYN
TCELL39:OUT13PCIE.CFGINTERRUPTMMENABLE0
TCELL39:OUT14PCIE.CFGINTERRUPTMMENABLE1
TCELL39:OUT15PCIE.CFGINTERRUPTMMENABLE2
TCELL39:OUT16PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH0
TCELL39:OUT17PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH1
TCELL39:OUT18PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH2
TCELL39:OUT19PCIE.PLDBGVEC3
TCELL39:OUT20PCIE.PLDBGVEC4
TCELL39:OUT21PCIE.DBGVECB27
TCELL39:OUT22PCIE.DBGVECB28
TCELL39:OUT23PCIE.DBGVECB29

Bitstream

virtex6 PCIE bittile 0
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[14] PCIE:DRP05[14] PCIE:BAR0[15] PCIE:DRP05[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[12] PCIE:DRP05[12] PCIE:BAR0[13] PCIE:DRP05[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[10] PCIE:DRP05[10] PCIE:BAR0[11] PCIE:DRP05[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[8] PCIE:DRP05[8] PCIE:BAR0[9] PCIE:DRP05[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[6] PCIE:DRP05[6] PCIE:BAR0[7] PCIE:DRP05[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[4] PCIE:DRP05[4] PCIE:BAR0[5] PCIE:DRP05[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[2] PCIE:DRP05[2] PCIE:BAR0[3] PCIE:DRP05[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[0] PCIE:DRP05[0] PCIE:BAR0[1] PCIE:DRP05[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP04[14] PCIE:DRP04[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ON PCIE:DRP04[12] PCIE:DRP04[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[10] PCIE:DRP04[10] PCIE:AER_CAP_NEXTPTR[11] PCIE:DRP04[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[8] PCIE:DRP04[8] PCIE:AER_CAP_NEXTPTR[9] PCIE:DRP04[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[6] PCIE:DRP04[6] PCIE:AER_CAP_NEXTPTR[7] PCIE:DRP04[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[4] PCIE:DRP04[4] PCIE:AER_CAP_NEXTPTR[5] PCIE:DRP04[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[2] PCIE:DRP04[2] PCIE:AER_CAP_NEXTPTR[3] PCIE:DRP04[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[0] PCIE:DRP04[0] PCIE:AER_CAP_NEXTPTR[1] PCIE:DRP04[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP03[14] PCIE:DRP03[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP03[12] PCIE:DRP03[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[10] PCIE:DRP03[10] PCIE:AER_BASE_PTR[11] PCIE:DRP03[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[8] PCIE:DRP03[8] PCIE:AER_BASE_PTR[9] PCIE:DRP03[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[6] PCIE:DRP03[6] PCIE:AER_BASE_PTR[7] PCIE:DRP03[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[4] PCIE:DRP03[4] PCIE:AER_BASE_PTR[5] PCIE:DRP03[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[2] PCIE:DRP03[2] PCIE:AER_BASE_PTR[3] PCIE:DRP03[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[0] PCIE:DRP03[0] PCIE:AER_BASE_PTR[1] PCIE:DRP03[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_VERSION[3] PCIE:DRP02[14] PCIE:DRP02[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_VERSION[1] PCIE:DRP02[12] PCIE:AER_CAP_VERSION[2] PCIE:DRP02[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE PCIE:DRP02[10] PCIE:AER_CAP_VERSION[0] PCIE:DRP02[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_INT_MSG_NUM_MSIX[3] PCIE:DRP02[8] PCIE:AER_CAP_INT_MSG_NUM_MSIX[4] PCIE:DRP02[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_INT_MSG_NUM_MSIX[1] PCIE:DRP02[6] PCIE:AER_CAP_INT_MSG_NUM_MSIX[2] PCIE:DRP02[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_INT_MSG_NUM_MSI[4] PCIE:DRP02[4] PCIE:AER_CAP_INT_MSG_NUM_MSIX[0] PCIE:DRP02[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_INT_MSG_NUM_MSI[2] PCIE:DRP02[2] PCIE:AER_CAP_INT_MSG_NUM_MSI[3] PCIE:DRP02[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_INT_MSG_NUM_MSI[0] PCIE:DRP02[0] PCIE:AER_CAP_INT_MSG_NUM_MSI[1] PCIE:DRP02[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[14] PCIE:DRP01[14] PCIE:AER_CAP_ID[15] PCIE:DRP01[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[12] PCIE:DRP01[12] PCIE:AER_CAP_ID[13] PCIE:DRP01[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[10] PCIE:DRP01[10] PCIE:AER_CAP_ID[11] PCIE:DRP01[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[8] PCIE:DRP01[8] PCIE:AER_CAP_ID[9] PCIE:DRP01[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[6] PCIE:DRP01[6] PCIE:AER_CAP_ID[7] PCIE:DRP01[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[4] PCIE:DRP01[4] PCIE:AER_CAP_ID[5] PCIE:DRP01[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[2] PCIE:DRP01[2] PCIE:AER_CAP_ID[3] PCIE:DRP01[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[0] PCIE:DRP01[0] PCIE:AER_CAP_ID[1] PCIE:DRP01[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[14] PCIE:DRP00[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[12] PCIE:DRP00[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[10] PCIE:DRP00[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[8] PCIE:DRP00[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[6] PCIE:DRP00[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[4] PCIE:DRP00[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[2] PCIE:DRP00[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ECRC_CHECK_CAPABLE PCIE:DRP00[0] PCIE:AER_CAP_ECRC_GEN_CAPABLE PCIE:DRP00[1]
virtex6 PCIE bittile 1
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[14] PCIE:DRP0B[14] PCIE:BAR3[15] PCIE:DRP0B[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[12] PCIE:DRP0B[12] PCIE:BAR3[13] PCIE:DRP0B[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[10] PCIE:DRP0B[10] PCIE:BAR3[11] PCIE:DRP0B[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[8] PCIE:DRP0B[8] PCIE:BAR3[9] PCIE:DRP0B[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[6] PCIE:DRP0B[6] PCIE:BAR3[7] PCIE:DRP0B[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[4] PCIE:DRP0B[4] PCIE:BAR3[5] PCIE:DRP0B[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[2] PCIE:DRP0B[2] PCIE:BAR3[3] PCIE:DRP0B[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[0] PCIE:DRP0B[0] PCIE:BAR3[1] PCIE:DRP0B[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[30] PCIE:DRP0A[14] PCIE:BAR2[31] PCIE:DRP0A[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[28] PCIE:DRP0A[12] PCIE:BAR2[29] PCIE:DRP0A[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[26] PCIE:DRP0A[10] PCIE:BAR2[27] PCIE:DRP0A[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[24] PCIE:DRP0A[8] PCIE:BAR2[25] PCIE:DRP0A[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[22] PCIE:DRP0A[6] PCIE:BAR2[23] PCIE:DRP0A[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[20] PCIE:DRP0A[4] PCIE:BAR2[21] PCIE:DRP0A[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[18] PCIE:DRP0A[2] PCIE:BAR2[19] PCIE:DRP0A[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[16] PCIE:DRP0A[0] PCIE:BAR2[17] PCIE:DRP0A[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[14] PCIE:DRP09[14] PCIE:BAR2[15] PCIE:DRP09[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[12] PCIE:DRP09[12] PCIE:BAR2[13] PCIE:DRP09[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[10] PCIE:DRP09[10] PCIE:BAR2[11] PCIE:DRP09[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[8] PCIE:DRP09[8] PCIE:BAR2[9] PCIE:DRP09[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[6] PCIE:DRP09[6] PCIE:BAR2[7] PCIE:DRP09[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[4] PCIE:DRP09[4] PCIE:BAR2[5] PCIE:DRP09[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[2] PCIE:DRP09[2] PCIE:BAR2[3] PCIE:DRP09[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[0] PCIE:DRP09[0] PCIE:BAR2[1] PCIE:DRP09[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[30] PCIE:DRP08[14] PCIE:BAR1[31] PCIE:DRP08[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[28] PCIE:DRP08[12] PCIE:BAR1[29] PCIE:DRP08[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[26] PCIE:DRP08[10] PCIE:BAR1[27] PCIE:DRP08[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[24] PCIE:DRP08[8] PCIE:BAR1[25] PCIE:DRP08[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[22] PCIE:DRP08[6] PCIE:BAR1[23] PCIE:DRP08[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[20] PCIE:DRP08[4] PCIE:BAR1[21] PCIE:DRP08[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[18] PCIE:DRP08[2] PCIE:BAR1[19] PCIE:DRP08[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[16] PCIE:DRP08[0] PCIE:BAR1[17] PCIE:DRP08[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[14] PCIE:DRP07[14] PCIE:BAR1[15] PCIE:DRP07[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[12] PCIE:DRP07[12] PCIE:BAR1[13] PCIE:DRP07[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[10] PCIE:DRP07[10] PCIE:BAR1[11] PCIE:DRP07[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[8] PCIE:DRP07[8] PCIE:BAR1[9] PCIE:DRP07[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[6] PCIE:DRP07[6] PCIE:BAR1[7] PCIE:DRP07[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[4] PCIE:DRP07[4] PCIE:BAR1[5] PCIE:DRP07[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[2] PCIE:DRP07[2] PCIE:BAR1[3] PCIE:DRP07[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[0] PCIE:DRP07[0] PCIE:BAR1[1] PCIE:DRP07[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[30] PCIE:DRP06[14] PCIE:BAR0[31] PCIE:DRP06[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[28] PCIE:DRP06[12] PCIE:BAR0[29] PCIE:DRP06[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[26] PCIE:DRP06[10] PCIE:BAR0[27] PCIE:DRP06[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[24] PCIE:DRP06[8] PCIE:BAR0[25] PCIE:DRP06[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[22] PCIE:DRP06[6] PCIE:BAR0[23] PCIE:DRP06[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[20] PCIE:DRP06[4] PCIE:BAR0[21] PCIE:DRP06[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[18] PCIE:DRP06[2] PCIE:BAR0[19] PCIE:DRP06[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[16] PCIE:DRP06[0] PCIE:BAR0[17] PCIE:DRP06[1]
virtex6 PCIE bittile 2
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[14] PCIE:EXPANSION_ROM[14] PCIE:DRP11[15] PCIE:EXPANSION_ROM[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[12] PCIE:EXPANSION_ROM[12] PCIE:DRP11[13] PCIE:EXPANSION_ROM[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[10] PCIE:EXPANSION_ROM[10] PCIE:DRP11[11] PCIE:EXPANSION_ROM[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[8] PCIE:EXPANSION_ROM[8] PCIE:DRP11[9] PCIE:EXPANSION_ROM[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[6] PCIE:EXPANSION_ROM[6] PCIE:DRP11[7] PCIE:EXPANSION_ROM[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[4] PCIE:EXPANSION_ROM[4] PCIE:DRP11[5] PCIE:EXPANSION_ROM[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[2] PCIE:EXPANSION_ROM[2] PCIE:DRP11[3] PCIE:EXPANSION_ROM[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP11[0] PCIE:EXPANSION_ROM[0] PCIE:DRP11[1] PCIE:EXPANSION_ROM[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[30] PCIE:DRP10[14] PCIE:BAR5[31] PCIE:DRP10[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[28] PCIE:DRP10[12] PCIE:BAR5[29] PCIE:DRP10[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[26] PCIE:DRP10[10] PCIE:BAR5[27] PCIE:DRP10[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[24] PCIE:DRP10[8] PCIE:BAR5[25] PCIE:DRP10[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[22] PCIE:DRP10[6] PCIE:BAR5[23] PCIE:DRP10[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[20] PCIE:DRP10[4] PCIE:BAR5[21] PCIE:DRP10[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[18] PCIE:DRP10[2] PCIE:BAR5[19] PCIE:DRP10[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[16] PCIE:DRP10[0] PCIE:BAR5[17] PCIE:DRP10[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[14] PCIE:DRP0F[14] PCIE:BAR5[15] PCIE:DRP0F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[12] PCIE:DRP0F[12] PCIE:BAR5[13] PCIE:DRP0F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[10] PCIE:DRP0F[10] PCIE:BAR5[11] PCIE:DRP0F[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[8] PCIE:DRP0F[8] PCIE:BAR5[9] PCIE:DRP0F[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[6] PCIE:DRP0F[6] PCIE:BAR5[7] PCIE:DRP0F[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[4] PCIE:DRP0F[4] PCIE:BAR5[5] PCIE:DRP0F[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[2] PCIE:DRP0F[2] PCIE:BAR5[3] PCIE:DRP0F[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[0] PCIE:DRP0F[0] PCIE:BAR5[1] PCIE:DRP0F[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[30] PCIE:DRP0E[14] PCIE:BAR4[31] PCIE:DRP0E[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[28] PCIE:DRP0E[12] PCIE:BAR4[29] PCIE:DRP0E[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[26] PCIE:DRP0E[10] PCIE:BAR4[27] PCIE:DRP0E[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[24] PCIE:DRP0E[8] PCIE:BAR4[25] PCIE:DRP0E[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[22] PCIE:DRP0E[6] PCIE:BAR4[23] PCIE:DRP0E[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[20] PCIE:DRP0E[4] PCIE:BAR4[21] PCIE:DRP0E[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[18] PCIE:DRP0E[2] PCIE:BAR4[19] PCIE:DRP0E[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[16] PCIE:DRP0E[0] PCIE:BAR4[17] PCIE:DRP0E[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[14] PCIE:DRP0D[14] PCIE:BAR4[15] PCIE:DRP0D[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[12] PCIE:DRP0D[12] PCIE:BAR4[13] PCIE:DRP0D[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[10] PCIE:DRP0D[10] PCIE:BAR4[11] PCIE:DRP0D[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[8] PCIE:DRP0D[8] PCIE:BAR4[9] PCIE:DRP0D[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[6] PCIE:DRP0D[6] PCIE:BAR4[7] PCIE:DRP0D[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[4] PCIE:DRP0D[4] PCIE:BAR4[5] PCIE:DRP0D[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[2] PCIE:DRP0D[2] PCIE:BAR4[3] PCIE:DRP0D[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[0] PCIE:DRP0D[0] PCIE:BAR4[1] PCIE:DRP0D[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[30] PCIE:DRP0C[14] PCIE:BAR3[31] PCIE:DRP0C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[28] PCIE:DRP0C[12] PCIE:BAR3[29] PCIE:DRP0C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[26] PCIE:DRP0C[10] PCIE:BAR3[27] PCIE:DRP0C[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[24] PCIE:DRP0C[8] PCIE:BAR3[25] PCIE:DRP0C[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[22] PCIE:DRP0C[6] PCIE:BAR3[23] PCIE:DRP0C[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[20] PCIE:DRP0C[4] PCIE:BAR3[21] PCIE:DRP0C[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[18] PCIE:DRP0C[2] PCIE:BAR3[19] PCIE:DRP0C[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[16] PCIE:DRP0C[0] PCIE:BAR3[17] PCIE:DRP0C[1]
virtex6 PCIE bittile 3
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE PCIE:DRP17[14] PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE PCIE:DRP17[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[2] PCIE:DRP17[12] PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[3] PCIE:DRP17[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[0] PCIE:DRP17[10] PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[1] PCIE:DRP17[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CMD_INTX_IMPLEMENTED PCIE:DRP17[8] PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED PCIE:DRP17[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[22] PCIE:DRP17[6] PCIE:CLASS_CODE[23] PCIE:DRP17[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[20] PCIE:DRP17[4] PCIE:CLASS_CODE[21] PCIE:DRP17[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[18] PCIE:DRP17[2] PCIE:CLASS_CODE[19] PCIE:DRP17[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[16] PCIE:DRP17[0] PCIE:CLASS_CODE[17] PCIE:DRP17[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[14] PCIE:DRP16[14] PCIE:CLASS_CODE[15] PCIE:DRP16[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[12] PCIE:DRP16[12] PCIE:CLASS_CODE[13] PCIE:DRP16[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[10] PCIE:DRP16[10] PCIE:CLASS_CODE[11] PCIE:DRP16[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[8] PCIE:DRP16[8] PCIE:CLASS_CODE[9] PCIE:DRP16[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[6] PCIE:DRP16[6] PCIE:CLASS_CODE[7] PCIE:DRP16[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[4] PCIE:DRP16[4] PCIE:CLASS_CODE[5] PCIE:DRP16[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[2] PCIE:DRP16[2] PCIE:CLASS_CODE[3] PCIE:DRP16[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[0] PCIE:DRP16[0] PCIE:CLASS_CODE[1] PCIE:DRP16[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[30] PCIE:DRP15[14] PCIE:CARDBUS_CIS_POINTER[31] PCIE:DRP15[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[28] PCIE:DRP15[12] PCIE:CARDBUS_CIS_POINTER[29] PCIE:DRP15[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[26] PCIE:DRP15[10] PCIE:CARDBUS_CIS_POINTER[27] PCIE:DRP15[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[24] PCIE:DRP15[8] PCIE:CARDBUS_CIS_POINTER[25] PCIE:DRP15[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[22] PCIE:DRP15[6] PCIE:CARDBUS_CIS_POINTER[23] PCIE:DRP15[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[20] PCIE:DRP15[4] PCIE:CARDBUS_CIS_POINTER[21] PCIE:DRP15[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[18] PCIE:DRP15[2] PCIE:CARDBUS_CIS_POINTER[19] PCIE:DRP15[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[16] PCIE:DRP15[0] PCIE:CARDBUS_CIS_POINTER[17] PCIE:DRP15[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[14] PCIE:DRP14[14] PCIE:CARDBUS_CIS_POINTER[15] PCIE:DRP14[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[12] PCIE:DRP14[12] PCIE:CARDBUS_CIS_POINTER[13] PCIE:DRP14[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[10] PCIE:DRP14[10] PCIE:CARDBUS_CIS_POINTER[11] PCIE:DRP14[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[8] PCIE:DRP14[8] PCIE:CARDBUS_CIS_POINTER[9] PCIE:DRP14[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[6] PCIE:DRP14[6] PCIE:CARDBUS_CIS_POINTER[7] PCIE:DRP14[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[4] PCIE:DRP14[4] PCIE:CARDBUS_CIS_POINTER[5] PCIE:DRP14[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[2] PCIE:DRP14[2] PCIE:CARDBUS_CIS_POINTER[3] PCIE:DRP14[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[0] PCIE:DRP14[0] PCIE:CARDBUS_CIS_POINTER[1] PCIE:DRP14[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[14] PCIE:DRP13[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[12] PCIE:DRP13[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[10] PCIE:DRP13[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[8] PCIE:DRP13[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[6] PCIE:DRP13[6] PCIE:CAPABILITIES_PTR[7] PCIE:DRP13[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[4] PCIE:DRP13[4] PCIE:CAPABILITIES_PTR[5] PCIE:DRP13[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[2] PCIE:DRP13[2] PCIE:CAPABILITIES_PTR[3] PCIE:DRP13[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[0] PCIE:DRP13[0] PCIE:CAPABILITIES_PTR[1] PCIE:DRP13[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[14] PCIE:EXPANSION_ROM[30] PCIE:DRP12[15] PCIE:EXPANSION_ROM[31]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[12] PCIE:EXPANSION_ROM[28] PCIE:DRP12[13] PCIE:EXPANSION_ROM[29]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[10] PCIE:EXPANSION_ROM[26] PCIE:DRP12[11] PCIE:EXPANSION_ROM[27]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[8] PCIE:EXPANSION_ROM[24] PCIE:DRP12[9] PCIE:EXPANSION_ROM[25]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[6] PCIE:EXPANSION_ROM[22] PCIE:DRP12[7] PCIE:EXPANSION_ROM[23]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[4] PCIE:EXPANSION_ROM[20] PCIE:DRP12[5] PCIE:EXPANSION_ROM[21]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[2] PCIE:EXPANSION_ROM[18] PCIE:DRP12[3] PCIE:EXPANSION_ROM[19]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP12[0] PCIE:EXPANSION_ROM[16] PCIE:DRP12[1] PCIE:EXPANSION_ROM[17]
virtex6 PCIE bittile 4
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[14] PCIE:DRP1D[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[12] PCIE:DSN_CAP_ON PCIE:DRP1D[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[10] PCIE:DSN_CAP_NEXTPTR[10] PCIE:DRP1D[11] PCIE:DSN_CAP_NEXTPTR[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[8] PCIE:DSN_CAP_NEXTPTR[8] PCIE:DRP1D[9] PCIE:DSN_CAP_NEXTPTR[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[6] PCIE:DSN_CAP_NEXTPTR[6] PCIE:DRP1D[7] PCIE:DSN_CAP_NEXTPTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[4] PCIE:DSN_CAP_NEXTPTR[4] PCIE:DRP1D[5] PCIE:DSN_CAP_NEXTPTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[2] PCIE:DSN_CAP_NEXTPTR[2] PCIE:DRP1D[3] PCIE:DSN_CAP_NEXTPTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[0] PCIE:DSN_CAP_NEXTPTR[0] PCIE:DRP1D[1] PCIE:DSN_CAP_NEXTPTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[14] PCIE:DSN_CAP_ID[14] PCIE:DRP1C[15] PCIE:DSN_CAP_ID[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[12] PCIE:DSN_CAP_ID[12] PCIE:DRP1C[13] PCIE:DSN_CAP_ID[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[10] PCIE:DSN_CAP_ID[10] PCIE:DRP1C[11] PCIE:DSN_CAP_ID[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[8] PCIE:DSN_CAP_ID[8] PCIE:DRP1C[9] PCIE:DSN_CAP_ID[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[6] PCIE:DSN_CAP_ID[6] PCIE:DRP1C[7] PCIE:DSN_CAP_ID[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[4] PCIE:DSN_CAP_ID[4] PCIE:DRP1C[5] PCIE:DSN_CAP_ID[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[2] PCIE:DSN_CAP_ID[2] PCIE:DRP1C[3] PCIE:DSN_CAP_ID[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[0] PCIE:DSN_CAP_ID[0] PCIE:DRP1C[1] PCIE:DSN_CAP_ID[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[14] PCIE:DRP1B[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[12] PCIE:DRP1B[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[10] PCIE:DSN_BASE_PTR[10] PCIE:DRP1B[11] PCIE:DSN_BASE_PTR[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[8] PCIE:DSN_BASE_PTR[8] PCIE:DRP1B[9] PCIE:DSN_BASE_PTR[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[6] PCIE:DSN_BASE_PTR[6] PCIE:DRP1B[7] PCIE:DSN_BASE_PTR[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[4] PCIE:DSN_BASE_PTR[4] PCIE:DRP1B[5] PCIE:DSN_BASE_PTR[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[2] PCIE:DSN_BASE_PTR[2] PCIE:DRP1B[3] PCIE:DSN_BASE_PTR[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[0] PCIE:DSN_BASE_PTR[0] PCIE:DRP1B[1] PCIE:DSN_BASE_PTR[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[14] PCIE:DRP1A[14] PCIE:DEVICE_ID[15] PCIE:DRP1A[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[12] PCIE:DRP1A[12] PCIE:DEVICE_ID[13] PCIE:DRP1A[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[10] PCIE:DRP1A[10] PCIE:DEVICE_ID[11] PCIE:DRP1A[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[8] PCIE:DRP1A[8] PCIE:DEVICE_ID[9] PCIE:DRP1A[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[6] PCIE:DRP1A[6] PCIE:DEVICE_ID[7] PCIE:DRP1A[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[4] PCIE:DRP1A[4] PCIE:DEVICE_ID[5] PCIE:DRP1A[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[2] PCIE:DRP1A[2] PCIE:DEVICE_ID[3] PCIE:DRP1A[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEVICE_ID[0] PCIE:DRP1A[0] PCIE:DEVICE_ID[1] PCIE:DRP1A[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP19[14] PCIE:DRP19[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP19[12] PCIE:DRP19[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP19[10] PCIE:DRP19[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED PCIE:DRP19[8] PCIE:DRP19[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_31_29[1] PCIE:DRP19[6] PCIE:DEV_CAP_RSVD_31_29[2] PCIE:DRP19[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_17_16[1] PCIE:DRP19[4] PCIE:DEV_CAP_RSVD_31_29[0] PCIE:DRP19[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_14_12[2] PCIE:DRP19[2] PCIE:DEV_CAP_RSVD_17_16[0] PCIE:DRP19[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_14_12[0] PCIE:DRP19[0] PCIE:DEV_CAP_RSVD_14_12[1] PCIE:DRP19[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP18[14] PCIE:DRP18[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT[1] PCIE:DRP18[12] PCIE:DEV_CAP_ROLE_BASED_ERROR PCIE:DRP18[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[2] PCIE:DRP18[10] PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT[0] PCIE:DRP18[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[0] PCIE:DRP18[8] PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[1] PCIE:DRP18[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_EXT_TAG_SUPPORTED PCIE:DRP18[6] PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE PCIE:DRP18[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[1] PCIE:DRP18[4] PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[2] PCIE:DRP18[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[2] PCIE:DRP18[2] PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[0] PCIE:DRP18[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[0] PCIE:DRP18[0] PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[1] PCIE:DRP18[1]
virtex6 PCIE bittile 5
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[14] PCIE:LINK_CAP_RSVD_23_22[0] PCIE:DRP23[15] PCIE:LINK_CAP_RSVD_23_22[1]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[12] PCIE:LINK_CAP_MAX_LINK_SPEED[2] PCIE:DRP23[13] PCIE:LINK_CAP_MAX_LINK_SPEED[3]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[10] PCIE:LINK_CAP_MAX_LINK_SPEED[0] PCIE:DRP23[11] PCIE:LINK_CAP_MAX_LINK_SPEED[1]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[8] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[2] PCIE:DRP23[9] PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[6] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[0] PCIE:DRP23[7] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[1]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[4] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[1] PCIE:DRP23[5] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[2] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[2] PCIE:DRP23[3] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[0]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[0] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[0] PCIE:DRP23[1] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[14] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[2] PCIE:DRP22[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[12] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[0] PCIE:DRP22[13] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[1]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[10] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[1] PCIE:DRP22[11] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[2]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[8] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[2] PCIE:DRP22[9] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[0]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[6] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[0] PCIE:DRP22[7] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[1]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[4] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[1] PCIE:DRP22[5] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[2]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[2] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[2] PCIE:DRP22[3] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[0]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[0] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[0] PCIE:DRP22[1] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[14] PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP PCIE:DRP21[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[12] PCIE:LINK_CAP_ASPM_SUPPORT[1] PCIE:DRP21[13] PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[10] PCIE:LAST_CONFIG_DWORD[9] PCIE:DRP21[11] PCIE:LINK_CAP_ASPM_SUPPORT[0]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[8] PCIE:LAST_CONFIG_DWORD[7] PCIE:DRP21[9] PCIE:LAST_CONFIG_DWORD[8]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[6] PCIE:LAST_CONFIG_DWORD[5] PCIE:DRP21[7] PCIE:LAST_CONFIG_DWORD[6]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[4] PCIE:LAST_CONFIG_DWORD[3] PCIE:DRP21[5] PCIE:LAST_CONFIG_DWORD[4]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[2] PCIE:LAST_CONFIG_DWORD[1] PCIE:DRP21[3] PCIE:LAST_CONFIG_DWORD[2]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[0] PCIE:IS_SWITCH PCIE:DRP21[1] PCIE:LAST_CONFIG_DWORD[0]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[14] PCIE:INTERRUPT_PIN[6] PCIE:DRP20[15] PCIE:INTERRUPT_PIN[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[12] PCIE:INTERRUPT_PIN[4] PCIE:DRP20[13] PCIE:INTERRUPT_PIN[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[10] PCIE:INTERRUPT_PIN[2] PCIE:DRP20[11] PCIE:INTERRUPT_PIN[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[8] PCIE:INTERRUPT_PIN[0] PCIE:DRP20[9] PCIE:INTERRUPT_PIN[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[6] PCIE:HEADER_TYPE[6] PCIE:DRP20[7] PCIE:HEADER_TYPE[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[4] PCIE:HEADER_TYPE[4] PCIE:DRP20[5] PCIE:HEADER_TYPE[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[2] PCIE:HEADER_TYPE[2] PCIE:DRP20[3] PCIE:HEADER_TYPE[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[0] PCIE:HEADER_TYPE[0] PCIE:DRP20[1] PCIE:HEADER_TYPE[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[14] PCIE:DRP1F[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[12] PCIE:DRP1F[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[10] PCIE:DRP1F[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[8] PCIE:EXT_CFG_XP_CAP_PTR[8] PCIE:DRP1F[9] PCIE:EXT_CFG_XP_CAP_PTR[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[6] PCIE:EXT_CFG_XP_CAP_PTR[6] PCIE:DRP1F[7] PCIE:EXT_CFG_XP_CAP_PTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[4] PCIE:EXT_CFG_XP_CAP_PTR[4] PCIE:DRP1F[5] PCIE:EXT_CFG_XP_CAP_PTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[2] PCIE:EXT_CFG_XP_CAP_PTR[2] PCIE:DRP1F[3] PCIE:EXT_CFG_XP_CAP_PTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[0] PCIE:EXT_CFG_XP_CAP_PTR[0] PCIE:DRP1F[1] PCIE:EXT_CFG_XP_CAP_PTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[14] PCIE:DRP1E[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[12] PCIE:DRP1E[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[10] PCIE:DRP1E[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[8] PCIE:EXT_CFG_CAP_PTR[4] PCIE:DRP1E[9] PCIE:EXT_CFG_CAP_PTR[5]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[6] PCIE:EXT_CFG_CAP_PTR[2] PCIE:DRP1E[7] PCIE:EXT_CFG_CAP_PTR[3]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[4] PCIE:EXT_CFG_CAP_PTR[0] PCIE:DRP1E[5] PCIE:EXT_CFG_CAP_PTR[1]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[2] PCIE:DSN_CAP_VERSION[2] PCIE:DRP1E[3] PCIE:DSN_CAP_VERSION[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[0] PCIE:DSN_CAP_VERSION[0] PCIE:DRP1E[1] PCIE:DSN_CAP_VERSION[1]
virtex6 PCIE bittile 6
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[14] PCIE:DRP29[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[12] PCIE:DRP29[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[10] PCIE:MSIX_CAP_PBA_BIR[1] PCIE:DRP29[11] PCIE:MSIX_CAP_PBA_BIR[2]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[8] PCIE:MSIX_CAP_ON PCIE:DRP29[9] PCIE:MSIX_CAP_PBA_BIR[0]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[6] PCIE:MSIX_CAP_NEXTPTR[6] PCIE:DRP29[7] PCIE:MSIX_CAP_NEXTPTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[4] PCIE:MSIX_CAP_NEXTPTR[4] PCIE:DRP29[5] PCIE:MSIX_CAP_NEXTPTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[2] PCIE:MSIX_CAP_NEXTPTR[2] PCIE:DRP29[3] PCIE:MSIX_CAP_NEXTPTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[0] PCIE:MSIX_CAP_NEXTPTR[0] PCIE:DRP29[1] PCIE:MSIX_CAP_NEXTPTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[14] PCIE:MSIX_CAP_ID[6] PCIE:DRP28[15] PCIE:MSIX_CAP_ID[7]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[12] PCIE:MSIX_CAP_ID[4] PCIE:DRP28[13] PCIE:MSIX_CAP_ID[5]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[10] PCIE:MSIX_CAP_ID[2] PCIE:DRP28[11] PCIE:MSIX_CAP_ID[3]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[8] PCIE:MSIX_CAP_ID[0] PCIE:DRP28[9] PCIE:MSIX_CAP_ID[1]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[6] PCIE:MSIX_BASE_PTR[6] PCIE:DRP28[7] PCIE:MSIX_BASE_PTR[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[4] PCIE:MSIX_BASE_PTR[4] PCIE:DRP28[5] PCIE:MSIX_BASE_PTR[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[2] PCIE:MSIX_BASE_PTR[2] PCIE:DRP28[3] PCIE:MSIX_BASE_PTR[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[0] PCIE:MSIX_BASE_PTR[0] PCIE:DRP28[1] PCIE:MSIX_BASE_PTR[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[14] PCIE:DRP27[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[12] PCIE:DRP27[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[10] PCIE:DRP27[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[8] PCIE:MSI_CAP_ON PCIE:DRP27[9] PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[6] PCIE:MSI_CAP_NEXTPTR[6] PCIE:DRP27[7] PCIE:MSI_CAP_NEXTPTR[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[4] PCIE:MSI_CAP_NEXTPTR[4] PCIE:DRP27[5] PCIE:MSI_CAP_NEXTPTR[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[2] PCIE:MSI_CAP_NEXTPTR[2] PCIE:DRP27[3] PCIE:MSI_CAP_NEXTPTR[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[0] PCIE:MSI_CAP_NEXTPTR[0] PCIE:DRP27[1] PCIE:MSI_CAP_NEXTPTR[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[14] PCIE:DRP26[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[12] PCIE:DRP26[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[10] PCIE:MSI_CAP_MULTIMSGCAP[1] PCIE:DRP26[11] PCIE:MSI_CAP_MULTIMSGCAP[2]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[8] PCIE:MSI_CAP_MULTIMSG_EXTENSION PCIE:DRP26[9] PCIE:MSI_CAP_MULTIMSGCAP[0]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[6] PCIE:MSI_CAP_ID[6] PCIE:DRP26[7] PCIE:MSI_CAP_ID[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[4] PCIE:MSI_CAP_ID[4] PCIE:DRP26[5] PCIE:MSI_CAP_ID[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[2] PCIE:MSI_CAP_ID[2] PCIE:DRP26[3] PCIE:MSI_CAP_ID[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[0] PCIE:MSI_CAP_ID[0] PCIE:DRP26[1] PCIE:MSI_CAP_ID[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[14] PCIE:DRP25[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[12] PCIE:DRP25[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[10] PCIE:DRP25[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[8] PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE PCIE:DRP25[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[6] PCIE:MSI_BASE_PTR[6] PCIE:DRP25[7] PCIE:MSI_BASE_PTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[4] PCIE:MSI_BASE_PTR[4] PCIE:DRP25[5] PCIE:MSI_BASE_PTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[2] PCIE:MSI_BASE_PTR[2] PCIE:DRP25[3] PCIE:MSI_BASE_PTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[0] PCIE:MSI_BASE_PTR[0] PCIE:DRP25[1] PCIE:MSI_BASE_PTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[14] PCIE:DRP24[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[12] PCIE:DRP24[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[10] PCIE:DRP24[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[8] PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG PCIE:DRP24[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[6] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[2] PCIE:DRP24[7] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[3]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[4] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[0] PCIE:DRP24[5] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[1]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[2] PCIE:LINK_CTRL2_DEEMPHASIS PCIE:DRP24[3] PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[0] PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE PCIE:DRP24[1] PCIE:LINK_CONTROL_RCB
virtex6 PCIE bittile 7
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[14] PCIE:PCIE_CAP_CAPABILITY_ID[6] PCIE:DRP2F[15] PCIE:PCIE_CAP_CAPABILITY_ID[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[12] PCIE:PCIE_CAP_CAPABILITY_ID[4] PCIE:DRP2F[13] PCIE:PCIE_CAP_CAPABILITY_ID[5]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[10] PCIE:PCIE_CAP_CAPABILITY_ID[2] PCIE:DRP2F[11] PCIE:PCIE_CAP_CAPABILITY_ID[3]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[8] PCIE:PCIE_CAP_CAPABILITY_ID[0] PCIE:DRP2F[9] PCIE:PCIE_CAP_CAPABILITY_ID[1]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[6] PCIE:PCIE_BASE_PTR[6] PCIE:DRP2F[7] PCIE:PCIE_BASE_PTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[4] PCIE:PCIE_BASE_PTR[4] PCIE:DRP2F[5] PCIE:PCIE_BASE_PTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[2] PCIE:PCIE_BASE_PTR[2] PCIE:DRP2F[3] PCIE:PCIE_BASE_PTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[0] PCIE:PCIE_BASE_PTR[0] PCIE:DRP2F[1] PCIE:PCIE_BASE_PTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[14] PCIE:DRP2E[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[12] PCIE:DRP2E[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[10] PCIE:MSIX_CAP_TABLE_SIZE[10] PCIE:DRP2E[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[8] PCIE:MSIX_CAP_TABLE_SIZE[8] PCIE:DRP2E[9] PCIE:MSIX_CAP_TABLE_SIZE[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[6] PCIE:MSIX_CAP_TABLE_SIZE[6] PCIE:DRP2E[7] PCIE:MSIX_CAP_TABLE_SIZE[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[4] PCIE:MSIX_CAP_TABLE_SIZE[4] PCIE:DRP2E[5] PCIE:MSIX_CAP_TABLE_SIZE[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[2] PCIE:MSIX_CAP_TABLE_SIZE[2] PCIE:DRP2E[3] PCIE:MSIX_CAP_TABLE_SIZE[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[0] PCIE:MSIX_CAP_TABLE_SIZE[0] PCIE:DRP2E[1] PCIE:MSIX_CAP_TABLE_SIZE[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[14] PCIE:DRP2D[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[12] PCIE:MSIX_CAP_TABLE_OFFSET[28] PCIE:DRP2D[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[10] PCIE:MSIX_CAP_TABLE_OFFSET[26] PCIE:DRP2D[11] PCIE:MSIX_CAP_TABLE_OFFSET[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[8] PCIE:MSIX_CAP_TABLE_OFFSET[24] PCIE:DRP2D[9] PCIE:MSIX_CAP_TABLE_OFFSET[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[6] PCIE:MSIX_CAP_TABLE_OFFSET[22] PCIE:DRP2D[7] PCIE:MSIX_CAP_TABLE_OFFSET[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[4] PCIE:MSIX_CAP_TABLE_OFFSET[20] PCIE:DRP2D[5] PCIE:MSIX_CAP_TABLE_OFFSET[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[2] PCIE:MSIX_CAP_TABLE_OFFSET[18] PCIE:DRP2D[3] PCIE:MSIX_CAP_TABLE_OFFSET[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[0] PCIE:MSIX_CAP_TABLE_OFFSET[16] PCIE:DRP2D[1] PCIE:MSIX_CAP_TABLE_OFFSET[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[14] PCIE:MSIX_CAP_TABLE_OFFSET[14] PCIE:DRP2C[15] PCIE:MSIX_CAP_TABLE_OFFSET[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[12] PCIE:MSIX_CAP_TABLE_OFFSET[12] PCIE:DRP2C[13] PCIE:MSIX_CAP_TABLE_OFFSET[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[10] PCIE:MSIX_CAP_TABLE_OFFSET[10] PCIE:DRP2C[11] PCIE:MSIX_CAP_TABLE_OFFSET[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[8] PCIE:MSIX_CAP_TABLE_OFFSET[8] PCIE:DRP2C[9] PCIE:MSIX_CAP_TABLE_OFFSET[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[6] PCIE:MSIX_CAP_TABLE_OFFSET[6] PCIE:DRP2C[7] PCIE:MSIX_CAP_TABLE_OFFSET[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[4] PCIE:MSIX_CAP_TABLE_OFFSET[4] PCIE:DRP2C[5] PCIE:MSIX_CAP_TABLE_OFFSET[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[2] PCIE:MSIX_CAP_TABLE_OFFSET[2] PCIE:DRP2C[3] PCIE:MSIX_CAP_TABLE_OFFSET[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[0] PCIE:MSIX_CAP_TABLE_OFFSET[0] PCIE:DRP2C[1] PCIE:MSIX_CAP_TABLE_OFFSET[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[14] PCIE:MSIX_CAP_TABLE_BIR[1] PCIE:DRP2B[15] PCIE:MSIX_CAP_TABLE_BIR[2]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[12] PCIE:MSIX_CAP_PBA_OFFSET[28] PCIE:DRP2B[13] PCIE:MSIX_CAP_TABLE_BIR[0]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[10] PCIE:MSIX_CAP_PBA_OFFSET[26] PCIE:DRP2B[11] PCIE:MSIX_CAP_PBA_OFFSET[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[8] PCIE:MSIX_CAP_PBA_OFFSET[24] PCIE:DRP2B[9] PCIE:MSIX_CAP_PBA_OFFSET[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[6] PCIE:MSIX_CAP_PBA_OFFSET[22] PCIE:DRP2B[7] PCIE:MSIX_CAP_PBA_OFFSET[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[4] PCIE:MSIX_CAP_PBA_OFFSET[20] PCIE:DRP2B[5] PCIE:MSIX_CAP_PBA_OFFSET[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[2] PCIE:MSIX_CAP_PBA_OFFSET[18] PCIE:DRP2B[3] PCIE:MSIX_CAP_PBA_OFFSET[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[0] PCIE:MSIX_CAP_PBA_OFFSET[16] PCIE:DRP2B[1] PCIE:MSIX_CAP_PBA_OFFSET[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[14] PCIE:MSIX_CAP_PBA_OFFSET[14] PCIE:DRP2A[15] PCIE:MSIX_CAP_PBA_OFFSET[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[12] PCIE:MSIX_CAP_PBA_OFFSET[12] PCIE:DRP2A[13] PCIE:MSIX_CAP_PBA_OFFSET[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[10] PCIE:MSIX_CAP_PBA_OFFSET[10] PCIE:DRP2A[11] PCIE:MSIX_CAP_PBA_OFFSET[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[8] PCIE:MSIX_CAP_PBA_OFFSET[8] PCIE:DRP2A[9] PCIE:MSIX_CAP_PBA_OFFSET[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[6] PCIE:MSIX_CAP_PBA_OFFSET[6] PCIE:DRP2A[7] PCIE:MSIX_CAP_PBA_OFFSET[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[4] PCIE:MSIX_CAP_PBA_OFFSET[4] PCIE:DRP2A[5] PCIE:MSIX_CAP_PBA_OFFSET[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[2] PCIE:MSIX_CAP_PBA_OFFSET[2] PCIE:DRP2A[3] PCIE:MSIX_CAP_PBA_OFFSET[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[0] PCIE:MSIX_CAP_PBA_OFFSET[0] PCIE:DRP2A[1] PCIE:MSIX_CAP_PBA_OFFSET[1]
virtex6 PCIE bittile 8
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[14] PCIE:DRP35[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[12] PCIE:PM_DATA_SCALE7[0] PCIE:DRP35[13] PCIE:PM_DATA_SCALE7[1]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[10] PCIE:PM_DATA_SCALE6[0] PCIE:DRP35[11] PCIE:PM_DATA_SCALE6[1]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[8] PCIE:PM_DATA_SCALE5[0] PCIE:DRP35[9] PCIE:PM_DATA_SCALE5[1]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[6] PCIE:PM_DATA_SCALE4[0] PCIE:DRP35[7] PCIE:PM_DATA_SCALE4[1]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[4] PCIE:PM_DATA_SCALE3[0] PCIE:DRP35[5] PCIE:PM_DATA_SCALE3[1]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[2] PCIE:PM_DATA_SCALE2[0] PCIE:DRP35[3] PCIE:PM_DATA_SCALE2[1]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[0] PCIE:PM_DATA_SCALE1[0] PCIE:DRP35[1] PCIE:PM_DATA_SCALE1[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[14] PCIE:PM_DATA_SCALE0[0] PCIE:DRP34[15] PCIE:PM_DATA_SCALE0[1]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[12] PCIE:PM_CSR_BPCCEN PCIE:DRP34[13] PCIE:PM_CSR_NOSOFTRST
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[10] PCIE:PM_CAP_VERSION[2] PCIE:DRP34[11] PCIE:PM_CSR_B2B3
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[8] PCIE:PM_CAP_VERSION[0] PCIE:DRP34[9] PCIE:PM_CAP_VERSION[1]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[6] PCIE:PM_CAP_PMESUPPORT[4] PCIE:DRP34[7] PCIE:PM_CAP_RSVD_04
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[4] PCIE:PM_CAP_PMESUPPORT[2] PCIE:DRP34[5] PCIE:PM_CAP_PMESUPPORT[3]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[2] PCIE:PM_CAP_PMESUPPORT[0] PCIE:DRP34[3] PCIE:PM_CAP_PMESUPPORT[1]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[0] PCIE:PM_CAP_ON PCIE:DRP34[1] PCIE:PM_CAP_PME_CLOCK
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[14] PCIE:PM_CAP_NEXTPTR[6] PCIE:DRP33[15] PCIE:PM_CAP_NEXTPTR[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[12] PCIE:PM_CAP_NEXTPTR[4] PCIE:DRP33[13] PCIE:PM_CAP_NEXTPTR[5]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[10] PCIE:PM_CAP_NEXTPTR[2] PCIE:DRP33[11] PCIE:PM_CAP_NEXTPTR[3]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[8] PCIE:PM_CAP_NEXTPTR[0] PCIE:DRP33[9] PCIE:PM_CAP_NEXTPTR[1]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[6] PCIE:PM_CAP_ID[6] PCIE:DRP33[7] PCIE:PM_CAP_ID[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[4] PCIE:PM_CAP_ID[4] PCIE:DRP33[5] PCIE:PM_CAP_ID[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[2] PCIE:PM_CAP_ID[2] PCIE:DRP33[3] PCIE:PM_CAP_ID[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[0] PCIE:PM_CAP_ID[0] PCIE:DRP33[1] PCIE:PM_CAP_ID[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[14] PCIE:DRP32[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[12] PCIE:PM_CAP_D2SUPPORT PCIE:DRP32[13] PCIE:PM_CAP_DSI
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[10] PCIE:PM_CAP_AUXCURRENT[2] PCIE:DRP32[11] PCIE:PM_CAP_D1SUPPORT
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[8] PCIE:PM_CAP_AUXCURRENT[0] PCIE:DRP32[9] PCIE:PM_CAP_AUXCURRENT[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[6] PCIE:PM_BASE_PTR[6] PCIE:DRP32[7] PCIE:PM_BASE_PTR[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[4] PCIE:PM_BASE_PTR[4] PCIE:DRP32[5] PCIE:PM_BASE_PTR[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[2] PCIE:PM_BASE_PTR[2] PCIE:DRP32[3] PCIE:PM_BASE_PTR[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[0] PCIE:PM_BASE_PTR[0] PCIE:DRP32[1] PCIE:PM_BASE_PTR[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[14] PCIE:PCIE_REVISION[2] PCIE:DRP31[15] PCIE:PCIE_REVISION[3]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[12] PCIE:PCIE_REVISION[0] PCIE:DRP31[13] PCIE:PCIE_REVISION[1]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[10] PCIE:PCIE_CAP_RSVD_15_14[1] PCIE:DRP31[11] PCIE:PCIE_CAP_SLOT_IMPLEMENTED
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[8] PCIE:PCIE_CAP_ON PCIE:DRP31[9] PCIE:PCIE_CAP_RSVD_15_14[0]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[6] PCIE:PCIE_CAP_NEXTPTR[6] PCIE:DRP31[7] PCIE:PCIE_CAP_NEXTPTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[4] PCIE:PCIE_CAP_NEXTPTR[4] PCIE:DRP31[5] PCIE:PCIE_CAP_NEXTPTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[2] PCIE:PCIE_CAP_NEXTPTR[2] PCIE:DRP31[3] PCIE:PCIE_CAP_NEXTPTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[0] PCIE:PCIE_CAP_NEXTPTR[0] PCIE:DRP31[1] PCIE:PCIE_CAP_NEXTPTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[14] PCIE:DRP30[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[12] PCIE:PCIE_CAP_INT_MSG_NUM[4] PCIE:DRP30[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[10] PCIE:PCIE_CAP_INT_MSG_NUM[2] PCIE:DRP30[11] PCIE:PCIE_CAP_INT_MSG_NUM[3]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[8] PCIE:PCIE_CAP_INT_MSG_NUM[0] PCIE:DRP30[9] PCIE:PCIE_CAP_INT_MSG_NUM[1]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[6] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[2] PCIE:DRP30[7] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[3]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[4] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[0] PCIE:DRP30[5] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[1]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[2] PCIE:PCIE_CAP_CAPABILITY_VERSION[2] PCIE:DRP30[3] PCIE:PCIE_CAP_CAPABILITY_VERSION[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[0] PCIE:PCIE_CAP_CAPABILITY_VERSION[0] PCIE:DRP30[1] PCIE:PCIE_CAP_CAPABILITY_VERSION[1]
virtex6 PCIE bittile 9
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[14] PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT PCIE:DRP3B[15] PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[12] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[11] PCIE:DRP3B[13] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[12]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[10] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[9] PCIE:DRP3B[11] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[10]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[8] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[7] PCIE:DRP3B[9] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[8]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[6] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[5] PCIE:DRP3B[7] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[6]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[4] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[3] PCIE:DRP3B[5] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[4]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[2] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[1] PCIE:DRP3B[3] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[2]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[0] PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT PCIE:DRP3B[1] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[0]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[14] PCIE:SLOT_CAP_HOTPLUG_SURPRISE PCIE:DRP3A[15] PCIE:SLOT_CAP_MRL_SENSOR_PRESENT
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[12] PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT PCIE:DRP3A[13] PCIE:SLOT_CAP_HOTPLUG_CAPABLE
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[10] PCIE:SLOT_CAP_ATT_BUTTON_PRESENT PCIE:DRP3A[11] PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[8] PCIE:ROOT_CAP_CRS_SW_VISIBILITY PCIE:DRP3A[9] PCIE:SELECT_DLL_IF
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[6] PCIE:REVISION_ID[6] PCIE:DRP3A[7] PCIE:REVISION_ID[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[4] PCIE:REVISION_ID[4] PCIE:DRP3A[5] PCIE:REVISION_ID[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[2] PCIE:REVISION_ID[2] PCIE:DRP3A[3] PCIE:REVISION_ID[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[0] PCIE:REVISION_ID[0] PCIE:DRP3A[1] PCIE:REVISION_ID[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[14] PCIE:PM_DATA7[6] PCIE:DRP39[15] PCIE:PM_DATA7[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[12] PCIE:PM_DATA7[4] PCIE:DRP39[13] PCIE:PM_DATA7[5]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[10] PCIE:PM_DATA7[2] PCIE:DRP39[11] PCIE:PM_DATA7[3]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[8] PCIE:PM_DATA7[0] PCIE:DRP39[9] PCIE:PM_DATA7[1]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[6] PCIE:PM_DATA6[6] PCIE:DRP39[7] PCIE:PM_DATA6[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[4] PCIE:PM_DATA6[4] PCIE:DRP39[5] PCIE:PM_DATA6[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[2] PCIE:PM_DATA6[2] PCIE:DRP39[3] PCIE:PM_DATA6[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[0] PCIE:PM_DATA6[0] PCIE:DRP39[1] PCIE:PM_DATA6[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[14] PCIE:PM_DATA5[6] PCIE:DRP38[15] PCIE:PM_DATA5[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[12] PCIE:PM_DATA5[4] PCIE:DRP38[13] PCIE:PM_DATA5[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[10] PCIE:PM_DATA5[2] PCIE:DRP38[11] PCIE:PM_DATA5[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[8] PCIE:PM_DATA5[0] PCIE:DRP38[9] PCIE:PM_DATA5[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[6] PCIE:PM_DATA4[6] PCIE:DRP38[7] PCIE:PM_DATA4[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[4] PCIE:PM_DATA4[4] PCIE:DRP38[5] PCIE:PM_DATA4[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[2] PCIE:PM_DATA4[2] PCIE:DRP38[3] PCIE:PM_DATA4[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[0] PCIE:PM_DATA4[0] PCIE:DRP38[1] PCIE:PM_DATA4[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[14] PCIE:PM_DATA3[6] PCIE:DRP37[15] PCIE:PM_DATA3[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[12] PCIE:PM_DATA3[4] PCIE:DRP37[13] PCIE:PM_DATA3[5]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[10] PCIE:PM_DATA3[2] PCIE:DRP37[11] PCIE:PM_DATA3[3]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[8] PCIE:PM_DATA3[0] PCIE:DRP37[9] PCIE:PM_DATA3[1]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[6] PCIE:PM_DATA2[6] PCIE:DRP37[7] PCIE:PM_DATA2[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[4] PCIE:PM_DATA2[4] PCIE:DRP37[5] PCIE:PM_DATA2[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[2] PCIE:PM_DATA2[2] PCIE:DRP37[3] PCIE:PM_DATA2[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[0] PCIE:PM_DATA2[0] PCIE:DRP37[1] PCIE:PM_DATA2[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[14] PCIE:PM_DATA1[6] PCIE:DRP36[15] PCIE:PM_DATA1[7]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[12] PCIE:PM_DATA1[4] PCIE:DRP36[13] PCIE:PM_DATA1[5]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[10] PCIE:PM_DATA1[2] PCIE:DRP36[11] PCIE:PM_DATA1[3]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[8] PCIE:PM_DATA1[0] PCIE:DRP36[9] PCIE:PM_DATA1[1]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[6] PCIE:PM_DATA0[6] PCIE:DRP36[7] PCIE:PM_DATA0[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[4] PCIE:PM_DATA0[4] PCIE:DRP36[5] PCIE:PM_DATA0[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[2] PCIE:PM_DATA0[2] PCIE:DRP36[3] PCIE:PM_DATA0[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[0] PCIE:PM_DATA0[0] PCIE:DRP36[1] PCIE:PM_DATA0[1]
virtex6 PCIE bittile 10
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[14] PCIE:VC_CAP_ID[14] PCIE:DRP41[15] PCIE:VC_CAP_ID[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[12] PCIE:VC_CAP_ID[12] PCIE:DRP41[13] PCIE:VC_CAP_ID[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[10] PCIE:VC_CAP_ID[10] PCIE:DRP41[11] PCIE:VC_CAP_ID[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[8] PCIE:VC_CAP_ID[8] PCIE:DRP41[9] PCIE:VC_CAP_ID[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[6] PCIE:VC_CAP_ID[6] PCIE:DRP41[7] PCIE:VC_CAP_ID[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[4] PCIE:VC_CAP_ID[4] PCIE:DRP41[5] PCIE:VC_CAP_ID[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[2] PCIE:VC_CAP_ID[2] PCIE:DRP41[3] PCIE:VC_CAP_ID[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[0] PCIE:VC_CAP_ID[0] PCIE:DRP41[1] PCIE:VC_CAP_ID[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[14] PCIE:DRP40[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[12] PCIE:VC_CAP_ON PCIE:DRP40[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[10] PCIE:VC_CAP_NEXTPTR[10] PCIE:DRP40[11] PCIE:VC_CAP_NEXTPTR[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[8] PCIE:VC_CAP_NEXTPTR[8] PCIE:DRP40[9] PCIE:VC_CAP_NEXTPTR[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[6] PCIE:VC_CAP_NEXTPTR[6] PCIE:DRP40[7] PCIE:VC_CAP_NEXTPTR[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[4] PCIE:VC_CAP_NEXTPTR[4] PCIE:DRP40[5] PCIE:VC_CAP_NEXTPTR[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[2] PCIE:VC_CAP_NEXTPTR[2] PCIE:DRP40[3] PCIE:VC_CAP_NEXTPTR[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[0] PCIE:VC_CAP_NEXTPTR[0] PCIE:DRP40[1] PCIE:VC_CAP_NEXTPTR[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[14] PCIE:DRP3F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[12] PCIE:DRP3F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[10] PCIE:VC_BASE_PTR[10] PCIE:DRP3F[11] PCIE:VC_BASE_PTR[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[8] PCIE:VC_BASE_PTR[8] PCIE:DRP3F[9] PCIE:VC_BASE_PTR[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[6] PCIE:VC_BASE_PTR[6] PCIE:DRP3F[7] PCIE:VC_BASE_PTR[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[4] PCIE:VC_BASE_PTR[4] PCIE:DRP3F[5] PCIE:VC_BASE_PTR[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[2] PCIE:VC_BASE_PTR[2] PCIE:DRP3F[3] PCIE:VC_BASE_PTR[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[0] PCIE:VC_BASE_PTR[0] PCIE:DRP3F[1] PCIE:VC_BASE_PTR[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[14] PCIE:SUBSYSTEM_VENDOR_ID[14] PCIE:DRP3E[15] PCIE:SUBSYSTEM_VENDOR_ID[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[12] PCIE:SUBSYSTEM_VENDOR_ID[12] PCIE:DRP3E[13] PCIE:SUBSYSTEM_VENDOR_ID[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[10] PCIE:SUBSYSTEM_VENDOR_ID[10] PCIE:DRP3E[11] PCIE:SUBSYSTEM_VENDOR_ID[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[8] PCIE:SUBSYSTEM_VENDOR_ID[8] PCIE:DRP3E[9] PCIE:SUBSYSTEM_VENDOR_ID[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[6] PCIE:SUBSYSTEM_VENDOR_ID[6] PCIE:DRP3E[7] PCIE:SUBSYSTEM_VENDOR_ID[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[4] PCIE:SUBSYSTEM_VENDOR_ID[4] PCIE:DRP3E[5] PCIE:SUBSYSTEM_VENDOR_ID[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[2] PCIE:SUBSYSTEM_VENDOR_ID[2] PCIE:DRP3E[3] PCIE:SUBSYSTEM_VENDOR_ID[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[0] PCIE:SUBSYSTEM_VENDOR_ID[0] PCIE:DRP3E[1] PCIE:SUBSYSTEM_VENDOR_ID[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[14] PCIE:SUBSYSTEM_ID[14] PCIE:DRP3D[15] PCIE:SUBSYSTEM_ID[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[12] PCIE:SUBSYSTEM_ID[12] PCIE:DRP3D[13] PCIE:SUBSYSTEM_ID[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[10] PCIE:SUBSYSTEM_ID[10] PCIE:DRP3D[11] PCIE:SUBSYSTEM_ID[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[8] PCIE:SUBSYSTEM_ID[8] PCIE:DRP3D[9] PCIE:SUBSYSTEM_ID[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[6] PCIE:SUBSYSTEM_ID[6] PCIE:DRP3D[7] PCIE:SUBSYSTEM_ID[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[4] PCIE:SUBSYSTEM_ID[4] PCIE:DRP3D[5] PCIE:SUBSYSTEM_ID[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[2] PCIE:SUBSYSTEM_ID[2] PCIE:DRP3D[3] PCIE:SUBSYSTEM_ID[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[0] PCIE:SUBSYSTEM_ID[0] PCIE:DRP3D[1] PCIE:SUBSYSTEM_ID[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[14] PCIE:DRP3C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[12] PCIE:DRP3C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[10] PCIE:DRP3C[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[8] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[6] PCIE:DRP3C[9] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[7]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[6] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[4] PCIE:DRP3C[7] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[5]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[4] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[2] PCIE:DRP3C[5] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[3]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[2] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[0] PCIE:DRP3C[3] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[1]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[0] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE[0] PCIE:DRP3C[1] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE[1]
virtex6 PCIE bittile 11
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[14] PCIE:VSEC_CAP_ID[14] PCIE:DRP47[15] PCIE:VSEC_CAP_ID[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[12] PCIE:VSEC_CAP_ID[12] PCIE:DRP47[13] PCIE:VSEC_CAP_ID[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[10] PCIE:VSEC_CAP_ID[10] PCIE:DRP47[11] PCIE:VSEC_CAP_ID[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[8] PCIE:VSEC_CAP_ID[8] PCIE:DRP47[9] PCIE:VSEC_CAP_ID[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[6] PCIE:VSEC_CAP_ID[6] PCIE:DRP47[7] PCIE:VSEC_CAP_ID[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[4] PCIE:VSEC_CAP_ID[4] PCIE:DRP47[5] PCIE:VSEC_CAP_ID[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[2] PCIE:VSEC_CAP_ID[2] PCIE:DRP47[3] PCIE:VSEC_CAP_ID[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[0] PCIE:VSEC_CAP_ID[0] PCIE:DRP47[1] PCIE:VSEC_CAP_ID[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[14] PCIE:VSEC_CAP_HDR_REVISION[2] PCIE:DRP46[15] PCIE:VSEC_CAP_HDR_REVISION[3]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[12] PCIE:VSEC_CAP_HDR_REVISION[0] PCIE:DRP46[13] PCIE:VSEC_CAP_HDR_REVISION[1]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[10] PCIE:VSEC_CAP_HDR_LENGTH[10] PCIE:DRP46[11] PCIE:VSEC_CAP_HDR_LENGTH[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[8] PCIE:VSEC_CAP_HDR_LENGTH[8] PCIE:DRP46[9] PCIE:VSEC_CAP_HDR_LENGTH[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[6] PCIE:VSEC_CAP_HDR_LENGTH[6] PCIE:DRP46[7] PCIE:VSEC_CAP_HDR_LENGTH[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[4] PCIE:VSEC_CAP_HDR_LENGTH[4] PCIE:DRP46[5] PCIE:VSEC_CAP_HDR_LENGTH[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[2] PCIE:VSEC_CAP_HDR_LENGTH[2] PCIE:DRP46[3] PCIE:VSEC_CAP_HDR_LENGTH[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[0] PCIE:VSEC_CAP_HDR_LENGTH[0] PCIE:DRP46[1] PCIE:VSEC_CAP_HDR_LENGTH[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[14] PCIE:VSEC_CAP_HDR_ID[14] PCIE:DRP45[15] PCIE:VSEC_CAP_HDR_ID[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[12] PCIE:VSEC_CAP_HDR_ID[12] PCIE:DRP45[13] PCIE:VSEC_CAP_HDR_ID[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[10] PCIE:VSEC_CAP_HDR_ID[10] PCIE:DRP45[11] PCIE:VSEC_CAP_HDR_ID[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[8] PCIE:VSEC_CAP_HDR_ID[8] PCIE:DRP45[9] PCIE:VSEC_CAP_HDR_ID[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[6] PCIE:VSEC_CAP_HDR_ID[6] PCIE:DRP45[7] PCIE:VSEC_CAP_HDR_ID[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[4] PCIE:VSEC_CAP_HDR_ID[4] PCIE:DRP45[5] PCIE:VSEC_CAP_HDR_ID[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[2] PCIE:VSEC_CAP_HDR_ID[2] PCIE:DRP45[3] PCIE:VSEC_CAP_HDR_ID[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[0] PCIE:VSEC_CAP_HDR_ID[0] PCIE:DRP45[1] PCIE:VSEC_CAP_HDR_ID[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[14] PCIE:DRP44[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[12] PCIE:DRP44[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[10] PCIE:VSEC_BASE_PTR[10] PCIE:DRP44[11] PCIE:VSEC_BASE_PTR[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[8] PCIE:VSEC_BASE_PTR[8] PCIE:DRP44[9] PCIE:VSEC_BASE_PTR[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[6] PCIE:VSEC_BASE_PTR[6] PCIE:DRP44[7] PCIE:VSEC_BASE_PTR[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[4] PCIE:VSEC_BASE_PTR[4] PCIE:DRP44[5] PCIE:VSEC_BASE_PTR[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[2] PCIE:VSEC_BASE_PTR[2] PCIE:DRP44[3] PCIE:VSEC_BASE_PTR[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[0] PCIE:VSEC_BASE_PTR[0] PCIE:DRP44[1] PCIE:VSEC_BASE_PTR[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[14] PCIE:VENDOR_ID[14] PCIE:DRP43[15] PCIE:VENDOR_ID[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[12] PCIE:VENDOR_ID[12] PCIE:DRP43[13] PCIE:VENDOR_ID[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[10] PCIE:VENDOR_ID[10] PCIE:DRP43[11] PCIE:VENDOR_ID[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[8] PCIE:VENDOR_ID[8] PCIE:DRP43[9] PCIE:VENDOR_ID[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[6] PCIE:VENDOR_ID[6] PCIE:DRP43[7] PCIE:VENDOR_ID[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[4] PCIE:VENDOR_ID[4] PCIE:DRP43[5] PCIE:VENDOR_ID[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[2] PCIE:VENDOR_ID[2] PCIE:DRP43[3] PCIE:VENDOR_ID[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[0] PCIE:VENDOR_ID[0] PCIE:DRP43[1] PCIE:VENDOR_ID[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[14] PCIE:DRP42[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[12] PCIE:DRP42[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[10] PCIE:DRP42[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[8] PCIE:DRP42[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[6] PCIE:DRP42[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[4] PCIE:DRP42[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[2] PCIE:DRP42[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[0] PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS PCIE:DRP42[1]
virtex6 PCIE bittile 12
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[14] PCIE:LINK_CAP_MAX_LINK_WIDTH[4] PCIE:DRP4D[15] PCIE:LINK_CAP_MAX_LINK_WIDTH[5]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[12] PCIE:LINK_CAP_MAX_LINK_WIDTH[2] PCIE:DRP4D[13] PCIE:LINK_CAP_MAX_LINK_WIDTH[3]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[10] PCIE:LINK_CAP_MAX_LINK_WIDTH[0] PCIE:DRP4D[11] PCIE:LINK_CAP_MAX_LINK_WIDTH[1]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[8] PCIE:INFER_EI[3] PCIE:DRP4D[9] PCIE:INFER_EI[4]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[6] PCIE:INFER_EI[1] PCIE:DRP4D[7] PCIE:INFER_EI[2]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[4] PCIE:ENTER_RVRY_EI_L0 PCIE:DRP4D[5] PCIE:INFER_EI[0]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_LANE_REVERSAL PCIE:DRP4D[2] PCIE:DISABLE_SCRAMBLING PCIE:DRP4D[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[0] PCIE:LL_REPLAY_TIMEOUT_FUNC[0] PCIE:DRP4D[1] PCIE:LL_REPLAY_TIMEOUT_FUNC[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[14] PCIE:LL_REPLAY_TIMEOUT[14] PCIE:DRP4C[15] PCIE:LL_REPLAY_TIMEOUT_EN
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[12] PCIE:LL_REPLAY_TIMEOUT[12] PCIE:DRP4C[13] PCIE:LL_REPLAY_TIMEOUT[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[10] PCIE:LL_REPLAY_TIMEOUT[10] PCIE:DRP4C[11] PCIE:LL_REPLAY_TIMEOUT[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[8] PCIE:LL_REPLAY_TIMEOUT[8] PCIE:DRP4C[9] PCIE:LL_REPLAY_TIMEOUT[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[6] PCIE:LL_REPLAY_TIMEOUT[6] PCIE:DRP4C[7] PCIE:LL_REPLAY_TIMEOUT[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[4] PCIE:LL_REPLAY_TIMEOUT[4] PCIE:DRP4C[5] PCIE:LL_REPLAY_TIMEOUT[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[2] PCIE:LL_REPLAY_TIMEOUT[2] PCIE:DRP4C[3] PCIE:LL_REPLAY_TIMEOUT[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[0] PCIE:LL_REPLAY_TIMEOUT[0] PCIE:DRP4C[1] PCIE:LL_REPLAY_TIMEOUT[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[14] PCIE:DRP4B[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[12] PCIE:DRP4B[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[10] PCIE:DRP4B[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[8] PCIE:DRP4B[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[6] PCIE:DRP4B[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[4] PCIE:DRP4B[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[2] PCIE:DRP4B[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[0] PCIE:LL_ACK_TIMEOUT_FUNC[0] PCIE:DRP4B[1] PCIE:LL_ACK_TIMEOUT_FUNC[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[14] PCIE:LL_ACK_TIMEOUT[14] PCIE:DRP4A[15] PCIE:LL_ACK_TIMEOUT_EN
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[12] PCIE:LL_ACK_TIMEOUT[12] PCIE:DRP4A[13] PCIE:LL_ACK_TIMEOUT[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[10] PCIE:LL_ACK_TIMEOUT[10] PCIE:DRP4A[11] PCIE:LL_ACK_TIMEOUT[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[8] PCIE:LL_ACK_TIMEOUT[8] PCIE:DRP4A[9] PCIE:LL_ACK_TIMEOUT[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[6] PCIE:LL_ACK_TIMEOUT[6] PCIE:DRP4A[7] PCIE:LL_ACK_TIMEOUT[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[4] PCIE:LL_ACK_TIMEOUT[4] PCIE:DRP4A[5] PCIE:LL_ACK_TIMEOUT[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[2] PCIE:LL_ACK_TIMEOUT[2] PCIE:DRP4A[3] PCIE:LL_ACK_TIMEOUT[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[0] PCIE:LL_ACK_TIMEOUT[0] PCIE:DRP4A[1] PCIE:LL_ACK_TIMEOUT[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[14] PCIE:DRP49[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[5] PCIE:DRP49[12] PCIE:CRM_MODULE_RSTS[6] PCIE:DRP49[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[3] PCIE:DRP49[10] PCIE:CRM_MODULE_RSTS[4] PCIE:DRP49[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[1] PCIE:DRP49[8] PCIE:CRM_MODULE_RSTS[2] PCIE:DRP49[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[6] PCIE:USER_CLK_FREQ[2] PCIE:CRM_MODULE_RSTS[0] PCIE:DRP49[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[4] PCIE:USER_CLK_FREQ[0] PCIE:DRP49[5] PCIE:USER_CLK_FREQ[1]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[2] PCIE:VSEC_CAP_VERSION[2] PCIE:DRP49[3] PCIE:VSEC_CAP_VERSION[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[0] PCIE:VSEC_CAP_VERSION[0] PCIE:DRP49[1] PCIE:VSEC_CAP_VERSION[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[14] PCIE:DRP48[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[12] PCIE:VSEC_CAP_NEXTPTR[11] PCIE:DRP48[13] PCIE:VSEC_CAP_ON
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[10] PCIE:VSEC_CAP_NEXTPTR[9] PCIE:DRP48[11] PCIE:VSEC_CAP_NEXTPTR[10]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[8] PCIE:VSEC_CAP_NEXTPTR[7] PCIE:DRP48[9] PCIE:VSEC_CAP_NEXTPTR[8]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[6] PCIE:VSEC_CAP_NEXTPTR[5] PCIE:DRP48[7] PCIE:VSEC_CAP_NEXTPTR[6]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[4] PCIE:VSEC_CAP_NEXTPTR[3] PCIE:DRP48[5] PCIE:VSEC_CAP_NEXTPTR[4]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[2] PCIE:VSEC_CAP_NEXTPTR[1] PCIE:DRP48[3] PCIE:VSEC_CAP_NEXTPTR[2]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[0] PCIE:VSEC_CAP_IS_LINK_VISIBLE PCIE:DRP48[1] PCIE:VSEC_CAP_NEXTPTR[0]
virtex6 PCIE bittile 13
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[14] PCIE:DRP53[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[12] PCIE:DRP53[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[10] PCIE:VC_CAP_VERSION[3] PCIE:DRP53[11] PCIE:VC0_CPL_INFINITE
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[8] PCIE:VC_CAP_VERSION[1] PCIE:DRP53[9] PCIE:VC_CAP_VERSION[2]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[6] PCIE:TL_TX_RAM_WRITE_LATENCY PCIE:DRP53[7] PCIE:VC_CAP_VERSION[0]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[4] PCIE:TL_TX_RAM_RDATA_LATENCY[0] PCIE:DRP53[5] PCIE:TL_TX_RAM_RDATA_LATENCY[1]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[2] PCIE:TL_RBYPASS PCIE:DRP53[3] PCIE:TL_TX_RAM_RADDR_LATENCY
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[0] PCIE:TL_TFC_DISABLE PCIE:DRP53[1] PCIE:TL_TX_CHECKS_DISABLE
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[14] PCIE:TL_RX_RAM_RDATA_LATENCY[1] PCIE:DRP52[15] PCIE:TL_RX_RAM_WRITE_LATENCY
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[12] PCIE:TL_RX_RAM_RADDR_LATENCY PCIE:DRP52[13] PCIE:TL_RX_RAM_RDATA_LATENCY[0]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[10] PCIE:ENABLE_MSG_ROUTE[10] PCIE:DRP52[11] PCIE:ENABLE_RX_TD_ECRC_TRIM
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[8] PCIE:ENABLE_MSG_ROUTE[8] PCIE:DRP52[9] PCIE:ENABLE_MSG_ROUTE[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[6] PCIE:ENABLE_MSG_ROUTE[6] PCIE:DRP52[7] PCIE:ENABLE_MSG_ROUTE[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[4] PCIE:ENABLE_MSG_ROUTE[4] PCIE:DRP52[5] PCIE:ENABLE_MSG_ROUTE[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[2] PCIE:ENABLE_MSG_ROUTE[2] PCIE:DRP52[3] PCIE:ENABLE_MSG_ROUTE[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[0] PCIE:ENABLE_MSG_ROUTE[0] PCIE:DRP52[1] PCIE:ENABLE_MSG_ROUTE[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[14] PCIE:DRP51[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[12] PCIE:DRP51[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_ID_CHECK PCIE:DRP51[10] PCIE:DISABLE_RX_TC_FILTER PCIE:DRP51[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_ASPM_L1_TIMER PCIE:DRP51[8] PCIE:DISABLE_BAR_FILTERING PCIE:DRP51[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[6] PCIE:DRP51[6] PCIE:DNSTREAM_LINK_NUM[7] PCIE:DRP51[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[4] PCIE:DRP51[4] PCIE:DNSTREAM_LINK_NUM[5] PCIE:DRP51[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[2] PCIE:DRP51[2] PCIE:DNSTREAM_LINK_NUM[3] PCIE:DRP51[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[0] PCIE:DRP51[0] PCIE:DNSTREAM_LINK_NUM[1] PCIE:DRP51[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[14] PCIE:UPSTREAM_FACING PCIE:DRP50[15] PCIE:EXIT_LOOPBACK_ON_EI
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[12] PCIE:PL_FAST_TRAIN PCIE:DRP50[13] PCIE:UPCONFIG_CAPABLE
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[10] PCIE:PL_AUTO_CONFIG[1] PCIE:DRP50[11] PCIE:PL_AUTO_CONFIG[2]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:ALLOW_X8_GEN2 PCIE:DRP50[8] PCIE:DRP50[9] PCIE:PL_AUTO_CONFIG[0]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[6] PCIE:N_FTS_GEN2[6] PCIE:DRP50[7] PCIE:N_FTS_GEN2[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[4] PCIE:N_FTS_GEN2[4] PCIE:DRP50[5] PCIE:N_FTS_GEN2[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[2] PCIE:N_FTS_GEN2[2] PCIE:DRP50[3] PCIE:N_FTS_GEN2[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[0] PCIE:N_FTS_GEN2[0] PCIE:DRP50[1] PCIE:N_FTS_GEN2[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[14] PCIE:N_FTS_GEN1[6] PCIE:DRP4F[15] PCIE:N_FTS_GEN1[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[12] PCIE:N_FTS_GEN1[4] PCIE:DRP4F[13] PCIE:N_FTS_GEN1[5]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[10] PCIE:N_FTS_GEN1[2] PCIE:DRP4F[11] PCIE:N_FTS_GEN1[3]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[8] PCIE:N_FTS_GEN1[0] PCIE:DRP4F[9] PCIE:N_FTS_GEN1[1]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[6] PCIE:N_FTS_COMCLK_GEN2[6] PCIE:DRP4F[7] PCIE:N_FTS_COMCLK_GEN2[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[4] PCIE:N_FTS_COMCLK_GEN2[4] PCIE:DRP4F[5] PCIE:N_FTS_COMCLK_GEN2[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[2] PCIE:N_FTS_COMCLK_GEN2[2] PCIE:DRP4F[3] PCIE:N_FTS_COMCLK_GEN2[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[0] PCIE:N_FTS_COMCLK_GEN2[0] PCIE:DRP4F[1] PCIE:N_FTS_COMCLK_GEN2[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[14] PCIE:DRP4E[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[12] PCIE:N_FTS_COMCLK_GEN1[6] PCIE:DRP4E[13] PCIE:N_FTS_COMCLK_GEN1[7]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[10] PCIE:N_FTS_COMCLK_GEN1[4] PCIE:DRP4E[11] PCIE:N_FTS_COMCLK_GEN1[5]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[8] PCIE:N_FTS_COMCLK_GEN1[2] PCIE:DRP4E[9] PCIE:N_FTS_COMCLK_GEN1[3]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[6] PCIE:N_FTS_COMCLK_GEN1[0] PCIE:DRP4E[7] PCIE:N_FTS_COMCLK_GEN1[1]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[4] PCIE:LTSSM_MAX_LINK_WIDTH[4] PCIE:DRP4E[5] PCIE:LTSSM_MAX_LINK_WIDTH[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[2] PCIE:LTSSM_MAX_LINK_WIDTH[2] PCIE:DRP4E[3] PCIE:LTSSM_MAX_LINK_WIDTH[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[0] PCIE:LTSSM_MAX_LINK_WIDTH[0] PCIE:DRP4E[1] PCIE:LTSSM_MAX_LINK_WIDTH[1]
virtex6 PCIE bittile 14
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[14] PCIE:PGL4_LANE[2] PCIE:DRP59[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[12] PCIE:PGL4_LANE[0] PCIE:DRP59[13] PCIE:PGL4_LANE[1]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[10] PCIE:PGL3_LANE[1] PCIE:DRP59[11] PCIE:PGL3_LANE[2]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[8] PCIE:PGL2_LANE[2] PCIE:DRP59[9] PCIE:PGL3_LANE[0]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[6] PCIE:PGL2_LANE[0] PCIE:DRP59[7] PCIE:PGL2_LANE[1]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[4] PCIE:PGL1_LANE[1] PCIE:DRP59[5] PCIE:PGL1_LANE[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[2] PCIE:PGL0_LANE[2] PCIE:DRP59[3] PCIE:PGL1_LANE[0]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[0] PCIE:PGL0_LANE[0] PCIE:DRP59[1] PCIE:PGL0_LANE[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[14] PCIE:RECRC_CHK_TRIM PCIE:DRP58[15] PCIE:UR_INV_REQ
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[12] PCIE:RECRC_CHK[0] PCIE:DRP58[13] PCIE:RECRC_CHK[1]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[10] PCIE:VC0_TX_LASTPACKET[3] PCIE:DRP58[11] PCIE:VC0_TX_LASTPACKET[4]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[8] PCIE:VC0_TX_LASTPACKET[1] PCIE:DRP58[9] PCIE:VC0_TX_LASTPACKET[2]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[6] PCIE:VC0_TOTAL_CREDITS_PH[6] PCIE:DRP58[7] PCIE:VC0_TX_LASTPACKET[0]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[4] PCIE:VC0_TOTAL_CREDITS_PH[4] PCIE:DRP58[5] PCIE:VC0_TOTAL_CREDITS_PH[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[2] PCIE:VC0_TOTAL_CREDITS_PH[2] PCIE:DRP58[3] PCIE:VC0_TOTAL_CREDITS_PH[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[0] PCIE:VC0_TOTAL_CREDITS_PH[0] PCIE:DRP58[1] PCIE:VC0_TOTAL_CREDITS_PH[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[14] PCIE:DRP57[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[12] PCIE:DRP57[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[10] PCIE:VC0_TOTAL_CREDITS_PD[10] PCIE:DRP57[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[8] PCIE:VC0_TOTAL_CREDITS_PD[8] PCIE:DRP57[9] PCIE:VC0_TOTAL_CREDITS_PD[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[6] PCIE:VC0_TOTAL_CREDITS_PD[6] PCIE:DRP57[7] PCIE:VC0_TOTAL_CREDITS_PD[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[4] PCIE:VC0_TOTAL_CREDITS_PD[4] PCIE:DRP57[5] PCIE:VC0_TOTAL_CREDITS_PD[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[2] PCIE:VC0_TOTAL_CREDITS_PD[2] PCIE:DRP57[3] PCIE:VC0_TOTAL_CREDITS_PD[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[0] PCIE:VC0_TOTAL_CREDITS_PD[0] PCIE:DRP57[1] PCIE:VC0_TOTAL_CREDITS_PD[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[14] PCIE:DRP56[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[12] PCIE:VC0_TOTAL_CREDITS_NPH[5] PCIE:DRP56[13] PCIE:VC0_TOTAL_CREDITS_NPH[6]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[10] PCIE:VC0_TOTAL_CREDITS_NPH[3] PCIE:DRP56[11] PCIE:VC0_TOTAL_CREDITS_NPH[4]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[8] PCIE:VC0_TOTAL_CREDITS_NPH[1] PCIE:DRP56[9] PCIE:VC0_TOTAL_CREDITS_NPH[2]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[6] PCIE:VC0_TOTAL_CREDITS_CH[6] PCIE:DRP56[7] PCIE:VC0_TOTAL_CREDITS_NPH[0]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[4] PCIE:VC0_TOTAL_CREDITS_CH[4] PCIE:DRP56[5] PCIE:VC0_TOTAL_CREDITS_CH[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[2] PCIE:VC0_TOTAL_CREDITS_CH[2] PCIE:DRP56[3] PCIE:VC0_TOTAL_CREDITS_CH[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[0] PCIE:VC0_TOTAL_CREDITS_CH[0] PCIE:DRP56[1] PCIE:VC0_TOTAL_CREDITS_CH[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[14] PCIE:DRP55[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[12] PCIE:DRP55[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[10] PCIE:VC0_TOTAL_CREDITS_CD[10] PCIE:DRP55[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[8] PCIE:VC0_TOTAL_CREDITS_CD[8] PCIE:DRP55[9] PCIE:VC0_TOTAL_CREDITS_CD[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[6] PCIE:VC0_TOTAL_CREDITS_CD[6] PCIE:DRP55[7] PCIE:VC0_TOTAL_CREDITS_CD[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[4] PCIE:VC0_TOTAL_CREDITS_CD[4] PCIE:DRP55[5] PCIE:VC0_TOTAL_CREDITS_CD[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[2] PCIE:VC0_TOTAL_CREDITS_CD[2] PCIE:DRP55[3] PCIE:VC0_TOTAL_CREDITS_CD[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[0] PCIE:VC0_TOTAL_CREDITS_CD[0] PCIE:DRP55[1] PCIE:VC0_TOTAL_CREDITS_CD[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[14] PCIE:DRP54[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[12] PCIE:VC0_RX_RAM_LIMIT[12] PCIE:DRP54[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[10] PCIE:VC0_RX_RAM_LIMIT[10] PCIE:DRP54[11] PCIE:VC0_RX_RAM_LIMIT[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[8] PCIE:VC0_RX_RAM_LIMIT[8] PCIE:DRP54[9] PCIE:VC0_RX_RAM_LIMIT[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[6] PCIE:VC0_RX_RAM_LIMIT[6] PCIE:DRP54[7] PCIE:VC0_RX_RAM_LIMIT[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[4] PCIE:VC0_RX_RAM_LIMIT[4] PCIE:DRP54[5] PCIE:VC0_RX_RAM_LIMIT[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[2] PCIE:VC0_RX_RAM_LIMIT[2] PCIE:DRP54[3] PCIE:VC0_RX_RAM_LIMIT[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[0] PCIE:VC0_RX_RAM_LIMIT[0] PCIE:DRP54[1] PCIE:VC0_RX_RAM_LIMIT[1]
virtex6 PCIE bittile 15
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[14] PCIE:SPARE_WORD0[30] PCIE:DRP5F[15] PCIE:SPARE_WORD0[31]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[12] PCIE:SPARE_WORD0[28] PCIE:DRP5F[13] PCIE:SPARE_WORD0[29]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[10] PCIE:SPARE_WORD0[26] PCIE:DRP5F[11] PCIE:SPARE_WORD0[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[8] PCIE:SPARE_WORD0[24] PCIE:DRP5F[9] PCIE:SPARE_WORD0[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[6] PCIE:SPARE_WORD0[22] PCIE:DRP5F[7] PCIE:SPARE_WORD0[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[4] PCIE:SPARE_WORD0[20] PCIE:DRP5F[5] PCIE:SPARE_WORD0[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[2] PCIE:SPARE_WORD0[18] PCIE:DRP5F[3] PCIE:SPARE_WORD0[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[0] PCIE:SPARE_WORD0[16] PCIE:DRP5F[1] PCIE:SPARE_WORD0[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[14] PCIE:SPARE_WORD0[14] PCIE:DRP5E[15] PCIE:SPARE_WORD0[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[12] PCIE:SPARE_WORD0[12] PCIE:DRP5E[13] PCIE:SPARE_WORD0[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[10] PCIE:SPARE_WORD0[10] PCIE:DRP5E[11] PCIE:SPARE_WORD0[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[8] PCIE:SPARE_WORD0[8] PCIE:DRP5E[9] PCIE:SPARE_WORD0[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[6] PCIE:SPARE_WORD0[6] PCIE:DRP5E[7] PCIE:SPARE_WORD0[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[4] PCIE:SPARE_WORD0[4] PCIE:DRP5E[5] PCIE:SPARE_WORD0[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[2] PCIE:SPARE_WORD0[2] PCIE:DRP5E[3] PCIE:SPARE_WORD0[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[0] PCIE:SPARE_WORD0[0] PCIE:DRP5E[1] PCIE:SPARE_WORD0[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[14] PCIE:DRP5D[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[12] PCIE:DRP5D[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[10] PCIE:DRP5D[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[8] PCIE:DRP5D[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[6] PCIE:SPARE_BYTE3[6] PCIE:DRP5D[7] PCIE:SPARE_BYTE3[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[4] PCIE:SPARE_BYTE3[4] PCIE:DRP5D[5] PCIE:SPARE_BYTE3[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[2] PCIE:SPARE_BYTE3[2] PCIE:DRP5D[3] PCIE:SPARE_BYTE3[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[0] PCIE:SPARE_BYTE3[0] PCIE:DRP5D[1] PCIE:SPARE_BYTE3[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[14] PCIE:SPARE_BYTE2[6] PCIE:DRP5C[15] PCIE:SPARE_BYTE2[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[12] PCIE:SPARE_BYTE2[4] PCIE:DRP5C[13] PCIE:SPARE_BYTE2[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[10] PCIE:SPARE_BYTE2[2] PCIE:DRP5C[11] PCIE:SPARE_BYTE2[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[8] PCIE:SPARE_BYTE2[0] PCIE:DRP5C[9] PCIE:SPARE_BYTE2[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[6] PCIE:SPARE_BYTE1[6] PCIE:DRP5C[7] PCIE:SPARE_BYTE1[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[4] PCIE:SPARE_BYTE1[4] PCIE:DRP5C[5] PCIE:SPARE_BYTE1[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[2] PCIE:SPARE_BYTE1[2] PCIE:DRP5C[3] PCIE:SPARE_BYTE1[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[0] PCIE:SPARE_BYTE1[0] PCIE:DRP5C[1] PCIE:SPARE_BYTE1[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[14] PCIE:DRP5B[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[12] PCIE:DRP5B[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[10] PCIE:SPARE_BYTE0[7] PCIE:DRP5B[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[8] PCIE:SPARE_BYTE0[5] PCIE:DRP5B[9] PCIE:SPARE_BYTE0[6]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[6] PCIE:SPARE_BYTE0[3] PCIE:DRP5B[7] PCIE:SPARE_BYTE0[4]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[4] PCIE:SPARE_BYTE0[1] PCIE:DRP5B[5] PCIE:SPARE_BYTE0[2]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[2] PCIE:SPARE_BIT8 PCIE:DRP5B[3] PCIE:SPARE_BYTE0[0]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[0] PCIE:SPARE_BIT6 PCIE:DRP5B[1] PCIE:SPARE_BIT7
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[14] PCIE:SPARE_BIT4 PCIE:DRP5A[15] PCIE:SPARE_BIT5
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[12] PCIE:SPARE_BIT2 PCIE:DRP5A[13] PCIE:SPARE_BIT3
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[10] PCIE:SPARE_BIT0 PCIE:DRP5A[11] PCIE:SPARE_BIT1
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[8] PCIE:PGL7_LANE[2] PCIE:DRP5A[9] PCIE:TEST_MODE_PIN_CHAR
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[6] PCIE:PGL7_LANE[0] PCIE:DRP5A[7] PCIE:PGL7_LANE[1]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[4] PCIE:PGL6_LANE[1] PCIE:DRP5A[5] PCIE:PGL6_LANE[2]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[2] PCIE:PGL5_LANE[2] PCIE:DRP5A[3] PCIE:PGL6_LANE[0]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[0] PCIE:PGL5_LANE[0] PCIE:DRP5A[1] PCIE:PGL5_LANE[1]
virtex6 PCIE bittile 16
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[14] PCIE:SPARE_WORD3[30] PCIE:DRP65[15] PCIE:SPARE_WORD3[31]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[12] PCIE:SPARE_WORD3[28] PCIE:DRP65[13] PCIE:SPARE_WORD3[29]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[10] PCIE:SPARE_WORD3[26] PCIE:DRP65[11] PCIE:SPARE_WORD3[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[8] PCIE:SPARE_WORD3[24] PCIE:DRP65[9] PCIE:SPARE_WORD3[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[6] PCIE:SPARE_WORD3[22] PCIE:DRP65[7] PCIE:SPARE_WORD3[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[4] PCIE:SPARE_WORD3[20] PCIE:DRP65[5] PCIE:SPARE_WORD3[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[2] PCIE:SPARE_WORD3[18] PCIE:DRP65[3] PCIE:SPARE_WORD3[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[0] PCIE:SPARE_WORD3[16] PCIE:DRP65[1] PCIE:SPARE_WORD3[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[14] PCIE:SPARE_WORD3[14] PCIE:DRP64[15] PCIE:SPARE_WORD3[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[12] PCIE:SPARE_WORD3[12] PCIE:DRP64[13] PCIE:SPARE_WORD3[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[10] PCIE:SPARE_WORD3[10] PCIE:DRP64[11] PCIE:SPARE_WORD3[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[8] PCIE:SPARE_WORD3[8] PCIE:DRP64[9] PCIE:SPARE_WORD3[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[6] PCIE:SPARE_WORD3[6] PCIE:DRP64[7] PCIE:SPARE_WORD3[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[4] PCIE:SPARE_WORD3[4] PCIE:DRP64[5] PCIE:SPARE_WORD3[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[2] PCIE:SPARE_WORD3[2] PCIE:DRP64[3] PCIE:SPARE_WORD3[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[0] PCIE:SPARE_WORD3[0] PCIE:DRP64[1] PCIE:SPARE_WORD3[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[14] PCIE:SPARE_WORD2[30] PCIE:DRP63[15] PCIE:SPARE_WORD2[31]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[12] PCIE:SPARE_WORD2[28] PCIE:DRP63[13] PCIE:SPARE_WORD2[29]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[10] PCIE:SPARE_WORD2[26] PCIE:DRP63[11] PCIE:SPARE_WORD2[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[8] PCIE:SPARE_WORD2[24] PCIE:DRP63[9] PCIE:SPARE_WORD2[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[6] PCIE:SPARE_WORD2[22] PCIE:DRP63[7] PCIE:SPARE_WORD2[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[4] PCIE:SPARE_WORD2[20] PCIE:DRP63[5] PCIE:SPARE_WORD2[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[2] PCIE:SPARE_WORD2[18] PCIE:DRP63[3] PCIE:SPARE_WORD2[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[0] PCIE:SPARE_WORD2[16] PCIE:DRP63[1] PCIE:SPARE_WORD2[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[14] PCIE:SPARE_WORD2[14] PCIE:DRP62[15] PCIE:SPARE_WORD2[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[12] PCIE:SPARE_WORD2[12] PCIE:DRP62[13] PCIE:SPARE_WORD2[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[10] PCIE:SPARE_WORD2[10] PCIE:DRP62[11] PCIE:SPARE_WORD2[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[8] PCIE:SPARE_WORD2[8] PCIE:DRP62[9] PCIE:SPARE_WORD2[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[6] PCIE:SPARE_WORD2[6] PCIE:DRP62[7] PCIE:SPARE_WORD2[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[4] PCIE:SPARE_WORD2[4] PCIE:DRP62[5] PCIE:SPARE_WORD2[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[2] PCIE:SPARE_WORD2[2] PCIE:DRP62[3] PCIE:SPARE_WORD2[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[0] PCIE:SPARE_WORD2[0] PCIE:DRP62[1] PCIE:SPARE_WORD2[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[14] PCIE:SPARE_WORD1[30] PCIE:DRP61[15] PCIE:SPARE_WORD1[31]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[12] PCIE:SPARE_WORD1[28] PCIE:DRP61[13] PCIE:SPARE_WORD1[29]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[10] PCIE:SPARE_WORD1[26] PCIE:DRP61[11] PCIE:SPARE_WORD1[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[8] PCIE:SPARE_WORD1[24] PCIE:DRP61[9] PCIE:SPARE_WORD1[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[6] PCIE:SPARE_WORD1[22] PCIE:DRP61[7] PCIE:SPARE_WORD1[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[4] PCIE:SPARE_WORD1[20] PCIE:DRP61[5] PCIE:SPARE_WORD1[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[2] PCIE:SPARE_WORD1[18] PCIE:DRP61[3] PCIE:SPARE_WORD1[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[0] PCIE:SPARE_WORD1[16] PCIE:DRP61[1] PCIE:SPARE_WORD1[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[14] PCIE:SPARE_WORD1[14] PCIE:DRP60[15] PCIE:SPARE_WORD1[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[12] PCIE:SPARE_WORD1[12] PCIE:DRP60[13] PCIE:SPARE_WORD1[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[10] PCIE:SPARE_WORD1[10] PCIE:DRP60[11] PCIE:SPARE_WORD1[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[8] PCIE:SPARE_WORD1[8] PCIE:DRP60[9] PCIE:SPARE_WORD1[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[6] PCIE:SPARE_WORD1[6] PCIE:DRP60[7] PCIE:SPARE_WORD1[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[4] PCIE:SPARE_WORD1[4] PCIE:DRP60[5] PCIE:SPARE_WORD1[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[2] PCIE:SPARE_WORD1[2] PCIE:DRP60[3] PCIE:SPARE_WORD1[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[0] PCIE:SPARE_WORD1[0] PCIE:DRP60[1] PCIE:SPARE_WORD1[1]
virtex6 PCIE bittile 17
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[14] PCIE:DRP6B[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[12] PCIE:DRP6B[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[10] PCIE:DRP6B[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[8] PCIE:DRP6B[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[6] PCIE:DRP6B[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[4] PCIE:DRP6B[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[2] PCIE:DRP6B[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[0] PCIE:DRP6B[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[14] PCIE:DRP6A[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[12] PCIE:DRP6A[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[10] PCIE:DRP6A[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[8] PCIE:DRP6A[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[6] PCIE:DRP6A[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[4] PCIE:DRP6A[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[2] PCIE:DRP6A[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[0] PCIE:DRP6A[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[14] PCIE:DRP69[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[12] PCIE:DRP69[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[10] PCIE:DRP69[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[8] PCIE:DRP69[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[6] PCIE:DRP69[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[4] PCIE:DRP69[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[2] PCIE:DRP69[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[0] PCIE:DRP69[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[14] PCIE:DRP68[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[12] PCIE:DRP68[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[10] PCIE:DRP68[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[8] PCIE:DRP68[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[6] PCIE:DRP68[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[4] PCIE:DRP68[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[2] PCIE:DRP68[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[0] PCIE:DRP68[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[14] PCIE:DRP67[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[12] PCIE:DRP67[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[10] PCIE:DRP67[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[8] PCIE:DRP67[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[6] PCIE:DRP67[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[4] PCIE:DRP67[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[2] PCIE:DRP67[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[0] PCIE:DRP67[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[14] PCIE:DRP66[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[12] PCIE:DRP66[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[10] PCIE:DRP66[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[8] PCIE:DRP66[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[6] PCIE:DRP66[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[4] PCIE:DRP66[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[2] PCIE:DRP66[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[0] PCIE:DRP66[1]
virtex6 PCIE bittile 18
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[14] PCIE:DRP71[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[12] PCIE:DRP71[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[10] PCIE:DRP71[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[8] PCIE:DRP71[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[6] PCIE:DRP71[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[4] PCIE:DRP71[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[2] PCIE:DRP71[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[0] PCIE:DRP71[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[14] PCIE:DRP70[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[12] PCIE:DRP70[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[10] PCIE:DRP70[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[8] PCIE:DRP70[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[6] PCIE:DRP70[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[4] PCIE:DRP70[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[2] PCIE:DRP70[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[0] PCIE:DRP70[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[14] PCIE:DRP6F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[12] PCIE:DRP6F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[10] PCIE:DRP6F[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[8] PCIE:DRP6F[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[6] PCIE:DRP6F[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[4] PCIE:DRP6F[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[2] PCIE:DRP6F[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[0] PCIE:DRP6F[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[14] PCIE:DRP6E[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[12] PCIE:DRP6E[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[10] PCIE:DRP6E[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[8] PCIE:DRP6E[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[6] PCIE:DRP6E[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[4] PCIE:DRP6E[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[2] PCIE:DRP6E[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[0] PCIE:DRP6E[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[14] PCIE:DRP6D[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[12] PCIE:DRP6D[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[10] PCIE:DRP6D[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[8] PCIE:DRP6D[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[6] PCIE:DRP6D[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[4] PCIE:DRP6D[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[2] PCIE:DRP6D[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[0] PCIE:DRP6D[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[14] PCIE:DRP6C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[12] PCIE:DRP6C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[10] PCIE:DRP6C[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[8] PCIE:DRP6C[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[6] PCIE:DRP6C[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[4] PCIE:DRP6C[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[2] PCIE:DRP6C[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[0] PCIE:DRP6C[1]
virtex6 PCIE bittile 19
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
47 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[14] PCIE:DRP77[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[12] PCIE:DRP77[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[10] PCIE:DRP77[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[8] PCIE:DRP77[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[6] PCIE:DRP77[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[4] PCIE:DRP77[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[2] PCIE:DRP77[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[0] PCIE:DRP77[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[14] PCIE:DRP76[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[12] PCIE:DRP76[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[10] PCIE:DRP76[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[8] PCIE:DRP76[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[6] PCIE:DRP76[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[4] PCIE:DRP76[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[2] PCIE:DRP76[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[0] PCIE:DRP76[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[14] PCIE:DRP75[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[12] PCIE:DRP75[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[10] PCIE:DRP75[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[8] PCIE:DRP75[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[6] PCIE:DRP75[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[4] PCIE:DRP75[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[2] PCIE:DRP75[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[0] PCIE:DRP75[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[14] PCIE:DRP74[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[12] PCIE:DRP74[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[10] PCIE:DRP74[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[8] PCIE:DRP74[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[6] PCIE:DRP74[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[4] PCIE:DRP74[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[2] PCIE:DRP74[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[0] PCIE:DRP74[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[14] PCIE:DRP73[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[12] PCIE:DRP73[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[10] PCIE:DRP73[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[8] PCIE:DRP73[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[6] PCIE:DRP73[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[4] PCIE:DRP73[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[2] PCIE:DRP73[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[0] PCIE:DRP73[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[14] PCIE:DRP72[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[12] PCIE:DRP72[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[10] PCIE:DRP72[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[8] PCIE:DRP72[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[6] PCIE:DRP72[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[4] PCIE:DRP72[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[2] PCIE:DRP72[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[0] PCIE:DRP72[1]
PCIE:AER_BASE_PTR 0.27.29 0.26.29 0.27.28 0.26.28 0.27.27 0.26.27 0.27.26 0.26.26 0.27.25 0.26.25 0.27.24 0.26.24
PCIE:AER_CAP_NEXTPTR 0.27.37 0.26.37 0.27.36 0.26.36 0.27.35 0.26.35 0.27.34 0.26.34 0.27.33 0.26.33 0.27.32 0.26.32
PCIE:DSN_BASE_PTR 4.27.29 4.26.29 4.27.28 4.26.28 4.27.27 4.26.27 4.27.26 4.26.26 4.27.25 4.26.25 4.27.24 4.26.24
PCIE:DSN_CAP_NEXTPTR 4.27.45 4.26.45 4.27.44 4.26.44 4.27.43 4.26.43 4.27.42 4.26.42 4.27.41 4.26.41 4.27.40 4.26.40
PCIE:VC_BASE_PTR 10.27.29 10.26.29 10.27.28 10.26.28 10.27.27 10.26.27 10.27.26 10.26.26 10.27.25 10.26.25 10.27.24 10.26.24
PCIE:VC_CAP_NEXTPTR 10.27.37 10.26.37 10.27.36 10.26.36 10.27.35 10.26.35 10.27.34 10.26.34 10.27.33 10.26.33 10.27.32 10.26.32
PCIE:VSEC_BASE_PTR 11.27.21 11.26.21 11.27.20 11.26.20 11.27.19 11.26.19 11.27.18 11.26.18 11.27.17 11.26.17 11.27.16 11.26.16
PCIE:VSEC_CAP_HDR_LENGTH 11.27.37 11.26.37 11.27.36 11.26.36 11.27.35 11.26.35 11.27.34 11.26.34 11.27.33 11.26.33 11.27.32 11.26.32
PCIE:VSEC_CAP_NEXTPTR 12.26.6 12.27.5 12.26.5 12.27.4 12.26.4 12.27.3 12.26.3 12.27.2 12.26.2 12.27.1 12.26.1 12.27.0
non-inverted [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:AER_CAP_ECRC_CHECK_CAPABLE 0.26.0
PCIE:AER_CAP_ECRC_GEN_CAPABLE 0.27.0
PCIE:AER_CAP_ON 0.26.38
PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE 0.26.21
PCIE:ALLOW_X8_GEN2 13.26.20
PCIE:CMD_INTX_IMPLEMENTED 3.26.44
PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED 3.27.44
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE 3.26.47
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE 3.27.47
PCIE:DEV_CAP_EXT_TAG_SUPPORTED 4.26.3
PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE 4.27.3
PCIE:DEV_CAP_ROLE_BASED_ERROR 4.27.6
PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED 4.26.12
PCIE:DISABLE_ASPM_L1_TIMER 13.26.28
PCIE:DISABLE_BAR_FILTERING 13.27.28
PCIE:DISABLE_ID_CHECK 13.26.29
PCIE:DISABLE_LANE_REVERSAL 12.26.41
PCIE:DISABLE_RX_TC_FILTER 13.27.29
PCIE:DISABLE_SCRAMBLING 12.27.41
PCIE:DSN_CAP_ON 4.26.46
PCIE:ENABLE_RX_TD_ECRC_TRIM 13.27.37
PCIE:ENTER_RVRY_EI_L0 12.26.42
PCIE:EXIT_LOOPBACK_ON_EI 13.27.23
PCIE:IS_SWITCH 5.26.24
PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT 5.27.30
PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP 5.26.31
PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP 5.27.44
PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE 6.26.0
PCIE:LINK_CONTROL_RCB 6.27.0
PCIE:LINK_CTRL2_DEEMPHASIS 6.26.1
PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE 6.27.1
PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG 6.26.4
PCIE:LL_ACK_TIMEOUT_EN 12.27.23
PCIE:LL_REPLAY_TIMEOUT_EN 12.27.39
PCIE:MSIX_CAP_ON 6.26.44
PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE 6.26.12
PCIE:MSI_CAP_MULTIMSG_EXTENSION 6.26.20
PCIE:MSI_CAP_ON 6.26.28
PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE 6.27.28
PCIE:PCIE_CAP_ON 8.26.12
PCIE:PCIE_CAP_SLOT_IMPLEMENTED 8.27.13
PCIE:PL_FAST_TRAIN 13.26.22
PCIE:PM_CAP_D1SUPPORT 8.27.21
PCIE:PM_CAP_D2SUPPORT 8.26.22
PCIE:PM_CAP_DSI 8.27.22
PCIE:PM_CAP_ON 8.26.32
PCIE:PM_CAP_PME_CLOCK 8.27.32
PCIE:PM_CAP_RSVD_04 8.27.35
PCIE:PM_CSR_B2B3 8.27.37
PCIE:PM_CSR_BPCCEN 8.26.38
PCIE:PM_CSR_NOSOFTRST 8.27.38
PCIE:RECRC_CHK_TRIM 14.26.39
PCIE:ROOT_CAP_CRS_SW_VISIBILITY 9.26.36
PCIE:SELECT_DLL_IF 9.27.36
PCIE:SLOT_CAP_ATT_BUTTON_PRESENT 9.26.37
PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT 9.27.37
PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT 9.26.38
PCIE:SLOT_CAP_HOTPLUG_CAPABLE 9.27.38
PCIE:SLOT_CAP_HOTPLUG_SURPRISE 9.26.39
PCIE:SLOT_CAP_MRL_SENSOR_PRESENT 9.27.39
PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT 9.26.40
PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT 9.26.47
PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT 9.27.47
PCIE:SPARE_BIT0 15.26.5
PCIE:SPARE_BIT1 15.27.5
PCIE:SPARE_BIT2 15.26.6
PCIE:SPARE_BIT3 15.27.6
PCIE:SPARE_BIT4 15.26.7
PCIE:SPARE_BIT5 15.27.7
PCIE:SPARE_BIT6 15.26.8
PCIE:SPARE_BIT7 15.27.8
PCIE:SPARE_BIT8 15.26.9
PCIE:TEST_MODE_PIN_CHAR 15.27.4
PCIE:TL_RBYPASS 13.26.41
PCIE:TL_RX_RAM_RADDR_LATENCY 13.26.38
PCIE:TL_RX_RAM_WRITE_LATENCY 13.27.39
PCIE:TL_TFC_DISABLE 13.26.40
PCIE:TL_TX_CHECKS_DISABLE 13.27.40
PCIE:TL_TX_RAM_RADDR_LATENCY 13.27.41
PCIE:TL_TX_RAM_WRITE_LATENCY 13.26.43
PCIE:UPCONFIG_CAPABLE 13.27.22
PCIE:UPSTREAM_FACING 13.26.23
PCIE:UR_INV_REQ 14.27.39
PCIE:VC0_CPL_INFINITE 13.27.45
PCIE:VC_CAP_ON 10.26.38
PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS 11.26.0
PCIE:VSEC_CAP_IS_LINK_VISIBLE 12.26.0
PCIE:VSEC_CAP_ON 12.27.6
non-inverted [0]
PCIE:AER_CAP_ID 0.27.15 0.26.15 0.27.14 0.26.14 0.27.13 0.26.13 0.27.12 0.26.12 0.27.11 0.26.11 0.27.10 0.26.10 0.27.9 0.26.9 0.27.8 0.26.8
PCIE:DEVICE_ID 4.27.23 4.26.23 4.27.22 4.26.22 4.27.21 4.26.21 4.27.20 4.26.20 4.27.19 4.26.19 4.27.18 4.26.18 4.27.17 4.26.17 4.27.16 4.26.16
PCIE:DRP00 0.27.7 0.26.7 0.27.6 0.26.6 0.27.5 0.26.5 0.27.4 0.26.4 0.27.3 0.26.3 0.27.2 0.26.2 0.27.1 0.26.1 0.27.0 0.26.0
PCIE:DRP01 0.27.15 0.26.15 0.27.14 0.26.14 0.27.13 0.26.13 0.27.12 0.26.12 0.27.11 0.26.11 0.27.10 0.26.10 0.27.9 0.26.9 0.27.8 0.26.8
PCIE:DRP02 0.27.23 0.26.23 0.27.22 0.26.22 0.27.21 0.26.21 0.27.20 0.26.20 0.27.19 0.26.19 0.27.18 0.26.18 0.27.17 0.26.17 0.27.16 0.26.16
PCIE:DRP03 0.27.31 0.26.31 0.27.30 0.26.30 0.27.29 0.26.29 0.27.28 0.26.28 0.27.27 0.26.27 0.27.26 0.26.26 0.27.25 0.26.25 0.27.24 0.26.24
PCIE:DRP04 0.27.39 0.26.39 0.27.38 0.26.38 0.27.37 0.26.37 0.27.36 0.26.36 0.27.35 0.26.35 0.27.34 0.26.34 0.27.33 0.26.33 0.27.32 0.26.32
PCIE:DRP05 0.27.47 0.26.47 0.27.46 0.26.46 0.27.45 0.26.45 0.27.44 0.26.44 0.27.43 0.26.43 0.27.42 0.26.42 0.27.41 0.26.41 0.27.40 0.26.40
PCIE:DRP06 1.27.7 1.26.7 1.27.6 1.26.6 1.27.5 1.26.5 1.27.4 1.26.4 1.27.3 1.26.3 1.27.2 1.26.2 1.27.1 1.26.1 1.27.0 1.26.0
PCIE:DRP07 1.27.15 1.26.15 1.27.14 1.26.14 1.27.13 1.26.13 1.27.12 1.26.12 1.27.11 1.26.11 1.27.10 1.26.10 1.27.9 1.26.9 1.27.8 1.26.8
PCIE:DRP08 1.27.23 1.26.23 1.27.22 1.26.22 1.27.21 1.26.21 1.27.20 1.26.20 1.27.19 1.26.19 1.27.18 1.26.18 1.27.17 1.26.17 1.27.16 1.26.16
PCIE:DRP09 1.27.31 1.26.31 1.27.30 1.26.30 1.27.29 1.26.29 1.27.28 1.26.28 1.27.27 1.26.27 1.27.26 1.26.26 1.27.25 1.26.25 1.27.24 1.26.24
PCIE:DRP0A 1.27.39 1.26.39 1.27.38 1.26.38 1.27.37 1.26.37 1.27.36 1.26.36 1.27.35 1.26.35 1.27.34 1.26.34 1.27.33 1.26.33 1.27.32 1.26.32
PCIE:DRP0B 1.27.47 1.26.47 1.27.46 1.26.46 1.27.45 1.26.45 1.27.44 1.26.44 1.27.43 1.26.43 1.27.42 1.26.42 1.27.41 1.26.41 1.27.40 1.26.40
PCIE:DRP0C 2.27.7 2.26.7 2.27.6 2.26.6 2.27.5 2.26.5 2.27.4 2.26.4 2.27.3 2.26.3 2.27.2 2.26.2 2.27.1 2.26.1 2.27.0 2.26.0
PCIE:DRP0D 2.27.15 2.26.15 2.27.14 2.26.14 2.27.13 2.26.13 2.27.12 2.26.12 2.27.11 2.26.11 2.27.10 2.26.10 2.27.9 2.26.9 2.27.8 2.26.8
PCIE:DRP0E 2.27.23 2.26.23 2.27.22 2.26.22 2.27.21 2.26.21 2.27.20 2.26.20 2.27.19 2.26.19 2.27.18 2.26.18 2.27.17 2.26.17 2.27.16 2.26.16
PCIE:DRP0F 2.27.31 2.26.31 2.27.30 2.26.30 2.27.29 2.26.29 2.27.28 2.26.28 2.27.27 2.26.27 2.27.26 2.26.26 2.27.25 2.26.25 2.27.24 2.26.24
PCIE:DRP10 2.27.39 2.26.39 2.27.38 2.26.38 2.27.37 2.26.37 2.27.36 2.26.36 2.27.35 2.26.35 2.27.34 2.26.34 2.27.33 2.26.33 2.27.32 2.26.32
PCIE:DRP11 2.27.47 2.26.47 2.27.46 2.26.46 2.27.45 2.26.45 2.27.44 2.26.44 2.27.43 2.26.43 2.27.42 2.26.42 2.27.41 2.26.41 2.27.40 2.26.40
PCIE:DRP12 3.27.7 3.26.7 3.27.6 3.26.6 3.27.5 3.26.5 3.27.4 3.26.4 3.27.3 3.26.3 3.27.2 3.26.2 3.27.1 3.26.1 3.27.0 3.26.0
PCIE:DRP13 3.27.15 3.26.15 3.27.14 3.26.14 3.27.13 3.26.13 3.27.12 3.26.12 3.27.11 3.26.11 3.27.10 3.26.10 3.27.9 3.26.9 3.27.8 3.26.8
PCIE:DRP14 3.27.23 3.26.23 3.27.22 3.26.22 3.27.21 3.26.21 3.27.20 3.26.20 3.27.19 3.26.19 3.27.18 3.26.18 3.27.17 3.26.17 3.27.16 3.26.16
PCIE:DRP15 3.27.31 3.26.31 3.27.30 3.26.30 3.27.29 3.26.29 3.27.28 3.26.28 3.27.27 3.26.27 3.27.26 3.26.26 3.27.25 3.26.25 3.27.24 3.26.24
PCIE:DRP16 3.27.39 3.26.39 3.27.38 3.26.38 3.27.37 3.26.37 3.27.36 3.26.36 3.27.35 3.26.35 3.27.34 3.26.34 3.27.33 3.26.33 3.27.32 3.26.32
PCIE:DRP17 3.27.47 3.26.47 3.27.46 3.26.46 3.27.45 3.26.45 3.27.44 3.26.44 3.27.43 3.26.43 3.27.42 3.26.42 3.27.41 3.26.41 3.27.40 3.26.40
PCIE:DRP18 4.27.7 4.26.7 4.27.6 4.26.6 4.27.5 4.26.5 4.27.4 4.26.4 4.27.3 4.26.3 4.27.2 4.26.2 4.27.1 4.26.1 4.27.0 4.26.0
PCIE:DRP19 4.27.15 4.26.15 4.27.14 4.26.14 4.27.13 4.26.13 4.27.12 4.26.12 4.27.11 4.26.11 4.27.10 4.26.10 4.27.9 4.26.9 4.27.8 4.26.8
PCIE:DRP1A 4.27.23 4.26.23 4.27.22 4.26.22 4.27.21 4.26.21 4.27.20 4.26.20 4.27.19 4.26.19 4.27.18 4.26.18 4.27.17 4.26.17 4.27.16 4.26.16
PCIE:DRP1B 4.27.31 4.26.31 4.27.30 4.26.30 4.27.29 4.26.29 4.27.28 4.26.28 4.27.27 4.26.27 4.27.26 4.26.26 4.27.25 4.26.25 4.27.24 4.26.24
PCIE:DRP1C 4.27.39 4.26.39 4.27.38 4.26.38 4.27.37 4.26.37 4.27.36 4.26.36 4.27.35 4.26.35 4.27.34 4.26.34 4.27.33 4.26.33 4.27.32 4.26.32
PCIE:DRP1D 4.27.47 4.26.47 4.27.46 4.26.46 4.27.45 4.26.45 4.27.44 4.26.44 4.27.43 4.26.43 4.27.42 4.26.42 4.27.41 4.26.41 4.27.40 4.26.40
PCIE:DRP1E 5.27.7 5.26.7 5.27.6 5.26.6 5.27.5 5.26.5 5.27.4 5.26.4 5.27.3 5.26.3 5.27.2 5.26.2 5.27.1 5.26.1 5.27.0 5.26.0
PCIE:DRP1F 5.27.15 5.26.15 5.27.14 5.26.14 5.27.13 5.26.13 5.27.12 5.26.12 5.27.11 5.26.11 5.27.10 5.26.10 5.27.9 5.26.9 5.27.8 5.26.8
PCIE:DRP20 5.27.23 5.26.23 5.27.22 5.26.22 5.27.21 5.26.21 5.27.20 5.26.20 5.27.19 5.26.19 5.27.18 5.26.18 5.27.17 5.26.17 5.27.16 5.26.16
PCIE:DRP21 5.27.31 5.26.31 5.27.30 5.26.30 5.27.29 5.26.29 5.27.28 5.26.28 5.27.27 5.26.27 5.27.26 5.26.26 5.27.25 5.26.25 5.27.24 5.26.24
PCIE:DRP22 5.27.39 5.26.39 5.27.38 5.26.38 5.27.37 5.26.37 5.27.36 5.26.36 5.27.35 5.26.35 5.27.34 5.26.34 5.27.33 5.26.33 5.27.32 5.26.32
PCIE:DRP23 5.27.47 5.26.47 5.27.46 5.26.46 5.27.45 5.26.45 5.27.44 5.26.44 5.27.43 5.26.43 5.27.42 5.26.42 5.27.41 5.26.41 5.27.40 5.26.40
PCIE:DRP24 6.27.7 6.26.7 6.27.6 6.26.6 6.27.5 6.26.5 6.27.4 6.26.4 6.27.3 6.26.3 6.27.2 6.26.2 6.27.1 6.26.1 6.27.0 6.26.0
PCIE:DRP25 6.27.15 6.26.15 6.27.14 6.26.14 6.27.13 6.26.13 6.27.12 6.26.12 6.27.11 6.26.11 6.27.10 6.26.10 6.27.9 6.26.9 6.27.8 6.26.8
PCIE:DRP26 6.27.23 6.26.23 6.27.22 6.26.22 6.27.21 6.26.21 6.27.20 6.26.20 6.27.19 6.26.19 6.27.18 6.26.18 6.27.17 6.26.17 6.27.16 6.26.16
PCIE:DRP27 6.27.31 6.26.31 6.27.30 6.26.30 6.27.29 6.26.29 6.27.28 6.26.28 6.27.27 6.26.27 6.27.26 6.26.26 6.27.25 6.26.25 6.27.24 6.26.24
PCIE:DRP28 6.27.39 6.26.39 6.27.38 6.26.38 6.27.37 6.26.37 6.27.36 6.26.36 6.27.35 6.26.35 6.27.34 6.26.34 6.27.33 6.26.33 6.27.32 6.26.32
PCIE:DRP29 6.27.47 6.26.47 6.27.46 6.26.46 6.27.45 6.26.45 6.27.44 6.26.44 6.27.43 6.26.43 6.27.42 6.26.42 6.27.41 6.26.41 6.27.40 6.26.40
PCIE:DRP2A 7.27.7 7.26.7 7.27.6 7.26.6 7.27.5 7.26.5 7.27.4 7.26.4 7.27.3 7.26.3 7.27.2 7.26.2 7.27.1 7.26.1 7.27.0 7.26.0
PCIE:DRP2B 7.27.15 7.26.15 7.27.14 7.26.14 7.27.13 7.26.13 7.27.12 7.26.12 7.27.11 7.26.11 7.27.10 7.26.10 7.27.9 7.26.9 7.27.8 7.26.8
PCIE:DRP2C 7.27.23 7.26.23 7.27.22 7.26.22 7.27.21 7.26.21 7.27.20 7.26.20 7.27.19 7.26.19 7.27.18 7.26.18 7.27.17 7.26.17 7.27.16 7.26.16
PCIE:DRP2D 7.27.31 7.26.31 7.27.30 7.26.30 7.27.29 7.26.29 7.27.28 7.26.28 7.27.27 7.26.27 7.27.26 7.26.26 7.27.25 7.26.25 7.27.24 7.26.24
PCIE:DRP2E 7.27.39 7.26.39 7.27.38 7.26.38 7.27.37 7.26.37 7.27.36 7.26.36 7.27.35 7.26.35 7.27.34 7.26.34 7.27.33 7.26.33 7.27.32 7.26.32
PCIE:DRP2F 7.27.47 7.26.47 7.27.46 7.26.46 7.27.45 7.26.45 7.27.44 7.26.44 7.27.43 7.26.43 7.27.42 7.26.42 7.27.41 7.26.41 7.27.40 7.26.40
PCIE:DRP30 8.27.7 8.26.7 8.27.6 8.26.6 8.27.5 8.26.5 8.27.4 8.26.4 8.27.3 8.26.3 8.27.2 8.26.2 8.27.1 8.26.1 8.27.0 8.26.0
PCIE:DRP31 8.27.15 8.26.15 8.27.14 8.26.14 8.27.13 8.26.13 8.27.12 8.26.12 8.27.11 8.26.11 8.27.10 8.26.10 8.27.9 8.26.9 8.27.8 8.26.8
PCIE:DRP32 8.27.23 8.26.23 8.27.22 8.26.22 8.27.21 8.26.21 8.27.20 8.26.20 8.27.19 8.26.19 8.27.18 8.26.18 8.27.17 8.26.17 8.27.16 8.26.16
PCIE:DRP33 8.27.31 8.26.31 8.27.30 8.26.30 8.27.29 8.26.29 8.27.28 8.26.28 8.27.27 8.26.27 8.27.26 8.26.26 8.27.25 8.26.25 8.27.24 8.26.24
PCIE:DRP34 8.27.39 8.26.39 8.27.38 8.26.38 8.27.37 8.26.37 8.27.36 8.26.36 8.27.35 8.26.35 8.27.34 8.26.34 8.27.33 8.26.33 8.27.32 8.26.32
PCIE:DRP35 8.27.47 8.26.47 8.27.46 8.26.46 8.27.45 8.26.45 8.27.44 8.26.44 8.27.43 8.26.43 8.27.42 8.26.42 8.27.41 8.26.41 8.27.40 8.26.40
PCIE:DRP36 9.27.7 9.26.7 9.27.6 9.26.6 9.27.5 9.26.5 9.27.4 9.26.4 9.27.3 9.26.3 9.27.2 9.26.2 9.27.1 9.26.1 9.27.0 9.26.0
PCIE:DRP37 9.27.15 9.26.15 9.27.14 9.26.14 9.27.13 9.26.13 9.27.12 9.26.12 9.27.11 9.26.11 9.27.10 9.26.10 9.27.9 9.26.9 9.27.8 9.26.8
PCIE:DRP38 9.27.23 9.26.23 9.27.22 9.26.22 9.27.21 9.26.21 9.27.20 9.26.20 9.27.19 9.26.19 9.27.18 9.26.18 9.27.17 9.26.17 9.27.16 9.26.16
PCIE:DRP39 9.27.31 9.26.31 9.27.30 9.26.30 9.27.29 9.26.29 9.27.28 9.26.28 9.27.27 9.26.27 9.27.26 9.26.26 9.27.25 9.26.25 9.27.24 9.26.24
PCIE:DRP3A 9.27.39 9.26.39 9.27.38 9.26.38 9.27.37 9.26.37 9.27.36 9.26.36 9.27.35 9.26.35 9.27.34 9.26.34 9.27.33 9.26.33 9.27.32 9.26.32
PCIE:DRP3B 9.27.47 9.26.47 9.27.46 9.26.46 9.27.45 9.26.45 9.27.44 9.26.44 9.27.43 9.26.43 9.27.42 9.26.42 9.27.41 9.26.41 9.27.40 9.26.40
PCIE:DRP3C 10.27.7 10.26.7 10.27.6 10.26.6 10.27.5 10.26.5 10.27.4 10.26.4 10.27.3 10.26.3 10.27.2 10.26.2 10.27.1 10.26.1 10.27.0 10.26.0
PCIE:DRP3D 10.27.15 10.26.15 10.27.14 10.26.14 10.27.13 10.26.13 10.27.12 10.26.12 10.27.11 10.26.11 10.27.10 10.26.10 10.27.9 10.26.9 10.27.8 10.26.8
PCIE:DRP3E 10.27.23 10.26.23 10.27.22 10.26.22 10.27.21 10.26.21 10.27.20 10.26.20 10.27.19 10.26.19 10.27.18 10.26.18 10.27.17 10.26.17 10.27.16 10.26.16
PCIE:DRP3F 10.27.31 10.26.31 10.27.30 10.26.30 10.27.29 10.26.29 10.27.28 10.26.28 10.27.27 10.26.27 10.27.26 10.26.26 10.27.25 10.26.25 10.27.24 10.26.24
PCIE:DRP40 10.27.39 10.26.39 10.27.38 10.26.38 10.27.37 10.26.37 10.27.36 10.26.36 10.27.35 10.26.35 10.27.34 10.26.34 10.27.33 10.26.33 10.27.32 10.26.32
PCIE:DRP41 10.27.47 10.26.47 10.27.46 10.26.46 10.27.45 10.26.45 10.27.44 10.26.44 10.27.43 10.26.43 10.27.42 10.26.42 10.27.41 10.26.41 10.27.40 10.26.40
PCIE:DRP42 11.27.7 11.26.7 11.27.6 11.26.6 11.27.5 11.26.5 11.27.4 11.26.4 11.27.3 11.26.3 11.27.2 11.26.2 11.27.1 11.26.1 11.27.0 11.26.0
PCIE:DRP43 11.27.15 11.26.15 11.27.14 11.26.14 11.27.13 11.26.13 11.27.12 11.26.12 11.27.11 11.26.11 11.27.10 11.26.10 11.27.9 11.26.9 11.27.8 11.26.8
PCIE:DRP44 11.27.23 11.26.23 11.27.22 11.26.22 11.27.21 11.26.21 11.27.20 11.26.20 11.27.19 11.26.19 11.27.18 11.26.18 11.27.17 11.26.17 11.27.16 11.26.16
PCIE:DRP45 11.27.31 11.26.31 11.27.30 11.26.30 11.27.29 11.26.29 11.27.28 11.26.28 11.27.27 11.26.27 11.27.26 11.26.26 11.27.25 11.26.25 11.27.24 11.26.24
PCIE:DRP46 11.27.39 11.26.39 11.27.38 11.26.38 11.27.37 11.26.37 11.27.36 11.26.36 11.27.35 11.26.35 11.27.34 11.26.34 11.27.33 11.26.33 11.27.32 11.26.32
PCIE:DRP47 11.27.47 11.26.47 11.27.46 11.26.46 11.27.45 11.26.45 11.27.44 11.26.44 11.27.43 11.26.43 11.27.42 11.26.42 11.27.41 11.26.41 11.27.40 11.26.40
PCIE:DRP48 12.27.7 12.26.7 12.27.6 12.26.6 12.27.5 12.26.5 12.27.4 12.26.4 12.27.3 12.26.3 12.27.2 12.26.2 12.27.1 12.26.1 12.27.0 12.26.0
PCIE:DRP49 12.27.15 12.26.15 12.27.14 12.26.14 12.27.13 12.26.13 12.27.12 12.26.12 12.27.11 12.26.11 12.27.10 12.26.10 12.27.9 12.26.9 12.27.8 12.26.8
PCIE:DRP4A 12.27.23 12.26.23 12.27.22 12.26.22 12.27.21 12.26.21 12.27.20 12.26.20 12.27.19 12.26.19 12.27.18 12.26.18 12.27.17 12.26.17 12.27.16 12.26.16
PCIE:DRP4B 12.27.31 12.26.31 12.27.30 12.26.30 12.27.29 12.26.29 12.27.28 12.26.28 12.27.27 12.26.27 12.27.26 12.26.26 12.27.25 12.26.25 12.27.24 12.26.24
PCIE:DRP4C 12.27.39 12.26.39 12.27.38 12.26.38 12.27.37 12.26.37 12.27.36 12.26.36 12.27.35 12.26.35 12.27.34 12.26.34 12.27.33 12.26.33 12.27.32 12.26.32
PCIE:DRP4D 12.27.47 12.26.47 12.27.46 12.26.46 12.27.45 12.26.45 12.27.44 12.26.44 12.27.43 12.26.43 12.27.42 12.26.42 12.27.41 12.26.41 12.27.40 12.26.40
PCIE:DRP4E 13.27.7 13.26.7 13.27.6 13.26.6 13.27.5 13.26.5 13.27.4 13.26.4 13.27.3 13.26.3 13.27.2 13.26.2 13.27.1 13.26.1 13.27.0 13.26.0
PCIE:DRP4F 13.27.15 13.26.15 13.27.14 13.26.14 13.27.13 13.26.13 13.27.12 13.26.12 13.27.11 13.26.11 13.27.10 13.26.10 13.27.9 13.26.9 13.27.8 13.26.8
PCIE:DRP50 13.27.23 13.26.23 13.27.22 13.26.22 13.27.21 13.26.21 13.27.20 13.26.20 13.27.19 13.26.19 13.27.18 13.26.18 13.27.17 13.26.17 13.27.16 13.26.16
PCIE:DRP51 13.27.31 13.26.31 13.27.30 13.26.30 13.27.29 13.26.29 13.27.28 13.26.28 13.27.27 13.26.27 13.27.26 13.26.26 13.27.25 13.26.25 13.27.24 13.26.24
PCIE:DRP52 13.27.39 13.26.39 13.27.38 13.26.38 13.27.37 13.26.37 13.27.36 13.26.36 13.27.35 13.26.35 13.27.34 13.26.34 13.27.33 13.26.33 13.27.32 13.26.32
PCIE:DRP53 13.27.47 13.26.47 13.27.46 13.26.46 13.27.45 13.26.45 13.27.44 13.26.44 13.27.43 13.26.43 13.27.42 13.26.42 13.27.41 13.26.41 13.27.40 13.26.40
PCIE:DRP54 14.27.7 14.26.7 14.27.6 14.26.6 14.27.5 14.26.5 14.27.4 14.26.4 14.27.3 14.26.3 14.27.2 14.26.2 14.27.1 14.26.1 14.27.0 14.26.0
PCIE:DRP55 14.27.15 14.26.15 14.27.14 14.26.14 14.27.13 14.26.13 14.27.12 14.26.12 14.27.11 14.26.11 14.27.10 14.26.10 14.27.9 14.26.9 14.27.8 14.26.8
PCIE:DRP56 14.27.23 14.26.23 14.27.22 14.26.22 14.27.21 14.26.21 14.27.20 14.26.20 14.27.19 14.26.19 14.27.18 14.26.18 14.27.17 14.26.17 14.27.16 14.26.16
PCIE:DRP57 14.27.31 14.26.31 14.27.30 14.26.30 14.27.29 14.26.29 14.27.28 14.26.28 14.27.27 14.26.27 14.27.26 14.26.26 14.27.25 14.26.25 14.27.24 14.26.24
PCIE:DRP58 14.27.39 14.26.39 14.27.38 14.26.38 14.27.37 14.26.37 14.27.36 14.26.36 14.27.35 14.26.35 14.27.34 14.26.34 14.27.33 14.26.33 14.27.32 14.26.32
PCIE:DRP59 14.27.47 14.26.47 14.27.46 14.26.46 14.27.45 14.26.45 14.27.44 14.26.44 14.27.43 14.26.43 14.27.42 14.26.42 14.27.41 14.26.41 14.27.40 14.26.40
PCIE:DRP5A 15.27.7 15.26.7 15.27.6 15.26.6 15.27.5 15.26.5 15.27.4 15.26.4 15.27.3 15.26.3 15.27.2 15.26.2 15.27.1 15.26.1 15.27.0 15.26.0
PCIE:DRP5B 15.27.15 15.26.15 15.27.14 15.26.14 15.27.13 15.26.13 15.27.12 15.26.12 15.27.11 15.26.11 15.27.10 15.26.10 15.27.9 15.26.9 15.27.8 15.26.8
PCIE:DRP5C 15.27.23 15.26.23 15.27.22 15.26.22 15.27.21 15.26.21 15.27.20 15.26.20 15.27.19 15.26.19 15.27.18 15.26.18 15.27.17 15.26.17 15.27.16 15.26.16
PCIE:DRP5D 15.27.31 15.26.31 15.27.30 15.26.30 15.27.29 15.26.29 15.27.28 15.26.28 15.27.27 15.26.27 15.27.26 15.26.26 15.27.25 15.26.25 15.27.24 15.26.24
PCIE:DRP5E 15.27.39 15.26.39 15.27.38 15.26.38 15.27.37 15.26.37 15.27.36 15.26.36 15.27.35 15.26.35 15.27.34 15.26.34 15.27.33 15.26.33 15.27.32 15.26.32
PCIE:DRP5F 15.27.47 15.26.47 15.27.46 15.26.46 15.27.45 15.26.45 15.27.44 15.26.44 15.27.43 15.26.43 15.27.42 15.26.42 15.27.41 15.26.41 15.27.40 15.26.40
PCIE:DRP60 16.27.7 16.26.7 16.27.6 16.26.6 16.27.5 16.26.5 16.27.4 16.26.4 16.27.3 16.26.3 16.27.2 16.26.2 16.27.1 16.26.1 16.27.0 16.26.0
PCIE:DRP61 16.27.15 16.26.15 16.27.14 16.26.14 16.27.13 16.26.13 16.27.12 16.26.12 16.27.11 16.26.11 16.27.10 16.26.10 16.27.9 16.26.9 16.27.8 16.26.8
PCIE:DRP62 16.27.23 16.26.23 16.27.22 16.26.22 16.27.21 16.26.21 16.27.20 16.26.20 16.27.19 16.26.19 16.27.18 16.26.18 16.27.17 16.26.17 16.27.16 16.26.16
PCIE:DRP63 16.27.31 16.26.31 16.27.30 16.26.30 16.27.29 16.26.29 16.27.28 16.26.28 16.27.27 16.26.27 16.27.26 16.26.26 16.27.25 16.26.25 16.27.24 16.26.24
PCIE:DRP64 16.27.39 16.26.39 16.27.38 16.26.38 16.27.37 16.26.37 16.27.36 16.26.36 16.27.35 16.26.35 16.27.34 16.26.34 16.27.33 16.26.33 16.27.32 16.26.32
PCIE:DRP65 16.27.47 16.26.47 16.27.46 16.26.46 16.27.45 16.26.45 16.27.44 16.26.44 16.27.43 16.26.43 16.27.42 16.26.42 16.27.41 16.26.41 16.27.40 16.26.40
PCIE:DRP66 17.27.7 17.26.7 17.27.6 17.26.6 17.27.5 17.26.5 17.27.4 17.26.4 17.27.3 17.26.3 17.27.2 17.26.2 17.27.1 17.26.1 17.27.0 17.26.0
PCIE:DRP67 17.27.15 17.26.15 17.27.14 17.26.14 17.27.13 17.26.13 17.27.12 17.26.12 17.27.11 17.26.11 17.27.10 17.26.10 17.27.9 17.26.9 17.27.8 17.26.8
PCIE:DRP68 17.27.23 17.26.23 17.27.22 17.26.22 17.27.21 17.26.21 17.27.20 17.26.20 17.27.19 17.26.19 17.27.18 17.26.18 17.27.17 17.26.17 17.27.16 17.26.16
PCIE:DRP69 17.27.31 17.26.31 17.27.30 17.26.30 17.27.29 17.26.29 17.27.28 17.26.28 17.27.27 17.26.27 17.27.26 17.26.26 17.27.25 17.26.25 17.27.24 17.26.24
PCIE:DRP6A 17.27.39 17.26.39 17.27.38 17.26.38 17.27.37 17.26.37 17.27.36 17.26.36 17.27.35 17.26.35 17.27.34 17.26.34 17.27.33 17.26.33 17.27.32 17.26.32
PCIE:DRP6B 17.27.47 17.26.47 17.27.46 17.26.46 17.27.45 17.26.45 17.27.44 17.26.44 17.27.43 17.26.43 17.27.42 17.26.42 17.27.41 17.26.41 17.27.40 17.26.40
PCIE:DRP6C 18.27.7 18.26.7 18.27.6 18.26.6 18.27.5 18.26.5 18.27.4 18.26.4 18.27.3 18.26.3 18.27.2 18.26.2 18.27.1 18.26.1 18.27.0 18.26.0
PCIE:DRP6D 18.27.15 18.26.15 18.27.14 18.26.14 18.27.13 18.26.13 18.27.12 18.26.12 18.27.11 18.26.11 18.27.10 18.26.10 18.27.9 18.26.9 18.27.8 18.26.8
PCIE:DRP6E 18.27.23 18.26.23 18.27.22 18.26.22 18.27.21 18.26.21 18.27.20 18.26.20 18.27.19 18.26.19 18.27.18 18.26.18 18.27.17 18.26.17 18.27.16 18.26.16
PCIE:DRP6F 18.27.31 18.26.31 18.27.30 18.26.30 18.27.29 18.26.29 18.27.28 18.26.28 18.27.27 18.26.27 18.27.26 18.26.26 18.27.25 18.26.25 18.27.24 18.26.24
PCIE:DRP70 18.27.39 18.26.39 18.27.38 18.26.38 18.27.37 18.26.37 18.27.36 18.26.36 18.27.35 18.26.35 18.27.34 18.26.34 18.27.33 18.26.33 18.27.32 18.26.32
PCIE:DRP71 18.27.47 18.26.47 18.27.46 18.26.46 18.27.45 18.26.45 18.27.44 18.26.44 18.27.43 18.26.43 18.27.42 18.26.42 18.27.41 18.26.41 18.27.40 18.26.40
PCIE:DRP72 19.27.7 19.26.7 19.27.6 19.26.6 19.27.5 19.26.5 19.27.4 19.26.4 19.27.3 19.26.3 19.27.2 19.26.2 19.27.1 19.26.1 19.27.0 19.26.0
PCIE:DRP73 19.27.15 19.26.15 19.27.14 19.26.14 19.27.13 19.26.13 19.27.12 19.26.12 19.27.11 19.26.11 19.27.10 19.26.10 19.27.9 19.26.9 19.27.8 19.26.8
PCIE:DRP74 19.27.23 19.26.23 19.27.22 19.26.22 19.27.21 19.26.21 19.27.20 19.26.20 19.27.19 19.26.19 19.27.18 19.26.18 19.27.17 19.26.17 19.27.16 19.26.16
PCIE:DRP75 19.27.31 19.26.31 19.27.30 19.26.30 19.27.29 19.26.29 19.27.28 19.26.28 19.27.27 19.26.27 19.27.26 19.26.26 19.27.25 19.26.25 19.27.24 19.26.24
PCIE:DRP76 19.27.39 19.26.39 19.27.38 19.26.38 19.27.37 19.26.37 19.27.36 19.26.36 19.27.35 19.26.35 19.27.34 19.26.34 19.27.33 19.26.33 19.27.32 19.26.32
PCIE:DRP77 19.27.47 19.26.47 19.27.46 19.26.46 19.27.45 19.26.45 19.27.44 19.26.44 19.27.43 19.26.43 19.27.42 19.26.42 19.27.41 19.26.41 19.27.40 19.26.40
PCIE:DSN_CAP_ID 4.27.39 4.26.39 4.27.38 4.26.38 4.27.37 4.26.37 4.27.36 4.26.36 4.27.35 4.26.35 4.27.34 4.26.34 4.27.33 4.26.33 4.27.32 4.26.32
PCIE:SUBSYSTEM_ID 10.27.15 10.26.15 10.27.14 10.26.14 10.27.13 10.26.13 10.27.12 10.26.12 10.27.11 10.26.11 10.27.10 10.26.10 10.27.9 10.26.9 10.27.8 10.26.8
PCIE:SUBSYSTEM_VENDOR_ID 10.27.23 10.26.23 10.27.22 10.26.22 10.27.21 10.26.21 10.27.20 10.26.20 10.27.19 10.26.19 10.27.18 10.26.18 10.27.17 10.26.17 10.27.16 10.26.16
PCIE:VC_CAP_ID 10.27.47 10.26.47 10.27.46 10.26.46 10.27.45 10.26.45 10.27.44 10.26.44 10.27.43 10.26.43 10.27.42 10.26.42 10.27.41 10.26.41 10.27.40 10.26.40
PCIE:VENDOR_ID 11.27.15 11.26.15 11.27.14 11.26.14 11.27.13 11.26.13 11.27.12 11.26.12 11.27.11 11.26.11 11.27.10 11.26.10 11.27.9 11.26.9 11.27.8 11.26.8
PCIE:VSEC_CAP_HDR_ID 11.27.31 11.26.31 11.27.30 11.26.30 11.27.29 11.26.29 11.27.28 11.26.28 11.27.27 11.26.27 11.27.26 11.26.26 11.27.25 11.26.25 11.27.24 11.26.24
PCIE:VSEC_CAP_ID 11.27.47 11.26.47 11.27.46 11.26.46 11.27.45 11.26.45 11.27.44 11.26.44 11.27.43 11.26.43 11.27.42 11.26.42 11.27.41 11.26.41 11.27.40 11.26.40
non-inverted [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:AER_CAP_INT_MSG_NUM_MSI 0.26.18 0.27.17 0.26.17 0.27.16 0.26.16
PCIE:AER_CAP_INT_MSG_NUM_MSIX 0.27.20 0.26.20 0.27.19 0.26.19 0.27.18
PCIE:INFER_EI 12.27.44 12.26.44 12.27.43 12.26.43 12.27.42
PCIE:PCIE_CAP_INT_MSG_NUM 8.26.6 8.27.5 8.26.5 8.27.4 8.26.4
PCIE:PM_CAP_PMESUPPORT 8.26.35 8.27.34 8.26.34 8.27.33 8.26.33
PCIE:VC0_TX_LASTPACKET 14.27.37 14.26.37 14.27.36 14.26.36 14.27.35
non-inverted [4] [3] [2] [1] [0]
PCIE:AER_CAP_VERSION 0.26.23 0.27.22 0.26.22 0.27.21
PCIE:CPL_TIMEOUT_RANGES_SUPPORTED 3.27.46 3.26.46 3.27.45 3.26.45
PCIE:DSN_CAP_VERSION 5.27.1 5.26.1 5.27.0 5.26.0
PCIE:LINK_CAP_MAX_LINK_SPEED 5.27.46 5.26.46 5.27.45 5.26.45
PCIE:LINK_CTRL2_TARGET_LINK_SPEED 6.27.3 6.26.3 6.27.2 6.26.2
PCIE:PCIE_CAP_CAPABILITY_VERSION 8.27.1 8.26.1 8.27.0 8.26.0
PCIE:PCIE_CAP_DEVICE_PORT_TYPE 8.27.3 8.26.3 8.27.2 8.26.2
PCIE:PCIE_REVISION 8.27.15 8.26.15 8.27.14 8.26.14
PCIE:VC_CAP_VERSION 13.26.45 13.27.44 13.26.44 13.27.43
PCIE:VSEC_CAP_HDR_REVISION 11.27.39 11.26.39 11.27.38 11.26.38
PCIE:VSEC_CAP_VERSION 12.27.9 12.26.9 12.27.8 12.26.8
non-inverted [3] [2] [1] [0]
PCIE:BAR0 1.27.7 1.26.7 1.27.6 1.26.6 1.27.5 1.26.5 1.27.4 1.26.4 1.27.3 1.26.3 1.27.2 1.26.2 1.27.1 1.26.1 1.27.0 1.26.0 0.27.47 0.26.47 0.27.46 0.26.46 0.27.45 0.26.45 0.27.44 0.26.44 0.27.43 0.26.43 0.27.42 0.26.42 0.27.41 0.26.41 0.27.40 0.26.40
PCIE:BAR1 1.27.23 1.26.23 1.27.22 1.26.22 1.27.21 1.26.21 1.27.20 1.26.20 1.27.19 1.26.19 1.27.18 1.26.18 1.27.17 1.26.17 1.27.16 1.26.16 1.27.15 1.26.15 1.27.14 1.26.14 1.27.13 1.26.13 1.27.12 1.26.12 1.27.11 1.26.11 1.27.10 1.26.10 1.27.9 1.26.9 1.27.8 1.26.8
PCIE:BAR2 1.27.39 1.26.39 1.27.38 1.26.38 1.27.37 1.26.37 1.27.36 1.26.36 1.27.35 1.26.35 1.27.34 1.26.34 1.27.33 1.26.33 1.27.32 1.26.32 1.27.31 1.26.31 1.27.30 1.26.30 1.27.29 1.26.29 1.27.28 1.26.28 1.27.27 1.26.27 1.27.26 1.26.26 1.27.25 1.26.25 1.27.24 1.26.24
PCIE:BAR3 2.27.7 2.26.7 2.27.6 2.26.6 2.27.5 2.26.5 2.27.4 2.26.4 2.27.3 2.26.3 2.27.2 2.26.2 2.27.1 2.26.1 2.27.0 2.26.0 1.27.47 1.26.47 1.27.46 1.26.46 1.27.45 1.26.45 1.27.44 1.26.44 1.27.43 1.26.43 1.27.42 1.26.42 1.27.41 1.26.41 1.27.40 1.26.40
PCIE:BAR4 2.27.23 2.26.23 2.27.22 2.26.22 2.27.21 2.26.21 2.27.20 2.26.20 2.27.19 2.26.19 2.27.18 2.26.18 2.27.17 2.26.17 2.27.16 2.26.16 2.27.15 2.26.15 2.27.14 2.26.14 2.27.13 2.26.13 2.27.12 2.26.12 2.27.11 2.26.11 2.27.10 2.26.10 2.27.9 2.26.9 2.27.8 2.26.8
PCIE:BAR5 2.27.39 2.26.39 2.27.38 2.26.38 2.27.37 2.26.37 2.27.36 2.26.36 2.27.35 2.26.35 2.27.34 2.26.34 2.27.33 2.26.33 2.27.32 2.26.32 2.27.31 2.26.31 2.27.30 2.26.30 2.27.29 2.26.29 2.27.28 2.26.28 2.27.27 2.26.27 2.27.26 2.26.26 2.27.25 2.26.25 2.27.24 2.26.24
PCIE:CARDBUS_CIS_POINTER 3.27.31 3.26.31 3.27.30 3.26.30 3.27.29 3.26.29 3.27.28 3.26.28 3.27.27 3.26.27 3.27.26 3.26.26 3.27.25 3.26.25 3.27.24 3.26.24 3.27.23 3.26.23 3.27.22 3.26.22 3.27.21 3.26.21 3.27.20 3.26.20 3.27.19 3.26.19 3.27.18 3.26.18 3.27.17 3.26.17 3.27.16 3.26.16
PCIE:EXPANSION_ROM 3.27.7 3.26.7 3.27.6 3.26.6 3.27.5 3.26.5 3.27.4 3.26.4 3.27.3 3.26.3 3.27.2 3.26.2 3.27.1 3.26.1 3.27.0 3.26.0 2.27.47 2.26.47 2.27.46 2.26.46 2.27.45 2.26.45 2.27.44 2.26.44 2.27.43 2.26.43 2.27.42 2.26.42 2.27.41 2.26.41 2.27.40 2.26.40
PCIE:SPARE_WORD0 15.27.47 15.26.47 15.27.46 15.26.46 15.27.45 15.26.45 15.27.44 15.26.44 15.27.43 15.26.43 15.27.42 15.26.42 15.27.41 15.26.41 15.27.40 15.26.40 15.27.39 15.26.39 15.27.38 15.26.38 15.27.37 15.26.37 15.27.36 15.26.36 15.27.35 15.26.35 15.27.34 15.26.34 15.27.33 15.26.33 15.27.32 15.26.32
PCIE:SPARE_WORD1 16.27.15 16.26.15 16.27.14 16.26.14 16.27.13 16.26.13 16.27.12 16.26.12 16.27.11 16.26.11 16.27.10 16.26.10 16.27.9 16.26.9 16.27.8 16.26.8 16.27.7 16.26.7 16.27.6 16.26.6 16.27.5 16.26.5 16.27.4 16.26.4 16.27.3 16.26.3 16.27.2 16.26.2 16.27.1 16.26.1 16.27.0 16.26.0
PCIE:SPARE_WORD2 16.27.31 16.26.31 16.27.30 16.26.30 16.27.29 16.26.29 16.27.28 16.26.28 16.27.27 16.26.27 16.27.26 16.26.26 16.27.25 16.26.25 16.27.24 16.26.24 16.27.23 16.26.23 16.27.22 16.26.22 16.27.21 16.26.21 16.27.20 16.26.20 16.27.19 16.26.19 16.27.18 16.26.18 16.27.17 16.26.17 16.27.16 16.26.16
PCIE:SPARE_WORD3 16.27.47 16.26.47 16.27.46 16.26.46 16.27.45 16.26.45 16.27.44 16.26.44 16.27.43 16.26.43 16.27.42 16.26.42 16.27.41 16.26.41 16.27.40 16.26.40 16.27.39 16.26.39 16.27.38 16.26.38 16.27.37 16.26.37 16.27.36 16.26.36 16.27.35 16.26.35 16.27.34 16.26.34 16.27.33 16.26.33 16.27.32 16.26.32
non-inverted [31] [30] [29] [28] [27] [26] [25] [24] [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:CAPABILITIES_PTR 3.27.11 3.26.11 3.27.10 3.26.10 3.27.9 3.26.9 3.27.8 3.26.8
PCIE:DNSTREAM_LINK_NUM 13.27.27 13.26.27 13.27.26 13.26.26 13.27.25 13.26.25 13.27.24 13.26.24
PCIE:HEADER_TYPE 5.27.19 5.26.19 5.27.18 5.26.18 5.27.17 5.26.17 5.27.16 5.26.16
PCIE:INTERRUPT_PIN 5.27.23 5.26.23 5.27.22 5.26.22 5.27.21 5.26.21 5.27.20 5.26.20
PCIE:MSIX_BASE_PTR 6.27.35 6.26.35 6.27.34 6.26.34 6.27.33 6.26.33 6.27.32 6.26.32
PCIE:MSIX_CAP_ID 6.27.39 6.26.39 6.27.38 6.26.38 6.27.37 6.26.37 6.27.36 6.26.36
PCIE:MSIX_CAP_NEXTPTR 6.27.43 6.26.43 6.27.42 6.26.42 6.27.41 6.26.41 6.27.40 6.26.40
PCIE:MSI_BASE_PTR 6.27.11 6.26.11 6.27.10 6.26.10 6.27.9 6.26.9 6.27.8 6.26.8
PCIE:MSI_CAP_ID 6.27.19 6.26.19 6.27.18 6.26.18 6.27.17 6.26.17 6.27.16 6.26.16
PCIE:MSI_CAP_NEXTPTR 6.27.27 6.26.27 6.27.26 6.26.26 6.27.25 6.26.25 6.27.24 6.26.24
PCIE:N_FTS_COMCLK_GEN1 13.27.6 13.26.6 13.27.5 13.26.5 13.27.4 13.26.4 13.27.3 13.26.3
PCIE:N_FTS_COMCLK_GEN2 13.27.11 13.26.11 13.27.10 13.26.10 13.27.9 13.26.9 13.27.8 13.26.8
PCIE:N_FTS_GEN1 13.27.15 13.26.15 13.27.14 13.26.14 13.27.13 13.26.13 13.27.12 13.26.12
PCIE:N_FTS_GEN2 13.27.19 13.26.19 13.27.18 13.26.18 13.27.17 13.26.17 13.27.16 13.26.16
PCIE:PCIE_BASE_PTR 7.27.43 7.26.43 7.27.42 7.26.42 7.27.41 7.26.41 7.27.40 7.26.40
PCIE:PCIE_CAP_CAPABILITY_ID 7.27.47 7.26.47 7.27.46 7.26.46 7.27.45 7.26.45 7.27.44 7.26.44
PCIE:PCIE_CAP_NEXTPTR 8.27.11 8.26.11 8.27.10 8.26.10 8.27.9 8.26.9 8.27.8 8.26.8
PCIE:PM_BASE_PTR 8.27.19 8.26.19 8.27.18 8.26.18 8.27.17 8.26.17 8.27.16 8.26.16
PCIE:PM_CAP_ID 8.27.27 8.26.27 8.27.26 8.26.26 8.27.25 8.26.25 8.27.24 8.26.24
PCIE:PM_CAP_NEXTPTR 8.27.31 8.26.31 8.27.30 8.26.30 8.27.29 8.26.29 8.27.28 8.26.28
PCIE:PM_DATA0 9.27.3 9.26.3 9.27.2 9.26.2 9.27.1 9.26.1 9.27.0 9.26.0
PCIE:PM_DATA1 9.27.7 9.26.7 9.27.6 9.26.6 9.27.5 9.26.5 9.27.4 9.26.4
PCIE:PM_DATA2 9.27.11 9.26.11 9.27.10 9.26.10 9.27.9 9.26.9 9.27.8 9.26.8
PCIE:PM_DATA3 9.27.15 9.26.15 9.27.14 9.26.14 9.27.13 9.26.13 9.27.12 9.26.12
PCIE:PM_DATA4 9.27.19 9.26.19 9.27.18 9.26.18 9.27.17 9.26.17 9.27.16 9.26.16
PCIE:PM_DATA5 9.27.23 9.26.23 9.27.22 9.26.22 9.27.21 9.26.21 9.27.20 9.26.20
PCIE:PM_DATA6 9.27.27 9.26.27 9.27.26 9.26.26 9.27.25 9.26.25 9.27.24 9.26.24
PCIE:PM_DATA7 9.27.31 9.26.31 9.27.30 9.26.30 9.27.29 9.26.29 9.27.28 9.26.28
PCIE:REVISION_ID 9.27.35 9.26.35 9.27.34 9.26.34 9.27.33 9.26.33 9.27.32 9.26.32
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE 10.27.4 10.26.4 10.27.3 10.26.3 10.27.2 10.26.2 10.27.1 10.26.1
PCIE:SPARE_BYTE0 15.26.13 15.27.12 15.26.12 15.27.11 15.26.11 15.27.10 15.26.10 15.27.9
PCIE:SPARE_BYTE1 15.27.19 15.26.19 15.27.18 15.26.18 15.27.17 15.26.17 15.27.16 15.26.16
PCIE:SPARE_BYTE2 15.27.23 15.26.23 15.27.22 15.26.22 15.27.21 15.26.21 15.27.20 15.26.20
PCIE:SPARE_BYTE3 15.27.27 15.26.27 15.27.26 15.26.26 15.27.25 15.26.25 15.27.24 15.26.24
non-inverted [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:CLASS_CODE 3.27.43 3.26.43 3.27.42 3.26.42 3.27.41 3.26.41 3.27.40 3.26.40 3.27.39 3.26.39 3.27.38 3.26.38 3.27.37 3.26.37 3.27.36 3.26.36 3.27.35 3.26.35 3.27.34 3.26.34 3.27.33 3.26.33 3.27.32 3.26.32
non-inverted [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:CRM_MODULE_RSTS 12.27.14 12.26.14 12.27.13 12.26.13 12.27.12 12.26.12 12.27.11
PCIE:VC0_TOTAL_CREDITS_CH 14.26.19 14.27.18 14.26.18 14.27.17 14.26.17 14.27.16 14.26.16
PCIE:VC0_TOTAL_CREDITS_NPH 14.27.22 14.26.22 14.27.21 14.26.21 14.27.20 14.26.20 14.27.19
PCIE:VC0_TOTAL_CREDITS_PH 14.26.35 14.27.34 14.26.34 14.27.33 14.26.33 14.27.32 14.26.32
non-inverted [6] [5] [4] [3] [2] [1] [0]
PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY 4.26.1 4.27.0 4.26.0
PCIE:DEV_CAP_ENDPOINT_L1_LATENCY 4.27.2 4.26.2 4.27.1
PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED 4.26.5 4.27.4 4.26.4
PCIE:DEV_CAP_RSVD_14_12 4.26.9 4.27.8 4.26.8
PCIE:DEV_CAP_RSVD_31_29 4.27.11 4.26.11 4.27.10
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 5.26.33 5.27.32 5.26.32
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 5.27.34 5.26.34 5.27.33
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1 5.26.36 5.27.35 5.26.35
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2 5.27.37 5.26.37 5.27.36
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 5.26.39 5.27.38 5.26.38
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 5.26.41 5.27.40 5.26.40
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1 5.27.42 5.26.42 5.27.41
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2 5.26.44 5.27.43 5.26.43
PCIE:MSIX_CAP_PBA_BIR 6.27.45 6.26.45 6.27.44
PCIE:MSIX_CAP_TABLE_BIR 7.27.15 7.26.15 7.27.14
PCIE:MSI_CAP_MULTIMSGCAP 6.27.21 6.26.21 6.27.20
PCIE:PGL0_LANE 14.26.41 14.27.40 14.26.40
PCIE:PGL1_LANE 14.27.42 14.26.42 14.27.41
PCIE:PGL2_LANE 14.26.44 14.27.43 14.26.43
PCIE:PGL3_LANE 14.27.45 14.26.45 14.27.44
PCIE:PGL4_LANE 14.26.47 14.27.46 14.26.46
PCIE:PGL5_LANE 15.26.1 15.27.0 15.26.0
PCIE:PGL6_LANE 15.27.2 15.26.2 15.27.1
PCIE:PGL7_LANE 15.26.4 15.27.3 15.26.3
PCIE:PL_AUTO_CONFIG 13.27.21 13.26.21 13.27.20
PCIE:PM_CAP_AUXCURRENT 8.26.21 8.27.20 8.26.20
PCIE:PM_CAP_VERSION 8.26.37 8.27.36 8.26.36
PCIE:USER_CLK_FREQ 12.26.11 12.27.10 12.26.10
non-inverted [2] [1] [0]
PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT 4.26.6 4.27.5
PCIE:DEV_CAP_RSVD_17_16 4.26.10 4.27.9
PCIE:LINK_CAP_ASPM_SUPPORT 5.26.30 5.27.29
PCIE:LINK_CAP_RSVD_23_22 5.27.47 5.26.47
PCIE:LL_ACK_TIMEOUT_FUNC 12.27.24 12.26.24
PCIE:LL_REPLAY_TIMEOUT_FUNC 12.27.40 12.26.40
PCIE:PCIE_CAP_RSVD_15_14 8.26.13 8.27.12
PCIE:PM_DATA_SCALE0 8.27.39 8.26.39
PCIE:PM_DATA_SCALE1 8.27.40 8.26.40
PCIE:PM_DATA_SCALE2 8.27.41 8.26.41
PCIE:PM_DATA_SCALE3 8.27.42 8.26.42
PCIE:PM_DATA_SCALE4 8.27.43 8.26.43
PCIE:PM_DATA_SCALE5 8.27.44 8.26.44
PCIE:PM_DATA_SCALE6 8.27.45 8.26.45
PCIE:PM_DATA_SCALE7 8.27.46 8.26.46
PCIE:RECRC_CHK 14.27.38 14.26.38
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE 10.27.0 10.26.0
PCIE:TL_RX_RAM_RDATA_LATENCY 13.26.39 13.27.38
PCIE:TL_TX_RAM_RDATA_LATENCY 13.27.42 13.26.42
non-inverted [1] [0]
PCIE:ENABLE_MSG_ROUTE 13.26.37 13.27.36 13.26.36 13.27.35 13.26.35 13.27.34 13.26.34 13.27.33 13.26.33 13.27.32 13.26.32
PCIE:MSIX_CAP_TABLE_SIZE 7.26.37 7.27.36 7.26.36 7.27.35 7.26.35 7.27.34 7.26.34 7.27.33 7.26.33 7.27.32 7.26.32
PCIE:VC0_TOTAL_CREDITS_CD 14.26.13 14.27.12 14.26.12 14.27.11 14.26.11 14.27.10 14.26.10 14.27.9 14.26.9 14.27.8 14.26.8
PCIE:VC0_TOTAL_CREDITS_PD 14.26.29 14.27.28 14.26.28 14.27.27 14.26.27 14.27.26 14.26.26 14.27.25 14.26.25 14.27.24 14.26.24
non-inverted [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:EXT_CFG_CAP_PTR 5.27.4 5.26.4 5.27.3 5.26.3 5.27.2 5.26.2
PCIE:LINK_CAP_MAX_LINK_WIDTH 12.27.47 12.26.47 12.27.46 12.26.46 12.27.45 12.26.45
PCIE:LTSSM_MAX_LINK_WIDTH 13.27.2 13.26.2 13.27.1 13.26.1 13.27.0 13.26.0
non-inverted [5] [4] [3] [2] [1] [0]
PCIE:EXT_CFG_XP_CAP_PTR 5.27.12 5.26.12 5.27.11 5.26.11 5.27.10 5.26.10 5.27.9 5.26.9 5.27.8 5.26.8
PCIE:LAST_CONFIG_DWORD 5.26.29 5.27.28 5.26.28 5.27.27 5.26.27 5.27.26 5.26.26 5.27.25 5.26.25 5.27.24
non-inverted [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:LL_ACK_TIMEOUT 12.26.23 12.27.22 12.26.22 12.27.21 12.26.21 12.27.20 12.26.20 12.27.19 12.26.19 12.27.18 12.26.18 12.27.17 12.26.17 12.27.16 12.26.16
PCIE:LL_REPLAY_TIMEOUT 12.26.39 12.27.38 12.26.38 12.27.37 12.26.37 12.27.36 12.26.36 12.27.35 12.26.35 12.27.34 12.26.34 12.27.33 12.26.33 12.27.32 12.26.32
non-inverted [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:MSIX_CAP_PBA_OFFSET 7.26.14 7.27.13 7.26.13 7.27.12 7.26.12 7.27.11 7.26.11 7.27.10 7.26.10 7.27.9 7.26.9 7.27.8 7.26.8 7.27.7 7.26.7 7.27.6 7.26.6 7.27.5 7.26.5 7.27.4 7.26.4 7.27.3 7.26.3 7.27.2 7.26.2 7.27.1 7.26.1 7.27.0 7.26.0
PCIE:MSIX_CAP_TABLE_OFFSET 7.26.30 7.27.29 7.26.29 7.27.28 7.26.28 7.27.27 7.26.27 7.27.26 7.26.26 7.27.25 7.26.25 7.27.24 7.26.24 7.27.23 7.26.23 7.27.22 7.26.22 7.27.21 7.26.21 7.27.20 7.26.20 7.27.19 7.26.19 7.27.18 7.26.18 7.27.17 7.26.17 7.27.16 7.26.16
non-inverted [28] [27] [26] [25] [24] [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM 9.27.46 9.26.46 9.27.45 9.26.45 9.27.44 9.26.44 9.27.43 9.26.43 9.27.42 9.26.42 9.27.41 9.26.41 9.27.40
PCIE:VC0_RX_RAM_LIMIT 14.26.6 14.27.5 14.26.5 14.27.4 14.26.4 14.27.3 14.26.3 14.27.2 14.26.2 14.27.1 14.26.1 14.27.0 14.26.0
non-inverted [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]