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Configurable Logic Block

Tile CLB.0

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.V0.S.STUBbuffer
TCELL0_SINGLE.V0.S.STUBTCELL0_SINGLE.V0.Sbuffer
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel wires

xc3000a CLB.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y

Bitstream

xc3000a CLB.0 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB
5 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
xc3000a CLB.0 bittile 1
BitFrame
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB ~INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - -
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB 0.20.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.7
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.19.6
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.15.6
INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB 0.21.5
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.17.6
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.18.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.11.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB 0.16.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.7
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.11.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.7
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.10.6
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.10.7
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.5.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB 0.0.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.7.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.5
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.5
INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB 0.0.6
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.5
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S 0.5.5
INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 0.19.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB 0.20.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.11.6
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.8.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.5
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.0.4
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.1.4
INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB 1.20.4
INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S 1.19.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.4
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1

Tile CLB.1

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.V2.S.STUBbuffer
TCELL0_SINGLE.V2.S.STUBTCELL0_SINGLE.V2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel wires

xc3000a CLB.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y

Bitstream

xc3000a CLB.1 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E
5 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES - -
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
xc3000a CLB.1 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S ~INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB 0.19.6
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.20.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.7
INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E 0.15.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S 0.21.5
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 0.17.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S 0.18.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.11.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.16.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.7
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB 0.11.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.7
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.10.6
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB 0.10.7
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.5.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.0.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB 0.7.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.5
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.0.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.5.5
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.19.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.20.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB 0.11.6
INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB 0.8.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.5
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.18.4
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.17.4
INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB 1.8.4
INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S 1.9.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.4
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1

Tile CLB.2

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel wires

xc3000a CLB.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y

Bitstream

xc3000a CLB.2 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E
5 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.20.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.7
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.19.6
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.15.6
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.21.5
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.17.6
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.18.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB 0.11.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.16.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.7
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB 0.10.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.11.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E 0.5.6
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S 0.10.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 0.2.6
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S 0.5.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.0.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.7.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.5
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.0.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.5.5
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.19.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.20.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.11.6
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.8.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.5
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.0.4
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.1.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.4
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1

Tile CLB.L.0

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.L.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.V.L2.S.STUBbuffer
TCELL0_SINGLE.V.L2.S.STUBTCELL0_SINGLE.V.L2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.L.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.L.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.L.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.L.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.L.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.L.0 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.L.0 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel wires

xc3000a CLB.L.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.L.0 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L2.S.STUB.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
6 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
5 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
xc3000a CLB.L.0 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V.L2.S.STUB.0.SINGLE.V.L2.S ~INT:BUF.SINGLE.V.L2.S.0.SINGLE.V.L2.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.SINGLE.V.L0 0.21.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S 0.20.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L1 0.19.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S 0.21.5
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S.STUB 0.5.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L3 0.3.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S 0.1.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S.STUB 0.5.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.7
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0 0.10.7
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0.S 0.9.7
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4 0.0.5
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4.S 0.2.5
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.7
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S.STUB 0.5.5
INT:BIPASS.SINGLE.V.L2.S.STUB.SINGLE.V.L3 0.6.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S.STUB 0.7.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.7
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.6
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.7
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S 0.4.5
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S 0.1.5
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.4
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.0.4
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.1.4
INT:BUF.SINGLE.V.L2.S.0.SINGLE.V.L2.S.STUB 1.8.4
INT:BUF.SINGLE.V.L2.S.STUB.0.SINGLE.V.L2.S 1.9.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.5
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.5
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.3
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.4
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.4
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.5
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.4
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.4
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.4
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.5
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.5
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.5
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.5
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.5
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.2.6
IO_W0:READBACK_IFF 0.8.6
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.7 0.28.7 0.26.7 0.23.7 0.24.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.7
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_W0:SLEW 0.25.7
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1

Tile CLB.L.1

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.L.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.V.L4.S.STUBbuffer
TCELL0_SINGLE.V.L4.S.STUBTCELL0_SINGLE.V.L4.Sbuffer
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.L.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.L.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.L.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.L.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.L.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.L.1 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.L.1 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel wires

xc3000a CLB.L.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.L.1 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
6 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
5 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S.STUB ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S.STUB ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S.STUB ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S - -
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
xc3000a CLB.L.1 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V.L4.S.STUB.0.SINGLE.V.L4.S ~INT:BUF.SINGLE.V.L4.S.0.SINGLE.V.L4.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0 0.21.7
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0.S 0.20.7
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1 0.19.7
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1.S 0.21.5
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S 0.5.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L3 0.3.7
INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S 0.1.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S 0.5.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L0 0.10.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S 0.9.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L4 0.0.5
INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S.STUB 0.2.5
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.7
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S 0.5.5
INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 0.6.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S 0.7.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.7
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.6
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.7
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S.STUB 0.4.5
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S.STUB 0.1.5
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.4
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.18.4
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.17.4
INT:BUF.SINGLE.V.L4.S.0.SINGLE.V.L4.S.STUB 1.8.4
INT:BUF.SINGLE.V.L4.S.STUB.0.SINGLE.V.L4.S 1.9.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.5
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.5
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.3
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.4
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.4
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.5
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.4
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.4
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.4
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.5
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.5
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.5
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.5
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.5
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.2.6
IO_W0:READBACK_IFF 0.8.6
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.7 0.28.7 0.26.7 0.23.7 0.24.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.7
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_W0:SLEW 0.25.7
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1

Tile CLB.L.2

Cells: 4

Bel INT

Switchbox INT

xc3000a CLB.L.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL3_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.L.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.L.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.L.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.L.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.L.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.L.2 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.L.2 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel wires

xc3000a CLB.L.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.L.2 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
6 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
5 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H0.SINGLE.V.L0 0.21.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S 0.20.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L1 0.19.7
INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S 0.21.5
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.7
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S 0.5.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 0.3.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S 0.1.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S 0.5.6
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.7
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L0 0.10.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S 0.9.7
INT:BIPASS.SINGLE.H4.SINGLE.V.L4 0.0.5
INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S 0.2.5
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.7
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.7
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.7
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S 0.5.5
INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 0.6.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S 0.7.7
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.7
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.6
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.7
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S 0.4.5
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S 0.1.5
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.4
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.3
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.0.4
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.1.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.5
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.5
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.5
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.3
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.4
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.4
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.5
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.4
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.4
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.4
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.5
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.5
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.5
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.5
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.5
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.2.6
IO_W0:READBACK_IFF 0.8.6
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
3.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.7 0.28.7 0.26.7 0.23.7 0.24.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.7
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_W0:SLEW 0.25.7
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1

Tile CLB.R.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.R.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.V0.S.STUBbuffer
TCELL0_SINGLE.V0.S.STUBTCELL0_SINGLE.V0.Sbuffer
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.V.R2.S.STUBbuffer
TCELL0_SINGLE.V.R2.S.STUBTCELL0_SINGLE.V.R2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.R.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.R.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.R.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.R.0 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.R.0 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.R.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.R.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.R.0 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.R.0 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel wires

xc3000a CLB.R.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.R.0 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
5 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
xc3000a CLB.R.0 bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB ~INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - ~INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB ~INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S - - - - - - -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB 0.34.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.7
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.33.6
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.29.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.6
INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB 0.35.5
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.31.6
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.32.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.6
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.25.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.7
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.24.6
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.19.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.5
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.24.7
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.16.6
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.19.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB 0.14.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.21.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.5
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.6
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.5
INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB 0.14.6
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.5
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S 0.5.5
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S 0.19.5
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.7
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB 0.8.7
INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 0.2.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB 0.4.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.6
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.5
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.7
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S 0.1.6
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S 0.4.5
INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 0.33.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB 0.34.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.25.6
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.22.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.5
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.4
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.3
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.14.4
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.15.4
INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB 1.8.0
INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S 1.7.0
INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB 1.34.4
INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S 1.33.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.5
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.5
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.4
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.4
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.4
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.5
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.4
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.4
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.4
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.4
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.9.5
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.5 0.2.5 0.0.4 0.2.4 0.1.4
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
SLOW 0
FAST 1

Tile CLB.R.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.R.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.V2.S.STUBbuffer
TCELL0_SINGLE.V2.S.STUBTCELL0_SINGLE.V2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.V.R4.S.STUBbuffer
TCELL0_SINGLE.V.R4.S.STUBTCELL0_SINGLE.V.R4.Sbuffer
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.R.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.R.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.R.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.R.1 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.R.1 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.R.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.R.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.R.1 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.R.1 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel wires

xc3000a CLB.R.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.R.1 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4 ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
5 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S.STUB ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S.STUB ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES - - ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
xc3000a CLB.R.1 bittile 1
BitFrame
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S ~INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - ~INT:BUF.SINGLE.V.R4.S.0.SINGLE.V.R4.S.STUB ~INT:BUF.SINGLE.V.R4.S.STUB.0.SINGLE.V.R4.S - - - - - - -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB 0.33.6
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.34.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E 0.29.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S 0.35.5
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 0.31.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S 0.32.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.6
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB 0.25.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.7
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.24.6
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.19.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.5
INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB 0.24.7
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.16.6
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.19.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.14.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB 0.21.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.5
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.6
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.14.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S.STUB 0.5.5
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.19.5
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.7
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S 0.8.7
INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 0.2.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S 0.4.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.6
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.5
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.7
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S.STUB 0.1.6
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S.STUB 0.4.5
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.33.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.34.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB 0.25.6
INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB 0.22.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.5
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.4
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.3
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.32.4
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.31.4
INT:BUF.SINGLE.V.R4.S.0.SINGLE.V.R4.S.STUB 1.8.0
INT:BUF.SINGLE.V.R4.S.STUB.0.SINGLE.V.R4.S 1.7.0
INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB 1.22.4
INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S 1.23.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.5
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.5
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.4
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.4
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.4
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.5
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.4
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.4
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.4
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.4
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.9.5
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.5 0.2.5 0.0.4 0.2.4 0.1.4
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
SLOW 0
FAST 1

Tile CLB.R.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.R.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.R.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.R.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.R.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.R.2 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.R.2 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.R.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.R.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.R.2 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.R.2 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel wires

xc3000a CLB.R.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.R.2 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4 ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
5 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.34.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.7
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.33.6
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.29.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.6
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.35.5
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.31.6
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.32.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.6
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB 0.24.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.25.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.7
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.5
INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E 0.19.6
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S 0.24.7
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 0.16.6
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S 0.19.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.14.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.21.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.5
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.6
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.14.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S 0.5.5
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.19.5
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.7
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S 0.8.7
INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 0.2.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S 0.4.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.6
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.5
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.7
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S 0.1.6
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S 0.4.5
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.33.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.34.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.25.6
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.22.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.5
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.4
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.3
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.14.4
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.15.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.5
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.5
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.4
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.4
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.4
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.5
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.4
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.4
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.4
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.4
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.9.5
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.5 0.2.5 0.0.4 0.2.4 0.1.4
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
SLOW 0
FAST 1

Tile CLB.R.3

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.R.3 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.V2.S.STUBbuffer
TCELL0_SINGLE.V2.S.STUBTCELL0_SINGLE.V2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.R.3 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.R.3 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.R.3 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.R.3 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.R.3 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.R.3 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.R.3 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.R.3 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.R.3 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel wires

xc3000a CLB.R.3 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.R.3 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4 ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
6 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
5 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES - - ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
xc3000a CLB.R.3 bittile 1
BitFrame
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S ~INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB 0.33.6
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.34.7
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.7
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.6
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E 0.29.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S 0.35.5
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 0.31.6
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S 0.32.6
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.6
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.7
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.7
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.6
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.6
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.7
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.6
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.6
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB 0.25.5
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.7
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.24.6
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.19.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S 0.3.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.6
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.5
INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB 0.24.7
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.16.6
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.19.7
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.14.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB 0.21.6
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.7
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.7
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.5
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S 0.3.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.7
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.6
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.6
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.5
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.14.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.6
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S 0.5.5
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.19.5
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.7
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.7
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.7
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S 0.8.7
INT:BIPASS.SINGLE.V.R2.S.SINGLE.V.R3 0.2.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S 0.4.7
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.6
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.5
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.7
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S 0.1.6
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S 0.4.5
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.33.7
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.34.6
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.7
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.7
INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB 0.25.6
INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB 0.22.6
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.7
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.6
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.7
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.5
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.5
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.4
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.3
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.3
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.32.4
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.31.4
INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB 1.22.4
INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S 1.23.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.5
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.3
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.5
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.4
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.4
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.5
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.4
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.5
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.4
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.4
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.4
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.4
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.4
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.9.5
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.5 0.2.5 0.0.4 0.2.4 0.1.4
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
SLOW 0
FAST 1

Tile CLB.B.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.B.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B0.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B1.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_SINGLE.H.B2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B2.ETCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBTCELL0_SINGLE.H.B2buffer
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B3.ETCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B4.ETCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.B0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.V0.S.STUBbuffer
TCELL0_SINGLE.V0.S.STUBTCELL0_SINGLE.V0.Sbuffer
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.B1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.IO.B0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.B1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.B.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.B.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.B.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_S0

xc3000a CLB.B.0 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.B.0 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.B.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q

Bitstream

xc3000a CLB.B.0 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB
11 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB
10 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
9 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB
8 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:BIPASS.SINGLE.H.B3.SINGLE.V0 - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 ~INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E ~INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 ~INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 ~INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB ~INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E ~INT:BIPASS.SINGLE.H.B3.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E ~INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E ~INT:PASS.SINGLE.V0.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 ~INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E
2 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q ~INT:BUF.LONG.IO.B0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.B0 ~INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.B1 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 ~INT:BUF.LONG.IO.B1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E
1 INT:MUX.IMUX.BIOB0.O[3] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[4] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[2] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
xc3000a CLB.B.0 bittile 1
BitFrame
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB ~INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - -
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 0.2.1
INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 0.1.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E 0.0.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E 0.0.3
INT:BIPASS.SINGLE.H.B0.SINGLE.V4 0.1.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB 0.5.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 0.7.4
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 0.6.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E 0.4.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E 0.4.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V2 0.5.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V3 0.4.4
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB 0.9.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 0.12.3
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 0.7.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 0.8.3
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E 0.12.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 0.7.3
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 0.13.4
INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 0.21.2
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 0.21.3
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 0.20.2
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E 0.19.3
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E 0.17.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V0 0.21.4
INT:BIPASS.SINGLE.H.B3.SINGLE.V1 0.18.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 0.18.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 0.16.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 0.13.3
INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E 0.16.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V0 0.20.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V1 0.17.2
INT:BIPASS.SINGLE.H.B4.SINGLE.V4 0.14.3
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.11
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB 0.20.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.12
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.19.11
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.15.11
INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB 0.21.10
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.17.11
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.18.11
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.11.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB 0.16.11
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.11
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.12
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.12
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.10
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.11
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.11.10
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.10.11
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.5.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.10.12
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.2.11
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.5.12
INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB 0.0.12
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.7.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.12
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.10
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.12
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.11
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.10
INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB 0.0.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.10
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 0.1.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S 0.5.10
INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 0.19.12
INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB 0.20.11
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.12
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.11
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.12
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.11.11
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.6.11
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.8.11
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.12
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.11
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.12
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.10
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B0.0.SINGLE.V0 0.13.2
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.B1.0.SINGLE.V3 0.6.2
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB 0.6.4
INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 0.5.4
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.0.9
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.1.9
INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB 1.20.4
INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S 1.19.4
INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E 0.8.4
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E 0.14.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.8
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.9
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.9
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V0.0.LONG.IO.B0 0.12.2
INT:PASS.SINGLE.V0.0.OUT.BIOB0.I 0.15.3
INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E 0.19.2
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.9
INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q 0.11.4
INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E 0.11.2
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.8
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.8
INT:PASS.SINGLE.V3.0.LONG.IO.B1 0.8.2
INT:PASS.SINGLE.V3.0.OUT.BIOB0.I 0.9.3
INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E 0.10.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.9
INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q 0.11.3
INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E 0.10.2
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.9
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.19.1 0.21.1 0.20.0 0.21.0 0.20.1
0.LONG.IO.B0 0 0 1 0 1
0.SINGLE.H.B1 0 0 1 1 1
0.LONG.V0 0 1 0 0 1
0.SINGLE.H.B3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V3 1 0 1 0 1
0.SINGLE.V4 1 0 1 1 0
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V1 1 0 0 1
0.SINGLE.V3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V2 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
SLOW 0
FAST 1

Tile CLB.B.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.B.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_SINGLE.H.B0.STUBbuffer
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H.B0.ETCELL0_SINGLE.H.B0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B0.STUBTCELL0_SINGLE.H.B0buffer
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B1.ETCELL0_SINGLE.H.B0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2.ETCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B3.ETCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B4.ETCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_SINGLE.V0.STUBbuffer
TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V0.STUBTCELL0_SINGLE.V0buffer
TCELL0_LONG.IO.B0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.V2.S.STUBbuffer
TCELL0_SINGLE.V2.S.STUBTCELL0_SINGLE.V2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.B1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.IO.B0TCELL0_SINGLE.V0.STUBbuffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.B1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V0.STUBmux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2.STUBmux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.B.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.B.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.B.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_S0

xc3000a CLB.B.1 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.B.1 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.B.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q

Bitstream

xc3000a CLB.B.1 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4
11 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB ~INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E
10 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
9 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E ~INT:BUF.SINGLE.V0.0.SINGLE.V0.STUB ~INT:BUF.SINGLE.V0.STUB.0.SINGLE.V0 ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES - -
8 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:BIPASS.SINGLE.H.B3.SINGLE.V0.STUB - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 ~INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.SINGLE.H.B3.E ~INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 ~INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 ~INT:BUF.SINGLE.H.B0.0.SINGLE.H.B0.STUB ~INT:BUF.SINGLE.H.B0.STUB.0.SINGLE.H.B0 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0.STUB ~INT:BIPASS.SINGLE.H.B4.SINGLE.V0.STUB ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E ~INT:BIPASS.SINGLE.H.B3.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E ~INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E ~INT:PASS.SINGLE.V0.STUB.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 ~INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.H.B1.E
2 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.STUB.0.OUT.BIOB1.Q.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0.STUB ~INT:BIPASS.SINGLE.H.B4.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q ~INT:BUF.LONG.IO.B0.0.SINGLE.V0.STUB ~INT:PASS.SINGLE.V0.STUB.0.LONG.IO.B0 ~INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E ~INT:BIPASS.SINGLE.H.B2.SINGLE.H.B2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.B1 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 ~INT:BUF.LONG.IO.B1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B0.STUB
1 INT:MUX.IMUX.BIOB0.O[3] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[4] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[2] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
xc3000a CLB.B.1 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S ~INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B0.STUB 0.0.2
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 0.2.1
INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 0.1.2
INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.H.B1.E 0.0.3
INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.V4 0.1.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2 0.5.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 0.7.4
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 0.6.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E 0.4.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E 0.4.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V2 0.5.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V3 0.4.4
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 0.12.3
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 0.7.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 0.8.3
INT:BIPASS.SINGLE.H.B2.SINGLE.H.B2.E 0.9.2
INT:BIPASS.SINGLE.H.B2.SINGLE.H.B3.E 0.12.4
INT:BIPASS.SINGLE.H.B2.SINGLE.V2 0.7.3
INT:BIPASS.SINGLE.H.B2.SINGLE.V3 0.13.4
INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 0.21.2
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0.STUB 0.21.3
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 0.20.2
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E 0.19.3
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E 0.17.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V0.STUB 0.21.4
INT:BIPASS.SINGLE.H.B3.SINGLE.V1 0.18.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0.STUB 0.18.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 0.16.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 0.13.3
INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E 0.16.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V0.STUB 0.20.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V1 0.17.2
INT:BIPASS.SINGLE.H.B4.SINGLE.V4 0.14.3
INT:BIPASS.SINGLE.H0.E.SINGLE.H0.STUB 0.19.11
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.11
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.20.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.12
INT:BIPASS.SINGLE.H0.STUB.SINGLE.H1.E 0.15.11
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V0.S 0.21.10
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1 0.17.11
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V1.S 0.18.11
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.11.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.16.11
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.11
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.12
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.12
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.10
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.11
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S.STUB 0.11.10
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.10.11
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.5.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S.STUB 0.10.12
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.2.11
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.5.12
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.0.12
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S.STUB 0.7.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.12
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.10
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.12
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.11
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.10
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.0.11
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.1.12
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.5.10
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.19.12
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.20.11
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.12
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.11
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.12
INT:BIPASS.SINGLE.V1.SINGLE.V2.S.STUB 0.11.11
INT:BIPASS.SINGLE.V2.S.STUB.SINGLE.V3 0.6.11
INT:BIPASS.SINGLE.V2.SINGLE.V2.S.STUB 0.8.11
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.12
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.11
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.12
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.10
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B0.0.SINGLE.V0.STUB 0.13.2
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.B1.0.SINGLE.V3 0.6.2
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B0.0.SINGLE.H.B0.STUB 0.6.4
INT:BUF.SINGLE.H.B0.STUB.0.SINGLE.H.B0 0.5.4
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.18.9
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.17.9
INT:BUF.SINGLE.V0.0.SINGLE.V0.STUB 0.20.9
INT:BUF.SINGLE.V0.STUB.0.SINGLE.V0 0.19.9
INT:BUF.SINGLE.V2.S.0.SINGLE.V2.S.STUB 1.8.4
INT:BUF.SINGLE.V2.S.STUB.0.SINGLE.V2.S 1.9.4
INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E 0.8.4
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E 0.14.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.8
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.9
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.9
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.9
INT:PASS.SINGLE.V0.STUB.0.LONG.IO.B0 0.12.2
INT:PASS.SINGLE.V0.STUB.0.OUT.BIOB0.I 0.15.3
INT:PASS.SINGLE.V0.STUB.0.OUT.BIOB1.Q.E 0.19.2
INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q 0.11.4
INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E 0.11.2
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.8
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.8
INT:PASS.SINGLE.V3.0.LONG.IO.B1 0.8.2
INT:PASS.SINGLE.V3.0.OUT.BIOB0.I 0.9.3
INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E 0.10.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.9
INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q 0.11.3
INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E 0.10.2
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.9
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.19.1 0.21.1 0.20.0 0.21.0 0.20.1
0.LONG.IO.B0 0 0 1 0 1
0.SINGLE.H.B1 0 0 1 1 1
0.LONG.V0 0 1 0 0 1
0.SINGLE.H.B3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0.STUB 1 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2.STUB 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V3 1 0 1 0 1
0.SINGLE.V4 1 0 1 1 0
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V1 1 0 0 1
0.SINGLE.V3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V2 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
SLOW 0
FAST 1

Tile CLB.B.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.B.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.CLB.X.Epass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B0.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B1.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V2.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2.ETCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V2.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B3.ETCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_SINGLE.H.B4.STUBbuffer
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B4.ETCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBTCELL0_SINGLE.H.B4buffer
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.B0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_SINGLE.V2.STUBbuffer
TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V2.STUBTCELL0_SINGLE.V2buffer
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.B1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_LONG.IO.B0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.B1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.B.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.B.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.B.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_S0

xc3000a CLB.B.2 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.B.2 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.B.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q

Bitstream

xc3000a CLB.B.2 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.S.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4
11 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E
10 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S
9 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] ~INT:BUF.SINGLE.V2.STUB.0.SINGLE.V2 ~INT:BUF.SINGLE.V2.0.SINGLE.V2.STUB INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB
8 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:BIPASS.SINGLE.H.B3.SINGLE.V0 ~INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB - - ~INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 ~INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.SINGLE.H.B3.E ~INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 ~INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2.STUB - - ~INT:BIPASS.SINGLE.H.B1.SINGLE.V3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E ~INT:BIPASS.SINGLE.H.B3.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.H.B4.STUB ~INT:PASS.SINGLE.V0.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 ~INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.SINGLE.V2.STUB ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E
2 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4.STUB ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q ~INT:BUF.LONG.IO.B0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.B0 ~INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E ~INT:BIPASS.SINGLE.H.B2.SINGLE.H.B2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.B1 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2.STUB ~INT:BUF.LONG.IO.B1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V2.STUB ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E
1 INT:MUX.IMUX.BIOB0.O[3] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[4] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[2] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 0.2.1
INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 0.1.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E 0.0.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E 0.0.3
INT:BIPASS.SINGLE.H.B0.SINGLE.V4 0.1.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2 0.5.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2.STUB 0.7.4
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 0.6.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E 0.4.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E 0.4.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V2.STUB 0.5.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V3 0.4.4
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 0.12.3
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2.STUB 0.7.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 0.8.3
INT:BIPASS.SINGLE.H.B2.SINGLE.H.B2.E 0.9.2
INT:BIPASS.SINGLE.H.B2.SINGLE.H.B3.E 0.12.4
INT:BIPASS.SINGLE.H.B2.SINGLE.V2.STUB 0.7.3
INT:BIPASS.SINGLE.H.B2.SINGLE.V3 0.13.4
INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4.STUB 0.21.2
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 0.21.3
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 0.20.2
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E 0.19.3
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E 0.17.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V0 0.21.4
INT:BIPASS.SINGLE.H.B3.SINGLE.V1 0.18.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.H.B4.STUB 0.16.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 0.18.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 0.16.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 0.13.3
INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V0 0.20.3
INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V1 0.17.2
INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V4 0.14.3
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.17.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.11
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.20.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.21.12
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.19.11
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.15.11
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.21.10
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.17.11
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.18.11
INT:BIPASS.SINGLE.H1.E.SINGLE.H2.STUB 0.11.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.14.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S 0.16.11
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.14.11
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.12.12
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.16.12
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.12.10
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.13.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H2.STUB 0.10.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.4.11
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.9.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.11.10
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.6.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.H3.E 0.5.11
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V2.S 0.10.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3 0.2.11
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V3.S 0.5.12
INT:BIPASS.SINGLE.H3.E.SINGLE.H4 0.0.12
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.9.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.7.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.3.12
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.1.10
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.7.12
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.3.11
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.3.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.2.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.0.10
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.0.11
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.1.12
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.5.10
INT:BIPASS.SINGLE.V0.S.SINGLE.V1 0.19.12
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.20.11
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.18.12
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.12.11
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.13.12
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.11.11
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.6.11
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.8.11
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.8.12
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.1.11
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.4.12
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.6.10
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.4.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B0.0.SINGLE.V0 0.13.2
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.B1.0.SINGLE.V3 0.6.2
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB 0.20.4
INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 0.17.4
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.0.9
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.1.9
INT:BUF.SINGLE.V2.0.SINGLE.V2.STUB 0.8.9
INT:BUF.SINGLE.V2.STUB.0.SINGLE.V2 0.9.9
INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E 0.8.4
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E 0.14.4
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.3.8
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.3.9
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.2.9
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V0.0.LONG.IO.B0 0.12.2
INT:PASS.SINGLE.V0.0.OUT.BIOB0.I 0.15.3
INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E 0.19.2
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.9
INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q 0.11.4
INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E 0.11.2
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.8
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.8
INT:PASS.SINGLE.V3.0.LONG.IO.B1 0.8.2
INT:PASS.SINGLE.V3.0.OUT.BIOB0.I 0.9.3
INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E 0.10.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.9
INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q 0.11.3
INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E 0.10.2
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.4.9
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.19.1 0.21.1 0.20.0 0.21.0 0.20.1
0.LONG.IO.B0 0 0 1 0 1
0.SINGLE.H.B1 0 0 1 1 1
0.LONG.V0 0 1 0 0 1
0.SINGLE.H.B3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V3 1 0 1 0 1
0.SINGLE.V4 1 0 1 1 0
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V1 1 0 0 1
0.SINGLE.V3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V2 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
SLOW 0
FAST 1

Tile CLB.BL.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.BL.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_SINGLE.H.B2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B2.STUBTCELL0_SINGLE.H.B2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.V.L2.S.STUBbuffer
TCELL0_SINGLE.V.L2.S.STUBTCELL0_SINGLE.V.L2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.L2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.L1TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_ACLKmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.BL.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BL.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BL.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.BL.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BL.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.BL.0 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.BL.0 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_S0

xc3000a CLB.BL.0 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BL.0 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.BL.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.BL.0 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L2.S.STUB.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
11 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
10 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S.STUB ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4
9 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB
8 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:INV.IOCLK.L1 INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[3] ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I - - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 - - - - ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 - - ~INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB ~INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 - - - - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.L0 - - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V.L0 - - - - - - - ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V.L2 ~INT:BUF.LONG.IO.B1.0.LONG.IO.L1 - - - ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4 -
2 - - - - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.B0 - - - - - - ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q - - - - - - ~INT:BUF.LONG.IO.L1.0.LONG.IO.B1 - - - ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 - ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I
1 - INT:MUX.IMUX.IOCLK0[4] INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:INV.IOCLK.B0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[2] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] - INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 - - - - MISC:READ[1] - - INT:MUX.IMUX.BIOB0.O[3] MISC:READ[0] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
xc3000a CLB.BL.0 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V.L2.S.STUB.0.SINGLE.V.L2.S ~INT:BUF.SINGLE.V.L2.S.0.SINGLE.V.L2.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4 0.1.3
INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 0.4.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V.L2 0.8.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 0.17.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V.L0 0.16.3
INT:BIPASS.SINGLE.H0.SINGLE.V.L0 0.21.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S 0.20.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1 0.19.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S 0.21.10
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L2 0.3.11
INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S.STUB 0.5.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L3 0.3.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S 0.1.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S.STUB 0.5.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0 0.10.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L0.S 0.9.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4 0.0.10
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V.L4.S 0.2.10
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.12
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S.STUB 0.5.10
INT:BIPASS.SINGLE.V.L2.S.STUB.SINGLE.V.L3 0.6.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S.STUB 0.7.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.12
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.11
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.12
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S 0.4.10
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S 0.1.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.6
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.8
INT:BUF.LONG.IO.B0.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.IO.L1 0.7.3
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.7
INT:BUF.LONG.IO.L0.0.LONG.IO.B0 0.22.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.9
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.6
INT:BUF.LONG.IO.L1.0.LONG.IO.B1 0.7.2
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB 0.6.4
INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 0.5.4
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.0.9
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.1.9
INT:BUF.SINGLE.V.L2.S.0.SINGLE.V.L2.S.STUB 1.8.4
INT:BUF.SINGLE.V.L2.S.STUB.0.SINGLE.V.L2.S 1.9.4
INT:INV.IOCLK.B0 0.22.1
INT:INV.IOCLK.L1 0.28.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I 0.0.2
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.10
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.10
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.8
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.9
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.9
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.10
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.9
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.9
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.9
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.10
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.9
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.10
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.8
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I 0.22.4
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.10
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.9
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.10
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.10
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
IO_W0:INV.O 0.28.10
IO_W0:READBACK_I 0.2.11
IO_W0:READBACK_IFF 0.8.11
IO_W1:INV.O 0.26.5
IO_W1:READBACK_I 0.9.8
IO_W1:READBACK_IFF 0.22.6
PULLUP_TBUF0:ENABLE 0.27.9
PULLUP_TBUF1:ENABLE 0.26.9
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
IO_W0:IFF_LATCH 0.26.8
IO_W0:INV.T 0.24.8
IO_W1:IFF_LATCH 0.25.7
IO_W1:INV.T 0.25.6
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.21.0 0.19.1 0.21.1 0.20.1
0.LONG.IO.B0 0 0 0 1
0.ACLK 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V.L3 1 0 1 0 1
0.SINGLE.V.L4 1 0 1 1 0
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V.L1 1 0 0 1
0.SINGLE.V.L3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V.L2 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.27.1 0.23.1 0.26.1 0.25.1 0.24.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L0 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.27.4 0.23.4 0.26.4 0.25.4 0.24.4
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B1 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.8
INT:MUX.IMUX.LIOB1.IK 0.27.7
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.12 0.28.12 0.26.12 0.23.12 0.24.12
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.12
INT:MUX.IMUX.LIOB1.OK 0.28.6
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.7 0.25.8 0.23.8
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.5 0.24.7 0.23.5 0.22.7 0.25.5
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
0.LONG.V1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.5 0.26.6 0.24.5
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
IO_W0:MUX.O 0.27.10
IO_W1:MUX.O 0.28.5
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
IO_W0:SLEW 0.25.12
IO_W1:SLEW 0.27.6
SLOW 0
FAST 1
MISC:READ 0.24.0 0.20.0
COMMAND 0 0
ONCE 0 1
DISABLE 1 1

Tile CLB.BL.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.BL.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_SINGLE.H0.STUBbuffer
TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.H0.STUBTCELL0_SINGLE.H0buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_SINGLE.H.B0.STUBbuffer
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_SINGLE.H.B0.STUBTCELL0_SINGLE.H.B0buffer
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0.STUBbidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B0.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.V.L4.S.STUBbuffer
TCELL0_SINGLE.V.L4.S.STUBTCELL0_SINGLE.V.L4.Sbuffer
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.L1TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_ACLKmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2.STUBmux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.BL.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BL.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BL.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.BL.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BL.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.BL.1 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.BL.1 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_S0

xc3000a CLB.BL.1 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BL.1 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.BL.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.BL.1 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
11 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
10 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S.STUB ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S.STUB ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S.STUB ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4
9 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - ~INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB ~INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S - -
8 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:INV.IOCLK.L1 INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[3] ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I - - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 - - - - ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 - - ~INT:BUF.SINGLE.H.B0.0.SINGLE.H.B0.STUB ~INT:BUF.SINGLE.H.B0.STUB.0.SINGLE.H.B0 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 - - - - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.L0 - - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V.L0 - - - - - - - ~INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 ~INT:BUF.LONG.IO.B1.0.LONG.IO.L1 - - - ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.V.L4 -
2 - - - - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.B0 - - - - - - ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q - - - - - - ~INT:BUF.LONG.IO.L1.0.LONG.IO.B1 - - - ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 - ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I
1 - INT:MUX.IMUX.IOCLK0[4] INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:INV.IOCLK.B0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[2] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] - INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 - - - - MISC:READ[1] - - INT:MUX.IMUX.BIOB0.O[3] MISC:READ[0] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
xc3000a CLB.BL.1 bittile 1
BitFrame
9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V.L4.S.STUB.0.SINGLE.V.L4.S ~INT:BUF.SINGLE.V.L4.S.0.SINGLE.V.L4.S.STUB - - - - - - - -
3 - - - - - - - - - -
2 - - - - - - - - - -
1 - - - - - - - - - -
0 - - - - - - - - - -
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.STUB.SINGLE.V.L4 0.1.3
INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 0.4.4
INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 0.8.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 0.17.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V.L0 0.16.3
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0 0.21.12
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L0.S 0.20.12
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1 0.19.12
INT:BIPASS.SINGLE.H0.STUB.SINGLE.V.L1.S 0.21.10
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L2 0.3.11
INT:BIPASS.SINGLE.H2.SINGLE.V.L2.S 0.5.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L3 0.3.12
INT:BIPASS.SINGLE.H2.SINGLE.V.L3.S 0.1.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S 0.5.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0 0.10.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S 0.9.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L4 0.0.10
INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S.STUB 0.2.10
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.12
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S 0.5.10
INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 0.6.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S 0.7.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.12
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.11
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.12
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S.STUB 0.4.10
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S.STUB 0.1.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.6
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.8
INT:BUF.LONG.IO.B0.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.IO.L1 0.7.3
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.7
INT:BUF.LONG.IO.L0.0.LONG.IO.B0 0.22.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.9
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.6
INT:BUF.LONG.IO.L1.0.LONG.IO.B1 0.7.2
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B0.0.SINGLE.H.B0.STUB 0.6.4
INT:BUF.SINGLE.H.B0.STUB.0.SINGLE.H.B0 0.5.4
INT:BUF.SINGLE.H0.0.SINGLE.H0.STUB 0.18.9
INT:BUF.SINGLE.H0.STUB.0.SINGLE.H0 0.17.9
INT:BUF.SINGLE.V.L4.S.0.SINGLE.V.L4.S.STUB 1.8.4
INT:BUF.SINGLE.V.L4.S.STUB.0.SINGLE.V.L4.S 1.9.4
INT:INV.IOCLK.B0 0.22.1
INT:INV.IOCLK.L1 0.28.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I 0.0.2
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.10
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.10
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.8
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.9
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.9
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.10
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.9
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.9
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.9
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.10
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.9
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.10
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.8
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I 0.22.4
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.10
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.9
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.10
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.10
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
IO_W0:INV.O 0.28.10
IO_W0:READBACK_I 0.2.11
IO_W0:READBACK_IFF 0.8.11
IO_W1:INV.O 0.26.5
IO_W1:READBACK_I 0.9.8
IO_W1:READBACK_IFF 0.22.6
PULLUP_TBUF0:ENABLE 0.27.9
PULLUP_TBUF1:ENABLE 0.26.9
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
IO_W0:IFF_LATCH 0.26.8
IO_W0:INV.T 0.24.8
IO_W1:IFF_LATCH 0.25.7
IO_W1:INV.T 0.25.6
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.21.0 0.19.1 0.21.1 0.20.1
0.LONG.IO.B0 0 0 0 1
0.ACLK 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2.STUB 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V.L3 1 0 1 0 1
0.SINGLE.V.L4 1 0 1 1 0
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V.L1 1 0 0 1
0.SINGLE.V.L3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V.L2 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.27.1 0.23.1 0.26.1 0.25.1 0.24.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L0 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.27.4 0.23.4 0.26.4 0.25.4 0.24.4
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B1 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.8
INT:MUX.IMUX.LIOB1.IK 0.27.7
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.12 0.28.12 0.26.12 0.23.12 0.24.12
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.12
INT:MUX.IMUX.LIOB1.OK 0.28.6
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.7 0.25.8 0.23.8
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.5 0.24.7 0.23.5 0.22.7 0.25.5
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
0.LONG.V1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.5 0.26.6 0.24.5
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
IO_W0:MUX.O 0.27.10
IO_W1:MUX.O 0.28.5
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
IO_W0:SLEW 0.25.12
IO_W1:SLEW 0.27.6
SLOW 0
FAST 1
MISC:READ 0.24.0 0.20.0
COMMAND 0 0
ONCE 0 1
DISABLE 1 1

Tile CLB.BL.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.BL.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_SINGLE.V.L4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_SINGLE.H.B4.STUBbuffer
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B4.STUBTCELL0_SINGLE.H.B4buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_SINGLE.V.L4.STUBbuffer
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.STUBTCELL0_SINGLE.V.L4buffer
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.L1TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_ACLKmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.BL.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BL.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BL.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.BL.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BL.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.BL.2 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.BL.2 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_S0

xc3000a CLB.BL.2 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BL.2 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.BL.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.BL.2 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
11 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
10 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4
9 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] ~INT:BUF.SINGLE.V.L4.STUB.0.SINGLE.V.L4 ~INT:BUF.SINGLE.V.L4.0.SINGLE.V.L4.STUB INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB
8 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:INV.IOCLK.L1 INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[3] ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I - ~INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB - - ~INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 - - - - ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 - - - - ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 - - - - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.L0 - - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V.L0 - - - - - - - ~INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 ~INT:BUF.LONG.IO.B1.0.LONG.IO.L1 - - - ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4.STUB -
2 - - - - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.B0 - - - - - - ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q - - - - - - ~INT:BUF.LONG.IO.L1.0.LONG.IO.B1 - - - ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 - ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I
1 - INT:MUX.IMUX.IOCLK0[4] INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:INV.IOCLK.B0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[2] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] - INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 - - - - MISC:READ[1] - - INT:MUX.IMUX.BIOB0.O[3] MISC:READ[0] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4.STUB 0.1.3
INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 0.4.4
INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 0.8.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 0.17.3
INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V.L0 0.16.3
INT:BIPASS.SINGLE.H0.SINGLE.V.L0 0.21.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S 0.20.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1 0.19.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S 0.21.10
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 0.3.11
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S 0.5.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 0.3.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S 0.1.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S 0.5.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0 0.10.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S 0.9.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L4 0.0.10
INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S 0.2.10
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.12
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S 0.5.10
INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 0.6.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S 0.7.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.12
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.11
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.12
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S 0.4.10
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S 0.1.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.6
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.8
INT:BUF.LONG.IO.B0.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.IO.L1 0.7.3
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.7
INT:BUF.LONG.IO.L0.0.LONG.IO.B0 0.22.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.9
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.6
INT:BUF.LONG.IO.L1.0.LONG.IO.B1 0.7.2
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB 0.20.4
INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 0.17.4
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.0.9
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.1.9
INT:BUF.SINGLE.V.L4.0.SINGLE.V.L4.STUB 0.8.9
INT:BUF.SINGLE.V.L4.STUB.0.SINGLE.V.L4 0.9.9
INT:INV.IOCLK.B0 0.22.1
INT:INV.IOCLK.L1 0.28.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I 0.0.2
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.10
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.10
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.8
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.9
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.9
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.10
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.9
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.9
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.9
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.10
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.9
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.10
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.8
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I 0.22.4
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.10
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.9
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.10
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.10
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
IO_W0:INV.O 0.28.10
IO_W0:READBACK_I 0.2.11
IO_W0:READBACK_IFF 0.8.11
IO_W1:INV.O 0.26.5
IO_W1:READBACK_I 0.9.8
IO_W1:READBACK_IFF 0.22.6
PULLUP_TBUF0:ENABLE 0.27.9
PULLUP_TBUF1:ENABLE 0.26.9
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
IO_W0:IFF_LATCH 0.26.8
IO_W0:INV.T 0.24.8
IO_W1:IFF_LATCH 0.25.7
IO_W1:INV.T 0.25.6
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.21.0 0.19.1 0.21.1 0.20.1
0.LONG.IO.B0 0 0 0 1
0.ACLK 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V.L3 1 0 1 0 1
0.SINGLE.V.L4 1 0 1 1 0
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V.L1 1 0 0 1
0.SINGLE.V.L3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V.L2 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.27.1 0.23.1 0.26.1 0.25.1 0.24.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L0 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.27.4 0.23.4 0.26.4 0.25.4 0.24.4
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B1 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.8
INT:MUX.IMUX.LIOB1.IK 0.27.7
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.12 0.28.12 0.26.12 0.23.12 0.24.12
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.12
INT:MUX.IMUX.LIOB1.OK 0.28.6
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.7 0.25.8 0.23.8
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.5 0.24.7 0.23.5 0.22.7 0.25.5
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
0.LONG.V1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.5 0.26.6 0.24.5
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
IO_W0:MUX.O 0.27.10
IO_W1:MUX.O 0.28.5
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
IO_W0:SLEW 0.25.12
IO_W1:SLEW 0.27.6
SLOW 0
FAST 1
MISC:READ 0.24.0 0.20.0
COMMAND 0 0
ONCE 0 1
DISABLE 1 1

Tile CLB.BLS.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.BLS.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.L0pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_SINGLE.H2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.H2.STUBTCELL0_SINGLE.H2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.L1pass transistor
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.I.Spass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Q.Spass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_SINGLE.V.L4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_SINGLE.H.B4.STUBbuffer
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B4.STUBTCELL0_SINGLE.H.B4buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.L0.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V.L1.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L2.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.L2.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L3.STCELL0_SINGLE.H2.STUBbidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_SINGLE.V.L4.STUBbuffer
TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.Sbidirectional pass transistor
TCELL0_SINGLE.V.L4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L4.STUBTCELL0_SINGLE.V.L4buffer
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.B1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.L0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.L1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B0TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.B1TCELL0_GCLKbuffer
TCELL0_IOCLK.L0TCELL0_ACLKbuffer
TCELL0_IOCLK.L1TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL2_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_ACLKmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.L0mux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.L1mux
TCELL0_LONG.IO.L1mux

Bel CLB

xc3000a CLB.BLS.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BLS.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BLS.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.BLS.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BLS.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.BLS.2 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.BLS.2 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_S0

xc3000a CLB.BLS.2 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BLS.2 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel wires

xc3000a CLB.BLS.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q

Bitstream

xc3000a CLB.BLS.2 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 INT:MUX.IMUX.LIOB0.O[3] INT:MUX.IMUX.LIOB0.OK[0] INT:MUX.IMUX.LIOB0.O[2] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[4] ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S ~INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S ~INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3 ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S
11 - - - - - - - - - - - - - - - - - - - - ~IO_W0:READBACK_IFF - - ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 ~IO_W0:READBACK_I ~INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S ~INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4
10 ~IO_W0:INV.O IO_W0:MUX.O[0] ~INT:PASS.SINGLE.H0.0.LONG.IO.L0 ~INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S ~INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S ~INT:BIPASS.SINGLE.H4.SINGLE.V.L4
9 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE ~INT:BUF.LONG.IO.L0.0.SINGLE.H0 ~INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S ~INT:BUF.LONG.IO.L1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.LONG.IO.L1 ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] ~INT:BUF.SINGLE.V.L4.STUB.0.SINGLE.V.L4 ~INT:BUF.SINGLE.V.L4.0.SINGLE.V.L4.STUB INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q ~INT:PASS.SINGLE.H4.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S ~INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 ~INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB
8 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H2.0.OUT.LIOB0.I CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0]
7 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2]
6 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
5 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
4 ~INT:INV.IOCLK.L1 INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[3] ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I - ~INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB - - ~INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 - - - - ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 - - - - ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q
3 - - - - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.L0 - - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 ~INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V.L0 - - - - - - - ~INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 ~INT:BUF.LONG.IO.B1.0.LONG.IO.L1 - - - ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4.STUB -
2 - - - - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.B0 - - - - - - ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q - - - - - - ~INT:BUF.LONG.IO.L1.0.LONG.IO.B1 - - - ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 - ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I
1 - INT:MUX.IMUX.IOCLK0[4] INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:INV.IOCLK.B0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[2] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] - INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3]
0 - - - - MISC:READ[1] - - INT:MUX.IMUX.BIOB0.O[3] MISC:READ[0] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4]
CLB:EC_ENABLE 0.12.8
CLB:RD_ENABLE 0.4.8
CLB:READBACK_QX 0.11.6
CLB:READBACK_QY 0.10.6
INT:BIPASS.SINGLE.H.B0.SINGLE.V.L4.STUB 0.1.3
INT:BIPASS.SINGLE.H.B1.SINGLE.V.L3 0.4.4
INT:BIPASS.SINGLE.H.B2.SINGLE.V.L2 0.8.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.L1 0.17.3
INT:BIPASS.SINGLE.H.B4.STUB.SINGLE.V.L0 0.16.3
INT:BIPASS.SINGLE.H0.SINGLE.V.L0 0.21.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L0.S 0.20.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1 0.19.12
INT:BIPASS.SINGLE.H0.SINGLE.V.L1.S 0.21.10
INT:BIPASS.SINGLE.H1.SINGLE.V.L0 0.18.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L0.S 0.17.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.V.L1.S 0.16.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2 0.3.11
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L2.S 0.5.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3 0.3.12
INT:BIPASS.SINGLE.H2.STUB.SINGLE.V.L3.S 0.1.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2 0.4.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L2.S 0.5.11
INT:BIPASS.SINGLE.H3.SINGLE.V.L3 0.2.12
INT:BIPASS.SINGLE.H3.SINGLE.V.L3.S 0.0.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0 0.10.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L0.S 0.9.12
INT:BIPASS.SINGLE.H4.SINGLE.V.L4 0.0.10
INT:BIPASS.SINGLE.H4.SINGLE.V.L4.S 0.2.10
INT:BIPASS.SINGLE.V.L0.S.SINGLE.V.L1 0.13.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L0.S 0.11.12
INT:BIPASS.SINGLE.V.L0.SINGLE.V.L1.S 0.12.12
INT:BIPASS.SINGLE.V.L1.S.SINGLE.V.L2 0.8.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L1.S 0.14.12
INT:BIPASS.SINGLE.V.L1.SINGLE.V.L2.S 0.5.10
INT:BIPASS.SINGLE.V.L2.S.SINGLE.V.L3 0.6.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L2.S 0.7.12
INT:BIPASS.SINGLE.V.L2.SINGLE.V.L3.S 0.4.12
INT:BIPASS.SINGLE.V.L3.S.SINGLE.V.L4 0.0.11
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L3.S 0.1.12
INT:BIPASS.SINGLE.V.L3.SINGLE.V.L4.S 0.4.10
INT:BIPASS.SINGLE.V.L4.SINGLE.V.L4.S 0.1.10
INT:BUF.ACLK.V.0.ACLK 0.17.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.4.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.2.2
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.6
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.8
INT:BUF.LONG.IO.B0.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.B0.0.LONG.V0 0.18.1
INT:BUF.LONG.IO.B1.0.ACLK.V 0.4.0
INT:BUF.LONG.IO.B1.0.LONG.IO.L1 0.7.3
INT:BUF.LONG.IO.B1.0.LONG.V1 0.8.0
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.7
INT:BUF.LONG.IO.L0.0.LONG.IO.B0 0.22.2
INT:BUF.LONG.IO.L0.0.SINGLE.H0 0.25.9
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.6
INT:BUF.LONG.IO.L1.0.LONG.IO.B1 0.7.2
INT:BUF.LONG.IO.L1.0.SINGLE.H3 0.23.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.17.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.15.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.13.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.5.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.10.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.8.8
INT:BUF.SINGLE.H.B4.0.SINGLE.H.B4.STUB 0.20.4
INT:BUF.SINGLE.H.B4.STUB.0.SINGLE.H.B4 0.17.4
INT:BUF.SINGLE.H2.0.SINGLE.H2.STUB 0.0.9
INT:BUF.SINGLE.H2.STUB.0.SINGLE.H2 0.1.9
INT:BUF.SINGLE.V.L4.0.SINGLE.V.L4.STUB 0.8.9
INT:BUF.SINGLE.V.L4.STUB.0.SINGLE.V.L4 0.9.9
INT:INV.IOCLK.B0 0.22.1
INT:INV.IOCLK.L1 0.28.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB0.I 0.0.2
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.3.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.2.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.3.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.9.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.3.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.2.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.16.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.15.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.14.2
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.0.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.1.4
INT:PASS.SINGLE.H0.0.LONG.IO.L0 0.26.10
INT:PASS.SINGLE.H1.0.LONG.V0 0.14.10
INT:PASS.SINGLE.H1.0.OUT.LIOB0.Q 0.24.10
INT:PASS.SINGLE.H1.0.OUT.LIOB1.I.S 0.25.10
INT:PASS.SINGLE.H2.0.LONG.V1 0.9.10
INT:PASS.SINGLE.H2.0.OUT.LIOB0.I 0.3.8
INT:PASS.SINGLE.H2.0.OUT.LIOB1.Q.S 0.3.9
INT:PASS.SINGLE.H3.0.LONG.IO.L1 0.22.9
INT:PASS.SINGLE.H3.0.OUT.LIOB0.Q 0.23.10
INT:PASS.SINGLE.H3.0.OUT.LIOB1.I.S 0.24.9
INT:PASS.SINGLE.H4.0.OUT.LIOB0.I 0.4.9
INT:PASS.SINGLE.H4.0.OUT.LIOB1.Q.S 0.2.9
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.8
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.12.10
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.9
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.6.10
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.8
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.8
INT:PASS.SINGLE.V.L2.0.OUT.LIOB1.I 0.22.4
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.3.10
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.9
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.11.10
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.22.10
IO_S0:INV.O 0.19.0
IO_S0:READBACK_I 0.14.1
IO_S0:READBACK_IFF 0.11.0
IO_S1:INV.O 0.2.0
IO_S1:READBACK_I 0.6.1
IO_S1:READBACK_IFF 0.10.1
IO_W0:INV.O 0.28.10
IO_W0:READBACK_I 0.2.11
IO_W0:READBACK_IFF 0.8.11
IO_W1:INV.O 0.26.5
IO_W1:READBACK_I 0.9.8
IO_W1:READBACK_IFF 0.22.6
PULLUP_TBUF0:ENABLE 0.27.9
PULLUP_TBUF1:ENABLE 0.26.9
inverted ~[0]
CLB:F 0.15.5 0.14.5 0.16.5 0.17.5 0.20.5 0.21.5 0.19.5 0.18.5 0.14.6 0.15.6 0.17.6 0.16.6 0.21.6 0.20.6 0.18.6 0.19.6
CLB:G 0.6.5 0.7.5 0.5.5 0.4.5 0.1.5 0.0.5 0.2.5 0.3.5 0.7.6 0.6.6 0.4.6 0.5.6 0.0.6 0.1.6 0.3.6 0.2.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.8
IO_S0:IFF_LATCH 0.12.0
IO_S0:INV.T 0.12.1
IO_S1:IFF_LATCH 0.9.0
IO_S1:INV.T 0.8.1
IO_W0:IFF_LATCH 0.26.8
IO_W0:INV.T 0.24.8
IO_W1:IFF_LATCH 0.25.7
IO_W1:INV.T 0.25.6
non-inverted [0]
CLB:MODE 0.10.5
FG 0
FGM 1
CLB:MUX.DX 0.11.7 0.12.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.7 0.10.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.5 0.12.6
CLB:MUX.G2 0.9.5 0.9.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.7 0.13.6
CLB:MUX.G3 0.8.7 0.8.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.5
CLB:MUX.G4 0.8.5
D 0
E 1
CLB:MUX.X 0.19.8 0.16.8
F 0 0
QX 1 1
CLB:MUX.Y 0.5.8 0.2.8
G 0 0
QY 1 1
INT:MUX.IMUX.BIOB0.IK 0.14.0
INT:MUX.IMUX.BIOB1.IK 0.7.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.21.0 0.19.1 0.21.1 0.20.1
0.LONG.IO.B0 0 0 0 1
0.ACLK 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.16.0
INT:MUX.IMUX.BIOB1.OK 0.5.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.13.0 0.13.1 0.11.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.0.0 0.0.1 0.3.1 0.1.0 0.1.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.10.0 0.9.1 0.7.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.CLB.A 0.14.7 0.16.7 0.15.7 0.14.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.7 0.17.7 0.20.8 0.17.8 0.18.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.6.7 0.4.7 0.5.7 0.6.8 0.7.7
0.OUT.CLB.X.W 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V.L3 1 0 1 0 1
0.SINGLE.V.L4 1 0 1 1 0
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.1.7 0.0.7 0.1.8 0.0.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V.L1 1 0 0 1
0.SINGLE.V.L3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.9 0.10.9 0.11.9 0.7.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
2.LONG.H0 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.20.7 0.21.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V.L2 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.9 0.15.10 0.15.9 0.15.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.9 0.13.9 0.16.10 0.16.9
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.7 0.2.7
0.LONG.IO.B1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.27.1 0.23.1 0.26.1 0.25.1 0.24.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L0 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.27.4 0.23.4 0.26.4 0.25.4 0.24.4
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 0 1
0.LONG.IO.L1 0 0 1 1 0
0.SINGLE.H.B1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.8
INT:MUX.IMUX.LIOB1.IK 0.27.7
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.22.12 0.28.12 0.26.12 0.23.12 0.24.12
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H2 0 0 1 0 1
0.SINGLE.V.L0 0 0 1 1 0
0.LONG.IO.L0 0 1 0 1 1
0.LONG.H1 0 1 1 0 1
0.SINGLE.H4 0 1 1 1 0
0.SINGLE.V.L3 1 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.27.12
INT:MUX.IMUX.LIOB1.OK 0.28.6
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.7 0.25.8 0.23.8
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.5 0.24.7 0.23.5 0.22.7 0.25.5
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
0.LONG.V1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.5 0.26.6 0.24.5
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.8.10
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.10 0.13.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.10
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.10 0.17.10
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
IO_S0:MUX.O 0.18.0
IO_S1:MUX.O 0.3.0
IO_W0:MUX.O 0.27.10
IO_W1:MUX.O 0.28.5
OFF 0
O 1
IO_S0:SLEW 0.15.0
IO_S1:SLEW 0.6.0
IO_W0:SLEW 0.25.12
IO_W1:SLEW 0.27.6
SLOW 0
FAST 1
MISC:READ 0.24.0 0.20.0
COMMAND 0 0
ONCE 0 1
DISABLE 1 1

Tile CLB.BR.0

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.BR.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.B0.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.B1.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_SINGLE.H.B2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.B2.ETCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBTCELL0_SINGLE.H.B2buffer
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_OUT.OSCpass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.B3.ETCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.B4.ETCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.B0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.V0.S.STUBbuffer
TCELL0_SINGLE.V0.S.STUBTCELL0_SINGLE.V0.Sbuffer
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.B1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.V.R2.S.STUBbuffer
TCELL0_SINGLE.V.R2.S.STUBTCELL0_SINGLE.V.R2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_OUT.OSCpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.B0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.B1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B1TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.R0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL1_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_ACLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_ACLKmux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.BIOB1.Imux
TCELL0_OUT.RIOB1.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_OUT.OSCmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R2mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R1mux
TCELL0_LONG.IO.B1mux

Bel CLB

xc3000a CLB.BR.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BR.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BR.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.BR.0 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.BR.0 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.BR.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BR.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.BR.0 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.BR.0 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_S0

xc3000a CLB.BR.0 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BR.0 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel CLKIOB

xc3000a CLB.BR.0 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.BR.0 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:ACLK

Bel OSC

xc3000a CLB.BR.0 bel OSC
PinDirectionWires
OoutputTCELL0:OUT.OSC

Bel wires

xc3000a CLB.BR.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:ACLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q
TCELL0:OUT.CLKIOBCLKIOB.I
TCELL0:OUT.OSCOSC.O

Bitstream

xc3000a CLB.BR.0 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
11 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
10 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
9 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
8 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
7 INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
6 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
5 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
4 ~INT:BIPASS.SINGLE.H.B3.SINGLE.V0 - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 ~INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E ~INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 ~INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 ~INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB ~INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q ~INT:BIPASS.SINGLE.H.B0.SINGLE.V.R0 ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB1.I ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.B2.SINGLE.V.R2 ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB1.I - - INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:BIPASS.SINGLE.H.B4.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.R0
3 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E ~INT:BIPASS.SINGLE.H.B3.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E ~INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E ~INT:PASS.SINGLE.V0.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 ~INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E - - - ~INT:BUF.LONG.IO.R0.0.LONG.IO.B0 ~INT:BUF.LONG.IO.R1.0.LONG.IO.B1 - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.R3 ~INT:PASS.SINGLE.V.R3.0.OUT.OSC ~INT:PASS.SINGLE.H.B3.0.OUT.OSC IO_E0:PULLUP INT:MUX.IMUX.BUFG[1] IO_S1:PULLUP
2 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q ~INT:BUF.LONG.IO.B0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.B0 ~INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.B1 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 ~INT:BUF.LONG.IO.B1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.R0 ~INT:BUF.LONG.IO.B1.0.LONG.IO.R1 - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.BUFG[8] OSC:MODE[2] OSC:MODE[1]
1 INT:MUX.IMUX.BIOB0.O[3] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[4] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3] - - - - INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[7] INT:MUX.IMUX.BUFG[0] MISC:REPROGRAM[4] MISC:REPROGRAM[2] OSC:MODE[0]
0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[2] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4] - - ~INT:INV.IOCLK.B1 MISC:REPROGRAM[6] ~MISC:REPROGRAM[1] MISC:REPROGRAM[5] ~MISC:REPROGRAM[0] - MISC:SLOWOSC_HALT MISC:DONETIME[0] MISC:RESETTIME[0] MISC:REPROGRAM[3] ~MISC:TLC DONE:PULL[0]
xc3000a CLB.BR.0 bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB ~INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - ~INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB ~INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S - - - - - - -
CLB:EC_ENABLE 0.26.8
CLB:RD_ENABLE 0.18.8
CLB:READBACK_QX 0.25.6
CLB:READBACK_QY 0.24.6
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 0.16.1
INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 0.15.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E 0.14.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E 0.14.3
INT:BIPASS.SINGLE.H.B0.SINGLE.V.R0 0.13.4
INT:BIPASS.SINGLE.H.B0.SINGLE.V4 0.15.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB 0.19.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 0.21.4
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 0.20.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E 0.18.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E 0.18.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V.R1 0.11.4
INT:BIPASS.SINGLE.H.B1.SINGLE.V2 0.19.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V3 0.18.4
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB 0.23.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 0.26.3
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 0.21.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 0.22.3
INT:BIPASS.SINGLE.H.B2.SINGLE.V.R2 0.10.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E 0.26.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 0.21.3
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 0.27.4
INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 0.35.2
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 0.35.3
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 0.34.2
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E 0.33.3
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E 0.31.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.R3 0.5.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V0 0.35.4
INT:BIPASS.SINGLE.H.B3.SINGLE.V1 0.32.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 0.32.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 0.30.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 0.27.3
INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E 0.30.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V.R4 0.2.4
INT:BIPASS.SINGLE.H.B4.SINGLE.V0 0.34.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V1 0.31.2
INT:BIPASS.SINGLE.H.B4.SINGLE.V4 0.28.3
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.11
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB 0.34.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.12
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.33.11
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.29.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.12
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.11
INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB 0.35.10
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.31.11
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.32.11
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.25.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB 0.30.11
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.11
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.12
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.12
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.11
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.12
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.11
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.11
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.12
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.10
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.11
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.25.10
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.24.11
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.19.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB 0.3.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.10
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.24.12
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.16.11
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.19.12
INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB 0.14.12
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.21.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.12
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.12
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.10
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB 0.3.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.11
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.12
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.11
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.10
INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB 0.14.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.10
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.11
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.11
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.10
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S 0.5.10
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 0.15.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S 0.19.10
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.12
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.12
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.12
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.12
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.12
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB 0.8.12
INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 0.2.12
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB 0.4.12
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.11
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.10
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.12
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S 0.1.11
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S 0.4.10
INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 0.33.12
INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB 0.34.11
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.12
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.12
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.25.11
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.20.11
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.22.11
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.12
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.11
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.12
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.10
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.10
INT:BUF.ACLK.V.0.ACLK 0.31.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.18.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.16.2
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.6
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.9
INT:BUF.LONG.IO.B0.0.LONG.IO.R0 0.10.2
INT:BUF.LONG.IO.B0.0.LONG.V0 0.32.1
INT:BUF.LONG.IO.B0.0.SINGLE.V0 0.27.2
INT:BUF.LONG.IO.B1.0.ACLK.V 0.18.0
INT:BUF.LONG.IO.B1.0.LONG.IO.R1 0.9.2
INT:BUF.LONG.IO.B1.0.LONG.V1 0.22.0
INT:BUF.LONG.IO.B1.0.SINGLE.V3 0.20.2
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.9
INT:BUF.LONG.IO.R0.0.LONG.IO.B0 0.10.3
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.9
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.7
INT:BUF.LONG.IO.R1.0.LONG.IO.B1 0.9.3
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.31.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.29.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.19.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.24.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.8
INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB 0.20.4
INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 0.19.4
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.14.9
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.15.9
INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB 1.8.0
INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S 1.7.0
INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB 1.34.4
INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S 1.33.4
INT:INV.IOCLK.B1 0.11.0
INT:INV.IOCLK.R0 0.0.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB1.I 0.12.4
INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E 0.22.4
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.17.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.16.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.17.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.23.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.17.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.16.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.30.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.29.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.28.2
INT:PASS.SINGLE.H.B3.0.OUT.OSC 0.3.3
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.14.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.15.4
INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E 0.28.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.10
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.8
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.10
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.10
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.9
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.10
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.9
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.9
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.10
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.9
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.10
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.9
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.9
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.9
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.9
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.8
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.8
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.8
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.6
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.8
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.7
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.6
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.7
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.8
INT:PASS.SINGLE.V.R2.0.OUT.RIOB1.I 0.9.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.8
INT:PASS.SINGLE.V.R3.0.OUT.OSC 0.4.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.8
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.6
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.8
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.8
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.7
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.8
INT:PASS.SINGLE.V0.0.LONG.IO.B0 0.26.2
INT:PASS.SINGLE.V0.0.OUT.BIOB0.I 0.29.3
INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E 0.33.2
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.9
INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q 0.25.4
INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E 0.25.2
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.8
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.8
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.8
INT:PASS.SINGLE.V3.0.LONG.IO.B1 0.22.2
INT:PASS.SINGLE.V3.0.OUT.BIOB0.I 0.23.3
INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E 0.24.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.9
INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q 0.25.3
INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E 0.24.2
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.9
IO_E0:INV.O 0.0.8
IO_E0:READBACK_I 0.13.7
IO_E0:READBACK_IFF 0.9.10
IO_E1:INV.O 0.1.5
IO_E1:READBACK_I 0.5.6
IO_E1:READBACK_IFF 0.6.6
IO_S0:INV.O 0.33.0
IO_S0:READBACK_I 0.28.1
IO_S0:READBACK_IFF 0.25.0
IO_S1:INV.O 0.16.0
IO_S1:READBACK_I 0.20.1
IO_S1:READBACK_IFF 0.24.1
MISC:TLC 0.1.0
PULLUP_TBUF0:ENABLE 0.10.8
PULLUP_TBUF1:ENABLE 0.7.9
inverted ~[0]
CLB:F 0.29.5 0.28.5 0.30.5 0.31.5 0.34.5 0.35.5 0.33.5 0.32.5 0.28.6 0.29.6 0.31.6 0.30.6 0.35.6 0.34.6 0.32.6 0.33.6
CLB:G 0.20.5 0.21.5 0.19.5 0.18.5 0.15.5 0.14.5 0.16.5 0.17.5 0.21.6 0.20.6 0.18.6 0.19.6 0.14.6 0.15.6 0.17.6 0.16.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.8
IO_E0:IFF_LATCH 0.3.7
IO_E0:INV.T 0.7.7
IO_E0:PULLUP 0.2.3
IO_E1:IFF_LATCH 0.0.7
IO_E1:INV.T 0.10.5
IO_S0:IFF_LATCH 0.26.0
IO_S0:INV.T 0.26.1
IO_S1:IFF_LATCH 0.23.0
IO_S1:INV.T 0.22.1
IO_S1:PULLUP 0.0.3
MISC:SLOWOSC_HALT 0.5.0
non-inverted [0]
CLB:MODE 0.24.5
FG 0
FGM 1
CLB:MUX.DX 0.25.7 0.26.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.7 0.24.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.5 0.26.6
CLB:MUX.G2 0.23.5 0.23.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.7 0.27.6
CLB:MUX.G3 0.22.7 0.22.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.5
CLB:MUX.G4 0.22.5
D 0
E 1
CLB:MUX.X 0.33.8 0.30.8
F 0 0
QX 1 1
CLB:MUX.Y 0.19.8 0.16.8
G 0 0
QY 1 1
DONE:PULL 0.0.0
PULLUP 0
PULLNONE 1
INT:MUX.IMUX.BIOB0.IK 0.28.0
INT:MUX.IMUX.BIOB1.IK 0.21.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.33.1 0.35.1 0.34.0 0.35.0 0.34.1
0.LONG.IO.B0 0 0 1 0 1
0.SINGLE.H.B1 0 0 1 1 1
0.LONG.V0 0 1 0 0 1
0.SINGLE.H.B3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.30.0
INT:MUX.IMUX.BIOB1.OK 0.19.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.27.0 0.27.1 0.25.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.14.0 0.14.1 0.17.1 0.15.0 0.15.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.ACLK 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
NONE 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.24.0 0.23.1 0.21.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.BUFG 0.2.2 0.4.1 0.3.2 0.7.2 0.6.2 0.4.2 0.5.2 0.1.3 0.3.1
0.SINGLE.V.R3 0 0 1 1 1 1 1 1 1
0.LONG.H0 0 1 0 1 1 1 1 1 1
0.LONG.IO.B1 0 1 1 0 1 1 1 1 1
0.LONG.IO.R0 0 1 1 1 0 1 1 1 1
0.OUT.BIOB1.I 0 1 1 1 1 0 1 1 1
0.OUT.RIOB1.I 0 1 1 1 1 1 0 1 1
0.OUT.OSC 0 1 1 1 1 1 1 1 0
0.OUT.CLKIOB 1 1 1 1 1 1 1 0 1
0.SINGLE.H.B1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.28.7 0.30.7 0.29.7 0.28.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.7 0.31.7 0.34.8 0.31.8 0.32.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.20.7 0.18.7 0.19.7 0.20.8 0.21.7
0.OUT.RIOB0.I 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V3 1 0 1 0 1
0.SINGLE.V4 1 0 1 1 0
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.15.7 0.14.7 0.15.8 0.14.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V1 1 0 0 1
0.SINGLE.V3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.9 0.24.9 0.25.9 0.21.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
1.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.34.7 0.35.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V2 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.9 0.29.10 0.29.9 0.29.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.9 0.27.9 0.30.10 0.30.9
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.7 0.16.7
0.LONG.IO.B1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.1.4 0.3.4 0.6.4 0.5.4 0.4.4
0.SINGLE.H.B4 0 0 0 1 1
0.SINGLE.V.R0 0 0 1 0 1
0.LONG.IO.B1 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.9.1 0.5.1 0.6.1 0.7.1 0.8.1
0.SINGLE.H.B3 0 0 0 1 1
0.SINGLE.V.R0 0 0 1 0 1
0.LONG.IO.B1 0 0 1 1 0
0.SINGLE.V.R1 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.7
INT:MUX.IMUX.RIOB1.IK 0.0.6
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.10 0.2.10 0.0.9 0.2.9 0.1.9
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.8
INT:MUX.IMUX.RIOB1.OK 0.2.6
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.7 0.8.8 0.6.7
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.6 0.4.5 0.5.5 0.6.5 0.9.5
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
0.ACLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.6 0.12.6 0.10.6
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.10
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.10 0.27.10
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.10
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.10 0.31.10
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.7 0.11.7
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.10 0.11.10
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.8
IO_E1:MUX.O 0.2.5
IO_S0:MUX.O 0.32.0
IO_S1:MUX.O 0.17.0
OFF 0
O 1
IO_E0:SLEW 0.2.7
IO_E1:SLEW 0.1.6
IO_S0:SLEW 0.29.0
IO_S1:SLEW 0.20.0
SLOW 0
FAST 1
MISC:DONETIME 0.4.0
MISC:RESETTIME 0.3.0
AFTER 0
BEFORE 1
MISC:REPROGRAM 0.10.0 0.8.0 0.2.1 0.2.0 0.1.1 0.9.0 0.7.0
mixed inversion [6] [5] [4] [3] [2] ~[1] ~[0]
OSC:MODE 0.1.2 0.0.2 0.0.1
DIV2 0 0 0
ENABLE 0 0 1
DISABLE 1 1 1

Tile CLB.BRS.0

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.BRS.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_LONG.IO.R0pass transistor
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.V0pass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.V1pass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_LONG.IO.R1pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.I.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_SINGLE.H4.STUBbuffer
TCELL0_OUT.CLB.X.ESpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Q.Spass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.STUBTCELL0_SINGLE.H4buffer
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H.B0TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.B0.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.B1TCELL0_ACLK.Vpass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.B1.ETCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2TCELL0_SINGLE.H.B2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.B2.ETCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBTCELL0_SINGLE.H.B2buffer
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.B3TCELL0_LONG.V0pass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Qpass transistor
TCELL0_OUT.OSCpass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.B3.ETCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.B4TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.Ipass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.B4.ETCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.B0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.V0.S.STUBbuffer
TCELL0_SINGLE.V0.S.STUBTCELL0_SINGLE.V0.Sbuffer
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.H.B3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V0.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.B1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.BIOB0.Ipass transistor
TCELL0_OUT.BIOB1.Q.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.H.B1.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.Ebidirectional pass transistor
TCELL0_SINGLE.H.B2.STUBbidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.BIOB0.Qpass transistor
TCELL0_OUT.BIOB1.I.Epass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.H.B0.Ebidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.H.B4.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.H4.STUBbidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B0bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H.B1bidirectional pass transistor
TCELL0_SINGLE.V.R0.Sbidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R1.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B2bidirectional pass transistor
TCELL0_SINGLE.V.R1.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R2.STCELL0_SINGLE.V.R2.S.STUBbuffer
TCELL0_SINGLE.V.R2.S.STUBTCELL0_SINGLE.V.R2.Sbuffer
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_OUT.OSCpass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H.B3bidirectional pass transistor
TCELL0_SINGLE.V.R2.S.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R3.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H.B4bidirectional pass transistor
TCELL0_SINGLE.V.R3.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.Sbidirectional pass transistor
TCELL0_SINGLE.V.R4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.B0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.B1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H1buffer
TCELL0_SINGLE.H.B3buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H2buffer
TCELL0_SINGLE.H.B2buffer
TCELL0_LONG.IO.B1buffer
TCELL0_LONG.IO.R0TCELL0_SINGLE.H0buffer
TCELL0_LONG.H1buffer
TCELL0_LONG.IO.B0buffer
TCELL0_LONG.IO.R1TCELL0_SINGLE.H3buffer
TCELL0_LONG.H0buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.B1buffer
TCELL0_LONG.IO.B1buffer
TCELL0_ACLKbuffer
TCELL0_IOCLK.B0TCELL0_ACLKbuffer
TCELL0_IOCLK.B1TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.R0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.CLB.Y.Smux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL0_OUT.BIOB0.Imux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL1_LONG.H0mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H1mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.V0mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.OTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.BIOB0.TTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.H.B3mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB0.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB0.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OTCELL0_SINGLE.H.B0mux
TCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_ACLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.BIOB1.TTCELL0_SINGLE.H.B2mux
TCELL0_SINGLE.H.B4mux
TCELL0_LONG.IO.B0mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.BIOB1.IKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.BIOB1.OKTCELL0_IOCLK.B0mux
TCELL0_IOCLK.B1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.H0mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_ACLKmux
TCELL0_OUT.CLB.Xmux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.B1mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.B1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.BIOB1.Imux
TCELL0_OUT.RIOB1.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_OUT.OSCmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.B4mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R2mux
TCELL0_LONG.IO.B1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.B3mux
TCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R1mux
TCELL0_LONG.IO.B1mux

Bel CLB

xc3000a CLB.BRS.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.BRS.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.BRS.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.BRS.0 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.BRS.0 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.BRS.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.BRS.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.BRS.0 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.BRS.0 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_S0

xc3000a CLB.BRS.0 bel IO_S0
PinDirectionWires
IoutputTCELL0:OUT.BIOB0.I
IKinputTCELL0:IMUX.BIOB0.IK
OinputTCELL0:IMUX.BIOB0.O
OKinputTCELL0:IMUX.BIOB0.OK
QoutputTCELL0:OUT.BIOB0.Q
TinputTCELL0:IMUX.BIOB0.T

Bel IO_S1

xc3000a CLB.BRS.0 bel IO_S1
PinDirectionWires
IoutputTCELL0:OUT.BIOB1.I
IKinputTCELL0:IMUX.BIOB1.IK
OinputTCELL0:IMUX.BIOB1.O
OKinputTCELL0:IMUX.BIOB1.OK
QoutputTCELL0:OUT.BIOB1.Q
TinputTCELL0:IMUX.BIOB1.T

Bel CLKIOB

xc3000a CLB.BRS.0 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.BRS.0 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:ACLK

Bel OSC

xc3000a CLB.BRS.0 bel OSC
PinDirectionWires
OoutputTCELL0:OUT.OSC

Bel wires

xc3000a CLB.BRS.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:ACLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.BIOB0.OIO_S0.O
TCELL0:IMUX.BIOB0.TIO_S0.T
TCELL0:IMUX.BIOB0.IKIO_S0.IK
TCELL0:IMUX.BIOB0.OKIO_S0.OK
TCELL0:IMUX.BIOB1.OIO_S1.O
TCELL0:IMUX.BIOB1.TIO_S1.T
TCELL0:IMUX.BIOB1.IKIO_S1.IK
TCELL0:IMUX.BIOB1.OKIO_S1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.BIOB0.IIO_S0.I
TCELL0:OUT.BIOB0.QIO_S0.Q
TCELL0:OUT.BIOB1.IIO_S1.I
TCELL0:OUT.BIOB1.QIO_S1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q
TCELL0:OUT.CLKIOBCLKIOB.I
TCELL0:OUT.OSCOSC.O

Bitstream

xc3000a CLB.BRS.0 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.E.SINGLE.H1 ~INT:BIPASS.SINGLE.H1.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H2.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.H2 ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.V2 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V3.S ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0 ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S
11 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB ~INT:BIPASS.SINGLE.H0.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:BIPASS.SINGLE.V1.S.SINGLE.V2 ~INT:BIPASS.SINGLE.V1.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.V2.S.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.H3.E ~INT:BIPASS.SINGLE.H2.E.SINGLE.H3 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.H2.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.S.SINGLE.V4 ~INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB ~INT:BIPASS.SINGLE.H1.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2 ~INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S ~INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3 ~INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S
10 ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.V3.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H3.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:PASS.SINGLE.H0.0.LONG.IO.R0 INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] ~INT:PASS.SINGLE.H3.0.LONG.IO.R1 ~IO_E0:READBACK_IFF ~INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q ~INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4 ~INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S ~INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 INT:MUX.IMUX.RIOB0.O[3] INT:MUX.IMUX.RIOB0.O[4] ~INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S
9 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E ~INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES ~INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 ~INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB ~INT:BUF.LONG.IO.R0.0.SINGLE.H0 ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.R1.0.SINGLE.H3 ~INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S ~INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.OUT.RIOB0.I ~INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S ~INT:PASS.SINGLE.H4.0.OUT.RIOB0.I INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[2]
8 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[1] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[1] INT:MUX.IMUX.CLB.D[0] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
7 INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[3] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[3] INT:MUX.IMUX.CLB.D[2] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
6 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
5 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
4 ~INT:BIPASS.SINGLE.H.B3.SINGLE.V0 - - - - ~INT:PASS.SINGLE.H.B3.0.LONG.V0 ~INT:BUF.LONG.V0.0.SINGLE.H.B3 ~INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E ~INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q ~INT:BUF.LONG.V1.0.SINGLE.H.B2 ~INT:PASS.SINGLE.H.B2.0.LONG.V1 ~INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 ~INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB ~INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V3 ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I ~INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q ~INT:BIPASS.SINGLE.H.B0.SINGLE.V.R0 ~INT:PASS.SINGLE.H.B0.0.OUT.BIOB1.I ~INT:BIPASS.SINGLE.H.B1.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.B2.SINGLE.V.R2 ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB1.I - - INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK0[0] INT:MUX.IMUX.IOCLK0[3] ~INT:BIPASS.SINGLE.H.B4.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.R0
3 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E ~INT:BIPASS.SINGLE.H.B3.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E ~INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E ~INT:PASS.SINGLE.V0.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 ~INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q ~INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I ~INT:BIPASS.SINGLE.H.B0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E - - - ~INT:BUF.LONG.IO.R0.0.LONG.IO.B0 ~INT:BUF.LONG.IO.R1.0.LONG.IO.B1 - - - ~INT:BIPASS.SINGLE.H.B3.SINGLE.V.R3 ~INT:PASS.SINGLE.V.R3.0.OUT.OSC ~INT:PASS.SINGLE.H.B3.0.OUT.OSC IO_E0:PULLUP INT:MUX.IMUX.BUFG[1] IO_S1:PULLUP
2 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 ~INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.B4.SINGLE.V1 ~INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I ~INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q ~INT:BUF.LONG.IO.B0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.B0 ~INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.B1 ~INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 ~INT:BUF.LONG.IO.B1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.B1.SINGLE.V2 ~INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E ~INT:PASS.SINGLE.H.B1.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.B1 ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E - - - ~INT:BUF.LONG.IO.B0.0.LONG.IO.R0 ~INT:BUF.LONG.IO.B1.0.LONG.IO.R1 - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.BUFG[8] OSC:MODE[2] OSC:MODE[1]
1 INT:MUX.IMUX.BIOB0.O[3] INT:MUX.IMUX.BIOB0.O[0] INT:MUX.IMUX.BIOB0.O[4] ~INT:BUF.LONG.IO.B0.0.LONG.V0 ~INT:BUF.ACLK.V.0.ACLK - - ~IO_S0:READBACK_I INT:MUX.IMUX.BIOB0.T[1] IO_S0:INV.T INT:MUX.IMUX.BIOB0.T[0] ~IO_S1:READBACK_IFF INT:MUX.IMUX.BIOB1.T[1] IO_S1:INV.T INT:MUX.IMUX.BIOB1.T[0] ~IO_S1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.B1 ~INT:BUF.ACLK.V.0.LONG.IO.B1 INT:MUX.IMUX.BIOB1.O[2] ~INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 INT:MUX.IMUX.BIOB1.O[0] INT:MUX.IMUX.BIOB1.O[3] - - - - INT:MUX.IMUX.IOCLK1[4] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[2] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[7] INT:MUX.IMUX.BUFG[0] MISC:REPROGRAM[4] MISC:REPROGRAM[2] OSC:MODE[0]
0 INT:MUX.IMUX.BIOB0.O[1] INT:MUX.IMUX.BIOB0.O[2] ~IO_S0:INV.O IO_S0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.B0 INT:MUX.IMUX.BIOB0.OK[0] IO_S0:SLEW[0] INT:MUX.IMUX.BIOB0.IK[0] INT:MUX.IMUX.BIOB0.T[2] IO_S0:IFF_LATCH ~IO_S0:READBACK_IFF INT:MUX.IMUX.BIOB1.T[2] IO_S1:IFF_LATCH ~INT:BUF.LONG.IO.B1.0.LONG.V1 INT:MUX.IMUX.BIOB1.IK[0] IO_S1:SLEW[0] INT:MUX.IMUX.BIOB1.OK[0] ~INT:BUF.LONG.IO.B1.0.ACLK.V IO_S1:MUX.O[0] ~IO_S1:INV.O INT:MUX.IMUX.BIOB1.O[1] INT:MUX.IMUX.BIOB1.O[4] - - ~INT:INV.IOCLK.B1 MISC:REPROGRAM[6] ~MISC:REPROGRAM[1] MISC:REPROGRAM[5] ~MISC:REPROGRAM[0] - MISC:SLOWOSC_HALT MISC:DONETIME[0] MISC:RESETTIME[0] MISC:REPROGRAM[3] ~MISC:TLC DONE:PULL[0]
xc3000a CLB.BRS.0 bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4 ~INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB ~INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - ~INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB ~INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S - - - - - - -
CLB:EC_ENABLE 0.26.8
CLB:RD_ENABLE 0.18.8
CLB:READBACK_QX 0.25.6
CLB:READBACK_QY 0.24.6
INT:BIPASS.SINGLE.H.B0.E.SINGLE.H.B1 0.16.1
INT:BIPASS.SINGLE.H.B0.E.SINGLE.V4 0.15.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B0.E 0.14.2
INT:BIPASS.SINGLE.H.B0.SINGLE.H.B1.E 0.14.3
INT:BIPASS.SINGLE.H.B0.SINGLE.V.R0 0.13.4
INT:BIPASS.SINGLE.H.B0.SINGLE.V4 0.15.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.H.B2.STUB 0.19.3
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V2 0.21.4
INT:BIPASS.SINGLE.H.B1.E.SINGLE.V3 0.20.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B1.E 0.18.3
INT:BIPASS.SINGLE.H.B1.SINGLE.H.B2.E 0.18.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V.R1 0.11.4
INT:BIPASS.SINGLE.H.B1.SINGLE.V2 0.19.2
INT:BIPASS.SINGLE.H.B1.SINGLE.V3 0.18.4
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B2.STUB 0.23.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.H.B3 0.26.3
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V2 0.21.2
INT:BIPASS.SINGLE.H.B2.E.SINGLE.V3 0.22.3
INT:BIPASS.SINGLE.H.B2.SINGLE.V.R2 0.10.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.H.B3.E 0.26.4
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V2 0.21.3
INT:BIPASS.SINGLE.H.B2.STUB.SINGLE.V3 0.27.4
INT:BIPASS.SINGLE.H.B3.E.SINGLE.H.B4 0.35.2
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V0 0.35.3
INT:BIPASS.SINGLE.H.B3.E.SINGLE.V1 0.34.2
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B3.E 0.33.3
INT:BIPASS.SINGLE.H.B3.SINGLE.H.B4.E 0.31.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V.R3 0.5.3
INT:BIPASS.SINGLE.H.B3.SINGLE.V0 0.35.4
INT:BIPASS.SINGLE.H.B3.SINGLE.V1 0.32.3
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V0 0.32.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V1 0.30.2
INT:BIPASS.SINGLE.H.B4.E.SINGLE.V4 0.27.3
INT:BIPASS.SINGLE.H.B4.SINGLE.H.B4.E 0.30.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V.R4 0.2.4
INT:BIPASS.SINGLE.H.B4.SINGLE.V0 0.34.3
INT:BIPASS.SINGLE.H.B4.SINGLE.V1 0.31.2
INT:BIPASS.SINGLE.H.B4.SINGLE.V4 0.28.3
INT:BIPASS.SINGLE.H0.E.SINGLE.H1 0.31.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.35.11
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S.STUB 0.34.12
INT:BIPASS.SINGLE.H0.E.SINGLE.V1.S 0.35.12
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.33.11
INT:BIPASS.SINGLE.H0.SINGLE.H1.E 0.29.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R0 0.13.12
INT:BIPASS.SINGLE.H0.SINGLE.V.R0.S 0.10.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R1 0.9.11
INT:BIPASS.SINGLE.H0.SINGLE.V.R1.S 0.6.11
INT:BIPASS.SINGLE.H0.SINGLE.V0.S.STUB 0.35.10
INT:BIPASS.SINGLE.H0.SINGLE.V1 0.31.11
INT:BIPASS.SINGLE.H0.SINGLE.V1.S 0.32.11
INT:BIPASS.SINGLE.H1.E.SINGLE.H2 0.25.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0 0.28.12
INT:BIPASS.SINGLE.H1.E.SINGLE.V0.S.STUB 0.30.11
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.28.11
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.29.12
INT:BIPASS.SINGLE.H1.SINGLE.H2.E 0.26.12
INT:BIPASS.SINGLE.H1.SINGLE.V.R0 0.13.11
INT:BIPASS.SINGLE.H1.SINGLE.V.R0.S 0.10.12
INT:BIPASS.SINGLE.H1.SINGLE.V.R1 0.8.11
INT:BIPASS.SINGLE.H1.SINGLE.V.R1.S 0.7.11
INT:BIPASS.SINGLE.H1.SINGLE.V0 0.30.12
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.26.10
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.27.11
INT:BIPASS.SINGLE.H2.E.SINGLE.H3 0.18.11
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.23.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.25.10
INT:BIPASS.SINGLE.H2.E.SINGLE.V3.S 0.20.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.24.11
INT:BIPASS.SINGLE.H2.SINGLE.H3.E 0.19.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R2 0.5.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R2.S.STUB 0.3.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R3 0.2.11
INT:BIPASS.SINGLE.H2.SINGLE.V.R3.S 0.0.10
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.24.12
INT:BIPASS.SINGLE.H2.SINGLE.V3 0.16.11
INT:BIPASS.SINGLE.H2.SINGLE.V3.S 0.19.12
INT:BIPASS.SINGLE.H3.E.SINGLE.H4.STUB 0.14.12
INT:BIPASS.SINGLE.H3.E.SINGLE.V2 0.23.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V2.S 0.21.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.16.12
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.17.12
INT:BIPASS.SINGLE.H3.SINGLE.H4.E 0.15.10
INT:BIPASS.SINGLE.H3.SINGLE.V.R2 0.5.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R2.S.STUB 0.3.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R3 0.1.12
INT:BIPASS.SINGLE.H3.SINGLE.V.R3.S 0.0.11
INT:BIPASS.SINGLE.H3.SINGLE.V2 0.21.12
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.17.11
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.17.10
INT:BIPASS.SINGLE.H4.E.SINGLE.H4.STUB 0.14.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.16.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.14.10
INT:BIPASS.SINGLE.H4.SINGLE.V.R0 0.12.11
INT:BIPASS.SINGLE.H4.SINGLE.V.R0.S 0.11.11
INT:BIPASS.SINGLE.H4.SINGLE.V.R4 0.6.10
INT:BIPASS.SINGLE.H4.SINGLE.V.R4.S 0.5.10
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4 0.15.12
INT:BIPASS.SINGLE.H4.STUB.SINGLE.V4.S 0.19.10
INT:BIPASS.SINGLE.V.R0.S.SINGLE.V.R1 0.9.12
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R0.S 0.11.12
INT:BIPASS.SINGLE.V.R0.SINGLE.V.R1.S 0.12.12
INT:BIPASS.SINGLE.V.R1.S.SINGLE.V.R2 0.6.12
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R1.S 0.7.12
INT:BIPASS.SINGLE.V.R1.SINGLE.V.R2.S.STUB 0.8.12
INT:BIPASS.SINGLE.V.R2.S.STUB.SINGLE.V.R3 0.2.12
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R2.S.STUB 0.4.12
INT:BIPASS.SINGLE.V.R2.SINGLE.V.R3.S 0.4.11
INT:BIPASS.SINGLE.V.R3.S.SINGLE.V.R4 0.3.10
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R3.S 0.0.12
INT:BIPASS.SINGLE.V.R3.SINGLE.V.R4.S 0.1.11
INT:BIPASS.SINGLE.V.R4.SINGLE.V.R4.S 0.4.10
INT:BIPASS.SINGLE.V0.S.STUB.SINGLE.V1 0.33.12
INT:BIPASS.SINGLE.V0.SINGLE.V0.S.STUB 0.34.11
INT:BIPASS.SINGLE.V0.SINGLE.V1.S 0.32.12
INT:BIPASS.SINGLE.V1.S.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.27.12
INT:BIPASS.SINGLE.V1.SINGLE.V2.S 0.25.11
INT:BIPASS.SINGLE.V2.S.SINGLE.V3 0.20.11
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.22.11
INT:BIPASS.SINGLE.V2.SINGLE.V3.S 0.22.12
INT:BIPASS.SINGLE.V3.S.SINGLE.V4 0.15.11
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.18.12
INT:BIPASS.SINGLE.V3.SINGLE.V4.S 0.20.10
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.18.10
INT:BUF.ACLK.V.0.ACLK 0.31.1
INT:BUF.ACLK.V.0.LONG.IO.B1 0.18.1
INT:BUF.ACLK.V.0.SINGLE.H.B1 0.16.2
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.6
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.9
INT:BUF.LONG.IO.B0.0.LONG.IO.R0 0.10.2
INT:BUF.LONG.IO.B0.0.LONG.V0 0.32.1
INT:BUF.LONG.IO.B0.0.SINGLE.V0 0.27.2
INT:BUF.LONG.IO.B1.0.ACLK.V 0.18.0
INT:BUF.LONG.IO.B1.0.LONG.IO.R1 0.9.2
INT:BUF.LONG.IO.B1.0.LONG.V1 0.22.0
INT:BUF.LONG.IO.B1.0.SINGLE.V3 0.20.2
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.9
INT:BUF.LONG.IO.R0.0.LONG.IO.B0 0.10.3
INT:BUF.LONG.IO.R0.0.SINGLE.H0 0.13.9
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.7
INT:BUF.LONG.IO.R1.0.LONG.IO.B1 0.9.3
INT:BUF.LONG.IO.R1.0.SINGLE.H3 0.10.9
INT:BUF.LONG.V0.0.LONG.IO.B0 0.31.0
INT:BUF.LONG.V0.0.SINGLE.H.B3 0.29.4
INT:BUF.LONG.V0.0.SINGLE.H1 0.27.8
INT:BUF.LONG.V1.0.LONG.IO.B1 0.19.1
INT:BUF.LONG.V1.0.SINGLE.H.B2 0.24.4
INT:BUF.LONG.V1.0.SINGLE.H2 0.22.8
INT:BUF.SINGLE.H.B2.0.SINGLE.H.B2.STUB 0.20.4
INT:BUF.SINGLE.H.B2.STUB.0.SINGLE.H.B2 0.19.4
INT:BUF.SINGLE.H4.0.SINGLE.H4.STUB 0.14.9
INT:BUF.SINGLE.H4.STUB.0.SINGLE.H4 0.15.9
INT:BUF.SINGLE.V.R2.S.0.SINGLE.V.R2.S.STUB 1.8.0
INT:BUF.SINGLE.V.R2.S.STUB.0.SINGLE.V.R2.S 1.7.0
INT:BUF.SINGLE.V0.S.0.SINGLE.V0.S.STUB 1.34.4
INT:BUF.SINGLE.V0.S.STUB.0.SINGLE.V0.S 1.33.4
INT:INV.IOCLK.B1 0.11.0
INT:INV.IOCLK.R0 0.0.4
INT:PASS.SINGLE.H.B0.0.OUT.BIOB1.I 0.12.4
INT:PASS.SINGLE.H.B0.0.OUT.CLB.X.E 0.22.4
INT:PASS.SINGLE.H.B1.0.ACLK.V 0.17.2
INT:PASS.SINGLE.H.B1.0.OUT.BIOB0.I 0.16.3
INT:PASS.SINGLE.H.B1.0.OUT.BIOB1.Q 0.17.3
INT:PASS.SINGLE.H.B2.0.LONG.V1 0.23.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB0.Q 0.17.4
INT:PASS.SINGLE.H.B2.0.OUT.BIOB1.I 0.16.4
INT:PASS.SINGLE.H.B3.0.LONG.V0 0.30.4
INT:PASS.SINGLE.H.B3.0.OUT.BIOB0.I 0.29.2
INT:PASS.SINGLE.H.B3.0.OUT.BIOB1.Q 0.28.2
INT:PASS.SINGLE.H.B3.0.OUT.OSC 0.3.3
INT:PASS.SINGLE.H.B4.0.OUT.BIOB0.Q 0.14.4
INT:PASS.SINGLE.H.B4.0.OUT.BIOB1.I 0.15.4
INT:PASS.SINGLE.H.B4.0.OUT.CLB.X.E 0.28.4
INT:PASS.SINGLE.H0.0.LONG.IO.R0 0.13.10
INT:PASS.SINGLE.H0.0.OUT.CLB.X.ES 0.17.8
INT:PASS.SINGLE.H1.0.LONG.V0 0.28.10
INT:PASS.SINGLE.H1.0.OUT.RIOB0.Q 0.7.10
INT:PASS.SINGLE.H1.0.OUT.RIOB1.I.S 0.8.9
INT:PASS.SINGLE.H2.0.LONG.V1 0.23.10
INT:PASS.SINGLE.H2.0.OUT.RIOB0.I 0.6.9
INT:PASS.SINGLE.H2.0.OUT.RIOB1.Q.S 0.5.9
INT:PASS.SINGLE.H3.0.LONG.IO.R1 0.10.10
INT:PASS.SINGLE.H3.0.OUT.CLB.Y.E 0.17.9
INT:PASS.SINGLE.H3.0.OUT.RIOB0.Q 0.8.10
INT:PASS.SINGLE.H3.0.OUT.RIOB1.I.S 0.9.9
INT:PASS.SINGLE.H4.0.OUT.CLB.X.ES 0.16.9
INT:PASS.SINGLE.H4.0.OUT.RIOB0.I 0.3.9
INT:PASS.SINGLE.H4.0.OUT.RIOB1.Q.S 0.4.9
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.8
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.8
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.8
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.6
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.8
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.7
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.6
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.7
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.8
INT:PASS.SINGLE.V.R2.0.OUT.RIOB1.I 0.9.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.8
INT:PASS.SINGLE.V.R3.0.OUT.OSC 0.4.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.8
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.6
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.8
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.8
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.7
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.8
INT:PASS.SINGLE.V0.0.LONG.IO.B0 0.26.2
INT:PASS.SINGLE.V0.0.OUT.BIOB0.I 0.29.3
INT:PASS.SINGLE.V0.0.OUT.BIOB1.Q.E 0.33.2
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.9
INT:PASS.SINGLE.V1.0.OUT.BIOB0.Q 0.25.4
INT:PASS.SINGLE.V1.0.OUT.BIOB1.I.E 0.25.2
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.8
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.8
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.8
INT:PASS.SINGLE.V3.0.LONG.IO.B1 0.22.2
INT:PASS.SINGLE.V3.0.OUT.BIOB0.I 0.23.3
INT:PASS.SINGLE.V3.0.OUT.BIOB1.Q.E 0.24.3
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.9
INT:PASS.SINGLE.V4.0.OUT.BIOB0.Q 0.25.3
INT:PASS.SINGLE.V4.0.OUT.BIOB1.I.E 0.24.2
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.18.9
IO_E0:INV.O 0.0.8
IO_E0:READBACK_I 0.13.7
IO_E0:READBACK_IFF 0.9.10
IO_E1:INV.O 0.1.5
IO_E1:READBACK_I 0.5.6
IO_E1:READBACK_IFF 0.6.6
IO_S0:INV.O 0.33.0
IO_S0:READBACK_I 0.28.1
IO_S0:READBACK_IFF 0.25.0
IO_S1:INV.O 0.16.0
IO_S1:READBACK_I 0.20.1
IO_S1:READBACK_IFF 0.24.1
MISC:TLC 0.1.0
PULLUP_TBUF0:ENABLE 0.10.8
PULLUP_TBUF1:ENABLE 0.7.9
inverted ~[0]
CLB:F 0.29.5 0.28.5 0.30.5 0.31.5 0.34.5 0.35.5 0.33.5 0.32.5 0.28.6 0.29.6 0.31.6 0.30.6 0.35.6 0.34.6 0.32.6 0.33.6
CLB:G 0.20.5 0.21.5 0.19.5 0.18.5 0.15.5 0.14.5 0.16.5 0.17.5 0.21.6 0.20.6 0.18.6 0.19.6 0.14.6 0.15.6 0.17.6 0.16.6
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.8
IO_E0:IFF_LATCH 0.3.7
IO_E0:INV.T 0.7.7
IO_E0:PULLUP 0.2.3
IO_E1:IFF_LATCH 0.0.7
IO_E1:INV.T 0.10.5
IO_S0:IFF_LATCH 0.26.0
IO_S0:INV.T 0.26.1
IO_S1:IFF_LATCH 0.23.0
IO_S1:INV.T 0.22.1
IO_S1:PULLUP 0.0.3
MISC:SLOWOSC_HALT 0.5.0
non-inverted [0]
CLB:MODE 0.24.5
FG 0
FGM 1
CLB:MUX.DX 0.25.7 0.26.7
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.7 0.24.7
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.5 0.26.6
CLB:MUX.G2 0.23.5 0.23.6
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.7 0.27.6
CLB:MUX.G3 0.22.7 0.22.6
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.5
CLB:MUX.G4 0.22.5
D 0
E 1
CLB:MUX.X 0.33.8 0.30.8
F 0 0
QX 1 1
CLB:MUX.Y 0.19.8 0.16.8
G 0 0
QY 1 1
DONE:PULL 0.0.0
PULLUP 0
PULLNONE 1
INT:MUX.IMUX.BIOB0.IK 0.28.0
INT:MUX.IMUX.BIOB1.IK 0.21.0
0.IOCLK.B0 0
0.IOCLK.B1 1
INT:MUX.IMUX.BIOB0.O 0.33.1 0.35.1 0.34.0 0.35.0 0.34.1
0.LONG.IO.B0 0 0 1 0 1
0.SINGLE.H.B1 0 0 1 1 1
0.LONG.V0 0 1 0 0 1
0.SINGLE.H.B3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.BIOB0.OK 0.30.0
INT:MUX.IMUX.BIOB1.OK 0.19.0
0.IOCLK.B1 0
0.IOCLK.B0 1
INT:MUX.IMUX.BIOB0.T 0.27.0 0.27.1 0.25.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B1 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B3 1 1 1
INT:MUX.IMUX.BIOB1.O 0.14.0 0.14.1 0.17.1 0.15.0 0.15.1
0.SINGLE.H.B0 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.ACLK 0 0 1 1 0
0.SINGLE.H.B2 0 1 1 1 1
0.LONG.IO.B0 1 0 0 1 1
0.OUT.CLB.Y 1 0 1 0 1
NONE 1 1 1 1 1
INT:MUX.IMUX.BIOB1.T 0.24.0 0.23.1 0.21.1
0.LONG.IO.B1 0 0 1
GND 0 1 0
0.SINGLE.H.B2 0 1 1
PULLUP 1 0 0
0.LONG.IO.B0 1 0 1
VCC 1 1 0
0.SINGLE.H.B4 1 1 1
INT:MUX.IMUX.BUFG 0.2.2 0.4.1 0.3.2 0.7.2 0.6.2 0.4.2 0.5.2 0.1.3 0.3.1
0.SINGLE.V.R3 0 0 1 1 1 1 1 1 1
0.LONG.H0 0 1 0 1 1 1 1 1 1
0.LONG.IO.B1 0 1 1 0 1 1 1 1 1
0.LONG.IO.R0 0 1 1 1 0 1 1 1 1
0.OUT.BIOB1.I 0 1 1 1 1 0 1 1 1
0.OUT.RIOB1.I 0 1 1 1 1 1 0 1 1
0.OUT.OSC 0 1 1 1 1 1 1 1 0
0.OUT.CLKIOB 1 1 1 1 1 1 1 0 1
0.SINGLE.H.B1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.28.7 0.30.7 0.29.7 0.28.8
0.LONG.H1 0 0 0 1
0.SINGLE.H0 0 0 1 1
0.OUT.CLB.Y.S 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.7 0.31.7 0.34.8 0.31.8 0.32.7
0.SINGLE.H0 0 0 0 1 1
0.SINGLE.H3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.20.7 0.18.7 0.19.7 0.20.8 0.21.7
0.OUT.RIOB0.I 0 0 0 1 1
0.SINGLE.H.B4 0 0 1 0 1
0.LONG.V1 0 0 1 1 0
0.SINGLE.H.B0 0 1 1 1 1
0.SINGLE.H.B2 1 0 0 1 1
0.SINGLE.V3 1 0 1 0 1
0.SINGLE.V4 1 0 1 1 0
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.15.7 0.14.7 0.15.8 0.14.8
0.OUT.BIOB0.I 0 0 0 1
0.LONG.H0 0 0 1 0
0.SINGLE.H.B1 0 1 1 1
0.SINGLE.V1 1 0 0 1
0.SINGLE.V3 1 0 1 0
0.SINGLE.H.B3 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.9 0.24.9 0.25.9 0.21.8
0.SINGLE.H4 0 0 1 1
0.SINGLE.V0 0 1 0 1
1.LONG.H0 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.34.7 0.35.7
0.LONG.V1 0 0
0.SINGLE.H.B4 0 1
0.SINGLE.V2 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.9 0.29.10 0.29.9 0.29.8
0.SINGLE.H1 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.9 0.27.9 0.30.10 0.30.9
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
0.SINGLE.H.B1 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.7 0.16.7
0.LONG.IO.B1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
0.SINGLE.H.B2 1 1
INT:MUX.IMUX.IOCLK0 0.1.4 0.3.4 0.6.4 0.5.4 0.4.4
0.SINGLE.H.B4 0 0 0 1 1
0.SINGLE.V.R0 0 0 1 0 1
0.LONG.IO.B1 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.9.1 0.5.1 0.6.1 0.7.1 0.8.1
0.SINGLE.H.B3 0 0 0 1 1
0.SINGLE.V.R0 0 0 1 0 1
0.LONG.IO.B1 0 0 1 1 0
0.SINGLE.V.R1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.7
INT:MUX.IMUX.RIOB1.IK 0.0.6
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.1.10 0.2.10 0.0.9 0.2.9 0.1.9
0.SINGLE.H2 0 0 0 1 1
0.SINGLE.H4 0 0 1 1 1
0.LONG.H1 0 1 0 0 1
0.LONG.IO.R0 0 1 0 1 0
0.SINGLE.V.R3 0 1 1 0 1
0.OUT.CLB.Y 0 1 1 1 0
0.SINGLE.V.R0 1 1 0 1 1
0.SINGLE.H0 1 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.8
INT:MUX.IMUX.RIOB1.OK 0.2.6
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.7 0.8.8 0.6.7
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.6 0.4.5 0.5.5 0.6.5 0.9.5
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
0.ACLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.6 0.12.6 0.10.6
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.10
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.10 0.27.10
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.10
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.10 0.31.10
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.7 0.11.7
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.10 0.11.10
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
IO_E0:MUX.O 0.1.8
IO_E1:MUX.O 0.2.5
IO_S0:MUX.O 0.32.0
IO_S1:MUX.O 0.17.0
OFF 0
O 1
IO_E0:SLEW 0.2.7
IO_E1:SLEW 0.1.6
IO_S0:SLEW 0.29.0
IO_S1:SLEW 0.20.0
SLOW 0
FAST 1
MISC:DONETIME 0.4.0
MISC:RESETTIME 0.3.0
AFTER 0
BEFORE 1
MISC:REPROGRAM 0.10.0 0.8.0 0.2.1 0.2.0 0.1.1 0.9.0 0.7.0
mixed inversion [6] [5] [4] [3] [2] ~[1] ~[0]
OSC:MODE 0.1.2 0.0.2 0.0.1
DIV2 0 0 0
ENABLE 0 0 1
DISABLE 1 1 1

Tile CLB.T.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.T.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_SINGLE.H.T2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBTCELL0_SINGLE.H.T2buffer
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.T.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.T.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.T.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.T.0 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.T.0 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.T.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.T.0 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 ~INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.16.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB 0.9.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.0.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB 0.0.4
INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 0.1.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.T.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.T.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T4.STUBbuffer
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBTCELL0_SINGLE.H.T4buffer
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.T.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.T.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.T.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.T.1 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.T.1 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.T.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.T.1 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 ~INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.16.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.9.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB 0.0.7
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB 0.0.4
INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 0.1.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.T.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.T.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_SINGLE.H.T0.STUBbuffer
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBTCELL0_SINGLE.H.T0buffer
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.T.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.T.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.T.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.T.2 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.T.2 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.T.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.T.2 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB ~INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E - -
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB 0.16.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.9.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.0.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB 0.18.4
INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 0.17.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.TS.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TS.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_SINGLE.H.T2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBTCELL0_SINGLE.H.T2buffer
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKfixed buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.TS.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TS.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TS.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.TS.0 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TS.0 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TS.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.TS.0 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 - - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 ~INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.16.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB 0.9.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.0.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB 0.0.4
INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 0.1.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.TS.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TS.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T4.STUBbuffer
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBTCELL0_SINGLE.H.T4buffer
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKfixed buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.TS.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TS.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TS.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.TS.1 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TS.1 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TS.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.TS.1 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 - - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 ~INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.16.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.9.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB 0.0.7
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB 0.0.4
INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 0.1.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.TS.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TS.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_SINGLE.H.T0.STUBbuffer
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBTCELL0_SINGLE.H.T0buffer
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKfixed buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux

Bel CLB

xc3000a CLB.TS.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TS.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TS.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel IO_N0

xc3000a CLB.TS.2 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TS.2 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TS.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O
TCELL0:LONG.H1TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q

Bitstream

xc3000a CLB.TS.2 bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 - - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB ~INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E - -
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB 0.16.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.17.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.18.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.16.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.13.6
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E 0.21.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 0.20.6
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 0.17.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 0.14.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.12.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.21.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.20.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.19.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.12.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.21.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.18.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.4.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.7.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.8.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.9.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.5.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.7.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.5.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.0.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.6.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.6.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.4.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.2.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.5.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.4.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.1.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.0.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.1.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.13.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.6.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB 0.18.4
INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 0.17.4
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.0.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.15.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.14.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.2.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.3.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.2.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.3.6
INT:PASS.SINGLE.V0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.12.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.21.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.15.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.19.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.18.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.11.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.11.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.9.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.8.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.5.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.10.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.2.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.11.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.10.7
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.TBUF0.I 0.8.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.19.8 0.20.9 0.21.8 0.21.9 0.20.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
SLOW 0
FAST 1

Tile CLB.TL.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TL.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_SINGLE.H.T2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T2.STUBTCELL0_SINGLE.H.T2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.L0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.L1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.L0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_GCLKmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_GCLKmux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.T1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.TIOB0.Imux
TCELL0_OUT.LIOB0.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux

Bel CLB

xc3000a CLB.TL.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TL.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TL.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.TL.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TL.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.TL.0 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.TL.0 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_N0

xc3000a CLB.TL.0 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TL.0 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel CLKIOB

xc3000a CLB.TL.0 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.TL.0 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:GCLK

Bel wires

xc3000a CLB.TL.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:GCLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q
TCELL0:OUT.CLKIOBCLKIOB.I

Bitstream

xc3000a CLB.TL.0 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - - - - - - - INT:MUX.IMUX.TIOB0.O[3] INT:MUX.IMUX.IOCLK1[2] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 - - - - - - - INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[2] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] - INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:INV.IOCLK.L0 MISC:INPUT[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T1 INT:MUX.IMUX.IOCLK1[4] - INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.IOCLK0[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I INT:MUX.IMUX.IOCLK0[2] - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.L0 - ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 ~IO_W0:READBACK_I - ~INT:BUF.LONG.IO.L1.0.LONG.IO.T1 - ~INT:BUF.LONG.IO.T1.0.LONG.IO.L1 - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q
6 - INT:MUX.IMUX.LIOB0.O[3] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[2] - - INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.BUFG[1] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[7] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q - INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I
5 ~IO_W0:INV.O IO_W0:MUX.O[0] INT:MUX.IMUX.LIOB0.OK[0] - - - - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~IO_W0:READBACK_IFF ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 - - - - ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE INT:MUX.IMUX.BUFG[0] - - - ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q - ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 ~INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE - CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 0.11.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 0.11.7
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 0.2.6
INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 0.3.4
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.LONG.IO.T0 0.14.7
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.LONG.IO.T1 0.8.7
INT:BUF.LONG.IO.T0.0.LONG.IO.L0 0.13.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.IO.L1 0.6.7
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB 0.0.4
INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 0.1.4
INT:INV.IOCLK.L0 0.28.7
INT:INV.IOCLK.T1 0.24.7
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.0.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.8.6
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.2.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.0.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.0.7
INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I 0.4.5
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.19.7
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.11.6
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I 0.4.6
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.4.7
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.10.6
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.2.4
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.10.7
IO_W0:READBACK_IFF 0.12.5
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.BUFG 0.12.6 0.21.6 0.21.5 0.19.6 0.21.7 0.13.6 0.16.6 0.25.4
0.SINGLE.V.L3 0 0 1 1 1 1 1 1
0.LONG.H1 0 1 0 1 1 1 1 1
0.LONG.IO.T1 0 1 1 0 1 1 1 1
0.LONG.IO.L0 0 1 1 1 0 1 1 1
0.OUT.TIOB0.I 0 1 1 1 1 0 1 1
0.OUT.LIOB0.I 0 1 1 1 1 1 0 1
0.OUT.CLKIOB 1 1 1 1 1 1 1 0
0.SINGLE.H.T1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.25.7 0.15.6 0.18.7 0.18.6 0.20.7
0.SINGLE.V.L2 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T0 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.23.7 0.14.6 0.20.9 0.17.6 0.20.6
0.SINGLE.V.L3 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.27.6 0.24.6 0.25.6 0.26.7
0.LONG.IO.L0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.V.L0 0 1 1 1
0.LONG.H1 1 0 0 1
0.LONG.V1 1 0 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.26.5
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.6.6
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.21.9 0.19.8 0.21.8 0.20.8
0.LONG.IO.T0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.H.T3 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.T1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
IO_W0:SLEW 0.26.6
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1
MISC:INPUT 0.27.7
CMOS 0
TTL 1

Tile CLB.TL.1

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TL.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T4.STUBbuffer
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_SINGLE.H.T4.STUBTCELL0_SINGLE.H.T4buffer
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.L0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.L1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.L0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_GCLKmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_GCLKmux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.T1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.TIOB0.Imux
TCELL0_OUT.LIOB0.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux

Bel CLB

xc3000a CLB.TL.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TL.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TL.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.TL.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TL.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.TL.1 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.TL.1 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_N0

xc3000a CLB.TL.1 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TL.1 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel CLKIOB

xc3000a CLB.TL.1 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.TL.1 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:GCLK

Bel wires

xc3000a CLB.TL.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:GCLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q
TCELL0:OUT.CLKIOBCLKIOB.I

Bitstream

xc3000a CLB.TL.1 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - - - - - - - INT:MUX.IMUX.TIOB0.O[3] INT:MUX.IMUX.IOCLK1[2] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 - - - - - - - INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[2] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] - INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:INV.IOCLK.L0 MISC:INPUT[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T1 INT:MUX.IMUX.IOCLK1[4] - INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.IOCLK0[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I INT:MUX.IMUX.IOCLK0[2] - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.L0 - ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 ~IO_W0:READBACK_I - ~INT:BUF.LONG.IO.L1.0.LONG.IO.T1 - ~INT:BUF.LONG.IO.T1.0.LONG.IO.L1 - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q
6 - INT:MUX.IMUX.LIOB0.O[3] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[2] - - INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.BUFG[1] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[7] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q - INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I
5 ~IO_W0:INV.O IO_W0:MUX.O[0] INT:MUX.IMUX.LIOB0.OK[0] - - - - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~IO_W0:READBACK_IFF ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 - - - - ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE INT:MUX.IMUX.BUFG[0] - - - ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q - ~INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V.L4 ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 ~INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE - CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 0.11.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 0.11.7
INT:BIPASS.SINGLE.H.T2.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 0.2.6
INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V.L4 0.3.4
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.LONG.IO.T0 0.14.7
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.LONG.IO.T1 0.8.7
INT:BUF.LONG.IO.T0.0.LONG.IO.L0 0.13.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.IO.L1 0.6.7
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB 0.0.4
INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 0.1.4
INT:INV.IOCLK.L0 0.28.7
INT:INV.IOCLK.T1 0.24.7
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.0.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.8.6
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.2.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.0.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.0.7
INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I 0.4.5
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.19.7
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.11.6
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I 0.4.6
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.4.7
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.10.6
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.2.4
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.10.7
IO_W0:READBACK_IFF 0.12.5
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.BUFG 0.12.6 0.21.6 0.21.5 0.19.6 0.21.7 0.13.6 0.16.6 0.25.4
0.SINGLE.V.L3 0 0 1 1 1 1 1 1
0.LONG.H1 0 1 0 1 1 1 1 1
0.LONG.IO.T1 0 1 1 0 1 1 1 1
0.LONG.IO.L0 0 1 1 1 0 1 1 1
0.OUT.TIOB0.I 0 1 1 1 1 0 1 1
0.OUT.LIOB0.I 0 1 1 1 1 1 0 1
0.OUT.CLKIOB 1 1 1 1 1 1 1 0
0.SINGLE.H.T1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.25.7 0.15.6 0.18.7 0.18.6 0.20.7
0.SINGLE.V.L2 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T0 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.23.7 0.14.6 0.20.9 0.17.6 0.20.6
0.SINGLE.V.L3 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.27.6 0.24.6 0.25.6 0.26.7
0.LONG.IO.L0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.V.L0 0 1 1 1
0.LONG.H1 1 0 0 1
0.LONG.V1 1 0 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.26.5
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.6.6
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.21.9 0.19.8 0.21.8 0.20.8
0.LONG.IO.T0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.H.T3 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.T1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
IO_W0:SLEW 0.26.6
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1
MISC:INPUT 0.27.7
CMOS 0
TTL 1

Tile CLB.TL.2

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TL.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_SINGLE.H.T0.STUBbuffer
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.STUBTCELL0_SINGLE.H.T0buffer
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.L0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.L1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.L0TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_GCLKmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_GCLKmux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.T1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.TIOB0.Imux
TCELL0_OUT.LIOB0.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux

Bel CLB

xc3000a CLB.TL.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TL.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TL.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.TL.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TL.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.TL.2 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.TL.2 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_N0

xc3000a CLB.TL.2 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TL.2 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel CLKIOB

xc3000a CLB.TL.2 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.TL.2 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:GCLK

Bel wires

xc3000a CLB.TL.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:GCLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q
TCELL0:OUT.CLKIOBCLKIOB.I

Bitstream

xc3000a CLB.TL.2 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - - - - - - - INT:MUX.IMUX.TIOB0.O[3] INT:MUX.IMUX.IOCLK1[2] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 - - - - - - - INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[2] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] - INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:INV.IOCLK.L0 MISC:INPUT[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T1 INT:MUX.IMUX.IOCLK1[4] - INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.IOCLK0[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I INT:MUX.IMUX.IOCLK0[2] - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.L0 - ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 ~IO_W0:READBACK_I - ~INT:BUF.LONG.IO.L1.0.LONG.IO.T1 - ~INT:BUF.LONG.IO.T1.0.LONG.IO.L1 - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q
6 - INT:MUX.IMUX.LIOB0.O[3] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[2] - - INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.BUFG[1] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[7] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q - INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I
5 ~IO_W0:INV.O IO_W0:MUX.O[0] INT:MUX.IMUX.LIOB0.OK[0] - - - - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~IO_W0:READBACK_IFF ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V.L0 INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 - - - - ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE INT:MUX.IMUX.BUFG[0] - - - ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - ~INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB ~INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q - ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I - -
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE - CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V.L0 0.11.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 0.11.7
INT:BIPASS.SINGLE.H.T2.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 0.2.6
INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 0.3.4
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.GCLK.V.0.GCLK 0.17.8
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.LONG.IO.T0 0.14.7
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.LONG.IO.T1 0.8.7
INT:BUF.LONG.IO.T0.0.LONG.IO.L0 0.13.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.IO.L1 0.6.7
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB 0.18.4
INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 0.17.4
INT:INV.IOCLK.L0 0.28.7
INT:INV.IOCLK.T1 0.24.7
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.0.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.8.6
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.2.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.0.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.0.7
INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I 0.4.5
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.19.7
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.11.6
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I 0.4.6
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.4.7
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.10.6
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.2.4
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.10.7
IO_W0:READBACK_IFF 0.12.5
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.BUFG 0.12.6 0.21.6 0.21.5 0.19.6 0.21.7 0.13.6 0.16.6 0.25.4
0.SINGLE.V.L3 0 0 1 1 1 1 1 1
0.LONG.H1 0 1 0 1 1 1 1 1
0.LONG.IO.T1 0 1 1 0 1 1 1 1
0.LONG.IO.L0 0 1 1 1 0 1 1 1
0.OUT.TIOB0.I 0 1 1 1 1 0 1 1
0.OUT.LIOB0.I 0 1 1 1 1 1 0 1
0.OUT.CLKIOB 1 1 1 1 1 1 1 0
0.SINGLE.H.T1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.25.7 0.15.6 0.18.7 0.18.6 0.20.7
0.SINGLE.V.L2 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T0 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.23.7 0.14.6 0.20.9 0.17.6 0.20.6
0.SINGLE.V.L3 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.27.6 0.24.6 0.25.6 0.26.7
0.LONG.IO.L0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.V.L0 0 1 1 1
0.LONG.H1 1 0 0 1
0.LONG.V1 1 0 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.26.5
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.6.6
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.21.9 0.19.8 0.21.8 0.20.8
0.LONG.IO.T0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.H.T3 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.T1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
IO_W0:SLEW 0.26.6
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1
MISC:INPUT 0.27.7
CMOS 0
TTL 1

Tile CLB.TLS.0

Cells: 3

Bel INT

Switchbox INT

xc3000a CLB.TLS.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.L0bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_SINGLE.H.T2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T2.STUBTCELL0_SINGLE.H.T2buffer
TCELL0_SINGLE.V.L2bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.V.L3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_SINGLE.V.L4bidirectional pass transistor
TCELL0_SINGLE.V.L0TCELL0_LONG.H1pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.V.L1TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.L2TCELL0_LONG.H0pass transistor
TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.V.L3TCELL0_OUT.LIOB0.Ipass transistor
TCELL0_OUT.LIOB1.Qpass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.L4TCELL0_OUT.LIOB0.Qpass transistor
TCELL0_OUT.LIOB1.Ipass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.L1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T0TCELL0_LONG.V0buffer
TCELL0_LONG.IO.L0buffer
TCELL0_LONG.IO.T1TCELL0_LONG.V1buffer
TCELL0_LONG.IO.L1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.L0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.L1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKfixed buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IOCLK.L0TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.L1TCELL0_GCLKbuffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V0mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL0_OUT.CLB.X.Wmux
TCELL2_SINGLE.H0mux
TCELL2_SINGLE.H2mux
TCELL2_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H0mux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL2_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.V1mux
TCELL2_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V.L3mux
TCELL0_LONG.V0mux
TCELL2_SINGLE.H2mux
TCELL2_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V.L1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_GCLKmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_OUT.CLB.Ymux
TCELL1_SINGLE.V1mux
TCELL1_SINGLE.V2mux
TCELL1_LONG.V1mux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.LIOB0.OTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.V1mux
TCELL0_LONG.IO.L0mux
TCELL0_GCLKmux
TCELL0_IMUX.LIOB0.TTCELL0_SINGLE.V.L0mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB0.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB0.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.CLB.Xmux
TCELL2_SINGLE.H1mux
TCELL2_SINGLE.H3mux
TCELL0_IMUX.LIOB1.TTCELL0_SINGLE.V.L1mux
TCELL0_SINGLE.V.L2mux
TCELL0_LONG.IO.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.LIOB1.IKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.LIOB1.OKTCELL0_IOCLK.L0mux
TCELL0_IOCLK.L1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V.L3mux
TCELL0_OUT.LIOB1.Imux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V.L0mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V.L1mux
TCELL0_OUT.LIOB0.Imux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.L1mux
TCELL0_IMUX.BUFGTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.T1mux
TCELL0_LONG.IO.L0mux
TCELL0_OUT.TIOB0.Imux
TCELL0_OUT.LIOB0.Imux
TCELL0_OUT.CLKIOBmux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.V.L2mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.V.L3mux
TCELL0_SINGLE.V.L4mux
TCELL0_LONG.IO.T1mux

Bel CLB

xc3000a CLB.TLS.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TLS.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TLS.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel PULLUP_TBUF0

xc3000a CLB.TLS.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TLS.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_W0

xc3000a CLB.TLS.0 bel IO_W0
PinDirectionWires
IoutputTCELL0:OUT.LIOB0.I
IKinputTCELL0:IMUX.LIOB0.IK
OinputTCELL0:IMUX.LIOB0.O
OKinputTCELL0:IMUX.LIOB0.OK
QoutputTCELL0:OUT.LIOB0.Q
TinputTCELL0:IMUX.LIOB0.T

Bel IO_W1

xc3000a CLB.TLS.0 bel IO_W1
PinDirectionWires
IoutputTCELL0:OUT.LIOB1.I
IKinputTCELL0:IMUX.LIOB1.IK
OinputTCELL0:IMUX.LIOB1.O
OKinputTCELL0:IMUX.LIOB1.OK
QoutputTCELL0:OUT.LIOB1.Q
TinputTCELL0:IMUX.LIOB1.T

Bel IO_N0

xc3000a CLB.TLS.0 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TLS.0 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel CLKIOB

xc3000a CLB.TLS.0 bel CLKIOB
PinDirectionWires
IoutputTCELL0:OUT.CLKIOB

Bel BUFG

xc3000a CLB.TLS.0 bel BUFG
PinDirectionWires
IinputTCELL0:IMUX.BUFG
OoutputTCELL0:GCLK

Bel wires

xc3000a CLB.TLS.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, PULLUP_TBUF1.O
TCELL0:GCLKBUFG.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.LIOB0.OIO_W0.O
TCELL0:IMUX.LIOB0.TIO_W0.T
TCELL0:IMUX.LIOB0.IKIO_W0.IK
TCELL0:IMUX.LIOB0.OKIO_W0.OK
TCELL0:IMUX.LIOB1.OIO_W1.O
TCELL0:IMUX.LIOB1.TIO_W1.T
TCELL0:IMUX.LIOB1.IKIO_W1.IK
TCELL0:IMUX.LIOB1.OKIO_W1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.BUFGBUFG.I
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.LIOB0.IIO_W0.I
TCELL0:OUT.LIOB0.QIO_W0.Q
TCELL0:OUT.LIOB1.IIO_W1.I
TCELL0:OUT.LIOB1.QIO_W1.Q
TCELL0:OUT.CLKIOBCLKIOB.I

Bitstream

xc3000a CLB.TLS.0 bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - - - - - - - INT:MUX.IMUX.TIOB0.O[3] INT:MUX.IMUX.IOCLK1[2] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4]
8 - - - - - - - INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[2] ~INT:BUF.LONG.IO.T0.0.LONG.V0 - - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] - INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3]
7 ~INT:INV.IOCLK.L0 MISC:INPUT[0] INT:MUX.IMUX.LIOB0.O[0] INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T1 INT:MUX.IMUX.IOCLK1[4] - INT:MUX.IMUX.BUFG[3] INT:MUX.IMUX.IOCLK0[0] ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I INT:MUX.IMUX.IOCLK0[2] - - - ~INT:BUF.LONG.IO.L0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.L0 - ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 ~IO_W0:READBACK_I - ~INT:BUF.LONG.IO.L1.0.LONG.IO.T1 - ~INT:BUF.LONG.IO.T1.0.LONG.IO.L1 - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q
6 - INT:MUX.IMUX.LIOB0.O[3] IO_W0:SLEW[0] INT:MUX.IMUX.LIOB0.O[1] INT:MUX.IMUX.LIOB0.O[2] - - INT:MUX.IMUX.BUFG[6] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.BUFG[4] INT:MUX.IMUX.IOCLK0[1] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.BUFG[1] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.BUFG[2] INT:MUX.IMUX.BUFG[7] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q - INT:MUX.IMUX.TBUF0.I[0] - ~INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V.L2 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 - ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I
5 ~IO_W0:INV.O IO_W0:MUX.O[0] INT:MUX.IMUX.LIOB0.OK[0] - - - - INT:MUX.IMUX.BUFG[5] INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~IO_W0:READBACK_IFF ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 - - - - ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I
4 - ~PULLUP_TBUF0:ENABLE ~PULLUP_TBUF1:ENABLE INT:MUX.IMUX.BUFG[0] - - - ~INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q - ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 ~INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I ~INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 ~INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB
3 - INT:MUX.IMUX.LIOB0.IK[0] IO_W0:IFF_LATCH INT:MUX.IMUX.LIOB0.T[1] IO_W0:INV.T INT:MUX.IMUX.LIOB0.T[0] ~INT:BUF.LONG.H1.0.LONG.IO.L0 ~INT:PASS.SINGLE.V.L0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V.L2.0.LONG.H0 CLB:INV.K ~IO_W1:READBACK_I ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE - CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1]
2 - INT:MUX.IMUX.LIOB1.IK[0] INT:MUX.IMUX.LIOB0.T[2] IO_W1:IFF_LATCH INT:MUX.IMUX.LIOB1.O[3] ~INT:BUF.LONG.IO.L0.0.LONG.H1 INT:MUX.IMUX.LIOB1.O[1] INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3]
1 INT:MUX.IMUX.LIOB1.OK[0] IO_W1:SLEW[0] INT:MUX.IMUX.LIOB1.T[1] IO_W1:INV.T ~INT:BUF.LONG.H0.0.LONG.IO.L1 ~INT:BUF.LONG.IO.L1.0.LONG.H0 ~IO_W1:READBACK_IFF ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3]
0 IO_W1:MUX.O[0] INT:MUX.IMUX.LIOB1.T[2] ~IO_W1:INV.O INT:MUX.IMUX.LIOB1.O[0] INT:MUX.IMUX.LIOB1.T[0] INT:MUX.IMUX.LIOB1.O[2] INT:MUX.IMUX.LIOB1.O[4] ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10]
CLB:EC_ENABLE 0.12.3
CLB:RD_ENABLE 0.4.3
CLB:READBACK_QX 0.11.1
CLB:READBACK_QY 0.10.1
INT:BIPASS.SINGLE.H.T0.SINGLE.V.L0 0.11.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V.L1 0.11.7
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V.L2 0.3.6
INT:BIPASS.SINGLE.H.T3.SINGLE.V.L3 0.2.6
INT:BIPASS.SINGLE.H.T4.SINGLE.V.L4 0.3.4
INT:BUF.ACLK.V.0.LONG.IO.T1 0.4.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.2.7
INT:BUF.LONG.H0.0.LONG.IO.L1 0.24.1
INT:BUF.LONG.H1.0.LONG.IO.L0 0.22.3
INT:BUF.LONG.IO.L0.0.LONG.H1 0.23.2
INT:BUF.LONG.IO.L0.0.LONG.IO.T0 0.14.7
INT:BUF.LONG.IO.L1.0.LONG.H0 0.23.1
INT:BUF.LONG.IO.L1.0.LONG.IO.T1 0.8.7
INT:BUF.LONG.IO.T0.0.LONG.IO.L0 0.13.7
INT:BUF.LONG.IO.T0.0.LONG.V0 0.18.8
INT:BUF.LONG.IO.T1.0.ACLK.V 0.4.9
INT:BUF.LONG.IO.T1.0.LONG.IO.L1 0.6.7
INT:BUF.LONG.IO.T1.0.LONG.V1 0.8.9
INT:BUF.LONG.V0.0.LONG.IO.T0 0.17.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.13.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.5.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.8.3
INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB 0.0.4
INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 0.1.4
INT:INV.IOCLK.L0 0.28.7
INT:INV.IOCLK.T1 0.24.7
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.3.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.0.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.14.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.9.6
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.8.6
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.9.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.2.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.1.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.3.7
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.0.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.0.7
INT:PASS.SINGLE.H.T4.0.OUT.TIOB0.I 0.4.5
INT:PASS.SINGLE.V.L0.0.LONG.H1 0.21.3
INT:PASS.SINGLE.V.L0.0.OUT.LIOB0.I 0.19.7
INT:PASS.SINGLE.V.L0.0.OUT.LIOB1.Q 0.21.4
INT:PASS.SINGLE.V.L1.0.OUT.LIOB0.Q 0.11.6
INT:PASS.SINGLE.V.L1.0.OUT.LIOB1.I 0.18.3
INT:PASS.SINGLE.V.L2.0.LONG.H0 0.11.3
INT:PASS.SINGLE.V.L2.0.OUT.LIOB0.I 0.4.6
INT:PASS.SINGLE.V.L3.0.OUT.LIOB0.I 0.4.7
INT:PASS.SINGLE.V.L3.0.OUT.LIOB1.Q 0.5.4
INT:PASS.SINGLE.V.L4.0.OUT.LIOB0.Q 0.10.6
INT:PASS.SINGLE.V.L4.0.OUT.LIOB1.I 0.2.4
IO_N0:INV.O 0.19.9
IO_N0:READBACK_I 0.14.8
IO_N0:READBACK_IFF 0.11.9
IO_N1:INV.O 0.2.9
IO_N1:READBACK_I 0.6.8
IO_N1:READBACK_IFF 0.10.8
IO_W0:INV.O 0.28.5
IO_W0:READBACK_I 0.10.7
IO_W0:READBACK_IFF 0.12.5
IO_W1:INV.O 0.26.0
IO_W1:READBACK_I 0.9.3
IO_W1:READBACK_IFF 0.22.1
PULLUP_TBUF0:ENABLE 0.27.4
PULLUP_TBUF1:ENABLE 0.26.4
inverted ~[0]
CLB:F 0.15.0 0.14.0 0.16.0 0.17.0 0.20.0 0.21.0 0.19.0 0.18.0 0.14.1 0.15.1 0.17.1 0.16.1 0.21.1 0.20.1 0.18.1 0.19.1
CLB:G 0.6.0 0.7.0 0.5.0 0.4.0 0.1.0 0.0.0 0.2.0 0.3.0 0.7.1 0.6.1 0.4.1 0.5.1 0.0.1 0.1.1 0.3.1 0.2.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.10.3
IO_N0:IFF_LATCH 0.12.9
IO_N0:INV.T 0.12.8
IO_N1:IFF_LATCH 0.9.9
IO_N1:INV.T 0.8.8
IO_W0:IFF_LATCH 0.26.3
IO_W0:INV.T 0.24.3
IO_W1:IFF_LATCH 0.25.2
IO_W1:INV.T 0.25.1
non-inverted [0]
CLB:MODE 0.10.0
FG 0
FGM 1
CLB:MUX.DX 0.11.2 0.12.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.9.2 0.10.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.12.0 0.12.1
CLB:MUX.G2 0.9.0 0.9.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.13.2 0.13.1
CLB:MUX.G3 0.8.2 0.8.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.13.0
CLB:MUX.G4 0.8.0
D 0
E 1
CLB:MUX.X 0.19.3 0.16.3
F 0 0
QX 1 1
CLB:MUX.Y 0.5.3 0.2.3
G 0 0
QY 1 1
INT:MUX.IMUX.BUFG 0.12.6 0.21.6 0.21.5 0.19.6 0.21.7 0.13.6 0.16.6 0.25.4
0.SINGLE.V.L3 0 0 1 1 1 1 1 1
0.LONG.H1 0 1 0 1 1 1 1 1
0.LONG.IO.T1 0 1 1 0 1 1 1 1
0.LONG.IO.L0 0 1 1 1 0 1 1 1
0.OUT.TIOB0.I 0 1 1 1 1 0 1 1
0.OUT.LIOB0.I 0 1 1 1 1 1 0 1
0.OUT.CLKIOB 1 1 1 1 1 1 1 0
0.SINGLE.H.T1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.A 0.14.2 0.16.2 0.15.2 0.14.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V.L0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.19.2 0.17.2 0.20.3 0.17.3 0.18.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V.L0 0 1 1 1 1
0.SINGLE.V.L4 1 0 0 1 1
0.SINGLE.V.L2 1 0 1 0 1
0.OUT.LIOB0.I 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.4.2 0.6.3 0.7.2 0.6.2 0.5.2
2.SINGLE.H0 0 0 1 0 1
0.SINGLE.V.L3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V.L4 0 1 0 1 1
0.OUT.CLB.X.W 0 1 1 0 0
2.SINGLE.H2 0 1 1 1 0
2.SINGLE.H4 1 1 1 0 1
0.SINGLE.V.L1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.0.2 0.1.3 0.0.3 0.1.2
2.OUT.CLB.Y 0 0 1 0
0.SINGLE.V.L1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V.L3 0 1 0 1
2.SINGLE.H3 1 1 1 0
2.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.7.4 0.10.4 0.11.4 0.7.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V.L0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.21.2 0.20.2
0.LONG.V1 0 0
0.SINGLE.V.L2 0 1
2.SINGLE.H0 1 0
0.SINGLE.V.L4 1 1
INT:MUX.IMUX.CLB.EC 0.14.4 0.15.5 0.15.4 0.15.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V.L2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.12.4 0.13.4 0.16.5 0.16.4
0.SINGLE.V.L1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
2.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.3.2 0.2.2
2.LONG.H1 0 0
0.SINGLE.V.L3 0 1
0.LONG.V0 1 0
2.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.25.7 0.15.6 0.18.7 0.18.6 0.20.7
0.SINGLE.V.L2 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T0 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.23.7 0.14.6 0.20.9 0.17.6 0.20.6
0.SINGLE.V.L3 0 0 0 1 1
0.SINGLE.V.L4 0 0 1 0 1
0.LONG.IO.T1 0 0 1 1 0
0.SINGLE.H.T1 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.LIOB0.IK 0.27.3
INT:MUX.IMUX.LIOB1.IK 0.27.2
0.IOCLK.L0 0
0.IOCLK.L1 1
INT:MUX.IMUX.LIOB0.O 0.27.6 0.24.6 0.25.6 0.26.7
0.LONG.IO.L0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.V.L0 0 1 1 1
0.LONG.H1 1 0 0 1
0.LONG.V1 1 0 1 0
0.SINGLE.V.L3 1 1 1 1
INT:MUX.IMUX.LIOB0.OK 0.26.5
INT:MUX.IMUX.LIOB1.OK 0.28.1
0.IOCLK.L1 0
0.IOCLK.L0 1
INT:MUX.IMUX.LIOB0.T 0.26.2 0.25.3 0.23.3
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L0 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L3 1 1 1
INT:MUX.IMUX.LIOB1.O 0.22.0 0.24.2 0.23.0 0.22.2 0.25.0
0.LONG.H0 0 0 0 1 1
0.SINGLE.V.L1 0 0 1 1 1
0.SINGLE.V.L4 0 1 0 0 1
2.SINGLE.H1 0 1 0 1 0
0.OUT.CLB.X 0 1 1 0 1
0.LONG.IO.L0 0 1 1 1 0
2.SINGLE.H3 1 1 0 1 1
0.SINGLE.V.L2 1 1 1 1 1
INT:MUX.IMUX.LIOB1.T 0.27.0 0.26.1 0.24.0
0.LONG.IO.L0 0 0 1
GND 0 1 0
0.SINGLE.V.L1 0 1 1
PULLUP 1 0 0
0.LONG.IO.L1 1 0 1
VCC 1 1 0
0.SINGLE.V.L2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.6.6
0.OUT.LIOB1.I 0
0.SINGLE.V.L3 1
INT:MUX.IMUX.TBUF0.T 0.10.5 0.13.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.18.5
0.OUT.LIOB0.I 0
0.SINGLE.V.L1 1
INT:MUX.IMUX.TBUF1.T 0.20.5 0.17.5
0.LONG.IO.L1 0 0
0.SINGLE.V.L4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.14.9
INT:MUX.IMUX.TIOB1.IK 0.7.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.21.9 0.19.8 0.21.8 0.20.8
0.LONG.IO.T0 0 0 0 1
0.GCLK 0 0 1 0
0.SINGLE.H.T3 0 1 1 1
0.LONG.V0 1 0 0 1
0.ACLK.V 1 0 1 0
0.SINGLE.H.T1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.16.9
INT:MUX.IMUX.TIOB1.OK 0.5.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.13.9 0.13.8 0.11.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.0.9 0.0.8 0.1.9 0.3.8 0.1.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
1.LONG.V1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
1.SINGLE.V1 1 0 1 1 0
1.SINGLE.V2 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.10.9 0.9.8 0.7.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_N0:MUX.O 0.18.9
IO_N1:MUX.O 0.3.9
IO_W0:MUX.O 0.27.5
IO_W1:MUX.O 0.28.0
OFF 0
O 1
IO_N0:SLEW 0.15.9
IO_N1:SLEW 0.6.9
IO_W0:SLEW 0.26.6
IO_W1:SLEW 0.27.1
SLOW 0
FAST 1
MISC:INPUT 0.27.7
CMOS 0
TTL 1

Tile CLB.TR.0

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.TR.0 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_SINGLE.H.T2.STUBbuffer
TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBTCELL0_SINGLE.H.T2buffer
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.R0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.R1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.R1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_GCLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.TR.0 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TR.0 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TR.0 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.TR.0 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.TR.0 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.TR.0 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TR.0 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.TR.0 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.TR.0 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_N0

xc3000a CLB.TR.0 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TR.0 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TR.0 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.TR.0 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4] - - ~MISC:POR - - - - - - - - - - -
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3] - - - - - - - - - - - - - -
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E - - - - - - - - - - - - - -
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 - ~INT:BUF.LONG.IO.R0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.R0 ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T0 INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.IOCLK1[4] ~INT:INV.IOCLK.R1 -
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q - INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] - ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 INT:MUX.IMUX.IOCLK0[0] ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[1] ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 INT:MUX.IMUX.IOCLK1[2] - INT:MUX.IMUX.RIOB0.O[2] ~MISC:TAC
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 ~INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB - ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.T1.0.LONG.IO.R1 ~INT:BUF.LONG.IO.R1.0.LONG.IO.T1 ~IO_E0:READBACK_IFF ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 - - INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[3]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.31.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.32.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.30.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.27.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.30.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.35.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.34.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.31.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.28.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2.STUB 0.26.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.34.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.33.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.26.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 0.4.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.35.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.32.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T2.STUB 0.23.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.18.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.22.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 0.5.4
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.H.T3.E 0.19.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V2 0.21.6
INT:BIPASS.SINGLE.H.T2.STUB.SINGLE.V3 0.19.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.14.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.20.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.18.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.16.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 0.9.5
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.19.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.18.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.14.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 0.8.5
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.15.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.18.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.16.7
INT:BUF.GCLK.V.0.GCLK 0.31.8
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.LONG.IO.T0 0.12.6
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.LONG.IO.T1 0.9.4
INT:BUF.LONG.IO.T0.0.LONG.IO.R0 0.11.6
INT:BUF.LONG.IO.T0.0.LONG.V0 0.32.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.27.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.18.9
INT:BUF.LONG.IO.T1.0.LONG.IO.R1 0.10.4
INT:BUF.LONG.IO.T1.0.LONG.V1 0.22.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.20.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.31.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.27.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.19.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.22.3
INT:BUF.SINGLE.H.T2.0.SINGLE.H.T2.STUB 0.14.4
INT:BUF.SINGLE.H.T2.STUB.0.SINGLE.H.T2 0.15.4
INT:INV.IOCLK.R1 0.1.6
INT:INV.IOCLK.T0 0.8.6
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.14.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.15.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.29.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.28.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.17.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.16.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.17.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.17.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.16.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.17.6
INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I 0.10.6
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.26.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.29.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.33.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.25.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.25.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.22.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.23.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.24.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.16.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.25.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.24.7
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.8.4
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
IO_N0:INV.O 0.33.9
IO_N0:READBACK_I 0.28.8
IO_N0:READBACK_IFF 0.25.9
IO_N1:INV.O 0.16.9
IO_N1:READBACK_I 0.20.8
IO_N1:READBACK_IFF 0.24.8
MISC:POR 0.11.9
MISC:TAC 0.0.5
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
IO_N0:IFF_LATCH 0.26.9
IO_N0:INV.T 0.26.8
IO_N1:IFF_LATCH 0.23.9
IO_N1:INV.T 0.22.8
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.9.6 0.4.6 0.7.6 0.5.5 0.7.5
0.SINGLE.H.T4 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.2.6 0.3.6 0.3.5 0.6.6 0.5.6
0.SINGLE.H.T3 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.V.R3 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.0.4 0.1.5 0.2.4 0.1.4
0.LONG.H1 0 0 0 1
0.LONG.IO.R0 0 0 1 0
0.SINGLE.V.R0 0 1 1 1
0.SINGLE.V.R3 1 0 0 1
0.OUT.CLB.Y 1 0 1 0
NONE 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.28.9
INT:MUX.IMUX.TIOB1.IK 0.21.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.33.8 0.34.9 0.35.8 0.35.9 0.34.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.30.9
INT:MUX.IMUX.TIOB1.OK 0.19.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.27.9 0.27.8 0.25.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.14.9 0.14.8 0.15.9 0.17.8 0.15.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
0.GCLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.24.9 0.23.8 0.21.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
IO_N0:MUX.O 0.32.9
IO_N1:MUX.O 0.17.9
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
IO_N0:SLEW 0.29.9
IO_N1:SLEW 0.20.9
SLOW 0
FAST 1

Tile CLB.TR.1

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.TR.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T4.STUBbuffer
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBTCELL0_SINGLE.H.T4buffer
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.R0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.R1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.R1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_GCLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.TR.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TR.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TR.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.TR.1 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.TR.1 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.TR.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TR.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.TR.1 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.TR.1 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_N0

xc3000a CLB.TR.1 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TR.1 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TR.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.TR.1 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4] - - ~MISC:POR - - - - - - - - - - -
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3] - - - - - - - - - - - - - -
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB - - - - - - - - - - - - - -
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB - ~INT:BUF.LONG.IO.R0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.R0 ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T0 INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.IOCLK1[4] ~INT:INV.IOCLK.R1 -
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q - INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] - ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 INT:MUX.IMUX.IOCLK0[0] ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[1] ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 INT:MUX.IMUX.IOCLK1[2] - INT:MUX.IMUX.RIOB0.O[2] ~MISC:TAC
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 ~INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB - ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.T1.0.LONG.IO.R1 ~INT:BUF.LONG.IO.R1.0.LONG.IO.T1 ~IO_E0:READBACK_IFF ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 - - INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[3]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.31.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.32.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.30.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.27.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.30.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.35.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.34.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.31.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.28.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.26.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.34.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.33.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.26.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 0.4.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.35.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.32.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.18.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.22.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.23.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.19.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 0.5.4
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.21.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.19.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB 0.14.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.20.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.18.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.16.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 0.9.5
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.19.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.18.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB 0.14.7
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 0.8.5
INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 0.15.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.18.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.16.7
INT:BUF.GCLK.V.0.GCLK 0.31.8
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.LONG.IO.T0 0.12.6
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.LONG.IO.T1 0.9.4
INT:BUF.LONG.IO.T0.0.LONG.IO.R0 0.11.6
INT:BUF.LONG.IO.T0.0.LONG.V0 0.32.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.27.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.18.9
INT:BUF.LONG.IO.T1.0.LONG.IO.R1 0.10.4
INT:BUF.LONG.IO.T1.0.LONG.V1 0.22.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.20.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.31.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.27.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.19.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.22.3
INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB 0.14.4
INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 0.15.4
INT:INV.IOCLK.R1 0.1.6
INT:INV.IOCLK.T0 0.8.6
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.14.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.15.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.29.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.28.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.17.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.16.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.17.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.17.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.16.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.17.6
INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I 0.10.6
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.26.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.29.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.33.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.25.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.25.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.22.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.23.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.24.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.16.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.25.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.24.7
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.8.4
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
IO_N0:INV.O 0.33.9
IO_N0:READBACK_I 0.28.8
IO_N0:READBACK_IFF 0.25.9
IO_N1:INV.O 0.16.9
IO_N1:READBACK_I 0.20.8
IO_N1:READBACK_IFF 0.24.8
MISC:POR 0.11.9
MISC:TAC 0.0.5
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
IO_N0:IFF_LATCH 0.26.9
IO_N0:INV.T 0.26.8
IO_N1:IFF_LATCH 0.23.9
IO_N1:INV.T 0.22.8
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.9.6 0.4.6 0.7.6 0.5.5 0.7.5
0.SINGLE.H.T4 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.2.6 0.3.6 0.3.5 0.6.6 0.5.6
0.SINGLE.H.T3 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.V.R3 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.0.4 0.1.5 0.2.4 0.1.4
0.LONG.H1 0 0 0 1
0.LONG.IO.R0 0 0 1 0
0.SINGLE.V.R0 0 1 1 1
0.SINGLE.V.R3 1 0 0 1
0.OUT.CLB.Y 1 0 1 0
NONE 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.28.9
INT:MUX.IMUX.TIOB1.IK 0.21.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.33.8 0.34.9 0.35.8 0.35.9 0.34.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.30.9
INT:MUX.IMUX.TIOB1.OK 0.19.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.27.9 0.27.8 0.25.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.14.9 0.14.8 0.15.9 0.17.8 0.15.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
0.GCLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.24.9 0.23.8 0.21.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
IO_N0:MUX.O 0.32.9
IO_N1:MUX.O 0.17.9
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
IO_N0:SLEW 0.29.9
IO_N1:SLEW 0.20.9
SLOW 0
FAST 1

Tile CLB.TR.2

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.TR.2 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_SINGLE.H.T0.STUBbuffer
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBTCELL0_SINGLE.H.T0buffer
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T0.STUBbidirectional pass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.R0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.R1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKbuffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.R1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_GCLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.TR.2 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TR.2 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TR.2 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.TR.2 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.TR.2 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.TR.2 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TR.2 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.TR.2 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.TR.2 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_N0

xc3000a CLB.TR.2 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TR.2 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TR.2 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.TR.2 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4] - - ~MISC:POR - - - - - - - - - - -
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 ~INT:BUF.GCLK.V.0.GCLK - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3] - - - - - - - - - - - - - -
7 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E - - - - - - - - - - - - - -
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 - ~INT:BUF.LONG.IO.R0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.R0 ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T0 INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.IOCLK1[4] ~INT:INV.IOCLK.R1 -
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q - INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] - ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 INT:MUX.IMUX.IOCLK0[0] ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[1] ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 INT:MUX.IMUX.IOCLK1[2] - INT:MUX.IMUX.RIOB0.O[2] ~MISC:TAC
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - ~INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB ~INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E - - - ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.T1.0.LONG.IO.R1 ~INT:BUF.LONG.IO.R1.0.LONG.IO.T1 ~IO_E0:READBACK_IFF ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 - - INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[3]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T0.STUB 0.30.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.31.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.32.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.30.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.27.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.H.T1.E 0.35.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V0 0.34.6
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V1 0.31.7
INT:BIPASS.SINGLE.H.T0.STUB.SINGLE.V4 0.28.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.26.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.34.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.33.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.26.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 0.4.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.35.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.32.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.18.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.22.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.23.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.19.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 0.5.4
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.21.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.19.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4 0.14.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.20.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.18.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.16.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 0.9.5
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.19.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.18.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H.T4.SINGLE.H.T4.E 0.14.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 0.8.5
INT:BIPASS.SINGLE.H.T4.SINGLE.V4 0.15.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.18.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.16.7
INT:BUF.GCLK.V.0.GCLK 0.31.8
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.LONG.IO.T0 0.12.6
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.LONG.IO.T1 0.9.4
INT:BUF.LONG.IO.T0.0.LONG.IO.R0 0.11.6
INT:BUF.LONG.IO.T0.0.LONG.V0 0.32.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.27.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.18.9
INT:BUF.LONG.IO.T1.0.LONG.IO.R1 0.10.4
INT:BUF.LONG.IO.T1.0.LONG.V1 0.22.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.20.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.31.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.27.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.19.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.22.3
INT:BUF.SINGLE.H.T0.0.SINGLE.H.T0.STUB 0.32.4
INT:BUF.SINGLE.H.T0.STUB.0.SINGLE.H.T0 0.31.4
INT:INV.IOCLK.R1 0.1.6
INT:INV.IOCLK.T0 0.8.6
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.14.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.15.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.29.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.28.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.17.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.16.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.17.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.17.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.16.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.17.6
INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I 0.10.6
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.26.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.29.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.33.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.25.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.25.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.22.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.23.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.24.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.16.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.25.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.24.7
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.8.4
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
IO_N0:INV.O 0.33.9
IO_N0:READBACK_I 0.28.8
IO_N0:READBACK_IFF 0.25.9
IO_N1:INV.O 0.16.9
IO_N1:READBACK_I 0.20.8
IO_N1:READBACK_IFF 0.24.8
MISC:POR 0.11.9
MISC:TAC 0.0.5
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
IO_N0:IFF_LATCH 0.26.9
IO_N0:INV.T 0.26.8
IO_N1:IFF_LATCH 0.23.9
IO_N1:INV.T 0.22.8
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.9.6 0.4.6 0.7.6 0.5.5 0.7.5
0.SINGLE.H.T4 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.2.6 0.3.6 0.3.5 0.6.6 0.5.6
0.SINGLE.H.T3 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.V.R3 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.0.4 0.1.5 0.2.4 0.1.4
0.LONG.H1 0 0 0 1
0.LONG.IO.R0 0 0 1 0
0.SINGLE.V.R0 0 1 1 1
0.SINGLE.V.R3 1 0 0 1
0.OUT.CLB.Y 1 0 1 0
NONE 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.28.9
INT:MUX.IMUX.TIOB1.IK 0.21.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.33.8 0.34.9 0.35.8 0.35.9 0.34.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.30.9
INT:MUX.IMUX.TIOB1.OK 0.19.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.27.9 0.27.8 0.25.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.14.9 0.14.8 0.15.9 0.17.8 0.15.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
0.GCLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.24.9 0.23.8 0.21.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
IO_N0:MUX.O 0.32.9
IO_N1:MUX.O 0.17.9
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
IO_N0:SLEW 0.29.9
IO_N1:SLEW 0.20.9
SLOW 0
FAST 1

Tile CLB.TRS.1

Cells: 2

Bel INT

Switchbox INT

xc3000a CLB.TRS.1 switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H.T0TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V.R4bidirectional pass transistor
TCELL0_SINGLE.H.T0.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T1TCELL0_LONG.V0pass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V.R3bidirectional pass transistor
TCELL0_SINGLE.H.T1.ETCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.H.T2TCELL0_LONG.V1pass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R2bidirectional pass transistor
TCELL0_SINGLE.H.T2.ETCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T3TCELL0_ACLK.Vpass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Qpass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V.R1bidirectional pass transistor
TCELL0_SINGLE.H.T3.ETCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.H.T4TCELL0_SINGLE.H.T4.STUBbuffer
TCELL0_OUT.TIOB1.Ipass transistor
TCELL0_SINGLE.V.R0bidirectional pass transistor
TCELL0_SINGLE.H.T4.ETCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBTCELL0_SINGLE.H.T4buffer
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.T0pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.H.T1.Ebidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.IO.T1pass transistor
TCELL0_OUT.CLB.X.Epass transistor
TCELL0_OUT.TIOB0.Ipass transistor
TCELL0_OUT.TIOB1.Q.Epass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.H.T2.Ebidirectional pass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.H.T3.Ebidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_OUT.CLB.Y.Epass transistor
TCELL0_OUT.TIOB0.Qpass transistor
TCELL0_OUT.TIOB1.I.Epass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_SINGLE.H.T0.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.Ebidirectional pass transistor
TCELL0_SINGLE.H.T4.STUBbidirectional pass transistor
TCELL0_SINGLE.V.R0TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T4bidirectional pass transistor
TCELL0_SINGLE.V.R1TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T3bidirectional pass transistor
TCELL0_SINGLE.V.R2TCELL0_LONG.H0pass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_SINGLE.H.T2bidirectional pass transistor
TCELL0_SINGLE.V.R3TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.RIOB0.Ipass transistor
TCELL0_OUT.RIOB1.Qpass transistor
TCELL0_SINGLE.H.T1bidirectional pass transistor
TCELL0_SINGLE.V.R4TCELL0_OUT.CLB.Xpass transistor
TCELL0_OUT.CLB.Ypass transistor
TCELL0_OUT.RIOB0.Qpass transistor
TCELL0_OUT.RIOB1.Ipass transistor
TCELL0_SINGLE.H.T0bidirectional pass transistor
TCELL0_LONG.H0TCELL0_LONG.IO.R1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T0TCELL0_SINGLE.V0buffer
TCELL0_LONG.V0buffer
TCELL0_LONG.IO.R0buffer
TCELL0_LONG.IO.T1TCELL0_SINGLE.V3buffer
TCELL0_LONG.V1buffer
TCELL0_LONG.IO.R1buffer
TCELL0_ACLK.Vbuffer
TCELL0_LONG.V0TCELL0_SINGLE.H.T1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.V1TCELL0_SINGLE.H.T2buffer
TCELL0_LONG.IO.T1buffer
TCELL0_LONG.IO.R0TCELL0_LONG.H1buffer
TCELL0_LONG.IO.T0buffer
TCELL0_LONG.IO.R1TCELL0_LONG.H0buffer
TCELL0_LONG.IO.T1buffer
TCELL0_GCLK.VTCELL0_GCLKfixed buffer
TCELL0_ACLK.VTCELL0_SINGLE.H.T3buffer
TCELL0_LONG.IO.T1buffer
TCELL0_IOCLK.T0TCELL0_ACLKbuffer
TCELL0_IMUX.IOCLK0buffer
TCELL0_IOCLK.R1TCELL0_GCLKbuffer
TCELL0_IMUX.IOCLK1buffer
TCELL0_IMUX.CLB.ATCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.H1mux
TCELL0_OUT.TIOB0.Imux
TCELL0_IMUX.CLB.BTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.CLB.CTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL0_OUT.RIOB0.Imux
TCELL1_SINGLE.H0mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H4mux
TCELL0_IMUX.CLB.DTCELL0_SINGLE.V1mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.H0mux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL1_OUT.CLB.Ymux
TCELL0_IMUX.CLB.ETCELL0_SINGLE.V2mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.V1mux
TCELL1_SINGLE.H0mux
TCELL0_IMUX.CLB.DITCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.CLB.ECTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V2mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_IMUX.CLB.RDTCELL0_SINGLE.V3mux
TCELL0_LONG.V0mux
TCELL1_SINGLE.H2mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.KTCELL0_SINGLE.V1mux
TCELL0_GCLK.Vmux
TCELL0_ACLK.Vmux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.TIOB0.OTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.V0mux
TCELL0_ACLK.Vmux
TCELL0_IMUX.TIOB0.TTCELL0_SINGLE.H.T1mux
TCELL0_SINGLE.H.T3mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB0.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB0.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_LONG.IO.T0mux
TCELL0_GCLKmux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.TIOB1.TTCELL0_SINGLE.H.T0mux
TCELL0_SINGLE.H.T2mux
TCELL0_LONG.IO.T0mux
TCELL0_LONG.IO.T1mux
TCELL0_IMUX.TIOB1.IKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.TIOB1.OKTCELL0_IOCLK.T0mux
TCELL0_IOCLK.T1mux
TCELL0_IMUX.RIOB0.OTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.H1mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Ymux
TCELL0_IMUX.RIOB0.TTCELL0_SINGLE.V.R0mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB0.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB0.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OTCELL0_SINGLE.V.R1mux
TCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.R0mux
TCELL0_OUT.CLB.Xmux
TCELL1_SINGLE.H1mux
TCELL1_SINGLE.H3mux
TCELL0_IMUX.RIOB1.TTCELL0_SINGLE.V.R2mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.RIOB1.IKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.RIOB1.OKTCELL0_IOCLK.R0mux
TCELL0_IOCLK.R1mux
TCELL0_IMUX.TBUF0.ITCELL0_SINGLE.V3mux
TCELL0_OUT.CLB.Y.Emux
TCELL0_IMUX.TBUF0.TTCELL0_SINGLE.V0mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF1.ITCELL0_SINGLE.V1mux
TCELL0_OUT.CLB.X.Emux
TCELL0_IMUX.TBUF1.TTCELL0_SINGLE.V4mux
TCELL0_LONG.V0mux
TCELL0_IMUX.TBUF2.ITCELL0_SINGLE.V.R3mux
TCELL0_IMUX.TBUF2.TTCELL0_SINGLE.V.R0mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.TBUF3.ITCELL0_SINGLE.V.R1mux
TCELL0_IMUX.TBUF3.TTCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK0TCELL0_SINGLE.H.T2mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R4mux
TCELL0_LONG.IO.R1mux
TCELL0_IMUX.IOCLK1TCELL0_SINGLE.H.T3mux
TCELL0_SINGLE.H.T4mux
TCELL0_SINGLE.V.R3mux
TCELL0_LONG.IO.R1mux

Bel CLB

xc3000a CLB.TRS.1 bel CLB
PinDirectionWires
AinputTCELL0:IMUX.CLB.A
BinputTCELL0:IMUX.CLB.B
CinputTCELL0:IMUX.CLB.C
DinputTCELL0:IMUX.CLB.D
DIinputTCELL0:IMUX.CLB.DI
EinputTCELL0:IMUX.CLB.E
ECinputTCELL0:IMUX.CLB.EC
KinputTCELL0:IMUX.CLB.K
RDinputTCELL0:IMUX.CLB.RD
XoutputTCELL0:OUT.CLB.X
YoutputTCELL0:OUT.CLB.Y

Bel TBUF0

xc3000a CLB.TRS.1 bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF0.T

Bel TBUF1

xc3000a CLB.TRS.1 bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF1.T

Bel TBUF0_E

xc3000a CLB.TRS.1 bel TBUF0_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF2.I
OoutputTCELL0:LONG.H0
TinputTCELL0:IMUX.TBUF2.T

Bel TBUF1_E

xc3000a CLB.TRS.1 bel TBUF1_E
PinDirectionWires
IinputTCELL0:IMUX.TBUF3.I
OoutputTCELL0:LONG.H1
TinputTCELL0:IMUX.TBUF3.T

Bel PULLUP_TBUF0

xc3000a CLB.TRS.1 bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H0

Bel PULLUP_TBUF1

xc3000a CLB.TRS.1 bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H1

Bel IO_E0

xc3000a CLB.TRS.1 bel IO_E0
PinDirectionWires
IoutputTCELL0:OUT.RIOB0.I
IKinputTCELL0:IMUX.RIOB0.IK
OinputTCELL0:IMUX.RIOB0.O
OKinputTCELL0:IMUX.RIOB0.OK
QoutputTCELL0:OUT.RIOB0.Q
TinputTCELL0:IMUX.RIOB0.T

Bel IO_E1

xc3000a CLB.TRS.1 bel IO_E1
PinDirectionWires
IoutputTCELL0:OUT.RIOB1.I
IKinputTCELL0:IMUX.RIOB1.IK
OinputTCELL0:IMUX.RIOB1.O
OKinputTCELL0:IMUX.RIOB1.OK
QoutputTCELL0:OUT.RIOB1.Q
TinputTCELL0:IMUX.RIOB1.T

Bel IO_N0

xc3000a CLB.TRS.1 bel IO_N0
PinDirectionWires
IoutputTCELL0:OUT.TIOB0.I
IKinputTCELL0:IMUX.TIOB0.IK
OinputTCELL0:IMUX.TIOB0.O
OKinputTCELL0:IMUX.TIOB0.OK
QoutputTCELL0:OUT.TIOB0.Q
TinputTCELL0:IMUX.TIOB0.T

Bel IO_N1

xc3000a CLB.TRS.1 bel IO_N1
PinDirectionWires
IoutputTCELL0:OUT.TIOB1.I
IKinputTCELL0:IMUX.TIOB1.IK
OinputTCELL0:IMUX.TIOB1.O
OKinputTCELL0:IMUX.TIOB1.OK
QoutputTCELL0:OUT.TIOB1.Q
TinputTCELL0:IMUX.TIOB1.T

Bel wires

xc3000a CLB.TRS.1 bel wires
WirePins
TCELL0:LONG.H0TBUF0.O, TBUF0_E.O, PULLUP_TBUF0.O
TCELL0:LONG.H1TBUF1.O, TBUF1_E.O, PULLUP_TBUF1.O
TCELL0:IMUX.CLB.ACLB.A
TCELL0:IMUX.CLB.BCLB.B
TCELL0:IMUX.CLB.CCLB.C
TCELL0:IMUX.CLB.DCLB.D
TCELL0:IMUX.CLB.ECLB.E
TCELL0:IMUX.CLB.DICLB.DI
TCELL0:IMUX.CLB.ECCLB.EC
TCELL0:IMUX.CLB.RDCLB.RD
TCELL0:IMUX.CLB.KCLB.K
TCELL0:IMUX.TIOB0.OIO_N0.O
TCELL0:IMUX.TIOB0.TIO_N0.T
TCELL0:IMUX.TIOB0.IKIO_N0.IK
TCELL0:IMUX.TIOB0.OKIO_N0.OK
TCELL0:IMUX.TIOB1.OIO_N1.O
TCELL0:IMUX.TIOB1.TIO_N1.T
TCELL0:IMUX.TIOB1.IKIO_N1.IK
TCELL0:IMUX.TIOB1.OKIO_N1.OK
TCELL0:IMUX.RIOB0.OIO_E0.O
TCELL0:IMUX.RIOB0.TIO_E0.T
TCELL0:IMUX.RIOB0.IKIO_E0.IK
TCELL0:IMUX.RIOB0.OKIO_E0.OK
TCELL0:IMUX.RIOB1.OIO_E1.O
TCELL0:IMUX.RIOB1.TIO_E1.T
TCELL0:IMUX.RIOB1.IKIO_E1.IK
TCELL0:IMUX.RIOB1.OKIO_E1.OK
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TTBUF1.T
TCELL0:IMUX.TBUF2.ITBUF0_E.I
TCELL0:IMUX.TBUF2.TTBUF0_E.T
TCELL0:IMUX.TBUF3.ITBUF1_E.I
TCELL0:IMUX.TBUF3.TTBUF1_E.T
TCELL0:OUT.CLB.XCLB.X
TCELL0:OUT.CLB.YCLB.Y
TCELL0:OUT.TIOB0.IIO_N0.I
TCELL0:OUT.TIOB0.QIO_N0.Q
TCELL0:OUT.TIOB1.IIO_N1.I
TCELL0:OUT.TIOB1.QIO_N1.Q
TCELL0:OUT.RIOB0.IIO_E0.I
TCELL0:OUT.RIOB0.QIO_E0.Q
TCELL0:OUT.RIOB1.IIO_E1.I
TCELL0:OUT.RIOB1.QIO_E1.Q

Bitstream

xc3000a CLB.TRS.1 bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 INT:MUX.IMUX.TIOB0.O[1] INT:MUX.IMUX.TIOB0.O[3] ~IO_N0:INV.O IO_N0:MUX.O[0] ~INT:BUF.LONG.V0.0.LONG.IO.T0 INT:MUX.IMUX.TIOB0.OK[0] IO_N0:SLEW[0] INT:MUX.IMUX.TIOB0.IK[0] INT:MUX.IMUX.TIOB0.T[2] IO_N0:IFF_LATCH ~IO_N0:READBACK_IFF INT:MUX.IMUX.TIOB1.T[2] IO_N1:IFF_LATCH ~INT:BUF.LONG.IO.T1.0.LONG.V1 INT:MUX.IMUX.TIOB1.IK[0] IO_N1:SLEW[0] INT:MUX.IMUX.TIOB1.OK[0] ~INT:BUF.LONG.IO.T1.0.ACLK.V IO_N1:MUX.O[0] ~IO_N1:INV.O INT:MUX.IMUX.TIOB1.O[2] INT:MUX.IMUX.TIOB1.O[4] - - ~MISC:POR - - - - - - - - - - -
8 INT:MUX.IMUX.TIOB0.O[2] INT:MUX.IMUX.TIOB0.O[0] INT:MUX.IMUX.TIOB0.O[4] ~INT:BUF.LONG.IO.T0.0.LONG.V0 - - - ~IO_N0:READBACK_I INT:MUX.IMUX.TIOB0.T[1] IO_N0:INV.T INT:MUX.IMUX.TIOB0.T[0] ~IO_N1:READBACK_IFF INT:MUX.IMUX.TIOB1.T[1] IO_N1:INV.T INT:MUX.IMUX.TIOB1.T[0] ~IO_N1:READBACK_I ~INT:BUF.LONG.V1.0.LONG.IO.T1 ~INT:BUF.ACLK.V.0.LONG.IO.T1 INT:MUX.IMUX.TIOB1.O[1] ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E INT:MUX.IMUX.TIOB1.O[0] INT:MUX.IMUX.TIOB1.O[3] - - - - - - - - - - - - - -
7 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 ~INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I ~INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q ~INT:BUF.LONG.IO.T0.0.SINGLE.V0 ~INT:PASS.SINGLE.V0.0.LONG.IO.T0 ~INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E ~INT:PASS.SINGLE.V3.0.LONG.IO.T1 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 ~INT:BUF.LONG.IO.T1.0.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 ~INT:PASS.SINGLE.H.T3.0.ACLK.V ~INT:BUF.ACLK.V.0.SINGLE.H.T3 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB - - - - - - - - - - - - - -
6 ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T0.SINGLE.V0 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E ~INT:BIPASS.SINGLE.H.T1.SINGLE.V1 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 ~INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E ~INT:PASS.SINGLE.V0.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T0.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E ~INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E ~INT:PASS.SINGLE.V3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E ~INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q ~INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I ~INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB - ~INT:BUF.LONG.IO.R0.0.LONG.IO.T0 ~INT:BUF.LONG.IO.T0.0.LONG.IO.R0 ~INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I INT:MUX.IMUX.IOCLK0[4] ~INT:INV.IOCLK.T0 INT:MUX.IMUX.IOCLK0[2] INT:MUX.IMUX.IOCLK1[1] INT:MUX.IMUX.IOCLK1[0] INT:MUX.IMUX.IOCLK0[3] INT:MUX.IMUX.IOCLK1[3] INT:MUX.IMUX.IOCLK1[4] ~INT:INV.IOCLK.R1 -
5 ~INT:BIPASS.SINGLE.H.T1.SINGLE.V0 INT:MUX.IMUX.TBUF1.T[1] - INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.T[0] INT:MUX.IMUX.CLB.K[1] INT:MUX.IMUX.CLB.EC[2] ~INT:PASS.SINGLE.H.T1.0.LONG.V0 INT:MUX.IMUX.TBUF0.T[0] ~INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 ~INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q INT:MUX.IMUX.TBUF0.T[1] ~INT:PASS.SINGLE.H.T2.0.LONG.V1 INT:MUX.IMUX.TBUF0.I[0] - ~INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 ~INT:BIPASS.SINGLE.H.T2.SINGLE.V3 ~INT:BIPASS.SINGLE.H.T3.SINGLE.V3 ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q ~INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I ~INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q - INT:MUX.IMUX.TBUF3.T[1] INT:MUX.IMUX.TBUF3.T[0] - ~INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 ~INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 INT:MUX.IMUX.IOCLK0[0] ~INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 INT:MUX.IMUX.IOCLK0[1] ~INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 INT:MUX.IMUX.IOCLK1[2] - INT:MUX.IMUX.RIOB0.O[2] ~MISC:TAC
4 ~INT:PASS.SINGLE.V0.0.OUT.CLB.X.E - - - - INT:MUX.IMUX.CLB.K[0] INT:MUX.IMUX.CLB.EC[1] INT:MUX.IMUX.CLB.EC[3] INT:MUX.IMUX.CLB.K[2] INT:MUX.IMUX.CLB.K[3] INT:MUX.IMUX.CLB.DI[1] INT:MUX.IMUX.CLB.DI[2] - - INT:MUX.IMUX.CLB.DI[3] - ~INT:PASS.SINGLE.V3.0.OUT.CLB.X.E - - ~INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E ~INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 ~INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB - ~INT:BUF.LONG.IO.R0.0.LONG.H1 ~INT:BUF.LONG.H1.0.LONG.IO.R0 ~INT:BUF.LONG.IO.T1.0.LONG.IO.R1 ~INT:BUF.LONG.IO.R1.0.LONG.IO.T1 ~IO_E0:READBACK_IFF ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I ~INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 - - INT:MUX.IMUX.RIOB0.O[1] INT:MUX.IMUX.RIOB0.O[0] INT:MUX.IMUX.RIOB0.O[3]
3 ~INT:PASS.SINGLE.V0.0.LONG.H1 INT:MUX.IMUX.CLB.B[2] CLB:MUX.X[1] ~INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E INT:MUX.IMUX.CLB.B[1] CLB:MUX.X[0] INT:MUX.IMUX.CLB.EC[0] INT:MUX.IMUX.CLB.A[0] ~INT:BUF.LONG.V0.0.SINGLE.H.T1 ~CLB:EC_ENABLE ~INT:PASS.SINGLE.V2.0.LONG.H0 CLB:INV.K ~INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E ~INT:BUF.LONG.V1.0.SINGLE.H.T2 INT:MUX.IMUX.CLB.DI[0] INT:MUX.IMUX.CLB.C[3] CLB:MUX.Y[1] ~CLB:RD_ENABLE ~INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E CLB:MUX.Y[0] INT:MUX.IMUX.CLB.D[2] INT:MUX.IMUX.CLB.D[1] ~INT:PASS.SINGLE.V.R0.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R0.0.LONG.H1 ~PULLUP_TBUF0:ENABLE ~INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.T[1] ~INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I ~INT:PASS.SINGLE.V.R3.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.X ~INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y INT:MUX.IMUX.RIOB0.OK[0] IO_E0:MUX.O[0] ~IO_E0:INV.O
2 INT:MUX.IMUX.CLB.E[1] INT:MUX.IMUX.CLB.E[0] INT:MUX.IMUX.CLB.B[4] INT:MUX.IMUX.CLB.B[0] INT:MUX.IMUX.CLB.B[3] INT:MUX.IMUX.CLB.A[2] INT:MUX.IMUX.CLB.A[1] INT:MUX.IMUX.CLB.A[3] CLB:MUX.F3[1] CLB:MUX.DX[0] CLB:MUX.DX[1] CLB:MUX.DY[0] CLB:MUX.DY[1] CLB:MUX.G3[1] INT:MUX.IMUX.CLB.C[2] INT:MUX.IMUX.CLB.C[1] INT:MUX.IMUX.CLB.C[0] INT:MUX.IMUX.CLB.C[4] INT:MUX.IMUX.CLB.RD[1] INT:MUX.IMUX.CLB.RD[0] INT:MUX.IMUX.CLB.D[0] INT:MUX.IMUX.CLB.D[3] ~IO_E0:READBACK_I ~INT:BUF.LONG.IO.R1.0.LONG.H0 INT:MUX.IMUX.TBUF2.T[0] INT:MUX.IMUX.TBUF2.T[1] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q INT:MUX.IMUX.RIOB0.T[2] IO_E0:INV.T INT:MUX.IMUX.RIOB0.T[0] ~INT:PASS.SINGLE.V.R2.0.LONG.H0 ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q IO_E0:IFF_LATCH IO_E0:SLEW[0] INT:MUX.IMUX.RIOB0.IK[0] IO_E1:IFF_LATCH
1 ~CLB:F[3] ~CLB:F[2] ~CLB:F[0] ~CLB:F[1] ~CLB:F[5] ~CLB:F[4] ~CLB:F[6] ~CLB:F[7] CLB:MUX.F3[0] CLB:MUX.F2[0] ~CLB:READBACK_QX ~CLB:READBACK_QY CLB:MUX.G2[0] CLB:MUX.G3[0] ~CLB:G[7] ~CLB:G[6] ~CLB:G[4] ~CLB:G[5] ~CLB:G[1] ~CLB:G[0] ~CLB:G[2] ~CLB:G[3] ~INT:BUF.LONG.H0.0.LONG.IO.R1 INT:MUX.IMUX.RIOB1.T[1] INT:MUX.IMUX.RIOB1.T[2] INT:MUX.IMUX.RIOB1.T[0] ~INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q INT:MUX.IMUX.RIOB1.O[4] ~INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I ~IO_E1:READBACK_IFF ~IO_E1:READBACK_I ~INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q ~INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I INT:MUX.IMUX.RIOB1.OK[0] IO_E1:SLEW[0] INT:MUX.IMUX.RIOB1.IK[0]
0 ~CLB:F[10] ~CLB:F[11] ~CLB:F[9] ~CLB:F[8] ~CLB:F[12] ~CLB:F[13] ~CLB:F[15] ~CLB:F[14] CLB:MUX.F4[0] CLB:MUX.F2[1] - CLB:MODE[0] CLB:MUX.G2[1] CLB:MUX.G4[0] ~CLB:G[14] ~CLB:G[15] ~CLB:G[13] ~CLB:G[12] ~CLB:G[8] ~CLB:G[9] ~CLB:G[11] ~CLB:G[10] - - - IO_E1:INV.T INT:MUX.IMUX.RIOB1.O[0] - - INT:MUX.IMUX.RIOB1.O[1] INT:MUX.IMUX.RIOB1.O[2] INT:MUX.IMUX.RIOB1.O[3] - IO_E1:MUX.O[0] ~IO_E1:INV.O -
CLB:EC_ENABLE 0.26.3
CLB:RD_ENABLE 0.18.3
CLB:READBACK_QX 0.25.1
CLB:READBACK_QY 0.24.1
INT:BIPASS.SINGLE.H.T0.E.SINGLE.H.T1 0.31.6
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V0 0.32.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V1 0.30.7
INT:BIPASS.SINGLE.H.T0.E.SINGLE.V4 0.27.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T0.E 0.30.6
INT:BIPASS.SINGLE.H.T0.SINGLE.H.T1.E 0.35.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V.R4 0.6.5
INT:BIPASS.SINGLE.H.T0.SINGLE.V0 0.34.6
INT:BIPASS.SINGLE.H.T0.SINGLE.V1 0.31.7
INT:BIPASS.SINGLE.H.T0.SINGLE.V4 0.28.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.H.T2 0.26.5
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V0 0.35.6
INT:BIPASS.SINGLE.H.T1.E.SINGLE.V1 0.34.7
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T1.E 0.33.6
INT:BIPASS.SINGLE.H.T1.SINGLE.H.T2.E 0.26.6
INT:BIPASS.SINGLE.H.T1.SINGLE.V.R3 0.4.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V0 0.35.5
INT:BIPASS.SINGLE.H.T1.SINGLE.V1 0.32.6
INT:BIPASS.SINGLE.H.T2.E.SINGLE.H.T3 0.18.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V2 0.21.7
INT:BIPASS.SINGLE.H.T2.E.SINGLE.V3 0.22.6
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T2.E 0.23.7
INT:BIPASS.SINGLE.H.T2.SINGLE.H.T3.E 0.19.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V.R2 0.5.4
INT:BIPASS.SINGLE.H.T2.SINGLE.V2 0.21.6
INT:BIPASS.SINGLE.H.T2.SINGLE.V3 0.19.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.H.T4.STUB 0.14.6
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V2 0.20.5
INT:BIPASS.SINGLE.H.T3.E.SINGLE.V3 0.20.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T3.E 0.18.6
INT:BIPASS.SINGLE.H.T3.SINGLE.H.T4.E 0.16.8
INT:BIPASS.SINGLE.H.T3.SINGLE.V.R1 0.9.5
INT:BIPASS.SINGLE.H.T3.SINGLE.V2 0.19.7
INT:BIPASS.SINGLE.H.T3.SINGLE.V3 0.18.5
INT:BIPASS.SINGLE.H.T4.E.SINGLE.H.T4.STUB 0.14.7
INT:BIPASS.SINGLE.H.T4.E.SINGLE.V4 0.15.7
INT:BIPASS.SINGLE.H.T4.SINGLE.V.R0 0.8.5
INT:BIPASS.SINGLE.H.T4.STUB.SINGLE.V4 0.15.6
INT:BUF.ACLK.V.0.LONG.IO.T1 0.18.8
INT:BUF.ACLK.V.0.SINGLE.H.T3 0.16.7
INT:BUF.LONG.H0.0.LONG.IO.R1 0.13.1
INT:BUF.LONG.H1.0.LONG.IO.R0 0.11.4
INT:BUF.LONG.IO.R0.0.LONG.H1 0.12.4
INT:BUF.LONG.IO.R0.0.LONG.IO.T0 0.12.6
INT:BUF.LONG.IO.R1.0.LONG.H0 0.12.2
INT:BUF.LONG.IO.R1.0.LONG.IO.T1 0.9.4
INT:BUF.LONG.IO.T0.0.LONG.IO.R0 0.11.6
INT:BUF.LONG.IO.T0.0.LONG.V0 0.32.8
INT:BUF.LONG.IO.T0.0.SINGLE.V0 0.27.7
INT:BUF.LONG.IO.T1.0.ACLK.V 0.18.9
INT:BUF.LONG.IO.T1.0.LONG.IO.R1 0.10.4
INT:BUF.LONG.IO.T1.0.LONG.V1 0.22.9
INT:BUF.LONG.IO.T1.0.SINGLE.V3 0.20.7
INT:BUF.LONG.V0.0.LONG.IO.T0 0.31.9
INT:BUF.LONG.V0.0.SINGLE.H.T1 0.27.3
INT:BUF.LONG.V1.0.LONG.IO.T1 0.19.8
INT:BUF.LONG.V1.0.SINGLE.H.T2 0.22.3
INT:BUF.SINGLE.H.T4.0.SINGLE.H.T4.STUB 0.14.4
INT:BUF.SINGLE.H.T4.STUB.0.SINGLE.H.T4 0.15.4
INT:INV.IOCLK.R1 0.1.6
INT:INV.IOCLK.T0 0.8.6
INT:PASS.SINGLE.H.T0.0.OUT.TIOB0.Q 0.14.5
INT:PASS.SINGLE.H.T0.0.OUT.TIOB1.I 0.15.5
INT:PASS.SINGLE.H.T1.0.LONG.V0 0.28.5
INT:PASS.SINGLE.H.T1.0.OUT.TIOB0.I 0.29.7
INT:PASS.SINGLE.H.T1.0.OUT.TIOB1.Q 0.28.7
INT:PASS.SINGLE.H.T2.0.LONG.V1 0.23.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB0.Q 0.17.5
INT:PASS.SINGLE.H.T2.0.OUT.TIOB1.I 0.16.5
INT:PASS.SINGLE.H.T3.0.ACLK.V 0.17.7
INT:PASS.SINGLE.H.T3.0.OUT.CLB.Y.E 0.17.3
INT:PASS.SINGLE.H.T3.0.OUT.TIOB0.I 0.16.6
INT:PASS.SINGLE.H.T3.0.OUT.TIOB1.Q 0.17.6
INT:PASS.SINGLE.H.T4.0.OUT.TIOB1.I 0.10.6
INT:PASS.SINGLE.V.R0.0.LONG.H1 0.11.3
INT:PASS.SINGLE.V.R0.0.OUT.CLB.X 0.13.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB0.I 0.12.3
INT:PASS.SINGLE.V.R0.0.OUT.RIOB1.Q 0.9.1
INT:PASS.SINGLE.V.R1.0.OUT.CLB.Y 0.9.3
INT:PASS.SINGLE.V.R1.0.OUT.RIOB0.Q 0.9.2
INT:PASS.SINGLE.V.R1.0.OUT.RIOB1.I 0.7.1
INT:PASS.SINGLE.V.R2.0.LONG.H0 0.5.2
INT:PASS.SINGLE.V.R2.0.OUT.CLB.Y 0.7.3
INT:PASS.SINGLE.V.R2.0.OUT.RIOB0.I 0.6.4
INT:PASS.SINGLE.V.R3.0.OUT.CLB.X 0.5.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB0.I 0.6.3
INT:PASS.SINGLE.V.R3.0.OUT.RIOB1.Q 0.4.1
INT:PASS.SINGLE.V.R4.0.OUT.CLB.X 0.4.3
INT:PASS.SINGLE.V.R4.0.OUT.CLB.Y 0.3.3
INT:PASS.SINGLE.V.R4.0.OUT.RIOB0.Q 0.4.2
INT:PASS.SINGLE.V.R4.0.OUT.RIOB1.I 0.3.1
INT:PASS.SINGLE.V0.0.LONG.H1 0.35.3
INT:PASS.SINGLE.V0.0.LONG.IO.T0 0.26.7
INT:PASS.SINGLE.V0.0.OUT.CLB.X.E 0.35.4
INT:PASS.SINGLE.V0.0.OUT.TIOB0.I 0.29.6
INT:PASS.SINGLE.V0.0.OUT.TIOB1.Q.E 0.33.7
INT:PASS.SINGLE.V1.0.OUT.CLB.Y.E 0.32.3
INT:PASS.SINGLE.V1.0.OUT.TIOB0.Q 0.25.5
INT:PASS.SINGLE.V1.0.OUT.TIOB1.I.E 0.25.7
INT:PASS.SINGLE.V2.0.LONG.H0 0.25.3
INT:PASS.SINGLE.V2.0.OUT.CLB.Y.E 0.23.3
INT:PASS.SINGLE.V3.0.LONG.IO.T1 0.22.7
INT:PASS.SINGLE.V3.0.OUT.CLB.X.E 0.19.4
INT:PASS.SINGLE.V3.0.OUT.TIOB0.I 0.23.6
INT:PASS.SINGLE.V3.0.OUT.TIOB1.Q.E 0.24.6
INT:PASS.SINGLE.V4.0.OUT.CLB.Y.E 0.16.4
INT:PASS.SINGLE.V4.0.OUT.TIOB0.Q 0.25.6
INT:PASS.SINGLE.V4.0.OUT.TIOB1.I.E 0.24.7
IO_E0:INV.O 0.0.3
IO_E0:READBACK_I 0.13.2
IO_E0:READBACK_IFF 0.8.4
IO_E1:INV.O 0.1.0
IO_E1:READBACK_I 0.5.1
IO_E1:READBACK_IFF 0.6.1
IO_N0:INV.O 0.33.9
IO_N0:READBACK_I 0.28.8
IO_N0:READBACK_IFF 0.25.9
IO_N1:INV.O 0.16.9
IO_N1:READBACK_I 0.20.8
IO_N1:READBACK_IFF 0.24.8
MISC:POR 0.11.9
MISC:TAC 0.0.5
PULLUP_TBUF0:ENABLE 0.10.3
PULLUP_TBUF1:ENABLE 0.7.4
inverted ~[0]
CLB:F 0.29.0 0.28.0 0.30.0 0.31.0 0.34.0 0.35.0 0.33.0 0.32.0 0.28.1 0.29.1 0.31.1 0.30.1 0.35.1 0.34.1 0.32.1 0.33.1
CLB:G 0.20.0 0.21.0 0.19.0 0.18.0 0.15.0 0.14.0 0.16.0 0.17.0 0.21.1 0.20.1 0.18.1 0.19.1 0.14.1 0.15.1 0.17.1 0.16.1
inverted ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
CLB:INV.K 0.24.3
IO_E0:IFF_LATCH 0.3.2
IO_E0:INV.T 0.7.2
IO_E1:IFF_LATCH 0.0.2
IO_E1:INV.T 0.10.0
IO_N0:IFF_LATCH 0.26.9
IO_N0:INV.T 0.26.8
IO_N1:IFF_LATCH 0.23.9
IO_N1:INV.T 0.22.8
non-inverted [0]
CLB:MODE 0.24.0
FG 0
FGM 1
CLB:MUX.DX 0.25.2 0.26.2
G 0 0
DI 0 1
F 1 1
CLB:MUX.DY 0.23.2 0.24.2
F 0 0
DI 0 1
G 1 1
CLB:MUX.F2 0.26.0 0.26.1
CLB:MUX.G2 0.23.0 0.23.1
B 0 1
QX 1 0
QY 1 1
CLB:MUX.F3 0.27.2 0.27.1
CLB:MUX.G3 0.22.2 0.22.1
C 0 1
QX 1 0
QY 1 1
CLB:MUX.F4 0.27.0
CLB:MUX.G4 0.22.0
D 0
E 1
CLB:MUX.X 0.33.3 0.30.3
F 0 0
QX 1 1
CLB:MUX.Y 0.19.3 0.16.3
G 0 0
QY 1 1
INT:MUX.IMUX.CLB.A 0.28.2 0.30.2 0.29.2 0.28.3
0.LONG.H1 0 0 0 1
0.SINGLE.H.T0 0 0 1 1
0.OUT.TIOB0.I 0 1 0 0
0.SINGLE.V0 0 1 1 0
0.SINGLE.H.T2 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.B 0.33.2 0.31.2 0.34.3 0.31.3 0.32.2
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T3 0 0 1 0 1
0.LONG.V0 0 0 1 1 0
0.SINGLE.V0 0 1 1 1 1
0.SINGLE.V4 1 0 0 1 1
0.SINGLE.V2 1 0 1 0 1
0.OUT.CLB.X.E 1 0 1 1 0
0.SINGLE.H.T1 1 1 1 1 1
INT:MUX.IMUX.CLB.C 0.18.2 0.20.3 0.21.2 0.20.2 0.19.2
1.SINGLE.H0 0 0 1 0 1
0.SINGLE.V3 0 0 1 1 1
0.LONG.V1 0 1 0 0 1
0.SINGLE.V4 0 1 0 1 1
0.OUT.RIOB0.I 0 1 1 0 0
1.SINGLE.H2 0 1 1 1 0
1.SINGLE.H4 1 1 1 0 1
0.SINGLE.V1 1 1 1 1 1
INT:MUX.IMUX.CLB.D 0.14.2 0.15.3 0.14.3 0.15.2
1.OUT.CLB.Y 0 0 1 0
0.SINGLE.V1 0 0 1 1
0.LONG.H0 0 1 0 0
0.SINGLE.V3 0 1 0 1
1.SINGLE.H3 1 1 1 0
1.SINGLE.H1 1 1 1 1
INT:MUX.IMUX.CLB.DI 0.21.4 0.24.4 0.25.4 0.21.3
0.SINGLE.H.T4 0 0 1 1
0.SINGLE.V0 0 1 0 1
0.LONG.IO.T1 0 1 1 0
0.SINGLE.V3 1 1 1 1
INT:MUX.IMUX.CLB.E 0.35.2 0.34.2
0.LONG.V1 0 0
0.SINGLE.V2 0 1
1.SINGLE.H0 1 0
0.SINGLE.V4 1 1
INT:MUX.IMUX.CLB.EC 0.28.4 0.29.5 0.29.4 0.29.3
0.SINGLE.H.T1 0 0 1 1
0.SINGLE.H.T4 0 1 0 1
0.LONG.V0 0 1 1 0
0.LONG.V1 1 1 0 1
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.CLB.K 0.26.4 0.27.4 0.30.5 0.30.4
0.SINGLE.V1 0 0 1 1
0.GCLK.V 0 1 0 1
0.ACLK.V 0 1 1 0
1.SINGLE.H3 1 1 1 1
INT:MUX.IMUX.CLB.RD 0.17.2 0.16.2
1.LONG.H1 0 0
0.SINGLE.V3 0 1
0.LONG.V0 1 0
1.SINGLE.H2 1 1
INT:MUX.IMUX.IOCLK0 0.9.6 0.4.6 0.7.6 0.5.5 0.7.5
0.SINGLE.H.T4 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.H.T2 0 1 1 1 1
ACLK 1 1 1 1 1
INT:MUX.IMUX.IOCLK1 0.2.6 0.3.6 0.3.5 0.6.6 0.5.6
0.SINGLE.H.T3 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.LONG.IO.R1 0 0 1 1 0
0.SINGLE.V.R3 0 1 1 1 1
GCLK 1 1 1 1 1
INT:MUX.IMUX.RIOB0.IK 0.1.2
INT:MUX.IMUX.RIOB1.IK 0.0.1
0.IOCLK.R0 0
0.IOCLK.R1 1
INT:MUX.IMUX.RIOB0.O 0.0.4 0.1.5 0.2.4 0.1.4
0.LONG.H1 0 0 0 1
0.LONG.IO.R0 0 0 1 0
0.SINGLE.V.R0 0 1 1 1
0.SINGLE.V.R3 1 0 0 1
0.OUT.CLB.Y 1 0 1 0
NONE 1 1 1 1
INT:MUX.IMUX.RIOB0.OK 0.2.3
INT:MUX.IMUX.RIOB1.OK 0.2.1
0.IOCLK.R1 0
0.IOCLK.R0 1
INT:MUX.IMUX.RIOB0.T 0.8.2 0.8.3 0.6.2
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R3 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R0 1 1 1
INT:MUX.IMUX.RIOB1.O 0.8.1 0.4.0 0.5.0 0.6.0 0.9.0
0.SINGLE.V.R1 0 0 0 1 1
0.SINGLE.V.R4 0 0 1 0 1
0.OUT.CLB.X 0 0 1 1 0
0.SINGLE.V.R2 0 1 1 1 1
0.LONG.H0 1 0 0 1 1
0.LONG.IO.R0 1 0 1 0 1
1.SINGLE.H3 1 0 1 1 0
1.SINGLE.H1 1 1 1 1 1
INT:MUX.IMUX.RIOB1.T 0.11.1 0.12.1 0.10.1
0.LONG.IO.R0 0 0 1
GND 0 1 0
0.SINGLE.V.R4 0 1 1
PULLUP 1 0 0
0.LONG.IO.R1 1 0 1
VCC 1 1 0
0.SINGLE.V.R2 1 1 1
INT:MUX.IMUX.TBUF0.I 0.22.5
0.OUT.CLB.Y.E 0
0.SINGLE.V3 1
INT:MUX.IMUX.TBUF0.T 0.24.5 0.27.5
0.SINGLE.V0 0 0
0.LONG.V0 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF1.I 0.32.5
0.OUT.CLB.X.E 0
0.SINGLE.V1 1
INT:MUX.IMUX.TBUF1.T 0.34.5 0.31.5
0.LONG.V0 0 0
0.SINGLE.V4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF2.T 0.10.2 0.11.2
0.SINGLE.V.R0 0 0
0.LONG.IO.R1 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TBUF3.T 0.12.5 0.11.5
0.LONG.IO.R1 0 0
0.SINGLE.V.R4 0 1
GND 1 0
VCC 1 1
INT:MUX.IMUX.TIOB0.IK 0.28.9
INT:MUX.IMUX.TIOB1.IK 0.21.9
0.IOCLK.T0 0
0.IOCLK.T1 1
INT:MUX.IMUX.TIOB0.O 0.33.8 0.34.9 0.35.8 0.35.9 0.34.8
0.LONG.V0 0 0 1 0 1
0.SINGLE.H.T1 0 0 1 1 1
0.LONG.IO.T0 0 1 0 0 1
0.SINGLE.H.T3 0 1 0 1 1
0.SINGLE.V3 0 1 1 0 0
0.ACLK.V 0 1 1 1 0
0.SINGLE.V4 1 1 1 0 1
0.SINGLE.V0 1 1 1 1 1
INT:MUX.IMUX.TIOB0.OK 0.30.9
INT:MUX.IMUX.TIOB1.OK 0.19.9
0.IOCLK.T1 0
0.IOCLK.T0 1
INT:MUX.IMUX.TIOB0.T 0.27.9 0.27.8 0.25.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T3 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T1 1 1 1
INT:MUX.IMUX.TIOB1.O 0.14.9 0.14.8 0.15.9 0.17.8 0.15.8
0.SINGLE.H.T0 0 0 0 1 1
0.SINGLE.H.T4 0 0 1 0 1
0.SINGLE.H.T2 0 1 1 1 1
0.OUT.CLB.Y 1 0 0 1 1
0.LONG.IO.T0 1 0 1 0 1
0.GCLK 1 0 1 1 0
NONE 1 1 1 1 1
INT:MUX.IMUX.TIOB1.T 0.24.9 0.23.8 0.21.8
0.LONG.IO.T1 0 0 1
GND 0 1 0
0.SINGLE.H.T2 0 1 1
PULLUP 1 0 0
0.LONG.IO.T0 1 0 1
VCC 1 1 0
0.SINGLE.H.T0 1 1 1
IO_E0:MUX.O 0.1.3
IO_E1:MUX.O 0.2.0
IO_N0:MUX.O 0.32.9
IO_N1:MUX.O 0.17.9
OFF 0
O 1
IO_E0:SLEW 0.2.2
IO_E1:SLEW 0.1.1
IO_N0:SLEW 0.29.9
IO_N1:SLEW 0.20.9
SLOW 0
FAST 1