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Splitters

Tile LLH.B

Cells: 2

Bel LLH

Switchbox LLH

xc3000a LLH.B switchbox LLH
DestinationSourceKind
TCELL0_LONG.IO.B0TCELL1_LONG.IO.B0bidirectional pass transistor
TCELL1_LONG.IO.B0TCELL0_LONG.IO.B0bidirectional pass transistor

Bitstream

xc3000a LLH.B bittile 0
BitFrame
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 LLH:BIPASS.0.LONG.IO.B0.1.LONG.IO.B0 - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - -
LLH:BIPASS.0.LONG.IO.B0.1.LONG.IO.B0 0.16.1
non-inverted [0]

Tile LLH.T

Cells: 2

Bel LLH

Switchbox LLH

xc3000a LLH.T switchbox LLH
DestinationSourceKind
TCELL0_LONG.IO.T0TCELL1_LONG.IO.T0bidirectional pass transistor
TCELL1_LONG.IO.T0TCELL0_LONG.IO.T0bidirectional pass transistor

Bitstream

xc3000a LLH.T bittile 0
BitFrame
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
8 LLH:BIPASS.0.LONG.IO.T0.1.LONG.IO.T0 - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - -
LLH:BIPASS.0.LONG.IO.T0.1.LONG.IO.T0 0.16.8
non-inverted [0]

Tile LLV

Cells: 2

Bel LLV

Switchbox LLV

xc3000a LLV switchbox LLV
DestinationSourceKind
TCELL0_LONG.V0TCELL1_LONG.V0bidirectional pass transistor
TCELL0_LONG.V1TCELL1_LONG.V1bidirectional pass transistor
TCELL1_LONG.V0TCELL0_LONG.V0bidirectional pass transistor
TCELL1_LONG.V1TCELL0_LONG.V1bidirectional pass transistor

Bitstream

xc3000a LLV bittile 0
BitFrame
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 LLV:BIPASS.0.LONG.V0.1.LONG.V0 - - - - - - - - - - - - - - - - - - - - LLV:BIPASS.0.LONG.V1.1.LONG.V1
LLV:BIPASS.0.LONG.V0.1.LONG.V0 0.21.0
LLV:BIPASS.0.LONG.V1.1.LONG.V1 0.0.0
non-inverted [0]

Tile LLV.L

Cells: 2

Bel LLV

Switchbox LLV

xc3000a LLV.L switchbox LLV
DestinationSourceKind
TCELL0_LONG.V0TCELL1_LONG.V0bidirectional pass transistor
TCELL0_LONG.V1TCELL1_LONG.V1bidirectional pass transistor
TCELL0_LONG.IO.L0TCELL1_LONG.IO.L0bidirectional pass transistor
TCELL1_LONG.V0TCELL0_LONG.V0bidirectional pass transistor
TCELL1_LONG.V1TCELL0_LONG.V1bidirectional pass transistor
TCELL1_LONG.IO.L0TCELL0_LONG.IO.L0bidirectional pass transistor

Bitstream

xc3000a LLV.L bittile 0
BitFrame
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 LLV:BIPASS.0.LONG.IO.L0.1.LONG.IO.L0 LLV:BIPASS.0.LONG.V0.1.LONG.V0 - - - - - - - - - - - - - - - - - - - - LLV:BIPASS.0.LONG.V1.1.LONG.V1
LLV:BIPASS.0.LONG.IO.L0.1.LONG.IO.L0 0.22.0
LLV:BIPASS.0.LONG.V0.1.LONG.V0 0.21.0
LLV:BIPASS.0.LONG.V1.1.LONG.V1 0.0.0
non-inverted [0]

Tile LLV.R

Cells: 2

Bel LLV

Switchbox LLV

xc3000a LLV.R switchbox LLV
DestinationSourceKind
TCELL0_LONG.V0TCELL1_LONG.V0bidirectional pass transistor
TCELL0_LONG.V1TCELL1_LONG.V1bidirectional pass transistor
TCELL0_LONG.IO.R0TCELL1_LONG.IO.R0bidirectional pass transistor
TCELL1_LONG.V0TCELL0_LONG.V0bidirectional pass transistor
TCELL1_LONG.V1TCELL0_LONG.V1bidirectional pass transistor
TCELL1_LONG.IO.R0TCELL0_LONG.IO.R0bidirectional pass transistor

Bitstream

xc3000a LLV.R bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 LLV:BIPASS.0.LONG.V0.1.LONG.V0 - - - - - - - - - - - - - - - - - - - - LLV:BIPASS.0.LONG.V1.1.LONG.V1 - - - - - - - - - - - - - LLV:BIPASS.0.LONG.IO.R0.1.LONG.IO.R0
xc3000a LLV.R bittile 1
BitFrame
0
0 ~MISC:TLC
LLV:BIPASS.0.LONG.IO.R0.1.LONG.IO.R0 0.0.0
LLV:BIPASS.0.LONG.V0.1.LONG.V0 0.35.0
LLV:BIPASS.0.LONG.V1.1.LONG.V1 0.14.0
non-inverted [0]
MISC:TLC 1.0.0
inverted ~[0]

Tile LLV.LS

Cells: 2

Bel LLV

Switchbox LLV

xc3000a LLV.LS switchbox LLV
DestinationSourceKind
TCELL0_LONG.IO.L0TCELL1_LONG.IO.L0bidirectional pass transistor
TCELL1_LONG.IO.L0TCELL0_LONG.IO.L0bidirectional pass transistor

Bitstream

xc3000a LLV.LS bittile 0
BitFrame
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
2 LLV:BIPASS.0.LONG.IO.L0.1.LONG.IO.L0 - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
LLV:BIPASS.0.LONG.IO.L0.1.LONG.IO.L0 0.28.2
non-inverted [0]

Tile LLV.RS

Cells: 2

Bel LLV

Switchbox LLV

xc3000a LLV.RS switchbox LLV
DestinationSourceKind
TCELL0_LONG.IO.R0TCELL1_LONG.IO.R0bidirectional pass transistor
TCELL1_LONG.IO.R0TCELL0_LONG.IO.R0bidirectional pass transistor

Bitstream

xc3000a LLV.RS bittile 0
BitFrame
13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 LLV:BIPASS.0.LONG.IO.R0.1.LONG.IO.R0 - - - - - - - - - - - - ~MISC:TLC
LLV:BIPASS.0.LONG.IO.R0.1.LONG.IO.R0 0.13.0
non-inverted [0]
MISC:TLC 0.0.0
inverted ~[0]