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Input/Output

Tile IO.L

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.L switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.W.2mux
TCELL0_IO.DOUBLE.1.W.2mux
TCELL0_IO.DOUBLE.2.W.2mux
TCELL0_IO.DOUBLE.3.W.2mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.1mux
TCELL1_DOUBLE.H1.0mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.L bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.L bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.L bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.L bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.L bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G3.W
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.L bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F3.W
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.L bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.L bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C3.W
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.L bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.L bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F3.WIO1.O
TCELL0:IMUX.CLB.G3.WIO0.O
TCELL0:IMUX.CLB.C3.WDEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2

Bitstream

xc4000e IO.L bittile 0
BitFrame
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~IO0:INV.T ~IO0:INV.OFF_CLK IO0:SLEW[0] IO0:OMUX[2] IO0:OMUX[1] INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.LONG.IO.V1[0] ~INT:PASS.SINGLE.H3.0.DEC.V2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 ~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 ~INT:PASS.SINGLE.H7.0.DEC.V0 ~IO0:OFF_CE_ENABLE ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 ~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2
8 ~IO0:READBACK_I1 IO0:OMUX[0] ~IO0:READBACK_I2 ~IO0:READBACK_OFF IO0:OMUX[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[5] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[3] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[2] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 ~IO0:IFF_CE_ENABLE INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S
7 IO0:MUX.OFF_D[0] ~IO0:OFF_SRVAL IO0:PULL[0] ~IO0:INV.OFF_D IO0:OFF_USED INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[7] ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 ~PULLUP_TBUF1:ENABLE INT:MUX.LONG.H5[3] ~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 ~IO1:IFF_CE_ENABLE INT:MUX.LONG.H5[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[0] -
6 IO0:I2MUX[1] IO0:I2MUX[2] ~IO0:INV.IFF_CLK ~IO0:IFF_SRVAL IO0:IFF_D[0] ~DEC1:O4_P ~DEC1:O2_P INT:MUX.IMUX.IOB0.OK[5] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] DEC1:O1_N INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[1] ~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 INT:MUX.LONG.H5[0] INT:MUX.LONG.H5[2] ~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 INT:MUX.LONG.H4[3] INT:MUX.LONG.H4[2]
5 IO0:I2MUX[0] IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] DEC2:O4_P DEC1:O4_N DEC1:O2_N ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[6] ~DEC2:O3_N ~INT:PASS.SINGLE.H4.0.DEC.V1 DEC2:O1_P ~DEC1:O1_P ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 ~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 ~INT:PASS.SINGLE.H0.0.DEC.V3 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2
4 IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[1] IO1:I1MUX[2] ~DEC2:O4_N ~DEC0:O4_P DEC0:O2_N DEC2:O2_P DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC2:O1_N ~DEC0:O1_P ~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 ~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 INT:MUX.IMUX.IOB0.TS[0] ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S
3 IO1:I2MUX[1] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:READBACK_I2 ~IO1:READBACK_I1 DEC0:O4_N ~DEC0:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC1:O3_P ~IO1:IFF_SRVAL DEC0:O3_N INT:MUX.IMUX.IOB1.IK[7] DEC0:O1_N ~TBUF1:DRIVE1 INT:MUX.IMUX.IOB1.TS[3] ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[6] - INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] ~TBUF0:DRIVE1
2 IO1:MUX.OFF_D[0] ~IO1:INV.OFF_D ~IO1:READBACK_OFF IO1:OFF_USED IO1:IFF_D[0] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.TS[2] - INT:MUX.IMUX.IOB1.TS[0] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[7] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB1.TS[4]
1 IO1:PULL[1] ~IO1:OFF_SRVAL IO1:PULL[0] IO1:OMUX[0] IO1:OMUX[3] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.LONG.H1[3] INT:MUX.LONG.H1[2] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.LONG.H0[3] INT:MUX.LONG.H0[2]
0 IO1:SLEW[0] ~IO1:INV.T ~IO1:INV.OFF_CLK IO1:OMUX[2] IO1:OMUX[1] INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[0] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[1]
xc4000e IO.L bittile 1
BitFrame
0
7 ~PULLUP_TBUF0:ENABLE
6 -
5 -
4 -
3 -
2 -
1 -
0 -
DEC0:O1_N 0.13.3
DEC0:O2_N 0.19.4
DEC0:O3_N 0.15.3
DEC0:O4_N 0.20.3
DEC1:O1_N 0.13.6
DEC1:O2_N 0.19.5
DEC1:O3_N 0.17.4
DEC1:O4_N 0.20.5
DEC2:O1_P 0.14.5
DEC2:O2_P 0.18.4
DEC2:O3_P 0.16.4
DEC2:O4_P 0.21.5
IO0:OFF_USED 0.21.7
IO1:OFF_USED 0.22.2
non-inverted [0]
DEC0:O1_P 0.13.4
DEC0:O2_P 0.19.3
DEC0:O3_P 0.15.4
DEC0:O4_P 0.20.4
DEC1:O1_P 0.13.5
DEC1:O2_P 0.19.6
DEC1:O3_P 0.17.3
DEC1:O4_P 0.20.6
DEC2:O1_N 0.14.4
DEC2:O2_N 0.18.5
DEC2:O3_N 0.16.5
DEC2:O4_N 0.21.4
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 0.8.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 0.5.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 0.2.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 0.14.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 0.12.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 0.10.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 0.5.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 0.3.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 0.1.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 0.11.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 0.10.3
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 0.9.4
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 0.3.5
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 0.11.9
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 0.10.4
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 0.2.9
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0 0.9.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2 0.0.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 0.6.5
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0 0.15.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 0.9.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 0.13.9
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0 0.12.5
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 0.8.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 0.11.4
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0 0.6.9
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2 0.0.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 0.4.9
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S 0.2.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 0.5.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 0.2.6
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S 0.2.4
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 0.10.5
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 0.6.6
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 0.10.6
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 0.9.7
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 0.12.4
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 0.8.6
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 0.3.6
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 0.8.7
INT:PASS.SINGLE.H0.0.DEC.V3 0.7.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.1.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.3.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.4.4
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.12.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.4.7
INT:PASS.SINGLE.H3.0.DEC.V2 0.16.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.10.8
INT:PASS.SINGLE.H4.0.DEC.V1 0.15.5
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.0.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.6.4
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.5.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.8.8
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.1.8
INT:PASS.SINGLE.H7.0.DEC.V0 0.8.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.0.8
IO0:IFF_CE_ENABLE 0.7.8
IO0:IFF_SRVAL 0.22.6
IO0:INV.IFF_CLK 0.23.6
IO0:INV.OFF_CLK 0.24.9
IO0:INV.OFF_D 0.22.7
IO0:INV.T 0.25.9
IO0:OFF_CE_ENABLE 0.7.9
IO0:OFF_SRVAL 0.24.7
IO0:READBACK_I1 0.25.8
IO0:READBACK_I2 0.23.8
IO0:READBACK_OFF 0.22.8
IO1:IFF_CE_ENABLE 0.7.7
IO1:IFF_SRVAL 0.16.3
IO1:INV.IFF_CLK 0.23.3
IO1:INV.OFF_CLK 0.23.0
IO1:INV.OFF_D 0.24.2
IO1:INV.T 0.24.0
IO1:OFF_CE_ENABLE 0.7.6
IO1:OFF_SRVAL 0.24.1
IO1:READBACK_I1 0.21.3
IO1:READBACK_I2 0.22.3
IO1:READBACK_OFF 0.23.2
PULLUP_TBUF0:ENABLE 1.0.7
PULLUP_TBUF1:ENABLE 0.11.7
TBUF0:DRIVE1 0.0.3
TBUF1:DRIVE1 0.12.3
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.13.7 0.20.7 0.14.7 0.16.7 0.18.7 0.17.7 0.15.7 0.19.7
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.18.8 0.19.8 0.20.9 0.18.9 0.19.9 0.20.8
0.DEC.V0 0 0 0 1 1 1
0.DOUBLE.H0.0 0 0 1 1 1 1
0.DEC.V1 0 1 0 0 1 1
0.DEC.V2 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.9.6 0.17.5 0.18.6 0.12.6 0.15.6 0.14.6 0.11.6 0.16.6
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.4.2 0.6.2 0.1.3 0.2.3 0.6.3 0.5.2 0.5.3 0.7.4
0.LONG.IO.V3 0 0 0 0 1 1 1 1
0.LONG.IO.V1 0 0 0 1 1 0 1 1
0.GCLK0 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.W.1 0 0 1 1 1 1 1 1
0.LONG.IO.V0 0 1 0 0 0 1 1 1
0.DEC.V1 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 0 0 1 1 1 1
0.LONG.IO.V2 1 1 0 1 1 0 1 1
0.DEC.V0 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.W.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.3 0.18.1 0.18.3 0.14.2 0.19.1 0.17.1 0.20.1 0.15.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.16.1 0.20.0 0.19.0 0.18.0 0.16.0 0.17.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
1.DOUBLE.H1.0 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V2 0 1 1 1 0 1
0.DEC.V3 0 1 1 1 1 0
1.DOUBLE.H0.1 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.11.2 0.18.2 0.17.2 0.13.2 0.19.2 0.12.2 0.16.2 0.20.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.2.2 0.8.3 0.9.3 0.0.2 0.11.3 0.9.2 0.10.2 0.7.2
0.DEC.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V0 0 0 1 0 1 0 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.W.0 0 1 0 0 0 1 1 1
0.LONG.IO.V2 0 1 0 0 1 0 1 1
0.DEC.V0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.W.1 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.LONG.IO.V1 1 1 1 0 0 1 1 1
0.LONG.IO.V3 1 1 1 0 1 0 1 1
0.GCLK0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.2.1 0.2.0 0.4.0 0.4.1 0.3.0 0.3.1
0.IO.DOUBLE.2.W.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.W.0 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.5.0 0.5.1 0.8.0 0.6.1 0.7.0 0.6.0
0.IO.DOUBLE.1.W.0 0 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.W.0 0 1 1 1 1 1
0.IO.DOUBLE.1.W.1 1 0 0 1 1 1
0.LONG.IO.V2 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.13.0 0.11.1 0.13.1 0.11.0 0.12.0 0.12.1
0.IO.DOUBLE.2.W.0 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.W.1 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.7.1 0.10.0 0.10.1 0.9.0 0.9.1 0.8.1
0.IO.DOUBLE.0.W.1 0 0 0 1 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1
0.LONG.IO.V2 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V3 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.1.2 0.3.2 0.4.3 0.3.3
0.IO.DOUBLE.1.W.0 0 0 1 1
0.IO.DOUBLE.2.W.0 0 1 0 1
0.IO.DOUBLE.3.W.0 0 1 1 0
0.IO.DOUBLE.0.W.0 1 1 1 1
INT:MUX.IO.DBUF.V1 0.14.8 0.17.8 0.16.8 0.15.8
0.IO.DOUBLE.0.W.2 0 0 1 1
0.IO.DOUBLE.1.W.2 0 1 0 1
0.IO.DOUBLE.3.W.2 0 1 1 0
0.IO.DOUBLE.2.W.2 1 1 1 1
INT:MUX.LONG.H0 0.1.1 0.0.1 0.0.0 0.1.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.15.1 0.14.1 0.15.0 0.14.0
0.LONG.IO.V1 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.1.6 0.0.6 0.3.7 0.1.7
0.LONG.IO.V2 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.10.7 0.4.6 0.6.7 0.5.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.4.5 0.1.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.13.8 0.11.8 0.12.8 0.17.9
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.5.8 0.2.8 0.4.8 0.3.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.6.8 0.9.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.22.5 0.24.5 0.23.5
IO0:I2MUX 0.24.6 0.25.6 0.25.5
IO1:I1MUX 0.22.4 0.23.4 0.25.4
IO1:I2MUX 0.24.3 0.25.3 0.24.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.6
IO1:IFF_D 0.21.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.25.7
IO1:MUX.OFF_D 0.25.2
O 0
CE 1
IO0:OMUX 0.21.8 0.22.9 0.21.9 0.24.8
IO1:OMUX 0.21.1 0.22.0 0.21.0 0.22.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.17.6 0.23.7
IO1:PULL 0.25.1 0.23.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.23.9
IO1:SLEW 0.25.0
FAST 0
SLOW 1

Tile IO.L.T

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.L.T switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.W.2mux
TCELL0_IO.DOUBLE.1.W.2mux
TCELL0_IO.DOUBLE.2.W.2mux
TCELL0_IO.DOUBLE.3.W.2mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.1mux
TCELL1_DOUBLE.H1.0mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.L.T bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.L.T bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.L.T bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.L.T bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.L.T bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G3.W
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.L.T bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F3.W
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.L.T bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.L.T bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C3.W
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.L.T bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.L.T bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F3.WIO1.O
TCELL0:IMUX.CLB.G3.WIO0.O
TCELL0:IMUX.CLB.C3.WDEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.L.T bittile 0
BitFrame
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~IO0:INV.T ~IO0:INV.OFF_CLK IO0:SLEW[0] IO0:OMUX[2] IO0:OMUX[1] INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.LONG.IO.V1[0] ~INT:PASS.SINGLE.H3.0.DEC.V2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 ~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 ~INT:PASS.SINGLE.H7.0.DEC.V0 ~IO0:OFF_CE_ENABLE ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 ~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2
8 ~IO0:READBACK_I1 IO0:OMUX[0] ~IO0:READBACK_I2 ~IO0:READBACK_OFF IO0:OMUX[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[5] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[3] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[2] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 ~IO0:IFF_CE_ENABLE INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S
7 IO0:MUX.OFF_D[0] ~IO0:OFF_SRVAL IO0:PULL[0] ~IO0:INV.OFF_D IO0:OFF_USED INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[7] ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 ~PULLUP_TBUF1:ENABLE INT:MUX.LONG.H5[3] ~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 ~IO1:IFF_CE_ENABLE INT:MUX.LONG.H5[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[0] -
6 IO0:I2MUX[1] IO0:I2MUX[2] ~IO0:INV.IFF_CLK ~IO0:IFF_SRVAL IO0:IFF_D[0] ~DEC1:O4_P ~DEC1:O2_P INT:MUX.IMUX.IOB0.OK[5] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] DEC1:O1_N INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[1] ~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 INT:MUX.LONG.H5[0] INT:MUX.LONG.H5[2] ~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 INT:MUX.LONG.H4[3] INT:MUX.LONG.H4[2]
5 IO0:I2MUX[0] IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] DEC2:O4_P DEC1:O4_N DEC1:O2_N ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[6] ~DEC2:O3_N ~INT:PASS.SINGLE.H4.0.DEC.V1 DEC2:O1_P ~DEC1:O1_P ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 ~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 ~INT:PASS.SINGLE.H0.0.DEC.V3 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2
4 IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[1] IO1:I1MUX[2] ~DEC2:O4_N ~DEC0:O4_P DEC0:O2_N DEC2:O2_P DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC2:O1_N ~DEC0:O1_P ~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 ~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 INT:MUX.IMUX.IOB0.TS[0] ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S
3 IO1:I2MUX[1] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:READBACK_I2 ~IO1:READBACK_I1 DEC0:O4_N ~DEC0:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC1:O3_P ~IO1:IFF_SRVAL DEC0:O3_N INT:MUX.IMUX.IOB1.IK[7] DEC0:O1_N ~TBUF1:DRIVE1 INT:MUX.IMUX.IOB1.TS[3] ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[6] - INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] ~TBUF0:DRIVE1
2 IO1:MUX.OFF_D[0] ~IO1:INV.OFF_D ~IO1:READBACK_OFF IO1:OFF_USED IO1:IFF_D[0] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.TS[2] - INT:MUX.IMUX.IOB1.TS[0] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[7] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB1.TS[4]
1 IO1:PULL[1] ~IO1:OFF_SRVAL IO1:PULL[0] IO1:OMUX[0] IO1:OMUX[3] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.LONG.H1[3] INT:MUX.LONG.H1[2] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.LONG.H0[3] INT:MUX.LONG.H0[2]
0 IO1:SLEW[0] ~IO1:INV.T ~IO1:INV.OFF_CLK IO1:OMUX[2] IO1:OMUX[1] INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[0] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[1]
xc4000e IO.L.T bittile 1
BitFrame
0
7 ~PULLUP_TBUF0:ENABLE
6 -
5 -
4 -
3 -
2 -
1 -
0 -
DEC0:O1_N 0.13.3
DEC0:O2_N 0.19.4
DEC0:O3_N 0.15.3
DEC0:O4_N 0.20.3
DEC1:O1_N 0.13.6
DEC1:O2_N 0.19.5
DEC1:O3_N 0.17.4
DEC1:O4_N 0.20.5
DEC2:O1_P 0.14.5
DEC2:O2_P 0.18.4
DEC2:O3_P 0.16.4
DEC2:O4_P 0.21.5
IO0:OFF_USED 0.21.7
IO1:OFF_USED 0.22.2
non-inverted [0]
DEC0:O1_P 0.13.4
DEC0:O2_P 0.19.3
DEC0:O3_P 0.15.4
DEC0:O4_P 0.20.4
DEC1:O1_P 0.13.5
DEC1:O2_P 0.19.6
DEC1:O3_P 0.17.3
DEC1:O4_P 0.20.6
DEC2:O1_N 0.14.4
DEC2:O2_N 0.18.5
DEC2:O3_N 0.16.5
DEC2:O4_N 0.21.4
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 0.8.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 0.5.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 0.2.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 0.14.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 0.12.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 0.10.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 0.5.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 0.3.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 0.1.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 0.11.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 0.10.3
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 0.9.4
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 0.3.5
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 0.11.9
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 0.10.4
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 0.2.9
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0 0.9.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2 0.0.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 0.6.5
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0 0.15.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 0.9.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 0.13.9
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0 0.12.5
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 0.8.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 0.11.4
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0 0.6.9
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2 0.0.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 0.4.9
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S 0.2.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 0.5.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 0.2.6
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S 0.2.4
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 0.10.5
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 0.6.6
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 0.10.6
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 0.9.7
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 0.12.4
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 0.8.6
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 0.3.6
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 0.8.7
INT:PASS.SINGLE.H0.0.DEC.V3 0.7.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.1.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.3.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.4.4
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.12.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.4.7
INT:PASS.SINGLE.H3.0.DEC.V2 0.16.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.10.8
INT:PASS.SINGLE.H4.0.DEC.V1 0.15.5
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.0.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.6.4
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.5.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.8.8
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.1.8
INT:PASS.SINGLE.H7.0.DEC.V0 0.8.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.0.8
IO0:IFF_CE_ENABLE 0.7.8
IO0:IFF_SRVAL 0.22.6
IO0:INV.IFF_CLK 0.23.6
IO0:INV.OFF_CLK 0.24.9
IO0:INV.OFF_D 0.22.7
IO0:INV.T 0.25.9
IO0:OFF_CE_ENABLE 0.7.9
IO0:OFF_SRVAL 0.24.7
IO0:READBACK_I1 0.25.8
IO0:READBACK_I2 0.23.8
IO0:READBACK_OFF 0.22.8
IO1:IFF_CE_ENABLE 0.7.7
IO1:IFF_SRVAL 0.16.3
IO1:INV.IFF_CLK 0.23.3
IO1:INV.OFF_CLK 0.23.0
IO1:INV.OFF_D 0.24.2
IO1:INV.T 0.24.0
IO1:OFF_CE_ENABLE 0.7.6
IO1:OFF_SRVAL 0.24.1
IO1:READBACK_I1 0.21.3
IO1:READBACK_I2 0.22.3
IO1:READBACK_OFF 0.23.2
PULLUP_TBUF0:ENABLE 1.0.7
PULLUP_TBUF1:ENABLE 0.11.7
TBUF0:DRIVE1 0.0.3
TBUF1:DRIVE1 0.12.3
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.13.7 0.20.7 0.14.7 0.16.7 0.18.7 0.17.7 0.15.7 0.19.7
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.18.8 0.19.8 0.20.9 0.18.9 0.19.9 0.20.8
0.DEC.V0 0 0 0 1 1 1
0.DOUBLE.H0.0 0 0 1 1 1 1
0.DEC.V1 0 1 0 0 1 1
0.DEC.V2 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.9.6 0.17.5 0.18.6 0.12.6 0.15.6 0.14.6 0.11.6 0.16.6
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.4.2 0.6.2 0.1.3 0.2.3 0.6.3 0.5.2 0.5.3 0.7.4
0.LONG.IO.V3 0 0 0 0 1 1 1 1
0.LONG.IO.V1 0 0 0 1 1 0 1 1
0.GCLK0 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.W.1 0 0 1 1 1 1 1 1
0.LONG.IO.V0 0 1 0 0 0 1 1 1
0.DEC.V1 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 0 0 1 1 1 1
0.LONG.IO.V2 1 1 0 1 1 0 1 1
0.DEC.V0 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.W.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.3 0.18.1 0.18.3 0.14.2 0.19.1 0.17.1 0.20.1 0.15.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.16.1 0.20.0 0.19.0 0.18.0 0.16.0 0.17.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
1.DOUBLE.H1.0 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V2 0 1 1 1 0 1
0.DEC.V3 0 1 1 1 1 0
1.DOUBLE.H0.1 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.11.2 0.18.2 0.17.2 0.13.2 0.19.2 0.12.2 0.16.2 0.20.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.2.2 0.8.3 0.9.3 0.0.2 0.11.3 0.9.2 0.10.2 0.7.2
0.DEC.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V0 0 0 1 0 1 0 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.W.0 0 1 0 0 0 1 1 1
0.LONG.IO.V2 0 1 0 0 1 0 1 1
0.DEC.V0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.W.1 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.LONG.IO.V1 1 1 1 0 0 1 1 1
0.LONG.IO.V3 1 1 1 0 1 0 1 1
0.GCLK0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.2.1 0.2.0 0.4.0 0.4.1 0.3.0 0.3.1
0.IO.DOUBLE.2.W.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.W.0 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.5.0 0.5.1 0.8.0 0.6.1 0.7.0 0.6.0
0.IO.DOUBLE.1.W.0 0 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.W.0 0 1 1 1 1 1
0.IO.DOUBLE.1.W.1 1 0 0 1 1 1
0.LONG.IO.V2 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.13.0 0.11.1 0.13.1 0.11.0 0.12.0 0.12.1
0.IO.DOUBLE.2.W.0 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.W.1 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.7.1 0.10.0 0.10.1 0.9.0 0.9.1 0.8.1
0.IO.DOUBLE.0.W.1 0 0 0 1 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1
0.LONG.IO.V2 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V3 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.1.2 0.3.2 0.4.3 0.3.3
0.IO.DOUBLE.1.W.0 0 0 1 1
0.IO.DOUBLE.2.W.0 0 1 0 1
0.IO.DOUBLE.3.W.0 0 1 1 0
0.IO.DOUBLE.0.W.0 1 1 1 1
INT:MUX.IO.DBUF.V1 0.14.8 0.17.8 0.16.8 0.15.8
0.IO.DOUBLE.0.W.2 0 0 1 1
0.IO.DOUBLE.1.W.2 0 1 0 1
0.IO.DOUBLE.3.W.2 0 1 1 0
0.IO.DOUBLE.2.W.2 1 1 1 1
INT:MUX.LONG.H0 0.1.1 0.0.1 0.0.0 0.1.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.15.1 0.14.1 0.15.0 0.14.0
0.LONG.IO.V1 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.1.6 0.0.6 0.3.7 0.1.7
0.LONG.IO.V2 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.10.7 0.4.6 0.6.7 0.5.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.4.5 0.1.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.13.8 0.11.8 0.12.8 0.17.9
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.5.8 0.2.8 0.4.8 0.3.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.6.8 0.9.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.22.5 0.24.5 0.23.5
IO0:I2MUX 0.24.6 0.25.6 0.25.5
IO1:I1MUX 0.22.4 0.23.4 0.25.4
IO1:I2MUX 0.24.3 0.25.3 0.24.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.6
IO1:IFF_D 0.21.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.25.7
IO1:MUX.OFF_D 0.25.2
O 0
CE 1
IO0:OMUX 0.21.8 0.22.9 0.21.9 0.24.8
IO1:OMUX 0.21.1 0.22.0 0.21.0 0.22.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.17.6 0.23.7
IO1:PULL 0.25.1 0.23.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.23.9
IO1:SLEW 0.25.0
FAST 0
SLOW 1

Tile IO.LS

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.LS switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.W.2mux
TCELL0_IO.DOUBLE.1.W.2mux
TCELL0_IO.DOUBLE.2.W.2mux
TCELL0_IO.DOUBLE.3.W.2mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.1mux
TCELL1_DOUBLE.H1.0mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.LS bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.LS bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.LS bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.LS bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.LS bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G3.W
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.LS bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F3.W
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.LS bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.LS bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C3.W
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.LS bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.LS bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F3.WIO1.O
TCELL0:IMUX.CLB.G3.WIO0.O
TCELL0:IMUX.CLB.C3.WDEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2

Bitstream

xc4000e IO.LS bittile 0
BitFrame
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~IO0:INV.T ~IO0:INV.OFF_CLK IO0:SLEW[0] IO0:OMUX[2] IO0:OMUX[1] INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.LONG.IO.V1[0] ~INT:PASS.SINGLE.H3.0.DEC.V2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 ~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2 ~INT:PASS.SINGLE.H7.0.DEC.V0 ~IO0:OFF_CE_ENABLE ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 ~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2
8 ~IO0:READBACK_I1 IO0:OMUX[0] ~IO0:READBACK_I2 ~IO0:READBACK_OFF IO0:OMUX[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[5] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[3] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[2] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 ~IO0:IFF_CE_ENABLE INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S
7 IO0:MUX.OFF_D[0] ~IO0:OFF_SRVAL IO0:PULL[0] ~IO0:INV.OFF_D IO0:OFF_USED INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[7] ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 ~PULLUP_TBUF1:ENABLE INT:MUX.LONG.H5[3] ~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 ~IO1:IFF_CE_ENABLE INT:MUX.LONG.H5[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[0] -
6 IO0:I2MUX[1] IO0:I2MUX[2] ~IO0:INV.IFF_CLK ~IO0:IFF_SRVAL IO0:IFF_D[0] ~DEC1:O4_P ~DEC1:O2_P INT:MUX.IMUX.IOB0.OK[5] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] DEC1:O1_N INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[1] ~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 INT:MUX.LONG.H5[0] INT:MUX.LONG.H5[2] ~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 INT:MUX.LONG.H4[3] INT:MUX.LONG.H4[2]
5 IO0:I2MUX[0] IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] DEC2:O4_P DEC1:O4_N DEC1:O2_N ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[6] ~DEC2:O3_N ~INT:PASS.SINGLE.H4.0.DEC.V1 DEC2:O1_P ~DEC1:O1_P ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 ~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 ~INT:PASS.SINGLE.H0.0.DEC.V3 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2
4 IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[1] IO1:I1MUX[2] ~DEC2:O4_N ~DEC0:O4_P DEC0:O2_N DEC2:O2_P DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC2:O1_N ~DEC0:O1_P ~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1 ~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2 INT:MUX.IMUX.IOB0.TS[0] ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S
3 IO1:I2MUX[1] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:READBACK_I2 ~IO1:READBACK_I1 DEC0:O4_N ~DEC0:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC1:O3_P ~IO1:IFF_SRVAL DEC0:O3_N INT:MUX.IMUX.IOB1.IK[7] DEC0:O1_N ~TBUF1:DRIVE1 INT:MUX.IMUX.IOB1.TS[3] ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[6] - INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] ~TBUF0:DRIVE1
2 IO1:MUX.OFF_D[0] ~IO1:INV.OFF_D ~IO1:READBACK_OFF IO1:OFF_USED IO1:IFF_D[0] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.TS[2] - INT:MUX.IMUX.IOB1.TS[0] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[7] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB1.TS[4]
1 IO1:PULL[1] ~IO1:OFF_SRVAL IO1:PULL[0] IO1:OMUX[0] IO1:OMUX[3] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.LONG.H1[3] INT:MUX.LONG.H1[2] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.LONG.H0[3] INT:MUX.LONG.H0[2]
0 IO1:SLEW[0] ~IO1:INV.T ~IO1:INV.OFF_CLK IO1:OMUX[2] IO1:OMUX[1] INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[0] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[1]
xc4000e IO.LS bittile 1
BitFrame
0
7 ~PULLUP_TBUF0:ENABLE
6 -
5 -
4 -
3 -
2 -
1 -
0 -
DEC0:O1_N 0.13.3
DEC0:O2_N 0.19.4
DEC0:O3_N 0.15.3
DEC0:O4_N 0.20.3
DEC1:O1_N 0.13.6
DEC1:O2_N 0.19.5
DEC1:O3_N 0.17.4
DEC1:O4_N 0.20.5
DEC2:O1_P 0.14.5
DEC2:O2_P 0.18.4
DEC2:O3_P 0.16.4
DEC2:O4_P 0.21.5
IO0:OFF_USED 0.21.7
IO1:OFF_USED 0.22.2
non-inverted [0]
DEC0:O1_P 0.13.4
DEC0:O2_P 0.19.3
DEC0:O3_P 0.15.4
DEC0:O4_P 0.20.4
DEC1:O1_P 0.13.5
DEC1:O2_P 0.19.6
DEC1:O3_P 0.17.3
DEC1:O4_P 0.20.6
DEC2:O1_N 0.14.4
DEC2:O2_N 0.18.5
DEC2:O3_N 0.16.5
DEC2:O4_N 0.21.4
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 0.8.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 0.5.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 0.2.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 0.14.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 0.12.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 0.10.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 0.5.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 0.3.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 0.1.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 0.11.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 0.10.3
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 0.9.4
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 0.3.5
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 0.11.9
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 0.10.4
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 0.2.9
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1 0.6.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0 0.9.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2 0.0.5
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1 0.13.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0 0.15.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2 0.9.9
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1 0.11.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0 0.12.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2 0.8.4
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1 0.4.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0 0.6.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2 0.0.9
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S 0.2.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 0.5.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 0.2.6
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S 0.2.4
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 0.10.5
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 0.6.6
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 0.10.6
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 0.9.7
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 0.12.4
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 0.8.6
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 0.3.6
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 0.8.7
INT:PASS.SINGLE.H0.0.DEC.V3 0.7.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.1.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.3.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.4.4
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.12.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.4.7
INT:PASS.SINGLE.H3.0.DEC.V2 0.16.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.10.8
INT:PASS.SINGLE.H4.0.DEC.V1 0.15.5
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.0.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.6.4
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.5.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.8.8
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.1.8
INT:PASS.SINGLE.H7.0.DEC.V0 0.8.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.0.8
IO0:IFF_CE_ENABLE 0.7.8
IO0:IFF_SRVAL 0.22.6
IO0:INV.IFF_CLK 0.23.6
IO0:INV.OFF_CLK 0.24.9
IO0:INV.OFF_D 0.22.7
IO0:INV.T 0.25.9
IO0:OFF_CE_ENABLE 0.7.9
IO0:OFF_SRVAL 0.24.7
IO0:READBACK_I1 0.25.8
IO0:READBACK_I2 0.23.8
IO0:READBACK_OFF 0.22.8
IO1:IFF_CE_ENABLE 0.7.7
IO1:IFF_SRVAL 0.16.3
IO1:INV.IFF_CLK 0.23.3
IO1:INV.OFF_CLK 0.23.0
IO1:INV.OFF_D 0.24.2
IO1:INV.T 0.24.0
IO1:OFF_CE_ENABLE 0.7.6
IO1:OFF_SRVAL 0.24.1
IO1:READBACK_I1 0.21.3
IO1:READBACK_I2 0.22.3
IO1:READBACK_OFF 0.23.2
PULLUP_TBUF0:ENABLE 1.0.7
PULLUP_TBUF1:ENABLE 0.11.7
TBUF0:DRIVE1 0.0.3
TBUF1:DRIVE1 0.12.3
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.13.7 0.20.7 0.14.7 0.16.7 0.18.7 0.17.7 0.15.7 0.19.7
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.18.8 0.19.8 0.20.9 0.18.9 0.19.9 0.20.8
0.DEC.V0 0 0 0 1 1 1
0.DOUBLE.H0.0 0 0 1 1 1 1
0.DEC.V1 0 1 0 0 1 1
0.DEC.V2 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.9.6 0.17.5 0.18.6 0.12.6 0.15.6 0.14.6 0.11.6 0.16.6
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.4.2 0.6.2 0.1.3 0.2.3 0.6.3 0.5.2 0.5.3 0.7.4
0.LONG.IO.V3 0 0 0 0 1 1 1 1
0.LONG.IO.V1 0 0 0 1 1 0 1 1
0.GCLK0 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.W.1 0 0 1 1 1 1 1 1
0.LONG.IO.V0 0 1 0 0 0 1 1 1
0.DEC.V1 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 0 0 1 1 1 1
0.LONG.IO.V2 1 1 0 1 1 0 1 1
0.DEC.V0 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.W.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.3 0.18.1 0.18.3 0.14.2 0.19.1 0.17.1 0.20.1 0.15.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.16.1 0.20.0 0.19.0 0.18.0 0.16.0 0.17.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
1.DOUBLE.H1.0 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V2 0 1 1 1 0 1
0.DEC.V3 0 1 1 1 1 0
1.DOUBLE.H0.1 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.11.2 0.18.2 0.17.2 0.13.2 0.19.2 0.12.2 0.16.2 0.20.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.2.2 0.8.3 0.9.3 0.0.2 0.11.3 0.9.2 0.10.2 0.7.2
0.DEC.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V0 0 0 1 0 1 0 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.W.0 0 1 0 0 0 1 1 1
0.LONG.IO.V2 0 1 0 0 1 0 1 1
0.DEC.V0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.W.1 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.LONG.IO.V1 1 1 1 0 0 1 1 1
0.LONG.IO.V3 1 1 1 0 1 0 1 1
0.GCLK0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.2.1 0.2.0 0.4.0 0.4.1 0.3.0 0.3.1
0.IO.DOUBLE.2.W.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.W.0 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.5.0 0.5.1 0.8.0 0.6.1 0.7.0 0.6.0
0.IO.DOUBLE.1.W.0 0 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.W.0 0 1 1 1 1 1
0.IO.DOUBLE.1.W.1 1 0 0 1 1 1
0.LONG.IO.V2 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.13.0 0.11.1 0.13.1 0.11.0 0.12.0 0.12.1
0.IO.DOUBLE.2.W.0 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.W.1 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.7.1 0.10.0 0.10.1 0.9.0 0.9.1 0.8.1
0.IO.DOUBLE.0.W.1 0 0 0 1 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1
0.LONG.IO.V2 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V3 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.1.2 0.3.2 0.4.3 0.3.3
0.IO.DOUBLE.1.W.0 0 0 1 1
0.IO.DOUBLE.2.W.0 0 1 0 1
0.IO.DOUBLE.3.W.0 0 1 1 0
0.IO.DOUBLE.0.W.0 1 1 1 1
INT:MUX.IO.DBUF.V1 0.14.8 0.17.8 0.16.8 0.15.8
0.IO.DOUBLE.0.W.2 0 0 1 1
0.IO.DOUBLE.1.W.2 0 1 0 1
0.IO.DOUBLE.3.W.2 0 1 1 0
0.IO.DOUBLE.2.W.2 1 1 1 1
INT:MUX.LONG.H0 0.1.1 0.0.1 0.0.0 0.1.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.15.1 0.14.1 0.15.0 0.14.0
0.LONG.IO.V1 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.1.6 0.0.6 0.3.7 0.1.7
0.LONG.IO.V2 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.10.7 0.4.6 0.6.7 0.5.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.4.5 0.1.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.13.8 0.11.8 0.12.8 0.17.9
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.5.8 0.2.8 0.4.8 0.3.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.6.8 0.9.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.22.5 0.24.5 0.23.5
IO0:I2MUX 0.24.6 0.25.6 0.25.5
IO1:I1MUX 0.22.4 0.23.4 0.25.4
IO1:I2MUX 0.24.3 0.25.3 0.24.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.6
IO1:IFF_D 0.21.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.25.7
IO1:MUX.OFF_D 0.25.2
O 0
CE 1
IO0:OMUX 0.21.8 0.22.9 0.21.9 0.24.8
IO1:OMUX 0.21.1 0.22.0 0.21.0 0.22.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.17.6 0.23.7
IO1:PULL 0.25.1 0.23.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.23.9
IO1:SLEW 0.25.0
FAST 0
SLOW 1

Tile IO.LS.B

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.LS.B switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.1TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.1TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.1TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.W.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.1TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.2TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.W.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.W.2mux
TCELL0_IO.DOUBLE.1.W.2mux
TCELL0_IO.DOUBLE.2.W.2mux
TCELL0_IO.DOUBLE.3.W.2mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.W.0mux
TCELL0_IO.DOUBLE.2.W.1mux
TCELL0_IO.DOUBLE.3.W.0mux
TCELL0_IO.DOUBLE.3.W.1mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.1mux
TCELL1_DOUBLE.H1.0mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.W.0mux
TCELL0_IO.DOUBLE.0.W.1mux
TCELL0_IO.DOUBLE.1.W.0mux
TCELL0_IO.DOUBLE.1.W.1mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.LS.B bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.LS.B bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.LS.B bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.LS.B bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.LS.B bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G3.W
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.LS.B bel IO1
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F3.W
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.LS.B bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.LS.B bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C3.W
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.LS.B bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.LS.B bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F3.WIO1.O
TCELL0:IMUX.CLB.G3.WIO0.O
TCELL0:IMUX.CLB.C3.WDEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO1.CLKIN

Bitstream

xc4000e IO.LS.B bittile 0
BitFrame
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~IO0:INV.T ~IO0:INV.OFF_CLK IO0:SLEW[0] IO0:OMUX[2] IO0:OMUX[1] INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.LONG.IO.V1[0] ~INT:PASS.SINGLE.H3.0.DEC.V2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 ~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2 ~INT:PASS.SINGLE.H7.0.DEC.V0 ~IO0:OFF_CE_ENABLE ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 ~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2
8 ~IO0:READBACK_I1 IO0:OMUX[0] ~IO0:READBACK_I2 ~IO0:READBACK_OFF IO0:OMUX[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[5] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[3] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[2] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 ~IO0:IFF_CE_ENABLE INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S
7 IO0:MUX.OFF_D[0] ~IO0:OFF_SRVAL IO0:PULL[0] ~IO0:INV.OFF_D IO0:OFF_USED INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[7] ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 ~PULLUP_TBUF1:ENABLE INT:MUX.LONG.H5[3] ~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 ~IO1:IFF_CE_ENABLE INT:MUX.LONG.H5[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[0] -
6 IO0:I2MUX[1] IO0:I2MUX[2] ~IO0:INV.IFF_CLK ~IO0:IFF_SRVAL IO0:IFF_D[0] ~DEC1:O4_P ~DEC1:O2_P INT:MUX.IMUX.IOB0.OK[5] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] DEC1:O1_N INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[1] ~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 INT:MUX.LONG.H5[0] INT:MUX.LONG.H5[2] ~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 INT:MUX.LONG.H4[3] INT:MUX.LONG.H4[2]
5 IO0:I2MUX[0] IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] DEC2:O4_P DEC1:O4_N DEC1:O2_N ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[6] ~DEC2:O3_N ~INT:PASS.SINGLE.H4.0.DEC.V1 DEC2:O1_P ~DEC1:O1_P ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 ~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 ~INT:PASS.SINGLE.H0.0.DEC.V3 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2
4 IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[1] IO1:I1MUX[2] ~DEC2:O4_N ~DEC0:O4_P DEC0:O2_N DEC2:O2_P DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC2:O1_N ~DEC0:O1_P ~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1 ~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2 INT:MUX.IMUX.IOB0.TS[0] ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S
3 IO1:I2MUX[1] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:READBACK_I2 ~IO1:READBACK_I1 DEC0:O4_N ~DEC0:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC1:O3_P ~IO1:IFF_SRVAL DEC0:O3_N INT:MUX.IMUX.IOB1.IK[7] DEC0:O1_N ~TBUF1:DRIVE1 INT:MUX.IMUX.IOB1.TS[3] ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[6] - INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] ~TBUF0:DRIVE1
2 IO1:MUX.OFF_D[0] ~IO1:INV.OFF_D ~IO1:READBACK_OFF IO1:OFF_USED IO1:IFF_D[0] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.TS[2] - INT:MUX.IMUX.IOB1.TS[0] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[7] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB1.TS[4]
1 IO1:PULL[1] ~IO1:OFF_SRVAL IO1:PULL[0] IO1:OMUX[0] IO1:OMUX[3] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.LONG.H1[3] INT:MUX.LONG.H1[2] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.LONG.H0[3] INT:MUX.LONG.H0[2]
0 IO1:SLEW[0] ~IO1:INV.T ~IO1:INV.OFF_CLK IO1:OMUX[2] IO1:OMUX[1] INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[0] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[1]
xc4000e IO.LS.B bittile 1
BitFrame
0
10 ~PULLUP_TBUF0:ENABLE
9 -
8 -
7 -
6 -
5 -
4 -
3 -
2 -
1 -
0 -
DEC0:O1_N 0.13.3
DEC0:O2_N 0.19.4
DEC0:O3_N 0.15.3
DEC0:O4_N 0.20.3
DEC1:O1_N 0.13.6
DEC1:O2_N 0.19.5
DEC1:O3_N 0.17.4
DEC1:O4_N 0.20.5
DEC2:O1_P 0.14.5
DEC2:O2_P 0.18.4
DEC2:O3_P 0.16.4
DEC2:O4_P 0.21.5
IO0:OFF_USED 0.21.7
IO1:OFF_USED 0.22.2
non-inverted [0]
DEC0:O1_P 0.13.4
DEC0:O2_P 0.19.3
DEC0:O3_P 0.15.4
DEC0:O4_P 0.20.4
DEC1:O1_P 0.13.5
DEC1:O2_P 0.19.6
DEC1:O3_P 0.17.3
DEC1:O4_P 0.20.6
DEC2:O1_N 0.14.4
DEC2:O2_N 0.18.5
DEC2:O3_N 0.16.5
DEC2:O4_N 0.21.4
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0 0.8.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 0.5.5
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 0.2.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0 0.14.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 0.12.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 0.10.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0 0.5.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 0.3.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 0.1.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0 0.11.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 0.10.3
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 0.9.4
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2 0.3.5
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2 0.11.9
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2 0.10.4
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2 0.2.9
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1 0.6.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0 0.9.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2 0.0.5
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1 0.13.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0 0.15.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2 0.9.9
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1 0.11.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0 0.12.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2 0.8.4
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1 0.4.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0 0.6.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2 0.0.9
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S 0.2.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1 0.5.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2 0.2.6
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S 0.2.4
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1 0.10.5
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 0.6.6
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1 0.10.6
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 0.9.7
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1 0.12.4
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 0.8.6
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1 0.3.6
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 0.8.7
INT:PASS.SINGLE.H0.0.DEC.V3 0.7.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.1.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.3.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.4.4
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.12.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.4.7
INT:PASS.SINGLE.H3.0.DEC.V2 0.16.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.10.8
INT:PASS.SINGLE.H4.0.DEC.V1 0.15.5
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.0.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.6.4
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.5.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.8.8
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.1.8
INT:PASS.SINGLE.H7.0.DEC.V0 0.8.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.0.8
IO0:IFF_CE_ENABLE 0.7.8
IO0:IFF_SRVAL 0.22.6
IO0:INV.IFF_CLK 0.23.6
IO0:INV.OFF_CLK 0.24.9
IO0:INV.OFF_D 0.22.7
IO0:INV.T 0.25.9
IO0:OFF_CE_ENABLE 0.7.9
IO0:OFF_SRVAL 0.24.7
IO0:READBACK_I1 0.25.8
IO0:READBACK_I2 0.23.8
IO0:READBACK_OFF 0.22.8
IO1:IFF_CE_ENABLE 0.7.7
IO1:IFF_SRVAL 0.16.3
IO1:INV.IFF_CLK 0.23.3
IO1:INV.OFF_CLK 0.23.0
IO1:INV.OFF_D 0.24.2
IO1:INV.T 0.24.0
IO1:OFF_CE_ENABLE 0.7.6
IO1:OFF_SRVAL 0.24.1
IO1:READBACK_I1 0.21.3
IO1:READBACK_I2 0.22.3
IO1:READBACK_OFF 0.23.2
PULLUP_TBUF0:ENABLE 1.0.10
PULLUP_TBUF1:ENABLE 0.11.7
TBUF0:DRIVE1 0.0.3
TBUF1:DRIVE1 0.12.3
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.13.7 0.20.7 0.14.7 0.16.7 0.18.7 0.17.7 0.15.7 0.19.7
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.18.8 0.19.8 0.20.9 0.18.9 0.19.9 0.20.8
0.DEC.V0 0 0 0 1 1 1
0.DOUBLE.H0.0 0 0 1 1 1 1
0.DEC.V1 0 1 0 0 1 1
0.DEC.V2 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.9.6 0.17.5 0.18.6 0.12.6 0.15.6 0.14.6 0.11.6 0.16.6
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.4.2 0.6.2 0.1.3 0.2.3 0.6.3 0.5.2 0.5.3 0.7.4
0.LONG.IO.V3 0 0 0 0 1 1 1 1
0.LONG.IO.V1 0 0 0 1 1 0 1 1
0.GCLK0 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.W.1 0 0 1 1 1 1 1 1
0.LONG.IO.V0 0 1 0 0 0 1 1 1
0.DEC.V1 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 0 0 1 1 1 1
0.LONG.IO.V2 1 1 0 1 1 0 1 1
0.DEC.V0 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.W.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.3 0.18.1 0.18.3 0.14.2 0.19.1 0.17.1 0.20.1 0.15.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.16.1 0.20.0 0.19.0 0.18.0 0.16.0 0.17.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
1.DOUBLE.H1.0 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V2 0 1 1 1 0 1
0.DEC.V3 0 1 1 1 1 0
1.DOUBLE.H0.1 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.11.2 0.18.2 0.17.2 0.13.2 0.19.2 0.12.2 0.16.2 0.20.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.2.2 0.8.3 0.9.3 0.0.2 0.11.3 0.9.2 0.10.2 0.7.2
0.DEC.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V0 0 0 1 0 1 0 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.W.0 0 1 0 0 0 1 1 1
0.LONG.IO.V2 0 1 0 0 1 0 1 1
0.DEC.V0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.W.1 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.LONG.IO.V1 1 1 1 0 0 1 1 1
0.LONG.IO.V3 1 1 1 0 1 0 1 1
0.GCLK0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.2.1 0.2.0 0.4.0 0.4.1 0.3.0 0.3.1
0.IO.DOUBLE.2.W.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.W.0 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.5.0 0.5.1 0.8.0 0.6.1 0.7.0 0.6.0
0.IO.DOUBLE.1.W.0 0 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.W.0 0 1 1 1 1 1
0.IO.DOUBLE.1.W.1 1 0 0 1 1 1
0.LONG.IO.V2 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.W.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.13.0 0.11.1 0.13.1 0.11.0 0.12.0 0.12.1
0.IO.DOUBLE.2.W.0 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.W.1 0 1 1 1 1 1
0.IO.DOUBLE.3.W.1 1 0 0 1 1 1
0.IO.DOUBLE.3.W.0 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.7.1 0.10.0 0.10.1 0.9.0 0.9.1 0.8.1
0.IO.DOUBLE.0.W.1 0 0 0 1 1 1
0.IO.DOUBLE.0.W.0 0 0 1 1 1 1
0.LONG.IO.V2 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V3 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.W.1 1 1 0 1 1 1
0.IO.DOUBLE.1.W.0 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.1.2 0.3.2 0.4.3 0.3.3
0.IO.DOUBLE.1.W.0 0 0 1 1
0.IO.DOUBLE.2.W.0 0 1 0 1
0.IO.DOUBLE.3.W.0 0 1 1 0
0.IO.DOUBLE.0.W.0 1 1 1 1
INT:MUX.IO.DBUF.V1 0.14.8 0.17.8 0.16.8 0.15.8
0.IO.DOUBLE.0.W.2 0 0 1 1
0.IO.DOUBLE.1.W.2 0 1 0 1
0.IO.DOUBLE.3.W.2 0 1 1 0
0.IO.DOUBLE.2.W.2 1 1 1 1
INT:MUX.LONG.H0 0.1.1 0.0.1 0.0.0 0.1.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.15.1 0.14.1 0.15.0 0.14.0
0.LONG.IO.V1 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.1.6 0.0.6 0.3.7 0.1.7
0.LONG.IO.V2 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.10.7 0.4.6 0.6.7 0.5.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.4.5 0.1.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.13.8 0.11.8 0.12.8 0.17.9
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.5.8 0.2.8 0.4.8 0.3.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.6.8 0.9.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.22.5 0.24.5 0.23.5
IO0:I2MUX 0.24.6 0.25.6 0.25.5
IO1:I1MUX 0.22.4 0.23.4 0.25.4
IO1:I2MUX 0.24.3 0.25.3 0.24.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.6
IO1:IFF_D 0.21.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.25.7
IO1:MUX.OFF_D 0.25.2
O 0
CE 1
IO0:OMUX 0.21.8 0.22.9 0.21.9 0.24.8
IO1:OMUX 0.21.1 0.22.0 0.21.0 0.22.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.17.6 0.23.7
IO1:PULL 0.25.1 0.23.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.23.9
IO1:SLEW 0.25.0
FAST 0
SLOW 1

Tile IO.R

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.R switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.V5pass transistor
TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.E.0mux
TCELL0_IO.DOUBLE.1.E.0mux
TCELL0_IO.DOUBLE.2.E.0mux
TCELL0_IO.DOUBLE.3.E.0mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.CLB.F1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.G1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.C1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_IMUX.CLB.F3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.G3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.C3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_GCLK2mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.0mux
TCELL1_DOUBLE.H1.1mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.R bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.R bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.R bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.R bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.R bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G1
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.R bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F1
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.R bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.R bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.R bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.R bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F1IO1.O
TCELL0:IMUX.CLB.G1IO0.O
TCELL0:IMUX.CLB.C1DEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2

Bitstream

xc4000e IO.R bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 ~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2 ~IO0:OFF_CE_ENABLE ~INT:PASS.SINGLE.H7.0.DEC.V3 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 ~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2 ~INT:PASS.SINGLE.H3.0.DEC.V1 INT:MUX.LONG.IO.V1[2] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[3] IO0:OMUX[1] IO0:OMUX[2] IO0:SLEW[0] ~IO0:INV.OFF_CLK ~IO0:INV.T
8 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V3[1] ~IO0:IFF_CE_ENABLE ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[3] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[3] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] IO0:OMUX[0] ~IO0:READBACK_OFF ~IO0:READBACK_I2 IO0:OMUX[3] ~IO0:READBACK_I1
7 ~INT:PASS.SINGLE.V6.0.LONG.H5 ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[2] ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H5[2] ~IO1:IFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 INT:MUX.LONG.H5[3] ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[7] IO0:OFF_USED ~IO0:INV.OFF_D IO0:PULL[0] ~IO0:OFF_SRVAL IO0:MUX.OFF_D[0]
6 ~INT:BUF.LONG.H5.0.SINGLE.V6 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 ~INT:BUF.LONG.V4.0.SINGLE.H5 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BUF.LONG.H3.0.SINGLE.V4 ~INT:PASS.SINGLE.V0.0.GND INT:MUX.LONG.H4[0] INT:MUX.LONG.H4[3] ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 INT:MUX.LONG.H5[1] INT:MUX.LONG.H5[0] ~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 INT:MUX.IMUX.IOB0.OK[6] ~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[4] DEC1:O4_N INT:MUX.IMUX.IOB0.OK[2] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[0] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[7] ~DEC1:O3_P ~DEC1:O1_P IO0:IFF_D[0] ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[1] IO0:I2MUX[2]
5 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 ~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 ~INT:PASS.SINGLE.H0.0.DEC.V0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2 ~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2 ~DEC1:O4_P DEC2:O4_P ~INT:PASS.SINGLE.H4.0.DEC.V2 ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[5] ~DEC2:O3_N DEC1:O3_N DEC1:O1_N DEC2:O1_P IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] IO0:I2MUX[0]
4 ~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E ~INT:BUF.LONG.V3.0.SINGLE.H4 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 ~INT:BUF.LONG.H2.0.SINGLE.V3 ~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 INT:MUX.IMUX.IOB0.TS[7] ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 ~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 ~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 ~DEC0:O4_P ~DEC2:O4_N ~DEC0:O2_P DEC2:O2_P DEC1:O2_N DEC2:O3_P DEC0:O3_N ~DEC0:O1_P ~DEC2:O1_N IO1:I1MUX[1] IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[2]
3 INT:MUX.IMUX.CLB.F3[0] ~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E INT:MUX.IMUX.CLB.C3[1] ~INT:BIPASS.SINGLE.H5.SINGLE.V5 INT:MUX.IMUX.CLB.G3[2] ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 INT:MUX.IMUX.CLB.F1[3] ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S INT:MUX.IMUX.CLB.C1[7] ~INT:PASS.SINGLE.H5.0.LONG.V4 INT:MUX.IMUX.CLB.G1[6] ~TBUF0:DRIVE1 INT:MUX.IMUX.IOB0.TS[0] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[5] - INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[7] ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 INT:MUX.IMUX.IOB1.TS[4] ~TBUF1:DRIVE1 DEC0:O4_N INT:MUX.IMUX.IOB1.IK[0] DEC0:O2_N ~IO1:IFF_SRVAL ~DEC1:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC0:O3_P DEC0:O1_N ~IO1:READBACK_I1 ~IO1:READBACK_I2 ~IO1:INV.IFF_CLK IO1:I2MUX[1] IO1:I2MUX[2]
2 INT:MUX.IMUX.CLB.F3[2] INT:MUX.IMUX.CLB.F3[6] INT:MUX.IMUX.CLB.F3[8] INT:MUX.IMUX.CLB.C3[2] INT:MUX.IMUX.CLB.C3[3] INT:MUX.IMUX.CLB.G3[3] INT:MUX.IMUX.CLB.G3[6] INT:MUX.IMUX.CLB.G3[8] INT:MUX.IMUX.CLB.F1[0] INT:MUX.IMUX.CLB.F1[7] INT:MUX.IMUX.CLB.C1[2] INT:MUX.IMUX.CLB.C1[1] INT:MUX.IMUX.CLB.C1[6] - INT:MUX.IMUX.CLB.G1[0] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IO.DBUF.V0[1] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB1.TS[0] - INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[7] IO1:IFF_D[0] IO1:OFF_USED ~IO1:READBACK_OFF ~IO1:INV.OFF_D IO1:MUX.OFF_D[0]
1 INT:MUX.IMUX.CLB.F3[5] INT:MUX.IMUX.CLB.F3[3] INT:MUX.IMUX.CLB.C3[0] INT:MUX.IMUX.CLB.C3[5] INT:MUX.IMUX.CLB.C3[6] INT:MUX.IMUX.CLB.G3[0] INT:MUX.IMUX.CLB.G3[4] INT:MUX.IMUX.CLB.G3[7] INT:MUX.IMUX.CLB.F1[5] INT:MUX.IMUX.CLB.F1[2] INT:MUX.IMUX.CLB.C1[5] INT:MUX.IMUX.CLB.C1[3] INT:MUX.IMUX.CLB.G1[4] INT:MUX.IMUX.CLB.G1[3] INT:MUX.IMUX.CLB.G1[2] INT:MUX.LONG.H0[1] INT:MUX.LONG.H0[3] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.LONG.H1[0] INT:MUX.LONG.H1[3] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[7] IO1:OMUX[0] IO1:OMUX[3] IO1:PULL[0] ~IO1:OFF_SRVAL IO1:PULL[1]
0 INT:MUX.IMUX.CLB.F3[7] INT:MUX.IMUX.CLB.F3[1] INT:MUX.IMUX.CLB.F3[4] INT:MUX.IMUX.CLB.C3[4] INT:MUX.IMUX.CLB.C3[7] INT:MUX.IMUX.CLB.G3[5] INT:MUX.IMUX.CLB.G3[9] INT:MUX.IMUX.CLB.F1[6] INT:MUX.IMUX.CLB.F1[1] INT:MUX.IMUX.CLB.F1[4] INT:MUX.IMUX.CLB.C1[0] INT:MUX.IMUX.CLB.C1[4] INT:MUX.IMUX.CLB.G1[5] INT:MUX.IMUX.CLB.G1[1] INT:MUX.IMUX.CLB.G1[7] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.IMUX.IOB1.O1[4] IO1:OMUX[1] IO1:OMUX[2] ~IO1:INV.OFF_CLK ~IO1:INV.T IO1:SLEW[0]
xc4000e IO.R bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - ~PULLUP_TBUF0:ENABLE - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
xc4000e IO.R bittile 2
BitFrame
0
1 INT:MUX.IMUX.CLB.G3[1]
0 -
DEC0:O1_N 0.5.3
DEC0:O2_N 0.10.3
DEC0:O3_N 0.6.4
DEC0:O4_N 0.12.3
DEC1:O1_N 0.5.5
DEC1:O2_N 0.8.4
DEC1:O3_N 0.6.5
DEC1:O4_N 0.12.6
DEC2:O1_P 0.4.5
DEC2:O2_P 0.9.4
DEC2:O3_P 0.7.4
DEC2:O4_P 0.11.5
IO0:OFF_USED 0.4.7
IO1:OFF_USED 0.3.2
non-inverted [0]
DEC0:O1_P 0.5.4
DEC0:O2_P 0.10.4
DEC0:O3_P 0.6.3
DEC0:O4_P 0.12.4
DEC1:O1_P 0.5.6
DEC1:O2_P 0.8.3
DEC1:O3_P 0.6.6
DEC1:O4_P 0.12.5
DEC2:O1_N 0.4.4
DEC2:O2_N 0.9.5
DEC2:O3_N 0.7.5
DEC2:O4_N 0.11.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.29.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.27.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.28.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 0.15.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 0.13.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 0.11.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 0.23.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 0.20.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 0.17.5
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.29.7
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.29.8
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.33.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.32.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.33.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 0.16.4
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 0.15.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 0.14.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 0.24.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 0.22.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 0.20.9
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.33.5
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.34.5
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.27.8
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.34.3
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 0.22.5
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 0.14.9
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 0.15.4
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 0.23.9
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.26.5
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.28.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 0.25.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2 0.16.5
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.28.6
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.27.5
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.30.3
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.31.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 0.19.5
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.30.5
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.29.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.29.3
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.31.9
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.32.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 0.16.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2 0.10.9
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.32.8
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.31.8
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.33.8
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.32.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.33.7
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 0.12.9
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.31.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.28.7
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.30.7
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.39.8
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.37.6
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 0.17.4
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2 0.13.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.36.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.39.6
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.35.6
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.36.5
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.38.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 0.14.4
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.35.5
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.36.3
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.37.5
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.34.7
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.37.7
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 0.25.9
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2 0.19.9
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.35.7
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.36.8
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.36.7
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.37.9
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.39.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 0.21.9
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.38.9
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.35.9
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.37.8
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.29.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.31.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.30.9
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.27.7
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.38.6
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.39.5
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.38.7
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.36.9
INT:BUF.LONG.H0.0.SINGLE.V1 1.26.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.30.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.27.4
INT:BUF.LONG.H3.0.SINGLE.V4 0.27.6
INT:BUF.LONG.H4.0.SINGLE.V5 0.38.4
INT:BUF.LONG.H5.0.SINGLE.V6 0.40.6
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.32.4
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.38.8
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.34.6
INT:BUF.LONG.V3.0.SINGLE.H4 0.34.4
INT:BUF.LONG.V4.0.SINGLE.H5 0.31.6
INT:BUF.LONG.V5.0.SINGLE.H6 0.35.8
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 0.20.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S 0.23.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S 0.23.4
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 0.23.6
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E 0.26.4
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E 0.31.4
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 0.37.4
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 0.40.4
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 0.19.6
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 0.15.5
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 0.16.7
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 0.15.6
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 0.17.6
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 0.13.4
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 0.17.7
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 0.22.6
INT:PASS.SINGLE.H0.0.DEC.V0 0.18.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.24.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.22.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.21.4
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.32.5
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.13.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.21.7
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.40.9
INT:PASS.SINGLE.H3.0.DEC.V1 0.9.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.15.8
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.39.7
INT:PASS.SINGLE.H4.0.DEC.V2 0.10.5
INT:PASS.SINGLE.H4.0.LONG.V3 0.33.4
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.25.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.19.4
INT:PASS.SINGLE.H5.0.LONG.V4 0.27.3
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.20.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.17.8
INT:PASS.SINGLE.H6.0.LONG.V5 0.34.9
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.24.8
INT:PASS.SINGLE.H7.0.DEC.V3 0.17.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.25.8
INT:PASS.SINGLE.V0.0.GND 0.26.6
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 0.28.4
INT:PASS.SINGLE.V1.0.LONG.H0 1.28.8
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 0.29.4
INT:PASS.SINGLE.V2.0.LONG.H1 1.34.8
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E 0.30.4
INT:PASS.SINGLE.V3.0.LONG.H2 1.33.9
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.26.7
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 0.39.3
INT:PASS.SINGLE.V5.0.LONG.H4 0.40.5
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 0.36.4
INT:PASS.SINGLE.V6.0.LONG.H5 0.40.7
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E 0.39.4
INT:PASS.SINGLE.V7.0.GND 0.26.9
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E 0.38.3
IO0:IFF_CE_ENABLE 0.18.8
IO0:IFF_SRVAL 0.3.6
IO0:INV.IFF_CLK 0.2.6
IO0:INV.OFF_CLK 0.1.9
IO0:INV.OFF_D 0.3.7
IO0:INV.T 0.0.9
IO0:OFF_CE_ENABLE 0.18.9
IO0:OFF_SRVAL 0.1.7
IO0:READBACK_I1 0.0.8
IO0:READBACK_I2 0.2.8
IO0:READBACK_OFF 0.3.8
IO1:IFF_CE_ENABLE 0.18.7
IO1:IFF_SRVAL 0.9.3
IO1:INV.IFF_CLK 0.2.3
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.1.2
IO1:INV.T 0.1.0
IO1:OFF_CE_ENABLE 0.18.6
IO1:OFF_SRVAL 0.1.1
IO1:READBACK_I1 0.4.3
IO1:READBACK_I2 0.3.3
IO1:READBACK_OFF 0.2.2
PULLUP_TBUF0:ENABLE 1.25.7
PULLUP_TBUF1:ENABLE 0.14.7
TBUF0:DRIVE1 0.25.3
TBUF1:DRIVE1 0.13.3
inverted ~[0]
INT:MUX.IMUX.CLB.C1 0.28.3 0.28.2 0.30.1 0.29.0 0.29.1 0.30.2 0.29.2 0.30.0
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V1 0 0 0 1 0 1 1 1
0.DOUBLE.V0.0 0 0 1 0 1 0 1 1
0.DOUBLE.V0.1 0 0 1 0 1 1 0 1
0.SINGLE.V3 0 0 1 1 0 0 1 1
0.SINGLE.V7 0 0 1 1 0 1 0 1
0.LONG.V2 0 0 1 1 1 0 1 0
0.LONG.V3 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C3 0.36.0 0.36.1 0.37.1 0.37.0 0.36.2 0.37.2 0.37.3 0.38.1
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.GCLK2 0 0 0 1 1 1 1 0
0.SINGLE.V3 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 0 1
0.DOUBLE.V0.0 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 0 1
0.LONG.V3 0 0 1 1 1 0 1 0
0.LONG.V2 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V1 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F1 0.31.2 0.33.0 0.32.1 0.31.0 0.32.3 0.31.1 0.32.0 0.32.2
0.SINGLE.V3 0 0 1 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 1 0
0.SINGLE.V0 0 0 1 1 1 1 1 1
0.LONG.V3 0 1 0 0 0 1 1 1
0.DOUBLE.V1.0 0 1 0 0 1 0 1 1
0.LONG.V0 0 1 0 0 1 1 1 0
0.SINGLE.V1 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 0 1 0 1
0.LONG.V1 0 1 1 0 1 0 0 1
0.SINGLE.V6 0 1 1 0 1 1 0 0
0.DOUBLE.V1.1 0 1 1 1 1 1 0 1
0.DOUBLE.V0.1 1 1 1 0 0 1 1 1
0.SINGLE.V4 1 1 1 0 1 0 1 1
0.DOUBLE.V0.0 1 1 1 0 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F3 0.38.2 0.40.0 0.39.2 0.40.1 0.38.0 0.39.1 0.40.2 0.39.0 0.40.3
0.SINGLE.V0 0 0 0 0 1 1 1 1 1
0.DOUBLE.V0.0 0 0 0 1 1 1 0 1 1
0.LONG.V2 0 0 0 1 1 1 1 0 1
0.SINGLE.V3 0 0 1 1 1 1 1 1 1
0.DOUBLE.V1.1 0 1 0 0 0 1 1 1 1
0.LONG.V1 0 1 0 0 1 0 1 1 1
0.DOUBLE.V1.0 0 1 0 1 0 1 0 1 1
0.LONG.V5 0 1 0 1 0 1 1 0 1
0.SINGLE.V4 0 1 0 1 1 0 0 1 1
0.LONG.V4 0 1 0 1 1 0 1 0 1
0.GCLK0 0 1 0 1 1 1 1 1 0
0.SINGLE.V1 0 1 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 1 0 1 1 1
0.SINGLE.V6 1 1 0 0 1 1 1 1 1
0.DOUBLE.V0.1 1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 1 0 1 1 1 1 0 1
0.SINGLE.V7 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G1 0.26.0 0.26.3 0.28.0 0.28.1 0.27.1 0.26.1 0.27.0 0.26.2
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.LONG.V3 0 0 1 0 1 1 1 0
0.SINGLE.V1 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 1 0
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1
0.LONG.V0 0 0 1 1 1 1 0 0
0.SINGLE.V3 0 1 1 0 1 1 1 1
0.DOUBLE.V0.0 0 1 1 1 0 1 1 1
0.SINGLE.V7 0 1 1 1 1 1 0 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 0 1 1 1 1 1 0
0.SINGLE.V6 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G3 0.34.0 0.33.2 0.33.1 0.34.2 0.35.0 0.34.1 0.35.2 0.35.3 2.0.1 0.35.1
0.SINGLE.V0 0 0 0 0 1 1 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1 1 1
0.LONG.V2 0 0 1 0 1 1 1 0 1 1
0.SINGLE.V1 0 0 1 1 0 0 1 1 1 1
0.SINGLE.V6 0 0 1 1 0 1 1 0 1 1
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1 1 1
0.LONG.V5 0 0 1 1 1 1 0 0 1 1
0.GCLK0 0 0 1 1 1 1 1 1 0 1
CIN 0 0 1 1 1 1 1 1 1 0
0.DOUBLE.V0.0 0 1 1 0 1 1 1 1 1 1
0.SINGLE.V5 0 1 1 1 0 1 1 1 1 1
0.DOUBLE.V0.1 0 1 1 1 1 1 0 1 1 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1 1 1
0.SINGLE.V7 1 0 1 1 1 1 1 0 1 1
0.SINGLE.V3 1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.5.7 0.11.7 0.12.7 0.9.7 0.7.7 0.8.7 0.10.7 0.6.7
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.5.8 0.7.8 0.5.9 0.7.9 0.6.9 0.6.8
0.DEC.V3 0 0 0 1 1 1
0.DOUBLE.H0.1 0 0 1 1 1 1
0.DEC.V2 0 1 0 0 1 1
0.DEC.V1 0 1 0 1 0 1
0.DEC.V0 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.0 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.7.6 0.16.6 0.8.5 0.13.6 0.10.6 0.11.6 0.14.6 0.9.6
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.18.4 0.19.2 0.19.3 0.21.2 0.20.3 0.23.3 0.20.2 0.24.3
0.LONG.IO.V3 0 0 1 1 0 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1 0 1
0.GCLK0 0 0 1 1 0 1 1 0
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1 0 0 1 1
0.LONG.IO.V2 0 1 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 0 1 1 0
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
0.LONG.IO.V0 0 1 1 0 0 0 1 1
0.DEC.V2 0 1 1 0 0 1 0 1
0.IO.DOUBLE.1.E.1 0 1 1 0 1 1 1 1
GND 1 1 1 1 0 1 1 1
INT:MUX.IMUX.IOB1.IK 0.5.1 0.7.1 0.7.3 0.11.2 0.6.1 0.8.1 0.10.2 0.11.3
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.6.0 0.5.0 0.9.1 0.7.0 0.8.0 0.9.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V2 0 0 1 1 0 1
0.DEC.V3 0 0 1 1 1 0
1.DOUBLE.H1.1 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
0.DEC.V1 0 1 1 1 1 0
1.DOUBLE.H0.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.5.2 0.7.2 0.8.2 0.12.2 0.6.2 0.13.2 0.14.2 0.9.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.16.3 0.23.2 0.17.3 0.14.3 0.25.2 0.16.2 0.15.2 0.18.2
0.LONG.IO.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 0 1 1
0.GCLK0 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.DEC.V2 0 1 0 0 0 1 1 1
0.LONG.IO.V0 0 1 0 0 1 0 1 1
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 1 0 0 1 1 1
0.LONG.IO.V2 1 1 1 0 1 0 1 1
0.DEC.V3 1 1 1 0 1 1 0 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.23.1 0.21.0 0.23.0 0.21.1 0.22.0 0.22.1
0.IO.DOUBLE.2.E.2 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.E.1 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.17.0 0.20.1 0.20.0 0.19.1 0.18.0 0.19.0
0.IO.DOUBLE.0.E.2 0 0 0 1 1 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1
0.LONG.IO.V3 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 0 1 1 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.12.0 0.12.1 0.14.1 0.14.0 0.13.0 0.13.1
0.IO.DOUBLE.2.E.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.15.1 0.15.0 0.18.1 0.16.0 0.16.1 0.17.1
0.IO.DOUBLE.1.E.1 0 0 0 1 1 1
0.LONG.IO.V2 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.E.1 0 1 1 1 1 1
0.IO.DOUBLE.1.E.2 1 0 0 1 1 1
0.LONG.IO.V3 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.E.2 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.21.3 0.24.2 0.22.2 0.22.3
0.IO.DOUBLE.0.E.2 0 0 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1
0.IO.DOUBLE.3.E.2 0 1 1 0
0.IO.DOUBLE.2.E.2 1 1 1 1
INT:MUX.IO.DBUF.V1 0.8.8 0.9.8 0.11.8 0.10.8
0.IO.DOUBLE.1.E.0 0 0 1 1
0.IO.DOUBLE.2.E.0 0 1 0 1
0.IO.DOUBLE.3.E.0 0 1 1 0
0.IO.DOUBLE.0.E.0 1 1 1 1
INT:MUX.LONG.H0 0.24.1 0.24.0 0.25.1 0.25.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.10.1 0.10.0 0.11.0 0.11.1
0.LONG.IO.V1 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.24.6 0.22.7 0.24.7 0.25.6
0.LONG.IO.V2 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.15.7 0.19.7 0.21.6 0.20.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.5 0.24.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.12.8 0.8.9 0.13.8 0.14.8
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.20.8 0.21.8 0.23.8 0.22.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.19.8 0.16.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.1.5 0.3.5 0.2.5
IO0:I2MUX 0.0.6 0.1.6 0.0.5
IO1:I1MUX 0.0.4 0.3.4 0.2.4
IO1:I2MUX 0.0.3 0.1.3 0.1.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.4.6
IO1:IFF_D 0.4.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.0.7
IO1:MUX.OFF_D 0.0.2
O 0
CE 1
IO0:OMUX 0.1.8 0.3.9 0.4.9 0.4.8
IO1:OMUX 0.3.1 0.3.0 0.4.0 0.4.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.8.6 0.2.7
IO1:PULL 0.0.1 0.2.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.2.9
IO1:SLEW 0.0.0
FAST 0
SLOW 1

Tile IO.R.T

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.R.T switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.V5pass transistor
TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.E.0mux
TCELL0_IO.DOUBLE.1.E.0mux
TCELL0_IO.DOUBLE.2.E.0mux
TCELL0_IO.DOUBLE.3.E.0mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.CLB.F1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.G1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.C1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_IMUX.CLB.F3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.G3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.C3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_GCLK2mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.0mux
TCELL1_DOUBLE.H1.1mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.R.T bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.R.T bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.R.T bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.R.T bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.R.T bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G1
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.R.T bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F1
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.R.T bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.R.T bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.R.T bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.R.T bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F1IO1.O
TCELL0:IMUX.CLB.G1IO0.O
TCELL0:IMUX.CLB.C1DEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.R.T bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 ~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2 ~IO0:OFF_CE_ENABLE ~INT:PASS.SINGLE.H7.0.DEC.V3 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 ~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2 ~INT:PASS.SINGLE.H3.0.DEC.V1 INT:MUX.LONG.IO.V1[2] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[3] IO0:OMUX[1] IO0:OMUX[2] IO0:SLEW[0] ~IO0:INV.OFF_CLK ~IO0:INV.T
8 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V3[1] ~IO0:IFF_CE_ENABLE ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[3] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[3] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] IO0:OMUX[0] ~IO0:READBACK_OFF ~IO0:READBACK_I2 IO0:OMUX[3] ~IO0:READBACK_I1
7 ~INT:PASS.SINGLE.V6.0.LONG.H5 ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[2] ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H5[2] ~IO1:IFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 INT:MUX.LONG.H5[3] ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[7] IO0:OFF_USED ~IO0:INV.OFF_D IO0:PULL[0] ~IO0:OFF_SRVAL IO0:MUX.OFF_D[0]
6 ~INT:BUF.LONG.H5.0.SINGLE.V6 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 ~INT:BUF.LONG.V4.0.SINGLE.H5 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BUF.LONG.H3.0.SINGLE.V4 ~INT:PASS.SINGLE.V0.0.GND INT:MUX.LONG.H4[0] INT:MUX.LONG.H4[3] ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 INT:MUX.LONG.H5[1] INT:MUX.LONG.H5[0] ~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 INT:MUX.IMUX.IOB0.OK[6] ~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[4] DEC1:O4_N INT:MUX.IMUX.IOB0.OK[2] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[0] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[7] ~DEC1:O3_P ~DEC1:O1_P IO0:IFF_D[0] ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[1] IO0:I2MUX[2]
5 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 ~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 ~INT:PASS.SINGLE.H0.0.DEC.V0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2 ~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2 ~DEC1:O4_P DEC2:O4_P ~INT:PASS.SINGLE.H4.0.DEC.V2 ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[5] ~DEC2:O3_N DEC1:O3_N DEC1:O1_N DEC2:O1_P IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] IO0:I2MUX[0]
4 ~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E ~INT:BUF.LONG.V3.0.SINGLE.H4 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 ~INT:BUF.LONG.H2.0.SINGLE.V3 ~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 INT:MUX.IMUX.IOB0.TS[7] ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 ~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 ~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 ~DEC0:O4_P ~DEC2:O4_N ~DEC0:O2_P DEC2:O2_P DEC1:O2_N DEC2:O3_P DEC0:O3_N ~DEC0:O1_P ~DEC2:O1_N IO1:I1MUX[1] IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[2]
3 INT:MUX.IMUX.CLB.F3[0] ~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E INT:MUX.IMUX.CLB.C3[1] ~INT:BIPASS.SINGLE.H5.SINGLE.V5 INT:MUX.IMUX.CLB.G3[2] ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 INT:MUX.IMUX.CLB.F1[3] ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S INT:MUX.IMUX.CLB.C1[7] ~INT:PASS.SINGLE.H5.0.LONG.V4 INT:MUX.IMUX.CLB.G1[6] ~TBUF0:DRIVE1 INT:MUX.IMUX.IOB0.TS[0] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[5] - INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[7] ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 INT:MUX.IMUX.IOB1.TS[4] ~TBUF1:DRIVE1 DEC0:O4_N INT:MUX.IMUX.IOB1.IK[0] DEC0:O2_N ~IO1:IFF_SRVAL ~DEC1:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC0:O3_P DEC0:O1_N ~IO1:READBACK_I1 ~IO1:READBACK_I2 ~IO1:INV.IFF_CLK IO1:I2MUX[1] IO1:I2MUX[2]
2 INT:MUX.IMUX.CLB.F3[2] INT:MUX.IMUX.CLB.F3[6] INT:MUX.IMUX.CLB.F3[8] INT:MUX.IMUX.CLB.C3[2] INT:MUX.IMUX.CLB.C3[3] INT:MUX.IMUX.CLB.G3[3] INT:MUX.IMUX.CLB.G3[6] INT:MUX.IMUX.CLB.G3[8] INT:MUX.IMUX.CLB.F1[0] INT:MUX.IMUX.CLB.F1[7] INT:MUX.IMUX.CLB.C1[2] INT:MUX.IMUX.CLB.C1[1] INT:MUX.IMUX.CLB.C1[6] - INT:MUX.IMUX.CLB.G1[0] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IO.DBUF.V0[1] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB1.TS[0] - INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[7] IO1:IFF_D[0] IO1:OFF_USED ~IO1:READBACK_OFF ~IO1:INV.OFF_D IO1:MUX.OFF_D[0]
1 INT:MUX.IMUX.CLB.F3[5] INT:MUX.IMUX.CLB.F3[3] INT:MUX.IMUX.CLB.C3[0] INT:MUX.IMUX.CLB.C3[5] INT:MUX.IMUX.CLB.C3[6] INT:MUX.IMUX.CLB.G3[0] INT:MUX.IMUX.CLB.G3[4] INT:MUX.IMUX.CLB.G3[7] INT:MUX.IMUX.CLB.F1[5] INT:MUX.IMUX.CLB.F1[2] INT:MUX.IMUX.CLB.C1[5] INT:MUX.IMUX.CLB.C1[3] INT:MUX.IMUX.CLB.G1[4] INT:MUX.IMUX.CLB.G1[3] INT:MUX.IMUX.CLB.G1[2] INT:MUX.LONG.H0[1] INT:MUX.LONG.H0[3] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.LONG.H1[0] INT:MUX.LONG.H1[3] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[7] IO1:OMUX[0] IO1:OMUX[3] IO1:PULL[0] ~IO1:OFF_SRVAL IO1:PULL[1]
0 INT:MUX.IMUX.CLB.F3[7] INT:MUX.IMUX.CLB.F3[1] INT:MUX.IMUX.CLB.F3[4] INT:MUX.IMUX.CLB.C3[4] INT:MUX.IMUX.CLB.C3[7] INT:MUX.IMUX.CLB.G3[5] INT:MUX.IMUX.CLB.G3[9] INT:MUX.IMUX.CLB.F1[6] INT:MUX.IMUX.CLB.F1[1] INT:MUX.IMUX.CLB.F1[4] INT:MUX.IMUX.CLB.C1[0] INT:MUX.IMUX.CLB.C1[4] INT:MUX.IMUX.CLB.G1[5] INT:MUX.IMUX.CLB.G1[1] INT:MUX.IMUX.CLB.G1[7] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.IMUX.IOB1.O1[4] IO1:OMUX[1] IO1:OMUX[2] ~IO1:INV.OFF_CLK ~IO1:INV.T IO1:SLEW[0]
xc4000e IO.R.T bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - ~PULLUP_TBUF0:ENABLE - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
xc4000e IO.R.T bittile 2
BitFrame
0
1 INT:MUX.IMUX.CLB.G3[1]
0 -
DEC0:O1_N 0.5.3
DEC0:O2_N 0.10.3
DEC0:O3_N 0.6.4
DEC0:O4_N 0.12.3
DEC1:O1_N 0.5.5
DEC1:O2_N 0.8.4
DEC1:O3_N 0.6.5
DEC1:O4_N 0.12.6
DEC2:O1_P 0.4.5
DEC2:O2_P 0.9.4
DEC2:O3_P 0.7.4
DEC2:O4_P 0.11.5
IO0:OFF_USED 0.4.7
IO1:OFF_USED 0.3.2
non-inverted [0]
DEC0:O1_P 0.5.4
DEC0:O2_P 0.10.4
DEC0:O3_P 0.6.3
DEC0:O4_P 0.12.4
DEC1:O1_P 0.5.6
DEC1:O2_P 0.8.3
DEC1:O3_P 0.6.6
DEC1:O4_P 0.12.5
DEC2:O1_N 0.4.4
DEC2:O2_N 0.9.5
DEC2:O3_N 0.7.5
DEC2:O4_N 0.11.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.29.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.27.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.28.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 0.15.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 0.13.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 0.11.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 0.23.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 0.20.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 0.17.5
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.29.7
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.29.8
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.33.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.32.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.33.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 0.16.4
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 0.15.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 0.14.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 0.24.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 0.22.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 0.20.9
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.33.5
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.34.5
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.27.8
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.34.3
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 0.22.5
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 0.14.9
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 0.15.4
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 0.23.9
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.26.5
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.28.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 0.25.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2 0.16.5
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.28.6
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.27.5
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.30.3
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.31.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 0.19.5
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.30.5
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.29.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.29.3
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.31.9
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.32.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 0.16.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2 0.10.9
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.32.8
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.31.8
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.33.8
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.32.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.33.7
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 0.12.9
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.31.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.28.7
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.30.7
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.39.8
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.37.6
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 0.17.4
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2 0.13.5
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.36.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.39.6
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.35.6
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.36.5
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.38.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 0.14.4
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.35.5
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.36.3
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.37.5
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.34.7
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.37.7
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 0.25.9
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2 0.19.9
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.35.7
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.36.8
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.36.7
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.37.9
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.39.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 0.21.9
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.38.9
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.35.9
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.37.8
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.29.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.31.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.30.9
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.27.7
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.38.6
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.39.5
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.38.7
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.36.9
INT:BUF.LONG.H0.0.SINGLE.V1 1.26.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.30.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.27.4
INT:BUF.LONG.H3.0.SINGLE.V4 0.27.6
INT:BUF.LONG.H4.0.SINGLE.V5 0.38.4
INT:BUF.LONG.H5.0.SINGLE.V6 0.40.6
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.32.4
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.38.8
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.34.6
INT:BUF.LONG.V3.0.SINGLE.H4 0.34.4
INT:BUF.LONG.V4.0.SINGLE.H5 0.31.6
INT:BUF.LONG.V5.0.SINGLE.H6 0.35.8
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 0.20.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S 0.23.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S 0.23.4
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 0.23.6
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E 0.26.4
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E 0.31.4
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 0.37.4
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 0.40.4
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 0.19.6
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 0.15.5
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 0.16.7
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 0.15.6
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 0.17.6
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 0.13.4
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 0.17.7
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 0.22.6
INT:PASS.SINGLE.H0.0.DEC.V0 0.18.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.24.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.22.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.21.4
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.32.5
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.13.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.21.7
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.40.9
INT:PASS.SINGLE.H3.0.DEC.V1 0.9.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.15.8
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.39.7
INT:PASS.SINGLE.H4.0.DEC.V2 0.10.5
INT:PASS.SINGLE.H4.0.LONG.V3 0.33.4
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.25.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.19.4
INT:PASS.SINGLE.H5.0.LONG.V4 0.27.3
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.20.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.17.8
INT:PASS.SINGLE.H6.0.LONG.V5 0.34.9
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.24.8
INT:PASS.SINGLE.H7.0.DEC.V3 0.17.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.25.8
INT:PASS.SINGLE.V0.0.GND 0.26.6
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 0.28.4
INT:PASS.SINGLE.V1.0.LONG.H0 1.28.8
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 0.29.4
INT:PASS.SINGLE.V2.0.LONG.H1 1.34.8
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E 0.30.4
INT:PASS.SINGLE.V3.0.LONG.H2 1.33.9
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.26.7
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 0.39.3
INT:PASS.SINGLE.V5.0.LONG.H4 0.40.5
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 0.36.4
INT:PASS.SINGLE.V6.0.LONG.H5 0.40.7
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E 0.39.4
INT:PASS.SINGLE.V7.0.GND 0.26.9
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E 0.38.3
IO0:IFF_CE_ENABLE 0.18.8
IO0:IFF_SRVAL 0.3.6
IO0:INV.IFF_CLK 0.2.6
IO0:INV.OFF_CLK 0.1.9
IO0:INV.OFF_D 0.3.7
IO0:INV.T 0.0.9
IO0:OFF_CE_ENABLE 0.18.9
IO0:OFF_SRVAL 0.1.7
IO0:READBACK_I1 0.0.8
IO0:READBACK_I2 0.2.8
IO0:READBACK_OFF 0.3.8
IO1:IFF_CE_ENABLE 0.18.7
IO1:IFF_SRVAL 0.9.3
IO1:INV.IFF_CLK 0.2.3
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.1.2
IO1:INV.T 0.1.0
IO1:OFF_CE_ENABLE 0.18.6
IO1:OFF_SRVAL 0.1.1
IO1:READBACK_I1 0.4.3
IO1:READBACK_I2 0.3.3
IO1:READBACK_OFF 0.2.2
PULLUP_TBUF0:ENABLE 1.25.7
PULLUP_TBUF1:ENABLE 0.14.7
TBUF0:DRIVE1 0.25.3
TBUF1:DRIVE1 0.13.3
inverted ~[0]
INT:MUX.IMUX.CLB.C1 0.28.3 0.28.2 0.30.1 0.29.0 0.29.1 0.30.2 0.29.2 0.30.0
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V1 0 0 0 1 0 1 1 1
0.DOUBLE.V0.0 0 0 1 0 1 0 1 1
0.DOUBLE.V0.1 0 0 1 0 1 1 0 1
0.SINGLE.V3 0 0 1 1 0 0 1 1
0.SINGLE.V7 0 0 1 1 0 1 0 1
0.LONG.V2 0 0 1 1 1 0 1 0
0.LONG.V3 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C3 0.36.0 0.36.1 0.37.1 0.37.0 0.36.2 0.37.2 0.37.3 0.38.1
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.GCLK2 0 0 0 1 1 1 1 0
0.SINGLE.V3 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 0 1
0.DOUBLE.V0.0 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 0 1
0.LONG.V3 0 0 1 1 1 0 1 0
0.LONG.V2 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V1 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F1 0.31.2 0.33.0 0.32.1 0.31.0 0.32.3 0.31.1 0.32.0 0.32.2
0.SINGLE.V3 0 0 1 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 1 0
0.SINGLE.V0 0 0 1 1 1 1 1 1
0.LONG.V3 0 1 0 0 0 1 1 1
0.DOUBLE.V1.0 0 1 0 0 1 0 1 1
0.LONG.V0 0 1 0 0 1 1 1 0
0.SINGLE.V1 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 0 1 0 1
0.LONG.V1 0 1 1 0 1 0 0 1
0.SINGLE.V6 0 1 1 0 1 1 0 0
0.DOUBLE.V1.1 0 1 1 1 1 1 0 1
0.DOUBLE.V0.1 1 1 1 0 0 1 1 1
0.SINGLE.V4 1 1 1 0 1 0 1 1
0.DOUBLE.V0.0 1 1 1 0 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F3 0.38.2 0.40.0 0.39.2 0.40.1 0.38.0 0.39.1 0.40.2 0.39.0 0.40.3
0.SINGLE.V0 0 0 0 0 1 1 1 1 1
0.DOUBLE.V0.0 0 0 0 1 1 1 0 1 1
0.LONG.V2 0 0 0 1 1 1 1 0 1
0.SINGLE.V3 0 0 1 1 1 1 1 1 1
0.DOUBLE.V1.1 0 1 0 0 0 1 1 1 1
0.LONG.V1 0 1 0 0 1 0 1 1 1
0.DOUBLE.V1.0 0 1 0 1 0 1 0 1 1
0.LONG.V5 0 1 0 1 0 1 1 0 1
0.SINGLE.V4 0 1 0 1 1 0 0 1 1
0.LONG.V4 0 1 0 1 1 0 1 0 1
0.GCLK0 0 1 0 1 1 1 1 1 0
0.SINGLE.V1 0 1 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 1 0 1 1 1
0.SINGLE.V6 1 1 0 0 1 1 1 1 1
0.DOUBLE.V0.1 1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 1 0 1 1 1 1 0 1
0.SINGLE.V7 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G1 0.26.0 0.26.3 0.28.0 0.28.1 0.27.1 0.26.1 0.27.0 0.26.2
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.LONG.V3 0 0 1 0 1 1 1 0
0.SINGLE.V1 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 1 0
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1
0.LONG.V0 0 0 1 1 1 1 0 0
0.SINGLE.V3 0 1 1 0 1 1 1 1
0.DOUBLE.V0.0 0 1 1 1 0 1 1 1
0.SINGLE.V7 0 1 1 1 1 1 0 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 0 1 1 1 1 1 0
0.SINGLE.V6 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G3 0.34.0 0.33.2 0.33.1 0.34.2 0.35.0 0.34.1 0.35.2 0.35.3 2.0.1 0.35.1
0.SINGLE.V0 0 0 0 0 1 1 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1 1 1
0.LONG.V2 0 0 1 0 1 1 1 0 1 1
0.SINGLE.V1 0 0 1 1 0 0 1 1 1 1
0.SINGLE.V6 0 0 1 1 0 1 1 0 1 1
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1 1 1
0.LONG.V5 0 0 1 1 1 1 0 0 1 1
0.GCLK0 0 0 1 1 1 1 1 1 0 1
CIN 0 0 1 1 1 1 1 1 1 0
0.DOUBLE.V0.0 0 1 1 0 1 1 1 1 1 1
0.SINGLE.V5 0 1 1 1 0 1 1 1 1 1
0.DOUBLE.V0.1 0 1 1 1 1 1 0 1 1 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1 1 1
0.SINGLE.V7 1 0 1 1 1 1 1 0 1 1
0.SINGLE.V3 1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.5.7 0.11.7 0.12.7 0.9.7 0.7.7 0.8.7 0.10.7 0.6.7
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.5.8 0.7.8 0.5.9 0.7.9 0.6.9 0.6.8
0.DEC.V3 0 0 0 1 1 1
0.DOUBLE.H0.1 0 0 1 1 1 1
0.DEC.V2 0 1 0 0 1 1
0.DEC.V1 0 1 0 1 0 1
0.DEC.V0 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.0 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.7.6 0.16.6 0.8.5 0.13.6 0.10.6 0.11.6 0.14.6 0.9.6
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.18.4 0.19.2 0.19.3 0.21.2 0.20.3 0.23.3 0.20.2 0.24.3
0.LONG.IO.V3 0 0 1 1 0 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1 0 1
0.GCLK0 0 0 1 1 0 1 1 0
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1 0 0 1 1
0.LONG.IO.V2 0 1 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 0 1 1 0
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
0.LONG.IO.V0 0 1 1 0 0 0 1 1
0.DEC.V2 0 1 1 0 0 1 0 1
0.IO.DOUBLE.1.E.1 0 1 1 0 1 1 1 1
GND 1 1 1 1 0 1 1 1
INT:MUX.IMUX.IOB1.IK 0.5.1 0.7.1 0.7.3 0.11.2 0.6.1 0.8.1 0.10.2 0.11.3
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.6.0 0.5.0 0.9.1 0.7.0 0.8.0 0.9.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V2 0 0 1 1 0 1
0.DEC.V3 0 0 1 1 1 0
1.DOUBLE.H1.1 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
0.DEC.V1 0 1 1 1 1 0
1.DOUBLE.H0.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.5.2 0.7.2 0.8.2 0.12.2 0.6.2 0.13.2 0.14.2 0.9.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.16.3 0.23.2 0.17.3 0.14.3 0.25.2 0.16.2 0.15.2 0.18.2
0.LONG.IO.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 0 1 1
0.GCLK0 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.DEC.V2 0 1 0 0 0 1 1 1
0.LONG.IO.V0 0 1 0 0 1 0 1 1
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 1 0 0 1 1 1
0.LONG.IO.V2 1 1 1 0 1 0 1 1
0.DEC.V3 1 1 1 0 1 1 0 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.23.1 0.21.0 0.23.0 0.21.1 0.22.0 0.22.1
0.IO.DOUBLE.2.E.2 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.E.1 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.17.0 0.20.1 0.20.0 0.19.1 0.18.0 0.19.0
0.IO.DOUBLE.0.E.2 0 0 0 1 1 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1
0.LONG.IO.V3 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 0 1 1 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.12.0 0.12.1 0.14.1 0.14.0 0.13.0 0.13.1
0.IO.DOUBLE.2.E.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.15.1 0.15.0 0.18.1 0.16.0 0.16.1 0.17.1
0.IO.DOUBLE.1.E.1 0 0 0 1 1 1
0.LONG.IO.V2 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.E.1 0 1 1 1 1 1
0.IO.DOUBLE.1.E.2 1 0 0 1 1 1
0.LONG.IO.V3 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.E.2 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.21.3 0.24.2 0.22.2 0.22.3
0.IO.DOUBLE.0.E.2 0 0 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1
0.IO.DOUBLE.3.E.2 0 1 1 0
0.IO.DOUBLE.2.E.2 1 1 1 1
INT:MUX.IO.DBUF.V1 0.8.8 0.9.8 0.11.8 0.10.8
0.IO.DOUBLE.1.E.0 0 0 1 1
0.IO.DOUBLE.2.E.0 0 1 0 1
0.IO.DOUBLE.3.E.0 0 1 1 0
0.IO.DOUBLE.0.E.0 1 1 1 1
INT:MUX.LONG.H0 0.24.1 0.24.0 0.25.1 0.25.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.10.1 0.10.0 0.11.0 0.11.1
0.LONG.IO.V1 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.24.6 0.22.7 0.24.7 0.25.6
0.LONG.IO.V2 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.15.7 0.19.7 0.21.6 0.20.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.5 0.24.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.12.8 0.8.9 0.13.8 0.14.8
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.20.8 0.21.8 0.23.8 0.22.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.19.8 0.16.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.1.5 0.3.5 0.2.5
IO0:I2MUX 0.0.6 0.1.6 0.0.5
IO1:I1MUX 0.0.4 0.3.4 0.2.4
IO1:I2MUX 0.0.3 0.1.3 0.1.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.4.6
IO1:IFF_D 0.4.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.0.7
IO1:MUX.OFF_D 0.0.2
O 0
CE 1
IO0:OMUX 0.1.8 0.3.9 0.4.9 0.4.8
IO1:OMUX 0.3.1 0.3.0 0.4.0 0.4.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.8.6 0.2.7
IO1:PULL 0.0.1 0.2.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.2.9
IO1:SLEW 0.0.0
FAST 0
SLOW 1

Tile IO.RS

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.RS switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.V5pass transistor
TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.E.0mux
TCELL0_IO.DOUBLE.1.E.0mux
TCELL0_IO.DOUBLE.2.E.0mux
TCELL0_IO.DOUBLE.3.E.0mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.CLB.F1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.G1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.C1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_IMUX.CLB.F3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.G3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.C3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_GCLK2mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.0mux
TCELL1_DOUBLE.H1.1mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.RS bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.RS bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.RS bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.RS bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.RS bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G1
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.RS bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F1
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.RS bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.RS bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.RS bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.RS bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F1IO1.O
TCELL0:IMUX.CLB.G1IO0.O
TCELL0:IMUX.CLB.C1DEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2

Bitstream

xc4000e IO.RS bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 ~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2 ~IO0:OFF_CE_ENABLE ~INT:PASS.SINGLE.H7.0.DEC.V3 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 ~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2 ~INT:PASS.SINGLE.H3.0.DEC.V1 INT:MUX.LONG.IO.V1[2] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[3] IO0:OMUX[1] IO0:OMUX[2] IO0:SLEW[0] ~IO0:INV.OFF_CLK ~IO0:INV.T
8 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V3[1] ~IO0:IFF_CE_ENABLE ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[3] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[3] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] IO0:OMUX[0] ~IO0:READBACK_OFF ~IO0:READBACK_I2 IO0:OMUX[3] ~IO0:READBACK_I1
7 ~INT:PASS.SINGLE.V6.0.LONG.H5 ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[2] ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H5[2] ~IO1:IFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 INT:MUX.LONG.H5[3] ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[7] IO0:OFF_USED ~IO0:INV.OFF_D IO0:PULL[0] ~IO0:OFF_SRVAL IO0:MUX.OFF_D[0]
6 ~INT:BUF.LONG.H5.0.SINGLE.V6 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 ~INT:BUF.LONG.V4.0.SINGLE.H5 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BUF.LONG.H3.0.SINGLE.V4 ~INT:PASS.SINGLE.V0.0.GND INT:MUX.LONG.H4[0] INT:MUX.LONG.H4[3] ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 INT:MUX.LONG.H5[1] INT:MUX.LONG.H5[0] ~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 INT:MUX.IMUX.IOB0.OK[6] ~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[4] DEC1:O4_N INT:MUX.IMUX.IOB0.OK[2] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[0] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[7] ~DEC1:O3_P ~DEC1:O1_P IO0:IFF_D[0] ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[1] IO0:I2MUX[2]
5 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 ~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1 ~INT:PASS.SINGLE.H0.0.DEC.V0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2 ~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2 ~DEC1:O4_P DEC2:O4_P ~INT:PASS.SINGLE.H4.0.DEC.V2 ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[5] ~DEC2:O3_N DEC1:O3_N DEC1:O1_N DEC2:O1_P IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] IO0:I2MUX[0]
4 ~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E ~INT:BUF.LONG.V3.0.SINGLE.H4 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 ~INT:BUF.LONG.H2.0.SINGLE.V3 ~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 INT:MUX.IMUX.IOB0.TS[7] ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 ~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1 ~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 ~DEC0:O4_P ~DEC2:O4_N ~DEC0:O2_P DEC2:O2_P DEC1:O2_N DEC2:O3_P DEC0:O3_N ~DEC0:O1_P ~DEC2:O1_N IO1:I1MUX[1] IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[2]
3 INT:MUX.IMUX.CLB.F3[0] ~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E INT:MUX.IMUX.CLB.C3[1] ~INT:BIPASS.SINGLE.H5.SINGLE.V5 INT:MUX.IMUX.CLB.G3[2] ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 INT:MUX.IMUX.CLB.F1[3] ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S INT:MUX.IMUX.CLB.C1[7] ~INT:PASS.SINGLE.H5.0.LONG.V4 INT:MUX.IMUX.CLB.G1[6] ~TBUF0:DRIVE1 INT:MUX.IMUX.IOB0.TS[0] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[5] - INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[7] ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 INT:MUX.IMUX.IOB1.TS[4] ~TBUF1:DRIVE1 DEC0:O4_N INT:MUX.IMUX.IOB1.IK[0] DEC0:O2_N ~IO1:IFF_SRVAL ~DEC1:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC0:O3_P DEC0:O1_N ~IO1:READBACK_I1 ~IO1:READBACK_I2 ~IO1:INV.IFF_CLK IO1:I2MUX[1] IO1:I2MUX[2]
2 INT:MUX.IMUX.CLB.F3[2] INT:MUX.IMUX.CLB.F3[6] INT:MUX.IMUX.CLB.F3[8] INT:MUX.IMUX.CLB.C3[2] INT:MUX.IMUX.CLB.C3[3] INT:MUX.IMUX.CLB.G3[3] INT:MUX.IMUX.CLB.G3[6] INT:MUX.IMUX.CLB.G3[8] INT:MUX.IMUX.CLB.F1[0] INT:MUX.IMUX.CLB.F1[7] INT:MUX.IMUX.CLB.C1[2] INT:MUX.IMUX.CLB.C1[1] INT:MUX.IMUX.CLB.C1[6] - INT:MUX.IMUX.CLB.G1[0] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IO.DBUF.V0[1] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB1.TS[0] - INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[7] IO1:IFF_D[0] IO1:OFF_USED ~IO1:READBACK_OFF ~IO1:INV.OFF_D IO1:MUX.OFF_D[0]
1 INT:MUX.IMUX.CLB.F3[5] INT:MUX.IMUX.CLB.F3[3] INT:MUX.IMUX.CLB.C3[0] INT:MUX.IMUX.CLB.C3[5] INT:MUX.IMUX.CLB.C3[6] INT:MUX.IMUX.CLB.G3[0] INT:MUX.IMUX.CLB.G3[4] INT:MUX.IMUX.CLB.G3[7] INT:MUX.IMUX.CLB.F1[5] INT:MUX.IMUX.CLB.F1[2] INT:MUX.IMUX.CLB.C1[5] INT:MUX.IMUX.CLB.C1[3] INT:MUX.IMUX.CLB.G1[4] INT:MUX.IMUX.CLB.G1[3] INT:MUX.IMUX.CLB.G1[2] INT:MUX.LONG.H0[1] INT:MUX.LONG.H0[3] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.LONG.H1[0] INT:MUX.LONG.H1[3] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[7] IO1:OMUX[0] IO1:OMUX[3] IO1:PULL[0] ~IO1:OFF_SRVAL IO1:PULL[1]
0 INT:MUX.IMUX.CLB.F3[7] INT:MUX.IMUX.CLB.F3[1] INT:MUX.IMUX.CLB.F3[4] INT:MUX.IMUX.CLB.C3[4] INT:MUX.IMUX.CLB.C3[7] INT:MUX.IMUX.CLB.G3[5] INT:MUX.IMUX.CLB.G3[9] INT:MUX.IMUX.CLB.F1[6] INT:MUX.IMUX.CLB.F1[1] INT:MUX.IMUX.CLB.F1[4] INT:MUX.IMUX.CLB.C1[0] INT:MUX.IMUX.CLB.C1[4] INT:MUX.IMUX.CLB.G1[5] INT:MUX.IMUX.CLB.G1[1] INT:MUX.IMUX.CLB.G1[7] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.IMUX.IOB1.O1[4] IO1:OMUX[1] IO1:OMUX[2] ~IO1:INV.OFF_CLK ~IO1:INV.T IO1:SLEW[0]
xc4000e IO.RS bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - ~PULLUP_TBUF0:ENABLE - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
xc4000e IO.RS bittile 2
BitFrame
0
1 INT:MUX.IMUX.CLB.G3[1]
0 -
DEC0:O1_N 0.5.3
DEC0:O2_N 0.10.3
DEC0:O3_N 0.6.4
DEC0:O4_N 0.12.3
DEC1:O1_N 0.5.5
DEC1:O2_N 0.8.4
DEC1:O3_N 0.6.5
DEC1:O4_N 0.12.6
DEC2:O1_P 0.4.5
DEC2:O2_P 0.9.4
DEC2:O3_P 0.7.4
DEC2:O4_P 0.11.5
IO0:OFF_USED 0.4.7
IO1:OFF_USED 0.3.2
non-inverted [0]
DEC0:O1_P 0.5.4
DEC0:O2_P 0.10.4
DEC0:O3_P 0.6.3
DEC0:O4_P 0.12.4
DEC1:O1_P 0.5.6
DEC1:O2_P 0.8.3
DEC1:O3_P 0.6.6
DEC1:O4_P 0.12.5
DEC2:O1_N 0.4.4
DEC2:O2_N 0.9.5
DEC2:O3_N 0.7.5
DEC2:O4_N 0.11.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.29.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.27.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.28.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 0.15.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 0.13.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 0.11.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 0.23.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 0.20.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 0.17.5
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.29.7
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.29.8
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.33.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.32.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.33.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 0.16.4
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 0.15.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 0.14.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 0.24.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 0.22.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 0.20.9
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.33.5
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.34.5
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.27.8
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.34.3
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 0.22.5
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 0.14.9
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 0.15.4
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 0.23.9
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.26.5
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.28.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1 0.19.5
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.28.6
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.27.5
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.30.3
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.31.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0 0.25.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2 0.16.5
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.30.5
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.29.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.29.3
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.31.9
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.32.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1 0.12.9
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.32.8
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.31.8
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.33.8
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.32.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.33.7
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0 0.16.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2 0.10.9
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.31.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.28.7
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.30.7
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.39.8
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.37.6
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1 0.14.4
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.36.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.39.6
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.35.6
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.36.5
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.38.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0 0.17.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2 0.13.5
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.35.5
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.36.3
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.37.5
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.34.7
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.37.7
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1 0.21.9
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.35.7
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.36.8
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.36.7
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.37.9
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.39.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0 0.25.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2 0.19.9
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.38.9
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.35.9
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.37.8
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.29.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.31.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.30.9
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.27.7
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.38.6
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.39.5
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.38.7
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.36.9
INT:BUF.LONG.H0.0.SINGLE.V1 1.26.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.30.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.27.4
INT:BUF.LONG.H3.0.SINGLE.V4 0.27.6
INT:BUF.LONG.H4.0.SINGLE.V5 0.38.4
INT:BUF.LONG.H5.0.SINGLE.V6 0.40.6
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.32.4
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.38.8
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.34.6
INT:BUF.LONG.V3.0.SINGLE.H4 0.34.4
INT:BUF.LONG.V4.0.SINGLE.H5 0.31.6
INT:BUF.LONG.V5.0.SINGLE.H6 0.35.8
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 0.20.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S 0.23.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S 0.23.4
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 0.23.6
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E 0.26.4
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E 0.31.4
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 0.37.4
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 0.40.4
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 0.19.6
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 0.15.5
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 0.16.7
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 0.15.6
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 0.17.6
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 0.13.4
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 0.17.7
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 0.22.6
INT:PASS.SINGLE.H0.0.DEC.V0 0.18.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.24.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.22.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.21.4
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.32.5
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.13.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.21.7
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.40.9
INT:PASS.SINGLE.H3.0.DEC.V1 0.9.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.15.8
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.39.7
INT:PASS.SINGLE.H4.0.DEC.V2 0.10.5
INT:PASS.SINGLE.H4.0.LONG.V3 0.33.4
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.25.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.19.4
INT:PASS.SINGLE.H5.0.LONG.V4 0.27.3
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.20.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.17.8
INT:PASS.SINGLE.H6.0.LONG.V5 0.34.9
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.24.8
INT:PASS.SINGLE.H7.0.DEC.V3 0.17.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.25.8
INT:PASS.SINGLE.V0.0.GND 0.26.6
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 0.28.4
INT:PASS.SINGLE.V1.0.LONG.H0 1.28.8
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 0.29.4
INT:PASS.SINGLE.V2.0.LONG.H1 1.34.8
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E 0.30.4
INT:PASS.SINGLE.V3.0.LONG.H2 1.33.9
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.26.7
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 0.39.3
INT:PASS.SINGLE.V5.0.LONG.H4 0.40.5
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 0.36.4
INT:PASS.SINGLE.V6.0.LONG.H5 0.40.7
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E 0.39.4
INT:PASS.SINGLE.V7.0.GND 0.26.9
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E 0.38.3
IO0:IFF_CE_ENABLE 0.18.8
IO0:IFF_SRVAL 0.3.6
IO0:INV.IFF_CLK 0.2.6
IO0:INV.OFF_CLK 0.1.9
IO0:INV.OFF_D 0.3.7
IO0:INV.T 0.0.9
IO0:OFF_CE_ENABLE 0.18.9
IO0:OFF_SRVAL 0.1.7
IO0:READBACK_I1 0.0.8
IO0:READBACK_I2 0.2.8
IO0:READBACK_OFF 0.3.8
IO1:IFF_CE_ENABLE 0.18.7
IO1:IFF_SRVAL 0.9.3
IO1:INV.IFF_CLK 0.2.3
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.1.2
IO1:INV.T 0.1.0
IO1:OFF_CE_ENABLE 0.18.6
IO1:OFF_SRVAL 0.1.1
IO1:READBACK_I1 0.4.3
IO1:READBACK_I2 0.3.3
IO1:READBACK_OFF 0.2.2
PULLUP_TBUF0:ENABLE 1.25.7
PULLUP_TBUF1:ENABLE 0.14.7
TBUF0:DRIVE1 0.25.3
TBUF1:DRIVE1 0.13.3
inverted ~[0]
INT:MUX.IMUX.CLB.C1 0.28.3 0.28.2 0.30.1 0.29.0 0.29.1 0.30.2 0.29.2 0.30.0
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V1 0 0 0 1 0 1 1 1
0.DOUBLE.V0.0 0 0 1 0 1 0 1 1
0.DOUBLE.V0.1 0 0 1 0 1 1 0 1
0.SINGLE.V3 0 0 1 1 0 0 1 1
0.SINGLE.V7 0 0 1 1 0 1 0 1
0.LONG.V2 0 0 1 1 1 0 1 0
0.LONG.V3 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C3 0.36.0 0.36.1 0.37.1 0.37.0 0.36.2 0.37.2 0.37.3 0.38.1
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.GCLK2 0 0 0 1 1 1 1 0
0.SINGLE.V3 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 0 1
0.DOUBLE.V0.0 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 0 1
0.LONG.V3 0 0 1 1 1 0 1 0
0.LONG.V2 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V1 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F1 0.31.2 0.33.0 0.32.1 0.31.0 0.32.3 0.31.1 0.32.0 0.32.2
0.SINGLE.V3 0 0 1 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 1 0
0.SINGLE.V0 0 0 1 1 1 1 1 1
0.LONG.V3 0 1 0 0 0 1 1 1
0.DOUBLE.V1.0 0 1 0 0 1 0 1 1
0.LONG.V0 0 1 0 0 1 1 1 0
0.SINGLE.V1 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 0 1 0 1
0.LONG.V1 0 1 1 0 1 0 0 1
0.SINGLE.V6 0 1 1 0 1 1 0 0
0.DOUBLE.V1.1 0 1 1 1 1 1 0 1
0.DOUBLE.V0.1 1 1 1 0 0 1 1 1
0.SINGLE.V4 1 1 1 0 1 0 1 1
0.DOUBLE.V0.0 1 1 1 0 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F3 0.38.2 0.40.0 0.39.2 0.40.1 0.38.0 0.39.1 0.40.2 0.39.0 0.40.3
0.SINGLE.V0 0 0 0 0 1 1 1 1 1
0.DOUBLE.V0.0 0 0 0 1 1 1 0 1 1
0.LONG.V2 0 0 0 1 1 1 1 0 1
0.SINGLE.V3 0 0 1 1 1 1 1 1 1
0.DOUBLE.V1.1 0 1 0 0 0 1 1 1 1
0.LONG.V1 0 1 0 0 1 0 1 1 1
0.DOUBLE.V1.0 0 1 0 1 0 1 0 1 1
0.LONG.V5 0 1 0 1 0 1 1 0 1
0.SINGLE.V4 0 1 0 1 1 0 0 1 1
0.LONG.V4 0 1 0 1 1 0 1 0 1
0.GCLK0 0 1 0 1 1 1 1 1 0
0.SINGLE.V1 0 1 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 1 0 1 1 1
0.SINGLE.V6 1 1 0 0 1 1 1 1 1
0.DOUBLE.V0.1 1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 1 0 1 1 1 1 0 1
0.SINGLE.V7 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G1 0.26.0 0.26.3 0.28.0 0.28.1 0.27.1 0.26.1 0.27.0 0.26.2
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.LONG.V3 0 0 1 0 1 1 1 0
0.SINGLE.V1 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 1 0
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1
0.LONG.V0 0 0 1 1 1 1 0 0
0.SINGLE.V3 0 1 1 0 1 1 1 1
0.DOUBLE.V0.0 0 1 1 1 0 1 1 1
0.SINGLE.V7 0 1 1 1 1 1 0 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 0 1 1 1 1 1 0
0.SINGLE.V6 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G3 0.34.0 0.33.2 0.33.1 0.34.2 0.35.0 0.34.1 0.35.2 0.35.3 2.0.1 0.35.1
0.SINGLE.V0 0 0 0 0 1 1 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1 1 1
0.LONG.V2 0 0 1 0 1 1 1 0 1 1
0.SINGLE.V1 0 0 1 1 0 0 1 1 1 1
0.SINGLE.V6 0 0 1 1 0 1 1 0 1 1
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1 1 1
0.LONG.V5 0 0 1 1 1 1 0 0 1 1
0.GCLK0 0 0 1 1 1 1 1 1 0 1
CIN 0 0 1 1 1 1 1 1 1 0
0.DOUBLE.V0.0 0 1 1 0 1 1 1 1 1 1
0.SINGLE.V5 0 1 1 1 0 1 1 1 1 1
0.DOUBLE.V0.1 0 1 1 1 1 1 0 1 1 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1 1 1
0.SINGLE.V7 1 0 1 1 1 1 1 0 1 1
0.SINGLE.V3 1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.5.7 0.11.7 0.12.7 0.9.7 0.7.7 0.8.7 0.10.7 0.6.7
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.5.8 0.7.8 0.5.9 0.7.9 0.6.9 0.6.8
0.DEC.V3 0 0 0 1 1 1
0.DOUBLE.H0.1 0 0 1 1 1 1
0.DEC.V2 0 1 0 0 1 1
0.DEC.V1 0 1 0 1 0 1
0.DEC.V0 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.0 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.7.6 0.16.6 0.8.5 0.13.6 0.10.6 0.11.6 0.14.6 0.9.6
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.18.4 0.19.2 0.19.3 0.21.2 0.20.3 0.23.3 0.20.2 0.24.3
0.LONG.IO.V3 0 0 1 1 0 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1 0 1
0.GCLK0 0 0 1 1 0 1 1 0
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1 0 0 1 1
0.LONG.IO.V2 0 1 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 0 1 1 0
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
0.LONG.IO.V0 0 1 1 0 0 0 1 1
0.DEC.V2 0 1 1 0 0 1 0 1
0.IO.DOUBLE.1.E.1 0 1 1 0 1 1 1 1
GND 1 1 1 1 0 1 1 1
INT:MUX.IMUX.IOB1.IK 0.5.1 0.7.1 0.7.3 0.11.2 0.6.1 0.8.1 0.10.2 0.11.3
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.6.0 0.5.0 0.9.1 0.7.0 0.8.0 0.9.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V2 0 0 1 1 0 1
0.DEC.V3 0 0 1 1 1 0
1.DOUBLE.H1.1 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
0.DEC.V1 0 1 1 1 1 0
1.DOUBLE.H0.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.5.2 0.7.2 0.8.2 0.12.2 0.6.2 0.13.2 0.14.2 0.9.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.16.3 0.23.2 0.17.3 0.14.3 0.25.2 0.16.2 0.15.2 0.18.2
0.LONG.IO.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 0 1 1
0.GCLK0 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.DEC.V2 0 1 0 0 0 1 1 1
0.LONG.IO.V0 0 1 0 0 1 0 1 1
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 1 0 0 1 1 1
0.LONG.IO.V2 1 1 1 0 1 0 1 1
0.DEC.V3 1 1 1 0 1 1 0 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.23.1 0.21.0 0.23.0 0.21.1 0.22.0 0.22.1
0.IO.DOUBLE.2.E.2 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.E.1 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.17.0 0.20.1 0.20.0 0.19.1 0.18.0 0.19.0
0.IO.DOUBLE.0.E.2 0 0 0 1 1 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1
0.LONG.IO.V3 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 0 1 1 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.12.0 0.12.1 0.14.1 0.14.0 0.13.0 0.13.1
0.IO.DOUBLE.2.E.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.15.1 0.15.0 0.18.1 0.16.0 0.16.1 0.17.1
0.IO.DOUBLE.1.E.1 0 0 0 1 1 1
0.LONG.IO.V2 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.E.1 0 1 1 1 1 1
0.IO.DOUBLE.1.E.2 1 0 0 1 1 1
0.LONG.IO.V3 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.E.2 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.21.3 0.24.2 0.22.2 0.22.3
0.IO.DOUBLE.0.E.2 0 0 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1
0.IO.DOUBLE.3.E.2 0 1 1 0
0.IO.DOUBLE.2.E.2 1 1 1 1
INT:MUX.IO.DBUF.V1 0.8.8 0.9.8 0.11.8 0.10.8
0.IO.DOUBLE.1.E.0 0 0 1 1
0.IO.DOUBLE.2.E.0 0 1 0 1
0.IO.DOUBLE.3.E.0 0 1 1 0
0.IO.DOUBLE.0.E.0 1 1 1 1
INT:MUX.LONG.H0 0.24.1 0.24.0 0.25.1 0.25.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.10.1 0.10.0 0.11.0 0.11.1
0.LONG.IO.V1 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.24.6 0.22.7 0.24.7 0.25.6
0.LONG.IO.V2 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.15.7 0.19.7 0.21.6 0.20.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.5 0.24.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.12.8 0.8.9 0.13.8 0.14.8
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.20.8 0.21.8 0.23.8 0.22.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.19.8 0.16.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.1.5 0.3.5 0.2.5
IO0:I2MUX 0.0.6 0.1.6 0.0.5
IO1:I1MUX 0.0.4 0.3.4 0.2.4
IO1:I2MUX 0.0.3 0.1.3 0.1.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.4.6
IO1:IFF_D 0.4.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.0.7
IO1:MUX.OFF_D 0.0.2
O 0
CE 1
IO0:OMUX 0.1.8 0.3.9 0.4.9 0.4.8
IO1:OMUX 0.3.1 0.3.0 0.4.0 0.4.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.8.6 0.2.7
IO1:PULL 0.0.1 0.2.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.2.9
IO1:SLEW 0.0.0
FAST 0
SLOW 1

Tile IO.RS.B

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.RS.B switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_DEC.V0pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_LONG.IO.V0pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_LONG.IO.V1pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_DEC.V1pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_DEC.V2pass transistor
TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_LONG.IO.V2pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_LONG.V5pass transistor
TCELL0_LONG.IO.V3pass transistor
TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_DEC.V3pass transistor
TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.LR.IOB0.I1pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.LR.IOB1.I1.Spass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.LR.IOB1.I2.Spass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.CLB.GYQ.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.CLB.GY.Epass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.LR.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.LR.IOB0.I2pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.1TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_DOUBLE.H0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.1TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.1TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.E.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0TCELL0_IO.DBUF.V0pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.1TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.2TCELL0_IO.DBUF.V1pass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_DOUBLE.H1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.E.0bidirectional pass transistor
TCELL0_IO.DBUF.V0TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_IO.DBUF.V1TCELL0_IO.DOUBLE.0.E.0mux
TCELL0_IO.DOUBLE.1.E.0mux
TCELL0_IO.DOUBLE.2.E.0mux
TCELL0_IO.DOUBLE.3.E.0mux
TCELL0_LONG.H0TCELL0_LONG.IO.V0mux
TCELL0_DEC.V3mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.V0TCELL0_SINGLE.H1mux
TCELL0_LONG.H0mux
TCELL0_LONG.IO.V1TCELL0_SINGLE.H2mux
TCELL0_LONG.H1mux
TCELL0_LONG.H3mux
TCELL0_LONG.IO.V2TCELL0_SINGLE.H5mux
TCELL0_LONG.H2mux
TCELL0_LONG.H4mux
TCELL0_LONG.IO.V3TCELL0_SINGLE.H6mux
TCELL0_LONG.H5mux
TCELL0_IMUX.CLB.F1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.G1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V0mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_IMUX.CLB.C1TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_IMUX.CLB.F3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.G3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_GCLK0mux
TCELL0_IMUX.CLB.C3TCELL0_SINGLE.V0mux
TCELL0_SINGLE.V1mux
TCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_SINGLE.V6mux
TCELL0_SINGLE.V7mux
TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V0.1mux
TCELL0_DOUBLE.V1.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V2mux
TCELL0_LONG.V3mux
TCELL0_GCLK2mux
TCELL0_IMUX.TBUF0.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_DEC.V1mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.TBUF1.ITCELL0_IO.DOUBLE.2.E.1mux
TCELL0_IO.DOUBLE.2.E.2mux
TCELL0_IO.DOUBLE.3.E.1mux
TCELL0_IO.DOUBLE.3.E.2mux
TCELL0_LONG.IO.V1mux
TCELL0_DEC.V2mux
TCELL0_OUT.LR.IOB0.I2mux
TCELL0_OUT.LR.IOB1.I2mux
TCELL0_IMUX.TBUF1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V0mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_LONG.H0mux
TCELL0_LONG.H1mux
TCELL0_LONG.H2mux
TCELL0_DEC.V0mux
TCELL0_DEC.V1mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL1_DOUBLE.H0.0mux
TCELL1_DOUBLE.H1.1mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.H2mux
TCELL1_SINGLE.H3mux
TCELL1_SINGLE.H4mux
TCELL1_SINGLE.H5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.E.1mux
TCELL0_IO.DOUBLE.0.E.2mux
TCELL0_IO.DOUBLE.1.E.1mux
TCELL0_IO.DOUBLE.1.E.2mux
TCELL0_LONG.IO.V0mux
TCELL0_LONG.IO.V1mux
TCELL0_LONG.IO.V2mux
TCELL0_LONG.IO.V3mux
TCELL0_DEC.V2mux
TCELL0_DEC.V3mux
TCELL0_GCLK0mux

Bel TBUF0

xc4000e IO.RS.B bel TBUF0
PinDirectionWires
IinputTCELL0:IMUX.TBUF0.I
OoutputTCELL0:LONG.H2
TinputTCELL0:IMUX.TBUF0.TS

Bel TBUF1

xc4000e IO.RS.B bel TBUF1
PinDirectionWires
IinputTCELL0:IMUX.TBUF1.I
OoutputTCELL0:LONG.H3
TinputTCELL0:IMUX.TBUF1.TS

Bel PULLUP_TBUF0

xc4000e IO.RS.B bel PULLUP_TBUF0
PinDirectionWires
OoutputTCELL0:LONG.H2

Bel PULLUP_TBUF1

xc4000e IO.RS.B bel PULLUP_TBUF1
PinDirectionWires
OoutputTCELL0:LONG.H3

Bel IO0

xc4000e IO.RS.B bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.LR.IOB0.I1
I2outputTCELL0:OUT.LR.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.G1
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.RS.B bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.LR.IOB1.I1
I2outputTCELL0:OUT.LR.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.F1
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.RS.B bel DEC0
PinDirectionWires
IinputTCELL0:OUT.LR.IOB0.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC1

xc4000e IO.RS.B bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel DEC2

xc4000e IO.RS.B bel DEC2
PinDirectionWires
IinputTCELL0:OUT.LR.IOB1.I1
O1outputTCELL0:DEC.V0
O2outputTCELL0:DEC.V1
O3outputTCELL0:DEC.V2
O4outputTCELL0:DEC.V3

Bel wires

xc4000e IO.RS.B bel wires
WirePins
TCELL0:LONG.H2TBUF0.O, PULLUP_TBUF0.O
TCELL0:LONG.H3TBUF1.O, PULLUP_TBUF1.O
TCELL0:DEC.V0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.V1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.V2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.V3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F1IO1.O
TCELL0:IMUX.CLB.G1IO0.O
TCELL0:IMUX.CLB.C1DEC1.I
TCELL0:IMUX.TBUF0.ITBUF0.I
TCELL0:IMUX.TBUF0.TSTBUF0.T
TCELL0:IMUX.TBUF1.ITBUF1.I
TCELL0:IMUX.TBUF1.TSTBUF1.T
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.LR.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.LR.IOB0.I2IO0.I2
TCELL0:OUT.LR.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.LR.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.RS.B bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 ~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2 ~IO0:OFF_CE_ENABLE ~INT:PASS.SINGLE.H7.0.DEC.V3 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 ~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2 ~INT:PASS.SINGLE.H3.0.DEC.V1 INT:MUX.LONG.IO.V1[2] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[3] IO0:OMUX[1] IO0:OMUX[2] IO0:SLEW[0] ~IO0:INV.OFF_CLK ~IO0:INV.T
8 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S ~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V3[1] ~IO0:IFF_CE_ENABLE ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 INT:MUX.LONG.IO.V3[0] ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[3] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[3] INT:MUX.IMUX.IOB0.O1[4] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] IO0:OMUX[0] ~IO0:READBACK_OFF ~IO0:READBACK_I2 IO0:OMUX[3] ~IO0:READBACK_I1
7 ~INT:PASS.SINGLE.V6.0.LONG.H5 ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S INT:MUX.LONG.H4[2] ~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 INT:MUX.LONG.H5[2] ~IO1:IFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 INT:MUX.LONG.H5[3] ~PULLUP_TBUF1:ENABLE ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[7] IO0:OFF_USED ~IO0:INV.OFF_D IO0:PULL[0] ~IO0:OFF_SRVAL IO0:MUX.OFF_D[0]
6 ~INT:BUF.LONG.H5.0.SINGLE.V6 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 ~INT:BUF.LONG.V4.0.SINGLE.H5 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BUF.LONG.H3.0.SINGLE.V4 ~INT:PASS.SINGLE.V0.0.GND INT:MUX.LONG.H4[0] INT:MUX.LONG.H4[3] ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 INT:MUX.LONG.H5[1] INT:MUX.LONG.H5[0] ~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 ~IO1:OFF_CE_ENABLE ~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 INT:MUX.IMUX.IOB0.OK[6] ~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[4] DEC1:O4_N INT:MUX.IMUX.IOB0.OK[2] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[0] IO0:PULL[1] INT:MUX.IMUX.IOB0.OK[7] ~DEC1:O3_P ~DEC1:O1_P IO0:IFF_D[0] ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[1] IO0:I2MUX[2]
5 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0 INT:MUX.LONG.IO.V0[0] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 ~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 INT:MUX.LONG.IO.V0[1] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1 ~INT:PASS.SINGLE.H0.0.DEC.V0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2 ~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2 ~DEC1:O4_P DEC2:O4_P ~INT:PASS.SINGLE.H4.0.DEC.V2 ~DEC2:O2_N INT:MUX.IMUX.IOB0.OK[5] ~DEC2:O3_N DEC1:O3_N DEC1:O1_N DEC2:O1_P IO0:I1MUX[1] IO0:I1MUX[0] IO0:I1MUX[2] IO0:I2MUX[0]
4 ~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E ~INT:BUF.LONG.V3.0.SINGLE.H4 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E ~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 ~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 ~INT:BUF.LONG.H2.0.SINGLE.V3 ~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 INT:MUX.IMUX.IOB0.TS[7] ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 ~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1 ~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 ~DEC0:O4_P ~DEC2:O4_N ~DEC0:O2_P DEC2:O2_P DEC1:O2_N DEC2:O3_P DEC0:O3_N ~DEC0:O1_P ~DEC2:O1_N IO1:I1MUX[1] IO1:I1MUX[0] IO1:I2MUX[0] IO1:I1MUX[2]
3 INT:MUX.IMUX.CLB.F3[0] ~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 ~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E INT:MUX.IMUX.CLB.C3[1] ~INT:BIPASS.SINGLE.H5.SINGLE.V5 INT:MUX.IMUX.CLB.G3[2] ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 INT:MUX.IMUX.CLB.F1[3] ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S INT:MUX.IMUX.CLB.C1[7] ~INT:PASS.SINGLE.H5.0.LONG.V4 INT:MUX.IMUX.CLB.G1[6] ~TBUF0:DRIVE1 INT:MUX.IMUX.IOB0.TS[0] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[3] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[5] - INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[7] ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 INT:MUX.IMUX.IOB1.TS[4] ~TBUF1:DRIVE1 DEC0:O4_N INT:MUX.IMUX.IOB1.IK[0] DEC0:O2_N ~IO1:IFF_SRVAL ~DEC1:O2_P INT:MUX.IMUX.IOB1.IK[5] ~DEC0:O3_P DEC0:O1_N ~IO1:READBACK_I1 ~IO1:READBACK_I2 ~IO1:INV.IFF_CLK IO1:I2MUX[1] IO1:I2MUX[2]
2 INT:MUX.IMUX.CLB.F3[2] INT:MUX.IMUX.CLB.F3[6] INT:MUX.IMUX.CLB.F3[8] INT:MUX.IMUX.CLB.C3[2] INT:MUX.IMUX.CLB.C3[3] INT:MUX.IMUX.CLB.G3[3] INT:MUX.IMUX.CLB.G3[6] INT:MUX.IMUX.CLB.G3[8] INT:MUX.IMUX.CLB.F1[0] INT:MUX.IMUX.CLB.F1[7] INT:MUX.IMUX.CLB.C1[2] INT:MUX.IMUX.CLB.C1[1] INT:MUX.IMUX.CLB.C1[6] - INT:MUX.IMUX.CLB.G1[0] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IO.DBUF.V0[2] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IO.DBUF.V0[1] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB1.TS[0] - INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[1] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.IMUX.IOB1.OK[7] IO1:IFF_D[0] IO1:OFF_USED ~IO1:READBACK_OFF ~IO1:INV.OFF_D IO1:MUX.OFF_D[0]
1 INT:MUX.IMUX.CLB.F3[5] INT:MUX.IMUX.CLB.F3[3] INT:MUX.IMUX.CLB.C3[0] INT:MUX.IMUX.CLB.C3[5] INT:MUX.IMUX.CLB.C3[6] INT:MUX.IMUX.CLB.G3[0] INT:MUX.IMUX.CLB.G3[4] INT:MUX.IMUX.CLB.G3[7] INT:MUX.IMUX.CLB.F1[5] INT:MUX.IMUX.CLB.F1[2] INT:MUX.IMUX.CLB.C1[5] INT:MUX.IMUX.CLB.C1[3] INT:MUX.IMUX.CLB.G1[4] INT:MUX.IMUX.CLB.G1[3] INT:MUX.IMUX.CLB.G1[2] INT:MUX.LONG.H0[1] INT:MUX.LONG.H0[3] INT:MUX.IMUX.TBUF0.I[5] INT:MUX.IMUX.TBUF0.I[0] INT:MUX.IMUX.TBUF0.I[2] INT:MUX.IMUX.TBUF0.TS[4] INT:MUX.IMUX.TBUF0.TS[2] INT:MUX.IMUX.TBUF1.TS[3] INT:MUX.IMUX.TBUF1.TS[0] INT:MUX.IMUX.TBUF1.TS[1] INT:MUX.IMUX.TBUF1.TS[5] INT:MUX.IMUX.TBUF1.I[3] INT:MUX.IMUX.TBUF1.I[0] INT:MUX.IMUX.TBUF1.I[4] INT:MUX.LONG.H1[0] INT:MUX.LONG.H1[3] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.IK[7] IO1:OMUX[0] IO1:OMUX[3] IO1:PULL[0] ~IO1:OFF_SRVAL IO1:PULL[1]
0 INT:MUX.IMUX.CLB.F3[7] INT:MUX.IMUX.CLB.F3[1] INT:MUX.IMUX.CLB.F3[4] INT:MUX.IMUX.CLB.C3[4] INT:MUX.IMUX.CLB.C3[7] INT:MUX.IMUX.CLB.G3[5] INT:MUX.IMUX.CLB.G3[9] INT:MUX.IMUX.CLB.F1[6] INT:MUX.IMUX.CLB.F1[1] INT:MUX.IMUX.CLB.F1[4] INT:MUX.IMUX.CLB.C1[0] INT:MUX.IMUX.CLB.C1[4] INT:MUX.IMUX.CLB.G1[5] INT:MUX.IMUX.CLB.G1[1] INT:MUX.IMUX.CLB.G1[7] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] INT:MUX.IMUX.TBUF0.I[3] INT:MUX.IMUX.TBUF0.I[1] INT:MUX.IMUX.TBUF0.I[4] INT:MUX.IMUX.TBUF0.TS[3] INT:MUX.IMUX.TBUF0.TS[0] INT:MUX.IMUX.TBUF0.TS[1] INT:MUX.IMUX.TBUF0.TS[5] INT:MUX.IMUX.TBUF1.TS[2] INT:MUX.IMUX.TBUF1.TS[4] INT:MUX.IMUX.TBUF1.I[2] INT:MUX.IMUX.TBUF1.I[1] INT:MUX.IMUX.TBUF1.I[5] INT:MUX.LONG.H1[1] INT:MUX.LONG.H1[2] INT:MUX.IMUX.IOB1.O1[0] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5] INT:MUX.IMUX.IOB1.O1[4] IO1:OMUX[1] IO1:OMUX[2] ~IO1:INV.OFF_CLK ~IO1:INV.T IO1:SLEW[0]
xc4000e IO.RS.B bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - ~PULLUP_TBUF0:ENABLE - - - - - - - - - - - - - - - - - - - - - - - - -
11 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
xc4000e IO.RS.B bittile 2
BitFrame
0
1 INT:MUX.IMUX.CLB.G3[1]
0 -
DEC0:O1_N 0.5.3
DEC0:O2_N 0.10.3
DEC0:O3_N 0.6.4
DEC0:O4_N 0.12.3
DEC1:O1_N 0.5.5
DEC1:O2_N 0.8.4
DEC1:O3_N 0.6.5
DEC1:O4_N 0.12.6
DEC2:O1_P 0.4.5
DEC2:O2_P 0.9.4
DEC2:O3_P 0.7.4
DEC2:O4_P 0.11.5
IO0:OFF_USED 0.4.7
IO1:OFF_USED 0.3.2
non-inverted [0]
DEC0:O1_P 0.5.4
DEC0:O2_P 0.10.4
DEC0:O3_P 0.6.3
DEC0:O4_P 0.12.4
DEC1:O1_P 0.5.6
DEC1:O2_P 0.8.3
DEC1:O3_P 0.6.6
DEC1:O4_P 0.12.5
DEC2:O1_N 0.4.4
DEC2:O2_N 0.9.5
DEC2:O3_N 0.7.5
DEC2:O4_N 0.11.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.29.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.27.9
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.28.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 0.15.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 0.13.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2 0.11.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 0.23.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 0.20.5
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2 0.17.5
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.29.7
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.29.8
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.33.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.32.6
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.33.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 0.16.4
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 0.15.3
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2 0.14.5
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 0.24.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 0.22.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2 0.20.9
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.33.5
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.34.5
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.27.8
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.34.3
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2 0.22.5
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2 0.14.9
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2 0.15.4
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2 0.23.9
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.26.5
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.28.5
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1 0.19.5
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.28.6
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.27.5
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.30.3
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.30.6
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.31.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0 0.25.5
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2 0.16.5
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.30.5
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.29.5
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.29.3
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.31.9
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.32.9
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1 0.12.9
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.32.8
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.31.8
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.33.8
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.32.7
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.33.7
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0 0.16.9
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2 0.10.9
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.31.7
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.28.7
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.30.7
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.39.8
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.37.6
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1 0.14.4
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.36.6
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.39.6
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.35.6
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.36.5
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.38.5
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0 0.17.4
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2 0.13.5
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.35.5
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.36.3
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.37.5
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.34.7
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.37.7
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1 0.21.9
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.35.7
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.36.8
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.36.7
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.37.9
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.39.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0 0.25.9
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2 0.19.9
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.38.9
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.35.9
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.37.8
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.29.6
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.31.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.30.9
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.27.7
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.38.6
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.39.5
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.38.7
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.36.9
INT:BUF.LONG.H0.0.SINGLE.V1 1.26.11
INT:BUF.LONG.H1.0.SINGLE.V2 1.30.11
INT:BUF.LONG.H2.0.SINGLE.V3 0.27.4
INT:BUF.LONG.H3.0.SINGLE.V4 0.27.6
INT:BUF.LONG.H4.0.SINGLE.V5 0.38.4
INT:BUF.LONG.H5.0.SINGLE.V6 0.40.6
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.32.4
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.38.8
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.34.6
INT:BUF.LONG.V3.0.SINGLE.H4 0.34.4
INT:BUF.LONG.V4.0.SINGLE.H5 0.31.6
INT:BUF.LONG.V5.0.SINGLE.H6 0.35.8
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1 0.20.7
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S 0.23.7
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S 0.23.4
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2 0.23.6
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E 0.26.4
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E 0.31.4
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2 0.37.4
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2 0.40.4
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 0.19.6
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1 0.15.5
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 0.16.7
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1 0.15.6
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 0.17.6
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1 0.13.4
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 0.17.7
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1 0.22.6
INT:PASS.SINGLE.H0.0.DEC.V0 0.18.5
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.24.4
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.22.4
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2 0.21.4
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.32.5
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.13.7
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1 0.21.7
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.40.9
INT:PASS.SINGLE.H3.0.DEC.V1 0.9.9
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.15.8
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.39.7
INT:PASS.SINGLE.H4.0.DEC.V2 0.10.5
INT:PASS.SINGLE.H4.0.LONG.V3 0.33.4
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.25.4
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.19.4
INT:PASS.SINGLE.H5.0.LONG.V4 0.27.3
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2 0.20.4
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.17.8
INT:PASS.SINGLE.H6.0.LONG.V5 0.34.9
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1 0.24.8
INT:PASS.SINGLE.H7.0.DEC.V3 0.17.9
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.25.8
INT:PASS.SINGLE.V0.0.GND 0.26.6
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2 0.28.4
INT:PASS.SINGLE.V1.0.LONG.H0 1.28.11
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2 0.29.4
INT:PASS.SINGLE.V2.0.LONG.H1 1.34.11
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E 0.30.4
INT:PASS.SINGLE.V3.0.LONG.H2 1.33.12
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.26.7
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2 0.39.3
INT:PASS.SINGLE.V5.0.LONG.H4 0.40.5
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2 0.36.4
INT:PASS.SINGLE.V6.0.LONG.H5 0.40.7
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E 0.39.4
INT:PASS.SINGLE.V7.0.GND 0.26.9
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E 0.38.3
IO0:IFF_CE_ENABLE 0.18.8
IO0:IFF_SRVAL 0.3.6
IO0:INV.IFF_CLK 0.2.6
IO0:INV.OFF_CLK 0.1.9
IO0:INV.OFF_D 0.3.7
IO0:INV.T 0.0.9
IO0:OFF_CE_ENABLE 0.18.9
IO0:OFF_SRVAL 0.1.7
IO0:READBACK_I1 0.0.8
IO0:READBACK_I2 0.2.8
IO0:READBACK_OFF 0.3.8
IO1:IFF_CE_ENABLE 0.18.7
IO1:IFF_SRVAL 0.9.3
IO1:INV.IFF_CLK 0.2.3
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.1.2
IO1:INV.T 0.1.0
IO1:OFF_CE_ENABLE 0.18.6
IO1:OFF_SRVAL 0.1.1
IO1:READBACK_I1 0.4.3
IO1:READBACK_I2 0.3.3
IO1:READBACK_OFF 0.2.2
PULLUP_TBUF0:ENABLE 1.25.12
PULLUP_TBUF1:ENABLE 0.14.7
TBUF0:DRIVE1 0.25.3
TBUF1:DRIVE1 0.13.3
inverted ~[0]
INT:MUX.IMUX.CLB.C1 0.28.3 0.28.2 0.30.1 0.29.0 0.29.1 0.30.2 0.29.2 0.30.0
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V1 0 0 0 1 0 1 1 1
0.DOUBLE.V0.0 0 0 1 0 1 0 1 1
0.DOUBLE.V0.1 0 0 1 0 1 1 0 1
0.SINGLE.V3 0 0 1 1 0 0 1 1
0.SINGLE.V7 0 0 1 1 0 1 0 1
0.LONG.V2 0 0 1 1 1 0 1 0
0.LONG.V3 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C3 0.36.0 0.36.1 0.37.1 0.37.0 0.36.2 0.37.2 0.37.3 0.38.1
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.GCLK2 0 0 0 1 1 1 1 0
0.SINGLE.V3 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 0 1
0.DOUBLE.V0.0 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 0 1
0.LONG.V3 0 0 1 1 1 0 1 0
0.LONG.V2 0 0 1 1 1 1 0 0
0.DOUBLE.V1.1 0 1 1 0 1 1 1 1
0.SINGLE.V1 0 1 1 1 0 1 1 1
0.DOUBLE.V1.0 1 0 0 1 1 1 1 1
0.SINGLE.V5 1 0 1 1 1 0 1 1
0.SINGLE.V6 1 0 1 1 1 1 0 1
0.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F1 0.31.2 0.33.0 0.32.1 0.31.0 0.32.3 0.31.1 0.32.0 0.32.2
0.SINGLE.V3 0 0 1 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.SINGLE.V7 0 0 1 0 1 1 1 0
0.SINGLE.V0 0 0 1 1 1 1 1 1
0.LONG.V3 0 1 0 0 0 1 1 1
0.DOUBLE.V1.0 0 1 0 0 1 0 1 1
0.LONG.V0 0 1 0 0 1 1 1 0
0.SINGLE.V1 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 0 1 0 1
0.LONG.V1 0 1 1 0 1 0 0 1
0.SINGLE.V6 0 1 1 0 1 1 0 0
0.DOUBLE.V1.1 0 1 1 1 1 1 0 1
0.DOUBLE.V0.1 1 1 1 0 0 1 1 1
0.SINGLE.V4 1 1 1 0 1 0 1 1
0.DOUBLE.V0.0 1 1 1 0 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F3 0.38.2 0.40.0 0.39.2 0.40.1 0.38.0 0.39.1 0.40.2 0.39.0 0.40.3
0.SINGLE.V0 0 0 0 0 1 1 1 1 1
0.DOUBLE.V0.0 0 0 0 1 1 1 0 1 1
0.LONG.V2 0 0 0 1 1 1 1 0 1
0.SINGLE.V3 0 0 1 1 1 1 1 1 1
0.DOUBLE.V1.1 0 1 0 0 0 1 1 1 1
0.LONG.V1 0 1 0 0 1 0 1 1 1
0.DOUBLE.V1.0 0 1 0 1 0 1 0 1 1
0.LONG.V5 0 1 0 1 0 1 1 0 1
0.SINGLE.V4 0 1 0 1 1 0 0 1 1
0.LONG.V4 0 1 0 1 1 0 1 0 1
0.GCLK0 0 1 0 1 1 1 1 1 0
0.SINGLE.V1 0 1 1 1 0 1 1 1 1
0.SINGLE.V2 0 1 1 1 1 0 1 1 1
0.SINGLE.V6 1 1 0 0 1 1 1 1 1
0.DOUBLE.V0.1 1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 1 0 1 1 1 1 0 1
0.SINGLE.V7 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G1 0.26.0 0.26.3 0.28.0 0.28.1 0.27.1 0.26.1 0.27.0 0.26.2
0.SINGLE.V0 0 0 0 0 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1
0.LONG.V4 0 0 1 0 1 0 1 1
0.LONG.V3 0 0 1 0 1 1 1 0
0.SINGLE.V1 0 0 1 1 0 0 1 1
0.DOUBLE.V0.1 0 0 1 1 0 1 1 0
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1
0.LONG.V0 0 0 1 1 1 1 0 0
0.SINGLE.V3 0 1 1 0 1 1 1 1
0.DOUBLE.V0.0 0 1 1 1 0 1 1 1
0.SINGLE.V7 0 1 1 1 1 1 0 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1
0.SINGLE.V5 1 0 1 1 1 1 1 0
0.SINGLE.V6 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G3 0.34.0 0.33.2 0.33.1 0.34.2 0.35.0 0.34.1 0.35.2 0.35.3 2.0.1 0.35.1
0.SINGLE.V0 0 0 0 0 1 1 1 1 1 1
0.SINGLE.V2 0 0 0 1 0 1 1 1 1 1
0.SINGLE.V4 0 0 0 1 1 1 0 1 1 1
0.LONG.V4 0 0 1 0 1 0 1 1 1 1
0.LONG.V2 0 0 1 0 1 1 1 0 1 1
0.SINGLE.V1 0 0 1 1 0 0 1 1 1 1
0.SINGLE.V6 0 0 1 1 0 1 1 0 1 1
0.DOUBLE.V1.0 0 0 1 1 1 0 0 1 1 1
0.LONG.V5 0 0 1 1 1 1 0 0 1 1
0.GCLK0 0 0 1 1 1 1 1 1 0 1
CIN 0 0 1 1 1 1 1 1 1 0
0.DOUBLE.V0.0 0 1 1 0 1 1 1 1 1 1
0.SINGLE.V5 0 1 1 1 0 1 1 1 1 1
0.DOUBLE.V0.1 0 1 1 1 1 1 0 1 1 1
0.DOUBLE.V1.1 1 0 0 1 1 1 1 1 1 1
0.LONG.V1 1 0 1 1 1 0 1 1 1 1
0.SINGLE.V7 1 0 1 1 1 1 1 0 1 1
0.SINGLE.V3 1 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.5.7 0.11.7 0.12.7 0.9.7 0.7.7 0.8.7 0.10.7 0.6.7
0.SINGLE.H3 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.5.8 0.7.8 0.5.9 0.7.9 0.6.9 0.6.8
0.DEC.V3 0 0 0 1 1 1
0.DOUBLE.H0.1 0 0 1 1 1 1
0.DEC.V2 0 1 0 0 1 1
0.DEC.V1 0 1 0 1 0 1
0.DEC.V0 0 1 0 1 1 0
0.LONG.H3 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 1
0.LONG.H5 0 1 1 1 1 0
0.DOUBLE.H1.0 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.7.6 0.16.6 0.8.5 0.13.6 0.10.6 0.11.6 0.14.6 0.9.6
0.SINGLE.H2 0 0 1 1 1 1 1 1
0.SINGLE.H3 0 1 0 1 1 1 1 1
0.SINGLE.H5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.18.4 0.19.2 0.19.3 0.21.2 0.20.3 0.23.3 0.20.2 0.24.3
0.LONG.IO.V3 0 0 1 1 0 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1 0 1
0.GCLK0 0 0 1 1 0 1 1 0
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1 0 0 1 1
0.LONG.IO.V2 0 1 0 1 0 1 0 1
0.DEC.V3 0 1 0 1 0 1 1 0
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
0.LONG.IO.V0 0 1 1 0 0 0 1 1
0.DEC.V2 0 1 1 0 0 1 0 1
0.IO.DOUBLE.1.E.1 0 1 1 0 1 1 1 1
GND 1 1 1 1 0 1 1 1
INT:MUX.IMUX.IOB1.IK 0.5.1 0.7.1 0.7.3 0.11.2 0.6.1 0.8.1 0.10.2 0.11.3
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H4 0 1 1 1 1 1 0 1
1.SINGLE.H5 0 1 1 1 1 1 1 0
1.SINGLE.H3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.6.0 0.5.0 0.9.1 0.7.0 0.8.0 0.9.0
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.DEC.V2 0 0 1 1 0 1
0.DEC.V3 0 0 1 1 1 0
1.DOUBLE.H1.1 0 1 0 1 1 1
0.LONG.H2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
0.DEC.V1 0 1 1 1 1 0
1.DOUBLE.H0.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.5.2 0.7.2 0.8.2 0.12.2 0.6.2 0.13.2 0.14.2 0.9.2
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.H2 0 1 1 1 1 0 1 1
1.SINGLE.H3 0 1 1 1 1 1 0 1
1.SINGLE.H4 0 1 1 1 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.16.3 0.23.2 0.17.3 0.14.3 0.25.2 0.16.2 0.15.2 0.18.2
0.LONG.IO.V1 0 0 1 0 0 1 1 1
0.LONG.IO.V3 0 0 1 0 1 0 1 1
0.GCLK0 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1 1 1
0.DEC.V2 0 1 0 0 0 1 1 1
0.LONG.IO.V0 0 1 0 0 1 0 1 1
0.IO.DOUBLE.0.E.2 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 1 0 0 1 1 1
0.LONG.IO.V2 1 1 1 0 1 0 1 1
0.DEC.V3 1 1 1 0 1 1 0 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.I 0.23.1 0.21.0 0.23.0 0.21.1 0.22.0 0.22.1
0.IO.DOUBLE.2.E.2 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V2 0 0 1 1 0 1
0.DEC.V1 0 0 1 1 1 0
0.IO.DOUBLE.2.E.1 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 0 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF0.TS 0.17.0 0.20.1 0.20.0 0.19.1 0.18.0 0.19.0
0.IO.DOUBLE.0.E.2 0 0 0 1 1 1
0.IO.DOUBLE.0.E.1 0 0 1 1 1 1
0.LONG.IO.V3 0 1 0 0 1 1
0.DEC.V3 0 1 0 1 0 1
VCC 0 1 0 1 1 0
0.LONG.IO.V2 0 1 1 0 1 1
0.DEC.V0 0 1 1 1 0 1
GND 0 1 1 1 1 0
0.IO.DOUBLE.1.E.2 1 1 0 1 1 1
0.IO.DOUBLE.1.E.1 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.I 0.12.0 0.12.1 0.14.1 0.14.0 0.13.0 0.13.1
0.IO.DOUBLE.2.E.1 0 0 0 1 1 1
0.OUT.LR.IOB0.I2 0 0 1 0 1 1
0.LONG.IO.V1 0 0 1 1 0 1
0.DEC.V2 0 0 1 1 1 0
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1
0.IO.DOUBLE.3.E.1 1 0 0 1 1 1
0.IO.DOUBLE.3.E.2 1 0 1 0 1 1
0.OUT.LR.IOB1.I2 1 0 1 1 1 0
GND 1 1 1 1 1 1
INT:MUX.IMUX.TBUF1.TS 0.15.1 0.15.0 0.18.1 0.16.0 0.16.1 0.17.1
0.IO.DOUBLE.1.E.1 0 0 0 1 1 1
0.LONG.IO.V2 0 0 1 0 1 1
0.DEC.V0 0 0 1 1 0 1
VCC 0 0 1 1 1 0
0.IO.DOUBLE.0.E.1 0 1 1 1 1 1
0.IO.DOUBLE.1.E.2 1 0 0 1 1 1
0.LONG.IO.V3 1 0 1 0 1 1
0.DEC.V3 1 0 1 1 0 1
GND 1 0 1 1 1 0
0.IO.DOUBLE.0.E.2 1 1 1 1 1 1
INT:MUX.IO.DBUF.V0 0.21.3 0.24.2 0.22.2 0.22.3
0.IO.DOUBLE.0.E.2 0 0 1 1
0.IO.DOUBLE.1.E.2 0 1 0 1
0.IO.DOUBLE.3.E.2 0 1 1 0
0.IO.DOUBLE.2.E.2 1 1 1 1
INT:MUX.IO.DBUF.V1 0.8.8 0.9.8 0.11.8 0.10.8
0.IO.DOUBLE.1.E.0 0 0 1 1
0.IO.DOUBLE.2.E.0 0 1 0 1
0.IO.DOUBLE.3.E.0 0 1 1 0
0.IO.DOUBLE.0.E.0 1 1 1 1
INT:MUX.LONG.H0 0.24.1 0.24.0 0.25.1 0.25.0
0.LONG.IO.V0 0 0 0 1
0.DEC.V3 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H1 0.10.1 0.10.0 0.11.0 0.11.1
0.LONG.IO.V1 0 0 0 1
0.DEC.V2 0 0 1 0
0.OUT.LR.IOB1.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H4 0.24.6 0.22.7 0.24.7 0.25.6
0.LONG.IO.V2 0 0 0 1
0.DEC.V1 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.H5 0.15.7 0.19.7 0.21.6 0.20.6
0.LONG.IO.V3 0 0 0 1
0.DEC.V0 0 0 1 0
0.OUT.LR.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.5 0.24.5
0.LONG.H0 0 0
0.SINGLE.H1 0 1
NONE 1 1
INT:MUX.LONG.IO.V1 0.12.8 0.8.9 0.13.8 0.14.8
0.LONG.H1 0 0 0 1
0.LONG.H3 0 0 1 0
0.SINGLE.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.20.8 0.21.8 0.23.8 0.22.8
0.LONG.H2 0 0 0 1
0.LONG.H4 0 0 1 0
0.SINGLE.H5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.19.8 0.16.8
0.LONG.H5 0 0
0.SINGLE.H6 0 1
NONE 1 1
IO0:I1MUX 0.1.5 0.3.5 0.2.5
IO0:I2MUX 0.0.6 0.1.6 0.0.5
IO1:I1MUX 0.0.4 0.3.4 0.2.4
IO1:I2MUX 0.0.3 0.1.3 0.1.4
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.4.6
IO1:IFF_D 0.4.2
DELAY 0
I 1
IO0:MUX.OFF_D 0.0.7
IO1:MUX.OFF_D 0.0.2
O 0
CE 1
IO0:OMUX 0.1.8 0.3.9 0.4.9 0.4.8
IO1:OMUX 0.3.1 0.3.0 0.4.0 0.4.1
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.8.6 0.2.7
IO1:PULL 0.0.1 0.2.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.2.9
IO1:SLEW 0.0.0
FAST 0
SLOW 1

Tile IO.B

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.B switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_GNDpass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_GNDpass transistor
TCELL0_LONG.V5pass transistor
TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.2.S.0mux
TCELL0_IO.DOUBLE.3.S.0mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.S.2mux
TCELL0_IO.DOUBLE.1.S.2mux
TCELL0_IO.DOUBLE.2.S.2mux
TCELL0_IO.DOUBLE.3.S.2mux
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.CLB.F2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.G2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.C2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.F4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.G4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.C4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL2_DOUBLE.V0.1mux
TCELL2_DOUBLE.V1.0mux
TCELL2_LONG.V0mux
TCELL2_LONG.V1mux
TCELL2_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.B bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F4
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.B bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G4
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.B bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.B bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C4
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.B bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.B bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F4IO0.O
TCELL0:IMUX.CLB.G4IO1.O
TCELL0:IMUX.CLB.C4DEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2

Bitstream

xc4000e IO.B bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND - ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BUF.LONG.H5.0.SINGLE.V6 - - ~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.GND INT:MUX.IMUX.CLB.F2[3] INT:MUX.IMUX.CLB.F2[7] INT:MUX.IMUX.CLB.F4[1] INT:MUX.IMUX.CLB.F4[2] INT:MUX.IMUX.CLB.C4[3] INT:MUX.IMUX.CLB.C4[1] INT:MUX.IMUX.CLB.G4[7] INT:MUX.IMUX.CLB.G4[6] INT:MUX.IMUX.CLB.G2[0] INT:MUX.IMUX.CLB.G2[3] INT:MUX.IMUX.CLB.C2[4] INT:MUX.IMUX.CLB.C2[2]
11 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - - - - - - - - - INT:MUX.IMUX.CLB.F2[2] INT:MUX.IMUX.CLB.F2[4] INT:MUX.IMUX.CLB.F4[0] INT:MUX.IMUX.CLB.F4[6] INT:MUX.IMUX.CLB.C4[6] INT:MUX.IMUX.CLB.C4[2] INT:MUX.IMUX.CLB.G4[5] INT:MUX.IMUX.CLB.G4[1] INT:MUX.IMUX.CLB.G2[1] INT:MUX.IMUX.CLB.G2[5] INT:MUX.IMUX.CLB.G2[4] INT:MUX.IMUX.CLB.C2[0] INT:MUX.IMUX.CLB.C2[3]
10 ~INT:PASS.SINGLE.V6.0.LONG.H5 - ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - - - - - ~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S ~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S ~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S INT:MUX.IMUX.CLB.F2[1] ~INT:PASS.SINGLE.H3.0.GND INT:MUX.IMUX.CLB.F2[6] INT:MUX.IMUX.CLB.F4[7] INT:MUX.IMUX.CLB.F4[4] INT:MUX.IMUX.CLB.C4[7] INT:MUX.IMUX.CLB.C4[5] INT:MUX.IMUX.CLB.G4[2] INT:MUX.IMUX.CLB.G4[3] INT:MUX.IMUX.CLB.G2[6] INT:MUX.IMUX.CLB.G2[8] INT:MUX.IMUX.CLB.C2[5] INT:MUX.IMUX.CLB.C2[7]
9 - ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 - ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E - ~INT:PASS.SINGLE.V0.0.GND ~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 ~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 ~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 - ~INT:PASS.SINGLE.H6.0.GND INT:MUX.IMUX.CLB.F2[0] INT:MUX.IMUX.CLB.F2[5] INT:MUX.IMUX.CLB.F4[3] - INT:MUX.IMUX.CLB.F4[5] INT:MUX.IMUX.CLB.C4[0] INT:MUX.IMUX.CLB.C4[4] INT:MUX.IMUX.CLB.G4[0] INT:MUX.IMUX.CLB.G4[4] INT:MUX.IMUX.CLB.G2[2] INT:MUX.IMUX.CLB.G2[7] INT:MUX.IMUX.CLB.C2[1] INT:MUX.IMUX.CLB.C2[6]
8 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 - - - - - - ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:BUF.LONG.V4.0.SINGLE.H5 - - ~INT:BUF.LONG.V3.0.SINGLE.H4 - ~INT:PASS.SINGLE.H0.0.GND - - - - - - -
7 - - - - ~INT:BIPASS.SINGLE.H5.SINGLE.V5 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 - ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:PASS.SINGLE.H5.0.LONG.V4 - - - - - - - - - - - - - - - - - - - - - - -
6 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
5 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H3.0.SINGLE.V4 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
4 ~INT:PASS.SINGLE.V4.0.DEC.H1 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H0 ~INT:PASS.SINGLE.V3.0.DEC.H2 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H3 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1 ~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2 ~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
1 ~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2 ~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
0 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
DEC0:O1_N 0.14.4
DEC0:O2_N 0.9.4
DEC0:O3_N 0.3.4
DEC0:O4_N 0.8.4
DEC1:O1_N 0.12.3
DEC1:O2_N 0.11.3
DEC1:O3_N 0.5.3
DEC1:O4_N 0.6.3
DEC2:O1_P 0.13.3
DEC2:O2_P 0.10.3
DEC2:O3_P 0.4.3
DEC2:O4_P 0.7.3
IO0:OFF_USED 0.24.0
IO1:OFF_USED 0.10.0
non-inverted [0]
DEC0:O1_P 0.14.3
DEC0:O2_P 0.9.3
DEC0:O3_P 0.3.3
DEC0:O4_P 0.8.3
DEC1:O1_P 0.12.4
DEC1:O2_P 0.11.4
DEC1:O3_P 0.5.4
DEC1:O4_P 0.6.4
DEC2:O1_N 0.13.4
DEC2:O2_N 0.10.4
DEC2:O3_N 0.4.4
DEC2:O4_N 0.7.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.24.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.22.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.23.12
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.24.10
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.24.11
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.28.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.27.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.28.7
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.28.8
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.29.8
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.22.11
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 0.26.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 0.27.1
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 0.21.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 0.20.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 0.25.2
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.29.7
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 0.28.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 0.29.2
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 0.30.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 0.31.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 0.31.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 0.33.2
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 0.23.2
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 0.25.1
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 0.32.3
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.8
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.23.8
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.23.9
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.22.8
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.25.9
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.26.8
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.25.8
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.24.8
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.24.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.26.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.27.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.27.11
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.28.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.27.10
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.28.10
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.26.10
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.23.10
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.25.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.34.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.32.9
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.31.9
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.34.9
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.30.9
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.31.8
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.33.8
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.30.8
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.31.7
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.32.8
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.29.10
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.32.10
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.30.10
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.31.11
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.31.10
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.32.12
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.34.12
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.33.12
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.30.12
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.32.11
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0 0.22.2
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2 0.24.2
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.24.9
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1 0.19.2
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.26.7
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0 0.27.2
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2 0.26.1
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.25.12
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1 0.25.3
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.22.10
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0 0.30.2
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2 0.29.1
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.33.9
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1 0.28.2
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.34.8
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0 0.32.1
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2 0.32.2
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.33.10
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1 0.31.3
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.31.12
INT:BUF.LONG.H3.0.SINGLE.V4 0.24.5
INT:BUF.LONG.H4.0.SINGLE.V5 0.14.8
INT:BUF.LONG.H5.0.SINGLE.V6 0.18.12
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.13.8
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.33.11
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.19.12
INT:BUF.LONG.V3.0.SINGLE.H4 0.9.8
INT:BUF.LONG.V4.0.SINGLE.H5 0.12.8
INT:BUF.LONG.V5.0.SINGLE.H6 0.30.11
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S 0.13.10
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S 0.15.12
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 0.20.9
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 0.16.9
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.6
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.6
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 0.10.2
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 0.35.2
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 0.9.2
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 0.34.2
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 0.9.1
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 0.34.1
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 0.10.1
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 0.35.1
INT:PASS.SINGLE.H0.0.GND 0.7.8
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 0.19.9
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 0.15.9
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.27.8
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S 0.14.10
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.35.12
INT:PASS.SINGLE.H3.0.GND 0.11.10
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S 0.13.12
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.29.9
INT:PASS.SINGLE.H4.0.LONG.V3 0.30.7
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 0.18.9
INT:PASS.SINGLE.H5.0.LONG.V4 0.23.7
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 0.17.9
INT:PASS.SINGLE.H6.0.GND 0.13.9
INT:PASS.SINGLE.H6.0.LONG.V5 0.29.12
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S 0.15.10
INT:PASS.SINGLE.H7.0.GND 0.12.12
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S 0.14.12
INT:PASS.SINGLE.V0.0.DEC.H3 0.19.4
INT:PASS.SINGLE.V0.0.GND 0.21.9
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.5
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.4
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.6
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.4
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.4
INT:PASS.SINGLE.V3.0.DEC.H2 0.30.4
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.4
INT:PASS.SINGLE.V4.0.DEC.H1 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.21.10
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.6
INT:PASS.SINGLE.V5.0.LONG.H4 0.35.8
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.4
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.6
INT:PASS.SINGLE.V6.0.LONG.H5 0.35.10
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.4
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.5
INT:PASS.SINGLE.V7.0.DEC.H0 0.31.4
INT:PASS.SINGLE.V7.0.GND 0.21.12
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.4
IO0:IFF_CE_ENABLE 0.19.1
IO0:IFF_SRVAL 0.23.0
IO0:INV.IFF_CLK 0.22.0
IO0:INV.OFF_CLK 0.32.0
IO0:INV.OFF_D 0.25.0
IO0:INV.T 0.34.0
IO0:OFF_CE_ENABLE 0.30.0
IO0:OFF_SRVAL 0.24.1
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.2
IO0:READBACK_OFF 0.14.2
IO1:IFF_CE_ENABLE 0.13.2
IO1:IFF_SRVAL 0.12.0
IO1:INV.IFF_CLK 0.13.0
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.9.0
IO1:INV.T 0.0.0
IO1:OFF_CE_ENABLE 0.12.2
IO1:OFF_SRVAL 0.11.1
IO1:READBACK_I1 0.16.2
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.2
inverted ~[0]
INT:MUX.IMUX.CLB.C2 0.0.10 0.0.9 0.1.10 0.1.12 0.0.11 0.0.12 0.1.9 0.1.11
0.LONG.H4 0 0 0 0 1 1 1 1
0.SINGLE.H5 0 0 0 1 1 1 0 1
0.LONG.H3 0 0 0 1 1 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0
1.LONG.H1 0 1 0 1 1 0 0 1
0.SINGLE.H6 0 1 0 1 1 0 1 0
0.DOUBLE.H0.1 0 1 1 1 0 1 1 1
1.LONG.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1
0.SINGLE.H4 1 1 0 1 1 1 0 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0
0.SINGLE.H1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C4 0.7.10 0.8.11 0.6.10 0.6.9 0.7.12 0.7.11 0.6.12 0.7.9
0.SINGLE.H1 0 0 0 0 1 1 1 1
0.DOUBLE.H0.0 0 0 0 1 1 0 1 1
0.SINGLE.H6 0 0 0 1 1 1 0 1
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.LONG.H4 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.DOUBLE.H0.1 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 0 0 1 1 1 1
0.SINGLE.H7 1 1 0 1 1 0 1 1
1.LONG.H2 1 1 0 1 1 1 0 1
0.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F2 0.10.12 0.10.10 0.11.9 0.11.11 0.11.12 0.12.11 0.12.10 0.12.9
0.SINGLE.H5 0 0 1 1 0 0 1 1
0.LONG.H5 0 0 1 1 0 1 0 1
0.DOUBLE.H1.1 0 0 1 1 0 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 0 0 1 1
0.DOUBLE.H1.0 0 1 0 1 0 1 0 1
0.LONG.H4 0 1 0 1 0 1 1 0
0.SINGLE.H1 0 1 0 1 1 1 1 1
0.SINGLE.H6 0 1 1 0 0 0 1 1
1.LONG.H2 0 1 1 0 0 1 0 1
1.LONG.H0 0 1 1 0 0 1 1 0
0.SINGLE.H3 0 1 1 0 1 1 1 1
0.DOUBLE.H0.0 1 1 1 1 0 0 1 1
0.SINGLE.H7 1 1 1 1 0 1 0 1
0.DOUBLE.H0.1 1 1 1 1 0 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F4 0.9.10 0.9.11 0.8.9 0.8.10 0.10.9 0.8.12 0.9.12 0.10.11
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.DOUBLE.H0.1 0 0 0 1 1 0 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1
0.LONG.H5 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.SINGLE.H7 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 1 0 0 1 1 1 1
0.DOUBLE.H0.0 1 1 0 1 1 0 1 1
0.SINGLE.H6 1 1 0 1 1 1 0 1
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G2 0.2.10 0.2.9 0.3.10 0.3.11 0.2.11 0.2.12 0.3.9 0.4.11 0.3.12
0.LONG.H4 0 0 0 0 1 1 1 1 1
0.SINGLE.H4 0 0 0 1 1 1 0 1 1
0.LONG.H5 0 0 0 1 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0 1
1.LONG.H2 0 1 0 1 1 0 0 1 1
0.SINGLE.H6 0 1 0 1 1 0 1 0 1
COUT0 0 1 0 1 1 1 1 1 0
1.LONG.H0 0 1 1 1 0 1 1 1 1
0.DOUBLE.H0.1 0 1 1 1 1 0 1 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1 1
0.SINGLE.H5 1 1 0 1 1 1 0 1 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0 1
0.SINGLE.H0 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G4 0.5.12 0.4.12 0.6.11 0.4.9 0.4.10 0.5.10 0.5.11 0.5.9
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.SINGLE.H1 0 0 0 1 0 1 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.DOUBLE.H1.1 0 0 1 0 1 0 1 1
0.LONG.H3 0 0 1 0 1 1 1 0
0.LONG.H5 0 0 1 1 0 0 1 1
0.DOUBLE.H1.0 0 0 1 1 0 1 1 0
0.SINGLE.H3 0 0 1 1 1 0 0 1
0.SINGLE.H6 0 0 1 1 1 1 0 0
0.DOUBLE.H0.1 0 1 0 1 1 1 1 1
0.SINGLE.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H0.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 0 1 0 1 1 1 1
0.SINGLE.H4 1 0 1 1 0 1 1 1
1.LONG.H1 1 0 1 1 1 1 0 1
0.SINGLE.H7 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.18.5 0.19.5 0.20.5 0.21.5 0.19.6 0.18.6 0.20.6 0.21.6
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.4 0.26.3 0.28.4 0.27.3 0.28.3 0.27.4
0.DEC.H2 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H0 0 1 0 0 1 1
0.DEC.H3 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H1 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.5 0.29.6 0.28.6 0.27.6 0.24.6 0.23.6 0.25.6 0.26.6
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.2 0.6.2 0.6.1 0.3.2 0.4.2 0.5.1 0.4.1 0.6.0
0.LONG.IO.H3 0 0 1 0 0 1 1 1
0.LONG.IO.H0 0 0 1 0 1 0 1 1
0.LONG.IO.H2 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 1 1 1 1 1
0.DEC.H1 0 1 0 0 1 0 1 1
0.GCLK0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.S.0 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.S.1 1 1 1 0 0 1 1 1
0.LONG.IO.H1 1 1 1 0 1 0 1 1
0.DEC.H0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.S.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.5 0.16.6 0.17.6 0.15.6 0.14.6 0.17.5 0.16.5 0.15.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V4 0 1 1 1 1 1 1 0
2.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.4 0.2.4 0.2.3 0.1.4 0.1.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H2 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
2.LONG.V2 0 0 1 1 1 0
2.LONG.V1 0 1 0 1 1 1
0.DEC.H1 0 1 1 0 1 1
2.LONG.V0 0 1 1 1 0 1
2.DOUBLE.V0.1 0 1 1 1 1 0
2.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.5 0.12.6 0.13.6 0.11.6 0.10.6 0.13.5 0.12.5 0.11.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V5 0 1 1 1 1 1 1 0
2.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.1 0.2.1 0.1.2 0.2.2 0.3.1 0.1.1 0.0.2 0.11.2
0.LONG.IO.H0 0 0 0 0 1 1 1 1
0.GCLK0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.S.0 0 0 1 1 1 1 1 1
0.LONG.IO.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H2 0 1 0 0 1 1 0 1
0.DEC.H0 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H1 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.S.0 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.S.1 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.S.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.2 0.8.2 0.7.1 0.8.1
0.IO.DOUBLE.0.S.0 0 0 1 1
0.IO.DOUBLE.2.S.0 0 1 0 1
0.IO.DOUBLE.3.S.0 0 1 1 0
0.IO.DOUBLE.1.S.0 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.1
0.IO.DOUBLE.1.S.2 0 0 1 1
0.IO.DOUBLE.2.S.2 0 1 0 1
0.IO.DOUBLE.3.S.2 0 1 1 0
0.IO.DOUBLE.0.S.2 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.6 0.16.4
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.4 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.4 0.21.4 0.22.4
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.5 0.23.4
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.5 0.27.5 0.29.5 0.28.5
0.LONG.IO.H0 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.5 0.33.5 0.34.6 0.34.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.5 0.30.5 0.32.5 0.33.6
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.5 0.6.6 0.7.6 0.7.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.5 0.1.6 0.2.6 0.2.5
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.5 0.8.6 0.9.5 0.9.6
0.LONG.IO.H3 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.0 0.18.1 0.19.0
IO0:I2MUX 0.20.0 0.20.1 0.21.0
IO1:I1MUX 0.15.1 0.16.1 0.16.0
IO1:I2MUX 0.14.0 0.14.1 0.15.0
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.1
IO1:IFF_D 0.11.0
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.0
IO1:MUX.OFF_D 0.8.0
O 0
CE 1
IO0:OMUX 0.27.0 0.29.0 0.31.0 0.28.0
IO1:OMUX 0.3.0 0.7.0 0.5.0 0.4.0
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.1 0.23.1
IO1:PULL 0.13.1 0.12.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.0
IO1:SLEW 0.1.0
FAST 0
SLOW 1

Tile IO.B.R

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.B.R switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_GNDpass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_GNDpass transistor
TCELL0_LONG.V5pass transistor
TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.2.S.0mux
TCELL0_IO.DOUBLE.3.S.0mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.S.2mux
TCELL0_IO.DOUBLE.1.S.2mux
TCELL0_IO.DOUBLE.2.S.2mux
TCELL0_IO.DOUBLE.3.S.2mux
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.CLB.F2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.G2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.C2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.F4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.G4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.C4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL2_DOUBLE.V0.1mux
TCELL2_DOUBLE.V1.0mux
TCELL2_LONG.V0mux
TCELL2_LONG.V1mux
TCELL2_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.B.R bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F4
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.B.R bel IO1
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G4
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.B.R bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.B.R bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C4
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.B.R bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.B.R bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F4IO0.O
TCELL0:IMUX.CLB.G4IO1.O
TCELL0:IMUX.CLB.C4DEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO1.CLKIN

Bitstream

xc4000e IO.B.R bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND - ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BUF.LONG.H5.0.SINGLE.V6 - - ~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.GND INT:MUX.IMUX.CLB.F2[3] INT:MUX.IMUX.CLB.F2[7] INT:MUX.IMUX.CLB.F4[1] INT:MUX.IMUX.CLB.F4[2] INT:MUX.IMUX.CLB.C4[3] INT:MUX.IMUX.CLB.C4[1] INT:MUX.IMUX.CLB.G4[7] INT:MUX.IMUX.CLB.G4[6] INT:MUX.IMUX.CLB.G2[0] INT:MUX.IMUX.CLB.G2[3] INT:MUX.IMUX.CLB.C2[4] INT:MUX.IMUX.CLB.C2[2]
11 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - - - - - - - - - INT:MUX.IMUX.CLB.F2[2] INT:MUX.IMUX.CLB.F2[4] INT:MUX.IMUX.CLB.F4[0] INT:MUX.IMUX.CLB.F4[6] INT:MUX.IMUX.CLB.C4[6] INT:MUX.IMUX.CLB.C4[2] INT:MUX.IMUX.CLB.G4[5] INT:MUX.IMUX.CLB.G4[1] INT:MUX.IMUX.CLB.G2[1] INT:MUX.IMUX.CLB.G2[5] INT:MUX.IMUX.CLB.G2[4] INT:MUX.IMUX.CLB.C2[0] INT:MUX.IMUX.CLB.C2[3]
10 ~INT:PASS.SINGLE.V6.0.LONG.H5 - ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - - - - - ~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S ~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S ~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S INT:MUX.IMUX.CLB.F2[1] ~INT:PASS.SINGLE.H3.0.GND INT:MUX.IMUX.CLB.F2[6] INT:MUX.IMUX.CLB.F4[7] INT:MUX.IMUX.CLB.F4[4] INT:MUX.IMUX.CLB.C4[7] INT:MUX.IMUX.CLB.C4[5] INT:MUX.IMUX.CLB.G4[2] INT:MUX.IMUX.CLB.G4[3] INT:MUX.IMUX.CLB.G2[6] INT:MUX.IMUX.CLB.G2[8] INT:MUX.IMUX.CLB.C2[5] INT:MUX.IMUX.CLB.C2[7]
9 - ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 - ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E - ~INT:PASS.SINGLE.V0.0.GND ~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 ~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 ~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 - ~INT:PASS.SINGLE.H6.0.GND INT:MUX.IMUX.CLB.F2[0] INT:MUX.IMUX.CLB.F2[5] INT:MUX.IMUX.CLB.F4[3] - INT:MUX.IMUX.CLB.F4[5] INT:MUX.IMUX.CLB.C4[0] INT:MUX.IMUX.CLB.C4[4] INT:MUX.IMUX.CLB.G4[0] INT:MUX.IMUX.CLB.G4[4] INT:MUX.IMUX.CLB.G2[2] INT:MUX.IMUX.CLB.G2[7] INT:MUX.IMUX.CLB.C2[1] INT:MUX.IMUX.CLB.C2[6]
8 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 - - - - - - ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:BUF.LONG.V4.0.SINGLE.H5 - - ~INT:BUF.LONG.V3.0.SINGLE.H4 - ~INT:PASS.SINGLE.H0.0.GND - - - - - - -
7 - - - - ~INT:BIPASS.SINGLE.H5.SINGLE.V5 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 - ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:PASS.SINGLE.H5.0.LONG.V4 - - - - - - - - - - - - - - - - - - - - - - -
6 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
5 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H3.0.SINGLE.V4 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
4 ~INT:PASS.SINGLE.V4.0.DEC.H1 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H0 ~INT:PASS.SINGLE.V3.0.DEC.H2 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H3 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1 ~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2 ~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
1 ~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2 ~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
0 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
DEC0:O1_N 0.14.4
DEC0:O2_N 0.9.4
DEC0:O3_N 0.3.4
DEC0:O4_N 0.8.4
DEC1:O1_N 0.12.3
DEC1:O2_N 0.11.3
DEC1:O3_N 0.5.3
DEC1:O4_N 0.6.3
DEC2:O1_P 0.13.3
DEC2:O2_P 0.10.3
DEC2:O3_P 0.4.3
DEC2:O4_P 0.7.3
IO0:OFF_USED 0.24.0
IO1:OFF_USED 0.10.0
non-inverted [0]
DEC0:O1_P 0.14.3
DEC0:O2_P 0.9.3
DEC0:O3_P 0.3.3
DEC0:O4_P 0.8.3
DEC1:O1_P 0.12.4
DEC1:O2_P 0.11.4
DEC1:O3_P 0.5.4
DEC1:O4_P 0.6.4
DEC2:O1_N 0.13.4
DEC2:O2_N 0.10.4
DEC2:O3_N 0.4.4
DEC2:O4_N 0.7.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.24.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.22.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.23.12
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.24.10
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.24.11
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.28.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.27.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.28.7
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.28.8
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.29.8
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.22.11
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 0.26.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 0.27.1
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 0.21.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 0.20.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 0.25.2
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.29.7
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 0.28.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 0.29.2
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 0.30.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 0.31.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 0.31.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 0.33.2
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 0.23.2
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 0.25.1
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 0.32.3
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.8
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.23.8
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.23.9
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.22.8
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.25.9
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.26.8
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.25.8
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.24.8
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.24.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.26.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.27.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.27.11
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.28.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.27.10
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.28.10
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.26.10
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.23.10
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.25.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.34.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.32.9
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.31.9
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.34.9
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.30.9
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.31.8
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.33.8
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.30.8
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.31.7
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.32.8
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.29.10
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.32.10
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.30.10
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.31.11
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.31.10
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.32.12
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.34.12
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.33.12
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.30.12
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.32.11
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0 0.22.2
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2 0.24.2
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.24.9
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1 0.19.2
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.26.7
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0 0.27.2
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2 0.26.1
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.25.12
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1 0.25.3
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.22.10
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0 0.30.2
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2 0.29.1
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.33.9
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1 0.28.2
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.34.8
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0 0.32.1
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2 0.32.2
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.33.10
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1 0.31.3
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.31.12
INT:BUF.LONG.H3.0.SINGLE.V4 0.24.5
INT:BUF.LONG.H4.0.SINGLE.V5 0.14.8
INT:BUF.LONG.H5.0.SINGLE.V6 0.18.12
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.13.8
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.33.11
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.19.12
INT:BUF.LONG.V3.0.SINGLE.H4 0.9.8
INT:BUF.LONG.V4.0.SINGLE.H5 0.12.8
INT:BUF.LONG.V5.0.SINGLE.H6 0.30.11
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S 0.13.10
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S 0.15.12
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 0.20.9
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 0.16.9
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.6
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.6
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 0.10.2
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 0.35.2
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 0.9.2
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 0.34.2
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 0.9.1
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 0.34.1
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 0.10.1
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 0.35.1
INT:PASS.SINGLE.H0.0.GND 0.7.8
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 0.19.9
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 0.15.9
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.27.8
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S 0.14.10
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.35.12
INT:PASS.SINGLE.H3.0.GND 0.11.10
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S 0.13.12
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.29.9
INT:PASS.SINGLE.H4.0.LONG.V3 0.30.7
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 0.18.9
INT:PASS.SINGLE.H5.0.LONG.V4 0.23.7
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 0.17.9
INT:PASS.SINGLE.H6.0.GND 0.13.9
INT:PASS.SINGLE.H6.0.LONG.V5 0.29.12
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S 0.15.10
INT:PASS.SINGLE.H7.0.GND 0.12.12
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S 0.14.12
INT:PASS.SINGLE.V0.0.DEC.H3 0.19.4
INT:PASS.SINGLE.V0.0.GND 0.21.9
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.5
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.4
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.6
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.4
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.4
INT:PASS.SINGLE.V3.0.DEC.H2 0.30.4
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.4
INT:PASS.SINGLE.V4.0.DEC.H1 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.21.10
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.6
INT:PASS.SINGLE.V5.0.LONG.H4 0.35.8
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.4
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.6
INT:PASS.SINGLE.V6.0.LONG.H5 0.35.10
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.4
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.5
INT:PASS.SINGLE.V7.0.DEC.H0 0.31.4
INT:PASS.SINGLE.V7.0.GND 0.21.12
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.4
IO0:IFF_CE_ENABLE 0.19.1
IO0:IFF_SRVAL 0.23.0
IO0:INV.IFF_CLK 0.22.0
IO0:INV.OFF_CLK 0.32.0
IO0:INV.OFF_D 0.25.0
IO0:INV.T 0.34.0
IO0:OFF_CE_ENABLE 0.30.0
IO0:OFF_SRVAL 0.24.1
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.2
IO0:READBACK_OFF 0.14.2
IO1:IFF_CE_ENABLE 0.13.2
IO1:IFF_SRVAL 0.12.0
IO1:INV.IFF_CLK 0.13.0
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.9.0
IO1:INV.T 0.0.0
IO1:OFF_CE_ENABLE 0.12.2
IO1:OFF_SRVAL 0.11.1
IO1:READBACK_I1 0.16.2
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.2
inverted ~[0]
INT:MUX.IMUX.CLB.C2 0.0.10 0.0.9 0.1.10 0.1.12 0.0.11 0.0.12 0.1.9 0.1.11
0.LONG.H4 0 0 0 0 1 1 1 1
0.SINGLE.H5 0 0 0 1 1 1 0 1
0.LONG.H3 0 0 0 1 1 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0
1.LONG.H1 0 1 0 1 1 0 0 1
0.SINGLE.H6 0 1 0 1 1 0 1 0
0.DOUBLE.H0.1 0 1 1 1 0 1 1 1
1.LONG.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1
0.SINGLE.H4 1 1 0 1 1 1 0 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0
0.SINGLE.H1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C4 0.7.10 0.8.11 0.6.10 0.6.9 0.7.12 0.7.11 0.6.12 0.7.9
0.SINGLE.H1 0 0 0 0 1 1 1 1
0.DOUBLE.H0.0 0 0 0 1 1 0 1 1
0.SINGLE.H6 0 0 0 1 1 1 0 1
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.LONG.H4 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.DOUBLE.H0.1 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 0 0 1 1 1 1
0.SINGLE.H7 1 1 0 1 1 0 1 1
1.LONG.H2 1 1 0 1 1 1 0 1
0.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F2 0.10.12 0.10.10 0.11.9 0.11.11 0.11.12 0.12.11 0.12.10 0.12.9
0.SINGLE.H5 0 0 1 1 0 0 1 1
0.LONG.H5 0 0 1 1 0 1 0 1
0.DOUBLE.H1.1 0 0 1 1 0 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 0 0 1 1
0.DOUBLE.H1.0 0 1 0 1 0 1 0 1
0.LONG.H4 0 1 0 1 0 1 1 0
0.SINGLE.H1 0 1 0 1 1 1 1 1
0.SINGLE.H6 0 1 1 0 0 0 1 1
1.LONG.H2 0 1 1 0 0 1 0 1
1.LONG.H0 0 1 1 0 0 1 1 0
0.SINGLE.H3 0 1 1 0 1 1 1 1
0.DOUBLE.H0.0 1 1 1 1 0 0 1 1
0.SINGLE.H7 1 1 1 1 0 1 0 1
0.DOUBLE.H0.1 1 1 1 1 0 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F4 0.9.10 0.9.11 0.8.9 0.8.10 0.10.9 0.8.12 0.9.12 0.10.11
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.DOUBLE.H0.1 0 0 0 1 1 0 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1
0.LONG.H5 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.SINGLE.H7 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 1 0 0 1 1 1 1
0.DOUBLE.H0.0 1 1 0 1 1 0 1 1
0.SINGLE.H6 1 1 0 1 1 1 0 1
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G2 0.2.10 0.2.9 0.3.10 0.3.11 0.2.11 0.2.12 0.3.9 0.4.11 0.3.12
0.LONG.H4 0 0 0 0 1 1 1 1 1
0.SINGLE.H4 0 0 0 1 1 1 0 1 1
0.LONG.H5 0 0 0 1 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0 1
1.LONG.H2 0 1 0 1 1 0 0 1 1
0.SINGLE.H6 0 1 0 1 1 0 1 0 1
COUT0 0 1 0 1 1 1 1 1 0
1.LONG.H0 0 1 1 1 0 1 1 1 1
0.DOUBLE.H0.1 0 1 1 1 1 0 1 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1 1
0.SINGLE.H5 1 1 0 1 1 1 0 1 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0 1
0.SINGLE.H0 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G4 0.5.12 0.4.12 0.6.11 0.4.9 0.4.10 0.5.10 0.5.11 0.5.9
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.SINGLE.H1 0 0 0 1 0 1 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.DOUBLE.H1.1 0 0 1 0 1 0 1 1
0.LONG.H3 0 0 1 0 1 1 1 0
0.LONG.H5 0 0 1 1 0 0 1 1
0.DOUBLE.H1.0 0 0 1 1 0 1 1 0
0.SINGLE.H3 0 0 1 1 1 0 0 1
0.SINGLE.H6 0 0 1 1 1 1 0 0
0.DOUBLE.H0.1 0 1 0 1 1 1 1 1
0.SINGLE.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H0.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 0 1 0 1 1 1 1
0.SINGLE.H4 1 0 1 1 0 1 1 1
1.LONG.H1 1 0 1 1 1 1 0 1
0.SINGLE.H7 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.18.5 0.19.5 0.20.5 0.21.5 0.19.6 0.18.6 0.20.6 0.21.6
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.4 0.26.3 0.28.4 0.27.3 0.28.3 0.27.4
0.DEC.H2 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H0 0 1 0 0 1 1
0.DEC.H3 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H1 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.5 0.29.6 0.28.6 0.27.6 0.24.6 0.23.6 0.25.6 0.26.6
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.2 0.6.2 0.6.1 0.3.2 0.4.2 0.5.1 0.4.1 0.6.0
0.LONG.IO.H3 0 0 1 0 0 1 1 1
0.LONG.IO.H0 0 0 1 0 1 0 1 1
0.LONG.IO.H2 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 1 1 1 1 1
0.DEC.H1 0 1 0 0 1 0 1 1
0.GCLK0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.S.0 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.S.1 1 1 1 0 0 1 1 1
0.LONG.IO.H1 1 1 1 0 1 0 1 1
0.DEC.H0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.S.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.5 0.16.6 0.17.6 0.15.6 0.14.6 0.17.5 0.16.5 0.15.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V4 0 1 1 1 1 1 1 0
2.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.4 0.2.4 0.2.3 0.1.4 0.1.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H2 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
2.LONG.V2 0 0 1 1 1 0
2.LONG.V1 0 1 0 1 1 1
0.DEC.H1 0 1 1 0 1 1
2.LONG.V0 0 1 1 1 0 1
2.DOUBLE.V0.1 0 1 1 1 1 0
2.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.5 0.12.6 0.13.6 0.11.6 0.10.6 0.13.5 0.12.5 0.11.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V5 0 1 1 1 1 1 1 0
2.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.1 0.2.1 0.1.2 0.2.2 0.3.1 0.1.1 0.0.2 0.11.2
0.LONG.IO.H0 0 0 0 0 1 1 1 1
0.GCLK0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.S.0 0 0 1 1 1 1 1 1
0.LONG.IO.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H2 0 1 0 0 1 1 0 1
0.DEC.H0 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H1 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.S.0 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.S.1 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.S.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.2 0.8.2 0.7.1 0.8.1
0.IO.DOUBLE.0.S.0 0 0 1 1
0.IO.DOUBLE.2.S.0 0 1 0 1
0.IO.DOUBLE.3.S.0 0 1 1 0
0.IO.DOUBLE.1.S.0 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.1
0.IO.DOUBLE.1.S.2 0 0 1 1
0.IO.DOUBLE.2.S.2 0 1 0 1
0.IO.DOUBLE.3.S.2 0 1 1 0
0.IO.DOUBLE.0.S.2 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.6 0.16.4
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.4 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.4 0.21.4 0.22.4
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.5 0.23.4
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.5 0.27.5 0.29.5 0.28.5
0.LONG.IO.H0 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.5 0.33.5 0.34.6 0.34.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.5 0.30.5 0.32.5 0.33.6
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.5 0.6.6 0.7.6 0.7.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.5 0.1.6 0.2.6 0.2.5
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.5 0.8.6 0.9.5 0.9.6
0.LONG.IO.H3 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.0 0.18.1 0.19.0
IO0:I2MUX 0.20.0 0.20.1 0.21.0
IO1:I1MUX 0.15.1 0.16.1 0.16.0
IO1:I2MUX 0.14.0 0.14.1 0.15.0
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.1
IO1:IFF_D 0.11.0
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.0
IO1:MUX.OFF_D 0.8.0
O 0
CE 1
IO0:OMUX 0.27.0 0.29.0 0.31.0 0.28.0
IO1:OMUX 0.3.0 0.7.0 0.5.0 0.4.0
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.1 0.23.1
IO1:PULL 0.13.1 0.12.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.0
IO1:SLEW 0.1.0
FAST 0
SLOW 1

Tile IO.BS

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.BS switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_GNDpass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_GNDpass transistor
TCELL0_LONG.V5pass transistor
TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.2.S.0mux
TCELL0_IO.DOUBLE.3.S.0mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.S.2mux
TCELL0_IO.DOUBLE.1.S.2mux
TCELL0_IO.DOUBLE.2.S.2mux
TCELL0_IO.DOUBLE.3.S.2mux
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.CLB.F2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.G2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.C2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.F4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.G4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.C4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL2_DOUBLE.V0.1mux
TCELL2_DOUBLE.V1.0mux
TCELL2_LONG.V0mux
TCELL2_LONG.V1mux
TCELL2_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.BS bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F4
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.BS bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G4
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.BS bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.BS bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C4
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.BS bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.BS bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F4IO0.O
TCELL0:IMUX.CLB.G4IO1.O
TCELL0:IMUX.CLB.C4DEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2

Bitstream

xc4000e IO.BS bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND - ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BUF.LONG.H5.0.SINGLE.V6 - - ~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.GND INT:MUX.IMUX.CLB.F2[3] INT:MUX.IMUX.CLB.F2[7] INT:MUX.IMUX.CLB.F4[1] INT:MUX.IMUX.CLB.F4[2] INT:MUX.IMUX.CLB.C4[3] INT:MUX.IMUX.CLB.C4[1] INT:MUX.IMUX.CLB.G4[7] INT:MUX.IMUX.CLB.G4[6] INT:MUX.IMUX.CLB.G2[0] INT:MUX.IMUX.CLB.G2[3] INT:MUX.IMUX.CLB.C2[4] INT:MUX.IMUX.CLB.C2[2]
11 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - - - - - - - - - INT:MUX.IMUX.CLB.F2[2] INT:MUX.IMUX.CLB.F2[4] INT:MUX.IMUX.CLB.F4[0] INT:MUX.IMUX.CLB.F4[6] INT:MUX.IMUX.CLB.C4[6] INT:MUX.IMUX.CLB.C4[2] INT:MUX.IMUX.CLB.G4[5] INT:MUX.IMUX.CLB.G4[1] INT:MUX.IMUX.CLB.G2[1] INT:MUX.IMUX.CLB.G2[5] INT:MUX.IMUX.CLB.G2[4] INT:MUX.IMUX.CLB.C2[0] INT:MUX.IMUX.CLB.C2[3]
10 ~INT:PASS.SINGLE.V6.0.LONG.H5 - ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - - - - - ~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S ~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S ~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S INT:MUX.IMUX.CLB.F2[1] ~INT:PASS.SINGLE.H3.0.GND INT:MUX.IMUX.CLB.F2[6] INT:MUX.IMUX.CLB.F4[7] INT:MUX.IMUX.CLB.F4[4] INT:MUX.IMUX.CLB.C4[7] INT:MUX.IMUX.CLB.C4[5] INT:MUX.IMUX.CLB.G4[2] INT:MUX.IMUX.CLB.G4[3] INT:MUX.IMUX.CLB.G2[6] INT:MUX.IMUX.CLB.G2[8] INT:MUX.IMUX.CLB.C2[5] INT:MUX.IMUX.CLB.C2[7]
9 - ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 - ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E - ~INT:PASS.SINGLE.V0.0.GND ~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 ~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 ~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 - ~INT:PASS.SINGLE.H6.0.GND INT:MUX.IMUX.CLB.F2[0] INT:MUX.IMUX.CLB.F2[5] INT:MUX.IMUX.CLB.F4[3] - INT:MUX.IMUX.CLB.F4[5] INT:MUX.IMUX.CLB.C4[0] INT:MUX.IMUX.CLB.C4[4] INT:MUX.IMUX.CLB.G4[0] INT:MUX.IMUX.CLB.G4[4] INT:MUX.IMUX.CLB.G2[2] INT:MUX.IMUX.CLB.G2[7] INT:MUX.IMUX.CLB.C2[1] INT:MUX.IMUX.CLB.C2[6]
8 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 - - - - - - ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:BUF.LONG.V4.0.SINGLE.H5 - - ~INT:BUF.LONG.V3.0.SINGLE.H4 - ~INT:PASS.SINGLE.H0.0.GND - - - - - - -
7 - - - - ~INT:BIPASS.SINGLE.H5.SINGLE.V5 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 - ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:PASS.SINGLE.H5.0.LONG.V4 - - - - - - - - - - - - - - - - - - - - - - -
6 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
5 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H3.0.SINGLE.V4 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
4 ~INT:PASS.SINGLE.V4.0.DEC.H1 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H0 ~INT:PASS.SINGLE.V3.0.DEC.H2 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H3 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 ~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 ~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
1 ~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 ~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
0 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
DEC0:O1_N 0.14.4
DEC0:O2_N 0.9.4
DEC0:O3_N 0.3.4
DEC0:O4_N 0.8.4
DEC1:O1_N 0.12.3
DEC1:O2_N 0.11.3
DEC1:O3_N 0.5.3
DEC1:O4_N 0.6.3
DEC2:O1_P 0.13.3
DEC2:O2_P 0.10.3
DEC2:O3_P 0.4.3
DEC2:O4_P 0.7.3
IO0:OFF_USED 0.24.0
IO1:OFF_USED 0.10.0
non-inverted [0]
DEC0:O1_P 0.14.3
DEC0:O2_P 0.9.3
DEC0:O3_P 0.3.3
DEC0:O4_P 0.8.3
DEC1:O1_P 0.12.4
DEC1:O2_P 0.11.4
DEC1:O3_P 0.5.4
DEC1:O4_P 0.6.4
DEC2:O1_N 0.13.4
DEC2:O2_N 0.10.4
DEC2:O3_N 0.4.4
DEC2:O4_N 0.7.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.24.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.22.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.23.12
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.24.10
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.24.11
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.28.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.27.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.28.7
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.28.8
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.29.8
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.22.11
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 0.26.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 0.27.1
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 0.21.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 0.20.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 0.25.2
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.29.7
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 0.28.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 0.29.2
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 0.30.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 0.31.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 0.31.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 0.33.2
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 0.23.2
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 0.25.1
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 0.32.3
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.8
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.23.8
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.23.9
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.22.8
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.25.9
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.26.8
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.25.8
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.24.8
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.24.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.26.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.27.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.27.11
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.28.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.27.10
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.28.10
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.26.10
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.23.10
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.25.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.34.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.32.9
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.31.9
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.34.9
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.30.9
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.31.8
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.33.8
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.30.8
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.31.7
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.32.8
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.29.10
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.32.10
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.30.10
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.31.11
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.31.10
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.32.12
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.34.12
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.33.12
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.30.12
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.32.11
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 0.19.2
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.24.9
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0 0.22.2
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 0.24.2
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.26.7
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 0.25.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.25.12
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0 0.27.2
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 0.26.1
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.22.10
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 0.28.2
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.33.9
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0 0.30.2
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 0.29.1
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.34.8
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 0.31.3
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.33.10
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0 0.32.1
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 0.32.2
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.31.12
INT:BUF.LONG.H3.0.SINGLE.V4 0.24.5
INT:BUF.LONG.H4.0.SINGLE.V5 0.14.8
INT:BUF.LONG.H5.0.SINGLE.V6 0.18.12
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.13.8
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.33.11
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.19.12
INT:BUF.LONG.V3.0.SINGLE.H4 0.9.8
INT:BUF.LONG.V4.0.SINGLE.H5 0.12.8
INT:BUF.LONG.V5.0.SINGLE.H6 0.30.11
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S 0.13.10
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S 0.15.12
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 0.20.9
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 0.16.9
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.6
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.6
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 0.10.2
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 0.35.2
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 0.9.2
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 0.34.2
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 0.9.1
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 0.34.1
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 0.10.1
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 0.35.1
INT:PASS.SINGLE.H0.0.GND 0.7.8
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 0.19.9
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 0.15.9
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.27.8
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S 0.14.10
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.35.12
INT:PASS.SINGLE.H3.0.GND 0.11.10
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S 0.13.12
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.29.9
INT:PASS.SINGLE.H4.0.LONG.V3 0.30.7
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 0.18.9
INT:PASS.SINGLE.H5.0.LONG.V4 0.23.7
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 0.17.9
INT:PASS.SINGLE.H6.0.GND 0.13.9
INT:PASS.SINGLE.H6.0.LONG.V5 0.29.12
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S 0.15.10
INT:PASS.SINGLE.H7.0.GND 0.12.12
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S 0.14.12
INT:PASS.SINGLE.V0.0.DEC.H3 0.19.4
INT:PASS.SINGLE.V0.0.GND 0.21.9
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.5
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.4
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.6
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.4
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.4
INT:PASS.SINGLE.V3.0.DEC.H2 0.30.4
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.4
INT:PASS.SINGLE.V4.0.DEC.H1 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.21.10
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.6
INT:PASS.SINGLE.V5.0.LONG.H4 0.35.8
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.4
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.6
INT:PASS.SINGLE.V6.0.LONG.H5 0.35.10
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.4
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.5
INT:PASS.SINGLE.V7.0.DEC.H0 0.31.4
INT:PASS.SINGLE.V7.0.GND 0.21.12
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.4
IO0:IFF_CE_ENABLE 0.19.1
IO0:IFF_SRVAL 0.23.0
IO0:INV.IFF_CLK 0.22.0
IO0:INV.OFF_CLK 0.32.0
IO0:INV.OFF_D 0.25.0
IO0:INV.T 0.34.0
IO0:OFF_CE_ENABLE 0.30.0
IO0:OFF_SRVAL 0.24.1
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.2
IO0:READBACK_OFF 0.14.2
IO1:IFF_CE_ENABLE 0.13.2
IO1:IFF_SRVAL 0.12.0
IO1:INV.IFF_CLK 0.13.0
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.9.0
IO1:INV.T 0.0.0
IO1:OFF_CE_ENABLE 0.12.2
IO1:OFF_SRVAL 0.11.1
IO1:READBACK_I1 0.16.2
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.2
inverted ~[0]
INT:MUX.IMUX.CLB.C2 0.0.10 0.0.9 0.1.10 0.1.12 0.0.11 0.0.12 0.1.9 0.1.11
0.LONG.H4 0 0 0 0 1 1 1 1
0.SINGLE.H5 0 0 0 1 1 1 0 1
0.LONG.H3 0 0 0 1 1 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0
1.LONG.H1 0 1 0 1 1 0 0 1
0.SINGLE.H6 0 1 0 1 1 0 1 0
0.DOUBLE.H0.1 0 1 1 1 0 1 1 1
1.LONG.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1
0.SINGLE.H4 1 1 0 1 1 1 0 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0
0.SINGLE.H1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C4 0.7.10 0.8.11 0.6.10 0.6.9 0.7.12 0.7.11 0.6.12 0.7.9
0.SINGLE.H1 0 0 0 0 1 1 1 1
0.DOUBLE.H0.0 0 0 0 1 1 0 1 1
0.SINGLE.H6 0 0 0 1 1 1 0 1
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.LONG.H4 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.DOUBLE.H0.1 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 0 0 1 1 1 1
0.SINGLE.H7 1 1 0 1 1 0 1 1
1.LONG.H2 1 1 0 1 1 1 0 1
0.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F2 0.10.12 0.10.10 0.11.9 0.11.11 0.11.12 0.12.11 0.12.10 0.12.9
0.SINGLE.H5 0 0 1 1 0 0 1 1
0.LONG.H5 0 0 1 1 0 1 0 1
0.DOUBLE.H1.1 0 0 1 1 0 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 0 0 1 1
0.DOUBLE.H1.0 0 1 0 1 0 1 0 1
0.LONG.H4 0 1 0 1 0 1 1 0
0.SINGLE.H1 0 1 0 1 1 1 1 1
0.SINGLE.H6 0 1 1 0 0 0 1 1
1.LONG.H2 0 1 1 0 0 1 0 1
1.LONG.H0 0 1 1 0 0 1 1 0
0.SINGLE.H3 0 1 1 0 1 1 1 1
0.DOUBLE.H0.0 1 1 1 1 0 0 1 1
0.SINGLE.H7 1 1 1 1 0 1 0 1
0.DOUBLE.H0.1 1 1 1 1 0 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F4 0.9.10 0.9.11 0.8.9 0.8.10 0.10.9 0.8.12 0.9.12 0.10.11
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.DOUBLE.H0.1 0 0 0 1 1 0 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1
0.LONG.H5 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.SINGLE.H7 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 1 0 0 1 1 1 1
0.DOUBLE.H0.0 1 1 0 1 1 0 1 1
0.SINGLE.H6 1 1 0 1 1 1 0 1
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G2 0.2.10 0.2.9 0.3.10 0.3.11 0.2.11 0.2.12 0.3.9 0.4.11 0.3.12
0.LONG.H4 0 0 0 0 1 1 1 1 1
0.SINGLE.H4 0 0 0 1 1 1 0 1 1
0.LONG.H5 0 0 0 1 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0 1
1.LONG.H2 0 1 0 1 1 0 0 1 1
0.SINGLE.H6 0 1 0 1 1 0 1 0 1
COUT0 0 1 0 1 1 1 1 1 0
1.LONG.H0 0 1 1 1 0 1 1 1 1
0.DOUBLE.H0.1 0 1 1 1 1 0 1 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1 1
0.SINGLE.H5 1 1 0 1 1 1 0 1 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0 1
0.SINGLE.H0 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G4 0.5.12 0.4.12 0.6.11 0.4.9 0.4.10 0.5.10 0.5.11 0.5.9
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.SINGLE.H1 0 0 0 1 0 1 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.DOUBLE.H1.1 0 0 1 0 1 0 1 1
0.LONG.H3 0 0 1 0 1 1 1 0
0.LONG.H5 0 0 1 1 0 0 1 1
0.DOUBLE.H1.0 0 0 1 1 0 1 1 0
0.SINGLE.H3 0 0 1 1 1 0 0 1
0.SINGLE.H6 0 0 1 1 1 1 0 0
0.DOUBLE.H0.1 0 1 0 1 1 1 1 1
0.SINGLE.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H0.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 0 1 0 1 1 1 1
0.SINGLE.H4 1 0 1 1 0 1 1 1
1.LONG.H1 1 0 1 1 1 1 0 1
0.SINGLE.H7 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.18.5 0.19.5 0.20.5 0.21.5 0.19.6 0.18.6 0.20.6 0.21.6
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.4 0.26.3 0.28.4 0.27.3 0.28.3 0.27.4
0.DEC.H2 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H0 0 1 0 0 1 1
0.DEC.H3 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H1 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.5 0.29.6 0.28.6 0.27.6 0.24.6 0.23.6 0.25.6 0.26.6
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.2 0.6.2 0.6.1 0.3.2 0.4.2 0.5.1 0.4.1 0.6.0
0.LONG.IO.H3 0 0 1 0 0 1 1 1
0.LONG.IO.H0 0 0 1 0 1 0 1 1
0.LONG.IO.H2 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 1 1 1 1 1
0.DEC.H1 0 1 0 0 1 0 1 1
0.GCLK0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.S.0 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.S.1 1 1 1 0 0 1 1 1
0.LONG.IO.H1 1 1 1 0 1 0 1 1
0.DEC.H0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.S.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.5 0.16.6 0.17.6 0.15.6 0.14.6 0.17.5 0.16.5 0.15.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V4 0 1 1 1 1 1 1 0
2.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.4 0.2.4 0.2.3 0.1.4 0.1.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H2 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
2.LONG.V2 0 0 1 1 1 0
2.LONG.V1 0 1 0 1 1 1
0.DEC.H1 0 1 1 0 1 1
2.LONG.V0 0 1 1 1 0 1
2.DOUBLE.V0.1 0 1 1 1 1 0
2.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.5 0.12.6 0.13.6 0.11.6 0.10.6 0.13.5 0.12.5 0.11.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V5 0 1 1 1 1 1 1 0
2.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.1 0.2.1 0.1.2 0.2.2 0.3.1 0.1.1 0.0.2 0.11.2
0.LONG.IO.H0 0 0 0 0 1 1 1 1
0.GCLK0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.S.0 0 0 1 1 1 1 1 1
0.LONG.IO.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H2 0 1 0 0 1 1 0 1
0.DEC.H0 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H1 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.S.0 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.S.1 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.S.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.2 0.8.2 0.7.1 0.8.1
0.IO.DOUBLE.0.S.0 0 0 1 1
0.IO.DOUBLE.2.S.0 0 1 0 1
0.IO.DOUBLE.3.S.0 0 1 1 0
0.IO.DOUBLE.1.S.0 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.1
0.IO.DOUBLE.1.S.2 0 0 1 1
0.IO.DOUBLE.2.S.2 0 1 0 1
0.IO.DOUBLE.3.S.2 0 1 1 0
0.IO.DOUBLE.0.S.2 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.6 0.16.4
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.4 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.4 0.21.4 0.22.4
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.5 0.23.4
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.5 0.27.5 0.29.5 0.28.5
0.LONG.IO.H0 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.5 0.33.5 0.34.6 0.34.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.5 0.30.5 0.32.5 0.33.6
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.5 0.6.6 0.7.6 0.7.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.5 0.1.6 0.2.6 0.2.5
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.5 0.8.6 0.9.5 0.9.6
0.LONG.IO.H3 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.0 0.18.1 0.19.0
IO0:I2MUX 0.20.0 0.20.1 0.21.0
IO1:I1MUX 0.15.1 0.16.1 0.16.0
IO1:I2MUX 0.14.0 0.14.1 0.15.0
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.1
IO1:IFF_D 0.11.0
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.0
IO1:MUX.OFF_D 0.8.0
O 0
CE 1
IO0:OMUX 0.27.0 0.29.0 0.31.0 0.28.0
IO1:OMUX 0.3.0 0.7.0 0.5.0 0.4.0
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.1 0.23.1
IO1:PULL 0.13.1 0.12.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.0
IO1:SLEW 0.1.0
FAST 0
SLOW 1

Tile IO.BS.L

Cells: 4

Bel INT

Switchbox INT

xc4000e IO.BS.L switchbox INT
DestinationSourceKind
TCELL0_SINGLE.H0TCELL0_GNDpass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H0.ETCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_SINGLE.H1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H1.ETCELL0_LONG.V0pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_SINGLE.H2TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H2.ETCELL0_LONG.V1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_SINGLE.H3TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H3.ETCELL0_LONG.V2pass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_SINGLE.H4TCELL0_LONG.V3pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H4.ETCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_SINGLE.H5TCELL0_LONG.V4pass transistor
TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H5.ETCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_SINGLE.H6TCELL0_GNDpass transistor
TCELL0_LONG.V5pass transistor
TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H6.ETCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_SINGLE.H7TCELL0_GNDpass transistor
TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.H7.ETCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_SINGLE.V0TCELL0_GNDpass transistor
TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_SINGLE.V0.STCELL0_SINGLE.H0bidirectional pass transistor
TCELL0_SINGLE.H0.Ebidirectional pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_SINGLE.V1.STCELL0_SINGLE.H1bidirectional pass transistor
TCELL0_SINGLE.H1.Ebidirectional pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_SINGLE.V2.STCELL0_SINGLE.H2bidirectional pass transistor
TCELL0_SINGLE.H2.Ebidirectional pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_SINGLE.V3.STCELL0_SINGLE.H3bidirectional pass transistor
TCELL0_SINGLE.H3.Ebidirectional pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_LONG.H3pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_SINGLE.V4.STCELL0_SINGLE.H4bidirectional pass transistor
TCELL0_SINGLE.H4.Ebidirectional pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.H4pass transistor
TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_SINGLE.V5.STCELL0_SINGLE.H5bidirectional pass transistor
TCELL0_SINGLE.H5.Ebidirectional pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.H5pass transistor
TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_SINGLE.V6.STCELL0_SINGLE.H6bidirectional pass transistor
TCELL0_SINGLE.H6.Ebidirectional pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_GNDpass transistor
TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7.Sbidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_SINGLE.V7.STCELL0_SINGLE.H7bidirectional pass transistor
TCELL0_SINGLE.H7.Ebidirectional pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.H0.0TCELL0_OUT.CLB.FXQ.Spass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H0.1TCELL0_OUT.CLB.FX.Spass transistor
TCELL0_DOUBLE.H0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_DOUBLE.H1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.H1.1TCELL0_OUT.BT.IOB1.I2pass transistor
TCELL0_DOUBLE.H1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_DOUBLE.V0.2TCELL0_DOUBLE.H0.0bidirectional pass transistor
TCELL0_DOUBLE.H0.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_DOUBLE.V1.2TCELL0_DOUBLE.H1.0bidirectional pass transistor
TCELL0_DOUBLE.H1.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.1TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.1TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.1TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.S.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.1TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.2TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.S.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.2.S.0mux
TCELL0_IO.DOUBLE.3.S.0mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.S.2mux
TCELL0_IO.DOUBLE.1.S.2mux
TCELL0_IO.DOUBLE.2.S.2mux
TCELL0_IO.DOUBLE.3.S.2mux
TCELL0_LONG.H3TCELL0_SINGLE.V4buffer
TCELL0_LONG.H4TCELL0_SINGLE.V5buffer
TCELL0_LONG.H5TCELL0_SINGLE.V6buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H1.Ebuffer
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H2.Ebuffer
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_SINGLE.H3.Ebuffer
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H4buffer
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H5buffer
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_SINGLE.H6buffer
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.CLB.F2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.G2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H4mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.C2TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.CLB.F4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.G4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H5mux
TCELL1_LONG.H0mux
TCELL1_LONG.H1mux
TCELL0_IMUX.CLB.C4TCELL0_SINGLE.H0mux
TCELL0_SINGLE.H1mux
TCELL0_SINGLE.H2mux
TCELL0_SINGLE.H3mux
TCELL0_SINGLE.H4mux
TCELL0_SINGLE.H5mux
TCELL0_SINGLE.H6mux
TCELL0_SINGLE.H7mux
TCELL0_DOUBLE.H0.0mux
TCELL0_DOUBLE.H0.1mux
TCELL0_DOUBLE.H1.0mux
TCELL0_DOUBLE.H1.1mux
TCELL0_LONG.H3mux
TCELL0_LONG.H4mux
TCELL1_LONG.H1mux
TCELL1_LONG.H2mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL2_DOUBLE.V0.1mux
TCELL2_DOUBLE.V1.0mux
TCELL2_LONG.V0mux
TCELL2_LONG.V1mux
TCELL2_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL2_SINGLE.V2mux
TCELL2_SINGLE.V3mux
TCELL2_SINGLE.V4mux
TCELL2_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.S.0mux
TCELL0_IO.DOUBLE.0.S.1mux
TCELL0_IO.DOUBLE.1.S.0mux
TCELL0_IO.DOUBLE.1.S.1mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.BS.L bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F4
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.BS.L bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G4
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.BS.L bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.BS.L bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C4
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.BS.L bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.BS.L bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F4IO0.O
TCELL0:IMUX.CLB.G4IO1.O
TCELL0:IMUX.CLB.C4DEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.BS.L bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND - ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BUF.LONG.H5.0.SINGLE.V6 - - ~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S ~INT:PASS.SINGLE.H7.0.GND INT:MUX.IMUX.CLB.F2[3] INT:MUX.IMUX.CLB.F2[7] INT:MUX.IMUX.CLB.F4[1] INT:MUX.IMUX.CLB.F4[2] INT:MUX.IMUX.CLB.C4[3] INT:MUX.IMUX.CLB.C4[1] INT:MUX.IMUX.CLB.G4[7] INT:MUX.IMUX.CLB.G4[6] INT:MUX.IMUX.CLB.G2[0] INT:MUX.IMUX.CLB.G2[3] INT:MUX.IMUX.CLB.C2[4] INT:MUX.IMUX.CLB.C2[2]
11 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - - - - - - - - - INT:MUX.IMUX.CLB.F2[2] INT:MUX.IMUX.CLB.F2[4] INT:MUX.IMUX.CLB.F4[0] INT:MUX.IMUX.CLB.F4[6] INT:MUX.IMUX.CLB.C4[6] INT:MUX.IMUX.CLB.C4[2] INT:MUX.IMUX.CLB.G4[5] INT:MUX.IMUX.CLB.G4[1] INT:MUX.IMUX.CLB.G2[1] INT:MUX.IMUX.CLB.G2[5] INT:MUX.IMUX.CLB.G2[4] INT:MUX.IMUX.CLB.C2[0] INT:MUX.IMUX.CLB.C2[3]
10 ~INT:PASS.SINGLE.V6.0.LONG.H5 - ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - - - - - ~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S ~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S ~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S INT:MUX.IMUX.CLB.F2[1] ~INT:PASS.SINGLE.H3.0.GND INT:MUX.IMUX.CLB.F2[6] INT:MUX.IMUX.CLB.F4[7] INT:MUX.IMUX.CLB.F4[4] INT:MUX.IMUX.CLB.C4[7] INT:MUX.IMUX.CLB.C4[5] INT:MUX.IMUX.CLB.G4[2] INT:MUX.IMUX.CLB.G4[3] INT:MUX.IMUX.CLB.G2[6] INT:MUX.IMUX.CLB.G2[8] INT:MUX.IMUX.CLB.C2[5] INT:MUX.IMUX.CLB.C2[7]
9 - ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 - ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E - ~INT:PASS.SINGLE.V0.0.GND ~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 ~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 ~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 ~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 - ~INT:PASS.SINGLE.H6.0.GND INT:MUX.IMUX.CLB.F2[0] INT:MUX.IMUX.CLB.F2[5] INT:MUX.IMUX.CLB.F4[3] - INT:MUX.IMUX.CLB.F4[5] INT:MUX.IMUX.CLB.C4[0] INT:MUX.IMUX.CLB.C4[4] INT:MUX.IMUX.CLB.G4[0] INT:MUX.IMUX.CLB.G4[4] INT:MUX.IMUX.CLB.G2[2] INT:MUX.IMUX.CLB.G2[7] INT:MUX.IMUX.CLB.C2[1] INT:MUX.IMUX.CLB.C2[6]
8 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 - - - - - - ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:BUF.LONG.V4.0.SINGLE.H5 - - ~INT:BUF.LONG.V3.0.SINGLE.H4 - ~INT:PASS.SINGLE.H0.0.GND - - - - - - -
7 - - - - ~INT:BIPASS.SINGLE.H5.SINGLE.V5 ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 - ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:PASS.SINGLE.H5.0.LONG.V4 - - - - - - - - - - - - - - - - - - - - - - -
6 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
5 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H3.0.SINGLE.V4 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
4 ~INT:PASS.SINGLE.V4.0.DEC.H1 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H0 ~INT:PASS.SINGLE.V3.0.DEC.H2 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H3 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 ~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 ~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
1 ~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 ~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
0 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
DEC0:O1_N 0.14.4
DEC0:O2_N 0.9.4
DEC0:O3_N 0.3.4
DEC0:O4_N 0.8.4
DEC1:O1_N 0.12.3
DEC1:O2_N 0.11.3
DEC1:O3_N 0.5.3
DEC1:O4_N 0.6.3
DEC2:O1_P 0.13.3
DEC2:O2_P 0.10.3
DEC2:O3_P 0.4.3
DEC2:O4_P 0.7.3
IO0:OFF_USED 0.24.0
IO1:OFF_USED 0.10.0
non-inverted [0]
DEC0:O1_P 0.14.3
DEC0:O2_P 0.9.3
DEC0:O3_P 0.3.3
DEC0:O4_P 0.8.3
DEC1:O1_P 0.12.4
DEC1:O2_P 0.11.4
DEC1:O3_P 0.5.4
DEC1:O4_P 0.6.4
DEC2:O1_N 0.13.4
DEC2:O2_N 0.10.4
DEC2:O3_N 0.4.4
DEC2:O4_N 0.7.4
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.24.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.22.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.23.12
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.24.10
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.24.11
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.28.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.27.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.28.7
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.28.8
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.29.8
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.22.11
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0 0.26.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 0.27.1
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0 0.21.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 0.20.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 0.25.2
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.29.7
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0 0.28.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 0.29.2
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 0.30.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0 0.31.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 0.31.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 0.33.2
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2 0.23.2
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2 0.25.1
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2 0.32.3
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.21.8
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.23.8
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.23.9
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.22.8
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.25.7
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.25.9
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.26.8
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.25.8
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.24.8
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.24.7
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.26.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.27.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.27.11
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.26.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.28.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.27.10
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.28.10
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.26.10
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.23.10
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.25.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.34.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.32.9
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.31.9
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.34.9
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.30.9
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.31.8
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.33.8
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.30.8
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.31.7
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.32.8
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.29.10
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.32.10
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.30.10
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.31.11
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.31.10
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.32.12
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.34.12
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.33.12
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.30.12
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.32.11
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 0.19.2
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.24.9
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0 0.22.2
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 0.24.2
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.26.7
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 0.25.3
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.25.12
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0 0.27.2
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 0.26.1
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.22.10
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 0.28.2
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.33.9
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0 0.30.2
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 0.29.1
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.34.8
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 0.31.3
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.33.10
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0 0.32.1
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 0.32.2
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.31.12
INT:BUF.LONG.H3.0.SINGLE.V4 0.24.5
INT:BUF.LONG.H4.0.SINGLE.V5 0.14.8
INT:BUF.LONG.H5.0.SINGLE.V6 0.18.12
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.13.8
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.33.11
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.19.12
INT:BUF.LONG.V3.0.SINGLE.H4 0.9.8
INT:BUF.LONG.V4.0.SINGLE.H5 0.12.8
INT:BUF.LONG.V5.0.SINGLE.H6 0.30.11
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S 0.13.10
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S 0.15.12
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2 0.20.9
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2 0.16.9
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.6
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.6
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1 0.10.2
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 0.35.2
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1 0.9.2
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 0.34.2
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1 0.9.1
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 0.34.1
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1 0.10.1
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 0.35.1
INT:PASS.SINGLE.H0.0.GND 0.7.8
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2 0.19.9
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2 0.15.9
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.27.8
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S 0.14.10
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.35.12
INT:PASS.SINGLE.H3.0.GND 0.11.10
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S 0.13.12
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.29.9
INT:PASS.SINGLE.H4.0.LONG.V3 0.30.7
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2 0.18.9
INT:PASS.SINGLE.H5.0.LONG.V4 0.23.7
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2 0.17.9
INT:PASS.SINGLE.H6.0.GND 0.13.9
INT:PASS.SINGLE.H6.0.LONG.V5 0.29.12
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S 0.15.10
INT:PASS.SINGLE.H7.0.GND 0.12.12
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S 0.14.12
INT:PASS.SINGLE.V0.0.DEC.H3 0.19.4
INT:PASS.SINGLE.V0.0.GND 0.21.9
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.5
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.4
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.6
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.4
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.4
INT:PASS.SINGLE.V3.0.DEC.H2 0.30.4
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.4
INT:PASS.SINGLE.V4.0.DEC.H1 0.35.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.21.10
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.6
INT:PASS.SINGLE.V5.0.LONG.H4 0.35.8
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.4
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.6
INT:PASS.SINGLE.V6.0.LONG.H5 0.35.10
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.4
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.5
INT:PASS.SINGLE.V7.0.DEC.H0 0.31.4
INT:PASS.SINGLE.V7.0.GND 0.21.12
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.4
IO0:IFF_CE_ENABLE 0.19.1
IO0:IFF_SRVAL 0.23.0
IO0:INV.IFF_CLK 0.22.0
IO0:INV.OFF_CLK 0.32.0
IO0:INV.OFF_D 0.25.0
IO0:INV.T 0.34.0
IO0:OFF_CE_ENABLE 0.30.0
IO0:OFF_SRVAL 0.24.1
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.2
IO0:READBACK_OFF 0.14.2
IO1:IFF_CE_ENABLE 0.13.2
IO1:IFF_SRVAL 0.12.0
IO1:INV.IFF_CLK 0.13.0
IO1:INV.OFF_CLK 0.2.0
IO1:INV.OFF_D 0.9.0
IO1:INV.T 0.0.0
IO1:OFF_CE_ENABLE 0.12.2
IO1:OFF_SRVAL 0.11.1
IO1:READBACK_I1 0.16.2
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.2
inverted ~[0]
INT:MUX.IMUX.CLB.C2 0.0.10 0.0.9 0.1.10 0.1.12 0.0.11 0.0.12 0.1.9 0.1.11
0.LONG.H4 0 0 0 0 1 1 1 1
0.SINGLE.H5 0 0 0 1 1 1 0 1
0.LONG.H3 0 0 0 1 1 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0
1.LONG.H1 0 1 0 1 1 0 0 1
0.SINGLE.H6 0 1 0 1 1 0 1 0
0.DOUBLE.H0.1 0 1 1 1 0 1 1 1
1.LONG.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1
0.SINGLE.H4 1 1 0 1 1 1 0 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0
0.SINGLE.H1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.C4 0.7.10 0.8.11 0.6.10 0.6.9 0.7.12 0.7.11 0.6.12 0.7.9
0.SINGLE.H1 0 0 0 0 1 1 1 1
0.DOUBLE.H0.0 0 0 0 1 1 0 1 1
0.SINGLE.H6 0 0 0 1 1 1 0 1
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.LONG.H4 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.DOUBLE.H0.1 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H4 1 1 0 0 1 1 1 1
0.SINGLE.H7 1 1 0 1 1 0 1 1
1.LONG.H2 1 1 0 1 1 1 0 1
0.SINGLE.H5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F2 0.10.12 0.10.10 0.11.9 0.11.11 0.11.12 0.12.11 0.12.10 0.12.9
0.SINGLE.H5 0 0 1 1 0 0 1 1
0.LONG.H5 0 0 1 1 0 1 0 1
0.DOUBLE.H1.1 0 0 1 1 0 1 1 0
0.SINGLE.H0 0 0 1 1 1 1 1 1
0.SINGLE.H4 0 1 0 1 0 0 1 1
0.DOUBLE.H1.0 0 1 0 1 0 1 0 1
0.LONG.H4 0 1 0 1 0 1 1 0
0.SINGLE.H1 0 1 0 1 1 1 1 1
0.SINGLE.H6 0 1 1 0 0 0 1 1
1.LONG.H2 0 1 1 0 0 1 0 1
1.LONG.H0 0 1 1 0 0 1 1 0
0.SINGLE.H3 0 1 1 0 1 1 1 1
0.DOUBLE.H0.0 1 1 1 1 0 0 1 1
0.SINGLE.H7 1 1 1 1 0 1 0 1
0.DOUBLE.H0.1 1 1 1 1 0 1 1 0
0.SINGLE.H2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.F4 0.9.10 0.9.11 0.8.9 0.8.10 0.10.9 0.8.12 0.9.12 0.10.11
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.DOUBLE.H0.1 0 0 0 1 1 0 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1
0.LONG.H5 0 1 0 0 0 1 1 1
0.LONG.H3 0 1 0 0 1 1 1 0
0.SINGLE.H2 0 1 0 1 0 0 1 1
0.SINGLE.H3 0 1 0 1 0 1 0 1
0.SINGLE.H7 0 1 0 1 1 0 1 0
1.LONG.H1 0 1 0 1 1 1 0 0
0.DOUBLE.H1.1 0 1 1 1 0 1 1 1
0.DOUBLE.H1.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 1 0 0 1 1 1 1
0.DOUBLE.H0.0 1 1 0 1 1 0 1 1
0.SINGLE.H6 1 1 0 1 1 1 0 1
0.SINGLE.H4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G2 0.2.10 0.2.9 0.3.10 0.3.11 0.2.11 0.2.12 0.3.9 0.4.11 0.3.12
0.LONG.H4 0 0 0 0 1 1 1 1 1
0.SINGLE.H4 0 0 0 1 1 1 0 1 1
0.LONG.H5 0 0 0 1 1 1 1 0 1
0.SINGLE.H1 0 0 1 1 1 1 1 1 1
0.SINGLE.H2 0 1 0 0 0 1 1 1 1
0.SINGLE.H3 0 1 0 0 1 0 1 1 1
0.SINGLE.H7 0 1 0 1 0 1 0 1 1
0.DOUBLE.H0.0 0 1 0 1 0 1 1 0 1
1.LONG.H2 0 1 0 1 1 0 0 1 1
0.SINGLE.H6 0 1 0 1 1 0 1 0 1
COUT0 0 1 0 1 1 1 1 1 0
1.LONG.H0 0 1 1 1 0 1 1 1 1
0.DOUBLE.H0.1 0 1 1 1 1 0 1 1 1
0.DOUBLE.H1.1 1 1 0 0 1 1 1 1 1
0.SINGLE.H5 1 1 0 1 1 1 0 1 1
0.DOUBLE.H1.0 1 1 0 1 1 1 1 0 1
0.SINGLE.H0 1 1 1 1 1 1 1 1 1
INT:MUX.IMUX.CLB.G4 0.5.12 0.4.12 0.6.11 0.4.9 0.4.10 0.5.10 0.5.11 0.5.9
0.SINGLE.H0 0 0 0 0 1 1 1 1
0.SINGLE.H1 0 0 0 1 0 1 1 1
1.LONG.H0 0 0 0 1 1 1 0 1
0.DOUBLE.H1.1 0 0 1 0 1 0 1 1
0.LONG.H3 0 0 1 0 1 1 1 0
0.LONG.H5 0 0 1 1 0 0 1 1
0.DOUBLE.H1.0 0 0 1 1 0 1 1 0
0.SINGLE.H3 0 0 1 1 1 0 0 1
0.SINGLE.H6 0 0 1 1 1 1 0 0
0.DOUBLE.H0.1 0 1 0 1 1 1 1 1
0.SINGLE.H2 0 1 1 1 1 0 1 1
0.DOUBLE.H0.0 0 1 1 1 1 1 1 0
0.SINGLE.H5 1 0 1 0 1 1 1 1
0.SINGLE.H4 1 0 1 1 0 1 1 1
1.LONG.H1 1 0 1 1 1 1 0 1
0.SINGLE.H7 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.IK 0.18.5 0.19.5 0.20.5 0.21.5 0.19.6 0.18.6 0.20.6 0.21.6
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.4 0.26.3 0.28.4 0.27.3 0.28.3 0.27.4
0.DEC.H2 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H0 0 1 0 0 1 1
0.DEC.H3 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H1 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.5 0.29.6 0.28.6 0.27.6 0.24.6 0.23.6 0.25.6 0.26.6
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.2 0.6.2 0.6.1 0.3.2 0.4.2 0.5.1 0.4.1 0.6.0
0.LONG.IO.H3 0 0 1 0 0 1 1 1
0.LONG.IO.H0 0 0 1 0 1 0 1 1
0.LONG.IO.H2 0 0 1 0 1 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 1 1 1 1 1
0.DEC.H1 0 1 0 0 1 0 1 1
0.GCLK0 0 1 0 0 1 1 0 1
0.IO.DOUBLE.1.S.0 0 1 0 1 1 1 1 1
GND 0 1 1 0 1 1 1 0
0.IO.DOUBLE.1.S.1 1 1 1 0 0 1 1 1
0.LONG.IO.H1 1 1 1 0 1 0 1 1
0.DEC.H0 1 1 1 0 1 1 0 1
0.IO.DOUBLE.0.S.0 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.5 0.16.6 0.17.6 0.15.6 0.14.6 0.17.5 0.16.5 0.15.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V4 0 1 1 1 1 1 1 0
2.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.4 0.2.4 0.2.3 0.1.4 0.1.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H2 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
2.LONG.V2 0 0 1 1 1 0
2.LONG.V1 0 1 0 1 1 1
0.DEC.H1 0 1 1 0 1 1
2.LONG.V0 0 1 1 1 0 1
2.DOUBLE.V0.1 0 1 1 1 1 0
2.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.5 0.12.6 0.13.6 0.11.6 0.10.6 0.13.5 0.12.5 0.11.5
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
2.SINGLE.V2 0 1 1 1 1 0 1 1
2.SINGLE.V3 0 1 1 1 1 1 0 1
2.SINGLE.V5 0 1 1 1 1 1 1 0
2.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.1 0.2.1 0.1.2 0.2.2 0.3.1 0.1.1 0.0.2 0.11.2
0.LONG.IO.H0 0 0 0 0 1 1 1 1
0.GCLK0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.S.0 0 0 1 1 1 1 1 1
0.LONG.IO.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H2 0 1 0 0 1 1 0 1
0.DEC.H0 0 1 0 1 0 0 1 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H1 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.S.0 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.S.1 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.S.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.2 0.8.2 0.7.1 0.8.1
0.IO.DOUBLE.0.S.0 0 0 1 1
0.IO.DOUBLE.2.S.0 0 1 0 1
0.IO.DOUBLE.3.S.0 0 1 1 0
0.IO.DOUBLE.1.S.0 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.1
0.IO.DOUBLE.1.S.2 0 0 1 1
0.IO.DOUBLE.2.S.2 0 1 0 1
0.IO.DOUBLE.3.S.2 0 1 1 0
0.IO.DOUBLE.0.S.2 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.6 0.16.4
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.4 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.4 0.21.4 0.22.4
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.5 0.23.4
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.5 0.27.5 0.29.5 0.28.5
0.LONG.IO.H0 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.5 0.33.5 0.34.6 0.34.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.5 0.30.5 0.32.5 0.33.6
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.5 0.6.6 0.7.6 0.7.5
0.LONG.IO.H1 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.5 0.1.6 0.2.6 0.2.5
0.LONG.IO.H2 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.5 0.8.6 0.9.5 0.9.6
0.LONG.IO.H3 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.0 0.18.1 0.19.0
IO0:I2MUX 0.20.0 0.20.1 0.21.0
IO1:I1MUX 0.15.1 0.16.1 0.16.0
IO1:I2MUX 0.14.0 0.14.1 0.15.0
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.1
IO1:IFF_D 0.11.0
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.0
IO1:MUX.OFF_D 0.8.0
O 0
CE 1
IO0:OMUX 0.27.0 0.29.0 0.31.0 0.28.0
IO1:OMUX 0.3.0 0.7.0 0.5.0 0.4.0
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.1 0.23.1
IO1:PULL 0.13.1 0.12.1
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.0
IO1:SLEW 0.1.0
FAST 0
SLOW 1

Tile IO.T

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.T switchbox INT
DestinationSourceKind
TCELL0_SINGLE.V0TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_IO.DOUBLE.2.N.2mux
TCELL0_IO.DOUBLE.3.N.2mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.N.0mux
TCELL0_IO.DOUBLE.1.N.0mux
TCELL0_IO.DOUBLE.2.N.0mux
TCELL0_IO.DOUBLE.3.N.0mux
TCELL0_LONG.H0TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL1_DOUBLE.V0.1mux
TCELL1_DOUBLE.V1.0mux
TCELL1_LONG.V0mux
TCELL1_LONG.V1mux
TCELL1_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.T bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F2.N
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.T bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G2.N
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.T bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.T bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C2.N
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.T bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.T bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F2.NIO0.O
TCELL0:IMUX.CLB.G2.NIO1.O
TCELL0:IMUX.CLB.C2.NDEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2

Bitstream

xc4000e IO.T bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
5 ~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0 ~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
4 ~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0 ~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1 ~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.SINGLE.V4.0.DEC.H2 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H3 ~INT:PASS.SINGLE.V3.0.DEC.H1 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H0 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
1 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H2.0.SINGLE.V3 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
0 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
xc4000e IO.T bittile 1
BitFrame
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DEC0:O1_N 0.8.2
DEC0:O2_N 0.3.2
DEC0:O3_N 0.9.2
DEC0:O4_N 0.14.2
DEC1:O1_N 0.6.3
DEC1:O2_N 0.5.3
DEC1:O3_N 0.11.3
DEC1:O4_N 0.12.3
DEC2:O1_P 0.7.3
DEC2:O2_P 0.4.3
DEC2:O3_P 0.10.3
DEC2:O4_P 0.13.3
IO0:OFF_USED 0.24.6
IO1:OFF_USED 0.10.6
non-inverted [0]
DEC0:O1_P 0.8.3
DEC0:O2_P 0.3.3
DEC0:O3_P 0.9.3
DEC0:O4_P 0.14.3
DEC1:O1_P 0.6.2
DEC1:O2_P 0.5.2
DEC1:O3_P 0.11.2
DEC1:O4_P 0.12.2
DEC2:O1_N 0.7.2
DEC2:O2_N 0.4.2
DEC2:O3_N 0.10.2
DEC2:O4_N 0.13.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 0.27.5
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 0.26.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 0.25.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 0.20.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 0.21.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 0.30.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 0.29.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 0.28.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 0.33.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 0.31.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 0.31.4
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 0.23.4
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 0.25.5
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 0.32.3
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0 0.24.4
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2 0.22.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1 0.19.4
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0 0.26.5
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2 0.27.4
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1 0.25.3
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0 0.29.5
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2 0.30.4
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1 0.28.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0 0.32.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2 0.32.5
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1 0.31.3
INT:BUF.LONG.H0.0.SINGLE.V1 1.21.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.25.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.24.1
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.0
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.0
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 0.35.4
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 0.10.4
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 0.34.4
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 0.9.4
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 0.34.5
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 0.9.5
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 0.35.5
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 0.10.5
INT:PASS.SINGLE.V0.0.DEC.H0 0.19.2
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.1
INT:PASS.SINGLE.V1.0.LONG.H0 1.23.8
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.2
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.0
INT:PASS.SINGLE.V2.0.LONG.H1 1.29.8
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.2
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.2
INT:PASS.SINGLE.V3.0.DEC.H1 0.30.2
INT:PASS.SINGLE.V3.0.LONG.H2 1.28.9
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.2
INT:PASS.SINGLE.V4.0.DEC.H2 0.35.2
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.0
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.2
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.0
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.2
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.1
INT:PASS.SINGLE.V7.0.DEC.H3 0.31.2
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.2
IO0:IFF_CE_ENABLE 0.19.5
IO0:IFF_SRVAL 0.23.6
IO0:INV.IFF_CLK 0.22.6
IO0:INV.OFF_CLK 0.32.6
IO0:INV.OFF_D 0.25.6
IO0:INV.T 0.34.6
IO0:OFF_CE_ENABLE 0.30.6
IO0:OFF_SRVAL 0.24.5
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.4
IO0:READBACK_OFF 0.14.4
IO1:IFF_CE_ENABLE 0.13.4
IO1:IFF_SRVAL 0.12.6
IO1:INV.IFF_CLK 0.13.6
IO1:INV.OFF_CLK 0.2.6
IO1:INV.OFF_D 0.9.6
IO1:INV.T 0.0.6
IO1:OFF_CE_ENABLE 0.12.4
IO1:OFF_SRVAL 0.11.5
IO1:READBACK_I1 0.16.4
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.4
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.18.1 0.19.1 0.20.1 0.21.1 0.19.0 0.18.0 0.20.0 0.21.0
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.2 0.26.3 0.28.2 0.27.3 0.28.3 0.27.2
0.DEC.H1 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H3 0 1 0 0 1 1
0.DEC.H0 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H2 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.1 0.29.0 0.28.0 0.27.0 0.24.0 0.23.0 0.25.0 0.26.0
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.4 0.6.4 0.3.4 0.4.4 0.6.5 0.5.5 0.4.5 0.6.6
0.LONG.IO.H3 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 1 0 1 1
0.LONG.IO.H2 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.N.1 0 0 1 1 1 1 1 1
0.DEC.H2 0 1 0 1 0 0 1 1
0.GCLK0 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.N.2 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.LONG.IO.H1 1 1 0 1 1 0 1 1
0.DEC.H3 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.N.2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.1 0.16.0 0.17.0 0.15.0 0.14.0 0.17.1 0.16.1 0.15.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V4 0 1 1 1 1 1 1 0
1.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.2 0.2.2 0.1.3 0.1.2 0.2.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H1 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
1.LONG.V2 0 0 1 1 1 0
1.LONG.V0 0 1 0 1 1 1
0.DEC.H2 0 1 1 0 1 1
1.LONG.V1 0 1 1 1 0 1
1.DOUBLE.V0.1 0 1 1 1 1 0
1.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.1 0.12.0 0.13.0 0.11.0 0.10.0 0.13.1 0.12.1 0.11.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V5 0 1 1 1 1 1 1 0
1.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.5 0.2.5 0.1.4 0.3.5 0.2.4 0.1.5 0.0.4 0.11.4
0.GCLK0 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.N.2 0 0 1 1 1 1 1 1
0.DEC.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H3 0 1 0 1 0 0 1 1
0.LONG.IO.H2 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H2 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.N.2 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.N.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.4 0.8.4 0.7.5 0.8.5
0.IO.DOUBLE.0.N.2 0 0 1 1
0.IO.DOUBLE.2.N.2 0 1 0 1
0.IO.DOUBLE.3.N.2 0 1 1 0
0.IO.DOUBLE.1.N.2 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.5
0.IO.DOUBLE.1.N.0 0 0 1 1
0.IO.DOUBLE.2.N.0 0 1 0 1
0.IO.DOUBLE.3.N.0 0 1 1 0
0.IO.DOUBLE.0.N.0 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.0 0.16.2
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.2 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.2 0.21.2 0.22.2
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.1 0.23.2
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.1 0.27.1 0.29.1 0.28.1
0.LONG.IO.H0 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.1 0.33.1 0.34.0 0.34.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.1 0.30.1 0.32.1 0.33.0
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.1 0.6.0 0.7.0 0.7.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.1 0.1.0 0.2.0 0.2.1
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.1 0.8.0 0.9.1 0.9.0
0.LONG.IO.H3 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.6 0.18.5 0.19.6
IO0:I2MUX 0.20.6 0.20.5 0.21.6
IO1:I1MUX 0.15.5 0.16.5 0.16.6
IO1:I2MUX 0.14.6 0.14.5 0.15.6
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.5
IO1:IFF_D 0.11.6
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.6
IO1:MUX.OFF_D 0.8.6
O 0
CE 1
IO0:OMUX 0.27.6 0.29.6 0.31.6 0.28.6
IO1:OMUX 0.3.6 0.7.6 0.5.6 0.4.6
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.5 0.23.5
IO1:PULL 0.13.5 0.12.5
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.6
IO1:SLEW 0.1.6
FAST 0
SLOW 1

Tile IO.T.R

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.T.R switchbox INT
DestinationSourceKind
TCELL0_SINGLE.V0TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_IO.DOUBLE.2.N.2mux
TCELL0_IO.DOUBLE.3.N.2mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.N.0mux
TCELL0_IO.DOUBLE.1.N.0mux
TCELL0_IO.DOUBLE.2.N.0mux
TCELL0_IO.DOUBLE.3.N.0mux
TCELL0_LONG.H0TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL1_DOUBLE.V0.1mux
TCELL1_DOUBLE.V1.0mux
TCELL1_LONG.V0mux
TCELL1_LONG.V1mux
TCELL1_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.T.R bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F2.N
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.T.R bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G2.N
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.T.R bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.T.R bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C2.N
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.T.R bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.T.R bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F2.NIO0.O
TCELL0:IMUX.CLB.G2.NIO1.O
TCELL0:IMUX.CLB.C2.NDEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.T.R bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
5 ~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0 ~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
4 ~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0 ~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1 ~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.SINGLE.V4.0.DEC.H2 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H3 ~INT:PASS.SINGLE.V3.0.DEC.H1 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H0 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
1 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H2.0.SINGLE.V3 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
0 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
xc4000e IO.T.R bittile 1
BitFrame
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DEC0:O1_N 0.8.2
DEC0:O2_N 0.3.2
DEC0:O3_N 0.9.2
DEC0:O4_N 0.14.2
DEC1:O1_N 0.6.3
DEC1:O2_N 0.5.3
DEC1:O3_N 0.11.3
DEC1:O4_N 0.12.3
DEC2:O1_P 0.7.3
DEC2:O2_P 0.4.3
DEC2:O3_P 0.10.3
DEC2:O4_P 0.13.3
IO0:OFF_USED 0.24.6
IO1:OFF_USED 0.10.6
non-inverted [0]
DEC0:O1_P 0.8.3
DEC0:O2_P 0.3.3
DEC0:O3_P 0.9.3
DEC0:O4_P 0.14.3
DEC1:O1_P 0.6.2
DEC1:O2_P 0.5.2
DEC1:O3_P 0.11.2
DEC1:O4_P 0.12.2
DEC2:O1_N 0.7.2
DEC2:O2_N 0.4.2
DEC2:O3_N 0.10.2
DEC2:O4_N 0.13.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 0.27.5
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 0.26.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 0.25.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 0.20.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 0.21.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 0.30.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 0.29.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 0.28.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 0.33.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 0.31.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 0.31.4
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 0.23.4
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 0.25.5
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 0.32.3
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0 0.24.4
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2 0.22.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1 0.19.4
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0 0.26.5
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2 0.27.4
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1 0.25.3
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0 0.29.5
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2 0.30.4
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1 0.28.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0 0.32.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2 0.32.5
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1 0.31.3
INT:BUF.LONG.H0.0.SINGLE.V1 1.21.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.25.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.24.1
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.0
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.0
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 0.35.4
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 0.10.4
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 0.34.4
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 0.9.4
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 0.34.5
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 0.9.5
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 0.35.5
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 0.10.5
INT:PASS.SINGLE.V0.0.DEC.H0 0.19.2
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.1
INT:PASS.SINGLE.V1.0.LONG.H0 1.23.8
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.2
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.0
INT:PASS.SINGLE.V2.0.LONG.H1 1.29.8
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.2
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.2
INT:PASS.SINGLE.V3.0.DEC.H1 0.30.2
INT:PASS.SINGLE.V3.0.LONG.H2 1.28.9
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.2
INT:PASS.SINGLE.V4.0.DEC.H2 0.35.2
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.0
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.2
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.0
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.2
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.1
INT:PASS.SINGLE.V7.0.DEC.H3 0.31.2
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.2
IO0:IFF_CE_ENABLE 0.19.5
IO0:IFF_SRVAL 0.23.6
IO0:INV.IFF_CLK 0.22.6
IO0:INV.OFF_CLK 0.32.6
IO0:INV.OFF_D 0.25.6
IO0:INV.T 0.34.6
IO0:OFF_CE_ENABLE 0.30.6
IO0:OFF_SRVAL 0.24.5
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.4
IO0:READBACK_OFF 0.14.4
IO1:IFF_CE_ENABLE 0.13.4
IO1:IFF_SRVAL 0.12.6
IO1:INV.IFF_CLK 0.13.6
IO1:INV.OFF_CLK 0.2.6
IO1:INV.OFF_D 0.9.6
IO1:INV.T 0.0.6
IO1:OFF_CE_ENABLE 0.12.4
IO1:OFF_SRVAL 0.11.5
IO1:READBACK_I1 0.16.4
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.4
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.18.1 0.19.1 0.20.1 0.21.1 0.19.0 0.18.0 0.20.0 0.21.0
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.2 0.26.3 0.28.2 0.27.3 0.28.3 0.27.2
0.DEC.H1 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H3 0 1 0 0 1 1
0.DEC.H0 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H2 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.1 0.29.0 0.28.0 0.27.0 0.24.0 0.23.0 0.25.0 0.26.0
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.4 0.6.4 0.3.4 0.4.4 0.6.5 0.5.5 0.4.5 0.6.6
0.LONG.IO.H3 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 1 0 1 1
0.LONG.IO.H2 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.N.1 0 0 1 1 1 1 1 1
0.DEC.H2 0 1 0 1 0 0 1 1
0.GCLK0 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.N.2 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.LONG.IO.H1 1 1 0 1 1 0 1 1
0.DEC.H3 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.N.2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.1 0.16.0 0.17.0 0.15.0 0.14.0 0.17.1 0.16.1 0.15.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V4 0 1 1 1 1 1 1 0
1.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.2 0.2.2 0.1.3 0.1.2 0.2.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H1 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
1.LONG.V2 0 0 1 1 1 0
1.LONG.V0 0 1 0 1 1 1
0.DEC.H2 0 1 1 0 1 1
1.LONG.V1 0 1 1 1 0 1
1.DOUBLE.V0.1 0 1 1 1 1 0
1.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.1 0.12.0 0.13.0 0.11.0 0.10.0 0.13.1 0.12.1 0.11.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V5 0 1 1 1 1 1 1 0
1.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.5 0.2.5 0.1.4 0.3.5 0.2.4 0.1.5 0.0.4 0.11.4
0.GCLK0 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.N.2 0 0 1 1 1 1 1 1
0.DEC.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H3 0 1 0 1 0 0 1 1
0.LONG.IO.H2 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H2 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.N.2 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.N.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.4 0.8.4 0.7.5 0.8.5
0.IO.DOUBLE.0.N.2 0 0 1 1
0.IO.DOUBLE.2.N.2 0 1 0 1
0.IO.DOUBLE.3.N.2 0 1 1 0
0.IO.DOUBLE.1.N.2 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.5
0.IO.DOUBLE.1.N.0 0 0 1 1
0.IO.DOUBLE.2.N.0 0 1 0 1
0.IO.DOUBLE.3.N.0 0 1 1 0
0.IO.DOUBLE.0.N.0 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.0 0.16.2
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.2 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.2 0.21.2 0.22.2
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.1 0.23.2
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.1 0.27.1 0.29.1 0.28.1
0.LONG.IO.H0 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.1 0.33.1 0.34.0 0.34.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.1 0.30.1 0.32.1 0.33.0
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.1 0.6.0 0.7.0 0.7.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.1 0.1.0 0.2.0 0.2.1
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.1 0.8.0 0.9.1 0.9.0
0.LONG.IO.H3 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.6 0.18.5 0.19.6
IO0:I2MUX 0.20.6 0.20.5 0.21.6
IO1:I1MUX 0.15.5 0.16.5 0.16.6
IO1:I2MUX 0.14.6 0.14.5 0.15.6
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.5
IO1:IFF_D 0.11.6
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.6
IO1:MUX.OFF_D 0.8.6
O 0
CE 1
IO0:OMUX 0.27.6 0.29.6 0.31.6 0.28.6
IO1:OMUX 0.3.6 0.7.6 0.5.6 0.4.6
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.5 0.23.5
IO1:PULL 0.13.5 0.12.5
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.6
IO1:SLEW 0.1.6
FAST 0
SLOW 1

Tile IO.TS

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.TS switchbox INT
DestinationSourceKind
TCELL0_SINGLE.V0TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_IO.DOUBLE.2.N.2mux
TCELL0_IO.DOUBLE.3.N.2mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.N.0mux
TCELL0_IO.DOUBLE.1.N.0mux
TCELL0_IO.DOUBLE.2.N.0mux
TCELL0_IO.DOUBLE.3.N.0mux
TCELL0_LONG.H0TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL1_DOUBLE.V0.1mux
TCELL1_DOUBLE.V1.0mux
TCELL1_LONG.V0mux
TCELL1_LONG.V1mux
TCELL1_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.TS bel IO0
PinDirectionWires
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F2.N
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.TS bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G2.N
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.TS bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.TS bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C2.N
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.TS bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.TS bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F2.NIO0.O
TCELL0:IMUX.CLB.G2.NIO1.O
TCELL0:IMUX.CLB.C2.NDEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2

Bitstream

xc4000e IO.TS bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
5 ~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 ~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
4 ~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 ~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1 ~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.SINGLE.V4.0.DEC.H2 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H3 ~INT:PASS.SINGLE.V3.0.DEC.H1 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H0 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
1 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H2.0.SINGLE.V3 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
0 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
xc4000e IO.TS bittile 1
BitFrame
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DEC0:O1_N 0.8.2
DEC0:O2_N 0.3.2
DEC0:O3_N 0.9.2
DEC0:O4_N 0.14.2
DEC1:O1_N 0.6.3
DEC1:O2_N 0.5.3
DEC1:O3_N 0.11.3
DEC1:O4_N 0.12.3
DEC2:O1_P 0.7.3
DEC2:O2_P 0.4.3
DEC2:O3_P 0.10.3
DEC2:O4_P 0.13.3
IO0:OFF_USED 0.24.6
IO1:OFF_USED 0.10.6
non-inverted [0]
DEC0:O1_P 0.8.3
DEC0:O2_P 0.3.3
DEC0:O3_P 0.9.3
DEC0:O4_P 0.14.3
DEC1:O1_P 0.6.2
DEC1:O2_P 0.5.2
DEC1:O3_P 0.11.2
DEC1:O4_P 0.12.2
DEC2:O1_N 0.7.2
DEC2:O2_N 0.4.2
DEC2:O3_N 0.10.2
DEC2:O4_N 0.13.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 0.27.5
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 0.26.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 0.25.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 0.20.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 0.21.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 0.30.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 0.29.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 0.28.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 0.33.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 0.31.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 0.31.4
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 0.23.4
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 0.25.5
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 0.32.3
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1 0.19.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 0.24.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2 0.22.4
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1 0.25.3
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 0.26.5
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2 0.27.4
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1 0.28.4
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 0.29.5
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2 0.30.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1 0.31.3
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 0.32.4
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2 0.32.5
INT:BUF.LONG.H0.0.SINGLE.V1 1.21.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.25.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.24.1
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.0
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.0
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 0.35.4
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 0.10.4
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 0.34.4
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 0.9.4
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 0.34.5
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 0.9.5
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 0.35.5
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 0.10.5
INT:PASS.SINGLE.V0.0.DEC.H0 0.19.2
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.1
INT:PASS.SINGLE.V1.0.LONG.H0 1.23.8
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.2
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.0
INT:PASS.SINGLE.V2.0.LONG.H1 1.29.8
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.2
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.2
INT:PASS.SINGLE.V3.0.DEC.H1 0.30.2
INT:PASS.SINGLE.V3.0.LONG.H2 1.28.9
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.2
INT:PASS.SINGLE.V4.0.DEC.H2 0.35.2
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.0
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.2
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.0
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.2
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.1
INT:PASS.SINGLE.V7.0.DEC.H3 0.31.2
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.2
IO0:IFF_CE_ENABLE 0.19.5
IO0:IFF_SRVAL 0.23.6
IO0:INV.IFF_CLK 0.22.6
IO0:INV.OFF_CLK 0.32.6
IO0:INV.OFF_D 0.25.6
IO0:INV.T 0.34.6
IO0:OFF_CE_ENABLE 0.30.6
IO0:OFF_SRVAL 0.24.5
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.4
IO0:READBACK_OFF 0.14.4
IO1:IFF_CE_ENABLE 0.13.4
IO1:IFF_SRVAL 0.12.6
IO1:INV.IFF_CLK 0.13.6
IO1:INV.OFF_CLK 0.2.6
IO1:INV.OFF_D 0.9.6
IO1:INV.T 0.0.6
IO1:OFF_CE_ENABLE 0.12.4
IO1:OFF_SRVAL 0.11.5
IO1:READBACK_I1 0.16.4
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.4
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.18.1 0.19.1 0.20.1 0.21.1 0.19.0 0.18.0 0.20.0 0.21.0
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.2 0.26.3 0.28.2 0.27.3 0.28.3 0.27.2
0.DEC.H1 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H3 0 1 0 0 1 1
0.DEC.H0 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H2 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.1 0.29.0 0.28.0 0.27.0 0.24.0 0.23.0 0.25.0 0.26.0
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.4 0.6.4 0.3.4 0.4.4 0.6.5 0.5.5 0.4.5 0.6.6
0.LONG.IO.H3 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 1 0 1 1
0.LONG.IO.H2 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.N.1 0 0 1 1 1 1 1 1
0.DEC.H2 0 1 0 1 0 0 1 1
0.GCLK0 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.N.2 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.LONG.IO.H1 1 1 0 1 1 0 1 1
0.DEC.H3 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.N.2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.1 0.16.0 0.17.0 0.15.0 0.14.0 0.17.1 0.16.1 0.15.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V4 0 1 1 1 1 1 1 0
1.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.2 0.2.2 0.1.3 0.1.2 0.2.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H1 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
1.LONG.V2 0 0 1 1 1 0
1.LONG.V0 0 1 0 1 1 1
0.DEC.H2 0 1 1 0 1 1
1.LONG.V1 0 1 1 1 0 1
1.DOUBLE.V0.1 0 1 1 1 1 0
1.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.1 0.12.0 0.13.0 0.11.0 0.10.0 0.13.1 0.12.1 0.11.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V5 0 1 1 1 1 1 1 0
1.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.5 0.2.5 0.1.4 0.3.5 0.2.4 0.1.5 0.0.4 0.11.4
0.GCLK0 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.N.2 0 0 1 1 1 1 1 1
0.DEC.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H3 0 1 0 1 0 0 1 1
0.LONG.IO.H2 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H2 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.N.2 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.N.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.4 0.8.4 0.7.5 0.8.5
0.IO.DOUBLE.0.N.2 0 0 1 1
0.IO.DOUBLE.2.N.2 0 1 0 1
0.IO.DOUBLE.3.N.2 0 1 1 0
0.IO.DOUBLE.1.N.2 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.5
0.IO.DOUBLE.1.N.0 0 0 1 1
0.IO.DOUBLE.2.N.0 0 1 0 1
0.IO.DOUBLE.3.N.0 0 1 1 0
0.IO.DOUBLE.0.N.0 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.0 0.16.2
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.2 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.2 0.21.2 0.22.2
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.1 0.23.2
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.1 0.27.1 0.29.1 0.28.1
0.LONG.IO.H0 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.1 0.33.1 0.34.0 0.34.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.1 0.30.1 0.32.1 0.33.0
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.1 0.6.0 0.7.0 0.7.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.1 0.1.0 0.2.0 0.2.1
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.1 0.8.0 0.9.1 0.9.0
0.LONG.IO.H3 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.6 0.18.5 0.19.6
IO0:I2MUX 0.20.6 0.20.5 0.21.6
IO1:I1MUX 0.15.5 0.16.5 0.16.6
IO1:I2MUX 0.14.6 0.14.5 0.15.6
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.5
IO1:IFF_D 0.11.6
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.6
IO1:MUX.OFF_D 0.8.6
O 0
CE 1
IO0:OMUX 0.27.6 0.29.6 0.31.6 0.28.6
IO1:OMUX 0.3.6 0.7.6 0.5.6 0.4.6
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.5 0.23.5
IO1:PULL 0.13.5 0.12.5
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.6
IO1:SLEW 0.1.6
FAST 0
SLOW 1

Tile IO.TS.L

Cells: 3

Bel INT

Switchbox INT

xc4000e IO.TS.L switchbox INT
DestinationSourceKind
TCELL0_SINGLE.V0TCELL0_DEC.H0pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_SINGLE.V1TCELL0_LONG.H0pass transistor
TCELL0_LONG.IO.H0pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_SINGLE.V2TCELL0_LONG.H1pass transistor
TCELL0_LONG.IO.H1pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_SINGLE.V3TCELL0_LONG.H2pass transistor
TCELL0_DEC.H1pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_SINGLE.V4TCELL0_DEC.H2pass transistor
TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_SINGLE.V5TCELL0_LONG.IO.H2pass transistor
TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_SINGLE.V6TCELL0_LONG.IO.H3pass transistor
TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_SINGLE.V7TCELL0_DEC.H3pass transistor
TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.0TCELL0_OUT.BT.IOB1.I1.Epass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_DOUBLE.V0.1TCELL0_OUT.BT.IOB0.I1pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.0TCELL0_OUT.BT.IOB0.I2pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_DOUBLE.V1.1TCELL0_OUT.BT.IOB1.I2.Epass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.1TCELL0_SINGLE.V0bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V1bidirectional pass transistor
TCELL0_DOUBLE.V0.1bidirectional pass transistor
TCELL0_IO.DOUBLE.0.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.1TCELL0_SINGLE.V2bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V3bidirectional pass transistor
TCELL0_DOUBLE.V0.0bidirectional pass transistor
TCELL0_IO.DOUBLE.1.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.1TCELL0_SINGLE.V4bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V5bidirectional pass transistor
TCELL0_DOUBLE.V1.0bidirectional pass transistor
TCELL0_IO.DOUBLE.2.N.0bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0TCELL0_IO.DBUF.H0pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.1TCELL0_SINGLE.V6bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.2TCELL0_IO.DBUF.H1pass transistor
TCELL0_SINGLE.V7bidirectional pass transistor
TCELL0_DOUBLE.V1.1bidirectional pass transistor
TCELL0_IO.DOUBLE.3.N.0bidirectional pass transistor
TCELL0_IO.DBUF.H0TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_IO.DOUBLE.2.N.2mux
TCELL0_IO.DOUBLE.3.N.2mux
TCELL0_IO.DBUF.H1TCELL0_IO.DOUBLE.0.N.0mux
TCELL0_IO.DOUBLE.1.N.0mux
TCELL0_IO.DOUBLE.2.N.0mux
TCELL0_IO.DOUBLE.3.N.0mux
TCELL0_LONG.H0TCELL0_SINGLE.V1buffer
TCELL0_LONG.H1TCELL0_SINGLE.V2buffer
TCELL0_LONG.H2TCELL0_SINGLE.V3buffer
TCELL0_LONG.V0TCELL0_LONG.IO.H0mux
TCELL0_DEC.H3mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V1TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V2TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB1.I2.Emux
TCELL0_LONG.V3TCELL0_LONG.IO.H1mux
TCELL0_DEC.H2mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V4TCELL0_LONG.IO.H2mux
TCELL0_DEC.H1mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.V5TCELL0_LONG.IO.H3mux
TCELL0_DEC.H0mux
TCELL0_OUT.BT.IOB0.I2mux
TCELL0_LONG.IO.H0TCELL0_SINGLE.V1mux
TCELL0_LONG.V0mux
TCELL0_LONG.IO.H1TCELL0_SINGLE.V2mux
TCELL0_LONG.V1mux
TCELL0_LONG.V3mux
TCELL0_LONG.IO.H2TCELL0_SINGLE.V5mux
TCELL0_LONG.V2mux
TCELL0_LONG.V4mux
TCELL0_LONG.IO.H3TCELL0_SINGLE.V6mux
TCELL0_LONG.V5mux
TCELL0_IMUX.IOB0.O1TCELL0_DOUBLE.V0.0mux
TCELL0_DOUBLE.V1.1mux
TCELL0_LONG.V3mux
TCELL0_LONG.V4mux
TCELL0_LONG.V5mux
TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_IMUX.IOB0.OKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.IKTCELL0_SINGLE.V2mux
TCELL0_SINGLE.V3mux
TCELL0_SINGLE.V4mux
TCELL0_SINGLE.V5mux
TCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL0_IMUX.IOB0.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux
TCELL0_IMUX.IOB1.O1TCELL0_DEC.H0mux
TCELL0_DEC.H1mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL1_DOUBLE.V0.1mux
TCELL1_DOUBLE.V1.0mux
TCELL1_LONG.V0mux
TCELL1_LONG.V1mux
TCELL1_LONG.V2mux
TCELL0_IMUX.IOB1.OKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.IKTCELL0_GCLK0mux
TCELL0_GCLK1mux
TCELL0_GCLK2mux
TCELL0_GCLK3mux
TCELL1_SINGLE.V2mux
TCELL1_SINGLE.V3mux
TCELL1_SINGLE.V4mux
TCELL1_SINGLE.V5mux
TCELL0_IMUX.IOB1.TSTCELL0_IO.DOUBLE.0.N.1mux
TCELL0_IO.DOUBLE.0.N.2mux
TCELL0_IO.DOUBLE.1.N.1mux
TCELL0_IO.DOUBLE.1.N.2mux
TCELL0_LONG.IO.H0mux
TCELL0_LONG.IO.H1mux
TCELL0_LONG.IO.H2mux
TCELL0_LONG.IO.H3mux
TCELL0_DEC.H2mux
TCELL0_DEC.H3mux
TCELL0_GCLK0mux

Bel IO0

xc4000e IO.TS.L bel IO0
PinDirectionWires
CLKINoutputTCELL0:OUT.IOB.CLKIN
ECinputTCELL0:IMUX.IOB0.O1
I1outputTCELL0:OUT.BT.IOB0.I1
I2outputTCELL0:OUT.BT.IOB0.I2
IKinputTCELL0:IMUX.IOB0.IK
OinputTCELL0:IMUX.CLB.F2.N
OKinputTCELL0:IMUX.IOB0.OK
TinputTCELL0:IMUX.IOB0.TS

Bel IO1

xc4000e IO.TS.L bel IO1
PinDirectionWires
ECinputTCELL0:IMUX.IOB1.O1
I1outputTCELL0:OUT.BT.IOB1.I1
I2outputTCELL0:OUT.BT.IOB1.I2
IKinputTCELL0:IMUX.IOB1.IK
OinputTCELL0:IMUX.CLB.G2.N
OKinputTCELL0:IMUX.IOB1.OK
TinputTCELL0:IMUX.IOB1.TS

Bel DEC0

xc4000e IO.TS.L bel DEC0
PinDirectionWires
IinputTCELL0:OUT.BT.IOB0.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC1

xc4000e IO.TS.L bel DEC1
PinDirectionWires
IinputTCELL0:IMUX.CLB.C2.N
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel DEC2

xc4000e IO.TS.L bel DEC2
PinDirectionWires
IinputTCELL0:OUT.BT.IOB1.I1
O1outputTCELL0:DEC.H0
O2outputTCELL0:DEC.H1
O3outputTCELL0:DEC.H2
O4outputTCELL0:DEC.H3

Bel wires

xc4000e IO.TS.L bel wires
WirePins
TCELL0:DEC.H0DEC0.O1, DEC1.O1, DEC2.O1
TCELL0:DEC.H1DEC0.O2, DEC1.O2, DEC2.O2
TCELL0:DEC.H2DEC0.O3, DEC1.O3, DEC2.O3
TCELL0:DEC.H3DEC0.O4, DEC1.O4, DEC2.O4
TCELL0:IMUX.CLB.F2.NIO0.O
TCELL0:IMUX.CLB.G2.NIO1.O
TCELL0:IMUX.CLB.C2.NDEC1.I
TCELL0:IMUX.IOB0.O1IO0.EC
TCELL0:IMUX.IOB0.OKIO0.OK
TCELL0:IMUX.IOB0.IKIO0.IK
TCELL0:IMUX.IOB0.TSIO0.T
TCELL0:IMUX.IOB1.O1IO1.EC
TCELL0:IMUX.IOB1.OKIO1.OK
TCELL0:IMUX.IOB1.IKIO1.IK
TCELL0:IMUX.IOB1.TSIO1.T
TCELL0:OUT.BT.IOB0.I1IO0.I1, DEC0.I
TCELL0:OUT.BT.IOB0.I2IO0.I2
TCELL0:OUT.BT.IOB1.I1IO1.I1, DEC2.I
TCELL0:OUT.BT.IOB1.I2IO1.I2
TCELL0:OUT.IOB.CLKINIO0.CLKIN

Bitstream

xc4000e IO.TS.L bittile 0
BitFrame
35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 - ~IO0:INV.T IO0:SLEW[0] ~IO0:INV.OFF_CLK IO0:OMUX[1] ~IO0:OFF_CE_ENABLE IO0:OMUX[2] IO0:OMUX[0] IO0:OMUX[3] IO0:MUX.OFF_D[0] ~IO0:INV.OFF_D IO0:OFF_USED ~IO0:IFF_SRVAL ~IO0:INV.IFF_CLK IO0:I2MUX[0] IO0:I2MUX[2] IO0:I1MUX[0] IO0:I1MUX[2] - IO1:I1MUX[0] IO1:I2MUX[0] IO1:I2MUX[2] ~IO1:INV.IFF_CLK ~IO1:IFF_SRVAL IO1:IFF_D[0] IO1:OFF_USED ~IO1:INV.OFF_D IO1:MUX.OFF_D[0] IO1:OMUX[2] INT:MUX.IMUX.IOB0.TS[0] IO1:OMUX[1] IO1:OMUX[0] IO1:OMUX[3] ~IO1:INV.OFF_CLK IO1:SLEW[0] ~IO1:INV.T
5 ~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 INT:MUX.IO.DBUF.H1[0] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 ~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 ~IO0:OFF_SRVAL IO0:PULL[0] IO0:PULL[1] IO0:IFF_D[0] IO0:I2MUX[1] ~IO0:IFF_CE_ENABLE IO0:I1MUX[1] - IO1:I1MUX[1] IO1:I1MUX[2] IO1:I2MUX[1] IO1:PULL[1] IO1:PULL[0] ~IO1:OFF_SRVAL ~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IMUX.IOB0.TS[3] INT:MUX.IMUX.IOB0.TS[2] INT:MUX.IMUX.IOB0.TS[1] INT:MUX.IMUX.IOB1.TS[4] INT:MUX.IMUX.IOB1.TS[6] INT:MUX.IMUX.IOB1.TS[2] INT:MUX.IMUX.IOB1.TS[7]
4 ~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 ~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1 ~IO0:READBACK_I2 - ~IO1:READBACK_I1 ~IO1:READBACK_OFF ~IO0:READBACK_OFF ~IO1:IFF_CE_ENABLE ~IO1:OFF_CE_ENABLE INT:MUX.IMUX.IOB1.TS[0] ~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 INT:MUX.IO.DBUF.H0[2] INT:MUX.IO.DBUF.H0[3] INT:MUX.IMUX.IOB0.TS[6] INT:MUX.IMUX.IOB0.TS[7] INT:MUX.IMUX.IOB0.TS[4] INT:MUX.IMUX.IOB0.TS[5] INT:MUX.IMUX.IOB1.TS[3] INT:MUX.IMUX.IOB1.TS[5] INT:MUX.IMUX.IOB1.TS[1]
3 INT:MUX.IO.DBUF.H1[1] INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1 ~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 - INT:MUX.IMUX.IOB0.O1[1] INT:MUX.IMUX.IOB0.O1[2] INT:MUX.IMUX.IOB0.O1[4] ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H2[3] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 - ~IO0:READBACK_I1 ~IO1:READBACK_I2 INT:MUX.LONG.IO.H1[0] INT:MUX.LONG.IO.H1[2] ~DEC0:O4_P DEC2:O4_P DEC1:O4_N DEC1:O3_N DEC2:O3_P ~DEC0:O3_P ~DEC0:O1_P DEC2:O1_P DEC1:O1_N DEC1:O2_N DEC2:O2_P ~DEC0:O2_P INT:MUX.IMUX.IOB1.O1[1] INT:MUX.IMUX.IOB1.O1[3] INT:MUX.IMUX.IOB1.O1[0]
2 ~INT:PASS.SINGLE.V4.0.DEC.H2 ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E ~INT:PASS.SINGLE.V7.0.DEC.H3 ~INT:PASS.SINGLE.V3.0.DEC.H1 ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E INT:MUX.IMUX.IOB0.O1[3] INT:MUX.IMUX.IOB0.O1[0] INT:MUX.IMUX.IOB0.O1[5] ~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 - INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[2] ~INT:PASS.SINGLE.V0.0.DEC.H0 INT:MUX.LONG.IO.H1[1] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 INT:MUX.LONG.IO.H0[0] ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 DEC0:O4_N ~DEC2:O4_N ~DEC1:O4_P ~DEC1:O3_P ~DEC2:O3_N DEC0:O3_N DEC0:O1_N ~DEC2:O1_N ~DEC1:O1_P ~DEC1:O2_P ~DEC2:O2_N DEC0:O2_N INT:MUX.IMUX.IOB1.O1[4] INT:MUX.IMUX.IOB1.O1[2] INT:MUX.IMUX.IOB1.O1[5]
1 INT:MUX.LONG.V1[3] INT:MUX.LONG.V1[0] INT:MUX.LONG.V1[2] INT:MUX.LONG.V2[1] INT:MUX.LONG.V2[3] INT:MUX.LONG.V2[2] INT:MUX.LONG.V0[1] INT:MUX.LONG.V0[0] INT:MUX.LONG.V0[2] INT:MUX.LONG.V0[3] ~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 ~INT:BUF.LONG.H2.0.SINGLE.V3 INT:MUX.IMUX.IOB0.OK[7] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.IMUX.IOB0.IK[4] INT:MUX.IMUX.IOB0.IK[5] INT:MUX.IMUX.IOB0.IK[6] INT:MUX.IMUX.IOB0.IK[7] INT:MUX.IMUX.IOB1.IK[2] INT:MUX.IMUX.IOB1.IK[1] INT:MUX.IMUX.IOB1.IK[0] INT:MUX.IMUX.IOB1.IK[7] INT:MUX.IMUX.IOB1.OK[2] INT:MUX.IMUX.IOB1.OK[1] INT:MUX.IMUX.IOB1.OK[0] INT:MUX.IMUX.IOB1.OK[7] INT:MUX.LONG.V5[1] INT:MUX.LONG.V5[3] INT:MUX.LONG.V3[0] INT:MUX.LONG.V3[3] INT:MUX.LONG.V4[3] INT:MUX.LONG.IO.H3[1] - INT:MUX.LONG.V4[0] - -
0 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] INT:MUX.LONG.V2[0] ~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E ~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.OK[6] INT:MUX.IMUX.IOB0.OK[5] INT:MUX.IMUX.IOB0.OK[4] INT:MUX.IMUX.IOB0.OK[0] INT:MUX.IMUX.IOB0.OK[1] INT:MUX.IMUX.IOB0.OK[3] INT:MUX.IMUX.IOB0.OK[2] ~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 INT:MUX.IMUX.IOB0.IK[0] INT:MUX.IMUX.IOB0.IK[1] INT:MUX.IMUX.IOB0.IK[3] INT:MUX.IMUX.IOB0.IK[2] INT:MUX.IMUX.IOB1.IK[5] INT:MUX.IMUX.IOB1.IK[6] INT:MUX.IMUX.IOB1.IK[4] INT:MUX.IMUX.IOB1.IK[3] INT:MUX.IMUX.IOB1.OK[5] INT:MUX.IMUX.IOB1.OK[6] INT:MUX.IMUX.IOB1.OK[4] INT:MUX.IMUX.IOB1.OK[3] INT:MUX.LONG.V5[0] INT:MUX.LONG.V5[2] INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[2] - INT:MUX.LONG.IO.H0[1] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[2] -
xc4000e IO.TS.L bittile 1
BitFrame
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DEC0:O1_N 0.8.2
DEC0:O2_N 0.3.2
DEC0:O3_N 0.9.2
DEC0:O4_N 0.14.2
DEC1:O1_N 0.6.3
DEC1:O2_N 0.5.3
DEC1:O3_N 0.11.3
DEC1:O4_N 0.12.3
DEC2:O1_P 0.7.3
DEC2:O2_P 0.4.3
DEC2:O3_P 0.10.3
DEC2:O4_P 0.13.3
IO0:OFF_USED 0.24.6
IO1:OFF_USED 0.10.6
non-inverted [0]
DEC0:O1_P 0.8.3
DEC0:O2_P 0.3.3
DEC0:O3_P 0.9.3
DEC0:O4_P 0.14.3
DEC1:O1_P 0.6.2
DEC1:O2_P 0.5.2
DEC1:O3_P 0.11.2
DEC1:O4_P 0.12.2
DEC2:O1_N 0.7.2
DEC2:O2_N 0.4.2
DEC2:O3_N 0.10.2
DEC2:O4_N 0.13.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 0.27.5
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1 0.24.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2 0.26.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 0.25.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1 0.20.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2 0.21.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 0.30.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1 0.29.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2 0.28.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 0.33.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1 0.31.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2 0.31.4
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2 0.23.4
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2 0.25.5
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2 0.30.3
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2 0.32.3
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1 0.19.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 0.24.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2 0.22.4
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1 0.25.3
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 0.26.5
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2 0.27.4
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1 0.28.4
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 0.29.5
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2 0.30.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1 0.31.3
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 0.32.4
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2 0.32.5
INT:BUF.LONG.H0.0.SINGLE.V1 1.21.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.25.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.24.1
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.21.3
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1 0.20.3
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2 0.30.0
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.31.0
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 0.35.4
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1 0.10.4
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 0.34.4
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1 0.9.4
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 0.34.5
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1 0.9.5
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 0.35.5
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1 0.10.5
INT:PASS.SINGLE.V0.0.DEC.H0 0.19.2
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.22.1
INT:PASS.SINGLE.V1.0.LONG.H0 1.23.8
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.15.2
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2 0.22.0
INT:PASS.SINGLE.V2.0.LONG.H1 1.29.8
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.17.2
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1 0.25.2
INT:PASS.SINGLE.V3.0.DEC.H1 0.30.2
INT:PASS.SINGLE.V3.0.LONG.H2 1.28.9
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.29.2
INT:PASS.SINGLE.V4.0.DEC.H2 0.35.2
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.35.0
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.33.2
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2 0.32.0
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.34.2
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1 0.25.1
INT:PASS.SINGLE.V7.0.DEC.H3 0.31.2
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.32.2
IO0:IFF_CE_ENABLE 0.19.5
IO0:IFF_SRVAL 0.23.6
IO0:INV.IFF_CLK 0.22.6
IO0:INV.OFF_CLK 0.32.6
IO0:INV.OFF_D 0.25.6
IO0:INV.T 0.34.6
IO0:OFF_CE_ENABLE 0.30.6
IO0:OFF_SRVAL 0.24.5
IO0:READBACK_I1 0.18.3
IO0:READBACK_I2 0.18.4
IO0:READBACK_OFF 0.14.4
IO1:IFF_CE_ENABLE 0.13.4
IO1:IFF_SRVAL 0.12.6
IO1:INV.IFF_CLK 0.13.6
IO1:INV.OFF_CLK 0.2.6
IO1:INV.OFF_D 0.9.6
IO1:INV.T 0.0.6
IO1:OFF_CE_ENABLE 0.12.4
IO1:OFF_SRVAL 0.11.5
IO1:READBACK_I1 0.16.4
IO1:READBACK_I2 0.17.3
IO1:READBACK_OFF 0.15.4
inverted ~[0]
INT:MUX.IMUX.IOB0.IK 0.18.1 0.19.1 0.20.1 0.21.1 0.19.0 0.18.0 0.20.0 0.21.0
0.SINGLE.V2 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V3 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.O1 0.26.2 0.26.3 0.28.2 0.27.3 0.28.3 0.27.2
0.DEC.H1 0 0 0 1 1 1
0.DOUBLE.V0.0 0 0 1 1 1 1
0.DEC.H3 0 1 0 0 1 1
0.DEC.H0 0 1 0 1 0 1
0.LONG.V5 0 1 0 1 1 0
0.LONG.V3 0 1 1 0 1 1
0.LONG.V4 0 1 1 1 0 1
0.DEC.H2 0 1 1 1 1 0
0.DOUBLE.V1.1 1 1 0 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.OK 0.23.1 0.29.0 0.28.0 0.27.0 0.24.0 0.23.0 0.25.0 0.26.0
0.SINGLE.V3 0 0 1 1 1 1 1 1
0.SINGLE.V4 0 1 0 1 1 1 1 1
0.SINGLE.V5 0 1 1 0 1 1 1 1
0.GCLK0 0 1 1 1 0 1 1 1
0.GCLK1 0 1 1 1 1 0 1 1
0.GCLK2 0 1 1 1 1 1 0 1
0.GCLK3 0 1 1 1 1 1 1 0
0.SINGLE.V2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB0.TS 0.5.4 0.6.4 0.3.4 0.4.4 0.6.5 0.5.5 0.4.5 0.6.6
0.LONG.IO.H3 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 1 0 1 1
0.LONG.IO.H2 0 0 0 1 1 1 0 1
0.IO.DOUBLE.0.N.1 0 0 1 1 1 1 1 1
0.DEC.H2 0 1 0 1 0 0 1 1
0.GCLK0 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.IO.DOUBLE.1.N.2 0 1 1 1 0 1 1 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.LONG.IO.H1 1 1 0 1 1 0 1 1
0.DEC.H3 1 1 0 1 1 1 0 1
0.IO.DOUBLE.0.N.2 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.IK 0.14.1 0.16.0 0.17.0 0.15.0 0.14.0 0.17.1 0.16.1 0.15.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V4 0 1 1 1 1 1 1 0
1.SINGLE.V5 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.O1 0.0.2 0.2.2 0.1.3 0.1.2 0.2.3 0.0.3
0.DEC.H0 0 0 0 1 1 1
0.DEC.H1 0 0 1 0 1 1
0.DEC.H3 0 0 1 1 0 1
1.LONG.V2 0 0 1 1 1 0
1.LONG.V0 0 1 0 1 1 1
0.DEC.H2 0 1 1 0 1 1
1.LONG.V1 0 1 1 1 0 1
1.DOUBLE.V0.1 0 1 1 1 1 0
1.DOUBLE.V1.0 1 0 1 1 1 1
GND 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.OK 0.10.1 0.12.0 0.13.0 0.11.0 0.10.0 0.13.1 0.12.1 0.11.1
0.GCLK0 0 0 1 1 1 1 1 1
0.GCLK1 0 1 0 1 1 1 1 1
0.GCLK2 0 1 1 0 1 1 1 1
0.GCLK3 0 1 1 1 0 1 1 1
1.SINGLE.V2 0 1 1 1 1 0 1 1
1.SINGLE.V3 0 1 1 1 1 1 0 1
1.SINGLE.V5 0 1 1 1 1 1 1 0
1.SINGLE.V4 1 1 1 1 1 1 1 1
INT:MUX.IMUX.IOB1.TS 0.0.5 0.2.5 0.1.4 0.3.5 0.2.4 0.1.5 0.0.4 0.11.4
0.GCLK0 0 0 0 0 1 1 1 1
0.LONG.IO.H0 0 0 0 1 0 1 1 1
0.IO.DOUBLE.0.N.2 0 0 1 1 1 1 1 1
0.DEC.H3 0 1 0 0 1 0 1 1
0.LONG.IO.H3 0 1 0 1 0 0 1 1
0.LONG.IO.H2 0 1 0 1 0 1 0 1
GND 0 1 0 1 1 1 1 0
0.LONG.IO.H1 0 1 1 1 1 0 1 1
0.DEC.H2 0 1 1 1 1 1 0 1
0.IO.DOUBLE.1.N.1 1 1 0 0 1 1 1 1
0.IO.DOUBLE.1.N.2 1 1 0 1 0 1 1 1
0.IO.DOUBLE.0.N.1 1 1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.4 0.8.4 0.7.5 0.8.5
0.IO.DOUBLE.0.N.2 0 0 1 1
0.IO.DOUBLE.2.N.2 0 1 0 1
0.IO.DOUBLE.3.N.2 0 1 1 0
0.IO.DOUBLE.1.N.2 1 1 1 1
INT:MUX.IO.DBUF.H1 0.33.3 0.34.3 0.35.3 0.33.5
0.IO.DOUBLE.1.N.0 0 0 1 1
0.IO.DOUBLE.2.N.0 0 1 0 1
0.IO.DOUBLE.3.N.0 0 1 1 0
0.IO.DOUBLE.0.N.0 1 1 1 1
INT:MUX.LONG.IO.H0 0.4.0 0.16.2
0.LONG.V0 0 0
0.SINGLE.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.23.3 0.15.3 0.18.2 0.16.3
0.LONG.V1 0 0 0 1
0.LONG.V3 0 0 1 0
0.SINGLE.V2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H2 0.22.3 0.20.2 0.21.2 0.22.2
0.LONG.V2 0 0 0 1
0.LONG.V4 0 0 1 0
0.SINGLE.V5 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H3 0.4.1 0.23.2
0.LONG.V5 0 0
0.SINGLE.V6 0 1
NONE 1 1
INT:MUX.LONG.V0 0.26.1 0.27.1 0.29.1 0.28.1
0.LONG.IO.H0 0 0 0 1
0.DEC.H3 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V1 0.35.1 0.33.1 0.34.0 0.34.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V2 0.31.1 0.30.1 0.32.1 0.33.0
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB1.I2.E 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V3 0.6.1 0.6.0 0.7.0 0.7.1
0.LONG.IO.H1 0 0 0 1
0.DEC.H2 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V4 0.5.1 0.1.0 0.2.0 0.2.1
0.LONG.IO.H2 0 0 0 1
0.DEC.H1 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.V5 0.8.1 0.8.0 0.9.1 0.9.0
0.LONG.IO.H3 0 0 0 1
0.DEC.H0 0 0 1 0
0.OUT.BT.IOB0.I2 0 1 1 1
NONE 1 1 1 1
IO0:I1MUX 0.18.6 0.18.5 0.19.6
IO0:I2MUX 0.20.6 0.20.5 0.21.6
IO1:I1MUX 0.15.5 0.16.5 0.16.6
IO1:I2MUX 0.14.6 0.14.5 0.15.6
I 0 0 1
IQL 0 1 0
IQ 1 1 1
IO0:IFF_D 0.21.5
IO1:IFF_D 0.11.6
DELAY 0
I 1
IO0:MUX.OFF_D 0.26.6
IO1:MUX.OFF_D 0.8.6
O 0
CE 1
IO0:OMUX 0.27.6 0.29.6 0.31.6 0.28.6
IO1:OMUX 0.3.6 0.7.6 0.5.6 0.4.6
OFF 0 0 0 1
CE 0 0 1 1
CE.INV 0 1 0 1
O.INV 0 1 1 0
O 1 1 1 1
IO0:PULL 0.22.5 0.23.5
IO1:PULL 0.13.5 0.12.5
PULLUP 0 1
PULLDOWN 1 0
NONE 1 1
IO0:SLEW 0.33.6
IO1:SLEW 0.1.6
FAST 0
SLOW 1