General interconnect

Tile slots

xc5200 tile slots
Slot	Tiles	Bel slots
MAIN	CLB, IO_W, IO_E, IO_S, IO_N, CNR_SW, CNR_SE, CNR_NW, CNR_NE	INT, LC[0], LC[1], LC[2], LC[3], TBUF[0], TBUF[1], TBUF[2], TBUF[3], PROGTIE, IO[0], IO[1], IO[2], IO[3], BUFR, SCANTEST, CIN, COUT, BUFG, CLKIOB, RDBK, STARTUP, BSCAN, OSC_SE, OSC_NE, BYPOSC, BSUPD, MISC_SW, MISC_SE, MISC_NW, MISC_NE
LLH	LLH, LLH_S, LLH_N	LLH
LLV	LLV, LLV_W, LLV_E	LLV

Bel slots

xc5200 bel slots
Slot	Class	Tile slot	Tiles
INT	routing	MAIN	CLB, IO_W, IO_E, IO_S, IO_N, CNR_SW, CNR_SE, CNR_NW, CNR_NE
LC[0]	LC	MAIN	CLB
LC[1]	LC	MAIN	CLB
LC[2]	LC	MAIN	CLB
LC[3]	LC	MAIN	CLB
TBUF[0]	TBUF	MAIN	CLB, IO_W, IO_E, IO_S, IO_N
TBUF[1]	TBUF	MAIN	CLB, IO_W, IO_E, IO_S, IO_N
TBUF[2]	TBUF	MAIN	CLB, IO_W, IO_E, IO_S, IO_N
TBUF[3]	TBUF	MAIN	CLB, IO_W, IO_E, IO_S, IO_N
PROGTIE	PROGTIE	MAIN	CLB
IO[0]	IO	MAIN	IO_W, IO_E, IO_S, IO_N
IO[1]	IO	MAIN	IO_W, IO_E, IO_S, IO_N
IO[2]	IO	MAIN	IO_W, IO_E, IO_S, IO_N
IO[3]	IO	MAIN	IO_W, IO_E, IO_S, IO_N
BUFR	routing	MAIN	IO_W, IO_E, IO_S, IO_N
SCANTEST	SCANTEST	MAIN	IO_S
CIN	CIN	MAIN	IO_S
COUT	COUT	MAIN	IO_N
BUFG	routing	MAIN	CNR_SW, CNR_SE, CNR_NW, CNR_NE
CLKIOB	CLKIOB	MAIN	CNR_SW, CNR_SE, CNR_NW, CNR_NE
RDBK	RDBK	MAIN	CNR_SW
STARTUP	STARTUP	MAIN	CNR_SE
BSCAN	BSCAN	MAIN	CNR_NW
OSC_SE	OSC_SE	MAIN	CNR_SE
OSC_NE	OSC_NE	MAIN	CNR_NE
BYPOSC	BYPOSC	MAIN	CNR_NE
BSUPD	BSUPD	MAIN	CNR_NE
MISC_SW	MISC_SW	MAIN	CNR_SW
MISC_SE	MISC_SE	MAIN	CNR_SE
MISC_NW	MISC_NW	MAIN	CNR_NW
MISC_NE	MISC_NE	MAIN	CNR_NE
LLH	routing	LLH	LLH, LLH_S, LLH_N
LLV	routing	LLV	LLV, LLV_W, LLV_E

Connector slots

xc5200 connector slots
Slot	Opposite	Connectors
W	E	PASS_W, CNR_SW
E	W	PASS_E, CNR_NE
S	N	PASS_S, CNR_SE
N	S	PASS_N, CNR_NW

Region slots

xc5200 region slots
Slot	Wires
GCLK_H	GCLK_W, GCLK_E, GCLK_SE, GCLK_NW
GCLK_V	GCLK_S, GCLK_N, GCLK_SW, GCLK_NE
LONG_H	LONG_H[0], LONG_H[1], LONG_H[2], LONG_H[3], LONG_H[4], LONG_H[5], LONG_H[6], LONG_H[7]
LONG_V	LONG_V[0], LONG_V[1], LONG_V[2], LONG_V[3], LONG_V[4], LONG_V[5], LONG_V[6], LONG_V[7]

Wires

xc5200 wires
Wire	Kind
TIE_0	tie 0
CLB_M[0]	mux
CLB_M[1]	mux
CLB_M[2]	mux
CLB_M[3]	mux
CLB_M[4]	mux
CLB_M[5]	mux
CLB_M[6]	mux
CLB_M[7]	mux
CLB_M[8]	mux
CLB_M[9]	mux
CLB_M[10]	mux
CLB_M[11]	mux
CLB_M[12]	mux
CLB_M[13]	mux
CLB_M[14]	mux
CLB_M[15]	mux
CLB_M[16]	mux
CLB_M[17]	mux
CLB_M[18]	mux
CLB_M[19]	mux
CLB_M[20]	mux
CLB_M[21]	mux
CLB_M[22]	mux
CLB_M[23]	mux
CLB_M_BUF[0]	mux
CLB_M_BUF[1]	mux
CLB_M_BUF[2]	mux
CLB_M_BUF[3]	mux
CLB_M_BUF[4]	mux
CLB_M_BUF[5]	mux
CLB_M_BUF[6]	mux
CLB_M_BUF[7]	mux
CLB_M_BUF[8]	mux
CLB_M_BUF[9]	mux
CLB_M_BUF[10]	mux
CLB_M_BUF[11]	mux
CLB_M_BUF[12]	mux
CLB_M_BUF[13]	mux
CLB_M_BUF[14]	mux
CLB_M_BUF[15]	mux
CLB_M_BUF[16]	mux
CLB_M_BUF[17]	mux
CLB_M_BUF[18]	mux
CLB_M_BUF[19]	mux
CLB_M_BUF[20]	mux
CLB_M_BUF[21]	mux
CLB_M_BUF[22]	mux
CLB_M_BUF[23]	mux
IO_M[0]	mux
IO_M[1]	mux
IO_M[2]	mux
IO_M[3]	mux
IO_M[4]	mux
IO_M[5]	mux
IO_M[6]	mux
IO_M[7]	mux
IO_M[8]	mux
IO_M[9]	mux
IO_M[10]	mux
IO_M[11]	mux
IO_M[12]	mux
IO_M[13]	mux
IO_M[14]	mux
IO_M[15]	mux
IO_M_BUF[0]	mux
IO_M_BUF[1]	mux
IO_M_BUF[2]	mux
IO_M_BUF[3]	mux
IO_M_BUF[4]	mux
IO_M_BUF[5]	mux
IO_M_BUF[6]	mux
IO_M_BUF[7]	mux
IO_M_BUF[8]	mux
IO_M_BUF[9]	mux
IO_M_BUF[10]	mux
IO_M_BUF[11]	mux
IO_M_BUF[12]	mux
IO_M_BUF[13]	mux
IO_M_BUF[14]	mux
IO_M_BUF[15]	mux
SINGLE_E[0]	multi_root
SINGLE_E[1]	multi_root
SINGLE_E[2]	multi_root
SINGLE_E[3]	multi_root
SINGLE_E[4]	multi_root
SINGLE_E[5]	multi_root
SINGLE_E[6]	multi_root
SINGLE_E[7]	multi_root
SINGLE_E[8]	multi_root
SINGLE_E[9]	multi_root
SINGLE_E[10]	multi_root
SINGLE_E[11]	multi_root
SINGLE_W[0]	multi_branch W
SINGLE_W[1]	multi_branch W
SINGLE_W[2]	multi_branch W
SINGLE_W[3]	multi_branch W
SINGLE_W[4]	multi_branch W
SINGLE_W[5]	multi_branch W
SINGLE_W[6]	multi_branch W
SINGLE_W[7]	multi_branch W
SINGLE_W[8]	multi_branch W
SINGLE_W[9]	multi_branch W
SINGLE_W[10]	multi_branch W
SINGLE_W[11]	multi_branch W
SINGLE_S[0]	multi_root
SINGLE_S[1]	multi_root
SINGLE_S[2]	multi_root
SINGLE_S[3]	multi_root
SINGLE_S[4]	multi_root
SINGLE_S[5]	multi_root
SINGLE_S[6]	multi_root
SINGLE_S[7]	multi_root
SINGLE_S[8]	multi_root
SINGLE_S[9]	multi_root
SINGLE_S[10]	multi_root
SINGLE_S[11]	multi_root
SINGLE_N[0]	multi_branch N
SINGLE_N[1]	multi_branch N
SINGLE_N[2]	multi_branch N
SINGLE_N[3]	multi_branch N
SINGLE_N[4]	multi_branch N
SINGLE_N[5]	multi_branch N
SINGLE_N[6]	multi_branch N
SINGLE_N[7]	multi_branch N
SINGLE_N[8]	multi_branch N
SINGLE_N[9]	multi_branch N
SINGLE_N[10]	multi_branch N
SINGLE_N[11]	multi_branch N
SINGLE_IO_S_W[0]	multi_branch W
SINGLE_IO_S_W[1]	multi_branch W
SINGLE_IO_S_W[2]	multi_branch W
SINGLE_IO_S_W[3]	multi_branch W
SINGLE_IO_S_W[4]	multi_branch W
SINGLE_IO_S_W[5]	multi_branch W
SINGLE_IO_S_W[6]	multi_branch W
SINGLE_IO_S_W[7]	multi_branch W
SINGLE_IO_S_E[0]	multi_branch W
SINGLE_IO_S_E[1]	multi_branch W
SINGLE_IO_S_E[2]	multi_branch W
SINGLE_IO_S_E[3]	multi_branch W
SINGLE_IO_S_E[4]	multi_branch W
SINGLE_IO_S_E[5]	multi_branch W
SINGLE_IO_S_E[6]	multi_branch W
SINGLE_IO_S_E[7]	multi_branch W
SINGLE_IO_E_N[0]	multi_branch S
SINGLE_IO_E_N[1]	multi_branch S
SINGLE_IO_E_N[2]	multi_branch S
SINGLE_IO_E_N[3]	multi_branch S
SINGLE_IO_E_N[4]	multi_branch S
SINGLE_IO_E_N[5]	multi_branch S
SINGLE_IO_E_N[6]	multi_branch S
SINGLE_IO_E_N[7]	multi_branch S
SINGLE_IO_E_S[0]	multi_branch S
SINGLE_IO_E_S[1]	multi_branch S
SINGLE_IO_E_S[2]	multi_branch S
SINGLE_IO_E_S[3]	multi_branch S
SINGLE_IO_E_S[4]	multi_branch S
SINGLE_IO_E_S[5]	multi_branch S
SINGLE_IO_E_S[6]	multi_branch S
SINGLE_IO_E_S[7]	multi_branch S
SINGLE_IO_N_W[0]	multi_branch E
SINGLE_IO_N_W[1]	multi_branch E
SINGLE_IO_N_W[2]	multi_branch E
SINGLE_IO_N_W[3]	multi_branch E
SINGLE_IO_N_W[4]	multi_branch E
SINGLE_IO_N_W[5]	multi_branch E
SINGLE_IO_N_W[6]	multi_branch E
SINGLE_IO_N_W[7]	multi_branch E
SINGLE_IO_N_E[0]	multi_branch E
SINGLE_IO_N_E[1]	multi_branch E
SINGLE_IO_N_E[2]	multi_branch E
SINGLE_IO_N_E[3]	multi_branch E
SINGLE_IO_N_E[4]	multi_branch E
SINGLE_IO_N_E[5]	multi_branch E
SINGLE_IO_N_E[6]	multi_branch E
SINGLE_IO_N_E[7]	multi_branch E
SINGLE_IO_W_N[0]	multi_branch N
SINGLE_IO_W_N[1]	multi_branch N
SINGLE_IO_W_N[2]	multi_branch N
SINGLE_IO_W_N[3]	multi_branch N
SINGLE_IO_W_N[4]	multi_branch N
SINGLE_IO_W_N[5]	multi_branch N
SINGLE_IO_W_N[6]	multi_branch N
SINGLE_IO_W_N[7]	multi_branch N
SINGLE_IO_W_S[0]	multi_branch N
SINGLE_IO_W_S[1]	multi_branch N
SINGLE_IO_W_S[2]	multi_branch N
SINGLE_IO_W_S[3]	multi_branch N
SINGLE_IO_W_S[4]	multi_branch N
SINGLE_IO_W_S[5]	multi_branch N
SINGLE_IO_W_S[6]	multi_branch N
SINGLE_IO_W_S[7]	multi_branch N
DBL_H_W[0]	multi_branch E
DBL_H_W[1]	multi_branch E
DBL_H_M[0]	multi_root
DBL_H_M[1]	multi_root
DBL_H_E[0]	multi_branch W
DBL_H_E[1]	multi_branch W
DBL_V_S[0]	multi_branch N
DBL_V_S[1]	multi_branch N
DBL_V_M[0]	multi_root
DBL_V_M[1]	multi_root
DBL_V_N[0]	multi_branch S
DBL_V_N[1]	multi_branch S
LONG_H[0]	regional LONG_H
LONG_H[1]	regional LONG_H
LONG_H[2]	regional LONG_H
LONG_H[3]	regional LONG_H
LONG_H[4]	regional LONG_H
LONG_H[5]	regional LONG_H
LONG_H[6]	regional LONG_H
LONG_H[7]	regional LONG_H
LONG_V[0]	regional LONG_V
LONG_V[1]	regional LONG_V
LONG_V[2]	regional LONG_V
LONG_V[3]	regional LONG_V
LONG_V[4]	regional LONG_V
LONG_V[5]	regional LONG_V
LONG_V[6]	regional LONG_V
LONG_V[7]	regional LONG_V
GCLK_W	regional GCLK_H
GCLK_E	regional GCLK_H
GCLK_S	regional GCLK_V
GCLK_N	regional GCLK_V
GCLK_SW	regional GCLK_V
GCLK_SE	regional GCLK_H
GCLK_NW	regional GCLK_H
GCLK_NE	regional GCLK_V
OMUX[0]	mux
OMUX[1]	mux
OMUX[2]	mux
OMUX[3]	mux
OMUX[4]	mux
OMUX[5]	mux
OMUX[6]	mux
OMUX[7]	mux
OMUX_BUF[0]	mux
OMUX_BUF[1]	mux
OMUX_BUF[2]	mux
OMUX_BUF[3]	mux
OMUX_BUF[4]	mux
OMUX_BUF[5]	mux
OMUX_BUF[6]	mux
OMUX_BUF[7]	mux
OMUX_BUF_W[0]	branch E
OMUX_BUF_W[1]	branch E
OMUX_BUF_W[2]	branch E
OMUX_BUF_W[3]	branch E
OMUX_BUF_E[0]	branch W
OMUX_BUF_E[1]	branch W
OMUX_BUF_E[2]	branch W
OMUX_BUF_E[3]	branch W
OMUX_BUF_S[0]	branch N
OMUX_BUF_S[1]	branch N
OMUX_BUF_S[2]	branch N
OMUX_BUF_S[3]	branch N
OMUX_BUF_N[0]	branch S
OMUX_BUF_N[1]	branch S
OMUX_BUF_N[2]	branch S
OMUX_BUF_N[3]	branch S
OUT_LC_X[0]	bel
OUT_LC_X[1]	bel
OUT_LC_X[2]	bel
OUT_LC_X[3]	bel
OUT_LC_Q[0]	bel
OUT_LC_Q[1]	bel
OUT_LC_Q[2]	bel
OUT_LC_Q[3]	bel
OUT_LC_DO[0]	bel
OUT_LC_DO[1]	bel
OUT_LC_DO[2]	bel
OUT_LC_DO[3]	bel
OUT_TBUF[0]	bel
OUT_TBUF[1]	bel
OUT_TBUF[2]	bel
OUT_TBUF[3]	bel
OUT_PROGTIE	bel
OUT_IO_I[0]	bel
OUT_IO_I[1]	bel
OUT_IO_I[2]	bel
OUT_IO_I[3]	bel
OUT_CLKIOB	bel
OUT_RDBK_RIP	bel
OUT_RDBK_DATA	bel
OUT_STARTUP_DONEIN	bel
OUT_STARTUP_Q1Q4	bel
OUT_STARTUP_Q2	bel
OUT_STARTUP_Q3	bel
OUT_BSCAN_DRCK	bel
OUT_BSCAN_IDLE	bel
OUT_BSCAN_RESET	bel
OUT_BSCAN_SEL1	bel
OUT_BSCAN_SEL2	bel
OUT_BSCAN_SHIFT	bel
OUT_BSCAN_UPDATE	bel
OUT_BSUPD	bel
OUT_OSC_OSC1	bel
OUT_OSC_OSC2	bel
OUT_TOP_COUT	bel
IMUX_LC_F1[0]	mux
IMUX_LC_F1[1]	mux
IMUX_LC_F1[2]	mux
IMUX_LC_F1[3]	mux
IMUX_LC_F2[0]	mux
IMUX_LC_F2[1]	mux
IMUX_LC_F2[2]	mux
IMUX_LC_F2[3]	mux
IMUX_LC_F3[0]	mux
IMUX_LC_F3[1]	mux
IMUX_LC_F3[2]	mux
IMUX_LC_F3[3]	mux
IMUX_LC_F4[0]	mux
IMUX_LC_F4[1]	mux
IMUX_LC_F4[2]	mux
IMUX_LC_F4[3]	mux
IMUX_LC_DI[0]	mux
IMUX_LC_DI[1]	mux
IMUX_LC_DI[2]	mux
IMUX_LC_DI[3]	mux
IMUX_CLB_CE	mux
IMUX_CLB_CLK	mux
IMUX_CLB_RST	mux
IMUX_TS	mux
IMUX_GIN	mux
IMUX_IO_O[0]	mux
IMUX_IO_O[1]	mux
IMUX_IO_O[2]	mux
IMUX_IO_O[3]	mux
IMUX_IO_O_SN[0]	mux
IMUX_IO_O_SN[1]	mux
IMUX_IO_O_SN[2]	mux
IMUX_IO_O_SN[3]	mux
IMUX_IO_T[0]	mux
IMUX_IO_T[1]	mux
IMUX_IO_T[2]	mux
IMUX_IO_T[3]	mux
IMUX_RDBK_RCLK	mux
IMUX_RDBK_TRIG	mux
IMUX_STARTUP_SCLK	mux
IMUX_STARTUP_GRST	mux
IMUX_STARTUP_GTS	mux
IMUX_BSCAN_TDO1	mux
IMUX_BSCAN_TDO2	mux
IMUX_OSC_OCLK	mux
IMUX_BYPOSC_PUMP	mux
IMUX_BUFG	mux
IMUX_BOT_CIN	mux

Connectors — W

xc5200 wires
Wire	PASS_W	CNR_SW
SINGLE_W[0]	→ SINGLE_E[0]	-
SINGLE_W[1]	→ SINGLE_E[1]	-
SINGLE_W[2]	→ SINGLE_E[2]	-
SINGLE_W[3]	→ SINGLE_E[3]	-
SINGLE_W[4]	→ SINGLE_E[4]	-
SINGLE_W[5]	→ SINGLE_E[5]	-
SINGLE_W[6]	→ SINGLE_E[6]	-
SINGLE_W[7]	→ SINGLE_E[7]	-
SINGLE_W[8]	→ SINGLE_E[8]	-
SINGLE_W[9]	→ SINGLE_E[9]	-
SINGLE_W[10]	→ SINGLE_E[10]	-
SINGLE_W[11]	→ SINGLE_E[11]	-
SINGLE_IO_S_W[0]	→ SINGLE_IO_S_E[0]	-
SINGLE_IO_S_W[1]	→ SINGLE_IO_S_E[1]	-
SINGLE_IO_S_W[2]	→ SINGLE_IO_S_E[2]	-
SINGLE_IO_S_W[3]	→ SINGLE_IO_S_E[3]	-
SINGLE_IO_S_W[4]	→ SINGLE_IO_S_E[4]	-
SINGLE_IO_S_W[5]	→ SINGLE_IO_S_E[5]	-
SINGLE_IO_S_W[6]	→ SINGLE_IO_S_E[6]	-
SINGLE_IO_S_W[7]	→ SINGLE_IO_S_E[7]	-
SINGLE_IO_S_E[0]	-	← SINGLE_IO_W_N[0]
SINGLE_IO_S_E[1]	-	← SINGLE_IO_W_N[1]
SINGLE_IO_S_E[2]	-	← SINGLE_IO_W_N[2]
SINGLE_IO_S_E[3]	-	← SINGLE_IO_W_N[3]
SINGLE_IO_S_E[4]	-	← SINGLE_IO_W_N[4]
SINGLE_IO_S_E[5]	-	← SINGLE_IO_W_N[5]
SINGLE_IO_S_E[6]	-	← SINGLE_IO_W_N[6]
SINGLE_IO_S_E[7]	-	← SINGLE_IO_W_N[7]
DBL_H_E[0]	→ DBL_H_M[0]	-
DBL_H_E[1]	→ DBL_H_M[1]	-
OMUX_BUF_E[0]	→ OMUX_BUF[0]	-
OMUX_BUF_E[1]	→ OMUX_BUF[1]	-
OMUX_BUF_E[2]	→ OMUX_BUF[2]	-
OMUX_BUF_E[3]	→ OMUX_BUF[3]	-

Connectors — E

xc5200 wires
Wire	PASS_E	CNR_NE
SINGLE_IO_N_W[0]	-	← SINGLE_IO_E_S[0]
SINGLE_IO_N_W[1]	-	← SINGLE_IO_E_S[1]
SINGLE_IO_N_W[2]	-	← SINGLE_IO_E_S[2]
SINGLE_IO_N_W[3]	-	← SINGLE_IO_E_S[3]
SINGLE_IO_N_W[4]	-	← SINGLE_IO_E_S[4]
SINGLE_IO_N_W[5]	-	← SINGLE_IO_E_S[5]
SINGLE_IO_N_W[6]	-	← SINGLE_IO_E_S[6]
SINGLE_IO_N_W[7]	-	← SINGLE_IO_E_S[7]
SINGLE_IO_N_E[0]	→ SINGLE_IO_N_W[0]	-
SINGLE_IO_N_E[1]	→ SINGLE_IO_N_W[1]	-
SINGLE_IO_N_E[2]	→ SINGLE_IO_N_W[2]	-
SINGLE_IO_N_E[3]	→ SINGLE_IO_N_W[3]	-
SINGLE_IO_N_E[4]	→ SINGLE_IO_N_W[4]	-
SINGLE_IO_N_E[5]	→ SINGLE_IO_N_W[5]	-
SINGLE_IO_N_E[6]	→ SINGLE_IO_N_W[6]	-
SINGLE_IO_N_E[7]	→ SINGLE_IO_N_W[7]	-
DBL_H_W[0]	→ DBL_H_M[0]	-
DBL_H_W[1]	→ DBL_H_M[1]	-
OMUX_BUF_W[0]	→ OMUX_BUF[0]	-
OMUX_BUF_W[1]	→ OMUX_BUF[1]	-
OMUX_BUF_W[2]	→ OMUX_BUF[2]	-
OMUX_BUF_W[3]	→ OMUX_BUF[3]	-

Connectors — S

xc5200 wires
Wire	PASS_S	CNR_SE
SINGLE_IO_E_N[0]	-	← SINGLE_IO_S_W[0]
SINGLE_IO_E_N[1]	-	← SINGLE_IO_S_W[1]
SINGLE_IO_E_N[2]	-	← SINGLE_IO_S_W[2]
SINGLE_IO_E_N[3]	-	← SINGLE_IO_S_W[3]
SINGLE_IO_E_N[4]	-	← SINGLE_IO_S_W[4]
SINGLE_IO_E_N[5]	-	← SINGLE_IO_S_W[5]
SINGLE_IO_E_N[6]	-	← SINGLE_IO_S_W[6]
SINGLE_IO_E_N[7]	-	← SINGLE_IO_S_W[7]
SINGLE_IO_E_S[0]	→ SINGLE_IO_E_N[0]	-
SINGLE_IO_E_S[1]	→ SINGLE_IO_E_N[1]	-
SINGLE_IO_E_S[2]	→ SINGLE_IO_E_N[2]	-
SINGLE_IO_E_S[3]	→ SINGLE_IO_E_N[3]	-
SINGLE_IO_E_S[4]	→ SINGLE_IO_E_N[4]	-
SINGLE_IO_E_S[5]	→ SINGLE_IO_E_N[5]	-
SINGLE_IO_E_S[6]	→ SINGLE_IO_E_N[6]	-
SINGLE_IO_E_S[7]	→ SINGLE_IO_E_N[7]	-
DBL_V_N[0]	→ DBL_V_M[0]	-
DBL_V_N[1]	→ DBL_V_M[1]	-
OMUX_BUF_N[0]	→ OMUX_BUF[0]	-
OMUX_BUF_N[1]	→ OMUX_BUF[1]	-
OMUX_BUF_N[2]	→ OMUX_BUF[2]	-
OMUX_BUF_N[3]	→ OMUX_BUF[3]	-

Connectors — N

xc5200 wires
Wire	PASS_N	CNR_NW
SINGLE_N[0]	→ SINGLE_S[0]	-
SINGLE_N[1]	→ SINGLE_S[1]	-
SINGLE_N[2]	→ SINGLE_S[2]	-
SINGLE_N[3]	→ SINGLE_S[3]	-
SINGLE_N[4]	→ SINGLE_S[4]	-
SINGLE_N[5]	→ SINGLE_S[5]	-
SINGLE_N[6]	→ SINGLE_S[6]	-
SINGLE_N[7]	→ SINGLE_S[7]	-
SINGLE_N[8]	→ SINGLE_S[8]	-
SINGLE_N[9]	→ SINGLE_S[9]	-
SINGLE_N[10]	→ SINGLE_S[10]	-
SINGLE_N[11]	→ SINGLE_S[11]	-
SINGLE_IO_W_N[0]	→ SINGLE_IO_W_S[0]	-
SINGLE_IO_W_N[1]	→ SINGLE_IO_W_S[1]	-
SINGLE_IO_W_N[2]	→ SINGLE_IO_W_S[2]	-
SINGLE_IO_W_N[3]	→ SINGLE_IO_W_S[3]	-
SINGLE_IO_W_N[4]	→ SINGLE_IO_W_S[4]	-
SINGLE_IO_W_N[5]	→ SINGLE_IO_W_S[5]	-
SINGLE_IO_W_N[6]	→ SINGLE_IO_W_S[6]	-
SINGLE_IO_W_N[7]	→ SINGLE_IO_W_S[7]	-
SINGLE_IO_W_S[0]	-	← SINGLE_IO_N_E[0]
SINGLE_IO_W_S[1]	-	← SINGLE_IO_N_E[1]
SINGLE_IO_W_S[2]	-	← SINGLE_IO_N_E[2]
SINGLE_IO_W_S[3]	-	← SINGLE_IO_N_E[3]
SINGLE_IO_W_S[4]	-	← SINGLE_IO_N_E[4]
SINGLE_IO_W_S[5]	-	← SINGLE_IO_N_E[5]
SINGLE_IO_W_S[6]	-	← SINGLE_IO_N_E[6]
SINGLE_IO_W_S[7]	-	← SINGLE_IO_N_E[7]
DBL_V_S[0]	→ DBL_V_M[0]	-
DBL_V_S[1]	→ DBL_V_M[1]	-
OMUX_BUF_S[0]	→ OMUX_BUF[0]	-
OMUX_BUF_S[1]	→ OMUX_BUF[1]	-
OMUX_BUF_S[2]	→ OMUX_BUF[2]	-
OMUX_BUF_S[3]	→ OMUX_BUF[3]	-

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