Cells: 1
xp2 CONFIG bel JTAG
| Pin | Direction | Wires |
|---|
| JCE1 | output | OUT_Q1 |
| JCE2 | output | OUT_Q2 |
| JRSTN | output | OUT_Q0 |
| JRTI1 | output | OUT_F1 |
| JRTI2 | output | OUT_F2 |
| JSHIFT | output | OUT_F4 |
| JTCK | output | OUT_F0 |
| JTDI | output | OUT_F3 |
| JTDO1 | input | IMUX_A0 |
| JTDO2 | input | IMUX_B0 |
| JUPDATE | output | OUT_F5 |
xp2 CONFIG bel SED
| Pin | Direction | Wires |
|---|
| SEDCLKOUT | output | OUT_Q5 |
| SEDDONE | output | OUT_Q3 |
| SEDENABLE | input | IMUX_CE2 |
| SEDERR | output | OUT_Q4 |
| SEDFRCERR | input | IMUX_CLK0 |
| SEDINPROG | output | OUT_Q6 |
| SEDSTART | input | IMUX_CE0 |
xp2 CONFIG bel wires
| Wire | Pins |
|---|
| IMUX_A0 | JTAG.JTDO1 |
| IMUX_B0 | JTAG.JTDO2 |
| IMUX_CLK0 | SED.SEDFRCERR |
| IMUX_CE0 | SED.SEDSTART |
| IMUX_CE2 | SED.SEDENABLE |
| OUT_F0 | JTAG.JTCK |
| OUT_F1 | JTAG.JRTI1 |
| OUT_F2 | JTAG.JRTI2 |
| OUT_F3 | JTAG.JTDI |
| OUT_F4 | JTAG.JSHIFT |
| OUT_F5 | JTAG.JUPDATE |
| OUT_Q0 | JTAG.JRSTN |
| OUT_Q1 | JTAG.JCE1 |
| OUT_Q2 | JTAG.JCE2 |
| OUT_Q3 | SED.SEDDONE |
| OUT_Q4 | SED.SEDERR |
| OUT_Q5 | SED.SEDCLKOUT |
| OUT_Q6 | SED.SEDINPROG |
Cells: 1
xp2 OSC bel OSC
| Pin | Direction | Wires |
|---|
| CFGCLK | output | OUT_F6 |
xp2 OSC bel wires
| Wire | Pins |
|---|
| OUT_F6 | OSC.CFGCLK |