TODO: document
Cells: 1
IRIs: 0
fpgacore UR.FC bel BSCAN
Pin | Direction | Wires |
CAPTURE | output | OUT.FAN7 |
DRCK1 | output | OUT.FAN0 |
DRCK2 | output | OUT.FAN1 |
RESET | output | OUT.SEC11 |
SEL1 | output | OUT.FAN2 |
SEL2 | output | OUT.FAN3 |
SHIFT | output | OUT.FAN4 |
TDI | output | OUT.FAN5 |
TDO1 | input | IMUX.DATA0 |
TDO2 | input | IMUX.DATA1 |
UPDATE | output | OUT.FAN6 |
fpgacore UR.FC bel RANDOR_OUT
Pin | Direction | Wires |
O | output | OUT.SEC15 |
fpgacore UR.FC bel MISR
Pin | Direction | Wires |
CLK | input | IMUX.CLK3 |
fpgacore UR.FC bel wires
Wire | Pins |
IMUX.CLK3 | MISR.CLK |
IMUX.DATA0 | BSCAN.TDO1 |
IMUX.DATA1 | BSCAN.TDO2 |
OUT.FAN0 | BSCAN.DRCK1 |
OUT.FAN1 | BSCAN.DRCK2 |
OUT.FAN2 | BSCAN.SEL1 |
OUT.FAN3 | BSCAN.SEL2 |
OUT.FAN4 | BSCAN.SHIFT |
OUT.FAN5 | BSCAN.TDI |
OUT.FAN6 | BSCAN.UPDATE |
OUT.FAN7 | BSCAN.CAPTURE |
OUT.SEC11 | BSCAN.RESET |
OUT.SEC15 | RANDOR_OUT.O |
BSCAN:TDO_ENABLE |
0.1.16 |
0.0.16 |
non-inverted
|
[1] |
[0] |
BSCAN:USERID |
0.0.17 |
0.1.17 |
0.1.18 |
0.0.18 |
0.0.19 |
0.1.19 |
0.1.20 |
0.0.20 |
0.0.21 |
0.1.21 |
0.0.22 |
0.1.22 |
0.0.23 |
0.1.23 |
0.0.24 |
0.1.24 |
0.0.25 |
0.1.25 |
0.0.26 |
0.1.26 |
0.0.27 |
0.1.27 |
0.0.28 |
0.1.28 |
0.0.29 |
0.1.29 |
0.0.30 |
0.1.30 |
0.0.31 |
0.1.31 |
0.0.32 |
0.1.32 |
inverted
|
~[31] |
~[30] |
~[29] |
~[28] |
~[27] |
~[26] |
~[25] |
~[24] |
~[23] |
~[22] |
~[21] |
~[20] |
~[19] |
~[18] |
~[17] |
~[16] |
~[15] |
~[14] |
~[13] |
~[12] |
~[11] |
~[10] |
~[9] |
~[8] |
~[7] |
~[6] |
~[5] |
~[4] |
~[3] |
~[2] |
~[1] |
~[0] |
MISC:MISR_CLOCK |
0.0.1 |
MISC:MISR_RESET |
0.0.0 |
non-inverted
|
[0] |