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TODO: document

CNR_NE_S3

This tile is used on Spartan 3.

Tile CNR_NE_S3

Cells: 1

Bel DCI[0]

spartan3 CNR_NE_S3 bel DCI[0]
PinDirectionWires
ADDRESS0outputOUT_SEC[0]
ADDRESS1outputOUT_SEC[1]
ADDRESS2outputOUT_SEC[2]
DATAoutputOUT_SEC[3]
DCI_CLKinputIMUX_DATA[23]
DCI_DONEoutputOUT_SEC[4]
DCI_RESETinputIMUX_DATA[22]
HI_LO_NinputIMUX_DATA[21]
HI_LO_PinputIMUX_DATA[20]
IOUPDATEoutputOUT_SEC[8]
N_OR_PoutputOUT_SEC[5]
SCLKoutputOUT_SEC[6]
UPDATEoutputOUT_SEC[7]

Bel DCI[1]

spartan3 CNR_NE_S3 bel DCI[1]
PinDirectionWires
ADDRESS0outputOUT_SEC[0]
ADDRESS1outputOUT_SEC[1]
ADDRESS2outputOUT_SEC[2]
DATAoutputOUT_SEC[3]
DCI_CLKinputIMUX_DATA[15]
DCI_DONEoutputOUT_SEC[4]
DCI_RESETinputIMUX_DATA[14]
HI_LO_NinputIMUX_DATA[13]
HI_LO_PinputIMUX_DATA[12]
IOUPDATEoutputOUT_SEC[8]
N_OR_PoutputOUT_SEC[5]
SCLKoutputOUT_SEC[6]
UPDATEoutputOUT_SEC[7]

Bel DCIRESET[0]

spartan3 CNR_NE_S3 bel DCIRESET[0]
PinDirectionWires
RSTinputIMUX_DATA[11]

Bel DCIRESET[1]

spartan3 CNR_NE_S3 bel DCIRESET[1]
PinDirectionWires
RSTinputIMUX_DATA[19]

Bel BSCAN

spartan3 CNR_NE_S3 bel BSCAN
PinDirectionWires
CAPTUREoutputOUT_FAN[7]
DRCK1outputOUT_FAN[0]
DRCK2outputOUT_FAN[1]
RESEToutputOUT_SEC[11]
SEL1outputOUT_FAN[2]
SEL2outputOUT_FAN[3]
SHIFToutputOUT_FAN[4]
TDIoutputOUT_FAN[5]
TDO1inputIMUX_DATA[0]
TDO2inputIMUX_DATA[1]
UPDATEoutputOUT_FAN[6]

Bel RANDOR_OUT

spartan3 CNR_NE_S3 bel RANDOR_OUT
PinDirectionWires
OoutputOUT_SEC[15]

Bel wires

spartan3 CNR_NE_S3 bel wires
WirePins
IMUX_DATA[0]BSCAN.TDO1
IMUX_DATA[1]BSCAN.TDO2
IMUX_DATA[11]DCIRESET[0].RST
IMUX_DATA[12]DCI[1].HI_LO_P
IMUX_DATA[13]DCI[1].HI_LO_N
IMUX_DATA[14]DCI[1].DCI_RESET
IMUX_DATA[15]DCI[1].DCI_CLK
IMUX_DATA[19]DCIRESET[1].RST
IMUX_DATA[20]DCI[0].HI_LO_P
IMUX_DATA[21]DCI[0].HI_LO_N
IMUX_DATA[22]DCI[0].DCI_RESET
IMUX_DATA[23]DCI[0].DCI_CLK
OUT_FAN[0]BSCAN.DRCK1
OUT_FAN[1]BSCAN.DRCK2
OUT_FAN[2]BSCAN.SEL1
OUT_FAN[3]BSCAN.SEL2
OUT_FAN[4]BSCAN.SHIFT
OUT_FAN[5]BSCAN.TDI
OUT_FAN[6]BSCAN.UPDATE
OUT_FAN[7]BSCAN.CAPTURE
OUT_SEC[0]DCI[0].ADDRESS0, DCI[1].ADDRESS0
OUT_SEC[1]DCI[0].ADDRESS1, DCI[1].ADDRESS1
OUT_SEC[2]DCI[0].ADDRESS2, DCI[1].ADDRESS2
OUT_SEC[3]DCI[0].DATA, DCI[1].DATA
OUT_SEC[4]DCI[0].DCI_DONE, DCI[1].DCI_DONE
OUT_SEC[5]DCI[0].N_OR_P, DCI[1].N_OR_P
OUT_SEC[6]DCI[0].SCLK, DCI[1].SCLK
OUT_SEC[7]DCI[0].UPDATE, DCI[1].UPDATE
OUT_SEC[8]DCI[0].IOUPDATE, DCI[1].IOUPDATE
OUT_SEC[11]BSCAN.RESET
OUT_SEC[15]RANDOR_OUT.O

Bitstream

spartan3 CNR_NE_S3 rect TERM_H
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 CNR_NE_S3 rect R0
BitFrame
F0 F1
B63 DCIRESET[0]:ENABLE DCIRESET[1]:ENABLE
B62 DCI[0]:TEST_ENABLE DCI[1]:TEST_ENABLE
B61 DCI[0]:FORCE_DONE_HIGH DCI[1]:FORCE_DONE_HIGH
B60 - -
B59 DCI[0]:PMASK_TERM_SPLIT[3] DCI[1]:PMASK_TERM_SPLIT[3]
B58 DCI[0]:PMASK_TERM_SPLIT[2] DCI[1]:PMASK_TERM_SPLIT[2]
B57 DCI[0]:PMASK_TERM_SPLIT[1] DCI[1]:PMASK_TERM_SPLIT[1]
B56 DCI[0]:PMASK_TERM_SPLIT[0] DCI[1]:PMASK_TERM_SPLIT[0]
B55 - -
B54 DCI[0]:PMASK_TERM_VCC[3] DCI[1]:PMASK_TERM_VCC[3]
B53 DCI[0]:PMASK_TERM_VCC[2] DCI[1]:PMASK_TERM_VCC[2]
B52 DCI[0]:PMASK_TERM_VCC[1] DCI[1]:PMASK_TERM_VCC[1]
B51 DCI[0]:PMASK_TERM_VCC[0] DCI[1]:PMASK_TERM_VCC[0]
B50 MISC:DCI_TEST_MUX[0] -
B49 DCI[0]:NMASK_TERM_SPLIT[3] DCI[1]:NMASK_TERM_SPLIT[3]
B48 DCI[0]:NMASK_TERM_SPLIT[2] DCI[1]:NMASK_TERM_SPLIT[2]
B47 DCI[0]:NMASK_TERM_SPLIT[1] DCI[1]:NMASK_TERM_SPLIT[1]
B46 DCI[0]:NMASK_TERM_SPLIT[0] DCI[1]:NMASK_TERM_SPLIT[0]
B45 DCI[0]:QUIET DCI[1]:QUIET
B44 DCI[0]:ENABLE DCI[1]:ENABLE
B43 DCI[0]:LVDSBIAS[2] DCI[1]:LVDSBIAS[2]
B42 DCI[0]:LVDSBIAS[3] DCI[1]:LVDSBIAS[3]
B41 DCI[0]:LVDSBIAS[4] DCI[1]:LVDSBIAS[4]
B40 DCI[0]:LVDSBIAS[5] DCI[1]:LVDSBIAS[5]
B39 DCI[0]:LVDSBIAS[6] DCI[1]:LVDSBIAS[6]
B38 DCI[0]:LVDSBIAS[7] DCI[1]:LVDSBIAS[7]
B37 DCI[0]:LVDSBIAS[8] DCI[1]:LVDSBIAS[8]
B36 DCI[0]:LVDSBIAS[9] DCI[1]:LVDSBIAS[9]
B35 DCI[0]:LVDSBIAS[10] DCI[1]:LVDSBIAS[10]
B34 DCI[0]:LVDSBIAS[11] DCI[1]:LVDSBIAS[11]
B33 DCI[0]:LVDSBIAS[12] DCI[1]:LVDSBIAS[12]
B32 ~BSCAN:USERID[1] ~BSCAN:USERID[0]
B31 ~BSCAN:USERID[3] ~BSCAN:USERID[2]
B30 ~BSCAN:USERID[5] ~BSCAN:USERID[4]
B29 ~BSCAN:USERID[7] ~BSCAN:USERID[6]
B28 ~BSCAN:USERID[9] ~BSCAN:USERID[8]
B27 ~BSCAN:USERID[11] ~BSCAN:USERID[10]
B26 ~BSCAN:USERID[13] ~BSCAN:USERID[12]
B25 ~BSCAN:USERID[15] ~BSCAN:USERID[14]
B24 ~BSCAN:USERID[17] ~BSCAN:USERID[16]
B23 ~BSCAN:USERID[19] ~BSCAN:USERID[18]
B22 ~BSCAN:USERID[21] ~BSCAN:USERID[20]
B21 ~BSCAN:USERID[23] ~BSCAN:USERID[22]
B20 ~BSCAN:USERID[24] ~BSCAN:USERID[25]
B19 ~BSCAN:USERID[27] ~BSCAN:USERID[26]
B18 ~BSCAN:USERID[28] ~BSCAN:USERID[29]
B17 ~BSCAN:USERID[31] ~BSCAN:USERID[30]
B16 BSCAN:TDO_ENABLE[0] BSCAN:TDO_ENABLE[1]
B15 MISC:TMSPIN[1] MISC:TMSPIN[0]
B14 MISC:TCKPIN[0] MISC:TCKPIN[1]
B13 MISC:TDOPIN[1] MISC:TDOPIN[0]
B12 - -
B11 DCI[0]:LVDSBIAS[0] MISC:DCM_ENABLE
B10 DCI[0]:LVDSBIAS[1] DCI[1]:LVDSBIAS[0]
B9 - DCI[1]:LVDSBIAS[1]
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
BSCAN:TDO_ENABLE 0.F1.B16 0.F0.B16
non-inverted [1] [0]
BSCAN:USERID 0.F0.B17 0.F1.B17 0.F1.B18 0.F0.B18 0.F0.B19 0.F1.B19 0.F1.B20 0.F0.B20 0.F0.B21 0.F1.B21 0.F0.B22 0.F1.B22 0.F0.B23 0.F1.B23 0.F0.B24 0.F1.B24 0.F0.B25 0.F1.B25 0.F0.B26 0.F1.B26 0.F0.B27 0.F1.B27 0.F0.B28 0.F1.B28 0.F0.B29 0.F1.B29 0.F0.B30 0.F1.B30 0.F0.B31 0.F1.B31 0.F0.B32 0.F1.B32
inverted ~[31] ~[30] ~[29] ~[28] ~[27] ~[26] ~[25] ~[24] ~[23] ~[22] ~[21] ~[20] ~[19] ~[18] ~[17] ~[16] ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
DCIRESET[0]:ENABLE 0.F0.B63
DCIRESET[1]:ENABLE 0.F1.B63
DCI[0]:ENABLE 0.F0.B44
DCI[0]:FORCE_DONE_HIGH 0.F0.B61
DCI[0]:QUIET 0.F0.B45
DCI[0]:TEST_ENABLE 0.F0.B62
DCI[1]:ENABLE 0.F1.B44
DCI[1]:FORCE_DONE_HIGH 0.F1.B61
DCI[1]:QUIET 0.F1.B45
DCI[1]:TEST_ENABLE 0.F1.B62
MISC:DCM_ENABLE 0.F1.B11
non-inverted [0]
DCI[0]:LVDSBIAS 0.F0.B33 0.F0.B34 0.F0.B35 0.F0.B36 0.F0.B37 0.F0.B38 0.F0.B39 0.F0.B40 0.F0.B41 0.F0.B42 0.F0.B43 0.F0.B10 0.F0.B11
DCI[1]:LVDSBIAS 0.F1.B33 0.F1.B34 0.F1.B35 0.F1.B36 0.F1.B37 0.F1.B38 0.F1.B39 0.F1.B40 0.F1.B41 0.F1.B42 0.F1.B43 0.F1.B9 0.F1.B10
non-inverted [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
DCI[0]:NMASK_TERM_SPLIT 0.F0.B49 0.F0.B48 0.F0.B47 0.F0.B46
DCI[0]:PMASK_TERM_SPLIT 0.F0.B59 0.F0.B58 0.F0.B57 0.F0.B56
DCI[0]:PMASK_TERM_VCC 0.F0.B54 0.F0.B53 0.F0.B52 0.F0.B51
DCI[1]:NMASK_TERM_SPLIT 0.F1.B49 0.F1.B48 0.F1.B47 0.F1.B46
DCI[1]:PMASK_TERM_SPLIT 0.F1.B59 0.F1.B58 0.F1.B57 0.F1.B56
DCI[1]:PMASK_TERM_VCC 0.F1.B54 0.F1.B53 0.F1.B52 0.F1.B51
non-inverted [3] [2] [1] [0]
MISC:DCI_TEST_MUX 0.F0.B50
DCI0 0
DCI1 1
MISC:TCKPIN 0.F1.B14 0.F0.B14
MISC:TDOPIN 0.F0.B13 0.F1.B13
MISC:TMSPIN 0.F0.B15 0.F1.B15
PULLUP 0 0
PULLNONE 0 1
PULLDOWN 1 1

CNR_NE_FC

This tile is used on FPGAcore.

Tile CNR_NE_FC

Cells: 1

Bel BSCAN

spartan3 CNR_NE_FC bel BSCAN
PinDirectionWires
CAPTUREoutputOUT_FAN[7]
DRCK1outputOUT_FAN[0]
DRCK2outputOUT_FAN[1]
RESEToutputOUT_SEC[11]
SEL1outputOUT_FAN[2]
SEL2outputOUT_FAN[3]
SHIFToutputOUT_FAN[4]
TDIoutputOUT_FAN[5]
TDO1inputIMUX_DATA[0]
TDO2inputIMUX_DATA[1]
UPDATEoutputOUT_FAN[6]

Bel RANDOR_OUT

spartan3 CNR_NE_FC bel RANDOR_OUT
PinDirectionWires
OoutputOUT_SEC[15]

Bel MISR

spartan3 CNR_NE_FC bel MISR
PinDirectionWires
CLKinputIMUX_CLK[3]

Bel wires

spartan3 CNR_NE_FC bel wires
WirePins
IMUX_CLK[3]MISR.CLK
IMUX_DATA[0]BSCAN.TDO1
IMUX_DATA[1]BSCAN.TDO2
OUT_FAN[0]BSCAN.DRCK1
OUT_FAN[1]BSCAN.DRCK2
OUT_FAN[2]BSCAN.SEL1
OUT_FAN[3]BSCAN.SEL2
OUT_FAN[4]BSCAN.SHIFT
OUT_FAN[5]BSCAN.TDI
OUT_FAN[6]BSCAN.UPDATE
OUT_FAN[7]BSCAN.CAPTURE
OUT_SEC[11]BSCAN.RESET
OUT_SEC[15]RANDOR_OUT.O

Bitstream

spartan3 CNR_NE_FC rect TERM_H
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 CNR_NE_FC rect R0
BitFrame
F0 F1
B32 ~BSCAN:USERID[1] ~BSCAN:USERID[0]
B31 ~BSCAN:USERID[3] ~BSCAN:USERID[2]
B30 ~BSCAN:USERID[5] ~BSCAN:USERID[4]
B29 ~BSCAN:USERID[7] ~BSCAN:USERID[6]
B28 ~BSCAN:USERID[9] ~BSCAN:USERID[8]
B27 ~BSCAN:USERID[11] ~BSCAN:USERID[10]
B26 ~BSCAN:USERID[13] ~BSCAN:USERID[12]
B25 ~BSCAN:USERID[15] ~BSCAN:USERID[14]
B24 ~BSCAN:USERID[17] ~BSCAN:USERID[16]
B23 ~BSCAN:USERID[19] ~BSCAN:USERID[18]
B22 ~BSCAN:USERID[21] ~BSCAN:USERID[20]
B21 ~BSCAN:USERID[23] ~BSCAN:USERID[22]
B20 ~BSCAN:USERID[24] ~BSCAN:USERID[25]
B19 ~BSCAN:USERID[27] ~BSCAN:USERID[26]
B18 ~BSCAN:USERID[28] ~BSCAN:USERID[29]
B17 ~BSCAN:USERID[31] ~BSCAN:USERID[30]
B16 BSCAN:TDO_ENABLE[0] BSCAN:TDO_ENABLE[1]
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 MISC:MISR_CLOCK -
B0 MISC:MISR_RESET -
BSCAN:TDO_ENABLE 0.F1.B16 0.F0.B16
non-inverted [1] [0]
BSCAN:USERID 0.F0.B17 0.F1.B17 0.F1.B18 0.F0.B18 0.F0.B19 0.F1.B19 0.F1.B20 0.F0.B20 0.F0.B21 0.F1.B21 0.F0.B22 0.F1.B22 0.F0.B23 0.F1.B23 0.F0.B24 0.F1.B24 0.F0.B25 0.F1.B25 0.F0.B26 0.F1.B26 0.F0.B27 0.F1.B27 0.F0.B28 0.F1.B28 0.F0.B29 0.F1.B29 0.F0.B30 0.F1.B30 0.F0.B31 0.F1.B31 0.F0.B32 0.F1.B32
inverted ~[31] ~[30] ~[29] ~[28] ~[27] ~[26] ~[25] ~[24] ~[23] ~[22] ~[21] ~[20] ~[19] ~[18] ~[17] ~[16] ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
MISC:MISR_CLOCK 0.F0.B1
MISC:MISR_RESET 0.F0.B0
non-inverted [0]

CNR_NE_S3E

This tile is used on Spartan 3E.

Tile CNR_NE_S3E

Cells: 1

Bel BSCAN

spartan3 CNR_NE_S3E bel BSCAN
PinDirectionWires
CAPTUREoutputOUT_FAN[7]
DRCK1outputOUT_FAN[0]
DRCK2outputOUT_FAN[1]
RESEToutputOUT_SEC[11]
SEL1outputOUT_FAN[2]
SEL2outputOUT_FAN[3]
SHIFToutputOUT_FAN[4]
TDIoutputOUT_FAN[5]
TDO1inputIMUX_DATA[0]
TDO2inputIMUX_DATA[1]
UPDATEoutputOUT_FAN[6]

Bel RANDOR_OUT

spartan3 CNR_NE_S3E bel RANDOR_OUT
PinDirectionWires
OoutputOUT_SEC[15]

Bel wires

spartan3 CNR_NE_S3E bel wires
WirePins
IMUX_DATA[0]BSCAN.TDO1
IMUX_DATA[1]BSCAN.TDO2
OUT_FAN[0]BSCAN.DRCK1
OUT_FAN[1]BSCAN.DRCK2
OUT_FAN[2]BSCAN.SEL1
OUT_FAN[3]BSCAN.SEL2
OUT_FAN[4]BSCAN.SHIFT
OUT_FAN[5]BSCAN.TDI
OUT_FAN[6]BSCAN.UPDATE
OUT_FAN[7]BSCAN.CAPTURE
OUT_SEC[11]BSCAN.RESET
OUT_SEC[15]RANDOR_OUT.O

Bitstream

spartan3 CNR_NE_S3E rect TERM_H
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 CNR_NE_S3E rect R0
BitFrame
F0 F1
B51 - BANK:LVDSBIAS_1[2]
B50 - BANK:LVDSBIAS_1[3]
B49 - BANK:LVDSBIAS_1[4]
B48 - BANK:LVDSBIAS_0[1]
B47 - BANK:LVDSBIAS_0[2]
B46 - BANK:LVDSBIAS_0[3]
B45 - BANK:LVDSBIAS_0[4]
B44 - BANK:LVDSBIAS_1[5]
B43 - BANK:LVDSBIAS_1[6]
B42 - BANK:LVDSBIAS_1[7]
B41 - BANK:LVDSBIAS_1[8]
B40 - BANK:LVDSBIAS_1[9]
B39 - BANK:LVDSBIAS_1[10]
B38 - BANK:LVDSBIAS_0[5]
B37 - BANK:LVDSBIAS_0[6]
B36 - BANK:LVDSBIAS_0[7]
B35 - BANK:LVDSBIAS_0[8]
B34 - BANK:LVDSBIAS_0[9]
B33 - BANK:LVDSBIAS_0[10]
B32 ~BSCAN:USERID[1] ~BSCAN:USERID[0]
B31 ~BSCAN:USERID[3] ~BSCAN:USERID[2]
B30 ~BSCAN:USERID[5] ~BSCAN:USERID[4]
B29 ~BSCAN:USERID[7] ~BSCAN:USERID[6]
B28 ~BSCAN:USERID[9] ~BSCAN:USERID[8]
B27 ~BSCAN:USERID[11] ~BSCAN:USERID[10]
B26 ~BSCAN:USERID[13] ~BSCAN:USERID[12]
B25 ~BSCAN:USERID[15] ~BSCAN:USERID[14]
B24 ~BSCAN:USERID[17] ~BSCAN:USERID[16]
B23 ~BSCAN:USERID[19] ~BSCAN:USERID[18]
B22 ~BSCAN:USERID[21] ~BSCAN:USERID[20]
B21 ~BSCAN:USERID[23] ~BSCAN:USERID[22]
B20 ~BSCAN:USERID[24] ~BSCAN:USERID[25]
B19 ~BSCAN:USERID[27] ~BSCAN:USERID[26]
B18 ~BSCAN:USERID[28] ~BSCAN:USERID[29]
B17 ~BSCAN:USERID[31] ~BSCAN:USERID[30]
B16 BSCAN:TDO_ENABLE[0] BSCAN:TDO_ENABLE[1]
B15 MISC:TMSPIN[1] MISC:TMSPIN[0]
B14 MISC:TCKPIN[0] MISC:TCKPIN[1]
B13 MISC:TDOPIN[1] MISC:TDOPIN[0]
B12 - -
B11 - BANK:LVDSBIAS_1[0]
B10 - BANK:LVDSBIAS_0[0]
B9 - BANK:LVDSBIAS_1[1]
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
BANK:LVDSBIAS_0 0.F1.B33 0.F1.B34 0.F1.B35 0.F1.B36 0.F1.B37 0.F1.B38 0.F1.B45 0.F1.B46 0.F1.B47 0.F1.B48 0.F1.B10
BANK:LVDSBIAS_1 0.F1.B39 0.F1.B40 0.F1.B41 0.F1.B42 0.F1.B43 0.F1.B44 0.F1.B49 0.F1.B50 0.F1.B51 0.F1.B9 0.F1.B11
non-inverted [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
BSCAN:TDO_ENABLE 0.F1.B16 0.F0.B16
non-inverted [1] [0]
BSCAN:USERID 0.F0.B17 0.F1.B17 0.F1.B18 0.F0.B18 0.F0.B19 0.F1.B19 0.F1.B20 0.F0.B20 0.F0.B21 0.F1.B21 0.F0.B22 0.F1.B22 0.F0.B23 0.F1.B23 0.F0.B24 0.F1.B24 0.F0.B25 0.F1.B25 0.F0.B26 0.F1.B26 0.F0.B27 0.F1.B27 0.F0.B28 0.F1.B28 0.F0.B29 0.F1.B29 0.F0.B30 0.F1.B30 0.F0.B31 0.F1.B31 0.F0.B32 0.F1.B32
inverted ~[31] ~[30] ~[29] ~[28] ~[27] ~[26] ~[25] ~[24] ~[23] ~[22] ~[21] ~[20] ~[19] ~[18] ~[17] ~[16] ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
MISC:TCKPIN 0.F1.B14 0.F0.B14
MISC:TDOPIN 0.F0.B13 0.F1.B13
MISC:TMSPIN 0.F0.B15 0.F1.B15
PULLUP 0 0
PULLNONE 0 1
PULLDOWN 1 1

CNR_NE_S3A

This tile is used on Spartan 3A.

Tile CNR_NE_S3A

Cells: 1

Bel BSCAN

spartan3 CNR_NE_S3A bel BSCAN
PinDirectionWires
CAPTUREoutputOUT_FAN[7]
DRCK1outputOUT_FAN[0]
DRCK2outputOUT_FAN[1]
RESEToutputOUT_SEC[11]
SEL1outputOUT_FAN[2]
SEL2outputOUT_FAN[3]
SHIFToutputOUT_FAN[4]
TCKoutputOUT_SEC[13]
TDIoutputOUT_FAN[5]
TDO1inputIMUX_DATA[0]
TDO2inputIMUX_DATA[1]
TMSoutputOUT_SEC[12]
UPDATEoutputOUT_FAN[6]

Bel RANDOR_OUT

spartan3 CNR_NE_S3A bel RANDOR_OUT
PinDirectionWires
OoutputOUT_SEC[15]

Bel wires

spartan3 CNR_NE_S3A bel wires
WirePins
IMUX_DATA[0]BSCAN.TDO1
IMUX_DATA[1]BSCAN.TDO2
OUT_FAN[0]BSCAN.DRCK1
OUT_FAN[1]BSCAN.DRCK2
OUT_FAN[2]BSCAN.SEL1
OUT_FAN[3]BSCAN.SEL2
OUT_FAN[4]BSCAN.SHIFT
OUT_FAN[5]BSCAN.TDI
OUT_FAN[6]BSCAN.UPDATE
OUT_FAN[7]BSCAN.CAPTURE
OUT_SEC[11]BSCAN.RESET
OUT_SEC[12]BSCAN.TMS
OUT_SEC[13]BSCAN.TCK
OUT_SEC[15]RANDOR_OUT.O

Bitstream

spartan3 CNR_NE_S3A rect TERM_H
BitFrame
F0 F1
B63 - -
B62 - -
B61 - -
B60 - -
B59 - -
B58 - -
B57 - -
B56 - -
B55 - -
B54 - -
B53 - -
B52 - -
B51 - -
B50 - -
B49 - -
B48 - -
B47 - -
B46 - -
B45 - -
B44 - -
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 - -
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
### Bitstream
spartan3 CNR_NE_S3A rect R0
BitFrame
F0 F1
B63 BSCAN:TDO_ENABLE[0] BSCAN:TDO_ENABLE[1]
B62 ~BSCAN:USERID[1] ~BSCAN:USERID[0]
B61 ~BSCAN:USERID[3] ~BSCAN:USERID[2]
B60 ~BSCAN:USERID[5] ~BSCAN:USERID[4]
B59 ~BSCAN:USERID[7] ~BSCAN:USERID[6]
B58 ~BSCAN:USERID[9] ~BSCAN:USERID[8]
B57 ~BSCAN:USERID[11] ~BSCAN:USERID[10]
B56 ~BSCAN:USERID[13] ~BSCAN:USERID[12]
B55 ~BSCAN:USERID[15] ~BSCAN:USERID[14]
B54 ~BSCAN:USERID[17] ~BSCAN:USERID[16]
B53 ~BSCAN:USERID[19] ~BSCAN:USERID[18]
B52 ~BSCAN:USERID[21] ~BSCAN:USERID[20]
B51 ~BSCAN:USERID[23] ~BSCAN:USERID[22]
B50 ~BSCAN:USERID[25] ~BSCAN:USERID[24]
B49 ~BSCAN:USERID[27] ~BSCAN:USERID[26]
B48 ~BSCAN:USERID[29] ~BSCAN:USERID[28]
B47 ~BSCAN:USERID[31] ~BSCAN:USERID[30]
B46 MISC:CSO2PIN[1] MISC:CSO2PIN[0]
B45 MISC:MISO2PIN[0] MISC:MISO2PIN[1]
B44 MISC:TCKPIN[0] MISC:TCKPIN[1]
B43 - -
B42 - -
B41 - -
B40 - -
B39 - -
B38 - -
B37 - -
B36 - -
B35 - -
B34 - -
B33 - -
B32 - -
B31 - -
B30 - -
B29 - -
B28 - -
B27 - -
B26 - -
B25 - -
B24 - -
B23 - -
B22 - -
B21 - -
B20 - -
B19 - -
B18 - -
B17 - -
B16 - -
B15 - -
B14 - -
B13 - -
B12 - -
B11 - -
B10 - -
B9 - -
B8 - -
B7 MISC:TDOPIN[0] MISC:TDOPIN[1]
B6 - -
B5 - -
B4 - -
B3 - -
B2 - -
B1 - -
B0 - -
BSCAN:TDO_ENABLE 0.F1.B63 0.F0.B63
non-inverted [1] [0]
BSCAN:USERID 0.F0.B47 0.F1.B47 0.F0.B48 0.F1.B48 0.F0.B49 0.F1.B49 0.F0.B50 0.F1.B50 0.F0.B51 0.F1.B51 0.F0.B52 0.F1.B52 0.F0.B53 0.F1.B53 0.F0.B54 0.F1.B54 0.F0.B55 0.F1.B55 0.F0.B56 0.F1.B56 0.F0.B57 0.F1.B57 0.F0.B58 0.F1.B58 0.F0.B59 0.F1.B59 0.F0.B60 0.F1.B60 0.F0.B61 0.F1.B61 0.F0.B62 0.F1.B62
inverted ~[31] ~[30] ~[29] ~[28] ~[27] ~[26] ~[25] ~[24] ~[23] ~[22] ~[21] ~[20] ~[19] ~[18] ~[17] ~[16] ~[15] ~[14] ~[13] ~[12] ~[11] ~[10] ~[9] ~[8] ~[7] ~[6] ~[5] ~[4] ~[3] ~[2] ~[1] ~[0]
MISC:CSO2PIN 0.F0.B46 0.F1.B46
MISC:MISO2PIN 0.F1.B45 0.F0.B45
MISC:TCKPIN 0.F1.B44 0.F0.B44
MISC:TDOPIN 0.F1.B7 0.F0.B7
PULLUP 0 0
PULLNONE 0 1
PULLDOWN 1 1