Multi-gigabit transceivers — Virtex 2 Pro X

TODO: document

Tile GIGABIT10_S

Cells: 9

Bels GT10

virtex2 GIGABIT10_S bel GT10 pins
Pin	Direction	GT10
REFCLK	in	CELL_IO.IMUX_DCM_CLK_OPTINV[2]
REFCLK2	in	CELL_IO.IMUX_DCM_CLK_OPTINV[3]
REFCLKBSEL	in	CELL_IO.IMUX_G3_DATA[4]
REFCLKSEL	in	CELL_IO.IMUX_G2_DATA[1]
POWERDOWN	in	CELL_IO.IMUX_G0_DATA[2]
LOOPBACK[0]	in	CELL_IO.IMUX_G0_DATA[3]
LOOPBACK[1]	in	CELL_IO.IMUX_G1_DATA[3]
RXUSRCLK	in	CELL_IO.IMUX_DCM_CLK_OPTINV[0]
RXUSRCLK2	in	CELL_IO.IMUX_DCM_CLK_OPTINV[1]
RXRESET	in	CELL_IO.IMUX_SR_OPTINV[0]
PMARXLOCKSEL[0]	in	CELL_IO.IMUX_G3_DATA[6]
PMARXLOCKSEL[1]	in	CELL_IO.IMUX_G0_DATA[7]
RXPOLARITY	in	CELL_IO.IMUX_G1_DATA[2]
RXDATAWIDTH[0]	in	CELL[3].IMUX_G2_DATA[4]
RXDATAWIDTH[1]	in	CELL[3].IMUX_G3_DATA[4]
RXINTDATAWIDTH[0]	in	CELL[3].IMUX_G2_DATA[5]
RXINTDATAWIDTH[1]	in	CELL[3].IMUX_G3_DATA[5]
RXDEC8B10BUSE	in	CELL[5].IMUX_G0_DATA[3]
RXDEC64B66BUSE	in	CELL[4].IMUX_G0_DATA[4]
RXBLOCKSYNC64B66BUSE	in	CELL[3].IMUX_G1_DATA[6]
RXDESCRAM64B66BUSE	in	CELL[3].IMUX_G0_DATA[6]
RXCOMMADETUSE	in	CELL[3].IMUX_G2_DATA[6]
RXIGNOREBTF	in	CELL[4].IMUX_G1_DATA[3]
RXSLIDE	in	CELL[3].IMUX_G3_DATA[6]
ENMCOMMAALIGN	in	CELL[0].IMUX_G1_DATA[7]
ENPCOMMAALIGN	in	CELL[0].IMUX_G1_DATA[4]
TXUSRCLK	in	CELL[0].IMUX_CLK_OPTINV[0]
TXUSRCLK2	in	CELL[0].IMUX_CLK_OPTINV[1]
TXRESET	in	CELL[0].IMUX_SR_OPTINV[0]
TXPOLARITY	in	CELL_IO.IMUX_G2_DATA[3]
TXINHIBIT	in	CELL_IO.IMUX_G3_DATA[3]
TXDATAWIDTH[0]	in	CELL[3].IMUX_G0_DATA[4]
TXDATAWIDTH[1]	in	CELL[3].IMUX_G1_DATA[4]
TXINTDATAWIDTH[0]	in	CELL[3].IMUX_G0_DATA[5]
TXINTDATAWIDTH[1]	in	CELL[3].IMUX_G1_DATA[5]
TXDATA[0]	in	CELL[0].IMUX_G0_DATA[0]
TXDATA[1]	in	CELL[0].IMUX_G1_DATA[0]
TXDATA[2]	in	CELL[0].IMUX_G2_DATA[0]
TXDATA[3]	in	CELL[0].IMUX_G3_DATA[0]
TXDATA[4]	in	CELL[1].IMUX_G0_DATA[0]
TXDATA[5]	in	CELL[1].IMUX_G1_DATA[0]
TXDATA[6]	in	CELL[1].IMUX_G2_DATA[0]
TXDATA[7]	in	CELL[1].IMUX_G3_DATA[0]
TXDATA[8]	in	CELL[2].IMUX_G0_DATA[0]
TXDATA[9]	in	CELL[2].IMUX_G1_DATA[0]
TXDATA[10]	in	CELL[2].IMUX_G2_DATA[0]
TXDATA[11]	in	CELL[2].IMUX_G3_DATA[0]
TXDATA[12]	in	CELL[3].IMUX_G0_DATA[0]
TXDATA[13]	in	CELL[3].IMUX_G1_DATA[0]
TXDATA[14]	in	CELL[3].IMUX_G2_DATA[0]
TXDATA[15]	in	CELL[3].IMUX_G3_DATA[0]
TXDATA[16]	in	CELL[4].IMUX_G0_DATA[0]
TXDATA[17]	in	CELL[4].IMUX_G1_DATA[0]
TXDATA[18]	in	CELL[4].IMUX_G2_DATA[0]
TXDATA[19]	in	CELL[4].IMUX_G3_DATA[0]
TXDATA[20]	in	CELL[5].IMUX_G0_DATA[0]
TXDATA[21]	in	CELL[5].IMUX_G1_DATA[0]
TXDATA[22]	in	CELL[5].IMUX_G2_DATA[0]
TXDATA[23]	in	CELL[5].IMUX_G3_DATA[0]
TXDATA[24]	in	CELL[6].IMUX_G0_DATA[0]
TXDATA[25]	in	CELL[6].IMUX_G1_DATA[0]
TXDATA[26]	in	CELL[6].IMUX_G2_DATA[0]
TXDATA[27]	in	CELL[6].IMUX_G3_DATA[0]
TXDATA[28]	in	CELL[7].IMUX_G0_DATA[0]
TXDATA[29]	in	CELL[7].IMUX_G1_DATA[0]
TXDATA[30]	in	CELL[7].IMUX_G2_DATA[0]
TXDATA[31]	in	CELL[7].IMUX_G3_DATA[0]
TXDATA[32]	in	CELL[0].IMUX_G0_DATA[1]
TXDATA[33]	in	CELL[0].IMUX_G1_DATA[1]
TXDATA[34]	in	CELL[0].IMUX_G2_DATA[1]
TXDATA[35]	in	CELL[0].IMUX_G3_DATA[1]
TXDATA[36]	in	CELL[1].IMUX_G0_DATA[1]
TXDATA[37]	in	CELL[1].IMUX_G1_DATA[1]
TXDATA[38]	in	CELL[1].IMUX_G2_DATA[1]
TXDATA[39]	in	CELL[1].IMUX_G3_DATA[1]
TXDATA[40]	in	CELL[2].IMUX_G0_DATA[1]
TXDATA[41]	in	CELL[2].IMUX_G1_DATA[1]
TXDATA[42]	in	CELL[2].IMUX_G2_DATA[1]
TXDATA[43]	in	CELL[2].IMUX_G3_DATA[1]
TXDATA[44]	in	CELL[3].IMUX_G0_DATA[1]
TXDATA[45]	in	CELL[3].IMUX_G1_DATA[1]
TXDATA[46]	in	CELL[3].IMUX_G2_DATA[1]
TXDATA[47]	in	CELL[3].IMUX_G3_DATA[1]
TXDATA[48]	in	CELL[4].IMUX_G0_DATA[1]
TXDATA[49]	in	CELL[4].IMUX_G1_DATA[1]
TXDATA[50]	in	CELL[4].IMUX_G2_DATA[1]
TXDATA[51]	in	CELL[4].IMUX_G3_DATA[1]
TXDATA[52]	in	CELL[5].IMUX_G0_DATA[1]
TXDATA[53]	in	CELL[5].IMUX_G1_DATA[1]
TXDATA[54]	in	CELL[5].IMUX_G2_DATA[1]
TXDATA[55]	in	CELL[5].IMUX_G3_DATA[1]
TXDATA[56]	in	CELL[6].IMUX_G0_DATA[1]
TXDATA[57]	in	CELL[6].IMUX_G1_DATA[1]
TXDATA[58]	in	CELL[6].IMUX_G2_DATA[1]
TXDATA[59]	in	CELL[6].IMUX_G3_DATA[1]
TXDATA[60]	in	CELL[7].IMUX_G0_DATA[1]
TXDATA[61]	in	CELL[7].IMUX_G1_DATA[1]
TXDATA[62]	in	CELL[7].IMUX_G2_DATA[1]
TXDATA[63]	in	CELL[7].IMUX_G3_DATA[1]
TXBYPASS8B10B[0]	in	CELL[0].IMUX_G0_DATA[2]
TXBYPASS8B10B[1]	in	CELL[1].IMUX_G0_DATA[2]
TXBYPASS8B10B[2]	in	CELL[2].IMUX_G0_DATA[2]
TXBYPASS8B10B[3]	in	CELL[3].IMUX_G0_DATA[2]
TXBYPASS8B10B[4]	in	CELL[4].IMUX_G0_DATA[2]
TXBYPASS8B10B[5]	in	CELL[5].IMUX_G0_DATA[2]
TXBYPASS8B10B[6]	in	CELL[6].IMUX_G0_DATA[2]
TXBYPASS8B10B[7]	in	CELL[7].IMUX_G0_DATA[2]
TXCHARISK[0]	in	CELL[0].IMUX_G1_DATA[2]
TXCHARISK[1]	in	CELL[1].IMUX_G1_DATA[2]
TXCHARISK[2]	in	CELL[2].IMUX_G1_DATA[2]
TXCHARISK[3]	in	CELL[3].IMUX_G1_DATA[2]
TXCHARISK[4]	in	CELL[4].IMUX_G1_DATA[2]
TXCHARISK[5]	in	CELL[5].IMUX_G1_DATA[2]
TXCHARISK[6]	in	CELL[6].IMUX_G1_DATA[2]
TXCHARISK[7]	in	CELL[7].IMUX_G1_DATA[2]
TXCHARDISPMODE[0]	in	CELL[0].IMUX_G2_DATA[2]
TXCHARDISPMODE[1]	in	CELL[1].IMUX_G2_DATA[2]
TXCHARDISPMODE[2]	in	CELL[2].IMUX_G2_DATA[2]
TXCHARDISPMODE[3]	in	CELL[3].IMUX_G2_DATA[2]
TXCHARDISPMODE[4]	in	CELL[4].IMUX_G2_DATA[2]
TXCHARDISPMODE[5]	in	CELL[5].IMUX_G2_DATA[2]
TXCHARDISPMODE[6]	in	CELL[6].IMUX_G2_DATA[2]
TXCHARDISPMODE[7]	in	CELL[7].IMUX_G2_DATA[2]
TXCHARDISPVAL[0]	in	CELL[0].IMUX_G3_DATA[2]
TXCHARDISPVAL[1]	in	CELL[1].IMUX_G3_DATA[2]
TXCHARDISPVAL[2]	in	CELL[2].IMUX_G3_DATA[2]
TXCHARDISPVAL[3]	in	CELL[3].IMUX_G3_DATA[2]
TXCHARDISPVAL[4]	in	CELL[4].IMUX_G3_DATA[2]
TXCHARDISPVAL[5]	in	CELL[5].IMUX_G3_DATA[2]
TXCHARDISPVAL[6]	in	CELL[6].IMUX_G3_DATA[2]
TXCHARDISPVAL[7]	in	CELL[7].IMUX_G3_DATA[2]
TXFORCECRCERR	in	CELL[3].IMUX_G3_DATA[3]
TXENC8B10BUSE	in	CELL[4].IMUX_G2_DATA[3]
TXENC64B66BUSE	in	CELL[4].IMUX_G3_DATA[3]
TXSCRAM64B66BUSE	in	CELL[4].IMUX_G1_DATA[4]
TXGEARBOX64B66BUSE	in	CELL[4].IMUX_G2_DATA[4]
ENCHANSYNC	in	CELL_IO.IMUX_G1_DATA[1]
CHBONDI[0]	in	CELL_IO.IMUX_G0_DATA[0]
CHBONDI[1]	in	CELL_IO.IMUX_G1_DATA[0]
CHBONDI[2]	in	CELL_IO.IMUX_G2_DATA[0]
CHBONDI[3]	in	CELL_IO.IMUX_G3_DATA[0]
CHBONDI[4]	in	CELL_IO.IMUX_G0_DATA[1]
PMAINIT	in	CELL_IO.IMUX_G3_DATA[1]
PMAREGADDR[0]	in	CELL[5].IMUX_G0_DATA[6]
PMAREGADDR[1]	in	CELL[5].IMUX_G1_DATA[6]
PMAREGADDR[2]	in	CELL[5].IMUX_G2_DATA[6]
PMAREGADDR[3]	in	CELL[5].IMUX_G3_DATA[6]
PMAREGADDR[4]	in	CELL[5].IMUX_G0_DATA[7]
PMAREGADDR[5]	in	CELL[5].IMUX_G1_DATA[7]
PMAREGDATAIN[0]	in	CELL[5].IMUX_G0_DATA[4]
PMAREGDATAIN[1]	in	CELL[5].IMUX_G1_DATA[4]
PMAREGDATAIN[2]	in	CELL[5].IMUX_G2_DATA[4]
PMAREGDATAIN[3]	in	CELL[5].IMUX_G3_DATA[4]
PMAREGDATAIN[4]	in	CELL[5].IMUX_G0_DATA[5]
PMAREGDATAIN[5]	in	CELL[5].IMUX_G1_DATA[5]
PMAREGDATAIN[6]	in	CELL[5].IMUX_G2_DATA[5]
PMAREGDATAIN[7]	in	CELL[5].IMUX_G3_DATA[5]
PMAREGRW	in	CELL[5].IMUX_G1_DATA[3]
PMAREGSTROBE	in	CELL[5].IMUX_G2_DATA[3]
SCANEN	in	CELL[4].IMUX_G1_DATA[6]
SCANMODE	in	CELL[4].IMUX_G2_DATA[6]
SCANIN	in	CELL[4].IMUX_G0_DATA[6]
TESTMEMORY	in	CELL[4].IMUX_G0_DATA[3]
RXRECCLK	out	CELL_IO.OUT_FAN_BEL[1]
PMARXLOCK	out	CELL_IO.OUT_SEC_BEL[8]
RXDATA[0]	out	CELL[0].OUT_FAN_BEL[0]
RXDATA[1]	out	CELL[0].OUT_FAN_BEL[1]
RXDATA[2]	out	CELL[0].OUT_FAN_BEL[2]
RXDATA[3]	out	CELL[0].OUT_FAN_BEL[3]
RXDATA[4]	out	CELL[1].OUT_FAN_BEL[0]
RXDATA[5]	out	CELL[1].OUT_FAN_BEL[1]
RXDATA[6]	out	CELL[1].OUT_FAN_BEL[2]
RXDATA[7]	out	CELL[1].OUT_FAN_BEL[3]
RXDATA[8]	out	CELL[2].OUT_FAN_BEL[0]
RXDATA[9]	out	CELL[2].OUT_FAN_BEL[1]
RXDATA[10]	out	CELL[2].OUT_FAN_BEL[2]
RXDATA[11]	out	CELL[2].OUT_FAN_BEL[3]
RXDATA[12]	out	CELL[3].OUT_FAN_BEL[0]
RXDATA[13]	out	CELL[3].OUT_FAN_BEL[1]
RXDATA[14]	out	CELL[3].OUT_FAN_BEL[2]
RXDATA[15]	out	CELL[3].OUT_FAN_BEL[3]
RXDATA[16]	out	CELL[4].OUT_FAN_BEL[0]
RXDATA[17]	out	CELL[4].OUT_FAN_BEL[1]
RXDATA[18]	out	CELL[4].OUT_FAN_BEL[2]
RXDATA[19]	out	CELL[4].OUT_FAN_BEL[3]
RXDATA[20]	out	CELL[5].OUT_FAN_BEL[0]
RXDATA[21]	out	CELL[5].OUT_FAN_BEL[1]
RXDATA[22]	out	CELL[5].OUT_FAN_BEL[2]
RXDATA[23]	out	CELL[5].OUT_FAN_BEL[3]
RXDATA[24]	out	CELL[6].OUT_FAN_BEL[0]
RXDATA[25]	out	CELL[6].OUT_FAN_BEL[1]
RXDATA[26]	out	CELL[6].OUT_FAN_BEL[2]
RXDATA[27]	out	CELL[6].OUT_FAN_BEL[3]
RXDATA[28]	out	CELL[7].OUT_FAN_BEL[0]
RXDATA[29]	out	CELL[7].OUT_FAN_BEL[1]
RXDATA[30]	out	CELL[7].OUT_FAN_BEL[2]
RXDATA[31]	out	CELL[7].OUT_FAN_BEL[3]
RXDATA[32]	out	CELL[0].OUT_FAN_BEL[4]
RXDATA[33]	out	CELL[0].OUT_FAN_BEL[5]
RXDATA[34]	out	CELL[0].OUT_FAN_BEL[6]
RXDATA[35]	out	CELL[0].OUT_FAN_BEL[7]
RXDATA[36]	out	CELL[1].OUT_FAN_BEL[4]
RXDATA[37]	out	CELL[1].OUT_FAN_BEL[5]
RXDATA[38]	out	CELL[1].OUT_FAN_BEL[6]
RXDATA[39]	out	CELL[1].OUT_FAN_BEL[7]
RXDATA[40]	out	CELL[2].OUT_FAN_BEL[4]
RXDATA[41]	out	CELL[2].OUT_FAN_BEL[5]
RXDATA[42]	out	CELL[2].OUT_FAN_BEL[6]
RXDATA[43]	out	CELL[2].OUT_FAN_BEL[7]
RXDATA[44]	out	CELL[3].OUT_FAN_BEL[4]
RXDATA[45]	out	CELL[3].OUT_FAN_BEL[5]
RXDATA[46]	out	CELL[3].OUT_FAN_BEL[6]
RXDATA[47]	out	CELL[3].OUT_FAN_BEL[7]
RXDATA[48]	out	CELL[4].OUT_FAN_BEL[4]
RXDATA[49]	out	CELL[4].OUT_FAN_BEL[5]
RXDATA[50]	out	CELL[4].OUT_FAN_BEL[6]
RXDATA[51]	out	CELL[4].OUT_FAN_BEL[7]
RXDATA[52]	out	CELL[5].OUT_FAN_BEL[4]
RXDATA[53]	out	CELL[5].OUT_FAN_BEL[5]
RXDATA[54]	out	CELL[5].OUT_FAN_BEL[6]
RXDATA[55]	out	CELL[5].OUT_FAN_BEL[7]
RXDATA[56]	out	CELL[6].OUT_FAN_BEL[4]
RXDATA[57]	out	CELL[6].OUT_FAN_BEL[5]
RXDATA[58]	out	CELL[6].OUT_FAN_BEL[6]
RXDATA[59]	out	CELL[6].OUT_FAN_BEL[7]
RXDATA[60]	out	CELL[7].OUT_FAN_BEL[4]
RXDATA[61]	out	CELL[7].OUT_FAN_BEL[5]
RXDATA[62]	out	CELL[7].OUT_FAN_BEL[6]
RXDATA[63]	out	CELL[7].OUT_FAN_BEL[7]
RXNOTINTABLE[0]	out	CELL[0].OUT_SEC_BEL[13]
RXNOTINTABLE[1]	out	CELL[1].OUT_SEC_BEL[13]
RXNOTINTABLE[2]	out	CELL[2].OUT_SEC_BEL[13]
RXNOTINTABLE[3]	out	CELL[3].OUT_SEC_BEL[13]
RXNOTINTABLE[4]	out	CELL[4].OUT_SEC_BEL[13]
RXNOTINTABLE[5]	out	CELL[5].OUT_SEC_BEL[13]
RXNOTINTABLE[6]	out	CELL[6].OUT_SEC_BEL[13]
RXNOTINTABLE[7]	out	CELL[7].OUT_SEC_BEL[13]
RXDISPERR[0]	out	CELL[0].OUT_SEC_BEL[14]
RXDISPERR[1]	out	CELL[1].OUT_SEC_BEL[14]
RXDISPERR[2]	out	CELL[2].OUT_SEC_BEL[14]
RXDISPERR[3]	out	CELL[3].OUT_SEC_BEL[14]
RXDISPERR[4]	out	CELL[4].OUT_SEC_BEL[14]
RXDISPERR[5]	out	CELL[5].OUT_SEC_BEL[14]
RXDISPERR[6]	out	CELL[6].OUT_SEC_BEL[14]
RXDISPERR[7]	out	CELL[7].OUT_SEC_BEL[14]
RXCHARISK[0]	out	CELL[0].OUT_SEC_BEL[12]
RXCHARISK[1]	out	CELL[1].OUT_SEC_BEL[12]
RXCHARISK[2]	out	CELL[2].OUT_SEC_BEL[12]
RXCHARISK[3]	out	CELL[3].OUT_SEC_BEL[12]
RXCHARISK[4]	out	CELL[4].OUT_SEC_BEL[12]
RXCHARISK[5]	out	CELL[5].OUT_SEC_BEL[12]
RXCHARISK[6]	out	CELL[6].OUT_SEC_BEL[12]
RXCHARISK[7]	out	CELL[7].OUT_SEC_BEL[12]
RXCHARISCOMMA[0]	out	CELL[0].OUT_SEC_BEL[11]
RXCHARISCOMMA[1]	out	CELL[1].OUT_SEC_BEL[11]
RXCHARISCOMMA[2]	out	CELL[2].OUT_SEC_BEL[11]
RXCHARISCOMMA[3]	out	CELL[3].OUT_SEC_BEL[11]
RXCHARISCOMMA[4]	out	CELL[4].OUT_SEC_BEL[11]
RXCHARISCOMMA[5]	out	CELL[5].OUT_SEC_BEL[11]
RXCHARISCOMMA[6]	out	CELL[6].OUT_SEC_BEL[11]
RXCHARISCOMMA[7]	out	CELL[7].OUT_SEC_BEL[11]
RXRUNDISP[0]	out	CELL[0].OUT_SEC_BEL[15]
RXRUNDISP[1]	out	CELL[1].OUT_SEC_BEL[15]
RXRUNDISP[2]	out	CELL[2].OUT_SEC_BEL[15]
RXRUNDISP[3]	out	CELL[3].OUT_SEC_BEL[15]
RXRUNDISP[4]	out	CELL[4].OUT_SEC_BEL[15]
RXRUNDISP[5]	out	CELL[5].OUT_SEC_BEL[15]
RXRUNDISP[6]	out	CELL[6].OUT_SEC_BEL[15]
RXRUNDISP[7]	out	CELL[7].OUT_SEC_BEL[15]
RXCOMMADET	out	CELL_IO.OUT_SEC_BEL[12]
RXREALIGN	out	CELL_IO.OUT_SEC_BEL[13]
RXLOSSOFSYNC[0]	out	CELL[0].OUT_SEC_BEL[8]
RXLOSSOFSYNC[1]	out	CELL[1].OUT_SEC_BEL[8]
RXCLKCORCNT[0]	out	CELL_IO.OUT_SEC_BEL[11]
RXCLKCORCNT[1]	out	CELL_IO.OUT_SEC_BEL[10]
RXCLKCORCNT[2]	out	CELL_IO.OUT_SEC_BEL[9]
RXBUFSTATUS[0]	out	CELL_IO.OUT_SEC_BEL[15]
RXBUFSTATUS[1]	out	CELL_IO.OUT_SEC_BEL[14]
RXCHECKINGCRC	out	CELL[3].OUT_SEC_BEL[8]
RXCRCERR	out	CELL[2].OUT_SEC_BEL[8]
TXOUTCLK	out	CELL_IO.OUT_FAN_BEL[7]
TXKERR[0]	out	CELL[0].OUT_SEC_BEL[9]
TXKERR[1]	out	CELL[1].OUT_SEC_BEL[9]
TXKERR[2]	out	CELL[2].OUT_SEC_BEL[9]
TXKERR[3]	out	CELL[3].OUT_SEC_BEL[9]
TXKERR[4]	out	CELL[4].OUT_SEC_BEL[9]
TXKERR[5]	out	CELL[5].OUT_SEC_BEL[9]
TXKERR[6]	out	CELL[6].OUT_SEC_BEL[9]
TXKERR[7]	out	CELL[7].OUT_SEC_BEL[9]
TXRUNDISP[0]	out	CELL[0].OUT_SEC_BEL[10]
TXRUNDISP[1]	out	CELL[1].OUT_SEC_BEL[10]
TXRUNDISP[2]	out	CELL[2].OUT_SEC_BEL[10]
TXRUNDISP[3]	out	CELL[3].OUT_SEC_BEL[10]
TXRUNDISP[4]	out	CELL[4].OUT_SEC_BEL[10]
TXRUNDISP[5]	out	CELL[5].OUT_SEC_BEL[10]
TXRUNDISP[6]	out	CELL[6].OUT_SEC_BEL[10]
TXRUNDISP[7]	out	CELL[7].OUT_SEC_BEL[10]
TXBUFERR	out	CELL[7].OUT_SEC_BEL[8]
CHBONDO[0]	out	CELL_IO.OUT_FAN_BEL[2]
CHBONDO[1]	out	CELL_IO.OUT_FAN_BEL[3]
CHBONDO[2]	out	CELL_IO.OUT_FAN_BEL[4]
CHBONDO[3]	out	CELL_IO.OUT_FAN_BEL[5]
CHBONDO[4]	out	CELL_IO.OUT_FAN_BEL[6]
CHBONDDONE	out	CELL_IO.OUT_FAN_BEL[0]
SCANOUT	out	CELL[4].OUT_SEC_BEL[8]

virtex2 GIGABIT10_S bel GT10 attribute bits
Attribute	GT10
PMA_REG[0] bit 0	MAIN[5][3][40]
PMA_REG[0] bit 1	MAIN[5][3][41]
PMA_REG[0] bit 2	MAIN[5][3][42]
PMA_REG[0] bit 3	MAIN[5][3][43]
PMA_REG[0] bit 4	MAIN[5][3][44]
PMA_REG[0] bit 5	MAIN[5][3][45]
PMA_REG[0] bit 6	MAIN[5][3][46]
PMA_REG[0] bit 7	MAIN[5][3][47]
PMA_REG[1] bit 0	MAIN[5][3][48]
PMA_REG[1] bit 1	MAIN[5][3][49]
PMA_REG[1] bit 2	MAIN[5][3][50]
PMA_REG[1] bit 3	MAIN[5][3][51]
PMA_REG[1] bit 4	MAIN[5][3][52]
PMA_REG[1] bit 5	MAIN[5][3][53]
PMA_REG[1] bit 6	MAIN[5][3][54]
PMA_REG[1] bit 7	MAIN[5][3][55]
PMA_REG[2] bit 0	MAIN[5][3][56]
PMA_REG[2] bit 1	MAIN[5][3][57]
PMA_REG[2] bit 2	MAIN[5][3][58]
PMA_REG[2] bit 3	MAIN[5][3][59]
PMA_REG[2] bit 4	MAIN[5][3][60]
PMA_REG[2] bit 5	MAIN[5][3][61]
PMA_REG[2] bit 6	MAIN[5][3][62]
PMA_REG[2] bit 7	MAIN[5][3][63]
PMA_REG[3] bit 0	MAIN[5][3][64]
PMA_REG[3] bit 1	MAIN[5][3][65]
PMA_REG[3] bit 2	MAIN[5][3][66]
PMA_REG[3] bit 3	MAIN[5][3][67]
PMA_REG[3] bit 4	MAIN[5][3][68]
PMA_REG[3] bit 5	MAIN[5][3][69]
PMA_REG[3] bit 6	MAIN[5][3][70]
PMA_REG[3] bit 7	MAIN[5][3][71]
PMA_REG[4] bit 0	MAIN[5][3][72]
PMA_REG[4] bit 1	MAIN[5][3][73]
PMA_REG[4] bit 2	MAIN[5][3][74]
PMA_REG[4] bit 3	MAIN[5][3][75]
PMA_REG[4] bit 4	MAIN[5][3][76]
PMA_REG[4] bit 5	MAIN[5][3][77]
PMA_REG[4] bit 6	MAIN[5][3][78]
PMA_REG[4] bit 7	MAIN[5][3][79]
PMA_REG[5] bit 0	MAIN[6][3][0]
PMA_REG[5] bit 1	MAIN[6][3][1]
PMA_REG[5] bit 2	MAIN[6][3][2]
PMA_REG[5] bit 3	MAIN[7][3][2]
PMA_REG[5] bit 4	MAIN[6][3][4]
PMA_REG[5] bit 5	MAIN[6][3][5]
PMA_REG[5] bit 6	MAIN[6][3][6]
PMA_REG[5] bit 7	MAIN[6][3][7]
PMA_REG[6] bit 0	MAIN[6][3][8]
PMA_REG[6] bit 1	MAIN[6][3][9]
PMA_REG[6] bit 2	MAIN[6][3][10]
PMA_REG[6] bit 3	MAIN[6][3][11]
PMA_REG[6] bit 4	MAIN[6][3][12]
PMA_REG[6] bit 5	MAIN[6][3][13]
PMA_REG[6] bit 6	MAIN[6][3][14]
PMA_REG[6] bit 7	MAIN[6][3][15]
PMA_REG[7] bit 0	MAIN[6][3][16]
PMA_REG[7] bit 1	MAIN[6][3][17]
PMA_REG[7] bit 2	MAIN[6][3][18]
PMA_REG[7] bit 3	MAIN[6][3][19]
PMA_REG[7] bit 4	MAIN[6][3][20]
PMA_REG[7] bit 5	MAIN[6][3][21]
PMA_REG[7] bit 6	MAIN[6][3][22]
PMA_REG[7] bit 7	MAIN[6][3][23]
PMA_REG[8] bit 0	MAIN[6][3][24]
PMA_REG[8] bit 1	MAIN[6][3][25]
PMA_REG[8] bit 2	MAIN[6][3][26]
PMA_REG[8] bit 3	MAIN[6][3][27]
PMA_REG[8] bit 4	MAIN[6][3][28]
PMA_REG[8] bit 5	MAIN[6][3][29]
PMA_REG[8] bit 6	MAIN[6][3][30]
PMA_REG[8] bit 7	MAIN[6][3][31]
PMA_REG[9] bit 0	MAIN[6][3][32]
PMA_REG[9] bit 1	MAIN[6][3][33]
PMA_REG[9] bit 2	MAIN[6][3][34]
PMA_REG[9] bit 3	MAIN[6][3][35]
PMA_REG[9] bit 4	MAIN[6][3][36]
PMA_REG[9] bit 5	MAIN[6][3][37]
PMA_REG[9] bit 6	MAIN[6][3][38]
PMA_REG[9] bit 7	MAIN[6][3][39]
PMA_REG[10] bit 0	MAIN[6][3][40]
PMA_REG[10] bit 1	MAIN[6][3][41]
PMA_REG[10] bit 2	MAIN[6][3][42]
PMA_REG[10] bit 3	MAIN[6][3][43]
PMA_REG[10] bit 4	MAIN[6][3][44]
PMA_REG[10] bit 5	MAIN[6][3][45]
PMA_REG[10] bit 6	MAIN[6][3][46]
PMA_REG[10] bit 7	MAIN[6][3][47]
PMA_REG[11] bit 0	MAIN[6][3][48]
PMA_REG[11] bit 1	MAIN[6][3][49]
PMA_REG[11] bit 2	MAIN[6][3][50]
PMA_REG[11] bit 3	MAIN[6][3][51]
PMA_REG[11] bit 4	MAIN[6][3][52]
PMA_REG[11] bit 5	MAIN[6][3][53]
PMA_REG[11] bit 6	MAIN[6][3][54]
PMA_REG[11] bit 7	MAIN[6][3][55]
PMA_REG[12] bit 0	MAIN[6][3][56]
PMA_REG[12] bit 1	MAIN[6][3][57]
PMA_REG[12] bit 2	MAIN[6][3][58]
PMA_REG[12] bit 3	MAIN[6][3][59]
PMA_REG[12] bit 4	MAIN[6][3][60]
PMA_REG[12] bit 5	MAIN[6][3][61]
PMA_REG[12] bit 6	MAIN[6][3][62]
PMA_REG[12] bit 7	MAIN[6][3][63]
PMA_REG[13] bit 0	MAIN[6][3][64]
PMA_REG[13] bit 1	MAIN[6][3][65]
PMA_REG[13] bit 2	MAIN[6][3][66]
PMA_REG[13] bit 3	MAIN[6][3][67]
PMA_REG[13] bit 4	MAIN[6][3][68]
PMA_REG[13] bit 5	MAIN[6][3][69]
PMA_REG[13] bit 6	MAIN[6][3][70]
PMA_REG[13] bit 7	MAIN[6][3][71]
PMA_REG[14] bit 0	MAIN[6][3][72]
PMA_REG[14] bit 1	MAIN[6][3][73]
PMA_REG[14] bit 2	MAIN[6][3][74]
PMA_REG[14] bit 3	MAIN[6][3][75]
PMA_REG[14] bit 4	MAIN[6][3][76]
PMA_REG[14] bit 5	MAIN[6][3][77]
PMA_REG[14] bit 6	MAIN[6][3][78]
PMA_REG[14] bit 7	MAIN[6][3][79]
PMA_REG[15] bit 0	MAIN[4][3][50]
PMA_REG[15] bit 1	MAIN[4][3][51]
PMA_REG[15] bit 2	MAIN[4][3][52]
PMA_REG[15] bit 3	MAIN[4][3][53]
PMA_REG[15] bit 4	MAIN[4][3][54]
PMA_REG[15] bit 5	MAIN[4][3][55]
PMA_REG[15] bit 6	MAIN[4][3][56]
PMA_REG[15] bit 7	MAIN[4][3][57]
MASTERBIAS bit 0	MAIN[5][3][40]
MASTERBIAS bit 1	MAIN[5][3][41]
VCODAC bit 0	MAIN[5][3][42]
VCODAC bit 1	MAIN[5][3][43]
VCODAC bit 2	MAIN[5][3][44]
VCODAC bit 3	MAIN[5][3][45]
VCODAC bit 4	MAIN[5][3][46]
VCODAC bit 5	MAIN[5][3][47]
TXDIVRATIO bit 0	MAIN[5][3][48]
TXDIVRATIO bit 1	MAIN[5][3][49]
TXDIVRATIO bit 2	MAIN[5][3][50]
TXDIVRATIO bit 3	MAIN[5][3][51]
TXDIVRATIO bit 4	MAIN[5][3][52]
TXDIVRATIO bit 5	MAIN[5][3][53]
TXDIVRATIO bit 6	MAIN[5][3][54]
TXDIVRATIO bit 7	MAIN[5][3][55]
TXDIVRATIO bit 8	MAIN[5][3][56]
TXDIVRATIO bit 9	MAIN[5][3][57]
TXBUSWID bit 0	MAIN[5][3][58]
ENDCD bit 0	MAIN[5][3][59]
SEL_DAC_TRAN bit 0	MAIN[6][3][30]
SEL_DAC_TRAN bit 1	MAIN[6][3][31]
SEL_DAC_TRAN bit 2	MAIN[5][3][60]
SEL_DAC_TRAN bit 3	MAIN[5][3][61]
SEL_DAC_FIX bit 0	MAIN[6][3][38]
SEL_DAC_FIX bit 1	MAIN[6][3][39]
SEL_DAC_FIX bit 2	MAIN[5][3][62]
SEL_DAC_FIX bit 3	MAIN[5][3][63]
TXLOOPFILTERC bit 0	MAIN[5][3][64]
TXLOOPFILTERC bit 1	MAIN[5][3][65]
TXLOOPFILTERR bit 0	MAIN[5][3][66]
TXLOOPFILTERR bit 1	MAIN[5][3][67]
IBOOST bit 0	MAIN[5][3][71]
TXCPI bit 0	MAIN[5][3][72]
TXVCODAC bit 0	MAIN[5][3][74]
TXVCOGAIN bit 0	MAIN[5][3][75]
TXVSEL bit 0	MAIN[5][3][76]
TXVSEL bit 1	MAIN[5][3][77]
TXREG bit 0	MAIN[5][3][78]
TXREG bit 1	MAIN[5][3][79]
TXDOWNLEVEL bit 0	MAIN[6][3][0]
TXDOWNLEVEL bit 1	MAIN[6][3][1]
TXDOWNLEVEL bit 2	MAIN[6][3][2]
TXDOWNLEVEL bit 3	MAIN[7][3][2]
PRDRVOFF bit 0	MAIN[6][3][4]
EMPOFF bit 0	MAIN[6][3][5]
SLEW bit 0	MAIN[6][3][6]
TXEMPHLEVEL bit 0	MAIN[6][3][8]
TXEMPHLEVEL bit 1	MAIN[6][3][9]
TXEMPHLEVEL bit 2	MAIN[6][3][10]
TXEMPHLEVEL bit 3	MAIN[6][3][11]
TXDIGSW bit 0	MAIN[6][3][12]
TXANASW bit 0	MAIN[6][3][13]
RXDIVRATIO bit 0	MAIN[6][3][16]
RXDIVRATIO bit 1	MAIN[6][3][17]
RXDIVRATIO bit 2	MAIN[6][3][18]
RXDIVRATIO bit 3	MAIN[6][3][19]
RXDIVRATIO bit 4	MAIN[6][3][20]
RXDIVRATIO bit 5	MAIN[6][3][21]
RXDIVRATIO bit 6	MAIN[6][3][22]
RXDIVRATIO bit 7	MAIN[6][3][23]
RXDIVRATIO bit 8	MAIN[6][3][24]
RXDIVRATIO bit 9	MAIN[6][3][25]
RXDIVRATIO bit 10	MAIN[6][3][26]
RXDIVRATIO bit 11	MAIN[6][3][27]
RXDIVRATIO bit 12	MAIN[6][3][28]
RXDIVRATIO bit 13	MAIN[6][3][29]
RXLOOPFILTERC bit 0	MAIN[6][3][32]
RXLOOPFILTERC bit 1	MAIN[6][3][33]
RXLOOPFILTERR bit 0	MAIN[6][3][34]
RXLOOPFILTERR bit 1	MAIN[6][3][35]
RXLOOPFILTERR bit 2	MAIN[6][3][36]
AFE_FLAT_ENABLE bit 0	MAIN[6][3][37]
RXVCOSW bit 0	MAIN[6][3][40]
RXCPI bit 0	MAIN[6][3][41]
RXCPI bit 1	MAIN[6][3][55]
RXVCODAC bit 0	MAIN[6][3][42]
RXVCOGAIN bit 0	MAIN[6][3][43]
RXVSEL bit 0	MAIN[6][3][44]
RXVSEL bit 1	MAIN[6][3][45]
RXREG bit 0	MAIN[6][3][46]
RXREG bit 1	MAIN[6][3][47]
RXFLTCPT bit 0	MAIN[6][3][48]
RXFLTCPT bit 1	MAIN[6][3][49]
RXFLTCPT bit 2	MAIN[6][3][50]
RXFLTCPT bit 3	MAIN[6][3][51]
RXFLTCPT bit 4	MAIN[6][3][52]
RXVSELCP bit 0	MAIN[6][3][53]
RXVSELCP bit 1	MAIN[6][3][54]
VSELAFE bit 0	MAIN[6][3][56]
VSELAFE bit 1	MAIN[6][3][57]
RXFEI bit 0	MAIN[6][3][58]
RXFEI bit 1	MAIN[6][3][59]
RXFLCPI bit 0	MAIN[6][3][60]
RXFLCPI bit 1	MAIN[6][3][61]
RXFER bit 0	MAIN[6][3][62]
RXFER bit 1	MAIN[6][3][63]
RXFER bit 2	MAIN[6][3][64]
RXFER bit 3	MAIN[6][3][65]
RXFER bit 4	MAIN[6][3][66]
RXFER bit 5	MAIN[6][3][67]
RXFER bit 6	MAIN[6][3][68]
RXFER bit 7	MAIN[6][3][69]
RXFER bit 8	MAIN[6][3][70]
RXFER bit 9	MAIN[6][3][71]
PMA_REG_0E bit 0	MAIN[6][3][72]
PMA_REG_0E bit 1	MAIN[6][3][73]
PMA_REG_0E bit 2	MAIN[6][3][74]
PMA_REG_0E bit 3	MAIN[6][3][75]
PMA_REG_0E bit 4	MAIN[6][3][76]
PMA_REG_0E bit 5	MAIN[6][3][77]
PMA_REG_0E bit 6	MAIN[6][3][78]
PMA_REG_0E bit 7	MAIN[6][3][79]
BIASEN	MAIN[4][3][50]
TXANAEN	MAIN[4][3][51]
TXDIGEN	MAIN[4][3][52]
RXANAEN	MAIN[4][3][53]
PMA_PWR_CNTRL_BIT4	MAIN[4][3][54]
TXEN	MAIN[4][3][55]
RXEN	MAIN[4][3][56]
TXDRVEN	MAIN[4][3][57]
RX_BUFFER_USE	MAIN[1][3][25]
RX_CRC_USE	MAIN[2][3][35]
RX_LOS_INVALID_INCR	[enum: GT_RX_LOS_INVALID_INCR]
RX_LOS_THRESHOLD	[enum: GT_RX_LOS_THRESHOLD]
RX_LOSS_OF_SYNC_FSM	MAIN[3][3][23]
TX_BUFFER_USE	MAIN_IO[3][36]
TX_CRC_FORCE_VALUE bit 0	MAIN_IO[3][38]
TX_CRC_FORCE_VALUE bit 1	MAIN_IO[3][39]
TX_CRC_FORCE_VALUE bit 2	MAIN_IO[3][40]
TX_CRC_FORCE_VALUE bit 3	MAIN_IO[3][41]
TX_CRC_FORCE_VALUE bit 4	MAIN_IO[3][42]
TX_CRC_FORCE_VALUE bit 5	MAIN_IO[3][43]
TX_CRC_FORCE_VALUE bit 6	MAIN_IO[3][44]
TX_CRC_FORCE_VALUE bit 7	MAIN_IO[3][45]
TX_CRC_USE	MAIN_IO[3][37]
ALIGN_COMMA_WORD	[enum: GT10_ALIGN_COMMA_WORD]
PCOMMA_DETECT	MAIN[0][3][34]
MCOMMA_DETECT	MAIN[0][3][22]
COMMA_10B_MASK bit 0	MAIN[0][3][1]
COMMA_10B_MASK bit 1	MAIN[0][3][2]
COMMA_10B_MASK bit 2	MAIN[0][3][3]
COMMA_10B_MASK bit 3	MAIN[0][3][4]
COMMA_10B_MASK bit 4	MAIN[0][3][5]
COMMA_10B_MASK bit 5	MAIN[0][3][6]
COMMA_10B_MASK bit 6	MAIN[0][3][7]
COMMA_10B_MASK bit 7	MAIN[0][3][8]
COMMA_10B_MASK bit 8	MAIN[0][3][9]
COMMA_10B_MASK bit 9	MAIN[0][3][10]
PCOMMA_10B_VALUE bit 0	MAIN[0][3][23]
PCOMMA_10B_VALUE bit 1	MAIN[0][3][24]
PCOMMA_10B_VALUE bit 2	MAIN[0][3][25]
PCOMMA_10B_VALUE bit 3	MAIN[0][3][26]
PCOMMA_10B_VALUE bit 4	MAIN[0][3][27]
PCOMMA_10B_VALUE bit 5	MAIN[0][3][28]
PCOMMA_10B_VALUE bit 6	MAIN[0][3][29]
PCOMMA_10B_VALUE bit 7	MAIN[0][3][30]
PCOMMA_10B_VALUE bit 8	MAIN[0][3][31]
PCOMMA_10B_VALUE bit 9	MAIN[0][3][32]
MCOMMA_10B_VALUE bit 0	MAIN[0][3][11]
MCOMMA_10B_VALUE bit 1	MAIN[0][3][12]
MCOMMA_10B_VALUE bit 2	MAIN[0][3][13]
MCOMMA_10B_VALUE bit 3	MAIN[0][3][14]
MCOMMA_10B_VALUE bit 4	MAIN[0][3][15]
MCOMMA_10B_VALUE bit 5	MAIN[0][3][16]
MCOMMA_10B_VALUE bit 6	MAIN[0][3][17]
MCOMMA_10B_VALUE bit 7	MAIN[0][3][18]
MCOMMA_10B_VALUE bit 8	MAIN[0][3][19]
MCOMMA_10B_VALUE bit 9	MAIN[0][3][20]
DEC_PCOMMA_DETECT	MAIN[1][3][31]
DEC_MCOMMA_DETECT	MAIN[1][3][32]
DEC_VALID_COMMA_ONLY	MAIN[1][3][30]
SH_CNT_MAX bit 0	MAIN[7][3][15]
SH_CNT_MAX bit 1	MAIN[7][3][16]
SH_CNT_MAX bit 2	MAIN[7][3][17]
SH_CNT_MAX bit 3	MAIN[7][3][18]
SH_CNT_MAX bit 4	MAIN[7][3][19]
SH_CNT_MAX bit 5	MAIN[7][3][20]
SH_CNT_MAX bit 6	MAIN[7][3][21]
SH_CNT_MAX bit 7	MAIN[7][3][22]
SH_INVALID_CNT_MAX bit 0	MAIN[7][3][23]
SH_INVALID_CNT_MAX bit 1	MAIN[7][3][24]
SH_INVALID_CNT_MAX bit 2	MAIN[7][3][25]
SH_INVALID_CNT_MAX bit 3	MAIN[7][3][26]
SH_INVALID_CNT_MAX bit 4	MAIN[7][3][27]
SH_INVALID_CNT_MAX bit 5	MAIN[7][3][28]
SH_INVALID_CNT_MAX bit 6	MAIN[7][3][29]
SH_INVALID_CNT_MAX bit 7	MAIN[7][3][30]
CRC_FORMAT	[enum: GT_CRC_FORMAT]
CRC_START_OF_PKT bit 0	MAIN_IO[3][13]
CRC_START_OF_PKT bit 1	MAIN_IO[3][14]
CRC_START_OF_PKT bit 2	MAIN_IO[3][15]
CRC_START_OF_PKT bit 3	MAIN_IO[3][16]
CRC_START_OF_PKT bit 4	MAIN_IO[3][17]
CRC_START_OF_PKT bit 5	MAIN_IO[3][18]
CRC_START_OF_PKT bit 6	MAIN_IO[3][19]
CRC_START_OF_PKT bit 7	MAIN_IO[3][20]
CRC_END_OF_PKT bit 0	MAIN_IO[3][70]
CRC_END_OF_PKT bit 1	MAIN_IO[3][71]
CRC_END_OF_PKT bit 2	MAIN_IO[3][72]
CRC_END_OF_PKT bit 3	MAIN_IO[3][73]
CRC_END_OF_PKT bit 4	MAIN_IO[3][74]
CRC_END_OF_PKT bit 5	MAIN_IO[3][75]
CRC_END_OF_PKT bit 6	MAIN_IO[3][76]
CRC_END_OF_PKT bit 7	MAIN_IO[3][77]
CLK_CORRECT_USE	MAIN[1][3][10]
CLK_COR_8B10B_DE	MAIN[4][3][32]
CLK_COR_INSERT_IDLE_FLAG	MAIN[1][3][11]
CLK_COR_KEEP_IDLE	MAIN[1][3][12]
CLK_COR_REPEAT_WAIT bit 0	MAIN[1][3][13]
CLK_COR_REPEAT_WAIT bit 1	MAIN[1][3][14]
CLK_COR_REPEAT_WAIT bit 2	MAIN[1][3][15]
CLK_COR_REPEAT_WAIT bit 3	MAIN[1][3][16]
CLK_COR_REPEAT_WAIT bit 4	MAIN[1][3][17]
CLK_COR_ADJ_MAX bit 0	MAIN[4][3][13]
CLK_COR_ADJ_MAX bit 1	MAIN[4][3][14]
CLK_COR_ADJ_MAX bit 2	MAIN[4][3][15]
CLK_COR_ADJ_MAX bit 3	MAIN[4][3][16]
CLK_COR_ADJ_MAX bit 4	MAIN[4][3][17]
CLK_COR_MIN_LAT bit 0	MAIN[4][3][19]
CLK_COR_MIN_LAT bit 1	MAIN[4][3][20]
CLK_COR_MIN_LAT bit 2	MAIN[4][3][21]
CLK_COR_MIN_LAT bit 3	MAIN[4][3][22]
CLK_COR_MIN_LAT bit 4	MAIN[4][3][23]
CLK_COR_MIN_LAT bit 5	MAIN[4][3][24]
CLK_COR_MAX_LAT bit 0	MAIN[4][3][25]
CLK_COR_MAX_LAT bit 1	MAIN[4][3][26]
CLK_COR_MAX_LAT bit 2	MAIN[4][3][27]
CLK_COR_MAX_LAT bit 3	MAIN[4][3][28]
CLK_COR_MAX_LAT bit 4	MAIN[4][3][29]
CLK_COR_MAX_LAT bit 5	MAIN[4][3][30]
CLK_COR_SEQ_LEN	[enum: GT10_SEQ_LEN]
CLK_COR_SEQ_2_USE	MAIN[1][3][35]
CLK_COR_SEQ_DROP	MAIN[5][3][13]
CLK_COR_SEQ_1_MASK bit 0	MAIN[5][3][2]
CLK_COR_SEQ_1_MASK bit 1	MAIN[5][3][4]
CLK_COR_SEQ_1_MASK bit 2	MAIN[5][3][5]
CLK_COR_SEQ_1_MASK bit 3	MAIN[5][3][6]
CLK_COR_SEQ_2_MASK bit 0	MAIN[5][3][8]
CLK_COR_SEQ_2_MASK bit 1	MAIN[5][3][9]
CLK_COR_SEQ_2_MASK bit 2	MAIN[5][3][10]
CLK_COR_SEQ_2_MASK bit 3	MAIN[5][3][11]
CLK_COR_SEQ_1_1 bit 0	MAIN[0][3][69]
CLK_COR_SEQ_1_1 bit 1	MAIN[0][3][70]
CLK_COR_SEQ_1_1 bit 2	MAIN[0][3][71]
CLK_COR_SEQ_1_1 bit 3	MAIN[0][3][72]
CLK_COR_SEQ_1_1 bit 4	MAIN[0][3][73]
CLK_COR_SEQ_1_1 bit 5	MAIN[0][3][74]
CLK_COR_SEQ_1_1 bit 6	MAIN[0][3][75]
CLK_COR_SEQ_1_1 bit 7	MAIN[0][3][76]
CLK_COR_SEQ_1_1 bit 8	MAIN[0][3][77]
CLK_COR_SEQ_1_1 bit 9	MAIN[0][3][78]
CLK_COR_SEQ_1_1 bit 10	MAIN[0][3][79]
CLK_COR_SEQ_1_2 bit 0	MAIN[0][3][58]
CLK_COR_SEQ_1_2 bit 1	MAIN[0][3][59]
CLK_COR_SEQ_1_2 bit 2	MAIN[0][3][60]
CLK_COR_SEQ_1_2 bit 3	MAIN[0][3][61]
CLK_COR_SEQ_1_2 bit 4	MAIN[0][3][62]
CLK_COR_SEQ_1_2 bit 5	MAIN[0][3][63]
CLK_COR_SEQ_1_2 bit 6	MAIN[0][3][64]
CLK_COR_SEQ_1_2 bit 7	MAIN[0][3][65]
CLK_COR_SEQ_1_2 bit 8	MAIN[0][3][66]
CLK_COR_SEQ_1_2 bit 9	MAIN[0][3][67]
CLK_COR_SEQ_1_2 bit 10	MAIN[0][3][68]
CLK_COR_SEQ_1_3 bit 0	MAIN[0][3][47]
CLK_COR_SEQ_1_3 bit 1	MAIN[0][3][48]
CLK_COR_SEQ_1_3 bit 2	MAIN[0][3][49]
CLK_COR_SEQ_1_3 bit 3	MAIN[0][3][50]
CLK_COR_SEQ_1_3 bit 4	MAIN[0][3][51]
CLK_COR_SEQ_1_3 bit 5	MAIN[0][3][52]
CLK_COR_SEQ_1_3 bit 6	MAIN[0][3][53]
CLK_COR_SEQ_1_3 bit 7	MAIN[0][3][54]
CLK_COR_SEQ_1_3 bit 8	MAIN[0][3][55]
CLK_COR_SEQ_1_3 bit 9	MAIN[0][3][56]
CLK_COR_SEQ_1_3 bit 10	MAIN[0][3][57]
CLK_COR_SEQ_1_4 bit 0	MAIN[0][3][36]
CLK_COR_SEQ_1_4 bit 1	MAIN[0][3][37]
CLK_COR_SEQ_1_4 bit 2	MAIN[0][3][38]
CLK_COR_SEQ_1_4 bit 3	MAIN[0][3][39]
CLK_COR_SEQ_1_4 bit 4	MAIN[0][3][40]
CLK_COR_SEQ_1_4 bit 5	MAIN[0][3][41]
CLK_COR_SEQ_1_4 bit 6	MAIN[0][3][42]
CLK_COR_SEQ_1_4 bit 7	MAIN[0][3][43]
CLK_COR_SEQ_1_4 bit 8	MAIN[0][3][44]
CLK_COR_SEQ_1_4 bit 9	MAIN[0][3][45]
CLK_COR_SEQ_1_4 bit 10	MAIN[0][3][46]
CLK_COR_SEQ_2_1 bit 0	MAIN[1][3][69]
CLK_COR_SEQ_2_1 bit 1	MAIN[1][3][70]
CLK_COR_SEQ_2_1 bit 2	MAIN[1][3][71]
CLK_COR_SEQ_2_1 bit 3	MAIN[1][3][72]
CLK_COR_SEQ_2_1 bit 4	MAIN[1][3][73]
CLK_COR_SEQ_2_1 bit 5	MAIN[1][3][74]
CLK_COR_SEQ_2_1 bit 6	MAIN[1][3][75]
CLK_COR_SEQ_2_1 bit 7	MAIN[1][3][76]
CLK_COR_SEQ_2_1 bit 8	MAIN[1][3][77]
CLK_COR_SEQ_2_1 bit 9	MAIN[1][3][78]
CLK_COR_SEQ_2_1 bit 10	MAIN[1][3][79]
CLK_COR_SEQ_2_2 bit 0	MAIN[1][3][58]
CLK_COR_SEQ_2_2 bit 1	MAIN[1][3][59]
CLK_COR_SEQ_2_2 bit 2	MAIN[1][3][60]
CLK_COR_SEQ_2_2 bit 3	MAIN[1][3][61]
CLK_COR_SEQ_2_2 bit 4	MAIN[1][3][62]
CLK_COR_SEQ_2_2 bit 5	MAIN[1][3][63]
CLK_COR_SEQ_2_2 bit 6	MAIN[1][3][64]
CLK_COR_SEQ_2_2 bit 7	MAIN[1][3][65]
CLK_COR_SEQ_2_2 bit 8	MAIN[1][3][66]
CLK_COR_SEQ_2_2 bit 9	MAIN[1][3][67]
CLK_COR_SEQ_2_2 bit 10	MAIN[1][3][68]
CLK_COR_SEQ_2_3 bit 0	MAIN[1][3][47]
CLK_COR_SEQ_2_3 bit 1	MAIN[1][3][48]
CLK_COR_SEQ_2_3 bit 2	MAIN[1][3][49]
CLK_COR_SEQ_2_3 bit 3	MAIN[1][3][50]
CLK_COR_SEQ_2_3 bit 4	MAIN[1][3][51]
CLK_COR_SEQ_2_3 bit 5	MAIN[1][3][52]
CLK_COR_SEQ_2_3 bit 6	MAIN[1][3][53]
CLK_COR_SEQ_2_3 bit 7	MAIN[1][3][54]
CLK_COR_SEQ_2_3 bit 8	MAIN[1][3][55]
CLK_COR_SEQ_2_3 bit 9	MAIN[1][3][56]
CLK_COR_SEQ_2_3 bit 10	MAIN[1][3][57]
CLK_COR_SEQ_2_4 bit 0	MAIN[1][3][36]
CLK_COR_SEQ_2_4 bit 1	MAIN[1][3][37]
CLK_COR_SEQ_2_4 bit 2	MAIN[1][3][38]
CLK_COR_SEQ_2_4 bit 3	MAIN[1][3][39]
CLK_COR_SEQ_2_4 bit 4	MAIN[1][3][40]
CLK_COR_SEQ_2_4 bit 5	MAIN[1][3][41]
CLK_COR_SEQ_2_4 bit 6	MAIN[1][3][42]
CLK_COR_SEQ_2_4 bit 7	MAIN[1][3][43]
CLK_COR_SEQ_2_4 bit 8	MAIN[1][3][44]
CLK_COR_SEQ_2_4 bit 9	MAIN[1][3][45]
CLK_COR_SEQ_2_4 bit 10	MAIN[1][3][46]
CHAN_BOND_MODE	[enum: GT_CHAN_BOND_MODE]
CHAN_BOND_64B66B_SV	MAIN[4][3][33]
CHAN_BOND_LIMIT bit 0	MAIN[3][3][24]
CHAN_BOND_LIMIT bit 1	MAIN[3][3][25]
CHAN_BOND_LIMIT bit 2	MAIN[3][3][26]
CHAN_BOND_LIMIT bit 3	MAIN[3][3][27]
CHAN_BOND_LIMIT bit 4	MAIN[3][3][28]
CHAN_BOND_ONE_SHOT	MAIN[1][3][23]
CHAN_BOND_SEQ_LEN	[enum: GT10_SEQ_LEN]
CHAN_BOND_SEQ_2_USE	MAIN[3][3][35]
CHAN_BOND_SEQ_1_MASK bit 0	MAIN[4][3][3]
CHAN_BOND_SEQ_1_MASK bit 1	MAIN[4][3][4]
CHAN_BOND_SEQ_1_MASK bit 2	MAIN[4][3][5]
CHAN_BOND_SEQ_1_MASK bit 3	MAIN[4][3][6]
CHAN_BOND_SEQ_2_MASK bit 0	MAIN[4][3][8]
CHAN_BOND_SEQ_2_MASK bit 1	MAIN[4][3][9]
CHAN_BOND_SEQ_2_MASK bit 2	MAIN[4][3][10]
CHAN_BOND_SEQ_2_MASK bit 3	MAIN[4][3][11]
CHAN_BOND_SEQ_1_1 bit 0	MAIN[2][3][69]
CHAN_BOND_SEQ_1_1 bit 1	MAIN[2][3][70]
CHAN_BOND_SEQ_1_1 bit 2	MAIN[2][3][71]
CHAN_BOND_SEQ_1_1 bit 3	MAIN[2][3][72]
CHAN_BOND_SEQ_1_1 bit 4	MAIN[2][3][73]
CHAN_BOND_SEQ_1_1 bit 5	MAIN[2][3][74]
CHAN_BOND_SEQ_1_1 bit 6	MAIN[2][3][75]
CHAN_BOND_SEQ_1_1 bit 7	MAIN[2][3][76]
CHAN_BOND_SEQ_1_1 bit 8	MAIN[2][3][77]
CHAN_BOND_SEQ_1_1 bit 9	MAIN[2][3][78]
CHAN_BOND_SEQ_1_1 bit 10	MAIN[2][3][79]
CHAN_BOND_SEQ_1_2 bit 0	MAIN[2][3][58]
CHAN_BOND_SEQ_1_2 bit 1	MAIN[2][3][59]
CHAN_BOND_SEQ_1_2 bit 2	MAIN[2][3][60]
CHAN_BOND_SEQ_1_2 bit 3	MAIN[2][3][61]
CHAN_BOND_SEQ_1_2 bit 4	MAIN[2][3][62]
CHAN_BOND_SEQ_1_2 bit 5	MAIN[2][3][63]
CHAN_BOND_SEQ_1_2 bit 6	MAIN[2][3][64]
CHAN_BOND_SEQ_1_2 bit 7	MAIN[2][3][65]
CHAN_BOND_SEQ_1_2 bit 8	MAIN[2][3][66]
CHAN_BOND_SEQ_1_2 bit 9	MAIN[2][3][67]
CHAN_BOND_SEQ_1_2 bit 10	MAIN[2][3][68]
CHAN_BOND_SEQ_1_3 bit 0	MAIN[2][3][47]
CHAN_BOND_SEQ_1_3 bit 1	MAIN[2][3][48]
CHAN_BOND_SEQ_1_3 bit 2	MAIN[2][3][49]
CHAN_BOND_SEQ_1_3 bit 3	MAIN[2][3][50]
CHAN_BOND_SEQ_1_3 bit 4	MAIN[2][3][51]
CHAN_BOND_SEQ_1_3 bit 5	MAIN[2][3][52]
CHAN_BOND_SEQ_1_3 bit 6	MAIN[2][3][53]
CHAN_BOND_SEQ_1_3 bit 7	MAIN[2][3][54]
CHAN_BOND_SEQ_1_3 bit 8	MAIN[2][3][55]
CHAN_BOND_SEQ_1_3 bit 9	MAIN[2][3][56]
CHAN_BOND_SEQ_1_3 bit 10	MAIN[2][3][57]
CHAN_BOND_SEQ_1_4 bit 0	MAIN[2][3][36]
CHAN_BOND_SEQ_1_4 bit 1	MAIN[2][3][37]
CHAN_BOND_SEQ_1_4 bit 2	MAIN[2][3][38]
CHAN_BOND_SEQ_1_4 bit 3	MAIN[2][3][39]
CHAN_BOND_SEQ_1_4 bit 4	MAIN[2][3][40]
CHAN_BOND_SEQ_1_4 bit 5	MAIN[2][3][41]
CHAN_BOND_SEQ_1_4 bit 6	MAIN[2][3][42]
CHAN_BOND_SEQ_1_4 bit 7	MAIN[2][3][43]
CHAN_BOND_SEQ_1_4 bit 8	MAIN[2][3][44]
CHAN_BOND_SEQ_1_4 bit 9	MAIN[2][3][45]
CHAN_BOND_SEQ_1_4 bit 10	MAIN[2][3][46]
CHAN_BOND_SEQ_2_1 bit 0	MAIN[3][3][69]
CHAN_BOND_SEQ_2_1 bit 1	MAIN[3][3][70]
CHAN_BOND_SEQ_2_1 bit 2	MAIN[3][3][71]
CHAN_BOND_SEQ_2_1 bit 3	MAIN[3][3][72]
CHAN_BOND_SEQ_2_1 bit 4	MAIN[3][3][73]
CHAN_BOND_SEQ_2_1 bit 5	MAIN[3][3][74]
CHAN_BOND_SEQ_2_1 bit 6	MAIN[3][3][75]
CHAN_BOND_SEQ_2_1 bit 7	MAIN[3][3][76]
CHAN_BOND_SEQ_2_1 bit 8	MAIN[3][3][77]
CHAN_BOND_SEQ_2_1 bit 9	MAIN[3][3][78]
CHAN_BOND_SEQ_2_1 bit 10	MAIN[3][3][79]
CHAN_BOND_SEQ_2_2 bit 0	MAIN[3][3][58]
CHAN_BOND_SEQ_2_2 bit 1	MAIN[3][3][59]
CHAN_BOND_SEQ_2_2 bit 2	MAIN[3][3][60]
CHAN_BOND_SEQ_2_2 bit 3	MAIN[3][3][61]
CHAN_BOND_SEQ_2_2 bit 4	MAIN[3][3][62]
CHAN_BOND_SEQ_2_2 bit 5	MAIN[3][3][63]
CHAN_BOND_SEQ_2_2 bit 6	MAIN[3][3][64]
CHAN_BOND_SEQ_2_2 bit 7	MAIN[3][3][65]
CHAN_BOND_SEQ_2_2 bit 8	MAIN[3][3][66]
CHAN_BOND_SEQ_2_2 bit 9	MAIN[3][3][67]
CHAN_BOND_SEQ_2_2 bit 10	MAIN[3][3][68]
CHAN_BOND_SEQ_2_3 bit 0	MAIN[3][3][47]
CHAN_BOND_SEQ_2_3 bit 1	MAIN[3][3][48]
CHAN_BOND_SEQ_2_3 bit 2	MAIN[3][3][49]
CHAN_BOND_SEQ_2_3 bit 3	MAIN[3][3][50]
CHAN_BOND_SEQ_2_3 bit 4	MAIN[3][3][51]
CHAN_BOND_SEQ_2_3 bit 5	MAIN[3][3][52]
CHAN_BOND_SEQ_2_3 bit 6	MAIN[3][3][53]
CHAN_BOND_SEQ_2_3 bit 7	MAIN[3][3][54]
CHAN_BOND_SEQ_2_3 bit 8	MAIN[3][3][55]
CHAN_BOND_SEQ_2_3 bit 9	MAIN[3][3][56]
CHAN_BOND_SEQ_2_3 bit 10	MAIN[3][3][57]
CHAN_BOND_SEQ_2_4 bit 0	MAIN[3][3][36]
CHAN_BOND_SEQ_2_4 bit 1	MAIN[3][3][37]
CHAN_BOND_SEQ_2_4 bit 2	MAIN[3][3][38]
CHAN_BOND_SEQ_2_4 bit 3	MAIN[3][3][39]
CHAN_BOND_SEQ_2_4 bit 4	MAIN[3][3][40]
CHAN_BOND_SEQ_2_4 bit 5	MAIN[3][3][41]
CHAN_BOND_SEQ_2_4 bit 6	MAIN[3][3][42]
CHAN_BOND_SEQ_2_4 bit 7	MAIN[3][3][43]
CHAN_BOND_SEQ_2_4 bit 8	MAIN[3][3][44]
CHAN_BOND_SEQ_2_4 bit 9	MAIN[3][3][45]
CHAN_BOND_SEQ_2_4 bit 10	MAIN[3][3][46]
TEST_MODE_1	MAIN[2][3][11]
TEST_MODE_2	MAIN[2][3][12]
TEST_MODE_3	MAIN[2][3][13]
TEST_MODE_4	MAIN[2][3][14]
TEST_MODE_5	MAIN[2][3][15]
TEST_MODE_6	MAIN[2][3][16]

virtex2 GIGABIT10_S enum GT_RX_LOS_INVALID_INCR
GT10.RX_LOS_INVALID_INCR	MAIN[3][3][30]	MAIN[3][3][22]	MAIN[3][3][21]	MAIN[3][3][20]	MAIN[3][3][19]	MAIN[3][3][18]	MAIN[3][3][17]	MAIN[3][3][16]
_1	0	0	0	0	0	0	0	1
_2	0	0	0	0	0	0	1	0
_4	0	0	0	0	0	1	0	0
_8	0	0	0	0	1	0	0	0
_16	0	0	0	1	0	0	0	0
_32	0	0	1	0	0	0	0	0
_64	0	1	0	0	0	0	0	0
_128	1	0	0	0	0	0	0	0

virtex2 GIGABIT10_S enum GT_RX_LOS_THRESHOLD
GT10.RX_LOS_THRESHOLD	MAIN[3][3][15]	MAIN[3][3][14]	MAIN[3][3][13]	MAIN[3][3][12]	MAIN[3][3][11]	MAIN[3][3][10]	MAIN[3][3][9]	MAIN[3][3][8]
_4	0	0	0	0	0	0	0	1
_8	0	0	0	0	0	0	1	0
_16	0	0	0	0	0	1	0	0
_32	0	0	0	0	1	0	0	0
_64	0	0	0	1	0	0	0	0
_128	0	0	1	0	0	0	0	0
_256	0	1	0	0	0	0	0	0
_512	1	0	0	0	0	0	0	0

virtex2 GIGABIT10_S enum GT10_ALIGN_COMMA_WORD
GT10.ALIGN_COMMA_WORD	MAIN[4][3][1]	MAIN[4][3][0]
_1	0	0
_2	0	1
_4	1	0

virtex2 GIGABIT10_S enum GT_CRC_FORMAT
GT10.CRC_FORMAT	MAIN_IO[3][4]	MAIN_IO[3][3]
USER_MODE	0	0
ETHERNET	0	1
INFINIBAND	1	1
FIBRE_CHAN	1	0

virtex2 GIGABIT10_S enum GT10_SEQ_LEN
GT10.CLK_COR_SEQ_LEN	MAIN[2][3][24]	MAIN[2][3][23]	MAIN[2][3][22]
GT10.CHAN_BOND_SEQ_LEN	MAIN[2][3][28]	MAIN[2][3][27]	MAIN[2][3][26]
_1	0	0	0
_2	0	0	1
_3	0	1	0
_4	0	1	1
_8	1	1	1

virtex2 GIGABIT10_S enum GT_CHAN_BOND_MODE
GT10.CHAN_BOND_MODE	MAIN[1][3][4]	MAIN[1][3][2]
NONE	0	0
MASTER	0	1
SLAVE_1_HOP	1	0
SLAVE_2_HOPS	1	1

Bel wires

virtex2 GIGABIT10_S bel wires
Wire	Pins
CELL_IO.IMUX_DCM_CLK_OPTINV[0]	GT10.RXUSRCLK
CELL_IO.IMUX_DCM_CLK_OPTINV[1]	GT10.RXUSRCLK2
CELL_IO.IMUX_DCM_CLK_OPTINV[2]	GT10.REFCLK
CELL_IO.IMUX_DCM_CLK_OPTINV[3]	GT10.REFCLK2
CELL_IO.IMUX_SR_OPTINV[0]	GT10.RXRESET
CELL_IO.IMUX_G0_DATA[0]	GT10.CHBONDI[0]
CELL_IO.IMUX_G0_DATA[1]	GT10.CHBONDI[4]
CELL_IO.IMUX_G0_DATA[2]	GT10.POWERDOWN
CELL_IO.IMUX_G0_DATA[3]	GT10.LOOPBACK[0]
CELL_IO.IMUX_G0_DATA[7]	GT10.PMARXLOCKSEL[1]
CELL_IO.IMUX_G1_DATA[0]	GT10.CHBONDI[1]
CELL_IO.IMUX_G1_DATA[1]	GT10.ENCHANSYNC
CELL_IO.IMUX_G1_DATA[2]	GT10.RXPOLARITY
CELL_IO.IMUX_G1_DATA[3]	GT10.LOOPBACK[1]
CELL_IO.IMUX_G2_DATA[0]	GT10.CHBONDI[2]
CELL_IO.IMUX_G2_DATA[1]	GT10.REFCLKSEL
CELL_IO.IMUX_G2_DATA[3]	GT10.TXPOLARITY
CELL_IO.IMUX_G3_DATA[0]	GT10.CHBONDI[3]
CELL_IO.IMUX_G3_DATA[1]	GT10.PMAINIT
CELL_IO.IMUX_G3_DATA[3]	GT10.TXINHIBIT
CELL_IO.IMUX_G3_DATA[4]	GT10.REFCLKBSEL
CELL_IO.IMUX_G3_DATA[6]	GT10.PMARXLOCKSEL[0]
CELL_IO.OUT_FAN_BEL[0]	GT10.CHBONDDONE
CELL_IO.OUT_FAN_BEL[1]	GT10.RXRECCLK
CELL_IO.OUT_FAN_BEL[2]	GT10.CHBONDO[0]
CELL_IO.OUT_FAN_BEL[3]	GT10.CHBONDO[1]
CELL_IO.OUT_FAN_BEL[4]	GT10.CHBONDO[2]
CELL_IO.OUT_FAN_BEL[5]	GT10.CHBONDO[3]
CELL_IO.OUT_FAN_BEL[6]	GT10.CHBONDO[4]
CELL_IO.OUT_FAN_BEL[7]	GT10.TXOUTCLK
CELL_IO.OUT_SEC_BEL[8]	GT10.PMARXLOCK
CELL_IO.OUT_SEC_BEL[9]	GT10.RXCLKCORCNT[2]
CELL_IO.OUT_SEC_BEL[10]	GT10.RXCLKCORCNT[1]
CELL_IO.OUT_SEC_BEL[11]	GT10.RXCLKCORCNT[0]
CELL_IO.OUT_SEC_BEL[12]	GT10.RXCOMMADET
CELL_IO.OUT_SEC_BEL[13]	GT10.RXREALIGN
CELL_IO.OUT_SEC_BEL[14]	GT10.RXBUFSTATUS[1]
CELL_IO.OUT_SEC_BEL[15]	GT10.RXBUFSTATUS[0]
CELL[0].IMUX_CLK_OPTINV[0]	GT10.TXUSRCLK
CELL[0].IMUX_CLK_OPTINV[1]	GT10.TXUSRCLK2
CELL[0].IMUX_SR_OPTINV[0]	GT10.TXRESET
CELL[0].IMUX_G0_DATA[0]	GT10.TXDATA[0]
CELL[0].IMUX_G0_DATA[1]	GT10.TXDATA[32]
CELL[0].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[0]
CELL[0].IMUX_G1_DATA[0]	GT10.TXDATA[1]
CELL[0].IMUX_G1_DATA[1]	GT10.TXDATA[33]
CELL[0].IMUX_G1_DATA[2]	GT10.TXCHARISK[0]
CELL[0].IMUX_G1_DATA[4]	GT10.ENPCOMMAALIGN
CELL[0].IMUX_G1_DATA[7]	GT10.ENMCOMMAALIGN
CELL[0].IMUX_G2_DATA[0]	GT10.TXDATA[2]
CELL[0].IMUX_G2_DATA[1]	GT10.TXDATA[34]
CELL[0].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[0]
CELL[0].IMUX_G3_DATA[0]	GT10.TXDATA[3]
CELL[0].IMUX_G3_DATA[1]	GT10.TXDATA[35]
CELL[0].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[0]
CELL[0].OUT_FAN_BEL[0]	GT10.RXDATA[0]
CELL[0].OUT_FAN_BEL[1]	GT10.RXDATA[1]
CELL[0].OUT_FAN_BEL[2]	GT10.RXDATA[2]
CELL[0].OUT_FAN_BEL[3]	GT10.RXDATA[3]
CELL[0].OUT_FAN_BEL[4]	GT10.RXDATA[32]
CELL[0].OUT_FAN_BEL[5]	GT10.RXDATA[33]
CELL[0].OUT_FAN_BEL[6]	GT10.RXDATA[34]
CELL[0].OUT_FAN_BEL[7]	GT10.RXDATA[35]
CELL[0].OUT_SEC_BEL[8]	GT10.RXLOSSOFSYNC[0]
CELL[0].OUT_SEC_BEL[9]	GT10.TXKERR[0]
CELL[0].OUT_SEC_BEL[10]	GT10.TXRUNDISP[0]
CELL[0].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[0]
CELL[0].OUT_SEC_BEL[12]	GT10.RXCHARISK[0]
CELL[0].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[0]
CELL[0].OUT_SEC_BEL[14]	GT10.RXDISPERR[0]
CELL[0].OUT_SEC_BEL[15]	GT10.RXRUNDISP[0]
CELL[1].IMUX_G0_DATA[0]	GT10.TXDATA[4]
CELL[1].IMUX_G0_DATA[1]	GT10.TXDATA[36]
CELL[1].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[1]
CELL[1].IMUX_G1_DATA[0]	GT10.TXDATA[5]
CELL[1].IMUX_G1_DATA[1]	GT10.TXDATA[37]
CELL[1].IMUX_G1_DATA[2]	GT10.TXCHARISK[1]
CELL[1].IMUX_G2_DATA[0]	GT10.TXDATA[6]
CELL[1].IMUX_G2_DATA[1]	GT10.TXDATA[38]
CELL[1].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[1]
CELL[1].IMUX_G3_DATA[0]	GT10.TXDATA[7]
CELL[1].IMUX_G3_DATA[1]	GT10.TXDATA[39]
CELL[1].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[1]
CELL[1].OUT_FAN_BEL[0]	GT10.RXDATA[4]
CELL[1].OUT_FAN_BEL[1]	GT10.RXDATA[5]
CELL[1].OUT_FAN_BEL[2]	GT10.RXDATA[6]
CELL[1].OUT_FAN_BEL[3]	GT10.RXDATA[7]
CELL[1].OUT_FAN_BEL[4]	GT10.RXDATA[36]
CELL[1].OUT_FAN_BEL[5]	GT10.RXDATA[37]
CELL[1].OUT_FAN_BEL[6]	GT10.RXDATA[38]
CELL[1].OUT_FAN_BEL[7]	GT10.RXDATA[39]
CELL[1].OUT_SEC_BEL[8]	GT10.RXLOSSOFSYNC[1]
CELL[1].OUT_SEC_BEL[9]	GT10.TXKERR[1]
CELL[1].OUT_SEC_BEL[10]	GT10.TXRUNDISP[1]
CELL[1].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[1]
CELL[1].OUT_SEC_BEL[12]	GT10.RXCHARISK[1]
CELL[1].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[1]
CELL[1].OUT_SEC_BEL[14]	GT10.RXDISPERR[1]
CELL[1].OUT_SEC_BEL[15]	GT10.RXRUNDISP[1]
CELL[2].IMUX_G0_DATA[0]	GT10.TXDATA[8]
CELL[2].IMUX_G0_DATA[1]	GT10.TXDATA[40]
CELL[2].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[2]
CELL[2].IMUX_G1_DATA[0]	GT10.TXDATA[9]
CELL[2].IMUX_G1_DATA[1]	GT10.TXDATA[41]
CELL[2].IMUX_G1_DATA[2]	GT10.TXCHARISK[2]
CELL[2].IMUX_G2_DATA[0]	GT10.TXDATA[10]
CELL[2].IMUX_G2_DATA[1]	GT10.TXDATA[42]
CELL[2].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[2]
CELL[2].IMUX_G3_DATA[0]	GT10.TXDATA[11]
CELL[2].IMUX_G3_DATA[1]	GT10.TXDATA[43]
CELL[2].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[2]
CELL[2].OUT_FAN_BEL[0]	GT10.RXDATA[8]
CELL[2].OUT_FAN_BEL[1]	GT10.RXDATA[9]
CELL[2].OUT_FAN_BEL[2]	GT10.RXDATA[10]
CELL[2].OUT_FAN_BEL[3]	GT10.RXDATA[11]
CELL[2].OUT_FAN_BEL[4]	GT10.RXDATA[40]
CELL[2].OUT_FAN_BEL[5]	GT10.RXDATA[41]
CELL[2].OUT_FAN_BEL[6]	GT10.RXDATA[42]
CELL[2].OUT_FAN_BEL[7]	GT10.RXDATA[43]
CELL[2].OUT_SEC_BEL[8]	GT10.RXCRCERR
CELL[2].OUT_SEC_BEL[9]	GT10.TXKERR[2]
CELL[2].OUT_SEC_BEL[10]	GT10.TXRUNDISP[2]
CELL[2].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[2]
CELL[2].OUT_SEC_BEL[12]	GT10.RXCHARISK[2]
CELL[2].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[2]
CELL[2].OUT_SEC_BEL[14]	GT10.RXDISPERR[2]
CELL[2].OUT_SEC_BEL[15]	GT10.RXRUNDISP[2]
CELL[3].IMUX_G0_DATA[0]	GT10.TXDATA[12]
CELL[3].IMUX_G0_DATA[1]	GT10.TXDATA[44]
CELL[3].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[3]
CELL[3].IMUX_G0_DATA[4]	GT10.TXDATAWIDTH[0]
CELL[3].IMUX_G0_DATA[5]	GT10.TXINTDATAWIDTH[0]
CELL[3].IMUX_G0_DATA[6]	GT10.RXDESCRAM64B66BUSE
CELL[3].IMUX_G1_DATA[0]	GT10.TXDATA[13]
CELL[3].IMUX_G1_DATA[1]	GT10.TXDATA[45]
CELL[3].IMUX_G1_DATA[2]	GT10.TXCHARISK[3]
CELL[3].IMUX_G1_DATA[4]	GT10.TXDATAWIDTH[1]
CELL[3].IMUX_G1_DATA[5]	GT10.TXINTDATAWIDTH[1]
CELL[3].IMUX_G1_DATA[6]	GT10.RXBLOCKSYNC64B66BUSE
CELL[3].IMUX_G2_DATA[0]	GT10.TXDATA[14]
CELL[3].IMUX_G2_DATA[1]	GT10.TXDATA[46]
CELL[3].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[3]
CELL[3].IMUX_G2_DATA[4]	GT10.RXDATAWIDTH[0]
CELL[3].IMUX_G2_DATA[5]	GT10.RXINTDATAWIDTH[0]
CELL[3].IMUX_G2_DATA[6]	GT10.RXCOMMADETUSE
CELL[3].IMUX_G3_DATA[0]	GT10.TXDATA[15]
CELL[3].IMUX_G3_DATA[1]	GT10.TXDATA[47]
CELL[3].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[3]
CELL[3].IMUX_G3_DATA[3]	GT10.TXFORCECRCERR
CELL[3].IMUX_G3_DATA[4]	GT10.RXDATAWIDTH[1]
CELL[3].IMUX_G3_DATA[5]	GT10.RXINTDATAWIDTH[1]
CELL[3].IMUX_G3_DATA[6]	GT10.RXSLIDE
CELL[3].OUT_FAN_BEL[0]	GT10.RXDATA[12]
CELL[3].OUT_FAN_BEL[1]	GT10.RXDATA[13]
CELL[3].OUT_FAN_BEL[2]	GT10.RXDATA[14]
CELL[3].OUT_FAN_BEL[3]	GT10.RXDATA[15]
CELL[3].OUT_FAN_BEL[4]	GT10.RXDATA[44]
CELL[3].OUT_FAN_BEL[5]	GT10.RXDATA[45]
CELL[3].OUT_FAN_BEL[6]	GT10.RXDATA[46]
CELL[3].OUT_FAN_BEL[7]	GT10.RXDATA[47]
CELL[3].OUT_SEC_BEL[8]	GT10.RXCHECKINGCRC
CELL[3].OUT_SEC_BEL[9]	GT10.TXKERR[3]
CELL[3].OUT_SEC_BEL[10]	GT10.TXRUNDISP[3]
CELL[3].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[3]
CELL[3].OUT_SEC_BEL[12]	GT10.RXCHARISK[3]
CELL[3].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[3]
CELL[3].OUT_SEC_BEL[14]	GT10.RXDISPERR[3]
CELL[3].OUT_SEC_BEL[15]	GT10.RXRUNDISP[3]
CELL[4].IMUX_G0_DATA[0]	GT10.TXDATA[16]
CELL[4].IMUX_G0_DATA[1]	GT10.TXDATA[48]
CELL[4].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[4]
CELL[4].IMUX_G0_DATA[3]	GT10.TESTMEMORY
CELL[4].IMUX_G0_DATA[4]	GT10.RXDEC64B66BUSE
CELL[4].IMUX_G0_DATA[6]	GT10.SCANIN
CELL[4].IMUX_G1_DATA[0]	GT10.TXDATA[17]
CELL[4].IMUX_G1_DATA[1]	GT10.TXDATA[49]
CELL[4].IMUX_G1_DATA[2]	GT10.TXCHARISK[4]
CELL[4].IMUX_G1_DATA[3]	GT10.RXIGNOREBTF
CELL[4].IMUX_G1_DATA[4]	GT10.TXSCRAM64B66BUSE
CELL[4].IMUX_G1_DATA[6]	GT10.SCANEN
CELL[4].IMUX_G2_DATA[0]	GT10.TXDATA[18]
CELL[4].IMUX_G2_DATA[1]	GT10.TXDATA[50]
CELL[4].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[4]
CELL[4].IMUX_G2_DATA[3]	GT10.TXENC8B10BUSE
CELL[4].IMUX_G2_DATA[4]	GT10.TXGEARBOX64B66BUSE
CELL[4].IMUX_G2_DATA[6]	GT10.SCANMODE
CELL[4].IMUX_G3_DATA[0]	GT10.TXDATA[19]
CELL[4].IMUX_G3_DATA[1]	GT10.TXDATA[51]
CELL[4].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[4]
CELL[4].IMUX_G3_DATA[3]	GT10.TXENC64B66BUSE
CELL[4].OUT_FAN_BEL[0]	GT10.RXDATA[16]
CELL[4].OUT_FAN_BEL[1]	GT10.RXDATA[17]
CELL[4].OUT_FAN_BEL[2]	GT10.RXDATA[18]
CELL[4].OUT_FAN_BEL[3]	GT10.RXDATA[19]
CELL[4].OUT_FAN_BEL[4]	GT10.RXDATA[48]
CELL[4].OUT_FAN_BEL[5]	GT10.RXDATA[49]
CELL[4].OUT_FAN_BEL[6]	GT10.RXDATA[50]
CELL[4].OUT_FAN_BEL[7]	GT10.RXDATA[51]
CELL[4].OUT_SEC_BEL[8]	GT10.SCANOUT
CELL[4].OUT_SEC_BEL[9]	GT10.TXKERR[4]
CELL[4].OUT_SEC_BEL[10]	GT10.TXRUNDISP[4]
CELL[4].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[4]
CELL[4].OUT_SEC_BEL[12]	GT10.RXCHARISK[4]
CELL[4].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[4]
CELL[4].OUT_SEC_BEL[14]	GT10.RXDISPERR[4]
CELL[4].OUT_SEC_BEL[15]	GT10.RXRUNDISP[4]
CELL[5].IMUX_G0_DATA[0]	GT10.TXDATA[20]
CELL[5].IMUX_G0_DATA[1]	GT10.TXDATA[52]
CELL[5].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[5]
CELL[5].IMUX_G0_DATA[3]	GT10.RXDEC8B10BUSE
CELL[5].IMUX_G0_DATA[4]	GT10.PMAREGDATAIN[0]
CELL[5].IMUX_G0_DATA[5]	GT10.PMAREGDATAIN[4]
CELL[5].IMUX_G0_DATA[6]	GT10.PMAREGADDR[0]
CELL[5].IMUX_G0_DATA[7]	GT10.PMAREGADDR[4]
CELL[5].IMUX_G1_DATA[0]	GT10.TXDATA[21]
CELL[5].IMUX_G1_DATA[1]	GT10.TXDATA[53]
CELL[5].IMUX_G1_DATA[2]	GT10.TXCHARISK[5]
CELL[5].IMUX_G1_DATA[3]	GT10.PMAREGRW
CELL[5].IMUX_G1_DATA[4]	GT10.PMAREGDATAIN[1]
CELL[5].IMUX_G1_DATA[5]	GT10.PMAREGDATAIN[5]
CELL[5].IMUX_G1_DATA[6]	GT10.PMAREGADDR[1]
CELL[5].IMUX_G1_DATA[7]	GT10.PMAREGADDR[5]
CELL[5].IMUX_G2_DATA[0]	GT10.TXDATA[22]
CELL[5].IMUX_G2_DATA[1]	GT10.TXDATA[54]
CELL[5].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[5]
CELL[5].IMUX_G2_DATA[3]	GT10.PMAREGSTROBE
CELL[5].IMUX_G2_DATA[4]	GT10.PMAREGDATAIN[2]
CELL[5].IMUX_G2_DATA[5]	GT10.PMAREGDATAIN[6]
CELL[5].IMUX_G2_DATA[6]	GT10.PMAREGADDR[2]
CELL[5].IMUX_G3_DATA[0]	GT10.TXDATA[23]
CELL[5].IMUX_G3_DATA[1]	GT10.TXDATA[55]
CELL[5].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[5]
CELL[5].IMUX_G3_DATA[4]	GT10.PMAREGDATAIN[3]
CELL[5].IMUX_G3_DATA[5]	GT10.PMAREGDATAIN[7]
CELL[5].IMUX_G3_DATA[6]	GT10.PMAREGADDR[3]
CELL[5].OUT_FAN_BEL[0]	GT10.RXDATA[20]
CELL[5].OUT_FAN_BEL[1]	GT10.RXDATA[21]
CELL[5].OUT_FAN_BEL[2]	GT10.RXDATA[22]
CELL[5].OUT_FAN_BEL[3]	GT10.RXDATA[23]
CELL[5].OUT_FAN_BEL[4]	GT10.RXDATA[52]
CELL[5].OUT_FAN_BEL[5]	GT10.RXDATA[53]
CELL[5].OUT_FAN_BEL[6]	GT10.RXDATA[54]
CELL[5].OUT_FAN_BEL[7]	GT10.RXDATA[55]
CELL[5].OUT_SEC_BEL[9]	GT10.TXKERR[5]
CELL[5].OUT_SEC_BEL[10]	GT10.TXRUNDISP[5]
CELL[5].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[5]
CELL[5].OUT_SEC_BEL[12]	GT10.RXCHARISK[5]
CELL[5].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[5]
CELL[5].OUT_SEC_BEL[14]	GT10.RXDISPERR[5]
CELL[5].OUT_SEC_BEL[15]	GT10.RXRUNDISP[5]
CELL[6].IMUX_G0_DATA[0]	GT10.TXDATA[24]
CELL[6].IMUX_G0_DATA[1]	GT10.TXDATA[56]
CELL[6].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[6]
CELL[6].IMUX_G1_DATA[0]	GT10.TXDATA[25]
CELL[6].IMUX_G1_DATA[1]	GT10.TXDATA[57]
CELL[6].IMUX_G1_DATA[2]	GT10.TXCHARISK[6]
CELL[6].IMUX_G2_DATA[0]	GT10.TXDATA[26]
CELL[6].IMUX_G2_DATA[1]	GT10.TXDATA[58]
CELL[6].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[6]
CELL[6].IMUX_G3_DATA[0]	GT10.TXDATA[27]
CELL[6].IMUX_G3_DATA[1]	GT10.TXDATA[59]
CELL[6].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[6]
CELL[6].OUT_FAN_BEL[0]	GT10.RXDATA[24]
CELL[6].OUT_FAN_BEL[1]	GT10.RXDATA[25]
CELL[6].OUT_FAN_BEL[2]	GT10.RXDATA[26]
CELL[6].OUT_FAN_BEL[3]	GT10.RXDATA[27]
CELL[6].OUT_FAN_BEL[4]	GT10.RXDATA[56]
CELL[6].OUT_FAN_BEL[5]	GT10.RXDATA[57]
CELL[6].OUT_FAN_BEL[6]	GT10.RXDATA[58]
CELL[6].OUT_FAN_BEL[7]	GT10.RXDATA[59]
CELL[6].OUT_SEC_BEL[9]	GT10.TXKERR[6]
CELL[6].OUT_SEC_BEL[10]	GT10.TXRUNDISP[6]
CELL[6].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[6]
CELL[6].OUT_SEC_BEL[12]	GT10.RXCHARISK[6]
CELL[6].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[6]
CELL[6].OUT_SEC_BEL[14]	GT10.RXDISPERR[6]
CELL[6].OUT_SEC_BEL[15]	GT10.RXRUNDISP[6]
CELL[7].IMUX_G0_DATA[0]	GT10.TXDATA[28]
CELL[7].IMUX_G0_DATA[1]	GT10.TXDATA[60]
CELL[7].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[7]
CELL[7].IMUX_G1_DATA[0]	GT10.TXDATA[29]
CELL[7].IMUX_G1_DATA[1]	GT10.TXDATA[61]
CELL[7].IMUX_G1_DATA[2]	GT10.TXCHARISK[7]
CELL[7].IMUX_G2_DATA[0]	GT10.TXDATA[30]
CELL[7].IMUX_G2_DATA[1]	GT10.TXDATA[62]
CELL[7].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[7]
CELL[7].IMUX_G3_DATA[0]	GT10.TXDATA[31]
CELL[7].IMUX_G3_DATA[1]	GT10.TXDATA[63]
CELL[7].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[7]
CELL[7].OUT_FAN_BEL[0]	GT10.RXDATA[28]
CELL[7].OUT_FAN_BEL[1]	GT10.RXDATA[29]
CELL[7].OUT_FAN_BEL[2]	GT10.RXDATA[30]
CELL[7].OUT_FAN_BEL[3]	GT10.RXDATA[31]
CELL[7].OUT_FAN_BEL[4]	GT10.RXDATA[60]
CELL[7].OUT_FAN_BEL[5]	GT10.RXDATA[61]
CELL[7].OUT_FAN_BEL[6]	GT10.RXDATA[62]
CELL[7].OUT_FAN_BEL[7]	GT10.RXDATA[63]
CELL[7].OUT_SEC_BEL[8]	GT10.TXBUFERR
CELL[7].OUT_SEC_BEL[9]	GT10.TXKERR[7]
CELL[7].OUT_SEC_BEL[10]	GT10.TXRUNDISP[7]
CELL[7].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[7]
CELL[7].OUT_SEC_BEL[12]	GT10.RXCHARISK[7]
CELL[7].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[7]
CELL[7].OUT_SEC_BEL[14]	GT10.RXDISPERR[7]
CELL[7].OUT_SEC_BEL[15]	GT10.RXRUNDISP[7]

Bitstream

virtex2 GIGABIT10_S rect MAIN_IO
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 7	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 6	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 5	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 4	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 3	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 2	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 1	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 0	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 7	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 6	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 5	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 4	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 3	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 2	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 1	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 0	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_USE	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_BUFFER_USE	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 7	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 6	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 5	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 4	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 3	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 2	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 1	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 0	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_FORMAT bit 1	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_FORMAT bit 0	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[0]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 10	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 9	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 8	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 7	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 6	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 5	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 4	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 3	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 2	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 1	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 0	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 10	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 9	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 8	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 7	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 6	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 5	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 4	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 3	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 2	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 1	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 10	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 9	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 8	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 7	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 6	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 5	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 4	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 3	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 2	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 1	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 0	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 10	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 9	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 8	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 7	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 6	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 5	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 4	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 3	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 2	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 1	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 0	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_DETECT	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 9	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 8	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 7	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 6	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 5	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 4	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 3	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 2	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 1	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 0	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_DETECT	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 9	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 8	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 7	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 6	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 5	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 4	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 3	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 2	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 1	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 0	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 9	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 8	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 7	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 6	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 5	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 4	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 3	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 2	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 1	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 0	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[1]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 10	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 9	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 8	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 7	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 6	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 5	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 4	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 3	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 2	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 1	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 0	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 10	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 9	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 8	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 7	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 6	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 5	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 4	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 3	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 2	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 1	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 10	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 9	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 8	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 7	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 6	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 5	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 4	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 3	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 2	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 1	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 0	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 10	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 9	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 8	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 7	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 6	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 5	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 4	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 3	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 2	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 1	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 0	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_USE	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_MCOMMA_DETECT	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_PCOMMA_DETECT	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_VALID_COMMA_ONLY	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_BUFFER_USE	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_ONE_SHOT	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 4	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 3	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 2	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 1	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 0	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_KEEP_IDLE	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_INSERT_IDLE_FLAG	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_CORRECT_USE	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_MODE bit 1	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_MODE bit 0	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[2]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 10	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 9	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 8	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 7	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 6	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 5	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 4	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 3	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 2	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 1	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 0	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 10	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 9	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 8	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 7	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 6	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 5	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 4	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 3	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 2	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 1	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 10	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 9	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 8	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 7	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 6	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 5	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 4	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 3	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 2	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 1	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 0	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 10	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 9	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 8	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 7	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 6	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 5	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 4	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 3	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 2	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 1	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 0	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_CRC_USE	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 2	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 1	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 0	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 2	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 1	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 0	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_6	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_5	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_4	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_3	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_2	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_1	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[3]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 10	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 9	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 8	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 7	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 6	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 5	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 4	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 3	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 2	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 1	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 0	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 10	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 9	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 8	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 7	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 6	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 5	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 4	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 3	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 2	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 1	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 10	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 9	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 8	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 7	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 6	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 5	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 4	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 3	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 2	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 1	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 0	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 10	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 9	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 8	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 7	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 6	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 5	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 4	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 3	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 2	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 1	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 0	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_USE	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 7	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 4	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 3	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 2	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 1	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 0	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOSS_OF_SYNC_FSM	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 6	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 5	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 4	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 3	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 2	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 1	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 0	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 7	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 6	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 5	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 4	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 3	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 2	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 1	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 0	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[4]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 7 GT10: TXDRVEN	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 6 GT10: RXEN	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 5 GT10: TXEN	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 4 GT10: PMA_PWR_CNTRL_BIT4	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 3 GT10: RXANAEN	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 2 GT10: TXDIGEN	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 1 GT10: TXANAEN	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 0 GT10: BIASEN	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_64B66B_SV	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_8B10B_DE	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 5	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 4	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 3	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 2	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 1	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 0	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 5	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 4	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 3	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 2	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 1	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 0	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 4	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 3	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 2	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 1	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 0	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 3	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 2	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 1	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 0	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 3	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 2	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 1	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 0	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: ALIGN_COMMA_WORD bit 1	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: ALIGN_COMMA_WORD bit 0	-	-	-

virtex2 GIGABIT10_S rect MAIN[5]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 7 GT10: TXREG bit 1	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 6 GT10: TXREG bit 0	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 5 GT10: TXVSEL bit 1	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 4 GT10: TXVSEL bit 0	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 3 GT10: TXVCOGAIN bit 0	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 2 GT10: TXVCODAC bit 0	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 1	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 0 GT10: TXCPI bit 0	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 7 GT10: IBOOST bit 0	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 6	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 5	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 4	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 3 GT10: TXLOOPFILTERR bit 1	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 2 GT10: TXLOOPFILTERR bit 0	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 1 GT10: TXLOOPFILTERC bit 1	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 0 GT10: TXLOOPFILTERC bit 0	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 7 GT10: SEL_DAC_FIX bit 3	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 6 GT10: SEL_DAC_FIX bit 2	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 5 GT10: SEL_DAC_TRAN bit 3	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 4 GT10: SEL_DAC_TRAN bit 2	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 3 GT10: ENDCD bit 0	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 2 GT10: TXBUSWID bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 1 GT10: TXDIVRATIO bit 9	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 0 GT10: TXDIVRATIO bit 8	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 7 GT10: TXDIVRATIO bit 7	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 6 GT10: TXDIVRATIO bit 6	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 5 GT10: TXDIVRATIO bit 5	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 4 GT10: TXDIVRATIO bit 4	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 3 GT10: TXDIVRATIO bit 3	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 2 GT10: TXDIVRATIO bit 2	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 1 GT10: TXDIVRATIO bit 1	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 0 GT10: TXDIVRATIO bit 0	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 7 GT10: VCODAC bit 5	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 6 GT10: VCODAC bit 4	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 5 GT10: VCODAC bit 3	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 4 GT10: VCODAC bit 2	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 3 GT10: VCODAC bit 1	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 2 GT10: VCODAC bit 0	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 1 GT10: MASTERBIAS bit 1	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 0 GT10: MASTERBIAS bit 0	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_DROP	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 3	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 2	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 1	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 0	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 3	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 2	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 1	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 0	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_S rect MAIN[6]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 7 GT10: PMA_REG_0E bit 7	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 6 GT10: PMA_REG_0E bit 6	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 5 GT10: PMA_REG_0E bit 5	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 4 GT10: PMA_REG_0E bit 4	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 3 GT10: PMA_REG_0E bit 3	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 2 GT10: PMA_REG_0E bit 2	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 1 GT10: PMA_REG_0E bit 1	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 0 GT10: PMA_REG_0E bit 0	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 7 GT10: RXFER bit 9	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 6 GT10: RXFER bit 8	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 5 GT10: RXFER bit 7	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 4 GT10: RXFER bit 6	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 3 GT10: RXFER bit 5	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 2 GT10: RXFER bit 4	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 1 GT10: RXFER bit 3	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 0 GT10: RXFER bit 2	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 7 GT10: RXFER bit 1	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 6 GT10: RXFER bit 0	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 5 GT10: RXFLCPI bit 1	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 4 GT10: RXFLCPI bit 0	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 3 GT10: RXFEI bit 1	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 2 GT10: RXFEI bit 0	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 1 GT10: VSELAFE bit 1	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 0 GT10: VSELAFE bit 0	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 7 GT10: RXCPI bit 1	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 6 GT10: RXVSELCP bit 1	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 5 GT10: RXVSELCP bit 0	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 4 GT10: RXFLTCPT bit 4	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 3 GT10: RXFLTCPT bit 3	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 2 GT10: RXFLTCPT bit 2	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 1 GT10: RXFLTCPT bit 1	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 0 GT10: RXFLTCPT bit 0	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 7 GT10: RXREG bit 1	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 6 GT10: RXREG bit 0	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 5 GT10: RXVSEL bit 1	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 4 GT10: RXVSEL bit 0	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 3 GT10: RXVCOGAIN bit 0	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 2 GT10: RXVCODAC bit 0	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 1 GT10: RXCPI bit 0	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 0 GT10: RXVCOSW bit 0	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 7 GT10: SEL_DAC_FIX bit 1	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 6 GT10: SEL_DAC_FIX bit 0	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 5 GT10: AFE_FLAT_ENABLE bit 0	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 4 GT10: RXLOOPFILTERR bit 2	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 3 GT10: RXLOOPFILTERR bit 1	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 2 GT10: RXLOOPFILTERR bit 0	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 1 GT10: RXLOOPFILTERC bit 1	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 0 GT10: RXLOOPFILTERC bit 0	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 7 GT10: SEL_DAC_TRAN bit 1	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 6 GT10: SEL_DAC_TRAN bit 0	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 5 GT10: RXDIVRATIO bit 13	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 4 GT10: RXDIVRATIO bit 12	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 3 GT10: RXDIVRATIO bit 11	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 2 GT10: RXDIVRATIO bit 10	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 1 GT10: RXDIVRATIO bit 9	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 0 GT10: RXDIVRATIO bit 8	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 7 GT10: RXDIVRATIO bit 7	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 6 GT10: RXDIVRATIO bit 6	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 5 GT10: RXDIVRATIO bit 5	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 4 GT10: RXDIVRATIO bit 4	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 3 GT10: RXDIVRATIO bit 3	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 2 GT10: RXDIVRATIO bit 2	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 1 GT10: RXDIVRATIO bit 1	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 0 GT10: RXDIVRATIO bit 0	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 7	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 6	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 5 GT10: TXANASW bit 0	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 4 GT10: TXDIGSW bit 0	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 3 GT10: TXEMPHLEVEL bit 3	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 2 GT10: TXEMPHLEVEL bit 2	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 1 GT10: TXEMPHLEVEL bit 1	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 0 GT10: TXEMPHLEVEL bit 0	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 7	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 6 GT10: SLEW bit 0	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 5 GT10: EMPOFF bit 0	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 4 GT10: PRDRVOFF bit 0	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 2 GT10: TXDOWNLEVEL bit 2	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 1 GT10: TXDOWNLEVEL bit 1	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 0 GT10: TXDOWNLEVEL bit 0	-	-	-

virtex2 GIGABIT10_S rect MAIN[7]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 7	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 6	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 5	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 4	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 3	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 2	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 1	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 0	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 7	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 6	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 5	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 4	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 3	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 2	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 1	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 0	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 3 GT10: TXDOWNLEVEL bit 3	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

Tile GIGABIT10_N

Cells: 9

Bels GT10

virtex2 GIGABIT10_N bel GT10 pins
Pin	Direction	GT10
REFCLK	in	CELL_IO.IMUX_DCM_CLK_OPTINV[2]
REFCLK2	in	CELL_IO.IMUX_DCM_CLK_OPTINV[3]
REFCLKBSEL	in	CELL_IO.IMUX_G3_DATA[4]
REFCLKSEL	in	CELL_IO.IMUX_G2_DATA[1]
POWERDOWN	in	CELL_IO.IMUX_G0_DATA[2]
LOOPBACK[0]	in	CELL_IO.IMUX_G0_DATA[3]
LOOPBACK[1]	in	CELL_IO.IMUX_G1_DATA[3]
RXUSRCLK	in	CELL_IO.IMUX_DCM_CLK_OPTINV[0]
RXUSRCLK2	in	CELL_IO.IMUX_DCM_CLK_OPTINV[1]
RXRESET	in	CELL_IO.IMUX_SR_OPTINV[0]
PMARXLOCKSEL[0]	in	CELL_IO.IMUX_G3_DATA[6]
PMARXLOCKSEL[1]	in	CELL_IO.IMUX_G0_DATA[7]
RXPOLARITY	in	CELL_IO.IMUX_G1_DATA[2]
RXDATAWIDTH[0]	in	CELL[3].IMUX_G2_DATA[4]
RXDATAWIDTH[1]	in	CELL[3].IMUX_G3_DATA[4]
RXINTDATAWIDTH[0]	in	CELL[3].IMUX_G2_DATA[5]
RXINTDATAWIDTH[1]	in	CELL[3].IMUX_G3_DATA[5]
RXDEC8B10BUSE	in	CELL[5].IMUX_G0_DATA[3]
RXDEC64B66BUSE	in	CELL[4].IMUX_G0_DATA[4]
RXBLOCKSYNC64B66BUSE	in	CELL[3].IMUX_G1_DATA[6]
RXDESCRAM64B66BUSE	in	CELL[3].IMUX_G0_DATA[6]
RXCOMMADETUSE	in	CELL[3].IMUX_G2_DATA[6]
RXIGNOREBTF	in	CELL[4].IMUX_G1_DATA[3]
RXSLIDE	in	CELL[3].IMUX_G3_DATA[6]
ENMCOMMAALIGN	in	CELL[0].IMUX_G1_DATA[7]
ENPCOMMAALIGN	in	CELL[0].IMUX_G1_DATA[4]
TXUSRCLK	in	CELL[0].IMUX_CLK_OPTINV[0]
TXUSRCLK2	in	CELL[0].IMUX_CLK_OPTINV[1]
TXRESET	in	CELL[0].IMUX_SR_OPTINV[0]
TXPOLARITY	in	CELL_IO.IMUX_G2_DATA[3]
TXINHIBIT	in	CELL_IO.IMUX_G3_DATA[3]
TXDATAWIDTH[0]	in	CELL[3].IMUX_G0_DATA[4]
TXDATAWIDTH[1]	in	CELL[3].IMUX_G1_DATA[4]
TXINTDATAWIDTH[0]	in	CELL[3].IMUX_G0_DATA[5]
TXINTDATAWIDTH[1]	in	CELL[3].IMUX_G1_DATA[5]
TXDATA[0]	in	CELL[0].IMUX_G0_DATA[0]
TXDATA[1]	in	CELL[0].IMUX_G1_DATA[0]
TXDATA[2]	in	CELL[0].IMUX_G2_DATA[0]
TXDATA[3]	in	CELL[0].IMUX_G3_DATA[0]
TXDATA[4]	in	CELL[1].IMUX_G0_DATA[0]
TXDATA[5]	in	CELL[1].IMUX_G1_DATA[0]
TXDATA[6]	in	CELL[1].IMUX_G2_DATA[0]
TXDATA[7]	in	CELL[1].IMUX_G3_DATA[0]
TXDATA[8]	in	CELL[2].IMUX_G0_DATA[0]
TXDATA[9]	in	CELL[2].IMUX_G1_DATA[0]
TXDATA[10]	in	CELL[2].IMUX_G2_DATA[0]
TXDATA[11]	in	CELL[2].IMUX_G3_DATA[0]
TXDATA[12]	in	CELL[3].IMUX_G0_DATA[0]
TXDATA[13]	in	CELL[3].IMUX_G1_DATA[0]
TXDATA[14]	in	CELL[3].IMUX_G2_DATA[0]
TXDATA[15]	in	CELL[3].IMUX_G3_DATA[0]
TXDATA[16]	in	CELL[4].IMUX_G0_DATA[0]
TXDATA[17]	in	CELL[4].IMUX_G1_DATA[0]
TXDATA[18]	in	CELL[4].IMUX_G2_DATA[0]
TXDATA[19]	in	CELL[4].IMUX_G3_DATA[0]
TXDATA[20]	in	CELL[5].IMUX_G0_DATA[0]
TXDATA[21]	in	CELL[5].IMUX_G1_DATA[0]
TXDATA[22]	in	CELL[5].IMUX_G2_DATA[0]
TXDATA[23]	in	CELL[5].IMUX_G3_DATA[0]
TXDATA[24]	in	CELL[6].IMUX_G0_DATA[0]
TXDATA[25]	in	CELL[6].IMUX_G1_DATA[0]
TXDATA[26]	in	CELL[6].IMUX_G2_DATA[0]
TXDATA[27]	in	CELL[6].IMUX_G3_DATA[0]
TXDATA[28]	in	CELL[7].IMUX_G0_DATA[0]
TXDATA[29]	in	CELL[7].IMUX_G1_DATA[0]
TXDATA[30]	in	CELL[7].IMUX_G2_DATA[0]
TXDATA[31]	in	CELL[7].IMUX_G3_DATA[0]
TXDATA[32]	in	CELL[0].IMUX_G0_DATA[1]
TXDATA[33]	in	CELL[0].IMUX_G1_DATA[1]
TXDATA[34]	in	CELL[0].IMUX_G2_DATA[1]
TXDATA[35]	in	CELL[0].IMUX_G3_DATA[1]
TXDATA[36]	in	CELL[1].IMUX_G0_DATA[1]
TXDATA[37]	in	CELL[1].IMUX_G1_DATA[1]
TXDATA[38]	in	CELL[1].IMUX_G2_DATA[1]
TXDATA[39]	in	CELL[1].IMUX_G3_DATA[1]
TXDATA[40]	in	CELL[2].IMUX_G0_DATA[1]
TXDATA[41]	in	CELL[2].IMUX_G1_DATA[1]
TXDATA[42]	in	CELL[2].IMUX_G2_DATA[1]
TXDATA[43]	in	CELL[2].IMUX_G3_DATA[1]
TXDATA[44]	in	CELL[3].IMUX_G0_DATA[1]
TXDATA[45]	in	CELL[3].IMUX_G1_DATA[1]
TXDATA[46]	in	CELL[3].IMUX_G2_DATA[1]
TXDATA[47]	in	CELL[3].IMUX_G3_DATA[1]
TXDATA[48]	in	CELL[4].IMUX_G0_DATA[1]
TXDATA[49]	in	CELL[4].IMUX_G1_DATA[1]
TXDATA[50]	in	CELL[4].IMUX_G2_DATA[1]
TXDATA[51]	in	CELL[4].IMUX_G3_DATA[1]
TXDATA[52]	in	CELL[5].IMUX_G0_DATA[1]
TXDATA[53]	in	CELL[5].IMUX_G1_DATA[1]
TXDATA[54]	in	CELL[5].IMUX_G2_DATA[1]
TXDATA[55]	in	CELL[5].IMUX_G3_DATA[1]
TXDATA[56]	in	CELL[6].IMUX_G0_DATA[1]
TXDATA[57]	in	CELL[6].IMUX_G1_DATA[1]
TXDATA[58]	in	CELL[6].IMUX_G2_DATA[1]
TXDATA[59]	in	CELL[6].IMUX_G3_DATA[1]
TXDATA[60]	in	CELL[7].IMUX_G0_DATA[1]
TXDATA[61]	in	CELL[7].IMUX_G1_DATA[1]
TXDATA[62]	in	CELL[7].IMUX_G2_DATA[1]
TXDATA[63]	in	CELL[7].IMUX_G3_DATA[1]
TXBYPASS8B10B[0]	in	CELL[0].IMUX_G0_DATA[2]
TXBYPASS8B10B[1]	in	CELL[1].IMUX_G0_DATA[2]
TXBYPASS8B10B[2]	in	CELL[2].IMUX_G0_DATA[2]
TXBYPASS8B10B[3]	in	CELL[3].IMUX_G0_DATA[2]
TXBYPASS8B10B[4]	in	CELL[4].IMUX_G0_DATA[2]
TXBYPASS8B10B[5]	in	CELL[5].IMUX_G0_DATA[2]
TXBYPASS8B10B[6]	in	CELL[6].IMUX_G0_DATA[2]
TXBYPASS8B10B[7]	in	CELL[7].IMUX_G0_DATA[2]
TXCHARISK[0]	in	CELL[0].IMUX_G1_DATA[2]
TXCHARISK[1]	in	CELL[1].IMUX_G1_DATA[2]
TXCHARISK[2]	in	CELL[2].IMUX_G1_DATA[2]
TXCHARISK[3]	in	CELL[3].IMUX_G1_DATA[2]
TXCHARISK[4]	in	CELL[4].IMUX_G1_DATA[2]
TXCHARISK[5]	in	CELL[5].IMUX_G1_DATA[2]
TXCHARISK[6]	in	CELL[6].IMUX_G1_DATA[2]
TXCHARISK[7]	in	CELL[7].IMUX_G1_DATA[2]
TXCHARDISPMODE[0]	in	CELL[0].IMUX_G2_DATA[2]
TXCHARDISPMODE[1]	in	CELL[1].IMUX_G2_DATA[2]
TXCHARDISPMODE[2]	in	CELL[2].IMUX_G2_DATA[2]
TXCHARDISPMODE[3]	in	CELL[3].IMUX_G2_DATA[2]
TXCHARDISPMODE[4]	in	CELL[4].IMUX_G2_DATA[2]
TXCHARDISPMODE[5]	in	CELL[5].IMUX_G2_DATA[2]
TXCHARDISPMODE[6]	in	CELL[6].IMUX_G2_DATA[2]
TXCHARDISPMODE[7]	in	CELL[7].IMUX_G2_DATA[2]
TXCHARDISPVAL[0]	in	CELL[0].IMUX_G3_DATA[2]
TXCHARDISPVAL[1]	in	CELL[1].IMUX_G3_DATA[2]
TXCHARDISPVAL[2]	in	CELL[2].IMUX_G3_DATA[2]
TXCHARDISPVAL[3]	in	CELL[3].IMUX_G3_DATA[2]
TXCHARDISPVAL[4]	in	CELL[4].IMUX_G3_DATA[2]
TXCHARDISPVAL[5]	in	CELL[5].IMUX_G3_DATA[2]
TXCHARDISPVAL[6]	in	CELL[6].IMUX_G3_DATA[2]
TXCHARDISPVAL[7]	in	CELL[7].IMUX_G3_DATA[2]
TXFORCECRCERR	in	CELL[3].IMUX_G3_DATA[3]
TXENC8B10BUSE	in	CELL[4].IMUX_G2_DATA[3]
TXENC64B66BUSE	in	CELL[4].IMUX_G3_DATA[3]
TXSCRAM64B66BUSE	in	CELL[4].IMUX_G1_DATA[4]
TXGEARBOX64B66BUSE	in	CELL[4].IMUX_G2_DATA[4]
ENCHANSYNC	in	CELL_IO.IMUX_G1_DATA[1]
CHBONDI[0]	in	CELL_IO.IMUX_G0_DATA[0]
CHBONDI[1]	in	CELL_IO.IMUX_G1_DATA[0]
CHBONDI[2]	in	CELL_IO.IMUX_G2_DATA[0]
CHBONDI[3]	in	CELL_IO.IMUX_G3_DATA[0]
CHBONDI[4]	in	CELL_IO.IMUX_G0_DATA[1]
PMAINIT	in	CELL_IO.IMUX_G3_DATA[1]
PMAREGADDR[0]	in	CELL[5].IMUX_G0_DATA[6]
PMAREGADDR[1]	in	CELL[5].IMUX_G1_DATA[6]
PMAREGADDR[2]	in	CELL[5].IMUX_G2_DATA[6]
PMAREGADDR[3]	in	CELL[5].IMUX_G3_DATA[6]
PMAREGADDR[4]	in	CELL[5].IMUX_G0_DATA[7]
PMAREGADDR[5]	in	CELL[5].IMUX_G1_DATA[7]
PMAREGDATAIN[0]	in	CELL[5].IMUX_G0_DATA[4]
PMAREGDATAIN[1]	in	CELL[5].IMUX_G1_DATA[4]
PMAREGDATAIN[2]	in	CELL[5].IMUX_G2_DATA[4]
PMAREGDATAIN[3]	in	CELL[5].IMUX_G3_DATA[4]
PMAREGDATAIN[4]	in	CELL[5].IMUX_G0_DATA[5]
PMAREGDATAIN[5]	in	CELL[5].IMUX_G1_DATA[5]
PMAREGDATAIN[6]	in	CELL[5].IMUX_G2_DATA[5]
PMAREGDATAIN[7]	in	CELL[5].IMUX_G3_DATA[5]
PMAREGRW	in	CELL[5].IMUX_G1_DATA[3]
PMAREGSTROBE	in	CELL[5].IMUX_G2_DATA[3]
SCANEN	in	CELL[4].IMUX_G1_DATA[6]
SCANMODE	in	CELL[4].IMUX_G2_DATA[6]
SCANIN	in	CELL[4].IMUX_G0_DATA[6]
TESTMEMORY	in	CELL[4].IMUX_G0_DATA[3]
RXRECCLK	out	CELL_IO.OUT_FAN_BEL[1]
PMARXLOCK	out	CELL_IO.OUT_SEC_BEL[8]
RXDATA[0]	out	CELL[0].OUT_FAN_BEL[0]
RXDATA[1]	out	CELL[0].OUT_FAN_BEL[1]
RXDATA[2]	out	CELL[0].OUT_FAN_BEL[2]
RXDATA[3]	out	CELL[0].OUT_FAN_BEL[3]
RXDATA[4]	out	CELL[1].OUT_FAN_BEL[0]
RXDATA[5]	out	CELL[1].OUT_FAN_BEL[1]
RXDATA[6]	out	CELL[1].OUT_FAN_BEL[2]
RXDATA[7]	out	CELL[1].OUT_FAN_BEL[3]
RXDATA[8]	out	CELL[2].OUT_FAN_BEL[0]
RXDATA[9]	out	CELL[2].OUT_FAN_BEL[1]
RXDATA[10]	out	CELL[2].OUT_FAN_BEL[2]
RXDATA[11]	out	CELL[2].OUT_FAN_BEL[3]
RXDATA[12]	out	CELL[3].OUT_FAN_BEL[0]
RXDATA[13]	out	CELL[3].OUT_FAN_BEL[1]
RXDATA[14]	out	CELL[3].OUT_FAN_BEL[2]
RXDATA[15]	out	CELL[3].OUT_FAN_BEL[3]
RXDATA[16]	out	CELL[4].OUT_FAN_BEL[0]
RXDATA[17]	out	CELL[4].OUT_FAN_BEL[1]
RXDATA[18]	out	CELL[4].OUT_FAN_BEL[2]
RXDATA[19]	out	CELL[4].OUT_FAN_BEL[3]
RXDATA[20]	out	CELL[5].OUT_FAN_BEL[0]
RXDATA[21]	out	CELL[5].OUT_FAN_BEL[1]
RXDATA[22]	out	CELL[5].OUT_FAN_BEL[2]
RXDATA[23]	out	CELL[5].OUT_FAN_BEL[3]
RXDATA[24]	out	CELL[6].OUT_FAN_BEL[0]
RXDATA[25]	out	CELL[6].OUT_FAN_BEL[1]
RXDATA[26]	out	CELL[6].OUT_FAN_BEL[2]
RXDATA[27]	out	CELL[6].OUT_FAN_BEL[3]
RXDATA[28]	out	CELL[7].OUT_FAN_BEL[0]
RXDATA[29]	out	CELL[7].OUT_FAN_BEL[1]
RXDATA[30]	out	CELL[7].OUT_FAN_BEL[2]
RXDATA[31]	out	CELL[7].OUT_FAN_BEL[3]
RXDATA[32]	out	CELL[0].OUT_FAN_BEL[4]
RXDATA[33]	out	CELL[0].OUT_FAN_BEL[5]
RXDATA[34]	out	CELL[0].OUT_FAN_BEL[6]
RXDATA[35]	out	CELL[0].OUT_FAN_BEL[7]
RXDATA[36]	out	CELL[1].OUT_FAN_BEL[4]
RXDATA[37]	out	CELL[1].OUT_FAN_BEL[5]
RXDATA[38]	out	CELL[1].OUT_FAN_BEL[6]
RXDATA[39]	out	CELL[1].OUT_FAN_BEL[7]
RXDATA[40]	out	CELL[2].OUT_FAN_BEL[4]
RXDATA[41]	out	CELL[2].OUT_FAN_BEL[5]
RXDATA[42]	out	CELL[2].OUT_FAN_BEL[6]
RXDATA[43]	out	CELL[2].OUT_FAN_BEL[7]
RXDATA[44]	out	CELL[3].OUT_FAN_BEL[4]
RXDATA[45]	out	CELL[3].OUT_FAN_BEL[5]
RXDATA[46]	out	CELL[3].OUT_FAN_BEL[6]
RXDATA[47]	out	CELL[3].OUT_FAN_BEL[7]
RXDATA[48]	out	CELL[4].OUT_FAN_BEL[4]
RXDATA[49]	out	CELL[4].OUT_FAN_BEL[5]
RXDATA[50]	out	CELL[4].OUT_FAN_BEL[6]
RXDATA[51]	out	CELL[4].OUT_FAN_BEL[7]
RXDATA[52]	out	CELL[5].OUT_FAN_BEL[4]
RXDATA[53]	out	CELL[5].OUT_FAN_BEL[5]
RXDATA[54]	out	CELL[5].OUT_FAN_BEL[6]
RXDATA[55]	out	CELL[5].OUT_FAN_BEL[7]
RXDATA[56]	out	CELL[6].OUT_FAN_BEL[4]
RXDATA[57]	out	CELL[6].OUT_FAN_BEL[5]
RXDATA[58]	out	CELL[6].OUT_FAN_BEL[6]
RXDATA[59]	out	CELL[6].OUT_FAN_BEL[7]
RXDATA[60]	out	CELL[7].OUT_FAN_BEL[4]
RXDATA[61]	out	CELL[7].OUT_FAN_BEL[5]
RXDATA[62]	out	CELL[7].OUT_FAN_BEL[6]
RXDATA[63]	out	CELL[7].OUT_FAN_BEL[7]
RXNOTINTABLE[0]	out	CELL[0].OUT_SEC_BEL[13]
RXNOTINTABLE[1]	out	CELL[1].OUT_SEC_BEL[13]
RXNOTINTABLE[2]	out	CELL[2].OUT_SEC_BEL[13]
RXNOTINTABLE[3]	out	CELL[3].OUT_SEC_BEL[13]
RXNOTINTABLE[4]	out	CELL[4].OUT_SEC_BEL[13]
RXNOTINTABLE[5]	out	CELL[5].OUT_SEC_BEL[13]
RXNOTINTABLE[6]	out	CELL[6].OUT_SEC_BEL[13]
RXNOTINTABLE[7]	out	CELL[7].OUT_SEC_BEL[13]
RXDISPERR[0]	out	CELL[0].OUT_SEC_BEL[14]
RXDISPERR[1]	out	CELL[1].OUT_SEC_BEL[14]
RXDISPERR[2]	out	CELL[2].OUT_SEC_BEL[14]
RXDISPERR[3]	out	CELL[3].OUT_SEC_BEL[14]
RXDISPERR[4]	out	CELL[4].OUT_SEC_BEL[14]
RXDISPERR[5]	out	CELL[5].OUT_SEC_BEL[14]
RXDISPERR[6]	out	CELL[6].OUT_SEC_BEL[14]
RXDISPERR[7]	out	CELL[7].OUT_SEC_BEL[14]
RXCHARISK[0]	out	CELL[0].OUT_SEC_BEL[12]
RXCHARISK[1]	out	CELL[1].OUT_SEC_BEL[12]
RXCHARISK[2]	out	CELL[2].OUT_SEC_BEL[12]
RXCHARISK[3]	out	CELL[3].OUT_SEC_BEL[12]
RXCHARISK[4]	out	CELL[4].OUT_SEC_BEL[12]
RXCHARISK[5]	out	CELL[5].OUT_SEC_BEL[12]
RXCHARISK[6]	out	CELL[6].OUT_SEC_BEL[12]
RXCHARISK[7]	out	CELL[7].OUT_SEC_BEL[12]
RXCHARISCOMMA[0]	out	CELL[0].OUT_SEC_BEL[11]
RXCHARISCOMMA[1]	out	CELL[1].OUT_SEC_BEL[11]
RXCHARISCOMMA[2]	out	CELL[2].OUT_SEC_BEL[11]
RXCHARISCOMMA[3]	out	CELL[3].OUT_SEC_BEL[11]
RXCHARISCOMMA[4]	out	CELL[4].OUT_SEC_BEL[11]
RXCHARISCOMMA[5]	out	CELL[5].OUT_SEC_BEL[11]
RXCHARISCOMMA[6]	out	CELL[6].OUT_SEC_BEL[11]
RXCHARISCOMMA[7]	out	CELL[7].OUT_SEC_BEL[11]
RXRUNDISP[0]	out	CELL[0].OUT_SEC_BEL[15]
RXRUNDISP[1]	out	CELL[1].OUT_SEC_BEL[15]
RXRUNDISP[2]	out	CELL[2].OUT_SEC_BEL[15]
RXRUNDISP[3]	out	CELL[3].OUT_SEC_BEL[15]
RXRUNDISP[4]	out	CELL[4].OUT_SEC_BEL[15]
RXRUNDISP[5]	out	CELL[5].OUT_SEC_BEL[15]
RXRUNDISP[6]	out	CELL[6].OUT_SEC_BEL[15]
RXRUNDISP[7]	out	CELL[7].OUT_SEC_BEL[15]
RXCOMMADET	out	CELL_IO.OUT_SEC_BEL[12]
RXREALIGN	out	CELL_IO.OUT_SEC_BEL[13]
RXLOSSOFSYNC[0]	out	CELL[0].OUT_SEC_BEL[8]
RXLOSSOFSYNC[1]	out	CELL[1].OUT_SEC_BEL[8]
RXCLKCORCNT[0]	out	CELL_IO.OUT_SEC_BEL[11]
RXCLKCORCNT[1]	out	CELL_IO.OUT_SEC_BEL[10]
RXCLKCORCNT[2]	out	CELL_IO.OUT_SEC_BEL[9]
RXBUFSTATUS[0]	out	CELL_IO.OUT_SEC_BEL[15]
RXBUFSTATUS[1]	out	CELL_IO.OUT_SEC_BEL[14]
RXCHECKINGCRC	out	CELL[3].OUT_SEC_BEL[8]
RXCRCERR	out	CELL[2].OUT_SEC_BEL[8]
TXOUTCLK	out	CELL_IO.OUT_FAN_BEL[7]
TXKERR[0]	out	CELL[0].OUT_SEC_BEL[9]
TXKERR[1]	out	CELL[1].OUT_SEC_BEL[9]
TXKERR[2]	out	CELL[2].OUT_SEC_BEL[9]
TXKERR[3]	out	CELL[3].OUT_SEC_BEL[9]
TXKERR[4]	out	CELL[4].OUT_SEC_BEL[9]
TXKERR[5]	out	CELL[5].OUT_SEC_BEL[9]
TXKERR[6]	out	CELL[6].OUT_SEC_BEL[9]
TXKERR[7]	out	CELL[7].OUT_SEC_BEL[9]
TXRUNDISP[0]	out	CELL[0].OUT_SEC_BEL[10]
TXRUNDISP[1]	out	CELL[1].OUT_SEC_BEL[10]
TXRUNDISP[2]	out	CELL[2].OUT_SEC_BEL[10]
TXRUNDISP[3]	out	CELL[3].OUT_SEC_BEL[10]
TXRUNDISP[4]	out	CELL[4].OUT_SEC_BEL[10]
TXRUNDISP[5]	out	CELL[5].OUT_SEC_BEL[10]
TXRUNDISP[6]	out	CELL[6].OUT_SEC_BEL[10]
TXRUNDISP[7]	out	CELL[7].OUT_SEC_BEL[10]
TXBUFERR	out	CELL[7].OUT_SEC_BEL[8]
CHBONDO[0]	out	CELL_IO.OUT_FAN_BEL[2]
CHBONDO[1]	out	CELL_IO.OUT_FAN_BEL[3]
CHBONDO[2]	out	CELL_IO.OUT_FAN_BEL[4]
CHBONDO[3]	out	CELL_IO.OUT_FAN_BEL[5]
CHBONDO[4]	out	CELL_IO.OUT_FAN_BEL[6]
CHBONDDONE	out	CELL_IO.OUT_FAN_BEL[0]
SCANOUT	out	CELL[4].OUT_SEC_BEL[8]

virtex2 GIGABIT10_N bel GT10 attribute bits
Attribute	GT10
PMA_REG[0] bit 0	MAIN[5][0][40]
PMA_REG[0] bit 1	MAIN[5][0][41]
PMA_REG[0] bit 2	MAIN[5][0][42]
PMA_REG[0] bit 3	MAIN[5][0][43]
PMA_REG[0] bit 4	MAIN[5][0][44]
PMA_REG[0] bit 5	MAIN[5][0][45]
PMA_REG[0] bit 6	MAIN[5][0][46]
PMA_REG[0] bit 7	MAIN[5][0][47]
PMA_REG[1] bit 0	MAIN[5][0][48]
PMA_REG[1] bit 1	MAIN[5][0][49]
PMA_REG[1] bit 2	MAIN[5][0][50]
PMA_REG[1] bit 3	MAIN[5][0][51]
PMA_REG[1] bit 4	MAIN[5][0][52]
PMA_REG[1] bit 5	MAIN[5][0][53]
PMA_REG[1] bit 6	MAIN[5][0][54]
PMA_REG[1] bit 7	MAIN[5][0][55]
PMA_REG[2] bit 0	MAIN[5][0][56]
PMA_REG[2] bit 1	MAIN[5][0][57]
PMA_REG[2] bit 2	MAIN[5][0][58]
PMA_REG[2] bit 3	MAIN[5][0][59]
PMA_REG[2] bit 4	MAIN[5][0][60]
PMA_REG[2] bit 5	MAIN[5][0][61]
PMA_REG[2] bit 6	MAIN[5][0][62]
PMA_REG[2] bit 7	MAIN[5][0][63]
PMA_REG[3] bit 0	MAIN[5][0][64]
PMA_REG[3] bit 1	MAIN[5][0][65]
PMA_REG[3] bit 2	MAIN[5][0][66]
PMA_REG[3] bit 3	MAIN[5][0][67]
PMA_REG[3] bit 4	MAIN[5][0][68]
PMA_REG[3] bit 5	MAIN[5][0][69]
PMA_REG[3] bit 6	MAIN[5][0][70]
PMA_REG[3] bit 7	MAIN[5][0][71]
PMA_REG[4] bit 0	MAIN[5][0][72]
PMA_REG[4] bit 1	MAIN[5][0][73]
PMA_REG[4] bit 2	MAIN[5][0][74]
PMA_REG[4] bit 3	MAIN[5][0][75]
PMA_REG[4] bit 4	MAIN[5][0][76]
PMA_REG[4] bit 5	MAIN[5][0][77]
PMA_REG[4] bit 6	MAIN[5][0][78]
PMA_REG[4] bit 7	MAIN[5][0][79]
PMA_REG[5] bit 0	MAIN[6][0][0]
PMA_REG[5] bit 1	MAIN[6][0][1]
PMA_REG[5] bit 2	MAIN[6][0][2]
PMA_REG[5] bit 3	MAIN[7][0][2]
PMA_REG[5] bit 4	MAIN[6][0][4]
PMA_REG[5] bit 5	MAIN[6][0][5]
PMA_REG[5] bit 6	MAIN[6][0][6]
PMA_REG[5] bit 7	MAIN[6][0][7]
PMA_REG[6] bit 0	MAIN[6][0][8]
PMA_REG[6] bit 1	MAIN[6][0][9]
PMA_REG[6] bit 2	MAIN[6][0][10]
PMA_REG[6] bit 3	MAIN[6][0][11]
PMA_REG[6] bit 4	MAIN[6][0][12]
PMA_REG[6] bit 5	MAIN[6][0][13]
PMA_REG[6] bit 6	MAIN[6][0][14]
PMA_REG[6] bit 7	MAIN[6][0][15]
PMA_REG[7] bit 0	MAIN[6][0][16]
PMA_REG[7] bit 1	MAIN[6][0][17]
PMA_REG[7] bit 2	MAIN[6][0][18]
PMA_REG[7] bit 3	MAIN[6][0][19]
PMA_REG[7] bit 4	MAIN[6][0][20]
PMA_REG[7] bit 5	MAIN[6][0][21]
PMA_REG[7] bit 6	MAIN[6][0][22]
PMA_REG[7] bit 7	MAIN[6][0][23]
PMA_REG[8] bit 0	MAIN[6][0][24]
PMA_REG[8] bit 1	MAIN[6][0][25]
PMA_REG[8] bit 2	MAIN[6][0][26]
PMA_REG[8] bit 3	MAIN[6][0][27]
PMA_REG[8] bit 4	MAIN[6][0][28]
PMA_REG[8] bit 5	MAIN[6][0][29]
PMA_REG[8] bit 6	MAIN[6][0][30]
PMA_REG[8] bit 7	MAIN[6][0][31]
PMA_REG[9] bit 0	MAIN[6][0][32]
PMA_REG[9] bit 1	MAIN[6][0][33]
PMA_REG[9] bit 2	MAIN[6][0][34]
PMA_REG[9] bit 3	MAIN[6][0][35]
PMA_REG[9] bit 4	MAIN[6][0][36]
PMA_REG[9] bit 5	MAIN[6][0][37]
PMA_REG[9] bit 6	MAIN[6][0][38]
PMA_REG[9] bit 7	MAIN[6][0][39]
PMA_REG[10] bit 0	MAIN[6][0][40]
PMA_REG[10] bit 1	MAIN[6][0][41]
PMA_REG[10] bit 2	MAIN[6][0][42]
PMA_REG[10] bit 3	MAIN[6][0][43]
PMA_REG[10] bit 4	MAIN[6][0][44]
PMA_REG[10] bit 5	MAIN[6][0][45]
PMA_REG[10] bit 6	MAIN[6][0][46]
PMA_REG[10] bit 7	MAIN[6][0][47]
PMA_REG[11] bit 0	MAIN[6][0][48]
PMA_REG[11] bit 1	MAIN[6][0][49]
PMA_REG[11] bit 2	MAIN[6][0][50]
PMA_REG[11] bit 3	MAIN[6][0][51]
PMA_REG[11] bit 4	MAIN[6][0][52]
PMA_REG[11] bit 5	MAIN[6][0][53]
PMA_REG[11] bit 6	MAIN[6][0][54]
PMA_REG[11] bit 7	MAIN[6][0][55]
PMA_REG[12] bit 0	MAIN[6][0][56]
PMA_REG[12] bit 1	MAIN[6][0][57]
PMA_REG[12] bit 2	MAIN[6][0][58]
PMA_REG[12] bit 3	MAIN[6][0][59]
PMA_REG[12] bit 4	MAIN[6][0][60]
PMA_REG[12] bit 5	MAIN[6][0][61]
PMA_REG[12] bit 6	MAIN[6][0][62]
PMA_REG[12] bit 7	MAIN[6][0][63]
PMA_REG[13] bit 0	MAIN[6][0][64]
PMA_REG[13] bit 1	MAIN[6][0][65]
PMA_REG[13] bit 2	MAIN[6][0][66]
PMA_REG[13] bit 3	MAIN[6][0][67]
PMA_REG[13] bit 4	MAIN[6][0][68]
PMA_REG[13] bit 5	MAIN[6][0][69]
PMA_REG[13] bit 6	MAIN[6][0][70]
PMA_REG[13] bit 7	MAIN[6][0][71]
PMA_REG[14] bit 0	MAIN[6][0][72]
PMA_REG[14] bit 1	MAIN[6][0][73]
PMA_REG[14] bit 2	MAIN[6][0][74]
PMA_REG[14] bit 3	MAIN[6][0][75]
PMA_REG[14] bit 4	MAIN[6][0][76]
PMA_REG[14] bit 5	MAIN[6][0][77]
PMA_REG[14] bit 6	MAIN[6][0][78]
PMA_REG[14] bit 7	MAIN[6][0][79]
PMA_REG[15] bit 0	MAIN[4][0][50]
PMA_REG[15] bit 1	MAIN[4][0][51]
PMA_REG[15] bit 2	MAIN[4][0][52]
PMA_REG[15] bit 3	MAIN[4][0][53]
PMA_REG[15] bit 4	MAIN[4][0][54]
PMA_REG[15] bit 5	MAIN[4][0][55]
PMA_REG[15] bit 6	MAIN[4][0][56]
PMA_REG[15] bit 7	MAIN[4][0][57]
MASTERBIAS bit 0	MAIN[5][0][40]
MASTERBIAS bit 1	MAIN[5][0][41]
VCODAC bit 0	MAIN[5][0][42]
VCODAC bit 1	MAIN[5][0][43]
VCODAC bit 2	MAIN[5][0][44]
VCODAC bit 3	MAIN[5][0][45]
VCODAC bit 4	MAIN[5][0][46]
VCODAC bit 5	MAIN[5][0][47]
TXDIVRATIO bit 0	MAIN[5][0][48]
TXDIVRATIO bit 1	MAIN[5][0][49]
TXDIVRATIO bit 2	MAIN[5][0][50]
TXDIVRATIO bit 3	MAIN[5][0][51]
TXDIVRATIO bit 4	MAIN[5][0][52]
TXDIVRATIO bit 5	MAIN[5][0][53]
TXDIVRATIO bit 6	MAIN[5][0][54]
TXDIVRATIO bit 7	MAIN[5][0][55]
TXDIVRATIO bit 8	MAIN[5][0][56]
TXDIVRATIO bit 9	MAIN[5][0][57]
TXBUSWID bit 0	MAIN[5][0][58]
ENDCD bit 0	MAIN[5][0][59]
SEL_DAC_TRAN bit 0	MAIN[6][0][30]
SEL_DAC_TRAN bit 1	MAIN[6][0][31]
SEL_DAC_TRAN bit 2	MAIN[5][0][60]
SEL_DAC_TRAN bit 3	MAIN[5][0][61]
SEL_DAC_FIX bit 0	MAIN[6][0][38]
SEL_DAC_FIX bit 1	MAIN[6][0][39]
SEL_DAC_FIX bit 2	MAIN[5][0][62]
SEL_DAC_FIX bit 3	MAIN[5][0][63]
TXLOOPFILTERC bit 0	MAIN[5][0][64]
TXLOOPFILTERC bit 1	MAIN[5][0][65]
TXLOOPFILTERR bit 0	MAIN[5][0][66]
TXLOOPFILTERR bit 1	MAIN[5][0][67]
IBOOST bit 0	MAIN[5][0][71]
TXCPI bit 0	MAIN[5][0][72]
TXVCODAC bit 0	MAIN[5][0][74]
TXVCOGAIN bit 0	MAIN[5][0][75]
TXVSEL bit 0	MAIN[5][0][76]
TXVSEL bit 1	MAIN[5][0][77]
TXREG bit 0	MAIN[5][0][78]
TXREG bit 1	MAIN[5][0][79]
TXDOWNLEVEL bit 0	MAIN[6][0][0]
TXDOWNLEVEL bit 1	MAIN[6][0][1]
TXDOWNLEVEL bit 2	MAIN[6][0][2]
TXDOWNLEVEL bit 3	MAIN[7][0][2]
PRDRVOFF bit 0	MAIN[6][0][4]
EMPOFF bit 0	MAIN[6][0][5]
SLEW bit 0	MAIN[6][0][6]
TXEMPHLEVEL bit 0	MAIN[6][0][8]
TXEMPHLEVEL bit 1	MAIN[6][0][9]
TXEMPHLEVEL bit 2	MAIN[6][0][10]
TXEMPHLEVEL bit 3	MAIN[6][0][11]
TXDIGSW bit 0	MAIN[6][0][12]
TXANASW bit 0	MAIN[6][0][13]
RXDIVRATIO bit 0	MAIN[6][0][16]
RXDIVRATIO bit 1	MAIN[6][0][17]
RXDIVRATIO bit 2	MAIN[6][0][18]
RXDIVRATIO bit 3	MAIN[6][0][19]
RXDIVRATIO bit 4	MAIN[6][0][20]
RXDIVRATIO bit 5	MAIN[6][0][21]
RXDIVRATIO bit 6	MAIN[6][0][22]
RXDIVRATIO bit 7	MAIN[6][0][23]
RXDIVRATIO bit 8	MAIN[6][0][24]
RXDIVRATIO bit 9	MAIN[6][0][25]
RXDIVRATIO bit 10	MAIN[6][0][26]
RXDIVRATIO bit 11	MAIN[6][0][27]
RXDIVRATIO bit 12	MAIN[6][0][28]
RXDIVRATIO bit 13	MAIN[6][0][29]
RXLOOPFILTERC bit 0	MAIN[6][0][32]
RXLOOPFILTERC bit 1	MAIN[6][0][33]
RXLOOPFILTERR bit 0	MAIN[6][0][34]
RXLOOPFILTERR bit 1	MAIN[6][0][35]
RXLOOPFILTERR bit 2	MAIN[6][0][36]
AFE_FLAT_ENABLE bit 0	MAIN[6][0][37]
RXVCOSW bit 0	MAIN[6][0][40]
RXCPI bit 0	MAIN[6][0][41]
RXCPI bit 1	MAIN[6][0][55]
RXVCODAC bit 0	MAIN[6][0][42]
RXVCOGAIN bit 0	MAIN[6][0][43]
RXVSEL bit 0	MAIN[6][0][44]
RXVSEL bit 1	MAIN[6][0][45]
RXREG bit 0	MAIN[6][0][46]
RXREG bit 1	MAIN[6][0][47]
RXFLTCPT bit 0	MAIN[6][0][48]
RXFLTCPT bit 1	MAIN[6][0][49]
RXFLTCPT bit 2	MAIN[6][0][50]
RXFLTCPT bit 3	MAIN[6][0][51]
RXFLTCPT bit 4	MAIN[6][0][52]
RXVSELCP bit 0	MAIN[6][0][53]
RXVSELCP bit 1	MAIN[6][0][54]
VSELAFE bit 0	MAIN[6][0][56]
VSELAFE bit 1	MAIN[6][0][57]
RXFEI bit 0	MAIN[6][0][58]
RXFEI bit 1	MAIN[6][0][59]
RXFLCPI bit 0	MAIN[6][0][60]
RXFLCPI bit 1	MAIN[6][0][61]
RXFER bit 0	MAIN[6][0][62]
RXFER bit 1	MAIN[6][0][63]
RXFER bit 2	MAIN[6][0][64]
RXFER bit 3	MAIN[6][0][65]
RXFER bit 4	MAIN[6][0][66]
RXFER bit 5	MAIN[6][0][67]
RXFER bit 6	MAIN[6][0][68]
RXFER bit 7	MAIN[6][0][69]
RXFER bit 8	MAIN[6][0][70]
RXFER bit 9	MAIN[6][0][71]
PMA_REG_0E bit 0	MAIN[6][0][72]
PMA_REG_0E bit 1	MAIN[6][0][73]
PMA_REG_0E bit 2	MAIN[6][0][74]
PMA_REG_0E bit 3	MAIN[6][0][75]
PMA_REG_0E bit 4	MAIN[6][0][76]
PMA_REG_0E bit 5	MAIN[6][0][77]
PMA_REG_0E bit 6	MAIN[6][0][78]
PMA_REG_0E bit 7	MAIN[6][0][79]
BIASEN	MAIN[4][0][50]
TXANAEN	MAIN[4][0][51]
TXDIGEN	MAIN[4][0][52]
RXANAEN	MAIN[4][0][53]
PMA_PWR_CNTRL_BIT4	MAIN[4][0][54]
TXEN	MAIN[4][0][55]
RXEN	MAIN[4][0][56]
TXDRVEN	MAIN[4][0][57]
RX_BUFFER_USE	MAIN[1][0][25]
RX_CRC_USE	MAIN[2][0][35]
RX_LOS_INVALID_INCR	[enum: GT_RX_LOS_INVALID_INCR]
RX_LOS_THRESHOLD	[enum: GT_RX_LOS_THRESHOLD]
RX_LOSS_OF_SYNC_FSM	MAIN[3][0][23]
TX_BUFFER_USE	MAIN_IO[0][36]
TX_CRC_FORCE_VALUE bit 0	MAIN_IO[0][38]
TX_CRC_FORCE_VALUE bit 1	MAIN_IO[0][39]
TX_CRC_FORCE_VALUE bit 2	MAIN_IO[0][40]
TX_CRC_FORCE_VALUE bit 3	MAIN_IO[0][41]
TX_CRC_FORCE_VALUE bit 4	MAIN_IO[0][42]
TX_CRC_FORCE_VALUE bit 5	MAIN_IO[0][43]
TX_CRC_FORCE_VALUE bit 6	MAIN_IO[0][44]
TX_CRC_FORCE_VALUE bit 7	MAIN_IO[0][45]
TX_CRC_USE	MAIN_IO[0][37]
ALIGN_COMMA_WORD	[enum: GT10_ALIGN_COMMA_WORD]
PCOMMA_DETECT	MAIN[0][0][34]
MCOMMA_DETECT	MAIN[0][0][22]
COMMA_10B_MASK bit 0	MAIN[0][0][1]
COMMA_10B_MASK bit 1	MAIN[0][0][2]
COMMA_10B_MASK bit 2	MAIN[0][0][3]
COMMA_10B_MASK bit 3	MAIN[0][0][4]
COMMA_10B_MASK bit 4	MAIN[0][0][5]
COMMA_10B_MASK bit 5	MAIN[0][0][6]
COMMA_10B_MASK bit 6	MAIN[0][0][7]
COMMA_10B_MASK bit 7	MAIN[0][0][8]
COMMA_10B_MASK bit 8	MAIN[0][0][9]
COMMA_10B_MASK bit 9	MAIN[0][0][10]
PCOMMA_10B_VALUE bit 0	MAIN[0][0][23]
PCOMMA_10B_VALUE bit 1	MAIN[0][0][24]
PCOMMA_10B_VALUE bit 2	MAIN[0][0][25]
PCOMMA_10B_VALUE bit 3	MAIN[0][0][26]
PCOMMA_10B_VALUE bit 4	MAIN[0][0][27]
PCOMMA_10B_VALUE bit 5	MAIN[0][0][28]
PCOMMA_10B_VALUE bit 6	MAIN[0][0][29]
PCOMMA_10B_VALUE bit 7	MAIN[0][0][30]
PCOMMA_10B_VALUE bit 8	MAIN[0][0][31]
PCOMMA_10B_VALUE bit 9	MAIN[0][0][32]
MCOMMA_10B_VALUE bit 0	MAIN[0][0][11]
MCOMMA_10B_VALUE bit 1	MAIN[0][0][12]
MCOMMA_10B_VALUE bit 2	MAIN[0][0][13]
MCOMMA_10B_VALUE bit 3	MAIN[0][0][14]
MCOMMA_10B_VALUE bit 4	MAIN[0][0][15]
MCOMMA_10B_VALUE bit 5	MAIN[0][0][16]
MCOMMA_10B_VALUE bit 6	MAIN[0][0][17]
MCOMMA_10B_VALUE bit 7	MAIN[0][0][18]
MCOMMA_10B_VALUE bit 8	MAIN[0][0][19]
MCOMMA_10B_VALUE bit 9	MAIN[0][0][20]
DEC_PCOMMA_DETECT	MAIN[1][0][31]
DEC_MCOMMA_DETECT	MAIN[1][0][32]
DEC_VALID_COMMA_ONLY	MAIN[1][0][30]
SH_CNT_MAX bit 0	MAIN[7][0][15]
SH_CNT_MAX bit 1	MAIN[7][0][16]
SH_CNT_MAX bit 2	MAIN[7][0][17]
SH_CNT_MAX bit 3	MAIN[7][0][18]
SH_CNT_MAX bit 4	MAIN[7][0][19]
SH_CNT_MAX bit 5	MAIN[7][0][20]
SH_CNT_MAX bit 6	MAIN[7][0][21]
SH_CNT_MAX bit 7	MAIN[7][0][22]
SH_INVALID_CNT_MAX bit 0	MAIN[7][0][23]
SH_INVALID_CNT_MAX bit 1	MAIN[7][0][24]
SH_INVALID_CNT_MAX bit 2	MAIN[7][0][25]
SH_INVALID_CNT_MAX bit 3	MAIN[7][0][26]
SH_INVALID_CNT_MAX bit 4	MAIN[7][0][27]
SH_INVALID_CNT_MAX bit 5	MAIN[7][0][28]
SH_INVALID_CNT_MAX bit 6	MAIN[7][0][29]
SH_INVALID_CNT_MAX bit 7	MAIN[7][0][30]
CRC_FORMAT	[enum: GT_CRC_FORMAT]
CRC_START_OF_PKT bit 0	MAIN_IO[0][13]
CRC_START_OF_PKT bit 1	MAIN_IO[0][14]
CRC_START_OF_PKT bit 2	MAIN_IO[0][15]
CRC_START_OF_PKT bit 3	MAIN_IO[0][16]
CRC_START_OF_PKT bit 4	MAIN_IO[0][17]
CRC_START_OF_PKT bit 5	MAIN_IO[0][18]
CRC_START_OF_PKT bit 6	MAIN_IO[0][19]
CRC_START_OF_PKT bit 7	MAIN_IO[0][20]
CRC_END_OF_PKT bit 0	MAIN_IO[0][70]
CRC_END_OF_PKT bit 1	MAIN_IO[0][71]
CRC_END_OF_PKT bit 2	MAIN_IO[0][72]
CRC_END_OF_PKT bit 3	MAIN_IO[0][73]
CRC_END_OF_PKT bit 4	MAIN_IO[0][74]
CRC_END_OF_PKT bit 5	MAIN_IO[0][75]
CRC_END_OF_PKT bit 6	MAIN_IO[0][76]
CRC_END_OF_PKT bit 7	MAIN_IO[0][77]
CLK_CORRECT_USE	MAIN[1][0][10]
CLK_COR_8B10B_DE	MAIN[4][0][32]
CLK_COR_INSERT_IDLE_FLAG	MAIN[1][0][11]
CLK_COR_KEEP_IDLE	MAIN[1][0][12]
CLK_COR_REPEAT_WAIT bit 0	MAIN[1][0][13]
CLK_COR_REPEAT_WAIT bit 1	MAIN[1][0][14]
CLK_COR_REPEAT_WAIT bit 2	MAIN[1][0][15]
CLK_COR_REPEAT_WAIT bit 3	MAIN[1][0][16]
CLK_COR_REPEAT_WAIT bit 4	MAIN[1][0][17]
CLK_COR_ADJ_MAX bit 0	MAIN[4][0][13]
CLK_COR_ADJ_MAX bit 1	MAIN[4][0][14]
CLK_COR_ADJ_MAX bit 2	MAIN[4][0][15]
CLK_COR_ADJ_MAX bit 3	MAIN[4][0][16]
CLK_COR_ADJ_MAX bit 4	MAIN[4][0][17]
CLK_COR_MIN_LAT bit 0	MAIN[4][0][19]
CLK_COR_MIN_LAT bit 1	MAIN[4][0][20]
CLK_COR_MIN_LAT bit 2	MAIN[4][0][21]
CLK_COR_MIN_LAT bit 3	MAIN[4][0][22]
CLK_COR_MIN_LAT bit 4	MAIN[4][0][23]
CLK_COR_MIN_LAT bit 5	MAIN[4][0][24]
CLK_COR_MAX_LAT bit 0	MAIN[4][0][25]
CLK_COR_MAX_LAT bit 1	MAIN[4][0][26]
CLK_COR_MAX_LAT bit 2	MAIN[4][0][27]
CLK_COR_MAX_LAT bit 3	MAIN[4][0][28]
CLK_COR_MAX_LAT bit 4	MAIN[4][0][29]
CLK_COR_MAX_LAT bit 5	MAIN[4][0][30]
CLK_COR_SEQ_LEN	[enum: GT10_SEQ_LEN]
CLK_COR_SEQ_2_USE	MAIN[1][0][35]
CLK_COR_SEQ_DROP	MAIN[5][0][13]
CLK_COR_SEQ_1_MASK bit 0	MAIN[5][0][2]
CLK_COR_SEQ_1_MASK bit 1	MAIN[5][0][4]
CLK_COR_SEQ_1_MASK bit 2	MAIN[5][0][5]
CLK_COR_SEQ_1_MASK bit 3	MAIN[5][0][6]
CLK_COR_SEQ_2_MASK bit 0	MAIN[5][0][8]
CLK_COR_SEQ_2_MASK bit 1	MAIN[5][0][9]
CLK_COR_SEQ_2_MASK bit 2	MAIN[5][0][10]
CLK_COR_SEQ_2_MASK bit 3	MAIN[5][0][11]
CLK_COR_SEQ_1_1 bit 0	MAIN[0][0][69]
CLK_COR_SEQ_1_1 bit 1	MAIN[0][0][70]
CLK_COR_SEQ_1_1 bit 2	MAIN[0][0][71]
CLK_COR_SEQ_1_1 bit 3	MAIN[0][0][72]
CLK_COR_SEQ_1_1 bit 4	MAIN[0][0][73]
CLK_COR_SEQ_1_1 bit 5	MAIN[0][0][74]
CLK_COR_SEQ_1_1 bit 6	MAIN[0][0][75]
CLK_COR_SEQ_1_1 bit 7	MAIN[0][0][76]
CLK_COR_SEQ_1_1 bit 8	MAIN[0][0][77]
CLK_COR_SEQ_1_1 bit 9	MAIN[0][0][78]
CLK_COR_SEQ_1_1 bit 10	MAIN[0][0][79]
CLK_COR_SEQ_1_2 bit 0	MAIN[0][0][58]
CLK_COR_SEQ_1_2 bit 1	MAIN[0][0][59]
CLK_COR_SEQ_1_2 bit 2	MAIN[0][0][60]
CLK_COR_SEQ_1_2 bit 3	MAIN[0][0][61]
CLK_COR_SEQ_1_2 bit 4	MAIN[0][0][62]
CLK_COR_SEQ_1_2 bit 5	MAIN[0][0][63]
CLK_COR_SEQ_1_2 bit 6	MAIN[0][0][64]
CLK_COR_SEQ_1_2 bit 7	MAIN[0][0][65]
CLK_COR_SEQ_1_2 bit 8	MAIN[0][0][66]
CLK_COR_SEQ_1_2 bit 9	MAIN[0][0][67]
CLK_COR_SEQ_1_2 bit 10	MAIN[0][0][68]
CLK_COR_SEQ_1_3 bit 0	MAIN[0][0][47]
CLK_COR_SEQ_1_3 bit 1	MAIN[0][0][48]
CLK_COR_SEQ_1_3 bit 2	MAIN[0][0][49]
CLK_COR_SEQ_1_3 bit 3	MAIN[0][0][50]
CLK_COR_SEQ_1_3 bit 4	MAIN[0][0][51]
CLK_COR_SEQ_1_3 bit 5	MAIN[0][0][52]
CLK_COR_SEQ_1_3 bit 6	MAIN[0][0][53]
CLK_COR_SEQ_1_3 bit 7	MAIN[0][0][54]
CLK_COR_SEQ_1_3 bit 8	MAIN[0][0][55]
CLK_COR_SEQ_1_3 bit 9	MAIN[0][0][56]
CLK_COR_SEQ_1_3 bit 10	MAIN[0][0][57]
CLK_COR_SEQ_1_4 bit 0	MAIN[0][0][36]
CLK_COR_SEQ_1_4 bit 1	MAIN[0][0][37]
CLK_COR_SEQ_1_4 bit 2	MAIN[0][0][38]
CLK_COR_SEQ_1_4 bit 3	MAIN[0][0][39]
CLK_COR_SEQ_1_4 bit 4	MAIN[0][0][40]
CLK_COR_SEQ_1_4 bit 5	MAIN[0][0][41]
CLK_COR_SEQ_1_4 bit 6	MAIN[0][0][42]
CLK_COR_SEQ_1_4 bit 7	MAIN[0][0][43]
CLK_COR_SEQ_1_4 bit 8	MAIN[0][0][44]
CLK_COR_SEQ_1_4 bit 9	MAIN[0][0][45]
CLK_COR_SEQ_1_4 bit 10	MAIN[0][0][46]
CLK_COR_SEQ_2_1 bit 0	MAIN[1][0][69]
CLK_COR_SEQ_2_1 bit 1	MAIN[1][0][70]
CLK_COR_SEQ_2_1 bit 2	MAIN[1][0][71]
CLK_COR_SEQ_2_1 bit 3	MAIN[1][0][72]
CLK_COR_SEQ_2_1 bit 4	MAIN[1][0][73]
CLK_COR_SEQ_2_1 bit 5	MAIN[1][0][74]
CLK_COR_SEQ_2_1 bit 6	MAIN[1][0][75]
CLK_COR_SEQ_2_1 bit 7	MAIN[1][0][76]
CLK_COR_SEQ_2_1 bit 8	MAIN[1][0][77]
CLK_COR_SEQ_2_1 bit 9	MAIN[1][0][78]
CLK_COR_SEQ_2_1 bit 10	MAIN[1][0][79]
CLK_COR_SEQ_2_2 bit 0	MAIN[1][0][58]
CLK_COR_SEQ_2_2 bit 1	MAIN[1][0][59]
CLK_COR_SEQ_2_2 bit 2	MAIN[1][0][60]
CLK_COR_SEQ_2_2 bit 3	MAIN[1][0][61]
CLK_COR_SEQ_2_2 bit 4	MAIN[1][0][62]
CLK_COR_SEQ_2_2 bit 5	MAIN[1][0][63]
CLK_COR_SEQ_2_2 bit 6	MAIN[1][0][64]
CLK_COR_SEQ_2_2 bit 7	MAIN[1][0][65]
CLK_COR_SEQ_2_2 bit 8	MAIN[1][0][66]
CLK_COR_SEQ_2_2 bit 9	MAIN[1][0][67]
CLK_COR_SEQ_2_2 bit 10	MAIN[1][0][68]
CLK_COR_SEQ_2_3 bit 0	MAIN[1][0][47]
CLK_COR_SEQ_2_3 bit 1	MAIN[1][0][48]
CLK_COR_SEQ_2_3 bit 2	MAIN[1][0][49]
CLK_COR_SEQ_2_3 bit 3	MAIN[1][0][50]
CLK_COR_SEQ_2_3 bit 4	MAIN[1][0][51]
CLK_COR_SEQ_2_3 bit 5	MAIN[1][0][52]
CLK_COR_SEQ_2_3 bit 6	MAIN[1][0][53]
CLK_COR_SEQ_2_3 bit 7	MAIN[1][0][54]
CLK_COR_SEQ_2_3 bit 8	MAIN[1][0][55]
CLK_COR_SEQ_2_3 bit 9	MAIN[1][0][56]
CLK_COR_SEQ_2_3 bit 10	MAIN[1][0][57]
CLK_COR_SEQ_2_4 bit 0	MAIN[1][0][36]
CLK_COR_SEQ_2_4 bit 1	MAIN[1][0][37]
CLK_COR_SEQ_2_4 bit 2	MAIN[1][0][38]
CLK_COR_SEQ_2_4 bit 3	MAIN[1][0][39]
CLK_COR_SEQ_2_4 bit 4	MAIN[1][0][40]
CLK_COR_SEQ_2_4 bit 5	MAIN[1][0][41]
CLK_COR_SEQ_2_4 bit 6	MAIN[1][0][42]
CLK_COR_SEQ_2_4 bit 7	MAIN[1][0][43]
CLK_COR_SEQ_2_4 bit 8	MAIN[1][0][44]
CLK_COR_SEQ_2_4 bit 9	MAIN[1][0][45]
CLK_COR_SEQ_2_4 bit 10	MAIN[1][0][46]
CHAN_BOND_MODE	[enum: GT_CHAN_BOND_MODE]
CHAN_BOND_64B66B_SV	MAIN[4][0][33]
CHAN_BOND_LIMIT bit 0	MAIN[3][0][24]
CHAN_BOND_LIMIT bit 1	MAIN[3][0][25]
CHAN_BOND_LIMIT bit 2	MAIN[3][0][26]
CHAN_BOND_LIMIT bit 3	MAIN[3][0][27]
CHAN_BOND_LIMIT bit 4	MAIN[3][0][28]
CHAN_BOND_ONE_SHOT	MAIN[1][0][23]
CHAN_BOND_SEQ_LEN	[enum: GT10_SEQ_LEN]
CHAN_BOND_SEQ_2_USE	MAIN[3][0][35]
CHAN_BOND_SEQ_1_MASK bit 0	MAIN[4][0][3]
CHAN_BOND_SEQ_1_MASK bit 1	MAIN[4][0][4]
CHAN_BOND_SEQ_1_MASK bit 2	MAIN[4][0][5]
CHAN_BOND_SEQ_1_MASK bit 3	MAIN[4][0][6]
CHAN_BOND_SEQ_2_MASK bit 0	MAIN[4][0][8]
CHAN_BOND_SEQ_2_MASK bit 1	MAIN[4][0][9]
CHAN_BOND_SEQ_2_MASK bit 2	MAIN[4][0][10]
CHAN_BOND_SEQ_2_MASK bit 3	MAIN[4][0][11]
CHAN_BOND_SEQ_1_1 bit 0	MAIN[2][0][69]
CHAN_BOND_SEQ_1_1 bit 1	MAIN[2][0][70]
CHAN_BOND_SEQ_1_1 bit 2	MAIN[2][0][71]
CHAN_BOND_SEQ_1_1 bit 3	MAIN[2][0][72]
CHAN_BOND_SEQ_1_1 bit 4	MAIN[2][0][73]
CHAN_BOND_SEQ_1_1 bit 5	MAIN[2][0][74]
CHAN_BOND_SEQ_1_1 bit 6	MAIN[2][0][75]
CHAN_BOND_SEQ_1_1 bit 7	MAIN[2][0][76]
CHAN_BOND_SEQ_1_1 bit 8	MAIN[2][0][77]
CHAN_BOND_SEQ_1_1 bit 9	MAIN[2][0][78]
CHAN_BOND_SEQ_1_1 bit 10	MAIN[2][0][79]
CHAN_BOND_SEQ_1_2 bit 0	MAIN[2][0][58]
CHAN_BOND_SEQ_1_2 bit 1	MAIN[2][0][59]
CHAN_BOND_SEQ_1_2 bit 2	MAIN[2][0][60]
CHAN_BOND_SEQ_1_2 bit 3	MAIN[2][0][61]
CHAN_BOND_SEQ_1_2 bit 4	MAIN[2][0][62]
CHAN_BOND_SEQ_1_2 bit 5	MAIN[2][0][63]
CHAN_BOND_SEQ_1_2 bit 6	MAIN[2][0][64]
CHAN_BOND_SEQ_1_2 bit 7	MAIN[2][0][65]
CHAN_BOND_SEQ_1_2 bit 8	MAIN[2][0][66]
CHAN_BOND_SEQ_1_2 bit 9	MAIN[2][0][67]
CHAN_BOND_SEQ_1_2 bit 10	MAIN[2][0][68]
CHAN_BOND_SEQ_1_3 bit 0	MAIN[2][0][47]
CHAN_BOND_SEQ_1_3 bit 1	MAIN[2][0][48]
CHAN_BOND_SEQ_1_3 bit 2	MAIN[2][0][49]
CHAN_BOND_SEQ_1_3 bit 3	MAIN[2][0][50]
CHAN_BOND_SEQ_1_3 bit 4	MAIN[2][0][51]
CHAN_BOND_SEQ_1_3 bit 5	MAIN[2][0][52]
CHAN_BOND_SEQ_1_3 bit 6	MAIN[2][0][53]
CHAN_BOND_SEQ_1_3 bit 7	MAIN[2][0][54]
CHAN_BOND_SEQ_1_3 bit 8	MAIN[2][0][55]
CHAN_BOND_SEQ_1_3 bit 9	MAIN[2][0][56]
CHAN_BOND_SEQ_1_3 bit 10	MAIN[2][0][57]
CHAN_BOND_SEQ_1_4 bit 0	MAIN[2][0][36]
CHAN_BOND_SEQ_1_4 bit 1	MAIN[2][0][37]
CHAN_BOND_SEQ_1_4 bit 2	MAIN[2][0][38]
CHAN_BOND_SEQ_1_4 bit 3	MAIN[2][0][39]
CHAN_BOND_SEQ_1_4 bit 4	MAIN[2][0][40]
CHAN_BOND_SEQ_1_4 bit 5	MAIN[2][0][41]
CHAN_BOND_SEQ_1_4 bit 6	MAIN[2][0][42]
CHAN_BOND_SEQ_1_4 bit 7	MAIN[2][0][43]
CHAN_BOND_SEQ_1_4 bit 8	MAIN[2][0][44]
CHAN_BOND_SEQ_1_4 bit 9	MAIN[2][0][45]
CHAN_BOND_SEQ_1_4 bit 10	MAIN[2][0][46]
CHAN_BOND_SEQ_2_1 bit 0	MAIN[3][0][69]
CHAN_BOND_SEQ_2_1 bit 1	MAIN[3][0][70]
CHAN_BOND_SEQ_2_1 bit 2	MAIN[3][0][71]
CHAN_BOND_SEQ_2_1 bit 3	MAIN[3][0][72]
CHAN_BOND_SEQ_2_1 bit 4	MAIN[3][0][73]
CHAN_BOND_SEQ_2_1 bit 5	MAIN[3][0][74]
CHAN_BOND_SEQ_2_1 bit 6	MAIN[3][0][75]
CHAN_BOND_SEQ_2_1 bit 7	MAIN[3][0][76]
CHAN_BOND_SEQ_2_1 bit 8	MAIN[3][0][77]
CHAN_BOND_SEQ_2_1 bit 9	MAIN[3][0][78]
CHAN_BOND_SEQ_2_1 bit 10	MAIN[3][0][79]
CHAN_BOND_SEQ_2_2 bit 0	MAIN[3][0][58]
CHAN_BOND_SEQ_2_2 bit 1	MAIN[3][0][59]
CHAN_BOND_SEQ_2_2 bit 2	MAIN[3][0][60]
CHAN_BOND_SEQ_2_2 bit 3	MAIN[3][0][61]
CHAN_BOND_SEQ_2_2 bit 4	MAIN[3][0][62]
CHAN_BOND_SEQ_2_2 bit 5	MAIN[3][0][63]
CHAN_BOND_SEQ_2_2 bit 6	MAIN[3][0][64]
CHAN_BOND_SEQ_2_2 bit 7	MAIN[3][0][65]
CHAN_BOND_SEQ_2_2 bit 8	MAIN[3][0][66]
CHAN_BOND_SEQ_2_2 bit 9	MAIN[3][0][67]
CHAN_BOND_SEQ_2_2 bit 10	MAIN[3][0][68]
CHAN_BOND_SEQ_2_3 bit 0	MAIN[3][0][47]
CHAN_BOND_SEQ_2_3 bit 1	MAIN[3][0][48]
CHAN_BOND_SEQ_2_3 bit 2	MAIN[3][0][49]
CHAN_BOND_SEQ_2_3 bit 3	MAIN[3][0][50]
CHAN_BOND_SEQ_2_3 bit 4	MAIN[3][0][51]
CHAN_BOND_SEQ_2_3 bit 5	MAIN[3][0][52]
CHAN_BOND_SEQ_2_3 bit 6	MAIN[3][0][53]
CHAN_BOND_SEQ_2_3 bit 7	MAIN[3][0][54]
CHAN_BOND_SEQ_2_3 bit 8	MAIN[3][0][55]
CHAN_BOND_SEQ_2_3 bit 9	MAIN[3][0][56]
CHAN_BOND_SEQ_2_3 bit 10	MAIN[3][0][57]
CHAN_BOND_SEQ_2_4 bit 0	MAIN[3][0][36]
CHAN_BOND_SEQ_2_4 bit 1	MAIN[3][0][37]
CHAN_BOND_SEQ_2_4 bit 2	MAIN[3][0][38]
CHAN_BOND_SEQ_2_4 bit 3	MAIN[3][0][39]
CHAN_BOND_SEQ_2_4 bit 4	MAIN[3][0][40]
CHAN_BOND_SEQ_2_4 bit 5	MAIN[3][0][41]
CHAN_BOND_SEQ_2_4 bit 6	MAIN[3][0][42]
CHAN_BOND_SEQ_2_4 bit 7	MAIN[3][0][43]
CHAN_BOND_SEQ_2_4 bit 8	MAIN[3][0][44]
CHAN_BOND_SEQ_2_4 bit 9	MAIN[3][0][45]
CHAN_BOND_SEQ_2_4 bit 10	MAIN[3][0][46]
TEST_MODE_1	MAIN[2][0][11]
TEST_MODE_2	MAIN[2][0][12]
TEST_MODE_3	MAIN[2][0][13]
TEST_MODE_4	MAIN[2][0][14]
TEST_MODE_5	MAIN[2][0][15]
TEST_MODE_6	MAIN[2][0][16]

virtex2 GIGABIT10_N enum GT_RX_LOS_INVALID_INCR
GT10.RX_LOS_INVALID_INCR	MAIN[3][0][30]	MAIN[3][0][22]	MAIN[3][0][21]	MAIN[3][0][20]	MAIN[3][0][19]	MAIN[3][0][18]	MAIN[3][0][17]	MAIN[3][0][16]
_1	0	0	0	0	0	0	0	1
_2	0	0	0	0	0	0	1	0
_4	0	0	0	0	0	1	0	0
_8	0	0	0	0	1	0	0	0
_16	0	0	0	1	0	0	0	0
_32	0	0	1	0	0	0	0	0
_64	0	1	0	0	0	0	0	0
_128	1	0	0	0	0	0	0	0

virtex2 GIGABIT10_N enum GT_RX_LOS_THRESHOLD
GT10.RX_LOS_THRESHOLD	MAIN[3][0][15]	MAIN[3][0][14]	MAIN[3][0][13]	MAIN[3][0][12]	MAIN[3][0][11]	MAIN[3][0][10]	MAIN[3][0][9]	MAIN[3][0][8]
_4	0	0	0	0	0	0	0	1
_8	0	0	0	0	0	0	1	0
_16	0	0	0	0	0	1	0	0
_32	0	0	0	0	1	0	0	0
_64	0	0	0	1	0	0	0	0
_128	0	0	1	0	0	0	0	0
_256	0	1	0	0	0	0	0	0
_512	1	0	0	0	0	0	0	0

virtex2 GIGABIT10_N enum GT10_ALIGN_COMMA_WORD
GT10.ALIGN_COMMA_WORD	MAIN[4][0][1]	MAIN[4][0][0]
_1	0	0
_2	0	1
_4	1	0

virtex2 GIGABIT10_N enum GT_CRC_FORMAT
GT10.CRC_FORMAT	MAIN_IO[0][4]	MAIN_IO[0][3]
USER_MODE	0	0
ETHERNET	0	1
INFINIBAND	1	1
FIBRE_CHAN	1	0

virtex2 GIGABIT10_N enum GT10_SEQ_LEN
GT10.CLK_COR_SEQ_LEN	MAIN[2][0][24]	MAIN[2][0][23]	MAIN[2][0][22]
GT10.CHAN_BOND_SEQ_LEN	MAIN[2][0][28]	MAIN[2][0][27]	MAIN[2][0][26]
_1	0	0	0
_2	0	0	1
_3	0	1	0
_4	0	1	1
_8	1	1	1

virtex2 GIGABIT10_N enum GT_CHAN_BOND_MODE
GT10.CHAN_BOND_MODE	MAIN[1][0][4]	MAIN[1][0][2]
NONE	0	0
MASTER	0	1
SLAVE_1_HOP	1	0
SLAVE_2_HOPS	1	1

Bel wires

virtex2 GIGABIT10_N bel wires
Wire	Pins
CELL_IO.IMUX_DCM_CLK_OPTINV[0]	GT10.RXUSRCLK
CELL_IO.IMUX_DCM_CLK_OPTINV[1]	GT10.RXUSRCLK2
CELL_IO.IMUX_DCM_CLK_OPTINV[2]	GT10.REFCLK
CELL_IO.IMUX_DCM_CLK_OPTINV[3]	GT10.REFCLK2
CELL_IO.IMUX_SR_OPTINV[0]	GT10.RXRESET
CELL_IO.IMUX_G0_DATA[0]	GT10.CHBONDI[0]
CELL_IO.IMUX_G0_DATA[1]	GT10.CHBONDI[4]
CELL_IO.IMUX_G0_DATA[2]	GT10.POWERDOWN
CELL_IO.IMUX_G0_DATA[3]	GT10.LOOPBACK[0]
CELL_IO.IMUX_G0_DATA[7]	GT10.PMARXLOCKSEL[1]
CELL_IO.IMUX_G1_DATA[0]	GT10.CHBONDI[1]
CELL_IO.IMUX_G1_DATA[1]	GT10.ENCHANSYNC
CELL_IO.IMUX_G1_DATA[2]	GT10.RXPOLARITY
CELL_IO.IMUX_G1_DATA[3]	GT10.LOOPBACK[1]
CELL_IO.IMUX_G2_DATA[0]	GT10.CHBONDI[2]
CELL_IO.IMUX_G2_DATA[1]	GT10.REFCLKSEL
CELL_IO.IMUX_G2_DATA[3]	GT10.TXPOLARITY
CELL_IO.IMUX_G3_DATA[0]	GT10.CHBONDI[3]
CELL_IO.IMUX_G3_DATA[1]	GT10.PMAINIT
CELL_IO.IMUX_G3_DATA[3]	GT10.TXINHIBIT
CELL_IO.IMUX_G3_DATA[4]	GT10.REFCLKBSEL
CELL_IO.IMUX_G3_DATA[6]	GT10.PMARXLOCKSEL[0]
CELL_IO.OUT_FAN_BEL[0]	GT10.CHBONDDONE
CELL_IO.OUT_FAN_BEL[1]	GT10.RXRECCLK
CELL_IO.OUT_FAN_BEL[2]	GT10.CHBONDO[0]
CELL_IO.OUT_FAN_BEL[3]	GT10.CHBONDO[1]
CELL_IO.OUT_FAN_BEL[4]	GT10.CHBONDO[2]
CELL_IO.OUT_FAN_BEL[5]	GT10.CHBONDO[3]
CELL_IO.OUT_FAN_BEL[6]	GT10.CHBONDO[4]
CELL_IO.OUT_FAN_BEL[7]	GT10.TXOUTCLK
CELL_IO.OUT_SEC_BEL[8]	GT10.PMARXLOCK
CELL_IO.OUT_SEC_BEL[9]	GT10.RXCLKCORCNT[2]
CELL_IO.OUT_SEC_BEL[10]	GT10.RXCLKCORCNT[1]
CELL_IO.OUT_SEC_BEL[11]	GT10.RXCLKCORCNT[0]
CELL_IO.OUT_SEC_BEL[12]	GT10.RXCOMMADET
CELL_IO.OUT_SEC_BEL[13]	GT10.RXREALIGN
CELL_IO.OUT_SEC_BEL[14]	GT10.RXBUFSTATUS[1]
CELL_IO.OUT_SEC_BEL[15]	GT10.RXBUFSTATUS[0]
CELL[0].IMUX_CLK_OPTINV[0]	GT10.TXUSRCLK
CELL[0].IMUX_CLK_OPTINV[1]	GT10.TXUSRCLK2
CELL[0].IMUX_SR_OPTINV[0]	GT10.TXRESET
CELL[0].IMUX_G0_DATA[0]	GT10.TXDATA[0]
CELL[0].IMUX_G0_DATA[1]	GT10.TXDATA[32]
CELL[0].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[0]
CELL[0].IMUX_G1_DATA[0]	GT10.TXDATA[1]
CELL[0].IMUX_G1_DATA[1]	GT10.TXDATA[33]
CELL[0].IMUX_G1_DATA[2]	GT10.TXCHARISK[0]
CELL[0].IMUX_G1_DATA[4]	GT10.ENPCOMMAALIGN
CELL[0].IMUX_G1_DATA[7]	GT10.ENMCOMMAALIGN
CELL[0].IMUX_G2_DATA[0]	GT10.TXDATA[2]
CELL[0].IMUX_G2_DATA[1]	GT10.TXDATA[34]
CELL[0].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[0]
CELL[0].IMUX_G3_DATA[0]	GT10.TXDATA[3]
CELL[0].IMUX_G3_DATA[1]	GT10.TXDATA[35]
CELL[0].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[0]
CELL[0].OUT_FAN_BEL[0]	GT10.RXDATA[0]
CELL[0].OUT_FAN_BEL[1]	GT10.RXDATA[1]
CELL[0].OUT_FAN_BEL[2]	GT10.RXDATA[2]
CELL[0].OUT_FAN_BEL[3]	GT10.RXDATA[3]
CELL[0].OUT_FAN_BEL[4]	GT10.RXDATA[32]
CELL[0].OUT_FAN_BEL[5]	GT10.RXDATA[33]
CELL[0].OUT_FAN_BEL[6]	GT10.RXDATA[34]
CELL[0].OUT_FAN_BEL[7]	GT10.RXDATA[35]
CELL[0].OUT_SEC_BEL[8]	GT10.RXLOSSOFSYNC[0]
CELL[0].OUT_SEC_BEL[9]	GT10.TXKERR[0]
CELL[0].OUT_SEC_BEL[10]	GT10.TXRUNDISP[0]
CELL[0].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[0]
CELL[0].OUT_SEC_BEL[12]	GT10.RXCHARISK[0]
CELL[0].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[0]
CELL[0].OUT_SEC_BEL[14]	GT10.RXDISPERR[0]
CELL[0].OUT_SEC_BEL[15]	GT10.RXRUNDISP[0]
CELL[1].IMUX_G0_DATA[0]	GT10.TXDATA[4]
CELL[1].IMUX_G0_DATA[1]	GT10.TXDATA[36]
CELL[1].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[1]
CELL[1].IMUX_G1_DATA[0]	GT10.TXDATA[5]
CELL[1].IMUX_G1_DATA[1]	GT10.TXDATA[37]
CELL[1].IMUX_G1_DATA[2]	GT10.TXCHARISK[1]
CELL[1].IMUX_G2_DATA[0]	GT10.TXDATA[6]
CELL[1].IMUX_G2_DATA[1]	GT10.TXDATA[38]
CELL[1].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[1]
CELL[1].IMUX_G3_DATA[0]	GT10.TXDATA[7]
CELL[1].IMUX_G3_DATA[1]	GT10.TXDATA[39]
CELL[1].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[1]
CELL[1].OUT_FAN_BEL[0]	GT10.RXDATA[4]
CELL[1].OUT_FAN_BEL[1]	GT10.RXDATA[5]
CELL[1].OUT_FAN_BEL[2]	GT10.RXDATA[6]
CELL[1].OUT_FAN_BEL[3]	GT10.RXDATA[7]
CELL[1].OUT_FAN_BEL[4]	GT10.RXDATA[36]
CELL[1].OUT_FAN_BEL[5]	GT10.RXDATA[37]
CELL[1].OUT_FAN_BEL[6]	GT10.RXDATA[38]
CELL[1].OUT_FAN_BEL[7]	GT10.RXDATA[39]
CELL[1].OUT_SEC_BEL[8]	GT10.RXLOSSOFSYNC[1]
CELL[1].OUT_SEC_BEL[9]	GT10.TXKERR[1]
CELL[1].OUT_SEC_BEL[10]	GT10.TXRUNDISP[1]
CELL[1].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[1]
CELL[1].OUT_SEC_BEL[12]	GT10.RXCHARISK[1]
CELL[1].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[1]
CELL[1].OUT_SEC_BEL[14]	GT10.RXDISPERR[1]
CELL[1].OUT_SEC_BEL[15]	GT10.RXRUNDISP[1]
CELL[2].IMUX_G0_DATA[0]	GT10.TXDATA[8]
CELL[2].IMUX_G0_DATA[1]	GT10.TXDATA[40]
CELL[2].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[2]
CELL[2].IMUX_G1_DATA[0]	GT10.TXDATA[9]
CELL[2].IMUX_G1_DATA[1]	GT10.TXDATA[41]
CELL[2].IMUX_G1_DATA[2]	GT10.TXCHARISK[2]
CELL[2].IMUX_G2_DATA[0]	GT10.TXDATA[10]
CELL[2].IMUX_G2_DATA[1]	GT10.TXDATA[42]
CELL[2].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[2]
CELL[2].IMUX_G3_DATA[0]	GT10.TXDATA[11]
CELL[2].IMUX_G3_DATA[1]	GT10.TXDATA[43]
CELL[2].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[2]
CELL[2].OUT_FAN_BEL[0]	GT10.RXDATA[8]
CELL[2].OUT_FAN_BEL[1]	GT10.RXDATA[9]
CELL[2].OUT_FAN_BEL[2]	GT10.RXDATA[10]
CELL[2].OUT_FAN_BEL[3]	GT10.RXDATA[11]
CELL[2].OUT_FAN_BEL[4]	GT10.RXDATA[40]
CELL[2].OUT_FAN_BEL[5]	GT10.RXDATA[41]
CELL[2].OUT_FAN_BEL[6]	GT10.RXDATA[42]
CELL[2].OUT_FAN_BEL[7]	GT10.RXDATA[43]
CELL[2].OUT_SEC_BEL[8]	GT10.RXCRCERR
CELL[2].OUT_SEC_BEL[9]	GT10.TXKERR[2]
CELL[2].OUT_SEC_BEL[10]	GT10.TXRUNDISP[2]
CELL[2].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[2]
CELL[2].OUT_SEC_BEL[12]	GT10.RXCHARISK[2]
CELL[2].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[2]
CELL[2].OUT_SEC_BEL[14]	GT10.RXDISPERR[2]
CELL[2].OUT_SEC_BEL[15]	GT10.RXRUNDISP[2]
CELL[3].IMUX_G0_DATA[0]	GT10.TXDATA[12]
CELL[3].IMUX_G0_DATA[1]	GT10.TXDATA[44]
CELL[3].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[3]
CELL[3].IMUX_G0_DATA[4]	GT10.TXDATAWIDTH[0]
CELL[3].IMUX_G0_DATA[5]	GT10.TXINTDATAWIDTH[0]
CELL[3].IMUX_G0_DATA[6]	GT10.RXDESCRAM64B66BUSE
CELL[3].IMUX_G1_DATA[0]	GT10.TXDATA[13]
CELL[3].IMUX_G1_DATA[1]	GT10.TXDATA[45]
CELL[3].IMUX_G1_DATA[2]	GT10.TXCHARISK[3]
CELL[3].IMUX_G1_DATA[4]	GT10.TXDATAWIDTH[1]
CELL[3].IMUX_G1_DATA[5]	GT10.TXINTDATAWIDTH[1]
CELL[3].IMUX_G1_DATA[6]	GT10.RXBLOCKSYNC64B66BUSE
CELL[3].IMUX_G2_DATA[0]	GT10.TXDATA[14]
CELL[3].IMUX_G2_DATA[1]	GT10.TXDATA[46]
CELL[3].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[3]
CELL[3].IMUX_G2_DATA[4]	GT10.RXDATAWIDTH[0]
CELL[3].IMUX_G2_DATA[5]	GT10.RXINTDATAWIDTH[0]
CELL[3].IMUX_G2_DATA[6]	GT10.RXCOMMADETUSE
CELL[3].IMUX_G3_DATA[0]	GT10.TXDATA[15]
CELL[3].IMUX_G3_DATA[1]	GT10.TXDATA[47]
CELL[3].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[3]
CELL[3].IMUX_G3_DATA[3]	GT10.TXFORCECRCERR
CELL[3].IMUX_G3_DATA[4]	GT10.RXDATAWIDTH[1]
CELL[3].IMUX_G3_DATA[5]	GT10.RXINTDATAWIDTH[1]
CELL[3].IMUX_G3_DATA[6]	GT10.RXSLIDE
CELL[3].OUT_FAN_BEL[0]	GT10.RXDATA[12]
CELL[3].OUT_FAN_BEL[1]	GT10.RXDATA[13]
CELL[3].OUT_FAN_BEL[2]	GT10.RXDATA[14]
CELL[3].OUT_FAN_BEL[3]	GT10.RXDATA[15]
CELL[3].OUT_FAN_BEL[4]	GT10.RXDATA[44]
CELL[3].OUT_FAN_BEL[5]	GT10.RXDATA[45]
CELL[3].OUT_FAN_BEL[6]	GT10.RXDATA[46]
CELL[3].OUT_FAN_BEL[7]	GT10.RXDATA[47]
CELL[3].OUT_SEC_BEL[8]	GT10.RXCHECKINGCRC
CELL[3].OUT_SEC_BEL[9]	GT10.TXKERR[3]
CELL[3].OUT_SEC_BEL[10]	GT10.TXRUNDISP[3]
CELL[3].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[3]
CELL[3].OUT_SEC_BEL[12]	GT10.RXCHARISK[3]
CELL[3].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[3]
CELL[3].OUT_SEC_BEL[14]	GT10.RXDISPERR[3]
CELL[3].OUT_SEC_BEL[15]	GT10.RXRUNDISP[3]
CELL[4].IMUX_G0_DATA[0]	GT10.TXDATA[16]
CELL[4].IMUX_G0_DATA[1]	GT10.TXDATA[48]
CELL[4].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[4]
CELL[4].IMUX_G0_DATA[3]	GT10.TESTMEMORY
CELL[4].IMUX_G0_DATA[4]	GT10.RXDEC64B66BUSE
CELL[4].IMUX_G0_DATA[6]	GT10.SCANIN
CELL[4].IMUX_G1_DATA[0]	GT10.TXDATA[17]
CELL[4].IMUX_G1_DATA[1]	GT10.TXDATA[49]
CELL[4].IMUX_G1_DATA[2]	GT10.TXCHARISK[4]
CELL[4].IMUX_G1_DATA[3]	GT10.RXIGNOREBTF
CELL[4].IMUX_G1_DATA[4]	GT10.TXSCRAM64B66BUSE
CELL[4].IMUX_G1_DATA[6]	GT10.SCANEN
CELL[4].IMUX_G2_DATA[0]	GT10.TXDATA[18]
CELL[4].IMUX_G2_DATA[1]	GT10.TXDATA[50]
CELL[4].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[4]
CELL[4].IMUX_G2_DATA[3]	GT10.TXENC8B10BUSE
CELL[4].IMUX_G2_DATA[4]	GT10.TXGEARBOX64B66BUSE
CELL[4].IMUX_G2_DATA[6]	GT10.SCANMODE
CELL[4].IMUX_G3_DATA[0]	GT10.TXDATA[19]
CELL[4].IMUX_G3_DATA[1]	GT10.TXDATA[51]
CELL[4].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[4]
CELL[4].IMUX_G3_DATA[3]	GT10.TXENC64B66BUSE
CELL[4].OUT_FAN_BEL[0]	GT10.RXDATA[16]
CELL[4].OUT_FAN_BEL[1]	GT10.RXDATA[17]
CELL[4].OUT_FAN_BEL[2]	GT10.RXDATA[18]
CELL[4].OUT_FAN_BEL[3]	GT10.RXDATA[19]
CELL[4].OUT_FAN_BEL[4]	GT10.RXDATA[48]
CELL[4].OUT_FAN_BEL[5]	GT10.RXDATA[49]
CELL[4].OUT_FAN_BEL[6]	GT10.RXDATA[50]
CELL[4].OUT_FAN_BEL[7]	GT10.RXDATA[51]
CELL[4].OUT_SEC_BEL[8]	GT10.SCANOUT
CELL[4].OUT_SEC_BEL[9]	GT10.TXKERR[4]
CELL[4].OUT_SEC_BEL[10]	GT10.TXRUNDISP[4]
CELL[4].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[4]
CELL[4].OUT_SEC_BEL[12]	GT10.RXCHARISK[4]
CELL[4].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[4]
CELL[4].OUT_SEC_BEL[14]	GT10.RXDISPERR[4]
CELL[4].OUT_SEC_BEL[15]	GT10.RXRUNDISP[4]
CELL[5].IMUX_G0_DATA[0]	GT10.TXDATA[20]
CELL[5].IMUX_G0_DATA[1]	GT10.TXDATA[52]
CELL[5].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[5]
CELL[5].IMUX_G0_DATA[3]	GT10.RXDEC8B10BUSE
CELL[5].IMUX_G0_DATA[4]	GT10.PMAREGDATAIN[0]
CELL[5].IMUX_G0_DATA[5]	GT10.PMAREGDATAIN[4]
CELL[5].IMUX_G0_DATA[6]	GT10.PMAREGADDR[0]
CELL[5].IMUX_G0_DATA[7]	GT10.PMAREGADDR[4]
CELL[5].IMUX_G1_DATA[0]	GT10.TXDATA[21]
CELL[5].IMUX_G1_DATA[1]	GT10.TXDATA[53]
CELL[5].IMUX_G1_DATA[2]	GT10.TXCHARISK[5]
CELL[5].IMUX_G1_DATA[3]	GT10.PMAREGRW
CELL[5].IMUX_G1_DATA[4]	GT10.PMAREGDATAIN[1]
CELL[5].IMUX_G1_DATA[5]	GT10.PMAREGDATAIN[5]
CELL[5].IMUX_G1_DATA[6]	GT10.PMAREGADDR[1]
CELL[5].IMUX_G1_DATA[7]	GT10.PMAREGADDR[5]
CELL[5].IMUX_G2_DATA[0]	GT10.TXDATA[22]
CELL[5].IMUX_G2_DATA[1]	GT10.TXDATA[54]
CELL[5].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[5]
CELL[5].IMUX_G2_DATA[3]	GT10.PMAREGSTROBE
CELL[5].IMUX_G2_DATA[4]	GT10.PMAREGDATAIN[2]
CELL[5].IMUX_G2_DATA[5]	GT10.PMAREGDATAIN[6]
CELL[5].IMUX_G2_DATA[6]	GT10.PMAREGADDR[2]
CELL[5].IMUX_G3_DATA[0]	GT10.TXDATA[23]
CELL[5].IMUX_G3_DATA[1]	GT10.TXDATA[55]
CELL[5].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[5]
CELL[5].IMUX_G3_DATA[4]	GT10.PMAREGDATAIN[3]
CELL[5].IMUX_G3_DATA[5]	GT10.PMAREGDATAIN[7]
CELL[5].IMUX_G3_DATA[6]	GT10.PMAREGADDR[3]
CELL[5].OUT_FAN_BEL[0]	GT10.RXDATA[20]
CELL[5].OUT_FAN_BEL[1]	GT10.RXDATA[21]
CELL[5].OUT_FAN_BEL[2]	GT10.RXDATA[22]
CELL[5].OUT_FAN_BEL[3]	GT10.RXDATA[23]
CELL[5].OUT_FAN_BEL[4]	GT10.RXDATA[52]
CELL[5].OUT_FAN_BEL[5]	GT10.RXDATA[53]
CELL[5].OUT_FAN_BEL[6]	GT10.RXDATA[54]
CELL[5].OUT_FAN_BEL[7]	GT10.RXDATA[55]
CELL[5].OUT_SEC_BEL[9]	GT10.TXKERR[5]
CELL[5].OUT_SEC_BEL[10]	GT10.TXRUNDISP[5]
CELL[5].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[5]
CELL[5].OUT_SEC_BEL[12]	GT10.RXCHARISK[5]
CELL[5].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[5]
CELL[5].OUT_SEC_BEL[14]	GT10.RXDISPERR[5]
CELL[5].OUT_SEC_BEL[15]	GT10.RXRUNDISP[5]
CELL[6].IMUX_G0_DATA[0]	GT10.TXDATA[24]
CELL[6].IMUX_G0_DATA[1]	GT10.TXDATA[56]
CELL[6].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[6]
CELL[6].IMUX_G1_DATA[0]	GT10.TXDATA[25]
CELL[6].IMUX_G1_DATA[1]	GT10.TXDATA[57]
CELL[6].IMUX_G1_DATA[2]	GT10.TXCHARISK[6]
CELL[6].IMUX_G2_DATA[0]	GT10.TXDATA[26]
CELL[6].IMUX_G2_DATA[1]	GT10.TXDATA[58]
CELL[6].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[6]
CELL[6].IMUX_G3_DATA[0]	GT10.TXDATA[27]
CELL[6].IMUX_G3_DATA[1]	GT10.TXDATA[59]
CELL[6].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[6]
CELL[6].OUT_FAN_BEL[0]	GT10.RXDATA[24]
CELL[6].OUT_FAN_BEL[1]	GT10.RXDATA[25]
CELL[6].OUT_FAN_BEL[2]	GT10.RXDATA[26]
CELL[6].OUT_FAN_BEL[3]	GT10.RXDATA[27]
CELL[6].OUT_FAN_BEL[4]	GT10.RXDATA[56]
CELL[6].OUT_FAN_BEL[5]	GT10.RXDATA[57]
CELL[6].OUT_FAN_BEL[6]	GT10.RXDATA[58]
CELL[6].OUT_FAN_BEL[7]	GT10.RXDATA[59]
CELL[6].OUT_SEC_BEL[9]	GT10.TXKERR[6]
CELL[6].OUT_SEC_BEL[10]	GT10.TXRUNDISP[6]
CELL[6].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[6]
CELL[6].OUT_SEC_BEL[12]	GT10.RXCHARISK[6]
CELL[6].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[6]
CELL[6].OUT_SEC_BEL[14]	GT10.RXDISPERR[6]
CELL[6].OUT_SEC_BEL[15]	GT10.RXRUNDISP[6]
CELL[7].IMUX_G0_DATA[0]	GT10.TXDATA[28]
CELL[7].IMUX_G0_DATA[1]	GT10.TXDATA[60]
CELL[7].IMUX_G0_DATA[2]	GT10.TXBYPASS8B10B[7]
CELL[7].IMUX_G1_DATA[0]	GT10.TXDATA[29]
CELL[7].IMUX_G1_DATA[1]	GT10.TXDATA[61]
CELL[7].IMUX_G1_DATA[2]	GT10.TXCHARISK[7]
CELL[7].IMUX_G2_DATA[0]	GT10.TXDATA[30]
CELL[7].IMUX_G2_DATA[1]	GT10.TXDATA[62]
CELL[7].IMUX_G2_DATA[2]	GT10.TXCHARDISPMODE[7]
CELL[7].IMUX_G3_DATA[0]	GT10.TXDATA[31]
CELL[7].IMUX_G3_DATA[1]	GT10.TXDATA[63]
CELL[7].IMUX_G3_DATA[2]	GT10.TXCHARDISPVAL[7]
CELL[7].OUT_FAN_BEL[0]	GT10.RXDATA[28]
CELL[7].OUT_FAN_BEL[1]	GT10.RXDATA[29]
CELL[7].OUT_FAN_BEL[2]	GT10.RXDATA[30]
CELL[7].OUT_FAN_BEL[3]	GT10.RXDATA[31]
CELL[7].OUT_FAN_BEL[4]	GT10.RXDATA[60]
CELL[7].OUT_FAN_BEL[5]	GT10.RXDATA[61]
CELL[7].OUT_FAN_BEL[6]	GT10.RXDATA[62]
CELL[7].OUT_FAN_BEL[7]	GT10.RXDATA[63]
CELL[7].OUT_SEC_BEL[8]	GT10.TXBUFERR
CELL[7].OUT_SEC_BEL[9]	GT10.TXKERR[7]
CELL[7].OUT_SEC_BEL[10]	GT10.TXRUNDISP[7]
CELL[7].OUT_SEC_BEL[11]	GT10.RXCHARISCOMMA[7]
CELL[7].OUT_SEC_BEL[12]	GT10.RXCHARISK[7]
CELL[7].OUT_SEC_BEL[13]	GT10.RXNOTINTABLE[7]
CELL[7].OUT_SEC_BEL[14]	GT10.RXDISPERR[7]
CELL[7].OUT_SEC_BEL[15]	GT10.RXRUNDISP[7]

Bitstream

virtex2 GIGABIT10_N rect MAIN_IO
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 7
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 6
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 5
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 4
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 3
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 2
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 1
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_END_OF_PKT bit 0
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 7
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 6
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 5
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 4
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 3
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 2
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 1
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_FORCE_VALUE bit 0
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_CRC_USE
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TX_BUFFER_USE
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 7
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 6
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 5
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 4
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 3
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 2
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 1
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_START_OF_PKT bit 0
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_FORMAT bit 1
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CRC_FORMAT bit 0
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[0]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 10
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 9
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 8
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 7
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 6
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 5
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 4
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 3
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 2
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 1
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_1 bit 0
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 10
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 9
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 8
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 7
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 6
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 5
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 4
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 3
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 2
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 1
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_2 bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 10
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 9
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 8
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 7
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 6
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 5
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 4
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 3
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 2
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_3 bit 0
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 10
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 9
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 8
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 6
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 5
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 4
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 3
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 2
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 1
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_4 bit 0
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_DETECT
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 9
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 8
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 7
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 6
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 5
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 4
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 3
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 2
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PCOMMA_10B_VALUE bit 0
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_DETECT
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 9
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 8
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 7
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 6
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 5
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 4
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 3
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 2
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 1
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: MCOMMA_10B_VALUE bit 0
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 9
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 8
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 7
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 6
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 5
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 4
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 3
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 2
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 1
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: COMMA_10B_MASK bit 0
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[1]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 10
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 9
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 8
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 7
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 6
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 5
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 4
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 3
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 2
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 1
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_1 bit 0
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 10
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 9
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 8
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 7
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 6
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 5
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 4
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 3
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 2
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 1
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_2 bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 10
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 9
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 8
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 7
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 6
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 5
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 4
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 3
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 2
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_3 bit 0
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 10
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 9
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 8
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 6
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 5
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 4
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 3
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 2
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 1
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_4 bit 0
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_USE
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_MCOMMA_DETECT
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_PCOMMA_DETECT
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: DEC_VALID_COMMA_ONLY
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_BUFFER_USE
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_ONE_SHOT
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 4
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 3
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 2
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 1
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_REPEAT_WAIT bit 0
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_KEEP_IDLE
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_INSERT_IDLE_FLAG
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_CORRECT_USE
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_MODE bit 1
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_MODE bit 0
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[2]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 10
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 9
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 8
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 7
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 6
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 5
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 4
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 3
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 2
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 1
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_1 bit 0
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 10
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 9
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 8
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 7
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 6
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 5
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 4
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 3
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 2
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 1
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_2 bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 10
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 9
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 8
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 7
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 6
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 5
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 4
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 3
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 2
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_3 bit 0
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 10
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 9
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 8
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 6
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 5
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 4
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 3
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 2
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 1
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_4 bit 0
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_CRC_USE
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 2
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 1
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_LEN bit 0
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 2
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 1
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_LEN bit 0
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_6
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_5
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_4
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_3
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_2
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: TEST_MODE_1
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[3]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 10
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 9
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 8
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 7
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 6
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 5
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 4
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 3
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 2
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 1
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_1 bit 0
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 10
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 9
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 8
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 7
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 6
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 5
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 4
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 3
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 2
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 1
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_2 bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 10
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 9
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 8
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 7
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 6
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 5
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 4
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 3
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 2
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_3 bit 0
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 10
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 9
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 8
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 7
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 6
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 5
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 4
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 3
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 2
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 1
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_4 bit 0
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_USE
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 7
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 4
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 3
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 2
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 1
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_LIMIT bit 0
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOSS_OF_SYNC_FSM
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 6
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 5
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 4
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 3
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 2
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 1
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_INVALID_INCR bit 0
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 7
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 6
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 5
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 4
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 3
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 2
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 1
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: RX_LOS_THRESHOLD bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[4]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 7 GT10: TXDRVEN
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 6 GT10: RXEN
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 5 GT10: TXEN
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 4 GT10: PMA_PWR_CNTRL_BIT4
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 3 GT10: RXANAEN
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 2 GT10: TXDIGEN
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 1 GT10: TXANAEN
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[15] bit 0 GT10: BIASEN
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_64B66B_SV
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_8B10B_DE
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 5
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 4
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 3
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 2
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 1
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MAX_LAT bit 0
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 5
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 4
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 3
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 2
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 1
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_MIN_LAT bit 0
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 4
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 3
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 2
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 1
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_ADJ_MAX bit 0
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 3
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 2
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 1
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_2_MASK bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 3
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 2
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 1
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CHAN_BOND_SEQ_1_MASK bit 0
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: ALIGN_COMMA_WORD bit 1
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: ALIGN_COMMA_WORD bit 0

virtex2 GIGABIT10_N rect MAIN[5]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 7 GT10: TXREG bit 1
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 6 GT10: TXREG bit 0
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 5 GT10: TXVSEL bit 1
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 4 GT10: TXVSEL bit 0
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 3 GT10: TXVCOGAIN bit 0
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 2 GT10: TXVCODAC bit 0
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 1
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[4] bit 0 GT10: TXCPI bit 0
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 7 GT10: IBOOST bit 0
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 6
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 5
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 4
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 3 GT10: TXLOOPFILTERR bit 1
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 2 GT10: TXLOOPFILTERR bit 0
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 1 GT10: TXLOOPFILTERC bit 1
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[3] bit 0 GT10: TXLOOPFILTERC bit 0
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 7 GT10: SEL_DAC_FIX bit 3
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 6 GT10: SEL_DAC_FIX bit 2
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 5 GT10: SEL_DAC_TRAN bit 3
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 4 GT10: SEL_DAC_TRAN bit 2
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 3 GT10: ENDCD bit 0
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 2 GT10: TXBUSWID bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 1 GT10: TXDIVRATIO bit 9
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[2] bit 0 GT10: TXDIVRATIO bit 8
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 7 GT10: TXDIVRATIO bit 7
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 6 GT10: TXDIVRATIO bit 6
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 5 GT10: TXDIVRATIO bit 5
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 4 GT10: TXDIVRATIO bit 4
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 3 GT10: TXDIVRATIO bit 3
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 2 GT10: TXDIVRATIO bit 2
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 1 GT10: TXDIVRATIO bit 1
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[1] bit 0 GT10: TXDIVRATIO bit 0
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 7 GT10: VCODAC bit 5
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 6 GT10: VCODAC bit 4
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 5 GT10: VCODAC bit 3
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 4 GT10: VCODAC bit 2
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 3 GT10: VCODAC bit 1
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 2 GT10: VCODAC bit 0
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 1 GT10: MASTERBIAS bit 1
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[0] bit 0 GT10: MASTERBIAS bit 0
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_DROP
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 3
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 2
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 1
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_2_MASK bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 3
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 2
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 1
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: CLK_COR_SEQ_1_MASK bit 0
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex2 GIGABIT10_N rect MAIN[6]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 7 GT10: PMA_REG_0E bit 7
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 6 GT10: PMA_REG_0E bit 6
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 5 GT10: PMA_REG_0E bit 5
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 4 GT10: PMA_REG_0E bit 4
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 3 GT10: PMA_REG_0E bit 3
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 2 GT10: PMA_REG_0E bit 2
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 1 GT10: PMA_REG_0E bit 1
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[14] bit 0 GT10: PMA_REG_0E bit 0
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 7 GT10: RXFER bit 9
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 6 GT10: RXFER bit 8
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 5 GT10: RXFER bit 7
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 4 GT10: RXFER bit 6
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 3 GT10: RXFER bit 5
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 2 GT10: RXFER bit 4
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 1 GT10: RXFER bit 3
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[13] bit 0 GT10: RXFER bit 2
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 7 GT10: RXFER bit 1
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 6 GT10: RXFER bit 0
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 5 GT10: RXFLCPI bit 1
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 4 GT10: RXFLCPI bit 0
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 3 GT10: RXFEI bit 1
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 2 GT10: RXFEI bit 0
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 1 GT10: VSELAFE bit 1
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[12] bit 0 GT10: VSELAFE bit 0
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 7 GT10: RXCPI bit 1
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 6 GT10: RXVSELCP bit 1
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 5 GT10: RXVSELCP bit 0
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 4 GT10: RXFLTCPT bit 4
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 3 GT10: RXFLTCPT bit 3
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 2 GT10: RXFLTCPT bit 2
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 1 GT10: RXFLTCPT bit 1
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[11] bit 0 GT10: RXFLTCPT bit 0
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 7 GT10: RXREG bit 1
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 6 GT10: RXREG bit 0
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 5 GT10: RXVSEL bit 1
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 4 GT10: RXVSEL bit 0
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 3 GT10: RXVCOGAIN bit 0
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 2 GT10: RXVCODAC bit 0
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 1 GT10: RXCPI bit 0
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[10] bit 0 GT10: RXVCOSW bit 0
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 7 GT10: SEL_DAC_FIX bit 1
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 6 GT10: SEL_DAC_FIX bit 0
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 5 GT10: AFE_FLAT_ENABLE bit 0
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 4 GT10: RXLOOPFILTERR bit 2
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 3 GT10: RXLOOPFILTERR bit 1
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 2 GT10: RXLOOPFILTERR bit 0
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 1 GT10: RXLOOPFILTERC bit 1
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[9] bit 0 GT10: RXLOOPFILTERC bit 0
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 7 GT10: SEL_DAC_TRAN bit 1
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 6 GT10: SEL_DAC_TRAN bit 0
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 5 GT10: RXDIVRATIO bit 13
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 4 GT10: RXDIVRATIO bit 12
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 3 GT10: RXDIVRATIO bit 11
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 2 GT10: RXDIVRATIO bit 10
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 1 GT10: RXDIVRATIO bit 9
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[8] bit 0 GT10: RXDIVRATIO bit 8
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 7 GT10: RXDIVRATIO bit 7
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 6 GT10: RXDIVRATIO bit 6
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 5 GT10: RXDIVRATIO bit 5
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 4 GT10: RXDIVRATIO bit 4
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 3 GT10: RXDIVRATIO bit 3
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 2 GT10: RXDIVRATIO bit 2
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 1 GT10: RXDIVRATIO bit 1
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[7] bit 0 GT10: RXDIVRATIO bit 0
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 7
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 6
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 5 GT10: TXANASW bit 0
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 4 GT10: TXDIGSW bit 0
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 3 GT10: TXEMPHLEVEL bit 3
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 2 GT10: TXEMPHLEVEL bit 2
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 1 GT10: TXEMPHLEVEL bit 1
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[6] bit 0 GT10: TXEMPHLEVEL bit 0
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 7
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 6 GT10: SLEW bit 0
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 5 GT10: EMPOFF bit 0
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 4 GT10: PRDRVOFF bit 0
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 2 GT10: TXDOWNLEVEL bit 2
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 1 GT10: TXDOWNLEVEL bit 1
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 0 GT10: TXDOWNLEVEL bit 0

virtex2 GIGABIT10_N rect MAIN[7]
Bit	Frame
Bit	F21	F20	F19	F18	F17	F16	F15	F14	F13	F12	F11	F10	F9	F8	F7	F6	F5	F4	F3	F2	F1	F0
B79	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B78	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B77	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B76	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B75	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B74	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B73	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B72	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B71	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B70	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B69	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B68	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B67	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B66	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B65	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B64	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 7
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 6
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 5
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 4
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 3
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 2
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 1
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_INVALID_CNT_MAX bit 0
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 7
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 6
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 5
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 4
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 3
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 2
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 1
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: SH_CNT_MAX bit 0
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GT10: PMA_REG[5] bit 3 GT10: TXDOWNLEVEL bit 3
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

`PMA_SPEED` values

Table GT10_PMA_SPEED

virtex2 table GT10_PMA_SPEED
Row	MASTERBIAS	VCODAC	TXDIVRATIO	TXBUSWID	ENDCD	SEL_DAC_TRAN	SEL_DAC_FIX	TXLOOPFILTERC	TXLOOPFILTERR	IBOOST	TXCPI	TXVCODAC	TXVCOGAIN	TXVSEL	TXREG	TXDOWNLEVEL	PRDRVOFF	EMPOFF	SLEW	TXEMPHLEVEL	TXDIGSW	TXANASW	RXDIVRATIO	RXLOOPFILTERC	RXLOOPFILTERR	AFE_FLAT_ENABLE	RXVCOSW	RXCPI	RXVCODAC	RXVCOGAIN	RXVSEL	RXREG	RXFLTCPT	RXVSELCP	VSELAFE	RXFEI	RXFLCPI	RXFER	PMA_REG_0E
_0_32	0b00	0b011010	0b0101000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_0_64	0b00	0b011010	0b0101000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_1_32	0b00	0b011010	0b0101000001	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_1_64	0b00	0b011010	0b0101000001	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_2_32	0b00	0b011010	0b0101000100	0b1	0b1	0b0000	0b0000	0b10	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_2_64	0b00	0b011010	0b0101000100	0b1	0b1	0b0000	0b0000	0b10	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_3_32	0b00	0b011010	0b0101000101	0b1	0b1	0b0000	0b0000	0b10	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010101	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_3_64	0b00	0b011010	0b0101000101	0b1	0b1	0b0000	0b0000	0b10	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010101	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_4_32	0b00	0b011010	0b0101001000	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_4_64	0b00	0b011010	0b0101001000	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_5_32	0b00	0b011010	0b0101001001	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_5_64	0b00	0b011010	0b0101001001	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_6_32	0b00	0b011010	0b0101000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_6_64	0b00	0b011010	0b0101000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_7_32	0b00	0b011010	0b0101000001	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_7_64	0b00	0b011010	0b0101000001	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_8_32	0b00	0b011010	0b0101000100	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_8_64	0b00	0b011010	0b0101000100	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_9_32	0b00	0b011010	0b0101000101	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010101	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_9_64	0b00	0b011010	0b0101000101	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011010101	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_10_32	0b00	0b011010	0b0101001000	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_10_64	0b00	0b011010	0b0101001000	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_11_32	0b00	0b011010	0b0101001001	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_11_64	0b00	0b011010	0b0101001001	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011011001	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_12_40	0b00	0b011010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00011011100010	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_12_80	0b00	0b011010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00011011100010	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_13_40	0b00	0b011010	0b0110100110	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b1	0b0	0b0010	0b1	0b0	0b00011011100110	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_13_80	0b00	0b011010	0b0110100110	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b1	0b0	0b0010	0b1	0b0	0b00011011100110	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_14_40	0b00	0b011010	0b0110101010	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00011011101010	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_14_80	0b00	0b011010	0b0110101010	0b1	0b1	0b0000	0b0000	0b10	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00011011101010	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_15_32	0b00	0b011010	0b0100000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011000000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_15_64	0b00	0b011010	0b0100000000	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011000000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_16_32	0b00	0b011010	0b0100000100	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011000100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_16_64	0b00	0b011010	0b0100000100	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011000100	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_17_32	0b00	0b011010	0b0100001000	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011001000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_17_64	0b00	0b011010	0b0100001000	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b0	0b0	0b00010011001000	0b01	0b101	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10100	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_18_40	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b01	0b100	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_18_80	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b01	0b100	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_19_40	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b01	0b100	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_19_80	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b01	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b01	0b100	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_20_40	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_20_80	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_21_40	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_21_80	0b00	0b001010	0b0110100010	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100010	0b11	0b011	0b0	0b0	0b01	0b0	0b0	0b00	0b11	0b10000	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_22_40	0b00	0b001010	0b0110100110	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100110	0b01	0b011	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_22_80	0b00	0b001010	0b0110100110	0b1	0b1	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b11	0b1000	0b0	0b0	0b0	0b0010	0b1	0b0	0b00011011100110	0b01	0b011	0b0	0b0	0b01	0b0	0b1	0b00	0b11	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_23_10	0b00	0b001010	0b0010100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000100110	0b01	0b000	0b0	0b1	0b01	0b0	0b1	0b00	0b00	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_23_20	0b00	0b001010	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b01	0b000	0b0	0b1	0b01	0b0	0b1	0b00	0b00	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_23_40	0b00	0b001010	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b01	0b000	0b0	0b1	0b01	0b0	0b1	0b00	0b00	0b10000	0b10	0b01	0b11	0b00	0b1111111111	0b00000000
_24_10	0b00	0b001010	0b0010100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_24_20	0b00	0b001010	0b0110100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_24_40	0b00	0b001010	0b0110100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_25_10	0b00	0b001010	0b0010100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_25_20	0b00	0b001010	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_25_40	0b00	0b001010	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_26_10	0b00	0b001010	0b0010101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_26_20	0b00	0b001010	0b0110101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_26_40	0b00	0b001010	0b0110101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_27_10	0b00	0b001000	0b0010100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_27_20	0b00	0b001000	0b0110100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_27_40	0b00	0b001000	0b0110100010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_28_10	0b00	0b001000	0b0010100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_28_20	0b00	0b001000	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_28_40	0b00	0b001000	0b0110100110	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001100110	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_29_10	0b00	0b001000	0b0010101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001000101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_29_20	0b00	0b001000	0b0110101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_29_40	0b00	0b001000	0b0110101010	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11001001101010	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_30_8	0b00	0b001000	0b0000000100	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000000000100	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_30_16	0b00	0b001000	0b0100000100	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000001000100	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_30_32	0b00	0b001000	0b0100000100	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000001000100	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_31_8	0b00	0b001000	0b0000001000	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000000001000	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_31_16	0b00	0b001000	0b0100001000	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000001001000	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111
_31_32	0b00	0b001000	0b0100001000	0b1	0b0	0b0000	0b0000	0b01	0b00	0b0	0b1	0b0	0b1	0b00	0b00	0b1000	0b0	0b1	0b1	0b0000	0b1	0b1	0b11000001001000	0b11	0b011	0b0	0b1	0b01	0b0	0b0	0b00	0b00	0b10100	0b01	0b01	0b11	0b10	0b1111110000	0b11111111

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