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Interface tiles

All of these tiles share their bitstream tiles with the corresponding INT tile.

Tile INTF.PPC

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.PPC INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.PPC bittile 0
BitFrame
0 1 2 3
40 - - - INTF_TESTMUX:TEST_ENABLE
39 - - - -
38 - - - -
37 - - - -
36 - - - -
35 - - - -
34 - - - -
33 - - - -
32 - - - -
31 - - - -
30 - - - -
29 - - - -
28 - - - -
27 - - - -
26 - - - -
25 - - - -
24 - - - -
23 - - - -
22 - - - -
21 - - - -
20 - - - -
19 - - - -
18 - - - -
17 - - - -
16 - - - -
15 - - - -
14 - - - -
13 - - - -
12 - - - -
11 - - - -
10 - - - -
9 - - - -
8 - - - -
7 - - - -
6 - - - -
5 - - - -
4 - - - -
3 - - - -
2 - - - -
1 - - - -
0 - - - -
INTF_TESTMUX:TEST_ENABLE 0.3.40
non-inverted [0]

Tile INTF.GT.B0

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.B0 INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.B0 bittile 0
BitFrame
0 1 2 3
35 - - - INTF_TESTMUX:TEST_ENABLE
34 - - - -
33 - - - -
32 - - - -
31 - - - -
30 - - - -
29 - - - -
28 - - - -
27 - - - -
26 - - - -
25 - - - -
24 - - - -
23 - - - -
22 - - - -
21 - - - -
20 - - - -
19 - - - -
18 - - - -
17 - - - -
16 - - - -
15 - - - -
14 - - - -
13 - - - -
12 - - - -
11 - - - -
10 - - - -
9 - - - -
8 - - - -
7 - - - -
6 - - - -
5 - - - -
4 - - - -
3 - - - -
2 - - - -
1 - - - -
0 - - - -
INTF_TESTMUX:TEST_ENABLE 0.3.35
non-inverted [0]

Tile INTF.GT.B123

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.B123 INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.B123 bittile 0
BitFrame
0 1 2 3
3 - - - INTF_TESTMUX:TEST_ENABLE
2 - - - -
1 - - - -
0 - - - -
INTF_TESTMUX:TEST_ENABLE 0.3.3
non-inverted [0]

Tile INTF.GT.BCLKPAD

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.BCLKPAD INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.BCLKPAD bittile 0
BitFrame
0 1 2 3
34 - - - INTF_TESTMUX:TEST_ENABLE
33 - - - -
32 - - - -
31 - - - -
30 - - - -
29 - - - -
28 - - - -
27 - - - -
26 - - - -
25 - - - -
24 - - - -
23 - - - -
22 - - - -
21 - - - -
20 - - - -
19 - - - -
18 - - - -
17 - - - -
16 - - - -
15 - - - -
14 - - - -
13 - - - -
12 - - - -
11 - - - -
10 - - - -
9 - - - -
8 - - - -
7 - - - -
6 - - - -
5 - - - -
4 - - - -
3 - - - -
2 - - - -
1 - - - -
0 - - - -
INTF_TESTMUX:TEST_ENABLE 0.3.34
non-inverted [0]

Tile INTF.GT.T0

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.T0 INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.T0 bittile 0
BitFrame
0
35 INTF_TESTMUX:TEST_ENABLE
34 -
33 -
32 -
31 -
30 -
29 -
28 -
27 -
26 -
25 -
24 -
23 -
22 -
21 -
20 -
19 -
18 -
17 -
16 -
15 -
14 -
13 -
12 -
11 -
10 -
9 -
8 -
7 -
6 -
5 -
4 -
3 -
2 -
1 -
0 -
INTF_TESTMUX:TEST_ENABLE 0.0.35
non-inverted [0]

Tile INTF.GT.T123

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.T123 INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.T123 bittile 0
BitFrame
0
3 INTF_TESTMUX:TEST_ENABLE
2 -
1 -
0 -
INTF_TESTMUX:TEST_ENABLE 0.0.3
non-inverted [0]

Tile INTF.GT.TCLKPAD

Cells: 1

Test mux INTF_TESTMUX

virtex2 INTF.GT.TCLKPAD INTF_TESTMUX mux
DestinationPrimary sourceTest sources
OUT.FAN0OUT.FAN0.TMINIMUX.G0.DATA4
OUT.FAN1OUT.FAN1.TMINIMUX.G1.DATA4
OUT.FAN2OUT.FAN2.TMINIMUX.G2.DATA4
OUT.FAN3OUT.FAN3.TMINIMUX.G3.DATA4
OUT.FAN4OUT.FAN4.TMINIMUX.G0.DATA5
OUT.FAN5OUT.FAN5.TMINIMUX.G1.DATA5
OUT.FAN6OUT.FAN6.TMINIMUX.G2.DATA5
OUT.FAN7OUT.FAN7.TMINIMUX.G3.DATA5
OUT.SEC8OUT.SEC8.TMINIMUX.G3.DATA7
OUT.SEC9OUT.SEC9.TMINIMUX.G2.DATA7
OUT.SEC10OUT.SEC10.TMINIMUX.G1.DATA7
OUT.SEC11OUT.SEC11.TMINIMUX.G0.DATA7
OUT.SEC12OUT.SEC12.TMINIMUX.G3.DATA6
OUT.SEC13OUT.SEC13.TMINIMUX.G2.DATA6
OUT.SEC14OUT.SEC14.TMINIMUX.G1.DATA6
OUT.SEC15OUT.SEC15.TMINIMUX.G0.DATA6

Bitstream

virtex2 INTF.GT.TCLKPAD bittile 0
BitFrame
0
34 INTF_TESTMUX:TEST_ENABLE
33 -
32 -
31 -
30 -
29 -
28 -
27 -
26 -
25 -
24 -
23 -
22 -
21 -
20 -
19 -
18 -
17 -
16 -
15 -
14 -
13 -
12 -
11 -
10 -
9 -
8 -
7 -
6 -
5 -
4 -
3 -
2 -
1 -
0 -
INTF_TESTMUX:TEST_ENABLE 0.0.34
non-inverted [0]