PowerPC 405
TODO: reverse, document
Tile LBPPC
Cells: 48 IRIs: 0
Bel PPC405
| Pin | Direction | Wires |
|---|---|---|
| APUC405DCDAPUOP | input | TCELL0:IMUX.G0.DATA0 |
| APUC405DCDCREN | input | TCELL0:IMUX.G1.DATA0 |
| APUC405DCDFORCEALGN | input | TCELL0:IMUX.G2.DATA0 |
| APUC405DCDFORCEBESTEERING | input | TCELL0:IMUX.G3.DATA0 |
| APUC405DCDFPUOP | input | TCELL1:IMUX.G0.DATA0 |
| APUC405DCDGPRWRITE | input | TCELL1:IMUX.G1.DATA0 |
| APUC405DCDLDSTBYTE | input | TCELL1:IMUX.G2.DATA0 |
| APUC405DCDLDSTDW | input | TCELL1:IMUX.G3.DATA0 |
| APUC405DCDLDSTHW | input | TCELL2:IMUX.G0.DATA0 |
| APUC405DCDLDSTQW | input | TCELL2:IMUX.G1.DATA0 |
| APUC405DCDLDSTWD | input | TCELL2:IMUX.G2.DATA0 |
| APUC405DCDLOAD | input | TCELL2:IMUX.G3.DATA0 |
| APUC405DCDPRIVOP | input | TCELL3:IMUX.G0.DATA0 |
| APUC405DCDRAEN | input | TCELL3:IMUX.G1.DATA0 |
| APUC405DCDRBEN | input | TCELL3:IMUX.G2.DATA0 |
| APUC405DCDSTORE | input | TCELL3:IMUX.G3.DATA0 |
| APUC405DCDTRAPBE | input | TCELL4:IMUX.G0.DATA0 |
| APUC405DCDTRAPLE | input | TCELL4:IMUX.G1.DATA0 |
| APUC405DCDUPDATE | input | TCELL5:IMUX.G0.DATA0 |
| APUC405DCDVALIDOP | input | TCELL5:IMUX.G1.DATA0 |
| APUC405DCDXERCAEN | input | TCELL6:IMUX.G0.DATA0 |
| APUC405DCDXEROVEN | input | TCELL6:IMUX.G1.DATA0 |
| APUC405EXCEPTION | input | TCELL7:IMUX.G0.DATA0 |
| APUC405EXEBLOCKINGMCO | input | TCELL7:IMUX.G1.DATA0 |
| APUC405EXEBUSY | input | TCELL8:IMUX.G0.DATA0 |
| APUC405EXECR0 | input | TCELL8:IMUX.G1.DATA0 |
| APUC405EXECR1 | input | TCELL8:IMUX.G2.DATA0 |
| APUC405EXECR2 | input | TCELL9:IMUX.G0.DATA0 |
| APUC405EXECR3 | input | TCELL9:IMUX.G1.DATA0 |
| APUC405EXECRFIELD0 | input | TCELL9:IMUX.G2.DATA0 |
| APUC405EXECRFIELD1 | input | TCELL9:IMUX.G3.DATA0 |
| APUC405EXECRFIELD2 | input | TCELL10:IMUX.G0.DATA0 |
| APUC405EXELDDEPEND | input | TCELL10:IMUX.G1.DATA0 |
| APUC405EXENONBLOCKINGMCO | input | TCELL10:IMUX.G2.DATA0 |
| APUC405EXERESULT0 | input | TCELL10:IMUX.G3.DATA0 |
| APUC405EXERESULT1 | input | TCELL11:IMUX.G0.DATA0 |
| APUC405EXERESULT10 | input | TCELL13:IMUX.G1.DATA0 |
| APUC405EXERESULT11 | input | TCELL13:IMUX.G2.DATA0 |
| APUC405EXERESULT12 | input | TCELL13:IMUX.G3.DATA0 |
| APUC405EXERESULT13 | input | TCELL14:IMUX.G0.DATA0 |
| APUC405EXERESULT14 | input | TCELL14:IMUX.G1.DATA0 |
| APUC405EXERESULT15 | input | TCELL14:IMUX.G2.DATA0 |
| APUC405EXERESULT16 | input | TCELL14:IMUX.G3.DATA0 |
| APUC405EXERESULT17 | input | TCELL15:IMUX.G0.DATA0 |
| APUC405EXERESULT18 | input | TCELL15:IMUX.G1.DATA0 |
| APUC405EXERESULT19 | input | TCELL15:IMUX.G2.DATA0 |
| APUC405EXERESULT2 | input | TCELL11:IMUX.G1.DATA0 |
| APUC405EXERESULT20 | input | TCELL15:IMUX.G3.DATA0 |
| APUC405EXERESULT21 | input | TCELL0:IMUX.G0.DATA1 |
| APUC405EXERESULT22 | input | TCELL0:IMUX.G1.DATA1 |
| APUC405EXERESULT23 | input | TCELL1:IMUX.G0.DATA1 |
| APUC405EXERESULT24 | input | TCELL1:IMUX.G1.DATA1 |
| APUC405EXERESULT25 | input | TCELL2:IMUX.G0.DATA1 |
| APUC405EXERESULT26 | input | TCELL2:IMUX.G1.DATA1 |
| APUC405EXERESULT27 | input | TCELL3:IMUX.G0.DATA1 |
| APUC405EXERESULT28 | input | TCELL3:IMUX.G1.DATA1 |
| APUC405EXERESULT29 | input | TCELL4:IMUX.G2.DATA0 |
| APUC405EXERESULT3 | input | TCELL11:IMUX.G2.DATA0 |
| APUC405EXERESULT30 | input | TCELL4:IMUX.G3.DATA0 |
| APUC405EXERESULT31 | input | TCELL5:IMUX.G2.DATA0 |
| APUC405EXERESULT4 | input | TCELL11:IMUX.G3.DATA0 |
| APUC405EXERESULT5 | input | TCELL12:IMUX.G0.DATA0 |
| APUC405EXERESULT6 | input | TCELL12:IMUX.G1.DATA0 |
| APUC405EXERESULT7 | input | TCELL12:IMUX.G2.DATA0 |
| APUC405EXERESULT8 | input | TCELL12:IMUX.G3.DATA0 |
| APUC405EXERESULT9 | input | TCELL13:IMUX.G0.DATA0 |
| APUC405EXEXERCA | input | TCELL5:IMUX.G3.DATA0 |
| APUC405EXEXEROV | input | TCELL6:IMUX.G2.DATA0 |
| APUC405FPUEXCEPTION | input | TCELL6:IMUX.G3.DATA0 |
| APUC405LWBLDDEPEND | input | TCELL7:IMUX.G2.DATA0 |
| APUC405SLEEPREQ | input | TCELL7:IMUX.G3.DATA0 |
| APUC405WBLDDEPEND | input | TCELL8:IMUX.G3.DATA0 |
| BRAMDSOCMCLK | input | TCELL43:IMUX.CLK0 |
| BRAMDSOCMRDDACK | input | TCELL42:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS0 | input | TCELL40:IMUX.G0.DATA0 |
| BRAMDSOCMRDDBUS1 | input | TCELL40:IMUX.G1.DATA0 |
| BRAMDSOCMRDDBUS10 | input | TCELL40:IMUX.G2.DATA2 |
| BRAMDSOCMRDDBUS11 | input | TCELL40:IMUX.G3.DATA2 |
| BRAMDSOCMRDDBUS12 | input | TCELL40:IMUX.G0.DATA3 |
| BRAMDSOCMRDDBUS13 | input | TCELL40:IMUX.G1.DATA3 |
| BRAMDSOCMRDDBUS14 | input | TCELL40:IMUX.G2.DATA3 |
| BRAMDSOCMRDDBUS15 | input | TCELL40:IMUX.G3.DATA3 |
| BRAMDSOCMRDDBUS16 | input | TCELL47:IMUX.G0.DATA0 |
| BRAMDSOCMRDDBUS17 | input | TCELL47:IMUX.G1.DATA0 |
| BRAMDSOCMRDDBUS18 | input | TCELL47:IMUX.G2.DATA0 |
| BRAMDSOCMRDDBUS19 | input | TCELL47:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS2 | input | TCELL40:IMUX.G2.DATA0 |
| BRAMDSOCMRDDBUS20 | input | TCELL47:IMUX.G0.DATA1 |
| BRAMDSOCMRDDBUS21 | input | TCELL47:IMUX.G1.DATA1 |
| BRAMDSOCMRDDBUS22 | input | TCELL47:IMUX.G2.DATA1 |
| BRAMDSOCMRDDBUS23 | input | TCELL47:IMUX.G3.DATA1 |
| BRAMDSOCMRDDBUS24 | input | TCELL47:IMUX.G0.DATA2 |
| BRAMDSOCMRDDBUS25 | input | TCELL47:IMUX.G1.DATA2 |
| BRAMDSOCMRDDBUS26 | input | TCELL47:IMUX.G2.DATA2 |
| BRAMDSOCMRDDBUS27 | input | TCELL47:IMUX.G3.DATA2 |
| BRAMDSOCMRDDBUS28 | input | TCELL47:IMUX.G0.DATA3 |
| BRAMDSOCMRDDBUS29 | input | TCELL47:IMUX.G1.DATA3 |
| BRAMDSOCMRDDBUS3 | input | TCELL40:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS30 | input | TCELL47:IMUX.G2.DATA3 |
| BRAMDSOCMRDDBUS31 | input | TCELL47:IMUX.G3.DATA3 |
| BRAMDSOCMRDDBUS4 | input | TCELL40:IMUX.G0.DATA1 |
| BRAMDSOCMRDDBUS5 | input | TCELL40:IMUX.G1.DATA1 |
| BRAMDSOCMRDDBUS6 | input | TCELL40:IMUX.G2.DATA1 |
| BRAMDSOCMRDDBUS7 | input | TCELL40:IMUX.G3.DATA1 |
| BRAMDSOCMRDDBUS8 | input | TCELL40:IMUX.G0.DATA2 |
| BRAMDSOCMRDDBUS9 | input | TCELL40:IMUX.G1.DATA2 |
| BRAMISOCMCLK | input | TCELL36:IMUX.CLK0 |
| BRAMISOCMRDDACK | input | TCELL36:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS0 | input | TCELL32:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS1 | input | TCELL32:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS10 | input | TCELL32:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS11 | input | TCELL32:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS12 | input | TCELL32:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS13 | input | TCELL32:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS14 | input | TCELL32:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS15 | input | TCELL32:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS16 | input | TCELL33:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS17 | input | TCELL33:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS18 | input | TCELL33:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS19 | input | TCELL33:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS2 | input | TCELL32:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS20 | input | TCELL33:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS21 | input | TCELL33:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS22 | input | TCELL33:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS23 | input | TCELL33:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS24 | input | TCELL33:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS25 | input | TCELL33:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS26 | input | TCELL33:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS27 | input | TCELL33:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS28 | input | TCELL33:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS29 | input | TCELL33:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS3 | input | TCELL32:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS30 | input | TCELL33:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS31 | input | TCELL33:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS32 | input | TCELL38:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS33 | input | TCELL38:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS34 | input | TCELL38:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS35 | input | TCELL38:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS36 | input | TCELL38:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS37 | input | TCELL38:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS38 | input | TCELL38:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS39 | input | TCELL38:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS4 | input | TCELL32:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS40 | input | TCELL38:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS41 | input | TCELL38:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS42 | input | TCELL38:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS43 | input | TCELL38:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS44 | input | TCELL38:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS45 | input | TCELL38:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS46 | input | TCELL38:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS47 | input | TCELL38:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS48 | input | TCELL39:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS49 | input | TCELL39:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS5 | input | TCELL32:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS50 | input | TCELL39:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS51 | input | TCELL39:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS52 | input | TCELL39:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS53 | input | TCELL39:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS54 | input | TCELL39:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS55 | input | TCELL39:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS56 | input | TCELL39:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS57 | input | TCELL39:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS58 | input | TCELL39:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS59 | input | TCELL39:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS6 | input | TCELL32:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS60 | input | TCELL39:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS61 | input | TCELL39:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS62 | input | TCELL39:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS63 | input | TCELL39:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS7 | input | TCELL32:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS8 | input | TCELL32:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS9 | input | TCELL32:IMUX.G1.DATA2 |
| C405APUDCDFULL | output | TCELL0:OUT.FAN0 |
| C405APUDCDHOLD | output | TCELL0:OUT.FAN1 |
| C405APUDCDINSTRUCTION0 | output | TCELL0:OUT.FAN2 |
| C405APUDCDINSTRUCTION1 | output | TCELL0:OUT.FAN3 |
| C405APUDCDINSTRUCTION10 | output | TCELL3:OUT.FAN0 |
| C405APUDCDINSTRUCTION11 | output | TCELL3:OUT.FAN1 |
| C405APUDCDINSTRUCTION12 | output | TCELL3:OUT.FAN2 |
| C405APUDCDINSTRUCTION13 | output | TCELL3:OUT.FAN3 |
| C405APUDCDINSTRUCTION14 | output | TCELL4:OUT.FAN0 |
| C405APUDCDINSTRUCTION15 | output | TCELL4:OUT.FAN1 |
| C405APUDCDINSTRUCTION16 | output | TCELL4:OUT.FAN2 |
| C405APUDCDINSTRUCTION17 | output | TCELL4:OUT.FAN3 |
| C405APUDCDINSTRUCTION18 | output | TCELL5:OUT.FAN0 |
| C405APUDCDINSTRUCTION19 | output | TCELL5:OUT.FAN1 |
| C405APUDCDINSTRUCTION2 | output | TCELL1:OUT.FAN0 |
| C405APUDCDINSTRUCTION20 | output | TCELL5:OUT.FAN2 |
| C405APUDCDINSTRUCTION21 | output | TCELL5:OUT.FAN3 |
| C405APUDCDINSTRUCTION22 | output | TCELL6:OUT.FAN0 |
| C405APUDCDINSTRUCTION23 | output | TCELL6:OUT.FAN1 |
| C405APUDCDINSTRUCTION24 | output | TCELL6:OUT.FAN2 |
| C405APUDCDINSTRUCTION25 | output | TCELL6:OUT.FAN3 |
| C405APUDCDINSTRUCTION26 | output | TCELL7:OUT.FAN0 |
| C405APUDCDINSTRUCTION27 | output | TCELL7:OUT.FAN1 |
| C405APUDCDINSTRUCTION28 | output | TCELL7:OUT.FAN2 |
| C405APUDCDINSTRUCTION29 | output | TCELL7:OUT.FAN3 |
| C405APUDCDINSTRUCTION3 | output | TCELL1:OUT.FAN1 |
| C405APUDCDINSTRUCTION30 | output | TCELL8:OUT.FAN0 |
| C405APUDCDINSTRUCTION31 | output | TCELL8:OUT.FAN1 |
| C405APUDCDINSTRUCTION4 | output | TCELL1:OUT.FAN2 |
| C405APUDCDINSTRUCTION5 | output | TCELL1:OUT.FAN3 |
| C405APUDCDINSTRUCTION6 | output | TCELL2:OUT.FAN0 |
| C405APUDCDINSTRUCTION7 | output | TCELL2:OUT.FAN1 |
| C405APUDCDINSTRUCTION8 | output | TCELL2:OUT.FAN2 |
| C405APUDCDINSTRUCTION9 | output | TCELL2:OUT.FAN3 |
| C405APUEXEFLUSH | output | TCELL8:OUT.FAN2 |
| C405APUEXEHOLD | output | TCELL8:OUT.FAN3 |
| C405APUEXELOADDBUS0 | output | TCELL9:OUT.FAN0 |
| C405APUEXELOADDBUS1 | output | TCELL9:OUT.FAN1 |
| C405APUEXELOADDBUS10 | output | TCELL11:OUT.FAN2 |
| C405APUEXELOADDBUS11 | output | TCELL11:OUT.FAN3 |
| C405APUEXELOADDBUS12 | output | TCELL12:OUT.FAN0 |
| C405APUEXELOADDBUS13 | output | TCELL12:OUT.FAN1 |
| C405APUEXELOADDBUS14 | output | TCELL12:OUT.FAN2 |
| C405APUEXELOADDBUS15 | output | TCELL12:OUT.FAN3 |
| C405APUEXELOADDBUS16 | output | TCELL13:OUT.FAN0 |
| C405APUEXELOADDBUS17 | output | TCELL13:OUT.FAN1 |
| C405APUEXELOADDBUS18 | output | TCELL13:OUT.FAN2 |
| C405APUEXELOADDBUS19 | output | TCELL13:OUT.FAN3 |
| C405APUEXELOADDBUS2 | output | TCELL9:OUT.FAN2 |
| C405APUEXELOADDBUS20 | output | TCELL14:OUT.FAN0 |
| C405APUEXELOADDBUS21 | output | TCELL14:OUT.FAN1 |
| C405APUEXELOADDBUS22 | output | TCELL14:OUT.FAN2 |
| C405APUEXELOADDBUS23 | output | TCELL14:OUT.FAN3 |
| C405APUEXELOADDBUS24 | output | TCELL15:OUT.FAN0 |
| C405APUEXELOADDBUS25 | output | TCELL15:OUT.FAN1 |
| C405APUEXELOADDBUS26 | output | TCELL15:OUT.FAN2 |
| C405APUEXELOADDBUS27 | output | TCELL15:OUT.FAN3 |
| C405APUEXELOADDBUS28 | output | TCELL0:OUT.FAN4 |
| C405APUEXELOADDBUS29 | output | TCELL0:OUT.FAN5 |
| C405APUEXELOADDBUS3 | output | TCELL9:OUT.FAN3 |
| C405APUEXELOADDBUS30 | output | TCELL1:OUT.FAN4 |
| C405APUEXELOADDBUS31 | output | TCELL1:OUT.FAN5 |
| C405APUEXELOADDBUS4 | output | TCELL10:OUT.FAN0 |
| C405APUEXELOADDBUS5 | output | TCELL10:OUT.FAN1 |
| C405APUEXELOADDBUS6 | output | TCELL10:OUT.FAN2 |
| C405APUEXELOADDBUS7 | output | TCELL10:OUT.FAN3 |
| C405APUEXELOADDBUS8 | output | TCELL11:OUT.FAN0 |
| C405APUEXELOADDBUS9 | output | TCELL11:OUT.FAN1 |
| C405APUEXELOADDVALID | output | TCELL2:OUT.FAN4 |
| C405APUEXERADATA0 | output | TCELL2:OUT.FAN5 |
| C405APUEXERADATA1 | output | TCELL3:OUT.FAN4 |
| C405APUEXERADATA10 | output | TCELL7:OUT.FAN5 |
| C405APUEXERADATA11 | output | TCELL8:OUT.FAN4 |
| C405APUEXERADATA12 | output | TCELL8:OUT.FAN5 |
| C405APUEXERADATA13 | output | TCELL9:OUT.FAN4 |
| C405APUEXERADATA14 | output | TCELL9:OUT.FAN5 |
| C405APUEXERADATA15 | output | TCELL10:OUT.FAN4 |
| C405APUEXERADATA16 | output | TCELL10:OUT.FAN5 |
| C405APUEXERADATA17 | output | TCELL11:OUT.FAN4 |
| C405APUEXERADATA18 | output | TCELL11:OUT.FAN5 |
| C405APUEXERADATA19 | output | TCELL12:OUT.FAN4 |
| C405APUEXERADATA2 | output | TCELL3:OUT.FAN5 |
| C405APUEXERADATA20 | output | TCELL12:OUT.FAN5 |
| C405APUEXERADATA21 | output | TCELL13:OUT.FAN4 |
| C405APUEXERADATA22 | output | TCELL13:OUT.FAN5 |
| C405APUEXERADATA23 | output | TCELL14:OUT.FAN4 |
| C405APUEXERADATA24 | output | TCELL14:OUT.FAN5 |
| C405APUEXERADATA25 | output | TCELL15:OUT.FAN4 |
| C405APUEXERADATA26 | output | TCELL15:OUT.FAN5 |
| C405APUEXERADATA27 | output | TCELL0:OUT.FAN6 |
| C405APUEXERADATA28 | output | TCELL0:OUT.FAN7 |
| C405APUEXERADATA29 | output | TCELL1:OUT.FAN6 |
| C405APUEXERADATA3 | output | TCELL4:OUT.FAN4 |
| C405APUEXERADATA30 | output | TCELL1:OUT.FAN7 |
| C405APUEXERADATA31 | output | TCELL2:OUT.FAN6 |
| C405APUEXERADATA4 | output | TCELL4:OUT.FAN5 |
| C405APUEXERADATA5 | output | TCELL5:OUT.FAN4 |
| C405APUEXERADATA6 | output | TCELL5:OUT.FAN5 |
| C405APUEXERADATA7 | output | TCELL6:OUT.FAN4 |
| C405APUEXERADATA8 | output | TCELL6:OUT.FAN5 |
| C405APUEXERADATA9 | output | TCELL7:OUT.FAN4 |
| C405APUEXERBDATA0 | output | TCELL2:OUT.FAN7 |
| C405APUEXERBDATA1 | output | TCELL3:OUT.FAN6 |
| C405APUEXERBDATA10 | output | TCELL7:OUT.FAN7 |
| C405APUEXERBDATA11 | output | TCELL8:OUT.FAN6 |
| C405APUEXERBDATA12 | output | TCELL8:OUT.FAN7 |
| C405APUEXERBDATA13 | output | TCELL9:OUT.FAN6 |
| C405APUEXERBDATA14 | output | TCELL9:OUT.FAN7 |
| C405APUEXERBDATA15 | output | TCELL10:OUT.FAN6 |
| C405APUEXERBDATA16 | output | TCELL10:OUT.FAN7 |
| C405APUEXERBDATA17 | output | TCELL11:OUT.FAN6 |
| C405APUEXERBDATA18 | output | TCELL11:OUT.FAN7 |
| C405APUEXERBDATA19 | output | TCELL12:OUT.FAN6 |
| C405APUEXERBDATA2 | output | TCELL3:OUT.FAN7 |
| C405APUEXERBDATA20 | output | TCELL12:OUT.FAN7 |
| C405APUEXERBDATA21 | output | TCELL13:OUT.FAN6 |
| C405APUEXERBDATA22 | output | TCELL13:OUT.FAN7 |
| C405APUEXERBDATA23 | output | TCELL14:OUT.FAN6 |
| C405APUEXERBDATA24 | output | TCELL14:OUT.FAN7 |
| C405APUEXERBDATA25 | output | TCELL15:OUT.FAN6 |
| C405APUEXERBDATA26 | output | TCELL15:OUT.FAN7 |
| C405APUEXERBDATA27 | output | TCELL0:OUT.SEC15 |
| C405APUEXERBDATA28 | output | TCELL0:OUT.SEC14 |
| C405APUEXERBDATA29 | output | TCELL1:OUT.SEC15 |
| C405APUEXERBDATA3 | output | TCELL4:OUT.FAN6 |
| C405APUEXERBDATA30 | output | TCELL1:OUT.SEC14 |
| C405APUEXERBDATA31 | output | TCELL2:OUT.SEC15 |
| C405APUEXERBDATA4 | output | TCELL4:OUT.FAN7 |
| C405APUEXERBDATA5 | output | TCELL5:OUT.FAN6 |
| C405APUEXERBDATA6 | output | TCELL5:OUT.FAN7 |
| C405APUEXERBDATA7 | output | TCELL6:OUT.FAN6 |
| C405APUEXERBDATA8 | output | TCELL6:OUT.FAN7 |
| C405APUEXERBDATA9 | output | TCELL7:OUT.FAN6 |
| C405APUEXEWDCNT0 | output | TCELL2:OUT.SEC14 |
| C405APUEXEWDCNT1 | output | TCELL3:OUT.SEC15 |
| C405APUMSRFE0 | output | TCELL3:OUT.SEC14 |
| C405APUMSRFE1 | output | TCELL4:OUT.SEC15 |
| C405APUWBBYTEEN0 | output | TCELL4:OUT.SEC14 |
| C405APUWBBYTEEN1 | output | TCELL5:OUT.SEC15 |
| C405APUWBBYTEEN2 | output | TCELL5:OUT.SEC14 |
| C405APUWBBYTEEN3 | output | TCELL6:OUT.SEC15 |
| C405APUWBENDIAN | output | TCELL6:OUT.SEC14 |
| C405APUWBFLUSH | output | TCELL7:OUT.SEC15 |
| C405APUWBHOLD | output | TCELL7:OUT.SEC14 |
| C405APUXERCA | output | TCELL8:OUT.SEC15 |
| C405CPMCORESLEEPREQ | output | TCELL30:OUT.FAN5 |
| C405CPMMSRCE | output | TCELL31:OUT.FAN4 |
| C405CPMMSREE | output | TCELL31:OUT.FAN5 |
| C405CPMTIMERIRQ | output | TCELL16:OUT.FAN6 |
| C405CPMTIMERRESETREQ | output | TCELL16:OUT.FAN7 |
| C405DBGLOADDATAONAPUDBUS | output | TCELL30:OUT.FAN7 |
| C405DBGMSRWE | output | TCELL31:OUT.FAN6 |
| C405DBGSTOPACK | output | TCELL31:OUT.FAN7 |
| C405DBGWBCOMPLETE | output | TCELL16:OUT.SEC15 |
| C405DBGWBFULL | output | TCELL16:OUT.SEC14 |
| C405DBGWBIAR0 | output | TCELL17:OUT.SEC14 |
| C405DBGWBIAR1 | output | TCELL29:OUT.SEC15 |
| C405DBGWBIAR10 | output | TCELL30:OUT.SEC13 |
| C405DBGWBIAR11 | output | TCELL18:OUT.FAN6 |
| C405DBGWBIAR12 | output | TCELL18:OUT.FAN7 |
| C405DBGWBIAR13 | output | TCELL19:OUT.SEC15 |
| C405DBGWBIAR14 | output | TCELL19:OUT.SEC14 |
| C405DBGWBIAR15 | output | TCELL19:OUT.SEC13 |
| C405DBGWBIAR16 | output | TCELL19:OUT.SEC12 |
| C405DBGWBIAR17 | output | TCELL20:OUT.SEC13 |
| C405DBGWBIAR18 | output | TCELL20:OUT.SEC12 |
| C405DBGWBIAR19 | output | TCELL28:OUT.FAN7 |
| C405DBGWBIAR2 | output | TCELL29:OUT.SEC14 |
| C405DBGWBIAR20 | output | TCELL31:OUT.SEC13 |
| C405DBGWBIAR21 | output | TCELL16:OUT.SEC12 |
| C405DBGWBIAR22 | output | TCELL17:OUT.SEC12 |
| C405DBGWBIAR23 | output | TCELL29:OUT.SEC12 |
| C405DBGWBIAR24 | output | TCELL30:OUT.SEC12 |
| C405DBGWBIAR25 | output | TCELL31:OUT.SEC12 |
| C405DBGWBIAR26 | output | TCELL16:OUT.SEC11 |
| C405DBGWBIAR27 | output | TCELL17:OUT.SEC11 |
| C405DBGWBIAR28 | output | TCELL18:OUT.SEC11 |
| C405DBGWBIAR29 | output | TCELL19:OUT.SEC11 |
| C405DBGWBIAR3 | output | TCELL30:OUT.SEC15 |
| C405DBGWBIAR4 | output | TCELL30:OUT.SEC14 |
| C405DBGWBIAR5 | output | TCELL31:OUT.SEC15 |
| C405DBGWBIAR6 | output | TCELL31:OUT.SEC14 |
| C405DBGWBIAR7 | output | TCELL16:OUT.SEC13 |
| C405DBGWBIAR8 | output | TCELL17:OUT.SEC13 |
| C405DBGWBIAR9 | output | TCELL29:OUT.SEC13 |
| C405DCRABUS0 | output | TCELL8:OUT.SEC14 |
| C405DCRABUS1 | output | TCELL9:OUT.SEC15 |
| C405DCRABUS2 | output | TCELL9:OUT.SEC14 |
| C405DCRABUS3 | output | TCELL10:OUT.SEC15 |
| C405DCRABUS4 | output | TCELL10:OUT.SEC14 |
| C405DCRABUS5 | output | TCELL11:OUT.SEC15 |
| C405DCRABUS6 | output | TCELL11:OUT.SEC14 |
| C405DCRABUS7 | output | TCELL12:OUT.SEC15 |
| C405DCRABUS8 | output | TCELL12:OUT.SEC14 |
| C405DCRABUS9 | output | TCELL13:OUT.SEC15 |
| C405DCRDBUSOUT0 | output | TCELL13:OUT.SEC14 |
| C405DCRDBUSOUT1 | output | TCELL14:OUT.SEC15 |
| C405DCRDBUSOUT10 | output | TCELL5:OUT.SEC13 |
| C405DCRDBUSOUT11 | output | TCELL6:OUT.SEC13 |
| C405DCRDBUSOUT12 | output | TCELL7:OUT.SEC13 |
| C405DCRDBUSOUT13 | output | TCELL8:OUT.SEC13 |
| C405DCRDBUSOUT14 | output | TCELL9:OUT.SEC13 |
| C405DCRDBUSOUT15 | output | TCELL10:OUT.SEC13 |
| C405DCRDBUSOUT16 | output | TCELL11:OUT.SEC13 |
| C405DCRDBUSOUT17 | output | TCELL12:OUT.SEC13 |
| C405DCRDBUSOUT18 | output | TCELL13:OUT.SEC13 |
| C405DCRDBUSOUT19 | output | TCELL14:OUT.SEC13 |
| C405DCRDBUSOUT2 | output | TCELL14:OUT.SEC14 |
| C405DCRDBUSOUT20 | output | TCELL15:OUT.SEC13 |
| C405DCRDBUSOUT21 | output | TCELL0:OUT.SEC12 |
| C405DCRDBUSOUT22 | output | TCELL1:OUT.SEC12 |
| C405DCRDBUSOUT23 | output | TCELL2:OUT.SEC12 |
| C405DCRDBUSOUT24 | output | TCELL3:OUT.SEC12 |
| C405DCRDBUSOUT25 | output | TCELL4:OUT.SEC12 |
| C405DCRDBUSOUT26 | output | TCELL5:OUT.SEC12 |
| C405DCRDBUSOUT27 | output | TCELL6:OUT.SEC12 |
| C405DCRDBUSOUT28 | output | TCELL7:OUT.SEC12 |
| C405DCRDBUSOUT29 | output | TCELL8:OUT.SEC12 |
| C405DCRDBUSOUT3 | output | TCELL15:OUT.SEC15 |
| C405DCRDBUSOUT30 | output | TCELL9:OUT.SEC12 |
| C405DCRDBUSOUT31 | output | TCELL10:OUT.SEC12 |
| C405DCRDBUSOUT4 | output | TCELL15:OUT.SEC14 |
| C405DCRDBUSOUT5 | output | TCELL0:OUT.SEC13 |
| C405DCRDBUSOUT6 | output | TCELL1:OUT.SEC13 |
| C405DCRDBUSOUT7 | output | TCELL2:OUT.SEC13 |
| C405DCRDBUSOUT8 | output | TCELL3:OUT.SEC13 |
| C405DCRDBUSOUT9 | output | TCELL4:OUT.SEC13 |
| C405DCRREAD | output | TCELL11:OUT.SEC12 |
| C405DCRWRITE | output | TCELL12:OUT.SEC12 |
| C405DSOCMCACHEABLE | output | TCELL32:OUT.TEST6 |
| C405DSOCMGUARDED | output | TCELL33:OUT.TEST0 |
| C405DSOCMSTRINGMULTIPLE | output | TCELL33:OUT.TEST2 |
| C405DSOCMU0ATTR | output | TCELL34:OUT.TEST2 |
| C405ISOCMCACHEABLE | output | TCELL39:OUT.SEC10 |
| C405ISOCMCONTEXTSYNC | output | TCELL39:OUT.SEC9 |
| C405ISOCMU0ATTR | output | TCELL32:OUT.TEST4 |
| C405JTGCAPTUREDR | output | TCELL44:OUT.SEC14 |
| C405JTGEXTEST | output | TCELL47:OUT.SEC15 |
| C405JTGPGMOUT | output | TCELL47:OUT.SEC14 |
| C405JTGSHIFTDR | output | TCELL40:OUT.SEC13 |
| C405JTGTDO | output | TCELL41:OUT.SEC13 |
| C405JTGTDOEN | output | TCELL42:OUT.SEC13 |
| C405JTGUPDATEDR | output | TCELL43:OUT.SEC13 |
| C405LSSDDIAGABISTDONE | output | TCELL33:OUT.SEC9 |
| C405LSSDDIAGOUT | output | TCELL33:OUT.SEC8 |
| C405LSSDSCANOUT0 | output | TCELL34:OUT.SEC8 |
| C405LSSDSCANOUT1 | output | TCELL34:OUT.TEST0 |
| C405LSSDSCANOUT2 | output | TCELL35:OUT.SEC11 |
| C405LSSDSCANOUT3 | output | TCELL35:OUT.SEC10 |
| C405LSSDSCANOUT4 | output | TCELL36:OUT.SEC11 |
| C405LSSDSCANOUT5 | output | TCELL36:OUT.SEC10 |
| C405LSSDSCANOUT6 | output | TCELL37:OUT.SEC11 |
| C405LSSDSCANOUT7 | output | TCELL37:OUT.SEC10 |
| C405LSSDSCANOUT8 | output | TCELL38:OUT.TEST0 |
| C405LSSDSCANOUT9 | output | TCELL38:OUT.TEST2 |
| C405PLBDCUABORT | output | TCELL17:OUT.FAN7 |
| C405PLBDCUABUS0 | output | TCELL27:OUT.FAN4 |
| C405PLBDCUABUS1 | output | TCELL27:OUT.FAN5 |
| C405PLBDCUABUS10 | output | TCELL25:OUT.FAN6 |
| C405PLBDCUABUS11 | output | TCELL25:OUT.FAN7 |
| C405PLBDCUABUS12 | output | TCELL24:OUT.FAN4 |
| C405PLBDCUABUS13 | output | TCELL24:OUT.FAN5 |
| C405PLBDCUABUS14 | output | TCELL24:OUT.FAN6 |
| C405PLBDCUABUS15 | output | TCELL24:OUT.FAN7 |
| C405PLBDCUABUS16 | output | TCELL23:OUT.FAN4 |
| C405PLBDCUABUS17 | output | TCELL23:OUT.FAN5 |
| C405PLBDCUABUS18 | output | TCELL23:OUT.FAN6 |
| C405PLBDCUABUS19 | output | TCELL23:OUT.FAN7 |
| C405PLBDCUABUS2 | output | TCELL27:OUT.FAN6 |
| C405PLBDCUABUS20 | output | TCELL22:OUT.FAN4 |
| C405PLBDCUABUS21 | output | TCELL22:OUT.FAN5 |
| C405PLBDCUABUS22 | output | TCELL22:OUT.FAN6 |
| C405PLBDCUABUS23 | output | TCELL22:OUT.FAN7 |
| C405PLBDCUABUS24 | output | TCELL21:OUT.FAN4 |
| C405PLBDCUABUS25 | output | TCELL21:OUT.FAN5 |
| C405PLBDCUABUS26 | output | TCELL21:OUT.FAN6 |
| C405PLBDCUABUS27 | output | TCELL21:OUT.FAN7 |
| C405PLBDCUABUS28 | output | TCELL20:OUT.FAN4 |
| C405PLBDCUABUS29 | output | TCELL20:OUT.FAN5 |
| C405PLBDCUABUS3 | output | TCELL27:OUT.FAN7 |
| C405PLBDCUABUS30 | output | TCELL20:OUT.FAN6 |
| C405PLBDCUABUS31 | output | TCELL20:OUT.FAN7 |
| C405PLBDCUABUS4 | output | TCELL26:OUT.FAN4 |
| C405PLBDCUABUS5 | output | TCELL26:OUT.FAN5 |
| C405PLBDCUABUS6 | output | TCELL26:OUT.FAN6 |
| C405PLBDCUABUS7 | output | TCELL26:OUT.FAN7 |
| C405PLBDCUABUS8 | output | TCELL25:OUT.FAN4 |
| C405PLBDCUABUS9 | output | TCELL25:OUT.FAN5 |
| C405PLBDCUBE0 | output | TCELL29:OUT.FAN4 |
| C405PLBDCUBE1 | output | TCELL29:OUT.FAN5 |
| C405PLBDCUBE2 | output | TCELL29:OUT.FAN6 |
| C405PLBDCUBE3 | output | TCELL29:OUT.FAN7 |
| C405PLBDCUBE4 | output | TCELL19:OUT.FAN4 |
| C405PLBDCUBE5 | output | TCELL19:OUT.FAN5 |
| C405PLBDCUBE6 | output | TCELL19:OUT.FAN6 |
| C405PLBDCUBE7 | output | TCELL19:OUT.FAN7 |
| C405PLBDCUCACHEABLE | output | TCELL28:OUT.FAN6 |
| C405PLBDCUGUARDED | output | TCELL18:OUT.FAN4 |
| C405PLBDCUPRIORITY0 | output | TCELL17:OUT.FAN5 |
| C405PLBDCUPRIORITY1 | output | TCELL17:OUT.FAN6 |
| C405PLBDCUREQUEST | output | TCELL17:OUT.FAN4 |
| C405PLBDCURNW | output | TCELL17:OUT.SEC15 |
| C405PLBDCUSIZE2 | output | TCELL28:OUT.FAN4 |
| C405PLBDCUU0ATTR | output | TCELL28:OUT.FAN5 |
| C405PLBDCUWRDBUS0 | output | TCELL31:OUT.FAN0 |
| C405PLBDCUWRDBUS1 | output | TCELL31:OUT.FAN1 |
| C405PLBDCUWRDBUS10 | output | TCELL29:OUT.FAN2 |
| C405PLBDCUWRDBUS11 | output | TCELL29:OUT.FAN3 |
| C405PLBDCUWRDBUS12 | output | TCELL28:OUT.FAN0 |
| C405PLBDCUWRDBUS13 | output | TCELL28:OUT.FAN1 |
| C405PLBDCUWRDBUS14 | output | TCELL28:OUT.FAN2 |
| C405PLBDCUWRDBUS15 | output | TCELL28:OUT.FAN3 |
| C405PLBDCUWRDBUS16 | output | TCELL27:OUT.FAN0 |
| C405PLBDCUWRDBUS17 | output | TCELL27:OUT.FAN1 |
| C405PLBDCUWRDBUS18 | output | TCELL27:OUT.FAN2 |
| C405PLBDCUWRDBUS19 | output | TCELL27:OUT.FAN3 |
| C405PLBDCUWRDBUS2 | output | TCELL31:OUT.FAN2 |
| C405PLBDCUWRDBUS20 | output | TCELL26:OUT.FAN0 |
| C405PLBDCUWRDBUS21 | output | TCELL26:OUT.FAN1 |
| C405PLBDCUWRDBUS22 | output | TCELL26:OUT.FAN2 |
| C405PLBDCUWRDBUS23 | output | TCELL26:OUT.FAN3 |
| C405PLBDCUWRDBUS24 | output | TCELL25:OUT.FAN0 |
| C405PLBDCUWRDBUS25 | output | TCELL25:OUT.FAN1 |
| C405PLBDCUWRDBUS26 | output | TCELL25:OUT.FAN2 |
| C405PLBDCUWRDBUS27 | output | TCELL25:OUT.FAN3 |
| C405PLBDCUWRDBUS28 | output | TCELL24:OUT.FAN0 |
| C405PLBDCUWRDBUS29 | output | TCELL24:OUT.FAN1 |
| C405PLBDCUWRDBUS3 | output | TCELL31:OUT.FAN3 |
| C405PLBDCUWRDBUS30 | output | TCELL24:OUT.FAN2 |
| C405PLBDCUWRDBUS31 | output | TCELL24:OUT.FAN3 |
| C405PLBDCUWRDBUS32 | output | TCELL23:OUT.FAN0 |
| C405PLBDCUWRDBUS33 | output | TCELL23:OUT.FAN1 |
| C405PLBDCUWRDBUS34 | output | TCELL23:OUT.FAN2 |
| C405PLBDCUWRDBUS35 | output | TCELL23:OUT.FAN3 |
| C405PLBDCUWRDBUS36 | output | TCELL22:OUT.FAN0 |
| C405PLBDCUWRDBUS37 | output | TCELL22:OUT.FAN1 |
| C405PLBDCUWRDBUS38 | output | TCELL22:OUT.FAN2 |
| C405PLBDCUWRDBUS39 | output | TCELL22:OUT.FAN3 |
| C405PLBDCUWRDBUS4 | output | TCELL30:OUT.FAN0 |
| C405PLBDCUWRDBUS40 | output | TCELL21:OUT.FAN0 |
| C405PLBDCUWRDBUS41 | output | TCELL21:OUT.FAN1 |
| C405PLBDCUWRDBUS42 | output | TCELL21:OUT.FAN2 |
| C405PLBDCUWRDBUS43 | output | TCELL21:OUT.FAN3 |
| C405PLBDCUWRDBUS44 | output | TCELL20:OUT.FAN0 |
| C405PLBDCUWRDBUS45 | output | TCELL20:OUT.FAN1 |
| C405PLBDCUWRDBUS46 | output | TCELL20:OUT.FAN2 |
| C405PLBDCUWRDBUS47 | output | TCELL20:OUT.FAN3 |
| C405PLBDCUWRDBUS48 | output | TCELL19:OUT.FAN0 |
| C405PLBDCUWRDBUS49 | output | TCELL19:OUT.FAN1 |
| C405PLBDCUWRDBUS5 | output | TCELL30:OUT.FAN1 |
| C405PLBDCUWRDBUS50 | output | TCELL19:OUT.FAN2 |
| C405PLBDCUWRDBUS51 | output | TCELL19:OUT.FAN3 |
| C405PLBDCUWRDBUS52 | output | TCELL18:OUT.FAN0 |
| C405PLBDCUWRDBUS53 | output | TCELL18:OUT.FAN1 |
| C405PLBDCUWRDBUS54 | output | TCELL18:OUT.FAN2 |
| C405PLBDCUWRDBUS55 | output | TCELL18:OUT.FAN3 |
| C405PLBDCUWRDBUS56 | output | TCELL17:OUT.FAN0 |
| C405PLBDCUWRDBUS57 | output | TCELL17:OUT.FAN1 |
| C405PLBDCUWRDBUS58 | output | TCELL17:OUT.FAN2 |
| C405PLBDCUWRDBUS59 | output | TCELL17:OUT.FAN3 |
| C405PLBDCUWRDBUS6 | output | TCELL30:OUT.FAN2 |
| C405PLBDCUWRDBUS60 | output | TCELL16:OUT.FAN0 |
| C405PLBDCUWRDBUS61 | output | TCELL16:OUT.FAN1 |
| C405PLBDCUWRDBUS62 | output | TCELL16:OUT.FAN2 |
| C405PLBDCUWRDBUS63 | output | TCELL16:OUT.FAN3 |
| C405PLBDCUWRDBUS7 | output | TCELL30:OUT.FAN3 |
| C405PLBDCUWRDBUS8 | output | TCELL29:OUT.FAN0 |
| C405PLBDCUWRDBUS9 | output | TCELL29:OUT.FAN1 |
| C405PLBDCUWRITETHRU | output | TCELL18:OUT.FAN5 |
| C405PLBICUABORT | output | TCELL18:OUT.SEC12 |
| C405PLBICUABUS0 | output | TCELL27:OUT.SEC15 |
| C405PLBICUABUS1 | output | TCELL27:OUT.SEC14 |
| C405PLBICUABUS10 | output | TCELL25:OUT.SEC13 |
| C405PLBICUABUS11 | output | TCELL25:OUT.SEC12 |
| C405PLBICUABUS12 | output | TCELL24:OUT.SEC15 |
| C405PLBICUABUS13 | output | TCELL24:OUT.SEC14 |
| C405PLBICUABUS14 | output | TCELL24:OUT.SEC13 |
| C405PLBICUABUS15 | output | TCELL24:OUT.SEC12 |
| C405PLBICUABUS16 | output | TCELL23:OUT.SEC15 |
| C405PLBICUABUS17 | output | TCELL23:OUT.SEC14 |
| C405PLBICUABUS18 | output | TCELL23:OUT.SEC13 |
| C405PLBICUABUS19 | output | TCELL23:OUT.SEC12 |
| C405PLBICUABUS2 | output | TCELL27:OUT.SEC13 |
| C405PLBICUABUS20 | output | TCELL22:OUT.SEC15 |
| C405PLBICUABUS21 | output | TCELL22:OUT.SEC14 |
| C405PLBICUABUS22 | output | TCELL22:OUT.SEC13 |
| C405PLBICUABUS23 | output | TCELL22:OUT.SEC12 |
| C405PLBICUABUS24 | output | TCELL21:OUT.SEC15 |
| C405PLBICUABUS25 | output | TCELL21:OUT.SEC14 |
| C405PLBICUABUS26 | output | TCELL21:OUT.SEC13 |
| C405PLBICUABUS27 | output | TCELL21:OUT.SEC12 |
| C405PLBICUABUS28 | output | TCELL20:OUT.SEC15 |
| C405PLBICUABUS29 | output | TCELL20:OUT.SEC14 |
| C405PLBICUABUS3 | output | TCELL27:OUT.SEC12 |
| C405PLBICUABUS4 | output | TCELL26:OUT.SEC15 |
| C405PLBICUABUS5 | output | TCELL26:OUT.SEC14 |
| C405PLBICUABUS6 | output | TCELL26:OUT.SEC13 |
| C405PLBICUABUS7 | output | TCELL26:OUT.SEC12 |
| C405PLBICUABUS8 | output | TCELL25:OUT.SEC15 |
| C405PLBICUABUS9 | output | TCELL25:OUT.SEC14 |
| C405PLBICUCACHEABLE | output | TCELL28:OUT.SEC12 |
| C405PLBICUPRIORITY0 | output | TCELL18:OUT.SEC14 |
| C405PLBICUPRIORITY1 | output | TCELL18:OUT.SEC13 |
| C405PLBICUREQUEST | output | TCELL18:OUT.SEC15 |
| C405PLBICUSIZE2 | output | TCELL28:OUT.SEC15 |
| C405PLBICUSIZE3 | output | TCELL28:OUT.SEC14 |
| C405PLBICUU0ATTR | output | TCELL28:OUT.SEC13 |
| C405RSTCHIPRESETREQ | output | TCELL16:OUT.FAN4 |
| C405RSTCORERESETREQ | output | TCELL16:OUT.FAN5 |
| C405RSTSYSRESETREQ | output | TCELL30:OUT.FAN4 |
| C405TRCCYCLE | output | TCELL47:OUT.FAN0 |
| C405TRCEVENEXECUTIONSTATUS0 | output | TCELL47:OUT.FAN1 |
| C405TRCEVENEXECUTIONSTATUS1 | output | TCELL47:OUT.FAN2 |
| C405TRCODDEXECUTIONSTATUS0 | output | TCELL47:OUT.FAN3 |
| C405TRCODDEXECUTIONSTATUS1 | output | TCELL40:OUT.FAN4 |
| C405TRCTRACESTATUS0 | output | TCELL40:OUT.FAN5 |
| C405TRCTRACESTATUS1 | output | TCELL47:OUT.FAN4 |
| C405TRCTRACESTATUS2 | output | TCELL47:OUT.FAN5 |
| C405TRCTRACESTATUS3 | output | TCELL40:OUT.FAN6 |
| C405TRCTRIGGEREVENTOUT | output | TCELL40:OUT.FAN7 |
| C405TRCTRIGGEREVENTTYPE0 | output | TCELL47:OUT.FAN6 |
| C405TRCTRIGGEREVENTTYPE1 | output | TCELL47:OUT.FAN7 |
| C405TRCTRIGGEREVENTTYPE10 | output | TCELL44:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE2 | output | TCELL40:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE3 | output | TCELL40:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE4 | output | TCELL41:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE5 | output | TCELL41:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE6 | output | TCELL42:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE7 | output | TCELL42:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE8 | output | TCELL43:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE9 | output | TCELL43:OUT.SEC14 |
| C405XXXMACHINECHECK | output | TCELL30:OUT.FAN6 |
| CPMC405CLOCK | input | TCELL25:IMUX.CLK0 |
| CPMC405CORECLKINACTIVE | input | TCELL21:IMUX.G1.DATA2 |
| CPMC405CPUCLKEN | input | TCELL17:IMUX.CE0 |
| CPMC405JTAGCLKEN | input | TCELL19:IMUX.CE0 |
| CPMC405TIMERCLKEN | input | TCELL18:IMUX.CE0 |
| CPMC405TIMERTICK | input | TCELL19:IMUX.CLK0 |
| DBGC405DEBUGHALT | input | TCELL17:IMUX.G0.DATA2 |
| DBGC405EXTBUSHOLDACK | input | TCELL20:IMUX.G0.DATA2 |
| DBGC405UNCONDDEBUGEVENT | input | TCELL18:IMUX.G0.DATA2 |
| DCRC405ACK | input | TCELL8:IMUX.G0.DATA1 |
| DCRC405DBUSIN0 | input | TCELL9:IMUX.G0.DATA1 |
| DCRC405DBUSIN1 | input | TCELL9:IMUX.G1.DATA1 |
| DCRC405DBUSIN10 | input | TCELL14:IMUX.G0.DATA1 |
| DCRC405DBUSIN11 | input | TCELL14:IMUX.G1.DATA1 |
| DCRC405DBUSIN12 | input | TCELL15:IMUX.G0.DATA1 |
| DCRC405DBUSIN13 | input | TCELL15:IMUX.G1.DATA1 |
| DCRC405DBUSIN14 | input | TCELL0:IMUX.G2.DATA1 |
| DCRC405DBUSIN15 | input | TCELL0:IMUX.G3.DATA1 |
| DCRC405DBUSIN16 | input | TCELL1:IMUX.G2.DATA1 |
| DCRC405DBUSIN17 | input | TCELL1:IMUX.G3.DATA1 |
| DCRC405DBUSIN18 | input | TCELL2:IMUX.G2.DATA1 |
| DCRC405DBUSIN19 | input | TCELL2:IMUX.G3.DATA1 |
| DCRC405DBUSIN2 | input | TCELL10:IMUX.G0.DATA1 |
| DCRC405DBUSIN20 | input | TCELL3:IMUX.G2.DATA1 |
| DCRC405DBUSIN21 | input | TCELL3:IMUX.G3.DATA1 |
| DCRC405DBUSIN22 | input | TCELL4:IMUX.G0.DATA1 |
| DCRC405DBUSIN23 | input | TCELL4:IMUX.G1.DATA1 |
| DCRC405DBUSIN24 | input | TCELL5:IMUX.G0.DATA1 |
| DCRC405DBUSIN25 | input | TCELL5:IMUX.G1.DATA1 |
| DCRC405DBUSIN26 | input | TCELL6:IMUX.G0.DATA1 |
| DCRC405DBUSIN27 | input | TCELL6:IMUX.G1.DATA1 |
| DCRC405DBUSIN28 | input | TCELL7:IMUX.G0.DATA1 |
| DCRC405DBUSIN29 | input | TCELL7:IMUX.G1.DATA1 |
| DCRC405DBUSIN3 | input | TCELL10:IMUX.G1.DATA1 |
| DCRC405DBUSIN30 | input | TCELL8:IMUX.G1.DATA1 |
| DCRC405DBUSIN31 | input | TCELL8:IMUX.G2.DATA1 |
| DCRC405DBUSIN4 | input | TCELL11:IMUX.G0.DATA1 |
| DCRC405DBUSIN5 | input | TCELL11:IMUX.G1.DATA1 |
| DCRC405DBUSIN6 | input | TCELL12:IMUX.G0.DATA1 |
| DCRC405DBUSIN7 | input | TCELL12:IMUX.G1.DATA1 |
| DCRC405DBUSIN8 | input | TCELL13:IMUX.G0.DATA1 |
| DCRC405DBUSIN9 | input | TCELL13:IMUX.G1.DATA1 |
| DSARCVALUE0 | input | TCELL45:IMUX.TI0 |
| DSARCVALUE1 | input | TCELL45:IMUX.TI1 |
| DSARCVALUE2 | input | TCELL45:IMUX.TS0 |
| DSARCVALUE3 | input | TCELL45:IMUX.TS1 |
| DSARCVALUE4 | input | TCELL46:IMUX.TI0 |
| DSARCVALUE5 | input | TCELL46:IMUX.TI1 |
| DSARCVALUE6 | input | TCELL46:IMUX.TS0 |
| DSARCVALUE7 | input | TCELL46:IMUX.TS1 |
| DSCNTLVALUE0 | input | TCELL41:IMUX.TI0 |
| DSCNTLVALUE1 | input | TCELL41:IMUX.TI1 |
| DSCNTLVALUE2 | input | TCELL41:IMUX.TS0 |
| DSCNTLVALUE3 | input | TCELL41:IMUX.TS1 |
| DSCNTLVALUE4 | input | TCELL42:IMUX.TI1 |
| DSCNTLVALUE5 | input | TCELL42:IMUX.TS0 |
| DSCNTLVALUE6 | input | TCELL42:IMUX.TS1 |
| DSCNTLVALUE7 | input | TCELL44:IMUX.TS1 |
| DSOCMBRAMABUS10 | output | TCELL45:OUT.FAN2 |
| DSOCMBRAMABUS11 | output | TCELL45:OUT.FAN3 |
| DSOCMBRAMABUS12 | output | TCELL45:OUT.FAN4 |
| DSOCMBRAMABUS13 | output | TCELL45:OUT.FAN5 |
| DSOCMBRAMABUS14 | output | TCELL45:OUT.FAN6 |
| DSOCMBRAMABUS15 | output | TCELL45:OUT.FAN7 |
| DSOCMBRAMABUS16 | output | TCELL40:IMUX.BRAM_ADDRA0.N3, TCELL45:OUT.SEC15, TCELL47:IMUX.BRAM_ADDRA0.N3 |
| DSOCMBRAMABUS17 | output | TCELL40:IMUX.BRAM_ADDRA1.N3, TCELL45:OUT.SEC14, TCELL47:IMUX.BRAM_ADDRA1.N3 |
| DSOCMBRAMABUS18 | output | TCELL40:IMUX.BRAM_ADDRA2.N3, TCELL45:OUT.SEC13, TCELL47:IMUX.BRAM_ADDRA2.N3 |
| DSOCMBRAMABUS19 | output | TCELL40:IMUX.BRAM_ADDRA3.N3, TCELL45:OUT.SEC12, TCELL47:IMUX.BRAM_ADDRA3.N3 |
| DSOCMBRAMABUS20 | output | TCELL40:IMUX.BRAM_ADDRA0.N2, TCELL46:OUT.FAN0, TCELL47:IMUX.BRAM_ADDRA0.N2 |
| DSOCMBRAMABUS21 | output | TCELL40:IMUX.BRAM_ADDRA1.N2, TCELL46:OUT.FAN1, TCELL47:IMUX.BRAM_ADDRA1.N2 |
| DSOCMBRAMABUS22 | output | TCELL40:IMUX.BRAM_ADDRA2.N2, TCELL46:OUT.FAN2, TCELL47:IMUX.BRAM_ADDRA2.N2 |
| DSOCMBRAMABUS23 | output | TCELL40:IMUX.BRAM_ADDRA3.N2, TCELL46:OUT.FAN3, TCELL47:IMUX.BRAM_ADDRA3.N2 |
| DSOCMBRAMABUS24 | output | TCELL40:IMUX.BRAM_ADDRA0.N1, TCELL46:OUT.FAN4, TCELL47:IMUX.BRAM_ADDRA0.N1 |
| DSOCMBRAMABUS25 | output | TCELL40:IMUX.BRAM_ADDRA1.N1, TCELL46:OUT.FAN5, TCELL47:IMUX.BRAM_ADDRA1.N1 |
| DSOCMBRAMABUS26 | output | TCELL40:IMUX.BRAM_ADDRA2.N1, TCELL46:OUT.FAN6, TCELL47:IMUX.BRAM_ADDRA2.N1 |
| DSOCMBRAMABUS27 | output | TCELL40:IMUX.BRAM_ADDRA3.N1, TCELL46:OUT.FAN7, TCELL47:IMUX.BRAM_ADDRA3.N1 |
| DSOCMBRAMABUS28 | output | TCELL40:IMUX.BRAM_ADDRA0, TCELL46:OUT.SEC15, TCELL47:IMUX.BRAM_ADDRA0 |
| DSOCMBRAMABUS29 | output | TCELL40:IMUX.BRAM_ADDRA1, TCELL46:OUT.SEC14, TCELL47:IMUX.BRAM_ADDRA1 |
| DSOCMBRAMABUS8 | output | TCELL45:OUT.FAN0 |
| DSOCMBRAMABUS9 | output | TCELL45:OUT.FAN1 |
| DSOCMBRAMBYTEWRITE0 | output | TCELL40:OUT.FAN0 |
| DSOCMBRAMBYTEWRITE1 | output | TCELL40:OUT.FAN1 |
| DSOCMBRAMBYTEWRITE2 | output | TCELL40:OUT.FAN2 |
| DSOCMBRAMBYTEWRITE3 | output | TCELL40:OUT.FAN3 |
| DSOCMBRAMEN | output | TCELL46:OUT.SEC13 |
| DSOCMBRAMWRDBUS0 | output | TCELL41:OUT.FAN0 |
| DSOCMBRAMWRDBUS1 | output | TCELL41:OUT.FAN1 |
| DSOCMBRAMWRDBUS10 | output | TCELL42:OUT.FAN2 |
| DSOCMBRAMWRDBUS11 | output | TCELL42:OUT.FAN3 |
| DSOCMBRAMWRDBUS12 | output | TCELL42:OUT.FAN4 |
| DSOCMBRAMWRDBUS13 | output | TCELL42:OUT.FAN5 |
| DSOCMBRAMWRDBUS14 | output | TCELL42:OUT.FAN6 |
| DSOCMBRAMWRDBUS15 | output | TCELL42:OUT.FAN7 |
| DSOCMBRAMWRDBUS16 | output | TCELL43:OUT.FAN0 |
| DSOCMBRAMWRDBUS17 | output | TCELL43:OUT.FAN1 |
| DSOCMBRAMWRDBUS18 | output | TCELL43:OUT.FAN2 |
| DSOCMBRAMWRDBUS19 | output | TCELL43:OUT.FAN3 |
| DSOCMBRAMWRDBUS2 | output | TCELL41:OUT.FAN2 |
| DSOCMBRAMWRDBUS20 | output | TCELL43:OUT.FAN4 |
| DSOCMBRAMWRDBUS21 | output | TCELL43:OUT.FAN5 |
| DSOCMBRAMWRDBUS22 | output | TCELL43:OUT.FAN6 |
| DSOCMBRAMWRDBUS23 | output | TCELL43:OUT.FAN7 |
| DSOCMBRAMWRDBUS24 | output | TCELL44:OUT.FAN0 |
| DSOCMBRAMWRDBUS25 | output | TCELL44:OUT.FAN1 |
| DSOCMBRAMWRDBUS26 | output | TCELL44:OUT.FAN2 |
| DSOCMBRAMWRDBUS27 | output | TCELL44:OUT.FAN3 |
| DSOCMBRAMWRDBUS28 | output | TCELL44:OUT.FAN4 |
| DSOCMBRAMWRDBUS29 | output | TCELL44:OUT.FAN5 |
| DSOCMBRAMWRDBUS3 | output | TCELL41:OUT.FAN3 |
| DSOCMBRAMWRDBUS30 | output | TCELL44:OUT.FAN6 |
| DSOCMBRAMWRDBUS31 | output | TCELL44:OUT.FAN7 |
| DSOCMBRAMWRDBUS4 | output | TCELL41:OUT.FAN4 |
| DSOCMBRAMWRDBUS5 | output | TCELL41:OUT.FAN5 |
| DSOCMBRAMWRDBUS6 | output | TCELL41:OUT.FAN6 |
| DSOCMBRAMWRDBUS7 | output | TCELL41:OUT.FAN7 |
| DSOCMBRAMWRDBUS8 | output | TCELL42:OUT.FAN0 |
| DSOCMBRAMWRDBUS9 | output | TCELL42:OUT.FAN1 |
| DSOCMBUSY | output | TCELL46:OUT.SEC12 |
| DSOCMRDADDRVALID | output | TCELL44:OUT.SEC13 |
| EICC405CRITINPUTIRQ | input | TCELL26:IMUX.G0.DATA2 |
| EICC405EXTINPUTIRQ | input | TCELL31:IMUX.G0.DATA2 |
| ISARCVALUE0 | input | TCELL36:IMUX.TI0 |
| ISARCVALUE1 | input | TCELL36:IMUX.TI1 |
| ISARCVALUE2 | input | TCELL36:IMUX.TS0 |
| ISARCVALUE3 | input | TCELL36:IMUX.TS1 |
| ISARCVALUE4 | input | TCELL37:IMUX.TI0 |
| ISARCVALUE5 | input | TCELL37:IMUX.TI1 |
| ISARCVALUE6 | input | TCELL37:IMUX.TS0 |
| ISARCVALUE7 | input | TCELL37:IMUX.TS1 |
| ISCNTLVALUE0 | input | TCELL34:IMUX.SR0 |
| ISCNTLVALUE1 | input | TCELL34:IMUX.SR1 |
| ISCNTLVALUE2 | input | TCELL35:IMUX.SR0 |
| ISCNTLVALUE3 | input | TCELL35:IMUX.SR1 |
| ISCNTLVALUE4 | input | TCELL37:IMUX.G0.DATA0 |
| ISCNTLVALUE5 | input | TCELL37:IMUX.G1.DATA0 |
| ISCNTLVALUE6 | input | TCELL34:IMUX.G0.DATA0 |
| ISCNTLVALUE7 | input | TCELL34:IMUX.G1.DATA0 |
| ISOCMBRAMEN | output | TCELL34:OUT.SEC13 |
| ISOCMBRAMEVENWRITEEN | output | TCELL34:OUT.SEC14 |
| ISOCMBRAMODDWRITEEN | output | TCELL34:OUT.SEC15 |
| ISOCMBRAMRDABUS10 | output | TCELL38:OUT.FAN2 |
| ISOCMBRAMRDABUS11 | output | TCELL38:OUT.FAN3 |
| ISOCMBRAMRDABUS12 | output | TCELL38:OUT.FAN4 |
| ISOCMBRAMRDABUS13 | output | TCELL38:OUT.FAN5 |
| ISOCMBRAMRDABUS14 | output | TCELL38:OUT.FAN6 |
| ISOCMBRAMRDABUS15 | output | TCELL32:IMUX.BRAM_ADDRB0, TCELL38:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRB0 |
| ISOCMBRAMRDABUS16 | output | TCELL32:IMUX.BRAM_ADDRB1, TCELL38:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRB1 |
| ISOCMBRAMRDABUS17 | output | TCELL32:IMUX.BRAM_ADDRB2, TCELL38:OUT.SEC14, TCELL39:IMUX.BRAM_ADDRB2 |
| ISOCMBRAMRDABUS18 | output | TCELL32:IMUX.BRAM_ADDRB3, TCELL38:OUT.SEC13, TCELL39:IMUX.BRAM_ADDRB3 |
| ISOCMBRAMRDABUS19 | output | TCELL32:IMUX.BRAM_ADDRB0.S1, TCELL38:OUT.SEC12, TCELL39:IMUX.BRAM_ADDRB0.S1 |
| ISOCMBRAMRDABUS20 | output | TCELL32:IMUX.BRAM_ADDRB1.S1, TCELL39:IMUX.BRAM_ADDRB1.S1, TCELL39:OUT.FAN0 |
| ISOCMBRAMRDABUS21 | output | TCELL32:IMUX.BRAM_ADDRB2.S1, TCELL39:IMUX.BRAM_ADDRB2.S1, TCELL39:OUT.FAN1 |
| ISOCMBRAMRDABUS22 | output | TCELL32:IMUX.BRAM_ADDRB3.S1, TCELL39:IMUX.BRAM_ADDRB3.S1, TCELL39:OUT.FAN2 |
| ISOCMBRAMRDABUS23 | output | TCELL32:IMUX.BRAM_ADDRB0.S2, TCELL39:IMUX.BRAM_ADDRB0.S2, TCELL39:OUT.FAN3 |
| ISOCMBRAMRDABUS24 | output | TCELL32:IMUX.BRAM_ADDRB1.S2, TCELL39:IMUX.BRAM_ADDRB1.S2, TCELL39:OUT.FAN4 |
| ISOCMBRAMRDABUS25 | output | TCELL32:IMUX.BRAM_ADDRB2.S2, TCELL39:IMUX.BRAM_ADDRB2.S2, TCELL39:OUT.FAN5 |
| ISOCMBRAMRDABUS26 | output | TCELL32:IMUX.BRAM_ADDRB3.S2, TCELL39:IMUX.BRAM_ADDRB3.S2, TCELL39:OUT.FAN6 |
| ISOCMBRAMRDABUS27 | output | TCELL32:IMUX.BRAM_ADDRB0.S3, TCELL39:IMUX.BRAM_ADDRB0.S3, TCELL39:OUT.FAN7 |
| ISOCMBRAMRDABUS28 | output | TCELL32:IMUX.BRAM_ADDRB1.S3, TCELL39:IMUX.BRAM_ADDRB1.S3, TCELL39:OUT.SEC15 |
| ISOCMBRAMRDABUS8 | output | TCELL38:OUT.FAN0 |
| ISOCMBRAMRDABUS9 | output | TCELL38:OUT.FAN1 |
| ISOCMBRAMWRABUS10 | output | TCELL32:OUT.FAN2 |
| ISOCMBRAMWRABUS11 | output | TCELL32:OUT.FAN3 |
| ISOCMBRAMWRABUS12 | output | TCELL32:OUT.FAN4 |
| ISOCMBRAMWRABUS13 | output | TCELL32:OUT.FAN5 |
| ISOCMBRAMWRABUS14 | output | TCELL32:OUT.FAN6 |
| ISOCMBRAMWRABUS15 | output | TCELL32:IMUX.BRAM_ADDRA0, TCELL32:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRA0 |
| ISOCMBRAMWRABUS16 | output | TCELL32:IMUX.BRAM_ADDRA1, TCELL32:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRA1 |
| ISOCMBRAMWRABUS17 | output | TCELL32:IMUX.BRAM_ADDRA2, TCELL32:OUT.SEC14, TCELL39:IMUX.BRAM_ADDRA2 |
| ISOCMBRAMWRABUS18 | output | TCELL32:IMUX.BRAM_ADDRA3, TCELL32:OUT.SEC13, TCELL39:IMUX.BRAM_ADDRA3 |
| ISOCMBRAMWRABUS19 | output | TCELL32:IMUX.BRAM_ADDRA0.S1, TCELL32:OUT.SEC12, TCELL39:IMUX.BRAM_ADDRA0.S1 |
| ISOCMBRAMWRABUS20 | output | TCELL32:IMUX.BRAM_ADDRA1.S1, TCELL33:OUT.FAN0, TCELL39:IMUX.BRAM_ADDRA1.S1 |
| ISOCMBRAMWRABUS21 | output | TCELL32:IMUX.BRAM_ADDRA2.S1, TCELL33:OUT.FAN1, TCELL39:IMUX.BRAM_ADDRA2.S1 |
| ISOCMBRAMWRABUS22 | output | TCELL32:IMUX.BRAM_ADDRA3.S1, TCELL33:OUT.FAN2, TCELL39:IMUX.BRAM_ADDRA3.S1 |
| ISOCMBRAMWRABUS23 | output | TCELL32:IMUX.BRAM_ADDRA0.S2, TCELL33:OUT.FAN3, TCELL39:IMUX.BRAM_ADDRA0.S2 |
| ISOCMBRAMWRABUS24 | output | TCELL32:IMUX.BRAM_ADDRA1.S2, TCELL33:OUT.FAN4, TCELL39:IMUX.BRAM_ADDRA1.S2 |
| ISOCMBRAMWRABUS25 | output | TCELL32:IMUX.BRAM_ADDRA2.S2, TCELL33:OUT.FAN5, TCELL39:IMUX.BRAM_ADDRA2.S2 |
| ISOCMBRAMWRABUS26 | output | TCELL32:IMUX.BRAM_ADDRA3.S2, TCELL33:OUT.FAN6, TCELL39:IMUX.BRAM_ADDRA3.S2 |
| ISOCMBRAMWRABUS27 | output | TCELL32:IMUX.BRAM_ADDRA0.S3, TCELL33:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRA0.S3 |
| ISOCMBRAMWRABUS28 | output | TCELL32:IMUX.BRAM_ADDRA1.S3, TCELL33:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRA1.S3 |
| ISOCMBRAMWRABUS8 | output | TCELL32:OUT.FAN0 |
| ISOCMBRAMWRABUS9 | output | TCELL32:OUT.FAN1 |
| ISOCMBRAMWRDBUS0 | output | TCELL34:OUT.FAN0 |
| ISOCMBRAMWRDBUS1 | output | TCELL34:OUT.FAN1 |
| ISOCMBRAMWRDBUS10 | output | TCELL35:OUT.FAN2 |
| ISOCMBRAMWRDBUS11 | output | TCELL35:OUT.FAN3 |
| ISOCMBRAMWRDBUS12 | output | TCELL35:OUT.FAN4 |
| ISOCMBRAMWRDBUS13 | output | TCELL35:OUT.FAN5 |
| ISOCMBRAMWRDBUS14 | output | TCELL35:OUT.FAN6 |
| ISOCMBRAMWRDBUS15 | output | TCELL35:OUT.FAN7 |
| ISOCMBRAMWRDBUS16 | output | TCELL36:OUT.FAN0 |
| ISOCMBRAMWRDBUS17 | output | TCELL36:OUT.FAN1 |
| ISOCMBRAMWRDBUS18 | output | TCELL36:OUT.FAN2 |
| ISOCMBRAMWRDBUS19 | output | TCELL36:OUT.FAN3 |
| ISOCMBRAMWRDBUS2 | output | TCELL34:OUT.FAN2 |
| ISOCMBRAMWRDBUS20 | output | TCELL36:OUT.FAN4 |
| ISOCMBRAMWRDBUS21 | output | TCELL36:OUT.FAN5 |
| ISOCMBRAMWRDBUS22 | output | TCELL36:OUT.FAN6 |
| ISOCMBRAMWRDBUS23 | output | TCELL36:OUT.FAN7 |
| ISOCMBRAMWRDBUS24 | output | TCELL37:OUT.FAN0 |
| ISOCMBRAMWRDBUS25 | output | TCELL37:OUT.FAN1 |
| ISOCMBRAMWRDBUS26 | output | TCELL37:OUT.FAN2 |
| ISOCMBRAMWRDBUS27 | output | TCELL37:OUT.FAN3 |
| ISOCMBRAMWRDBUS28 | output | TCELL37:OUT.FAN4 |
| ISOCMBRAMWRDBUS29 | output | TCELL37:OUT.FAN5 |
| ISOCMBRAMWRDBUS3 | output | TCELL34:OUT.FAN3 |
| ISOCMBRAMWRDBUS30 | output | TCELL37:OUT.FAN6 |
| ISOCMBRAMWRDBUS31 | output | TCELL37:OUT.FAN7 |
| ISOCMBRAMWRDBUS4 | output | TCELL34:OUT.FAN4 |
| ISOCMBRAMWRDBUS5 | output | TCELL34:OUT.FAN5 |
| ISOCMBRAMWRDBUS6 | output | TCELL34:OUT.FAN6 |
| ISOCMBRAMWRDBUS7 | output | TCELL34:OUT.FAN7 |
| ISOCMBRAMWRDBUS8 | output | TCELL35:OUT.FAN0 |
| ISOCMBRAMWRDBUS9 | output | TCELL35:OUT.FAN1 |
| ISOCMRDADDRVALID | output | TCELL33:OUT.SEC14 |
| JTGC405BNDSCANTDO | input | TCELL42:IMUX.G1.DATA0 |
| JTGC405TCK | input | TCELL41:IMUX.CLK0 |
| JTGC405TDI | input | TCELL41:IMUX.G1.DATA0 |
| JTGC405TMS | input | TCELL41:IMUX.G2.DATA0 |
| JTGC405TRSTNEG | input | TCELL28:IMUX.G2.DATA2 |
| LSSDC405ACLK | input | TCELL39:IMUX.G1.DATA5 |
| LSSDC405ARRAYCCLKNEG | input | TCELL32:IMUX.G2.DATA5 |
| LSSDC405BCLK | input | TCELL32:IMUX.G3.DATA5 |
| LSSDC405BISTCCLK | input | TCELL33:IMUX.G2.DATA5 |
| LSSDC405CNTLPOINT | input | TCELL33:IMUX.G3.DATA5 |
| LSSDC405SCANGATE | input | TCELL34:IMUX.G0.DATA2 |
| LSSDC405SCANIN0 | input | TCELL36:IMUX.G3.DATA1 |
| LSSDC405SCANIN1 | input | TCELL36:IMUX.G0.DATA2 |
| LSSDC405SCANIN2 | input | TCELL37:IMUX.G0.DATA2 |
| LSSDC405SCANIN3 | input | TCELL37:IMUX.G1.DATA2 |
| LSSDC405SCANIN4 | input | TCELL38:IMUX.G2.DATA5 |
| LSSDC405SCANIN5 | input | TCELL38:IMUX.G3.DATA5 |
| LSSDC405SCANIN6 | input | TCELL39:IMUX.G2.DATA5 |
| LSSDC405SCANIN7 | input | TCELL39:IMUX.G3.DATA5 |
| LSSDC405SCANIN8 | input | TCELL32:IMUX.G0.DATA6 |
| LSSDC405SCANIN9 | input | TCELL32:IMUX.G1.DATA6 |
| LSSDC405TESTEVS | input | TCELL34:IMUX.G1.DATA2 |
| LSSDC405TESTM1 | input | TCELL35:IMUX.G2.DATA1 |
| LSSDC405TESTM3 | input | TCELL35:IMUX.G3.DATA1 |
| MCBCPUCLKEN | input | TCELL20:IMUX.TI0 |
| MCBJTAGEN | input | TCELL21:IMUX.TI0 |
| MCBTIMEREN | input | TCELL22:IMUX.TI0 |
| MCPPCRST | input | TCELL30:IMUX.TI0 |
| PLBC405DCUADDRACK | input | TCELL23:IMUX.G0.DATA2 |
| PLBC405DCUBUSY | input | TCELL23:IMUX.G2.DATA2 |
| PLBC405DCUERR | input | TCELL23:IMUX.G3.DATA2 |
| PLBC405DCURDDACK | input | TCELL22:IMUX.G3.DATA2 |
| PLBC405DCURDDBUS0 | input | TCELL31:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS1 | input | TCELL31:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS10 | input | TCELL29:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS11 | input | TCELL29:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS12 | input | TCELL28:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS13 | input | TCELL28:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS14 | input | TCELL28:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS15 | input | TCELL28:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS16 | input | TCELL27:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS17 | input | TCELL27:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS18 | input | TCELL27:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS19 | input | TCELL27:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS2 | input | TCELL31:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS20 | input | TCELL26:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS21 | input | TCELL26:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS22 | input | TCELL26:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS23 | input | TCELL26:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS24 | input | TCELL25:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS25 | input | TCELL25:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS26 | input | TCELL25:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS27 | input | TCELL25:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS28 | input | TCELL24:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS29 | input | TCELL24:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS3 | input | TCELL31:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS30 | input | TCELL24:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS31 | input | TCELL24:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS32 | input | TCELL23:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS33 | input | TCELL23:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS34 | input | TCELL23:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS35 | input | TCELL23:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS36 | input | TCELL22:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS37 | input | TCELL22:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS38 | input | TCELL22:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS39 | input | TCELL22:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS4 | input | TCELL30:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS40 | input | TCELL21:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS41 | input | TCELL21:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS42 | input | TCELL21:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS43 | input | TCELL21:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS44 | input | TCELL20:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS45 | input | TCELL20:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS46 | input | TCELL20:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS47 | input | TCELL20:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS48 | input | TCELL19:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS49 | input | TCELL19:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS5 | input | TCELL30:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS50 | input | TCELL19:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS51 | input | TCELL19:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS52 | input | TCELL18:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS53 | input | TCELL18:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS54 | input | TCELL18:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS55 | input | TCELL18:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS56 | input | TCELL17:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS57 | input | TCELL17:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS58 | input | TCELL17:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS59 | input | TCELL17:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS6 | input | TCELL30:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS60 | input | TCELL16:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS61 | input | TCELL16:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS62 | input | TCELL16:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS63 | input | TCELL16:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS7 | input | TCELL30:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS8 | input | TCELL29:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS9 | input | TCELL29:IMUX.G1.DATA0 |
| PLBC405DCURDWDADDR1 | input | TCELL22:IMUX.G0.DATA2 |
| PLBC405DCURDWDADDR2 | input | TCELL22:IMUX.G1.DATA2 |
| PLBC405DCURDWDADDR3 | input | TCELL22:IMUX.G2.DATA2 |
| PLBC405DCUSSIZE1 | input | TCELL23:IMUX.G1.DATA2 |
| PLBC405DCUWRDACK | input | TCELL21:IMUX.G0.DATA2 |
| PLBC405ICUADDRACK | input | TCELL24:IMUX.G0.DATA2 |
| PLBC405ICUBUSY | input | TCELL24:IMUX.G2.DATA2 |
| PLBC405ICUERR | input | TCELL24:IMUX.G3.DATA2 |
| PLBC405ICURDDACK | input | TCELL25:IMUX.G3.DATA2 |
| PLBC405ICURDDBUS0 | input | TCELL31:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS1 | input | TCELL31:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS10 | input | TCELL29:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS11 | input | TCELL29:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS12 | input | TCELL28:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS13 | input | TCELL28:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS14 | input | TCELL28:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS15 | input | TCELL28:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS16 | input | TCELL27:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS17 | input | TCELL27:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS18 | input | TCELL27:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS19 | input | TCELL27:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS2 | input | TCELL31:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS20 | input | TCELL26:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS21 | input | TCELL26:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS22 | input | TCELL26:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS23 | input | TCELL26:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS24 | input | TCELL25:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS25 | input | TCELL25:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS26 | input | TCELL25:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS27 | input | TCELL25:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS28 | input | TCELL24:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS29 | input | TCELL24:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS3 | input | TCELL31:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS30 | input | TCELL24:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS31 | input | TCELL24:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS32 | input | TCELL23:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS33 | input | TCELL23:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS34 | input | TCELL23:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS35 | input | TCELL23:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS36 | input | TCELL22:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS37 | input | TCELL22:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS38 | input | TCELL22:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS39 | input | TCELL22:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS4 | input | TCELL30:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS40 | input | TCELL21:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS41 | input | TCELL21:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS42 | input | TCELL21:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS43 | input | TCELL21:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS44 | input | TCELL20:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS45 | input | TCELL20:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS46 | input | TCELL20:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS47 | input | TCELL20:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS48 | input | TCELL19:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS49 | input | TCELL19:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS5 | input | TCELL30:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS50 | input | TCELL19:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS51 | input | TCELL19:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS52 | input | TCELL18:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS53 | input | TCELL18:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS54 | input | TCELL18:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS55 | input | TCELL18:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS56 | input | TCELL17:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS57 | input | TCELL17:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS58 | input | TCELL17:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS59 | input | TCELL17:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS6 | input | TCELL30:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS60 | input | TCELL16:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS61 | input | TCELL16:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS62 | input | TCELL16:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS63 | input | TCELL16:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS7 | input | TCELL30:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS8 | input | TCELL29:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS9 | input | TCELL29:IMUX.G1.DATA1 |
| PLBC405ICURDWDADDR1 | input | TCELL25:IMUX.G0.DATA2 |
| PLBC405ICURDWDADDR2 | input | TCELL25:IMUX.G1.DATA2 |
| PLBC405ICURDWDADDR3 | input | TCELL25:IMUX.G2.DATA2 |
| PLBC405ICUSSIZE1 | input | TCELL24:IMUX.G1.DATA2 |
| PLBCLK | input | TCELL16:IMUX.CLK1 |
| RSTC405RESETCHIP | input | TCELL27:IMUX.SR0 |
| RSTC405RESETCORE | input | TCELL28:IMUX.SR0 |
| RSTC405RESETSYS | input | TCELL29:IMUX.SR0 |
| TESTSELI | input | TCELL8:IMUX.TI0 |
| TIEC405APUDIVEN | input | TCELL4:IMUX.TI0 |
| TIEC405APUPRESENT | input | TCELL4:IMUX.TI1 |
| TIEC405DETERMINISTICMULT | input | TCELL16:IMUX.TI0 |
| TIEC405DISOPERANDFWD | input | TCELL17:IMUX.TI0 |
| TIEC405MMUEN | input | TCELL17:IMUX.TI1 |
| TIEC405PVR0 | input | TCELL31:IMUX.TI0 |
| TIEC405PVR1 | input | TCELL31:IMUX.TI1 |
| TIEC405PVR10 | input | TCELL28:IMUX.TI1 |
| TIEC405PVR11 | input | TCELL28:IMUX.TS0 |
| TIEC405PVR12 | input | TCELL27:IMUX.TI0 |
| TIEC405PVR13 | input | TCELL27:IMUX.TI1 |
| TIEC405PVR14 | input | TCELL27:IMUX.TS0 |
| TIEC405PVR15 | input | TCELL26:IMUX.TI0 |
| TIEC405PVR16 | input | TCELL26:IMUX.TI1 |
| TIEC405PVR17 | input | TCELL26:IMUX.TS0 |
| TIEC405PVR18 | input | TCELL21:IMUX.TI1 |
| TIEC405PVR19 | input | TCELL21:IMUX.TS0 |
| TIEC405PVR2 | input | TCELL31:IMUX.TS0 |
| TIEC405PVR20 | input | TCELL20:IMUX.TI1 |
| TIEC405PVR21 | input | TCELL20:IMUX.TS0 |
| TIEC405PVR22 | input | TCELL20:IMUX.TS1 |
| TIEC405PVR23 | input | TCELL19:IMUX.TI0 |
| TIEC405PVR24 | input | TCELL19:IMUX.TI1 |
| TIEC405PVR25 | input | TCELL19:IMUX.TS0 |
| TIEC405PVR26 | input | TCELL18:IMUX.TI0 |
| TIEC405PVR27 | input | TCELL18:IMUX.TI1 |
| TIEC405PVR28 | input | TCELL18:IMUX.TS0 |
| TIEC405PVR29 | input | TCELL17:IMUX.TS0 |
| TIEC405PVR3 | input | TCELL30:IMUX.TI1 |
| TIEC405PVR30 | input | TCELL16:IMUX.TI1 |
| TIEC405PVR31 | input | TCELL16:IMUX.TS0 |
| TIEC405PVR4 | input | TCELL30:IMUX.TS0 |
| TIEC405PVR5 | input | TCELL30:IMUX.TS1 |
| TIEC405PVR6 | input | TCELL29:IMUX.TI0 |
| TIEC405PVR7 | input | TCELL29:IMUX.TI1 |
| TIEC405PVR8 | input | TCELL29:IMUX.TS0 |
| TIEC405PVR9 | input | TCELL28:IMUX.TI0 |
| TIEDSOCMDCRADDR0 | input | TCELL42:IMUX.TI0 |
| TIEDSOCMDCRADDR1 | input | TCELL43:IMUX.TI0 |
| TIEDSOCMDCRADDR2 | input | TCELL43:IMUX.TI1 |
| TIEDSOCMDCRADDR3 | input | TCELL43:IMUX.TS0 |
| TIEDSOCMDCRADDR4 | input | TCELL43:IMUX.TS1 |
| TIEDSOCMDCRADDR5 | input | TCELL44:IMUX.TI0 |
| TIEDSOCMDCRADDR6 | input | TCELL44:IMUX.TI1 |
| TIEDSOCMDCRADDR7 | input | TCELL44:IMUX.TS0 |
| TIEISOCMDCRADDR0 | input | TCELL34:IMUX.TI0 |
| TIEISOCMDCRADDR1 | input | TCELL34:IMUX.TI1 |
| TIEISOCMDCRADDR2 | input | TCELL34:IMUX.TS0 |
| TIEISOCMDCRADDR3 | input | TCELL34:IMUX.TS1 |
| TIEISOCMDCRADDR4 | input | TCELL35:IMUX.TI0 |
| TIEISOCMDCRADDR5 | input | TCELL35:IMUX.TI1 |
| TIEISOCMDCRADDR6 | input | TCELL35:IMUX.TS0 |
| TIEISOCMDCRADDR7 | input | TCELL35:IMUX.TS1 |
| TIERAMTAP1 | input | TCELL6:IMUX.TI0 |
| TIERAMTAP2 | input | TCELL6:IMUX.TI1 |
| TIETAGTAP1 | input | TCELL7:IMUX.TI0 |
| TIETAGTAP2 | input | TCELL7:IMUX.TI1 |
| TIEUTLBTAP1 | input | TCELL5:IMUX.TI0 |
| TIEUTLBTAP2 | input | TCELL5:IMUX.TI1 |
| TRCC405TRACEDISABLE | input | TCELL41:IMUX.G0.DATA0 |
| TRCC405TRIGGEREVENTIN | input | TCELL42:IMUX.G0.DATA0 |
| TSTC405DCRABUSI0 | input | TCELL0:IMUX.G0.DATA3 |
| TSTC405DCRABUSI1 | input | TCELL0:IMUX.G1.DATA3 |
| TSTC405DCRABUSI2 | input | TCELL1:IMUX.G0.DATA3 |
| TSTC405DCRABUSI3 | input | TCELL1:IMUX.G1.DATA3 |
| TSTC405DCRABUSI4 | input | TCELL2:IMUX.G0.DATA3 |
| TSTC405DCRABUSI5 | input | TCELL2:IMUX.G1.DATA3 |
| TSTC405DCRABUSI6 | input | TCELL3:IMUX.G0.DATA3 |
| TSTC405DCRABUSI7 | input | TCELL3:IMUX.G1.DATA3 |
| TSTC405DCRABUSI8 | input | TCELL4:IMUX.G2.DATA2 |
| TSTC405DCRABUSI9 | input | TCELL4:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI0 | input | TCELL5:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI1 | input | TCELL5:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI10 | input | TCELL10:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI11 | input | TCELL11:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI12 | input | TCELL11:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI13 | input | TCELL12:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI14 | input | TCELL12:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI15 | input | TCELL13:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI16 | input | TCELL13:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI17 | input | TCELL14:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI18 | input | TCELL14:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI19 | input | TCELL15:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI2 | input | TCELL6:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI20 | input | TCELL15:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI21 | input | TCELL0:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI22 | input | TCELL0:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI23 | input | TCELL1:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI24 | input | TCELL1:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI25 | input | TCELL2:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI26 | input | TCELL2:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI27 | input | TCELL3:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI28 | input | TCELL3:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI29 | input | TCELL4:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI3 | input | TCELL6:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI30 | input | TCELL4:IMUX.G1.DATA3 |
| TSTC405DCRDBUSOUTI31 | input | TCELL5:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI4 | input | TCELL7:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI5 | input | TCELL7:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI6 | input | TCELL8:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI7 | input | TCELL9:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI8 | input | TCELL9:IMUX.G1.DATA3 |
| TSTC405DCRDBUSOUTI9 | input | TCELL10:IMUX.G3.DATA2 |
| TSTC405DCRREADI | input | TCELL5:IMUX.G1.DATA3 |
| TSTC405DCRWRITEI | input | TCELL6:IMUX.G0.DATA3 |
| TSTCLKINACTI | input | TCELL17:IMUX.G1.DATA2 |
| TSTCLKINACTO | output | TCELL17:OUT.TEST0 |
| TSTCPUCLKENI | input | TCELL30:IMUX.G0.DATA2 |
| TSTCPUCLKENO | output | TCELL17:OUT.SEC9 |
| TSTCPUCLKI | input | TCELL16:IMUX.G1.DATA2 |
| TSTCPUCLKO | output | TCELL17:OUT.SEC8 |
| TSTDCRACKI | input | TCELL8:IMUX.G3.DATA1 |
| TSTDCRACKO | output | TCELL0:OUT.SEC10 |
| TSTDCRBUSI0 | input | TCELL9:IMUX.G2.DATA1 |
| TSTDCRBUSI1 | input | TCELL9:IMUX.G3.DATA1 |
| TSTDCRBUSI10 | input | TCELL14:IMUX.G2.DATA1 |
| TSTDCRBUSI11 | input | TCELL14:IMUX.G3.DATA1 |
| TSTDCRBUSI12 | input | TCELL15:IMUX.G2.DATA1 |
| TSTDCRBUSI13 | input | TCELL15:IMUX.G3.DATA1 |
| TSTDCRBUSI14 | input | TCELL0:IMUX.G0.DATA2 |
| TSTDCRBUSI15 | input | TCELL0:IMUX.G1.DATA2 |
| TSTDCRBUSI16 | input | TCELL1:IMUX.G0.DATA2 |
| TSTDCRBUSI17 | input | TCELL1:IMUX.G1.DATA2 |
| TSTDCRBUSI18 | input | TCELL2:IMUX.G0.DATA2 |
| TSTDCRBUSI19 | input | TCELL2:IMUX.G1.DATA2 |
| TSTDCRBUSI2 | input | TCELL10:IMUX.G2.DATA1 |
| TSTDCRBUSI20 | input | TCELL3:IMUX.G0.DATA2 |
| TSTDCRBUSI21 | input | TCELL3:IMUX.G1.DATA2 |
| TSTDCRBUSI22 | input | TCELL4:IMUX.G2.DATA1 |
| TSTDCRBUSI23 | input | TCELL4:IMUX.G3.DATA1 |
| TSTDCRBUSI24 | input | TCELL5:IMUX.G2.DATA1 |
| TSTDCRBUSI25 | input | TCELL5:IMUX.G3.DATA1 |
| TSTDCRBUSI26 | input | TCELL6:IMUX.G2.DATA1 |
| TSTDCRBUSI27 | input | TCELL6:IMUX.G3.DATA1 |
| TSTDCRBUSI28 | input | TCELL7:IMUX.G2.DATA1 |
| TSTDCRBUSI29 | input | TCELL7:IMUX.G3.DATA1 |
| TSTDCRBUSI3 | input | TCELL10:IMUX.G3.DATA1 |
| TSTDCRBUSI30 | input | TCELL8:IMUX.G0.DATA2 |
| TSTDCRBUSI31 | input | TCELL8:IMUX.G1.DATA2 |
| TSTDCRBUSI4 | input | TCELL11:IMUX.G2.DATA1 |
| TSTDCRBUSI5 | input | TCELL11:IMUX.G3.DATA1 |
| TSTDCRBUSI6 | input | TCELL12:IMUX.G2.DATA1 |
| TSTDCRBUSI7 | input | TCELL12:IMUX.G3.DATA1 |
| TSTDCRBUSI8 | input | TCELL13:IMUX.G2.DATA1 |
| TSTDCRBUSI9 | input | TCELL13:IMUX.G3.DATA1 |
| TSTDCRBUSO0 | output | TCELL0:OUT.SEC9 |
| TSTDCRBUSO1 | output | TCELL0:OUT.SEC8 |
| TSTDCRBUSO10 | output | TCELL2:OUT.TEST0 |
| TSTDCRBUSO11 | output | TCELL3:OUT.SEC10 |
| TSTDCRBUSO12 | output | TCELL3:OUT.SEC9 |
| TSTDCRBUSO13 | output | TCELL3:OUT.SEC8 |
| TSTDCRBUSO14 | output | TCELL3:OUT.TEST0 |
| TSTDCRBUSO15 | output | TCELL4:OUT.SEC10 |
| TSTDCRBUSO16 | output | TCELL4:OUT.SEC9 |
| TSTDCRBUSO17 | output | TCELL4:OUT.SEC8 |
| TSTDCRBUSO18 | output | TCELL4:OUT.TEST0 |
| TSTDCRBUSO19 | output | TCELL5:OUT.SEC10 |
| TSTDCRBUSO2 | output | TCELL0:OUT.TEST0 |
| TSTDCRBUSO20 | output | TCELL5:OUT.SEC9 |
| TSTDCRBUSO21 | output | TCELL5:OUT.SEC8 |
| TSTDCRBUSO22 | output | TCELL5:OUT.TEST0 |
| TSTDCRBUSO23 | output | TCELL6:OUT.SEC10 |
| TSTDCRBUSO24 | output | TCELL6:OUT.SEC9 |
| TSTDCRBUSO25 | output | TCELL6:OUT.SEC8 |
| TSTDCRBUSO26 | output | TCELL6:OUT.TEST0 |
| TSTDCRBUSO27 | output | TCELL7:OUT.SEC10 |
| TSTDCRBUSO28 | output | TCELL7:OUT.SEC9 |
| TSTDCRBUSO29 | output | TCELL7:OUT.SEC8 |
| TSTDCRBUSO3 | output | TCELL1:OUT.SEC10 |
| TSTDCRBUSO30 | output | TCELL7:OUT.TEST0 |
| TSTDCRBUSO31 | output | TCELL8:OUT.SEC10 |
| TSTDCRBUSO4 | output | TCELL1:OUT.SEC9 |
| TSTDCRBUSO5 | output | TCELL1:OUT.SEC8 |
| TSTDCRBUSO6 | output | TCELL1:OUT.TEST0 |
| TSTDCRBUSO7 | output | TCELL2:OUT.SEC10 |
| TSTDCRBUSO8 | output | TCELL2:OUT.SEC9 |
| TSTDCRBUSO9 | output | TCELL2:OUT.SEC8 |
| TSTDSOCMABORTOPI | input | TCELL11:IMUX.G0.DATA3 |
| TSTDSOCMABORTOPO | output | TCELL13:OUT.SEC12 |
| TSTDSOCMABORTREQI | input | TCELL11:IMUX.G1.DATA3 |
| TSTDSOCMABORTREQO | output | TCELL14:OUT.SEC12 |
| TSTDSOCMABUSI0 | input | TCELL12:IMUX.G0.DATA3 |
| TSTDSOCMABUSI1 | input | TCELL12:IMUX.G1.DATA3 |
| TSTDSOCMABUSI10 | input | TCELL1:IMUX.G0.DATA4 |
| TSTDSOCMABUSI11 | input | TCELL1:IMUX.G1.DATA4 |
| TSTDSOCMABUSI12 | input | TCELL2:IMUX.G0.DATA4 |
| TSTDSOCMABUSI13 | input | TCELL2:IMUX.G1.DATA4 |
| TSTDSOCMABUSI14 | input | TCELL3:IMUX.G0.DATA4 |
| TSTDSOCMABUSI15 | input | TCELL3:IMUX.G1.DATA4 |
| TSTDSOCMABUSI16 | input | TCELL4:IMUX.G2.DATA3 |
| TSTDSOCMABUSI17 | input | TCELL4:IMUX.G3.DATA3 |
| TSTDSOCMABUSI18 | input | TCELL5:IMUX.G2.DATA3 |
| TSTDSOCMABUSI19 | input | TCELL5:IMUX.G3.DATA3 |
| TSTDSOCMABUSI2 | input | TCELL13:IMUX.G0.DATA3 |
| TSTDSOCMABUSI20 | input | TCELL6:IMUX.G2.DATA3 |
| TSTDSOCMABUSI21 | input | TCELL6:IMUX.G3.DATA3 |
| TSTDSOCMABUSI22 | input | TCELL7:IMUX.G2.DATA3 |
| TSTDSOCMABUSI23 | input | TCELL7:IMUX.G3.DATA3 |
| TSTDSOCMABUSI24 | input | TCELL8:IMUX.G3.DATA3 |
| TSTDSOCMABUSI25 | input | TCELL8:IMUX.G0.DATA4 |
| TSTDSOCMABUSI26 | input | TCELL9:IMUX.G0.DATA4 |
| TSTDSOCMABUSI27 | input | TCELL9:IMUX.G1.DATA4 |
| TSTDSOCMABUSI28 | input | TCELL10:IMUX.G3.DATA3 |
| TSTDSOCMABUSI29 | input | TCELL10:IMUX.G0.DATA4 |
| TSTDSOCMABUSI3 | input | TCELL13:IMUX.G1.DATA3 |
| TSTDSOCMABUSI4 | input | TCELL14:IMUX.G0.DATA3 |
| TSTDSOCMABUSI5 | input | TCELL14:IMUX.G1.DATA3 |
| TSTDSOCMABUSI6 | input | TCELL15:IMUX.G0.DATA3 |
| TSTDSOCMABUSI7 | input | TCELL15:IMUX.G1.DATA3 |
| TSTDSOCMABUSI8 | input | TCELL0:IMUX.G0.DATA4 |
| TSTDSOCMABUSI9 | input | TCELL0:IMUX.G1.DATA4 |
| TSTDSOCMABUSO0 | output | TCELL41:OUT.SEC12 |
| TSTDSOCMABUSO1 | output | TCELL42:OUT.SEC12 |
| TSTDSOCMABUSO10 | output | TCELL46:OUT.SEC10 |
| TSTDSOCMABUSO11 | output | TCELL46:OUT.SEC9 |
| TSTDSOCMABUSO12 | output | TCELL46:OUT.SEC8 |
| TSTDSOCMABUSO13 | output | TCELL41:OUT.SEC11 |
| TSTDSOCMABUSO14 | output | TCELL41:OUT.SEC10 |
| TSTDSOCMABUSO15 | output | TCELL42:OUT.SEC11 |
| TSTDSOCMABUSO16 | output | TCELL42:OUT.SEC10 |
| TSTDSOCMABUSO17 | output | TCELL43:OUT.SEC11 |
| TSTDSOCMABUSO18 | output | TCELL43:OUT.SEC10 |
| TSTDSOCMABUSO19 | output | TCELL44:OUT.SEC10 |
| TSTDSOCMABUSO2 | output | TCELL43:OUT.SEC12 |
| TSTDSOCMABUSO20 | output | TCELL44:OUT.SEC9 |
| TSTDSOCMABUSO21 | output | TCELL45:OUT.TEST0 |
| TSTDSOCMABUSO22 | output | TCELL45:OUT.TEST2 |
| TSTDSOCMABUSO23 | output | TCELL46:OUT.TEST0 |
| TSTDSOCMABUSO24 | output | TCELL15:OUT.SEC12 |
| TSTDSOCMABUSO25 | output | TCELL0:OUT.SEC11 |
| TSTDSOCMABUSO26 | output | TCELL1:OUT.SEC11 |
| TSTDSOCMABUSO27 | output | TCELL2:OUT.SEC11 |
| TSTDSOCMABUSO28 | output | TCELL3:OUT.SEC11 |
| TSTDSOCMABUSO29 | output | TCELL4:OUT.SEC11 |
| TSTDSOCMABUSO3 | output | TCELL44:OUT.SEC12 |
| TSTDSOCMABUSO4 | output | TCELL44:OUT.SEC11 |
| TSTDSOCMABUSO5 | output | TCELL45:OUT.SEC11 |
| TSTDSOCMABUSO6 | output | TCELL45:OUT.SEC10 |
| TSTDSOCMABUSO7 | output | TCELL45:OUT.SEC9 |
| TSTDSOCMABUSO8 | output | TCELL45:OUT.SEC8 |
| TSTDSOCMABUSO9 | output | TCELL46:OUT.SEC11 |
| TSTDSOCMBYTEENI0 | input | TCELL11:IMUX.G2.DATA3 |
| TSTDSOCMBYTEENI1 | input | TCELL11:IMUX.G3.DATA3 |
| TSTDSOCMBYTEENI2 | input | TCELL12:IMUX.G2.DATA3 |
| TSTDSOCMBYTEENI3 | input | TCELL12:IMUX.G3.DATA3 |
| TSTDSOCMBYTEENO0 | output | TCELL5:OUT.SEC11 |
| TSTDSOCMBYTEENO1 | output | TCELL6:OUT.SEC11 |
| TSTDSOCMBYTEENO2 | output | TCELL7:OUT.SEC11 |
| TSTDSOCMBYTEENO3 | output | TCELL8:OUT.SEC11 |
| TSTDSOCMCOMPLETEI | input | TCELL9:IMUX.G0.DATA2 |
| TSTDSOCMDBUSI0 | input | TCELL6:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI1 | input | TCELL7:IMUX.G0.DATA3 |
| TSTDSOCMDBUSI2 | input | TCELL7:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI3 | input | TCELL8:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI4 | input | TCELL8:IMUX.G2.DATA3 |
| TSTDSOCMDBUSI5 | input | TCELL9:IMUX.G2.DATA3 |
| TSTDSOCMDBUSI6 | input | TCELL9:IMUX.G3.DATA3 |
| TSTDSOCMDBUSI7 | input | TCELL10:IMUX.G1.DATA3 |
| TSTDSOCMDBUSO0 | output | TCELL8:OUT.SEC9 |
| TSTDSOCMDBUSO1 | output | TCELL8:OUT.SEC8 |
| TSTDSOCMDBUSO2 | output | TCELL8:OUT.TEST0 |
| TSTDSOCMDBUSO3 | output | TCELL9:OUT.SEC10 |
| TSTDSOCMDBUSO4 | output | TCELL9:OUT.SEC9 |
| TSTDSOCMDBUSO5 | output | TCELL9:OUT.SEC8 |
| TSTDSOCMDBUSO6 | output | TCELL9:OUT.TEST0 |
| TSTDSOCMDBUSO7 | output | TCELL10:OUT.SEC10 |
| TSTDSOCMDCRACKI | input | TCELL10:IMUX.G2.DATA3 |
| TSTDSOCMDCRACKO | output | TCELL10:OUT.SEC9 |
| TSTDSOCMHOLDI | input | TCELL10:IMUX.G0.DATA2 |
| TSTDSOCMHOLDO | output | TCELL5:OUT.TEST2 |
| TSTDSOCMLOADREQI | input | TCELL13:IMUX.G2.DATA3 |
| TSTDSOCMLOADREQO | output | TCELL9:OUT.SEC11 |
| TSTDSOCMSTOREREQI | input | TCELL13:IMUX.G3.DATA3 |
| TSTDSOCMSTOREREQO | output | TCELL10:OUT.SEC11 |
| TSTDSOCMWAITI | input | TCELL14:IMUX.G2.DATA3 |
| TSTDSOCMWAITO | output | TCELL11:OUT.SEC11 |
| TSTDSOCMWRDBUSI0 | input | TCELL14:IMUX.G3.DATA3 |
| TSTDSOCMWRDBUSI1 | input | TCELL15:IMUX.G2.DATA3 |
| TSTDSOCMWRDBUSI10 | input | TCELL3:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI11 | input | TCELL4:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI12 | input | TCELL4:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI13 | input | TCELL5:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI14 | input | TCELL5:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI15 | input | TCELL6:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI16 | input | TCELL6:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI17 | input | TCELL7:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI18 | input | TCELL7:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI19 | input | TCELL8:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI2 | input | TCELL15:IMUX.G3.DATA3 |
| TSTDSOCMWRDBUSI20 | input | TCELL8:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI21 | input | TCELL9:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI22 | input | TCELL9:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI23 | input | TCELL10:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI24 | input | TCELL10:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI25 | input | TCELL11:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI26 | input | TCELL11:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI27 | input | TCELL12:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI28 | input | TCELL12:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI29 | input | TCELL13:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI3 | input | TCELL0:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI30 | input | TCELL13:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI31 | input | TCELL14:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI4 | input | TCELL0:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI5 | input | TCELL1:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI6 | input | TCELL1:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI7 | input | TCELL2:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI8 | input | TCELL2:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI9 | input | TCELL3:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSO0 | output | TCELL46:OUT.TEST2 |
| TSTDSOCMWRDBUSO1 | output | TCELL40:OUT.SEC12 |
| TSTDSOCMWRDBUSO10 | output | TCELL45:OUT.TEST4 |
| TSTDSOCMWRDBUSO11 | output | TCELL45:OUT.TEST6 |
| TSTDSOCMWRDBUSO12 | output | TCELL46:OUT.TEST4 |
| TSTDSOCMWRDBUSO13 | output | TCELL46:OUT.TEST6 |
| TSTDSOCMWRDBUSO14 | output | TCELL40:OUT.SEC11 |
| TSTDSOCMWRDBUSO15 | output | TCELL40:OUT.SEC10 |
| TSTDSOCMWRDBUSO16 | output | TCELL41:OUT.TEST0 |
| TSTDSOCMWRDBUSO17 | output | TCELL41:OUT.TEST2 |
| TSTDSOCMWRDBUSO18 | output | TCELL42:OUT.TEST0 |
| TSTDSOCMWRDBUSO19 | output | TCELL42:OUT.TEST2 |
| TSTDSOCMWRDBUSO2 | output | TCELL41:OUT.SEC9 |
| TSTDSOCMWRDBUSO20 | output | TCELL43:OUT.TEST0 |
| TSTDSOCMWRDBUSO21 | output | TCELL43:OUT.TEST2 |
| TSTDSOCMWRDBUSO22 | output | TCELL44:OUT.TEST2 |
| TSTDSOCMWRDBUSO23 | output | TCELL44:OUT.TEST4 |
| TSTDSOCMWRDBUSO24 | output | TCELL45:OUT.TEST8 |
| TSTDSOCMWRDBUSO25 | output | TCELL45:OUT.TEST10 |
| TSTDSOCMWRDBUSO26 | output | TCELL46:OUT.TEST8 |
| TSTDSOCMWRDBUSO27 | output | TCELL46:OUT.TEST10 |
| TSTDSOCMWRDBUSO28 | output | TCELL40:OUT.SEC9 |
| TSTDSOCMWRDBUSO29 | output | TCELL41:OUT.TEST4 |
| TSTDSOCMWRDBUSO3 | output | TCELL41:OUT.SEC8 |
| TSTDSOCMWRDBUSO30 | output | TCELL42:OUT.TEST4 |
| TSTDSOCMWRDBUSO31 | output | TCELL43:OUT.TEST4 |
| TSTDSOCMWRDBUSO4 | output | TCELL42:OUT.SEC9 |
| TSTDSOCMWRDBUSO5 | output | TCELL42:OUT.SEC8 |
| TSTDSOCMWRDBUSO6 | output | TCELL43:OUT.SEC9 |
| TSTDSOCMWRDBUSO7 | output | TCELL43:OUT.SEC8 |
| TSTDSOCMWRDBUSO8 | output | TCELL44:OUT.SEC8 |
| TSTDSOCMWRDBUSO9 | output | TCELL44:OUT.TEST0 |
| TSTDSOCMXLATEVALIDI | input | TCELL14:IMUX.G1.DATA4 |
| TSTDSOCMXLATEVALIDO | output | TCELL12:OUT.SEC11 |
| TSTISOCMABORTI | input | TCELL27:IMUX.G3.DATA2 |
| TSTISOCMABORTO | output | TCELL32:OUT.TEST2 |
| TSTISOCMABUSI0 | input | TCELL17:IMUX.G0.DATA3 |
| TSTISOCMABUSI1 | input | TCELL17:IMUX.G1.DATA3 |
| TSTISOCMABUSI10 | input | TCELL20:IMUX.G1.DATA3 |
| TSTISOCMABUSI11 | input | TCELL21:IMUX.G1.DATA3 |
| TSTISOCMABUSI12 | input | TCELL21:IMUX.G2.DATA3 |
| TSTISOCMABUSI13 | input | TCELL22:IMUX.G2.DATA3 |
| TSTISOCMABUSI14 | input | TCELL22:IMUX.G3.DATA3 |
| TSTISOCMABUSI15 | input | TCELL22:IMUX.G0.DATA4 |
| TSTISOCMABUSI16 | input | TCELL23:IMUX.G1.DATA3 |
| TSTISOCMABUSI17 | input | TCELL23:IMUX.G2.DATA3 |
| TSTISOCMABUSI18 | input | TCELL23:IMUX.G3.DATA3 |
| TSTISOCMABUSI19 | input | TCELL24:IMUX.G1.DATA3 |
| TSTISOCMABUSI2 | input | TCELL18:IMUX.G3.DATA2 |
| TSTISOCMABUSI20 | input | TCELL24:IMUX.G2.DATA3 |
| TSTISOCMABUSI21 | input | TCELL24:IMUX.G3.DATA3 |
| TSTISOCMABUSI22 | input | TCELL25:IMUX.G1.DATA3 |
| TSTISOCMABUSI23 | input | TCELL25:IMUX.G2.DATA3 |
| TSTISOCMABUSI24 | input | TCELL25:IMUX.G3.DATA3 |
| TSTISOCMABUSI25 | input | TCELL26:IMUX.G2.DATA2 |
| TSTISOCMABUSI26 | input | TCELL26:IMUX.G3.DATA2 |
| TSTISOCMABUSI27 | input | TCELL26:IMUX.G0.DATA3 |
| TSTISOCMABUSI28 | input | TCELL26:IMUX.G1.DATA3 |
| TSTISOCMABUSI29 | input | TCELL27:IMUX.G2.DATA2 |
| TSTISOCMABUSI3 | input | TCELL18:IMUX.G0.DATA3 |
| TSTISOCMABUSI4 | input | TCELL18:IMUX.G1.DATA3 |
| TSTISOCMABUSI5 | input | TCELL19:IMUX.G2.DATA2 |
| TSTISOCMABUSI6 | input | TCELL19:IMUX.G3.DATA2 |
| TSTISOCMABUSI7 | input | TCELL19:IMUX.G0.DATA3 |
| TSTISOCMABUSI8 | input | TCELL20:IMUX.G3.DATA2 |
| TSTISOCMABUSI9 | input | TCELL20:IMUX.G0.DATA3 |
| TSTISOCMABUSO0 | output | TCELL32:OUT.SEC8 |
| TSTISOCMABUSO1 | output | TCELL33:OUT.SEC13 |
| TSTISOCMABUSO10 | output | TCELL35:OUT.SEC14 |
| TSTISOCMABUSO11 | output | TCELL35:OUT.SEC13 |
| TSTISOCMABUSO12 | output | TCELL35:OUT.SEC12 |
| TSTISOCMABUSO13 | output | TCELL36:OUT.SEC15 |
| TSTISOCMABUSO14 | output | TCELL36:OUT.SEC14 |
| TSTISOCMABUSO15 | output | TCELL36:OUT.SEC13 |
| TSTISOCMABUSO16 | output | TCELL36:OUT.SEC12 |
| TSTISOCMABUSO17 | output | TCELL37:OUT.SEC15 |
| TSTISOCMABUSO18 | output | TCELL37:OUT.SEC14 |
| TSTISOCMABUSO19 | output | TCELL37:OUT.SEC13 |
| TSTISOCMABUSO2 | output | TCELL33:OUT.SEC12 |
| TSTISOCMABUSO20 | output | TCELL37:OUT.SEC12 |
| TSTISOCMABUSO21 | output | TCELL38:OUT.SEC11 |
| TSTISOCMABUSO22 | output | TCELL38:OUT.SEC10 |
| TSTISOCMABUSO23 | output | TCELL38:OUT.SEC9 |
| TSTISOCMABUSO24 | output | TCELL38:OUT.SEC8 |
| TSTISOCMABUSO25 | output | TCELL39:OUT.SEC14 |
| TSTISOCMABUSO26 | output | TCELL39:OUT.SEC13 |
| TSTISOCMABUSO27 | output | TCELL39:OUT.SEC12 |
| TSTISOCMABUSO28 | output | TCELL39:OUT.SEC11 |
| TSTISOCMABUSO29 | output | TCELL32:OUT.TEST0 |
| TSTISOCMABUSO3 | output | TCELL33:OUT.SEC11 |
| TSTISOCMABUSO4 | output | TCELL33:OUT.SEC10 |
| TSTISOCMABUSO5 | output | TCELL34:OUT.SEC12 |
| TSTISOCMABUSO6 | output | TCELL34:OUT.SEC11 |
| TSTISOCMABUSO7 | output | TCELL34:OUT.SEC10 |
| TSTISOCMABUSO8 | output | TCELL34:OUT.SEC9 |
| TSTISOCMABUSO9 | output | TCELL35:OUT.SEC15 |
| TSTISOCMHOLDI | input | TCELL18:IMUX.G1.DATA2 |
| TSTISOCMHOLDO | output | TCELL18:OUT.SEC10 |
| TSTISOCMICUREADYI | input | TCELL17:IMUX.G3.DATA2 |
| TSTISOCMICUREADYO | output | TCELL32:OUT.SEC9 |
| TSTISOCMRDATAI0 | input | TCELL21:IMUX.G3.DATA2 |
| TSTISOCMRDATAI1 | input | TCELL22:IMUX.G0.DATA3 |
| TSTISOCMRDATAI10 | input | TCELL31:IMUX.G1.DATA2 |
| TSTISOCMRDATAI11 | input | TCELL16:IMUX.G2.DATA2 |
| TSTISOCMRDATAI12 | input | TCELL17:IMUX.G2.DATA2 |
| TSTISOCMRDATAI13 | input | TCELL18:IMUX.G2.DATA2 |
| TSTISOCMRDATAI14 | input | TCELL19:IMUX.G1.DATA2 |
| TSTISOCMRDATAI15 | input | TCELL20:IMUX.G2.DATA2 |
| TSTISOCMRDATAI16 | input | TCELL21:IMUX.G0.DATA3 |
| TSTISOCMRDATAI17 | input | TCELL32:IMUX.G0.DATA4 |
| TSTISOCMRDATAI18 | input | TCELL32:IMUX.G1.DATA4 |
| TSTISOCMRDATAI19 | input | TCELL32:IMUX.G2.DATA4 |
| TSTISOCMRDATAI2 | input | TCELL23:IMUX.G0.DATA3 |
| TSTISOCMRDATAI20 | input | TCELL32:IMUX.G3.DATA4 |
| TSTISOCMRDATAI21 | input | TCELL33:IMUX.G0.DATA4 |
| TSTISOCMRDATAI22 | input | TCELL33:IMUX.G1.DATA4 |
| TSTISOCMRDATAI23 | input | TCELL33:IMUX.G2.DATA4 |
| TSTISOCMRDATAI24 | input | TCELL33:IMUX.G3.DATA4 |
| TSTISOCMRDATAI25 | input | TCELL34:IMUX.G2.DATA0 |
| TSTISOCMRDATAI26 | input | TCELL34:IMUX.G3.DATA0 |
| TSTISOCMRDATAI27 | input | TCELL34:IMUX.G0.DATA1 |
| TSTISOCMRDATAI28 | input | TCELL34:IMUX.G1.DATA1 |
| TSTISOCMRDATAI29 | input | TCELL35:IMUX.G0.DATA0 |
| TSTISOCMRDATAI3 | input | TCELL24:IMUX.G0.DATA3 |
| TSTISOCMRDATAI30 | input | TCELL35:IMUX.G1.DATA0 |
| TSTISOCMRDATAI31 | input | TCELL35:IMUX.G2.DATA0 |
| TSTISOCMRDATAI32 | input | TCELL35:IMUX.G3.DATA0 |
| TSTISOCMRDATAI33 | input | TCELL36:IMUX.G1.DATA0 |
| TSTISOCMRDATAI34 | input | TCELL36:IMUX.G2.DATA0 |
| TSTISOCMRDATAI35 | input | TCELL36:IMUX.G3.DATA0 |
| TSTISOCMRDATAI36 | input | TCELL36:IMUX.G0.DATA1 |
| TSTISOCMRDATAI37 | input | TCELL37:IMUX.G2.DATA0 |
| TSTISOCMRDATAI38 | input | TCELL37:IMUX.G3.DATA0 |
| TSTISOCMRDATAI39 | input | TCELL37:IMUX.G0.DATA1 |
| TSTISOCMRDATAI4 | input | TCELL25:IMUX.G0.DATA3 |
| TSTISOCMRDATAI40 | input | TCELL37:IMUX.G1.DATA1 |
| TSTISOCMRDATAI41 | input | TCELL38:IMUX.G0.DATA4 |
| TSTISOCMRDATAI42 | input | TCELL38:IMUX.G1.DATA4 |
| TSTISOCMRDATAI43 | input | TCELL38:IMUX.G2.DATA4 |
| TSTISOCMRDATAI44 | input | TCELL38:IMUX.G3.DATA4 |
| TSTISOCMRDATAI45 | input | TCELL39:IMUX.G0.DATA4 |
| TSTISOCMRDATAI46 | input | TCELL39:IMUX.G1.DATA4 |
| TSTISOCMRDATAI47 | input | TCELL39:IMUX.G2.DATA4 |
| TSTISOCMRDATAI48 | input | TCELL39:IMUX.G3.DATA4 |
| TSTISOCMRDATAI49 | input | TCELL32:IMUX.G0.DATA5 |
| TSTISOCMRDATAI5 | input | TCELL26:IMUX.G1.DATA2 |
| TSTISOCMRDATAI50 | input | TCELL32:IMUX.G1.DATA5 |
| TSTISOCMRDATAI51 | input | TCELL33:IMUX.G0.DATA5 |
| TSTISOCMRDATAI52 | input | TCELL33:IMUX.G1.DATA5 |
| TSTISOCMRDATAI53 | input | TCELL34:IMUX.G2.DATA1 |
| TSTISOCMRDATAI54 | input | TCELL34:IMUX.G3.DATA1 |
| TSTISOCMRDATAI55 | input | TCELL35:IMUX.G0.DATA1 |
| TSTISOCMRDATAI56 | input | TCELL35:IMUX.G1.DATA1 |
| TSTISOCMRDATAI57 | input | TCELL36:IMUX.G1.DATA1 |
| TSTISOCMRDATAI58 | input | TCELL36:IMUX.G2.DATA1 |
| TSTISOCMRDATAI59 | input | TCELL37:IMUX.G2.DATA1 |
| TSTISOCMRDATAI6 | input | TCELL27:IMUX.G1.DATA2 |
| TSTISOCMRDATAI60 | input | TCELL37:IMUX.G3.DATA1 |
| TSTISOCMRDATAI61 | input | TCELL38:IMUX.G0.DATA5 |
| TSTISOCMRDATAI62 | input | TCELL38:IMUX.G1.DATA5 |
| TSTISOCMRDATAI63 | input | TCELL39:IMUX.G0.DATA5 |
| TSTISOCMRDATAI7 | input | TCELL28:IMUX.G1.DATA2 |
| TSTISOCMRDATAI8 | input | TCELL29:IMUX.G1.DATA2 |
| TSTISOCMRDATAI9 | input | TCELL30:IMUX.G1.DATA2 |
| TSTISOCMRDATAO0 | output | TCELL18:OUT.TEST0 |
| TSTISOCMRDATAO1 | output | TCELL19:OUT.SEC10 |
| TSTISOCMRDATAO10 | output | TCELL21:OUT.SEC10 |
| TSTISOCMRDATAO11 | output | TCELL21:OUT.SEC9 |
| TSTISOCMRDATAO12 | output | TCELL21:OUT.SEC8 |
| TSTISOCMRDATAO13 | output | TCELL22:OUT.SEC11 |
| TSTISOCMRDATAO14 | output | TCELL22:OUT.SEC10 |
| TSTISOCMRDATAO15 | output | TCELL22:OUT.SEC9 |
| TSTISOCMRDATAO16 | output | TCELL22:OUT.SEC8 |
| TSTISOCMRDATAO17 | output | TCELL23:OUT.SEC11 |
| TSTISOCMRDATAO18 | output | TCELL23:OUT.SEC10 |
| TSTISOCMRDATAO19 | output | TCELL23:OUT.SEC9 |
| TSTISOCMRDATAO2 | output | TCELL19:OUT.SEC9 |
| TSTISOCMRDATAO20 | output | TCELL23:OUT.SEC8 |
| TSTISOCMRDATAO21 | output | TCELL24:OUT.SEC11 |
| TSTISOCMRDATAO22 | output | TCELL24:OUT.SEC10 |
| TSTISOCMRDATAO23 | output | TCELL24:OUT.SEC9 |
| TSTISOCMRDATAO24 | output | TCELL24:OUT.SEC8 |
| TSTISOCMRDATAO25 | output | TCELL25:OUT.SEC11 |
| TSTISOCMRDATAO26 | output | TCELL25:OUT.SEC10 |
| TSTISOCMRDATAO27 | output | TCELL25:OUT.SEC9 |
| TSTISOCMRDATAO28 | output | TCELL25:OUT.SEC8 |
| TSTISOCMRDATAO29 | output | TCELL26:OUT.SEC11 |
| TSTISOCMRDATAO3 | output | TCELL19:OUT.SEC8 |
| TSTISOCMRDATAO30 | output | TCELL26:OUT.SEC10 |
| TSTISOCMRDATAO31 | output | TCELL26:OUT.SEC9 |
| TSTISOCMRDATAO32 | output | TCELL26:OUT.SEC8 |
| TSTISOCMRDATAO33 | output | TCELL27:OUT.SEC11 |
| TSTISOCMRDATAO34 | output | TCELL27:OUT.SEC10 |
| TSTISOCMRDATAO35 | output | TCELL27:OUT.SEC9 |
| TSTISOCMRDATAO36 | output | TCELL27:OUT.SEC8 |
| TSTISOCMRDATAO37 | output | TCELL28:OUT.SEC11 |
| TSTISOCMRDATAO38 | output | TCELL28:OUT.SEC10 |
| TSTISOCMRDATAO39 | output | TCELL28:OUT.SEC9 |
| TSTISOCMRDATAO4 | output | TCELL19:OUT.TEST0 |
| TSTISOCMRDATAO40 | output | TCELL28:OUT.SEC8 |
| TSTISOCMRDATAO41 | output | TCELL29:OUT.SEC11 |
| TSTISOCMRDATAO42 | output | TCELL29:OUT.SEC10 |
| TSTISOCMRDATAO43 | output | TCELL29:OUT.SEC9 |
| TSTISOCMRDATAO44 | output | TCELL29:OUT.SEC8 |
| TSTISOCMRDATAO45 | output | TCELL30:OUT.SEC11 |
| TSTISOCMRDATAO46 | output | TCELL30:OUT.SEC10 |
| TSTISOCMRDATAO47 | output | TCELL30:OUT.SEC9 |
| TSTISOCMRDATAO48 | output | TCELL30:OUT.SEC8 |
| TSTISOCMRDATAO49 | output | TCELL31:OUT.SEC11 |
| TSTISOCMRDATAO5 | output | TCELL20:OUT.SEC11 |
| TSTISOCMRDATAO50 | output | TCELL31:OUT.SEC10 |
| TSTISOCMRDATAO51 | output | TCELL31:OUT.SEC9 |
| TSTISOCMRDATAO52 | output | TCELL31:OUT.SEC8 |
| TSTISOCMRDATAO53 | output | TCELL16:OUT.TEST2 |
| TSTISOCMRDATAO54 | output | TCELL16:OUT.TEST4 |
| TSTISOCMRDATAO55 | output | TCELL17:OUT.TEST2 |
| TSTISOCMRDATAO56 | output | TCELL17:OUT.TEST4 |
| TSTISOCMRDATAO57 | output | TCELL18:OUT.TEST2 |
| TSTISOCMRDATAO58 | output | TCELL18:OUT.TEST4 |
| TSTISOCMRDATAO59 | output | TCELL19:OUT.TEST2 |
| TSTISOCMRDATAO6 | output | TCELL20:OUT.SEC10 |
| TSTISOCMRDATAO60 | output | TCELL19:OUT.TEST4 |
| TSTISOCMRDATAO61 | output | TCELL20:OUT.TEST0 |
| TSTISOCMRDATAO62 | output | TCELL20:OUT.TEST2 |
| TSTISOCMRDATAO63 | output | TCELL21:OUT.TEST0 |
| TSTISOCMRDATAO7 | output | TCELL20:OUT.SEC9 |
| TSTISOCMRDATAO8 | output | TCELL20:OUT.SEC8 |
| TSTISOCMRDATAO9 | output | TCELL21:OUT.SEC11 |
| TSTISOCMRDDVALIDI0 | input | TCELL19:IMUX.G0.DATA2 |
| TSTISOCMRDDVALIDI1 | input | TCELL20:IMUX.G1.DATA2 |
| TSTISOCMRDDVALIDO0 | output | TCELL18:OUT.SEC9 |
| TSTISOCMRDDVALIDO1 | output | TCELL18:OUT.SEC8 |
| TSTISOCMREQPENDI | input | TCELL16:IMUX.G0.DATA3 |
| TSTISOCMREQPENDO | output | TCELL32:OUT.SEC10 |
| TSTISOCMXLATEVALIDI | input | TCELL16:IMUX.G3.DATA2 |
| TSTISOCMXLATEVALIDO | output | TCELL32:OUT.SEC11 |
| TSTISOPFWDI | input | TCELL9:IMUX.G1.DATA2 |
| TSTISOPFWDO | output | TCELL5:OUT.TEST4 |
| TSTJTAGENI | input | TCELL28:IMUX.G0.DATA2 |
| TSTJTAGENO | output | TCELL16:OUT.TEST0 |
| TSTOCMCOMPLETEO | output | TCELL6:OUT.TEST2 |
| TSTPLBSAMPLECYCLEI | input | TCELL22:IMUX.G1.DATA3 |
| TSTPLBSAMPLECYCLEO | output | TCELL21:OUT.TEST2 |
| TSTRDDBUSI0 | input | TCELL10:IMUX.G1.DATA2 |
| TSTRDDBUSI1 | input | TCELL11:IMUX.G0.DATA2 |
| TSTRDDBUSI10 | input | TCELL15:IMUX.G1.DATA2 |
| TSTRDDBUSI11 | input | TCELL0:IMUX.G2.DATA2 |
| TSTRDDBUSI12 | input | TCELL0:IMUX.G3.DATA2 |
| TSTRDDBUSI13 | input | TCELL1:IMUX.G2.DATA2 |
| TSTRDDBUSI14 | input | TCELL1:IMUX.G3.DATA2 |
| TSTRDDBUSI15 | input | TCELL2:IMUX.G2.DATA2 |
| TSTRDDBUSI16 | input | TCELL2:IMUX.G3.DATA2 |
| TSTRDDBUSI17 | input | TCELL3:IMUX.G2.DATA2 |
| TSTRDDBUSI18 | input | TCELL3:IMUX.G3.DATA2 |
| TSTRDDBUSI19 | input | TCELL4:IMUX.G0.DATA2 |
| TSTRDDBUSI2 | input | TCELL11:IMUX.G1.DATA2 |
| TSTRDDBUSI20 | input | TCELL4:IMUX.G1.DATA2 |
| TSTRDDBUSI21 | input | TCELL5:IMUX.G0.DATA2 |
| TSTRDDBUSI22 | input | TCELL5:IMUX.G1.DATA2 |
| TSTRDDBUSI23 | input | TCELL6:IMUX.G0.DATA2 |
| TSTRDDBUSI24 | input | TCELL6:IMUX.G1.DATA2 |
| TSTRDDBUSI25 | input | TCELL7:IMUX.G0.DATA2 |
| TSTRDDBUSI26 | input | TCELL7:IMUX.G1.DATA2 |
| TSTRDDBUSI27 | input | TCELL8:IMUX.G2.DATA2 |
| TSTRDDBUSI28 | input | TCELL8:IMUX.G3.DATA2 |
| TSTRDDBUSI29 | input | TCELL9:IMUX.G2.DATA2 |
| TSTRDDBUSI3 | input | TCELL12:IMUX.G0.DATA2 |
| TSTRDDBUSI30 | input | TCELL9:IMUX.G3.DATA2 |
| TSTRDDBUSI31 | input | TCELL10:IMUX.G2.DATA2 |
| TSTRDDBUSI4 | input | TCELL12:IMUX.G1.DATA2 |
| TSTRDDBUSI5 | input | TCELL13:IMUX.G0.DATA2 |
| TSTRDDBUSI6 | input | TCELL13:IMUX.G1.DATA2 |
| TSTRDDBUSI7 | input | TCELL14:IMUX.G0.DATA2 |
| TSTRDDBUSI8 | input | TCELL14:IMUX.G1.DATA2 |
| TSTRDDBUSI9 | input | TCELL15:IMUX.G0.DATA2 |
| TSTRDDBUSO0 | output | TCELL10:OUT.SEC8 |
| TSTRDDBUSO1 | output | TCELL10:OUT.TEST0 |
| TSTRDDBUSO10 | output | TCELL13:OUT.SEC11 |
| TSTRDDBUSO11 | output | TCELL13:OUT.SEC10 |
| TSTRDDBUSO12 | output | TCELL13:OUT.SEC9 |
| TSTRDDBUSO13 | output | TCELL13:OUT.SEC8 |
| TSTRDDBUSO14 | output | TCELL14:OUT.SEC11 |
| TSTRDDBUSO15 | output | TCELL14:OUT.SEC10 |
| TSTRDDBUSO16 | output | TCELL14:OUT.SEC9 |
| TSTRDDBUSO17 | output | TCELL14:OUT.SEC8 |
| TSTRDDBUSO18 | output | TCELL15:OUT.SEC11 |
| TSTRDDBUSO19 | output | TCELL15:OUT.SEC10 |
| TSTRDDBUSO2 | output | TCELL11:OUT.SEC10 |
| TSTRDDBUSO20 | output | TCELL15:OUT.SEC9 |
| TSTRDDBUSO21 | output | TCELL15:OUT.SEC8 |
| TSTRDDBUSO22 | output | TCELL0:OUT.TEST2 |
| TSTRDDBUSO23 | output | TCELL0:OUT.TEST4 |
| TSTRDDBUSO24 | output | TCELL1:OUT.TEST2 |
| TSTRDDBUSO25 | output | TCELL1:OUT.TEST4 |
| TSTRDDBUSO26 | output | TCELL2:OUT.TEST2 |
| TSTRDDBUSO27 | output | TCELL2:OUT.TEST4 |
| TSTRDDBUSO28 | output | TCELL3:OUT.TEST2 |
| TSTRDDBUSO29 | output | TCELL3:OUT.TEST4 |
| TSTRDDBUSO3 | output | TCELL11:OUT.SEC9 |
| TSTRDDBUSO30 | output | TCELL4:OUT.TEST2 |
| TSTRDDBUSO31 | output | TCELL4:OUT.TEST4 |
| TSTRDDBUSO4 | output | TCELL11:OUT.SEC8 |
| TSTRDDBUSO5 | output | TCELL11:OUT.TEST0 |
| TSTRDDBUSO6 | output | TCELL12:OUT.SEC10 |
| TSTRDDBUSO7 | output | TCELL12:OUT.SEC9 |
| TSTRDDBUSO8 | output | TCELL12:OUT.SEC8 |
| TSTRDDBUSO9 | output | TCELL12:OUT.TEST0 |
| TSTRESETCHIPI | input | TCELL16:IMUX.G0.DATA2 |
| TSTRESETCHIPO | output | TCELL16:OUT.SEC10 |
| TSTRESETCOREI | input | TCELL21:IMUX.G2.DATA2 |
| TSTRESETCOREO | output | TCELL16:OUT.SEC9 |
| TSTRESETSYSI | input | TCELL27:IMUX.G0.DATA2 |
| TSTRESETSYSO | output | TCELL16:OUT.SEC8 |
| TSTTIMERENI | input | TCELL29:IMUX.G0.DATA2 |
| TSTTIMERENO | output | TCELL17:OUT.SEC10 |
| TSTTRSTNEGI | input | TCELL42:IMUX.G2.DATA0 |
| TSTTRSTNEGO | output | TCELL28:OUT.TEST0 |
Bel wires
| Wire | Pins |
|---|---|
| TCELL0:IMUX.G0.DATA0 | PPC405.APUC405DCDAPUOP |
| TCELL0:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT21 |
| TCELL0:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI14 |
| TCELL0:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI0 |
| TCELL0:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI8 |
| TCELL0:IMUX.G1.DATA0 | PPC405.APUC405DCDCREN |
| TCELL0:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT22 |
| TCELL0:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI15 |
| TCELL0:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI1 |
| TCELL0:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI9 |
| TCELL0:IMUX.G2.DATA0 | PPC405.APUC405DCDFORCEALGN |
| TCELL0:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN14 |
| TCELL0:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI11 |
| TCELL0:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI21 |
| TCELL0:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI3 |
| TCELL0:IMUX.G3.DATA0 | PPC405.APUC405DCDFORCEBESTEERING |
| TCELL0:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN15 |
| TCELL0:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI12 |
| TCELL0:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI22 |
| TCELL0:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI4 |
| TCELL0:OUT.FAN0 | PPC405.C405APUDCDFULL |
| TCELL0:OUT.FAN1 | PPC405.C405APUDCDHOLD |
| TCELL0:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION0 |
| TCELL0:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION1 |
| TCELL0:OUT.FAN4 | PPC405.C405APUEXELOADDBUS28 |
| TCELL0:OUT.FAN5 | PPC405.C405APUEXELOADDBUS29 |
| TCELL0:OUT.FAN6 | PPC405.C405APUEXERADATA27 |
| TCELL0:OUT.FAN7 | PPC405.C405APUEXERADATA28 |
| TCELL0:OUT.SEC8 | PPC405.TSTDCRBUSO1 |
| TCELL0:OUT.SEC9 | PPC405.TSTDCRBUSO0 |
| TCELL0:OUT.SEC10 | PPC405.TSTDCRACKO |
| TCELL0:OUT.SEC11 | PPC405.TSTDSOCMABUSO25 |
| TCELL0:OUT.SEC12 | PPC405.C405DCRDBUSOUT21 |
| TCELL0:OUT.SEC13 | PPC405.C405DCRDBUSOUT5 |
| TCELL0:OUT.SEC14 | PPC405.C405APUEXERBDATA28 |
| TCELL0:OUT.SEC15 | PPC405.C405APUEXERBDATA27 |
| TCELL0:OUT.TEST0 | PPC405.TSTDCRBUSO2 |
| TCELL0:OUT.TEST2 | PPC405.TSTRDDBUSO22 |
| TCELL0:OUT.TEST4 | PPC405.TSTRDDBUSO23 |
| TCELL1:IMUX.G0.DATA0 | PPC405.APUC405DCDFPUOP |
| TCELL1:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT23 |
| TCELL1:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI16 |
| TCELL1:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI2 |
| TCELL1:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI10 |
| TCELL1:IMUX.G1.DATA0 | PPC405.APUC405DCDGPRWRITE |
| TCELL1:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT24 |
| TCELL1:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI17 |
| TCELL1:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI3 |
| TCELL1:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI11 |
| TCELL1:IMUX.G2.DATA0 | PPC405.APUC405DCDLDSTBYTE |
| TCELL1:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN16 |
| TCELL1:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI13 |
| TCELL1:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI23 |
| TCELL1:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI5 |
| TCELL1:IMUX.G3.DATA0 | PPC405.APUC405DCDLDSTDW |
| TCELL1:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN17 |
| TCELL1:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI14 |
| TCELL1:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI24 |
| TCELL1:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI6 |
| TCELL1:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION2 |
| TCELL1:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION3 |
| TCELL1:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION4 |
| TCELL1:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION5 |
| TCELL1:OUT.FAN4 | PPC405.C405APUEXELOADDBUS30 |
| TCELL1:OUT.FAN5 | PPC405.C405APUEXELOADDBUS31 |
| TCELL1:OUT.FAN6 | PPC405.C405APUEXERADATA29 |
| TCELL1:OUT.FAN7 | PPC405.C405APUEXERADATA30 |
| TCELL1:OUT.SEC8 | PPC405.TSTDCRBUSO5 |
| TCELL1:OUT.SEC9 | PPC405.TSTDCRBUSO4 |
| TCELL1:OUT.SEC10 | PPC405.TSTDCRBUSO3 |
| TCELL1:OUT.SEC11 | PPC405.TSTDSOCMABUSO26 |
| TCELL1:OUT.SEC12 | PPC405.C405DCRDBUSOUT22 |
| TCELL1:OUT.SEC13 | PPC405.C405DCRDBUSOUT6 |
| TCELL1:OUT.SEC14 | PPC405.C405APUEXERBDATA30 |
| TCELL1:OUT.SEC15 | PPC405.C405APUEXERBDATA29 |
| TCELL1:OUT.TEST0 | PPC405.TSTDCRBUSO6 |
| TCELL1:OUT.TEST2 | PPC405.TSTRDDBUSO24 |
| TCELL1:OUT.TEST4 | PPC405.TSTRDDBUSO25 |
| TCELL2:IMUX.G0.DATA0 | PPC405.APUC405DCDLDSTHW |
| TCELL2:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT25 |
| TCELL2:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI18 |
| TCELL2:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI4 |
| TCELL2:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI12 |
| TCELL2:IMUX.G1.DATA0 | PPC405.APUC405DCDLDSTQW |
| TCELL2:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT26 |
| TCELL2:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI19 |
| TCELL2:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI5 |
| TCELL2:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI13 |
| TCELL2:IMUX.G2.DATA0 | PPC405.APUC405DCDLDSTWD |
| TCELL2:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN18 |
| TCELL2:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI15 |
| TCELL2:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI25 |
| TCELL2:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI7 |
| TCELL2:IMUX.G3.DATA0 | PPC405.APUC405DCDLOAD |
| TCELL2:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN19 |
| TCELL2:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI16 |
| TCELL2:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI26 |
| TCELL2:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI8 |
| TCELL2:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION6 |
| TCELL2:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION7 |
| TCELL2:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION8 |
| TCELL2:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION9 |
| TCELL2:OUT.FAN4 | PPC405.C405APUEXELOADDVALID |
| TCELL2:OUT.FAN5 | PPC405.C405APUEXERADATA0 |
| TCELL2:OUT.FAN6 | PPC405.C405APUEXERADATA31 |
| TCELL2:OUT.FAN7 | PPC405.C405APUEXERBDATA0 |
| TCELL2:OUT.SEC8 | PPC405.TSTDCRBUSO9 |
| TCELL2:OUT.SEC9 | PPC405.TSTDCRBUSO8 |
| TCELL2:OUT.SEC10 | PPC405.TSTDCRBUSO7 |
| TCELL2:OUT.SEC11 | PPC405.TSTDSOCMABUSO27 |
| TCELL2:OUT.SEC12 | PPC405.C405DCRDBUSOUT23 |
| TCELL2:OUT.SEC13 | PPC405.C405DCRDBUSOUT7 |
| TCELL2:OUT.SEC14 | PPC405.C405APUEXEWDCNT0 |
| TCELL2:OUT.SEC15 | PPC405.C405APUEXERBDATA31 |
| TCELL2:OUT.TEST0 | PPC405.TSTDCRBUSO10 |
| TCELL2:OUT.TEST2 | PPC405.TSTRDDBUSO26 |
| TCELL2:OUT.TEST4 | PPC405.TSTRDDBUSO27 |
| TCELL3:IMUX.G0.DATA0 | PPC405.APUC405DCDPRIVOP |
| TCELL3:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT27 |
| TCELL3:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI20 |
| TCELL3:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI6 |
| TCELL3:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI14 |
| TCELL3:IMUX.G1.DATA0 | PPC405.APUC405DCDRAEN |
| TCELL3:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT28 |
| TCELL3:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI21 |
| TCELL3:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI7 |
| TCELL3:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI15 |
| TCELL3:IMUX.G2.DATA0 | PPC405.APUC405DCDRBEN |
| TCELL3:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN20 |
| TCELL3:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI17 |
| TCELL3:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI27 |
| TCELL3:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI9 |
| TCELL3:IMUX.G3.DATA0 | PPC405.APUC405DCDSTORE |
| TCELL3:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN21 |
| TCELL3:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI18 |
| TCELL3:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI28 |
| TCELL3:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI10 |
| TCELL3:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION10 |
| TCELL3:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION11 |
| TCELL3:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION12 |
| TCELL3:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION13 |
| TCELL3:OUT.FAN4 | PPC405.C405APUEXERADATA1 |
| TCELL3:OUT.FAN5 | PPC405.C405APUEXERADATA2 |
| TCELL3:OUT.FAN6 | PPC405.C405APUEXERBDATA1 |
| TCELL3:OUT.FAN7 | PPC405.C405APUEXERBDATA2 |
| TCELL3:OUT.SEC8 | PPC405.TSTDCRBUSO13 |
| TCELL3:OUT.SEC9 | PPC405.TSTDCRBUSO12 |
| TCELL3:OUT.SEC10 | PPC405.TSTDCRBUSO11 |
| TCELL3:OUT.SEC11 | PPC405.TSTDSOCMABUSO28 |
| TCELL3:OUT.SEC12 | PPC405.C405DCRDBUSOUT24 |
| TCELL3:OUT.SEC13 | PPC405.C405DCRDBUSOUT8 |
| TCELL3:OUT.SEC14 | PPC405.C405APUMSRFE0 |
| TCELL3:OUT.SEC15 | PPC405.C405APUEXEWDCNT1 |
| TCELL3:OUT.TEST0 | PPC405.TSTDCRBUSO14 |
| TCELL3:OUT.TEST2 | PPC405.TSTRDDBUSO28 |
| TCELL3:OUT.TEST4 | PPC405.TSTRDDBUSO29 |
| TCELL4:IMUX.TI0 | PPC405.TIEC405APUDIVEN |
| TCELL4:IMUX.TI1 | PPC405.TIEC405APUPRESENT |
| TCELL4:IMUX.G0.DATA0 | PPC405.APUC405DCDTRAPBE |
| TCELL4:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN22 |
| TCELL4:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI19 |
| TCELL4:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI29 |
| TCELL4:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI11 |
| TCELL4:IMUX.G1.DATA0 | PPC405.APUC405DCDTRAPLE |
| TCELL4:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN23 |
| TCELL4:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI20 |
| TCELL4:IMUX.G1.DATA3 | PPC405.TSTC405DCRDBUSOUTI30 |
| TCELL4:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI12 |
| TCELL4:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT29 |
| TCELL4:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI22 |
| TCELL4:IMUX.G2.DATA2 | PPC405.TSTC405DCRABUSI8 |
| TCELL4:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI16 |
| TCELL4:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT30 |
| TCELL4:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI23 |
| TCELL4:IMUX.G3.DATA2 | PPC405.TSTC405DCRABUSI9 |
| TCELL4:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI17 |
| TCELL4:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION14 |
| TCELL4:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION15 |
| TCELL4:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION16 |
| TCELL4:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION17 |
| TCELL4:OUT.FAN4 | PPC405.C405APUEXERADATA3 |
| TCELL4:OUT.FAN5 | PPC405.C405APUEXERADATA4 |
| TCELL4:OUT.FAN6 | PPC405.C405APUEXERBDATA3 |
| TCELL4:OUT.FAN7 | PPC405.C405APUEXERBDATA4 |
| TCELL4:OUT.SEC8 | PPC405.TSTDCRBUSO17 |
| TCELL4:OUT.SEC9 | PPC405.TSTDCRBUSO16 |
| TCELL4:OUT.SEC10 | PPC405.TSTDCRBUSO15 |
| TCELL4:OUT.SEC11 | PPC405.TSTDSOCMABUSO29 |
| TCELL4:OUT.SEC12 | PPC405.C405DCRDBUSOUT25 |
| TCELL4:OUT.SEC13 | PPC405.C405DCRDBUSOUT9 |
| TCELL4:OUT.SEC14 | PPC405.C405APUWBBYTEEN0 |
| TCELL4:OUT.SEC15 | PPC405.C405APUMSRFE1 |
| TCELL4:OUT.TEST0 | PPC405.TSTDCRBUSO18 |
| TCELL4:OUT.TEST2 | PPC405.TSTRDDBUSO30 |
| TCELL4:OUT.TEST4 | PPC405.TSTRDDBUSO31 |
| TCELL5:IMUX.TI0 | PPC405.TIEUTLBTAP1 |
| TCELL5:IMUX.TI1 | PPC405.TIEUTLBTAP2 |
| TCELL5:IMUX.G0.DATA0 | PPC405.APUC405DCDUPDATE |
| TCELL5:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN24 |
| TCELL5:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI21 |
| TCELL5:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI31 |
| TCELL5:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI13 |
| TCELL5:IMUX.G1.DATA0 | PPC405.APUC405DCDVALIDOP |
| TCELL5:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN25 |
| TCELL5:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI22 |
| TCELL5:IMUX.G1.DATA3 | PPC405.TSTC405DCRREADI |
| TCELL5:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI14 |
| TCELL5:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT31 |
| TCELL5:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI24 |
| TCELL5:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI0 |
| TCELL5:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI18 |
| TCELL5:IMUX.G3.DATA0 | PPC405.APUC405EXEXERCA |
| TCELL5:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI25 |
| TCELL5:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI1 |
| TCELL5:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI19 |
| TCELL5:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION18 |
| TCELL5:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION19 |
| TCELL5:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION20 |
| TCELL5:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION21 |
| TCELL5:OUT.FAN4 | PPC405.C405APUEXERADATA5 |
| TCELL5:OUT.FAN5 | PPC405.C405APUEXERADATA6 |
| TCELL5:OUT.FAN6 | PPC405.C405APUEXERBDATA5 |
| TCELL5:OUT.FAN7 | PPC405.C405APUEXERBDATA6 |
| TCELL5:OUT.SEC8 | PPC405.TSTDCRBUSO21 |
| TCELL5:OUT.SEC9 | PPC405.TSTDCRBUSO20 |
| TCELL5:OUT.SEC10 | PPC405.TSTDCRBUSO19 |
| TCELL5:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO0 |
| TCELL5:OUT.SEC12 | PPC405.C405DCRDBUSOUT26 |
| TCELL5:OUT.SEC13 | PPC405.C405DCRDBUSOUT10 |
| TCELL5:OUT.SEC14 | PPC405.C405APUWBBYTEEN2 |
| TCELL5:OUT.SEC15 | PPC405.C405APUWBBYTEEN1 |
| TCELL5:OUT.TEST0 | PPC405.TSTDCRBUSO22 |
| TCELL5:OUT.TEST2 | PPC405.TSTDSOCMHOLDO |
| TCELL5:OUT.TEST4 | PPC405.TSTISOPFWDO |
| TCELL6:IMUX.TI0 | PPC405.TIERAMTAP1 |
| TCELL6:IMUX.TI1 | PPC405.TIERAMTAP2 |
| TCELL6:IMUX.G0.DATA0 | PPC405.APUC405DCDXERCAEN |
| TCELL6:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN26 |
| TCELL6:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI23 |
| TCELL6:IMUX.G0.DATA3 | PPC405.TSTC405DCRWRITEI |
| TCELL6:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI15 |
| TCELL6:IMUX.G1.DATA0 | PPC405.APUC405DCDXEROVEN |
| TCELL6:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN27 |
| TCELL6:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI24 |
| TCELL6:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI0 |
| TCELL6:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI16 |
| TCELL6:IMUX.G2.DATA0 | PPC405.APUC405EXEXEROV |
| TCELL6:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI26 |
| TCELL6:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI2 |
| TCELL6:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI20 |
| TCELL6:IMUX.G3.DATA0 | PPC405.APUC405FPUEXCEPTION |
| TCELL6:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI27 |
| TCELL6:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI3 |
| TCELL6:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI21 |
| TCELL6:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION22 |
| TCELL6:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION23 |
| TCELL6:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION24 |
| TCELL6:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION25 |
| TCELL6:OUT.FAN4 | PPC405.C405APUEXERADATA7 |
| TCELL6:OUT.FAN5 | PPC405.C405APUEXERADATA8 |
| TCELL6:OUT.FAN6 | PPC405.C405APUEXERBDATA7 |
| TCELL6:OUT.FAN7 | PPC405.C405APUEXERBDATA8 |
| TCELL6:OUT.SEC8 | PPC405.TSTDCRBUSO25 |
| TCELL6:OUT.SEC9 | PPC405.TSTDCRBUSO24 |
| TCELL6:OUT.SEC10 | PPC405.TSTDCRBUSO23 |
| TCELL6:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO1 |
| TCELL6:OUT.SEC12 | PPC405.C405DCRDBUSOUT27 |
| TCELL6:OUT.SEC13 | PPC405.C405DCRDBUSOUT11 |
| TCELL6:OUT.SEC14 | PPC405.C405APUWBENDIAN |
| TCELL6:OUT.SEC15 | PPC405.C405APUWBBYTEEN3 |
| TCELL6:OUT.TEST0 | PPC405.TSTDCRBUSO26 |
| TCELL6:OUT.TEST2 | PPC405.TSTOCMCOMPLETEO |
| TCELL7:IMUX.TI0 | PPC405.TIETAGTAP1 |
| TCELL7:IMUX.TI1 | PPC405.TIETAGTAP2 |
| TCELL7:IMUX.G0.DATA0 | PPC405.APUC405EXCEPTION |
| TCELL7:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN28 |
| TCELL7:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI25 |
| TCELL7:IMUX.G0.DATA3 | PPC405.TSTDSOCMDBUSI1 |
| TCELL7:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI17 |
| TCELL7:IMUX.G1.DATA0 | PPC405.APUC405EXEBLOCKINGMCO |
| TCELL7:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN29 |
| TCELL7:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI26 |
| TCELL7:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI2 |
| TCELL7:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI18 |
| TCELL7:IMUX.G2.DATA0 | PPC405.APUC405LWBLDDEPEND |
| TCELL7:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI28 |
| TCELL7:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI4 |
| TCELL7:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI22 |
| TCELL7:IMUX.G3.DATA0 | PPC405.APUC405SLEEPREQ |
| TCELL7:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI29 |
| TCELL7:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI5 |
| TCELL7:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI23 |
| TCELL7:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION26 |
| TCELL7:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION27 |
| TCELL7:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION28 |
| TCELL7:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION29 |
| TCELL7:OUT.FAN4 | PPC405.C405APUEXERADATA9 |
| TCELL7:OUT.FAN5 | PPC405.C405APUEXERADATA10 |
| TCELL7:OUT.FAN6 | PPC405.C405APUEXERBDATA9 |
| TCELL7:OUT.FAN7 | PPC405.C405APUEXERBDATA10 |
| TCELL7:OUT.SEC8 | PPC405.TSTDCRBUSO29 |
| TCELL7:OUT.SEC9 | PPC405.TSTDCRBUSO28 |
| TCELL7:OUT.SEC10 | PPC405.TSTDCRBUSO27 |
| TCELL7:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO2 |
| TCELL7:OUT.SEC12 | PPC405.C405DCRDBUSOUT28 |
| TCELL7:OUT.SEC13 | PPC405.C405DCRDBUSOUT12 |
| TCELL7:OUT.SEC14 | PPC405.C405APUWBHOLD |
| TCELL7:OUT.SEC15 | PPC405.C405APUWBFLUSH |
| TCELL7:OUT.TEST0 | PPC405.TSTDCRBUSO30 |
| TCELL8:IMUX.TI0 | PPC405.TESTSELI |
| TCELL8:IMUX.G0.DATA0 | PPC405.APUC405EXEBUSY |
| TCELL8:IMUX.G0.DATA1 | PPC405.DCRC405ACK |
| TCELL8:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI30 |
| TCELL8:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI6 |
| TCELL8:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI25 |
| TCELL8:IMUX.G1.DATA0 | PPC405.APUC405EXECR0 |
| TCELL8:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN30 |
| TCELL8:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI31 |
| TCELL8:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI3 |
| TCELL8:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI19 |
| TCELL8:IMUX.G2.DATA0 | PPC405.APUC405EXECR1 |
| TCELL8:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN31 |
| TCELL8:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI27 |
| TCELL8:IMUX.G2.DATA3 | PPC405.TSTDSOCMDBUSI4 |
| TCELL8:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI20 |
| TCELL8:IMUX.G3.DATA0 | PPC405.APUC405WBLDDEPEND |
| TCELL8:IMUX.G3.DATA1 | PPC405.TSTDCRACKI |
| TCELL8:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI28 |
| TCELL8:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI24 |
| TCELL8:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION30 |
| TCELL8:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION31 |
| TCELL8:OUT.FAN2 | PPC405.C405APUEXEFLUSH |
| TCELL8:OUT.FAN3 | PPC405.C405APUEXEHOLD |
| TCELL8:OUT.FAN4 | PPC405.C405APUEXERADATA11 |
| TCELL8:OUT.FAN5 | PPC405.C405APUEXERADATA12 |
| TCELL8:OUT.FAN6 | PPC405.C405APUEXERBDATA11 |
| TCELL8:OUT.FAN7 | PPC405.C405APUEXERBDATA12 |
| TCELL8:OUT.SEC8 | PPC405.TSTDSOCMDBUSO1 |
| TCELL8:OUT.SEC9 | PPC405.TSTDSOCMDBUSO0 |
| TCELL8:OUT.SEC10 | PPC405.TSTDCRBUSO31 |
| TCELL8:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO3 |
| TCELL8:OUT.SEC12 | PPC405.C405DCRDBUSOUT29 |
| TCELL8:OUT.SEC13 | PPC405.C405DCRDBUSOUT13 |
| TCELL8:OUT.SEC14 | PPC405.C405DCRABUS0 |
| TCELL8:OUT.SEC15 | PPC405.C405APUXERCA |
| TCELL8:OUT.TEST0 | PPC405.TSTDSOCMDBUSO2 |
| TCELL9:IMUX.G0.DATA0 | PPC405.APUC405EXECR2 |
| TCELL9:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN0 |
| TCELL9:IMUX.G0.DATA2 | PPC405.TSTDSOCMCOMPLETEI |
| TCELL9:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI7 |
| TCELL9:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI26 |
| TCELL9:IMUX.G1.DATA0 | PPC405.APUC405EXECR3 |
| TCELL9:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN1 |
| TCELL9:IMUX.G1.DATA2 | PPC405.TSTISOPFWDI |
| TCELL9:IMUX.G1.DATA3 | PPC405.TSTC405DCRDBUSOUTI8 |
| TCELL9:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI27 |
| TCELL9:IMUX.G2.DATA0 | PPC405.APUC405EXECRFIELD0 |
| TCELL9:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI0 |
| TCELL9:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI29 |
| TCELL9:IMUX.G2.DATA3 | PPC405.TSTDSOCMDBUSI5 |
| TCELL9:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI21 |
| TCELL9:IMUX.G3.DATA0 | PPC405.APUC405EXECRFIELD1 |
| TCELL9:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI1 |
| TCELL9:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI30 |
| TCELL9:IMUX.G3.DATA3 | PPC405.TSTDSOCMDBUSI6 |
| TCELL9:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI22 |
| TCELL9:OUT.FAN0 | PPC405.C405APUEXELOADDBUS0 |
| TCELL9:OUT.FAN1 | PPC405.C405APUEXELOADDBUS1 |
| TCELL9:OUT.FAN2 | PPC405.C405APUEXELOADDBUS2 |
| TCELL9:OUT.FAN3 | PPC405.C405APUEXELOADDBUS3 |
| TCELL9:OUT.FAN4 | PPC405.C405APUEXERADATA13 |
| TCELL9:OUT.FAN5 | PPC405.C405APUEXERADATA14 |
| TCELL9:OUT.FAN6 | PPC405.C405APUEXERBDATA13 |
| TCELL9:OUT.FAN7 | PPC405.C405APUEXERBDATA14 |
| TCELL9:OUT.SEC8 | PPC405.TSTDSOCMDBUSO5 |
| TCELL9:OUT.SEC9 | PPC405.TSTDSOCMDBUSO4 |
| TCELL9:OUT.SEC10 | PPC405.TSTDSOCMDBUSO3 |
| TCELL9:OUT.SEC11 | PPC405.TSTDSOCMLOADREQO |
| TCELL9:OUT.SEC12 | PPC405.C405DCRDBUSOUT30 |
| TCELL9:OUT.SEC13 | PPC405.C405DCRDBUSOUT14 |
| TCELL9:OUT.SEC14 | PPC405.C405DCRABUS2 |
| TCELL9:OUT.SEC15 | PPC405.C405DCRABUS1 |
| TCELL9:OUT.TEST0 | PPC405.TSTDSOCMDBUSO6 |
| TCELL10:IMUX.G0.DATA0 | PPC405.APUC405EXECRFIELD2 |
| TCELL10:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN2 |
| TCELL10:IMUX.G0.DATA2 | PPC405.TSTDSOCMHOLDI |
| TCELL10:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI10 |
| TCELL10:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI29 |
| TCELL10:IMUX.G1.DATA0 | PPC405.APUC405EXELDDEPEND |
| TCELL10:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN3 |
| TCELL10:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI0 |
| TCELL10:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI7 |
| TCELL10:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI23 |
| TCELL10:IMUX.G2.DATA0 | PPC405.APUC405EXENONBLOCKINGMCO |
| TCELL10:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI2 |
| TCELL10:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI31 |
| TCELL10:IMUX.G2.DATA3 | PPC405.TSTDSOCMDCRACKI |
| TCELL10:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI24 |
| TCELL10:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT0 |
| TCELL10:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI3 |
| TCELL10:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI9 |
| TCELL10:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI28 |
| TCELL10:OUT.FAN0 | PPC405.C405APUEXELOADDBUS4 |
| TCELL10:OUT.FAN1 | PPC405.C405APUEXELOADDBUS5 |
| TCELL10:OUT.FAN2 | PPC405.C405APUEXELOADDBUS6 |
| TCELL10:OUT.FAN3 | PPC405.C405APUEXELOADDBUS7 |
| TCELL10:OUT.FAN4 | PPC405.C405APUEXERADATA15 |
| TCELL10:OUT.FAN5 | PPC405.C405APUEXERADATA16 |
| TCELL10:OUT.FAN6 | PPC405.C405APUEXERBDATA15 |
| TCELL10:OUT.FAN7 | PPC405.C405APUEXERBDATA16 |
| TCELL10:OUT.SEC8 | PPC405.TSTRDDBUSO0 |
| TCELL10:OUT.SEC9 | PPC405.TSTDSOCMDCRACKO |
| TCELL10:OUT.SEC10 | PPC405.TSTDSOCMDBUSO7 |
| TCELL10:OUT.SEC11 | PPC405.TSTDSOCMSTOREREQO |
| TCELL10:OUT.SEC12 | PPC405.C405DCRDBUSOUT31 |
| TCELL10:OUT.SEC13 | PPC405.C405DCRDBUSOUT15 |
| TCELL10:OUT.SEC14 | PPC405.C405DCRABUS4 |
| TCELL10:OUT.SEC15 | PPC405.C405DCRABUS3 |
| TCELL10:OUT.TEST0 | PPC405.TSTRDDBUSO1 |
| TCELL11:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT1 |
| TCELL11:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN4 |
| TCELL11:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI1 |
| TCELL11:IMUX.G0.DATA3 | PPC405.TSTDSOCMABORTOPI |
| TCELL11:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI25 |
| TCELL11:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT2 |
| TCELL11:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN5 |
| TCELL11:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI2 |
| TCELL11:IMUX.G1.DATA3 | PPC405.TSTDSOCMABORTREQI |
| TCELL11:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI26 |
| TCELL11:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT3 |
| TCELL11:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI4 |
| TCELL11:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI11 |
| TCELL11:IMUX.G2.DATA3 | PPC405.TSTDSOCMBYTEENI0 |
| TCELL11:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT4 |
| TCELL11:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI5 |
| TCELL11:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI12 |
| TCELL11:IMUX.G3.DATA3 | PPC405.TSTDSOCMBYTEENI1 |
| TCELL11:OUT.FAN0 | PPC405.C405APUEXELOADDBUS8 |
| TCELL11:OUT.FAN1 | PPC405.C405APUEXELOADDBUS9 |
| TCELL11:OUT.FAN2 | PPC405.C405APUEXELOADDBUS10 |
| TCELL11:OUT.FAN3 | PPC405.C405APUEXELOADDBUS11 |
| TCELL11:OUT.FAN4 | PPC405.C405APUEXERADATA17 |
| TCELL11:OUT.FAN5 | PPC405.C405APUEXERADATA18 |
| TCELL11:OUT.FAN6 | PPC405.C405APUEXERBDATA17 |
| TCELL11:OUT.FAN7 | PPC405.C405APUEXERBDATA18 |
| TCELL11:OUT.SEC8 | PPC405.TSTRDDBUSO4 |
| TCELL11:OUT.SEC9 | PPC405.TSTRDDBUSO3 |
| TCELL11:OUT.SEC10 | PPC405.TSTRDDBUSO2 |
| TCELL11:OUT.SEC11 | PPC405.TSTDSOCMWAITO |
| TCELL11:OUT.SEC12 | PPC405.C405DCRREAD |
| TCELL11:OUT.SEC13 | PPC405.C405DCRDBUSOUT16 |
| TCELL11:OUT.SEC14 | PPC405.C405DCRABUS6 |
| TCELL11:OUT.SEC15 | PPC405.C405DCRABUS5 |
| TCELL11:OUT.TEST0 | PPC405.TSTRDDBUSO5 |
| TCELL12:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT5 |
| TCELL12:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN6 |
| TCELL12:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI3 |
| TCELL12:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI0 |
| TCELL12:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI27 |
| TCELL12:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT6 |
| TCELL12:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN7 |
| TCELL12:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI4 |
| TCELL12:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI1 |
| TCELL12:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI28 |
| TCELL12:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT7 |
| TCELL12:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI6 |
| TCELL12:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI13 |
| TCELL12:IMUX.G2.DATA3 | PPC405.TSTDSOCMBYTEENI2 |
| TCELL12:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT8 |
| TCELL12:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI7 |
| TCELL12:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI14 |
| TCELL12:IMUX.G3.DATA3 | PPC405.TSTDSOCMBYTEENI3 |
| TCELL12:OUT.FAN0 | PPC405.C405APUEXELOADDBUS12 |
| TCELL12:OUT.FAN1 | PPC405.C405APUEXELOADDBUS13 |
| TCELL12:OUT.FAN2 | PPC405.C405APUEXELOADDBUS14 |
| TCELL12:OUT.FAN3 | PPC405.C405APUEXELOADDBUS15 |
| TCELL12:OUT.FAN4 | PPC405.C405APUEXERADATA19 |
| TCELL12:OUT.FAN5 | PPC405.C405APUEXERADATA20 |
| TCELL12:OUT.FAN6 | PPC405.C405APUEXERBDATA19 |
| TCELL12:OUT.FAN7 | PPC405.C405APUEXERBDATA20 |
| TCELL12:OUT.SEC8 | PPC405.TSTRDDBUSO8 |
| TCELL12:OUT.SEC9 | PPC405.TSTRDDBUSO7 |
| TCELL12:OUT.SEC10 | PPC405.TSTRDDBUSO6 |
| TCELL12:OUT.SEC11 | PPC405.TSTDSOCMXLATEVALIDO |
| TCELL12:OUT.SEC12 | PPC405.C405DCRWRITE |
| TCELL12:OUT.SEC13 | PPC405.C405DCRDBUSOUT17 |
| TCELL12:OUT.SEC14 | PPC405.C405DCRABUS8 |
| TCELL12:OUT.SEC15 | PPC405.C405DCRABUS7 |
| TCELL12:OUT.TEST0 | PPC405.TSTRDDBUSO9 |
| TCELL13:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT9 |
| TCELL13:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN8 |
| TCELL13:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI5 |
| TCELL13:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI2 |
| TCELL13:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI29 |
| TCELL13:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT10 |
| TCELL13:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN9 |
| TCELL13:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI6 |
| TCELL13:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI3 |
| TCELL13:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI30 |
| TCELL13:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT11 |
| TCELL13:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI8 |
| TCELL13:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI15 |
| TCELL13:IMUX.G2.DATA3 | PPC405.TSTDSOCMLOADREQI |
| TCELL13:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT12 |
| TCELL13:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI9 |
| TCELL13:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI16 |
| TCELL13:IMUX.G3.DATA3 | PPC405.TSTDSOCMSTOREREQI |
| TCELL13:OUT.FAN0 | PPC405.C405APUEXELOADDBUS16 |
| TCELL13:OUT.FAN1 | PPC405.C405APUEXELOADDBUS17 |
| TCELL13:OUT.FAN2 | PPC405.C405APUEXELOADDBUS18 |
| TCELL13:OUT.FAN3 | PPC405.C405APUEXELOADDBUS19 |
| TCELL13:OUT.FAN4 | PPC405.C405APUEXERADATA21 |
| TCELL13:OUT.FAN5 | PPC405.C405APUEXERADATA22 |
| TCELL13:OUT.FAN6 | PPC405.C405APUEXERBDATA21 |
| TCELL13:OUT.FAN7 | PPC405.C405APUEXERBDATA22 |
| TCELL13:OUT.SEC8 | PPC405.TSTRDDBUSO13 |
| TCELL13:OUT.SEC9 | PPC405.TSTRDDBUSO12 |
| TCELL13:OUT.SEC10 | PPC405.TSTRDDBUSO11 |
| TCELL13:OUT.SEC11 | PPC405.TSTRDDBUSO10 |
| TCELL13:OUT.SEC12 | PPC405.TSTDSOCMABORTOPO |
| TCELL13:OUT.SEC13 | PPC405.C405DCRDBUSOUT18 |
| TCELL13:OUT.SEC14 | PPC405.C405DCRDBUSOUT0 |
| TCELL13:OUT.SEC15 | PPC405.C405DCRABUS9 |
| TCELL14:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT13 |
| TCELL14:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN10 |
| TCELL14:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI7 |
| TCELL14:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI4 |
| TCELL14:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI31 |
| TCELL14:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT14 |
| TCELL14:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN11 |
| TCELL14:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI8 |
| TCELL14:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI5 |
| TCELL14:IMUX.G1.DATA4 | PPC405.TSTDSOCMXLATEVALIDI |
| TCELL14:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT15 |
| TCELL14:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI10 |
| TCELL14:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI17 |
| TCELL14:IMUX.G2.DATA3 | PPC405.TSTDSOCMWAITI |
| TCELL14:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT16 |
| TCELL14:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI11 |
| TCELL14:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI18 |
| TCELL14:IMUX.G3.DATA3 | PPC405.TSTDSOCMWRDBUSI0 |
| TCELL14:OUT.FAN0 | PPC405.C405APUEXELOADDBUS20 |
| TCELL14:OUT.FAN1 | PPC405.C405APUEXELOADDBUS21 |
| TCELL14:OUT.FAN2 | PPC405.C405APUEXELOADDBUS22 |
| TCELL14:OUT.FAN3 | PPC405.C405APUEXELOADDBUS23 |
| TCELL14:OUT.FAN4 | PPC405.C405APUEXERADATA23 |
| TCELL14:OUT.FAN5 | PPC405.C405APUEXERADATA24 |
| TCELL14:OUT.FAN6 | PPC405.C405APUEXERBDATA23 |
| TCELL14:OUT.FAN7 | PPC405.C405APUEXERBDATA24 |
| TCELL14:OUT.SEC8 | PPC405.TSTRDDBUSO17 |
| TCELL14:OUT.SEC9 | PPC405.TSTRDDBUSO16 |
| TCELL14:OUT.SEC10 | PPC405.TSTRDDBUSO15 |
| TCELL14:OUT.SEC11 | PPC405.TSTRDDBUSO14 |
| TCELL14:OUT.SEC12 | PPC405.TSTDSOCMABORTREQO |
| TCELL14:OUT.SEC13 | PPC405.C405DCRDBUSOUT19 |
| TCELL14:OUT.SEC14 | PPC405.C405DCRDBUSOUT2 |
| TCELL14:OUT.SEC15 | PPC405.C405DCRDBUSOUT1 |
| TCELL15:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT17 |
| TCELL15:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN12 |
| TCELL15:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI9 |
| TCELL15:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI6 |
| TCELL15:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT18 |
| TCELL15:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN13 |
| TCELL15:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI10 |
| TCELL15:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI7 |
| TCELL15:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT19 |
| TCELL15:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI12 |
| TCELL15:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI19 |
| TCELL15:IMUX.G2.DATA3 | PPC405.TSTDSOCMWRDBUSI1 |
| TCELL15:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT20 |
| TCELL15:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI13 |
| TCELL15:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI20 |
| TCELL15:IMUX.G3.DATA3 | PPC405.TSTDSOCMWRDBUSI2 |
| TCELL15:OUT.FAN0 | PPC405.C405APUEXELOADDBUS24 |
| TCELL15:OUT.FAN1 | PPC405.C405APUEXELOADDBUS25 |
| TCELL15:OUT.FAN2 | PPC405.C405APUEXELOADDBUS26 |
| TCELL15:OUT.FAN3 | PPC405.C405APUEXELOADDBUS27 |
| TCELL15:OUT.FAN4 | PPC405.C405APUEXERADATA25 |
| TCELL15:OUT.FAN5 | PPC405.C405APUEXERADATA26 |
| TCELL15:OUT.FAN6 | PPC405.C405APUEXERBDATA25 |
| TCELL15:OUT.FAN7 | PPC405.C405APUEXERBDATA26 |
| TCELL15:OUT.SEC8 | PPC405.TSTRDDBUSO21 |
| TCELL15:OUT.SEC9 | PPC405.TSTRDDBUSO20 |
| TCELL15:OUT.SEC10 | PPC405.TSTRDDBUSO19 |
| TCELL15:OUT.SEC11 | PPC405.TSTRDDBUSO18 |
| TCELL15:OUT.SEC12 | PPC405.TSTDSOCMABUSO24 |
| TCELL15:OUT.SEC13 | PPC405.C405DCRDBUSOUT20 |
| TCELL15:OUT.SEC14 | PPC405.C405DCRDBUSOUT4 |
| TCELL15:OUT.SEC15 | PPC405.C405DCRDBUSOUT3 |
| TCELL16:IMUX.CLK1 | PPC405.PLBCLK |
| TCELL16:IMUX.TI0 | PPC405.TIEC405DETERMINISTICMULT |
| TCELL16:IMUX.TI1 | PPC405.TIEC405PVR30 |
| TCELL16:IMUX.TS0 | PPC405.TIEC405PVR31 |
| TCELL16:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS60 |
| TCELL16:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS60 |
| TCELL16:IMUX.G0.DATA2 | PPC405.TSTRESETCHIPI |
| TCELL16:IMUX.G0.DATA3 | PPC405.TSTISOCMREQPENDI |
| TCELL16:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS61 |
| TCELL16:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS61 |
| TCELL16:IMUX.G1.DATA2 | PPC405.TSTCPUCLKI |
| TCELL16:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS62 |
| TCELL16:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS62 |
| TCELL16:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI11 |
| TCELL16:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS63 |
| TCELL16:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS63 |
| TCELL16:IMUX.G3.DATA2 | PPC405.TSTISOCMXLATEVALIDI |
| TCELL16:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS60 |
| TCELL16:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS61 |
| TCELL16:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS62 |
| TCELL16:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS63 |
| TCELL16:OUT.FAN4 | PPC405.C405RSTCHIPRESETREQ |
| TCELL16:OUT.FAN5 | PPC405.C405RSTCORERESETREQ |
| TCELL16:OUT.FAN6 | PPC405.C405CPMTIMERIRQ |
| TCELL16:OUT.FAN7 | PPC405.C405CPMTIMERRESETREQ |
| TCELL16:OUT.SEC8 | PPC405.TSTRESETSYSO |
| TCELL16:OUT.SEC9 | PPC405.TSTRESETCOREO |
| TCELL16:OUT.SEC10 | PPC405.TSTRESETCHIPO |
| TCELL16:OUT.SEC11 | PPC405.C405DBGWBIAR26 |
| TCELL16:OUT.SEC12 | PPC405.C405DBGWBIAR21 |
| TCELL16:OUT.SEC13 | PPC405.C405DBGWBIAR7 |
| TCELL16:OUT.SEC14 | PPC405.C405DBGWBFULL |
| TCELL16:OUT.SEC15 | PPC405.C405DBGWBCOMPLETE |
| TCELL16:OUT.TEST0 | PPC405.TSTJTAGENO |
| TCELL16:OUT.TEST2 | PPC405.TSTISOCMRDATAO53 |
| TCELL16:OUT.TEST4 | PPC405.TSTISOCMRDATAO54 |
| TCELL17:IMUX.CE0 | PPC405.CPMC405CPUCLKEN |
| TCELL17:IMUX.TI0 | PPC405.TIEC405DISOPERANDFWD |
| TCELL17:IMUX.TI1 | PPC405.TIEC405MMUEN |
| TCELL17:IMUX.TS0 | PPC405.TIEC405PVR29 |
| TCELL17:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS56 |
| TCELL17:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS56 |
| TCELL17:IMUX.G0.DATA2 | PPC405.DBGC405DEBUGHALT |
| TCELL17:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI0 |
| TCELL17:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS57 |
| TCELL17:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS57 |
| TCELL17:IMUX.G1.DATA2 | PPC405.TSTCLKINACTI |
| TCELL17:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI1 |
| TCELL17:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS58 |
| TCELL17:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS58 |
| TCELL17:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI12 |
| TCELL17:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS59 |
| TCELL17:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS59 |
| TCELL17:IMUX.G3.DATA2 | PPC405.TSTISOCMICUREADYI |
| TCELL17:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS56 |
| TCELL17:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS57 |
| TCELL17:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS58 |
| TCELL17:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS59 |
| TCELL17:OUT.FAN4 | PPC405.C405PLBDCUREQUEST |
| TCELL17:OUT.FAN5 | PPC405.C405PLBDCUPRIORITY0 |
| TCELL17:OUT.FAN6 | PPC405.C405PLBDCUPRIORITY1 |
| TCELL17:OUT.FAN7 | PPC405.C405PLBDCUABORT |
| TCELL17:OUT.SEC8 | PPC405.TSTCPUCLKO |
| TCELL17:OUT.SEC9 | PPC405.TSTCPUCLKENO |
| TCELL17:OUT.SEC10 | PPC405.TSTTIMERENO |
| TCELL17:OUT.SEC11 | PPC405.C405DBGWBIAR27 |
| TCELL17:OUT.SEC12 | PPC405.C405DBGWBIAR22 |
| TCELL17:OUT.SEC13 | PPC405.C405DBGWBIAR8 |
| TCELL17:OUT.SEC14 | PPC405.C405DBGWBIAR0 |
| TCELL17:OUT.SEC15 | PPC405.C405PLBDCURNW |
| TCELL17:OUT.TEST0 | PPC405.TSTCLKINACTO |
| TCELL17:OUT.TEST2 | PPC405.TSTISOCMRDATAO55 |
| TCELL17:OUT.TEST4 | PPC405.TSTISOCMRDATAO56 |
| TCELL18:IMUX.CE0 | PPC405.CPMC405TIMERCLKEN |
| TCELL18:IMUX.TI0 | PPC405.TIEC405PVR26 |
| TCELL18:IMUX.TI1 | PPC405.TIEC405PVR27 |
| TCELL18:IMUX.TS0 | PPC405.TIEC405PVR28 |
| TCELL18:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS52 |
| TCELL18:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS52 |
| TCELL18:IMUX.G0.DATA2 | PPC405.DBGC405UNCONDDEBUGEVENT |
| TCELL18:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI3 |
| TCELL18:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS53 |
| TCELL18:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS53 |
| TCELL18:IMUX.G1.DATA2 | PPC405.TSTISOCMHOLDI |
| TCELL18:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI4 |
| TCELL18:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS54 |
| TCELL18:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS54 |
| TCELL18:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI13 |
| TCELL18:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS55 |
| TCELL18:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS55 |
| TCELL18:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI2 |
| TCELL18:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS52 |
| TCELL18:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS53 |
| TCELL18:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS54 |
| TCELL18:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS55 |
| TCELL18:OUT.FAN4 | PPC405.C405PLBDCUGUARDED |
| TCELL18:OUT.FAN5 | PPC405.C405PLBDCUWRITETHRU |
| TCELL18:OUT.FAN6 | PPC405.C405DBGWBIAR11 |
| TCELL18:OUT.FAN7 | PPC405.C405DBGWBIAR12 |
| TCELL18:OUT.SEC8 | PPC405.TSTISOCMRDDVALIDO1 |
| TCELL18:OUT.SEC9 | PPC405.TSTISOCMRDDVALIDO0 |
| TCELL18:OUT.SEC10 | PPC405.TSTISOCMHOLDO |
| TCELL18:OUT.SEC11 | PPC405.C405DBGWBIAR28 |
| TCELL18:OUT.SEC12 | PPC405.C405PLBICUABORT |
| TCELL18:OUT.SEC13 | PPC405.C405PLBICUPRIORITY1 |
| TCELL18:OUT.SEC14 | PPC405.C405PLBICUPRIORITY0 |
| TCELL18:OUT.SEC15 | PPC405.C405PLBICUREQUEST |
| TCELL18:OUT.TEST0 | PPC405.TSTISOCMRDATAO0 |
| TCELL18:OUT.TEST2 | PPC405.TSTISOCMRDATAO57 |
| TCELL18:OUT.TEST4 | PPC405.TSTISOCMRDATAO58 |
| TCELL19:IMUX.CLK0 | PPC405.CPMC405TIMERTICK |
| TCELL19:IMUX.CE0 | PPC405.CPMC405JTAGCLKEN |
| TCELL19:IMUX.TI0 | PPC405.TIEC405PVR23 |
| TCELL19:IMUX.TI1 | PPC405.TIEC405PVR24 |
| TCELL19:IMUX.TS0 | PPC405.TIEC405PVR25 |
| TCELL19:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS48 |
| TCELL19:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS48 |
| TCELL19:IMUX.G0.DATA2 | PPC405.TSTISOCMRDDVALIDI0 |
| TCELL19:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI7 |
| TCELL19:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS49 |
| TCELL19:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS49 |
| TCELL19:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI14 |
| TCELL19:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS50 |
| TCELL19:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS50 |
| TCELL19:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI5 |
| TCELL19:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS51 |
| TCELL19:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS51 |
| TCELL19:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI6 |
| TCELL19:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS48 |
| TCELL19:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS49 |
| TCELL19:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS50 |
| TCELL19:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS51 |
| TCELL19:OUT.FAN4 | PPC405.C405PLBDCUBE4 |
| TCELL19:OUT.FAN5 | PPC405.C405PLBDCUBE5 |
| TCELL19:OUT.FAN6 | PPC405.C405PLBDCUBE6 |
| TCELL19:OUT.FAN7 | PPC405.C405PLBDCUBE7 |
| TCELL19:OUT.SEC8 | PPC405.TSTISOCMRDATAO3 |
| TCELL19:OUT.SEC9 | PPC405.TSTISOCMRDATAO2 |
| TCELL19:OUT.SEC10 | PPC405.TSTISOCMRDATAO1 |
| TCELL19:OUT.SEC11 | PPC405.C405DBGWBIAR29 |
| TCELL19:OUT.SEC12 | PPC405.C405DBGWBIAR16 |
| TCELL19:OUT.SEC13 | PPC405.C405DBGWBIAR15 |
| TCELL19:OUT.SEC14 | PPC405.C405DBGWBIAR14 |
| TCELL19:OUT.SEC15 | PPC405.C405DBGWBIAR13 |
| TCELL19:OUT.TEST0 | PPC405.TSTISOCMRDATAO4 |
| TCELL19:OUT.TEST2 | PPC405.TSTISOCMRDATAO59 |
| TCELL19:OUT.TEST4 | PPC405.TSTISOCMRDATAO60 |
| TCELL20:IMUX.TI0 | PPC405.MCBCPUCLKEN |
| TCELL20:IMUX.TI1 | PPC405.TIEC405PVR20 |
| TCELL20:IMUX.TS0 | PPC405.TIEC405PVR21 |
| TCELL20:IMUX.TS1 | PPC405.TIEC405PVR22 |
| TCELL20:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS44 |
| TCELL20:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS44 |
| TCELL20:IMUX.G0.DATA2 | PPC405.DBGC405EXTBUSHOLDACK |
| TCELL20:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI9 |
| TCELL20:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS45 |
| TCELL20:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS45 |
| TCELL20:IMUX.G1.DATA2 | PPC405.TSTISOCMRDDVALIDI1 |
| TCELL20:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI10 |
| TCELL20:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS46 |
| TCELL20:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS46 |
| TCELL20:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI15 |
| TCELL20:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS47 |
| TCELL20:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS47 |
| TCELL20:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI8 |
| TCELL20:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS44 |
| TCELL20:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS45 |
| TCELL20:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS46 |
| TCELL20:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS47 |
| TCELL20:OUT.FAN4 | PPC405.C405PLBDCUABUS28 |
| TCELL20:OUT.FAN5 | PPC405.C405PLBDCUABUS29 |
| TCELL20:OUT.FAN6 | PPC405.C405PLBDCUABUS30 |
| TCELL20:OUT.FAN7 | PPC405.C405PLBDCUABUS31 |
| TCELL20:OUT.SEC8 | PPC405.TSTISOCMRDATAO8 |
| TCELL20:OUT.SEC9 | PPC405.TSTISOCMRDATAO7 |
| TCELL20:OUT.SEC10 | PPC405.TSTISOCMRDATAO6 |
| TCELL20:OUT.SEC11 | PPC405.TSTISOCMRDATAO5 |
| TCELL20:OUT.SEC12 | PPC405.C405DBGWBIAR18 |
| TCELL20:OUT.SEC13 | PPC405.C405DBGWBIAR17 |
| TCELL20:OUT.SEC14 | PPC405.C405PLBICUABUS29 |
| TCELL20:OUT.SEC15 | PPC405.C405PLBICUABUS28 |
| TCELL20:OUT.TEST0 | PPC405.TSTISOCMRDATAO61 |
| TCELL20:OUT.TEST2 | PPC405.TSTISOCMRDATAO62 |
| TCELL21:IMUX.TI0 | PPC405.MCBJTAGEN |
| TCELL21:IMUX.TI1 | PPC405.TIEC405PVR18 |
| TCELL21:IMUX.TS0 | PPC405.TIEC405PVR19 |
| TCELL21:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS40 |
| TCELL21:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS40 |
| TCELL21:IMUX.G0.DATA2 | PPC405.PLBC405DCUWRDACK |
| TCELL21:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI16 |
| TCELL21:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS41 |
| TCELL21:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS41 |
| TCELL21:IMUX.G1.DATA2 | PPC405.CPMC405CORECLKINACTIVE |
| TCELL21:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI11 |
| TCELL21:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS42 |
| TCELL21:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS42 |
| TCELL21:IMUX.G2.DATA2 | PPC405.TSTRESETCOREI |
| TCELL21:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI12 |
| TCELL21:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS43 |
| TCELL21:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS43 |
| TCELL21:IMUX.G3.DATA2 | PPC405.TSTISOCMRDATAI0 |
| TCELL21:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS40 |
| TCELL21:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS41 |
| TCELL21:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS42 |
| TCELL21:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS43 |
| TCELL21:OUT.FAN4 | PPC405.C405PLBDCUABUS24 |
| TCELL21:OUT.FAN5 | PPC405.C405PLBDCUABUS25 |
| TCELL21:OUT.FAN6 | PPC405.C405PLBDCUABUS26 |
| TCELL21:OUT.FAN7 | PPC405.C405PLBDCUABUS27 |
| TCELL21:OUT.SEC8 | PPC405.TSTISOCMRDATAO12 |
| TCELL21:OUT.SEC9 | PPC405.TSTISOCMRDATAO11 |
| TCELL21:OUT.SEC10 | PPC405.TSTISOCMRDATAO10 |
| TCELL21:OUT.SEC11 | PPC405.TSTISOCMRDATAO9 |
| TCELL21:OUT.SEC12 | PPC405.C405PLBICUABUS27 |
| TCELL21:OUT.SEC13 | PPC405.C405PLBICUABUS26 |
| TCELL21:OUT.SEC14 | PPC405.C405PLBICUABUS25 |
| TCELL21:OUT.SEC15 | PPC405.C405PLBICUABUS24 |
| TCELL21:OUT.TEST0 | PPC405.TSTISOCMRDATAO63 |
| TCELL21:OUT.TEST2 | PPC405.TSTPLBSAMPLECYCLEO |
| TCELL22:IMUX.TI0 | PPC405.MCBTIMEREN |
| TCELL22:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS36 |
| TCELL22:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS36 |
| TCELL22:IMUX.G0.DATA2 | PPC405.PLBC405DCURDWDADDR1 |
| TCELL22:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI1 |
| TCELL22:IMUX.G0.DATA4 | PPC405.TSTISOCMABUSI15 |
| TCELL22:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS37 |
| TCELL22:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS37 |
| TCELL22:IMUX.G1.DATA2 | PPC405.PLBC405DCURDWDADDR2 |
| TCELL22:IMUX.G1.DATA3 | PPC405.TSTPLBSAMPLECYCLEI |
| TCELL22:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS38 |
| TCELL22:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS38 |
| TCELL22:IMUX.G2.DATA2 | PPC405.PLBC405DCURDWDADDR3 |
| TCELL22:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI13 |
| TCELL22:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS39 |
| TCELL22:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS39 |
| TCELL22:IMUX.G3.DATA2 | PPC405.PLBC405DCURDDACK |
| TCELL22:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI14 |
| TCELL22:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS36 |
| TCELL22:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS37 |
| TCELL22:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS38 |
| TCELL22:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS39 |
| TCELL22:OUT.FAN4 | PPC405.C405PLBDCUABUS20 |
| TCELL22:OUT.FAN5 | PPC405.C405PLBDCUABUS21 |
| TCELL22:OUT.FAN6 | PPC405.C405PLBDCUABUS22 |
| TCELL22:OUT.FAN7 | PPC405.C405PLBDCUABUS23 |
| TCELL22:OUT.SEC8 | PPC405.TSTISOCMRDATAO16 |
| TCELL22:OUT.SEC9 | PPC405.TSTISOCMRDATAO15 |
| TCELL22:OUT.SEC10 | PPC405.TSTISOCMRDATAO14 |
| TCELL22:OUT.SEC11 | PPC405.TSTISOCMRDATAO13 |
| TCELL22:OUT.SEC12 | PPC405.C405PLBICUABUS23 |
| TCELL22:OUT.SEC13 | PPC405.C405PLBICUABUS22 |
| TCELL22:OUT.SEC14 | PPC405.C405PLBICUABUS21 |
| TCELL22:OUT.SEC15 | PPC405.C405PLBICUABUS20 |
| TCELL23:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS32 |
| TCELL23:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS32 |
| TCELL23:IMUX.G0.DATA2 | PPC405.PLBC405DCUADDRACK |
| TCELL23:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI2 |
| TCELL23:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS33 |
| TCELL23:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS33 |
| TCELL23:IMUX.G1.DATA2 | PPC405.PLBC405DCUSSIZE1 |
| TCELL23:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI16 |
| TCELL23:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS34 |
| TCELL23:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS34 |
| TCELL23:IMUX.G2.DATA2 | PPC405.PLBC405DCUBUSY |
| TCELL23:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI17 |
| TCELL23:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS35 |
| TCELL23:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS35 |
| TCELL23:IMUX.G3.DATA2 | PPC405.PLBC405DCUERR |
| TCELL23:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI18 |
| TCELL23:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS32 |
| TCELL23:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS33 |
| TCELL23:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS34 |
| TCELL23:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS35 |
| TCELL23:OUT.FAN4 | PPC405.C405PLBDCUABUS16 |
| TCELL23:OUT.FAN5 | PPC405.C405PLBDCUABUS17 |
| TCELL23:OUT.FAN6 | PPC405.C405PLBDCUABUS18 |
| TCELL23:OUT.FAN7 | PPC405.C405PLBDCUABUS19 |
| TCELL23:OUT.SEC8 | PPC405.TSTISOCMRDATAO20 |
| TCELL23:OUT.SEC9 | PPC405.TSTISOCMRDATAO19 |
| TCELL23:OUT.SEC10 | PPC405.TSTISOCMRDATAO18 |
| TCELL23:OUT.SEC11 | PPC405.TSTISOCMRDATAO17 |
| TCELL23:OUT.SEC12 | PPC405.C405PLBICUABUS19 |
| TCELL23:OUT.SEC13 | PPC405.C405PLBICUABUS18 |
| TCELL23:OUT.SEC14 | PPC405.C405PLBICUABUS17 |
| TCELL23:OUT.SEC15 | PPC405.C405PLBICUABUS16 |
| TCELL24:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS28 |
| TCELL24:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS28 |
| TCELL24:IMUX.G0.DATA2 | PPC405.PLBC405ICUADDRACK |
| TCELL24:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI3 |
| TCELL24:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS29 |
| TCELL24:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS29 |
| TCELL24:IMUX.G1.DATA2 | PPC405.PLBC405ICUSSIZE1 |
| TCELL24:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI19 |
| TCELL24:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS30 |
| TCELL24:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS30 |
| TCELL24:IMUX.G2.DATA2 | PPC405.PLBC405ICUBUSY |
| TCELL24:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI20 |
| TCELL24:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS31 |
| TCELL24:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS31 |
| TCELL24:IMUX.G3.DATA2 | PPC405.PLBC405ICUERR |
| TCELL24:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI21 |
| TCELL24:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS28 |
| TCELL24:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS29 |
| TCELL24:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS30 |
| TCELL24:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS31 |
| TCELL24:OUT.FAN4 | PPC405.C405PLBDCUABUS12 |
| TCELL24:OUT.FAN5 | PPC405.C405PLBDCUABUS13 |
| TCELL24:OUT.FAN6 | PPC405.C405PLBDCUABUS14 |
| TCELL24:OUT.FAN7 | PPC405.C405PLBDCUABUS15 |
| TCELL24:OUT.SEC8 | PPC405.TSTISOCMRDATAO24 |
| TCELL24:OUT.SEC9 | PPC405.TSTISOCMRDATAO23 |
| TCELL24:OUT.SEC10 | PPC405.TSTISOCMRDATAO22 |
| TCELL24:OUT.SEC11 | PPC405.TSTISOCMRDATAO21 |
| TCELL24:OUT.SEC12 | PPC405.C405PLBICUABUS15 |
| TCELL24:OUT.SEC13 | PPC405.C405PLBICUABUS14 |
| TCELL24:OUT.SEC14 | PPC405.C405PLBICUABUS13 |
| TCELL24:OUT.SEC15 | PPC405.C405PLBICUABUS12 |
| TCELL25:IMUX.CLK0 | PPC405.CPMC405CLOCK |
| TCELL25:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS24 |
| TCELL25:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS24 |
| TCELL25:IMUX.G0.DATA2 | PPC405.PLBC405ICURDWDADDR1 |
| TCELL25:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI4 |
| TCELL25:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS25 |
| TCELL25:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS25 |
| TCELL25:IMUX.G1.DATA2 | PPC405.PLBC405ICURDWDADDR2 |
| TCELL25:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI22 |
| TCELL25:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS26 |
| TCELL25:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS26 |
| TCELL25:IMUX.G2.DATA2 | PPC405.PLBC405ICURDWDADDR3 |
| TCELL25:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI23 |
| TCELL25:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS27 |
| TCELL25:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS27 |
| TCELL25:IMUX.G3.DATA2 | PPC405.PLBC405ICURDDACK |
| TCELL25:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI24 |
| TCELL25:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS24 |
| TCELL25:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS25 |
| TCELL25:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS26 |
| TCELL25:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS27 |
| TCELL25:OUT.FAN4 | PPC405.C405PLBDCUABUS8 |
| TCELL25:OUT.FAN5 | PPC405.C405PLBDCUABUS9 |
| TCELL25:OUT.FAN6 | PPC405.C405PLBDCUABUS10 |
| TCELL25:OUT.FAN7 | PPC405.C405PLBDCUABUS11 |
| TCELL25:OUT.SEC8 | PPC405.TSTISOCMRDATAO28 |
| TCELL25:OUT.SEC9 | PPC405.TSTISOCMRDATAO27 |
| TCELL25:OUT.SEC10 | PPC405.TSTISOCMRDATAO26 |
| TCELL25:OUT.SEC11 | PPC405.TSTISOCMRDATAO25 |
| TCELL25:OUT.SEC12 | PPC405.C405PLBICUABUS11 |
| TCELL25:OUT.SEC13 | PPC405.C405PLBICUABUS10 |
| TCELL25:OUT.SEC14 | PPC405.C405PLBICUABUS9 |
| TCELL25:OUT.SEC15 | PPC405.C405PLBICUABUS8 |
| TCELL26:IMUX.TI0 | PPC405.TIEC405PVR15 |
| TCELL26:IMUX.TI1 | PPC405.TIEC405PVR16 |
| TCELL26:IMUX.TS0 | PPC405.TIEC405PVR17 |
| TCELL26:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS20 |
| TCELL26:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS20 |
| TCELL26:IMUX.G0.DATA2 | PPC405.EICC405CRITINPUTIRQ |
| TCELL26:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI27 |
| TCELL26:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS21 |
| TCELL26:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS21 |
| TCELL26:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI5 |
| TCELL26:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI28 |
| TCELL26:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS22 |
| TCELL26:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS22 |
| TCELL26:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI25 |
| TCELL26:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS23 |
| TCELL26:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS23 |
| TCELL26:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI26 |
| TCELL26:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS20 |
| TCELL26:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS21 |
| TCELL26:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS22 |
| TCELL26:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS23 |
| TCELL26:OUT.FAN4 | PPC405.C405PLBDCUABUS4 |
| TCELL26:OUT.FAN5 | PPC405.C405PLBDCUABUS5 |
| TCELL26:OUT.FAN6 | PPC405.C405PLBDCUABUS6 |
| TCELL26:OUT.FAN7 | PPC405.C405PLBDCUABUS7 |
| TCELL26:OUT.SEC8 | PPC405.TSTISOCMRDATAO32 |
| TCELL26:OUT.SEC9 | PPC405.TSTISOCMRDATAO31 |
| TCELL26:OUT.SEC10 | PPC405.TSTISOCMRDATAO30 |
| TCELL26:OUT.SEC11 | PPC405.TSTISOCMRDATAO29 |
| TCELL26:OUT.SEC12 | PPC405.C405PLBICUABUS7 |
| TCELL26:OUT.SEC13 | PPC405.C405PLBICUABUS6 |
| TCELL26:OUT.SEC14 | PPC405.C405PLBICUABUS5 |
| TCELL26:OUT.SEC15 | PPC405.C405PLBICUABUS4 |
| TCELL27:IMUX.SR0 | PPC405.RSTC405RESETCHIP |
| TCELL27:IMUX.TI0 | PPC405.TIEC405PVR12 |
| TCELL27:IMUX.TI1 | PPC405.TIEC405PVR13 |
| TCELL27:IMUX.TS0 | PPC405.TIEC405PVR14 |
| TCELL27:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS16 |
| TCELL27:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS16 |
| TCELL27:IMUX.G0.DATA2 | PPC405.TSTRESETSYSI |
| TCELL27:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS17 |
| TCELL27:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS17 |
| TCELL27:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI6 |
| TCELL27:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS18 |
| TCELL27:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS18 |
| TCELL27:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI29 |
| TCELL27:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS19 |
| TCELL27:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS19 |
| TCELL27:IMUX.G3.DATA2 | PPC405.TSTISOCMABORTI |
| TCELL27:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS16 |
| TCELL27:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS17 |
| TCELL27:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS18 |
| TCELL27:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS19 |
| TCELL27:OUT.FAN4 | PPC405.C405PLBDCUABUS0 |
| TCELL27:OUT.FAN5 | PPC405.C405PLBDCUABUS1 |
| TCELL27:OUT.FAN6 | PPC405.C405PLBDCUABUS2 |
| TCELL27:OUT.FAN7 | PPC405.C405PLBDCUABUS3 |
| TCELL27:OUT.SEC8 | PPC405.TSTISOCMRDATAO36 |
| TCELL27:OUT.SEC9 | PPC405.TSTISOCMRDATAO35 |
| TCELL27:OUT.SEC10 | PPC405.TSTISOCMRDATAO34 |
| TCELL27:OUT.SEC11 | PPC405.TSTISOCMRDATAO33 |
| TCELL27:OUT.SEC12 | PPC405.C405PLBICUABUS3 |
| TCELL27:OUT.SEC13 | PPC405.C405PLBICUABUS2 |
| TCELL27:OUT.SEC14 | PPC405.C405PLBICUABUS1 |
| TCELL27:OUT.SEC15 | PPC405.C405PLBICUABUS0 |
| TCELL28:IMUX.SR0 | PPC405.RSTC405RESETCORE |
| TCELL28:IMUX.TI0 | PPC405.TIEC405PVR9 |
| TCELL28:IMUX.TI1 | PPC405.TIEC405PVR10 |
| TCELL28:IMUX.TS0 | PPC405.TIEC405PVR11 |
| TCELL28:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS12 |
| TCELL28:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS12 |
| TCELL28:IMUX.G0.DATA2 | PPC405.TSTJTAGENI |
| TCELL28:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS13 |
| TCELL28:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS13 |
| TCELL28:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI7 |
| TCELL28:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS14 |
| TCELL28:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS14 |
| TCELL28:IMUX.G2.DATA2 | PPC405.JTGC405TRSTNEG |
| TCELL28:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS15 |
| TCELL28:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS15 |
| TCELL28:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS12 |
| TCELL28:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS13 |
| TCELL28:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS14 |
| TCELL28:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS15 |
| TCELL28:OUT.FAN4 | PPC405.C405PLBDCUSIZE2 |
| TCELL28:OUT.FAN5 | PPC405.C405PLBDCUU0ATTR |
| TCELL28:OUT.FAN6 | PPC405.C405PLBDCUCACHEABLE |
| TCELL28:OUT.FAN7 | PPC405.C405DBGWBIAR19 |
| TCELL28:OUT.SEC8 | PPC405.TSTISOCMRDATAO40 |
| TCELL28:OUT.SEC9 | PPC405.TSTISOCMRDATAO39 |
| TCELL28:OUT.SEC10 | PPC405.TSTISOCMRDATAO38 |
| TCELL28:OUT.SEC11 | PPC405.TSTISOCMRDATAO37 |
| TCELL28:OUT.SEC12 | PPC405.C405PLBICUCACHEABLE |
| TCELL28:OUT.SEC13 | PPC405.C405PLBICUU0ATTR |
| TCELL28:OUT.SEC14 | PPC405.C405PLBICUSIZE3 |
| TCELL28:OUT.SEC15 | PPC405.C405PLBICUSIZE2 |
| TCELL28:OUT.TEST0 | PPC405.TSTTRSTNEGO |
| TCELL29:IMUX.SR0 | PPC405.RSTC405RESETSYS |
| TCELL29:IMUX.TI0 | PPC405.TIEC405PVR6 |
| TCELL29:IMUX.TI1 | PPC405.TIEC405PVR7 |
| TCELL29:IMUX.TS0 | PPC405.TIEC405PVR8 |
| TCELL29:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS8 |
| TCELL29:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS8 |
| TCELL29:IMUX.G0.DATA2 | PPC405.TSTTIMERENI |
| TCELL29:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS9 |
| TCELL29:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS9 |
| TCELL29:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI8 |
| TCELL29:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS10 |
| TCELL29:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS10 |
| TCELL29:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS11 |
| TCELL29:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS11 |
| TCELL29:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS8 |
| TCELL29:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS9 |
| TCELL29:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS10 |
| TCELL29:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS11 |
| TCELL29:OUT.FAN4 | PPC405.C405PLBDCUBE0 |
| TCELL29:OUT.FAN5 | PPC405.C405PLBDCUBE1 |
| TCELL29:OUT.FAN6 | PPC405.C405PLBDCUBE2 |
| TCELL29:OUT.FAN7 | PPC405.C405PLBDCUBE3 |
| TCELL29:OUT.SEC8 | PPC405.TSTISOCMRDATAO44 |
| TCELL29:OUT.SEC9 | PPC405.TSTISOCMRDATAO43 |
| TCELL29:OUT.SEC10 | PPC405.TSTISOCMRDATAO42 |
| TCELL29:OUT.SEC11 | PPC405.TSTISOCMRDATAO41 |
| TCELL29:OUT.SEC12 | PPC405.C405DBGWBIAR23 |
| TCELL29:OUT.SEC13 | PPC405.C405DBGWBIAR9 |
| TCELL29:OUT.SEC14 | PPC405.C405DBGWBIAR2 |
| TCELL29:OUT.SEC15 | PPC405.C405DBGWBIAR1 |
| TCELL30:IMUX.TI0 | PPC405.MCPPCRST |
| TCELL30:IMUX.TI1 | PPC405.TIEC405PVR3 |
| TCELL30:IMUX.TS0 | PPC405.TIEC405PVR4 |
| TCELL30:IMUX.TS1 | PPC405.TIEC405PVR5 |
| TCELL30:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS4 |
| TCELL30:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS4 |
| TCELL30:IMUX.G0.DATA2 | PPC405.TSTCPUCLKENI |
| TCELL30:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS5 |
| TCELL30:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS5 |
| TCELL30:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI9 |
| TCELL30:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS6 |
| TCELL30:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS6 |
| TCELL30:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS7 |
| TCELL30:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS7 |
| TCELL30:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS4 |
| TCELL30:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS5 |
| TCELL30:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS6 |
| TCELL30:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS7 |
| TCELL30:OUT.FAN4 | PPC405.C405RSTSYSRESETREQ |
| TCELL30:OUT.FAN5 | PPC405.C405CPMCORESLEEPREQ |
| TCELL30:OUT.FAN6 | PPC405.C405XXXMACHINECHECK |
| TCELL30:OUT.FAN7 | PPC405.C405DBGLOADDATAONAPUDBUS |
| TCELL30:OUT.SEC8 | PPC405.TSTISOCMRDATAO48 |
| TCELL30:OUT.SEC9 | PPC405.TSTISOCMRDATAO47 |
| TCELL30:OUT.SEC10 | PPC405.TSTISOCMRDATAO46 |
| TCELL30:OUT.SEC11 | PPC405.TSTISOCMRDATAO45 |
| TCELL30:OUT.SEC12 | PPC405.C405DBGWBIAR24 |
| TCELL30:OUT.SEC13 | PPC405.C405DBGWBIAR10 |
| TCELL30:OUT.SEC14 | PPC405.C405DBGWBIAR4 |
| TCELL30:OUT.SEC15 | PPC405.C405DBGWBIAR3 |
| TCELL31:IMUX.TI0 | PPC405.TIEC405PVR0 |
| TCELL31:IMUX.TI1 | PPC405.TIEC405PVR1 |
| TCELL31:IMUX.TS0 | PPC405.TIEC405PVR2 |
| TCELL31:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS0 |
| TCELL31:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS0 |
| TCELL31:IMUX.G0.DATA2 | PPC405.EICC405EXTINPUTIRQ |
| TCELL31:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS1 |
| TCELL31:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS1 |
| TCELL31:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI10 |
| TCELL31:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS2 |
| TCELL31:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS2 |
| TCELL31:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS3 |
| TCELL31:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS3 |
| TCELL31:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS0 |
| TCELL31:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS1 |
| TCELL31:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS2 |
| TCELL31:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS3 |
| TCELL31:OUT.FAN4 | PPC405.C405CPMMSRCE |
| TCELL31:OUT.FAN5 | PPC405.C405CPMMSREE |
| TCELL31:OUT.FAN6 | PPC405.C405DBGMSRWE |
| TCELL31:OUT.FAN7 | PPC405.C405DBGSTOPACK |
| TCELL31:OUT.SEC8 | PPC405.TSTISOCMRDATAO52 |
| TCELL31:OUT.SEC9 | PPC405.TSTISOCMRDATAO51 |
| TCELL31:OUT.SEC10 | PPC405.TSTISOCMRDATAO50 |
| TCELL31:OUT.SEC11 | PPC405.TSTISOCMRDATAO49 |
| TCELL31:OUT.SEC12 | PPC405.C405DBGWBIAR25 |
| TCELL31:OUT.SEC13 | PPC405.C405DBGWBIAR20 |
| TCELL31:OUT.SEC14 | PPC405.C405DBGWBIAR6 |
| TCELL31:OUT.SEC15 | PPC405.C405DBGWBIAR5 |
| TCELL32:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS0 |
| TCELL32:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS4 |
| TCELL32:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS8 |
| TCELL32:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS12 |
| TCELL32:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI17 |
| TCELL32:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI49 |
| TCELL32:IMUX.G0.DATA6 | PPC405.LSSDC405SCANIN8 |
| TCELL32:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS1 |
| TCELL32:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS5 |
| TCELL32:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS9 |
| TCELL32:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS13 |
| TCELL32:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI18 |
| TCELL32:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI50 |
| TCELL32:IMUX.G1.DATA6 | PPC405.LSSDC405SCANIN9 |
| TCELL32:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS2 |
| TCELL32:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS6 |
| TCELL32:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS10 |
| TCELL32:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS14 |
| TCELL32:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI19 |
| TCELL32:IMUX.G2.DATA5 | PPC405.LSSDC405ARRAYCCLKNEG |
| TCELL32:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS3 |
| TCELL32:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS7 |
| TCELL32:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS11 |
| TCELL32:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS15 |
| TCELL32:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI20 |
| TCELL32:IMUX.G3.DATA5 | PPC405.LSSDC405BCLK |
| TCELL32:IMUX.BRAM_ADDRA0 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL32:IMUX.BRAM_ADDRA0.S1 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL32:IMUX.BRAM_ADDRA0.S2 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL32:IMUX.BRAM_ADDRA0.S3 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL32:IMUX.BRAM_ADDRA1 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL32:IMUX.BRAM_ADDRA1.S1 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL32:IMUX.BRAM_ADDRA1.S2 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL32:IMUX.BRAM_ADDRA1.S3 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL32:IMUX.BRAM_ADDRA2 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL32:IMUX.BRAM_ADDRA2.S1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL32:IMUX.BRAM_ADDRA2.S2 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL32:IMUX.BRAM_ADDRA3 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL32:IMUX.BRAM_ADDRA3.S1 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL32:IMUX.BRAM_ADDRA3.S2 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL32:IMUX.BRAM_ADDRB0 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL32:IMUX.BRAM_ADDRB0.S1 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL32:IMUX.BRAM_ADDRB0.S2 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL32:IMUX.BRAM_ADDRB0.S3 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL32:IMUX.BRAM_ADDRB1 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL32:IMUX.BRAM_ADDRB1.S1 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL32:IMUX.BRAM_ADDRB1.S2 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL32:IMUX.BRAM_ADDRB1.S3 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL32:IMUX.BRAM_ADDRB2 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL32:IMUX.BRAM_ADDRB2.S1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL32:IMUX.BRAM_ADDRB2.S2 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL32:IMUX.BRAM_ADDRB3 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL32:IMUX.BRAM_ADDRB3.S1 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL32:IMUX.BRAM_ADDRB3.S2 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL32:OUT.FAN0 | PPC405.ISOCMBRAMWRABUS8 |
| TCELL32:OUT.FAN1 | PPC405.ISOCMBRAMWRABUS9 |
| TCELL32:OUT.FAN2 | PPC405.ISOCMBRAMWRABUS10 |
| TCELL32:OUT.FAN3 | PPC405.ISOCMBRAMWRABUS11 |
| TCELL32:OUT.FAN4 | PPC405.ISOCMBRAMWRABUS12 |
| TCELL32:OUT.FAN5 | PPC405.ISOCMBRAMWRABUS13 |
| TCELL32:OUT.FAN6 | PPC405.ISOCMBRAMWRABUS14 |
| TCELL32:OUT.FAN7 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL32:OUT.SEC8 | PPC405.TSTISOCMABUSO0 |
| TCELL32:OUT.SEC9 | PPC405.TSTISOCMICUREADYO |
| TCELL32:OUT.SEC10 | PPC405.TSTISOCMREQPENDO |
| TCELL32:OUT.SEC11 | PPC405.TSTISOCMXLATEVALIDO |
| TCELL32:OUT.SEC12 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL32:OUT.SEC13 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL32:OUT.SEC14 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL32:OUT.SEC15 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL32:OUT.TEST0 | PPC405.TSTISOCMABUSO29 |
| TCELL32:OUT.TEST2 | PPC405.TSTISOCMABORTO |
| TCELL32:OUT.TEST4 | PPC405.C405ISOCMU0ATTR |
| TCELL32:OUT.TEST6 | PPC405.C405DSOCMCACHEABLE |
| TCELL33:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS16 |
| TCELL33:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS20 |
| TCELL33:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS24 |
| TCELL33:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS28 |
| TCELL33:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI21 |
| TCELL33:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI51 |
| TCELL33:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS17 |
| TCELL33:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS21 |
| TCELL33:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS25 |
| TCELL33:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS29 |
| TCELL33:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI22 |
| TCELL33:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI52 |
| TCELL33:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS18 |
| TCELL33:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS22 |
| TCELL33:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS26 |
| TCELL33:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS30 |
| TCELL33:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI23 |
| TCELL33:IMUX.G2.DATA5 | PPC405.LSSDC405BISTCCLK |
| TCELL33:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS19 |
| TCELL33:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS23 |
| TCELL33:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS27 |
| TCELL33:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS31 |
| TCELL33:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI24 |
| TCELL33:IMUX.G3.DATA5 | PPC405.LSSDC405CNTLPOINT |
| TCELL33:OUT.FAN0 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL33:OUT.FAN1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL33:OUT.FAN2 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL33:OUT.FAN3 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL33:OUT.FAN4 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL33:OUT.FAN5 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL33:OUT.FAN6 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL33:OUT.FAN7 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL33:OUT.SEC8 | PPC405.C405LSSDDIAGOUT |
| TCELL33:OUT.SEC9 | PPC405.C405LSSDDIAGABISTDONE |
| TCELL33:OUT.SEC10 | PPC405.TSTISOCMABUSO4 |
| TCELL33:OUT.SEC11 | PPC405.TSTISOCMABUSO3 |
| TCELL33:OUT.SEC12 | PPC405.TSTISOCMABUSO2 |
| TCELL33:OUT.SEC13 | PPC405.TSTISOCMABUSO1 |
| TCELL33:OUT.SEC14 | PPC405.ISOCMRDADDRVALID |
| TCELL33:OUT.SEC15 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL33:OUT.TEST0 | PPC405.C405DSOCMGUARDED |
| TCELL33:OUT.TEST2 | PPC405.C405DSOCMSTRINGMULTIPLE |
| TCELL34:IMUX.SR0 | PPC405.ISCNTLVALUE0 |
| TCELL34:IMUX.SR1 | PPC405.ISCNTLVALUE1 |
| TCELL34:IMUX.TI0 | PPC405.TIEISOCMDCRADDR0 |
| TCELL34:IMUX.TI1 | PPC405.TIEISOCMDCRADDR1 |
| TCELL34:IMUX.TS0 | PPC405.TIEISOCMDCRADDR2 |
| TCELL34:IMUX.TS1 | PPC405.TIEISOCMDCRADDR3 |
| TCELL34:IMUX.G0.DATA0 | PPC405.ISCNTLVALUE6 |
| TCELL34:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI27 |
| TCELL34:IMUX.G0.DATA2 | PPC405.LSSDC405SCANGATE |
| TCELL34:IMUX.G1.DATA0 | PPC405.ISCNTLVALUE7 |
| TCELL34:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI28 |
| TCELL34:IMUX.G1.DATA2 | PPC405.LSSDC405TESTEVS |
| TCELL34:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI25 |
| TCELL34:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI53 |
| TCELL34:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI26 |
| TCELL34:IMUX.G3.DATA1 | PPC405.TSTISOCMRDATAI54 |
| TCELL34:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS0 |
| TCELL34:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS1 |
| TCELL34:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS2 |
| TCELL34:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS3 |
| TCELL34:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS4 |
| TCELL34:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS5 |
| TCELL34:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS6 |
| TCELL34:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS7 |
| TCELL34:OUT.SEC8 | PPC405.C405LSSDSCANOUT0 |
| TCELL34:OUT.SEC9 | PPC405.TSTISOCMABUSO8 |
| TCELL34:OUT.SEC10 | PPC405.TSTISOCMABUSO7 |
| TCELL34:OUT.SEC11 | PPC405.TSTISOCMABUSO6 |
| TCELL34:OUT.SEC12 | PPC405.TSTISOCMABUSO5 |
| TCELL34:OUT.SEC13 | PPC405.ISOCMBRAMEN |
| TCELL34:OUT.SEC14 | PPC405.ISOCMBRAMEVENWRITEEN |
| TCELL34:OUT.SEC15 | PPC405.ISOCMBRAMODDWRITEEN |
| TCELL34:OUT.TEST0 | PPC405.C405LSSDSCANOUT1 |
| TCELL34:OUT.TEST2 | PPC405.C405DSOCMU0ATTR |
| TCELL35:IMUX.SR0 | PPC405.ISCNTLVALUE2 |
| TCELL35:IMUX.SR1 | PPC405.ISCNTLVALUE3 |
| TCELL35:IMUX.TI0 | PPC405.TIEISOCMDCRADDR4 |
| TCELL35:IMUX.TI1 | PPC405.TIEISOCMDCRADDR5 |
| TCELL35:IMUX.TS0 | PPC405.TIEISOCMDCRADDR6 |
| TCELL35:IMUX.TS1 | PPC405.TIEISOCMDCRADDR7 |
| TCELL35:IMUX.G0.DATA0 | PPC405.TSTISOCMRDATAI29 |
| TCELL35:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI55 |
| TCELL35:IMUX.G1.DATA0 | PPC405.TSTISOCMRDATAI30 |
| TCELL35:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI56 |
| TCELL35:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI31 |
| TCELL35:IMUX.G2.DATA1 | PPC405.LSSDC405TESTM1 |
| TCELL35:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI32 |
| TCELL35:IMUX.G3.DATA1 | PPC405.LSSDC405TESTM3 |
| TCELL35:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS8 |
| TCELL35:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS9 |
| TCELL35:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS10 |
| TCELL35:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS11 |
| TCELL35:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS12 |
| TCELL35:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS13 |
| TCELL35:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS14 |
| TCELL35:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS15 |
| TCELL35:OUT.SEC10 | PPC405.C405LSSDSCANOUT3 |
| TCELL35:OUT.SEC11 | PPC405.C405LSSDSCANOUT2 |
| TCELL35:OUT.SEC12 | PPC405.TSTISOCMABUSO12 |
| TCELL35:OUT.SEC13 | PPC405.TSTISOCMABUSO11 |
| TCELL35:OUT.SEC14 | PPC405.TSTISOCMABUSO10 |
| TCELL35:OUT.SEC15 | PPC405.TSTISOCMABUSO9 |
| TCELL36:IMUX.CLK0 | PPC405.BRAMISOCMCLK |
| TCELL36:IMUX.TI0 | PPC405.ISARCVALUE0 |
| TCELL36:IMUX.TI1 | PPC405.ISARCVALUE1 |
| TCELL36:IMUX.TS0 | PPC405.ISARCVALUE2 |
| TCELL36:IMUX.TS1 | PPC405.ISARCVALUE3 |
| TCELL36:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDACK |
| TCELL36:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI36 |
| TCELL36:IMUX.G0.DATA2 | PPC405.LSSDC405SCANIN1 |
| TCELL36:IMUX.G1.DATA0 | PPC405.TSTISOCMRDATAI33 |
| TCELL36:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI57 |
| TCELL36:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI34 |
| TCELL36:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI58 |
| TCELL36:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI35 |
| TCELL36:IMUX.G3.DATA1 | PPC405.LSSDC405SCANIN0 |
| TCELL36:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS16 |
| TCELL36:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS17 |
| TCELL36:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS18 |
| TCELL36:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS19 |
| TCELL36:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS20 |
| TCELL36:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS21 |
| TCELL36:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS22 |
| TCELL36:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS23 |
| TCELL36:OUT.SEC10 | PPC405.C405LSSDSCANOUT5 |
| TCELL36:OUT.SEC11 | PPC405.C405LSSDSCANOUT4 |
| TCELL36:OUT.SEC12 | PPC405.TSTISOCMABUSO16 |
| TCELL36:OUT.SEC13 | PPC405.TSTISOCMABUSO15 |
| TCELL36:OUT.SEC14 | PPC405.TSTISOCMABUSO14 |
| TCELL36:OUT.SEC15 | PPC405.TSTISOCMABUSO13 |
| TCELL37:IMUX.TI0 | PPC405.ISARCVALUE4 |
| TCELL37:IMUX.TI1 | PPC405.ISARCVALUE5 |
| TCELL37:IMUX.TS0 | PPC405.ISARCVALUE6 |
| TCELL37:IMUX.TS1 | PPC405.ISARCVALUE7 |
| TCELL37:IMUX.G0.DATA0 | PPC405.ISCNTLVALUE4 |
| TCELL37:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI39 |
| TCELL37:IMUX.G0.DATA2 | PPC405.LSSDC405SCANIN2 |
| TCELL37:IMUX.G1.DATA0 | PPC405.ISCNTLVALUE5 |
| TCELL37:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI40 |
| TCELL37:IMUX.G1.DATA2 | PPC405.LSSDC405SCANIN3 |
| TCELL37:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI37 |
| TCELL37:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI59 |
| TCELL37:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI38 |
| TCELL37:IMUX.G3.DATA1 | PPC405.TSTISOCMRDATAI60 |
| TCELL37:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS24 |
| TCELL37:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS25 |
| TCELL37:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS26 |
| TCELL37:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS27 |
| TCELL37:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS28 |
| TCELL37:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS29 |
| TCELL37:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS30 |
| TCELL37:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS31 |
| TCELL37:OUT.SEC10 | PPC405.C405LSSDSCANOUT7 |
| TCELL37:OUT.SEC11 | PPC405.C405LSSDSCANOUT6 |
| TCELL37:OUT.SEC12 | PPC405.TSTISOCMABUSO20 |
| TCELL37:OUT.SEC13 | PPC405.TSTISOCMABUSO19 |
| TCELL37:OUT.SEC14 | PPC405.TSTISOCMABUSO18 |
| TCELL37:OUT.SEC15 | PPC405.TSTISOCMABUSO17 |
| TCELL38:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS32 |
| TCELL38:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS36 |
| TCELL38:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS40 |
| TCELL38:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS44 |
| TCELL38:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI41 |
| TCELL38:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI61 |
| TCELL38:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS33 |
| TCELL38:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS37 |
| TCELL38:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS41 |
| TCELL38:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS45 |
| TCELL38:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI42 |
| TCELL38:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI62 |
| TCELL38:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS34 |
| TCELL38:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS38 |
| TCELL38:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS42 |
| TCELL38:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS46 |
| TCELL38:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI43 |
| TCELL38:IMUX.G2.DATA5 | PPC405.LSSDC405SCANIN4 |
| TCELL38:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS35 |
| TCELL38:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS39 |
| TCELL38:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS43 |
| TCELL38:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS47 |
| TCELL38:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI44 |
| TCELL38:IMUX.G3.DATA5 | PPC405.LSSDC405SCANIN5 |
| TCELL38:OUT.FAN0 | PPC405.ISOCMBRAMRDABUS8 |
| TCELL38:OUT.FAN1 | PPC405.ISOCMBRAMRDABUS9 |
| TCELL38:OUT.FAN2 | PPC405.ISOCMBRAMRDABUS10 |
| TCELL38:OUT.FAN3 | PPC405.ISOCMBRAMRDABUS11 |
| TCELL38:OUT.FAN4 | PPC405.ISOCMBRAMRDABUS12 |
| TCELL38:OUT.FAN5 | PPC405.ISOCMBRAMRDABUS13 |
| TCELL38:OUT.FAN6 | PPC405.ISOCMBRAMRDABUS14 |
| TCELL38:OUT.FAN7 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL38:OUT.SEC8 | PPC405.TSTISOCMABUSO24 |
| TCELL38:OUT.SEC9 | PPC405.TSTISOCMABUSO23 |
| TCELL38:OUT.SEC10 | PPC405.TSTISOCMABUSO22 |
| TCELL38:OUT.SEC11 | PPC405.TSTISOCMABUSO21 |
| TCELL38:OUT.SEC12 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL38:OUT.SEC13 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL38:OUT.SEC14 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL38:OUT.SEC15 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL38:OUT.TEST0 | PPC405.C405LSSDSCANOUT8 |
| TCELL38:OUT.TEST2 | PPC405.C405LSSDSCANOUT9 |
| TCELL39:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS48 |
| TCELL39:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS52 |
| TCELL39:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS56 |
| TCELL39:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS60 |
| TCELL39:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI45 |
| TCELL39:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI63 |
| TCELL39:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS49 |
| TCELL39:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS53 |
| TCELL39:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS57 |
| TCELL39:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS61 |
| TCELL39:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI46 |
| TCELL39:IMUX.G1.DATA5 | PPC405.LSSDC405ACLK |
| TCELL39:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS50 |
| TCELL39:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS54 |
| TCELL39:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS58 |
| TCELL39:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS62 |
| TCELL39:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI47 |
| TCELL39:IMUX.G2.DATA5 | PPC405.LSSDC405SCANIN6 |
| TCELL39:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS51 |
| TCELL39:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS55 |
| TCELL39:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS59 |
| TCELL39:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS63 |
| TCELL39:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI48 |
| TCELL39:IMUX.G3.DATA5 | PPC405.LSSDC405SCANIN7 |
| TCELL39:IMUX.BRAM_ADDRA0 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL39:IMUX.BRAM_ADDRA0.S1 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL39:IMUX.BRAM_ADDRA0.S2 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL39:IMUX.BRAM_ADDRA0.S3 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL39:IMUX.BRAM_ADDRA1 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL39:IMUX.BRAM_ADDRA1.S1 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL39:IMUX.BRAM_ADDRA1.S2 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL39:IMUX.BRAM_ADDRA1.S3 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL39:IMUX.BRAM_ADDRA2 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL39:IMUX.BRAM_ADDRA2.S1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL39:IMUX.BRAM_ADDRA2.S2 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL39:IMUX.BRAM_ADDRA3 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL39:IMUX.BRAM_ADDRA3.S1 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL39:IMUX.BRAM_ADDRA3.S2 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL39:IMUX.BRAM_ADDRB0 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL39:IMUX.BRAM_ADDRB0.S1 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL39:IMUX.BRAM_ADDRB0.S2 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL39:IMUX.BRAM_ADDRB0.S3 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL39:IMUX.BRAM_ADDRB1 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL39:IMUX.BRAM_ADDRB1.S1 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL39:IMUX.BRAM_ADDRB1.S2 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL39:IMUX.BRAM_ADDRB1.S3 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL39:IMUX.BRAM_ADDRB2 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL39:IMUX.BRAM_ADDRB2.S1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL39:IMUX.BRAM_ADDRB2.S2 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL39:IMUX.BRAM_ADDRB3 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL39:IMUX.BRAM_ADDRB3.S1 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL39:IMUX.BRAM_ADDRB3.S2 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL39:OUT.FAN0 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL39:OUT.FAN1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL39:OUT.FAN2 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL39:OUT.FAN3 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL39:OUT.FAN4 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL39:OUT.FAN5 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL39:OUT.FAN6 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL39:OUT.FAN7 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL39:OUT.SEC9 | PPC405.C405ISOCMCONTEXTSYNC |
| TCELL39:OUT.SEC10 | PPC405.C405ISOCMCACHEABLE |
| TCELL39:OUT.SEC11 | PPC405.TSTISOCMABUSO28 |
| TCELL39:OUT.SEC12 | PPC405.TSTISOCMABUSO27 |
| TCELL39:OUT.SEC13 | PPC405.TSTISOCMABUSO26 |
| TCELL39:OUT.SEC14 | PPC405.TSTISOCMABUSO25 |
| TCELL39:OUT.SEC15 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL40:IMUX.G0.DATA0 | PPC405.BRAMDSOCMRDDBUS0 |
| TCELL40:IMUX.G0.DATA1 | PPC405.BRAMDSOCMRDDBUS4 |
| TCELL40:IMUX.G0.DATA2 | PPC405.BRAMDSOCMRDDBUS8 |
| TCELL40:IMUX.G0.DATA3 | PPC405.BRAMDSOCMRDDBUS12 |
| TCELL40:IMUX.G1.DATA0 | PPC405.BRAMDSOCMRDDBUS1 |
| TCELL40:IMUX.G1.DATA1 | PPC405.BRAMDSOCMRDDBUS5 |
| TCELL40:IMUX.G1.DATA2 | PPC405.BRAMDSOCMRDDBUS9 |
| TCELL40:IMUX.G1.DATA3 | PPC405.BRAMDSOCMRDDBUS13 |
| TCELL40:IMUX.G2.DATA0 | PPC405.BRAMDSOCMRDDBUS2 |
| TCELL40:IMUX.G2.DATA1 | PPC405.BRAMDSOCMRDDBUS6 |
| TCELL40:IMUX.G2.DATA2 | PPC405.BRAMDSOCMRDDBUS10 |
| TCELL40:IMUX.G2.DATA3 | PPC405.BRAMDSOCMRDDBUS14 |
| TCELL40:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDBUS3 |
| TCELL40:IMUX.G3.DATA1 | PPC405.BRAMDSOCMRDDBUS7 |
| TCELL40:IMUX.G3.DATA2 | PPC405.BRAMDSOCMRDDBUS11 |
| TCELL40:IMUX.G3.DATA3 | PPC405.BRAMDSOCMRDDBUS15 |
| TCELL40:IMUX.BRAM_ADDRA0 | PPC405.DSOCMBRAMABUS28 |
| TCELL40:IMUX.BRAM_ADDRA0.N1 | PPC405.DSOCMBRAMABUS24 |
| TCELL40:IMUX.BRAM_ADDRA0.N2 | PPC405.DSOCMBRAMABUS20 |
| TCELL40:IMUX.BRAM_ADDRA0.N3 | PPC405.DSOCMBRAMABUS16 |
| TCELL40:IMUX.BRAM_ADDRA1 | PPC405.DSOCMBRAMABUS29 |
| TCELL40:IMUX.BRAM_ADDRA1.N1 | PPC405.DSOCMBRAMABUS25 |
| TCELL40:IMUX.BRAM_ADDRA1.N2 | PPC405.DSOCMBRAMABUS21 |
| TCELL40:IMUX.BRAM_ADDRA1.N3 | PPC405.DSOCMBRAMABUS17 |
| TCELL40:IMUX.BRAM_ADDRA2.N1 | PPC405.DSOCMBRAMABUS26 |
| TCELL40:IMUX.BRAM_ADDRA2.N2 | PPC405.DSOCMBRAMABUS22 |
| TCELL40:IMUX.BRAM_ADDRA2.N3 | PPC405.DSOCMBRAMABUS18 |
| TCELL40:IMUX.BRAM_ADDRA3.N1 | PPC405.DSOCMBRAMABUS27 |
| TCELL40:IMUX.BRAM_ADDRA3.N2 | PPC405.DSOCMBRAMABUS23 |
| TCELL40:IMUX.BRAM_ADDRA3.N3 | PPC405.DSOCMBRAMABUS19 |
| TCELL40:OUT.FAN0 | PPC405.DSOCMBRAMBYTEWRITE0 |
| TCELL40:OUT.FAN1 | PPC405.DSOCMBRAMBYTEWRITE1 |
| TCELL40:OUT.FAN2 | PPC405.DSOCMBRAMBYTEWRITE2 |
| TCELL40:OUT.FAN3 | PPC405.DSOCMBRAMBYTEWRITE3 |
| TCELL40:OUT.FAN4 | PPC405.C405TRCODDEXECUTIONSTATUS1 |
| TCELL40:OUT.FAN5 | PPC405.C405TRCTRACESTATUS0 |
| TCELL40:OUT.FAN6 | PPC405.C405TRCTRACESTATUS3 |
| TCELL40:OUT.FAN7 | PPC405.C405TRCTRIGGEREVENTOUT |
| TCELL40:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO28 |
| TCELL40:OUT.SEC10 | PPC405.TSTDSOCMWRDBUSO15 |
| TCELL40:OUT.SEC11 | PPC405.TSTDSOCMWRDBUSO14 |
| TCELL40:OUT.SEC12 | PPC405.TSTDSOCMWRDBUSO1 |
| TCELL40:OUT.SEC13 | PPC405.C405JTGSHIFTDR |
| TCELL40:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE3 |
| TCELL40:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE2 |
| TCELL41:IMUX.CLK0 | PPC405.JTGC405TCK |
| TCELL41:IMUX.TI0 | PPC405.DSCNTLVALUE0 |
| TCELL41:IMUX.TI1 | PPC405.DSCNTLVALUE1 |
| TCELL41:IMUX.TS0 | PPC405.DSCNTLVALUE2 |
| TCELL41:IMUX.TS1 | PPC405.DSCNTLVALUE3 |
| TCELL41:IMUX.G0.DATA0 | PPC405.TRCC405TRACEDISABLE |
| TCELL41:IMUX.G1.DATA0 | PPC405.JTGC405TDI |
| TCELL41:IMUX.G2.DATA0 | PPC405.JTGC405TMS |
| TCELL41:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS0 |
| TCELL41:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS1 |
| TCELL41:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS2 |
| TCELL41:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS3 |
| TCELL41:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS4 |
| TCELL41:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS5 |
| TCELL41:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS6 |
| TCELL41:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS7 |
| TCELL41:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO3 |
| TCELL41:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO2 |
| TCELL41:OUT.SEC10 | PPC405.TSTDSOCMABUSO14 |
| TCELL41:OUT.SEC11 | PPC405.TSTDSOCMABUSO13 |
| TCELL41:OUT.SEC12 | PPC405.TSTDSOCMABUSO0 |
| TCELL41:OUT.SEC13 | PPC405.C405JTGTDO |
| TCELL41:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE5 |
| TCELL41:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE4 |
| TCELL41:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO16 |
| TCELL41:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO17 |
| TCELL41:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO29 |
| TCELL42:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR0 |
| TCELL42:IMUX.TI1 | PPC405.DSCNTLVALUE4 |
| TCELL42:IMUX.TS0 | PPC405.DSCNTLVALUE5 |
| TCELL42:IMUX.TS1 | PPC405.DSCNTLVALUE6 |
| TCELL42:IMUX.G0.DATA0 | PPC405.TRCC405TRIGGEREVENTIN |
| TCELL42:IMUX.G1.DATA0 | PPC405.JTGC405BNDSCANTDO |
| TCELL42:IMUX.G2.DATA0 | PPC405.TSTTRSTNEGI |
| TCELL42:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDACK |
| TCELL42:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS8 |
| TCELL42:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS9 |
| TCELL42:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS10 |
| TCELL42:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS11 |
| TCELL42:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS12 |
| TCELL42:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS13 |
| TCELL42:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS14 |
| TCELL42:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS15 |
| TCELL42:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO5 |
| TCELL42:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO4 |
| TCELL42:OUT.SEC10 | PPC405.TSTDSOCMABUSO16 |
| TCELL42:OUT.SEC11 | PPC405.TSTDSOCMABUSO15 |
| TCELL42:OUT.SEC12 | PPC405.TSTDSOCMABUSO1 |
| TCELL42:OUT.SEC13 | PPC405.C405JTGTDOEN |
| TCELL42:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE7 |
| TCELL42:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE6 |
| TCELL42:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO18 |
| TCELL42:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO19 |
| TCELL42:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO30 |
| TCELL43:IMUX.CLK0 | PPC405.BRAMDSOCMCLK |
| TCELL43:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR1 |
| TCELL43:IMUX.TI1 | PPC405.TIEDSOCMDCRADDR2 |
| TCELL43:IMUX.TS0 | PPC405.TIEDSOCMDCRADDR3 |
| TCELL43:IMUX.TS1 | PPC405.TIEDSOCMDCRADDR4 |
| TCELL43:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS16 |
| TCELL43:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS17 |
| TCELL43:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS18 |
| TCELL43:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS19 |
| TCELL43:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS20 |
| TCELL43:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS21 |
| TCELL43:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS22 |
| TCELL43:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS23 |
| TCELL43:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO7 |
| TCELL43:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO6 |
| TCELL43:OUT.SEC10 | PPC405.TSTDSOCMABUSO18 |
| TCELL43:OUT.SEC11 | PPC405.TSTDSOCMABUSO17 |
| TCELL43:OUT.SEC12 | PPC405.TSTDSOCMABUSO2 |
| TCELL43:OUT.SEC13 | PPC405.C405JTGUPDATEDR |
| TCELL43:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE9 |
| TCELL43:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE8 |
| TCELL43:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO20 |
| TCELL43:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO21 |
| TCELL43:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO31 |
| TCELL44:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR5 |
| TCELL44:IMUX.TI1 | PPC405.TIEDSOCMDCRADDR6 |
| TCELL44:IMUX.TS0 | PPC405.TIEDSOCMDCRADDR7 |
| TCELL44:IMUX.TS1 | PPC405.DSCNTLVALUE7 |
| TCELL44:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS24 |
| TCELL44:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS25 |
| TCELL44:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS26 |
| TCELL44:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS27 |
| TCELL44:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS28 |
| TCELL44:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS29 |
| TCELL44:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS30 |
| TCELL44:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS31 |
| TCELL44:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO8 |
| TCELL44:OUT.SEC9 | PPC405.TSTDSOCMABUSO20 |
| TCELL44:OUT.SEC10 | PPC405.TSTDSOCMABUSO19 |
| TCELL44:OUT.SEC11 | PPC405.TSTDSOCMABUSO4 |
| TCELL44:OUT.SEC12 | PPC405.TSTDSOCMABUSO3 |
| TCELL44:OUT.SEC13 | PPC405.DSOCMRDADDRVALID |
| TCELL44:OUT.SEC14 | PPC405.C405JTGCAPTUREDR |
| TCELL44:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE10 |
| TCELL44:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO9 |
| TCELL44:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO22 |
| TCELL44:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO23 |
| TCELL45:IMUX.TI0 | PPC405.DSARCVALUE0 |
| TCELL45:IMUX.TI1 | PPC405.DSARCVALUE1 |
| TCELL45:IMUX.TS0 | PPC405.DSARCVALUE2 |
| TCELL45:IMUX.TS1 | PPC405.DSARCVALUE3 |
| TCELL45:OUT.FAN0 | PPC405.DSOCMBRAMABUS8 |
| TCELL45:OUT.FAN1 | PPC405.DSOCMBRAMABUS9 |
| TCELL45:OUT.FAN2 | PPC405.DSOCMBRAMABUS10 |
| TCELL45:OUT.FAN3 | PPC405.DSOCMBRAMABUS11 |
| TCELL45:OUT.FAN4 | PPC405.DSOCMBRAMABUS12 |
| TCELL45:OUT.FAN5 | PPC405.DSOCMBRAMABUS13 |
| TCELL45:OUT.FAN6 | PPC405.DSOCMBRAMABUS14 |
| TCELL45:OUT.FAN7 | PPC405.DSOCMBRAMABUS15 |
| TCELL45:OUT.SEC8 | PPC405.TSTDSOCMABUSO8 |
| TCELL45:OUT.SEC9 | PPC405.TSTDSOCMABUSO7 |
| TCELL45:OUT.SEC10 | PPC405.TSTDSOCMABUSO6 |
| TCELL45:OUT.SEC11 | PPC405.TSTDSOCMABUSO5 |
| TCELL45:OUT.SEC12 | PPC405.DSOCMBRAMABUS19 |
| TCELL45:OUT.SEC13 | PPC405.DSOCMBRAMABUS18 |
| TCELL45:OUT.SEC14 | PPC405.DSOCMBRAMABUS17 |
| TCELL45:OUT.SEC15 | PPC405.DSOCMBRAMABUS16 |
| TCELL45:OUT.TEST0 | PPC405.TSTDSOCMABUSO21 |
| TCELL45:OUT.TEST2 | PPC405.TSTDSOCMABUSO22 |
| TCELL45:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO10 |
| TCELL45:OUT.TEST6 | PPC405.TSTDSOCMWRDBUSO11 |
| TCELL45:OUT.TEST8 | PPC405.TSTDSOCMWRDBUSO24 |
| TCELL45:OUT.TEST10 | PPC405.TSTDSOCMWRDBUSO25 |
| TCELL46:IMUX.TI0 | PPC405.DSARCVALUE4 |
| TCELL46:IMUX.TI1 | PPC405.DSARCVALUE5 |
| TCELL46:IMUX.TS0 | PPC405.DSARCVALUE6 |
| TCELL46:IMUX.TS1 | PPC405.DSARCVALUE7 |
| TCELL46:OUT.FAN0 | PPC405.DSOCMBRAMABUS20 |
| TCELL46:OUT.FAN1 | PPC405.DSOCMBRAMABUS21 |
| TCELL46:OUT.FAN2 | PPC405.DSOCMBRAMABUS22 |
| TCELL46:OUT.FAN3 | PPC405.DSOCMBRAMABUS23 |
| TCELL46:OUT.FAN4 | PPC405.DSOCMBRAMABUS24 |
| TCELL46:OUT.FAN5 | PPC405.DSOCMBRAMABUS25 |
| TCELL46:OUT.FAN6 | PPC405.DSOCMBRAMABUS26 |
| TCELL46:OUT.FAN7 | PPC405.DSOCMBRAMABUS27 |
| TCELL46:OUT.SEC8 | PPC405.TSTDSOCMABUSO12 |
| TCELL46:OUT.SEC9 | PPC405.TSTDSOCMABUSO11 |
| TCELL46:OUT.SEC10 | PPC405.TSTDSOCMABUSO10 |
| TCELL46:OUT.SEC11 | PPC405.TSTDSOCMABUSO9 |
| TCELL46:OUT.SEC12 | PPC405.DSOCMBUSY |
| TCELL46:OUT.SEC13 | PPC405.DSOCMBRAMEN |
| TCELL46:OUT.SEC14 | PPC405.DSOCMBRAMABUS29 |
| TCELL46:OUT.SEC15 | PPC405.DSOCMBRAMABUS28 |
| TCELL46:OUT.TEST0 | PPC405.TSTDSOCMABUSO23 |
| TCELL46:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO0 |
| TCELL46:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO12 |
| TCELL46:OUT.TEST6 | PPC405.TSTDSOCMWRDBUSO13 |
| TCELL46:OUT.TEST8 | PPC405.TSTDSOCMWRDBUSO26 |
| TCELL46:OUT.TEST10 | PPC405.TSTDSOCMWRDBUSO27 |
| TCELL47:IMUX.G0.DATA0 | PPC405.BRAMDSOCMRDDBUS16 |
| TCELL47:IMUX.G0.DATA1 | PPC405.BRAMDSOCMRDDBUS20 |
| TCELL47:IMUX.G0.DATA2 | PPC405.BRAMDSOCMRDDBUS24 |
| TCELL47:IMUX.G0.DATA3 | PPC405.BRAMDSOCMRDDBUS28 |
| TCELL47:IMUX.G1.DATA0 | PPC405.BRAMDSOCMRDDBUS17 |
| TCELL47:IMUX.G1.DATA1 | PPC405.BRAMDSOCMRDDBUS21 |
| TCELL47:IMUX.G1.DATA2 | PPC405.BRAMDSOCMRDDBUS25 |
| TCELL47:IMUX.G1.DATA3 | PPC405.BRAMDSOCMRDDBUS29 |
| TCELL47:IMUX.G2.DATA0 | PPC405.BRAMDSOCMRDDBUS18 |
| TCELL47:IMUX.G2.DATA1 | PPC405.BRAMDSOCMRDDBUS22 |
| TCELL47:IMUX.G2.DATA2 | PPC405.BRAMDSOCMRDDBUS26 |
| TCELL47:IMUX.G2.DATA3 | PPC405.BRAMDSOCMRDDBUS30 |
| TCELL47:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDBUS19 |
| TCELL47:IMUX.G3.DATA1 | PPC405.BRAMDSOCMRDDBUS23 |
| TCELL47:IMUX.G3.DATA2 | PPC405.BRAMDSOCMRDDBUS27 |
| TCELL47:IMUX.G3.DATA3 | PPC405.BRAMDSOCMRDDBUS31 |
| TCELL47:IMUX.BRAM_ADDRA0 | PPC405.DSOCMBRAMABUS28 |
| TCELL47:IMUX.BRAM_ADDRA0.N1 | PPC405.DSOCMBRAMABUS24 |
| TCELL47:IMUX.BRAM_ADDRA0.N2 | PPC405.DSOCMBRAMABUS20 |
| TCELL47:IMUX.BRAM_ADDRA0.N3 | PPC405.DSOCMBRAMABUS16 |
| TCELL47:IMUX.BRAM_ADDRA1 | PPC405.DSOCMBRAMABUS29 |
| TCELL47:IMUX.BRAM_ADDRA1.N1 | PPC405.DSOCMBRAMABUS25 |
| TCELL47:IMUX.BRAM_ADDRA1.N2 | PPC405.DSOCMBRAMABUS21 |
| TCELL47:IMUX.BRAM_ADDRA1.N3 | PPC405.DSOCMBRAMABUS17 |
| TCELL47:IMUX.BRAM_ADDRA2.N1 | PPC405.DSOCMBRAMABUS26 |
| TCELL47:IMUX.BRAM_ADDRA2.N2 | PPC405.DSOCMBRAMABUS22 |
| TCELL47:IMUX.BRAM_ADDRA2.N3 | PPC405.DSOCMBRAMABUS18 |
| TCELL47:IMUX.BRAM_ADDRA3.N1 | PPC405.DSOCMBRAMABUS27 |
| TCELL47:IMUX.BRAM_ADDRA3.N2 | PPC405.DSOCMBRAMABUS23 |
| TCELL47:IMUX.BRAM_ADDRA3.N3 | PPC405.DSOCMBRAMABUS19 |
| TCELL47:OUT.FAN0 | PPC405.C405TRCCYCLE |
| TCELL47:OUT.FAN1 | PPC405.C405TRCEVENEXECUTIONSTATUS0 |
| TCELL47:OUT.FAN2 | PPC405.C405TRCEVENEXECUTIONSTATUS1 |
| TCELL47:OUT.FAN3 | PPC405.C405TRCODDEXECUTIONSTATUS0 |
| TCELL47:OUT.FAN4 | PPC405.C405TRCTRACESTATUS1 |
| TCELL47:OUT.FAN5 | PPC405.C405TRCTRACESTATUS2 |
| TCELL47:OUT.FAN6 | PPC405.C405TRCTRIGGEREVENTTYPE0 |
| TCELL47:OUT.FAN7 | PPC405.C405TRCTRIGGEREVENTTYPE1 |
| TCELL47:OUT.SEC14 | PPC405.C405JTGPGMOUT |
| TCELL47:OUT.SEC15 | PPC405.C405JTGEXTEST |
Tile RBPPC
Cells: 48 IRIs: 0
Bel PPC405
| Pin | Direction | Wires |
|---|---|---|
| APUC405DCDAPUOP | input | TCELL16:IMUX.G0.DATA0 |
| APUC405DCDCREN | input | TCELL16:IMUX.G1.DATA0 |
| APUC405DCDFORCEALGN | input | TCELL16:IMUX.G2.DATA0 |
| APUC405DCDFORCEBESTEERING | input | TCELL16:IMUX.G3.DATA0 |
| APUC405DCDFPUOP | input | TCELL17:IMUX.G0.DATA0 |
| APUC405DCDGPRWRITE | input | TCELL17:IMUX.G1.DATA0 |
| APUC405DCDLDSTBYTE | input | TCELL17:IMUX.G2.DATA0 |
| APUC405DCDLDSTDW | input | TCELL17:IMUX.G3.DATA0 |
| APUC405DCDLDSTHW | input | TCELL18:IMUX.G0.DATA0 |
| APUC405DCDLDSTQW | input | TCELL18:IMUX.G1.DATA0 |
| APUC405DCDLDSTWD | input | TCELL18:IMUX.G2.DATA0 |
| APUC405DCDLOAD | input | TCELL18:IMUX.G3.DATA0 |
| APUC405DCDPRIVOP | input | TCELL19:IMUX.G0.DATA0 |
| APUC405DCDRAEN | input | TCELL19:IMUX.G1.DATA0 |
| APUC405DCDRBEN | input | TCELL19:IMUX.G2.DATA0 |
| APUC405DCDSTORE | input | TCELL19:IMUX.G3.DATA0 |
| APUC405DCDTRAPBE | input | TCELL20:IMUX.G0.DATA0 |
| APUC405DCDTRAPLE | input | TCELL20:IMUX.G1.DATA0 |
| APUC405DCDUPDATE | input | TCELL21:IMUX.G0.DATA0 |
| APUC405DCDVALIDOP | input | TCELL21:IMUX.G1.DATA0 |
| APUC405DCDXERCAEN | input | TCELL22:IMUX.G0.DATA0 |
| APUC405DCDXEROVEN | input | TCELL22:IMUX.G1.DATA0 |
| APUC405EXCEPTION | input | TCELL23:IMUX.G0.DATA0 |
| APUC405EXEBLOCKINGMCO | input | TCELL23:IMUX.G1.DATA0 |
| APUC405EXEBUSY | input | TCELL24:IMUX.G0.DATA0 |
| APUC405EXECR0 | input | TCELL24:IMUX.G1.DATA0 |
| APUC405EXECR1 | input | TCELL24:IMUX.G2.DATA0 |
| APUC405EXECR2 | input | TCELL25:IMUX.G0.DATA0 |
| APUC405EXECR3 | input | TCELL25:IMUX.G1.DATA0 |
| APUC405EXECRFIELD0 | input | TCELL25:IMUX.G2.DATA0 |
| APUC405EXECRFIELD1 | input | TCELL25:IMUX.G3.DATA0 |
| APUC405EXECRFIELD2 | input | TCELL26:IMUX.G0.DATA0 |
| APUC405EXELDDEPEND | input | TCELL26:IMUX.G1.DATA0 |
| APUC405EXENONBLOCKINGMCO | input | TCELL26:IMUX.G2.DATA0 |
| APUC405EXERESULT0 | input | TCELL26:IMUX.G3.DATA0 |
| APUC405EXERESULT1 | input | TCELL27:IMUX.G0.DATA0 |
| APUC405EXERESULT10 | input | TCELL29:IMUX.G1.DATA0 |
| APUC405EXERESULT11 | input | TCELL29:IMUX.G2.DATA0 |
| APUC405EXERESULT12 | input | TCELL29:IMUX.G3.DATA0 |
| APUC405EXERESULT13 | input | TCELL30:IMUX.G0.DATA0 |
| APUC405EXERESULT14 | input | TCELL30:IMUX.G1.DATA0 |
| APUC405EXERESULT15 | input | TCELL30:IMUX.G2.DATA0 |
| APUC405EXERESULT16 | input | TCELL30:IMUX.G3.DATA0 |
| APUC405EXERESULT17 | input | TCELL31:IMUX.G0.DATA0 |
| APUC405EXERESULT18 | input | TCELL31:IMUX.G1.DATA0 |
| APUC405EXERESULT19 | input | TCELL31:IMUX.G2.DATA0 |
| APUC405EXERESULT2 | input | TCELL27:IMUX.G1.DATA0 |
| APUC405EXERESULT20 | input | TCELL31:IMUX.G3.DATA0 |
| APUC405EXERESULT21 | input | TCELL16:IMUX.G0.DATA1 |
| APUC405EXERESULT22 | input | TCELL16:IMUX.G1.DATA1 |
| APUC405EXERESULT23 | input | TCELL17:IMUX.G0.DATA1 |
| APUC405EXERESULT24 | input | TCELL17:IMUX.G1.DATA1 |
| APUC405EXERESULT25 | input | TCELL18:IMUX.G0.DATA1 |
| APUC405EXERESULT26 | input | TCELL18:IMUX.G1.DATA1 |
| APUC405EXERESULT27 | input | TCELL19:IMUX.G0.DATA1 |
| APUC405EXERESULT28 | input | TCELL19:IMUX.G1.DATA1 |
| APUC405EXERESULT29 | input | TCELL20:IMUX.G2.DATA0 |
| APUC405EXERESULT3 | input | TCELL27:IMUX.G2.DATA0 |
| APUC405EXERESULT30 | input | TCELL20:IMUX.G3.DATA0 |
| APUC405EXERESULT31 | input | TCELL21:IMUX.G2.DATA0 |
| APUC405EXERESULT4 | input | TCELL27:IMUX.G3.DATA0 |
| APUC405EXERESULT5 | input | TCELL28:IMUX.G0.DATA0 |
| APUC405EXERESULT6 | input | TCELL28:IMUX.G1.DATA0 |
| APUC405EXERESULT7 | input | TCELL28:IMUX.G2.DATA0 |
| APUC405EXERESULT8 | input | TCELL28:IMUX.G3.DATA0 |
| APUC405EXERESULT9 | input | TCELL29:IMUX.G0.DATA0 |
| APUC405EXEXERCA | input | TCELL21:IMUX.G3.DATA0 |
| APUC405EXEXEROV | input | TCELL22:IMUX.G2.DATA0 |
| APUC405FPUEXCEPTION | input | TCELL22:IMUX.G3.DATA0 |
| APUC405LWBLDDEPEND | input | TCELL23:IMUX.G2.DATA0 |
| APUC405SLEEPREQ | input | TCELL23:IMUX.G3.DATA0 |
| APUC405WBLDDEPEND | input | TCELL24:IMUX.G3.DATA0 |
| BRAMDSOCMCLK | input | TCELL43:IMUX.CLK0 |
| BRAMDSOCMRDDACK | input | TCELL42:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS0 | input | TCELL40:IMUX.G0.DATA0 |
| BRAMDSOCMRDDBUS1 | input | TCELL40:IMUX.G1.DATA0 |
| BRAMDSOCMRDDBUS10 | input | TCELL40:IMUX.G2.DATA2 |
| BRAMDSOCMRDDBUS11 | input | TCELL40:IMUX.G3.DATA2 |
| BRAMDSOCMRDDBUS12 | input | TCELL40:IMUX.G0.DATA3 |
| BRAMDSOCMRDDBUS13 | input | TCELL40:IMUX.G1.DATA3 |
| BRAMDSOCMRDDBUS14 | input | TCELL40:IMUX.G2.DATA3 |
| BRAMDSOCMRDDBUS15 | input | TCELL40:IMUX.G3.DATA3 |
| BRAMDSOCMRDDBUS16 | input | TCELL47:IMUX.G0.DATA0 |
| BRAMDSOCMRDDBUS17 | input | TCELL47:IMUX.G1.DATA0 |
| BRAMDSOCMRDDBUS18 | input | TCELL47:IMUX.G2.DATA0 |
| BRAMDSOCMRDDBUS19 | input | TCELL47:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS2 | input | TCELL40:IMUX.G2.DATA0 |
| BRAMDSOCMRDDBUS20 | input | TCELL47:IMUX.G0.DATA1 |
| BRAMDSOCMRDDBUS21 | input | TCELL47:IMUX.G1.DATA1 |
| BRAMDSOCMRDDBUS22 | input | TCELL47:IMUX.G2.DATA1 |
| BRAMDSOCMRDDBUS23 | input | TCELL47:IMUX.G3.DATA1 |
| BRAMDSOCMRDDBUS24 | input | TCELL47:IMUX.G0.DATA2 |
| BRAMDSOCMRDDBUS25 | input | TCELL47:IMUX.G1.DATA2 |
| BRAMDSOCMRDDBUS26 | input | TCELL47:IMUX.G2.DATA2 |
| BRAMDSOCMRDDBUS27 | input | TCELL47:IMUX.G3.DATA2 |
| BRAMDSOCMRDDBUS28 | input | TCELL47:IMUX.G0.DATA3 |
| BRAMDSOCMRDDBUS29 | input | TCELL47:IMUX.G1.DATA3 |
| BRAMDSOCMRDDBUS3 | input | TCELL40:IMUX.G3.DATA0 |
| BRAMDSOCMRDDBUS30 | input | TCELL47:IMUX.G2.DATA3 |
| BRAMDSOCMRDDBUS31 | input | TCELL47:IMUX.G3.DATA3 |
| BRAMDSOCMRDDBUS4 | input | TCELL40:IMUX.G0.DATA1 |
| BRAMDSOCMRDDBUS5 | input | TCELL40:IMUX.G1.DATA1 |
| BRAMDSOCMRDDBUS6 | input | TCELL40:IMUX.G2.DATA1 |
| BRAMDSOCMRDDBUS7 | input | TCELL40:IMUX.G3.DATA1 |
| BRAMDSOCMRDDBUS8 | input | TCELL40:IMUX.G0.DATA2 |
| BRAMDSOCMRDDBUS9 | input | TCELL40:IMUX.G1.DATA2 |
| BRAMISOCMCLK | input | TCELL36:IMUX.CLK0 |
| BRAMISOCMRDDACK | input | TCELL36:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS0 | input | TCELL32:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS1 | input | TCELL32:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS10 | input | TCELL32:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS11 | input | TCELL32:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS12 | input | TCELL32:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS13 | input | TCELL32:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS14 | input | TCELL32:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS15 | input | TCELL32:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS16 | input | TCELL33:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS17 | input | TCELL33:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS18 | input | TCELL33:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS19 | input | TCELL33:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS2 | input | TCELL32:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS20 | input | TCELL33:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS21 | input | TCELL33:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS22 | input | TCELL33:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS23 | input | TCELL33:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS24 | input | TCELL33:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS25 | input | TCELL33:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS26 | input | TCELL33:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS27 | input | TCELL33:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS28 | input | TCELL33:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS29 | input | TCELL33:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS3 | input | TCELL32:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS30 | input | TCELL33:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS31 | input | TCELL33:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS32 | input | TCELL38:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS33 | input | TCELL38:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS34 | input | TCELL38:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS35 | input | TCELL38:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS36 | input | TCELL38:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS37 | input | TCELL38:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS38 | input | TCELL38:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS39 | input | TCELL38:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS4 | input | TCELL32:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS40 | input | TCELL38:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS41 | input | TCELL38:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS42 | input | TCELL38:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS43 | input | TCELL38:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS44 | input | TCELL38:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS45 | input | TCELL38:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS46 | input | TCELL38:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS47 | input | TCELL38:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS48 | input | TCELL39:IMUX.G0.DATA0 |
| BRAMISOCMRDDBUS49 | input | TCELL39:IMUX.G1.DATA0 |
| BRAMISOCMRDDBUS5 | input | TCELL32:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS50 | input | TCELL39:IMUX.G2.DATA0 |
| BRAMISOCMRDDBUS51 | input | TCELL39:IMUX.G3.DATA0 |
| BRAMISOCMRDDBUS52 | input | TCELL39:IMUX.G0.DATA1 |
| BRAMISOCMRDDBUS53 | input | TCELL39:IMUX.G1.DATA1 |
| BRAMISOCMRDDBUS54 | input | TCELL39:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS55 | input | TCELL39:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS56 | input | TCELL39:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS57 | input | TCELL39:IMUX.G1.DATA2 |
| BRAMISOCMRDDBUS58 | input | TCELL39:IMUX.G2.DATA2 |
| BRAMISOCMRDDBUS59 | input | TCELL39:IMUX.G3.DATA2 |
| BRAMISOCMRDDBUS6 | input | TCELL32:IMUX.G2.DATA1 |
| BRAMISOCMRDDBUS60 | input | TCELL39:IMUX.G0.DATA3 |
| BRAMISOCMRDDBUS61 | input | TCELL39:IMUX.G1.DATA3 |
| BRAMISOCMRDDBUS62 | input | TCELL39:IMUX.G2.DATA3 |
| BRAMISOCMRDDBUS63 | input | TCELL39:IMUX.G3.DATA3 |
| BRAMISOCMRDDBUS7 | input | TCELL32:IMUX.G3.DATA1 |
| BRAMISOCMRDDBUS8 | input | TCELL32:IMUX.G0.DATA2 |
| BRAMISOCMRDDBUS9 | input | TCELL32:IMUX.G1.DATA2 |
| C405APUDCDFULL | output | TCELL16:OUT.FAN0 |
| C405APUDCDHOLD | output | TCELL16:OUT.FAN1 |
| C405APUDCDINSTRUCTION0 | output | TCELL16:OUT.FAN2 |
| C405APUDCDINSTRUCTION1 | output | TCELL16:OUT.FAN3 |
| C405APUDCDINSTRUCTION10 | output | TCELL19:OUT.FAN0 |
| C405APUDCDINSTRUCTION11 | output | TCELL19:OUT.FAN1 |
| C405APUDCDINSTRUCTION12 | output | TCELL19:OUT.FAN2 |
| C405APUDCDINSTRUCTION13 | output | TCELL19:OUT.FAN3 |
| C405APUDCDINSTRUCTION14 | output | TCELL20:OUT.FAN0 |
| C405APUDCDINSTRUCTION15 | output | TCELL20:OUT.FAN1 |
| C405APUDCDINSTRUCTION16 | output | TCELL20:OUT.FAN2 |
| C405APUDCDINSTRUCTION17 | output | TCELL20:OUT.FAN3 |
| C405APUDCDINSTRUCTION18 | output | TCELL21:OUT.FAN0 |
| C405APUDCDINSTRUCTION19 | output | TCELL21:OUT.FAN1 |
| C405APUDCDINSTRUCTION2 | output | TCELL17:OUT.FAN0 |
| C405APUDCDINSTRUCTION20 | output | TCELL21:OUT.FAN2 |
| C405APUDCDINSTRUCTION21 | output | TCELL21:OUT.FAN3 |
| C405APUDCDINSTRUCTION22 | output | TCELL22:OUT.FAN0 |
| C405APUDCDINSTRUCTION23 | output | TCELL22:OUT.FAN1 |
| C405APUDCDINSTRUCTION24 | output | TCELL22:OUT.FAN2 |
| C405APUDCDINSTRUCTION25 | output | TCELL22:OUT.FAN3 |
| C405APUDCDINSTRUCTION26 | output | TCELL23:OUT.FAN0 |
| C405APUDCDINSTRUCTION27 | output | TCELL23:OUT.FAN1 |
| C405APUDCDINSTRUCTION28 | output | TCELL23:OUT.FAN2 |
| C405APUDCDINSTRUCTION29 | output | TCELL23:OUT.FAN3 |
| C405APUDCDINSTRUCTION3 | output | TCELL17:OUT.FAN1 |
| C405APUDCDINSTRUCTION30 | output | TCELL24:OUT.FAN0 |
| C405APUDCDINSTRUCTION31 | output | TCELL24:OUT.FAN1 |
| C405APUDCDINSTRUCTION4 | output | TCELL17:OUT.FAN2 |
| C405APUDCDINSTRUCTION5 | output | TCELL17:OUT.FAN3 |
| C405APUDCDINSTRUCTION6 | output | TCELL18:OUT.FAN0 |
| C405APUDCDINSTRUCTION7 | output | TCELL18:OUT.FAN1 |
| C405APUDCDINSTRUCTION8 | output | TCELL18:OUT.FAN2 |
| C405APUDCDINSTRUCTION9 | output | TCELL18:OUT.FAN3 |
| C405APUEXEFLUSH | output | TCELL24:OUT.FAN2 |
| C405APUEXEHOLD | output | TCELL24:OUT.FAN3 |
| C405APUEXELOADDBUS0 | output | TCELL25:OUT.FAN0 |
| C405APUEXELOADDBUS1 | output | TCELL25:OUT.FAN1 |
| C405APUEXELOADDBUS10 | output | TCELL27:OUT.FAN2 |
| C405APUEXELOADDBUS11 | output | TCELL27:OUT.FAN3 |
| C405APUEXELOADDBUS12 | output | TCELL28:OUT.FAN0 |
| C405APUEXELOADDBUS13 | output | TCELL28:OUT.FAN1 |
| C405APUEXELOADDBUS14 | output | TCELL28:OUT.FAN2 |
| C405APUEXELOADDBUS15 | output | TCELL28:OUT.FAN3 |
| C405APUEXELOADDBUS16 | output | TCELL29:OUT.FAN0 |
| C405APUEXELOADDBUS17 | output | TCELL29:OUT.FAN1 |
| C405APUEXELOADDBUS18 | output | TCELL29:OUT.FAN2 |
| C405APUEXELOADDBUS19 | output | TCELL29:OUT.FAN3 |
| C405APUEXELOADDBUS2 | output | TCELL25:OUT.FAN2 |
| C405APUEXELOADDBUS20 | output | TCELL30:OUT.FAN0 |
| C405APUEXELOADDBUS21 | output | TCELL30:OUT.FAN1 |
| C405APUEXELOADDBUS22 | output | TCELL30:OUT.FAN2 |
| C405APUEXELOADDBUS23 | output | TCELL30:OUT.FAN3 |
| C405APUEXELOADDBUS24 | output | TCELL31:OUT.FAN0 |
| C405APUEXELOADDBUS25 | output | TCELL31:OUT.FAN1 |
| C405APUEXELOADDBUS26 | output | TCELL31:OUT.FAN2 |
| C405APUEXELOADDBUS27 | output | TCELL31:OUT.FAN3 |
| C405APUEXELOADDBUS28 | output | TCELL16:OUT.FAN4 |
| C405APUEXELOADDBUS29 | output | TCELL16:OUT.FAN5 |
| C405APUEXELOADDBUS3 | output | TCELL25:OUT.FAN3 |
| C405APUEXELOADDBUS30 | output | TCELL17:OUT.FAN4 |
| C405APUEXELOADDBUS31 | output | TCELL17:OUT.FAN5 |
| C405APUEXELOADDBUS4 | output | TCELL26:OUT.FAN0 |
| C405APUEXELOADDBUS5 | output | TCELL26:OUT.FAN1 |
| C405APUEXELOADDBUS6 | output | TCELL26:OUT.FAN2 |
| C405APUEXELOADDBUS7 | output | TCELL26:OUT.FAN3 |
| C405APUEXELOADDBUS8 | output | TCELL27:OUT.FAN0 |
| C405APUEXELOADDBUS9 | output | TCELL27:OUT.FAN1 |
| C405APUEXELOADDVALID | output | TCELL18:OUT.FAN4 |
| C405APUEXERADATA0 | output | TCELL18:OUT.FAN5 |
| C405APUEXERADATA1 | output | TCELL19:OUT.FAN4 |
| C405APUEXERADATA10 | output | TCELL23:OUT.FAN5 |
| C405APUEXERADATA11 | output | TCELL24:OUT.FAN4 |
| C405APUEXERADATA12 | output | TCELL24:OUT.FAN5 |
| C405APUEXERADATA13 | output | TCELL25:OUT.FAN4 |
| C405APUEXERADATA14 | output | TCELL25:OUT.FAN5 |
| C405APUEXERADATA15 | output | TCELL26:OUT.FAN4 |
| C405APUEXERADATA16 | output | TCELL26:OUT.FAN5 |
| C405APUEXERADATA17 | output | TCELL27:OUT.FAN4 |
| C405APUEXERADATA18 | output | TCELL27:OUT.FAN5 |
| C405APUEXERADATA19 | output | TCELL28:OUT.FAN4 |
| C405APUEXERADATA2 | output | TCELL19:OUT.FAN5 |
| C405APUEXERADATA20 | output | TCELL28:OUT.FAN5 |
| C405APUEXERADATA21 | output | TCELL29:OUT.FAN4 |
| C405APUEXERADATA22 | output | TCELL29:OUT.FAN5 |
| C405APUEXERADATA23 | output | TCELL30:OUT.FAN4 |
| C405APUEXERADATA24 | output | TCELL30:OUT.FAN5 |
| C405APUEXERADATA25 | output | TCELL31:OUT.FAN4 |
| C405APUEXERADATA26 | output | TCELL31:OUT.FAN5 |
| C405APUEXERADATA27 | output | TCELL16:OUT.FAN6 |
| C405APUEXERADATA28 | output | TCELL16:OUT.FAN7 |
| C405APUEXERADATA29 | output | TCELL17:OUT.FAN6 |
| C405APUEXERADATA3 | output | TCELL20:OUT.FAN4 |
| C405APUEXERADATA30 | output | TCELL17:OUT.FAN7 |
| C405APUEXERADATA31 | output | TCELL18:OUT.FAN6 |
| C405APUEXERADATA4 | output | TCELL20:OUT.FAN5 |
| C405APUEXERADATA5 | output | TCELL21:OUT.FAN4 |
| C405APUEXERADATA6 | output | TCELL21:OUT.FAN5 |
| C405APUEXERADATA7 | output | TCELL22:OUT.FAN4 |
| C405APUEXERADATA8 | output | TCELL22:OUT.FAN5 |
| C405APUEXERADATA9 | output | TCELL23:OUT.FAN4 |
| C405APUEXERBDATA0 | output | TCELL18:OUT.FAN7 |
| C405APUEXERBDATA1 | output | TCELL19:OUT.FAN6 |
| C405APUEXERBDATA10 | output | TCELL23:OUT.FAN7 |
| C405APUEXERBDATA11 | output | TCELL24:OUT.FAN6 |
| C405APUEXERBDATA12 | output | TCELL24:OUT.FAN7 |
| C405APUEXERBDATA13 | output | TCELL25:OUT.FAN6 |
| C405APUEXERBDATA14 | output | TCELL25:OUT.FAN7 |
| C405APUEXERBDATA15 | output | TCELL26:OUT.FAN6 |
| C405APUEXERBDATA16 | output | TCELL26:OUT.FAN7 |
| C405APUEXERBDATA17 | output | TCELL27:OUT.FAN6 |
| C405APUEXERBDATA18 | output | TCELL27:OUT.FAN7 |
| C405APUEXERBDATA19 | output | TCELL28:OUT.FAN6 |
| C405APUEXERBDATA2 | output | TCELL19:OUT.FAN7 |
| C405APUEXERBDATA20 | output | TCELL28:OUT.FAN7 |
| C405APUEXERBDATA21 | output | TCELL29:OUT.FAN6 |
| C405APUEXERBDATA22 | output | TCELL29:OUT.FAN7 |
| C405APUEXERBDATA23 | output | TCELL30:OUT.FAN6 |
| C405APUEXERBDATA24 | output | TCELL30:OUT.FAN7 |
| C405APUEXERBDATA25 | output | TCELL31:OUT.FAN6 |
| C405APUEXERBDATA26 | output | TCELL31:OUT.FAN7 |
| C405APUEXERBDATA27 | output | TCELL16:OUT.SEC15 |
| C405APUEXERBDATA28 | output | TCELL16:OUT.SEC14 |
| C405APUEXERBDATA29 | output | TCELL17:OUT.SEC15 |
| C405APUEXERBDATA3 | output | TCELL20:OUT.FAN6 |
| C405APUEXERBDATA30 | output | TCELL17:OUT.SEC14 |
| C405APUEXERBDATA31 | output | TCELL18:OUT.SEC15 |
| C405APUEXERBDATA4 | output | TCELL20:OUT.FAN7 |
| C405APUEXERBDATA5 | output | TCELL21:OUT.FAN6 |
| C405APUEXERBDATA6 | output | TCELL21:OUT.FAN7 |
| C405APUEXERBDATA7 | output | TCELL22:OUT.FAN6 |
| C405APUEXERBDATA8 | output | TCELL22:OUT.FAN7 |
| C405APUEXERBDATA9 | output | TCELL23:OUT.FAN6 |
| C405APUEXEWDCNT0 | output | TCELL18:OUT.SEC14 |
| C405APUEXEWDCNT1 | output | TCELL19:OUT.SEC15 |
| C405APUMSRFE0 | output | TCELL19:OUT.SEC14 |
| C405APUMSRFE1 | output | TCELL20:OUT.SEC15 |
| C405APUWBBYTEEN0 | output | TCELL20:OUT.SEC14 |
| C405APUWBBYTEEN1 | output | TCELL21:OUT.SEC15 |
| C405APUWBBYTEEN2 | output | TCELL21:OUT.SEC14 |
| C405APUWBBYTEEN3 | output | TCELL22:OUT.SEC15 |
| C405APUWBENDIAN | output | TCELL22:OUT.SEC14 |
| C405APUWBFLUSH | output | TCELL23:OUT.SEC15 |
| C405APUWBHOLD | output | TCELL23:OUT.SEC14 |
| C405APUXERCA | output | TCELL24:OUT.SEC15 |
| C405CPMCORESLEEPREQ | output | TCELL14:OUT.FAN5 |
| C405CPMMSRCE | output | TCELL15:OUT.FAN4 |
| C405CPMMSREE | output | TCELL15:OUT.FAN5 |
| C405CPMTIMERIRQ | output | TCELL0:OUT.FAN6 |
| C405CPMTIMERRESETREQ | output | TCELL0:OUT.FAN7 |
| C405DBGLOADDATAONAPUDBUS | output | TCELL14:OUT.FAN7 |
| C405DBGMSRWE | output | TCELL15:OUT.FAN6 |
| C405DBGSTOPACK | output | TCELL15:OUT.FAN7 |
| C405DBGWBCOMPLETE | output | TCELL0:OUT.SEC15 |
| C405DBGWBFULL | output | TCELL0:OUT.SEC14 |
| C405DBGWBIAR0 | output | TCELL1:OUT.SEC14 |
| C405DBGWBIAR1 | output | TCELL13:OUT.SEC15 |
| C405DBGWBIAR10 | output | TCELL14:OUT.SEC13 |
| C405DBGWBIAR11 | output | TCELL2:OUT.FAN6 |
| C405DBGWBIAR12 | output | TCELL2:OUT.FAN7 |
| C405DBGWBIAR13 | output | TCELL3:OUT.SEC15 |
| C405DBGWBIAR14 | output | TCELL3:OUT.SEC14 |
| C405DBGWBIAR15 | output | TCELL3:OUT.SEC13 |
| C405DBGWBIAR16 | output | TCELL3:OUT.SEC12 |
| C405DBGWBIAR17 | output | TCELL4:OUT.SEC13 |
| C405DBGWBIAR18 | output | TCELL4:OUT.SEC12 |
| C405DBGWBIAR19 | output | TCELL12:OUT.FAN7 |
| C405DBGWBIAR2 | output | TCELL13:OUT.SEC14 |
| C405DBGWBIAR20 | output | TCELL15:OUT.SEC13 |
| C405DBGWBIAR21 | output | TCELL0:OUT.SEC12 |
| C405DBGWBIAR22 | output | TCELL1:OUT.SEC12 |
| C405DBGWBIAR23 | output | TCELL13:OUT.SEC12 |
| C405DBGWBIAR24 | output | TCELL14:OUT.SEC12 |
| C405DBGWBIAR25 | output | TCELL15:OUT.SEC12 |
| C405DBGWBIAR26 | output | TCELL0:OUT.SEC11 |
| C405DBGWBIAR27 | output | TCELL1:OUT.SEC11 |
| C405DBGWBIAR28 | output | TCELL2:OUT.SEC11 |
| C405DBGWBIAR29 | output | TCELL3:OUT.SEC11 |
| C405DBGWBIAR3 | output | TCELL14:OUT.SEC15 |
| C405DBGWBIAR4 | output | TCELL14:OUT.SEC14 |
| C405DBGWBIAR5 | output | TCELL15:OUT.SEC15 |
| C405DBGWBIAR6 | output | TCELL15:OUT.SEC14 |
| C405DBGWBIAR7 | output | TCELL0:OUT.SEC13 |
| C405DBGWBIAR8 | output | TCELL1:OUT.SEC13 |
| C405DBGWBIAR9 | output | TCELL13:OUT.SEC13 |
| C405DCRABUS0 | output | TCELL24:OUT.SEC14 |
| C405DCRABUS1 | output | TCELL25:OUT.SEC15 |
| C405DCRABUS2 | output | TCELL25:OUT.SEC14 |
| C405DCRABUS3 | output | TCELL26:OUT.SEC15 |
| C405DCRABUS4 | output | TCELL26:OUT.SEC14 |
| C405DCRABUS5 | output | TCELL27:OUT.SEC15 |
| C405DCRABUS6 | output | TCELL27:OUT.SEC14 |
| C405DCRABUS7 | output | TCELL28:OUT.SEC15 |
| C405DCRABUS8 | output | TCELL28:OUT.SEC14 |
| C405DCRABUS9 | output | TCELL29:OUT.SEC15 |
| C405DCRDBUSOUT0 | output | TCELL29:OUT.SEC14 |
| C405DCRDBUSOUT1 | output | TCELL30:OUT.SEC15 |
| C405DCRDBUSOUT10 | output | TCELL21:OUT.SEC13 |
| C405DCRDBUSOUT11 | output | TCELL22:OUT.SEC13 |
| C405DCRDBUSOUT12 | output | TCELL23:OUT.SEC13 |
| C405DCRDBUSOUT13 | output | TCELL24:OUT.SEC13 |
| C405DCRDBUSOUT14 | output | TCELL25:OUT.SEC13 |
| C405DCRDBUSOUT15 | output | TCELL26:OUT.SEC13 |
| C405DCRDBUSOUT16 | output | TCELL27:OUT.SEC13 |
| C405DCRDBUSOUT17 | output | TCELL28:OUT.SEC13 |
| C405DCRDBUSOUT18 | output | TCELL29:OUT.SEC13 |
| C405DCRDBUSOUT19 | output | TCELL30:OUT.SEC13 |
| C405DCRDBUSOUT2 | output | TCELL30:OUT.SEC14 |
| C405DCRDBUSOUT20 | output | TCELL31:OUT.SEC13 |
| C405DCRDBUSOUT21 | output | TCELL16:OUT.SEC12 |
| C405DCRDBUSOUT22 | output | TCELL17:OUT.SEC12 |
| C405DCRDBUSOUT23 | output | TCELL18:OUT.SEC12 |
| C405DCRDBUSOUT24 | output | TCELL19:OUT.SEC12 |
| C405DCRDBUSOUT25 | output | TCELL20:OUT.SEC12 |
| C405DCRDBUSOUT26 | output | TCELL21:OUT.SEC12 |
| C405DCRDBUSOUT27 | output | TCELL22:OUT.SEC12 |
| C405DCRDBUSOUT28 | output | TCELL23:OUT.SEC12 |
| C405DCRDBUSOUT29 | output | TCELL24:OUT.SEC12 |
| C405DCRDBUSOUT3 | output | TCELL31:OUT.SEC15 |
| C405DCRDBUSOUT30 | output | TCELL25:OUT.SEC12 |
| C405DCRDBUSOUT31 | output | TCELL26:OUT.SEC12 |
| C405DCRDBUSOUT4 | output | TCELL31:OUT.SEC14 |
| C405DCRDBUSOUT5 | output | TCELL16:OUT.SEC13 |
| C405DCRDBUSOUT6 | output | TCELL17:OUT.SEC13 |
| C405DCRDBUSOUT7 | output | TCELL18:OUT.SEC13 |
| C405DCRDBUSOUT8 | output | TCELL19:OUT.SEC13 |
| C405DCRDBUSOUT9 | output | TCELL20:OUT.SEC13 |
| C405DCRREAD | output | TCELL27:OUT.SEC12 |
| C405DCRWRITE | output | TCELL28:OUT.SEC12 |
| C405DSOCMCACHEABLE | output | TCELL32:OUT.TEST6 |
| C405DSOCMGUARDED | output | TCELL33:OUT.TEST0 |
| C405DSOCMSTRINGMULTIPLE | output | TCELL33:OUT.TEST2 |
| C405DSOCMU0ATTR | output | TCELL34:OUT.TEST2 |
| C405ISOCMCACHEABLE | output | TCELL39:OUT.SEC10 |
| C405ISOCMCONTEXTSYNC | output | TCELL39:OUT.SEC9 |
| C405ISOCMU0ATTR | output | TCELL32:OUT.TEST4 |
| C405JTGCAPTUREDR | output | TCELL44:OUT.SEC14 |
| C405JTGEXTEST | output | TCELL47:OUT.SEC15 |
| C405JTGPGMOUT | output | TCELL47:OUT.SEC14 |
| C405JTGSHIFTDR | output | TCELL40:OUT.SEC13 |
| C405JTGTDO | output | TCELL41:OUT.SEC13 |
| C405JTGTDOEN | output | TCELL42:OUT.SEC13 |
| C405JTGUPDATEDR | output | TCELL43:OUT.SEC13 |
| C405LSSDDIAGABISTDONE | output | TCELL33:OUT.SEC9 |
| C405LSSDDIAGOUT | output | TCELL33:OUT.SEC8 |
| C405LSSDSCANOUT0 | output | TCELL34:OUT.SEC8 |
| C405LSSDSCANOUT1 | output | TCELL34:OUT.TEST0 |
| C405LSSDSCANOUT2 | output | TCELL35:OUT.SEC11 |
| C405LSSDSCANOUT3 | output | TCELL35:OUT.SEC10 |
| C405LSSDSCANOUT4 | output | TCELL36:OUT.SEC11 |
| C405LSSDSCANOUT5 | output | TCELL36:OUT.SEC10 |
| C405LSSDSCANOUT6 | output | TCELL37:OUT.SEC11 |
| C405LSSDSCANOUT7 | output | TCELL37:OUT.SEC10 |
| C405LSSDSCANOUT8 | output | TCELL38:OUT.TEST0 |
| C405LSSDSCANOUT9 | output | TCELL38:OUT.TEST2 |
| C405PLBDCUABORT | output | TCELL1:OUT.FAN7 |
| C405PLBDCUABUS0 | output | TCELL11:OUT.FAN4 |
| C405PLBDCUABUS1 | output | TCELL11:OUT.FAN5 |
| C405PLBDCUABUS10 | output | TCELL9:OUT.FAN6 |
| C405PLBDCUABUS11 | output | TCELL9:OUT.FAN7 |
| C405PLBDCUABUS12 | output | TCELL8:OUT.FAN4 |
| C405PLBDCUABUS13 | output | TCELL8:OUT.FAN5 |
| C405PLBDCUABUS14 | output | TCELL8:OUT.FAN6 |
| C405PLBDCUABUS15 | output | TCELL8:OUT.FAN7 |
| C405PLBDCUABUS16 | output | TCELL7:OUT.FAN4 |
| C405PLBDCUABUS17 | output | TCELL7:OUT.FAN5 |
| C405PLBDCUABUS18 | output | TCELL7:OUT.FAN6 |
| C405PLBDCUABUS19 | output | TCELL7:OUT.FAN7 |
| C405PLBDCUABUS2 | output | TCELL11:OUT.FAN6 |
| C405PLBDCUABUS20 | output | TCELL6:OUT.FAN4 |
| C405PLBDCUABUS21 | output | TCELL6:OUT.FAN5 |
| C405PLBDCUABUS22 | output | TCELL6:OUT.FAN6 |
| C405PLBDCUABUS23 | output | TCELL6:OUT.FAN7 |
| C405PLBDCUABUS24 | output | TCELL5:OUT.FAN4 |
| C405PLBDCUABUS25 | output | TCELL5:OUT.FAN5 |
| C405PLBDCUABUS26 | output | TCELL5:OUT.FAN6 |
| C405PLBDCUABUS27 | output | TCELL5:OUT.FAN7 |
| C405PLBDCUABUS28 | output | TCELL4:OUT.FAN4 |
| C405PLBDCUABUS29 | output | TCELL4:OUT.FAN5 |
| C405PLBDCUABUS3 | output | TCELL11:OUT.FAN7 |
| C405PLBDCUABUS30 | output | TCELL4:OUT.FAN6 |
| C405PLBDCUABUS31 | output | TCELL4:OUT.FAN7 |
| C405PLBDCUABUS4 | output | TCELL10:OUT.FAN4 |
| C405PLBDCUABUS5 | output | TCELL10:OUT.FAN5 |
| C405PLBDCUABUS6 | output | TCELL10:OUT.FAN6 |
| C405PLBDCUABUS7 | output | TCELL10:OUT.FAN7 |
| C405PLBDCUABUS8 | output | TCELL9:OUT.FAN4 |
| C405PLBDCUABUS9 | output | TCELL9:OUT.FAN5 |
| C405PLBDCUBE0 | output | TCELL13:OUT.FAN4 |
| C405PLBDCUBE1 | output | TCELL13:OUT.FAN5 |
| C405PLBDCUBE2 | output | TCELL13:OUT.FAN6 |
| C405PLBDCUBE3 | output | TCELL13:OUT.FAN7 |
| C405PLBDCUBE4 | output | TCELL3:OUT.FAN4 |
| C405PLBDCUBE5 | output | TCELL3:OUT.FAN5 |
| C405PLBDCUBE6 | output | TCELL3:OUT.FAN6 |
| C405PLBDCUBE7 | output | TCELL3:OUT.FAN7 |
| C405PLBDCUCACHEABLE | output | TCELL12:OUT.FAN6 |
| C405PLBDCUGUARDED | output | TCELL2:OUT.FAN4 |
| C405PLBDCUPRIORITY0 | output | TCELL1:OUT.FAN5 |
| C405PLBDCUPRIORITY1 | output | TCELL1:OUT.FAN6 |
| C405PLBDCUREQUEST | output | TCELL1:OUT.FAN4 |
| C405PLBDCURNW | output | TCELL1:OUT.SEC15 |
| C405PLBDCUSIZE2 | output | TCELL12:OUT.FAN4 |
| C405PLBDCUU0ATTR | output | TCELL12:OUT.FAN5 |
| C405PLBDCUWRDBUS0 | output | TCELL15:OUT.FAN0 |
| C405PLBDCUWRDBUS1 | output | TCELL15:OUT.FAN1 |
| C405PLBDCUWRDBUS10 | output | TCELL13:OUT.FAN2 |
| C405PLBDCUWRDBUS11 | output | TCELL13:OUT.FAN3 |
| C405PLBDCUWRDBUS12 | output | TCELL12:OUT.FAN0 |
| C405PLBDCUWRDBUS13 | output | TCELL12:OUT.FAN1 |
| C405PLBDCUWRDBUS14 | output | TCELL12:OUT.FAN2 |
| C405PLBDCUWRDBUS15 | output | TCELL12:OUT.FAN3 |
| C405PLBDCUWRDBUS16 | output | TCELL11:OUT.FAN0 |
| C405PLBDCUWRDBUS17 | output | TCELL11:OUT.FAN1 |
| C405PLBDCUWRDBUS18 | output | TCELL11:OUT.FAN2 |
| C405PLBDCUWRDBUS19 | output | TCELL11:OUT.FAN3 |
| C405PLBDCUWRDBUS2 | output | TCELL15:OUT.FAN2 |
| C405PLBDCUWRDBUS20 | output | TCELL10:OUT.FAN0 |
| C405PLBDCUWRDBUS21 | output | TCELL10:OUT.FAN1 |
| C405PLBDCUWRDBUS22 | output | TCELL10:OUT.FAN2 |
| C405PLBDCUWRDBUS23 | output | TCELL10:OUT.FAN3 |
| C405PLBDCUWRDBUS24 | output | TCELL9:OUT.FAN0 |
| C405PLBDCUWRDBUS25 | output | TCELL9:OUT.FAN1 |
| C405PLBDCUWRDBUS26 | output | TCELL9:OUT.FAN2 |
| C405PLBDCUWRDBUS27 | output | TCELL9:OUT.FAN3 |
| C405PLBDCUWRDBUS28 | output | TCELL8:OUT.FAN0 |
| C405PLBDCUWRDBUS29 | output | TCELL8:OUT.FAN1 |
| C405PLBDCUWRDBUS3 | output | TCELL15:OUT.FAN3 |
| C405PLBDCUWRDBUS30 | output | TCELL8:OUT.FAN2 |
| C405PLBDCUWRDBUS31 | output | TCELL8:OUT.FAN3 |
| C405PLBDCUWRDBUS32 | output | TCELL7:OUT.FAN0 |
| C405PLBDCUWRDBUS33 | output | TCELL7:OUT.FAN1 |
| C405PLBDCUWRDBUS34 | output | TCELL7:OUT.FAN2 |
| C405PLBDCUWRDBUS35 | output | TCELL7:OUT.FAN3 |
| C405PLBDCUWRDBUS36 | output | TCELL6:OUT.FAN0 |
| C405PLBDCUWRDBUS37 | output | TCELL6:OUT.FAN1 |
| C405PLBDCUWRDBUS38 | output | TCELL6:OUT.FAN2 |
| C405PLBDCUWRDBUS39 | output | TCELL6:OUT.FAN3 |
| C405PLBDCUWRDBUS4 | output | TCELL14:OUT.FAN0 |
| C405PLBDCUWRDBUS40 | output | TCELL5:OUT.FAN0 |
| C405PLBDCUWRDBUS41 | output | TCELL5:OUT.FAN1 |
| C405PLBDCUWRDBUS42 | output | TCELL5:OUT.FAN2 |
| C405PLBDCUWRDBUS43 | output | TCELL5:OUT.FAN3 |
| C405PLBDCUWRDBUS44 | output | TCELL4:OUT.FAN0 |
| C405PLBDCUWRDBUS45 | output | TCELL4:OUT.FAN1 |
| C405PLBDCUWRDBUS46 | output | TCELL4:OUT.FAN2 |
| C405PLBDCUWRDBUS47 | output | TCELL4:OUT.FAN3 |
| C405PLBDCUWRDBUS48 | output | TCELL3:OUT.FAN0 |
| C405PLBDCUWRDBUS49 | output | TCELL3:OUT.FAN1 |
| C405PLBDCUWRDBUS5 | output | TCELL14:OUT.FAN1 |
| C405PLBDCUWRDBUS50 | output | TCELL3:OUT.FAN2 |
| C405PLBDCUWRDBUS51 | output | TCELL3:OUT.FAN3 |
| C405PLBDCUWRDBUS52 | output | TCELL2:OUT.FAN0 |
| C405PLBDCUWRDBUS53 | output | TCELL2:OUT.FAN1 |
| C405PLBDCUWRDBUS54 | output | TCELL2:OUT.FAN2 |
| C405PLBDCUWRDBUS55 | output | TCELL2:OUT.FAN3 |
| C405PLBDCUWRDBUS56 | output | TCELL1:OUT.FAN0 |
| C405PLBDCUWRDBUS57 | output | TCELL1:OUT.FAN1 |
| C405PLBDCUWRDBUS58 | output | TCELL1:OUT.FAN2 |
| C405PLBDCUWRDBUS59 | output | TCELL1:OUT.FAN3 |
| C405PLBDCUWRDBUS6 | output | TCELL14:OUT.FAN2 |
| C405PLBDCUWRDBUS60 | output | TCELL0:OUT.FAN0 |
| C405PLBDCUWRDBUS61 | output | TCELL0:OUT.FAN1 |
| C405PLBDCUWRDBUS62 | output | TCELL0:OUT.FAN2 |
| C405PLBDCUWRDBUS63 | output | TCELL0:OUT.FAN3 |
| C405PLBDCUWRDBUS7 | output | TCELL14:OUT.FAN3 |
| C405PLBDCUWRDBUS8 | output | TCELL13:OUT.FAN0 |
| C405PLBDCUWRDBUS9 | output | TCELL13:OUT.FAN1 |
| C405PLBDCUWRITETHRU | output | TCELL2:OUT.FAN5 |
| C405PLBICUABORT | output | TCELL2:OUT.SEC12 |
| C405PLBICUABUS0 | output | TCELL11:OUT.SEC15 |
| C405PLBICUABUS1 | output | TCELL11:OUT.SEC14 |
| C405PLBICUABUS10 | output | TCELL9:OUT.SEC13 |
| C405PLBICUABUS11 | output | TCELL9:OUT.SEC12 |
| C405PLBICUABUS12 | output | TCELL8:OUT.SEC15 |
| C405PLBICUABUS13 | output | TCELL8:OUT.SEC14 |
| C405PLBICUABUS14 | output | TCELL8:OUT.SEC13 |
| C405PLBICUABUS15 | output | TCELL8:OUT.SEC12 |
| C405PLBICUABUS16 | output | TCELL7:OUT.SEC15 |
| C405PLBICUABUS17 | output | TCELL7:OUT.SEC14 |
| C405PLBICUABUS18 | output | TCELL7:OUT.SEC13 |
| C405PLBICUABUS19 | output | TCELL7:OUT.SEC12 |
| C405PLBICUABUS2 | output | TCELL11:OUT.SEC13 |
| C405PLBICUABUS20 | output | TCELL6:OUT.SEC15 |
| C405PLBICUABUS21 | output | TCELL6:OUT.SEC14 |
| C405PLBICUABUS22 | output | TCELL6:OUT.SEC13 |
| C405PLBICUABUS23 | output | TCELL6:OUT.SEC12 |
| C405PLBICUABUS24 | output | TCELL5:OUT.SEC15 |
| C405PLBICUABUS25 | output | TCELL5:OUT.SEC14 |
| C405PLBICUABUS26 | output | TCELL5:OUT.SEC13 |
| C405PLBICUABUS27 | output | TCELL5:OUT.SEC12 |
| C405PLBICUABUS28 | output | TCELL4:OUT.SEC15 |
| C405PLBICUABUS29 | output | TCELL4:OUT.SEC14 |
| C405PLBICUABUS3 | output | TCELL11:OUT.SEC12 |
| C405PLBICUABUS4 | output | TCELL10:OUT.SEC15 |
| C405PLBICUABUS5 | output | TCELL10:OUT.SEC14 |
| C405PLBICUABUS6 | output | TCELL10:OUT.SEC13 |
| C405PLBICUABUS7 | output | TCELL10:OUT.SEC12 |
| C405PLBICUABUS8 | output | TCELL9:OUT.SEC15 |
| C405PLBICUABUS9 | output | TCELL9:OUT.SEC14 |
| C405PLBICUCACHEABLE | output | TCELL12:OUT.SEC12 |
| C405PLBICUPRIORITY0 | output | TCELL2:OUT.SEC14 |
| C405PLBICUPRIORITY1 | output | TCELL2:OUT.SEC13 |
| C405PLBICUREQUEST | output | TCELL2:OUT.SEC15 |
| C405PLBICUSIZE2 | output | TCELL12:OUT.SEC15 |
| C405PLBICUSIZE3 | output | TCELL12:OUT.SEC14 |
| C405PLBICUU0ATTR | output | TCELL12:OUT.SEC13 |
| C405RSTCHIPRESETREQ | output | TCELL0:OUT.FAN4 |
| C405RSTCORERESETREQ | output | TCELL0:OUT.FAN5 |
| C405RSTSYSRESETREQ | output | TCELL14:OUT.FAN4 |
| C405TRCCYCLE | output | TCELL47:OUT.FAN0 |
| C405TRCEVENEXECUTIONSTATUS0 | output | TCELL47:OUT.FAN1 |
| C405TRCEVENEXECUTIONSTATUS1 | output | TCELL47:OUT.FAN2 |
| C405TRCODDEXECUTIONSTATUS0 | output | TCELL47:OUT.FAN3 |
| C405TRCODDEXECUTIONSTATUS1 | output | TCELL40:OUT.FAN4 |
| C405TRCTRACESTATUS0 | output | TCELL40:OUT.FAN5 |
| C405TRCTRACESTATUS1 | output | TCELL47:OUT.FAN4 |
| C405TRCTRACESTATUS2 | output | TCELL47:OUT.FAN5 |
| C405TRCTRACESTATUS3 | output | TCELL40:OUT.FAN6 |
| C405TRCTRIGGEREVENTOUT | output | TCELL40:OUT.FAN7 |
| C405TRCTRIGGEREVENTTYPE0 | output | TCELL47:OUT.FAN6 |
| C405TRCTRIGGEREVENTTYPE1 | output | TCELL47:OUT.FAN7 |
| C405TRCTRIGGEREVENTTYPE10 | output | TCELL44:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE2 | output | TCELL40:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE3 | output | TCELL40:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE4 | output | TCELL41:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE5 | output | TCELL41:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE6 | output | TCELL42:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE7 | output | TCELL42:OUT.SEC14 |
| C405TRCTRIGGEREVENTTYPE8 | output | TCELL43:OUT.SEC15 |
| C405TRCTRIGGEREVENTTYPE9 | output | TCELL43:OUT.SEC14 |
| C405XXXMACHINECHECK | output | TCELL14:OUT.FAN6 |
| CPMC405CLOCK | input | TCELL9:IMUX.CLK0 |
| CPMC405CORECLKINACTIVE | input | TCELL5:IMUX.G1.DATA2 |
| CPMC405CPUCLKEN | input | TCELL1:IMUX.CE0 |
| CPMC405JTAGCLKEN | input | TCELL3:IMUX.CE0 |
| CPMC405TIMERCLKEN | input | TCELL2:IMUX.CE0 |
| CPMC405TIMERTICK | input | TCELL3:IMUX.CLK0 |
| DBGC405DEBUGHALT | input | TCELL1:IMUX.G0.DATA2 |
| DBGC405EXTBUSHOLDACK | input | TCELL4:IMUX.G0.DATA2 |
| DBGC405UNCONDDEBUGEVENT | input | TCELL2:IMUX.G0.DATA2 |
| DCRC405ACK | input | TCELL24:IMUX.G0.DATA1 |
| DCRC405DBUSIN0 | input | TCELL25:IMUX.G0.DATA1 |
| DCRC405DBUSIN1 | input | TCELL25:IMUX.G1.DATA1 |
| DCRC405DBUSIN10 | input | TCELL30:IMUX.G0.DATA1 |
| DCRC405DBUSIN11 | input | TCELL30:IMUX.G1.DATA1 |
| DCRC405DBUSIN12 | input | TCELL31:IMUX.G0.DATA1 |
| DCRC405DBUSIN13 | input | TCELL31:IMUX.G1.DATA1 |
| DCRC405DBUSIN14 | input | TCELL16:IMUX.G2.DATA1 |
| DCRC405DBUSIN15 | input | TCELL16:IMUX.G3.DATA1 |
| DCRC405DBUSIN16 | input | TCELL17:IMUX.G2.DATA1 |
| DCRC405DBUSIN17 | input | TCELL17:IMUX.G3.DATA1 |
| DCRC405DBUSIN18 | input | TCELL18:IMUX.G2.DATA1 |
| DCRC405DBUSIN19 | input | TCELL18:IMUX.G3.DATA1 |
| DCRC405DBUSIN2 | input | TCELL26:IMUX.G0.DATA1 |
| DCRC405DBUSIN20 | input | TCELL19:IMUX.G2.DATA1 |
| DCRC405DBUSIN21 | input | TCELL19:IMUX.G3.DATA1 |
| DCRC405DBUSIN22 | input | TCELL20:IMUX.G0.DATA1 |
| DCRC405DBUSIN23 | input | TCELL20:IMUX.G1.DATA1 |
| DCRC405DBUSIN24 | input | TCELL21:IMUX.G0.DATA1 |
| DCRC405DBUSIN25 | input | TCELL21:IMUX.G1.DATA1 |
| DCRC405DBUSIN26 | input | TCELL22:IMUX.G0.DATA1 |
| DCRC405DBUSIN27 | input | TCELL22:IMUX.G1.DATA1 |
| DCRC405DBUSIN28 | input | TCELL23:IMUX.G0.DATA1 |
| DCRC405DBUSIN29 | input | TCELL23:IMUX.G1.DATA1 |
| DCRC405DBUSIN3 | input | TCELL26:IMUX.G1.DATA1 |
| DCRC405DBUSIN30 | input | TCELL24:IMUX.G1.DATA1 |
| DCRC405DBUSIN31 | input | TCELL24:IMUX.G2.DATA1 |
| DCRC405DBUSIN4 | input | TCELL27:IMUX.G0.DATA1 |
| DCRC405DBUSIN5 | input | TCELL27:IMUX.G1.DATA1 |
| DCRC405DBUSIN6 | input | TCELL28:IMUX.G0.DATA1 |
| DCRC405DBUSIN7 | input | TCELL28:IMUX.G1.DATA1 |
| DCRC405DBUSIN8 | input | TCELL29:IMUX.G0.DATA1 |
| DCRC405DBUSIN9 | input | TCELL29:IMUX.G1.DATA1 |
| DSARCVALUE0 | input | TCELL45:IMUX.TI0 |
| DSARCVALUE1 | input | TCELL45:IMUX.TI1 |
| DSARCVALUE2 | input | TCELL45:IMUX.TS0 |
| DSARCVALUE3 | input | TCELL45:IMUX.TS1 |
| DSARCVALUE4 | input | TCELL46:IMUX.TI0 |
| DSARCVALUE5 | input | TCELL46:IMUX.TI1 |
| DSARCVALUE6 | input | TCELL46:IMUX.TS0 |
| DSARCVALUE7 | input | TCELL46:IMUX.TS1 |
| DSCNTLVALUE0 | input | TCELL41:IMUX.TI0 |
| DSCNTLVALUE1 | input | TCELL41:IMUX.TI1 |
| DSCNTLVALUE2 | input | TCELL41:IMUX.TS0 |
| DSCNTLVALUE3 | input | TCELL41:IMUX.TS1 |
| DSCNTLVALUE4 | input | TCELL42:IMUX.TI1 |
| DSCNTLVALUE5 | input | TCELL42:IMUX.TS0 |
| DSCNTLVALUE6 | input | TCELL42:IMUX.TS1 |
| DSCNTLVALUE7 | input | TCELL44:IMUX.TS1 |
| DSOCMBRAMABUS10 | output | TCELL45:OUT.FAN2 |
| DSOCMBRAMABUS11 | output | TCELL45:OUT.FAN3 |
| DSOCMBRAMABUS12 | output | TCELL45:OUT.FAN4 |
| DSOCMBRAMABUS13 | output | TCELL45:OUT.FAN5 |
| DSOCMBRAMABUS14 | output | TCELL45:OUT.FAN6 |
| DSOCMBRAMABUS15 | output | TCELL45:OUT.FAN7 |
| DSOCMBRAMABUS16 | output | TCELL40:IMUX.BRAM_ADDRA0.N3, TCELL45:OUT.SEC15, TCELL47:IMUX.BRAM_ADDRA0.N3 |
| DSOCMBRAMABUS17 | output | TCELL40:IMUX.BRAM_ADDRA1.N3, TCELL45:OUT.SEC14, TCELL47:IMUX.BRAM_ADDRA1.N3 |
| DSOCMBRAMABUS18 | output | TCELL40:IMUX.BRAM_ADDRA2.N3, TCELL45:OUT.SEC13, TCELL47:IMUX.BRAM_ADDRA2.N3 |
| DSOCMBRAMABUS19 | output | TCELL40:IMUX.BRAM_ADDRA3.N3, TCELL45:OUT.SEC12, TCELL47:IMUX.BRAM_ADDRA3.N3 |
| DSOCMBRAMABUS20 | output | TCELL40:IMUX.BRAM_ADDRA0.N2, TCELL46:OUT.FAN0, TCELL47:IMUX.BRAM_ADDRA0.N2 |
| DSOCMBRAMABUS21 | output | TCELL40:IMUX.BRAM_ADDRA1.N2, TCELL46:OUT.FAN1, TCELL47:IMUX.BRAM_ADDRA1.N2 |
| DSOCMBRAMABUS22 | output | TCELL40:IMUX.BRAM_ADDRA2.N2, TCELL46:OUT.FAN2, TCELL47:IMUX.BRAM_ADDRA2.N2 |
| DSOCMBRAMABUS23 | output | TCELL40:IMUX.BRAM_ADDRA3.N2, TCELL46:OUT.FAN3, TCELL47:IMUX.BRAM_ADDRA3.N2 |
| DSOCMBRAMABUS24 | output | TCELL40:IMUX.BRAM_ADDRA0.N1, TCELL46:OUT.FAN4, TCELL47:IMUX.BRAM_ADDRA0.N1 |
| DSOCMBRAMABUS25 | output | TCELL40:IMUX.BRAM_ADDRA1.N1, TCELL46:OUT.FAN5, TCELL47:IMUX.BRAM_ADDRA1.N1 |
| DSOCMBRAMABUS26 | output | TCELL40:IMUX.BRAM_ADDRA2.N1, TCELL46:OUT.FAN6, TCELL47:IMUX.BRAM_ADDRA2.N1 |
| DSOCMBRAMABUS27 | output | TCELL40:IMUX.BRAM_ADDRA3.N1, TCELL46:OUT.FAN7, TCELL47:IMUX.BRAM_ADDRA3.N1 |
| DSOCMBRAMABUS28 | output | TCELL40:IMUX.BRAM_ADDRA0, TCELL46:OUT.SEC15, TCELL47:IMUX.BRAM_ADDRA0 |
| DSOCMBRAMABUS29 | output | TCELL40:IMUX.BRAM_ADDRA1, TCELL46:OUT.SEC14, TCELL47:IMUX.BRAM_ADDRA1 |
| DSOCMBRAMABUS8 | output | TCELL45:OUT.FAN0 |
| DSOCMBRAMABUS9 | output | TCELL45:OUT.FAN1 |
| DSOCMBRAMBYTEWRITE0 | output | TCELL40:OUT.FAN0 |
| DSOCMBRAMBYTEWRITE1 | output | TCELL40:OUT.FAN1 |
| DSOCMBRAMBYTEWRITE2 | output | TCELL40:OUT.FAN2 |
| DSOCMBRAMBYTEWRITE3 | output | TCELL40:OUT.FAN3 |
| DSOCMBRAMEN | output | TCELL46:OUT.SEC13 |
| DSOCMBRAMWRDBUS0 | output | TCELL41:OUT.FAN0 |
| DSOCMBRAMWRDBUS1 | output | TCELL41:OUT.FAN1 |
| DSOCMBRAMWRDBUS10 | output | TCELL42:OUT.FAN2 |
| DSOCMBRAMWRDBUS11 | output | TCELL42:OUT.FAN3 |
| DSOCMBRAMWRDBUS12 | output | TCELL42:OUT.FAN4 |
| DSOCMBRAMWRDBUS13 | output | TCELL42:OUT.FAN5 |
| DSOCMBRAMWRDBUS14 | output | TCELL42:OUT.FAN6 |
| DSOCMBRAMWRDBUS15 | output | TCELL42:OUT.FAN7 |
| DSOCMBRAMWRDBUS16 | output | TCELL43:OUT.FAN0 |
| DSOCMBRAMWRDBUS17 | output | TCELL43:OUT.FAN1 |
| DSOCMBRAMWRDBUS18 | output | TCELL43:OUT.FAN2 |
| DSOCMBRAMWRDBUS19 | output | TCELL43:OUT.FAN3 |
| DSOCMBRAMWRDBUS2 | output | TCELL41:OUT.FAN2 |
| DSOCMBRAMWRDBUS20 | output | TCELL43:OUT.FAN4 |
| DSOCMBRAMWRDBUS21 | output | TCELL43:OUT.FAN5 |
| DSOCMBRAMWRDBUS22 | output | TCELL43:OUT.FAN6 |
| DSOCMBRAMWRDBUS23 | output | TCELL43:OUT.FAN7 |
| DSOCMBRAMWRDBUS24 | output | TCELL44:OUT.FAN0 |
| DSOCMBRAMWRDBUS25 | output | TCELL44:OUT.FAN1 |
| DSOCMBRAMWRDBUS26 | output | TCELL44:OUT.FAN2 |
| DSOCMBRAMWRDBUS27 | output | TCELL44:OUT.FAN3 |
| DSOCMBRAMWRDBUS28 | output | TCELL44:OUT.FAN4 |
| DSOCMBRAMWRDBUS29 | output | TCELL44:OUT.FAN5 |
| DSOCMBRAMWRDBUS3 | output | TCELL41:OUT.FAN3 |
| DSOCMBRAMWRDBUS30 | output | TCELL44:OUT.FAN6 |
| DSOCMBRAMWRDBUS31 | output | TCELL44:OUT.FAN7 |
| DSOCMBRAMWRDBUS4 | output | TCELL41:OUT.FAN4 |
| DSOCMBRAMWRDBUS5 | output | TCELL41:OUT.FAN5 |
| DSOCMBRAMWRDBUS6 | output | TCELL41:OUT.FAN6 |
| DSOCMBRAMWRDBUS7 | output | TCELL41:OUT.FAN7 |
| DSOCMBRAMWRDBUS8 | output | TCELL42:OUT.FAN0 |
| DSOCMBRAMWRDBUS9 | output | TCELL42:OUT.FAN1 |
| DSOCMBUSY | output | TCELL46:OUT.SEC12 |
| DSOCMRDADDRVALID | output | TCELL44:OUT.SEC13 |
| EICC405CRITINPUTIRQ | input | TCELL10:IMUX.G0.DATA2 |
| EICC405EXTINPUTIRQ | input | TCELL15:IMUX.G0.DATA2 |
| ISARCVALUE0 | input | TCELL36:IMUX.TI0 |
| ISARCVALUE1 | input | TCELL36:IMUX.TI1 |
| ISARCVALUE2 | input | TCELL36:IMUX.TS0 |
| ISARCVALUE3 | input | TCELL36:IMUX.TS1 |
| ISARCVALUE4 | input | TCELL37:IMUX.TI0 |
| ISARCVALUE5 | input | TCELL37:IMUX.TI1 |
| ISARCVALUE6 | input | TCELL37:IMUX.TS0 |
| ISARCVALUE7 | input | TCELL37:IMUX.TS1 |
| ISCNTLVALUE0 | input | TCELL34:IMUX.SR0 |
| ISCNTLVALUE1 | input | TCELL34:IMUX.SR1 |
| ISCNTLVALUE2 | input | TCELL35:IMUX.SR0 |
| ISCNTLVALUE3 | input | TCELL35:IMUX.SR1 |
| ISCNTLVALUE4 | input | TCELL37:IMUX.G0.DATA0 |
| ISCNTLVALUE5 | input | TCELL37:IMUX.G1.DATA0 |
| ISCNTLVALUE6 | input | TCELL34:IMUX.G0.DATA0 |
| ISCNTLVALUE7 | input | TCELL34:IMUX.G1.DATA0 |
| ISOCMBRAMEN | output | TCELL34:OUT.SEC13 |
| ISOCMBRAMEVENWRITEEN | output | TCELL34:OUT.SEC14 |
| ISOCMBRAMODDWRITEEN | output | TCELL34:OUT.SEC15 |
| ISOCMBRAMRDABUS10 | output | TCELL38:OUT.FAN2 |
| ISOCMBRAMRDABUS11 | output | TCELL38:OUT.FAN3 |
| ISOCMBRAMRDABUS12 | output | TCELL38:OUT.FAN4 |
| ISOCMBRAMRDABUS13 | output | TCELL38:OUT.FAN5 |
| ISOCMBRAMRDABUS14 | output | TCELL38:OUT.FAN6 |
| ISOCMBRAMRDABUS15 | output | TCELL32:IMUX.BRAM_ADDRB0, TCELL38:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRB0 |
| ISOCMBRAMRDABUS16 | output | TCELL32:IMUX.BRAM_ADDRB1, TCELL38:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRB1 |
| ISOCMBRAMRDABUS17 | output | TCELL32:IMUX.BRAM_ADDRB2, TCELL38:OUT.SEC14, TCELL39:IMUX.BRAM_ADDRB2 |
| ISOCMBRAMRDABUS18 | output | TCELL32:IMUX.BRAM_ADDRB3, TCELL38:OUT.SEC13, TCELL39:IMUX.BRAM_ADDRB3 |
| ISOCMBRAMRDABUS19 | output | TCELL32:IMUX.BRAM_ADDRB0.S1, TCELL38:OUT.SEC12, TCELL39:IMUX.BRAM_ADDRB0.S1 |
| ISOCMBRAMRDABUS20 | output | TCELL32:IMUX.BRAM_ADDRB1.S1, TCELL39:IMUX.BRAM_ADDRB1.S1, TCELL39:OUT.FAN0 |
| ISOCMBRAMRDABUS21 | output | TCELL32:IMUX.BRAM_ADDRB2.S1, TCELL39:IMUX.BRAM_ADDRB2.S1, TCELL39:OUT.FAN1 |
| ISOCMBRAMRDABUS22 | output | TCELL32:IMUX.BRAM_ADDRB3.S1, TCELL39:IMUX.BRAM_ADDRB3.S1, TCELL39:OUT.FAN2 |
| ISOCMBRAMRDABUS23 | output | TCELL32:IMUX.BRAM_ADDRB0.S2, TCELL39:IMUX.BRAM_ADDRB0.S2, TCELL39:OUT.FAN3 |
| ISOCMBRAMRDABUS24 | output | TCELL32:IMUX.BRAM_ADDRB1.S2, TCELL39:IMUX.BRAM_ADDRB1.S2, TCELL39:OUT.FAN4 |
| ISOCMBRAMRDABUS25 | output | TCELL32:IMUX.BRAM_ADDRB2.S2, TCELL39:IMUX.BRAM_ADDRB2.S2, TCELL39:OUT.FAN5 |
| ISOCMBRAMRDABUS26 | output | TCELL32:IMUX.BRAM_ADDRB3.S2, TCELL39:IMUX.BRAM_ADDRB3.S2, TCELL39:OUT.FAN6 |
| ISOCMBRAMRDABUS27 | output | TCELL32:IMUX.BRAM_ADDRB0.S3, TCELL39:IMUX.BRAM_ADDRB0.S3, TCELL39:OUT.FAN7 |
| ISOCMBRAMRDABUS28 | output | TCELL32:IMUX.BRAM_ADDRB1.S3, TCELL39:IMUX.BRAM_ADDRB1.S3, TCELL39:OUT.SEC15 |
| ISOCMBRAMRDABUS8 | output | TCELL38:OUT.FAN0 |
| ISOCMBRAMRDABUS9 | output | TCELL38:OUT.FAN1 |
| ISOCMBRAMWRABUS10 | output | TCELL32:OUT.FAN2 |
| ISOCMBRAMWRABUS11 | output | TCELL32:OUT.FAN3 |
| ISOCMBRAMWRABUS12 | output | TCELL32:OUT.FAN4 |
| ISOCMBRAMWRABUS13 | output | TCELL32:OUT.FAN5 |
| ISOCMBRAMWRABUS14 | output | TCELL32:OUT.FAN6 |
| ISOCMBRAMWRABUS15 | output | TCELL32:IMUX.BRAM_ADDRA0, TCELL32:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRA0 |
| ISOCMBRAMWRABUS16 | output | TCELL32:IMUX.BRAM_ADDRA1, TCELL32:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRA1 |
| ISOCMBRAMWRABUS17 | output | TCELL32:IMUX.BRAM_ADDRA2, TCELL32:OUT.SEC14, TCELL39:IMUX.BRAM_ADDRA2 |
| ISOCMBRAMWRABUS18 | output | TCELL32:IMUX.BRAM_ADDRA3, TCELL32:OUT.SEC13, TCELL39:IMUX.BRAM_ADDRA3 |
| ISOCMBRAMWRABUS19 | output | TCELL32:IMUX.BRAM_ADDRA0.S1, TCELL32:OUT.SEC12, TCELL39:IMUX.BRAM_ADDRA0.S1 |
| ISOCMBRAMWRABUS20 | output | TCELL32:IMUX.BRAM_ADDRA1.S1, TCELL33:OUT.FAN0, TCELL39:IMUX.BRAM_ADDRA1.S1 |
| ISOCMBRAMWRABUS21 | output | TCELL32:IMUX.BRAM_ADDRA2.S1, TCELL33:OUT.FAN1, TCELL39:IMUX.BRAM_ADDRA2.S1 |
| ISOCMBRAMWRABUS22 | output | TCELL32:IMUX.BRAM_ADDRA3.S1, TCELL33:OUT.FAN2, TCELL39:IMUX.BRAM_ADDRA3.S1 |
| ISOCMBRAMWRABUS23 | output | TCELL32:IMUX.BRAM_ADDRA0.S2, TCELL33:OUT.FAN3, TCELL39:IMUX.BRAM_ADDRA0.S2 |
| ISOCMBRAMWRABUS24 | output | TCELL32:IMUX.BRAM_ADDRA1.S2, TCELL33:OUT.FAN4, TCELL39:IMUX.BRAM_ADDRA1.S2 |
| ISOCMBRAMWRABUS25 | output | TCELL32:IMUX.BRAM_ADDRA2.S2, TCELL33:OUT.FAN5, TCELL39:IMUX.BRAM_ADDRA2.S2 |
| ISOCMBRAMWRABUS26 | output | TCELL32:IMUX.BRAM_ADDRA3.S2, TCELL33:OUT.FAN6, TCELL39:IMUX.BRAM_ADDRA3.S2 |
| ISOCMBRAMWRABUS27 | output | TCELL32:IMUX.BRAM_ADDRA0.S3, TCELL33:OUT.FAN7, TCELL39:IMUX.BRAM_ADDRA0.S3 |
| ISOCMBRAMWRABUS28 | output | TCELL32:IMUX.BRAM_ADDRA1.S3, TCELL33:OUT.SEC15, TCELL39:IMUX.BRAM_ADDRA1.S3 |
| ISOCMBRAMWRABUS8 | output | TCELL32:OUT.FAN0 |
| ISOCMBRAMWRABUS9 | output | TCELL32:OUT.FAN1 |
| ISOCMBRAMWRDBUS0 | output | TCELL34:OUT.FAN0 |
| ISOCMBRAMWRDBUS1 | output | TCELL34:OUT.FAN1 |
| ISOCMBRAMWRDBUS10 | output | TCELL35:OUT.FAN2 |
| ISOCMBRAMWRDBUS11 | output | TCELL35:OUT.FAN3 |
| ISOCMBRAMWRDBUS12 | output | TCELL35:OUT.FAN4 |
| ISOCMBRAMWRDBUS13 | output | TCELL35:OUT.FAN5 |
| ISOCMBRAMWRDBUS14 | output | TCELL35:OUT.FAN6 |
| ISOCMBRAMWRDBUS15 | output | TCELL35:OUT.FAN7 |
| ISOCMBRAMWRDBUS16 | output | TCELL36:OUT.FAN0 |
| ISOCMBRAMWRDBUS17 | output | TCELL36:OUT.FAN1 |
| ISOCMBRAMWRDBUS18 | output | TCELL36:OUT.FAN2 |
| ISOCMBRAMWRDBUS19 | output | TCELL36:OUT.FAN3 |
| ISOCMBRAMWRDBUS2 | output | TCELL34:OUT.FAN2 |
| ISOCMBRAMWRDBUS20 | output | TCELL36:OUT.FAN4 |
| ISOCMBRAMWRDBUS21 | output | TCELL36:OUT.FAN5 |
| ISOCMBRAMWRDBUS22 | output | TCELL36:OUT.FAN6 |
| ISOCMBRAMWRDBUS23 | output | TCELL36:OUT.FAN7 |
| ISOCMBRAMWRDBUS24 | output | TCELL37:OUT.FAN0 |
| ISOCMBRAMWRDBUS25 | output | TCELL37:OUT.FAN1 |
| ISOCMBRAMWRDBUS26 | output | TCELL37:OUT.FAN2 |
| ISOCMBRAMWRDBUS27 | output | TCELL37:OUT.FAN3 |
| ISOCMBRAMWRDBUS28 | output | TCELL37:OUT.FAN4 |
| ISOCMBRAMWRDBUS29 | output | TCELL37:OUT.FAN5 |
| ISOCMBRAMWRDBUS3 | output | TCELL34:OUT.FAN3 |
| ISOCMBRAMWRDBUS30 | output | TCELL37:OUT.FAN6 |
| ISOCMBRAMWRDBUS31 | output | TCELL37:OUT.FAN7 |
| ISOCMBRAMWRDBUS4 | output | TCELL34:OUT.FAN4 |
| ISOCMBRAMWRDBUS5 | output | TCELL34:OUT.FAN5 |
| ISOCMBRAMWRDBUS6 | output | TCELL34:OUT.FAN6 |
| ISOCMBRAMWRDBUS7 | output | TCELL34:OUT.FAN7 |
| ISOCMBRAMWRDBUS8 | output | TCELL35:OUT.FAN0 |
| ISOCMBRAMWRDBUS9 | output | TCELL35:OUT.FAN1 |
| ISOCMRDADDRVALID | output | TCELL33:OUT.SEC14 |
| JTGC405BNDSCANTDO | input | TCELL42:IMUX.G1.DATA0 |
| JTGC405TCK | input | TCELL41:IMUX.CLK0 |
| JTGC405TDI | input | TCELL41:IMUX.G1.DATA0 |
| JTGC405TMS | input | TCELL41:IMUX.G2.DATA0 |
| JTGC405TRSTNEG | input | TCELL12:IMUX.G2.DATA2 |
| LSSDC405ACLK | input | TCELL39:IMUX.G1.DATA5 |
| LSSDC405ARRAYCCLKNEG | input | TCELL32:IMUX.G2.DATA5 |
| LSSDC405BCLK | input | TCELL32:IMUX.G3.DATA5 |
| LSSDC405BISTCCLK | input | TCELL33:IMUX.G2.DATA5 |
| LSSDC405CNTLPOINT | input | TCELL33:IMUX.G3.DATA5 |
| LSSDC405SCANGATE | input | TCELL34:IMUX.G0.DATA2 |
| LSSDC405SCANIN0 | input | TCELL36:IMUX.G3.DATA1 |
| LSSDC405SCANIN1 | input | TCELL36:IMUX.G0.DATA2 |
| LSSDC405SCANIN2 | input | TCELL37:IMUX.G0.DATA2 |
| LSSDC405SCANIN3 | input | TCELL37:IMUX.G1.DATA2 |
| LSSDC405SCANIN4 | input | TCELL38:IMUX.G2.DATA5 |
| LSSDC405SCANIN5 | input | TCELL38:IMUX.G3.DATA5 |
| LSSDC405SCANIN6 | input | TCELL39:IMUX.G2.DATA5 |
| LSSDC405SCANIN7 | input | TCELL39:IMUX.G3.DATA5 |
| LSSDC405SCANIN8 | input | TCELL32:IMUX.G0.DATA6 |
| LSSDC405SCANIN9 | input | TCELL32:IMUX.G1.DATA6 |
| LSSDC405TESTEVS | input | TCELL34:IMUX.G1.DATA2 |
| LSSDC405TESTM1 | input | TCELL35:IMUX.G2.DATA1 |
| LSSDC405TESTM3 | input | TCELL35:IMUX.G3.DATA1 |
| MCBCPUCLKEN | input | TCELL4:IMUX.TI0 |
| MCBJTAGEN | input | TCELL5:IMUX.TI0 |
| MCBTIMEREN | input | TCELL6:IMUX.TI0 |
| MCPPCRST | input | TCELL14:IMUX.TI0 |
| PLBC405DCUADDRACK | input | TCELL7:IMUX.G0.DATA2 |
| PLBC405DCUBUSY | input | TCELL7:IMUX.G2.DATA2 |
| PLBC405DCUERR | input | TCELL7:IMUX.G3.DATA2 |
| PLBC405DCURDDACK | input | TCELL6:IMUX.G3.DATA2 |
| PLBC405DCURDDBUS0 | input | TCELL15:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS1 | input | TCELL15:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS10 | input | TCELL13:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS11 | input | TCELL13:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS12 | input | TCELL12:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS13 | input | TCELL12:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS14 | input | TCELL12:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS15 | input | TCELL12:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS16 | input | TCELL11:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS17 | input | TCELL11:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS18 | input | TCELL11:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS19 | input | TCELL11:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS2 | input | TCELL15:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS20 | input | TCELL10:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS21 | input | TCELL10:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS22 | input | TCELL10:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS23 | input | TCELL10:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS24 | input | TCELL9:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS25 | input | TCELL9:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS26 | input | TCELL9:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS27 | input | TCELL9:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS28 | input | TCELL8:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS29 | input | TCELL8:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS3 | input | TCELL15:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS30 | input | TCELL8:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS31 | input | TCELL8:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS32 | input | TCELL7:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS33 | input | TCELL7:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS34 | input | TCELL7:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS35 | input | TCELL7:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS36 | input | TCELL6:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS37 | input | TCELL6:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS38 | input | TCELL6:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS39 | input | TCELL6:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS4 | input | TCELL14:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS40 | input | TCELL5:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS41 | input | TCELL5:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS42 | input | TCELL5:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS43 | input | TCELL5:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS44 | input | TCELL4:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS45 | input | TCELL4:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS46 | input | TCELL4:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS47 | input | TCELL4:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS48 | input | TCELL3:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS49 | input | TCELL3:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS5 | input | TCELL14:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS50 | input | TCELL3:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS51 | input | TCELL3:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS52 | input | TCELL2:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS53 | input | TCELL2:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS54 | input | TCELL2:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS55 | input | TCELL2:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS56 | input | TCELL1:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS57 | input | TCELL1:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS58 | input | TCELL1:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS59 | input | TCELL1:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS6 | input | TCELL14:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS60 | input | TCELL0:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS61 | input | TCELL0:IMUX.G1.DATA0 |
| PLBC405DCURDDBUS62 | input | TCELL0:IMUX.G2.DATA0 |
| PLBC405DCURDDBUS63 | input | TCELL0:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS7 | input | TCELL14:IMUX.G3.DATA0 |
| PLBC405DCURDDBUS8 | input | TCELL13:IMUX.G0.DATA0 |
| PLBC405DCURDDBUS9 | input | TCELL13:IMUX.G1.DATA0 |
| PLBC405DCURDWDADDR1 | input | TCELL6:IMUX.G0.DATA2 |
| PLBC405DCURDWDADDR2 | input | TCELL6:IMUX.G1.DATA2 |
| PLBC405DCURDWDADDR3 | input | TCELL6:IMUX.G2.DATA2 |
| PLBC405DCUSSIZE1 | input | TCELL7:IMUX.G1.DATA2 |
| PLBC405DCUWRDACK | input | TCELL5:IMUX.G0.DATA2 |
| PLBC405ICUADDRACK | input | TCELL8:IMUX.G0.DATA2 |
| PLBC405ICUBUSY | input | TCELL8:IMUX.G2.DATA2 |
| PLBC405ICUERR | input | TCELL8:IMUX.G3.DATA2 |
| PLBC405ICURDDACK | input | TCELL9:IMUX.G3.DATA2 |
| PLBC405ICURDDBUS0 | input | TCELL15:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS1 | input | TCELL15:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS10 | input | TCELL13:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS11 | input | TCELL13:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS12 | input | TCELL12:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS13 | input | TCELL12:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS14 | input | TCELL12:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS15 | input | TCELL12:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS16 | input | TCELL11:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS17 | input | TCELL11:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS18 | input | TCELL11:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS19 | input | TCELL11:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS2 | input | TCELL15:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS20 | input | TCELL10:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS21 | input | TCELL10:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS22 | input | TCELL10:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS23 | input | TCELL10:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS24 | input | TCELL9:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS25 | input | TCELL9:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS26 | input | TCELL9:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS27 | input | TCELL9:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS28 | input | TCELL8:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS29 | input | TCELL8:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS3 | input | TCELL15:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS30 | input | TCELL8:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS31 | input | TCELL8:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS32 | input | TCELL7:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS33 | input | TCELL7:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS34 | input | TCELL7:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS35 | input | TCELL7:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS36 | input | TCELL6:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS37 | input | TCELL6:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS38 | input | TCELL6:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS39 | input | TCELL6:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS4 | input | TCELL14:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS40 | input | TCELL5:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS41 | input | TCELL5:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS42 | input | TCELL5:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS43 | input | TCELL5:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS44 | input | TCELL4:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS45 | input | TCELL4:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS46 | input | TCELL4:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS47 | input | TCELL4:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS48 | input | TCELL3:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS49 | input | TCELL3:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS5 | input | TCELL14:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS50 | input | TCELL3:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS51 | input | TCELL3:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS52 | input | TCELL2:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS53 | input | TCELL2:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS54 | input | TCELL2:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS55 | input | TCELL2:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS56 | input | TCELL1:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS57 | input | TCELL1:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS58 | input | TCELL1:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS59 | input | TCELL1:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS6 | input | TCELL14:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS60 | input | TCELL0:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS61 | input | TCELL0:IMUX.G1.DATA1 |
| PLBC405ICURDDBUS62 | input | TCELL0:IMUX.G2.DATA1 |
| PLBC405ICURDDBUS63 | input | TCELL0:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS7 | input | TCELL14:IMUX.G3.DATA1 |
| PLBC405ICURDDBUS8 | input | TCELL13:IMUX.G0.DATA1 |
| PLBC405ICURDDBUS9 | input | TCELL13:IMUX.G1.DATA1 |
| PLBC405ICURDWDADDR1 | input | TCELL9:IMUX.G0.DATA2 |
| PLBC405ICURDWDADDR2 | input | TCELL9:IMUX.G1.DATA2 |
| PLBC405ICURDWDADDR3 | input | TCELL9:IMUX.G2.DATA2 |
| PLBC405ICUSSIZE1 | input | TCELL8:IMUX.G1.DATA2 |
| PLBCLK | input | TCELL0:IMUX.CLK1 |
| RSTC405RESETCHIP | input | TCELL11:IMUX.SR0 |
| RSTC405RESETCORE | input | TCELL12:IMUX.SR0 |
| RSTC405RESETSYS | input | TCELL13:IMUX.SR0 |
| TESTSELI | input | TCELL24:IMUX.TI0 |
| TIEC405APUDIVEN | input | TCELL20:IMUX.TI0 |
| TIEC405APUPRESENT | input | TCELL20:IMUX.TI1 |
| TIEC405DETERMINISTICMULT | input | TCELL0:IMUX.TI0 |
| TIEC405DISOPERANDFWD | input | TCELL1:IMUX.TI0 |
| TIEC405MMUEN | input | TCELL1:IMUX.TI1 |
| TIEC405PVR0 | input | TCELL15:IMUX.TI0 |
| TIEC405PVR1 | input | TCELL15:IMUX.TI1 |
| TIEC405PVR10 | input | TCELL12:IMUX.TI1 |
| TIEC405PVR11 | input | TCELL12:IMUX.TS0 |
| TIEC405PVR12 | input | TCELL11:IMUX.TI0 |
| TIEC405PVR13 | input | TCELL11:IMUX.TI1 |
| TIEC405PVR14 | input | TCELL11:IMUX.TS0 |
| TIEC405PVR15 | input | TCELL10:IMUX.TI0 |
| TIEC405PVR16 | input | TCELL10:IMUX.TI1 |
| TIEC405PVR17 | input | TCELL10:IMUX.TS0 |
| TIEC405PVR18 | input | TCELL5:IMUX.TI1 |
| TIEC405PVR19 | input | TCELL5:IMUX.TS0 |
| TIEC405PVR2 | input | TCELL15:IMUX.TS0 |
| TIEC405PVR20 | input | TCELL4:IMUX.TI1 |
| TIEC405PVR21 | input | TCELL4:IMUX.TS0 |
| TIEC405PVR22 | input | TCELL4:IMUX.TS1 |
| TIEC405PVR23 | input | TCELL3:IMUX.TI0 |
| TIEC405PVR24 | input | TCELL3:IMUX.TI1 |
| TIEC405PVR25 | input | TCELL3:IMUX.TS0 |
| TIEC405PVR26 | input | TCELL2:IMUX.TI0 |
| TIEC405PVR27 | input | TCELL2:IMUX.TI1 |
| TIEC405PVR28 | input | TCELL2:IMUX.TS0 |
| TIEC405PVR29 | input | TCELL1:IMUX.TS0 |
| TIEC405PVR3 | input | TCELL14:IMUX.TI1 |
| TIEC405PVR30 | input | TCELL0:IMUX.TI1 |
| TIEC405PVR31 | input | TCELL0:IMUX.TS0 |
| TIEC405PVR4 | input | TCELL14:IMUX.TS0 |
| TIEC405PVR5 | input | TCELL14:IMUX.TS1 |
| TIEC405PVR6 | input | TCELL13:IMUX.TI0 |
| TIEC405PVR7 | input | TCELL13:IMUX.TI1 |
| TIEC405PVR8 | input | TCELL13:IMUX.TS0 |
| TIEC405PVR9 | input | TCELL12:IMUX.TI0 |
| TIEDSOCMDCRADDR0 | input | TCELL42:IMUX.TI0 |
| TIEDSOCMDCRADDR1 | input | TCELL43:IMUX.TI0 |
| TIEDSOCMDCRADDR2 | input | TCELL43:IMUX.TI1 |
| TIEDSOCMDCRADDR3 | input | TCELL43:IMUX.TS0 |
| TIEDSOCMDCRADDR4 | input | TCELL43:IMUX.TS1 |
| TIEDSOCMDCRADDR5 | input | TCELL44:IMUX.TI0 |
| TIEDSOCMDCRADDR6 | input | TCELL44:IMUX.TI1 |
| TIEDSOCMDCRADDR7 | input | TCELL44:IMUX.TS0 |
| TIEISOCMDCRADDR0 | input | TCELL34:IMUX.TI0 |
| TIEISOCMDCRADDR1 | input | TCELL34:IMUX.TI1 |
| TIEISOCMDCRADDR2 | input | TCELL34:IMUX.TS0 |
| TIEISOCMDCRADDR3 | input | TCELL34:IMUX.TS1 |
| TIEISOCMDCRADDR4 | input | TCELL35:IMUX.TI0 |
| TIEISOCMDCRADDR5 | input | TCELL35:IMUX.TI1 |
| TIEISOCMDCRADDR6 | input | TCELL35:IMUX.TS0 |
| TIEISOCMDCRADDR7 | input | TCELL35:IMUX.TS1 |
| TIERAMTAP1 | input | TCELL22:IMUX.TI0 |
| TIERAMTAP2 | input | TCELL22:IMUX.TI1 |
| TIETAGTAP1 | input | TCELL23:IMUX.TI0 |
| TIETAGTAP2 | input | TCELL23:IMUX.TI1 |
| TIEUTLBTAP1 | input | TCELL21:IMUX.TI0 |
| TIEUTLBTAP2 | input | TCELL21:IMUX.TI1 |
| TRCC405TRACEDISABLE | input | TCELL41:IMUX.G0.DATA0 |
| TRCC405TRIGGEREVENTIN | input | TCELL42:IMUX.G0.DATA0 |
| TSTC405DCRABUSI0 | input | TCELL16:IMUX.G0.DATA3 |
| TSTC405DCRABUSI1 | input | TCELL16:IMUX.G1.DATA3 |
| TSTC405DCRABUSI2 | input | TCELL17:IMUX.G0.DATA3 |
| TSTC405DCRABUSI3 | input | TCELL17:IMUX.G1.DATA3 |
| TSTC405DCRABUSI4 | input | TCELL18:IMUX.G0.DATA3 |
| TSTC405DCRABUSI5 | input | TCELL18:IMUX.G1.DATA3 |
| TSTC405DCRABUSI6 | input | TCELL19:IMUX.G0.DATA3 |
| TSTC405DCRABUSI7 | input | TCELL19:IMUX.G1.DATA3 |
| TSTC405DCRABUSI8 | input | TCELL20:IMUX.G2.DATA2 |
| TSTC405DCRABUSI9 | input | TCELL20:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI0 | input | TCELL21:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI1 | input | TCELL21:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI10 | input | TCELL26:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI11 | input | TCELL27:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI12 | input | TCELL27:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI13 | input | TCELL28:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI14 | input | TCELL28:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI15 | input | TCELL29:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI16 | input | TCELL29:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI17 | input | TCELL30:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI18 | input | TCELL30:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI19 | input | TCELL31:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI2 | input | TCELL22:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI20 | input | TCELL31:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI21 | input | TCELL16:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI22 | input | TCELL16:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI23 | input | TCELL17:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI24 | input | TCELL17:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI25 | input | TCELL18:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI26 | input | TCELL18:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI27 | input | TCELL19:IMUX.G2.DATA3 |
| TSTC405DCRDBUSOUTI28 | input | TCELL19:IMUX.G3.DATA3 |
| TSTC405DCRDBUSOUTI29 | input | TCELL20:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI3 | input | TCELL22:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI30 | input | TCELL20:IMUX.G1.DATA3 |
| TSTC405DCRDBUSOUTI31 | input | TCELL21:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI4 | input | TCELL23:IMUX.G2.DATA2 |
| TSTC405DCRDBUSOUTI5 | input | TCELL23:IMUX.G3.DATA2 |
| TSTC405DCRDBUSOUTI6 | input | TCELL24:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI7 | input | TCELL25:IMUX.G0.DATA3 |
| TSTC405DCRDBUSOUTI8 | input | TCELL25:IMUX.G1.DATA3 |
| TSTC405DCRDBUSOUTI9 | input | TCELL26:IMUX.G3.DATA2 |
| TSTC405DCRREADI | input | TCELL21:IMUX.G1.DATA3 |
| TSTC405DCRWRITEI | input | TCELL22:IMUX.G0.DATA3 |
| TSTCLKINACTI | input | TCELL1:IMUX.G1.DATA2 |
| TSTCLKINACTO | output | TCELL1:OUT.TEST0 |
| TSTCPUCLKENI | input | TCELL14:IMUX.G0.DATA2 |
| TSTCPUCLKENO | output | TCELL1:OUT.SEC9 |
| TSTCPUCLKI | input | TCELL0:IMUX.G1.DATA2 |
| TSTCPUCLKO | output | TCELL1:OUT.SEC8 |
| TSTDCRACKI | input | TCELL24:IMUX.G3.DATA1 |
| TSTDCRACKO | output | TCELL16:OUT.SEC10 |
| TSTDCRBUSI0 | input | TCELL25:IMUX.G2.DATA1 |
| TSTDCRBUSI1 | input | TCELL25:IMUX.G3.DATA1 |
| TSTDCRBUSI10 | input | TCELL30:IMUX.G2.DATA1 |
| TSTDCRBUSI11 | input | TCELL30:IMUX.G3.DATA1 |
| TSTDCRBUSI12 | input | TCELL31:IMUX.G2.DATA1 |
| TSTDCRBUSI13 | input | TCELL31:IMUX.G3.DATA1 |
| TSTDCRBUSI14 | input | TCELL16:IMUX.G0.DATA2 |
| TSTDCRBUSI15 | input | TCELL16:IMUX.G1.DATA2 |
| TSTDCRBUSI16 | input | TCELL17:IMUX.G0.DATA2 |
| TSTDCRBUSI17 | input | TCELL17:IMUX.G1.DATA2 |
| TSTDCRBUSI18 | input | TCELL18:IMUX.G0.DATA2 |
| TSTDCRBUSI19 | input | TCELL18:IMUX.G1.DATA2 |
| TSTDCRBUSI2 | input | TCELL26:IMUX.G2.DATA1 |
| TSTDCRBUSI20 | input | TCELL19:IMUX.G0.DATA2 |
| TSTDCRBUSI21 | input | TCELL19:IMUX.G1.DATA2 |
| TSTDCRBUSI22 | input | TCELL20:IMUX.G2.DATA1 |
| TSTDCRBUSI23 | input | TCELL20:IMUX.G3.DATA1 |
| TSTDCRBUSI24 | input | TCELL21:IMUX.G2.DATA1 |
| TSTDCRBUSI25 | input | TCELL21:IMUX.G3.DATA1 |
| TSTDCRBUSI26 | input | TCELL22:IMUX.G2.DATA1 |
| TSTDCRBUSI27 | input | TCELL22:IMUX.G3.DATA1 |
| TSTDCRBUSI28 | input | TCELL23:IMUX.G2.DATA1 |
| TSTDCRBUSI29 | input | TCELL23:IMUX.G3.DATA1 |
| TSTDCRBUSI3 | input | TCELL26:IMUX.G3.DATA1 |
| TSTDCRBUSI30 | input | TCELL24:IMUX.G0.DATA2 |
| TSTDCRBUSI31 | input | TCELL24:IMUX.G1.DATA2 |
| TSTDCRBUSI4 | input | TCELL27:IMUX.G2.DATA1 |
| TSTDCRBUSI5 | input | TCELL27:IMUX.G3.DATA1 |
| TSTDCRBUSI6 | input | TCELL28:IMUX.G2.DATA1 |
| TSTDCRBUSI7 | input | TCELL28:IMUX.G3.DATA1 |
| TSTDCRBUSI8 | input | TCELL29:IMUX.G2.DATA1 |
| TSTDCRBUSI9 | input | TCELL29:IMUX.G3.DATA1 |
| TSTDCRBUSO0 | output | TCELL16:OUT.SEC9 |
| TSTDCRBUSO1 | output | TCELL16:OUT.SEC8 |
| TSTDCRBUSO10 | output | TCELL18:OUT.TEST0 |
| TSTDCRBUSO11 | output | TCELL19:OUT.SEC10 |
| TSTDCRBUSO12 | output | TCELL19:OUT.SEC9 |
| TSTDCRBUSO13 | output | TCELL19:OUT.SEC8 |
| TSTDCRBUSO14 | output | TCELL19:OUT.TEST0 |
| TSTDCRBUSO15 | output | TCELL20:OUT.SEC10 |
| TSTDCRBUSO16 | output | TCELL20:OUT.SEC9 |
| TSTDCRBUSO17 | output | TCELL20:OUT.SEC8 |
| TSTDCRBUSO18 | output | TCELL20:OUT.TEST0 |
| TSTDCRBUSO19 | output | TCELL21:OUT.SEC10 |
| TSTDCRBUSO2 | output | TCELL16:OUT.TEST0 |
| TSTDCRBUSO20 | output | TCELL21:OUT.SEC9 |
| TSTDCRBUSO21 | output | TCELL21:OUT.SEC8 |
| TSTDCRBUSO22 | output | TCELL21:OUT.TEST0 |
| TSTDCRBUSO23 | output | TCELL22:OUT.SEC10 |
| TSTDCRBUSO24 | output | TCELL22:OUT.SEC9 |
| TSTDCRBUSO25 | output | TCELL22:OUT.SEC8 |
| TSTDCRBUSO26 | output | TCELL22:OUT.TEST0 |
| TSTDCRBUSO27 | output | TCELL23:OUT.SEC10 |
| TSTDCRBUSO28 | output | TCELL23:OUT.SEC9 |
| TSTDCRBUSO29 | output | TCELL23:OUT.SEC8 |
| TSTDCRBUSO3 | output | TCELL17:OUT.SEC10 |
| TSTDCRBUSO30 | output | TCELL23:OUT.TEST0 |
| TSTDCRBUSO31 | output | TCELL24:OUT.SEC10 |
| TSTDCRBUSO4 | output | TCELL17:OUT.SEC9 |
| TSTDCRBUSO5 | output | TCELL17:OUT.SEC8 |
| TSTDCRBUSO6 | output | TCELL17:OUT.TEST0 |
| TSTDCRBUSO7 | output | TCELL18:OUT.SEC10 |
| TSTDCRBUSO8 | output | TCELL18:OUT.SEC9 |
| TSTDCRBUSO9 | output | TCELL18:OUT.SEC8 |
| TSTDSOCMABORTOPI | input | TCELL27:IMUX.G0.DATA3 |
| TSTDSOCMABORTOPO | output | TCELL29:OUT.SEC12 |
| TSTDSOCMABORTREQI | input | TCELL27:IMUX.G1.DATA3 |
| TSTDSOCMABORTREQO | output | TCELL30:OUT.SEC12 |
| TSTDSOCMABUSI0 | input | TCELL28:IMUX.G0.DATA3 |
| TSTDSOCMABUSI1 | input | TCELL28:IMUX.G1.DATA3 |
| TSTDSOCMABUSI10 | input | TCELL17:IMUX.G0.DATA4 |
| TSTDSOCMABUSI11 | input | TCELL17:IMUX.G1.DATA4 |
| TSTDSOCMABUSI12 | input | TCELL18:IMUX.G0.DATA4 |
| TSTDSOCMABUSI13 | input | TCELL18:IMUX.G1.DATA4 |
| TSTDSOCMABUSI14 | input | TCELL19:IMUX.G0.DATA4 |
| TSTDSOCMABUSI15 | input | TCELL19:IMUX.G1.DATA4 |
| TSTDSOCMABUSI16 | input | TCELL20:IMUX.G2.DATA3 |
| TSTDSOCMABUSI17 | input | TCELL20:IMUX.G3.DATA3 |
| TSTDSOCMABUSI18 | input | TCELL21:IMUX.G2.DATA3 |
| TSTDSOCMABUSI19 | input | TCELL21:IMUX.G3.DATA3 |
| TSTDSOCMABUSI2 | input | TCELL29:IMUX.G0.DATA3 |
| TSTDSOCMABUSI20 | input | TCELL22:IMUX.G2.DATA3 |
| TSTDSOCMABUSI21 | input | TCELL22:IMUX.G3.DATA3 |
| TSTDSOCMABUSI22 | input | TCELL23:IMUX.G2.DATA3 |
| TSTDSOCMABUSI23 | input | TCELL23:IMUX.G3.DATA3 |
| TSTDSOCMABUSI24 | input | TCELL24:IMUX.G3.DATA3 |
| TSTDSOCMABUSI25 | input | TCELL24:IMUX.G0.DATA4 |
| TSTDSOCMABUSI26 | input | TCELL25:IMUX.G0.DATA4 |
| TSTDSOCMABUSI27 | input | TCELL25:IMUX.G1.DATA4 |
| TSTDSOCMABUSI28 | input | TCELL26:IMUX.G3.DATA3 |
| TSTDSOCMABUSI29 | input | TCELL26:IMUX.G0.DATA4 |
| TSTDSOCMABUSI3 | input | TCELL29:IMUX.G1.DATA3 |
| TSTDSOCMABUSI4 | input | TCELL30:IMUX.G0.DATA3 |
| TSTDSOCMABUSI5 | input | TCELL30:IMUX.G1.DATA3 |
| TSTDSOCMABUSI6 | input | TCELL31:IMUX.G0.DATA3 |
| TSTDSOCMABUSI7 | input | TCELL31:IMUX.G1.DATA3 |
| TSTDSOCMABUSI8 | input | TCELL16:IMUX.G0.DATA4 |
| TSTDSOCMABUSI9 | input | TCELL16:IMUX.G1.DATA4 |
| TSTDSOCMABUSO0 | output | TCELL41:OUT.SEC12 |
| TSTDSOCMABUSO1 | output | TCELL42:OUT.SEC12 |
| TSTDSOCMABUSO10 | output | TCELL46:OUT.SEC10 |
| TSTDSOCMABUSO11 | output | TCELL46:OUT.SEC9 |
| TSTDSOCMABUSO12 | output | TCELL46:OUT.SEC8 |
| TSTDSOCMABUSO13 | output | TCELL41:OUT.SEC11 |
| TSTDSOCMABUSO14 | output | TCELL41:OUT.SEC10 |
| TSTDSOCMABUSO15 | output | TCELL42:OUT.SEC11 |
| TSTDSOCMABUSO16 | output | TCELL42:OUT.SEC10 |
| TSTDSOCMABUSO17 | output | TCELL43:OUT.SEC11 |
| TSTDSOCMABUSO18 | output | TCELL43:OUT.SEC10 |
| TSTDSOCMABUSO19 | output | TCELL44:OUT.SEC10 |
| TSTDSOCMABUSO2 | output | TCELL43:OUT.SEC12 |
| TSTDSOCMABUSO20 | output | TCELL44:OUT.SEC9 |
| TSTDSOCMABUSO21 | output | TCELL45:OUT.TEST0 |
| TSTDSOCMABUSO22 | output | TCELL45:OUT.TEST2 |
| TSTDSOCMABUSO23 | output | TCELL46:OUT.TEST0 |
| TSTDSOCMABUSO24 | output | TCELL31:OUT.SEC12 |
| TSTDSOCMABUSO25 | output | TCELL16:OUT.SEC11 |
| TSTDSOCMABUSO26 | output | TCELL17:OUT.SEC11 |
| TSTDSOCMABUSO27 | output | TCELL18:OUT.SEC11 |
| TSTDSOCMABUSO28 | output | TCELL19:OUT.SEC11 |
| TSTDSOCMABUSO29 | output | TCELL20:OUT.SEC11 |
| TSTDSOCMABUSO3 | output | TCELL44:OUT.SEC12 |
| TSTDSOCMABUSO4 | output | TCELL44:OUT.SEC11 |
| TSTDSOCMABUSO5 | output | TCELL45:OUT.SEC11 |
| TSTDSOCMABUSO6 | output | TCELL45:OUT.SEC10 |
| TSTDSOCMABUSO7 | output | TCELL45:OUT.SEC9 |
| TSTDSOCMABUSO8 | output | TCELL45:OUT.SEC8 |
| TSTDSOCMABUSO9 | output | TCELL46:OUT.SEC11 |
| TSTDSOCMBYTEENI0 | input | TCELL27:IMUX.G2.DATA3 |
| TSTDSOCMBYTEENI1 | input | TCELL27:IMUX.G3.DATA3 |
| TSTDSOCMBYTEENI2 | input | TCELL28:IMUX.G2.DATA3 |
| TSTDSOCMBYTEENI3 | input | TCELL28:IMUX.G3.DATA3 |
| TSTDSOCMBYTEENO0 | output | TCELL21:OUT.SEC11 |
| TSTDSOCMBYTEENO1 | output | TCELL22:OUT.SEC11 |
| TSTDSOCMBYTEENO2 | output | TCELL23:OUT.SEC11 |
| TSTDSOCMBYTEENO3 | output | TCELL24:OUT.SEC11 |
| TSTDSOCMCOMPLETEI | input | TCELL25:IMUX.G0.DATA2 |
| TSTDSOCMDBUSI0 | input | TCELL22:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI1 | input | TCELL23:IMUX.G0.DATA3 |
| TSTDSOCMDBUSI2 | input | TCELL23:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI3 | input | TCELL24:IMUX.G1.DATA3 |
| TSTDSOCMDBUSI4 | input | TCELL24:IMUX.G2.DATA3 |
| TSTDSOCMDBUSI5 | input | TCELL25:IMUX.G2.DATA3 |
| TSTDSOCMDBUSI6 | input | TCELL25:IMUX.G3.DATA3 |
| TSTDSOCMDBUSI7 | input | TCELL26:IMUX.G1.DATA3 |
| TSTDSOCMDBUSO0 | output | TCELL24:OUT.SEC9 |
| TSTDSOCMDBUSO1 | output | TCELL24:OUT.SEC8 |
| TSTDSOCMDBUSO2 | output | TCELL24:OUT.TEST0 |
| TSTDSOCMDBUSO3 | output | TCELL25:OUT.SEC10 |
| TSTDSOCMDBUSO4 | output | TCELL25:OUT.SEC9 |
| TSTDSOCMDBUSO5 | output | TCELL25:OUT.SEC8 |
| TSTDSOCMDBUSO6 | output | TCELL25:OUT.TEST0 |
| TSTDSOCMDBUSO7 | output | TCELL26:OUT.SEC10 |
| TSTDSOCMDCRACKI | input | TCELL26:IMUX.G2.DATA3 |
| TSTDSOCMDCRACKO | output | TCELL26:OUT.SEC9 |
| TSTDSOCMHOLDI | input | TCELL26:IMUX.G0.DATA2 |
| TSTDSOCMHOLDO | output | TCELL21:OUT.TEST2 |
| TSTDSOCMLOADREQI | input | TCELL29:IMUX.G2.DATA3 |
| TSTDSOCMLOADREQO | output | TCELL25:OUT.SEC11 |
| TSTDSOCMSTOREREQI | input | TCELL29:IMUX.G3.DATA3 |
| TSTDSOCMSTOREREQO | output | TCELL26:OUT.SEC11 |
| TSTDSOCMWAITI | input | TCELL30:IMUX.G2.DATA3 |
| TSTDSOCMWAITO | output | TCELL27:OUT.SEC11 |
| TSTDSOCMWRDBUSI0 | input | TCELL30:IMUX.G3.DATA3 |
| TSTDSOCMWRDBUSI1 | input | TCELL31:IMUX.G2.DATA3 |
| TSTDSOCMWRDBUSI10 | input | TCELL19:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI11 | input | TCELL20:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI12 | input | TCELL20:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI13 | input | TCELL21:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI14 | input | TCELL21:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI15 | input | TCELL22:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI16 | input | TCELL22:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI17 | input | TCELL23:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI18 | input | TCELL23:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI19 | input | TCELL24:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI2 | input | TCELL31:IMUX.G3.DATA3 |
| TSTDSOCMWRDBUSI20 | input | TCELL24:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI21 | input | TCELL25:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI22 | input | TCELL25:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI23 | input | TCELL26:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI24 | input | TCELL26:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI25 | input | TCELL27:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI26 | input | TCELL27:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI27 | input | TCELL28:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI28 | input | TCELL28:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI29 | input | TCELL29:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI3 | input | TCELL16:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI30 | input | TCELL29:IMUX.G1.DATA4 |
| TSTDSOCMWRDBUSI31 | input | TCELL30:IMUX.G0.DATA4 |
| TSTDSOCMWRDBUSI4 | input | TCELL16:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI5 | input | TCELL17:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI6 | input | TCELL17:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI7 | input | TCELL18:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSI8 | input | TCELL18:IMUX.G3.DATA4 |
| TSTDSOCMWRDBUSI9 | input | TCELL19:IMUX.G2.DATA4 |
| TSTDSOCMWRDBUSO0 | output | TCELL46:OUT.TEST2 |
| TSTDSOCMWRDBUSO1 | output | TCELL40:OUT.SEC12 |
| TSTDSOCMWRDBUSO10 | output | TCELL45:OUT.TEST4 |
| TSTDSOCMWRDBUSO11 | output | TCELL45:OUT.TEST6 |
| TSTDSOCMWRDBUSO12 | output | TCELL46:OUT.TEST4 |
| TSTDSOCMWRDBUSO13 | output | TCELL46:OUT.TEST6 |
| TSTDSOCMWRDBUSO14 | output | TCELL40:OUT.SEC11 |
| TSTDSOCMWRDBUSO15 | output | TCELL40:OUT.SEC10 |
| TSTDSOCMWRDBUSO16 | output | TCELL41:OUT.TEST0 |
| TSTDSOCMWRDBUSO17 | output | TCELL41:OUT.TEST2 |
| TSTDSOCMWRDBUSO18 | output | TCELL42:OUT.TEST0 |
| TSTDSOCMWRDBUSO19 | output | TCELL42:OUT.TEST2 |
| TSTDSOCMWRDBUSO2 | output | TCELL41:OUT.SEC9 |
| TSTDSOCMWRDBUSO20 | output | TCELL43:OUT.TEST0 |
| TSTDSOCMWRDBUSO21 | output | TCELL43:OUT.TEST2 |
| TSTDSOCMWRDBUSO22 | output | TCELL44:OUT.TEST2 |
| TSTDSOCMWRDBUSO23 | output | TCELL44:OUT.TEST4 |
| TSTDSOCMWRDBUSO24 | output | TCELL45:OUT.TEST8 |
| TSTDSOCMWRDBUSO25 | output | TCELL45:OUT.TEST10 |
| TSTDSOCMWRDBUSO26 | output | TCELL46:OUT.TEST8 |
| TSTDSOCMWRDBUSO27 | output | TCELL46:OUT.TEST10 |
| TSTDSOCMWRDBUSO28 | output | TCELL40:OUT.SEC9 |
| TSTDSOCMWRDBUSO29 | output | TCELL41:OUT.TEST4 |
| TSTDSOCMWRDBUSO3 | output | TCELL41:OUT.SEC8 |
| TSTDSOCMWRDBUSO30 | output | TCELL42:OUT.TEST4 |
| TSTDSOCMWRDBUSO31 | output | TCELL43:OUT.TEST4 |
| TSTDSOCMWRDBUSO4 | output | TCELL42:OUT.SEC9 |
| TSTDSOCMWRDBUSO5 | output | TCELL42:OUT.SEC8 |
| TSTDSOCMWRDBUSO6 | output | TCELL43:OUT.SEC9 |
| TSTDSOCMWRDBUSO7 | output | TCELL43:OUT.SEC8 |
| TSTDSOCMWRDBUSO8 | output | TCELL44:OUT.SEC8 |
| TSTDSOCMWRDBUSO9 | output | TCELL44:OUT.TEST0 |
| TSTDSOCMXLATEVALIDI | input | TCELL30:IMUX.G1.DATA4 |
| TSTDSOCMXLATEVALIDO | output | TCELL28:OUT.SEC11 |
| TSTISOCMABORTI | input | TCELL11:IMUX.G3.DATA2 |
| TSTISOCMABORTO | output | TCELL32:OUT.TEST2 |
| TSTISOCMABUSI0 | input | TCELL1:IMUX.G0.DATA3 |
| TSTISOCMABUSI1 | input | TCELL1:IMUX.G1.DATA3 |
| TSTISOCMABUSI10 | input | TCELL4:IMUX.G1.DATA3 |
| TSTISOCMABUSI11 | input | TCELL5:IMUX.G1.DATA3 |
| TSTISOCMABUSI12 | input | TCELL5:IMUX.G2.DATA3 |
| TSTISOCMABUSI13 | input | TCELL6:IMUX.G2.DATA3 |
| TSTISOCMABUSI14 | input | TCELL6:IMUX.G3.DATA3 |
| TSTISOCMABUSI15 | input | TCELL6:IMUX.G0.DATA4 |
| TSTISOCMABUSI16 | input | TCELL7:IMUX.G1.DATA3 |
| TSTISOCMABUSI17 | input | TCELL7:IMUX.G2.DATA3 |
| TSTISOCMABUSI18 | input | TCELL7:IMUX.G3.DATA3 |
| TSTISOCMABUSI19 | input | TCELL8:IMUX.G1.DATA3 |
| TSTISOCMABUSI2 | input | TCELL2:IMUX.G3.DATA2 |
| TSTISOCMABUSI20 | input | TCELL8:IMUX.G2.DATA3 |
| TSTISOCMABUSI21 | input | TCELL8:IMUX.G3.DATA3 |
| TSTISOCMABUSI22 | input | TCELL9:IMUX.G1.DATA3 |
| TSTISOCMABUSI23 | input | TCELL9:IMUX.G2.DATA3 |
| TSTISOCMABUSI24 | input | TCELL9:IMUX.G3.DATA3 |
| TSTISOCMABUSI25 | input | TCELL10:IMUX.G2.DATA2 |
| TSTISOCMABUSI26 | input | TCELL10:IMUX.G3.DATA2 |
| TSTISOCMABUSI27 | input | TCELL10:IMUX.G0.DATA3 |
| TSTISOCMABUSI28 | input | TCELL10:IMUX.G1.DATA3 |
| TSTISOCMABUSI29 | input | TCELL11:IMUX.G2.DATA2 |
| TSTISOCMABUSI3 | input | TCELL2:IMUX.G0.DATA3 |
| TSTISOCMABUSI4 | input | TCELL2:IMUX.G1.DATA3 |
| TSTISOCMABUSI5 | input | TCELL3:IMUX.G2.DATA2 |
| TSTISOCMABUSI6 | input | TCELL3:IMUX.G3.DATA2 |
| TSTISOCMABUSI7 | input | TCELL3:IMUX.G0.DATA3 |
| TSTISOCMABUSI8 | input | TCELL4:IMUX.G3.DATA2 |
| TSTISOCMABUSI9 | input | TCELL4:IMUX.G0.DATA3 |
| TSTISOCMABUSO0 | output | TCELL32:OUT.SEC8 |
| TSTISOCMABUSO1 | output | TCELL33:OUT.SEC13 |
| TSTISOCMABUSO10 | output | TCELL35:OUT.SEC14 |
| TSTISOCMABUSO11 | output | TCELL35:OUT.SEC13 |
| TSTISOCMABUSO12 | output | TCELL35:OUT.SEC12 |
| TSTISOCMABUSO13 | output | TCELL36:OUT.SEC15 |
| TSTISOCMABUSO14 | output | TCELL36:OUT.SEC14 |
| TSTISOCMABUSO15 | output | TCELL36:OUT.SEC13 |
| TSTISOCMABUSO16 | output | TCELL36:OUT.SEC12 |
| TSTISOCMABUSO17 | output | TCELL37:OUT.SEC15 |
| TSTISOCMABUSO18 | output | TCELL37:OUT.SEC14 |
| TSTISOCMABUSO19 | output | TCELL37:OUT.SEC13 |
| TSTISOCMABUSO2 | output | TCELL33:OUT.SEC12 |
| TSTISOCMABUSO20 | output | TCELL37:OUT.SEC12 |
| TSTISOCMABUSO21 | output | TCELL38:OUT.SEC11 |
| TSTISOCMABUSO22 | output | TCELL38:OUT.SEC10 |
| TSTISOCMABUSO23 | output | TCELL38:OUT.SEC9 |
| TSTISOCMABUSO24 | output | TCELL38:OUT.SEC8 |
| TSTISOCMABUSO25 | output | TCELL39:OUT.SEC14 |
| TSTISOCMABUSO26 | output | TCELL39:OUT.SEC13 |
| TSTISOCMABUSO27 | output | TCELL39:OUT.SEC12 |
| TSTISOCMABUSO28 | output | TCELL39:OUT.SEC11 |
| TSTISOCMABUSO29 | output | TCELL32:OUT.TEST0 |
| TSTISOCMABUSO3 | output | TCELL33:OUT.SEC11 |
| TSTISOCMABUSO4 | output | TCELL33:OUT.SEC10 |
| TSTISOCMABUSO5 | output | TCELL34:OUT.SEC12 |
| TSTISOCMABUSO6 | output | TCELL34:OUT.SEC11 |
| TSTISOCMABUSO7 | output | TCELL34:OUT.SEC10 |
| TSTISOCMABUSO8 | output | TCELL34:OUT.SEC9 |
| TSTISOCMABUSO9 | output | TCELL35:OUT.SEC15 |
| TSTISOCMHOLDI | input | TCELL2:IMUX.G1.DATA2 |
| TSTISOCMHOLDO | output | TCELL2:OUT.SEC10 |
| TSTISOCMICUREADYI | input | TCELL1:IMUX.G3.DATA2 |
| TSTISOCMICUREADYO | output | TCELL32:OUT.SEC9 |
| TSTISOCMRDATAI0 | input | TCELL5:IMUX.G3.DATA2 |
| TSTISOCMRDATAI1 | input | TCELL6:IMUX.G0.DATA3 |
| TSTISOCMRDATAI10 | input | TCELL15:IMUX.G1.DATA2 |
| TSTISOCMRDATAI11 | input | TCELL0:IMUX.G2.DATA2 |
| TSTISOCMRDATAI12 | input | TCELL1:IMUX.G2.DATA2 |
| TSTISOCMRDATAI13 | input | TCELL2:IMUX.G2.DATA2 |
| TSTISOCMRDATAI14 | input | TCELL3:IMUX.G1.DATA2 |
| TSTISOCMRDATAI15 | input | TCELL4:IMUX.G2.DATA2 |
| TSTISOCMRDATAI16 | input | TCELL5:IMUX.G0.DATA3 |
| TSTISOCMRDATAI17 | input | TCELL32:IMUX.G0.DATA4 |
| TSTISOCMRDATAI18 | input | TCELL32:IMUX.G1.DATA4 |
| TSTISOCMRDATAI19 | input | TCELL32:IMUX.G2.DATA4 |
| TSTISOCMRDATAI2 | input | TCELL7:IMUX.G0.DATA3 |
| TSTISOCMRDATAI20 | input | TCELL32:IMUX.G3.DATA4 |
| TSTISOCMRDATAI21 | input | TCELL33:IMUX.G0.DATA4 |
| TSTISOCMRDATAI22 | input | TCELL33:IMUX.G1.DATA4 |
| TSTISOCMRDATAI23 | input | TCELL33:IMUX.G2.DATA4 |
| TSTISOCMRDATAI24 | input | TCELL33:IMUX.G3.DATA4 |
| TSTISOCMRDATAI25 | input | TCELL34:IMUX.G2.DATA0 |
| TSTISOCMRDATAI26 | input | TCELL34:IMUX.G3.DATA0 |
| TSTISOCMRDATAI27 | input | TCELL34:IMUX.G0.DATA1 |
| TSTISOCMRDATAI28 | input | TCELL34:IMUX.G1.DATA1 |
| TSTISOCMRDATAI29 | input | TCELL35:IMUX.G0.DATA0 |
| TSTISOCMRDATAI3 | input | TCELL8:IMUX.G0.DATA3 |
| TSTISOCMRDATAI30 | input | TCELL35:IMUX.G1.DATA0 |
| TSTISOCMRDATAI31 | input | TCELL35:IMUX.G2.DATA0 |
| TSTISOCMRDATAI32 | input | TCELL35:IMUX.G3.DATA0 |
| TSTISOCMRDATAI33 | input | TCELL36:IMUX.G1.DATA0 |
| TSTISOCMRDATAI34 | input | TCELL36:IMUX.G2.DATA0 |
| TSTISOCMRDATAI35 | input | TCELL36:IMUX.G3.DATA0 |
| TSTISOCMRDATAI36 | input | TCELL36:IMUX.G0.DATA1 |
| TSTISOCMRDATAI37 | input | TCELL37:IMUX.G2.DATA0 |
| TSTISOCMRDATAI38 | input | TCELL37:IMUX.G3.DATA0 |
| TSTISOCMRDATAI39 | input | TCELL37:IMUX.G0.DATA1 |
| TSTISOCMRDATAI4 | input | TCELL9:IMUX.G0.DATA3 |
| TSTISOCMRDATAI40 | input | TCELL37:IMUX.G1.DATA1 |
| TSTISOCMRDATAI41 | input | TCELL38:IMUX.G0.DATA4 |
| TSTISOCMRDATAI42 | input | TCELL38:IMUX.G1.DATA4 |
| TSTISOCMRDATAI43 | input | TCELL38:IMUX.G2.DATA4 |
| TSTISOCMRDATAI44 | input | TCELL38:IMUX.G3.DATA4 |
| TSTISOCMRDATAI45 | input | TCELL39:IMUX.G0.DATA4 |
| TSTISOCMRDATAI46 | input | TCELL39:IMUX.G1.DATA4 |
| TSTISOCMRDATAI47 | input | TCELL39:IMUX.G2.DATA4 |
| TSTISOCMRDATAI48 | input | TCELL39:IMUX.G3.DATA4 |
| TSTISOCMRDATAI49 | input | TCELL32:IMUX.G0.DATA5 |
| TSTISOCMRDATAI5 | input | TCELL10:IMUX.G1.DATA2 |
| TSTISOCMRDATAI50 | input | TCELL32:IMUX.G1.DATA5 |
| TSTISOCMRDATAI51 | input | TCELL33:IMUX.G0.DATA5 |
| TSTISOCMRDATAI52 | input | TCELL33:IMUX.G1.DATA5 |
| TSTISOCMRDATAI53 | input | TCELL34:IMUX.G2.DATA1 |
| TSTISOCMRDATAI54 | input | TCELL34:IMUX.G3.DATA1 |
| TSTISOCMRDATAI55 | input | TCELL35:IMUX.G0.DATA1 |
| TSTISOCMRDATAI56 | input | TCELL35:IMUX.G1.DATA1 |
| TSTISOCMRDATAI57 | input | TCELL36:IMUX.G1.DATA1 |
| TSTISOCMRDATAI58 | input | TCELL36:IMUX.G2.DATA1 |
| TSTISOCMRDATAI59 | input | TCELL37:IMUX.G2.DATA1 |
| TSTISOCMRDATAI6 | input | TCELL11:IMUX.G1.DATA2 |
| TSTISOCMRDATAI60 | input | TCELL37:IMUX.G3.DATA1 |
| TSTISOCMRDATAI61 | input | TCELL38:IMUX.G0.DATA5 |
| TSTISOCMRDATAI62 | input | TCELL38:IMUX.G1.DATA5 |
| TSTISOCMRDATAI63 | input | TCELL39:IMUX.G0.DATA5 |
| TSTISOCMRDATAI7 | input | TCELL12:IMUX.G1.DATA2 |
| TSTISOCMRDATAI8 | input | TCELL13:IMUX.G1.DATA2 |
| TSTISOCMRDATAI9 | input | TCELL14:IMUX.G1.DATA2 |
| TSTISOCMRDATAO0 | output | TCELL2:OUT.TEST0 |
| TSTISOCMRDATAO1 | output | TCELL3:OUT.SEC10 |
| TSTISOCMRDATAO10 | output | TCELL5:OUT.SEC10 |
| TSTISOCMRDATAO11 | output | TCELL5:OUT.SEC9 |
| TSTISOCMRDATAO12 | output | TCELL5:OUT.SEC8 |
| TSTISOCMRDATAO13 | output | TCELL6:OUT.SEC11 |
| TSTISOCMRDATAO14 | output | TCELL6:OUT.SEC10 |
| TSTISOCMRDATAO15 | output | TCELL6:OUT.SEC9 |
| TSTISOCMRDATAO16 | output | TCELL6:OUT.SEC8 |
| TSTISOCMRDATAO17 | output | TCELL7:OUT.SEC11 |
| TSTISOCMRDATAO18 | output | TCELL7:OUT.SEC10 |
| TSTISOCMRDATAO19 | output | TCELL7:OUT.SEC9 |
| TSTISOCMRDATAO2 | output | TCELL3:OUT.SEC9 |
| TSTISOCMRDATAO20 | output | TCELL7:OUT.SEC8 |
| TSTISOCMRDATAO21 | output | TCELL8:OUT.SEC11 |
| TSTISOCMRDATAO22 | output | TCELL8:OUT.SEC10 |
| TSTISOCMRDATAO23 | output | TCELL8:OUT.SEC9 |
| TSTISOCMRDATAO24 | output | TCELL8:OUT.SEC8 |
| TSTISOCMRDATAO25 | output | TCELL9:OUT.SEC11 |
| TSTISOCMRDATAO26 | output | TCELL9:OUT.SEC10 |
| TSTISOCMRDATAO27 | output | TCELL9:OUT.SEC9 |
| TSTISOCMRDATAO28 | output | TCELL9:OUT.SEC8 |
| TSTISOCMRDATAO29 | output | TCELL10:OUT.SEC11 |
| TSTISOCMRDATAO3 | output | TCELL3:OUT.SEC8 |
| TSTISOCMRDATAO30 | output | TCELL10:OUT.SEC10 |
| TSTISOCMRDATAO31 | output | TCELL10:OUT.SEC9 |
| TSTISOCMRDATAO32 | output | TCELL10:OUT.SEC8 |
| TSTISOCMRDATAO33 | output | TCELL11:OUT.SEC11 |
| TSTISOCMRDATAO34 | output | TCELL11:OUT.SEC10 |
| TSTISOCMRDATAO35 | output | TCELL11:OUT.SEC9 |
| TSTISOCMRDATAO36 | output | TCELL11:OUT.SEC8 |
| TSTISOCMRDATAO37 | output | TCELL12:OUT.SEC11 |
| TSTISOCMRDATAO38 | output | TCELL12:OUT.SEC10 |
| TSTISOCMRDATAO39 | output | TCELL12:OUT.SEC9 |
| TSTISOCMRDATAO4 | output | TCELL3:OUT.TEST0 |
| TSTISOCMRDATAO40 | output | TCELL12:OUT.SEC8 |
| TSTISOCMRDATAO41 | output | TCELL13:OUT.SEC11 |
| TSTISOCMRDATAO42 | output | TCELL13:OUT.SEC10 |
| TSTISOCMRDATAO43 | output | TCELL13:OUT.SEC9 |
| TSTISOCMRDATAO44 | output | TCELL13:OUT.SEC8 |
| TSTISOCMRDATAO45 | output | TCELL14:OUT.SEC11 |
| TSTISOCMRDATAO46 | output | TCELL14:OUT.SEC10 |
| TSTISOCMRDATAO47 | output | TCELL14:OUT.SEC9 |
| TSTISOCMRDATAO48 | output | TCELL14:OUT.SEC8 |
| TSTISOCMRDATAO49 | output | TCELL15:OUT.SEC11 |
| TSTISOCMRDATAO5 | output | TCELL4:OUT.SEC11 |
| TSTISOCMRDATAO50 | output | TCELL15:OUT.SEC10 |
| TSTISOCMRDATAO51 | output | TCELL15:OUT.SEC9 |
| TSTISOCMRDATAO52 | output | TCELL15:OUT.SEC8 |
| TSTISOCMRDATAO53 | output | TCELL0:OUT.TEST2 |
| TSTISOCMRDATAO54 | output | TCELL0:OUT.TEST4 |
| TSTISOCMRDATAO55 | output | TCELL1:OUT.TEST2 |
| TSTISOCMRDATAO56 | output | TCELL1:OUT.TEST4 |
| TSTISOCMRDATAO57 | output | TCELL2:OUT.TEST2 |
| TSTISOCMRDATAO58 | output | TCELL2:OUT.TEST4 |
| TSTISOCMRDATAO59 | output | TCELL3:OUT.TEST2 |
| TSTISOCMRDATAO6 | output | TCELL4:OUT.SEC10 |
| TSTISOCMRDATAO60 | output | TCELL3:OUT.TEST4 |
| TSTISOCMRDATAO61 | output | TCELL4:OUT.TEST0 |
| TSTISOCMRDATAO62 | output | TCELL4:OUT.TEST2 |
| TSTISOCMRDATAO63 | output | TCELL5:OUT.TEST0 |
| TSTISOCMRDATAO7 | output | TCELL4:OUT.SEC9 |
| TSTISOCMRDATAO8 | output | TCELL4:OUT.SEC8 |
| TSTISOCMRDATAO9 | output | TCELL5:OUT.SEC11 |
| TSTISOCMRDDVALIDI0 | input | TCELL3:IMUX.G0.DATA2 |
| TSTISOCMRDDVALIDI1 | input | TCELL4:IMUX.G1.DATA2 |
| TSTISOCMRDDVALIDO0 | output | TCELL2:OUT.SEC9 |
| TSTISOCMRDDVALIDO1 | output | TCELL2:OUT.SEC8 |
| TSTISOCMREQPENDI | input | TCELL0:IMUX.G0.DATA3 |
| TSTISOCMREQPENDO | output | TCELL32:OUT.SEC10 |
| TSTISOCMXLATEVALIDI | input | TCELL0:IMUX.G3.DATA2 |
| TSTISOCMXLATEVALIDO | output | TCELL32:OUT.SEC11 |
| TSTISOPFWDI | input | TCELL25:IMUX.G1.DATA2 |
| TSTISOPFWDO | output | TCELL21:OUT.TEST4 |
| TSTJTAGENI | input | TCELL12:IMUX.G0.DATA2 |
| TSTJTAGENO | output | TCELL0:OUT.TEST0 |
| TSTOCMCOMPLETEO | output | TCELL22:OUT.TEST2 |
| TSTPLBSAMPLECYCLEI | input | TCELL6:IMUX.G1.DATA3 |
| TSTPLBSAMPLECYCLEO | output | TCELL5:OUT.TEST2 |
| TSTRDDBUSI0 | input | TCELL26:IMUX.G1.DATA2 |
| TSTRDDBUSI1 | input | TCELL27:IMUX.G0.DATA2 |
| TSTRDDBUSI10 | input | TCELL31:IMUX.G1.DATA2 |
| TSTRDDBUSI11 | input | TCELL16:IMUX.G2.DATA2 |
| TSTRDDBUSI12 | input | TCELL16:IMUX.G3.DATA2 |
| TSTRDDBUSI13 | input | TCELL17:IMUX.G2.DATA2 |
| TSTRDDBUSI14 | input | TCELL17:IMUX.G3.DATA2 |
| TSTRDDBUSI15 | input | TCELL18:IMUX.G2.DATA2 |
| TSTRDDBUSI16 | input | TCELL18:IMUX.G3.DATA2 |
| TSTRDDBUSI17 | input | TCELL19:IMUX.G2.DATA2 |
| TSTRDDBUSI18 | input | TCELL19:IMUX.G3.DATA2 |
| TSTRDDBUSI19 | input | TCELL20:IMUX.G0.DATA2 |
| TSTRDDBUSI2 | input | TCELL27:IMUX.G1.DATA2 |
| TSTRDDBUSI20 | input | TCELL20:IMUX.G1.DATA2 |
| TSTRDDBUSI21 | input | TCELL21:IMUX.G0.DATA2 |
| TSTRDDBUSI22 | input | TCELL21:IMUX.G1.DATA2 |
| TSTRDDBUSI23 | input | TCELL22:IMUX.G0.DATA2 |
| TSTRDDBUSI24 | input | TCELL22:IMUX.G1.DATA2 |
| TSTRDDBUSI25 | input | TCELL23:IMUX.G0.DATA2 |
| TSTRDDBUSI26 | input | TCELL23:IMUX.G1.DATA2 |
| TSTRDDBUSI27 | input | TCELL24:IMUX.G2.DATA2 |
| TSTRDDBUSI28 | input | TCELL24:IMUX.G3.DATA2 |
| TSTRDDBUSI29 | input | TCELL25:IMUX.G2.DATA2 |
| TSTRDDBUSI3 | input | TCELL28:IMUX.G0.DATA2 |
| TSTRDDBUSI30 | input | TCELL25:IMUX.G3.DATA2 |
| TSTRDDBUSI31 | input | TCELL26:IMUX.G2.DATA2 |
| TSTRDDBUSI4 | input | TCELL28:IMUX.G1.DATA2 |
| TSTRDDBUSI5 | input | TCELL29:IMUX.G0.DATA2 |
| TSTRDDBUSI6 | input | TCELL29:IMUX.G1.DATA2 |
| TSTRDDBUSI7 | input | TCELL30:IMUX.G0.DATA2 |
| TSTRDDBUSI8 | input | TCELL30:IMUX.G1.DATA2 |
| TSTRDDBUSI9 | input | TCELL31:IMUX.G0.DATA2 |
| TSTRDDBUSO0 | output | TCELL26:OUT.SEC8 |
| TSTRDDBUSO1 | output | TCELL26:OUT.TEST0 |
| TSTRDDBUSO10 | output | TCELL29:OUT.SEC11 |
| TSTRDDBUSO11 | output | TCELL29:OUT.SEC10 |
| TSTRDDBUSO12 | output | TCELL29:OUT.SEC9 |
| TSTRDDBUSO13 | output | TCELL29:OUT.SEC8 |
| TSTRDDBUSO14 | output | TCELL30:OUT.SEC11 |
| TSTRDDBUSO15 | output | TCELL30:OUT.SEC10 |
| TSTRDDBUSO16 | output | TCELL30:OUT.SEC9 |
| TSTRDDBUSO17 | output | TCELL30:OUT.SEC8 |
| TSTRDDBUSO18 | output | TCELL31:OUT.SEC11 |
| TSTRDDBUSO19 | output | TCELL31:OUT.SEC10 |
| TSTRDDBUSO2 | output | TCELL27:OUT.SEC10 |
| TSTRDDBUSO20 | output | TCELL31:OUT.SEC9 |
| TSTRDDBUSO21 | output | TCELL31:OUT.SEC8 |
| TSTRDDBUSO22 | output | TCELL16:OUT.TEST2 |
| TSTRDDBUSO23 | output | TCELL16:OUT.TEST4 |
| TSTRDDBUSO24 | output | TCELL17:OUT.TEST2 |
| TSTRDDBUSO25 | output | TCELL17:OUT.TEST4 |
| TSTRDDBUSO26 | output | TCELL18:OUT.TEST2 |
| TSTRDDBUSO27 | output | TCELL18:OUT.TEST4 |
| TSTRDDBUSO28 | output | TCELL19:OUT.TEST2 |
| TSTRDDBUSO29 | output | TCELL19:OUT.TEST4 |
| TSTRDDBUSO3 | output | TCELL27:OUT.SEC9 |
| TSTRDDBUSO30 | output | TCELL20:OUT.TEST2 |
| TSTRDDBUSO31 | output | TCELL20:OUT.TEST4 |
| TSTRDDBUSO4 | output | TCELL27:OUT.SEC8 |
| TSTRDDBUSO5 | output | TCELL27:OUT.TEST0 |
| TSTRDDBUSO6 | output | TCELL28:OUT.SEC10 |
| TSTRDDBUSO7 | output | TCELL28:OUT.SEC9 |
| TSTRDDBUSO8 | output | TCELL28:OUT.SEC8 |
| TSTRDDBUSO9 | output | TCELL28:OUT.TEST0 |
| TSTRESETCHIPI | input | TCELL0:IMUX.G0.DATA2 |
| TSTRESETCHIPO | output | TCELL0:OUT.SEC10 |
| TSTRESETCOREI | input | TCELL5:IMUX.G2.DATA2 |
| TSTRESETCOREO | output | TCELL0:OUT.SEC9 |
| TSTRESETSYSI | input | TCELL11:IMUX.G0.DATA2 |
| TSTRESETSYSO | output | TCELL0:OUT.SEC8 |
| TSTTIMERENI | input | TCELL13:IMUX.G0.DATA2 |
| TSTTIMERENO | output | TCELL1:OUT.SEC10 |
| TSTTRSTNEGI | input | TCELL42:IMUX.G2.DATA0 |
| TSTTRSTNEGO | output | TCELL12:OUT.TEST0 |
Bel wires
| Wire | Pins |
|---|---|
| TCELL0:IMUX.CLK1 | PPC405.PLBCLK |
| TCELL0:IMUX.TI0 | PPC405.TIEC405DETERMINISTICMULT |
| TCELL0:IMUX.TI1 | PPC405.TIEC405PVR30 |
| TCELL0:IMUX.TS0 | PPC405.TIEC405PVR31 |
| TCELL0:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS60 |
| TCELL0:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS60 |
| TCELL0:IMUX.G0.DATA2 | PPC405.TSTRESETCHIPI |
| TCELL0:IMUX.G0.DATA3 | PPC405.TSTISOCMREQPENDI |
| TCELL0:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS61 |
| TCELL0:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS61 |
| TCELL0:IMUX.G1.DATA2 | PPC405.TSTCPUCLKI |
| TCELL0:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS62 |
| TCELL0:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS62 |
| TCELL0:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI11 |
| TCELL0:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS63 |
| TCELL0:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS63 |
| TCELL0:IMUX.G3.DATA2 | PPC405.TSTISOCMXLATEVALIDI |
| TCELL0:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS60 |
| TCELL0:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS61 |
| TCELL0:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS62 |
| TCELL0:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS63 |
| TCELL0:OUT.FAN4 | PPC405.C405RSTCHIPRESETREQ |
| TCELL0:OUT.FAN5 | PPC405.C405RSTCORERESETREQ |
| TCELL0:OUT.FAN6 | PPC405.C405CPMTIMERIRQ |
| TCELL0:OUT.FAN7 | PPC405.C405CPMTIMERRESETREQ |
| TCELL0:OUT.SEC8 | PPC405.TSTRESETSYSO |
| TCELL0:OUT.SEC9 | PPC405.TSTRESETCOREO |
| TCELL0:OUT.SEC10 | PPC405.TSTRESETCHIPO |
| TCELL0:OUT.SEC11 | PPC405.C405DBGWBIAR26 |
| TCELL0:OUT.SEC12 | PPC405.C405DBGWBIAR21 |
| TCELL0:OUT.SEC13 | PPC405.C405DBGWBIAR7 |
| TCELL0:OUT.SEC14 | PPC405.C405DBGWBFULL |
| TCELL0:OUT.SEC15 | PPC405.C405DBGWBCOMPLETE |
| TCELL0:OUT.TEST0 | PPC405.TSTJTAGENO |
| TCELL0:OUT.TEST2 | PPC405.TSTISOCMRDATAO53 |
| TCELL0:OUT.TEST4 | PPC405.TSTISOCMRDATAO54 |
| TCELL1:IMUX.CE0 | PPC405.CPMC405CPUCLKEN |
| TCELL1:IMUX.TI0 | PPC405.TIEC405DISOPERANDFWD |
| TCELL1:IMUX.TI1 | PPC405.TIEC405MMUEN |
| TCELL1:IMUX.TS0 | PPC405.TIEC405PVR29 |
| TCELL1:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS56 |
| TCELL1:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS56 |
| TCELL1:IMUX.G0.DATA2 | PPC405.DBGC405DEBUGHALT |
| TCELL1:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI0 |
| TCELL1:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS57 |
| TCELL1:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS57 |
| TCELL1:IMUX.G1.DATA2 | PPC405.TSTCLKINACTI |
| TCELL1:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI1 |
| TCELL1:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS58 |
| TCELL1:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS58 |
| TCELL1:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI12 |
| TCELL1:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS59 |
| TCELL1:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS59 |
| TCELL1:IMUX.G3.DATA2 | PPC405.TSTISOCMICUREADYI |
| TCELL1:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS56 |
| TCELL1:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS57 |
| TCELL1:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS58 |
| TCELL1:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS59 |
| TCELL1:OUT.FAN4 | PPC405.C405PLBDCUREQUEST |
| TCELL1:OUT.FAN5 | PPC405.C405PLBDCUPRIORITY0 |
| TCELL1:OUT.FAN6 | PPC405.C405PLBDCUPRIORITY1 |
| TCELL1:OUT.FAN7 | PPC405.C405PLBDCUABORT |
| TCELL1:OUT.SEC8 | PPC405.TSTCPUCLKO |
| TCELL1:OUT.SEC9 | PPC405.TSTCPUCLKENO |
| TCELL1:OUT.SEC10 | PPC405.TSTTIMERENO |
| TCELL1:OUT.SEC11 | PPC405.C405DBGWBIAR27 |
| TCELL1:OUT.SEC12 | PPC405.C405DBGWBIAR22 |
| TCELL1:OUT.SEC13 | PPC405.C405DBGWBIAR8 |
| TCELL1:OUT.SEC14 | PPC405.C405DBGWBIAR0 |
| TCELL1:OUT.SEC15 | PPC405.C405PLBDCURNW |
| TCELL1:OUT.TEST0 | PPC405.TSTCLKINACTO |
| TCELL1:OUT.TEST2 | PPC405.TSTISOCMRDATAO55 |
| TCELL1:OUT.TEST4 | PPC405.TSTISOCMRDATAO56 |
| TCELL2:IMUX.CE0 | PPC405.CPMC405TIMERCLKEN |
| TCELL2:IMUX.TI0 | PPC405.TIEC405PVR26 |
| TCELL2:IMUX.TI1 | PPC405.TIEC405PVR27 |
| TCELL2:IMUX.TS0 | PPC405.TIEC405PVR28 |
| TCELL2:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS52 |
| TCELL2:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS52 |
| TCELL2:IMUX.G0.DATA2 | PPC405.DBGC405UNCONDDEBUGEVENT |
| TCELL2:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI3 |
| TCELL2:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS53 |
| TCELL2:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS53 |
| TCELL2:IMUX.G1.DATA2 | PPC405.TSTISOCMHOLDI |
| TCELL2:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI4 |
| TCELL2:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS54 |
| TCELL2:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS54 |
| TCELL2:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI13 |
| TCELL2:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS55 |
| TCELL2:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS55 |
| TCELL2:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI2 |
| TCELL2:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS52 |
| TCELL2:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS53 |
| TCELL2:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS54 |
| TCELL2:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS55 |
| TCELL2:OUT.FAN4 | PPC405.C405PLBDCUGUARDED |
| TCELL2:OUT.FAN5 | PPC405.C405PLBDCUWRITETHRU |
| TCELL2:OUT.FAN6 | PPC405.C405DBGWBIAR11 |
| TCELL2:OUT.FAN7 | PPC405.C405DBGWBIAR12 |
| TCELL2:OUT.SEC8 | PPC405.TSTISOCMRDDVALIDO1 |
| TCELL2:OUT.SEC9 | PPC405.TSTISOCMRDDVALIDO0 |
| TCELL2:OUT.SEC10 | PPC405.TSTISOCMHOLDO |
| TCELL2:OUT.SEC11 | PPC405.C405DBGWBIAR28 |
| TCELL2:OUT.SEC12 | PPC405.C405PLBICUABORT |
| TCELL2:OUT.SEC13 | PPC405.C405PLBICUPRIORITY1 |
| TCELL2:OUT.SEC14 | PPC405.C405PLBICUPRIORITY0 |
| TCELL2:OUT.SEC15 | PPC405.C405PLBICUREQUEST |
| TCELL2:OUT.TEST0 | PPC405.TSTISOCMRDATAO0 |
| TCELL2:OUT.TEST2 | PPC405.TSTISOCMRDATAO57 |
| TCELL2:OUT.TEST4 | PPC405.TSTISOCMRDATAO58 |
| TCELL3:IMUX.CLK0 | PPC405.CPMC405TIMERTICK |
| TCELL3:IMUX.CE0 | PPC405.CPMC405JTAGCLKEN |
| TCELL3:IMUX.TI0 | PPC405.TIEC405PVR23 |
| TCELL3:IMUX.TI1 | PPC405.TIEC405PVR24 |
| TCELL3:IMUX.TS0 | PPC405.TIEC405PVR25 |
| TCELL3:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS48 |
| TCELL3:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS48 |
| TCELL3:IMUX.G0.DATA2 | PPC405.TSTISOCMRDDVALIDI0 |
| TCELL3:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI7 |
| TCELL3:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS49 |
| TCELL3:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS49 |
| TCELL3:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI14 |
| TCELL3:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS50 |
| TCELL3:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS50 |
| TCELL3:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI5 |
| TCELL3:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS51 |
| TCELL3:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS51 |
| TCELL3:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI6 |
| TCELL3:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS48 |
| TCELL3:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS49 |
| TCELL3:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS50 |
| TCELL3:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS51 |
| TCELL3:OUT.FAN4 | PPC405.C405PLBDCUBE4 |
| TCELL3:OUT.FAN5 | PPC405.C405PLBDCUBE5 |
| TCELL3:OUT.FAN6 | PPC405.C405PLBDCUBE6 |
| TCELL3:OUT.FAN7 | PPC405.C405PLBDCUBE7 |
| TCELL3:OUT.SEC8 | PPC405.TSTISOCMRDATAO3 |
| TCELL3:OUT.SEC9 | PPC405.TSTISOCMRDATAO2 |
| TCELL3:OUT.SEC10 | PPC405.TSTISOCMRDATAO1 |
| TCELL3:OUT.SEC11 | PPC405.C405DBGWBIAR29 |
| TCELL3:OUT.SEC12 | PPC405.C405DBGWBIAR16 |
| TCELL3:OUT.SEC13 | PPC405.C405DBGWBIAR15 |
| TCELL3:OUT.SEC14 | PPC405.C405DBGWBIAR14 |
| TCELL3:OUT.SEC15 | PPC405.C405DBGWBIAR13 |
| TCELL3:OUT.TEST0 | PPC405.TSTISOCMRDATAO4 |
| TCELL3:OUT.TEST2 | PPC405.TSTISOCMRDATAO59 |
| TCELL3:OUT.TEST4 | PPC405.TSTISOCMRDATAO60 |
| TCELL4:IMUX.TI0 | PPC405.MCBCPUCLKEN |
| TCELL4:IMUX.TI1 | PPC405.TIEC405PVR20 |
| TCELL4:IMUX.TS0 | PPC405.TIEC405PVR21 |
| TCELL4:IMUX.TS1 | PPC405.TIEC405PVR22 |
| TCELL4:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS44 |
| TCELL4:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS44 |
| TCELL4:IMUX.G0.DATA2 | PPC405.DBGC405EXTBUSHOLDACK |
| TCELL4:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI9 |
| TCELL4:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS45 |
| TCELL4:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS45 |
| TCELL4:IMUX.G1.DATA2 | PPC405.TSTISOCMRDDVALIDI1 |
| TCELL4:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI10 |
| TCELL4:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS46 |
| TCELL4:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS46 |
| TCELL4:IMUX.G2.DATA2 | PPC405.TSTISOCMRDATAI15 |
| TCELL4:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS47 |
| TCELL4:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS47 |
| TCELL4:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI8 |
| TCELL4:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS44 |
| TCELL4:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS45 |
| TCELL4:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS46 |
| TCELL4:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS47 |
| TCELL4:OUT.FAN4 | PPC405.C405PLBDCUABUS28 |
| TCELL4:OUT.FAN5 | PPC405.C405PLBDCUABUS29 |
| TCELL4:OUT.FAN6 | PPC405.C405PLBDCUABUS30 |
| TCELL4:OUT.FAN7 | PPC405.C405PLBDCUABUS31 |
| TCELL4:OUT.SEC8 | PPC405.TSTISOCMRDATAO8 |
| TCELL4:OUT.SEC9 | PPC405.TSTISOCMRDATAO7 |
| TCELL4:OUT.SEC10 | PPC405.TSTISOCMRDATAO6 |
| TCELL4:OUT.SEC11 | PPC405.TSTISOCMRDATAO5 |
| TCELL4:OUT.SEC12 | PPC405.C405DBGWBIAR18 |
| TCELL4:OUT.SEC13 | PPC405.C405DBGWBIAR17 |
| TCELL4:OUT.SEC14 | PPC405.C405PLBICUABUS29 |
| TCELL4:OUT.SEC15 | PPC405.C405PLBICUABUS28 |
| TCELL4:OUT.TEST0 | PPC405.TSTISOCMRDATAO61 |
| TCELL4:OUT.TEST2 | PPC405.TSTISOCMRDATAO62 |
| TCELL5:IMUX.TI0 | PPC405.MCBJTAGEN |
| TCELL5:IMUX.TI1 | PPC405.TIEC405PVR18 |
| TCELL5:IMUX.TS0 | PPC405.TIEC405PVR19 |
| TCELL5:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS40 |
| TCELL5:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS40 |
| TCELL5:IMUX.G0.DATA2 | PPC405.PLBC405DCUWRDACK |
| TCELL5:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI16 |
| TCELL5:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS41 |
| TCELL5:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS41 |
| TCELL5:IMUX.G1.DATA2 | PPC405.CPMC405CORECLKINACTIVE |
| TCELL5:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI11 |
| TCELL5:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS42 |
| TCELL5:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS42 |
| TCELL5:IMUX.G2.DATA2 | PPC405.TSTRESETCOREI |
| TCELL5:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI12 |
| TCELL5:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS43 |
| TCELL5:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS43 |
| TCELL5:IMUX.G3.DATA2 | PPC405.TSTISOCMRDATAI0 |
| TCELL5:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS40 |
| TCELL5:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS41 |
| TCELL5:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS42 |
| TCELL5:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS43 |
| TCELL5:OUT.FAN4 | PPC405.C405PLBDCUABUS24 |
| TCELL5:OUT.FAN5 | PPC405.C405PLBDCUABUS25 |
| TCELL5:OUT.FAN6 | PPC405.C405PLBDCUABUS26 |
| TCELL5:OUT.FAN7 | PPC405.C405PLBDCUABUS27 |
| TCELL5:OUT.SEC8 | PPC405.TSTISOCMRDATAO12 |
| TCELL5:OUT.SEC9 | PPC405.TSTISOCMRDATAO11 |
| TCELL5:OUT.SEC10 | PPC405.TSTISOCMRDATAO10 |
| TCELL5:OUT.SEC11 | PPC405.TSTISOCMRDATAO9 |
| TCELL5:OUT.SEC12 | PPC405.C405PLBICUABUS27 |
| TCELL5:OUT.SEC13 | PPC405.C405PLBICUABUS26 |
| TCELL5:OUT.SEC14 | PPC405.C405PLBICUABUS25 |
| TCELL5:OUT.SEC15 | PPC405.C405PLBICUABUS24 |
| TCELL5:OUT.TEST0 | PPC405.TSTISOCMRDATAO63 |
| TCELL5:OUT.TEST2 | PPC405.TSTPLBSAMPLECYCLEO |
| TCELL6:IMUX.TI0 | PPC405.MCBTIMEREN |
| TCELL6:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS36 |
| TCELL6:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS36 |
| TCELL6:IMUX.G0.DATA2 | PPC405.PLBC405DCURDWDADDR1 |
| TCELL6:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI1 |
| TCELL6:IMUX.G0.DATA4 | PPC405.TSTISOCMABUSI15 |
| TCELL6:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS37 |
| TCELL6:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS37 |
| TCELL6:IMUX.G1.DATA2 | PPC405.PLBC405DCURDWDADDR2 |
| TCELL6:IMUX.G1.DATA3 | PPC405.TSTPLBSAMPLECYCLEI |
| TCELL6:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS38 |
| TCELL6:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS38 |
| TCELL6:IMUX.G2.DATA2 | PPC405.PLBC405DCURDWDADDR3 |
| TCELL6:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI13 |
| TCELL6:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS39 |
| TCELL6:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS39 |
| TCELL6:IMUX.G3.DATA2 | PPC405.PLBC405DCURDDACK |
| TCELL6:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI14 |
| TCELL6:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS36 |
| TCELL6:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS37 |
| TCELL6:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS38 |
| TCELL6:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS39 |
| TCELL6:OUT.FAN4 | PPC405.C405PLBDCUABUS20 |
| TCELL6:OUT.FAN5 | PPC405.C405PLBDCUABUS21 |
| TCELL6:OUT.FAN6 | PPC405.C405PLBDCUABUS22 |
| TCELL6:OUT.FAN7 | PPC405.C405PLBDCUABUS23 |
| TCELL6:OUT.SEC8 | PPC405.TSTISOCMRDATAO16 |
| TCELL6:OUT.SEC9 | PPC405.TSTISOCMRDATAO15 |
| TCELL6:OUT.SEC10 | PPC405.TSTISOCMRDATAO14 |
| TCELL6:OUT.SEC11 | PPC405.TSTISOCMRDATAO13 |
| TCELL6:OUT.SEC12 | PPC405.C405PLBICUABUS23 |
| TCELL6:OUT.SEC13 | PPC405.C405PLBICUABUS22 |
| TCELL6:OUT.SEC14 | PPC405.C405PLBICUABUS21 |
| TCELL6:OUT.SEC15 | PPC405.C405PLBICUABUS20 |
| TCELL7:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS32 |
| TCELL7:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS32 |
| TCELL7:IMUX.G0.DATA2 | PPC405.PLBC405DCUADDRACK |
| TCELL7:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI2 |
| TCELL7:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS33 |
| TCELL7:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS33 |
| TCELL7:IMUX.G1.DATA2 | PPC405.PLBC405DCUSSIZE1 |
| TCELL7:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI16 |
| TCELL7:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS34 |
| TCELL7:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS34 |
| TCELL7:IMUX.G2.DATA2 | PPC405.PLBC405DCUBUSY |
| TCELL7:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI17 |
| TCELL7:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS35 |
| TCELL7:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS35 |
| TCELL7:IMUX.G3.DATA2 | PPC405.PLBC405DCUERR |
| TCELL7:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI18 |
| TCELL7:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS32 |
| TCELL7:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS33 |
| TCELL7:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS34 |
| TCELL7:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS35 |
| TCELL7:OUT.FAN4 | PPC405.C405PLBDCUABUS16 |
| TCELL7:OUT.FAN5 | PPC405.C405PLBDCUABUS17 |
| TCELL7:OUT.FAN6 | PPC405.C405PLBDCUABUS18 |
| TCELL7:OUT.FAN7 | PPC405.C405PLBDCUABUS19 |
| TCELL7:OUT.SEC8 | PPC405.TSTISOCMRDATAO20 |
| TCELL7:OUT.SEC9 | PPC405.TSTISOCMRDATAO19 |
| TCELL7:OUT.SEC10 | PPC405.TSTISOCMRDATAO18 |
| TCELL7:OUT.SEC11 | PPC405.TSTISOCMRDATAO17 |
| TCELL7:OUT.SEC12 | PPC405.C405PLBICUABUS19 |
| TCELL7:OUT.SEC13 | PPC405.C405PLBICUABUS18 |
| TCELL7:OUT.SEC14 | PPC405.C405PLBICUABUS17 |
| TCELL7:OUT.SEC15 | PPC405.C405PLBICUABUS16 |
| TCELL8:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS28 |
| TCELL8:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS28 |
| TCELL8:IMUX.G0.DATA2 | PPC405.PLBC405ICUADDRACK |
| TCELL8:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI3 |
| TCELL8:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS29 |
| TCELL8:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS29 |
| TCELL8:IMUX.G1.DATA2 | PPC405.PLBC405ICUSSIZE1 |
| TCELL8:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI19 |
| TCELL8:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS30 |
| TCELL8:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS30 |
| TCELL8:IMUX.G2.DATA2 | PPC405.PLBC405ICUBUSY |
| TCELL8:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI20 |
| TCELL8:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS31 |
| TCELL8:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS31 |
| TCELL8:IMUX.G3.DATA2 | PPC405.PLBC405ICUERR |
| TCELL8:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI21 |
| TCELL8:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS28 |
| TCELL8:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS29 |
| TCELL8:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS30 |
| TCELL8:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS31 |
| TCELL8:OUT.FAN4 | PPC405.C405PLBDCUABUS12 |
| TCELL8:OUT.FAN5 | PPC405.C405PLBDCUABUS13 |
| TCELL8:OUT.FAN6 | PPC405.C405PLBDCUABUS14 |
| TCELL8:OUT.FAN7 | PPC405.C405PLBDCUABUS15 |
| TCELL8:OUT.SEC8 | PPC405.TSTISOCMRDATAO24 |
| TCELL8:OUT.SEC9 | PPC405.TSTISOCMRDATAO23 |
| TCELL8:OUT.SEC10 | PPC405.TSTISOCMRDATAO22 |
| TCELL8:OUT.SEC11 | PPC405.TSTISOCMRDATAO21 |
| TCELL8:OUT.SEC12 | PPC405.C405PLBICUABUS15 |
| TCELL8:OUT.SEC13 | PPC405.C405PLBICUABUS14 |
| TCELL8:OUT.SEC14 | PPC405.C405PLBICUABUS13 |
| TCELL8:OUT.SEC15 | PPC405.C405PLBICUABUS12 |
| TCELL9:IMUX.CLK0 | PPC405.CPMC405CLOCK |
| TCELL9:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS24 |
| TCELL9:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS24 |
| TCELL9:IMUX.G0.DATA2 | PPC405.PLBC405ICURDWDADDR1 |
| TCELL9:IMUX.G0.DATA3 | PPC405.TSTISOCMRDATAI4 |
| TCELL9:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS25 |
| TCELL9:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS25 |
| TCELL9:IMUX.G1.DATA2 | PPC405.PLBC405ICURDWDADDR2 |
| TCELL9:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI22 |
| TCELL9:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS26 |
| TCELL9:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS26 |
| TCELL9:IMUX.G2.DATA2 | PPC405.PLBC405ICURDWDADDR3 |
| TCELL9:IMUX.G2.DATA3 | PPC405.TSTISOCMABUSI23 |
| TCELL9:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS27 |
| TCELL9:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS27 |
| TCELL9:IMUX.G3.DATA2 | PPC405.PLBC405ICURDDACK |
| TCELL9:IMUX.G3.DATA3 | PPC405.TSTISOCMABUSI24 |
| TCELL9:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS24 |
| TCELL9:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS25 |
| TCELL9:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS26 |
| TCELL9:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS27 |
| TCELL9:OUT.FAN4 | PPC405.C405PLBDCUABUS8 |
| TCELL9:OUT.FAN5 | PPC405.C405PLBDCUABUS9 |
| TCELL9:OUT.FAN6 | PPC405.C405PLBDCUABUS10 |
| TCELL9:OUT.FAN7 | PPC405.C405PLBDCUABUS11 |
| TCELL9:OUT.SEC8 | PPC405.TSTISOCMRDATAO28 |
| TCELL9:OUT.SEC9 | PPC405.TSTISOCMRDATAO27 |
| TCELL9:OUT.SEC10 | PPC405.TSTISOCMRDATAO26 |
| TCELL9:OUT.SEC11 | PPC405.TSTISOCMRDATAO25 |
| TCELL9:OUT.SEC12 | PPC405.C405PLBICUABUS11 |
| TCELL9:OUT.SEC13 | PPC405.C405PLBICUABUS10 |
| TCELL9:OUT.SEC14 | PPC405.C405PLBICUABUS9 |
| TCELL9:OUT.SEC15 | PPC405.C405PLBICUABUS8 |
| TCELL10:IMUX.TI0 | PPC405.TIEC405PVR15 |
| TCELL10:IMUX.TI1 | PPC405.TIEC405PVR16 |
| TCELL10:IMUX.TS0 | PPC405.TIEC405PVR17 |
| TCELL10:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS20 |
| TCELL10:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS20 |
| TCELL10:IMUX.G0.DATA2 | PPC405.EICC405CRITINPUTIRQ |
| TCELL10:IMUX.G0.DATA3 | PPC405.TSTISOCMABUSI27 |
| TCELL10:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS21 |
| TCELL10:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS21 |
| TCELL10:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI5 |
| TCELL10:IMUX.G1.DATA3 | PPC405.TSTISOCMABUSI28 |
| TCELL10:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS22 |
| TCELL10:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS22 |
| TCELL10:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI25 |
| TCELL10:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS23 |
| TCELL10:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS23 |
| TCELL10:IMUX.G3.DATA2 | PPC405.TSTISOCMABUSI26 |
| TCELL10:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS20 |
| TCELL10:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS21 |
| TCELL10:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS22 |
| TCELL10:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS23 |
| TCELL10:OUT.FAN4 | PPC405.C405PLBDCUABUS4 |
| TCELL10:OUT.FAN5 | PPC405.C405PLBDCUABUS5 |
| TCELL10:OUT.FAN6 | PPC405.C405PLBDCUABUS6 |
| TCELL10:OUT.FAN7 | PPC405.C405PLBDCUABUS7 |
| TCELL10:OUT.SEC8 | PPC405.TSTISOCMRDATAO32 |
| TCELL10:OUT.SEC9 | PPC405.TSTISOCMRDATAO31 |
| TCELL10:OUT.SEC10 | PPC405.TSTISOCMRDATAO30 |
| TCELL10:OUT.SEC11 | PPC405.TSTISOCMRDATAO29 |
| TCELL10:OUT.SEC12 | PPC405.C405PLBICUABUS7 |
| TCELL10:OUT.SEC13 | PPC405.C405PLBICUABUS6 |
| TCELL10:OUT.SEC14 | PPC405.C405PLBICUABUS5 |
| TCELL10:OUT.SEC15 | PPC405.C405PLBICUABUS4 |
| TCELL11:IMUX.SR0 | PPC405.RSTC405RESETCHIP |
| TCELL11:IMUX.TI0 | PPC405.TIEC405PVR12 |
| TCELL11:IMUX.TI1 | PPC405.TIEC405PVR13 |
| TCELL11:IMUX.TS0 | PPC405.TIEC405PVR14 |
| TCELL11:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS16 |
| TCELL11:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS16 |
| TCELL11:IMUX.G0.DATA2 | PPC405.TSTRESETSYSI |
| TCELL11:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS17 |
| TCELL11:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS17 |
| TCELL11:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI6 |
| TCELL11:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS18 |
| TCELL11:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS18 |
| TCELL11:IMUX.G2.DATA2 | PPC405.TSTISOCMABUSI29 |
| TCELL11:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS19 |
| TCELL11:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS19 |
| TCELL11:IMUX.G3.DATA2 | PPC405.TSTISOCMABORTI |
| TCELL11:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS16 |
| TCELL11:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS17 |
| TCELL11:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS18 |
| TCELL11:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS19 |
| TCELL11:OUT.FAN4 | PPC405.C405PLBDCUABUS0 |
| TCELL11:OUT.FAN5 | PPC405.C405PLBDCUABUS1 |
| TCELL11:OUT.FAN6 | PPC405.C405PLBDCUABUS2 |
| TCELL11:OUT.FAN7 | PPC405.C405PLBDCUABUS3 |
| TCELL11:OUT.SEC8 | PPC405.TSTISOCMRDATAO36 |
| TCELL11:OUT.SEC9 | PPC405.TSTISOCMRDATAO35 |
| TCELL11:OUT.SEC10 | PPC405.TSTISOCMRDATAO34 |
| TCELL11:OUT.SEC11 | PPC405.TSTISOCMRDATAO33 |
| TCELL11:OUT.SEC12 | PPC405.C405PLBICUABUS3 |
| TCELL11:OUT.SEC13 | PPC405.C405PLBICUABUS2 |
| TCELL11:OUT.SEC14 | PPC405.C405PLBICUABUS1 |
| TCELL11:OUT.SEC15 | PPC405.C405PLBICUABUS0 |
| TCELL12:IMUX.SR0 | PPC405.RSTC405RESETCORE |
| TCELL12:IMUX.TI0 | PPC405.TIEC405PVR9 |
| TCELL12:IMUX.TI1 | PPC405.TIEC405PVR10 |
| TCELL12:IMUX.TS0 | PPC405.TIEC405PVR11 |
| TCELL12:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS12 |
| TCELL12:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS12 |
| TCELL12:IMUX.G0.DATA2 | PPC405.TSTJTAGENI |
| TCELL12:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS13 |
| TCELL12:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS13 |
| TCELL12:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI7 |
| TCELL12:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS14 |
| TCELL12:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS14 |
| TCELL12:IMUX.G2.DATA2 | PPC405.JTGC405TRSTNEG |
| TCELL12:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS15 |
| TCELL12:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS15 |
| TCELL12:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS12 |
| TCELL12:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS13 |
| TCELL12:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS14 |
| TCELL12:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS15 |
| TCELL12:OUT.FAN4 | PPC405.C405PLBDCUSIZE2 |
| TCELL12:OUT.FAN5 | PPC405.C405PLBDCUU0ATTR |
| TCELL12:OUT.FAN6 | PPC405.C405PLBDCUCACHEABLE |
| TCELL12:OUT.FAN7 | PPC405.C405DBGWBIAR19 |
| TCELL12:OUT.SEC8 | PPC405.TSTISOCMRDATAO40 |
| TCELL12:OUT.SEC9 | PPC405.TSTISOCMRDATAO39 |
| TCELL12:OUT.SEC10 | PPC405.TSTISOCMRDATAO38 |
| TCELL12:OUT.SEC11 | PPC405.TSTISOCMRDATAO37 |
| TCELL12:OUT.SEC12 | PPC405.C405PLBICUCACHEABLE |
| TCELL12:OUT.SEC13 | PPC405.C405PLBICUU0ATTR |
| TCELL12:OUT.SEC14 | PPC405.C405PLBICUSIZE3 |
| TCELL12:OUT.SEC15 | PPC405.C405PLBICUSIZE2 |
| TCELL12:OUT.TEST0 | PPC405.TSTTRSTNEGO |
| TCELL13:IMUX.SR0 | PPC405.RSTC405RESETSYS |
| TCELL13:IMUX.TI0 | PPC405.TIEC405PVR6 |
| TCELL13:IMUX.TI1 | PPC405.TIEC405PVR7 |
| TCELL13:IMUX.TS0 | PPC405.TIEC405PVR8 |
| TCELL13:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS8 |
| TCELL13:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS8 |
| TCELL13:IMUX.G0.DATA2 | PPC405.TSTTIMERENI |
| TCELL13:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS9 |
| TCELL13:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS9 |
| TCELL13:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI8 |
| TCELL13:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS10 |
| TCELL13:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS10 |
| TCELL13:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS11 |
| TCELL13:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS11 |
| TCELL13:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS8 |
| TCELL13:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS9 |
| TCELL13:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS10 |
| TCELL13:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS11 |
| TCELL13:OUT.FAN4 | PPC405.C405PLBDCUBE0 |
| TCELL13:OUT.FAN5 | PPC405.C405PLBDCUBE1 |
| TCELL13:OUT.FAN6 | PPC405.C405PLBDCUBE2 |
| TCELL13:OUT.FAN7 | PPC405.C405PLBDCUBE3 |
| TCELL13:OUT.SEC8 | PPC405.TSTISOCMRDATAO44 |
| TCELL13:OUT.SEC9 | PPC405.TSTISOCMRDATAO43 |
| TCELL13:OUT.SEC10 | PPC405.TSTISOCMRDATAO42 |
| TCELL13:OUT.SEC11 | PPC405.TSTISOCMRDATAO41 |
| TCELL13:OUT.SEC12 | PPC405.C405DBGWBIAR23 |
| TCELL13:OUT.SEC13 | PPC405.C405DBGWBIAR9 |
| TCELL13:OUT.SEC14 | PPC405.C405DBGWBIAR2 |
| TCELL13:OUT.SEC15 | PPC405.C405DBGWBIAR1 |
| TCELL14:IMUX.TI0 | PPC405.MCPPCRST |
| TCELL14:IMUX.TI1 | PPC405.TIEC405PVR3 |
| TCELL14:IMUX.TS0 | PPC405.TIEC405PVR4 |
| TCELL14:IMUX.TS1 | PPC405.TIEC405PVR5 |
| TCELL14:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS4 |
| TCELL14:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS4 |
| TCELL14:IMUX.G0.DATA2 | PPC405.TSTCPUCLKENI |
| TCELL14:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS5 |
| TCELL14:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS5 |
| TCELL14:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI9 |
| TCELL14:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS6 |
| TCELL14:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS6 |
| TCELL14:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS7 |
| TCELL14:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS7 |
| TCELL14:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS4 |
| TCELL14:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS5 |
| TCELL14:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS6 |
| TCELL14:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS7 |
| TCELL14:OUT.FAN4 | PPC405.C405RSTSYSRESETREQ |
| TCELL14:OUT.FAN5 | PPC405.C405CPMCORESLEEPREQ |
| TCELL14:OUT.FAN6 | PPC405.C405XXXMACHINECHECK |
| TCELL14:OUT.FAN7 | PPC405.C405DBGLOADDATAONAPUDBUS |
| TCELL14:OUT.SEC8 | PPC405.TSTISOCMRDATAO48 |
| TCELL14:OUT.SEC9 | PPC405.TSTISOCMRDATAO47 |
| TCELL14:OUT.SEC10 | PPC405.TSTISOCMRDATAO46 |
| TCELL14:OUT.SEC11 | PPC405.TSTISOCMRDATAO45 |
| TCELL14:OUT.SEC12 | PPC405.C405DBGWBIAR24 |
| TCELL14:OUT.SEC13 | PPC405.C405DBGWBIAR10 |
| TCELL14:OUT.SEC14 | PPC405.C405DBGWBIAR4 |
| TCELL14:OUT.SEC15 | PPC405.C405DBGWBIAR3 |
| TCELL15:IMUX.TI0 | PPC405.TIEC405PVR0 |
| TCELL15:IMUX.TI1 | PPC405.TIEC405PVR1 |
| TCELL15:IMUX.TS0 | PPC405.TIEC405PVR2 |
| TCELL15:IMUX.G0.DATA0 | PPC405.PLBC405DCURDDBUS0 |
| TCELL15:IMUX.G0.DATA1 | PPC405.PLBC405ICURDDBUS0 |
| TCELL15:IMUX.G0.DATA2 | PPC405.EICC405EXTINPUTIRQ |
| TCELL15:IMUX.G1.DATA0 | PPC405.PLBC405DCURDDBUS1 |
| TCELL15:IMUX.G1.DATA1 | PPC405.PLBC405ICURDDBUS1 |
| TCELL15:IMUX.G1.DATA2 | PPC405.TSTISOCMRDATAI10 |
| TCELL15:IMUX.G2.DATA0 | PPC405.PLBC405DCURDDBUS2 |
| TCELL15:IMUX.G2.DATA1 | PPC405.PLBC405ICURDDBUS2 |
| TCELL15:IMUX.G3.DATA0 | PPC405.PLBC405DCURDDBUS3 |
| TCELL15:IMUX.G3.DATA1 | PPC405.PLBC405ICURDDBUS3 |
| TCELL15:OUT.FAN0 | PPC405.C405PLBDCUWRDBUS0 |
| TCELL15:OUT.FAN1 | PPC405.C405PLBDCUWRDBUS1 |
| TCELL15:OUT.FAN2 | PPC405.C405PLBDCUWRDBUS2 |
| TCELL15:OUT.FAN3 | PPC405.C405PLBDCUWRDBUS3 |
| TCELL15:OUT.FAN4 | PPC405.C405CPMMSRCE |
| TCELL15:OUT.FAN5 | PPC405.C405CPMMSREE |
| TCELL15:OUT.FAN6 | PPC405.C405DBGMSRWE |
| TCELL15:OUT.FAN7 | PPC405.C405DBGSTOPACK |
| TCELL15:OUT.SEC8 | PPC405.TSTISOCMRDATAO52 |
| TCELL15:OUT.SEC9 | PPC405.TSTISOCMRDATAO51 |
| TCELL15:OUT.SEC10 | PPC405.TSTISOCMRDATAO50 |
| TCELL15:OUT.SEC11 | PPC405.TSTISOCMRDATAO49 |
| TCELL15:OUT.SEC12 | PPC405.C405DBGWBIAR25 |
| TCELL15:OUT.SEC13 | PPC405.C405DBGWBIAR20 |
| TCELL15:OUT.SEC14 | PPC405.C405DBGWBIAR6 |
| TCELL15:OUT.SEC15 | PPC405.C405DBGWBIAR5 |
| TCELL16:IMUX.G0.DATA0 | PPC405.APUC405DCDAPUOP |
| TCELL16:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT21 |
| TCELL16:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI14 |
| TCELL16:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI0 |
| TCELL16:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI8 |
| TCELL16:IMUX.G1.DATA0 | PPC405.APUC405DCDCREN |
| TCELL16:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT22 |
| TCELL16:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI15 |
| TCELL16:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI1 |
| TCELL16:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI9 |
| TCELL16:IMUX.G2.DATA0 | PPC405.APUC405DCDFORCEALGN |
| TCELL16:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN14 |
| TCELL16:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI11 |
| TCELL16:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI21 |
| TCELL16:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI3 |
| TCELL16:IMUX.G3.DATA0 | PPC405.APUC405DCDFORCEBESTEERING |
| TCELL16:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN15 |
| TCELL16:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI12 |
| TCELL16:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI22 |
| TCELL16:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI4 |
| TCELL16:OUT.FAN0 | PPC405.C405APUDCDFULL |
| TCELL16:OUT.FAN1 | PPC405.C405APUDCDHOLD |
| TCELL16:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION0 |
| TCELL16:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION1 |
| TCELL16:OUT.FAN4 | PPC405.C405APUEXELOADDBUS28 |
| TCELL16:OUT.FAN5 | PPC405.C405APUEXELOADDBUS29 |
| TCELL16:OUT.FAN6 | PPC405.C405APUEXERADATA27 |
| TCELL16:OUT.FAN7 | PPC405.C405APUEXERADATA28 |
| TCELL16:OUT.SEC8 | PPC405.TSTDCRBUSO1 |
| TCELL16:OUT.SEC9 | PPC405.TSTDCRBUSO0 |
| TCELL16:OUT.SEC10 | PPC405.TSTDCRACKO |
| TCELL16:OUT.SEC11 | PPC405.TSTDSOCMABUSO25 |
| TCELL16:OUT.SEC12 | PPC405.C405DCRDBUSOUT21 |
| TCELL16:OUT.SEC13 | PPC405.C405DCRDBUSOUT5 |
| TCELL16:OUT.SEC14 | PPC405.C405APUEXERBDATA28 |
| TCELL16:OUT.SEC15 | PPC405.C405APUEXERBDATA27 |
| TCELL16:OUT.TEST0 | PPC405.TSTDCRBUSO2 |
| TCELL16:OUT.TEST2 | PPC405.TSTRDDBUSO22 |
| TCELL16:OUT.TEST4 | PPC405.TSTRDDBUSO23 |
| TCELL17:IMUX.G0.DATA0 | PPC405.APUC405DCDFPUOP |
| TCELL17:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT23 |
| TCELL17:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI16 |
| TCELL17:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI2 |
| TCELL17:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI10 |
| TCELL17:IMUX.G1.DATA0 | PPC405.APUC405DCDGPRWRITE |
| TCELL17:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT24 |
| TCELL17:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI17 |
| TCELL17:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI3 |
| TCELL17:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI11 |
| TCELL17:IMUX.G2.DATA0 | PPC405.APUC405DCDLDSTBYTE |
| TCELL17:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN16 |
| TCELL17:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI13 |
| TCELL17:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI23 |
| TCELL17:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI5 |
| TCELL17:IMUX.G3.DATA0 | PPC405.APUC405DCDLDSTDW |
| TCELL17:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN17 |
| TCELL17:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI14 |
| TCELL17:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI24 |
| TCELL17:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI6 |
| TCELL17:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION2 |
| TCELL17:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION3 |
| TCELL17:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION4 |
| TCELL17:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION5 |
| TCELL17:OUT.FAN4 | PPC405.C405APUEXELOADDBUS30 |
| TCELL17:OUT.FAN5 | PPC405.C405APUEXELOADDBUS31 |
| TCELL17:OUT.FAN6 | PPC405.C405APUEXERADATA29 |
| TCELL17:OUT.FAN7 | PPC405.C405APUEXERADATA30 |
| TCELL17:OUT.SEC8 | PPC405.TSTDCRBUSO5 |
| TCELL17:OUT.SEC9 | PPC405.TSTDCRBUSO4 |
| TCELL17:OUT.SEC10 | PPC405.TSTDCRBUSO3 |
| TCELL17:OUT.SEC11 | PPC405.TSTDSOCMABUSO26 |
| TCELL17:OUT.SEC12 | PPC405.C405DCRDBUSOUT22 |
| TCELL17:OUT.SEC13 | PPC405.C405DCRDBUSOUT6 |
| TCELL17:OUT.SEC14 | PPC405.C405APUEXERBDATA30 |
| TCELL17:OUT.SEC15 | PPC405.C405APUEXERBDATA29 |
| TCELL17:OUT.TEST0 | PPC405.TSTDCRBUSO6 |
| TCELL17:OUT.TEST2 | PPC405.TSTRDDBUSO24 |
| TCELL17:OUT.TEST4 | PPC405.TSTRDDBUSO25 |
| TCELL18:IMUX.G0.DATA0 | PPC405.APUC405DCDLDSTHW |
| TCELL18:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT25 |
| TCELL18:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI18 |
| TCELL18:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI4 |
| TCELL18:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI12 |
| TCELL18:IMUX.G1.DATA0 | PPC405.APUC405DCDLDSTQW |
| TCELL18:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT26 |
| TCELL18:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI19 |
| TCELL18:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI5 |
| TCELL18:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI13 |
| TCELL18:IMUX.G2.DATA0 | PPC405.APUC405DCDLDSTWD |
| TCELL18:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN18 |
| TCELL18:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI15 |
| TCELL18:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI25 |
| TCELL18:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI7 |
| TCELL18:IMUX.G3.DATA0 | PPC405.APUC405DCDLOAD |
| TCELL18:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN19 |
| TCELL18:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI16 |
| TCELL18:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI26 |
| TCELL18:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI8 |
| TCELL18:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION6 |
| TCELL18:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION7 |
| TCELL18:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION8 |
| TCELL18:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION9 |
| TCELL18:OUT.FAN4 | PPC405.C405APUEXELOADDVALID |
| TCELL18:OUT.FAN5 | PPC405.C405APUEXERADATA0 |
| TCELL18:OUT.FAN6 | PPC405.C405APUEXERADATA31 |
| TCELL18:OUT.FAN7 | PPC405.C405APUEXERBDATA0 |
| TCELL18:OUT.SEC8 | PPC405.TSTDCRBUSO9 |
| TCELL18:OUT.SEC9 | PPC405.TSTDCRBUSO8 |
| TCELL18:OUT.SEC10 | PPC405.TSTDCRBUSO7 |
| TCELL18:OUT.SEC11 | PPC405.TSTDSOCMABUSO27 |
| TCELL18:OUT.SEC12 | PPC405.C405DCRDBUSOUT23 |
| TCELL18:OUT.SEC13 | PPC405.C405DCRDBUSOUT7 |
| TCELL18:OUT.SEC14 | PPC405.C405APUEXEWDCNT0 |
| TCELL18:OUT.SEC15 | PPC405.C405APUEXERBDATA31 |
| TCELL18:OUT.TEST0 | PPC405.TSTDCRBUSO10 |
| TCELL18:OUT.TEST2 | PPC405.TSTRDDBUSO26 |
| TCELL18:OUT.TEST4 | PPC405.TSTRDDBUSO27 |
| TCELL19:IMUX.G0.DATA0 | PPC405.APUC405DCDPRIVOP |
| TCELL19:IMUX.G0.DATA1 | PPC405.APUC405EXERESULT27 |
| TCELL19:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI20 |
| TCELL19:IMUX.G0.DATA3 | PPC405.TSTC405DCRABUSI6 |
| TCELL19:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI14 |
| TCELL19:IMUX.G1.DATA0 | PPC405.APUC405DCDRAEN |
| TCELL19:IMUX.G1.DATA1 | PPC405.APUC405EXERESULT28 |
| TCELL19:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI21 |
| TCELL19:IMUX.G1.DATA3 | PPC405.TSTC405DCRABUSI7 |
| TCELL19:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI15 |
| TCELL19:IMUX.G2.DATA0 | PPC405.APUC405DCDRBEN |
| TCELL19:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN20 |
| TCELL19:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI17 |
| TCELL19:IMUX.G2.DATA3 | PPC405.TSTC405DCRDBUSOUTI27 |
| TCELL19:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI9 |
| TCELL19:IMUX.G3.DATA0 | PPC405.APUC405DCDSTORE |
| TCELL19:IMUX.G3.DATA1 | PPC405.DCRC405DBUSIN21 |
| TCELL19:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI18 |
| TCELL19:IMUX.G3.DATA3 | PPC405.TSTC405DCRDBUSOUTI28 |
| TCELL19:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI10 |
| TCELL19:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION10 |
| TCELL19:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION11 |
| TCELL19:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION12 |
| TCELL19:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION13 |
| TCELL19:OUT.FAN4 | PPC405.C405APUEXERADATA1 |
| TCELL19:OUT.FAN5 | PPC405.C405APUEXERADATA2 |
| TCELL19:OUT.FAN6 | PPC405.C405APUEXERBDATA1 |
| TCELL19:OUT.FAN7 | PPC405.C405APUEXERBDATA2 |
| TCELL19:OUT.SEC8 | PPC405.TSTDCRBUSO13 |
| TCELL19:OUT.SEC9 | PPC405.TSTDCRBUSO12 |
| TCELL19:OUT.SEC10 | PPC405.TSTDCRBUSO11 |
| TCELL19:OUT.SEC11 | PPC405.TSTDSOCMABUSO28 |
| TCELL19:OUT.SEC12 | PPC405.C405DCRDBUSOUT24 |
| TCELL19:OUT.SEC13 | PPC405.C405DCRDBUSOUT8 |
| TCELL19:OUT.SEC14 | PPC405.C405APUMSRFE0 |
| TCELL19:OUT.SEC15 | PPC405.C405APUEXEWDCNT1 |
| TCELL19:OUT.TEST0 | PPC405.TSTDCRBUSO14 |
| TCELL19:OUT.TEST2 | PPC405.TSTRDDBUSO28 |
| TCELL19:OUT.TEST4 | PPC405.TSTRDDBUSO29 |
| TCELL20:IMUX.TI0 | PPC405.TIEC405APUDIVEN |
| TCELL20:IMUX.TI1 | PPC405.TIEC405APUPRESENT |
| TCELL20:IMUX.G0.DATA0 | PPC405.APUC405DCDTRAPBE |
| TCELL20:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN22 |
| TCELL20:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI19 |
| TCELL20:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI29 |
| TCELL20:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI11 |
| TCELL20:IMUX.G1.DATA0 | PPC405.APUC405DCDTRAPLE |
| TCELL20:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN23 |
| TCELL20:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI20 |
| TCELL20:IMUX.G1.DATA3 | PPC405.TSTC405DCRDBUSOUTI30 |
| TCELL20:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI12 |
| TCELL20:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT29 |
| TCELL20:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI22 |
| TCELL20:IMUX.G2.DATA2 | PPC405.TSTC405DCRABUSI8 |
| TCELL20:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI16 |
| TCELL20:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT30 |
| TCELL20:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI23 |
| TCELL20:IMUX.G3.DATA2 | PPC405.TSTC405DCRABUSI9 |
| TCELL20:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI17 |
| TCELL20:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION14 |
| TCELL20:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION15 |
| TCELL20:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION16 |
| TCELL20:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION17 |
| TCELL20:OUT.FAN4 | PPC405.C405APUEXERADATA3 |
| TCELL20:OUT.FAN5 | PPC405.C405APUEXERADATA4 |
| TCELL20:OUT.FAN6 | PPC405.C405APUEXERBDATA3 |
| TCELL20:OUT.FAN7 | PPC405.C405APUEXERBDATA4 |
| TCELL20:OUT.SEC8 | PPC405.TSTDCRBUSO17 |
| TCELL20:OUT.SEC9 | PPC405.TSTDCRBUSO16 |
| TCELL20:OUT.SEC10 | PPC405.TSTDCRBUSO15 |
| TCELL20:OUT.SEC11 | PPC405.TSTDSOCMABUSO29 |
| TCELL20:OUT.SEC12 | PPC405.C405DCRDBUSOUT25 |
| TCELL20:OUT.SEC13 | PPC405.C405DCRDBUSOUT9 |
| TCELL20:OUT.SEC14 | PPC405.C405APUWBBYTEEN0 |
| TCELL20:OUT.SEC15 | PPC405.C405APUMSRFE1 |
| TCELL20:OUT.TEST0 | PPC405.TSTDCRBUSO18 |
| TCELL20:OUT.TEST2 | PPC405.TSTRDDBUSO30 |
| TCELL20:OUT.TEST4 | PPC405.TSTRDDBUSO31 |
| TCELL21:IMUX.TI0 | PPC405.TIEUTLBTAP1 |
| TCELL21:IMUX.TI1 | PPC405.TIEUTLBTAP2 |
| TCELL21:IMUX.G0.DATA0 | PPC405.APUC405DCDUPDATE |
| TCELL21:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN24 |
| TCELL21:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI21 |
| TCELL21:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI31 |
| TCELL21:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI13 |
| TCELL21:IMUX.G1.DATA0 | PPC405.APUC405DCDVALIDOP |
| TCELL21:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN25 |
| TCELL21:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI22 |
| TCELL21:IMUX.G1.DATA3 | PPC405.TSTC405DCRREADI |
| TCELL21:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI14 |
| TCELL21:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT31 |
| TCELL21:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI24 |
| TCELL21:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI0 |
| TCELL21:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI18 |
| TCELL21:IMUX.G3.DATA0 | PPC405.APUC405EXEXERCA |
| TCELL21:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI25 |
| TCELL21:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI1 |
| TCELL21:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI19 |
| TCELL21:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION18 |
| TCELL21:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION19 |
| TCELL21:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION20 |
| TCELL21:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION21 |
| TCELL21:OUT.FAN4 | PPC405.C405APUEXERADATA5 |
| TCELL21:OUT.FAN5 | PPC405.C405APUEXERADATA6 |
| TCELL21:OUT.FAN6 | PPC405.C405APUEXERBDATA5 |
| TCELL21:OUT.FAN7 | PPC405.C405APUEXERBDATA6 |
| TCELL21:OUT.SEC8 | PPC405.TSTDCRBUSO21 |
| TCELL21:OUT.SEC9 | PPC405.TSTDCRBUSO20 |
| TCELL21:OUT.SEC10 | PPC405.TSTDCRBUSO19 |
| TCELL21:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO0 |
| TCELL21:OUT.SEC12 | PPC405.C405DCRDBUSOUT26 |
| TCELL21:OUT.SEC13 | PPC405.C405DCRDBUSOUT10 |
| TCELL21:OUT.SEC14 | PPC405.C405APUWBBYTEEN2 |
| TCELL21:OUT.SEC15 | PPC405.C405APUWBBYTEEN1 |
| TCELL21:OUT.TEST0 | PPC405.TSTDCRBUSO22 |
| TCELL21:OUT.TEST2 | PPC405.TSTDSOCMHOLDO |
| TCELL21:OUT.TEST4 | PPC405.TSTISOPFWDO |
| TCELL22:IMUX.TI0 | PPC405.TIERAMTAP1 |
| TCELL22:IMUX.TI1 | PPC405.TIERAMTAP2 |
| TCELL22:IMUX.G0.DATA0 | PPC405.APUC405DCDXERCAEN |
| TCELL22:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN26 |
| TCELL22:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI23 |
| TCELL22:IMUX.G0.DATA3 | PPC405.TSTC405DCRWRITEI |
| TCELL22:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI15 |
| TCELL22:IMUX.G1.DATA0 | PPC405.APUC405DCDXEROVEN |
| TCELL22:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN27 |
| TCELL22:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI24 |
| TCELL22:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI0 |
| TCELL22:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI16 |
| TCELL22:IMUX.G2.DATA0 | PPC405.APUC405EXEXEROV |
| TCELL22:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI26 |
| TCELL22:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI2 |
| TCELL22:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI20 |
| TCELL22:IMUX.G3.DATA0 | PPC405.APUC405FPUEXCEPTION |
| TCELL22:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI27 |
| TCELL22:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI3 |
| TCELL22:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI21 |
| TCELL22:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION22 |
| TCELL22:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION23 |
| TCELL22:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION24 |
| TCELL22:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION25 |
| TCELL22:OUT.FAN4 | PPC405.C405APUEXERADATA7 |
| TCELL22:OUT.FAN5 | PPC405.C405APUEXERADATA8 |
| TCELL22:OUT.FAN6 | PPC405.C405APUEXERBDATA7 |
| TCELL22:OUT.FAN7 | PPC405.C405APUEXERBDATA8 |
| TCELL22:OUT.SEC8 | PPC405.TSTDCRBUSO25 |
| TCELL22:OUT.SEC9 | PPC405.TSTDCRBUSO24 |
| TCELL22:OUT.SEC10 | PPC405.TSTDCRBUSO23 |
| TCELL22:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO1 |
| TCELL22:OUT.SEC12 | PPC405.C405DCRDBUSOUT27 |
| TCELL22:OUT.SEC13 | PPC405.C405DCRDBUSOUT11 |
| TCELL22:OUT.SEC14 | PPC405.C405APUWBENDIAN |
| TCELL22:OUT.SEC15 | PPC405.C405APUWBBYTEEN3 |
| TCELL22:OUT.TEST0 | PPC405.TSTDCRBUSO26 |
| TCELL22:OUT.TEST2 | PPC405.TSTOCMCOMPLETEO |
| TCELL23:IMUX.TI0 | PPC405.TIETAGTAP1 |
| TCELL23:IMUX.TI1 | PPC405.TIETAGTAP2 |
| TCELL23:IMUX.G0.DATA0 | PPC405.APUC405EXCEPTION |
| TCELL23:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN28 |
| TCELL23:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI25 |
| TCELL23:IMUX.G0.DATA3 | PPC405.TSTDSOCMDBUSI1 |
| TCELL23:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI17 |
| TCELL23:IMUX.G1.DATA0 | PPC405.APUC405EXEBLOCKINGMCO |
| TCELL23:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN29 |
| TCELL23:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI26 |
| TCELL23:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI2 |
| TCELL23:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI18 |
| TCELL23:IMUX.G2.DATA0 | PPC405.APUC405LWBLDDEPEND |
| TCELL23:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI28 |
| TCELL23:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI4 |
| TCELL23:IMUX.G2.DATA3 | PPC405.TSTDSOCMABUSI22 |
| TCELL23:IMUX.G3.DATA0 | PPC405.APUC405SLEEPREQ |
| TCELL23:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI29 |
| TCELL23:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI5 |
| TCELL23:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI23 |
| TCELL23:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION26 |
| TCELL23:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION27 |
| TCELL23:OUT.FAN2 | PPC405.C405APUDCDINSTRUCTION28 |
| TCELL23:OUT.FAN3 | PPC405.C405APUDCDINSTRUCTION29 |
| TCELL23:OUT.FAN4 | PPC405.C405APUEXERADATA9 |
| TCELL23:OUT.FAN5 | PPC405.C405APUEXERADATA10 |
| TCELL23:OUT.FAN6 | PPC405.C405APUEXERBDATA9 |
| TCELL23:OUT.FAN7 | PPC405.C405APUEXERBDATA10 |
| TCELL23:OUT.SEC8 | PPC405.TSTDCRBUSO29 |
| TCELL23:OUT.SEC9 | PPC405.TSTDCRBUSO28 |
| TCELL23:OUT.SEC10 | PPC405.TSTDCRBUSO27 |
| TCELL23:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO2 |
| TCELL23:OUT.SEC12 | PPC405.C405DCRDBUSOUT28 |
| TCELL23:OUT.SEC13 | PPC405.C405DCRDBUSOUT12 |
| TCELL23:OUT.SEC14 | PPC405.C405APUWBHOLD |
| TCELL23:OUT.SEC15 | PPC405.C405APUWBFLUSH |
| TCELL23:OUT.TEST0 | PPC405.TSTDCRBUSO30 |
| TCELL24:IMUX.TI0 | PPC405.TESTSELI |
| TCELL24:IMUX.G0.DATA0 | PPC405.APUC405EXEBUSY |
| TCELL24:IMUX.G0.DATA1 | PPC405.DCRC405ACK |
| TCELL24:IMUX.G0.DATA2 | PPC405.TSTDCRBUSI30 |
| TCELL24:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI6 |
| TCELL24:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI25 |
| TCELL24:IMUX.G1.DATA0 | PPC405.APUC405EXECR0 |
| TCELL24:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN30 |
| TCELL24:IMUX.G1.DATA2 | PPC405.TSTDCRBUSI31 |
| TCELL24:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI3 |
| TCELL24:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI19 |
| TCELL24:IMUX.G2.DATA0 | PPC405.APUC405EXECR1 |
| TCELL24:IMUX.G2.DATA1 | PPC405.DCRC405DBUSIN31 |
| TCELL24:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI27 |
| TCELL24:IMUX.G2.DATA3 | PPC405.TSTDSOCMDBUSI4 |
| TCELL24:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI20 |
| TCELL24:IMUX.G3.DATA0 | PPC405.APUC405WBLDDEPEND |
| TCELL24:IMUX.G3.DATA1 | PPC405.TSTDCRACKI |
| TCELL24:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI28 |
| TCELL24:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI24 |
| TCELL24:OUT.FAN0 | PPC405.C405APUDCDINSTRUCTION30 |
| TCELL24:OUT.FAN1 | PPC405.C405APUDCDINSTRUCTION31 |
| TCELL24:OUT.FAN2 | PPC405.C405APUEXEFLUSH |
| TCELL24:OUT.FAN3 | PPC405.C405APUEXEHOLD |
| TCELL24:OUT.FAN4 | PPC405.C405APUEXERADATA11 |
| TCELL24:OUT.FAN5 | PPC405.C405APUEXERADATA12 |
| TCELL24:OUT.FAN6 | PPC405.C405APUEXERBDATA11 |
| TCELL24:OUT.FAN7 | PPC405.C405APUEXERBDATA12 |
| TCELL24:OUT.SEC8 | PPC405.TSTDSOCMDBUSO1 |
| TCELL24:OUT.SEC9 | PPC405.TSTDSOCMDBUSO0 |
| TCELL24:OUT.SEC10 | PPC405.TSTDCRBUSO31 |
| TCELL24:OUT.SEC11 | PPC405.TSTDSOCMBYTEENO3 |
| TCELL24:OUT.SEC12 | PPC405.C405DCRDBUSOUT29 |
| TCELL24:OUT.SEC13 | PPC405.C405DCRDBUSOUT13 |
| TCELL24:OUT.SEC14 | PPC405.C405DCRABUS0 |
| TCELL24:OUT.SEC15 | PPC405.C405APUXERCA |
| TCELL24:OUT.TEST0 | PPC405.TSTDSOCMDBUSO2 |
| TCELL25:IMUX.G0.DATA0 | PPC405.APUC405EXECR2 |
| TCELL25:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN0 |
| TCELL25:IMUX.G0.DATA2 | PPC405.TSTDSOCMCOMPLETEI |
| TCELL25:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI7 |
| TCELL25:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI26 |
| TCELL25:IMUX.G1.DATA0 | PPC405.APUC405EXECR3 |
| TCELL25:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN1 |
| TCELL25:IMUX.G1.DATA2 | PPC405.TSTISOPFWDI |
| TCELL25:IMUX.G1.DATA3 | PPC405.TSTC405DCRDBUSOUTI8 |
| TCELL25:IMUX.G1.DATA4 | PPC405.TSTDSOCMABUSI27 |
| TCELL25:IMUX.G2.DATA0 | PPC405.APUC405EXECRFIELD0 |
| TCELL25:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI0 |
| TCELL25:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI29 |
| TCELL25:IMUX.G2.DATA3 | PPC405.TSTDSOCMDBUSI5 |
| TCELL25:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI21 |
| TCELL25:IMUX.G3.DATA0 | PPC405.APUC405EXECRFIELD1 |
| TCELL25:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI1 |
| TCELL25:IMUX.G3.DATA2 | PPC405.TSTRDDBUSI30 |
| TCELL25:IMUX.G3.DATA3 | PPC405.TSTDSOCMDBUSI6 |
| TCELL25:IMUX.G3.DATA4 | PPC405.TSTDSOCMWRDBUSI22 |
| TCELL25:OUT.FAN0 | PPC405.C405APUEXELOADDBUS0 |
| TCELL25:OUT.FAN1 | PPC405.C405APUEXELOADDBUS1 |
| TCELL25:OUT.FAN2 | PPC405.C405APUEXELOADDBUS2 |
| TCELL25:OUT.FAN3 | PPC405.C405APUEXELOADDBUS3 |
| TCELL25:OUT.FAN4 | PPC405.C405APUEXERADATA13 |
| TCELL25:OUT.FAN5 | PPC405.C405APUEXERADATA14 |
| TCELL25:OUT.FAN6 | PPC405.C405APUEXERBDATA13 |
| TCELL25:OUT.FAN7 | PPC405.C405APUEXERBDATA14 |
| TCELL25:OUT.SEC8 | PPC405.TSTDSOCMDBUSO5 |
| TCELL25:OUT.SEC9 | PPC405.TSTDSOCMDBUSO4 |
| TCELL25:OUT.SEC10 | PPC405.TSTDSOCMDBUSO3 |
| TCELL25:OUT.SEC11 | PPC405.TSTDSOCMLOADREQO |
| TCELL25:OUT.SEC12 | PPC405.C405DCRDBUSOUT30 |
| TCELL25:OUT.SEC13 | PPC405.C405DCRDBUSOUT14 |
| TCELL25:OUT.SEC14 | PPC405.C405DCRABUS2 |
| TCELL25:OUT.SEC15 | PPC405.C405DCRABUS1 |
| TCELL25:OUT.TEST0 | PPC405.TSTDSOCMDBUSO6 |
| TCELL26:IMUX.G0.DATA0 | PPC405.APUC405EXECRFIELD2 |
| TCELL26:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN2 |
| TCELL26:IMUX.G0.DATA2 | PPC405.TSTDSOCMHOLDI |
| TCELL26:IMUX.G0.DATA3 | PPC405.TSTC405DCRDBUSOUTI10 |
| TCELL26:IMUX.G0.DATA4 | PPC405.TSTDSOCMABUSI29 |
| TCELL26:IMUX.G1.DATA0 | PPC405.APUC405EXELDDEPEND |
| TCELL26:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN3 |
| TCELL26:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI0 |
| TCELL26:IMUX.G1.DATA3 | PPC405.TSTDSOCMDBUSI7 |
| TCELL26:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI23 |
| TCELL26:IMUX.G2.DATA0 | PPC405.APUC405EXENONBLOCKINGMCO |
| TCELL26:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI2 |
| TCELL26:IMUX.G2.DATA2 | PPC405.TSTRDDBUSI31 |
| TCELL26:IMUX.G2.DATA3 | PPC405.TSTDSOCMDCRACKI |
| TCELL26:IMUX.G2.DATA4 | PPC405.TSTDSOCMWRDBUSI24 |
| TCELL26:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT0 |
| TCELL26:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI3 |
| TCELL26:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI9 |
| TCELL26:IMUX.G3.DATA3 | PPC405.TSTDSOCMABUSI28 |
| TCELL26:OUT.FAN0 | PPC405.C405APUEXELOADDBUS4 |
| TCELL26:OUT.FAN1 | PPC405.C405APUEXELOADDBUS5 |
| TCELL26:OUT.FAN2 | PPC405.C405APUEXELOADDBUS6 |
| TCELL26:OUT.FAN3 | PPC405.C405APUEXELOADDBUS7 |
| TCELL26:OUT.FAN4 | PPC405.C405APUEXERADATA15 |
| TCELL26:OUT.FAN5 | PPC405.C405APUEXERADATA16 |
| TCELL26:OUT.FAN6 | PPC405.C405APUEXERBDATA15 |
| TCELL26:OUT.FAN7 | PPC405.C405APUEXERBDATA16 |
| TCELL26:OUT.SEC8 | PPC405.TSTRDDBUSO0 |
| TCELL26:OUT.SEC9 | PPC405.TSTDSOCMDCRACKO |
| TCELL26:OUT.SEC10 | PPC405.TSTDSOCMDBUSO7 |
| TCELL26:OUT.SEC11 | PPC405.TSTDSOCMSTOREREQO |
| TCELL26:OUT.SEC12 | PPC405.C405DCRDBUSOUT31 |
| TCELL26:OUT.SEC13 | PPC405.C405DCRDBUSOUT15 |
| TCELL26:OUT.SEC14 | PPC405.C405DCRABUS4 |
| TCELL26:OUT.SEC15 | PPC405.C405DCRABUS3 |
| TCELL26:OUT.TEST0 | PPC405.TSTRDDBUSO1 |
| TCELL27:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT1 |
| TCELL27:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN4 |
| TCELL27:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI1 |
| TCELL27:IMUX.G0.DATA3 | PPC405.TSTDSOCMABORTOPI |
| TCELL27:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI25 |
| TCELL27:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT2 |
| TCELL27:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN5 |
| TCELL27:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI2 |
| TCELL27:IMUX.G1.DATA3 | PPC405.TSTDSOCMABORTREQI |
| TCELL27:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI26 |
| TCELL27:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT3 |
| TCELL27:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI4 |
| TCELL27:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI11 |
| TCELL27:IMUX.G2.DATA3 | PPC405.TSTDSOCMBYTEENI0 |
| TCELL27:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT4 |
| TCELL27:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI5 |
| TCELL27:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI12 |
| TCELL27:IMUX.G3.DATA3 | PPC405.TSTDSOCMBYTEENI1 |
| TCELL27:OUT.FAN0 | PPC405.C405APUEXELOADDBUS8 |
| TCELL27:OUT.FAN1 | PPC405.C405APUEXELOADDBUS9 |
| TCELL27:OUT.FAN2 | PPC405.C405APUEXELOADDBUS10 |
| TCELL27:OUT.FAN3 | PPC405.C405APUEXELOADDBUS11 |
| TCELL27:OUT.FAN4 | PPC405.C405APUEXERADATA17 |
| TCELL27:OUT.FAN5 | PPC405.C405APUEXERADATA18 |
| TCELL27:OUT.FAN6 | PPC405.C405APUEXERBDATA17 |
| TCELL27:OUT.FAN7 | PPC405.C405APUEXERBDATA18 |
| TCELL27:OUT.SEC8 | PPC405.TSTRDDBUSO4 |
| TCELL27:OUT.SEC9 | PPC405.TSTRDDBUSO3 |
| TCELL27:OUT.SEC10 | PPC405.TSTRDDBUSO2 |
| TCELL27:OUT.SEC11 | PPC405.TSTDSOCMWAITO |
| TCELL27:OUT.SEC12 | PPC405.C405DCRREAD |
| TCELL27:OUT.SEC13 | PPC405.C405DCRDBUSOUT16 |
| TCELL27:OUT.SEC14 | PPC405.C405DCRABUS6 |
| TCELL27:OUT.SEC15 | PPC405.C405DCRABUS5 |
| TCELL27:OUT.TEST0 | PPC405.TSTRDDBUSO5 |
| TCELL28:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT5 |
| TCELL28:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN6 |
| TCELL28:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI3 |
| TCELL28:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI0 |
| TCELL28:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI27 |
| TCELL28:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT6 |
| TCELL28:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN7 |
| TCELL28:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI4 |
| TCELL28:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI1 |
| TCELL28:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI28 |
| TCELL28:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT7 |
| TCELL28:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI6 |
| TCELL28:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI13 |
| TCELL28:IMUX.G2.DATA3 | PPC405.TSTDSOCMBYTEENI2 |
| TCELL28:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT8 |
| TCELL28:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI7 |
| TCELL28:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI14 |
| TCELL28:IMUX.G3.DATA3 | PPC405.TSTDSOCMBYTEENI3 |
| TCELL28:OUT.FAN0 | PPC405.C405APUEXELOADDBUS12 |
| TCELL28:OUT.FAN1 | PPC405.C405APUEXELOADDBUS13 |
| TCELL28:OUT.FAN2 | PPC405.C405APUEXELOADDBUS14 |
| TCELL28:OUT.FAN3 | PPC405.C405APUEXELOADDBUS15 |
| TCELL28:OUT.FAN4 | PPC405.C405APUEXERADATA19 |
| TCELL28:OUT.FAN5 | PPC405.C405APUEXERADATA20 |
| TCELL28:OUT.FAN6 | PPC405.C405APUEXERBDATA19 |
| TCELL28:OUT.FAN7 | PPC405.C405APUEXERBDATA20 |
| TCELL28:OUT.SEC8 | PPC405.TSTRDDBUSO8 |
| TCELL28:OUT.SEC9 | PPC405.TSTRDDBUSO7 |
| TCELL28:OUT.SEC10 | PPC405.TSTRDDBUSO6 |
| TCELL28:OUT.SEC11 | PPC405.TSTDSOCMXLATEVALIDO |
| TCELL28:OUT.SEC12 | PPC405.C405DCRWRITE |
| TCELL28:OUT.SEC13 | PPC405.C405DCRDBUSOUT17 |
| TCELL28:OUT.SEC14 | PPC405.C405DCRABUS8 |
| TCELL28:OUT.SEC15 | PPC405.C405DCRABUS7 |
| TCELL28:OUT.TEST0 | PPC405.TSTRDDBUSO9 |
| TCELL29:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT9 |
| TCELL29:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN8 |
| TCELL29:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI5 |
| TCELL29:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI2 |
| TCELL29:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI29 |
| TCELL29:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT10 |
| TCELL29:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN9 |
| TCELL29:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI6 |
| TCELL29:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI3 |
| TCELL29:IMUX.G1.DATA4 | PPC405.TSTDSOCMWRDBUSI30 |
| TCELL29:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT11 |
| TCELL29:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI8 |
| TCELL29:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI15 |
| TCELL29:IMUX.G2.DATA3 | PPC405.TSTDSOCMLOADREQI |
| TCELL29:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT12 |
| TCELL29:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI9 |
| TCELL29:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI16 |
| TCELL29:IMUX.G3.DATA3 | PPC405.TSTDSOCMSTOREREQI |
| TCELL29:OUT.FAN0 | PPC405.C405APUEXELOADDBUS16 |
| TCELL29:OUT.FAN1 | PPC405.C405APUEXELOADDBUS17 |
| TCELL29:OUT.FAN2 | PPC405.C405APUEXELOADDBUS18 |
| TCELL29:OUT.FAN3 | PPC405.C405APUEXELOADDBUS19 |
| TCELL29:OUT.FAN4 | PPC405.C405APUEXERADATA21 |
| TCELL29:OUT.FAN5 | PPC405.C405APUEXERADATA22 |
| TCELL29:OUT.FAN6 | PPC405.C405APUEXERBDATA21 |
| TCELL29:OUT.FAN7 | PPC405.C405APUEXERBDATA22 |
| TCELL29:OUT.SEC8 | PPC405.TSTRDDBUSO13 |
| TCELL29:OUT.SEC9 | PPC405.TSTRDDBUSO12 |
| TCELL29:OUT.SEC10 | PPC405.TSTRDDBUSO11 |
| TCELL29:OUT.SEC11 | PPC405.TSTRDDBUSO10 |
| TCELL29:OUT.SEC12 | PPC405.TSTDSOCMABORTOPO |
| TCELL29:OUT.SEC13 | PPC405.C405DCRDBUSOUT18 |
| TCELL29:OUT.SEC14 | PPC405.C405DCRDBUSOUT0 |
| TCELL29:OUT.SEC15 | PPC405.C405DCRABUS9 |
| TCELL30:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT13 |
| TCELL30:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN10 |
| TCELL30:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI7 |
| TCELL30:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI4 |
| TCELL30:IMUX.G0.DATA4 | PPC405.TSTDSOCMWRDBUSI31 |
| TCELL30:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT14 |
| TCELL30:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN11 |
| TCELL30:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI8 |
| TCELL30:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI5 |
| TCELL30:IMUX.G1.DATA4 | PPC405.TSTDSOCMXLATEVALIDI |
| TCELL30:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT15 |
| TCELL30:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI10 |
| TCELL30:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI17 |
| TCELL30:IMUX.G2.DATA3 | PPC405.TSTDSOCMWAITI |
| TCELL30:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT16 |
| TCELL30:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI11 |
| TCELL30:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI18 |
| TCELL30:IMUX.G3.DATA3 | PPC405.TSTDSOCMWRDBUSI0 |
| TCELL30:OUT.FAN0 | PPC405.C405APUEXELOADDBUS20 |
| TCELL30:OUT.FAN1 | PPC405.C405APUEXELOADDBUS21 |
| TCELL30:OUT.FAN2 | PPC405.C405APUEXELOADDBUS22 |
| TCELL30:OUT.FAN3 | PPC405.C405APUEXELOADDBUS23 |
| TCELL30:OUT.FAN4 | PPC405.C405APUEXERADATA23 |
| TCELL30:OUT.FAN5 | PPC405.C405APUEXERADATA24 |
| TCELL30:OUT.FAN6 | PPC405.C405APUEXERBDATA23 |
| TCELL30:OUT.FAN7 | PPC405.C405APUEXERBDATA24 |
| TCELL30:OUT.SEC8 | PPC405.TSTRDDBUSO17 |
| TCELL30:OUT.SEC9 | PPC405.TSTRDDBUSO16 |
| TCELL30:OUT.SEC10 | PPC405.TSTRDDBUSO15 |
| TCELL30:OUT.SEC11 | PPC405.TSTRDDBUSO14 |
| TCELL30:OUT.SEC12 | PPC405.TSTDSOCMABORTREQO |
| TCELL30:OUT.SEC13 | PPC405.C405DCRDBUSOUT19 |
| TCELL30:OUT.SEC14 | PPC405.C405DCRDBUSOUT2 |
| TCELL30:OUT.SEC15 | PPC405.C405DCRDBUSOUT1 |
| TCELL31:IMUX.G0.DATA0 | PPC405.APUC405EXERESULT17 |
| TCELL31:IMUX.G0.DATA1 | PPC405.DCRC405DBUSIN12 |
| TCELL31:IMUX.G0.DATA2 | PPC405.TSTRDDBUSI9 |
| TCELL31:IMUX.G0.DATA3 | PPC405.TSTDSOCMABUSI6 |
| TCELL31:IMUX.G1.DATA0 | PPC405.APUC405EXERESULT18 |
| TCELL31:IMUX.G1.DATA1 | PPC405.DCRC405DBUSIN13 |
| TCELL31:IMUX.G1.DATA2 | PPC405.TSTRDDBUSI10 |
| TCELL31:IMUX.G1.DATA3 | PPC405.TSTDSOCMABUSI7 |
| TCELL31:IMUX.G2.DATA0 | PPC405.APUC405EXERESULT19 |
| TCELL31:IMUX.G2.DATA1 | PPC405.TSTDCRBUSI12 |
| TCELL31:IMUX.G2.DATA2 | PPC405.TSTC405DCRDBUSOUTI19 |
| TCELL31:IMUX.G2.DATA3 | PPC405.TSTDSOCMWRDBUSI1 |
| TCELL31:IMUX.G3.DATA0 | PPC405.APUC405EXERESULT20 |
| TCELL31:IMUX.G3.DATA1 | PPC405.TSTDCRBUSI13 |
| TCELL31:IMUX.G3.DATA2 | PPC405.TSTC405DCRDBUSOUTI20 |
| TCELL31:IMUX.G3.DATA3 | PPC405.TSTDSOCMWRDBUSI2 |
| TCELL31:OUT.FAN0 | PPC405.C405APUEXELOADDBUS24 |
| TCELL31:OUT.FAN1 | PPC405.C405APUEXELOADDBUS25 |
| TCELL31:OUT.FAN2 | PPC405.C405APUEXELOADDBUS26 |
| TCELL31:OUT.FAN3 | PPC405.C405APUEXELOADDBUS27 |
| TCELL31:OUT.FAN4 | PPC405.C405APUEXERADATA25 |
| TCELL31:OUT.FAN5 | PPC405.C405APUEXERADATA26 |
| TCELL31:OUT.FAN6 | PPC405.C405APUEXERBDATA25 |
| TCELL31:OUT.FAN7 | PPC405.C405APUEXERBDATA26 |
| TCELL31:OUT.SEC8 | PPC405.TSTRDDBUSO21 |
| TCELL31:OUT.SEC9 | PPC405.TSTRDDBUSO20 |
| TCELL31:OUT.SEC10 | PPC405.TSTRDDBUSO19 |
| TCELL31:OUT.SEC11 | PPC405.TSTRDDBUSO18 |
| TCELL31:OUT.SEC12 | PPC405.TSTDSOCMABUSO24 |
| TCELL31:OUT.SEC13 | PPC405.C405DCRDBUSOUT20 |
| TCELL31:OUT.SEC14 | PPC405.C405DCRDBUSOUT4 |
| TCELL31:OUT.SEC15 | PPC405.C405DCRDBUSOUT3 |
| TCELL32:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS0 |
| TCELL32:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS4 |
| TCELL32:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS8 |
| TCELL32:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS12 |
| TCELL32:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI17 |
| TCELL32:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI49 |
| TCELL32:IMUX.G0.DATA6 | PPC405.LSSDC405SCANIN8 |
| TCELL32:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS1 |
| TCELL32:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS5 |
| TCELL32:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS9 |
| TCELL32:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS13 |
| TCELL32:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI18 |
| TCELL32:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI50 |
| TCELL32:IMUX.G1.DATA6 | PPC405.LSSDC405SCANIN9 |
| TCELL32:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS2 |
| TCELL32:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS6 |
| TCELL32:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS10 |
| TCELL32:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS14 |
| TCELL32:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI19 |
| TCELL32:IMUX.G2.DATA5 | PPC405.LSSDC405ARRAYCCLKNEG |
| TCELL32:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS3 |
| TCELL32:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS7 |
| TCELL32:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS11 |
| TCELL32:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS15 |
| TCELL32:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI20 |
| TCELL32:IMUX.G3.DATA5 | PPC405.LSSDC405BCLK |
| TCELL32:IMUX.BRAM_ADDRA0 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL32:IMUX.BRAM_ADDRA0.S1 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL32:IMUX.BRAM_ADDRA0.S2 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL32:IMUX.BRAM_ADDRA0.S3 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL32:IMUX.BRAM_ADDRA1 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL32:IMUX.BRAM_ADDRA1.S1 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL32:IMUX.BRAM_ADDRA1.S2 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL32:IMUX.BRAM_ADDRA1.S3 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL32:IMUX.BRAM_ADDRA2 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL32:IMUX.BRAM_ADDRA2.S1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL32:IMUX.BRAM_ADDRA2.S2 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL32:IMUX.BRAM_ADDRA3 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL32:IMUX.BRAM_ADDRA3.S1 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL32:IMUX.BRAM_ADDRA3.S2 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL32:IMUX.BRAM_ADDRB0 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL32:IMUX.BRAM_ADDRB0.S1 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL32:IMUX.BRAM_ADDRB0.S2 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL32:IMUX.BRAM_ADDRB0.S3 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL32:IMUX.BRAM_ADDRB1 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL32:IMUX.BRAM_ADDRB1.S1 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL32:IMUX.BRAM_ADDRB1.S2 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL32:IMUX.BRAM_ADDRB1.S3 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL32:IMUX.BRAM_ADDRB2 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL32:IMUX.BRAM_ADDRB2.S1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL32:IMUX.BRAM_ADDRB2.S2 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL32:IMUX.BRAM_ADDRB3 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL32:IMUX.BRAM_ADDRB3.S1 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL32:IMUX.BRAM_ADDRB3.S2 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL32:OUT.FAN0 | PPC405.ISOCMBRAMWRABUS8 |
| TCELL32:OUT.FAN1 | PPC405.ISOCMBRAMWRABUS9 |
| TCELL32:OUT.FAN2 | PPC405.ISOCMBRAMWRABUS10 |
| TCELL32:OUT.FAN3 | PPC405.ISOCMBRAMWRABUS11 |
| TCELL32:OUT.FAN4 | PPC405.ISOCMBRAMWRABUS12 |
| TCELL32:OUT.FAN5 | PPC405.ISOCMBRAMWRABUS13 |
| TCELL32:OUT.FAN6 | PPC405.ISOCMBRAMWRABUS14 |
| TCELL32:OUT.FAN7 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL32:OUT.SEC8 | PPC405.TSTISOCMABUSO0 |
| TCELL32:OUT.SEC9 | PPC405.TSTISOCMICUREADYO |
| TCELL32:OUT.SEC10 | PPC405.TSTISOCMREQPENDO |
| TCELL32:OUT.SEC11 | PPC405.TSTISOCMXLATEVALIDO |
| TCELL32:OUT.SEC12 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL32:OUT.SEC13 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL32:OUT.SEC14 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL32:OUT.SEC15 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL32:OUT.TEST0 | PPC405.TSTISOCMABUSO29 |
| TCELL32:OUT.TEST2 | PPC405.TSTISOCMABORTO |
| TCELL32:OUT.TEST4 | PPC405.C405ISOCMU0ATTR |
| TCELL32:OUT.TEST6 | PPC405.C405DSOCMCACHEABLE |
| TCELL33:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS16 |
| TCELL33:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS20 |
| TCELL33:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS24 |
| TCELL33:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS28 |
| TCELL33:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI21 |
| TCELL33:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI51 |
| TCELL33:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS17 |
| TCELL33:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS21 |
| TCELL33:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS25 |
| TCELL33:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS29 |
| TCELL33:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI22 |
| TCELL33:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI52 |
| TCELL33:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS18 |
| TCELL33:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS22 |
| TCELL33:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS26 |
| TCELL33:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS30 |
| TCELL33:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI23 |
| TCELL33:IMUX.G2.DATA5 | PPC405.LSSDC405BISTCCLK |
| TCELL33:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS19 |
| TCELL33:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS23 |
| TCELL33:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS27 |
| TCELL33:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS31 |
| TCELL33:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI24 |
| TCELL33:IMUX.G3.DATA5 | PPC405.LSSDC405CNTLPOINT |
| TCELL33:OUT.FAN0 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL33:OUT.FAN1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL33:OUT.FAN2 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL33:OUT.FAN3 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL33:OUT.FAN4 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL33:OUT.FAN5 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL33:OUT.FAN6 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL33:OUT.FAN7 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL33:OUT.SEC8 | PPC405.C405LSSDDIAGOUT |
| TCELL33:OUT.SEC9 | PPC405.C405LSSDDIAGABISTDONE |
| TCELL33:OUT.SEC10 | PPC405.TSTISOCMABUSO4 |
| TCELL33:OUT.SEC11 | PPC405.TSTISOCMABUSO3 |
| TCELL33:OUT.SEC12 | PPC405.TSTISOCMABUSO2 |
| TCELL33:OUT.SEC13 | PPC405.TSTISOCMABUSO1 |
| TCELL33:OUT.SEC14 | PPC405.ISOCMRDADDRVALID |
| TCELL33:OUT.SEC15 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL33:OUT.TEST0 | PPC405.C405DSOCMGUARDED |
| TCELL33:OUT.TEST2 | PPC405.C405DSOCMSTRINGMULTIPLE |
| TCELL34:IMUX.SR0 | PPC405.ISCNTLVALUE0 |
| TCELL34:IMUX.SR1 | PPC405.ISCNTLVALUE1 |
| TCELL34:IMUX.TI0 | PPC405.TIEISOCMDCRADDR0 |
| TCELL34:IMUX.TI1 | PPC405.TIEISOCMDCRADDR1 |
| TCELL34:IMUX.TS0 | PPC405.TIEISOCMDCRADDR2 |
| TCELL34:IMUX.TS1 | PPC405.TIEISOCMDCRADDR3 |
| TCELL34:IMUX.G0.DATA0 | PPC405.ISCNTLVALUE6 |
| TCELL34:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI27 |
| TCELL34:IMUX.G0.DATA2 | PPC405.LSSDC405SCANGATE |
| TCELL34:IMUX.G1.DATA0 | PPC405.ISCNTLVALUE7 |
| TCELL34:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI28 |
| TCELL34:IMUX.G1.DATA2 | PPC405.LSSDC405TESTEVS |
| TCELL34:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI25 |
| TCELL34:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI53 |
| TCELL34:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI26 |
| TCELL34:IMUX.G3.DATA1 | PPC405.TSTISOCMRDATAI54 |
| TCELL34:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS0 |
| TCELL34:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS1 |
| TCELL34:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS2 |
| TCELL34:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS3 |
| TCELL34:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS4 |
| TCELL34:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS5 |
| TCELL34:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS6 |
| TCELL34:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS7 |
| TCELL34:OUT.SEC8 | PPC405.C405LSSDSCANOUT0 |
| TCELL34:OUT.SEC9 | PPC405.TSTISOCMABUSO8 |
| TCELL34:OUT.SEC10 | PPC405.TSTISOCMABUSO7 |
| TCELL34:OUT.SEC11 | PPC405.TSTISOCMABUSO6 |
| TCELL34:OUT.SEC12 | PPC405.TSTISOCMABUSO5 |
| TCELL34:OUT.SEC13 | PPC405.ISOCMBRAMEN |
| TCELL34:OUT.SEC14 | PPC405.ISOCMBRAMEVENWRITEEN |
| TCELL34:OUT.SEC15 | PPC405.ISOCMBRAMODDWRITEEN |
| TCELL34:OUT.TEST0 | PPC405.C405LSSDSCANOUT1 |
| TCELL34:OUT.TEST2 | PPC405.C405DSOCMU0ATTR |
| TCELL35:IMUX.SR0 | PPC405.ISCNTLVALUE2 |
| TCELL35:IMUX.SR1 | PPC405.ISCNTLVALUE3 |
| TCELL35:IMUX.TI0 | PPC405.TIEISOCMDCRADDR4 |
| TCELL35:IMUX.TI1 | PPC405.TIEISOCMDCRADDR5 |
| TCELL35:IMUX.TS0 | PPC405.TIEISOCMDCRADDR6 |
| TCELL35:IMUX.TS1 | PPC405.TIEISOCMDCRADDR7 |
| TCELL35:IMUX.G0.DATA0 | PPC405.TSTISOCMRDATAI29 |
| TCELL35:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI55 |
| TCELL35:IMUX.G1.DATA0 | PPC405.TSTISOCMRDATAI30 |
| TCELL35:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI56 |
| TCELL35:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI31 |
| TCELL35:IMUX.G2.DATA1 | PPC405.LSSDC405TESTM1 |
| TCELL35:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI32 |
| TCELL35:IMUX.G3.DATA1 | PPC405.LSSDC405TESTM3 |
| TCELL35:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS8 |
| TCELL35:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS9 |
| TCELL35:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS10 |
| TCELL35:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS11 |
| TCELL35:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS12 |
| TCELL35:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS13 |
| TCELL35:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS14 |
| TCELL35:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS15 |
| TCELL35:OUT.SEC10 | PPC405.C405LSSDSCANOUT3 |
| TCELL35:OUT.SEC11 | PPC405.C405LSSDSCANOUT2 |
| TCELL35:OUT.SEC12 | PPC405.TSTISOCMABUSO12 |
| TCELL35:OUT.SEC13 | PPC405.TSTISOCMABUSO11 |
| TCELL35:OUT.SEC14 | PPC405.TSTISOCMABUSO10 |
| TCELL35:OUT.SEC15 | PPC405.TSTISOCMABUSO9 |
| TCELL36:IMUX.CLK0 | PPC405.BRAMISOCMCLK |
| TCELL36:IMUX.TI0 | PPC405.ISARCVALUE0 |
| TCELL36:IMUX.TI1 | PPC405.ISARCVALUE1 |
| TCELL36:IMUX.TS0 | PPC405.ISARCVALUE2 |
| TCELL36:IMUX.TS1 | PPC405.ISARCVALUE3 |
| TCELL36:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDACK |
| TCELL36:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI36 |
| TCELL36:IMUX.G0.DATA2 | PPC405.LSSDC405SCANIN1 |
| TCELL36:IMUX.G1.DATA0 | PPC405.TSTISOCMRDATAI33 |
| TCELL36:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI57 |
| TCELL36:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI34 |
| TCELL36:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI58 |
| TCELL36:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI35 |
| TCELL36:IMUX.G3.DATA1 | PPC405.LSSDC405SCANIN0 |
| TCELL36:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS16 |
| TCELL36:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS17 |
| TCELL36:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS18 |
| TCELL36:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS19 |
| TCELL36:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS20 |
| TCELL36:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS21 |
| TCELL36:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS22 |
| TCELL36:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS23 |
| TCELL36:OUT.SEC10 | PPC405.C405LSSDSCANOUT5 |
| TCELL36:OUT.SEC11 | PPC405.C405LSSDSCANOUT4 |
| TCELL36:OUT.SEC12 | PPC405.TSTISOCMABUSO16 |
| TCELL36:OUT.SEC13 | PPC405.TSTISOCMABUSO15 |
| TCELL36:OUT.SEC14 | PPC405.TSTISOCMABUSO14 |
| TCELL36:OUT.SEC15 | PPC405.TSTISOCMABUSO13 |
| TCELL37:IMUX.TI0 | PPC405.ISARCVALUE4 |
| TCELL37:IMUX.TI1 | PPC405.ISARCVALUE5 |
| TCELL37:IMUX.TS0 | PPC405.ISARCVALUE6 |
| TCELL37:IMUX.TS1 | PPC405.ISARCVALUE7 |
| TCELL37:IMUX.G0.DATA0 | PPC405.ISCNTLVALUE4 |
| TCELL37:IMUX.G0.DATA1 | PPC405.TSTISOCMRDATAI39 |
| TCELL37:IMUX.G0.DATA2 | PPC405.LSSDC405SCANIN2 |
| TCELL37:IMUX.G1.DATA0 | PPC405.ISCNTLVALUE5 |
| TCELL37:IMUX.G1.DATA1 | PPC405.TSTISOCMRDATAI40 |
| TCELL37:IMUX.G1.DATA2 | PPC405.LSSDC405SCANIN3 |
| TCELL37:IMUX.G2.DATA0 | PPC405.TSTISOCMRDATAI37 |
| TCELL37:IMUX.G2.DATA1 | PPC405.TSTISOCMRDATAI59 |
| TCELL37:IMUX.G3.DATA0 | PPC405.TSTISOCMRDATAI38 |
| TCELL37:IMUX.G3.DATA1 | PPC405.TSTISOCMRDATAI60 |
| TCELL37:OUT.FAN0 | PPC405.ISOCMBRAMWRDBUS24 |
| TCELL37:OUT.FAN1 | PPC405.ISOCMBRAMWRDBUS25 |
| TCELL37:OUT.FAN2 | PPC405.ISOCMBRAMWRDBUS26 |
| TCELL37:OUT.FAN3 | PPC405.ISOCMBRAMWRDBUS27 |
| TCELL37:OUT.FAN4 | PPC405.ISOCMBRAMWRDBUS28 |
| TCELL37:OUT.FAN5 | PPC405.ISOCMBRAMWRDBUS29 |
| TCELL37:OUT.FAN6 | PPC405.ISOCMBRAMWRDBUS30 |
| TCELL37:OUT.FAN7 | PPC405.ISOCMBRAMWRDBUS31 |
| TCELL37:OUT.SEC10 | PPC405.C405LSSDSCANOUT7 |
| TCELL37:OUT.SEC11 | PPC405.C405LSSDSCANOUT6 |
| TCELL37:OUT.SEC12 | PPC405.TSTISOCMABUSO20 |
| TCELL37:OUT.SEC13 | PPC405.TSTISOCMABUSO19 |
| TCELL37:OUT.SEC14 | PPC405.TSTISOCMABUSO18 |
| TCELL37:OUT.SEC15 | PPC405.TSTISOCMABUSO17 |
| TCELL38:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS32 |
| TCELL38:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS36 |
| TCELL38:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS40 |
| TCELL38:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS44 |
| TCELL38:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI41 |
| TCELL38:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI61 |
| TCELL38:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS33 |
| TCELL38:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS37 |
| TCELL38:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS41 |
| TCELL38:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS45 |
| TCELL38:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI42 |
| TCELL38:IMUX.G1.DATA5 | PPC405.TSTISOCMRDATAI62 |
| TCELL38:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS34 |
| TCELL38:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS38 |
| TCELL38:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS42 |
| TCELL38:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS46 |
| TCELL38:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI43 |
| TCELL38:IMUX.G2.DATA5 | PPC405.LSSDC405SCANIN4 |
| TCELL38:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS35 |
| TCELL38:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS39 |
| TCELL38:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS43 |
| TCELL38:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS47 |
| TCELL38:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI44 |
| TCELL38:IMUX.G3.DATA5 | PPC405.LSSDC405SCANIN5 |
| TCELL38:OUT.FAN0 | PPC405.ISOCMBRAMRDABUS8 |
| TCELL38:OUT.FAN1 | PPC405.ISOCMBRAMRDABUS9 |
| TCELL38:OUT.FAN2 | PPC405.ISOCMBRAMRDABUS10 |
| TCELL38:OUT.FAN3 | PPC405.ISOCMBRAMRDABUS11 |
| TCELL38:OUT.FAN4 | PPC405.ISOCMBRAMRDABUS12 |
| TCELL38:OUT.FAN5 | PPC405.ISOCMBRAMRDABUS13 |
| TCELL38:OUT.FAN6 | PPC405.ISOCMBRAMRDABUS14 |
| TCELL38:OUT.FAN7 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL38:OUT.SEC8 | PPC405.TSTISOCMABUSO24 |
| TCELL38:OUT.SEC9 | PPC405.TSTISOCMABUSO23 |
| TCELL38:OUT.SEC10 | PPC405.TSTISOCMABUSO22 |
| TCELL38:OUT.SEC11 | PPC405.TSTISOCMABUSO21 |
| TCELL38:OUT.SEC12 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL38:OUT.SEC13 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL38:OUT.SEC14 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL38:OUT.SEC15 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL38:OUT.TEST0 | PPC405.C405LSSDSCANOUT8 |
| TCELL38:OUT.TEST2 | PPC405.C405LSSDSCANOUT9 |
| TCELL39:IMUX.G0.DATA0 | PPC405.BRAMISOCMRDDBUS48 |
| TCELL39:IMUX.G0.DATA1 | PPC405.BRAMISOCMRDDBUS52 |
| TCELL39:IMUX.G0.DATA2 | PPC405.BRAMISOCMRDDBUS56 |
| TCELL39:IMUX.G0.DATA3 | PPC405.BRAMISOCMRDDBUS60 |
| TCELL39:IMUX.G0.DATA4 | PPC405.TSTISOCMRDATAI45 |
| TCELL39:IMUX.G0.DATA5 | PPC405.TSTISOCMRDATAI63 |
| TCELL39:IMUX.G1.DATA0 | PPC405.BRAMISOCMRDDBUS49 |
| TCELL39:IMUX.G1.DATA1 | PPC405.BRAMISOCMRDDBUS53 |
| TCELL39:IMUX.G1.DATA2 | PPC405.BRAMISOCMRDDBUS57 |
| TCELL39:IMUX.G1.DATA3 | PPC405.BRAMISOCMRDDBUS61 |
| TCELL39:IMUX.G1.DATA4 | PPC405.TSTISOCMRDATAI46 |
| TCELL39:IMUX.G1.DATA5 | PPC405.LSSDC405ACLK |
| TCELL39:IMUX.G2.DATA0 | PPC405.BRAMISOCMRDDBUS50 |
| TCELL39:IMUX.G2.DATA1 | PPC405.BRAMISOCMRDDBUS54 |
| TCELL39:IMUX.G2.DATA2 | PPC405.BRAMISOCMRDDBUS58 |
| TCELL39:IMUX.G2.DATA3 | PPC405.BRAMISOCMRDDBUS62 |
| TCELL39:IMUX.G2.DATA4 | PPC405.TSTISOCMRDATAI47 |
| TCELL39:IMUX.G2.DATA5 | PPC405.LSSDC405SCANIN6 |
| TCELL39:IMUX.G3.DATA0 | PPC405.BRAMISOCMRDDBUS51 |
| TCELL39:IMUX.G3.DATA1 | PPC405.BRAMISOCMRDDBUS55 |
| TCELL39:IMUX.G3.DATA2 | PPC405.BRAMISOCMRDDBUS59 |
| TCELL39:IMUX.G3.DATA3 | PPC405.BRAMISOCMRDDBUS63 |
| TCELL39:IMUX.G3.DATA4 | PPC405.TSTISOCMRDATAI48 |
| TCELL39:IMUX.G3.DATA5 | PPC405.LSSDC405SCANIN7 |
| TCELL39:IMUX.BRAM_ADDRA0 | PPC405.ISOCMBRAMWRABUS15 |
| TCELL39:IMUX.BRAM_ADDRA0.S1 | PPC405.ISOCMBRAMWRABUS19 |
| TCELL39:IMUX.BRAM_ADDRA0.S2 | PPC405.ISOCMBRAMWRABUS23 |
| TCELL39:IMUX.BRAM_ADDRA0.S3 | PPC405.ISOCMBRAMWRABUS27 |
| TCELL39:IMUX.BRAM_ADDRA1 | PPC405.ISOCMBRAMWRABUS16 |
| TCELL39:IMUX.BRAM_ADDRA1.S1 | PPC405.ISOCMBRAMWRABUS20 |
| TCELL39:IMUX.BRAM_ADDRA1.S2 | PPC405.ISOCMBRAMWRABUS24 |
| TCELL39:IMUX.BRAM_ADDRA1.S3 | PPC405.ISOCMBRAMWRABUS28 |
| TCELL39:IMUX.BRAM_ADDRA2 | PPC405.ISOCMBRAMWRABUS17 |
| TCELL39:IMUX.BRAM_ADDRA2.S1 | PPC405.ISOCMBRAMWRABUS21 |
| TCELL39:IMUX.BRAM_ADDRA2.S2 | PPC405.ISOCMBRAMWRABUS25 |
| TCELL39:IMUX.BRAM_ADDRA3 | PPC405.ISOCMBRAMWRABUS18 |
| TCELL39:IMUX.BRAM_ADDRA3.S1 | PPC405.ISOCMBRAMWRABUS22 |
| TCELL39:IMUX.BRAM_ADDRA3.S2 | PPC405.ISOCMBRAMWRABUS26 |
| TCELL39:IMUX.BRAM_ADDRB0 | PPC405.ISOCMBRAMRDABUS15 |
| TCELL39:IMUX.BRAM_ADDRB0.S1 | PPC405.ISOCMBRAMRDABUS19 |
| TCELL39:IMUX.BRAM_ADDRB0.S2 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL39:IMUX.BRAM_ADDRB0.S3 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL39:IMUX.BRAM_ADDRB1 | PPC405.ISOCMBRAMRDABUS16 |
| TCELL39:IMUX.BRAM_ADDRB1.S1 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL39:IMUX.BRAM_ADDRB1.S2 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL39:IMUX.BRAM_ADDRB1.S3 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL39:IMUX.BRAM_ADDRB2 | PPC405.ISOCMBRAMRDABUS17 |
| TCELL39:IMUX.BRAM_ADDRB2.S1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL39:IMUX.BRAM_ADDRB2.S2 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL39:IMUX.BRAM_ADDRB3 | PPC405.ISOCMBRAMRDABUS18 |
| TCELL39:IMUX.BRAM_ADDRB3.S1 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL39:IMUX.BRAM_ADDRB3.S2 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL39:OUT.FAN0 | PPC405.ISOCMBRAMRDABUS20 |
| TCELL39:OUT.FAN1 | PPC405.ISOCMBRAMRDABUS21 |
| TCELL39:OUT.FAN2 | PPC405.ISOCMBRAMRDABUS22 |
| TCELL39:OUT.FAN3 | PPC405.ISOCMBRAMRDABUS23 |
| TCELL39:OUT.FAN4 | PPC405.ISOCMBRAMRDABUS24 |
| TCELL39:OUT.FAN5 | PPC405.ISOCMBRAMRDABUS25 |
| TCELL39:OUT.FAN6 | PPC405.ISOCMBRAMRDABUS26 |
| TCELL39:OUT.FAN7 | PPC405.ISOCMBRAMRDABUS27 |
| TCELL39:OUT.SEC9 | PPC405.C405ISOCMCONTEXTSYNC |
| TCELL39:OUT.SEC10 | PPC405.C405ISOCMCACHEABLE |
| TCELL39:OUT.SEC11 | PPC405.TSTISOCMABUSO28 |
| TCELL39:OUT.SEC12 | PPC405.TSTISOCMABUSO27 |
| TCELL39:OUT.SEC13 | PPC405.TSTISOCMABUSO26 |
| TCELL39:OUT.SEC14 | PPC405.TSTISOCMABUSO25 |
| TCELL39:OUT.SEC15 | PPC405.ISOCMBRAMRDABUS28 |
| TCELL40:IMUX.G0.DATA0 | PPC405.BRAMDSOCMRDDBUS0 |
| TCELL40:IMUX.G0.DATA1 | PPC405.BRAMDSOCMRDDBUS4 |
| TCELL40:IMUX.G0.DATA2 | PPC405.BRAMDSOCMRDDBUS8 |
| TCELL40:IMUX.G0.DATA3 | PPC405.BRAMDSOCMRDDBUS12 |
| TCELL40:IMUX.G1.DATA0 | PPC405.BRAMDSOCMRDDBUS1 |
| TCELL40:IMUX.G1.DATA1 | PPC405.BRAMDSOCMRDDBUS5 |
| TCELL40:IMUX.G1.DATA2 | PPC405.BRAMDSOCMRDDBUS9 |
| TCELL40:IMUX.G1.DATA3 | PPC405.BRAMDSOCMRDDBUS13 |
| TCELL40:IMUX.G2.DATA0 | PPC405.BRAMDSOCMRDDBUS2 |
| TCELL40:IMUX.G2.DATA1 | PPC405.BRAMDSOCMRDDBUS6 |
| TCELL40:IMUX.G2.DATA2 | PPC405.BRAMDSOCMRDDBUS10 |
| TCELL40:IMUX.G2.DATA3 | PPC405.BRAMDSOCMRDDBUS14 |
| TCELL40:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDBUS3 |
| TCELL40:IMUX.G3.DATA1 | PPC405.BRAMDSOCMRDDBUS7 |
| TCELL40:IMUX.G3.DATA2 | PPC405.BRAMDSOCMRDDBUS11 |
| TCELL40:IMUX.G3.DATA3 | PPC405.BRAMDSOCMRDDBUS15 |
| TCELL40:IMUX.BRAM_ADDRA0 | PPC405.DSOCMBRAMABUS28 |
| TCELL40:IMUX.BRAM_ADDRA0.N1 | PPC405.DSOCMBRAMABUS24 |
| TCELL40:IMUX.BRAM_ADDRA0.N2 | PPC405.DSOCMBRAMABUS20 |
| TCELL40:IMUX.BRAM_ADDRA0.N3 | PPC405.DSOCMBRAMABUS16 |
| TCELL40:IMUX.BRAM_ADDRA1 | PPC405.DSOCMBRAMABUS29 |
| TCELL40:IMUX.BRAM_ADDRA1.N1 | PPC405.DSOCMBRAMABUS25 |
| TCELL40:IMUX.BRAM_ADDRA1.N2 | PPC405.DSOCMBRAMABUS21 |
| TCELL40:IMUX.BRAM_ADDRA1.N3 | PPC405.DSOCMBRAMABUS17 |
| TCELL40:IMUX.BRAM_ADDRA2.N1 | PPC405.DSOCMBRAMABUS26 |
| TCELL40:IMUX.BRAM_ADDRA2.N2 | PPC405.DSOCMBRAMABUS22 |
| TCELL40:IMUX.BRAM_ADDRA2.N3 | PPC405.DSOCMBRAMABUS18 |
| TCELL40:IMUX.BRAM_ADDRA3.N1 | PPC405.DSOCMBRAMABUS27 |
| TCELL40:IMUX.BRAM_ADDRA3.N2 | PPC405.DSOCMBRAMABUS23 |
| TCELL40:IMUX.BRAM_ADDRA3.N3 | PPC405.DSOCMBRAMABUS19 |
| TCELL40:OUT.FAN0 | PPC405.DSOCMBRAMBYTEWRITE0 |
| TCELL40:OUT.FAN1 | PPC405.DSOCMBRAMBYTEWRITE1 |
| TCELL40:OUT.FAN2 | PPC405.DSOCMBRAMBYTEWRITE2 |
| TCELL40:OUT.FAN3 | PPC405.DSOCMBRAMBYTEWRITE3 |
| TCELL40:OUT.FAN4 | PPC405.C405TRCODDEXECUTIONSTATUS1 |
| TCELL40:OUT.FAN5 | PPC405.C405TRCTRACESTATUS0 |
| TCELL40:OUT.FAN6 | PPC405.C405TRCTRACESTATUS3 |
| TCELL40:OUT.FAN7 | PPC405.C405TRCTRIGGEREVENTOUT |
| TCELL40:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO28 |
| TCELL40:OUT.SEC10 | PPC405.TSTDSOCMWRDBUSO15 |
| TCELL40:OUT.SEC11 | PPC405.TSTDSOCMWRDBUSO14 |
| TCELL40:OUT.SEC12 | PPC405.TSTDSOCMWRDBUSO1 |
| TCELL40:OUT.SEC13 | PPC405.C405JTGSHIFTDR |
| TCELL40:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE3 |
| TCELL40:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE2 |
| TCELL41:IMUX.CLK0 | PPC405.JTGC405TCK |
| TCELL41:IMUX.TI0 | PPC405.DSCNTLVALUE0 |
| TCELL41:IMUX.TI1 | PPC405.DSCNTLVALUE1 |
| TCELL41:IMUX.TS0 | PPC405.DSCNTLVALUE2 |
| TCELL41:IMUX.TS1 | PPC405.DSCNTLVALUE3 |
| TCELL41:IMUX.G0.DATA0 | PPC405.TRCC405TRACEDISABLE |
| TCELL41:IMUX.G1.DATA0 | PPC405.JTGC405TDI |
| TCELL41:IMUX.G2.DATA0 | PPC405.JTGC405TMS |
| TCELL41:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS0 |
| TCELL41:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS1 |
| TCELL41:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS2 |
| TCELL41:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS3 |
| TCELL41:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS4 |
| TCELL41:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS5 |
| TCELL41:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS6 |
| TCELL41:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS7 |
| TCELL41:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO3 |
| TCELL41:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO2 |
| TCELL41:OUT.SEC10 | PPC405.TSTDSOCMABUSO14 |
| TCELL41:OUT.SEC11 | PPC405.TSTDSOCMABUSO13 |
| TCELL41:OUT.SEC12 | PPC405.TSTDSOCMABUSO0 |
| TCELL41:OUT.SEC13 | PPC405.C405JTGTDO |
| TCELL41:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE5 |
| TCELL41:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE4 |
| TCELL41:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO16 |
| TCELL41:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO17 |
| TCELL41:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO29 |
| TCELL42:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR0 |
| TCELL42:IMUX.TI1 | PPC405.DSCNTLVALUE4 |
| TCELL42:IMUX.TS0 | PPC405.DSCNTLVALUE5 |
| TCELL42:IMUX.TS1 | PPC405.DSCNTLVALUE6 |
| TCELL42:IMUX.G0.DATA0 | PPC405.TRCC405TRIGGEREVENTIN |
| TCELL42:IMUX.G1.DATA0 | PPC405.JTGC405BNDSCANTDO |
| TCELL42:IMUX.G2.DATA0 | PPC405.TSTTRSTNEGI |
| TCELL42:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDACK |
| TCELL42:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS8 |
| TCELL42:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS9 |
| TCELL42:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS10 |
| TCELL42:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS11 |
| TCELL42:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS12 |
| TCELL42:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS13 |
| TCELL42:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS14 |
| TCELL42:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS15 |
| TCELL42:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO5 |
| TCELL42:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO4 |
| TCELL42:OUT.SEC10 | PPC405.TSTDSOCMABUSO16 |
| TCELL42:OUT.SEC11 | PPC405.TSTDSOCMABUSO15 |
| TCELL42:OUT.SEC12 | PPC405.TSTDSOCMABUSO1 |
| TCELL42:OUT.SEC13 | PPC405.C405JTGTDOEN |
| TCELL42:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE7 |
| TCELL42:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE6 |
| TCELL42:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO18 |
| TCELL42:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO19 |
| TCELL42:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO30 |
| TCELL43:IMUX.CLK0 | PPC405.BRAMDSOCMCLK |
| TCELL43:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR1 |
| TCELL43:IMUX.TI1 | PPC405.TIEDSOCMDCRADDR2 |
| TCELL43:IMUX.TS0 | PPC405.TIEDSOCMDCRADDR3 |
| TCELL43:IMUX.TS1 | PPC405.TIEDSOCMDCRADDR4 |
| TCELL43:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS16 |
| TCELL43:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS17 |
| TCELL43:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS18 |
| TCELL43:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS19 |
| TCELL43:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS20 |
| TCELL43:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS21 |
| TCELL43:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS22 |
| TCELL43:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS23 |
| TCELL43:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO7 |
| TCELL43:OUT.SEC9 | PPC405.TSTDSOCMWRDBUSO6 |
| TCELL43:OUT.SEC10 | PPC405.TSTDSOCMABUSO18 |
| TCELL43:OUT.SEC11 | PPC405.TSTDSOCMABUSO17 |
| TCELL43:OUT.SEC12 | PPC405.TSTDSOCMABUSO2 |
| TCELL43:OUT.SEC13 | PPC405.C405JTGUPDATEDR |
| TCELL43:OUT.SEC14 | PPC405.C405TRCTRIGGEREVENTTYPE9 |
| TCELL43:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE8 |
| TCELL43:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO20 |
| TCELL43:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO21 |
| TCELL43:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO31 |
| TCELL44:IMUX.TI0 | PPC405.TIEDSOCMDCRADDR5 |
| TCELL44:IMUX.TI1 | PPC405.TIEDSOCMDCRADDR6 |
| TCELL44:IMUX.TS0 | PPC405.TIEDSOCMDCRADDR7 |
| TCELL44:IMUX.TS1 | PPC405.DSCNTLVALUE7 |
| TCELL44:OUT.FAN0 | PPC405.DSOCMBRAMWRDBUS24 |
| TCELL44:OUT.FAN1 | PPC405.DSOCMBRAMWRDBUS25 |
| TCELL44:OUT.FAN2 | PPC405.DSOCMBRAMWRDBUS26 |
| TCELL44:OUT.FAN3 | PPC405.DSOCMBRAMWRDBUS27 |
| TCELL44:OUT.FAN4 | PPC405.DSOCMBRAMWRDBUS28 |
| TCELL44:OUT.FAN5 | PPC405.DSOCMBRAMWRDBUS29 |
| TCELL44:OUT.FAN6 | PPC405.DSOCMBRAMWRDBUS30 |
| TCELL44:OUT.FAN7 | PPC405.DSOCMBRAMWRDBUS31 |
| TCELL44:OUT.SEC8 | PPC405.TSTDSOCMWRDBUSO8 |
| TCELL44:OUT.SEC9 | PPC405.TSTDSOCMABUSO20 |
| TCELL44:OUT.SEC10 | PPC405.TSTDSOCMABUSO19 |
| TCELL44:OUT.SEC11 | PPC405.TSTDSOCMABUSO4 |
| TCELL44:OUT.SEC12 | PPC405.TSTDSOCMABUSO3 |
| TCELL44:OUT.SEC13 | PPC405.DSOCMRDADDRVALID |
| TCELL44:OUT.SEC14 | PPC405.C405JTGCAPTUREDR |
| TCELL44:OUT.SEC15 | PPC405.C405TRCTRIGGEREVENTTYPE10 |
| TCELL44:OUT.TEST0 | PPC405.TSTDSOCMWRDBUSO9 |
| TCELL44:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO22 |
| TCELL44:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO23 |
| TCELL45:IMUX.TI0 | PPC405.DSARCVALUE0 |
| TCELL45:IMUX.TI1 | PPC405.DSARCVALUE1 |
| TCELL45:IMUX.TS0 | PPC405.DSARCVALUE2 |
| TCELL45:IMUX.TS1 | PPC405.DSARCVALUE3 |
| TCELL45:OUT.FAN0 | PPC405.DSOCMBRAMABUS8 |
| TCELL45:OUT.FAN1 | PPC405.DSOCMBRAMABUS9 |
| TCELL45:OUT.FAN2 | PPC405.DSOCMBRAMABUS10 |
| TCELL45:OUT.FAN3 | PPC405.DSOCMBRAMABUS11 |
| TCELL45:OUT.FAN4 | PPC405.DSOCMBRAMABUS12 |
| TCELL45:OUT.FAN5 | PPC405.DSOCMBRAMABUS13 |
| TCELL45:OUT.FAN6 | PPC405.DSOCMBRAMABUS14 |
| TCELL45:OUT.FAN7 | PPC405.DSOCMBRAMABUS15 |
| TCELL45:OUT.SEC8 | PPC405.TSTDSOCMABUSO8 |
| TCELL45:OUT.SEC9 | PPC405.TSTDSOCMABUSO7 |
| TCELL45:OUT.SEC10 | PPC405.TSTDSOCMABUSO6 |
| TCELL45:OUT.SEC11 | PPC405.TSTDSOCMABUSO5 |
| TCELL45:OUT.SEC12 | PPC405.DSOCMBRAMABUS19 |
| TCELL45:OUT.SEC13 | PPC405.DSOCMBRAMABUS18 |
| TCELL45:OUT.SEC14 | PPC405.DSOCMBRAMABUS17 |
| TCELL45:OUT.SEC15 | PPC405.DSOCMBRAMABUS16 |
| TCELL45:OUT.TEST0 | PPC405.TSTDSOCMABUSO21 |
| TCELL45:OUT.TEST2 | PPC405.TSTDSOCMABUSO22 |
| TCELL45:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO10 |
| TCELL45:OUT.TEST6 | PPC405.TSTDSOCMWRDBUSO11 |
| TCELL45:OUT.TEST8 | PPC405.TSTDSOCMWRDBUSO24 |
| TCELL45:OUT.TEST10 | PPC405.TSTDSOCMWRDBUSO25 |
| TCELL46:IMUX.TI0 | PPC405.DSARCVALUE4 |
| TCELL46:IMUX.TI1 | PPC405.DSARCVALUE5 |
| TCELL46:IMUX.TS0 | PPC405.DSARCVALUE6 |
| TCELL46:IMUX.TS1 | PPC405.DSARCVALUE7 |
| TCELL46:OUT.FAN0 | PPC405.DSOCMBRAMABUS20 |
| TCELL46:OUT.FAN1 | PPC405.DSOCMBRAMABUS21 |
| TCELL46:OUT.FAN2 | PPC405.DSOCMBRAMABUS22 |
| TCELL46:OUT.FAN3 | PPC405.DSOCMBRAMABUS23 |
| TCELL46:OUT.FAN4 | PPC405.DSOCMBRAMABUS24 |
| TCELL46:OUT.FAN5 | PPC405.DSOCMBRAMABUS25 |
| TCELL46:OUT.FAN6 | PPC405.DSOCMBRAMABUS26 |
| TCELL46:OUT.FAN7 | PPC405.DSOCMBRAMABUS27 |
| TCELL46:OUT.SEC8 | PPC405.TSTDSOCMABUSO12 |
| TCELL46:OUT.SEC9 | PPC405.TSTDSOCMABUSO11 |
| TCELL46:OUT.SEC10 | PPC405.TSTDSOCMABUSO10 |
| TCELL46:OUT.SEC11 | PPC405.TSTDSOCMABUSO9 |
| TCELL46:OUT.SEC12 | PPC405.DSOCMBUSY |
| TCELL46:OUT.SEC13 | PPC405.DSOCMBRAMEN |
| TCELL46:OUT.SEC14 | PPC405.DSOCMBRAMABUS29 |
| TCELL46:OUT.SEC15 | PPC405.DSOCMBRAMABUS28 |
| TCELL46:OUT.TEST0 | PPC405.TSTDSOCMABUSO23 |
| TCELL46:OUT.TEST2 | PPC405.TSTDSOCMWRDBUSO0 |
| TCELL46:OUT.TEST4 | PPC405.TSTDSOCMWRDBUSO12 |
| TCELL46:OUT.TEST6 | PPC405.TSTDSOCMWRDBUSO13 |
| TCELL46:OUT.TEST8 | PPC405.TSTDSOCMWRDBUSO26 |
| TCELL46:OUT.TEST10 | PPC405.TSTDSOCMWRDBUSO27 |
| TCELL47:IMUX.G0.DATA0 | PPC405.BRAMDSOCMRDDBUS16 |
| TCELL47:IMUX.G0.DATA1 | PPC405.BRAMDSOCMRDDBUS20 |
| TCELL47:IMUX.G0.DATA2 | PPC405.BRAMDSOCMRDDBUS24 |
| TCELL47:IMUX.G0.DATA3 | PPC405.BRAMDSOCMRDDBUS28 |
| TCELL47:IMUX.G1.DATA0 | PPC405.BRAMDSOCMRDDBUS17 |
| TCELL47:IMUX.G1.DATA1 | PPC405.BRAMDSOCMRDDBUS21 |
| TCELL47:IMUX.G1.DATA2 | PPC405.BRAMDSOCMRDDBUS25 |
| TCELL47:IMUX.G1.DATA3 | PPC405.BRAMDSOCMRDDBUS29 |
| TCELL47:IMUX.G2.DATA0 | PPC405.BRAMDSOCMRDDBUS18 |
| TCELL47:IMUX.G2.DATA1 | PPC405.BRAMDSOCMRDDBUS22 |
| TCELL47:IMUX.G2.DATA2 | PPC405.BRAMDSOCMRDDBUS26 |
| TCELL47:IMUX.G2.DATA3 | PPC405.BRAMDSOCMRDDBUS30 |
| TCELL47:IMUX.G3.DATA0 | PPC405.BRAMDSOCMRDDBUS19 |
| TCELL47:IMUX.G3.DATA1 | PPC405.BRAMDSOCMRDDBUS23 |
| TCELL47:IMUX.G3.DATA2 | PPC405.BRAMDSOCMRDDBUS27 |
| TCELL47:IMUX.G3.DATA3 | PPC405.BRAMDSOCMRDDBUS31 |
| TCELL47:IMUX.BRAM_ADDRA0 | PPC405.DSOCMBRAMABUS28 |
| TCELL47:IMUX.BRAM_ADDRA0.N1 | PPC405.DSOCMBRAMABUS24 |
| TCELL47:IMUX.BRAM_ADDRA0.N2 | PPC405.DSOCMBRAMABUS20 |
| TCELL47:IMUX.BRAM_ADDRA0.N3 | PPC405.DSOCMBRAMABUS16 |
| TCELL47:IMUX.BRAM_ADDRA1 | PPC405.DSOCMBRAMABUS29 |
| TCELL47:IMUX.BRAM_ADDRA1.N1 | PPC405.DSOCMBRAMABUS25 |
| TCELL47:IMUX.BRAM_ADDRA1.N2 | PPC405.DSOCMBRAMABUS21 |
| TCELL47:IMUX.BRAM_ADDRA1.N3 | PPC405.DSOCMBRAMABUS17 |
| TCELL47:IMUX.BRAM_ADDRA2.N1 | PPC405.DSOCMBRAMABUS26 |
| TCELL47:IMUX.BRAM_ADDRA2.N2 | PPC405.DSOCMBRAMABUS22 |
| TCELL47:IMUX.BRAM_ADDRA2.N3 | PPC405.DSOCMBRAMABUS18 |
| TCELL47:IMUX.BRAM_ADDRA3.N1 | PPC405.DSOCMBRAMABUS27 |
| TCELL47:IMUX.BRAM_ADDRA3.N2 | PPC405.DSOCMBRAMABUS23 |
| TCELL47:IMUX.BRAM_ADDRA3.N3 | PPC405.DSOCMBRAMABUS19 |
| TCELL47:OUT.FAN0 | PPC405.C405TRCCYCLE |
| TCELL47:OUT.FAN1 | PPC405.C405TRCEVENEXECUTIONSTATUS0 |
| TCELL47:OUT.FAN2 | PPC405.C405TRCEVENEXECUTIONSTATUS1 |
| TCELL47:OUT.FAN3 | PPC405.C405TRCODDEXECUTIONSTATUS0 |
| TCELL47:OUT.FAN4 | PPC405.C405TRCTRACESTATUS1 |
| TCELL47:OUT.FAN5 | PPC405.C405TRCTRACESTATUS2 |
| TCELL47:OUT.FAN6 | PPC405.C405TRCTRIGGEREVENTTYPE0 |
| TCELL47:OUT.FAN7 | PPC405.C405TRCTRIGGEREVENTTYPE1 |
| TCELL47:OUT.SEC14 | PPC405.C405JTGPGMOUT |
| TCELL47:OUT.SEC15 | PPC405.C405JTGEXTEST |