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Configurable Logic Block

See Spartan 3 documentation for functional description.

Bitstream

The data for a CLB is located in the same bitstream tile as the associated INT tile.

Tile CLB

Cells: 1

Bels SLICE_V4

virtex4 CLB bel SLICE_V4 pins
PinDirectionSLICE[0]SLICE[1]SLICE[2]SLICE[3]
F1inIMUX_IMUX[11]IMUX_IMUX[15]IMUX_IMUX[24]IMUX_IMUX[28]
F2inIMUX_IMUX[10]IMUX_IMUX[14]IMUX_IMUX[25]IMUX_IMUX[29]
F3inIMUX_IMUX[9]IMUX_IMUX[13]IMUX_IMUX[26]IMUX_IMUX[30]
F4inIMUX_IMUX[8]IMUX_IMUX[12]IMUX_IMUX[27]IMUX_IMUX[31]
G1inIMUX_IMUX[3]IMUX_IMUX[7]IMUX_IMUX[16]IMUX_IMUX[20]
G2inIMUX_IMUX[2]IMUX_IMUX[6]IMUX_IMUX[17]IMUX_IMUX[21]
G3inIMUX_IMUX[1]IMUX_IMUX[5]IMUX_IMUX[18]IMUX_IMUX[22]
G4inIMUX_IMUX[0]IMUX_IMUX[4]IMUX_IMUX[19]IMUX_IMUX[23]
BXinIMUX_BYP[0] invert by !MAIN[18][19]IMUX_BYP[5] invert by !MAIN[18][61]IMUX_BYP[2] invert by !MAIN[18][18]IMUX_BYP[7] invert by !MAIN[18][60]
BYinIMUX_BYP[4] invert by !MAIN[18][22]IMUX_BYP[1] invert by !MAIN[18][58]IMUX_BYP[6] invert by !MAIN[18][21]IMUX_BYP[3] invert by !MAIN[18][57]
CLKinIMUX_CLK_OPTINV[0]IMUX_CLK_OPTINV[1]IMUX_CLK_OPTINV[2]IMUX_CLK_OPTINV[3]
SRinIMUX_SR_OPTINV[0]IMUX_SR_OPTINV[1]IMUX_SR_OPTINV[2]IMUX_SR_OPTINV[3]
CEinIMUX_CE_OPTINV[0]IMUX_CE_OPTINV[1]IMUX_CE_OPTINV[2]IMUX_CE_OPTINV[3]
XoutOUT_BEST[0]OUT_BEST[1]OUT_BEST[2]OUT_BEST[3]
YoutOUT_BEST[4]OUT_BEST[5]OUT_BEST[6]OUT_BEST[7]
XQoutOUT_SEC[0]OUT_SEC[1]OUT_SEC[2]OUT_SEC[3]
YQoutOUT_SEC[4]OUT_SEC[5]OUT_SEC[6]OUT_SEC[7]
XBoutOUT_HALF0[4]OUT_HALF0[5]OUT_HALF1[4]OUT_HALF1[5]
YBoutOUT_HALF0[6]OUT_HALF0[7]OUT_HALF1[6]OUT_HALF1[7]
XMUXoutOUT_HALF0[0]OUT_HALF0[1]OUT_HALF1[0]OUT_HALF1[1]
YMUXoutOUT_HALF0[2]OUT_HALF0[3]OUT_HALF1[2]OUT_HALF1[3]
virtex4 CLB bel SLICE_V4 attribute bits
AttributeSLICE[0]SLICE[1]SLICE[2]SLICE[3]
F bit 0MAIN[21][15]MAIN[19][15]MAIN[21][55]MAIN[19][55]
F bit 1MAIN[21][14]MAIN[19][14]MAIN[21][54]MAIN[19][54]
F bit 2MAIN[21][13]MAIN[19][13]MAIN[21][53]MAIN[19][53]
F bit 3MAIN[21][12]MAIN[19][12]MAIN[21][52]MAIN[19][52]
F bit 4MAIN[21][11]MAIN[19][11]MAIN[21][51]MAIN[19][51]
F bit 5MAIN[21][10]MAIN[19][10]MAIN[21][50]MAIN[19][50]
F bit 6MAIN[21][9]MAIN[19][9]MAIN[21][49]MAIN[19][49]
F bit 7MAIN[21][8]MAIN[19][8]MAIN[21][48]MAIN[19][48]
F bit 8MAIN[21][7]MAIN[19][7]MAIN[21][47]MAIN[19][47]
F bit 9MAIN[21][6]MAIN[19][6]MAIN[21][46]MAIN[19][46]
F bit 10MAIN[21][5]MAIN[19][5]MAIN[21][45]MAIN[19][45]
F bit 11MAIN[21][4]MAIN[19][4]MAIN[21][44]MAIN[19][44]
F bit 12MAIN[21][3]MAIN[19][3]MAIN[21][43]MAIN[19][43]
F bit 13MAIN[21][2]MAIN[19][2]MAIN[21][42]MAIN[19][42]
F bit 14MAIN[21][1]MAIN[19][1]MAIN[21][41]MAIN[19][41]
F bit 15MAIN[21][0]MAIN[19][0]MAIN[21][40]MAIN[19][40]
G bit 0MAIN[21][38]MAIN[19][38]MAIN[21][78]MAIN[19][78]
G bit 1MAIN[21][37]MAIN[19][37]MAIN[21][77]MAIN[19][77]
G bit 2MAIN[21][36]MAIN[19][36]MAIN[21][76]MAIN[19][76]
G bit 3MAIN[21][35]MAIN[19][35]MAIN[21][75]MAIN[19][75]
G bit 4MAIN[21][34]MAIN[19][34]MAIN[21][74]MAIN[19][74]
G bit 5MAIN[21][33]MAIN[19][33]MAIN[21][73]MAIN[19][73]
G bit 6MAIN[21][32]MAIN[19][32]MAIN[21][72]MAIN[19][72]
G bit 7MAIN[21][31]MAIN[19][31]MAIN[21][71]MAIN[19][71]
G bit 8MAIN[21][30]MAIN[19][30]MAIN[21][70]MAIN[19][70]
G bit 9MAIN[21][29]MAIN[19][29]MAIN[21][69]MAIN[19][69]
G bit 10MAIN[21][28]MAIN[19][28]MAIN[21][68]MAIN[19][68]
G bit 11MAIN[21][27]MAIN[19][27]MAIN[21][67]MAIN[19][67]
G bit 12MAIN[21][26]MAIN[19][26]MAIN[21][66]MAIN[19][66]
G bit 13MAIN[21][25]MAIN[19][25]MAIN[21][65]MAIN[19][65]
G bit 14MAIN[21][24]MAIN[19][24]MAIN[21][64]MAIN[19][64]
G bit 15MAIN[21][23]MAIN[19][23]MAIN[21][63]MAIN[19][63]
DIF_MUX[enum: SLICE_V4_DIF_MUX]-[enum: SLICE_V4_DIF_MUX]-
DIG_MUX[enum: SLICE_V4_DIG_MUX]-[enum: SLICE_V4_DIG_MUX]-
F_RAM_ENABLEMAIN[20][8]-MAIN[20][48]-
G_RAM_ENABLEMAIN[20][7]-MAIN[20][40]-
F_SHIFT_ENABLEMAIN[20][37]-MAIN[20][78]-
G_SHIFT_ENABLEMAIN[20][36]-MAIN[20][77]-
F_SLICEWE0USEDMAIN[20][9]-MAIN[20][49]-
G_SLICEWE0USEDMAIN[21][20]-MAIN[21][60]-
F_SLICEWE1USEDMAIN[20][11]-MAIN[20][47]-
G_SLICEWE1USEDMAIN[21][19]-MAIN[21][59]-
CYINIT[enum: SLICE_V4_CYINIT][enum: SLICE_V4_CYINIT][enum: SLICE_V4_CYINIT][enum: SLICE_V4_CYINIT]
CY0F[enum: SLICE_V4_CY0F][enum: SLICE_V4_CY0F][enum: SLICE_V4_CY0F][enum: SLICE_V4_CY0F]
CY0G[enum: SLICE_V4_CY0G][enum: SLICE_V4_CY0G][enum: SLICE_V4_CY0G][enum: SLICE_V4_CY0G]
FFX_INIT bit 0!MAIN[20][6]!MAIN[20][5]!MAIN[20][46]!MAIN[20][45]
FFY_INIT bit 0!MAIN[20][34]!MAIN[20][33]!MAIN[20][74]!MAIN[20][73]
FFX_SRVAL bit 0!MAIN[20][0]!MAIN[20][1]!MAIN[20][42]!MAIN[20][41]
FFY_SRVAL bit 0!MAIN[20][30]!MAIN[20][29]!MAIN[20][70]!MAIN[20][69]
FF_LATCHMAIN[20][10]MAIN[20][22]MAIN[20][50]MAIN[20][62]
FF_REV_ENABLEMAIN[20][27]MAIN[20][28]MAIN[20][67]MAIN[20][68]
FF_SR_SYNCMAIN[20][26]MAIN[20][25]MAIN[20][66]MAIN[20][65]
FF_SR_ENABLE!MAIN[20][38]-!MAIN[20][79]-
FXMUX[enum: SLICE_V4_FXMUX][enum: SLICE_V4_FXMUX][enum: SLICE_V4_FXMUX][enum: SLICE_V4_FXMUX]
GYMUX[enum: SLICE_V4_GYMUX][enum: SLICE_V4_GYMUX][enum: SLICE_V4_GYMUX][enum: SLICE_V4_GYMUX]
DXMUX[enum: SLICE_V4_DXMUX][enum: SLICE_V4_DXMUX][enum: SLICE_V4_DXMUX][enum: SLICE_V4_DXMUX]
DYMUX[enum: SLICE_V4_DYMUX][enum: SLICE_V4_DYMUX][enum: SLICE_V4_DYMUX][enum: SLICE_V4_DYMUX]
XBMUX[enum: SLICE_V4_XBMUX]-[enum: SLICE_V4_XBMUX]-
YBMUX[enum: SLICE_V4_YBMUX]-[enum: SLICE_V4_YBMUX]-
virtex4 CLB enum SLICE_V4_DIF_MUX
SLICE[0].DIF_MUXMAIN[20][2]
SLICE[2].DIF_MUXMAIN[20][39]
ALT0
BX1
virtex4 CLB enum SLICE_V4_DIG_MUX
SLICE[0].DIG_MUXMAIN[20][35]
SLICE[2].DIG_MUXMAIN[20][76]
ALT0
BY1
virtex4 CLB enum SLICE_V4_CYINIT
SLICE[0].CYINITMAIN[21][17]
SLICE[1].CYINITMAIN[19][16]
SLICE[2].CYINITMAIN[21][57]
SLICE[3].CYINITMAIN[19][56]
BX0
CIN1
virtex4 CLB enum SLICE_V4_CY0F
SLICE[0].CY0FMAIN[20][18]MAIN[20][17]MAIN[20][16]
SLICE[1].CY0FMAIN[19][18]MAIN[19][17]MAIN[20][15]
SLICE[2].CY0FMAIN[20][58]MAIN[20][57]MAIN[20][56]
SLICE[3].CY0FMAIN[19][58]MAIN[19][57]MAIN[20][55]
CONST_0001
CONST_1000
BX110
F3011
F2010
PROD100
virtex4 CLB enum SLICE_V4_CY0G
SLICE[0].CY0GMAIN[20][21]MAIN[20][20]MAIN[20][23]
SLICE[1].CY0GMAIN[19][21]MAIN[20][24]MAIN[19][22]
SLICE[2].CY0GMAIN[20][61]MAIN[20][60]MAIN[20][63]
SLICE[3].CY0GMAIN[19][61]MAIN[20][64]MAIN[19][62]
CONST_0001
CONST_1000
BY110
G3011
G2010
PROD100
virtex4 CLB enum SLICE_V4_FXMUX
SLICE[0].FXMUXMAIN[20][14]
SLICE[1].FXMUXMAIN[20][13]
SLICE[2].FXMUXMAIN[20][54]
SLICE[3].FXMUXMAIN[20][53]
F50
FXOR1
virtex4 CLB enum SLICE_V4_GYMUX
SLICE[0].GYMUXMAIN[20][19]
SLICE[1].GYMUXMAIN[19][20]
SLICE[2].GYMUXMAIN[20][59]
SLICE[3].GYMUXMAIN[19][60]
FX0
GXOR1
virtex4 CLB enum SLICE_V4_DXMUX
SLICE[0].DXMUXMAIN[18][2]MAIN[18][7]MAIN[18][0]MAIN[18][9]MAIN[20][3]
SLICE[1].DXMUXMAIN[18][12]MAIN[18][13]MAIN[18][11]MAIN[18][10]MAIN[20][4]
SLICE[2].DXMUXMAIN[18][70]MAIN[18][71]MAIN[18][68]MAIN[18][72]MAIN[20][43]
SLICE[3].DXMUXMAIN[18][45]MAIN[18][44]MAIN[18][47]MAIN[18][46]MAIN[20][44]
X00000
BX00011
F500101
FXOR01001
XB10001
virtex4 CLB enum SLICE_V4_DYMUX
SLICE[0].DYMUXMAIN[18][15]MAIN[18][14]MAIN[18][5]MAIN[18][8]MAIN[20][31]
SLICE[1].DYMUXMAIN[18][43]MAIN[18][40]MAIN[18][42]MAIN[18][41]MAIN[20][32]
SLICE[2].DYMUXMAIN[18][69]MAIN[18][67]MAIN[18][74]MAIN[18][77]MAIN[20][71]
SLICE[3].DYMUXMAIN[18][65]MAIN[18][79]MAIN[18][64]MAIN[18][66]MAIN[20][72]
Y00000
BY00011
FX00101
GXOR01001
YB10001
virtex4 CLB enum SLICE_V4_XBMUX
SLICE[0].XBMUXMAIN[21][18]
SLICE[2].XBMUXMAIN[21][58]
FCY0
FMC151
virtex4 CLB enum SLICE_V4_YBMUX
SLICE[0].YBMUXMAIN[21][21]
SLICE[2].YBMUXMAIN[21][61]
GCY0
GMC151

Bel wires

virtex4 CLB bel wires
WirePins
IMUX_SR_OPTINV[0]SLICE[0].SR
IMUX_SR_OPTINV[1]SLICE[1].SR
IMUX_SR_OPTINV[2]SLICE[2].SR
IMUX_SR_OPTINV[3]SLICE[3].SR
IMUX_CLK_OPTINV[0]SLICE[0].CLK
IMUX_CLK_OPTINV[1]SLICE[1].CLK
IMUX_CLK_OPTINV[2]SLICE[2].CLK
IMUX_CLK_OPTINV[3]SLICE[3].CLK
IMUX_CE_OPTINV[0]SLICE[0].CE
IMUX_CE_OPTINV[1]SLICE[1].CE
IMUX_CE_OPTINV[2]SLICE[2].CE
IMUX_CE_OPTINV[3]SLICE[3].CE
IMUX_BYP[0]SLICE[0].BX
IMUX_BYP[1]SLICE[1].BY
IMUX_BYP[2]SLICE[2].BX
IMUX_BYP[3]SLICE[3].BY
IMUX_BYP[4]SLICE[0].BY
IMUX_BYP[5]SLICE[1].BX
IMUX_BYP[6]SLICE[2].BY
IMUX_BYP[7]SLICE[3].BX
IMUX_IMUX[0]SLICE[0].G4
IMUX_IMUX[1]SLICE[0].G3
IMUX_IMUX[2]SLICE[0].G2
IMUX_IMUX[3]SLICE[0].G1
IMUX_IMUX[4]SLICE[1].G4
IMUX_IMUX[5]SLICE[1].G3
IMUX_IMUX[6]SLICE[1].G2
IMUX_IMUX[7]SLICE[1].G1
IMUX_IMUX[8]SLICE[0].F4
IMUX_IMUX[9]SLICE[0].F3
IMUX_IMUX[10]SLICE[0].F2
IMUX_IMUX[11]SLICE[0].F1
IMUX_IMUX[12]SLICE[1].F4
IMUX_IMUX[13]SLICE[1].F3
IMUX_IMUX[14]SLICE[1].F2
IMUX_IMUX[15]SLICE[1].F1
IMUX_IMUX[16]SLICE[2].G1
IMUX_IMUX[17]SLICE[2].G2
IMUX_IMUX[18]SLICE[2].G3
IMUX_IMUX[19]SLICE[2].G4
IMUX_IMUX[20]SLICE[3].G1
IMUX_IMUX[21]SLICE[3].G2
IMUX_IMUX[22]SLICE[3].G3
IMUX_IMUX[23]SLICE[3].G4
IMUX_IMUX[24]SLICE[2].F1
IMUX_IMUX[25]SLICE[2].F2
IMUX_IMUX[26]SLICE[2].F3
IMUX_IMUX[27]SLICE[2].F4
IMUX_IMUX[28]SLICE[3].F1
IMUX_IMUX[29]SLICE[3].F2
IMUX_IMUX[30]SLICE[3].F3
IMUX_IMUX[31]SLICE[3].F4
OUT_BEST[0]SLICE[0].X
OUT_BEST[1]SLICE[1].X
OUT_BEST[2]SLICE[2].X
OUT_BEST[3]SLICE[3].X
OUT_BEST[4]SLICE[0].Y
OUT_BEST[5]SLICE[1].Y
OUT_BEST[6]SLICE[2].Y
OUT_BEST[7]SLICE[3].Y
OUT_SEC[0]SLICE[0].XQ
OUT_SEC[1]SLICE[1].XQ
OUT_SEC[2]SLICE[2].XQ
OUT_SEC[3]SLICE[3].XQ
OUT_SEC[4]SLICE[0].YQ
OUT_SEC[5]SLICE[1].YQ
OUT_SEC[6]SLICE[2].YQ
OUT_SEC[7]SLICE[3].YQ
OUT_HALF0[0]SLICE[0].XMUX
OUT_HALF0[1]SLICE[1].XMUX
OUT_HALF0[2]SLICE[0].YMUX
OUT_HALF0[3]SLICE[1].YMUX
OUT_HALF0[4]SLICE[0].XB
OUT_HALF0[5]SLICE[1].XB
OUT_HALF0[6]SLICE[0].YB
OUT_HALF0[7]SLICE[1].YB
OUT_HALF1[0]SLICE[2].XMUX
OUT_HALF1[1]SLICE[3].XMUX
OUT_HALF1[2]SLICE[2].YMUX
OUT_HALF1[3]SLICE[3].YMUX
OUT_HALF1[4]SLICE[2].XB
OUT_HALF1[5]SLICE[3].XB
OUT_HALF1[6]SLICE[2].YB
OUT_HALF1[7]SLICE[3].YB

Bitstream

virtex4 CLB rect MAIN
BitFrame
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21
B79 - - - - - - - - - - - - - - - - - - SLICE[3]: DYMUX bit 3 - SLICE[2]: ! FF_SR_ENABLE -
B78 - - - - - - - - - - - - - - - - - - - SLICE[3]: G bit 0 SLICE[2]: F_SHIFT_ENABLE SLICE[2]: G bit 0
B77 - - - - - - - - - - - - - - - - - - SLICE[2]: DYMUX bit 1 SLICE[3]: G bit 1 SLICE[2]: G_SHIFT_ENABLE SLICE[2]: G bit 1
B76 - - - - - - - - - - - - - - - - - - - SLICE[3]: G bit 2 SLICE[2]: DIG_MUX bit 0 SLICE[2]: G bit 2
B75 - - - - - - - - - - - - - - - - - - - SLICE[3]: G bit 3 - SLICE[2]: G bit 3
B74 - - - - - - - - - - - - - - - - - - SLICE[2]: DYMUX bit 2 SLICE[3]: G bit 4 SLICE[2]: ! FFY_INIT bit 0 SLICE[2]: G bit 4
B73 - - - - - - - - - - - - - - - - - - - SLICE[3]: G bit 5 SLICE[3]: ! FFY_INIT bit 0 SLICE[2]: G bit 5
B72 - - - - - - - - - - - - - - - - - - SLICE[2]: DXMUX bit 1 SLICE[3]: G bit 6 SLICE[3]: DYMUX bit 0 SLICE[2]: G bit 6
B71 - - - - - - - - - - - - - - - - - - SLICE[2]: DXMUX bit 3 SLICE[3]: G bit 7 SLICE[2]: DYMUX bit 0 SLICE[2]: G bit 7
B70 - - - - - - - - - - - - - - - - - - SLICE[2]: DXMUX bit 4 SLICE[3]: G bit 8 SLICE[2]: ! FFY_SRVAL bit 0 SLICE[2]: G bit 8
B69 - - - - - - - - - - - - - - - - - - SLICE[2]: DYMUX bit 4 SLICE[3]: G bit 9 SLICE[3]: ! FFY_SRVAL bit 0 SLICE[2]: G bit 9
B68 - - - - - - - - - - - - - - - - - - SLICE[2]: DXMUX bit 2 SLICE[3]: G bit 10 SLICE[3]: FF_REV_ENABLE SLICE[2]: G bit 10
B67 - - - - - - - - - - - - - - - - - - SLICE[2]: DYMUX bit 3 SLICE[3]: G bit 11 SLICE[2]: FF_REV_ENABLE SLICE[2]: G bit 11
B66 - - - - - - - - - - - - - - - - - - SLICE[3]: DYMUX bit 1 SLICE[3]: G bit 12 SLICE[2]: FF_SR_SYNC SLICE[2]: G bit 12
B65 - - - - - - - - - - - - - - - - - - SLICE[3]: DYMUX bit 4 SLICE[3]: G bit 13 SLICE[3]: FF_SR_SYNC SLICE[2]: G bit 13
B64 - - - - - - - - - - - - - - - - - - SLICE[3]: DYMUX bit 2 SLICE[3]: G bit 14 SLICE[3]: CY0G bit 1 SLICE[2]: G bit 14
B63 - - - - - - - - - - - - - - - - - - - SLICE[3]: G bit 15 SLICE[2]: CY0G bit 0 SLICE[2]: G bit 15
B62 - - - - - - - - - - - - - - - - - - - SLICE[3]: CY0G bit 0 SLICE[3]: FF_LATCH -
B61 - - - - - - - - - - - - - - - - - - SLICE[1]: !invert BX SLICE[3]: CY0G bit 2 SLICE[2]: CY0G bit 2 SLICE[2]: YBMUX bit 0
B60 - - - - - - - - - - - - - - - - - - SLICE[3]: !invert BX SLICE[3]: GYMUX bit 0 SLICE[2]: CY0G bit 1 SLICE[2]: G_SLICEWE0USED
B59 - - - - - - - - - - - - - - - - - - - - SLICE[2]: GYMUX bit 0 SLICE[2]: G_SLICEWE1USED
B58 - - - - - - - - - - - - - - - - - - SLICE[1]: !invert BY SLICE[3]: CY0F bit 2 SLICE[2]: CY0F bit 2 SLICE[2]: XBMUX bit 0
B57 - - - - - - - - - - - - - - - - - - SLICE[3]: !invert BY SLICE[3]: CY0F bit 1 SLICE[2]: CY0F bit 1 SLICE[2]: CYINIT bit 0
B56 - - - - - - - - - - - - - - - - - - - SLICE[3]: CYINIT bit 0 SLICE[2]: CY0F bit 0 -
B55 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 0 SLICE[3]: CY0F bit 0 SLICE[2]: F bit 0
B54 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 1 SLICE[2]: FXMUX bit 0 SLICE[2]: F bit 1
B53 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 2 SLICE[3]: FXMUX bit 0 SLICE[2]: F bit 2
B52 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 3 - SLICE[2]: F bit 3
B51 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 4 - SLICE[2]: F bit 4
B50 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 5 SLICE[2]: FF_LATCH SLICE[2]: F bit 5
B49 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 6 SLICE[2]: F_SLICEWE0USED SLICE[2]: F bit 6
B48 - - - - - - - - - - - - - - - - - - - SLICE[3]: F bit 7 SLICE[2]: F_RAM_ENABLE SLICE[2]: F bit 7
B47 - - - - - - - - - - - - - - - - - - SLICE[3]: DXMUX bit 2 SLICE[3]: F bit 8 SLICE[2]: F_SLICEWE1USED SLICE[2]: F bit 8
B46 - - - - - - - - - - - - - - - - - - SLICE[3]: DXMUX bit 1 SLICE[3]: F bit 9 SLICE[2]: ! FFX_INIT bit 0 SLICE[2]: F bit 9
B45 - - - - - - - - - - - - - - - - - - SLICE[3]: DXMUX bit 4 SLICE[3]: F bit 10 SLICE[3]: ! FFX_INIT bit 0 SLICE[2]: F bit 10
B44 - - - - - - - - - - - - - - - - - - SLICE[3]: DXMUX bit 3 SLICE[3]: F bit 11 SLICE[3]: DXMUX bit 0 SLICE[2]: F bit 11
B43 - - - - - - - - - - - - - - - - - - SLICE[1]: DYMUX bit 4 SLICE[3]: F bit 12 SLICE[2]: DXMUX bit 0 SLICE[2]: F bit 12
B42 - - - - - - - - - - - - - - - - - - SLICE[1]: DYMUX bit 2 SLICE[3]: F bit 13 SLICE[2]: ! FFX_SRVAL bit 0 SLICE[2]: F bit 13
B41 - - - - - - - - - - - - - - - - - - SLICE[1]: DYMUX bit 1 SLICE[3]: F bit 14 SLICE[3]: ! FFX_SRVAL bit 0 SLICE[2]: F bit 14
B40 - - - - - - - - - - - - - - - - - - SLICE[1]: DYMUX bit 3 SLICE[3]: F bit 15 SLICE[2]: G_RAM_ENABLE SLICE[2]: F bit 15
B39 - - - - - - - - - - - - - - - - - - - - SLICE[2]: DIF_MUX bit 0 -
B38 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 0 SLICE[0]: ! FF_SR_ENABLE SLICE[0]: G bit 0
B37 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 1 SLICE[0]: F_SHIFT_ENABLE SLICE[0]: G bit 1
B36 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 2 SLICE[0]: G_SHIFT_ENABLE SLICE[0]: G bit 2
B35 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 3 SLICE[0]: DIG_MUX bit 0 SLICE[0]: G bit 3
B34 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 4 SLICE[0]: ! FFY_INIT bit 0 SLICE[0]: G bit 4
B33 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 5 SLICE[1]: ! FFY_INIT bit 0 SLICE[0]: G bit 5
B32 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 6 SLICE[1]: DYMUX bit 0 SLICE[0]: G bit 6
B31 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 7 SLICE[0]: DYMUX bit 0 SLICE[0]: G bit 7
B30 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 8 SLICE[0]: ! FFY_SRVAL bit 0 SLICE[0]: G bit 8
B29 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 9 SLICE[1]: ! FFY_SRVAL bit 0 SLICE[0]: G bit 9
B28 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 10 SLICE[1]: FF_REV_ENABLE SLICE[0]: G bit 10
B27 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 11 SLICE[0]: FF_REV_ENABLE SLICE[0]: G bit 11
B26 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 12 SLICE[0]: FF_SR_SYNC SLICE[0]: G bit 12
B25 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 13 SLICE[1]: FF_SR_SYNC SLICE[0]: G bit 13
B24 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 14 SLICE[1]: CY0G bit 1 SLICE[0]: G bit 14
B23 - - - - - - - - - - - - - - - - - - - SLICE[1]: G bit 15 SLICE[0]: CY0G bit 0 SLICE[0]: G bit 15
B22 - - - - - - - - - - - - - - - - - - SLICE[0]: !invert BY SLICE[1]: CY0G bit 0 SLICE[1]: FF_LATCH -
B21 - - - - - - - - - - - - - - - - - - SLICE[2]: !invert BY SLICE[1]: CY0G bit 2 SLICE[0]: CY0G bit 2 SLICE[0]: YBMUX bit 0
B20 - - - - - - - - - - - - - - - - - - - SLICE[1]: GYMUX bit 0 SLICE[0]: CY0G bit 1 SLICE[0]: G_SLICEWE0USED
B19 - - - - - - - - - - - - - - - - - - SLICE[0]: !invert BX - SLICE[0]: GYMUX bit 0 SLICE[0]: G_SLICEWE1USED
B18 - - - - - - - - - - - - - - - - - - SLICE[2]: !invert BX SLICE[1]: CY0F bit 2 SLICE[0]: CY0F bit 2 SLICE[0]: XBMUX bit 0
B17 - - - - - - - - - - - - - - - - - - - SLICE[1]: CY0F bit 1 SLICE[0]: CY0F bit 1 SLICE[0]: CYINIT bit 0
B16 - - - - - - - - - - - - - - - - - - - SLICE[1]: CYINIT bit 0 SLICE[0]: CY0F bit 0 -
B15 - - - - - - - - - - - - - - - - - - SLICE[0]: DYMUX bit 4 SLICE[1]: F bit 0 SLICE[1]: CY0F bit 0 SLICE[0]: F bit 0
B14 - - - - - - - - - - - - - - - - - - SLICE[0]: DYMUX bit 3 SLICE[1]: F bit 1 SLICE[0]: FXMUX bit 0 SLICE[0]: F bit 1
B13 - - - - - - - - - - - - - - - - - - SLICE[1]: DXMUX bit 3 SLICE[1]: F bit 2 SLICE[1]: FXMUX bit 0 SLICE[0]: F bit 2
B12 - - - - - - - - - - - - - - - - - - SLICE[1]: DXMUX bit 4 SLICE[1]: F bit 3 - SLICE[0]: F bit 3
B11 - - - - - - - - - - - - - - - - - - SLICE[1]: DXMUX bit 2 SLICE[1]: F bit 4 SLICE[0]: F_SLICEWE1USED SLICE[0]: F bit 4
B10 - - - - - - - - - - - - - - - - - - SLICE[1]: DXMUX bit 1 SLICE[1]: F bit 5 SLICE[0]: FF_LATCH SLICE[0]: F bit 5
B9 - - - - - - - - - - - - - - - - - - SLICE[0]: DXMUX bit 1 SLICE[1]: F bit 6 SLICE[0]: F_SLICEWE0USED SLICE[0]: F bit 6
B8 - - - - - - - - - - - - - - - - - - SLICE[0]: DYMUX bit 1 SLICE[1]: F bit 7 SLICE[0]: F_RAM_ENABLE SLICE[0]: F bit 7
B7 - - - - - - - - - - - - - - - - - - SLICE[0]: DXMUX bit 3 SLICE[1]: F bit 8 SLICE[0]: G_RAM_ENABLE SLICE[0]: F bit 8
B6 - - - - - - - - - - - - - - - - - - - SLICE[1]: F bit 9 SLICE[0]: ! FFX_INIT bit 0 SLICE[0]: F bit 9
B5 - - - - - - - - - - - - - - - - - - SLICE[0]: DYMUX bit 2 SLICE[1]: F bit 10 SLICE[1]: ! FFX_INIT bit 0 SLICE[0]: F bit 10
B4 - - - - - - - - - - - - - - - - - - - SLICE[1]: F bit 11 SLICE[1]: DXMUX bit 0 SLICE[0]: F bit 11
B3 - - - - - - - - - - - - - - - - - - - SLICE[1]: F bit 12 SLICE[0]: DXMUX bit 0 SLICE[0]: F bit 12
B2 - - - - - - - - - - - - - - - - - - SLICE[0]: DXMUX bit 4 SLICE[1]: F bit 13 SLICE[0]: DIF_MUX bit 0 SLICE[0]: F bit 13
B1 - - - - - - - - - - - - - - - - - - - SLICE[1]: F bit 14 SLICE[1]: ! FFX_SRVAL bit 0 SLICE[0]: F bit 14
B0 - - - - - - - - - - - - - - - - - - SLICE[0]: DXMUX bit 2 SLICE[1]: F bit 15 SLICE[0]: ! FFX_SRVAL bit 0 SLICE[0]: F bit 15