PowerPC 405 and Ethernet MAC

Tile PPC

Cells: 62

Bels PPC405

virtex4 PPC bel PPC405 pins
Pin	Direction	PPC
CPMC405CLOCK	in	~CELL_S[5].IMUX_CLK_OPTINV[0]
CPMC405CLOCKFBENABLE	in	~CELL_S[6].IMUX_SR_OPTINV[2]
CPMC405CORECLKINACTIVE	in	CELL_W[15].IMUX_IMUX[5]
CPMC405CPUCLKEN	in	CELL_W[14].IMUX_IMUX[9]
CPMC405JTAGCLKEN	in	CELL_W[14].IMUX_IMUX[10]
CPMC405PLBSAMPLECYCLE	in	CELL_W[12].IMUX_IMUX[7]
CPMC405PLBSAMPLECYCLEALT	in	CELL_W[8].IMUX_IMUX[11]
CPMC405PLBSYNCCLOCK	in	CELL_W[8].IMUX_IMUX[12]
CPMC405SYNCBYPASS	in	CELL_W[11].IMUX_IMUX[4]
CPMC405TIMERCLKEN	in	CELL_W[14].IMUX_IMUX[7]
CPMC405TIMERTICK	in	CELL_W[14].IMUX_IMUX[8]
CPMDCRCLK	in	~CELL_W[7].IMUX_CLK_OPTINV[0]
CPMFCMCLK	in	~CELL_N[5].IMUX_CLK_OPTINV[0]
RSTC405RESETCHIP	in	CELL_W[9].IMUX_IMUX[5]
RSTC405RESETCORE	in	CELL_W[9].IMUX_IMUX[4]
RSTC405RESETSYS	in	CELL_W[9].IMUX_IMUX[6]
MCBCPUCLKEN	in	~CELL_W[14].IMUX_SR_OPTINV[1]
MCBJTAGEN	in	~CELL_W[14].IMUX_SR_OPTINV[0]
MCBTIMEREN	in	~CELL_W[14].IMUX_SR_OPTINV[2]
MCPPCRST	in	~CELL_W[14].IMUX_SR_OPTINV[3]
PLBCLK	in	~CELL_S[3].IMUX_CLK_OPTINV[0]
PLBC405DCUADDRACK	in	CELL_E[8].IMUX_IMUX[8]
PLBC405DCUBUSY	in	CELL_E[8].IMUX_IMUX[10]
PLBC405DCUERR	in	CELL_E[8].IMUX_IMUX[11]
PLBC405DCURDDACK	in	CELL_E[9].IMUX_IMUX[11]
PLBC405DCURDDBUS[63]	in	CELL_E[0].IMUX_IMUX[3]
PLBC405DCURDDBUS[62]	in	CELL_E[0].IMUX_IMUX[2]
PLBC405DCURDDBUS[61]	in	CELL_E[0].IMUX_IMUX[1]
PLBC405DCURDDBUS[60]	in	CELL_E[0].IMUX_IMUX[0]
PLBC405DCURDDBUS[59]	in	CELL_E[1].IMUX_IMUX[3]
PLBC405DCURDDBUS[58]	in	CELL_E[1].IMUX_IMUX[2]
PLBC405DCURDDBUS[57]	in	CELL_E[1].IMUX_IMUX[1]
PLBC405DCURDDBUS[56]	in	CELL_E[1].IMUX_IMUX[0]
PLBC405DCURDDBUS[55]	in	CELL_E[2].IMUX_IMUX[3]
PLBC405DCURDDBUS[54]	in	CELL_E[2].IMUX_IMUX[2]
PLBC405DCURDDBUS[53]	in	CELL_E[2].IMUX_IMUX[1]
PLBC405DCURDDBUS[52]	in	CELL_E[2].IMUX_IMUX[0]
PLBC405DCURDDBUS[51]	in	CELL_E[3].IMUX_IMUX[3]
PLBC405DCURDDBUS[50]	in	CELL_E[3].IMUX_IMUX[2]
PLBC405DCURDDBUS[49]	in	CELL_E[3].IMUX_IMUX[1]
PLBC405DCURDDBUS[48]	in	CELL_E[3].IMUX_IMUX[0]
PLBC405DCURDDBUS[47]	in	CELL_E[4].IMUX_IMUX[3]
PLBC405DCURDDBUS[46]	in	CELL_E[4].IMUX_IMUX[2]
PLBC405DCURDDBUS[45]	in	CELL_E[4].IMUX_IMUX[1]
PLBC405DCURDDBUS[44]	in	CELL_E[4].IMUX_IMUX[0]
PLBC405DCURDDBUS[43]	in	CELL_E[5].IMUX_IMUX[3]
PLBC405DCURDDBUS[42]	in	CELL_E[5].IMUX_IMUX[2]
PLBC405DCURDDBUS[41]	in	CELL_E[5].IMUX_IMUX[1]
PLBC405DCURDDBUS[40]	in	CELL_E[5].IMUX_IMUX[0]
PLBC405DCURDDBUS[39]	in	CELL_E[6].IMUX_IMUX[3]
PLBC405DCURDDBUS[38]	in	CELL_E[6].IMUX_IMUX[2]
PLBC405DCURDDBUS[37]	in	CELL_E[6].IMUX_IMUX[1]
PLBC405DCURDDBUS[36]	in	CELL_E[6].IMUX_IMUX[0]
PLBC405DCURDDBUS[35]	in	CELL_E[7].IMUX_IMUX[3]
PLBC405DCURDDBUS[34]	in	CELL_E[7].IMUX_IMUX[2]
PLBC405DCURDDBUS[33]	in	CELL_E[7].IMUX_IMUX[1]
PLBC405DCURDDBUS[32]	in	CELL_E[7].IMUX_IMUX[0]
PLBC405DCURDDBUS[31]	in	CELL_E[8].IMUX_IMUX[3]
PLBC405DCURDDBUS[30]	in	CELL_E[8].IMUX_IMUX[2]
PLBC405DCURDDBUS[29]	in	CELL_E[8].IMUX_IMUX[1]
PLBC405DCURDDBUS[28]	in	CELL_E[8].IMUX_IMUX[0]
PLBC405DCURDDBUS[27]	in	CELL_E[9].IMUX_IMUX[3]
PLBC405DCURDDBUS[26]	in	CELL_E[9].IMUX_IMUX[2]
PLBC405DCURDDBUS[25]	in	CELL_E[9].IMUX_IMUX[1]
PLBC405DCURDDBUS[24]	in	CELL_E[9].IMUX_IMUX[0]
PLBC405DCURDDBUS[23]	in	CELL_E[10].IMUX_IMUX[3]
PLBC405DCURDDBUS[22]	in	CELL_E[10].IMUX_IMUX[2]
PLBC405DCURDDBUS[21]	in	CELL_E[10].IMUX_IMUX[1]
PLBC405DCURDDBUS[20]	in	CELL_E[10].IMUX_IMUX[0]
PLBC405DCURDDBUS[19]	in	CELL_E[11].IMUX_IMUX[3]
PLBC405DCURDDBUS[18]	in	CELL_E[11].IMUX_IMUX[2]
PLBC405DCURDDBUS[17]	in	CELL_E[11].IMUX_IMUX[1]
PLBC405DCURDDBUS[16]	in	CELL_E[11].IMUX_IMUX[0]
PLBC405DCURDDBUS[15]	in	CELL_E[12].IMUX_IMUX[3]
PLBC405DCURDDBUS[14]	in	CELL_E[12].IMUX_IMUX[2]
PLBC405DCURDDBUS[13]	in	CELL_E[12].IMUX_IMUX[1]
PLBC405DCURDDBUS[12]	in	CELL_E[12].IMUX_IMUX[0]
PLBC405DCURDDBUS[11]	in	CELL_E[13].IMUX_IMUX[3]
PLBC405DCURDDBUS[10]	in	CELL_E[13].IMUX_IMUX[2]
PLBC405DCURDDBUS[9]	in	CELL_E[13].IMUX_IMUX[1]
PLBC405DCURDDBUS[8]	in	CELL_E[13].IMUX_IMUX[0]
PLBC405DCURDDBUS[7]	in	CELL_E[15].IMUX_IMUX[3]
PLBC405DCURDDBUS[6]	in	CELL_E[15].IMUX_IMUX[2]
PLBC405DCURDDBUS[5]	in	CELL_E[15].IMUX_IMUX[1]
PLBC405DCURDDBUS[4]	in	CELL_E[15].IMUX_IMUX[0]
PLBC405DCURDDBUS[3]	in	CELL_E[17].IMUX_IMUX[7]
PLBC405DCURDDBUS[2]	in	CELL_E[17].IMUX_IMUX[6]
PLBC405DCURDDBUS[1]	in	CELL_E[17].IMUX_IMUX[5]
PLBC405DCURDDBUS[0]	in	CELL_E[17].IMUX_IMUX[4]
PLBC405DCURDWDADDR[3]	in	CELL_E[9].IMUX_IMUX[10]
PLBC405DCURDWDADDR[2]	in	CELL_E[9].IMUX_IMUX[9]
PLBC405DCURDWDADDR[1]	in	CELL_E[9].IMUX_IMUX[8]
PLBC405DCUSSIZE1	in	CELL_E[8].IMUX_IMUX[9]
PLBC405DCUWRDACK	in	CELL_E[10].IMUX_IMUX[8]
PLBC405ICUADDRACK	in	CELL_E[7].IMUX_IMUX[8]
PLBC405ICUBUSY	in	CELL_E[7].IMUX_IMUX[10]
PLBC405ICUERR	in	CELL_E[7].IMUX_IMUX[11]
PLBC405ICURDDACK	in	CELL_E[6].IMUX_IMUX[11]
PLBC405ICURDDBUS[63]	in	CELL_E[0].IMUX_IMUX[7]
PLBC405ICURDDBUS[62]	in	CELL_E[0].IMUX_IMUX[6]
PLBC405ICURDDBUS[61]	in	CELL_E[0].IMUX_IMUX[5]
PLBC405ICURDDBUS[60]	in	CELL_E[0].IMUX_IMUX[4]
PLBC405ICURDDBUS[59]	in	CELL_E[1].IMUX_IMUX[7]
PLBC405ICURDDBUS[58]	in	CELL_E[1].IMUX_IMUX[6]
PLBC405ICURDDBUS[57]	in	CELL_E[1].IMUX_IMUX[5]
PLBC405ICURDDBUS[56]	in	CELL_E[1].IMUX_IMUX[4]
PLBC405ICURDDBUS[55]	in	CELL_E[2].IMUX_IMUX[7]
PLBC405ICURDDBUS[54]	in	CELL_E[2].IMUX_IMUX[6]
PLBC405ICURDDBUS[53]	in	CELL_E[2].IMUX_IMUX[5]
PLBC405ICURDDBUS[52]	in	CELL_E[2].IMUX_IMUX[4]
PLBC405ICURDDBUS[51]	in	CELL_E[3].IMUX_IMUX[7]
PLBC405ICURDDBUS[50]	in	CELL_E[3].IMUX_IMUX[6]
PLBC405ICURDDBUS[49]	in	CELL_E[3].IMUX_IMUX[5]
PLBC405ICURDDBUS[48]	in	CELL_E[3].IMUX_IMUX[4]
PLBC405ICURDDBUS[47]	in	CELL_E[4].IMUX_IMUX[7]
PLBC405ICURDDBUS[46]	in	CELL_E[4].IMUX_IMUX[6]
PLBC405ICURDDBUS[45]	in	CELL_E[4].IMUX_IMUX[5]
PLBC405ICURDDBUS[44]	in	CELL_E[4].IMUX_IMUX[4]
PLBC405ICURDDBUS[43]	in	CELL_E[5].IMUX_IMUX[7]
PLBC405ICURDDBUS[42]	in	CELL_E[5].IMUX_IMUX[6]
PLBC405ICURDDBUS[41]	in	CELL_E[5].IMUX_IMUX[5]
PLBC405ICURDDBUS[40]	in	CELL_E[5].IMUX_IMUX[4]
PLBC405ICURDDBUS[39]	in	CELL_E[6].IMUX_IMUX[7]
PLBC405ICURDDBUS[38]	in	CELL_E[6].IMUX_IMUX[6]
PLBC405ICURDDBUS[37]	in	CELL_E[6].IMUX_IMUX[5]
PLBC405ICURDDBUS[36]	in	CELL_E[6].IMUX_IMUX[4]
PLBC405ICURDDBUS[35]	in	CELL_E[7].IMUX_IMUX[7]
PLBC405ICURDDBUS[34]	in	CELL_E[7].IMUX_IMUX[6]
PLBC405ICURDDBUS[33]	in	CELL_E[7].IMUX_IMUX[5]
PLBC405ICURDDBUS[32]	in	CELL_E[7].IMUX_IMUX[4]
PLBC405ICURDDBUS[31]	in	CELL_E[8].IMUX_IMUX[7]
PLBC405ICURDDBUS[30]	in	CELL_E[8].IMUX_IMUX[6]
PLBC405ICURDDBUS[29]	in	CELL_E[8].IMUX_IMUX[5]
PLBC405ICURDDBUS[28]	in	CELL_E[8].IMUX_IMUX[4]
PLBC405ICURDDBUS[27]	in	CELL_E[9].IMUX_IMUX[7]
PLBC405ICURDDBUS[26]	in	CELL_E[9].IMUX_IMUX[6]
PLBC405ICURDDBUS[25]	in	CELL_E[9].IMUX_IMUX[5]
PLBC405ICURDDBUS[24]	in	CELL_E[9].IMUX_IMUX[4]
PLBC405ICURDDBUS[23]	in	CELL_E[10].IMUX_IMUX[7]
PLBC405ICURDDBUS[22]	in	CELL_E[10].IMUX_IMUX[6]
PLBC405ICURDDBUS[21]	in	CELL_E[10].IMUX_IMUX[5]
PLBC405ICURDDBUS[20]	in	CELL_E[10].IMUX_IMUX[4]
PLBC405ICURDDBUS[19]	in	CELL_E[11].IMUX_IMUX[7]
PLBC405ICURDDBUS[18]	in	CELL_E[11].IMUX_IMUX[6]
PLBC405ICURDDBUS[17]	in	CELL_E[11].IMUX_IMUX[5]
PLBC405ICURDDBUS[16]	in	CELL_E[11].IMUX_IMUX[4]
PLBC405ICURDDBUS[15]	in	CELL_E[12].IMUX_IMUX[7]
PLBC405ICURDDBUS[14]	in	CELL_E[12].IMUX_IMUX[6]
PLBC405ICURDDBUS[13]	in	CELL_E[12].IMUX_IMUX[5]
PLBC405ICURDDBUS[12]	in	CELL_E[12].IMUX_IMUX[4]
PLBC405ICURDDBUS[11]	in	CELL_E[13].IMUX_IMUX[7]
PLBC405ICURDDBUS[10]	in	CELL_E[13].IMUX_IMUX[6]
PLBC405ICURDDBUS[9]	in	CELL_E[13].IMUX_IMUX[5]
PLBC405ICURDDBUS[8]	in	CELL_E[13].IMUX_IMUX[4]
PLBC405ICURDDBUS[7]	in	CELL_E[14].IMUX_IMUX[3]
PLBC405ICURDDBUS[6]	in	CELL_E[14].IMUX_IMUX[2]
PLBC405ICURDDBUS[5]	in	CELL_E[14].IMUX_IMUX[1]
PLBC405ICURDDBUS[4]	in	CELL_E[14].IMUX_IMUX[0]
PLBC405ICURDDBUS[3]	in	CELL_E[16].IMUX_IMUX[15]
PLBC405ICURDDBUS[2]	in	CELL_E[16].IMUX_IMUX[14]
PLBC405ICURDDBUS[1]	in	CELL_E[16].IMUX_IMUX[13]
PLBC405ICURDDBUS[0]	in	CELL_E[16].IMUX_IMUX[12]
PLBC405ICURDWDADDR[3]	in	CELL_E[6].IMUX_IMUX[10]
PLBC405ICURDWDADDR[2]	in	CELL_E[6].IMUX_IMUX[9]
PLBC405ICURDWDADDR[1]	in	CELL_E[6].IMUX_IMUX[8]
PLBC405ICUSSIZE1	in	CELL_E[7].IMUX_IMUX[9]
EXTDCRACK	in	CELL_W[15].IMUX_IMUX[4]
EXTDCRDBUSIN[31]	in	CELL_W[8].IMUX_IMUX[3]
EXTDCRDBUSIN[30]	in	CELL_W[8].IMUX_IMUX[2]
EXTDCRDBUSIN[29]	in	CELL_W[8].IMUX_IMUX[1]
EXTDCRDBUSIN[28]	in	CELL_W[8].IMUX_IMUX[0]
EXTDCRDBUSIN[27]	in	CELL_W[9].IMUX_IMUX[3]
EXTDCRDBUSIN[26]	in	CELL_W[9].IMUX_IMUX[2]
EXTDCRDBUSIN[25]	in	CELL_W[9].IMUX_IMUX[1]
EXTDCRDBUSIN[24]	in	CELL_W[9].IMUX_IMUX[0]
EXTDCRDBUSIN[23]	in	CELL_W[10].IMUX_IMUX[3]
EXTDCRDBUSIN[22]	in	CELL_W[10].IMUX_IMUX[2]
EXTDCRDBUSIN[21]	in	CELL_W[10].IMUX_IMUX[1]
EXTDCRDBUSIN[20]	in	CELL_W[10].IMUX_IMUX[0]
EXTDCRDBUSIN[19]	in	CELL_W[11].IMUX_IMUX[3]
EXTDCRDBUSIN[18]	in	CELL_W[11].IMUX_IMUX[2]
EXTDCRDBUSIN[17]	in	CELL_W[11].IMUX_IMUX[1]
EXTDCRDBUSIN[16]	in	CELL_W[11].IMUX_IMUX[0]
EXTDCRDBUSIN[15]	in	CELL_W[12].IMUX_IMUX[3]
EXTDCRDBUSIN[14]	in	CELL_W[12].IMUX_IMUX[2]
EXTDCRDBUSIN[13]	in	CELL_W[12].IMUX_IMUX[1]
EXTDCRDBUSIN[12]	in	CELL_W[12].IMUX_IMUX[0]
EXTDCRDBUSIN[11]	in	CELL_W[13].IMUX_IMUX[3]
EXTDCRDBUSIN[10]	in	CELL_W[13].IMUX_IMUX[2]
EXTDCRDBUSIN[9]	in	CELL_W[13].IMUX_IMUX[1]
EXTDCRDBUSIN[8]	in	CELL_W[13].IMUX_IMUX[0]
EXTDCRDBUSIN[7]	in	CELL_W[14].IMUX_IMUX[3]
EXTDCRDBUSIN[6]	in	CELL_W[14].IMUX_IMUX[2]
EXTDCRDBUSIN[5]	in	CELL_W[14].IMUX_IMUX[1]
EXTDCRDBUSIN[4]	in	CELL_W[14].IMUX_IMUX[0]
EXTDCRDBUSIN[3]	in	CELL_W[15].IMUX_IMUX[3]
EXTDCRDBUSIN[2]	in	CELL_W[15].IMUX_IMUX[2]
EXTDCRDBUSIN[1]	in	CELL_W[15].IMUX_IMUX[1]
EXTDCRDBUSIN[0]	in	CELL_W[15].IMUX_IMUX[0]
TIEDCRADDR[5]	in	~CELL_W[7].IMUX_CE_OPTINV[0]
TIEDCRADDR[4]	in	~CELL_W[6].IMUX_SR_OPTINV[0]
TIEDCRADDR[3]	in	~CELL_W[6].IMUX_CE_OPTINV[3]
TIEDCRADDR[2]	in	~CELL_W[6].IMUX_CE_OPTINV[2]
TIEDCRADDR[1]	in	~CELL_W[6].IMUX_CE_OPTINV[1]
TIEDCRADDR[0]	in	~CELL_W[6].IMUX_CE_OPTINV[0]
TSTC405DCRABUSI[9]	in	CELL_E[5].IMUX_IMUX[9]
TSTC405DCRABUSI[8]	in	CELL_E[5].IMUX_IMUX[8]
TSTC405DCRABUSI[7]	in	CELL_E[4].IMUX_IMUX[11]
TSTC405DCRABUSI[6]	in	CELL_E[4].IMUX_IMUX[10]
TSTC405DCRABUSI[5]	in	CELL_E[4].IMUX_IMUX[9]
TSTC405DCRABUSI[4]	in	CELL_E[4].IMUX_IMUX[8]
TSTC405DCRABUSI[3]	in	CELL_E[3].IMUX_IMUX[11]
TSTC405DCRABUSI[2]	in	CELL_E[3].IMUX_IMUX[10]
TSTC405DCRABUSI[1]	in	CELL_E[3].IMUX_IMUX[9]
TSTC405DCRABUSI[0]	in	CELL_E[3].IMUX_IMUX[8]
TSTC405DCRDBUSOUTI[31]	in	CELL_E[11].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[30]	in	CELL_E[11].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[29]	in	CELL_E[11].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[28]	in	CELL_E[11].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[27]	in	CELL_E[12].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[26]	in	CELL_E[12].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[25]	in	CELL_E[12].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[24]	in	CELL_E[12].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[23]	in	CELL_E[16].IMUX_IMUX[19]
TSTC405DCRDBUSOUTI[22]	in	CELL_E[16].IMUX_IMUX[18]
TSTC405DCRDBUSOUTI[21]	in	CELL_E[16].IMUX_IMUX[17]
TSTC405DCRDBUSOUTI[20]	in	CELL_E[16].IMUX_IMUX[16]
TSTC405DCRDBUSOUTI[19]	in	CELL_E[17].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[18]	in	CELL_E[17].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[17]	in	CELL_E[17].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[16]	in	CELL_E[17].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[15]	in	CELL_E[18].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[14]	in	CELL_E[18].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[13]	in	CELL_E[18].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[12]	in	CELL_E[18].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[11]	in	CELL_E[20].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[10]	in	CELL_E[20].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[9]	in	CELL_E[20].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[8]	in	CELL_E[20].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[7]	in	CELL_E[21].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[6]	in	CELL_E[21].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[5]	in	CELL_E[21].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[4]	in	CELL_E[21].IMUX_IMUX[12]
TSTC405DCRDBUSOUTI[3]	in	CELL_E[22].IMUX_IMUX[15]
TSTC405DCRDBUSOUTI[2]	in	CELL_E[22].IMUX_IMUX[14]
TSTC405DCRDBUSOUTI[1]	in	CELL_E[22].IMUX_IMUX[13]
TSTC405DCRDBUSOUTI[0]	in	CELL_E[22].IMUX_IMUX[12]
TSTC405DCRREADI	in	CELL_E[5].IMUX_IMUX[10]
TSTC405DCRWRITEI	in	CELL_E[5].IMUX_IMUX[11]
EICC405CRITINPUTIRQ	in	CELL_S[5].IMUX_IMUX[8]
EICC405EXTINPUTIRQ	in	CELL_S[5].IMUX_IMUX[9]
DBGC405DEBUGHALT	in	CELL_W[14].IMUX_IMUX[4]
DBGC405EXTBUSHOLDACK	in	CELL_W[14].IMUX_IMUX[5]
DBGC405UNCONDDEBUGEVENT	in	CELL_W[14].IMUX_IMUX[6]
JTGC405BNDSCANTDO	in	CELL_S[6].IMUX_IMUX[8]
JTGC405TCK	in	~CELL_S[4].IMUX_CLK_OPTINV[0]
JTGC405TDI	in	CELL_S[6].IMUX_IMUX[9]
JTGC405TMS	in	CELL_S[6].IMUX_IMUX[10]
JTGC405TRSTNEG	in	CELL_S[6].IMUX_IMUX[11]
TRCC405TRACEDISABLE	in	CELL_E[0].IMUX_IMUX[8]
TRCC405TRIGGEREVENTIN	in	CELL_E[0].IMUX_IMUX[9]
BRAMDSOCMCLK	in	~CELL_N[0].IMUX_CLK_OPTINV[0]
BRAMDSOCMRDDBUS[31]	in	CELL_N[6].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[30]	in	CELL_N[6].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[29]	in	CELL_N[6].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[28]	in	CELL_N[6].IMUX_IMUX[0]
BRAMDSOCMRDDBUS[27]	in	CELL_N[5].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[26]	in	CELL_N[5].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[25]	in	CELL_N[5].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[24]	in	CELL_N[5].IMUX_IMUX[0]
BRAMDSOCMRDDBUS[23]	in	CELL_N[4].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[22]	in	CELL_N[4].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[21]	in	CELL_N[4].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[20]	in	CELL_N[4].IMUX_IMUX[0]
BRAMDSOCMRDDBUS[19]	in	CELL_N[3].IMUX_IMUX[7]
BRAMDSOCMRDDBUS[18]	in	CELL_N[3].IMUX_IMUX[6]
BRAMDSOCMRDDBUS[17]	in	CELL_N[3].IMUX_IMUX[5]
BRAMDSOCMRDDBUS[16]	in	CELL_N[3].IMUX_IMUX[4]
BRAMDSOCMRDDBUS[15]	in	CELL_N[3].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[14]	in	CELL_N[3].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[13]	in	CELL_N[3].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[12]	in	CELL_N[3].IMUX_IMUX[0]
BRAMDSOCMRDDBUS[11]	in	CELL_N[2].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[10]	in	CELL_N[2].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[9]	in	CELL_N[2].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[8]	in	CELL_N[2].IMUX_IMUX[0]
BRAMDSOCMRDDBUS[7]	in	CELL_N[0].IMUX_IMUX[7]
BRAMDSOCMRDDBUS[6]	in	CELL_N[0].IMUX_IMUX[6]
BRAMDSOCMRDDBUS[5]	in	CELL_N[0].IMUX_IMUX[5]
BRAMDSOCMRDDBUS[4]	in	CELL_N[0].IMUX_IMUX[4]
BRAMDSOCMRDDBUS[3]	in	CELL_N[0].IMUX_IMUX[3]
BRAMDSOCMRDDBUS[2]	in	CELL_N[0].IMUX_IMUX[2]
BRAMDSOCMRDDBUS[1]	in	CELL_N[0].IMUX_IMUX[1]
BRAMDSOCMRDDBUS[0]	in	CELL_N[0].IMUX_IMUX[0]
DSARCVALUE[7]	in	~CELL_N[0].IMUX_SR_OPTINV[3]
DSARCVALUE[6]	in	~CELL_N[0].IMUX_SR_OPTINV[2]
DSARCVALUE[5]	in	~CELL_N[0].IMUX_SR_OPTINV[1]
DSARCVALUE[4]	in	~CELL_N[0].IMUX_SR_OPTINV[0]
DSARCVALUE[3]	in	~CELL_N[0].IMUX_CE_OPTINV[3]
DSARCVALUE[2]	in	~CELL_N[0].IMUX_CE_OPTINV[2]
DSARCVALUE[1]	in	~CELL_N[0].IMUX_CE_OPTINV[1]
DSARCVALUE[0]	in	~CELL_N[0].IMUX_CE_OPTINV[0]
DSCNTLVALUE[7]	in	~CELL_N[1].IMUX_SR_OPTINV[3]
DSCNTLVALUE[6]	in	~CELL_N[1].IMUX_SR_OPTINV[2]
DSCNTLVALUE[5]	in	~CELL_N[1].IMUX_SR_OPTINV[1]
DSCNTLVALUE[4]	in	~CELL_N[1].IMUX_SR_OPTINV[0]
DSCNTLVALUE[3]	in	~CELL_N[1].IMUX_CE_OPTINV[3]
DSCNTLVALUE[2]	in	~CELL_N[1].IMUX_CE_OPTINV[2]
DSCNTLVALUE[1]	in	~CELL_N[1].IMUX_CE_OPTINV[1]
DSCNTLVALUE[0]	in	~CELL_N[1].IMUX_CE_OPTINV[0]
DSOCMRWCOMPLETE	in	CELL_N[2].IMUX_IMUX[7]
TSTC405DSOCMABORTOPI	in	CELL_E[15].IMUX_IMUX[15]
TSTC405DSOCMABORTREQI	in	CELL_E[15].IMUX_IMUX[14]
TSTC405DSOCMABUSI[29]	in	CELL_E[15].IMUX_IMUX[9]
TSTC405DSOCMABUSI[28]	in	CELL_E[15].IMUX_IMUX[8]
TSTC405DSOCMABUSI[27]	in	CELL_E[17].IMUX_IMUX[11]
TSTC405DSOCMABUSI[26]	in	CELL_E[17].IMUX_IMUX[10]
TSTC405DSOCMABUSI[25]	in	CELL_E[17].IMUX_IMUX[9]
TSTC405DSOCMABUSI[24]	in	CELL_E[17].IMUX_IMUX[8]
TSTC405DSOCMABUSI[23]	in	CELL_E[18].IMUX_IMUX[11]
TSTC405DSOCMABUSI[22]	in	CELL_E[18].IMUX_IMUX[10]
TSTC405DSOCMABUSI[21]	in	CELL_E[18].IMUX_IMUX[9]
TSTC405DSOCMABUSI[20]	in	CELL_E[18].IMUX_IMUX[8]
TSTC405DSOCMABUSI[19]	in	CELL_E[19].IMUX_IMUX[11]
TSTC405DSOCMABUSI[18]	in	CELL_E[19].IMUX_IMUX[10]
TSTC405DSOCMABUSI[17]	in	CELL_E[19].IMUX_IMUX[9]
TSTC405DSOCMABUSI[16]	in	CELL_E[19].IMUX_IMUX[8]
TSTC405DSOCMABUSI[15]	in	CELL_W[11].IMUX_IMUX[8]
TSTC405DSOCMABUSI[14]	in	CELL_W[11].IMUX_IMUX[7]
TSTC405DSOCMABUSI[13]	in	CELL_W[11].IMUX_IMUX[6]
TSTC405DSOCMABUSI[12]	in	CELL_W[11].IMUX_IMUX[5]
TSTC405DSOCMABUSI[11]	in	CELL_W[12].IMUX_IMUX[11]
TSTC405DSOCMABUSI[10]	in	CELL_W[12].IMUX_IMUX[10]
TSTC405DSOCMABUSI[9]	in	CELL_W[12].IMUX_IMUX[9]
TSTC405DSOCMABUSI[8]	in	CELL_W[12].IMUX_IMUX[8]
TSTC405DSOCMABUSI[7]	in	CELL_W[13].IMUX_IMUX[11]
TSTC405DSOCMABUSI[6]	in	CELL_W[13].IMUX_IMUX[10]
TSTC405DSOCMABUSI[5]	in	CELL_W[13].IMUX_IMUX[9]
TSTC405DSOCMABUSI[4]	in	CELL_W[13].IMUX_IMUX[8]
TSTC405DSOCMABUSI[3]	in	CELL_W[14].IMUX_IMUX[14]
TSTC405DSOCMABUSI[2]	in	CELL_W[14].IMUX_IMUX[13]
TSTC405DSOCMABUSI[1]	in	CELL_W[14].IMUX_IMUX[12]
TSTC405DSOCMABUSI[0]	in	CELL_W[14].IMUX_IMUX[11]
TSTC405DSOCMBYTEENI[3]	in	CELL_E[15].IMUX_IMUX[13]
TSTC405DSOCMBYTEENI[2]	in	CELL_E[15].IMUX_IMUX[12]
TSTC405DSOCMBYTEENI[1]	in	CELL_E[15].IMUX_IMUX[11]
TSTC405DSOCMBYTEENI[0]	in	CELL_E[15].IMUX_IMUX[10]
TSTC405DSOCMLOADREQI	in	CELL_E[19].IMUX_IMUX[12]
TSTC405DSOCMSTOREREQI	in	CELL_E[19].IMUX_IMUX[13]
TSTC405DSOCMWAITI	in	CELL_E[19].IMUX_IMUX[14]
TSTC405DSOCMWRDBUSI[31]	in	CELL_E[15].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[30]	in	CELL_E[15].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[29]	in	CELL_E[15].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[28]	in	CELL_E[15].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[27]	in	CELL_E[17].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[26]	in	CELL_E[17].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[25]	in	CELL_E[17].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[24]	in	CELL_E[17].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[23]	in	CELL_E[18].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[22]	in	CELL_E[18].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[21]	in	CELL_E[18].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[20]	in	CELL_E[18].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[19]	in	CELL_E[19].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[18]	in	CELL_E[19].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[17]	in	CELL_E[19].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[16]	in	CELL_E[19].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[15]	in	CELL_E[20].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[14]	in	CELL_E[20].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[13]	in	CELL_E[20].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[12]	in	CELL_E[20].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[11]	in	CELL_E[21].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[10]	in	CELL_E[21].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[9]	in	CELL_E[21].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[8]	in	CELL_E[21].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[7]	in	CELL_E[22].IMUX_IMUX[19]
TSTC405DSOCMWRDBUSI[6]	in	CELL_E[22].IMUX_IMUX[18]
TSTC405DSOCMWRDBUSI[5]	in	CELL_E[22].IMUX_IMUX[17]
TSTC405DSOCMWRDBUSI[4]	in	CELL_E[22].IMUX_IMUX[16]
TSTC405DSOCMWRDBUSI[3]	in	CELL_E[23].IMUX_IMUX[15]
TSTC405DSOCMWRDBUSI[2]	in	CELL_E[23].IMUX_IMUX[14]
TSTC405DSOCMWRDBUSI[1]	in	CELL_E[23].IMUX_IMUX[13]
TSTC405DSOCMWRDBUSI[0]	in	CELL_E[23].IMUX_IMUX[12]
TSTC405DSOCMXLTVALIDI	in	CELL_E[19].IMUX_IMUX[15]
TSTDSOCMC405COMPLETEI	in	CELL_N[2].IMUX_IMUX[10]
TSTDSOCMC405DISOPERANDFWDI	in	CELL_N[2].IMUX_IMUX[11]
TSTDSOCMC405HOLDI	in	CELL_N[3].IMUX_IMUX[13]
TSTDSOCMC405RDDBUSI[31]	in	CELL_N[0].IMUX_IMUX[15]
TSTDSOCMC405RDDBUSI[30]	in	CELL_N[0].IMUX_IMUX[14]
TSTDSOCMC405RDDBUSI[29]	in	CELL_N[0].IMUX_IMUX[13]
TSTDSOCMC405RDDBUSI[28]	in	CELL_N[0].IMUX_IMUX[12]
TSTDSOCMC405RDDBUSI[27]	in	CELL_N[0].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[26]	in	CELL_N[0].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[25]	in	CELL_N[0].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[24]	in	CELL_N[0].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[23]	in	CELL_N[1].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[22]	in	CELL_N[1].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[21]	in	CELL_N[1].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[20]	in	CELL_N[1].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[19]	in	CELL_N[2].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[18]	in	CELL_N[2].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[17]	in	CELL_N[2].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[16]	in	CELL_N[2].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[15]	in	CELL_N[3].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[14]	in	CELL_N[3].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[13]	in	CELL_N[3].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[12]	in	CELL_N[3].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[11]	in	CELL_N[4].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[10]	in	CELL_N[4].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[9]	in	CELL_N[4].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[8]	in	CELL_N[4].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[7]	in	CELL_N[5].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[6]	in	CELL_N[5].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[5]	in	CELL_N[5].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[4]	in	CELL_N[5].IMUX_IMUX[16]
TSTDSOCMC405RDDBUSI[3]	in	CELL_N[6].IMUX_IMUX[19]
TSTDSOCMC405RDDBUSI[2]	in	CELL_N[6].IMUX_IMUX[18]
TSTDSOCMC405RDDBUSI[1]	in	CELL_N[6].IMUX_IMUX[17]
TSTDSOCMC405RDDBUSI[0]	in	CELL_N[6].IMUX_IMUX[16]
BRAMISOCMCLK	in	~CELL_S[6].IMUX_CLK_OPTINV[0]
BRAMISOCMDCRRDDBUS[31]	in	CELL_S[1].IMUX_IMUX[15]
BRAMISOCMDCRRDDBUS[30]	in	CELL_S[1].IMUX_IMUX[14]
BRAMISOCMDCRRDDBUS[29]	in	CELL_S[1].IMUX_IMUX[13]
BRAMISOCMDCRRDDBUS[28]	in	CELL_S[1].IMUX_IMUX[12]
BRAMISOCMDCRRDDBUS[27]	in	CELL_S[2].IMUX_IMUX[15]
BRAMISOCMDCRRDDBUS[26]	in	CELL_S[2].IMUX_IMUX[14]
BRAMISOCMDCRRDDBUS[25]	in	CELL_S[2].IMUX_IMUX[13]
BRAMISOCMDCRRDDBUS[24]	in	CELL_S[2].IMUX_IMUX[12]
BRAMISOCMDCRRDDBUS[23]	in	CELL_S[2].IMUX_IMUX[11]
BRAMISOCMDCRRDDBUS[22]	in	CELL_S[2].IMUX_IMUX[10]
BRAMISOCMDCRRDDBUS[21]	in	CELL_S[2].IMUX_IMUX[9]
BRAMISOCMDCRRDDBUS[20]	in	CELL_S[2].IMUX_IMUX[8]
BRAMISOCMDCRRDDBUS[19]	in	CELL_S[3].IMUX_IMUX[15]
BRAMISOCMDCRRDDBUS[18]	in	CELL_S[3].IMUX_IMUX[14]
BRAMISOCMDCRRDDBUS[17]	in	CELL_S[3].IMUX_IMUX[13]
BRAMISOCMDCRRDDBUS[16]	in	CELL_S[3].IMUX_IMUX[12]
BRAMISOCMDCRRDDBUS[15]	in	CELL_S[3].IMUX_IMUX[11]
BRAMISOCMDCRRDDBUS[14]	in	CELL_S[3].IMUX_IMUX[10]
BRAMISOCMDCRRDDBUS[13]	in	CELL_S[3].IMUX_IMUX[9]
BRAMISOCMDCRRDDBUS[12]	in	CELL_S[3].IMUX_IMUX[8]
BRAMISOCMDCRRDDBUS[11]	in	CELL_S[4].IMUX_IMUX[11]
BRAMISOCMDCRRDDBUS[10]	in	CELL_S[4].IMUX_IMUX[10]
BRAMISOCMDCRRDDBUS[9]	in	CELL_S[4].IMUX_IMUX[9]
BRAMISOCMDCRRDDBUS[8]	in	CELL_S[4].IMUX_IMUX[8]
BRAMISOCMDCRRDDBUS[7]	in	CELL_S[5].IMUX_IMUX[13]
BRAMISOCMDCRRDDBUS[6]	in	CELL_S[5].IMUX_IMUX[12]
BRAMISOCMDCRRDDBUS[5]	in	CELL_S[5].IMUX_IMUX[11]
BRAMISOCMDCRRDDBUS[4]	in	CELL_S[5].IMUX_IMUX[10]
BRAMISOCMDCRRDDBUS[3]	in	CELL_S[6].IMUX_IMUX[15]
BRAMISOCMDCRRDDBUS[2]	in	CELL_S[6].IMUX_IMUX[14]
BRAMISOCMDCRRDDBUS[1]	in	CELL_S[6].IMUX_IMUX[13]
BRAMISOCMDCRRDDBUS[0]	in	CELL_S[6].IMUX_IMUX[12]
BRAMISOCMRDDBUS[63]	in	CELL_S[1].IMUX_IMUX[11]
BRAMISOCMRDDBUS[62]	in	CELL_S[1].IMUX_IMUX[10]
BRAMISOCMRDDBUS[61]	in	CELL_S[1].IMUX_IMUX[9]
BRAMISOCMRDDBUS[60]	in	CELL_S[1].IMUX_IMUX[8]
BRAMISOCMRDDBUS[59]	in	CELL_S[0].IMUX_IMUX[7]
BRAMISOCMRDDBUS[58]	in	CELL_S[0].IMUX_IMUX[6]
BRAMISOCMRDDBUS[57]	in	CELL_S[0].IMUX_IMUX[5]
BRAMISOCMRDDBUS[56]	in	CELL_S[0].IMUX_IMUX[4]
BRAMISOCMRDDBUS[55]	in	CELL_S[1].IMUX_IMUX[7]
BRAMISOCMRDDBUS[54]	in	CELL_S[1].IMUX_IMUX[6]
BRAMISOCMRDDBUS[53]	in	CELL_S[1].IMUX_IMUX[5]
BRAMISOCMRDDBUS[52]	in	CELL_S[1].IMUX_IMUX[4]
BRAMISOCMRDDBUS[51]	in	CELL_S[2].IMUX_IMUX[7]
BRAMISOCMRDDBUS[50]	in	CELL_S[2].IMUX_IMUX[6]
BRAMISOCMRDDBUS[49]	in	CELL_S[2].IMUX_IMUX[5]
BRAMISOCMRDDBUS[48]	in	CELL_S[2].IMUX_IMUX[4]
BRAMISOCMRDDBUS[47]	in	CELL_S[0].IMUX_IMUX[11]
BRAMISOCMRDDBUS[46]	in	CELL_S[0].IMUX_IMUX[10]
BRAMISOCMRDDBUS[45]	in	CELL_S[0].IMUX_IMUX[9]
BRAMISOCMRDDBUS[44]	in	CELL_S[0].IMUX_IMUX[8]
BRAMISOCMRDDBUS[43]	in	CELL_S[0].IMUX_IMUX[3]
BRAMISOCMRDDBUS[42]	in	CELL_S[0].IMUX_IMUX[2]
BRAMISOCMRDDBUS[41]	in	CELL_S[0].IMUX_IMUX[1]
BRAMISOCMRDDBUS[40]	in	CELL_S[0].IMUX_IMUX[0]
BRAMISOCMRDDBUS[39]	in	CELL_S[1].IMUX_IMUX[3]
BRAMISOCMRDDBUS[38]	in	CELL_S[1].IMUX_IMUX[2]
BRAMISOCMRDDBUS[37]	in	CELL_S[1].IMUX_IMUX[1]
BRAMISOCMRDDBUS[36]	in	CELL_S[1].IMUX_IMUX[0]
BRAMISOCMRDDBUS[35]	in	CELL_S[2].IMUX_IMUX[3]
BRAMISOCMRDDBUS[34]	in	CELL_S[2].IMUX_IMUX[2]
BRAMISOCMRDDBUS[33]	in	CELL_S[2].IMUX_IMUX[1]
BRAMISOCMRDDBUS[32]	in	CELL_S[2].IMUX_IMUX[0]
BRAMISOCMRDDBUS[31]	in	CELL_S[3].IMUX_IMUX[7]
BRAMISOCMRDDBUS[30]	in	CELL_S[3].IMUX_IMUX[6]
BRAMISOCMRDDBUS[29]	in	CELL_S[3].IMUX_IMUX[5]
BRAMISOCMRDDBUS[28]	in	CELL_S[3].IMUX_IMUX[4]
BRAMISOCMRDDBUS[27]	in	CELL_S[4].IMUX_IMUX[7]
BRAMISOCMRDDBUS[26]	in	CELL_S[4].IMUX_IMUX[6]
BRAMISOCMRDDBUS[25]	in	CELL_S[4].IMUX_IMUX[5]
BRAMISOCMRDDBUS[24]	in	CELL_S[4].IMUX_IMUX[4]
BRAMISOCMRDDBUS[23]	in	CELL_S[5].IMUX_IMUX[7]
BRAMISOCMRDDBUS[22]	in	CELL_S[5].IMUX_IMUX[6]
BRAMISOCMRDDBUS[21]	in	CELL_S[5].IMUX_IMUX[5]
BRAMISOCMRDDBUS[20]	in	CELL_S[5].IMUX_IMUX[4]
BRAMISOCMRDDBUS[19]	in	CELL_S[6].IMUX_IMUX[7]
BRAMISOCMRDDBUS[18]	in	CELL_S[6].IMUX_IMUX[6]
BRAMISOCMRDDBUS[17]	in	CELL_S[6].IMUX_IMUX[5]
BRAMISOCMRDDBUS[16]	in	CELL_S[6].IMUX_IMUX[4]
BRAMISOCMRDDBUS[15]	in	CELL_S[3].IMUX_IMUX[3]
BRAMISOCMRDDBUS[14]	in	CELL_S[3].IMUX_IMUX[2]
BRAMISOCMRDDBUS[13]	in	CELL_S[3].IMUX_IMUX[1]
BRAMISOCMRDDBUS[12]	in	CELL_S[3].IMUX_IMUX[0]
BRAMISOCMRDDBUS[11]	in	CELL_S[4].IMUX_IMUX[3]
BRAMISOCMRDDBUS[10]	in	CELL_S[4].IMUX_IMUX[2]
BRAMISOCMRDDBUS[9]	in	CELL_S[4].IMUX_IMUX[1]
BRAMISOCMRDDBUS[8]	in	CELL_S[4].IMUX_IMUX[0]
BRAMISOCMRDDBUS[7]	in	CELL_S[5].IMUX_IMUX[3]
BRAMISOCMRDDBUS[6]	in	CELL_S[5].IMUX_IMUX[2]
BRAMISOCMRDDBUS[5]	in	CELL_S[5].IMUX_IMUX[1]
BRAMISOCMRDDBUS[4]	in	CELL_S[5].IMUX_IMUX[0]
BRAMISOCMRDDBUS[3]	in	CELL_S[6].IMUX_IMUX[3]
BRAMISOCMRDDBUS[2]	in	CELL_S[6].IMUX_IMUX[2]
BRAMISOCMRDDBUS[1]	in	CELL_S[6].IMUX_IMUX[1]
BRAMISOCMRDDBUS[0]	in	CELL_S[6].IMUX_IMUX[0]
ISARCVALUE[7]	in	~CELL_S[5].IMUX_SR_OPTINV[3]
ISARCVALUE[6]	in	~CELL_S[5].IMUX_SR_OPTINV[2]
ISARCVALUE[5]	in	~CELL_S[5].IMUX_SR_OPTINV[1]
ISARCVALUE[4]	in	~CELL_S[5].IMUX_SR_OPTINV[0]
ISARCVALUE[3]	in	~CELL_S[5].IMUX_CE_OPTINV[3]
ISARCVALUE[2]	in	~CELL_S[5].IMUX_CE_OPTINV[2]
ISARCVALUE[1]	in	~CELL_S[5].IMUX_CE_OPTINV[1]
ISARCVALUE[0]	in	~CELL_S[5].IMUX_CE_OPTINV[0]
ISCNTLVALUE[7]	in	~CELL_S[4].IMUX_SR_OPTINV[3]
ISCNTLVALUE[6]	in	~CELL_S[4].IMUX_SR_OPTINV[2]
ISCNTLVALUE[5]	in	~CELL_S[4].IMUX_SR_OPTINV[1]
ISCNTLVALUE[4]	in	~CELL_S[4].IMUX_SR_OPTINV[0]
ISCNTLVALUE[3]	in	~CELL_S[4].IMUX_CE_OPTINV[3]
ISCNTLVALUE[2]	in	~CELL_S[4].IMUX_CE_OPTINV[2]
ISCNTLVALUE[1]	in	~CELL_S[4].IMUX_CE_OPTINV[1]
ISCNTLVALUE[0]	in	~CELL_S[4].IMUX_CE_OPTINV[0]
TSTC405ISOCMABORTI	in	CELL_E[0].IMUX_IMUX[17]
TSTC405ISOCMABUSI[29]	in	CELL_W[8].IMUX_IMUX[17]
TSTC405ISOCMABUSI[28]	in	CELL_W[8].IMUX_IMUX[16]
TSTC405ISOCMABUSI[27]	in	CELL_W[8].IMUX_IMUX[15]
TSTC405ISOCMABUSI[26]	in	CELL_W[8].IMUX_IMUX[14]
TSTC405ISOCMABUSI[25]	in	CELL_W[8].IMUX_IMUX[13]
TSTC405ISOCMABUSI[24]	in	CELL_W[9].IMUX_IMUX[19]
TSTC405ISOCMABUSI[23]	in	CELL_W[9].IMUX_IMUX[18]
TSTC405ISOCMABUSI[22]	in	CELL_W[9].IMUX_IMUX[17]
TSTC405ISOCMABUSI[21]	in	CELL_W[9].IMUX_IMUX[16]
TSTC405ISOCMABUSI[20]	in	CELL_W[9].IMUX_IMUX[15]
TSTC405ISOCMABUSI[19]	in	CELL_W[10].IMUX_IMUX[19]
TSTC405ISOCMABUSI[18]	in	CELL_W[10].IMUX_IMUX[18]
TSTC405ISOCMABUSI[17]	in	CELL_W[10].IMUX_IMUX[17]
TSTC405ISOCMABUSI[16]	in	CELL_W[10].IMUX_IMUX[16]
TSTC405ISOCMABUSI[15]	in	CELL_W[11].IMUX_IMUX[14]
TSTC405ISOCMABUSI[14]	in	CELL_W[11].IMUX_IMUX[13]
TSTC405ISOCMABUSI[13]	in	CELL_W[11].IMUX_IMUX[12]
TSTC405ISOCMABUSI[12]	in	CELL_W[11].IMUX_IMUX[11]
TSTC405ISOCMABUSI[11]	in	CELL_W[12].IMUX_IMUX[15]
TSTC405ISOCMABUSI[10]	in	CELL_W[12].IMUX_IMUX[14]
TSTC405ISOCMABUSI[9]	in	CELL_W[12].IMUX_IMUX[13]
TSTC405ISOCMABUSI[8]	in	CELL_W[12].IMUX_IMUX[12]
TSTC405ISOCMABUSI[7]	in	CELL_W[13].IMUX_IMUX[15]
TSTC405ISOCMABUSI[6]	in	CELL_W[13].IMUX_IMUX[14]
TSTC405ISOCMABUSI[5]	in	CELL_W[13].IMUX_IMUX[13]
TSTC405ISOCMABUSI[4]	in	CELL_W[13].IMUX_IMUX[12]
TSTC405ISOCMABUSI[3]	in	CELL_W[14].IMUX_IMUX[18]
TSTC405ISOCMABUSI[2]	in	CELL_W[14].IMUX_IMUX[17]
TSTC405ISOCMABUSI[1]	in	CELL_W[14].IMUX_IMUX[16]
TSTC405ISOCMABUSI[0]	in	CELL_W[14].IMUX_IMUX[15]
TSTC405ISOCMICUREADYI	in	CELL_E[0].IMUX_IMUX[15]
TSTC405ISOCMREQPENDINGI	in	CELL_E[0].IMUX_IMUX[14]
TSTC405ISOCMXLTVALIDI	in	CELL_E[0].IMUX_IMUX[16]
TSTISOCMC405HOLDI	in	CELL_S[5].IMUX_IMUX[14]
TSTISOCMC405RDDVALIDI[1]	in	CELL_S[4].IMUX_IMUX[17]
TSTISOCMC405RDDVALIDI[0]	in	CELL_S[4].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[63]	in	CELL_S[0].IMUX_IMUX[15]
TSTISOCMC405READDATAOUTI[62]	in	CELL_S[0].IMUX_IMUX[14]
TSTISOCMC405READDATAOUTI[61]	in	CELL_S[0].IMUX_IMUX[13]
TSTISOCMC405READDATAOUTI[60]	in	CELL_S[0].IMUX_IMUX[12]
TSTISOCMC405READDATAOUTI[59]	in	CELL_S[0].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[58]	in	CELL_S[0].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[57]	in	CELL_S[0].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[56]	in	CELL_S[0].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[55]	in	CELL_S[1].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[54]	in	CELL_S[1].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[53]	in	CELL_S[1].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[52]	in	CELL_S[1].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[51]	in	CELL_S[2].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[50]	in	CELL_S[2].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[49]	in	CELL_S[2].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[48]	in	CELL_S[2].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[47]	in	CELL_S[3].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[46]	in	CELL_S[3].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[45]	in	CELL_S[3].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[44]	in	CELL_S[3].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[43]	in	CELL_S[4].IMUX_IMUX[15]
TSTISOCMC405READDATAOUTI[42]	in	CELL_S[4].IMUX_IMUX[14]
TSTISOCMC405READDATAOUTI[41]	in	CELL_S[4].IMUX_IMUX[13]
TSTISOCMC405READDATAOUTI[40]	in	CELL_S[4].IMUX_IMUX[12]
TSTISOCMC405READDATAOUTI[39]	in	CELL_S[5].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[38]	in	CELL_S[5].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[37]	in	CELL_S[5].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[36]	in	CELL_S[5].IMUX_IMUX[15]
TSTISOCMC405READDATAOUTI[35]	in	CELL_S[6].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[34]	in	CELL_S[6].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[33]	in	CELL_S[6].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[32]	in	CELL_S[6].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[31]	in	CELL_W[0].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[30]	in	CELL_W[0].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[29]	in	CELL_W[0].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[28]	in	CELL_W[0].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[27]	in	CELL_W[1].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[26]	in	CELL_W[1].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[25]	in	CELL_W[1].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[24]	in	CELL_W[1].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[23]	in	CELL_W[2].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[22]	in	CELL_W[2].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[21]	in	CELL_W[2].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[20]	in	CELL_W[2].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[19]	in	CELL_W[3].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[18]	in	CELL_W[3].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[17]	in	CELL_W[3].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[16]	in	CELL_W[3].IMUX_IMUX[15]
TSTISOCMC405READDATAOUTI[15]	in	CELL_W[4].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[14]	in	CELL_W[4].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[13]	in	CELL_W[4].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[12]	in	CELL_W[4].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[11]	in	CELL_W[5].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[10]	in	CELL_W[5].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[9]	in	CELL_W[5].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[8]	in	CELL_W[5].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[7]	in	CELL_W[6].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[6]	in	CELL_W[6].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[5]	in	CELL_W[6].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[4]	in	CELL_W[6].IMUX_IMUX[16]
TSTISOCMC405READDATAOUTI[3]	in	CELL_W[7].IMUX_IMUX[19]
TSTISOCMC405READDATAOUTI[2]	in	CELL_W[7].IMUX_IMUX[18]
TSTISOCMC405READDATAOUTI[1]	in	CELL_W[7].IMUX_IMUX[17]
TSTISOCMC405READDATAOUTI[0]	in	CELL_W[7].IMUX_IMUX[16]
FCMAPUCR[3]	in	CELL_E[16].IMUX_IMUX[7]
FCMAPUCR[2]	in	CELL_E[16].IMUX_IMUX[6]
FCMAPUCR[1]	in	CELL_E[16].IMUX_IMUX[5]
FCMAPUCR[0]	in	CELL_E[16].IMUX_IMUX[4]
FCMAPUDCDCREN	in	CELL_E[23].IMUX_IMUX[7]
FCMAPUDCDFORCEALIGN	in	CELL_E[20].IMUX_IMUX[4]
FCMAPUDCDFORCEBESTEERING	in	CELL_N[5].IMUX_IMUX[4]
FCMAPUDCDFPUOP	in	CELL_E[16].IMUX_IMUX[10]
FCMAPUDCDGPRWRITE	in	CELL_N[6].IMUX_IMUX[5]
FCMAPUDCDLDSTBYTE	in	CELL_N[1].IMUX_IMUX[0]
FCMAPUDCDLDSTDW	in	CELL_N[1].IMUX_IMUX[3]
FCMAPUDCDLDSTHW	in	CELL_N[1].IMUX_IMUX[1]
FCMAPUDCDLDSTQW	in	CELL_N[1].IMUX_IMUX[4]
FCMAPUDCDLDSTWD	in	CELL_N[1].IMUX_IMUX[2]
FCMAPUDCDLOAD	in	CELL_N[2].IMUX_IMUX[8]
FCMAPUDCDPRIVOP	in	CELL_E[23].IMUX_IMUX[6]
FCMAPUDCDRAEN	in	CELL_N[6].IMUX_IMUX[6]
FCMAPUDCDRBEN	in	CELL_N[6].IMUX_IMUX[7]
FCMAPUDCDSTORE	in	CELL_N[2].IMUX_IMUX[9]
FCMAPUDCDTRAPBE	in	CELL_N[1].IMUX_IMUX[5]
FCMAPUDCDTRAPLE	in	CELL_N[1].IMUX_IMUX[6]
FCMAPUDCDUPDATE	in	CELL_N[6].IMUX_IMUX[4]
FCMAPUDCDXERCAEN	in	CELL_E[23].IMUX_IMUX[4]
FCMAPUDCDXEROVEN	in	CELL_E[23].IMUX_IMUX[5]
FCMAPUDECODEBUSY	in	CELL_E[14].IMUX_IMUX[4]
FCMAPUDONE	in	CELL_E[16].IMUX_IMUX[11]
FCMAPUEXCEPTION	in	CELL_E[15].IMUX_IMUX[4]
FCMAPUEXEBLOCKINGMCO	in	CELL_N[3].IMUX_IMUX[8]
FCMAPUEXECRFIELD[2]	in	CELL_N[2].IMUX_IMUX[6]
FCMAPUEXECRFIELD[1]	in	CELL_N[2].IMUX_IMUX[5]
FCMAPUEXECRFIELD[0]	in	CELL_N[2].IMUX_IMUX[4]
FCMAPUEXENONBLOCKINGMCO	in	CELL_N[4].IMUX_IMUX[4]
FCMAPUINSTRACK	in	CELL_E[16].IMUX_IMUX[9]
FCMAPULOADWAIT	in	CELL_N[1].IMUX_IMUX[7]
FCMAPURESULT[31]	in	CELL_E[16].IMUX_IMUX[3]
FCMAPURESULT[30]	in	CELL_E[16].IMUX_IMUX[2]
FCMAPURESULT[29]	in	CELL_E[16].IMUX_IMUX[1]
FCMAPURESULT[28]	in	CELL_E[16].IMUX_IMUX[0]
FCMAPURESULT[27]	in	CELL_E[17].IMUX_IMUX[3]
FCMAPURESULT[26]	in	CELL_E[17].IMUX_IMUX[2]
FCMAPURESULT[25]	in	CELL_E[17].IMUX_IMUX[1]
FCMAPURESULT[24]	in	CELL_E[17].IMUX_IMUX[0]
FCMAPURESULT[23]	in	CELL_E[18].IMUX_IMUX[3]
FCMAPURESULT[22]	in	CELL_E[18].IMUX_IMUX[2]
FCMAPURESULT[21]	in	CELL_E[18].IMUX_IMUX[1]
FCMAPURESULT[20]	in	CELL_E[18].IMUX_IMUX[0]
FCMAPURESULT[19]	in	CELL_E[19].IMUX_IMUX[3]
FCMAPURESULT[18]	in	CELL_E[19].IMUX_IMUX[2]
FCMAPURESULT[17]	in	CELL_E[19].IMUX_IMUX[1]
FCMAPURESULT[16]	in	CELL_E[19].IMUX_IMUX[0]
FCMAPURESULT[15]	in	CELL_E[20].IMUX_IMUX[3]
FCMAPURESULT[14]	in	CELL_E[20].IMUX_IMUX[2]
FCMAPURESULT[13]	in	CELL_E[20].IMUX_IMUX[1]
FCMAPURESULT[12]	in	CELL_E[20].IMUX_IMUX[0]
FCMAPURESULT[11]	in	CELL_E[21].IMUX_IMUX[3]
FCMAPURESULT[10]	in	CELL_E[21].IMUX_IMUX[2]
FCMAPURESULT[9]	in	CELL_E[21].IMUX_IMUX[1]
FCMAPURESULT[8]	in	CELL_E[21].IMUX_IMUX[0]
FCMAPURESULT[7]	in	CELL_E[22].IMUX_IMUX[3]
FCMAPURESULT[6]	in	CELL_E[22].IMUX_IMUX[2]
FCMAPURESULT[5]	in	CELL_E[22].IMUX_IMUX[1]
FCMAPURESULT[4]	in	CELL_E[22].IMUX_IMUX[0]
FCMAPURESULT[3]	in	CELL_E[23].IMUX_IMUX[3]
FCMAPURESULT[2]	in	CELL_E[23].IMUX_IMUX[2]
FCMAPURESULT[1]	in	CELL_E[23].IMUX_IMUX[1]
FCMAPURESULT[0]	in	CELL_E[23].IMUX_IMUX[0]
FCMAPURESULTVALID	in	CELL_E[16].IMUX_IMUX[8]
FCMAPUSLEEPNOTREADY	in	CELL_E[15].IMUX_IMUX[7]
FCMAPUXERCA	in	CELL_E[15].IMUX_IMUX[5]
FCMAPUXEROV	in	CELL_E[15].IMUX_IMUX[6]
TIEAPUCONTROL[15]	in	~CELL_N[2].IMUX_CE_OPTINV[0]
TIEAPUCONTROL[14]	in	~CELL_N[2].IMUX_CE_OPTINV[1]
TIEAPUCONTROL[13]	in	~CELL_N[2].IMUX_CE_OPTINV[2]
TIEAPUCONTROL[12]	in	~CELL_N[2].IMUX_CE_OPTINV[3]
TIEAPUCONTROL[11]	in	~CELL_N[2].IMUX_SR_OPTINV[0]
TIEAPUCONTROL[10]	in	~CELL_N[2].IMUX_SR_OPTINV[1]
TIEAPUCONTROL[9]	in	~CELL_N[2].IMUX_SR_OPTINV[2]
TIEAPUCONTROL[8]	in	~CELL_N[2].IMUX_SR_OPTINV[3]
TIEAPUCONTROL[7]	in	~CELL_N[3].IMUX_CE_OPTINV[0]
TIEAPUCONTROL[6]	in	~CELL_N[3].IMUX_CE_OPTINV[1]
TIEAPUCONTROL[5]	in	~CELL_N[3].IMUX_CE_OPTINV[2]
TIEAPUCONTROL[4]	in	~CELL_N[3].IMUX_CE_OPTINV[3]
TIEAPUCONTROL[3]	in	~CELL_N[3].IMUX_SR_OPTINV[0]
TIEAPUCONTROL[2]	in	~CELL_N[3].IMUX_SR_OPTINV[1]
TIEAPUCONTROL[1]	in	~CELL_N[3].IMUX_SR_OPTINV[2]
TIEAPUCONTROL[0]	in	~CELL_N[3].IMUX_SR_OPTINV[3]
TIEAPUUDI1[23]	in	~CELL_E[21].IMUX_CE_OPTINV[0]
TIEAPUUDI1[22]	in	~CELL_E[21].IMUX_CE_OPTINV[1]
TIEAPUUDI1[21]	in	~CELL_E[21].IMUX_CE_OPTINV[2]
TIEAPUUDI1[20]	in	~CELL_E[21].IMUX_CE_OPTINV[3]
TIEAPUUDI1[19]	in	~CELL_E[21].IMUX_SR_OPTINV[0]
TIEAPUUDI1[18]	in	~CELL_E[21].IMUX_SR_OPTINV[1]
TIEAPUUDI1[17]	in	~CELL_E[21].IMUX_SR_OPTINV[2]
TIEAPUUDI1[16]	in	~CELL_E[21].IMUX_SR_OPTINV[3]
TIEAPUUDI1[15]	in	~CELL_E[22].IMUX_CE_OPTINV[0]
TIEAPUUDI1[14]	in	~CELL_E[22].IMUX_CE_OPTINV[1]
TIEAPUUDI1[13]	in	~CELL_E[22].IMUX_CE_OPTINV[2]
TIEAPUUDI1[12]	in	~CELL_E[22].IMUX_CE_OPTINV[3]
TIEAPUUDI1[11]	in	~CELL_E[22].IMUX_SR_OPTINV[0]
TIEAPUUDI1[10]	in	~CELL_E[22].IMUX_SR_OPTINV[1]
TIEAPUUDI1[9]	in	~CELL_E[22].IMUX_SR_OPTINV[2]
TIEAPUUDI1[8]	in	~CELL_E[22].IMUX_SR_OPTINV[3]
TIEAPUUDI1[7]	in	~CELL_E[23].IMUX_CE_OPTINV[0]
TIEAPUUDI1[6]	in	~CELL_E[23].IMUX_CE_OPTINV[1]
TIEAPUUDI1[5]	in	~CELL_E[23].IMUX_CE_OPTINV[2]
TIEAPUUDI1[4]	in	~CELL_E[23].IMUX_CE_OPTINV[3]
TIEAPUUDI1[3]	in	~CELL_E[23].IMUX_SR_OPTINV[0]
TIEAPUUDI1[2]	in	~CELL_E[23].IMUX_SR_OPTINV[1]
TIEAPUUDI1[1]	in	~CELL_E[23].IMUX_SR_OPTINV[2]
TIEAPUUDI1[0]	in	~CELL_E[23].IMUX_SR_OPTINV[3]
TIEAPUUDI2[23]	in	~CELL_E[18].IMUX_CE_OPTINV[0]
TIEAPUUDI2[22]	in	~CELL_E[18].IMUX_CE_OPTINV[1]
TIEAPUUDI2[21]	in	~CELL_E[18].IMUX_CE_OPTINV[2]
TIEAPUUDI2[20]	in	~CELL_E[18].IMUX_CE_OPTINV[3]
TIEAPUUDI2[19]	in	~CELL_E[18].IMUX_SR_OPTINV[0]
TIEAPUUDI2[18]	in	~CELL_E[18].IMUX_SR_OPTINV[1]
TIEAPUUDI2[17]	in	~CELL_E[18].IMUX_SR_OPTINV[2]
TIEAPUUDI2[16]	in	~CELL_E[18].IMUX_SR_OPTINV[3]
TIEAPUUDI2[15]	in	~CELL_E[19].IMUX_CE_OPTINV[0]
TIEAPUUDI2[14]	in	~CELL_E[19].IMUX_CE_OPTINV[1]
TIEAPUUDI2[13]	in	~CELL_E[19].IMUX_CE_OPTINV[2]
TIEAPUUDI2[12]	in	~CELL_E[19].IMUX_CE_OPTINV[3]
TIEAPUUDI2[11]	in	~CELL_E[19].IMUX_SR_OPTINV[0]
TIEAPUUDI2[10]	in	~CELL_E[19].IMUX_SR_OPTINV[1]
TIEAPUUDI2[9]	in	~CELL_E[19].IMUX_SR_OPTINV[2]
TIEAPUUDI2[8]	in	~CELL_E[19].IMUX_SR_OPTINV[3]
TIEAPUUDI2[7]	in	~CELL_E[20].IMUX_CE_OPTINV[0]
TIEAPUUDI2[6]	in	~CELL_E[20].IMUX_CE_OPTINV[1]
TIEAPUUDI2[5]	in	~CELL_E[20].IMUX_CE_OPTINV[2]
TIEAPUUDI2[4]	in	~CELL_E[20].IMUX_CE_OPTINV[3]
TIEAPUUDI2[3]	in	~CELL_E[20].IMUX_SR_OPTINV[0]
TIEAPUUDI2[2]	in	~CELL_E[20].IMUX_SR_OPTINV[1]
TIEAPUUDI2[1]	in	~CELL_E[20].IMUX_SR_OPTINV[2]
TIEAPUUDI2[0]	in	~CELL_E[20].IMUX_SR_OPTINV[3]
TIEAPUUDI3[23]	in	~CELL_E[15].IMUX_CE_OPTINV[0]
TIEAPUUDI3[22]	in	~CELL_E[15].IMUX_CE_OPTINV[1]
TIEAPUUDI3[21]	in	~CELL_E[15].IMUX_CE_OPTINV[2]
TIEAPUUDI3[20]	in	~CELL_E[15].IMUX_CE_OPTINV[3]
TIEAPUUDI3[19]	in	~CELL_E[15].IMUX_SR_OPTINV[0]
TIEAPUUDI3[18]	in	~CELL_E[15].IMUX_SR_OPTINV[1]
TIEAPUUDI3[17]	in	~CELL_E[15].IMUX_SR_OPTINV[2]
TIEAPUUDI3[16]	in	~CELL_E[15].IMUX_SR_OPTINV[3]
TIEAPUUDI3[15]	in	~CELL_E[16].IMUX_CE_OPTINV[0]
TIEAPUUDI3[14]	in	~CELL_E[16].IMUX_CE_OPTINV[1]
TIEAPUUDI3[13]	in	~CELL_E[16].IMUX_CE_OPTINV[2]
TIEAPUUDI3[12]	in	~CELL_E[16].IMUX_CE_OPTINV[3]
TIEAPUUDI3[11]	in	~CELL_E[16].IMUX_SR_OPTINV[0]
TIEAPUUDI3[10]	in	~CELL_E[16].IMUX_SR_OPTINV[1]
TIEAPUUDI3[9]	in	~CELL_E[16].IMUX_SR_OPTINV[2]
TIEAPUUDI3[8]	in	~CELL_E[16].IMUX_SR_OPTINV[3]
TIEAPUUDI3[7]	in	~CELL_E[17].IMUX_CE_OPTINV[0]
TIEAPUUDI3[6]	in	~CELL_E[17].IMUX_CE_OPTINV[1]
TIEAPUUDI3[5]	in	~CELL_E[17].IMUX_CE_OPTINV[2]
TIEAPUUDI3[4]	in	~CELL_E[17].IMUX_CE_OPTINV[3]
TIEAPUUDI3[3]	in	~CELL_E[17].IMUX_SR_OPTINV[0]
TIEAPUUDI3[2]	in	~CELL_E[17].IMUX_SR_OPTINV[1]
TIEAPUUDI3[1]	in	~CELL_E[17].IMUX_SR_OPTINV[2]
TIEAPUUDI3[0]	in	~CELL_E[17].IMUX_SR_OPTINV[3]
TIEAPUUDI4[23]	in	~CELL_E[12].IMUX_CE_OPTINV[0]
TIEAPUUDI4[22]	in	~CELL_E[12].IMUX_CE_OPTINV[1]
TIEAPUUDI4[21]	in	~CELL_E[12].IMUX_CE_OPTINV[2]
TIEAPUUDI4[20]	in	~CELL_E[12].IMUX_CE_OPTINV[3]
TIEAPUUDI4[19]	in	~CELL_E[12].IMUX_SR_OPTINV[0]
TIEAPUUDI4[18]	in	~CELL_E[12].IMUX_SR_OPTINV[1]
TIEAPUUDI4[17]	in	~CELL_E[12].IMUX_SR_OPTINV[2]
TIEAPUUDI4[16]	in	~CELL_E[12].IMUX_SR_OPTINV[3]
TIEAPUUDI4[15]	in	~CELL_E[13].IMUX_CE_OPTINV[0]
TIEAPUUDI4[14]	in	~CELL_E[13].IMUX_CE_OPTINV[1]
TIEAPUUDI4[13]	in	~CELL_E[13].IMUX_CE_OPTINV[2]
TIEAPUUDI4[12]	in	~CELL_E[13].IMUX_CE_OPTINV[3]
TIEAPUUDI4[11]	in	~CELL_E[13].IMUX_SR_OPTINV[0]
TIEAPUUDI4[10]	in	~CELL_E[13].IMUX_SR_OPTINV[1]
TIEAPUUDI4[9]	in	~CELL_E[13].IMUX_SR_OPTINV[2]
TIEAPUUDI4[8]	in	~CELL_E[13].IMUX_SR_OPTINV[3]
TIEAPUUDI4[7]	in	~CELL_E[14].IMUX_CE_OPTINV[0]
TIEAPUUDI4[6]	in	~CELL_E[14].IMUX_CE_OPTINV[1]
TIEAPUUDI4[5]	in	~CELL_E[14].IMUX_CE_OPTINV[2]
TIEAPUUDI4[4]	in	~CELL_E[14].IMUX_CE_OPTINV[3]
TIEAPUUDI4[3]	in	~CELL_E[14].IMUX_SR_OPTINV[0]
TIEAPUUDI4[2]	in	~CELL_E[14].IMUX_SR_OPTINV[1]
TIEAPUUDI4[1]	in	~CELL_E[14].IMUX_SR_OPTINV[2]
TIEAPUUDI4[0]	in	~CELL_E[14].IMUX_SR_OPTINV[3]
TIEAPUUDI5[23]	in	~CELL_E[9].IMUX_CE_OPTINV[0]
TIEAPUUDI5[22]	in	~CELL_E[9].IMUX_CE_OPTINV[1]
TIEAPUUDI5[21]	in	~CELL_E[9].IMUX_CE_OPTINV[2]
TIEAPUUDI5[20]	in	~CELL_E[9].IMUX_CE_OPTINV[3]
TIEAPUUDI5[19]	in	~CELL_E[9].IMUX_SR_OPTINV[0]
TIEAPUUDI5[18]	in	~CELL_E[9].IMUX_SR_OPTINV[1]
TIEAPUUDI5[17]	in	~CELL_E[9].IMUX_SR_OPTINV[2]
TIEAPUUDI5[16]	in	~CELL_E[9].IMUX_SR_OPTINV[3]
TIEAPUUDI5[15]	in	~CELL_E[10].IMUX_CE_OPTINV[0]
TIEAPUUDI5[14]	in	~CELL_E[10].IMUX_CE_OPTINV[1]
TIEAPUUDI5[13]	in	~CELL_E[10].IMUX_CE_OPTINV[2]
TIEAPUUDI5[12]	in	~CELL_E[10].IMUX_CE_OPTINV[3]
TIEAPUUDI5[11]	in	~CELL_E[10].IMUX_SR_OPTINV[0]
TIEAPUUDI5[10]	in	~CELL_E[10].IMUX_SR_OPTINV[1]
TIEAPUUDI5[9]	in	~CELL_E[10].IMUX_SR_OPTINV[2]
TIEAPUUDI5[8]	in	~CELL_E[10].IMUX_SR_OPTINV[3]
TIEAPUUDI5[7]	in	~CELL_E[11].IMUX_CE_OPTINV[0]
TIEAPUUDI5[6]	in	~CELL_E[11].IMUX_CE_OPTINV[1]
TIEAPUUDI5[5]	in	~CELL_E[11].IMUX_CE_OPTINV[2]
TIEAPUUDI5[4]	in	~CELL_E[11].IMUX_CE_OPTINV[3]
TIEAPUUDI5[3]	in	~CELL_E[11].IMUX_SR_OPTINV[0]
TIEAPUUDI5[2]	in	~CELL_E[11].IMUX_SR_OPTINV[1]
TIEAPUUDI5[1]	in	~CELL_E[11].IMUX_SR_OPTINV[2]
TIEAPUUDI5[0]	in	~CELL_E[11].IMUX_SR_OPTINV[3]
TIEAPUUDI6[23]	in	~CELL_E[6].IMUX_CE_OPTINV[0]
TIEAPUUDI6[22]	in	~CELL_E[6].IMUX_CE_OPTINV[1]
TIEAPUUDI6[21]	in	~CELL_E[6].IMUX_CE_OPTINV[2]
TIEAPUUDI6[20]	in	~CELL_E[6].IMUX_CE_OPTINV[3]
TIEAPUUDI6[19]	in	~CELL_E[6].IMUX_SR_OPTINV[0]
TIEAPUUDI6[18]	in	~CELL_E[6].IMUX_SR_OPTINV[1]
TIEAPUUDI6[17]	in	~CELL_E[6].IMUX_SR_OPTINV[2]
TIEAPUUDI6[16]	in	~CELL_E[6].IMUX_SR_OPTINV[3]
TIEAPUUDI6[15]	in	~CELL_E[7].IMUX_CE_OPTINV[0]
TIEAPUUDI6[14]	in	~CELL_E[7].IMUX_CE_OPTINV[1]
TIEAPUUDI6[13]	in	~CELL_E[7].IMUX_CE_OPTINV[2]
TIEAPUUDI6[12]	in	~CELL_E[7].IMUX_CE_OPTINV[3]
TIEAPUUDI6[11]	in	~CELL_E[7].IMUX_SR_OPTINV[0]
TIEAPUUDI6[10]	in	~CELL_E[7].IMUX_SR_OPTINV[1]
TIEAPUUDI6[9]	in	~CELL_E[7].IMUX_SR_OPTINV[2]
TIEAPUUDI6[8]	in	~CELL_E[7].IMUX_SR_OPTINV[3]
TIEAPUUDI6[7]	in	~CELL_E[8].IMUX_CE_OPTINV[0]
TIEAPUUDI6[6]	in	~CELL_E[8].IMUX_CE_OPTINV[1]
TIEAPUUDI6[5]	in	~CELL_E[8].IMUX_CE_OPTINV[2]
TIEAPUUDI6[4]	in	~CELL_E[8].IMUX_CE_OPTINV[3]
TIEAPUUDI6[3]	in	~CELL_E[8].IMUX_SR_OPTINV[0]
TIEAPUUDI6[2]	in	~CELL_E[8].IMUX_SR_OPTINV[1]
TIEAPUUDI6[1]	in	~CELL_E[8].IMUX_SR_OPTINV[2]
TIEAPUUDI6[0]	in	~CELL_E[8].IMUX_SR_OPTINV[3]
TIEAPUUDI7[23]	in	~CELL_E[3].IMUX_CE_OPTINV[0]
TIEAPUUDI7[22]	in	~CELL_E[3].IMUX_CE_OPTINV[1]
TIEAPUUDI7[21]	in	~CELL_E[3].IMUX_CE_OPTINV[2]
TIEAPUUDI7[20]	in	~CELL_E[3].IMUX_CE_OPTINV[3]
TIEAPUUDI7[19]	in	~CELL_E[3].IMUX_SR_OPTINV[0]
TIEAPUUDI7[18]	in	~CELL_E[3].IMUX_SR_OPTINV[1]
TIEAPUUDI7[17]	in	~CELL_E[3].IMUX_SR_OPTINV[2]
TIEAPUUDI7[16]	in	~CELL_E[3].IMUX_SR_OPTINV[3]
TIEAPUUDI7[15]	in	~CELL_E[4].IMUX_CE_OPTINV[0]
TIEAPUUDI7[14]	in	~CELL_E[4].IMUX_CE_OPTINV[1]
TIEAPUUDI7[13]	in	~CELL_E[4].IMUX_CE_OPTINV[2]
TIEAPUUDI7[12]	in	~CELL_E[4].IMUX_CE_OPTINV[3]
TIEAPUUDI7[11]	in	~CELL_E[4].IMUX_SR_OPTINV[0]
TIEAPUUDI7[10]	in	~CELL_E[4].IMUX_SR_OPTINV[1]
TIEAPUUDI7[9]	in	~CELL_E[4].IMUX_SR_OPTINV[2]
TIEAPUUDI7[8]	in	~CELL_E[4].IMUX_SR_OPTINV[3]
TIEAPUUDI7[7]	in	~CELL_E[5].IMUX_CE_OPTINV[0]
TIEAPUUDI7[6]	in	~CELL_E[5].IMUX_CE_OPTINV[1]
TIEAPUUDI7[5]	in	~CELL_E[5].IMUX_CE_OPTINV[2]
TIEAPUUDI7[4]	in	~CELL_E[5].IMUX_CE_OPTINV[3]
TIEAPUUDI7[3]	in	~CELL_E[5].IMUX_SR_OPTINV[0]
TIEAPUUDI7[2]	in	~CELL_E[5].IMUX_SR_OPTINV[1]
TIEAPUUDI7[1]	in	~CELL_E[5].IMUX_SR_OPTINV[2]
TIEAPUUDI7[0]	in	~CELL_E[5].IMUX_SR_OPTINV[3]
TIEAPUUDI8[23]	in	~CELL_E[0].IMUX_CE_OPTINV[0]
TIEAPUUDI8[22]	in	~CELL_E[0].IMUX_CE_OPTINV[1]
TIEAPUUDI8[21]	in	~CELL_E[0].IMUX_CE_OPTINV[2]
TIEAPUUDI8[20]	in	~CELL_E[0].IMUX_CE_OPTINV[3]
TIEAPUUDI8[19]	in	~CELL_E[0].IMUX_SR_OPTINV[0]
TIEAPUUDI8[18]	in	~CELL_E[0].IMUX_SR_OPTINV[1]
TIEAPUUDI8[17]	in	~CELL_E[0].IMUX_SR_OPTINV[2]
TIEAPUUDI8[16]	in	~CELL_E[0].IMUX_SR_OPTINV[3]
TIEAPUUDI8[15]	in	~CELL_E[1].IMUX_CE_OPTINV[0]
TIEAPUUDI8[14]	in	~CELL_E[1].IMUX_CE_OPTINV[1]
TIEAPUUDI8[13]	in	~CELL_E[1].IMUX_CE_OPTINV[2]
TIEAPUUDI8[12]	in	~CELL_E[1].IMUX_CE_OPTINV[3]
TIEAPUUDI8[11]	in	~CELL_E[1].IMUX_SR_OPTINV[0]
TIEAPUUDI8[10]	in	~CELL_E[1].IMUX_SR_OPTINV[1]
TIEAPUUDI8[9]	in	~CELL_E[1].IMUX_SR_OPTINV[2]
TIEAPUUDI8[8]	in	~CELL_E[1].IMUX_SR_OPTINV[3]
TIEAPUUDI8[7]	in	~CELL_E[2].IMUX_CE_OPTINV[0]
TIEAPUUDI8[6]	in	~CELL_E[2].IMUX_CE_OPTINV[1]
TIEAPUUDI8[5]	in	~CELL_E[2].IMUX_CE_OPTINV[2]
TIEAPUUDI8[4]	in	~CELL_E[2].IMUX_CE_OPTINV[3]
TIEAPUUDI8[3]	in	~CELL_E[2].IMUX_SR_OPTINV[0]
TIEAPUUDI8[2]	in	~CELL_E[2].IMUX_SR_OPTINV[1]
TIEAPUUDI8[1]	in	~CELL_E[2].IMUX_SR_OPTINV[2]
TIEAPUUDI8[0]	in	~CELL_E[2].IMUX_SR_OPTINV[3]
TSTAPUC405APUDIVENI	in	CELL_E[20].IMUX_IMUX[6]
TSTAPUC405APUPRESENTI	in	CELL_E[20].IMUX_IMUX[7]
TSTAPUC405DCDAPUOPI	in	CELL_E[20].IMUX_IMUX[9]
TSTAPUC405DCDCRENI	in	CELL_N[4].IMUX_IMUX[14]
TSTAPUC405DCDFORCEALIGNI	in	CELL_E[18].IMUX_IMUX[4]
TSTAPUC405DCDFORCEBESTEERINGI	in	CELL_E[18].IMUX_IMUX[5]
TSTAPUC405DCDFPUOPI	in	CELL_N[5].IMUX_IMUX[12]
TSTAPUC405DCDGPRWRITEI	in	CELL_N[5].IMUX_IMUX[13]
TSTAPUC405DCDLDSTBYTEI	in	CELL_E[18].IMUX_IMUX[6]
TSTAPUC405DCDLDSTDWI	in	CELL_E[19].IMUX_IMUX[6]
TSTAPUC405DCDLDSTHWI	in	CELL_E[19].IMUX_IMUX[4]
TSTAPUC405DCDLDSTQWI	in	CELL_E[19].IMUX_IMUX[7]
TSTAPUC405DCDLDSTWDI	in	CELL_E[19].IMUX_IMUX[5]
TSTAPUC405DCDLOADI	in	CELL_N[4].IMUX_IMUX[9]
TSTAPUC405DCDPRIVOPI	in	CELL_N[4].IMUX_IMUX[13]
TSTAPUC405DCDRAENI	in	CELL_N[5].IMUX_IMUX[14]
TSTAPUC405DCDRBENI	in	CELL_N[5].IMUX_IMUX[15]
TSTAPUC405DCDSTOREI	in	CELL_N[4].IMUX_IMUX[10]
TSTAPUC405DCDTRAPBEI	in	CELL_N[3].IMUX_IMUX[14]
TSTAPUC405DCDTRAPLEI	in	CELL_N[3].IMUX_IMUX[15]
TSTAPUC405DCDUPDATEI	in	CELL_N[4].IMUX_IMUX[15]
TSTAPUC405DCDVALIDOPI	in	CELL_E[20].IMUX_IMUX[8]
TSTAPUC405DCDXERCAENI	in	CELL_N[4].IMUX_IMUX[11]
TSTAPUC405DCDXEROVENI	in	CELL_N[4].IMUX_IMUX[12]
TSTAPUC405EXCEPTIONI	in	CELL_E[21].IMUX_IMUX[4]
TSTAPUC405EXEBLOCKINGMCOI	in	CELL_E[21].IMUX_IMUX[5]
TSTAPUC405EXEBUSYI	in	CELL_E[21].IMUX_IMUX[7]
TSTAPUC405EXECRFIELDI[2]	in	CELL_N[5].IMUX_IMUX[11]
TSTAPUC405EXECRFIELDI[1]	in	CELL_N[5].IMUX_IMUX[10]
TSTAPUC405EXECRFIELDI[0]	in	CELL_N[5].IMUX_IMUX[9]
TSTAPUC405EXECRI[3]	in	CELL_N[6].IMUX_IMUX[15]
TSTAPUC405EXECRI[2]	in	CELL_N[6].IMUX_IMUX[14]
TSTAPUC405EXECRI[1]	in	CELL_N[6].IMUX_IMUX[13]
TSTAPUC405EXECRI[0]	in	CELL_N[6].IMUX_IMUX[12]
TSTAPUC405EXELDDEPENDI	in	CELL_E[22].IMUX_IMUX[5]
TSTAPUC405EXENONBLOCKINGMCOI	in	CELL_E[21].IMUX_IMUX[6]
TSTAPUC405EXERESULTI[31]	in	CELL_N[0].IMUX_IMUX[11]
TSTAPUC405EXERESULTI[30]	in	CELL_N[0].IMUX_IMUX[10]
TSTAPUC405EXERESULTI[29]	in	CELL_N[0].IMUX_IMUX[9]
TSTAPUC405EXERESULTI[28]	in	CELL_N[0].IMUX_IMUX[8]
TSTAPUC405EXERESULTI[27]	in	CELL_N[1].IMUX_IMUX[15]
TSTAPUC405EXERESULTI[26]	in	CELL_N[1].IMUX_IMUX[14]
TSTAPUC405EXERESULTI[25]	in	CELL_N[1].IMUX_IMUX[13]
TSTAPUC405EXERESULTI[24]	in	CELL_N[1].IMUX_IMUX[12]
TSTAPUC405EXERESULTI[23]	in	CELL_N[1].IMUX_IMUX[11]
TSTAPUC405EXERESULTI[22]	in	CELL_N[1].IMUX_IMUX[10]
TSTAPUC405EXERESULTI[21]	in	CELL_N[1].IMUX_IMUX[9]
TSTAPUC405EXERESULTI[20]	in	CELL_N[1].IMUX_IMUX[8]
TSTAPUC405EXERESULTI[19]	in	CELL_N[2].IMUX_IMUX[15]
TSTAPUC405EXERESULTI[18]	in	CELL_N[2].IMUX_IMUX[14]
TSTAPUC405EXERESULTI[17]	in	CELL_N[2].IMUX_IMUX[13]
TSTAPUC405EXERESULTI[16]	in	CELL_N[2].IMUX_IMUX[12]
TSTAPUC405EXERESULTI[15]	in	CELL_N[3].IMUX_IMUX[12]
TSTAPUC405EXERESULTI[14]	in	CELL_N[3].IMUX_IMUX[11]
TSTAPUC405EXERESULTI[13]	in	CELL_N[3].IMUX_IMUX[10]
TSTAPUC405EXERESULTI[12]	in	CELL_N[3].IMUX_IMUX[9]
TSTAPUC405EXERESULTI[11]	in	CELL_N[4].IMUX_IMUX[8]
TSTAPUC405EXERESULTI[10]	in	CELL_N[4].IMUX_IMUX[7]
TSTAPUC405EXERESULTI[9]	in	CELL_N[4].IMUX_IMUX[6]
TSTAPUC405EXERESULTI[8]	in	CELL_N[4].IMUX_IMUX[5]
TSTAPUC405EXERESULTI[7]	in	CELL_N[5].IMUX_IMUX[8]
TSTAPUC405EXERESULTI[6]	in	CELL_N[5].IMUX_IMUX[7]
TSTAPUC405EXERESULTI[5]	in	CELL_N[5].IMUX_IMUX[6]
TSTAPUC405EXERESULTI[4]	in	CELL_N[5].IMUX_IMUX[5]
TSTAPUC405EXERESULTI[3]	in	CELL_N[6].IMUX_IMUX[11]
TSTAPUC405EXERESULTI[2]	in	CELL_N[6].IMUX_IMUX[10]
TSTAPUC405EXERESULTI[1]	in	CELL_N[6].IMUX_IMUX[9]
TSTAPUC405EXERESULTI[0]	in	CELL_N[6].IMUX_IMUX[8]
TSTAPUC405EXEXERCAI	in	CELL_E[20].IMUX_IMUX[10]
TSTAPUC405EXEXEROVI	in	CELL_E[20].IMUX_IMUX[11]
TSTAPUC405FPUEXCEPTIONI	in	CELL_E[18].IMUX_IMUX[7]
TSTAPUC405LWBLDDEPENDI	in	CELL_E[22].IMUX_IMUX[7]
TSTAPUC405SLEEPREQI	in	CELL_E[22].IMUX_IMUX[4]
TSTAPUC405WBLDDEPENDI	in	CELL_E[22].IMUX_IMUX[6]
TSTC405APUDCDFULLI	in	CELL_E[21].IMUX_IMUX[8]
TSTC405APUDCDHOLDI	in	CELL_E[21].IMUX_IMUX[9]
TSTC405APUDCDINSTRUCTIONI[31]	in	CELL_E[8].IMUX_IMUX[15]
TSTC405APUDCDINSTRUCTIONI[30]	in	CELL_E[8].IMUX_IMUX[14]
TSTC405APUDCDINSTRUCTIONI[29]	in	CELL_E[8].IMUX_IMUX[13]
TSTC405APUDCDINSTRUCTIONI[28]	in	CELL_E[8].IMUX_IMUX[12]
TSTC405APUDCDINSTRUCTIONI[27]	in	CELL_E[9].IMUX_IMUX[15]
TSTC405APUDCDINSTRUCTIONI[26]	in	CELL_E[9].IMUX_IMUX[14]
TSTC405APUDCDINSTRUCTIONI[25]	in	CELL_E[9].IMUX_IMUX[13]
TSTC405APUDCDINSTRUCTIONI[24]	in	CELL_E[9].IMUX_IMUX[12]
TSTC405APUDCDINSTRUCTIONI[23]	in	CELL_E[10].IMUX_IMUX[12]
TSTC405APUDCDINSTRUCTIONI[22]	in	CELL_E[10].IMUX_IMUX[11]
TSTC405APUDCDINSTRUCTIONI[21]	in	CELL_E[10].IMUX_IMUX[10]
TSTC405APUDCDINSTRUCTIONI[20]	in	CELL_E[10].IMUX_IMUX[9]
TSTC405APUDCDINSTRUCTIONI[19]	in	CELL_E[11].IMUX_IMUX[11]
TSTC405APUDCDINSTRUCTIONI[18]	in	CELL_E[11].IMUX_IMUX[10]
TSTC405APUDCDINSTRUCTIONI[17]	in	CELL_E[11].IMUX_IMUX[9]
TSTC405APUDCDINSTRUCTIONI[16]	in	CELL_E[11].IMUX_IMUX[8]
TSTC405APUDCDINSTRUCTIONI[15]	in	CELL_E[12].IMUX_IMUX[11]
TSTC405APUDCDINSTRUCTIONI[14]	in	CELL_E[12].IMUX_IMUX[10]
TSTC405APUDCDINSTRUCTIONI[13]	in	CELL_E[12].IMUX_IMUX[9]
TSTC405APUDCDINSTRUCTIONI[12]	in	CELL_E[12].IMUX_IMUX[8]
TSTC405APUDCDINSTRUCTIONI[11]	in	CELL_E[13].IMUX_IMUX[15]
TSTC405APUDCDINSTRUCTIONI[10]	in	CELL_E[13].IMUX_IMUX[14]
TSTC405APUDCDINSTRUCTIONI[9]	in	CELL_E[13].IMUX_IMUX[13]
TSTC405APUDCDINSTRUCTIONI[8]	in	CELL_E[13].IMUX_IMUX[12]
TSTC405APUDCDINSTRUCTIONI[7]	in	CELL_E[13].IMUX_IMUX[11]
TSTC405APUDCDINSTRUCTIONI[6]	in	CELL_E[13].IMUX_IMUX[10]
TSTC405APUDCDINSTRUCTIONI[5]	in	CELL_E[13].IMUX_IMUX[9]
TSTC405APUDCDINSTRUCTIONI[4]	in	CELL_E[13].IMUX_IMUX[8]
TSTC405APUDCDINSTRUCTIONI[3]	in	CELL_E[14].IMUX_IMUX[16]
TSTC405APUDCDINSTRUCTIONI[2]	in	CELL_E[14].IMUX_IMUX[15]
TSTC405APUDCDINSTRUCTIONI[1]	in	CELL_E[14].IMUX_IMUX[14]
TSTC405APUDCDINSTRUCTIONI[0]	in	CELL_E[14].IMUX_IMUX[13]
TSTC405APUEXEFLUSHI	in	CELL_E[21].IMUX_IMUX[10]
TSTC405APUEXEHOLDI	in	CELL_E[21].IMUX_IMUX[11]
TSTC405APUEXELOADDBUSI[31]	in	CELL_E[1].IMUX_IMUX[19]
TSTC405APUEXELOADDBUSI[30]	in	CELL_E[1].IMUX_IMUX[18]
TSTC405APUEXELOADDBUSI[29]	in	CELL_E[1].IMUX_IMUX[17]
TSTC405APUEXELOADDBUSI[28]	in	CELL_E[1].IMUX_IMUX[16]
TSTC405APUEXELOADDBUSI[27]	in	CELL_E[2].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[26]	in	CELL_E[2].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[25]	in	CELL_E[2].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[24]	in	CELL_E[2].IMUX_IMUX[12]
TSTC405APUEXELOADDBUSI[23]	in	CELL_E[2].IMUX_IMUX[11]
TSTC405APUEXELOADDBUSI[22]	in	CELL_E[2].IMUX_IMUX[10]
TSTC405APUEXELOADDBUSI[21]	in	CELL_E[2].IMUX_IMUX[9]
TSTC405APUEXELOADDBUSI[20]	in	CELL_E[2].IMUX_IMUX[8]
TSTC405APUEXELOADDBUSI[19]	in	CELL_E[3].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[18]	in	CELL_E[3].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[17]	in	CELL_E[3].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[16]	in	CELL_E[3].IMUX_IMUX[12]
TSTC405APUEXELOADDBUSI[15]	in	CELL_E[4].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[14]	in	CELL_E[4].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[13]	in	CELL_E[4].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[12]	in	CELL_E[4].IMUX_IMUX[12]
TSTC405APUEXELOADDBUSI[11]	in	CELL_E[5].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[10]	in	CELL_E[5].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[9]	in	CELL_E[5].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[8]	in	CELL_E[5].IMUX_IMUX[12]
TSTC405APUEXELOADDBUSI[7]	in	CELL_E[6].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[6]	in	CELL_E[6].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[5]	in	CELL_E[6].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[4]	in	CELL_E[6].IMUX_IMUX[12]
TSTC405APUEXELOADDBUSI[3]	in	CELL_E[7].IMUX_IMUX[15]
TSTC405APUEXELOADDBUSI[2]	in	CELL_E[7].IMUX_IMUX[14]
TSTC405APUEXELOADDBUSI[1]	in	CELL_E[7].IMUX_IMUX[13]
TSTC405APUEXELOADDBUSI[0]	in	CELL_E[7].IMUX_IMUX[12]
TSTC405APUEXELOADDVALIDI	in	CELL_E[22].IMUX_IMUX[8]
TSTC405APUEXERADATAI[31]	in	CELL_E[8].IMUX_IMUX[19]
TSTC405APUEXERADATAI[30]	in	CELL_E[8].IMUX_IMUX[18]
TSTC405APUEXERADATAI[29]	in	CELL_E[8].IMUX_IMUX[17]
TSTC405APUEXERADATAI[28]	in	CELL_E[8].IMUX_IMUX[16]
TSTC405APUEXERADATAI[27]	in	CELL_E[9].IMUX_IMUX[19]
TSTC405APUEXERADATAI[26]	in	CELL_E[9].IMUX_IMUX[18]
TSTC405APUEXERADATAI[25]	in	CELL_E[9].IMUX_IMUX[17]
TSTC405APUEXERADATAI[24]	in	CELL_E[9].IMUX_IMUX[16]
TSTC405APUEXERADATAI[23]	in	CELL_E[10].IMUX_IMUX[16]
TSTC405APUEXERADATAI[22]	in	CELL_E[10].IMUX_IMUX[15]
TSTC405APUEXERADATAI[21]	in	CELL_E[10].IMUX_IMUX[14]
TSTC405APUEXERADATAI[20]	in	CELL_E[10].IMUX_IMUX[13]
TSTC405APUEXERADATAI[19]	in	CELL_E[11].IMUX_IMUX[19]
TSTC405APUEXERADATAI[18]	in	CELL_E[11].IMUX_IMUX[18]
TSTC405APUEXERADATAI[17]	in	CELL_E[11].IMUX_IMUX[17]
TSTC405APUEXERADATAI[16]	in	CELL_E[11].IMUX_IMUX[16]
TSTC405APUEXERADATAI[15]	in	CELL_E[12].IMUX_IMUX[19]
TSTC405APUEXERADATAI[14]	in	CELL_E[12].IMUX_IMUX[18]
TSTC405APUEXERADATAI[13]	in	CELL_E[12].IMUX_IMUX[17]
TSTC405APUEXERADATAI[12]	in	CELL_E[12].IMUX_IMUX[16]
TSTC405APUEXERADATAI[11]	in	CELL_E[13].IMUX_IMUX[19]
TSTC405APUEXERADATAI[10]	in	CELL_E[13].IMUX_IMUX[18]
TSTC405APUEXERADATAI[9]	in	CELL_E[13].IMUX_IMUX[17]
TSTC405APUEXERADATAI[8]	in	CELL_E[13].IMUX_IMUX[16]
TSTC405APUEXERADATAI[7]	in	CELL_E[14].IMUX_IMUX[12]
TSTC405APUEXERADATAI[6]	in	CELL_E[14].IMUX_IMUX[11]
TSTC405APUEXERADATAI[5]	in	CELL_E[14].IMUX_IMUX[10]
TSTC405APUEXERADATAI[4]	in	CELL_E[14].IMUX_IMUX[9]
TSTC405APUEXERADATAI[3]	in	CELL_E[14].IMUX_IMUX[8]
TSTC405APUEXERADATAI[2]	in	CELL_E[14].IMUX_IMUX[7]
TSTC405APUEXERADATAI[1]	in	CELL_E[14].IMUX_IMUX[6]
TSTC405APUEXERADATAI[0]	in	CELL_E[14].IMUX_IMUX[5]
TSTC405APUEXERBDATAI[31]	in	CELL_E[1].IMUX_IMUX[15]
TSTC405APUEXERBDATAI[30]	in	CELL_E[1].IMUX_IMUX[14]
TSTC405APUEXERBDATAI[29]	in	CELL_E[1].IMUX_IMUX[13]
TSTC405APUEXERBDATAI[28]	in	CELL_E[1].IMUX_IMUX[12]
TSTC405APUEXERBDATAI[27]	in	CELL_E[1].IMUX_IMUX[11]
TSTC405APUEXERBDATAI[26]	in	CELL_E[1].IMUX_IMUX[10]
TSTC405APUEXERBDATAI[25]	in	CELL_E[1].IMUX_IMUX[9]
TSTC405APUEXERBDATAI[24]	in	CELL_E[1].IMUX_IMUX[8]
TSTC405APUEXERBDATAI[23]	in	CELL_E[2].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[22]	in	CELL_E[2].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[21]	in	CELL_E[2].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[20]	in	CELL_E[2].IMUX_IMUX[16]
TSTC405APUEXERBDATAI[19]	in	CELL_E[3].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[18]	in	CELL_E[3].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[17]	in	CELL_E[3].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[16]	in	CELL_E[3].IMUX_IMUX[16]
TSTC405APUEXERBDATAI[15]	in	CELL_E[4].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[14]	in	CELL_E[4].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[13]	in	CELL_E[4].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[12]	in	CELL_E[4].IMUX_IMUX[16]
TSTC405APUEXERBDATAI[11]	in	CELL_E[5].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[10]	in	CELL_E[5].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[9]	in	CELL_E[5].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[8]	in	CELL_E[5].IMUX_IMUX[16]
TSTC405APUEXERBDATAI[7]	in	CELL_E[6].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[6]	in	CELL_E[6].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[5]	in	CELL_E[6].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[4]	in	CELL_E[6].IMUX_IMUX[16]
TSTC405APUEXERBDATAI[3]	in	CELL_E[7].IMUX_IMUX[19]
TSTC405APUEXERBDATAI[2]	in	CELL_E[7].IMUX_IMUX[18]
TSTC405APUEXERBDATAI[1]	in	CELL_E[7].IMUX_IMUX[17]
TSTC405APUEXERBDATAI[0]	in	CELL_E[7].IMUX_IMUX[16]
TSTC405APUEXEWDCNTI[1]	in	CELL_E[23].IMUX_IMUX[9]
TSTC405APUEXEWDCNTI[0]	in	CELL_E[23].IMUX_IMUX[8]
TSTC405APUMSRFE0I	in	CELL_E[23].IMUX_IMUX[10]
TSTC405APUMSRFE1I	in	CELL_E[23].IMUX_IMUX[11]
TSTC405APUWBBYTEENI[3]	in	CELL_E[0].IMUX_IMUX[13]
TSTC405APUWBBYTEENI[2]	in	CELL_E[0].IMUX_IMUX[12]
TSTC405APUWBBYTEENI[1]	in	CELL_E[0].IMUX_IMUX[11]
TSTC405APUWBBYTEENI[0]	in	CELL_E[0].IMUX_IMUX[10]
TSTC405APUWBENDIANI	in	CELL_E[22].IMUX_IMUX[9]
TSTC405APUWBFLUSHI	in	CELL_E[22].IMUX_IMUX[10]
TSTC405APUWBHOLDI	in	CELL_E[22].IMUX_IMUX[11]
TSTC405APUXERCAI	in	CELL_E[20].IMUX_IMUX[5]
LSSDCE0A	in	~CELL_W[15].IMUX_CE_OPTINV[0]
LSSDCE0CNTLPOINT	in	~CELL_W[14].IMUX_CE_OPTINV[3]
LSSDCE0SCAN	in	~CELL_W[14].IMUX_CE_OPTINV[2]
LSSDCE0TESTM3	in	~CELL_W[14].IMUX_CE_OPTINV[1]
LSSDCE1B	in	CELL_W[15].IMUX_IMUX[16]
LSSDCE1C1	in	CELL_W[9].IMUX_IMUX[13]
LSSDCE1C3BIST	in	CELL_W[12].IMUX_IMUX[6]
LSSDCE1CA1	in	CELL_W[9].IMUX_IMUX[14]
LSSDCE1CRAM	in	CELL_W[12].IMUX_IMUX[5]
LSSDSCANIN[15]	in	~CELL_W[12].IMUX_CE_OPTINV[3]
LSSDSCANIN[14]	in	~CELL_W[12].IMUX_CE_OPTINV[2]
LSSDSCANIN[13]	in	~CELL_W[12].IMUX_CE_OPTINV[1]
LSSDSCANIN[12]	in	~CELL_W[12].IMUX_CE_OPTINV[0]
LSSDSCANIN[11]	in	~CELL_W[11].IMUX_CE_OPTINV[3]
LSSDSCANIN[10]	in	~CELL_W[11].IMUX_CE_OPTINV[2]
LSSDSCANIN[9]	in	~CELL_W[11].IMUX_CE_OPTINV[1]
LSSDSCANIN[8]	in	~CELL_W[11].IMUX_CE_OPTINV[0]
LSSDSCANIN[7]	in	~CELL_W[10].IMUX_CE_OPTINV[3]
LSSDSCANIN[6]	in	~CELL_W[10].IMUX_CE_OPTINV[2]
LSSDSCANIN[5]	in	~CELL_W[10].IMUX_CE_OPTINV[1]
LSSDSCANIN[4]	in	~CELL_W[10].IMUX_CE_OPTINV[0]
LSSDSCANIN[3]	in	~CELL_W[9].IMUX_CE_OPTINV[3]
LSSDSCANIN[2]	in	~CELL_W[9].IMUX_CE_OPTINV[2]
LSSDSCANIN[1]	in	~CELL_W[9].IMUX_CE_OPTINV[1]
LSSDSCANIN[0]	in	~CELL_W[9].IMUX_CE_OPTINV[0]
TESTSELI	in	~CELL_W[7].IMUX_CE_OPTINV[1]
TIEC405CLOCKENABLE	in	CELL_W[9].IMUX_IMUX[7]
TIEC405CLOCKSELECTS[1]	in	~CELL_S[6].IMUX_SR_OPTINV[1]
TIEC405CLOCKSELECTS[0]	in	~CELL_S[6].IMUX_SR_OPTINV[0]
TIEC405DCUMARGIN	in	~CELL_S[6].IMUX_CE_OPTINV[1]
TIEC405DETERMINISTICMULT	in	~CELL_S[2].IMUX_CE_OPTINV[0]
TIEC405DISOPERANDFWD	in	~CELL_S[2].IMUX_CE_OPTINV[1]
TIEC405DUTYENABLE	in	CELL_W[9].IMUX_IMUX[8]
TIEC405ICUMARGIN	in	~CELL_S[6].IMUX_CE_OPTINV[0]
TIEC405MMUEN	in	~CELL_S[2].IMUX_CE_OPTINV[2]
TIEC405TAGMARGIN	in	~CELL_S[6].IMUX_CE_OPTINV[2]
TIEC405TLBMARGIN	in	~CELL_S[6].IMUX_CE_OPTINV[3]
TIEPVRBIT[31]	in	~CELL_W[8].IMUX_CE_OPTINV[3]
TIEPVRBIT[30]	in	~CELL_W[8].IMUX_CE_OPTINV[2]
TIEPVRBIT[29]	in	~CELL_W[8].IMUX_CE_OPTINV[1]
TIEPVRBIT[28]	in	~CELL_W[8].IMUX_CE_OPTINV[0]
TIEPVRBIT[27]	in	CELL_W[19].IMUX_IMUX[18]
TIEPVRBIT[26]	in	CELL_W[19].IMUX_IMUX[17]
TIEPVRBIT[25]	in	CELL_W[19].IMUX_IMUX[16]
TIEPVRBIT[24]	in	CELL_W[19].IMUX_IMUX[15]
TIEPVRBIT[23]	in	CELL_W[18].IMUX_IMUX[18]
TIEPVRBIT[22]	in	CELL_W[18].IMUX_IMUX[17]
TIEPVRBIT[21]	in	CELL_W[18].IMUX_IMUX[16]
TIEPVRBIT[20]	in	CELL_W[18].IMUX_IMUX[15]
TIEPVRBIT[19]	in	CELL_W[17].IMUX_IMUX[19]
TIEPVRBIT[18]	in	CELL_W[17].IMUX_IMUX[18]
TIEPVRBIT[17]	in	CELL_W[17].IMUX_IMUX[17]
TIEPVRBIT[16]	in	CELL_W[17].IMUX_IMUX[16]
TIEPVRBIT[15]	in	CELL_W[16].IMUX_IMUX[19]
TIEPVRBIT[14]	in	CELL_W[16].IMUX_IMUX[18]
TIEPVRBIT[13]	in	CELL_W[16].IMUX_IMUX[17]
TIEPVRBIT[12]	in	CELL_W[16].IMUX_IMUX[16]
TIEPVRBIT[11]	in	~CELL_W[13].IMUX_CE_OPTINV[3]
TIEPVRBIT[10]	in	~CELL_W[13].IMUX_CE_OPTINV[2]
TIEPVRBIT[9]	in	~CELL_W[13].IMUX_CE_OPTINV[1]
TIEPVRBIT[8]	in	~CELL_W[13].IMUX_CE_OPTINV[0]
TIEPVRBIT[7]	in	CELL_W[21].IMUX_IMUX[18]
TIEPVRBIT[6]	in	CELL_W[21].IMUX_IMUX[17]
TIEPVRBIT[5]	in	CELL_W[21].IMUX_IMUX[16]
TIEPVRBIT[4]	in	CELL_W[21].IMUX_IMUX[15]
TIEPVRBIT[3]	in	CELL_W[20].IMUX_IMUX[18]
TIEPVRBIT[2]	in	CELL_W[20].IMUX_IMUX[17]
TIEPVRBIT[1]	in	CELL_W[20].IMUX_IMUX[16]
TIEPVRBIT[0]	in	CELL_W[20].IMUX_IMUX[15]
TSTCLKINACTI	in	CELL_W[10].IMUX_IMUX[12]
TSTCPUCLKENI	in	CELL_W[10].IMUX_IMUX[11]
TSTJTAGENI	in	CELL_W[10].IMUX_IMUX[14]
TSTRESETCHIPI	in	CELL_W[11].IMUX_IMUX[9]
TSTRESETCOREI	in	CELL_W[10].IMUX_IMUX[15]
TSTRESETSYSI	in	CELL_W[11].IMUX_IMUX[10]
TSTSEPPCEMACI	in	~CELL_S[6].IMUX_SR_OPTINV[3]
TSTSIGASKETI[1]	in	CELL_W[20].IMUX_IMUX[14]
TSTSIGASKETI[0]	in	CELL_W[20].IMUX_IMUX[13]
TSTTIMERENI	in	CELL_W[10].IMUX_IMUX[13]
TSTTRSTNEGI	in	CELL_W[22].IMUX_IMUX[16]
TSTUSECPMCLKSELI	in	~CELL_W[7].IMUX_CE_OPTINV[3]
BISTCE0CONTINUE	in	~CELL_W[14].IMUX_CE_OPTINV[0]
BISTCE0DIAGSHIFTSEL	in	~CELL_W[15].IMUX_CE_OPTINV[2]
BISTCE0LOADIN	in	~CELL_W[11].IMUX_SR_OPTINV[0]
BISTCE0LOADOPCODE	in	~CELL_W[15].IMUX_CE_OPTINV[3]
BISTCE0TESTM1	in	~CELL_W[15].IMUX_CE_OPTINV[1]
C405TESTRESERVE1	in	~CELL_W[11].IMUX_SR_OPTINV[1]
C405TESTRESERVE2	in	~CELL_W[11].IMUX_SR_OPTINV[2]
C405CPMCLOCKFB	out	CELL_E[12].OUT_SEC_TMIN[3]
C405CPMCORESLEEPREQ	out	CELL_W[8].OUT_BEST_TMIN[7]
C405CPMMSRCE	out	CELL_W[8].OUT_SEC_TMIN[0]
C405CPMMSREE	out	CELL_W[8].OUT_SEC_TMIN[1]
C405CPMTIMERIRQ	out	CELL_W[8].OUT_SEC_TMIN[2]
C405CPMTIMERRESETREQ	out	CELL_W[8].OUT_SEC_TMIN[3]
C405RSTCHIPRESETREQ	out	CELL_W[9].OUT_SEC_TMIN[1]
C405RSTCORERESETREQ	out	CELL_W[9].OUT_SEC_TMIN[2]
C405RSTSYSRESETREQ	out	CELL_W[9].OUT_SEC_TMIN[3]
C405PLBDCUABORT	out	CELL_E[15].OUT_BEST_TMIN[7]
C405PLBDCUABUS[31]	out	CELL_E[4].OUT_BEST_TMIN[7]
C405PLBDCUABUS[30]	out	CELL_E[4].OUT_BEST_TMIN[6]
C405PLBDCUABUS[29]	out	CELL_E[4].OUT_BEST_TMIN[5]
C405PLBDCUABUS[28]	out	CELL_E[4].OUT_BEST_TMIN[4]
C405PLBDCUABUS[27]	out	CELL_E[5].OUT_BEST_TMIN[7]
C405PLBDCUABUS[26]	out	CELL_E[5].OUT_BEST_TMIN[6]
C405PLBDCUABUS[25]	out	CELL_E[5].OUT_BEST_TMIN[5]
C405PLBDCUABUS[24]	out	CELL_E[5].OUT_BEST_TMIN[4]
C405PLBDCUABUS[23]	out	CELL_E[6].OUT_BEST_TMIN[7]
C405PLBDCUABUS[22]	out	CELL_E[6].OUT_BEST_TMIN[6]
C405PLBDCUABUS[21]	out	CELL_E[6].OUT_BEST_TMIN[5]
C405PLBDCUABUS[20]	out	CELL_E[6].OUT_BEST_TMIN[4]
C405PLBDCUABUS[19]	out	CELL_E[7].OUT_BEST_TMIN[7]
C405PLBDCUABUS[18]	out	CELL_E[7].OUT_BEST_TMIN[6]
C405PLBDCUABUS[17]	out	CELL_E[7].OUT_BEST_TMIN[5]
C405PLBDCUABUS[16]	out	CELL_E[7].OUT_BEST_TMIN[4]
C405PLBDCUABUS[15]	out	CELL_E[8].OUT_BEST_TMIN[7]
C405PLBDCUABUS[14]	out	CELL_E[8].OUT_BEST_TMIN[6]
C405PLBDCUABUS[13]	out	CELL_E[8].OUT_BEST_TMIN[5]
C405PLBDCUABUS[12]	out	CELL_E[8].OUT_BEST_TMIN[4]
C405PLBDCUABUS[11]	out	CELL_E[9].OUT_BEST_TMIN[7]
C405PLBDCUABUS[10]	out	CELL_E[9].OUT_BEST_TMIN[6]
C405PLBDCUABUS[9]	out	CELL_E[9].OUT_BEST_TMIN[5]
C405PLBDCUABUS[8]	out	CELL_E[9].OUT_BEST_TMIN[4]
C405PLBDCUABUS[7]	out	CELL_E[10].OUT_BEST_TMIN[7]
C405PLBDCUABUS[6]	out	CELL_E[10].OUT_BEST_TMIN[6]
C405PLBDCUABUS[5]	out	CELL_E[10].OUT_BEST_TMIN[5]
C405PLBDCUABUS[4]	out	CELL_E[10].OUT_BEST_TMIN[4]
C405PLBDCUABUS[3]	out	CELL_E[11].OUT_BEST_TMIN[7]
C405PLBDCUABUS[2]	out	CELL_E[11].OUT_BEST_TMIN[6]
C405PLBDCUABUS[1]	out	CELL_E[11].OUT_BEST_TMIN[5]
C405PLBDCUABUS[0]	out	CELL_E[11].OUT_BEST_TMIN[4]
C405PLBDCUBE[7]	out	CELL_E[2].OUT_BEST_TMIN[7]
C405PLBDCUBE[6]	out	CELL_E[2].OUT_BEST_TMIN[6]
C405PLBDCUBE[5]	out	CELL_E[2].OUT_BEST_TMIN[5]
C405PLBDCUBE[4]	out	CELL_E[2].OUT_BEST_TMIN[4]
C405PLBDCUBE[3]	out	CELL_E[12].OUT_BEST_TMIN[7]
C405PLBDCUBE[2]	out	CELL_E[12].OUT_BEST_TMIN[6]
C405PLBDCUBE[1]	out	CELL_E[12].OUT_BEST_TMIN[5]
C405PLBDCUBE[0]	out	CELL_E[12].OUT_BEST_TMIN[4]
C405PLBDCUCACHEABLE	out	CELL_E[3].OUT_SEC_TMIN[2]
C405PLBDCUGUARDED	out	CELL_E[13].OUT_BEST_TMIN[4]
C405PLBDCUPRIORITY[1]	out	CELL_E[15].OUT_BEST_TMIN[6]
C405PLBDCUPRIORITY[0]	out	CELL_E[15].OUT_BEST_TMIN[5]
C405PLBDCUREQUEST	out	CELL_E[15].OUT_BEST_TMIN[4]
C405PLBDCURNW	out	CELL_E[13].OUT_BEST_TMIN[6]
C405PLBDCUSIZE2	out	CELL_E[3].OUT_SEC_TMIN[0]
C405PLBDCUU0ATTR	out	CELL_E[3].OUT_SEC_TMIN[1]
C405PLBDCUWRDBUS[63]	out	CELL_E[0].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[62]	out	CELL_E[0].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[61]	out	CELL_E[0].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[60]	out	CELL_E[0].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[59]	out	CELL_E[1].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[58]	out	CELL_E[1].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[57]	out	CELL_E[1].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[56]	out	CELL_E[1].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[55]	out	CELL_E[2].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[54]	out	CELL_E[2].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[53]	out	CELL_E[2].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[52]	out	CELL_E[2].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[51]	out	CELL_E[3].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[50]	out	CELL_E[3].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[49]	out	CELL_E[3].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[48]	out	CELL_E[3].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[47]	out	CELL_E[4].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[46]	out	CELL_E[4].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[45]	out	CELL_E[4].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[44]	out	CELL_E[4].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[43]	out	CELL_E[5].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[42]	out	CELL_E[5].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[41]	out	CELL_E[5].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[40]	out	CELL_E[5].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[39]	out	CELL_E[6].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[38]	out	CELL_E[6].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[37]	out	CELL_E[6].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[36]	out	CELL_E[6].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[35]	out	CELL_E[7].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[34]	out	CELL_E[7].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[33]	out	CELL_E[7].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[32]	out	CELL_E[7].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[31]	out	CELL_E[8].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[30]	out	CELL_E[8].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[29]	out	CELL_E[8].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[28]	out	CELL_E[8].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[27]	out	CELL_E[9].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[26]	out	CELL_E[9].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[25]	out	CELL_E[9].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[24]	out	CELL_E[9].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[23]	out	CELL_E[10].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[22]	out	CELL_E[10].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[21]	out	CELL_E[10].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[20]	out	CELL_E[10].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[19]	out	CELL_E[11].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[18]	out	CELL_E[11].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[17]	out	CELL_E[11].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[16]	out	CELL_E[11].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[15]	out	CELL_E[12].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[14]	out	CELL_E[12].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[13]	out	CELL_E[12].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[12]	out	CELL_E[12].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[11]	out	CELL_E[13].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[10]	out	CELL_E[13].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[9]	out	CELL_E[13].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[8]	out	CELL_E[13].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[7]	out	CELL_E[14].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[6]	out	CELL_E[14].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[5]	out	CELL_E[14].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[4]	out	CELL_E[14].OUT_BEST_TMIN[0]
C405PLBDCUWRDBUS[3]	out	CELL_E[15].OUT_BEST_TMIN[3]
C405PLBDCUWRDBUS[2]	out	CELL_E[15].OUT_BEST_TMIN[2]
C405PLBDCUWRDBUS[1]	out	CELL_E[15].OUT_BEST_TMIN[1]
C405PLBDCUWRDBUS[0]	out	CELL_E[15].OUT_BEST_TMIN[0]
C405PLBDCUWRITETHRU	out	CELL_E[13].OUT_BEST_TMIN[5]
C405PLBICUABORT	out	CELL_E[3].OUT_BEST_TMIN[7]
C405PLBICUABUS[29]	out	CELL_E[4].OUT_SEC_TMIN[1]
C405PLBICUABUS[28]	out	CELL_E[4].OUT_SEC_TMIN[0]
C405PLBICUABUS[27]	out	CELL_E[5].OUT_SEC_TMIN[3]
C405PLBICUABUS[26]	out	CELL_E[5].OUT_SEC_TMIN[2]
C405PLBICUABUS[25]	out	CELL_E[5].OUT_SEC_TMIN[1]
C405PLBICUABUS[24]	out	CELL_E[5].OUT_SEC_TMIN[0]
C405PLBICUABUS[23]	out	CELL_E[6].OUT_SEC_TMIN[3]
C405PLBICUABUS[22]	out	CELL_E[6].OUT_SEC_TMIN[2]
C405PLBICUABUS[21]	out	CELL_E[6].OUT_SEC_TMIN[1]
C405PLBICUABUS[20]	out	CELL_E[6].OUT_SEC_TMIN[0]
C405PLBICUABUS[19]	out	CELL_E[7].OUT_SEC_TMIN[3]
C405PLBICUABUS[18]	out	CELL_E[7].OUT_SEC_TMIN[2]
C405PLBICUABUS[17]	out	CELL_E[7].OUT_SEC_TMIN[1]
C405PLBICUABUS[16]	out	CELL_E[7].OUT_SEC_TMIN[0]
C405PLBICUABUS[15]	out	CELL_E[8].OUT_SEC_TMIN[3]
C405PLBICUABUS[14]	out	CELL_E[8].OUT_SEC_TMIN[2]
C405PLBICUABUS[13]	out	CELL_E[8].OUT_SEC_TMIN[1]
C405PLBICUABUS[12]	out	CELL_E[8].OUT_SEC_TMIN[0]
C405PLBICUABUS[11]	out	CELL_E[9].OUT_SEC_TMIN[3]
C405PLBICUABUS[10]	out	CELL_E[9].OUT_SEC_TMIN[2]
C405PLBICUABUS[9]	out	CELL_E[9].OUT_SEC_TMIN[1]
C405PLBICUABUS[8]	out	CELL_E[9].OUT_SEC_TMIN[0]
C405PLBICUABUS[7]	out	CELL_E[10].OUT_SEC_TMIN[3]
C405PLBICUABUS[6]	out	CELL_E[10].OUT_SEC_TMIN[2]
C405PLBICUABUS[5]	out	CELL_E[10].OUT_SEC_TMIN[1]
C405PLBICUABUS[4]	out	CELL_E[10].OUT_SEC_TMIN[0]
C405PLBICUABUS[3]	out	CELL_E[11].OUT_SEC_TMIN[3]
C405PLBICUABUS[2]	out	CELL_E[11].OUT_SEC_TMIN[2]
C405PLBICUABUS[1]	out	CELL_E[11].OUT_SEC_TMIN[1]
C405PLBICUABUS[0]	out	CELL_E[11].OUT_SEC_TMIN[0]
C405PLBICUCACHEABLE	out	CELL_E[3].OUT_SEC_TMIN[3]
C405PLBICUPRIORITY[1]	out	CELL_E[3].OUT_BEST_TMIN[6]
C405PLBICUPRIORITY[0]	out	CELL_E[3].OUT_BEST_TMIN[5]
C405PLBICUREQUEST	out	CELL_E[3].OUT_BEST_TMIN[4]
C405PLBICUSIZE[3]	out	CELL_E[2].OUT_SEC_TMIN[1]
C405PLBICUSIZE[2]	out	CELL_E[2].OUT_SEC_TMIN[0]
C405PLBICUU0ATTR	out	CELL_E[2].OUT_SEC_TMIN[2]
DCREMACENABLER	out	CELL_W[2].OUT_BEST_TMIN[7]
EXTDCRABUS[9]	out	CELL_W[13].OUT_BEST_TMIN[4]
EXTDCRABUS[8]	out	CELL_W[13].OUT_BEST_TMIN[5]
EXTDCRABUS[7]	out	CELL_W[14].OUT_BEST_TMIN[7]
EXTDCRABUS[6]	out	CELL_W[14].OUT_BEST_TMIN[6]
EXTDCRABUS[5]	out	CELL_W[14].OUT_BEST_TMIN[5]
EXTDCRABUS[4]	out	CELL_W[14].OUT_BEST_TMIN[4]
EXTDCRABUS[3]	out	CELL_W[15].OUT_BEST_TMIN[7]
EXTDCRABUS[2]	out	CELL_W[15].OUT_BEST_TMIN[6]
EXTDCRABUS[1]	out	CELL_W[15].OUT_BEST_TMIN[5]
EXTDCRABUS[0]	out	CELL_W[15].OUT_BEST_TMIN[4]
EXTDCRDBUSOUT[31]	out	CELL_W[8].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[30]	out	CELL_W[8].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[29]	out	CELL_W[8].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[28]	out	CELL_W[8].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[27]	out	CELL_W[9].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[26]	out	CELL_W[9].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[25]	out	CELL_W[9].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[24]	out	CELL_W[9].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[23]	out	CELL_W[10].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[22]	out	CELL_W[10].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[21]	out	CELL_W[10].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[20]	out	CELL_W[10].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[19]	out	CELL_W[11].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[18]	out	CELL_W[11].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[17]	out	CELL_W[11].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[16]	out	CELL_W[11].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[15]	out	CELL_W[12].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[14]	out	CELL_W[12].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[13]	out	CELL_W[12].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[12]	out	CELL_W[12].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[11]	out	CELL_W[13].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[10]	out	CELL_W[13].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[9]	out	CELL_W[13].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[8]	out	CELL_W[13].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[7]	out	CELL_W[14].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[6]	out	CELL_W[14].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[5]	out	CELL_W[14].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[4]	out	CELL_W[14].OUT_BEST_TMIN[0]
EXTDCRDBUSOUT[3]	out	CELL_W[15].OUT_BEST_TMIN[3]
EXTDCRDBUSOUT[2]	out	CELL_W[15].OUT_BEST_TMIN[2]
EXTDCRDBUSOUT[1]	out	CELL_W[15].OUT_BEST_TMIN[1]
EXTDCRDBUSOUT[0]	out	CELL_W[15].OUT_BEST_TMIN[0]
EXTDCRREAD	out	CELL_W[12].OUT_BEST_TMIN[4]
EXTDCRWRITE	out	CELL_W[12].OUT_BEST_TMIN[5]
TSTDCRC405ACKO	out	CELL_E[15].OUT_HALF0_BEL[3], CELL_E[15].OUT_HALF1_BEL[3]
TSTDCRC405DBUSINO[31]	out	CELL_W[2].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[30]	out	CELL_W[2].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[29]	out	CELL_W[2].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[28]	out	CELL_W[2].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[27]	out	CELL_W[3].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[26]	out	CELL_W[3].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[25]	out	CELL_W[3].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[24]	out	CELL_W[3].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[23]	out	CELL_W[5].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[22]	out	CELL_W[5].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[21]	out	CELL_W[5].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[20]	out	CELL_W[5].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[19]	out	CELL_W[10].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[18]	out	CELL_W[10].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[17]	out	CELL_W[10].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[16]	out	CELL_W[10].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[15]	out	CELL_W[11].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[14]	out	CELL_W[11].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[13]	out	CELL_W[11].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[12]	out	CELL_W[11].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[11]	out	CELL_W[18].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[10]	out	CELL_W[18].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[9]	out	CELL_W[18].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[8]	out	CELL_W[18].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[7]	out	CELL_W[19].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[6]	out	CELL_W[19].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[5]	out	CELL_W[19].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[4]	out	CELL_W[19].OUT_SEC_TMIN[0]
TSTDCRC405DBUSINO[3]	out	CELL_W[20].OUT_SEC_TMIN[3]
TSTDCRC405DBUSINO[2]	out	CELL_W[20].OUT_SEC_TMIN[2]
TSTDCRC405DBUSINO[1]	out	CELL_W[20].OUT_SEC_TMIN[1]
TSTDCRC405DBUSINO[0]	out	CELL_W[20].OUT_SEC_TMIN[0]
C405DBGLOADDATAONAPUDBUS	out	CELL_W[12].OUT_SEC_TMIN[3]
C405DBGMSRWE	out	CELL_W[12].OUT_BEST_TMIN[6]
C405DBGSTOPACK	out	CELL_W[13].OUT_SEC_TMIN[3]
C405DBGWBCOMPLETE	out	CELL_W[13].OUT_BEST_TMIN[6]
C405DBGWBFULL	out	CELL_W[8].OUT_BEST_TMIN[6]
C405DBGWBIAR[29]	out	CELL_W[8].OUT_BEST_TMIN[5]
C405DBGWBIAR[28]	out	CELL_W[8].OUT_BEST_TMIN[4]
C405DBGWBIAR[27]	out	CELL_W[9].OUT_BEST_TMIN[7]
C405DBGWBIAR[26]	out	CELL_W[9].OUT_BEST_TMIN[6]
C405DBGWBIAR[25]	out	CELL_W[9].OUT_BEST_TMIN[5]
C405DBGWBIAR[24]	out	CELL_W[9].OUT_BEST_TMIN[4]
C405DBGWBIAR[23]	out	CELL_W[10].OUT_BEST_TMIN[7]
C405DBGWBIAR[22]	out	CELL_W[10].OUT_BEST_TMIN[6]
C405DBGWBIAR[21]	out	CELL_W[10].OUT_BEST_TMIN[5]
C405DBGWBIAR[20]	out	CELL_W[10].OUT_BEST_TMIN[4]
C405DBGWBIAR[19]	out	CELL_W[11].OUT_BEST_TMIN[7]
C405DBGWBIAR[18]	out	CELL_W[11].OUT_BEST_TMIN[6]
C405DBGWBIAR[17]	out	CELL_W[11].OUT_BEST_TMIN[5]
C405DBGWBIAR[16]	out	CELL_W[11].OUT_BEST_TMIN[4]
C405DBGWBIAR[15]	out	CELL_W[12].OUT_SEC_TMIN[2]
C405DBGWBIAR[14]	out	CELL_W[12].OUT_SEC_TMIN[1]
C405DBGWBIAR[13]	out	CELL_W[12].OUT_SEC_TMIN[0]
C405DBGWBIAR[12]	out	CELL_W[12].OUT_BEST_TMIN[7]
C405DBGWBIAR[11]	out	CELL_W[13].OUT_SEC_TMIN[2]
C405DBGWBIAR[10]	out	CELL_W[13].OUT_SEC_TMIN[1]
C405DBGWBIAR[9]	out	CELL_W[13].OUT_SEC_TMIN[0]
C405DBGWBIAR[8]	out	CELL_W[13].OUT_BEST_TMIN[7]
C405DBGWBIAR[7]	out	CELL_W[14].OUT_SEC_TMIN[3]
C405DBGWBIAR[6]	out	CELL_W[14].OUT_SEC_TMIN[2]
C405DBGWBIAR[5]	out	CELL_W[14].OUT_SEC_TMIN[1]
C405DBGWBIAR[4]	out	CELL_W[14].OUT_SEC_TMIN[0]
C405DBGWBIAR[3]	out	CELL_W[15].OUT_SEC_TMIN[3]
C405DBGWBIAR[2]	out	CELL_W[15].OUT_SEC_TMIN[2]
C405DBGWBIAR[1]	out	CELL_W[15].OUT_SEC_TMIN[1]
C405DBGWBIAR[0]	out	CELL_W[15].OUT_SEC_TMIN[0]
C405JTGCAPTUREDR	out	CELL_S[0].OUT_BEST_TMIN[0]
C405JTGEXTEST	out	CELL_S[0].OUT_BEST_TMIN[1]
C405JTGPGMOUT	out	CELL_S[0].OUT_BEST_TMIN[2]
C405JTGSHIFTDR	out	CELL_W[4].OUT_SEC_TMIN[0]
C405JTGTDO	out	CELL_W[4].OUT_SEC_TMIN[1]
C405JTGTDOEN	out	CELL_W[4].OUT_SEC_TMIN[2]
C405JTGUPDATEDR	out	CELL_W[4].OUT_SEC_TMIN[3]
C405TRCCYCLE	out	CELL_E[2].OUT_SEC_TMIN[3]
C405TRCEVENEXECUTIONSTATUS[1]	out	CELL_S[0].OUT_BEST_TMIN[4]
C405TRCEVENEXECUTIONSTATUS[0]	out	CELL_S[0].OUT_BEST_TMIN[3]
C405TRCODDEXECUTIONSTATUS[1]	out	CELL_S[0].OUT_BEST_TMIN[6]
C405TRCODDEXECUTIONSTATUS[0]	out	CELL_S[0].OUT_BEST_TMIN[5]
C405TRCTRACESTATUS[3]	out	CELL_E[1].OUT_SEC_TMIN[3]
C405TRCTRACESTATUS[2]	out	CELL_E[1].OUT_SEC_TMIN[2]
C405TRCTRACESTATUS[1]	out	CELL_E[1].OUT_SEC_TMIN[1]
C405TRCTRACESTATUS[0]	out	CELL_E[1].OUT_SEC_TMIN[0]
C405TRCTRIGGEREVENTOUT	out	CELL_E[1].OUT_BEST_TMIN[7]
C405TRCTRIGGEREVENTTYPE[10]	out	CELL_E[1].OUT_BEST_TMIN[6]
C405TRCTRIGGEREVENTTYPE[9]	out	CELL_E[1].OUT_BEST_TMIN[5]
C405TRCTRIGGEREVENTTYPE[8]	out	CELL_E[1].OUT_BEST_TMIN[4]
C405TRCTRIGGEREVENTTYPE[7]	out	CELL_E[0].OUT_SEC_TMIN[3]
C405TRCTRIGGEREVENTTYPE[6]	out	CELL_E[0].OUT_SEC_TMIN[2]
C405TRCTRIGGEREVENTTYPE[5]	out	CELL_E[0].OUT_SEC_TMIN[1]
C405TRCTRIGGEREVENTTYPE[4]	out	CELL_E[0].OUT_SEC_TMIN[0]
C405TRCTRIGGEREVENTTYPE[3]	out	CELL_E[0].OUT_BEST_TMIN[7]
C405TRCTRIGGEREVENTTYPE[2]	out	CELL_E[0].OUT_BEST_TMIN[6]
C405TRCTRIGGEREVENTTYPE[1]	out	CELL_E[0].OUT_BEST_TMIN[5]
C405TRCTRIGGEREVENTTYPE[0]	out	CELL_E[0].OUT_BEST_TMIN[4]
C405XXXMACHINECHECK	out	CELL_W[9].OUT_SEC_TMIN[0]
DSOCMBRAMABUS[29]	out	CELL_N[2].OUT_SEC_TMIN[1]
DSOCMBRAMABUS[28]	out	CELL_N[2].OUT_SEC_TMIN[0]
DSOCMBRAMABUS[27]	out	CELL_N[0].OUT_SEC_TMIN[3]
DSOCMBRAMABUS[26]	out	CELL_N[0].OUT_SEC_TMIN[2]
DSOCMBRAMABUS[25]	out	CELL_N[0].OUT_SEC_TMIN[1]
DSOCMBRAMABUS[24]	out	CELL_N[0].OUT_SEC_TMIN[0]
DSOCMBRAMABUS[23]	out	CELL_N[1].OUT_SEC_TMIN[3]
DSOCMBRAMABUS[22]	out	CELL_N[1].OUT_SEC_TMIN[2]
DSOCMBRAMABUS[21]	out	CELL_N[1].OUT_SEC_TMIN[1]
DSOCMBRAMABUS[20]	out	CELL_N[1].OUT_SEC_TMIN[0]
DSOCMBRAMABUS[19]	out	CELL_N[1].OUT_BEST_TMIN[7]
DSOCMBRAMABUS[18]	out	CELL_N[1].OUT_BEST_TMIN[6]
DSOCMBRAMABUS[17]	out	CELL_N[1].OUT_BEST_TMIN[5]
DSOCMBRAMABUS[16]	out	CELL_N[1].OUT_BEST_TMIN[4]
DSOCMBRAMABUS[15]	out	CELL_W[23].OUT_SEC_TMIN[3]
DSOCMBRAMABUS[14]	out	CELL_W[23].OUT_SEC_TMIN[2]
DSOCMBRAMABUS[13]	out	CELL_W[23].OUT_SEC_TMIN[1]
DSOCMBRAMABUS[12]	out	CELL_W[23].OUT_SEC_TMIN[0]
DSOCMBRAMABUS[11]	out	CELL_W[21].OUT_SEC_TMIN[3]
DSOCMBRAMABUS[10]	out	CELL_W[21].OUT_SEC_TMIN[2]
DSOCMBRAMABUS[9]	out	CELL_W[21].OUT_SEC_TMIN[1]
DSOCMBRAMABUS[8]	out	CELL_W[21].OUT_SEC_TMIN[0]
DSOCMBRAMBYTEWRITE[3]	out	CELL_N[2].OUT_BEST_TMIN[7]
DSOCMBRAMBYTEWRITE[2]	out	CELL_N[2].OUT_BEST_TMIN[6]
DSOCMBRAMBYTEWRITE[1]	out	CELL_N[2].OUT_BEST_TMIN[5]
DSOCMBRAMBYTEWRITE[0]	out	CELL_N[2].OUT_BEST_TMIN[4]
DSOCMBRAMEN	out	CELL_N[2].OUT_SEC_TMIN[2]
DSOCMBRAMWRDBUS[31]	out	CELL_N[6].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[30]	out	CELL_N[6].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[29]	out	CELL_N[6].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[28]	out	CELL_N[6].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[27]	out	CELL_N[5].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[26]	out	CELL_N[5].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[25]	out	CELL_N[5].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[24]	out	CELL_N[5].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[23]	out	CELL_N[4].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[22]	out	CELL_N[4].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[21]	out	CELL_N[4].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[20]	out	CELL_N[4].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[19]	out	CELL_N[3].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[18]	out	CELL_N[3].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[17]	out	CELL_N[3].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[16]	out	CELL_N[3].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[15]	out	CELL_N[2].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[14]	out	CELL_N[2].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[13]	out	CELL_N[2].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[12]	out	CELL_N[2].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[11]	out	CELL_N[1].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[10]	out	CELL_N[1].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[9]	out	CELL_N[1].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[8]	out	CELL_N[1].OUT_BEST_TMIN[0]
DSOCMBRAMWRDBUS[7]	out	CELL_N[0].OUT_BEST_TMIN[7]
DSOCMBRAMWRDBUS[6]	out	CELL_N[0].OUT_BEST_TMIN[6]
DSOCMBRAMWRDBUS[5]	out	CELL_N[0].OUT_BEST_TMIN[5]
DSOCMBRAMWRDBUS[4]	out	CELL_N[0].OUT_BEST_TMIN[4]
DSOCMBRAMWRDBUS[3]	out	CELL_N[0].OUT_BEST_TMIN[3]
DSOCMBRAMWRDBUS[2]	out	CELL_N[0].OUT_BEST_TMIN[2]
DSOCMBRAMWRDBUS[1]	out	CELL_N[0].OUT_BEST_TMIN[1]
DSOCMBRAMWRDBUS[0]	out	CELL_N[0].OUT_BEST_TMIN[0]
DSOCMBUSY	out	CELL_E[14].OUT_SEC_TMIN[0]
DSOCMRDADDRVALID	out	CELL_N[2].OUT_SEC_TMIN[3]
DSOCMWRADDRVALID	out	CELL_W[22].OUT_SEC_TMIN[4]
C405DSOCMCACHEABLE	out	CELL_W[7].OUT_HALF0_BEL[0], CELL_W[7].OUT_HALF1_BEL[0]
C405DSOCMGUARDED	out	CELL_W[7].OUT_HALF0_BEL[1], CELL_W[7].OUT_HALF1_BEL[1]
C405DSOCMSTRINGMULTIPLE	out	CELL_W[7].OUT_HALF0_BEL[2], CELL_W[7].OUT_HALF1_BEL[2]
C405DSOCMU0ATTR	out	CELL_W[7].OUT_HALF0_BEL[3], CELL_W[7].OUT_HALF1_BEL[3]
TSTC405DSOCMABORTOPO	out	CELL_W[6].OUT_HALF0_BEL[5], CELL_W[6].OUT_HALF1_BEL[5]
TSTC405DSOCMABORTREQO	out	CELL_W[6].OUT_HALF0_BEL[6], CELL_W[6].OUT_HALF1_BEL[6]
TSTC405DSOCMABUSO[29]	out	CELL_W[16].OUT_HALF0_BEL[1], CELL_W[16].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[28]	out	CELL_W[16].OUT_HALF0_BEL[0], CELL_W[16].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[27]	out	CELL_W[17].OUT_HALF0_BEL[3], CELL_W[17].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[26]	out	CELL_W[17].OUT_HALF0_BEL[2], CELL_W[17].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[25]	out	CELL_W[17].OUT_HALF0_BEL[1], CELL_W[17].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[24]	out	CELL_W[17].OUT_HALF0_BEL[0], CELL_W[17].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[23]	out	CELL_W[18].OUT_HALF0_BEL[3], CELL_W[18].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[22]	out	CELL_W[18].OUT_HALF0_BEL[2], CELL_W[18].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[21]	out	CELL_W[18].OUT_HALF0_BEL[1], CELL_W[18].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[20]	out	CELL_W[18].OUT_HALF0_BEL[0], CELL_W[18].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[19]	out	CELL_W[19].OUT_HALF0_BEL[3], CELL_W[19].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[18]	out	CELL_W[19].OUT_HALF0_BEL[2], CELL_W[19].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[17]	out	CELL_W[19].OUT_HALF0_BEL[1], CELL_W[19].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[16]	out	CELL_W[19].OUT_HALF0_BEL[0], CELL_W[19].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[15]	out	CELL_W[20].OUT_HALF0_BEL[3], CELL_W[20].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[14]	out	CELL_W[20].OUT_HALF0_BEL[2], CELL_W[20].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[13]	out	CELL_W[20].OUT_HALF0_BEL[1], CELL_W[20].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[12]	out	CELL_W[20].OUT_HALF0_BEL[0], CELL_W[20].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[11]	out	CELL_W[21].OUT_HALF0_BEL[3], CELL_W[21].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[10]	out	CELL_W[21].OUT_HALF0_BEL[2], CELL_W[21].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[9]	out	CELL_W[21].OUT_HALF0_BEL[1], CELL_W[21].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[8]	out	CELL_W[21].OUT_HALF0_BEL[0], CELL_W[21].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[7]	out	CELL_W[22].OUT_HALF0_BEL[3], CELL_W[22].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[6]	out	CELL_W[22].OUT_HALF0_BEL[2], CELL_W[22].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[5]	out	CELL_W[22].OUT_HALF0_BEL[1], CELL_W[22].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[4]	out	CELL_W[22].OUT_HALF0_BEL[0], CELL_W[22].OUT_HALF1_BEL[0]
TSTC405DSOCMABUSO[3]	out	CELL_W[23].OUT_HALF0_BEL[3], CELL_W[23].OUT_HALF1_BEL[3]
TSTC405DSOCMABUSO[2]	out	CELL_W[23].OUT_HALF0_BEL[2], CELL_W[23].OUT_HALF1_BEL[2]
TSTC405DSOCMABUSO[1]	out	CELL_W[23].OUT_HALF0_BEL[1], CELL_W[23].OUT_HALF1_BEL[1]
TSTC405DSOCMABUSO[0]	out	CELL_W[23].OUT_HALF0_BEL[0], CELL_W[23].OUT_HALF1_BEL[0]
TSTC405DSOCMBYTEENO[3]	out	CELL_W[6].OUT_HALF0_BEL[3], CELL_W[6].OUT_HALF1_BEL[3]
TSTC405DSOCMBYTEENO[2]	out	CELL_W[6].OUT_HALF0_BEL[2], CELL_W[6].OUT_HALF1_BEL[2]
TSTC405DSOCMBYTEENO[1]	out	CELL_W[6].OUT_HALF0_BEL[1], CELL_W[6].OUT_HALF1_BEL[1]
TSTC405DSOCMBYTEENO[0]	out	CELL_W[6].OUT_HALF0_BEL[0], CELL_W[6].OUT_HALF1_BEL[0]
TSTC405DSOCMLOADREQO	out	CELL_W[6].OUT_HALF0_BEL[7], CELL_W[6].OUT_HALF1_BEL[7]
TSTC405DSOCMSTOREREQO	out	CELL_W[16].OUT_HALF0_BEL[6], CELL_W[16].OUT_HALF1_BEL[6]
TSTC405DSOCMWAITO	out	CELL_W[16].OUT_HALF0_BEL[7], CELL_W[16].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[31]	out	CELL_W[16].OUT_HALF0_BEL[5], CELL_W[16].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[30]	out	CELL_W[16].OUT_HALF0_BEL[4], CELL_W[16].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[29]	out	CELL_W[16].OUT_HALF0_BEL[3], CELL_W[16].OUT_HALF1_BEL[3]
TSTC405DSOCMWRDBUSO[28]	out	CELL_W[16].OUT_HALF0_BEL[2], CELL_W[16].OUT_HALF1_BEL[2]
TSTC405DSOCMWRDBUSO[27]	out	CELL_W[17].OUT_HALF0_BEL[7], CELL_W[17].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[26]	out	CELL_W[17].OUT_HALF0_BEL[6], CELL_W[17].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[25]	out	CELL_W[17].OUT_HALF0_BEL[5], CELL_W[17].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[24]	out	CELL_W[17].OUT_HALF0_BEL[4], CELL_W[17].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[23]	out	CELL_W[18].OUT_HALF0_BEL[7], CELL_W[18].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[22]	out	CELL_W[18].OUT_HALF0_BEL[6], CELL_W[18].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[21]	out	CELL_W[18].OUT_HALF0_BEL[5], CELL_W[18].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[20]	out	CELL_W[18].OUT_HALF0_BEL[4], CELL_W[18].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[19]	out	CELL_W[19].OUT_HALF0_BEL[7], CELL_W[19].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[18]	out	CELL_W[19].OUT_HALF0_BEL[6], CELL_W[19].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[17]	out	CELL_W[19].OUT_HALF0_BEL[5], CELL_W[19].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[16]	out	CELL_W[19].OUT_HALF0_BEL[4], CELL_W[19].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[15]	out	CELL_W[20].OUT_HALF0_BEL[7], CELL_W[20].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[14]	out	CELL_W[20].OUT_HALF0_BEL[6], CELL_W[20].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[13]	out	CELL_W[20].OUT_HALF0_BEL[5], CELL_W[20].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[12]	out	CELL_W[20].OUT_HALF0_BEL[4], CELL_W[20].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[11]	out	CELL_W[21].OUT_HALF0_BEL[7], CELL_W[21].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[10]	out	CELL_W[21].OUT_HALF0_BEL[6], CELL_W[21].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[9]	out	CELL_W[21].OUT_HALF0_BEL[5], CELL_W[21].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[8]	out	CELL_W[21].OUT_HALF0_BEL[4], CELL_W[21].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[7]	out	CELL_W[22].OUT_HALF0_BEL[7], CELL_W[22].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[6]	out	CELL_W[22].OUT_HALF0_BEL[6], CELL_W[22].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[5]	out	CELL_W[22].OUT_HALF0_BEL[5], CELL_W[22].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[4]	out	CELL_W[22].OUT_HALF0_BEL[4], CELL_W[22].OUT_HALF1_BEL[4]
TSTC405DSOCMWRDBUSO[3]	out	CELL_W[23].OUT_HALF0_BEL[7], CELL_W[23].OUT_HALF1_BEL[7]
TSTC405DSOCMWRDBUSO[2]	out	CELL_W[23].OUT_HALF0_BEL[6], CELL_W[23].OUT_HALF1_BEL[6]
TSTC405DSOCMWRDBUSO[1]	out	CELL_W[23].OUT_HALF0_BEL[5], CELL_W[23].OUT_HALF1_BEL[5]
TSTC405DSOCMWRDBUSO[0]	out	CELL_W[23].OUT_HALF0_BEL[4], CELL_W[23].OUT_HALF1_BEL[4]
TSTC405DSOCMXLTVALIDO	out	CELL_W[6].OUT_HALF0_BEL[4], CELL_W[6].OUT_HALF1_BEL[4]
TSTDSOCMC405COMPLETEO	out	CELL_E[15].OUT_HALF0_BEL[0], CELL_E[15].OUT_HALF1_BEL[0]
TSTDSOCMC405DISOPERANDFWDO	out	CELL_E[15].OUT_HALF0_BEL[1], CELL_E[15].OUT_HALF1_BEL[1]
TSTDSOCMC405HOLDO	out	CELL_E[15].OUT_HALF0_BEL[2], CELL_E[15].OUT_HALF1_BEL[2]
TSTDSOCMC405RDDBUSO[31]	out	CELL_W[8].OUT_HALF0_BEL[7], CELL_W[8].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[30]	out	CELL_W[8].OUT_HALF0_BEL[6], CELL_W[8].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[29]	out	CELL_W[8].OUT_HALF0_BEL[5], CELL_W[8].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[28]	out	CELL_W[8].OUT_HALF0_BEL[4], CELL_W[8].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[27]	out	CELL_W[9].OUT_HALF0_BEL[7], CELL_W[9].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[26]	out	CELL_W[9].OUT_HALF0_BEL[6], CELL_W[9].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[25]	out	CELL_W[9].OUT_HALF0_BEL[5], CELL_W[9].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[24]	out	CELL_W[9].OUT_HALF0_BEL[4], CELL_W[9].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[23]	out	CELL_W[10].OUT_HALF0_BEL[7], CELL_W[10].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[22]	out	CELL_W[10].OUT_HALF0_BEL[6], CELL_W[10].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[21]	out	CELL_W[10].OUT_HALF0_BEL[5], CELL_W[10].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[20]	out	CELL_W[10].OUT_HALF0_BEL[4], CELL_W[10].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[19]	out	CELL_W[11].OUT_HALF0_BEL[7], CELL_W[11].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[18]	out	CELL_W[11].OUT_HALF0_BEL[6], CELL_W[11].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[17]	out	CELL_W[11].OUT_HALF0_BEL[5], CELL_W[11].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[16]	out	CELL_W[11].OUT_HALF0_BEL[4], CELL_W[11].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[15]	out	CELL_W[12].OUT_HALF0_BEL[7], CELL_W[12].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[14]	out	CELL_W[12].OUT_HALF0_BEL[6], CELL_W[12].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[13]	out	CELL_W[12].OUT_HALF0_BEL[5], CELL_W[12].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[12]	out	CELL_W[12].OUT_HALF0_BEL[4], CELL_W[12].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[11]	out	CELL_W[13].OUT_HALF0_BEL[7], CELL_W[13].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[10]	out	CELL_W[13].OUT_HALF0_BEL[6], CELL_W[13].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[9]	out	CELL_W[13].OUT_HALF0_BEL[5], CELL_W[13].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[8]	out	CELL_W[13].OUT_HALF0_BEL[4], CELL_W[13].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[7]	out	CELL_W[14].OUT_HALF0_BEL[7], CELL_W[14].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[6]	out	CELL_W[14].OUT_HALF0_BEL[6], CELL_W[14].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[5]	out	CELL_W[14].OUT_HALF0_BEL[5], CELL_W[14].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[4]	out	CELL_W[14].OUT_HALF0_BEL[4], CELL_W[14].OUT_HALF1_BEL[4]
TSTDSOCMC405RDDBUSO[3]	out	CELL_W[15].OUT_HALF0_BEL[7], CELL_W[15].OUT_HALF1_BEL[7]
TSTDSOCMC405RDDBUSO[2]	out	CELL_W[15].OUT_HALF0_BEL[6], CELL_W[15].OUT_HALF1_BEL[6]
TSTDSOCMC405RDDBUSO[1]	out	CELL_W[15].OUT_HALF0_BEL[5], CELL_W[15].OUT_HALF1_BEL[5]
TSTDSOCMC405RDDBUSO[0]	out	CELL_W[15].OUT_HALF0_BEL[4], CELL_W[15].OUT_HALF1_BEL[4]
ISOCMBRAMEN	out	CELL_S[5].OUT_BEST_TMIN[2]
ISOCMBRAMEVENWRITEEN	out	CELL_S[5].OUT_BEST_TMIN[0]
ISOCMBRAMODDWRITEEN	out	CELL_S[5].OUT_BEST_TMIN[1]
ISOCMBRAMRDABUS[28]	out	CELL_S[6].OUT_SEC_TMIN[3]
ISOCMBRAMRDABUS[27]	out	CELL_S[6].OUT_SEC_TMIN[2]
ISOCMBRAMRDABUS[26]	out	CELL_S[6].OUT_SEC_TMIN[1]
ISOCMBRAMRDABUS[25]	out	CELL_S[6].OUT_SEC_TMIN[0]
ISOCMBRAMRDABUS[24]	out	CELL_S[6].OUT_BEST_TMIN[7]
ISOCMBRAMRDABUS[23]	out	CELL_S[6].OUT_BEST_TMIN[6]
ISOCMBRAMRDABUS[22]	out	CELL_S[6].OUT_BEST_TMIN[5]
ISOCMBRAMRDABUS[21]	out	CELL_S[6].OUT_BEST_TMIN[4]
ISOCMBRAMRDABUS[20]	out	CELL_S[6].OUT_BEST_TMIN[3]
ISOCMBRAMRDABUS[19]	out	CELL_S[6].OUT_BEST_TMIN[2]
ISOCMBRAMRDABUS[18]	out	CELL_S[6].OUT_BEST_TMIN[1]
ISOCMBRAMRDABUS[17]	out	CELL_S[6].OUT_BEST_TMIN[0]
ISOCMBRAMRDABUS[16]	out	CELL_S[5].OUT_SEC_TMIN[3]
ISOCMBRAMRDABUS[15]	out	CELL_S[5].OUT_SEC_TMIN[2]
ISOCMBRAMRDABUS[14]	out	CELL_S[5].OUT_SEC_TMIN[1]
ISOCMBRAMRDABUS[13]	out	CELL_S[5].OUT_SEC_TMIN[0]
ISOCMBRAMRDABUS[12]	out	CELL_S[5].OUT_BEST_TMIN[7]
ISOCMBRAMRDABUS[11]	out	CELL_S[5].OUT_BEST_TMIN[6]
ISOCMBRAMRDABUS[10]	out	CELL_S[5].OUT_BEST_TMIN[5]
ISOCMBRAMRDABUS[9]	out	CELL_S[5].OUT_BEST_TMIN[4]
ISOCMBRAMRDABUS[8]	out	CELL_S[5].OUT_BEST_TMIN[3]
ISOCMBRAMWRABUS[28]	out	CELL_S[4].OUT_SEC_TMIN[3]
ISOCMBRAMWRABUS[27]	out	CELL_S[4].OUT_SEC_TMIN[2]
ISOCMBRAMWRABUS[26]	out	CELL_S[4].OUT_SEC_TMIN[1]
ISOCMBRAMWRABUS[25]	out	CELL_S[4].OUT_SEC_TMIN[0]
ISOCMBRAMWRABUS[24]	out	CELL_S[4].OUT_BEST_TMIN[7]
ISOCMBRAMWRABUS[23]	out	CELL_S[4].OUT_BEST_TMIN[6]
ISOCMBRAMWRABUS[22]	out	CELL_S[4].OUT_BEST_TMIN[5]
ISOCMBRAMWRABUS[21]	out	CELL_S[4].OUT_BEST_TMIN[4]
ISOCMBRAMWRABUS[20]	out	CELL_S[4].OUT_BEST_TMIN[3]
ISOCMBRAMWRABUS[19]	out	CELL_S[4].OUT_BEST_TMIN[2]
ISOCMBRAMWRABUS[18]	out	CELL_S[4].OUT_BEST_TMIN[1]
ISOCMBRAMWRABUS[17]	out	CELL_S[4].OUT_BEST_TMIN[0]
ISOCMBRAMWRABUS[16]	out	CELL_S[3].OUT_SEC_TMIN[3]
ISOCMBRAMWRABUS[15]	out	CELL_S[3].OUT_SEC_TMIN[2]
ISOCMBRAMWRABUS[14]	out	CELL_S[3].OUT_SEC_TMIN[1]
ISOCMBRAMWRABUS[13]	out	CELL_S[3].OUT_SEC_TMIN[0]
ISOCMBRAMWRABUS[12]	out	CELL_S[3].OUT_BEST_TMIN[7]
ISOCMBRAMWRABUS[11]	out	CELL_S[3].OUT_BEST_TMIN[6]
ISOCMBRAMWRABUS[10]	out	CELL_S[3].OUT_BEST_TMIN[5]
ISOCMBRAMWRABUS[9]	out	CELL_S[3].OUT_BEST_TMIN[4]
ISOCMBRAMWRABUS[8]	out	CELL_S[3].OUT_BEST_TMIN[3]
ISOCMBRAMWRDBUS[31]	out	CELL_S[3].OUT_BEST_TMIN[2]
ISOCMBRAMWRDBUS[30]	out	CELL_S[3].OUT_BEST_TMIN[1]
ISOCMBRAMWRDBUS[29]	out	CELL_S[3].OUT_BEST_TMIN[0]
ISOCMBRAMWRDBUS[28]	out	CELL_S[2].OUT_SEC_TMIN[3]
ISOCMBRAMWRDBUS[27]	out	CELL_S[2].OUT_SEC_TMIN[2]
ISOCMBRAMWRDBUS[26]	out	CELL_S[2].OUT_SEC_TMIN[1]
ISOCMBRAMWRDBUS[25]	out	CELL_S[2].OUT_SEC_TMIN[0]
ISOCMBRAMWRDBUS[24]	out	CELL_S[2].OUT_BEST_TMIN[7]
ISOCMBRAMWRDBUS[23]	out	CELL_S[2].OUT_BEST_TMIN[6]
ISOCMBRAMWRDBUS[22]	out	CELL_S[2].OUT_BEST_TMIN[5]
ISOCMBRAMWRDBUS[21]	out	CELL_S[2].OUT_BEST_TMIN[4]
ISOCMBRAMWRDBUS[20]	out	CELL_S[2].OUT_BEST_TMIN[3]
ISOCMBRAMWRDBUS[19]	out	CELL_S[2].OUT_BEST_TMIN[2]
ISOCMBRAMWRDBUS[18]	out	CELL_S[2].OUT_BEST_TMIN[1]
ISOCMBRAMWRDBUS[17]	out	CELL_S[2].OUT_BEST_TMIN[0]
ISOCMBRAMWRDBUS[16]	out	CELL_S[1].OUT_SEC_TMIN[3]
ISOCMBRAMWRDBUS[15]	out	CELL_S[1].OUT_SEC_TMIN[2]
ISOCMBRAMWRDBUS[14]	out	CELL_S[1].OUT_SEC_TMIN[1]
ISOCMBRAMWRDBUS[13]	out	CELL_S[1].OUT_SEC_TMIN[0]
ISOCMBRAMWRDBUS[12]	out	CELL_S[1].OUT_BEST_TMIN[7]
ISOCMBRAMWRDBUS[11]	out	CELL_S[1].OUT_BEST_TMIN[6]
ISOCMBRAMWRDBUS[10]	out	CELL_S[1].OUT_BEST_TMIN[5]
ISOCMBRAMWRDBUS[9]	out	CELL_S[1].OUT_BEST_TMIN[4]
ISOCMBRAMWRDBUS[8]	out	CELL_S[1].OUT_BEST_TMIN[3]
ISOCMBRAMWRDBUS[7]	out	CELL_S[1].OUT_BEST_TMIN[2]
ISOCMBRAMWRDBUS[6]	out	CELL_S[1].OUT_BEST_TMIN[1]
ISOCMBRAMWRDBUS[5]	out	CELL_S[1].OUT_BEST_TMIN[0]
ISOCMBRAMWRDBUS[4]	out	CELL_S[0].OUT_SEC_TMIN[3]
ISOCMBRAMWRDBUS[3]	out	CELL_S[0].OUT_SEC_TMIN[2]
ISOCMBRAMWRDBUS[2]	out	CELL_S[0].OUT_SEC_TMIN[1]
ISOCMBRAMWRDBUS[1]	out	CELL_S[0].OUT_SEC_TMIN[0]
ISOCMBRAMWRDBUS[0]	out	CELL_S[0].OUT_BEST_TMIN[7]
ISOCMDCRBRAMEVENEN	out	CELL_W[0].OUT_SEC_TMIN[1]
ISOCMDCRBRAMODDEN	out	CELL_W[0].OUT_SEC_TMIN[2]
ISOCMDCRBRAMRDSELECT	out	CELL_W[0].OUT_SEC_TMIN[3]
C405ISOCMCACHEABLE	out	CELL_S[1].OUT_HALF0_BEL[4], CELL_S[1].OUT_HALF1_BEL[4]
C405ISOCMCONTEXTSYNC	out	CELL_S[1].OUT_HALF0_BEL[5], CELL_S[1].OUT_HALF1_BEL[5]
C405ISOCMU0ATTR	out	CELL_S[1].OUT_HALF0_BEL[6], CELL_S[1].OUT_HALF1_BEL[6]
TSTC405ISOCMABORTO	out	CELL_S[1].OUT_HALF0_BEL[3], CELL_S[1].OUT_HALF1_BEL[3]
TSTC405ISOCMABUSO[29]	out	CELL_S[2].OUT_HALF0_BEL[5], CELL_S[2].OUT_HALF1_BEL[5]
TSTC405ISOCMABUSO[28]	out	CELL_S[2].OUT_HALF0_BEL[4], CELL_S[2].OUT_HALF1_BEL[4]
TSTC405ISOCMABUSO[27]	out	CELL_S[2].OUT_HALF0_BEL[3], CELL_S[2].OUT_HALF1_BEL[3]
TSTC405ISOCMABUSO[26]	out	CELL_S[2].OUT_HALF0_BEL[2], CELL_S[2].OUT_HALF1_BEL[2]
TSTC405ISOCMABUSO[25]	out	CELL_S[2].OUT_HALF0_BEL[1], CELL_S[2].OUT_HALF1_BEL[1]
TSTC405ISOCMABUSO[24]	out	CELL_S[2].OUT_HALF0_BEL[0], CELL_S[2].OUT_HALF1_BEL[0]
TSTC405ISOCMABUSO[23]	out	CELL_S[3].OUT_HALF0_BEL[7], CELL_S[3].OUT_HALF1_BEL[7]
TSTC405ISOCMABUSO[22]	out	CELL_S[3].OUT_HALF0_BEL[6], CELL_S[3].OUT_HALF1_BEL[6]
TSTC405ISOCMABUSO[21]	out	CELL_S[3].OUT_HALF0_BEL[5], CELL_S[3].OUT_HALF1_BEL[5]
TSTC405ISOCMABUSO[20]	out	CELL_S[3].OUT_HALF0_BEL[4], CELL_S[3].OUT_HALF1_BEL[4]
TSTC405ISOCMABUSO[19]	out	CELL_S[3].OUT_HALF0_BEL[3], CELL_S[3].OUT_HALF1_BEL[3]
TSTC405ISOCMABUSO[18]	out	CELL_S[3].OUT_HALF0_BEL[2], CELL_S[3].OUT_HALF1_BEL[2]
TSTC405ISOCMABUSO[17]	out	CELL_S[3].OUT_HALF0_BEL[1], CELL_S[3].OUT_HALF1_BEL[1]
TSTC405ISOCMABUSO[16]	out	CELL_S[3].OUT_HALF0_BEL[0], CELL_S[3].OUT_HALF1_BEL[0]
TSTC405ISOCMABUSO[15]	out	CELL_S[4].OUT_HALF0_BEL[7], CELL_S[4].OUT_HALF1_BEL[7]
TSTC405ISOCMABUSO[14]	out	CELL_S[4].OUT_HALF0_BEL[6], CELL_S[4].OUT_HALF1_BEL[6]
TSTC405ISOCMABUSO[13]	out	CELL_S[4].OUT_HALF0_BEL[5], CELL_S[4].OUT_HALF1_BEL[5]
TSTC405ISOCMABUSO[12]	out	CELL_S[4].OUT_HALF0_BEL[4], CELL_S[4].OUT_HALF1_BEL[4]
TSTC405ISOCMABUSO[11]	out	CELL_S[4].OUT_HALF0_BEL[3], CELL_S[4].OUT_HALF1_BEL[3]
TSTC405ISOCMABUSO[10]	out	CELL_S[4].OUT_HALF0_BEL[2], CELL_S[4].OUT_HALF1_BEL[2]
TSTC405ISOCMABUSO[9]	out	CELL_S[4].OUT_HALF0_BEL[1], CELL_S[4].OUT_HALF1_BEL[1]
TSTC405ISOCMABUSO[8]	out	CELL_S[4].OUT_HALF0_BEL[0], CELL_S[4].OUT_HALF1_BEL[0]
TSTC405ISOCMABUSO[7]	out	CELL_S[5].OUT_HALF0_BEL[7], CELL_S[5].OUT_HALF1_BEL[7]
TSTC405ISOCMABUSO[6]	out	CELL_S[5].OUT_HALF0_BEL[6], CELL_S[5].OUT_HALF1_BEL[6]
TSTC405ISOCMABUSO[5]	out	CELL_S[5].OUT_HALF0_BEL[5], CELL_S[5].OUT_HALF1_BEL[5]
TSTC405ISOCMABUSO[4]	out	CELL_S[5].OUT_HALF0_BEL[4], CELL_S[5].OUT_HALF1_BEL[4]
TSTC405ISOCMABUSO[3]	out	CELL_S[5].OUT_HALF0_BEL[3], CELL_S[5].OUT_HALF1_BEL[3]
TSTC405ISOCMABUSO[2]	out	CELL_S[5].OUT_HALF0_BEL[2], CELL_S[5].OUT_HALF1_BEL[2]
TSTC405ISOCMABUSO[1]	out	CELL_S[5].OUT_HALF0_BEL[1], CELL_S[5].OUT_HALF1_BEL[1]
TSTC405ISOCMABUSO[0]	out	CELL_S[5].OUT_HALF0_BEL[0], CELL_S[5].OUT_HALF1_BEL[0]
TSTC405ISOCMICUREADYO	out	CELL_S[1].OUT_HALF0_BEL[1], CELL_S[1].OUT_HALF1_BEL[1]
TSTC405ISOCMREQPENDINGO	out	CELL_S[1].OUT_HALF0_BEL[0], CELL_S[1].OUT_HALF1_BEL[0]
TSTC405ISOCMXLTVALIDO	out	CELL_S[1].OUT_HALF0_BEL[2], CELL_S[1].OUT_HALF1_BEL[2]
TSTISOCMC405HOLDO	out	CELL_S[0].OUT_HALF0_BEL[6], CELL_S[0].OUT_HALF1_BEL[6]
TSTISOCMC405RDDVALIDO[1]	out	CELL_S[0].OUT_HALF0_BEL[5], CELL_S[0].OUT_HALF1_BEL[5]
TSTISOCMC405RDDVALIDO[0]	out	CELL_S[0].OUT_HALF0_BEL[4], CELL_S[0].OUT_HALF1_BEL[4]
TSTISOCMC405READDATAOUTO[63]	out	CELL_W[8].OUT_HALF0_BEL[3], CELL_W[8].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[62]	out	CELL_W[8].OUT_HALF0_BEL[2], CELL_W[8].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[61]	out	CELL_W[8].OUT_HALF0_BEL[1], CELL_W[8].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[60]	out	CELL_W[8].OUT_HALF0_BEL[0], CELL_W[8].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[59]	out	CELL_W[9].OUT_HALF0_BEL[3], CELL_W[9].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[58]	out	CELL_W[9].OUT_HALF0_BEL[2], CELL_W[9].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[57]	out	CELL_W[9].OUT_HALF0_BEL[1], CELL_W[9].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[56]	out	CELL_W[9].OUT_HALF0_BEL[0], CELL_W[9].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[55]	out	CELL_W[10].OUT_HALF0_BEL[3], CELL_W[10].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[54]	out	CELL_W[10].OUT_HALF0_BEL[2], CELL_W[10].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[53]	out	CELL_W[10].OUT_HALF0_BEL[1], CELL_W[10].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[52]	out	CELL_W[10].OUT_HALF0_BEL[0], CELL_W[10].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[51]	out	CELL_W[11].OUT_HALF0_BEL[3], CELL_W[11].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[50]	out	CELL_W[11].OUT_HALF0_BEL[2], CELL_W[11].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[49]	out	CELL_W[11].OUT_HALF0_BEL[1], CELL_W[11].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[48]	out	CELL_W[11].OUT_HALF0_BEL[0], CELL_W[11].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[47]	out	CELL_W[12].OUT_HALF0_BEL[3], CELL_W[12].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[46]	out	CELL_W[12].OUT_HALF0_BEL[2], CELL_W[12].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[45]	out	CELL_W[12].OUT_HALF0_BEL[1], CELL_W[12].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[44]	out	CELL_W[12].OUT_HALF0_BEL[0], CELL_W[12].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[43]	out	CELL_W[13].OUT_HALF0_BEL[3], CELL_W[13].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[42]	out	CELL_W[13].OUT_HALF0_BEL[2], CELL_W[13].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[41]	out	CELL_W[13].OUT_HALF0_BEL[1], CELL_W[13].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[40]	out	CELL_W[13].OUT_HALF0_BEL[0], CELL_W[13].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[39]	out	CELL_W[14].OUT_HALF0_BEL[3], CELL_W[14].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[38]	out	CELL_W[14].OUT_HALF0_BEL[2], CELL_W[14].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[37]	out	CELL_W[14].OUT_HALF0_BEL[1], CELL_W[14].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[36]	out	CELL_W[14].OUT_HALF0_BEL[0], CELL_W[14].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[35]	out	CELL_W[15].OUT_HALF0_BEL[3], CELL_W[15].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[34]	out	CELL_W[15].OUT_HALF0_BEL[2], CELL_W[15].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[33]	out	CELL_W[15].OUT_HALF0_BEL[1], CELL_W[15].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[32]	out	CELL_W[15].OUT_HALF0_BEL[0], CELL_W[15].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[31]	out	CELL_E[0].OUT_HALF0_BEL[7], CELL_E[0].OUT_HALF1_BEL[7]
TSTISOCMC405READDATAOUTO[30]	out	CELL_E[0].OUT_HALF0_BEL[6], CELL_E[0].OUT_HALF1_BEL[6]
TSTISOCMC405READDATAOUTO[29]	out	CELL_E[0].OUT_HALF0_BEL[5], CELL_E[0].OUT_HALF1_BEL[5]
TSTISOCMC405READDATAOUTO[28]	out	CELL_E[0].OUT_HALF0_BEL[4], CELL_E[0].OUT_HALF1_BEL[4]
TSTISOCMC405READDATAOUTO[27]	out	CELL_E[0].OUT_HALF0_BEL[3], CELL_E[0].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[26]	out	CELL_E[0].OUT_HALF0_BEL[2], CELL_E[0].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[25]	out	CELL_E[0].OUT_HALF0_BEL[1], CELL_E[0].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[24]	out	CELL_E[0].OUT_HALF0_BEL[0], CELL_E[0].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[23]	out	CELL_E[1].OUT_HALF0_BEL[7], CELL_E[1].OUT_HALF1_BEL[7]
TSTISOCMC405READDATAOUTO[22]	out	CELL_E[1].OUT_HALF0_BEL[6], CELL_E[1].OUT_HALF1_BEL[6]
TSTISOCMC405READDATAOUTO[21]	out	CELL_E[1].OUT_HALF0_BEL[5], CELL_E[1].OUT_HALF1_BEL[5]
TSTISOCMC405READDATAOUTO[20]	out	CELL_E[1].OUT_HALF0_BEL[4], CELL_E[1].OUT_HALF1_BEL[4]
TSTISOCMC405READDATAOUTO[19]	out	CELL_E[1].OUT_HALF0_BEL[3], CELL_E[1].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[18]	out	CELL_E[1].OUT_HALF0_BEL[2], CELL_E[1].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[17]	out	CELL_E[1].OUT_HALF0_BEL[1], CELL_E[1].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[16]	out	CELL_E[1].OUT_HALF0_BEL[0], CELL_E[1].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[15]	out	CELL_E[2].OUT_HALF0_BEL[7], CELL_E[2].OUT_HALF1_BEL[7]
TSTISOCMC405READDATAOUTO[14]	out	CELL_E[2].OUT_HALF0_BEL[6], CELL_E[2].OUT_HALF1_BEL[6]
TSTISOCMC405READDATAOUTO[13]	out	CELL_E[2].OUT_HALF0_BEL[5], CELL_E[2].OUT_HALF1_BEL[5]
TSTISOCMC405READDATAOUTO[12]	out	CELL_E[2].OUT_HALF0_BEL[4], CELL_E[2].OUT_HALF1_BEL[4]
TSTISOCMC405READDATAOUTO[11]	out	CELL_E[2].OUT_HALF0_BEL[3], CELL_E[2].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[10]	out	CELL_E[2].OUT_HALF0_BEL[2], CELL_E[2].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[9]	out	CELL_E[2].OUT_HALF0_BEL[1], CELL_E[2].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[8]	out	CELL_E[2].OUT_HALF0_BEL[0], CELL_E[2].OUT_HALF1_BEL[0]
TSTISOCMC405READDATAOUTO[7]	out	CELL_E[3].OUT_HALF0_BEL[7], CELL_E[3].OUT_HALF1_BEL[7]
TSTISOCMC405READDATAOUTO[6]	out	CELL_E[3].OUT_HALF0_BEL[6], CELL_E[3].OUT_HALF1_BEL[6]
TSTISOCMC405READDATAOUTO[5]	out	CELL_E[3].OUT_HALF0_BEL[5], CELL_E[3].OUT_HALF1_BEL[5]
TSTISOCMC405READDATAOUTO[4]	out	CELL_E[3].OUT_HALF0_BEL[4], CELL_E[3].OUT_HALF1_BEL[4]
TSTISOCMC405READDATAOUTO[3]	out	CELL_E[3].OUT_HALF0_BEL[3], CELL_E[3].OUT_HALF1_BEL[3]
TSTISOCMC405READDATAOUTO[2]	out	CELL_E[3].OUT_HALF0_BEL[2], CELL_E[3].OUT_HALF1_BEL[2]
TSTISOCMC405READDATAOUTO[1]	out	CELL_E[3].OUT_HALF0_BEL[1], CELL_E[3].OUT_HALF1_BEL[1]
TSTISOCMC405READDATAOUTO[0]	out	CELL_E[3].OUT_HALF0_BEL[0], CELL_E[3].OUT_HALF1_BEL[0]
APUFCMDECODED	out	CELL_E[14].OUT_SEC_TMIN[2]
APUFCMDECUDI[2]	out	CELL_E[13].OUT_SEC_TMIN[3]
APUFCMDECUDI[1]	out	CELL_E[13].OUT_SEC_TMIN[2]
APUFCMDECUDI[0]	out	CELL_E[13].OUT_SEC_TMIN[1]
APUFCMDECUDIVALID	out	CELL_E[14].OUT_SEC_TMIN[3]
APUFCMENDIAN	out	CELL_E[14].OUT_BEST_TMIN[6]
APUFCMFLUSH	out	CELL_E[14].OUT_BEST_TMIN[4]
APUFCMINSTRUCTION[31]	out	CELL_N[3].OUT_BEST_TMIN[4]
APUFCMINSTRUCTION[30]	out	CELL_N[3].OUT_BEST_TMIN[5]
APUFCMINSTRUCTION[29]	out	CELL_N[3].OUT_BEST_TMIN[6]
APUFCMINSTRUCTION[28]	out	CELL_N[3].OUT_BEST_TMIN[7]
APUFCMINSTRUCTION[27]	out	CELL_N[3].OUT_SEC_TMIN[0]
APUFCMINSTRUCTION[26]	out	CELL_N[3].OUT_SEC_TMIN[1]
APUFCMINSTRUCTION[25]	out	CELL_N[3].OUT_SEC_TMIN[2]
APUFCMINSTRUCTION[24]	out	CELL_N[3].OUT_SEC_TMIN[3]
APUFCMINSTRUCTION[23]	out	CELL_N[4].OUT_BEST_TMIN[4]
APUFCMINSTRUCTION[22]	out	CELL_N[4].OUT_BEST_TMIN[5]
APUFCMINSTRUCTION[21]	out	CELL_N[4].OUT_BEST_TMIN[6]
APUFCMINSTRUCTION[20]	out	CELL_N[4].OUT_BEST_TMIN[7]
APUFCMINSTRUCTION[19]	out	CELL_N[4].OUT_SEC_TMIN[0]
APUFCMINSTRUCTION[18]	out	CELL_N[4].OUT_SEC_TMIN[1]
APUFCMINSTRUCTION[17]	out	CELL_N[4].OUT_SEC_TMIN[2]
APUFCMINSTRUCTION[16]	out	CELL_N[4].OUT_SEC_TMIN[3]
APUFCMINSTRUCTION[15]	out	CELL_N[5].OUT_BEST_TMIN[4]
APUFCMINSTRUCTION[14]	out	CELL_N[5].OUT_BEST_TMIN[5]
APUFCMINSTRUCTION[13]	out	CELL_N[5].OUT_BEST_TMIN[6]
APUFCMINSTRUCTION[12]	out	CELL_N[5].OUT_BEST_TMIN[7]
APUFCMINSTRUCTION[11]	out	CELL_N[5].OUT_SEC_TMIN[0]
APUFCMINSTRUCTION[10]	out	CELL_N[5].OUT_SEC_TMIN[1]
APUFCMINSTRUCTION[9]	out	CELL_N[5].OUT_SEC_TMIN[2]
APUFCMINSTRUCTION[8]	out	CELL_N[5].OUT_SEC_TMIN[3]
APUFCMINSTRUCTION[7]	out	CELL_N[6].OUT_BEST_TMIN[4]
APUFCMINSTRUCTION[6]	out	CELL_N[6].OUT_BEST_TMIN[5]
APUFCMINSTRUCTION[5]	out	CELL_N[6].OUT_BEST_TMIN[6]
APUFCMINSTRUCTION[4]	out	CELL_N[6].OUT_BEST_TMIN[7]
APUFCMINSTRUCTION[3]	out	CELL_N[6].OUT_SEC_TMIN[0]
APUFCMINSTRUCTION[2]	out	CELL_N[6].OUT_SEC_TMIN[1]
APUFCMINSTRUCTION[1]	out	CELL_N[6].OUT_SEC_TMIN[2]
APUFCMINSTRUCTION[0]	out	CELL_N[6].OUT_SEC_TMIN[3]
APUFCMINSTRVALID	out	CELL_E[14].OUT_SEC_TMIN[1]
APUFCMLOADBYTEEN[3]	out	CELL_E[15].OUT_SEC_TMIN[3]
APUFCMLOADBYTEEN[2]	out	CELL_E[15].OUT_SEC_TMIN[2]
APUFCMLOADBYTEEN[1]	out	CELL_E[15].OUT_SEC_TMIN[1]
APUFCMLOADBYTEEN[0]	out	CELL_E[15].OUT_SEC_TMIN[0]
APUFCMLOADDATA[31]	out	CELL_E[16].OUT_SEC_TMIN[3]
APUFCMLOADDATA[30]	out	CELL_E[16].OUT_SEC_TMIN[2]
APUFCMLOADDATA[29]	out	CELL_E[16].OUT_SEC_TMIN[1]
APUFCMLOADDATA[28]	out	CELL_E[16].OUT_SEC_TMIN[0]
APUFCMLOADDATA[27]	out	CELL_E[17].OUT_SEC_TMIN[3]
APUFCMLOADDATA[26]	out	CELL_E[17].OUT_SEC_TMIN[2]
APUFCMLOADDATA[25]	out	CELL_E[17].OUT_SEC_TMIN[1]
APUFCMLOADDATA[24]	out	CELL_E[17].OUT_SEC_TMIN[0]
APUFCMLOADDATA[23]	out	CELL_E[18].OUT_SEC_TMIN[3]
APUFCMLOADDATA[22]	out	CELL_E[18].OUT_SEC_TMIN[2]
APUFCMLOADDATA[21]	out	CELL_E[18].OUT_SEC_TMIN[1]
APUFCMLOADDATA[20]	out	CELL_E[18].OUT_SEC_TMIN[0]
APUFCMLOADDATA[19]	out	CELL_E[19].OUT_SEC_TMIN[3]
APUFCMLOADDATA[18]	out	CELL_E[19].OUT_SEC_TMIN[2]
APUFCMLOADDATA[17]	out	CELL_E[19].OUT_SEC_TMIN[1]
APUFCMLOADDATA[16]	out	CELL_E[19].OUT_SEC_TMIN[0]
APUFCMLOADDATA[15]	out	CELL_E[20].OUT_SEC_TMIN[3]
APUFCMLOADDATA[14]	out	CELL_E[20].OUT_SEC_TMIN[2]
APUFCMLOADDATA[13]	out	CELL_E[20].OUT_SEC_TMIN[1]
APUFCMLOADDATA[12]	out	CELL_E[20].OUT_SEC_TMIN[0]
APUFCMLOADDATA[11]	out	CELL_E[21].OUT_SEC_TMIN[3]
APUFCMLOADDATA[10]	out	CELL_E[21].OUT_SEC_TMIN[2]
APUFCMLOADDATA[9]	out	CELL_E[21].OUT_SEC_TMIN[1]
APUFCMLOADDATA[8]	out	CELL_E[21].OUT_SEC_TMIN[0]
APUFCMLOADDATA[7]	out	CELL_E[22].OUT_SEC_TMIN[3]
APUFCMLOADDATA[6]	out	CELL_E[22].OUT_SEC_TMIN[2]
APUFCMLOADDATA[5]	out	CELL_E[22].OUT_SEC_TMIN[1]
APUFCMLOADDATA[4]	out	CELL_E[22].OUT_SEC_TMIN[0]
APUFCMLOADDATA[3]	out	CELL_E[23].OUT_SEC_TMIN[3]
APUFCMLOADDATA[2]	out	CELL_E[23].OUT_SEC_TMIN[2]
APUFCMLOADDATA[1]	out	CELL_E[23].OUT_SEC_TMIN[1]
APUFCMLOADDATA[0]	out	CELL_E[23].OUT_SEC_TMIN[0]
APUFCMLOADDVALID	out	CELL_E[13].OUT_SEC_TMIN[0]
APUFCMOPERANDVALID	out	CELL_E[13].OUT_BEST_TMIN[7]
APUFCMRADATA[31]	out	CELL_E[16].OUT_BEST_TMIN[3]
APUFCMRADATA[30]	out	CELL_E[16].OUT_BEST_TMIN[2]
APUFCMRADATA[29]	out	CELL_E[16].OUT_BEST_TMIN[1]
APUFCMRADATA[28]	out	CELL_E[16].OUT_BEST_TMIN[0]
APUFCMRADATA[27]	out	CELL_E[17].OUT_BEST_TMIN[3]
APUFCMRADATA[26]	out	CELL_E[17].OUT_BEST_TMIN[2]
APUFCMRADATA[25]	out	CELL_E[17].OUT_BEST_TMIN[1]
APUFCMRADATA[24]	out	CELL_E[17].OUT_BEST_TMIN[0]
APUFCMRADATA[23]	out	CELL_E[18].OUT_BEST_TMIN[3]
APUFCMRADATA[22]	out	CELL_E[18].OUT_BEST_TMIN[2]
APUFCMRADATA[21]	out	CELL_E[18].OUT_BEST_TMIN[1]
APUFCMRADATA[20]	out	CELL_E[18].OUT_BEST_TMIN[0]
APUFCMRADATA[19]	out	CELL_E[19].OUT_BEST_TMIN[3]
APUFCMRADATA[18]	out	CELL_E[19].OUT_BEST_TMIN[2]
APUFCMRADATA[17]	out	CELL_E[19].OUT_BEST_TMIN[1]
APUFCMRADATA[16]	out	CELL_E[19].OUT_BEST_TMIN[0]
APUFCMRADATA[15]	out	CELL_E[20].OUT_BEST_TMIN[3]
APUFCMRADATA[14]	out	CELL_E[20].OUT_BEST_TMIN[2]
APUFCMRADATA[13]	out	CELL_E[20].OUT_BEST_TMIN[1]
APUFCMRADATA[12]	out	CELL_E[20].OUT_BEST_TMIN[0]
APUFCMRADATA[11]	out	CELL_E[21].OUT_BEST_TMIN[3]
APUFCMRADATA[10]	out	CELL_E[21].OUT_BEST_TMIN[2]
APUFCMRADATA[9]	out	CELL_E[21].OUT_BEST_TMIN[1]
APUFCMRADATA[8]	out	CELL_E[21].OUT_BEST_TMIN[0]
APUFCMRADATA[7]	out	CELL_E[22].OUT_BEST_TMIN[3]
APUFCMRADATA[6]	out	CELL_E[22].OUT_BEST_TMIN[2]
APUFCMRADATA[5]	out	CELL_E[22].OUT_BEST_TMIN[1]
APUFCMRADATA[4]	out	CELL_E[22].OUT_BEST_TMIN[0]
APUFCMRADATA[3]	out	CELL_E[23].OUT_BEST_TMIN[3]
APUFCMRADATA[2]	out	CELL_E[23].OUT_BEST_TMIN[2]
APUFCMRADATA[1]	out	CELL_E[23].OUT_BEST_TMIN[1]
APUFCMRADATA[0]	out	CELL_E[23].OUT_BEST_TMIN[0]
APUFCMRBDATA[31]	out	CELL_E[16].OUT_BEST_TMIN[7]
APUFCMRBDATA[30]	out	CELL_E[16].OUT_BEST_TMIN[6]
APUFCMRBDATA[29]	out	CELL_E[16].OUT_BEST_TMIN[5]
APUFCMRBDATA[28]	out	CELL_E[16].OUT_BEST_TMIN[4]
APUFCMRBDATA[27]	out	CELL_E[17].OUT_BEST_TMIN[7]
APUFCMRBDATA[26]	out	CELL_E[17].OUT_BEST_TMIN[6]
APUFCMRBDATA[25]	out	CELL_E[17].OUT_BEST_TMIN[5]
APUFCMRBDATA[24]	out	CELL_E[17].OUT_BEST_TMIN[4]
APUFCMRBDATA[23]	out	CELL_E[18].OUT_BEST_TMIN[7]
APUFCMRBDATA[22]	out	CELL_E[18].OUT_BEST_TMIN[6]
APUFCMRBDATA[21]	out	CELL_E[18].OUT_BEST_TMIN[5]
APUFCMRBDATA[20]	out	CELL_E[18].OUT_BEST_TMIN[4]
APUFCMRBDATA[19]	out	CELL_E[19].OUT_BEST_TMIN[7]
APUFCMRBDATA[18]	out	CELL_E[19].OUT_BEST_TMIN[6]
APUFCMRBDATA[17]	out	CELL_E[19].OUT_BEST_TMIN[5]
APUFCMRBDATA[16]	out	CELL_E[19].OUT_BEST_TMIN[4]
APUFCMRBDATA[15]	out	CELL_E[20].OUT_BEST_TMIN[7]
APUFCMRBDATA[14]	out	CELL_E[20].OUT_BEST_TMIN[6]
APUFCMRBDATA[13]	out	CELL_E[20].OUT_BEST_TMIN[5]
APUFCMRBDATA[12]	out	CELL_E[20].OUT_BEST_TMIN[4]
APUFCMRBDATA[11]	out	CELL_E[21].OUT_BEST_TMIN[7]
APUFCMRBDATA[10]	out	CELL_E[21].OUT_BEST_TMIN[6]
APUFCMRBDATA[9]	out	CELL_E[21].OUT_BEST_TMIN[5]
APUFCMRBDATA[8]	out	CELL_E[21].OUT_BEST_TMIN[4]
APUFCMRBDATA[7]	out	CELL_E[22].OUT_BEST_TMIN[7]
APUFCMRBDATA[6]	out	CELL_E[22].OUT_BEST_TMIN[6]
APUFCMRBDATA[5]	out	CELL_E[22].OUT_BEST_TMIN[5]
APUFCMRBDATA[4]	out	CELL_E[22].OUT_BEST_TMIN[4]
APUFCMRBDATA[3]	out	CELL_E[23].OUT_BEST_TMIN[7]
APUFCMRBDATA[2]	out	CELL_E[23].OUT_BEST_TMIN[6]
APUFCMRBDATA[1]	out	CELL_E[23].OUT_BEST_TMIN[5]
APUFCMRBDATA[0]	out	CELL_E[23].OUT_BEST_TMIN[4]
APUFCMWRITEBACKOK	out	CELL_E[14].OUT_BEST_TMIN[5]
APUFCMXERCA	out	CELL_E[14].OUT_BEST_TMIN[7]
TSTAPUC405APUDIVENO	out	CELL_E[12].OUT_HALF0_BEL[2], CELL_E[12].OUT_HALF1_BEL[2]
TSTAPUC405APUPRESENTO	out	CELL_E[12].OUT_HALF0_BEL[3], CELL_E[12].OUT_HALF1_BEL[3]
TSTAPUC405DCDAPUOPO	out	CELL_E[12].OUT_HALF0_BEL[4], CELL_E[12].OUT_HALF1_BEL[4]
TSTAPUC405DCDCRENO	out	CELL_E[5].OUT_HALF0_BEL[4], CELL_E[5].OUT_HALF1_BEL[4]
TSTAPUC405DCDFORCEALIGNO	out	CELL_E[12].OUT_HALF0_BEL[5], CELL_E[12].OUT_HALF1_BEL[5]
TSTAPUC405DCDFORCEBESTEERINGO	out	CELL_E[12].OUT_HALF0_BEL[6], CELL_E[12].OUT_HALF1_BEL[6]
TSTAPUC405DCDFPUOPO	out	CELL_E[7].OUT_HALF0_BEL[7], CELL_E[7].OUT_HALF1_BEL[7]
TSTAPUC405DCDGPRWRITEO	out	CELL_E[7].OUT_HALF0_BEL[0], CELL_E[7].OUT_HALF1_BEL[0]
TSTAPUC405DCDLDSTBYTEO	out	CELL_E[12].OUT_HALF0_BEL[7], CELL_E[12].OUT_HALF1_BEL[7]
TSTAPUC405DCDLDSTDWO	out	CELL_E[5].OUT_HALF0_BEL[1], CELL_E[5].OUT_HALF1_BEL[1]
TSTAPUC405DCDLDSTHWO	out	CELL_E[5].OUT_HALF0_BEL[7], CELL_E[5].OUT_HALF1_BEL[7]
TSTAPUC405DCDLDSTQWO	out	CELL_E[5].OUT_HALF0_BEL[2], CELL_E[5].OUT_HALF1_BEL[2]
TSTAPUC405DCDLDSTWDO	out	CELL_E[5].OUT_HALF0_BEL[0], CELL_E[5].OUT_HALF1_BEL[0]
TSTAPUC405DCDLOADO	out	CELL_E[7].OUT_HALF0_BEL[3], CELL_E[7].OUT_HALF1_BEL[3]
TSTAPUC405DCDPRIVOPO	out	CELL_E[6].OUT_HALF0_BEL[3], CELL_E[6].OUT_HALF1_BEL[3]
TSTAPUC405DCDRAENO	out	CELL_E[7].OUT_HALF0_BEL[1], CELL_E[7].OUT_HALF1_BEL[1]
TSTAPUC405DCDRBENO	out	CELL_E[7].OUT_HALF0_BEL[2], CELL_E[7].OUT_HALF1_BEL[2]
TSTAPUC405DCDSTOREO	out	CELL_E[6].OUT_HALF0_BEL[0], CELL_E[6].OUT_HALF1_BEL[0]
TSTAPUC405DCDTRAPBEO	out	CELL_E[5].OUT_HALF0_BEL[3], CELL_E[5].OUT_HALF1_BEL[3]
TSTAPUC405DCDTRAPLEO	out	CELL_E[4].OUT_HALF0_BEL[4], CELL_E[4].OUT_HALF1_BEL[4]
TSTAPUC405DCDUPDATEO	out	CELL_E[5].OUT_HALF0_BEL[5], CELL_E[5].OUT_HALF1_BEL[5]
TSTAPUC405DCDVALIDOPO	out	CELL_E[12].OUT_HALF0_BEL[1], CELL_E[12].OUT_HALF1_BEL[1]
TSTAPUC405DCDXERCAENO	out	CELL_E[6].OUT_HALF0_BEL[1], CELL_E[6].OUT_HALF1_BEL[1]
TSTAPUC405DCDXEROVENO	out	CELL_E[6].OUT_HALF0_BEL[2], CELL_E[6].OUT_HALF1_BEL[2]
TSTAPUC405EXCEPTIONO	out	CELL_E[4].OUT_SEC_TMIN[3]
TSTAPUC405EXEBLOCKINGMCOO	out	CELL_E[4].OUT_HALF0_BEL[0], CELL_E[4].OUT_HALF1_BEL[0]
TSTAPUC405EXEBUSYO	out	CELL_E[4].OUT_HALF0_BEL[2], CELL_E[4].OUT_HALF1_BEL[2]
TSTAPUC405EXECRFIELDO[2]	out	CELL_E[7].OUT_HALF0_BEL[6], CELL_E[7].OUT_HALF1_BEL[6]
TSTAPUC405EXECRFIELDO[1]	out	CELL_E[7].OUT_HALF0_BEL[5], CELL_E[7].OUT_HALF1_BEL[5]
TSTAPUC405EXECRFIELDO[0]	out	CELL_E[7].OUT_HALF0_BEL[4], CELL_E[7].OUT_HALF1_BEL[4]
TSTAPUC405EXECRO[3]	out	CELL_E[6].OUT_HALF0_BEL[7], CELL_E[6].OUT_HALF1_BEL[7]
TSTAPUC405EXECRO[2]	out	CELL_E[6].OUT_HALF0_BEL[6], CELL_E[6].OUT_HALF1_BEL[6]
TSTAPUC405EXECRO[1]	out	CELL_E[6].OUT_HALF0_BEL[5], CELL_E[6].OUT_HALF1_BEL[5]
TSTAPUC405EXECRO[0]	out	CELL_E[6].OUT_HALF0_BEL[4], CELL_E[6].OUT_HALF1_BEL[4]
TSTAPUC405EXELDDEPENDO	out	CELL_E[4].OUT_HALF0_BEL[5], CELL_E[4].OUT_HALF1_BEL[5]
TSTAPUC405EXENONBLOCKINGMCOO	out	CELL_E[4].OUT_HALF0_BEL[1], CELL_E[4].OUT_HALF1_BEL[1]
TSTAPUC405EXERESULTO[31]	out	CELL_E[8].OUT_HALF0_BEL[7], CELL_E[8].OUT_HALF1_BEL[7]
TSTAPUC405EXERESULTO[30]	out	CELL_E[8].OUT_HALF0_BEL[6], CELL_E[8].OUT_HALF1_BEL[6]
TSTAPUC405EXERESULTO[29]	out	CELL_E[8].OUT_HALF0_BEL[5], CELL_E[8].OUT_HALF1_BEL[5]
TSTAPUC405EXERESULTO[28]	out	CELL_E[8].OUT_HALF0_BEL[4], CELL_E[8].OUT_HALF1_BEL[4]
TSTAPUC405EXERESULTO[27]	out	CELL_E[8].OUT_HALF0_BEL[3], CELL_E[8].OUT_HALF1_BEL[3]
TSTAPUC405EXERESULTO[26]	out	CELL_E[8].OUT_HALF0_BEL[2], CELL_E[8].OUT_HALF1_BEL[2]
TSTAPUC405EXERESULTO[25]	out	CELL_E[8].OUT_HALF0_BEL[1], CELL_E[8].OUT_HALF1_BEL[1]
TSTAPUC405EXERESULTO[24]	out	CELL_E[8].OUT_HALF0_BEL[0], CELL_E[8].OUT_HALF1_BEL[0]
TSTAPUC405EXERESULTO[23]	out	CELL_E[9].OUT_HALF0_BEL[7], CELL_E[9].OUT_HALF1_BEL[7]
TSTAPUC405EXERESULTO[22]	out	CELL_E[9].OUT_HALF0_BEL[6], CELL_E[9].OUT_HALF1_BEL[6]
TSTAPUC405EXERESULTO[21]	out	CELL_E[9].OUT_HALF0_BEL[5], CELL_E[9].OUT_HALF1_BEL[5]
TSTAPUC405EXERESULTO[20]	out	CELL_E[9].OUT_HALF0_BEL[4], CELL_E[9].OUT_HALF1_BEL[4]
TSTAPUC405EXERESULTO[19]	out	CELL_E[9].OUT_HALF0_BEL[3], CELL_E[9].OUT_HALF1_BEL[3]
TSTAPUC405EXERESULTO[18]	out	CELL_E[9].OUT_HALF0_BEL[2], CELL_E[9].OUT_HALF1_BEL[2]
TSTAPUC405EXERESULTO[17]	out	CELL_E[9].OUT_HALF0_BEL[1], CELL_E[9].OUT_HALF1_BEL[1]
TSTAPUC405EXERESULTO[16]	out	CELL_E[9].OUT_HALF0_BEL[0], CELL_E[9].OUT_HALF1_BEL[0]
TSTAPUC405EXERESULTO[15]	out	CELL_E[10].OUT_HALF0_BEL[7], CELL_E[10].OUT_HALF1_BEL[7]
TSTAPUC405EXERESULTO[14]	out	CELL_E[10].OUT_HALF0_BEL[6], CELL_E[10].OUT_HALF1_BEL[6]
TSTAPUC405EXERESULTO[13]	out	CELL_E[10].OUT_HALF0_BEL[5], CELL_E[10].OUT_HALF1_BEL[5]
TSTAPUC405EXERESULTO[12]	out	CELL_E[10].OUT_HALF0_BEL[4], CELL_E[10].OUT_HALF1_BEL[4]
TSTAPUC405EXERESULTO[11]	out	CELL_E[10].OUT_HALF0_BEL[3], CELL_E[10].OUT_HALF1_BEL[3]
TSTAPUC405EXERESULTO[10]	out	CELL_E[10].OUT_HALF0_BEL[2], CELL_E[10].OUT_HALF1_BEL[2]
TSTAPUC405EXERESULTO[9]	out	CELL_E[10].OUT_HALF0_BEL[1], CELL_E[10].OUT_HALF1_BEL[1]
TSTAPUC405EXERESULTO[8]	out	CELL_E[10].OUT_HALF0_BEL[0], CELL_E[10].OUT_HALF1_BEL[0]
TSTAPUC405EXERESULTO[7]	out	CELL_E[11].OUT_HALF0_BEL[7], CELL_E[11].OUT_HALF1_BEL[7]
TSTAPUC405EXERESULTO[6]	out	CELL_E[11].OUT_HALF0_BEL[6], CELL_E[11].OUT_HALF1_BEL[6]
TSTAPUC405EXERESULTO[5]	out	CELL_E[11].OUT_HALF0_BEL[5], CELL_E[11].OUT_HALF1_BEL[5]
TSTAPUC405EXERESULTO[4]	out	CELL_E[11].OUT_HALF0_BEL[4], CELL_E[11].OUT_HALF1_BEL[4]
TSTAPUC405EXERESULTO[3]	out	CELL_E[11].OUT_HALF0_BEL[3], CELL_E[11].OUT_HALF1_BEL[3]
TSTAPUC405EXERESULTO[2]	out	CELL_E[11].OUT_HALF0_BEL[2], CELL_E[11].OUT_HALF1_BEL[2]
TSTAPUC405EXERESULTO[1]	out	CELL_E[11].OUT_HALF0_BEL[1], CELL_E[11].OUT_HALF1_BEL[1]
TSTAPUC405EXERESULTO[0]	out	CELL_E[11].OUT_HALF0_BEL[0], CELL_E[11].OUT_HALF1_BEL[0]
TSTAPUC405EXEXERCAO	out	CELL_E[4].OUT_HALF0_BEL[3], CELL_E[4].OUT_HALF1_BEL[3]
TSTAPUC405EXEXEROVO	out	CELL_E[4].OUT_SEC_TMIN[2]
TSTAPUC405FPUEXCEPTIONO	out	CELL_E[12].OUT_HALF0_BEL[0], CELL_E[12].OUT_HALF1_BEL[0]
TSTAPUC405LWBLDDEPENDO	out	CELL_E[4].OUT_HALF0_BEL[7], CELL_E[4].OUT_HALF1_BEL[7]
TSTAPUC405SLEEPREQO	out	CELL_E[5].OUT_HALF0_BEL[6], CELL_E[5].OUT_HALF1_BEL[6]
TSTAPUC405WBLDDEPENDO	out	CELL_E[4].OUT_HALF0_BEL[6], CELL_E[4].OUT_HALF1_BEL[6]
TSTC405APUDCDFULLO	out	CELL_W[5].OUT_HALF0_BEL[3], CELL_W[5].OUT_HALF1_BEL[3]
TSTC405APUDCDHOLDO	out	CELL_E[13].OUT_HALF0_BEL[6], CELL_E[13].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[31]	out	CELL_E[14].OUT_HALF0_BEL[7], CELL_E[14].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[30]	out	CELL_E[14].OUT_HALF0_BEL[6], CELL_E[14].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[29]	out	CELL_E[14].OUT_HALF0_BEL[5], CELL_E[14].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[28]	out	CELL_E[14].OUT_HALF0_BEL[4], CELL_E[14].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[27]	out	CELL_N[0].OUT_HALF0_BEL[7], CELL_N[0].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[26]	out	CELL_N[0].OUT_HALF0_BEL[6], CELL_N[0].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[25]	out	CELL_N[0].OUT_HALF0_BEL[5], CELL_N[0].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[24]	out	CELL_N[0].OUT_HALF0_BEL[4], CELL_N[0].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[23]	out	CELL_N[1].OUT_HALF0_BEL[7], CELL_N[1].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[22]	out	CELL_N[1].OUT_HALF0_BEL[6], CELL_N[1].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[21]	out	CELL_N[1].OUT_HALF0_BEL[5], CELL_N[1].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[20]	out	CELL_N[1].OUT_HALF0_BEL[4], CELL_N[1].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[19]	out	CELL_N[2].OUT_HALF0_BEL[7], CELL_N[2].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[18]	out	CELL_N[2].OUT_HALF0_BEL[6], CELL_N[2].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[17]	out	CELL_N[2].OUT_HALF0_BEL[5], CELL_N[2].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[16]	out	CELL_N[2].OUT_HALF0_BEL[4], CELL_N[2].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[15]	out	CELL_N[3].OUT_HALF0_BEL[7], CELL_N[3].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[14]	out	CELL_N[3].OUT_HALF0_BEL[6], CELL_N[3].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[13]	out	CELL_N[3].OUT_HALF0_BEL[5], CELL_N[3].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[12]	out	CELL_N[3].OUT_HALF0_BEL[4], CELL_N[3].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[11]	out	CELL_N[4].OUT_HALF0_BEL[7], CELL_N[4].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[10]	out	CELL_N[4].OUT_HALF0_BEL[6], CELL_N[4].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[9]	out	CELL_N[4].OUT_HALF0_BEL[5], CELL_N[4].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[8]	out	CELL_N[4].OUT_HALF0_BEL[4], CELL_N[4].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[7]	out	CELL_N[5].OUT_HALF0_BEL[7], CELL_N[5].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[6]	out	CELL_N[5].OUT_HALF0_BEL[6], CELL_N[5].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[5]	out	CELL_N[5].OUT_HALF0_BEL[5], CELL_N[5].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[4]	out	CELL_N[5].OUT_HALF0_BEL[4], CELL_N[5].OUT_HALF1_BEL[4]
TSTC405APUDCDINSTRUCTIONO[3]	out	CELL_N[6].OUT_HALF0_BEL[7], CELL_N[6].OUT_HALF1_BEL[7]
TSTC405APUDCDINSTRUCTIONO[2]	out	CELL_N[6].OUT_HALF0_BEL[6], CELL_N[6].OUT_HALF1_BEL[6]
TSTC405APUDCDINSTRUCTIONO[1]	out	CELL_N[6].OUT_HALF0_BEL[5], CELL_N[6].OUT_HALF1_BEL[5]
TSTC405APUDCDINSTRUCTIONO[0]	out	CELL_N[6].OUT_HALF0_BEL[4], CELL_N[6].OUT_HALF1_BEL[4]
TSTC405APUEXEFLUSHO	out	CELL_E[12].OUT_SEC_TMIN[2]
TSTC405APUEXEHOLDO	out	CELL_E[13].OUT_HALF0_BEL[5], CELL_E[13].OUT_HALF1_BEL[5]
TSTC405APUEXELOADDBUSO[31]	out	CELL_E[16].OUT_HALF0_BEL[7], CELL_E[16].OUT_HALF1_BEL[7]
TSTC405APUEXELOADDBUSO[30]	out	CELL_E[16].OUT_HALF0_BEL[6], CELL_E[16].OUT_HALF1_BEL[6]
TSTC405APUEXELOADDBUSO[29]	out	CELL_E[16].OUT_HALF0_BEL[5], CELL_E[16].OUT_HALF1_BEL[5]
TSTC405APUEXELOADDBUSO[28]	out	CELL_E[16].OUT_HALF0_BEL[4], CELL_E[16].OUT_HALF1_BEL[4]
TSTC405APUEXELOADDBUSO[27]	out	CELL_E[16].OUT_HALF0_BEL[3], CELL_E[16].OUT_HALF1_BEL[3]
TSTC405APUEXELOADDBUSO[26]	out	CELL_E[16].OUT_HALF0_BEL[2], CELL_E[16].OUT_HALF1_BEL[2]
TSTC405APUEXELOADDBUSO[25]	out	CELL_E[16].OUT_HALF0_BEL[1], CELL_E[16].OUT_HALF1_BEL[1]
TSTC405APUEXELOADDBUSO[24]	out	CELL_E[16].OUT_HALF0_BEL[0], CELL_E[16].OUT_HALF1_BEL[0]
TSTC405APUEXELOADDBUSO[23]	out	CELL_E[17].OUT_HALF0_BEL[7], CELL_E[17].OUT_HALF1_BEL[7]
TSTC405APUEXELOADDBUSO[22]	out	CELL_E[17].OUT_HALF0_BEL[6], CELL_E[17].OUT_HALF1_BEL[6]
TSTC405APUEXELOADDBUSO[21]	out	CELL_E[17].OUT_HALF0_BEL[5], CELL_E[17].OUT_HALF1_BEL[5]
TSTC405APUEXELOADDBUSO[20]	out	CELL_E[17].OUT_HALF0_BEL[4], CELL_E[17].OUT_HALF1_BEL[4]
TSTC405APUEXELOADDBUSO[19]	out	CELL_E[17].OUT_HALF0_BEL[3], CELL_E[17].OUT_HALF1_BEL[3]
TSTC405APUEXELOADDBUSO[18]	out	CELL_E[17].OUT_HALF0_BEL[2], CELL_E[17].OUT_HALF1_BEL[2]
TSTC405APUEXELOADDBUSO[17]	out	CELL_E[17].OUT_HALF0_BEL[1], CELL_E[17].OUT_HALF1_BEL[1]
TSTC405APUEXELOADDBUSO[16]	out	CELL_E[17].OUT_HALF0_BEL[0], CELL_E[17].OUT_HALF1_BEL[0]
TSTC405APUEXELOADDBUSO[15]	out	CELL_E[18].OUT_HALF0_BEL[7], CELL_E[18].OUT_HALF1_BEL[7]
TSTC405APUEXELOADDBUSO[14]	out	CELL_E[18].OUT_HALF0_BEL[6], CELL_E[18].OUT_HALF1_BEL[6]
TSTC405APUEXELOADDBUSO[13]	out	CELL_E[18].OUT_HALF0_BEL[5], CELL_E[18].OUT_HALF1_BEL[5]
TSTC405APUEXELOADDBUSO[12]	out	CELL_E[18].OUT_HALF0_BEL[4], CELL_E[18].OUT_HALF1_BEL[4]
TSTC405APUEXELOADDBUSO[11]	out	CELL_E[18].OUT_HALF0_BEL[3], CELL_E[18].OUT_HALF1_BEL[3]
TSTC405APUEXELOADDBUSO[10]	out	CELL_E[18].OUT_HALF0_BEL[2], CELL_E[18].OUT_HALF1_BEL[2]
TSTC405APUEXELOADDBUSO[9]	out	CELL_E[18].OUT_HALF0_BEL[1], CELL_E[18].OUT_HALF1_BEL[1]
TSTC405APUEXELOADDBUSO[8]	out	CELL_E[18].OUT_HALF0_BEL[0], CELL_E[18].OUT_HALF1_BEL[0]
TSTC405APUEXELOADDBUSO[7]	out	CELL_E[19].OUT_HALF0_BEL[7], CELL_E[19].OUT_HALF1_BEL[7]
TSTC405APUEXELOADDBUSO[6]	out	CELL_E[19].OUT_HALF0_BEL[6], CELL_E[19].OUT_HALF1_BEL[6]
TSTC405APUEXELOADDBUSO[5]	out	CELL_E[19].OUT_HALF0_BEL[5], CELL_E[19].OUT_HALF1_BEL[5]
TSTC405APUEXELOADDBUSO[4]	out	CELL_E[19].OUT_HALF0_BEL[4], CELL_E[19].OUT_HALF1_BEL[4]
TSTC405APUEXELOADDBUSO[3]	out	CELL_E[19].OUT_HALF0_BEL[3], CELL_E[19].OUT_HALF1_BEL[3]
TSTC405APUEXELOADDBUSO[2]	out	CELL_E[19].OUT_HALF0_BEL[2], CELL_E[19].OUT_HALF1_BEL[2]
TSTC405APUEXELOADDBUSO[1]	out	CELL_E[19].OUT_HALF0_BEL[1], CELL_E[19].OUT_HALF1_BEL[1]
TSTC405APUEXELOADDBUSO[0]	out	CELL_E[19].OUT_HALF0_BEL[0], CELL_E[19].OUT_HALF1_BEL[0]
TSTC405APUEXELOADDVALIDO	out	CELL_E[12].OUT_SEC_TMIN[1]
TSTC405APUEXERADATAO[31]	out	CELL_E[14].OUT_HALF0_BEL[3], CELL_E[14].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[30]	out	CELL_E[14].OUT_HALF0_BEL[2], CELL_E[14].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[29]	out	CELL_E[14].OUT_HALF0_BEL[1], CELL_E[14].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[28]	out	CELL_E[14].OUT_HALF0_BEL[0], CELL_E[14].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[27]	out	CELL_N[0].OUT_HALF0_BEL[3], CELL_N[0].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[26]	out	CELL_N[0].OUT_HALF0_BEL[2], CELL_N[0].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[25]	out	CELL_N[0].OUT_HALF0_BEL[1], CELL_N[0].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[24]	out	CELL_N[0].OUT_HALF0_BEL[0], CELL_N[0].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[23]	out	CELL_N[1].OUT_HALF0_BEL[3], CELL_N[1].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[22]	out	CELL_N[1].OUT_HALF0_BEL[2], CELL_N[1].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[21]	out	CELL_N[1].OUT_HALF0_BEL[1], CELL_N[1].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[20]	out	CELL_N[1].OUT_HALF0_BEL[0], CELL_N[1].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[19]	out	CELL_N[2].OUT_HALF0_BEL[3], CELL_N[2].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[18]	out	CELL_N[2].OUT_HALF0_BEL[2], CELL_N[2].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[17]	out	CELL_N[2].OUT_HALF0_BEL[1], CELL_N[2].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[16]	out	CELL_N[2].OUT_HALF0_BEL[0], CELL_N[2].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[15]	out	CELL_N[3].OUT_HALF0_BEL[3], CELL_N[3].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[14]	out	CELL_N[3].OUT_HALF0_BEL[2], CELL_N[3].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[13]	out	CELL_N[3].OUT_HALF0_BEL[1], CELL_N[3].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[12]	out	CELL_N[3].OUT_HALF0_BEL[0], CELL_N[3].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[11]	out	CELL_N[4].OUT_HALF0_BEL[3], CELL_N[4].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[10]	out	CELL_N[4].OUT_HALF0_BEL[2], CELL_N[4].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[9]	out	CELL_N[4].OUT_HALF0_BEL[1], CELL_N[4].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[8]	out	CELL_N[4].OUT_HALF0_BEL[0], CELL_N[4].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[7]	out	CELL_N[5].OUT_HALF0_BEL[3], CELL_N[5].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[6]	out	CELL_N[5].OUT_HALF0_BEL[2], CELL_N[5].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[5]	out	CELL_N[5].OUT_HALF0_BEL[1], CELL_N[5].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[4]	out	CELL_N[5].OUT_HALF0_BEL[0], CELL_N[5].OUT_HALF1_BEL[0]
TSTC405APUEXERADATAO[3]	out	CELL_N[6].OUT_HALF0_BEL[3], CELL_N[6].OUT_HALF1_BEL[3]
TSTC405APUEXERADATAO[2]	out	CELL_N[6].OUT_HALF0_BEL[2], CELL_N[6].OUT_HALF1_BEL[2]
TSTC405APUEXERADATAO[1]	out	CELL_N[6].OUT_HALF0_BEL[1], CELL_N[6].OUT_HALF1_BEL[1]
TSTC405APUEXERADATAO[0]	out	CELL_N[6].OUT_HALF0_BEL[0], CELL_N[6].OUT_HALF1_BEL[0]
TSTC405APUEXERBDATAO[31]	out	CELL_E[20].OUT_HALF0_BEL[7], CELL_E[20].OUT_HALF1_BEL[7]
TSTC405APUEXERBDATAO[30]	out	CELL_E[20].OUT_HALF0_BEL[6], CELL_E[20].OUT_HALF1_BEL[6]
TSTC405APUEXERBDATAO[29]	out	CELL_E[20].OUT_HALF0_BEL[5], CELL_E[20].OUT_HALF1_BEL[5]
TSTC405APUEXERBDATAO[28]	out	CELL_E[20].OUT_HALF0_BEL[4], CELL_E[20].OUT_HALF1_BEL[4]
TSTC405APUEXERBDATAO[27]	out	CELL_E[20].OUT_HALF0_BEL[3], CELL_E[20].OUT_HALF1_BEL[3]
TSTC405APUEXERBDATAO[26]	out	CELL_E[20].OUT_HALF0_BEL[2], CELL_E[20].OUT_HALF1_BEL[2]
TSTC405APUEXERBDATAO[25]	out	CELL_E[20].OUT_HALF0_BEL[1], CELL_E[20].OUT_HALF1_BEL[1]
TSTC405APUEXERBDATAO[24]	out	CELL_E[20].OUT_HALF0_BEL[0], CELL_E[20].OUT_HALF1_BEL[0]
TSTC405APUEXERBDATAO[23]	out	CELL_E[21].OUT_HALF0_BEL[7], CELL_E[21].OUT_HALF1_BEL[7]
TSTC405APUEXERBDATAO[22]	out	CELL_E[21].OUT_HALF0_BEL[6], CELL_E[21].OUT_HALF1_BEL[6]
TSTC405APUEXERBDATAO[21]	out	CELL_E[21].OUT_HALF0_BEL[5], CELL_E[21].OUT_HALF1_BEL[5]
TSTC405APUEXERBDATAO[20]	out	CELL_E[21].OUT_HALF0_BEL[4], CELL_E[21].OUT_HALF1_BEL[4]
TSTC405APUEXERBDATAO[19]	out	CELL_E[21].OUT_HALF0_BEL[3], CELL_E[21].OUT_HALF1_BEL[3]
TSTC405APUEXERBDATAO[18]	out	CELL_E[21].OUT_HALF0_BEL[2], CELL_E[21].OUT_HALF1_BEL[2]
TSTC405APUEXERBDATAO[17]	out	CELL_E[21].OUT_HALF0_BEL[1], CELL_E[21].OUT_HALF1_BEL[1]
TSTC405APUEXERBDATAO[16]	out	CELL_E[21].OUT_HALF0_BEL[0], CELL_E[21].OUT_HALF1_BEL[0]
TSTC405APUEXERBDATAO[15]	out	CELL_E[22].OUT_HALF0_BEL[7], CELL_E[22].OUT_HALF1_BEL[7]
TSTC405APUEXERBDATAO[14]	out	CELL_E[22].OUT_HALF0_BEL[6], CELL_E[22].OUT_HALF1_BEL[6]
TSTC405APUEXERBDATAO[13]	out	CELL_E[22].OUT_HALF0_BEL[5], CELL_E[22].OUT_HALF1_BEL[5]
TSTC405APUEXERBDATAO[12]	out	CELL_E[22].OUT_HALF0_BEL[4], CELL_E[22].OUT_HALF1_BEL[4]
TSTC405APUEXERBDATAO[11]	out	CELL_E[22].OUT_HALF0_BEL[3], CELL_E[22].OUT_HALF1_BEL[3]
TSTC405APUEXERBDATAO[10]	out	CELL_E[22].OUT_HALF0_BEL[2], CELL_E[22].OUT_HALF1_BEL[2]
TSTC405APUEXERBDATAO[9]	out	CELL_E[22].OUT_HALF0_BEL[1], CELL_E[22].OUT_HALF1_BEL[1]
TSTC405APUEXERBDATAO[8]	out	CELL_E[22].OUT_HALF0_BEL[0], CELL_E[22].OUT_HALF1_BEL[0]
TSTC405APUEXERBDATAO[7]	out	CELL_E[23].OUT_HALF0_BEL[7], CELL_E[23].OUT_HALF1_BEL[7]
TSTC405APUEXERBDATAO[6]	out	CELL_E[23].OUT_HALF0_BEL[6], CELL_E[23].OUT_HALF1_BEL[6]
TSTC405APUEXERBDATAO[5]	out	CELL_E[23].OUT_HALF0_BEL[5], CELL_E[23].OUT_HALF1_BEL[5]
TSTC405APUEXERBDATAO[4]	out	CELL_E[23].OUT_HALF0_BEL[4], CELL_E[23].OUT_HALF1_BEL[4]
TSTC405APUEXERBDATAO[3]	out	CELL_E[23].OUT_HALF0_BEL[3], CELL_E[23].OUT_HALF1_BEL[3]
TSTC405APUEXERBDATAO[2]	out	CELL_E[23].OUT_HALF0_BEL[2], CELL_E[23].OUT_HALF1_BEL[2]
TSTC405APUEXERBDATAO[1]	out	CELL_E[23].OUT_HALF0_BEL[1], CELL_E[23].OUT_HALF1_BEL[1]
TSTC405APUEXERBDATAO[0]	out	CELL_E[23].OUT_HALF0_BEL[0], CELL_E[23].OUT_HALF1_BEL[0]
TSTC405APUEXEWDCNTO[1]	out	CELL_W[7].OUT_HALF0_BEL[5], CELL_W[7].OUT_HALF1_BEL[5]
TSTC405APUEXEWDCNTO[0]	out	CELL_W[7].OUT_HALF0_BEL[4], CELL_W[7].OUT_HALF1_BEL[4]
TSTC405APUMSRFE0O	out	CELL_W[7].OUT_HALF0_BEL[6], CELL_W[7].OUT_HALF1_BEL[6]
TSTC405APUMSRFE1O	out	CELL_W[7].OUT_HALF0_BEL[7], CELL_W[7].OUT_HALF1_BEL[7]
TSTC405APUWBBYTEENO[3]	out	CELL_W[3].OUT_HALF0_BEL[3], CELL_W[3].OUT_HALF1_BEL[3]
TSTC405APUWBBYTEENO[2]	out	CELL_W[3].OUT_HALF0_BEL[2], CELL_W[3].OUT_HALF1_BEL[2]
TSTC405APUWBBYTEENO[1]	out	CELL_W[3].OUT_HALF0_BEL[1], CELL_W[3].OUT_HALF1_BEL[1]
TSTC405APUWBBYTEENO[0]	out	CELL_W[3].OUT_HALF0_BEL[0], CELL_W[3].OUT_HALF1_BEL[0]
TSTC405APUWBENDIANO	out	CELL_E[12].OUT_SEC_TMIN[0]
TSTC405APUWBFLUSHO	out	CELL_W[5].OUT_HALF0_BEL[1], CELL_W[5].OUT_HALF1_BEL[1]
TSTC405APUWBHOLDO	out	CELL_W[5].OUT_HALF0_BEL[2], CELL_W[5].OUT_HALF1_BEL[2]
TSTC405APUXERCAO	out	CELL_E[13].OUT_HALF0_BEL[7], CELL_E[13].OUT_HALF1_BEL[7]
LSSDSCANOUT[15]	out	CELL_W[2].OUT_HALF0_BEL[3], CELL_W[2].OUT_HALF1_BEL[3]
LSSDSCANOUT[14]	out	CELL_W[2].OUT_HALF0_BEL[2], CELL_W[2].OUT_HALF1_BEL[2]
LSSDSCANOUT[13]	out	CELL_W[2].OUT_HALF0_BEL[1], CELL_W[2].OUT_HALF1_BEL[1]
LSSDSCANOUT[12]	out	CELL_W[2].OUT_HALF0_BEL[0], CELL_W[2].OUT_HALF1_BEL[0]
LSSDSCANOUT[11]	out	CELL_W[1].OUT_HALF0_BEL[5], CELL_W[1].OUT_HALF1_BEL[5]
LSSDSCANOUT[10]	out	CELL_W[1].OUT_HALF0_BEL[4], CELL_W[1].OUT_HALF1_BEL[4]
LSSDSCANOUT[9]	out	CELL_W[1].OUT_HALF0_BEL[3], CELL_W[1].OUT_HALF1_BEL[3]
LSSDSCANOUT[8]	out	CELL_W[1].OUT_HALF0_BEL[2], CELL_W[1].OUT_HALF1_BEL[2]
LSSDSCANOUT[7]	out	CELL_W[1].OUT_HALF0_BEL[1], CELL_W[1].OUT_HALF1_BEL[1]
LSSDSCANOUT[6]	out	CELL_W[1].OUT_HALF0_BEL[0], CELL_W[1].OUT_HALF1_BEL[0]
LSSDSCANOUT[5]	out	CELL_W[0].OUT_HALF0_BEL[5], CELL_W[0].OUT_HALF1_BEL[5]
LSSDSCANOUT[4]	out	CELL_W[0].OUT_HALF0_BEL[4], CELL_W[0].OUT_HALF1_BEL[4]
LSSDSCANOUT[3]	out	CELL_W[0].OUT_HALF0_BEL[3], CELL_W[0].OUT_HALF1_BEL[3]
LSSDSCANOUT[2]	out	CELL_W[0].OUT_HALF0_BEL[2], CELL_W[0].OUT_HALF1_BEL[2]
LSSDSCANOUT[1]	out	CELL_W[0].OUT_HALF0_BEL[1], CELL_W[0].OUT_HALF1_BEL[1]
LSSDSCANOUT[0]	out	CELL_W[0].OUT_HALF0_BEL[0], CELL_W[0].OUT_HALF1_BEL[0]
DIAGOUT	out	CELL_W[5].OUT_HALF0_BEL[0], CELL_W[5].OUT_HALF1_BEL[0]
TSTCLKINACTO	out	CELL_S[0].OUT_HALF0_BEL[1], CELL_S[0].OUT_HALF1_BEL[1]
TSTCPUCLKENO	out	CELL_S[0].OUT_HALF0_BEL[0], CELL_S[0].OUT_HALF1_BEL[0]
TSTJTAGENO	out	CELL_S[0].OUT_HALF0_BEL[3], CELL_S[0].OUT_HALF1_BEL[3]
TSTPLBSAMPLECYCLEO	out	CELL_W[21].OUT_SEC_TMIN[4]
TSTRESETCHIPO	out	CELL_E[15].OUT_HALF0_BEL[5], CELL_E[15].OUT_HALF1_BEL[5]
TSTRESETCOREO	out	CELL_E[15].OUT_HALF0_BEL[4], CELL_E[15].OUT_HALF1_BEL[4]
TSTRESETSYSO	out	CELL_E[15].OUT_HALF0_BEL[6], CELL_E[15].OUT_HALF1_BEL[6]
TSTSOGASKETO[1]	out	CELL_E[13].OUT_HALF0_BEL[4], CELL_E[13].OUT_HALF1_BEL[4]
TSTSOGASKETO[0]	out	CELL_E[13].OUT_HALF0_BEL[3], CELL_E[13].OUT_HALF1_BEL[3]
TSTTIMERENO	out	CELL_S[0].OUT_HALF0_BEL[2], CELL_S[0].OUT_HALF1_BEL[2]
TSTTRSTNEGO	out	CELL_E[15].OUT_HALF0_BEL[7], CELL_E[15].OUT_HALF1_BEL[7]

Bels EMAC_V4

virtex4 PPC bel EMAC_V4 pins
Pin	Direction	EMAC
RESET	in	CELL_W[2].IMUX_IMUX[14]
DCREMACENABLE	in	CELL_W[17].IMUX_IMUX[15]
HOSTCLK	in	~CELL_W[16].IMUX_CLK_OPTINV[0]
HOSTREQ	in	CELL_W[17].IMUX_IMUX[9]
HOSTOPCODE[0]	in	CELL_W[17].IMUX_IMUX[7]
HOSTOPCODE[1]	in	CELL_W[17].IMUX_IMUX[6]
HOSTEMAC1SEL	in	CELL_W[17].IMUX_IMUX[10]
HOSTMIIMSEL	in	CELL_W[17].IMUX_IMUX[8]
HOSTADDR[0]	in	CELL_W[6].IMUX_IMUX[0]
HOSTADDR[1]	in	CELL_W[6].IMUX_IMUX[1]
HOSTADDR[2]	in	CELL_W[6].IMUX_IMUX[2]
HOSTADDR[3]	in	CELL_W[6].IMUX_IMUX[3]
HOSTADDR[4]	in	CELL_W[6].IMUX_IMUX[4]
HOSTADDR[5]	in	CELL_W[6].IMUX_IMUX[5]
HOSTADDR[6]	in	CELL_W[6].IMUX_IMUX[6]
HOSTADDR[7]	in	CELL_W[6].IMUX_IMUX[7]
HOSTADDR[8]	in	CELL_W[6].IMUX_IMUX[8]
HOSTADDR[9]	in	CELL_W[6].IMUX_IMUX[9]
HOSTWRDATA[0]	in	CELL_W[6].IMUX_IMUX[10]
HOSTWRDATA[1]	in	CELL_W[6].IMUX_IMUX[11]
HOSTWRDATA[2]	in	CELL_W[7].IMUX_IMUX[0]
HOSTWRDATA[3]	in	CELL_W[7].IMUX_IMUX[1]
HOSTWRDATA[4]	in	CELL_W[7].IMUX_IMUX[2]
HOSTWRDATA[5]	in	CELL_W[7].IMUX_IMUX[3]
HOSTWRDATA[6]	in	CELL_W[7].IMUX_IMUX[4]
HOSTWRDATA[7]	in	CELL_W[7].IMUX_IMUX[5]
HOSTWRDATA[8]	in	CELL_W[7].IMUX_IMUX[6]
HOSTWRDATA[9]	in	CELL_W[7].IMUX_IMUX[7]
HOSTWRDATA[10]	in	CELL_W[7].IMUX_IMUX[8]
HOSTWRDATA[11]	in	CELL_W[7].IMUX_IMUX[9]
HOSTWRDATA[12]	in	CELL_W[7].IMUX_IMUX[10]
HOSTWRDATA[13]	in	CELL_W[7].IMUX_IMUX[11]
HOSTWRDATA[14]	in	CELL_W[16].IMUX_IMUX[0]
HOSTWRDATA[15]	in	CELL_W[16].IMUX_IMUX[1]
HOSTWRDATA[16]	in	CELL_W[16].IMUX_IMUX[2]
HOSTWRDATA[17]	in	CELL_W[16].IMUX_IMUX[3]
HOSTWRDATA[18]	in	CELL_W[16].IMUX_IMUX[4]
HOSTWRDATA[19]	in	CELL_W[16].IMUX_IMUX[5]
HOSTWRDATA[20]	in	CELL_W[16].IMUX_IMUX[6]
HOSTWRDATA[21]	in	CELL_W[16].IMUX_IMUX[7]
HOSTWRDATA[22]	in	CELL_W[16].IMUX_IMUX[8]
HOSTWRDATA[23]	in	CELL_W[16].IMUX_IMUX[9]
HOSTWRDATA[24]	in	CELL_W[16].IMUX_IMUX[10]
HOSTWRDATA[25]	in	CELL_W[16].IMUX_IMUX[11]
HOSTWRDATA[26]	in	CELL_W[17].IMUX_IMUX[0]
HOSTWRDATA[27]	in	CELL_W[17].IMUX_IMUX[1]
HOSTWRDATA[28]	in	CELL_W[17].IMUX_IMUX[2]
HOSTWRDATA[29]	in	CELL_W[17].IMUX_IMUX[3]
HOSTWRDATA[30]	in	CELL_W[17].IMUX_IMUX[4]
HOSTWRDATA[31]	in	CELL_W[17].IMUX_IMUX[5]
CLIENTEMAC0DCMLOCKED	in	CELL_W[10].IMUX_IMUX[4]
CLIENTEMAC0PAUSEREQ	in	CELL_W[1].IMUX_IMUX[11]
CLIENTEMAC0PAUSEVAL[0]	in	CELL_W[4].IMUX_IMUX[8]
CLIENTEMAC0PAUSEVAL[1]	in	CELL_W[4].IMUX_IMUX[9]
CLIENTEMAC0PAUSEVAL[2]	in	CELL_W[4].IMUX_IMUX[10]
CLIENTEMAC0PAUSEVAL[3]	in	CELL_W[4].IMUX_IMUX[11]
CLIENTEMAC0PAUSEVAL[4]	in	CELL_W[5].IMUX_IMUX[8]
CLIENTEMAC0PAUSEVAL[5]	in	CELL_W[5].IMUX_IMUX[9]
CLIENTEMAC0PAUSEVAL[6]	in	CELL_W[5].IMUX_IMUX[10]
CLIENTEMAC0PAUSEVAL[7]	in	CELL_W[5].IMUX_IMUX[11]
CLIENTEMAC0PAUSEVAL[8]	in	CELL_W[8].IMUX_IMUX[4]
CLIENTEMAC0PAUSEVAL[9]	in	CELL_W[8].IMUX_IMUX[5]
CLIENTEMAC0PAUSEVAL[10]	in	CELL_W[8].IMUX_IMUX[6]
CLIENTEMAC0PAUSEVAL[11]	in	CELL_W[8].IMUX_IMUX[7]
CLIENTEMAC0PAUSEVAL[12]	in	CELL_W[7].IMUX_IMUX[12]
CLIENTEMAC0PAUSEVAL[13]	in	CELL_W[7].IMUX_IMUX[13]
CLIENTEMAC0PAUSEVAL[14]	in	CELL_W[7].IMUX_IMUX[14]
CLIENTEMAC0PAUSEVAL[15]	in	CELL_W[7].IMUX_IMUX[15]
CLIENTEMAC0RXCLIENTCLKIN	in	~CELL_W[10].IMUX_CLK_OPTINV[0]
CLIENTEMAC0TXCLIENTCLKIN	in	~CELL_W[12].IMUX_CLK_OPTINV[0]
CLIENTEMAC0TXD[0]	in	CELL_W[2].IMUX_IMUX[8]
CLIENTEMAC0TXD[1]	in	CELL_W[2].IMUX_IMUX[9]
CLIENTEMAC0TXD[2]	in	CELL_W[2].IMUX_IMUX[10]
CLIENTEMAC0TXD[3]	in	CELL_W[2].IMUX_IMUX[11]
CLIENTEMAC0TXD[4]	in	CELL_W[3].IMUX_IMUX[5]
CLIENTEMAC0TXD[5]	in	CELL_W[3].IMUX_IMUX[6]
CLIENTEMAC0TXD[6]	in	CELL_W[3].IMUX_IMUX[7]
CLIENTEMAC0TXD[7]	in	CELL_W[3].IMUX_IMUX[8]
CLIENTEMAC0TXD[8]	in	CELL_W[4].IMUX_IMUX[0]
CLIENTEMAC0TXD[9]	in	CELL_W[4].IMUX_IMUX[1]
CLIENTEMAC0TXD[10]	in	CELL_W[4].IMUX_IMUX[2]
CLIENTEMAC0TXD[11]	in	CELL_W[4].IMUX_IMUX[3]
CLIENTEMAC0TXD[12]	in	CELL_W[5].IMUX_IMUX[0]
CLIENTEMAC0TXD[13]	in	CELL_W[5].IMUX_IMUX[1]
CLIENTEMAC0TXD[14]	in	CELL_W[5].IMUX_IMUX[2]
CLIENTEMAC0TXD[15]	in	CELL_W[5].IMUX_IMUX[3]
CLIENTEMAC0TXDVLD	in	CELL_W[1].IMUX_IMUX[12]
CLIENTEMAC0TXDVLDMSW	in	CELL_W[1].IMUX_IMUX[13]
CLIENTEMAC0TXFIRSTBYTE	in	CELL_W[3].IMUX_IMUX[0]
CLIENTEMAC0TXGMIIMIICLKIN	in	~CELL_W[11].IMUX_CLK_OPTINV[0]
CLIENTEMAC0TXIFGDELAY[0]	in	CELL_W[4].IMUX_IMUX[4]
CLIENTEMAC0TXIFGDELAY[1]	in	CELL_W[4].IMUX_IMUX[5]
CLIENTEMAC0TXIFGDELAY[2]	in	CELL_W[4].IMUX_IMUX[6]
CLIENTEMAC0TXIFGDELAY[3]	in	CELL_W[4].IMUX_IMUX[7]
CLIENTEMAC0TXIFGDELAY[4]	in	CELL_W[5].IMUX_IMUX[4]
CLIENTEMAC0TXIFGDELAY[5]	in	CELL_W[5].IMUX_IMUX[5]
CLIENTEMAC0TXIFGDELAY[6]	in	CELL_W[5].IMUX_IMUX[6]
CLIENTEMAC0TXIFGDELAY[7]	in	CELL_W[5].IMUX_IMUX[7]
CLIENTEMAC0TXUNDERRUN	in	CELL_W[1].IMUX_IMUX[10]
EMAC0TIBUS[0]	in	~CELL_W[6].IMUX_CLK_OPTINV[0]
EMAC0TIBUS[1]	in	~CELL_W[8].IMUX_CLK_OPTINV[0]
EMAC0TIBUS[2]	in	CELL_W[1].IMUX_IMUX[9]
EMAC0TIBUS[3]	in	CELL_W[1].IMUX_IMUX[8]
EMAC0TIBUS[4]	in	CELL_W[4].IMUX_IMUX[15]
PHYEMAC0COL	in	CELL_W[0].IMUX_IMUX[5]
PHYEMAC0CRS	in	CELL_W[0].IMUX_IMUX[4]
PHYEMAC0GTXCLK	in	~CELL_W[15].IMUX_CLK_OPTINV[0]
PHYEMAC0MCLKIN	in	~CELL_W[9].IMUX_CLK_OPTINV[0]
PHYEMAC0MDIN	in	CELL_W[3].IMUX_IMUX[4]
PHYEMAC0MIITXCLK	in	~CELL_W[13].IMUX_CLK_OPTINV[0]
PHYEMAC0PHYAD[0]	in	CELL_W[1].IMUX_IMUX[14]
PHYEMAC0PHYAD[1]	in	CELL_W[1].IMUX_IMUX[15]
PHYEMAC0PHYAD[2]	in	CELL_W[0].IMUX_IMUX[6]
PHYEMAC0PHYAD[3]	in	CELL_W[0].IMUX_IMUX[7]
PHYEMAC0PHYAD[4]	in	CELL_W[0].IMUX_IMUX[8]
PHYEMAC0RXBUFERR	in	CELL_W[8].IMUX_IMUX[10]
PHYEMAC0RXBUFSTATUS[0]	in	CELL_W[2].IMUX_IMUX[6]
PHYEMAC0RXBUFSTATUS[1]	in	CELL_W[2].IMUX_IMUX[7]
PHYEMAC0RXCHARISCOMMA	in	CELL_W[2].IMUX_IMUX[3]
PHYEMAC0RXCHARISK	in	CELL_W[2].IMUX_IMUX[2]
PHYEMAC0RXCHECKINGCRC	in	CELL_W[1].IMUX_IMUX[7]
PHYEMAC0RXCLK	in	~CELL_W[14].IMUX_CLK_OPTINV[0]
PHYEMAC0RXCLKCORCNT[0]	in	CELL_W[3].IMUX_IMUX[1]
PHYEMAC0RXCLKCORCNT[1]	in	CELL_W[8].IMUX_IMUX[8]
PHYEMAC0RXCLKCORCNT[2]	in	CELL_W[8].IMUX_IMUX[9]
PHYEMAC0RXCOMMADET	in	CELL_W[1].IMUX_IMUX[6]
PHYEMAC0RXD[0]	in	CELL_W[0].IMUX_IMUX[0]
PHYEMAC0RXD[1]	in	CELL_W[0].IMUX_IMUX[1]
PHYEMAC0RXD[2]	in	CELL_W[0].IMUX_IMUX[2]
PHYEMAC0RXD[3]	in	CELL_W[0].IMUX_IMUX[3]
PHYEMAC0RXD[4]	in	CELL_W[1].IMUX_IMUX[0]
PHYEMAC0RXD[5]	in	CELL_W[1].IMUX_IMUX[1]
PHYEMAC0RXD[6]	in	CELL_W[1].IMUX_IMUX[2]
PHYEMAC0RXD[7]	in	CELL_W[1].IMUX_IMUX[3]
PHYEMAC0RXDISPERR	in	CELL_W[2].IMUX_IMUX[1]
PHYEMAC0RXDV	in	CELL_W[1].IMUX_IMUX[4]
PHYEMAC0RXER	in	CELL_W[1].IMUX_IMUX[5]
PHYEMAC0RXLOSSOFSYNC[0]	in	CELL_W[2].IMUX_IMUX[4]
PHYEMAC0RXLOSSOFSYNC[1]	in	CELL_W[2].IMUX_IMUX[5]
PHYEMAC0RXNOTINTABLE	in	CELL_W[2].IMUX_IMUX[0]
PHYEMAC0RXRUNDISP	in	CELL_W[3].IMUX_IMUX[2]
PHYEMAC0SIGNALDET	in	CELL_W[2].IMUX_IMUX[15]
PHYEMAC0TXBUFERR	in	CELL_W[3].IMUX_IMUX[3]
TIEEMAC0CONFIGVEC[0]	in	CELL_W[0].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[1]	in	CELL_W[0].IMUX_IMUX[13]
TIEEMAC0CONFIGVEC[2]	in	CELL_W[0].IMUX_IMUX[14]
TIEEMAC0CONFIGVEC[3]	in	CELL_W[0].IMUX_IMUX[15]
TIEEMAC0CONFIGVEC[4]	in	~CELL_W[0].IMUX_CE_OPTINV[0]
TIEEMAC0CONFIGVEC[5]	in	~CELL_W[0].IMUX_CE_OPTINV[1]
TIEEMAC0CONFIGVEC[6]	in	~CELL_W[0].IMUX_CE_OPTINV[2]
TIEEMAC0CONFIGVEC[7]	in	~CELL_W[0].IMUX_CE_OPTINV[3]
TIEEMAC0CONFIGVEC[8]	in	~CELL_W[0].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[9]	in	~CELL_W[0].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[10]	in	~CELL_W[0].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[11]	in	~CELL_W[0].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[12]	in	CELL_W[5].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[13]	in	CELL_W[5].IMUX_IMUX[13]
TIEEMAC0CONFIGVEC[14]	in	CELL_W[5].IMUX_IMUX[14]
TIEEMAC0CONFIGVEC[15]	in	CELL_W[5].IMUX_IMUX[15]
TIEEMAC0CONFIGVEC[16]	in	CELL_W[6].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[17]	in	CELL_W[6].IMUX_IMUX[13]
TIEEMAC0CONFIGVEC[18]	in	CELL_W[6].IMUX_IMUX[14]
TIEEMAC0CONFIGVEC[19]	in	CELL_W[6].IMUX_IMUX[15]
TIEEMAC0CONFIGVEC[20]	in	~CELL_S[0].IMUX_CE_OPTINV[0]
TIEEMAC0CONFIGVEC[21]	in	~CELL_S[0].IMUX_CE_OPTINV[1]
TIEEMAC0CONFIGVEC[22]	in	~CELL_S[0].IMUX_CE_OPTINV[2]
TIEEMAC0CONFIGVEC[23]	in	~CELL_S[0].IMUX_CE_OPTINV[3]
TIEEMAC0CONFIGVEC[24]	in	~CELL_S[0].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[25]	in	~CELL_S[0].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[26]	in	~CELL_S[0].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[27]	in	~CELL_S[0].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[28]	in	~CELL_S[1].IMUX_CE_OPTINV[0]
TIEEMAC0CONFIGVEC[29]	in	~CELL_S[1].IMUX_CE_OPTINV[1]
TIEEMAC0CONFIGVEC[30]	in	~CELL_S[1].IMUX_CE_OPTINV[2]
TIEEMAC0CONFIGVEC[31]	in	~CELL_S[1].IMUX_CE_OPTINV[3]
TIEEMAC0CONFIGVEC[32]	in	~CELL_S[1].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[33]	in	~CELL_S[1].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[34]	in	~CELL_S[1].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[35]	in	~CELL_S[1].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[36]	in	~CELL_S[2].IMUX_CE_OPTINV[3]
TIEEMAC0CONFIGVEC[37]	in	~CELL_S[2].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[38]	in	~CELL_S[2].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[39]	in	~CELL_S[2].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[40]	in	~CELL_S[2].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[41]	in	~CELL_S[3].IMUX_CE_OPTINV[0]
TIEEMAC0CONFIGVEC[42]	in	~CELL_S[3].IMUX_CE_OPTINV[1]
TIEEMAC0CONFIGVEC[43]	in	~CELL_S[3].IMUX_CE_OPTINV[2]
TIEEMAC0CONFIGVEC[44]	in	~CELL_S[3].IMUX_CE_OPTINV[3]
TIEEMAC0CONFIGVEC[45]	in	~CELL_S[3].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[46]	in	~CELL_S[3].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[47]	in	~CELL_S[3].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[48]	in	~CELL_S[3].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[49]	in	~CELL_W[8].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[50]	in	~CELL_W[8].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[51]	in	~CELL_W[8].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[52]	in	~CELL_W[8].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[53]	in	~CELL_W[9].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[54]	in	~CELL_W[9].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[55]	in	~CELL_W[9].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[56]	in	~CELL_W[9].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[57]	in	~CELL_W[10].IMUX_SR_OPTINV[0]
TIEEMAC0CONFIGVEC[58]	in	~CELL_W[10].IMUX_SR_OPTINV[1]
TIEEMAC0CONFIGVEC[59]	in	~CELL_W[10].IMUX_SR_OPTINV[2]
TIEEMAC0CONFIGVEC[60]	in	~CELL_W[10].IMUX_SR_OPTINV[3]
TIEEMAC0CONFIGVEC[61]	in	CELL_W[10].IMUX_IMUX[8]
TIEEMAC0CONFIGVEC[62]	in	CELL_W[10].IMUX_IMUX[9]
TIEEMAC0CONFIGVEC[63]	in	~CELL_W[7].IMUX_CE_OPTINV[2]
TIEEMAC0CONFIGVEC[64]	in	CELL_W[3].IMUX_IMUX[9]
TIEEMAC0CONFIGVEC[65]	in	CELL_W[3].IMUX_IMUX[10]
TIEEMAC0CONFIGVEC[66]	in	CELL_W[3].IMUX_IMUX[11]
TIEEMAC0CONFIGVEC[67]	in	CELL_W[3].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[68]	in	CELL_W[3].IMUX_IMUX[13]
TIEEMAC0CONFIGVEC[69]	in	CELL_W[3].IMUX_IMUX[14]
TIEEMAC0CONFIGVEC[70]	in	CELL_W[4].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[71]	in	CELL_W[4].IMUX_IMUX[13]
TIEEMAC0CONFIGVEC[72]	in	CELL_W[4].IMUX_IMUX[14]
TIEEMAC0CONFIGVEC[73]	in	CELL_W[9].IMUX_IMUX[9]
TIEEMAC0CONFIGVEC[74]	in	CELL_W[9].IMUX_IMUX[10]
TIEEMAC0CONFIGVEC[75]	in	CELL_W[9].IMUX_IMUX[11]
TIEEMAC0CONFIGVEC[76]	in	CELL_W[9].IMUX_IMUX[12]
TIEEMAC0CONFIGVEC[77]	in	CELL_W[10].IMUX_IMUX[5]
TIEEMAC0CONFIGVEC[78]	in	CELL_W[10].IMUX_IMUX[6]
TIEEMAC0CONFIGVEC[79]	in	CELL_W[10].IMUX_IMUX[7]
TIEEMAC0UNICASTADDR[0]	in	~CELL_W[6].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[1]	in	~CELL_W[6].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[2]	in	~CELL_W[6].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[3]	in	~CELL_W[5].IMUX_CE_OPTINV[0]
TIEEMAC0UNICASTADDR[4]	in	~CELL_W[5].IMUX_CE_OPTINV[1]
TIEEMAC0UNICASTADDR[5]	in	~CELL_W[5].IMUX_CE_OPTINV[2]
TIEEMAC0UNICASTADDR[6]	in	~CELL_W[5].IMUX_CE_OPTINV[3]
TIEEMAC0UNICASTADDR[7]	in	~CELL_W[5].IMUX_SR_OPTINV[0]
TIEEMAC0UNICASTADDR[8]	in	~CELL_W[5].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[9]	in	~CELL_W[5].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[10]	in	~CELL_W[5].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[11]	in	~CELL_W[4].IMUX_CE_OPTINV[0]
TIEEMAC0UNICASTADDR[12]	in	~CELL_W[4].IMUX_CE_OPTINV[1]
TIEEMAC0UNICASTADDR[13]	in	~CELL_W[4].IMUX_CE_OPTINV[2]
TIEEMAC0UNICASTADDR[14]	in	~CELL_W[4].IMUX_CE_OPTINV[3]
TIEEMAC0UNICASTADDR[15]	in	~CELL_W[4].IMUX_SR_OPTINV[0]
TIEEMAC0UNICASTADDR[16]	in	~CELL_W[4].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[17]	in	~CELL_W[4].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[18]	in	~CELL_W[4].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[19]	in	CELL_W[2].IMUX_IMUX[13]
TIEEMAC0UNICASTADDR[20]	in	~CELL_W[3].IMUX_CE_OPTINV[0]
TIEEMAC0UNICASTADDR[21]	in	~CELL_W[3].IMUX_CE_OPTINV[1]
TIEEMAC0UNICASTADDR[22]	in	~CELL_W[3].IMUX_CE_OPTINV[2]
TIEEMAC0UNICASTADDR[23]	in	~CELL_W[3].IMUX_CE_OPTINV[3]
TIEEMAC0UNICASTADDR[24]	in	~CELL_W[3].IMUX_SR_OPTINV[0]
TIEEMAC0UNICASTADDR[25]	in	~CELL_W[3].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[26]	in	~CELL_W[3].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[27]	in	~CELL_W[3].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[28]	in	CELL_W[2].IMUX_IMUX[12]
TIEEMAC0UNICASTADDR[29]	in	~CELL_W[2].IMUX_CE_OPTINV[0]
TIEEMAC0UNICASTADDR[30]	in	~CELL_W[2].IMUX_CE_OPTINV[1]
TIEEMAC0UNICASTADDR[31]	in	~CELL_W[2].IMUX_CE_OPTINV[2]
TIEEMAC0UNICASTADDR[32]	in	~CELL_W[2].IMUX_CE_OPTINV[3]
TIEEMAC0UNICASTADDR[33]	in	~CELL_W[2].IMUX_SR_OPTINV[0]
TIEEMAC0UNICASTADDR[34]	in	~CELL_W[2].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[35]	in	~CELL_W[2].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[36]	in	~CELL_W[2].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[37]	in	~CELL_W[1].IMUX_CE_OPTINV[0]
TIEEMAC0UNICASTADDR[38]	in	~CELL_W[1].IMUX_CE_OPTINV[1]
TIEEMAC0UNICASTADDR[39]	in	~CELL_W[1].IMUX_CE_OPTINV[2]
TIEEMAC0UNICASTADDR[40]	in	~CELL_W[1].IMUX_CE_OPTINV[3]
TIEEMAC0UNICASTADDR[41]	in	~CELL_W[1].IMUX_SR_OPTINV[0]
TIEEMAC0UNICASTADDR[42]	in	~CELL_W[1].IMUX_SR_OPTINV[1]
TIEEMAC0UNICASTADDR[43]	in	~CELL_W[1].IMUX_SR_OPTINV[2]
TIEEMAC0UNICASTADDR[44]	in	~CELL_W[1].IMUX_SR_OPTINV[3]
TIEEMAC0UNICASTADDR[45]	in	CELL_W[0].IMUX_IMUX[9]
TIEEMAC0UNICASTADDR[46]	in	CELL_W[0].IMUX_IMUX[10]
TIEEMAC0UNICASTADDR[47]	in	CELL_W[0].IMUX_IMUX[11]
CLIENTEMAC1DCMLOCKED	in	CELL_W[18].IMUX_IMUX[12]
CLIENTEMAC1PAUSEREQ	in	CELL_W[22].IMUX_IMUX[11]
CLIENTEMAC1PAUSEVAL[0]	in	CELL_W[19].IMUX_IMUX[8]
CLIENTEMAC1PAUSEVAL[1]	in	CELL_W[19].IMUX_IMUX[9]
CLIENTEMAC1PAUSEVAL[2]	in	CELL_W[19].IMUX_IMUX[10]
CLIENTEMAC1PAUSEVAL[3]	in	CELL_W[19].IMUX_IMUX[11]
CLIENTEMAC1PAUSEVAL[4]	in	CELL_W[18].IMUX_IMUX[8]
CLIENTEMAC1PAUSEVAL[5]	in	CELL_W[18].IMUX_IMUX[9]
CLIENTEMAC1PAUSEVAL[6]	in	CELL_W[18].IMUX_IMUX[10]
CLIENTEMAC1PAUSEVAL[7]	in	CELL_W[18].IMUX_IMUX[11]
CLIENTEMAC1PAUSEVAL[8]	in	CELL_W[17].IMUX_IMUX[11]
CLIENTEMAC1PAUSEVAL[9]	in	CELL_W[17].IMUX_IMUX[12]
CLIENTEMAC1PAUSEVAL[10]	in	CELL_W[17].IMUX_IMUX[13]
CLIENTEMAC1PAUSEVAL[11]	in	CELL_W[17].IMUX_IMUX[14]
CLIENTEMAC1PAUSEVAL[12]	in	CELL_W[16].IMUX_IMUX[12]
CLIENTEMAC1PAUSEVAL[13]	in	CELL_W[16].IMUX_IMUX[13]
CLIENTEMAC1PAUSEVAL[14]	in	CELL_W[16].IMUX_IMUX[14]
CLIENTEMAC1PAUSEVAL[15]	in	CELL_W[16].IMUX_IMUX[15]
CLIENTEMAC1RXCLIENTCLKIN	in	~CELL_W[20].IMUX_CLK_OPTINV[0]
CLIENTEMAC1TXCLIENTCLKIN	in	~CELL_W[22].IMUX_CLK_OPTINV[0]
CLIENTEMAC1TXD[0]	in	CELL_W[21].IMUX_IMUX[8]
CLIENTEMAC1TXD[1]	in	CELL_W[21].IMUX_IMUX[9]
CLIENTEMAC1TXD[2]	in	CELL_W[21].IMUX_IMUX[10]
CLIENTEMAC1TXD[3]	in	CELL_W[21].IMUX_IMUX[11]
CLIENTEMAC1TXD[4]	in	CELL_W[20].IMUX_IMUX[5]
CLIENTEMAC1TXD[5]	in	CELL_W[20].IMUX_IMUX[6]
CLIENTEMAC1TXD[6]	in	CELL_W[20].IMUX_IMUX[7]
CLIENTEMAC1TXD[7]	in	CELL_W[20].IMUX_IMUX[8]
CLIENTEMAC1TXD[8]	in	CELL_W[19].IMUX_IMUX[0]
CLIENTEMAC1TXD[9]	in	CELL_W[19].IMUX_IMUX[1]
CLIENTEMAC1TXD[10]	in	CELL_W[19].IMUX_IMUX[2]
CLIENTEMAC1TXD[11]	in	CELL_W[19].IMUX_IMUX[3]
CLIENTEMAC1TXD[12]	in	CELL_W[18].IMUX_IMUX[0]
CLIENTEMAC1TXD[13]	in	CELL_W[18].IMUX_IMUX[1]
CLIENTEMAC1TXD[14]	in	CELL_W[18].IMUX_IMUX[2]
CLIENTEMAC1TXD[15]	in	CELL_W[18].IMUX_IMUX[3]
CLIENTEMAC1TXDVLD	in	CELL_W[22].IMUX_IMUX[12]
CLIENTEMAC1TXDVLDMSW	in	CELL_W[22].IMUX_IMUX[13]
CLIENTEMAC1TXFIRSTBYTE	in	CELL_W[20].IMUX_IMUX[0]
CLIENTEMAC1TXGMIIMIICLKIN	in	~CELL_W[21].IMUX_CLK_OPTINV[0]
CLIENTEMAC1TXIFGDELAY[0]	in	CELL_W[19].IMUX_IMUX[4]
CLIENTEMAC1TXIFGDELAY[1]	in	CELL_W[19].IMUX_IMUX[5]
CLIENTEMAC1TXIFGDELAY[2]	in	CELL_W[19].IMUX_IMUX[6]
CLIENTEMAC1TXIFGDELAY[3]	in	CELL_W[19].IMUX_IMUX[7]
CLIENTEMAC1TXIFGDELAY[4]	in	CELL_W[18].IMUX_IMUX[4]
CLIENTEMAC1TXIFGDELAY[5]	in	CELL_W[18].IMUX_IMUX[5]
CLIENTEMAC1TXIFGDELAY[6]	in	CELL_W[18].IMUX_IMUX[6]
CLIENTEMAC1TXIFGDELAY[7]	in	CELL_W[18].IMUX_IMUX[7]
CLIENTEMAC1TXUNDERRUN	in	CELL_W[22].IMUX_IMUX[10]
EMAC1TIBUS[0]	in	~CELL_W[17].IMUX_CLK_OPTINV[0]
EMAC1TIBUS[1]	in	~CELL_W[18].IMUX_CLK_OPTINV[0]
EMAC1TIBUS[2]	in	CELL_W[22].IMUX_IMUX[9]
EMAC1TIBUS[3]	in	CELL_W[22].IMUX_IMUX[8]
EMAC1TIBUS[4]	in	CELL_W[15].IMUX_IMUX[15]
PHYEMAC1COL	in	CELL_W[23].IMUX_IMUX[5]
PHYEMAC1CRS	in	CELL_W[23].IMUX_IMUX[4]
PHYEMAC1GTXCLK	in	~CELL_N[2].IMUX_CLK_OPTINV[0]
PHYEMAC1MCLKIN	in	~CELL_W[19].IMUX_CLK_OPTINV[0]
PHYEMAC1MDIN	in	CELL_W[20].IMUX_IMUX[4]
PHYEMAC1MIITXCLK	in	~CELL_N[4].IMUX_CLK_OPTINV[0]
PHYEMAC1PHYAD[0]	in	CELL_W[22].IMUX_IMUX[15]
PHYEMAC1PHYAD[1]	in	CELL_W[22].IMUX_IMUX[14]
PHYEMAC1PHYAD[2]	in	CELL_W[23].IMUX_IMUX[14]
PHYEMAC1PHYAD[3]	in	CELL_W[23].IMUX_IMUX[13]
PHYEMAC1PHYAD[4]	in	CELL_W[23].IMUX_IMUX[12]
PHYEMAC1RXBUFERR	in	CELL_W[20].IMUX_IMUX[12]
PHYEMAC1RXBUFSTATUS[0]	in	CELL_W[21].IMUX_IMUX[4]
PHYEMAC1RXBUFSTATUS[1]	in	CELL_W[21].IMUX_IMUX[5]
PHYEMAC1RXCHARISCOMMA	in	CELL_W[21].IMUX_IMUX[3]
PHYEMAC1RXCHARISK	in	CELL_W[21].IMUX_IMUX[2]
PHYEMAC1RXCHECKINGCRC	in	CELL_W[22].IMUX_IMUX[7]
PHYEMAC1RXCLK	in	~CELL_N[3].IMUX_CLK_OPTINV[0]
PHYEMAC1RXCLKCORCNT[0]	in	CELL_W[20].IMUX_IMUX[1]
PHYEMAC1RXCLKCORCNT[1]	in	CELL_W[21].IMUX_IMUX[12]
PHYEMAC1RXCLKCORCNT[2]	in	CELL_W[21].IMUX_IMUX[13]
PHYEMAC1RXCOMMADET	in	CELL_W[22].IMUX_IMUX[6]
PHYEMAC1RXD[0]	in	CELL_W[23].IMUX_IMUX[0]
PHYEMAC1RXD[1]	in	CELL_W[23].IMUX_IMUX[1]
PHYEMAC1RXD[2]	in	CELL_W[23].IMUX_IMUX[2]
PHYEMAC1RXD[3]	in	CELL_W[23].IMUX_IMUX[3]
PHYEMAC1RXD[4]	in	CELL_W[22].IMUX_IMUX[0]
PHYEMAC1RXD[5]	in	CELL_W[22].IMUX_IMUX[1]
PHYEMAC1RXD[6]	in	CELL_W[22].IMUX_IMUX[2]
PHYEMAC1RXD[7]	in	CELL_W[22].IMUX_IMUX[3]
PHYEMAC1RXDISPERR	in	CELL_W[21].IMUX_IMUX[1]
PHYEMAC1RXDV	in	CELL_W[22].IMUX_IMUX[4]
PHYEMAC1RXER	in	CELL_W[22].IMUX_IMUX[5]
PHYEMAC1RXLOSSOFSYNC[0]	in	CELL_W[21].IMUX_IMUX[6]
PHYEMAC1RXLOSSOFSYNC[1]	in	CELL_W[21].IMUX_IMUX[7]
PHYEMAC1RXNOTINTABLE	in	CELL_W[21].IMUX_IMUX[0]
PHYEMAC1RXRUNDISP	in	CELL_W[20].IMUX_IMUX[2]
PHYEMAC1SIGNALDET	in	CELL_W[19].IMUX_IMUX[12]
PHYEMAC1TXBUFERR	in	CELL_W[20].IMUX_IMUX[3]
TIEEMAC1CONFIGVEC[0]	in	~CELL_W[21].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[1]	in	~CELL_W[21].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[2]	in	~CELL_W[21].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[3]	in	~CELL_W[21].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[4]	in	~CELL_W[22].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[5]	in	~CELL_W[22].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[6]	in	~CELL_W[22].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[7]	in	~CELL_W[22].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[8]	in	~CELL_W[22].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[9]	in	~CELL_W[22].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[10]	in	~CELL_W[22].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[11]	in	~CELL_W[22].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[12]	in	~CELL_W[23].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[13]	in	~CELL_W[23].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[14]	in	~CELL_W[23].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[15]	in	~CELL_W[23].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[16]	in	~CELL_W[23].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[17]	in	~CELL_W[23].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[18]	in	~CELL_W[23].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[19]	in	~CELL_W[23].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[20]	in	CELL_W[23].IMUX_IMUX[11]
TIEEMAC1CONFIGVEC[21]	in	CELL_W[23].IMUX_IMUX[10]
TIEEMAC1CONFIGVEC[22]	in	CELL_W[23].IMUX_IMUX[9]
TIEEMAC1CONFIGVEC[23]	in	CELL_W[23].IMUX_IMUX[8]
TIEEMAC1CONFIGVEC[24]	in	CELL_W[23].IMUX_IMUX[7]
TIEEMAC1CONFIGVEC[25]	in	CELL_W[23].IMUX_IMUX[6]
TIEEMAC1CONFIGVEC[26]	in	~CELL_N[4].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[27]	in	~CELL_N[4].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[28]	in	~CELL_N[4].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[29]	in	~CELL_N[4].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[30]	in	~CELL_N[4].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[31]	in	~CELL_N[4].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[32]	in	~CELL_N[4].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[33]	in	~CELL_N[4].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[34]	in	~CELL_N[5].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[35]	in	~CELL_N[5].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[36]	in	~CELL_N[5].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[37]	in	~CELL_N[5].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[38]	in	~CELL_N[5].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[39]	in	~CELL_N[5].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[40]	in	~CELL_N[5].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[41]	in	~CELL_N[5].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[42]	in	~CELL_N[6].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[43]	in	~CELL_N[6].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[44]	in	~CELL_N[6].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[45]	in	~CELL_N[6].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[46]	in	~CELL_N[6].IMUX_CE_OPTINV[3]
TIEEMAC1CONFIGVEC[47]	in	~CELL_N[6].IMUX_CE_OPTINV[2]
TIEEMAC1CONFIGVEC[48]	in	~CELL_N[6].IMUX_CE_OPTINV[1]
TIEEMAC1CONFIGVEC[49]	in	~CELL_N[6].IMUX_CE_OPTINV[0]
TIEEMAC1CONFIGVEC[50]	in	~CELL_W[15].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[51]	in	~CELL_W[15].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[52]	in	~CELL_W[15].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[53]	in	~CELL_W[13].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[54]	in	~CELL_W[13].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[55]	in	~CELL_W[13].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[56]	in	~CELL_W[13].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[57]	in	~CELL_W[12].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[58]	in	~CELL_W[12].IMUX_SR_OPTINV[2]
TIEEMAC1CONFIGVEC[59]	in	~CELL_W[12].IMUX_SR_OPTINV[1]
TIEEMAC1CONFIGVEC[60]	in	~CELL_W[12].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[61]	in	~CELL_W[11].IMUX_SR_OPTINV[3]
TIEEMAC1CONFIGVEC[62]	in	CELL_W[12].IMUX_IMUX[4]
TIEEMAC1CONFIGVEC[63]	in	~CELL_W[15].IMUX_SR_OPTINV[0]
TIEEMAC1CONFIGVEC[64]	in	CELL_W[15].IMUX_IMUX[6]
TIEEMAC1CONFIGVEC[65]	in	CELL_W[15].IMUX_IMUX[7]
TIEEMAC1CONFIGVEC[66]	in	CELL_W[15].IMUX_IMUX[8]
TIEEMAC1CONFIGVEC[67]	in	CELL_W[15].IMUX_IMUX[9]
TIEEMAC1CONFIGVEC[68]	in	CELL_W[15].IMUX_IMUX[10]
TIEEMAC1CONFIGVEC[69]	in	CELL_W[15].IMUX_IMUX[11]
TIEEMAC1CONFIGVEC[70]	in	CELL_W[15].IMUX_IMUX[12]
TIEEMAC1CONFIGVEC[71]	in	CELL_W[15].IMUX_IMUX[13]
TIEEMAC1CONFIGVEC[72]	in	CELL_W[15].IMUX_IMUX[14]
TIEEMAC1CONFIGVEC[73]	in	CELL_W[13].IMUX_IMUX[4]
TIEEMAC1CONFIGVEC[74]	in	CELL_W[13].IMUX_IMUX[5]
TIEEMAC1CONFIGVEC[75]	in	CELL_W[13].IMUX_IMUX[6]
TIEEMAC1CONFIGVEC[76]	in	CELL_W[13].IMUX_IMUX[7]
TIEEMAC1CONFIGVEC[77]	in	CELL_W[20].IMUX_IMUX[9]
TIEEMAC1CONFIGVEC[78]	in	CELL_W[20].IMUX_IMUX[10]
TIEEMAC1CONFIGVEC[79]	in	CELL_W[20].IMUX_IMUX[11]
TIEEMAC1UNICASTADDR[0]	in	~CELL_W[7].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[1]	in	~CELL_W[7].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[2]	in	~CELL_W[7].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[3]	in	~CELL_W[7].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[4]	in	~CELL_W[16].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[5]	in	~CELL_W[16].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[6]	in	~CELL_W[16].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[7]	in	~CELL_W[16].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[8]	in	~CELL_W[16].IMUX_CE_OPTINV[3]
TIEEMAC1UNICASTADDR[9]	in	~CELL_W[16].IMUX_CE_OPTINV[2]
TIEEMAC1UNICASTADDR[10]	in	~CELL_W[16].IMUX_CE_OPTINV[1]
TIEEMAC1UNICASTADDR[11]	in	~CELL_W[16].IMUX_CE_OPTINV[0]
TIEEMAC1UNICASTADDR[12]	in	~CELL_W[17].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[13]	in	~CELL_W[17].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[14]	in	~CELL_W[17].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[15]	in	~CELL_W[17].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[16]	in	~CELL_W[17].IMUX_CE_OPTINV[3]
TIEEMAC1UNICASTADDR[17]	in	~CELL_W[17].IMUX_CE_OPTINV[2]
TIEEMAC1UNICASTADDR[18]	in	~CELL_W[17].IMUX_CE_OPTINV[1]
TIEEMAC1UNICASTADDR[19]	in	~CELL_W[17].IMUX_CE_OPTINV[0]
TIEEMAC1UNICASTADDR[20]	in	~CELL_W[18].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[21]	in	~CELL_W[18].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[22]	in	~CELL_W[18].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[23]	in	~CELL_W[18].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[24]	in	~CELL_W[18].IMUX_CE_OPTINV[3]
TIEEMAC1UNICASTADDR[25]	in	~CELL_W[18].IMUX_CE_OPTINV[2]
TIEEMAC1UNICASTADDR[26]	in	~CELL_W[18].IMUX_CE_OPTINV[1]
TIEEMAC1UNICASTADDR[27]	in	~CELL_W[18].IMUX_CE_OPTINV[0]
TIEEMAC1UNICASTADDR[28]	in	~CELL_W[19].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[29]	in	~CELL_W[19].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[30]	in	~CELL_W[19].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[31]	in	~CELL_W[19].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[32]	in	~CELL_W[19].IMUX_CE_OPTINV[3]
TIEEMAC1UNICASTADDR[33]	in	~CELL_W[19].IMUX_CE_OPTINV[2]
TIEEMAC1UNICASTADDR[34]	in	~CELL_W[19].IMUX_CE_OPTINV[1]
TIEEMAC1UNICASTADDR[35]	in	~CELL_W[19].IMUX_CE_OPTINV[0]
TIEEMAC1UNICASTADDR[36]	in	~CELL_W[20].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[37]	in	~CELL_W[20].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[38]	in	~CELL_W[20].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[39]	in	~CELL_W[20].IMUX_SR_OPTINV[0]
TIEEMAC1UNICASTADDR[40]	in	~CELL_W[20].IMUX_CE_OPTINV[3]
TIEEMAC1UNICASTADDR[41]	in	~CELL_W[20].IMUX_CE_OPTINV[2]
TIEEMAC1UNICASTADDR[42]	in	~CELL_W[20].IMUX_CE_OPTINV[1]
TIEEMAC1UNICASTADDR[43]	in	~CELL_W[20].IMUX_CE_OPTINV[0]
TIEEMAC1UNICASTADDR[44]	in	~CELL_W[21].IMUX_SR_OPTINV[3]
TIEEMAC1UNICASTADDR[45]	in	~CELL_W[21].IMUX_SR_OPTINV[2]
TIEEMAC1UNICASTADDR[46]	in	~CELL_W[21].IMUX_SR_OPTINV[1]
TIEEMAC1UNICASTADDR[47]	in	~CELL_W[21].IMUX_SR_OPTINV[0]
TSTSIEMACI[0]	in	CELL_W[18].IMUX_IMUX[13]
TSTSIEMACI[1]	in	CELL_W[18].IMUX_IMUX[14]
TSTSIEMACI[2]	in	CELL_W[19].IMUX_IMUX[13]
TSTSIEMACI[3]	in	CELL_W[19].IMUX_IMUX[14]
TSTSIEMACI[4]	in	CELL_W[21].IMUX_IMUX[14]
TSTSIEMACI[5]	in	CELL_W[23].IMUX_IMUX[15]
TSTSIEMACI[6]	in	CELL_W[10].IMUX_IMUX[10]
DCRHOSTDONEIR	out	CELL_W[23].OUT_BEST_TMIN[7]
HOSTMIIMRDY	out	CELL_W[2].OUT_BEST_TMIN[6]
HOSTRDDATA[0]	out	CELL_W[6].OUT_BEST_TMIN[0]
HOSTRDDATA[1]	out	CELL_W[6].OUT_BEST_TMIN[1]
HOSTRDDATA[2]	out	CELL_W[6].OUT_BEST_TMIN[2]
HOSTRDDATA[3]	out	CELL_W[6].OUT_BEST_TMIN[7]
HOSTRDDATA[4]	out	CELL_W[6].OUT_SEC_TMIN[0]
HOSTRDDATA[5]	out	CELL_W[6].OUT_SEC_TMIN[1]
HOSTRDDATA[6]	out	CELL_W[6].OUT_SEC_TMIN[2]
HOSTRDDATA[7]	out	CELL_W[6].OUT_SEC_TMIN[3]
HOSTRDDATA[8]	out	CELL_W[7].OUT_BEST_TMIN[0]
HOSTRDDATA[9]	out	CELL_W[7].OUT_BEST_TMIN[1]
HOSTRDDATA[10]	out	CELL_W[7].OUT_BEST_TMIN[2]
HOSTRDDATA[11]	out	CELL_W[7].OUT_BEST_TMIN[3]
HOSTRDDATA[12]	out	CELL_W[7].OUT_SEC_TMIN[0]
HOSTRDDATA[13]	out	CELL_W[7].OUT_SEC_TMIN[1]
HOSTRDDATA[14]	out	CELL_W[7].OUT_SEC_TMIN[2]
HOSTRDDATA[15]	out	CELL_W[7].OUT_SEC_TMIN[3]
HOSTRDDATA[16]	out	CELL_W[16].OUT_BEST_TMIN[0]
HOSTRDDATA[17]	out	CELL_W[16].OUT_BEST_TMIN[1]
HOSTRDDATA[18]	out	CELL_W[16].OUT_BEST_TMIN[2]
HOSTRDDATA[19]	out	CELL_W[16].OUT_BEST_TMIN[3]
HOSTRDDATA[20]	out	CELL_W[16].OUT_SEC_TMIN[0]
HOSTRDDATA[21]	out	CELL_W[16].OUT_SEC_TMIN[1]
HOSTRDDATA[22]	out	CELL_W[16].OUT_SEC_TMIN[2]
HOSTRDDATA[23]	out	CELL_W[16].OUT_SEC_TMIN[3]
HOSTRDDATA[24]	out	CELL_W[17].OUT_BEST_TMIN[0]
HOSTRDDATA[25]	out	CELL_W[17].OUT_BEST_TMIN[1]
HOSTRDDATA[26]	out	CELL_W[17].OUT_BEST_TMIN[2]
HOSTRDDATA[27]	out	CELL_W[17].OUT_BEST_TMIN[3]
HOSTRDDATA[28]	out	CELL_W[17].OUT_SEC_TMIN[0]
HOSTRDDATA[29]	out	CELL_W[17].OUT_SEC_TMIN[1]
HOSTRDDATA[30]	out	CELL_W[17].OUT_SEC_TMIN[2]
HOSTRDDATA[31]	out	CELL_W[17].OUT_SEC_TMIN[3]
EMAC0CLIENTANINTERRUPT	out	CELL_W[8].OUT_SEC_TMIN[4]
EMAC0CLIENTRXBADFRAME	out	CELL_W[3].OUT_BEST_TMIN[7]
EMAC0CLIENTRXCLIENTCLKOUT	out	CELL_W[3].OUT_BEST_TMIN[4]
EMAC0CLIENTRXD[0]	out	CELL_W[4].OUT_BEST_TMIN[0]
EMAC0CLIENTRXD[1]	out	CELL_W[4].OUT_BEST_TMIN[1]
EMAC0CLIENTRXD[2]	out	CELL_W[4].OUT_BEST_TMIN[2]
EMAC0CLIENTRXD[3]	out	CELL_W[4].OUT_BEST_TMIN[3]
EMAC0CLIENTRXD[4]	out	CELL_W[5].OUT_BEST_TMIN[4]
EMAC0CLIENTRXD[5]	out	CELL_W[5].OUT_BEST_TMIN[5]
EMAC0CLIENTRXD[6]	out	CELL_W[5].OUT_BEST_TMIN[6]
EMAC0CLIENTRXD[7]	out	CELL_W[5].OUT_BEST_TMIN[7]
EMAC0CLIENTRXD[8]	out	CELL_W[6].OUT_BEST_TMIN[3]
EMAC0CLIENTRXD[9]	out	CELL_W[6].OUT_BEST_TMIN[4]
EMAC0CLIENTRXD[10]	out	CELL_W[6].OUT_BEST_TMIN[5]
EMAC0CLIENTRXD[11]	out	CELL_W[6].OUT_BEST_TMIN[6]
EMAC0CLIENTRXD[12]	out	CELL_W[7].OUT_BEST_TMIN[4]
EMAC0CLIENTRXD[13]	out	CELL_W[7].OUT_BEST_TMIN[5]
EMAC0CLIENTRXD[14]	out	CELL_W[7].OUT_BEST_TMIN[6]
EMAC0CLIENTRXD[15]	out	CELL_W[7].OUT_BEST_TMIN[7]
EMAC0CLIENTRXDVLD	out	CELL_W[1].OUT_BEST_TMIN[6]
EMAC0CLIENTRXDVLDMSW	out	CELL_W[1].OUT_BEST_TMIN[5]
EMAC0CLIENTRXDVREG6	out	CELL_W[5].OUT_SEC_TMIN[4]
EMAC0CLIENTRXFRAMEDROP	out	CELL_W[3].OUT_BEST_TMIN[5]
EMAC0CLIENTRXGOODFRAME	out	CELL_W[3].OUT_BEST_TMIN[6]
EMAC0CLIENTRXSTATS[0]	out	CELL_W[1].OUT_SEC_TMIN[0]
EMAC0CLIENTRXSTATS[1]	out	CELL_W[1].OUT_SEC_TMIN[1]
EMAC0CLIENTRXSTATS[2]	out	CELL_W[1].OUT_SEC_TMIN[2]
EMAC0CLIENTRXSTATS[3]	out	CELL_W[2].OUT_BEST_TMIN[1]
EMAC0CLIENTRXSTATS[4]	out	CELL_W[4].OUT_BEST_TMIN[6]
EMAC0CLIENTRXSTATS[5]	out	CELL_W[4].OUT_BEST_TMIN[7]
EMAC0CLIENTRXSTATS[6]	out	CELL_W[4].OUT_BEST_TMIN[5]
EMAC0CLIENTRXSTATSBYTEVLD	out	CELL_W[2].OUT_BEST_TMIN[5]
EMAC0CLIENTRXSTATSVLD	out	CELL_W[1].OUT_BEST_TMIN[7]
EMAC0CLIENTTXACK	out	CELL_W[2].OUT_BEST_TMIN[2]
EMAC0CLIENTTXCLIENTCLKOUT	out	CELL_W[2].OUT_BEST_TMIN[0]
EMAC0CLIENTTXCOLLISION	out	CELL_W[2].OUT_BEST_TMIN[3]
EMAC0CLIENTTXRETRANSMIT	out	CELL_W[2].OUT_BEST_TMIN[4]
EMAC0CLIENTTXSTATS	out	CELL_W[4].OUT_BEST_TMIN[4]
EMAC0CLIENTTXSTATSBYTEVLD	out	CELL_W[0].OUT_SEC_TMIN[0]
EMAC0CLIENTTXSTATSVLD	out	CELL_W[0].OUT_BEST_TMIN[7]
EMAC0CLIENTTXGMIIMIICLKOUT	out	CELL_W[3].OUT_BEST_TMIN[2]
EMAC0PHYENCOMMAALIGN	out	CELL_W[9].OUT_SEC_TMIN[4]
EMAC0PHYLOOPBACKMSB	out	CELL_W[3].OUT_BEST_TMIN[3]
EMAC0PHYMCLKOUT	out	CELL_W[5].OUT_BEST_TMIN[1]
EMAC0PHYMDOUT	out	CELL_W[5].OUT_BEST_TMIN[3]
EMAC0PHYMDTRI	out	CELL_W[5].OUT_BEST_TMIN[2]
EMAC0PHYMGTRXRESET	out	CELL_W[0].OUT_SEC_TMIN[4]
EMAC0PHYMGTTXRESET	out	CELL_W[1].OUT_SEC_TMIN[3]
EMAC0PHYPOWERDOWN	out	CELL_W[10].OUT_SEC_TMIN[4]
EMAC0PHYSYNCACQSTATUS	out	CELL_W[5].OUT_BEST_TMIN[0]
EMAC0PHYTXCHARDISPMODE	out	CELL_W[3].OUT_BEST_TMIN[0]
EMAC0PHYTXCHARDISPVAL	out	CELL_W[3].OUT_BEST_TMIN[1]
EMAC0PHYTXCHARISK	out	CELL_W[1].OUT_BEST_TMIN[4]
EMAC0PHYTXCLK	out	CELL_W[0].OUT_BEST_TMIN[4]
EMAC0PHYTXD[0]	out	CELL_W[0].OUT_BEST_TMIN[0]
EMAC0PHYTXD[1]	out	CELL_W[0].OUT_BEST_TMIN[1]
EMAC0PHYTXD[2]	out	CELL_W[0].OUT_BEST_TMIN[2]
EMAC0PHYTXD[3]	out	CELL_W[0].OUT_BEST_TMIN[3]
EMAC0PHYTXD[4]	out	CELL_W[1].OUT_BEST_TMIN[0]
EMAC0PHYTXD[5]	out	CELL_W[1].OUT_BEST_TMIN[1]
EMAC0PHYTXD[6]	out	CELL_W[1].OUT_BEST_TMIN[2]
EMAC0PHYTXD[7]	out	CELL_W[1].OUT_BEST_TMIN[3]
EMAC0PHYTXEN	out	CELL_W[0].OUT_BEST_TMIN[5]
EMAC0PHYTXER	out	CELL_W[0].OUT_BEST_TMIN[6]
EMAC1CLIENTANINTERRUPT	out	CELL_W[14].OUT_SEC_TMIN[4]
EMAC1CLIENTRXBADFRAME	out	CELL_W[20].OUT_BEST_TMIN[7]
EMAC1CLIENTRXCLIENTCLKOUT	out	CELL_W[20].OUT_BEST_TMIN[4]
EMAC1CLIENTRXD[0]	out	CELL_W[19].OUT_BEST_TMIN[0]
EMAC1CLIENTRXD[1]	out	CELL_W[19].OUT_BEST_TMIN[1]
EMAC1CLIENTRXD[2]	out	CELL_W[19].OUT_BEST_TMIN[2]
EMAC1CLIENTRXD[3]	out	CELL_W[19].OUT_BEST_TMIN[3]
EMAC1CLIENTRXD[4]	out	CELL_W[18].OUT_BEST_TMIN[4]
EMAC1CLIENTRXD[5]	out	CELL_W[18].OUT_BEST_TMIN[5]
EMAC1CLIENTRXD[6]	out	CELL_W[18].OUT_BEST_TMIN[6]
EMAC1CLIENTRXD[7]	out	CELL_W[18].OUT_BEST_TMIN[7]
EMAC1CLIENTRXD[8]	out	CELL_W[17].OUT_BEST_TMIN[4]
EMAC1CLIENTRXD[9]	out	CELL_W[17].OUT_BEST_TMIN[5]
EMAC1CLIENTRXD[10]	out	CELL_W[17].OUT_BEST_TMIN[6]
EMAC1CLIENTRXD[11]	out	CELL_W[17].OUT_BEST_TMIN[7]
EMAC1CLIENTRXD[12]	out	CELL_W[16].OUT_BEST_TMIN[4]
EMAC1CLIENTRXD[13]	out	CELL_W[16].OUT_BEST_TMIN[5]
EMAC1CLIENTRXD[14]	out	CELL_W[16].OUT_BEST_TMIN[6]
EMAC1CLIENTRXD[15]	out	CELL_W[16].OUT_BEST_TMIN[7]
EMAC1CLIENTRXDVLD	out	CELL_W[22].OUT_BEST_TMIN[6]
EMAC1CLIENTRXDVLDMSW	out	CELL_W[22].OUT_BEST_TMIN[5]
EMAC1CLIENTRXDVREG6	out	CELL_W[18].OUT_SEC_TMIN[4]
EMAC1CLIENTRXFRAMEDROP	out	CELL_W[20].OUT_BEST_TMIN[5]
EMAC1CLIENTRXGOODFRAME	out	CELL_W[20].OUT_BEST_TMIN[6]
EMAC1CLIENTRXSTATS[0]	out	CELL_W[22].OUT_SEC_TMIN[0]
EMAC1CLIENTRXSTATS[1]	out	CELL_W[22].OUT_SEC_TMIN[1]
EMAC1CLIENTRXSTATS[2]	out	CELL_W[22].OUT_SEC_TMIN[2]
EMAC1CLIENTRXSTATS[3]	out	CELL_W[22].OUT_SEC_TMIN[3]
EMAC1CLIENTRXSTATS[4]	out	CELL_W[19].OUT_BEST_TMIN[6]
EMAC1CLIENTRXSTATS[5]	out	CELL_W[19].OUT_BEST_TMIN[7]
EMAC1CLIENTRXSTATS[6]	out	CELL_W[19].OUT_BEST_TMIN[5]
EMAC1CLIENTRXSTATSBYTEVLD	out	CELL_W[21].OUT_BEST_TMIN[6]
EMAC1CLIENTRXSTATSVLD	out	CELL_W[22].OUT_BEST_TMIN[7]
EMAC1CLIENTTXACK	out	CELL_W[21].OUT_BEST_TMIN[2]
EMAC1CLIENTTXCLIENTCLKOUT	out	CELL_W[21].OUT_BEST_TMIN[1]
EMAC1CLIENTTXCOLLISION	out	CELL_W[21].OUT_BEST_TMIN[3]
EMAC1CLIENTTXRETRANSMIT	out	CELL_W[21].OUT_BEST_TMIN[4]
EMAC1CLIENTTXSTATS	out	CELL_W[19].OUT_BEST_TMIN[4]
EMAC1CLIENTTXSTATSBYTEVLD	out	CELL_W[21].OUT_BEST_TMIN[5]
EMAC1CLIENTTXSTATSVLD	out	CELL_W[21].OUT_BEST_TMIN[7]
EMAC1CLIENTTXGMIIMIICLKOUT	out	CELL_W[20].OUT_BEST_TMIN[2]
EMAC1PHYENCOMMAALIGN	out	CELL_W[15].OUT_SEC_TMIN[4]
EMAC1PHYLOOPBACKMSB	out	CELL_W[20].OUT_BEST_TMIN[3]
EMAC1PHYMCLKOUT	out	CELL_W[18].OUT_BEST_TMIN[1]
EMAC1PHYMDOUT	out	CELL_W[18].OUT_BEST_TMIN[3]
EMAC1PHYMDTRI	out	CELL_W[18].OUT_BEST_TMIN[2]
EMAC1PHYMGTRXRESET	out	CELL_W[21].OUT_BEST_TMIN[0]
EMAC1PHYMGTTXRESET	out	CELL_W[23].OUT_SEC_TMIN[4]
EMAC1PHYPOWERDOWN	out	CELL_W[19].OUT_SEC_TMIN[4]
EMAC1PHYSYNCACQSTATUS	out	CELL_W[18].OUT_BEST_TMIN[0]
EMAC1PHYTXCHARDISPMODE	out	CELL_W[20].OUT_BEST_TMIN[0]
EMAC1PHYTXCHARDISPVAL	out	CELL_W[20].OUT_BEST_TMIN[1]
EMAC1PHYTXCHARISK	out	CELL_W[22].OUT_BEST_TMIN[4]
EMAC1PHYTXCLK	out	CELL_W[23].OUT_BEST_TMIN[4]
EMAC1PHYTXD[0]	out	CELL_W[23].OUT_BEST_TMIN[0]
EMAC1PHYTXD[1]	out	CELL_W[23].OUT_BEST_TMIN[1]
EMAC1PHYTXD[2]	out	CELL_W[23].OUT_BEST_TMIN[2]
EMAC1PHYTXD[3]	out	CELL_W[23].OUT_BEST_TMIN[3]
EMAC1PHYTXD[4]	out	CELL_W[22].OUT_BEST_TMIN[0]
EMAC1PHYTXD[5]	out	CELL_W[22].OUT_BEST_TMIN[1]
EMAC1PHYTXD[6]	out	CELL_W[22].OUT_BEST_TMIN[2]
EMAC1PHYTXD[7]	out	CELL_W[22].OUT_BEST_TMIN[3]
EMAC1PHYTXEN	out	CELL_W[23].OUT_BEST_TMIN[5]
EMAC1PHYTXER	out	CELL_W[23].OUT_BEST_TMIN[6]
TSTSOEMACO[0]	out	CELL_W[4].OUT_HALF0_BEL[0], CELL_W[4].OUT_HALF1_BEL[0]
TSTSOEMACO[1]	out	CELL_W[4].OUT_HALF0_BEL[1], CELL_W[4].OUT_HALF1_BEL[1]
TSTSOEMACO[2]	out	CELL_W[4].OUT_HALF0_BEL[2], CELL_W[4].OUT_HALF1_BEL[2]
TSTSOEMACO[3]	out	CELL_W[4].OUT_HALF0_BEL[3], CELL_W[4].OUT_HALF1_BEL[3]
TSTSOEMACO[4]	out	CELL_E[13].OUT_HALF0_BEL[0], CELL_E[13].OUT_HALF1_BEL[0]
TSTSOEMACO[5]	out	CELL_E[13].OUT_HALF0_BEL[1], CELL_E[13].OUT_HALF1_BEL[1]
TSTSOEMACO[6]	out	CELL_E[13].OUT_HALF0_BEL[2], CELL_E[13].OUT_HALF1_BEL[2]

virtex4 PPC bel EMAC_V4 attribute bits
Attribute	EMAC

Bel wires

virtex4 PPC bel wires
Wire	Pins
CELL_W[0].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[8]
CELL_W[0].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[9]
CELL_W[0].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[10]
CELL_W[0].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[11]
CELL_W[0].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[4]
CELL_W[0].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[5]
CELL_W[0].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[6]
CELL_W[0].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[7]
CELL_W[0].IMUX_IMUX[0]	EMAC.PHYEMAC0RXD[0]
CELL_W[0].IMUX_IMUX[1]	EMAC.PHYEMAC0RXD[1]
CELL_W[0].IMUX_IMUX[2]	EMAC.PHYEMAC0RXD[2]
CELL_W[0].IMUX_IMUX[3]	EMAC.PHYEMAC0RXD[3]
CELL_W[0].IMUX_IMUX[4]	EMAC.PHYEMAC0CRS
CELL_W[0].IMUX_IMUX[5]	EMAC.PHYEMAC0COL
CELL_W[0].IMUX_IMUX[6]	EMAC.PHYEMAC0PHYAD[2]
CELL_W[0].IMUX_IMUX[7]	EMAC.PHYEMAC0PHYAD[3]
CELL_W[0].IMUX_IMUX[8]	EMAC.PHYEMAC0PHYAD[4]
CELL_W[0].IMUX_IMUX[9]	EMAC.TIEEMAC0UNICASTADDR[45]
CELL_W[0].IMUX_IMUX[10]	EMAC.TIEEMAC0UNICASTADDR[46]
CELL_W[0].IMUX_IMUX[11]	EMAC.TIEEMAC0UNICASTADDR[47]
CELL_W[0].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[0]
CELL_W[0].IMUX_IMUX[13]	EMAC.TIEEMAC0CONFIGVEC[1]
CELL_W[0].IMUX_IMUX[14]	EMAC.TIEEMAC0CONFIGVEC[2]
CELL_W[0].IMUX_IMUX[15]	EMAC.TIEEMAC0CONFIGVEC[3]
CELL_W[0].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[28]
CELL_W[0].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[29]
CELL_W[0].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[30]
CELL_W[0].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[31]
CELL_W[0].OUT_BEST_TMIN[0]	EMAC.EMAC0PHYTXD[0]
CELL_W[0].OUT_BEST_TMIN[1]	EMAC.EMAC0PHYTXD[1]
CELL_W[0].OUT_BEST_TMIN[2]	EMAC.EMAC0PHYTXD[2]
CELL_W[0].OUT_BEST_TMIN[3]	EMAC.EMAC0PHYTXD[3]
CELL_W[0].OUT_BEST_TMIN[4]	EMAC.EMAC0PHYTXCLK
CELL_W[0].OUT_BEST_TMIN[5]	EMAC.EMAC0PHYTXEN
CELL_W[0].OUT_BEST_TMIN[6]	EMAC.EMAC0PHYTXER
CELL_W[0].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTTXSTATSVLD
CELL_W[0].OUT_SEC_TMIN[0]	EMAC.EMAC0CLIENTTXSTATSBYTEVLD
CELL_W[0].OUT_SEC_TMIN[1]	PPC.ISOCMDCRBRAMEVENEN
CELL_W[0].OUT_SEC_TMIN[2]	PPC.ISOCMDCRBRAMODDEN
CELL_W[0].OUT_SEC_TMIN[3]	PPC.ISOCMDCRBRAMRDSELECT
CELL_W[0].OUT_SEC_TMIN[4]	EMAC.EMAC0PHYMGTRXRESET
CELL_W[0].OUT_HALF0_BEL[0]	PPC.LSSDSCANOUT[0]
CELL_W[0].OUT_HALF0_BEL[1]	PPC.LSSDSCANOUT[1]
CELL_W[0].OUT_HALF0_BEL[2]	PPC.LSSDSCANOUT[2]
CELL_W[0].OUT_HALF0_BEL[3]	PPC.LSSDSCANOUT[3]
CELL_W[0].OUT_HALF0_BEL[4]	PPC.LSSDSCANOUT[4]
CELL_W[0].OUT_HALF0_BEL[5]	PPC.LSSDSCANOUT[5]
CELL_W[0].OUT_HALF1_BEL[0]	PPC.LSSDSCANOUT[0]
CELL_W[0].OUT_HALF1_BEL[1]	PPC.LSSDSCANOUT[1]
CELL_W[0].OUT_HALF1_BEL[2]	PPC.LSSDSCANOUT[2]
CELL_W[0].OUT_HALF1_BEL[3]	PPC.LSSDSCANOUT[3]
CELL_W[0].OUT_HALF1_BEL[4]	PPC.LSSDSCANOUT[4]
CELL_W[0].OUT_HALF1_BEL[5]	PPC.LSSDSCANOUT[5]
CELL_W[1].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[41]
CELL_W[1].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[42]
CELL_W[1].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[43]
CELL_W[1].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[44]
CELL_W[1].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[37]
CELL_W[1].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[38]
CELL_W[1].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[39]
CELL_W[1].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[40]
CELL_W[1].IMUX_IMUX[0]	EMAC.PHYEMAC0RXD[4]
CELL_W[1].IMUX_IMUX[1]	EMAC.PHYEMAC0RXD[5]
CELL_W[1].IMUX_IMUX[2]	EMAC.PHYEMAC0RXD[6]
CELL_W[1].IMUX_IMUX[3]	EMAC.PHYEMAC0RXD[7]
CELL_W[1].IMUX_IMUX[4]	EMAC.PHYEMAC0RXDV
CELL_W[1].IMUX_IMUX[5]	EMAC.PHYEMAC0RXER
CELL_W[1].IMUX_IMUX[6]	EMAC.PHYEMAC0RXCOMMADET
CELL_W[1].IMUX_IMUX[7]	EMAC.PHYEMAC0RXCHECKINGCRC
CELL_W[1].IMUX_IMUX[8]	EMAC.EMAC0TIBUS[3]
CELL_W[1].IMUX_IMUX[9]	EMAC.EMAC0TIBUS[2]
CELL_W[1].IMUX_IMUX[10]	EMAC.CLIENTEMAC0TXUNDERRUN
CELL_W[1].IMUX_IMUX[11]	EMAC.CLIENTEMAC0PAUSEREQ
CELL_W[1].IMUX_IMUX[12]	EMAC.CLIENTEMAC0TXDVLD
CELL_W[1].IMUX_IMUX[13]	EMAC.CLIENTEMAC0TXDVLDMSW
CELL_W[1].IMUX_IMUX[14]	EMAC.PHYEMAC0PHYAD[0]
CELL_W[1].IMUX_IMUX[15]	EMAC.PHYEMAC0PHYAD[1]
CELL_W[1].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[24]
CELL_W[1].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[25]
CELL_W[1].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[26]
CELL_W[1].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[27]
CELL_W[1].OUT_BEST_TMIN[0]	EMAC.EMAC0PHYTXD[4]
CELL_W[1].OUT_BEST_TMIN[1]	EMAC.EMAC0PHYTXD[5]
CELL_W[1].OUT_BEST_TMIN[2]	EMAC.EMAC0PHYTXD[6]
CELL_W[1].OUT_BEST_TMIN[3]	EMAC.EMAC0PHYTXD[7]
CELL_W[1].OUT_BEST_TMIN[4]	EMAC.EMAC0PHYTXCHARISK
CELL_W[1].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXDVLDMSW
CELL_W[1].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXDVLD
CELL_W[1].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTRXSTATSVLD
CELL_W[1].OUT_SEC_TMIN[0]	EMAC.EMAC0CLIENTRXSTATS[0]
CELL_W[1].OUT_SEC_TMIN[1]	EMAC.EMAC0CLIENTRXSTATS[1]
CELL_W[1].OUT_SEC_TMIN[2]	EMAC.EMAC0CLIENTRXSTATS[2]
CELL_W[1].OUT_SEC_TMIN[3]	EMAC.EMAC0PHYMGTTXRESET
CELL_W[1].OUT_HALF0_BEL[0]	PPC.LSSDSCANOUT[6]
CELL_W[1].OUT_HALF0_BEL[1]	PPC.LSSDSCANOUT[7]
CELL_W[1].OUT_HALF0_BEL[2]	PPC.LSSDSCANOUT[8]
CELL_W[1].OUT_HALF0_BEL[3]	PPC.LSSDSCANOUT[9]
CELL_W[1].OUT_HALF0_BEL[4]	PPC.LSSDSCANOUT[10]
CELL_W[1].OUT_HALF0_BEL[5]	PPC.LSSDSCANOUT[11]
CELL_W[1].OUT_HALF1_BEL[0]	PPC.LSSDSCANOUT[6]
CELL_W[1].OUT_HALF1_BEL[1]	PPC.LSSDSCANOUT[7]
CELL_W[1].OUT_HALF1_BEL[2]	PPC.LSSDSCANOUT[8]
CELL_W[1].OUT_HALF1_BEL[3]	PPC.LSSDSCANOUT[9]
CELL_W[1].OUT_HALF1_BEL[4]	PPC.LSSDSCANOUT[10]
CELL_W[1].OUT_HALF1_BEL[5]	PPC.LSSDSCANOUT[11]
CELL_W[2].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[33]
CELL_W[2].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[34]
CELL_W[2].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[35]
CELL_W[2].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[36]
CELL_W[2].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[29]
CELL_W[2].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[30]
CELL_W[2].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[31]
CELL_W[2].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[32]
CELL_W[2].IMUX_IMUX[0]	EMAC.PHYEMAC0RXNOTINTABLE
CELL_W[2].IMUX_IMUX[1]	EMAC.PHYEMAC0RXDISPERR
CELL_W[2].IMUX_IMUX[2]	EMAC.PHYEMAC0RXCHARISK
CELL_W[2].IMUX_IMUX[3]	EMAC.PHYEMAC0RXCHARISCOMMA
CELL_W[2].IMUX_IMUX[4]	EMAC.PHYEMAC0RXLOSSOFSYNC[0]
CELL_W[2].IMUX_IMUX[5]	EMAC.PHYEMAC0RXLOSSOFSYNC[1]
CELL_W[2].IMUX_IMUX[6]	EMAC.PHYEMAC0RXBUFSTATUS[0]
CELL_W[2].IMUX_IMUX[7]	EMAC.PHYEMAC0RXBUFSTATUS[1]
CELL_W[2].IMUX_IMUX[8]	EMAC.CLIENTEMAC0TXD[0]
CELL_W[2].IMUX_IMUX[9]	EMAC.CLIENTEMAC0TXD[1]
CELL_W[2].IMUX_IMUX[10]	EMAC.CLIENTEMAC0TXD[2]
CELL_W[2].IMUX_IMUX[11]	EMAC.CLIENTEMAC0TXD[3]
CELL_W[2].IMUX_IMUX[12]	EMAC.TIEEMAC0UNICASTADDR[28]
CELL_W[2].IMUX_IMUX[13]	EMAC.TIEEMAC0UNICASTADDR[19]
CELL_W[2].IMUX_IMUX[14]	EMAC.RESET
CELL_W[2].IMUX_IMUX[15]	EMAC.PHYEMAC0SIGNALDET
CELL_W[2].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[20]
CELL_W[2].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[21]
CELL_W[2].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[22]
CELL_W[2].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[23]
CELL_W[2].OUT_BEST_TMIN[0]	EMAC.EMAC0CLIENTTXCLIENTCLKOUT
CELL_W[2].OUT_BEST_TMIN[1]	EMAC.EMAC0CLIENTRXSTATS[3]
CELL_W[2].OUT_BEST_TMIN[2]	EMAC.EMAC0CLIENTTXACK
CELL_W[2].OUT_BEST_TMIN[3]	EMAC.EMAC0CLIENTTXCOLLISION
CELL_W[2].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTTXRETRANSMIT
CELL_W[2].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXSTATSBYTEVLD
CELL_W[2].OUT_BEST_TMIN[6]	EMAC.HOSTMIIMRDY
CELL_W[2].OUT_BEST_TMIN[7]	PPC.DCREMACENABLER
CELL_W[2].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[28]
CELL_W[2].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[29]
CELL_W[2].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[30]
CELL_W[2].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[31]
CELL_W[2].OUT_HALF0_BEL[0]	PPC.LSSDSCANOUT[12]
CELL_W[2].OUT_HALF0_BEL[1]	PPC.LSSDSCANOUT[13]
CELL_W[2].OUT_HALF0_BEL[2]	PPC.LSSDSCANOUT[14]
CELL_W[2].OUT_HALF0_BEL[3]	PPC.LSSDSCANOUT[15]
CELL_W[2].OUT_HALF1_BEL[0]	PPC.LSSDSCANOUT[12]
CELL_W[2].OUT_HALF1_BEL[1]	PPC.LSSDSCANOUT[13]
CELL_W[2].OUT_HALF1_BEL[2]	PPC.LSSDSCANOUT[14]
CELL_W[2].OUT_HALF1_BEL[3]	PPC.LSSDSCANOUT[15]
CELL_W[3].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[24]
CELL_W[3].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[25]
CELL_W[3].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[26]
CELL_W[3].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[27]
CELL_W[3].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[20]
CELL_W[3].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[21]
CELL_W[3].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[22]
CELL_W[3].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[23]
CELL_W[3].IMUX_IMUX[0]	EMAC.CLIENTEMAC0TXFIRSTBYTE
CELL_W[3].IMUX_IMUX[1]	EMAC.PHYEMAC0RXCLKCORCNT[0]
CELL_W[3].IMUX_IMUX[2]	EMAC.PHYEMAC0RXRUNDISP
CELL_W[3].IMUX_IMUX[3]	EMAC.PHYEMAC0TXBUFERR
CELL_W[3].IMUX_IMUX[4]	EMAC.PHYEMAC0MDIN
CELL_W[3].IMUX_IMUX[5]	EMAC.CLIENTEMAC0TXD[4]
CELL_W[3].IMUX_IMUX[6]	EMAC.CLIENTEMAC0TXD[5]
CELL_W[3].IMUX_IMUX[7]	EMAC.CLIENTEMAC0TXD[6]
CELL_W[3].IMUX_IMUX[8]	EMAC.CLIENTEMAC0TXD[7]
CELL_W[3].IMUX_IMUX[9]	EMAC.TIEEMAC0CONFIGVEC[64]
CELL_W[3].IMUX_IMUX[10]	EMAC.TIEEMAC0CONFIGVEC[65]
CELL_W[3].IMUX_IMUX[11]	EMAC.TIEEMAC0CONFIGVEC[66]
CELL_W[3].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[67]
CELL_W[3].IMUX_IMUX[13]	EMAC.TIEEMAC0CONFIGVEC[68]
CELL_W[3].IMUX_IMUX[14]	EMAC.TIEEMAC0CONFIGVEC[69]
CELL_W[3].IMUX_IMUX[15]	PPC.TSTISOCMC405READDATAOUTI[16]
CELL_W[3].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[17]
CELL_W[3].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[18]
CELL_W[3].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[19]
CELL_W[3].OUT_BEST_TMIN[0]	EMAC.EMAC0PHYTXCHARDISPMODE
CELL_W[3].OUT_BEST_TMIN[1]	EMAC.EMAC0PHYTXCHARDISPVAL
CELL_W[3].OUT_BEST_TMIN[2]	EMAC.EMAC0CLIENTTXGMIIMIICLKOUT
CELL_W[3].OUT_BEST_TMIN[3]	EMAC.EMAC0PHYLOOPBACKMSB
CELL_W[3].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTRXCLIENTCLKOUT
CELL_W[3].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXFRAMEDROP
CELL_W[3].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXGOODFRAME
CELL_W[3].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTRXBADFRAME
CELL_W[3].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[24]
CELL_W[3].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[25]
CELL_W[3].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[26]
CELL_W[3].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[27]
CELL_W[3].OUT_HALF0_BEL[0]	PPC.TSTC405APUWBBYTEENO[0]
CELL_W[3].OUT_HALF0_BEL[1]	PPC.TSTC405APUWBBYTEENO[1]
CELL_W[3].OUT_HALF0_BEL[2]	PPC.TSTC405APUWBBYTEENO[2]
CELL_W[3].OUT_HALF0_BEL[3]	PPC.TSTC405APUWBBYTEENO[3]
CELL_W[3].OUT_HALF1_BEL[0]	PPC.TSTC405APUWBBYTEENO[0]
CELL_W[3].OUT_HALF1_BEL[1]	PPC.TSTC405APUWBBYTEENO[1]
CELL_W[3].OUT_HALF1_BEL[2]	PPC.TSTC405APUWBBYTEENO[2]
CELL_W[3].OUT_HALF1_BEL[3]	PPC.TSTC405APUWBBYTEENO[3]
CELL_W[4].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[15]
CELL_W[4].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[16]
CELL_W[4].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[17]
CELL_W[4].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[18]
CELL_W[4].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[11]
CELL_W[4].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[12]
CELL_W[4].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[13]
CELL_W[4].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[14]
CELL_W[4].IMUX_IMUX[0]	EMAC.CLIENTEMAC0TXD[8]
CELL_W[4].IMUX_IMUX[1]	EMAC.CLIENTEMAC0TXD[9]
CELL_W[4].IMUX_IMUX[2]	EMAC.CLIENTEMAC0TXD[10]
CELL_W[4].IMUX_IMUX[3]	EMAC.CLIENTEMAC0TXD[11]
CELL_W[4].IMUX_IMUX[4]	EMAC.CLIENTEMAC0TXIFGDELAY[0]
CELL_W[4].IMUX_IMUX[5]	EMAC.CLIENTEMAC0TXIFGDELAY[1]
CELL_W[4].IMUX_IMUX[6]	EMAC.CLIENTEMAC0TXIFGDELAY[2]
CELL_W[4].IMUX_IMUX[7]	EMAC.CLIENTEMAC0TXIFGDELAY[3]
CELL_W[4].IMUX_IMUX[8]	EMAC.CLIENTEMAC0PAUSEVAL[0]
CELL_W[4].IMUX_IMUX[9]	EMAC.CLIENTEMAC0PAUSEVAL[1]
CELL_W[4].IMUX_IMUX[10]	EMAC.CLIENTEMAC0PAUSEVAL[2]
CELL_W[4].IMUX_IMUX[11]	EMAC.CLIENTEMAC0PAUSEVAL[3]
CELL_W[4].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[70]
CELL_W[4].IMUX_IMUX[13]	EMAC.TIEEMAC0CONFIGVEC[71]
CELL_W[4].IMUX_IMUX[14]	EMAC.TIEEMAC0CONFIGVEC[72]
CELL_W[4].IMUX_IMUX[15]	EMAC.EMAC0TIBUS[4]
CELL_W[4].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[12]
CELL_W[4].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[13]
CELL_W[4].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[14]
CELL_W[4].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[15]
CELL_W[4].OUT_BEST_TMIN[0]	EMAC.EMAC0CLIENTRXD[0]
CELL_W[4].OUT_BEST_TMIN[1]	EMAC.EMAC0CLIENTRXD[1]
CELL_W[4].OUT_BEST_TMIN[2]	EMAC.EMAC0CLIENTRXD[2]
CELL_W[4].OUT_BEST_TMIN[3]	EMAC.EMAC0CLIENTRXD[3]
CELL_W[4].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTTXSTATS
CELL_W[4].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXSTATS[6]
CELL_W[4].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXSTATS[4]
CELL_W[4].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTRXSTATS[5]
CELL_W[4].OUT_SEC_TMIN[0]	PPC.C405JTGSHIFTDR
CELL_W[4].OUT_SEC_TMIN[1]	PPC.C405JTGTDO
CELL_W[4].OUT_SEC_TMIN[2]	PPC.C405JTGTDOEN
CELL_W[4].OUT_SEC_TMIN[3]	PPC.C405JTGUPDATEDR
CELL_W[4].OUT_HALF0_BEL[0]	EMAC.TSTSOEMACO[0]
CELL_W[4].OUT_HALF0_BEL[1]	EMAC.TSTSOEMACO[1]
CELL_W[4].OUT_HALF0_BEL[2]	EMAC.TSTSOEMACO[2]
CELL_W[4].OUT_HALF0_BEL[3]	EMAC.TSTSOEMACO[3]
CELL_W[4].OUT_HALF1_BEL[0]	EMAC.TSTSOEMACO[0]
CELL_W[4].OUT_HALF1_BEL[1]	EMAC.TSTSOEMACO[1]
CELL_W[4].OUT_HALF1_BEL[2]	EMAC.TSTSOEMACO[2]
CELL_W[4].OUT_HALF1_BEL[3]	EMAC.TSTSOEMACO[3]
CELL_W[5].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[7]
CELL_W[5].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[8]
CELL_W[5].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[9]
CELL_W[5].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[10]
CELL_W[5].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0UNICASTADDR[3]
CELL_W[5].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[4]
CELL_W[5].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[5]
CELL_W[5].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[6]
CELL_W[5].IMUX_IMUX[0]	EMAC.CLIENTEMAC0TXD[12]
CELL_W[5].IMUX_IMUX[1]	EMAC.CLIENTEMAC0TXD[13]
CELL_W[5].IMUX_IMUX[2]	EMAC.CLIENTEMAC0TXD[14]
CELL_W[5].IMUX_IMUX[3]	EMAC.CLIENTEMAC0TXD[15]
CELL_W[5].IMUX_IMUX[4]	EMAC.CLIENTEMAC0TXIFGDELAY[4]
CELL_W[5].IMUX_IMUX[5]	EMAC.CLIENTEMAC0TXIFGDELAY[5]
CELL_W[5].IMUX_IMUX[6]	EMAC.CLIENTEMAC0TXIFGDELAY[6]
CELL_W[5].IMUX_IMUX[7]	EMAC.CLIENTEMAC0TXIFGDELAY[7]
CELL_W[5].IMUX_IMUX[8]	EMAC.CLIENTEMAC0PAUSEVAL[4]
CELL_W[5].IMUX_IMUX[9]	EMAC.CLIENTEMAC0PAUSEVAL[5]
CELL_W[5].IMUX_IMUX[10]	EMAC.CLIENTEMAC0PAUSEVAL[6]
CELL_W[5].IMUX_IMUX[11]	EMAC.CLIENTEMAC0PAUSEVAL[7]
CELL_W[5].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[12]
CELL_W[5].IMUX_IMUX[13]	EMAC.TIEEMAC0CONFIGVEC[13]
CELL_W[5].IMUX_IMUX[14]	EMAC.TIEEMAC0CONFIGVEC[14]
CELL_W[5].IMUX_IMUX[15]	EMAC.TIEEMAC0CONFIGVEC[15]
CELL_W[5].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[8]
CELL_W[5].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[9]
CELL_W[5].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[10]
CELL_W[5].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[11]
CELL_W[5].OUT_BEST_TMIN[0]	EMAC.EMAC0PHYSYNCACQSTATUS
CELL_W[5].OUT_BEST_TMIN[1]	EMAC.EMAC0PHYMCLKOUT
CELL_W[5].OUT_BEST_TMIN[2]	EMAC.EMAC0PHYMDTRI
CELL_W[5].OUT_BEST_TMIN[3]	EMAC.EMAC0PHYMDOUT
CELL_W[5].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTRXD[4]
CELL_W[5].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXD[5]
CELL_W[5].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXD[6]
CELL_W[5].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTRXD[7]
CELL_W[5].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[20]
CELL_W[5].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[21]
CELL_W[5].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[22]
CELL_W[5].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[23]
CELL_W[5].OUT_SEC_TMIN[4]	EMAC.EMAC0CLIENTRXDVREG6
CELL_W[5].OUT_HALF0_BEL[0]	PPC.DIAGOUT
CELL_W[5].OUT_HALF0_BEL[1]	PPC.TSTC405APUWBFLUSHO
CELL_W[5].OUT_HALF0_BEL[2]	PPC.TSTC405APUWBHOLDO
CELL_W[5].OUT_HALF0_BEL[3]	PPC.TSTC405APUDCDFULLO
CELL_W[5].OUT_HALF1_BEL[0]	PPC.DIAGOUT
CELL_W[5].OUT_HALF1_BEL[1]	PPC.TSTC405APUWBFLUSHO
CELL_W[5].OUT_HALF1_BEL[2]	PPC.TSTC405APUWBHOLDO
CELL_W[5].OUT_HALF1_BEL[3]	PPC.TSTC405APUDCDFULLO
CELL_W[6].IMUX_SR_OPTINV[0]	PPC.TIEDCRADDR[4]
CELL_W[6].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0UNICASTADDR[0]
CELL_W[6].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0UNICASTADDR[1]
CELL_W[6].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0UNICASTADDR[2]
CELL_W[6].IMUX_CLK_OPTINV[0]	EMAC.EMAC0TIBUS[0]
CELL_W[6].IMUX_CE_OPTINV[0]	PPC.TIEDCRADDR[0]
CELL_W[6].IMUX_CE_OPTINV[1]	PPC.TIEDCRADDR[1]
CELL_W[6].IMUX_CE_OPTINV[2]	PPC.TIEDCRADDR[2]
CELL_W[6].IMUX_CE_OPTINV[3]	PPC.TIEDCRADDR[3]
CELL_W[6].IMUX_IMUX[0]	EMAC.HOSTADDR[0]
CELL_W[6].IMUX_IMUX[1]	EMAC.HOSTADDR[1]
CELL_W[6].IMUX_IMUX[2]	EMAC.HOSTADDR[2]
CELL_W[6].IMUX_IMUX[3]	EMAC.HOSTADDR[3]
CELL_W[6].IMUX_IMUX[4]	EMAC.HOSTADDR[4]
CELL_W[6].IMUX_IMUX[5]	EMAC.HOSTADDR[5]
CELL_W[6].IMUX_IMUX[6]	EMAC.HOSTADDR[6]
CELL_W[6].IMUX_IMUX[7]	EMAC.HOSTADDR[7]
CELL_W[6].IMUX_IMUX[8]	EMAC.HOSTADDR[8]
CELL_W[6].IMUX_IMUX[9]	EMAC.HOSTADDR[9]
CELL_W[6].IMUX_IMUX[10]	EMAC.HOSTWRDATA[0]
CELL_W[6].IMUX_IMUX[11]	EMAC.HOSTWRDATA[1]
CELL_W[6].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[16]
CELL_W[6].IMUX_IMUX[13]	EMAC.TIEEMAC0CONFIGVEC[17]
CELL_W[6].IMUX_IMUX[14]	EMAC.TIEEMAC0CONFIGVEC[18]
CELL_W[6].IMUX_IMUX[15]	EMAC.TIEEMAC0CONFIGVEC[19]
CELL_W[6].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[4]
CELL_W[6].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[5]
CELL_W[6].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[6]
CELL_W[6].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[7]
CELL_W[6].OUT_BEST_TMIN[0]	EMAC.HOSTRDDATA[0]
CELL_W[6].OUT_BEST_TMIN[1]	EMAC.HOSTRDDATA[1]
CELL_W[6].OUT_BEST_TMIN[2]	EMAC.HOSTRDDATA[2]
CELL_W[6].OUT_BEST_TMIN[3]	EMAC.EMAC0CLIENTRXD[8]
CELL_W[6].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTRXD[9]
CELL_W[6].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXD[10]
CELL_W[6].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXD[11]
CELL_W[6].OUT_BEST_TMIN[7]	EMAC.HOSTRDDATA[3]
CELL_W[6].OUT_SEC_TMIN[0]	EMAC.HOSTRDDATA[4]
CELL_W[6].OUT_SEC_TMIN[1]	EMAC.HOSTRDDATA[5]
CELL_W[6].OUT_SEC_TMIN[2]	EMAC.HOSTRDDATA[6]
CELL_W[6].OUT_SEC_TMIN[3]	EMAC.HOSTRDDATA[7]
CELL_W[6].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMBYTEENO[0]
CELL_W[6].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMBYTEENO[1]
CELL_W[6].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMBYTEENO[2]
CELL_W[6].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMBYTEENO[3]
CELL_W[6].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMXLTVALIDO
CELL_W[6].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMABORTOPO
CELL_W[6].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMABORTREQO
CELL_W[6].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMLOADREQO
CELL_W[6].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMBYTEENO[0]
CELL_W[6].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMBYTEENO[1]
CELL_W[6].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMBYTEENO[2]
CELL_W[6].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMBYTEENO[3]
CELL_W[6].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMXLTVALIDO
CELL_W[6].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMABORTOPO
CELL_W[6].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMABORTREQO
CELL_W[6].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMLOADREQO
CELL_W[7].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[3]
CELL_W[7].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[2]
CELL_W[7].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[1]
CELL_W[7].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[0]
CELL_W[7].IMUX_CLK_OPTINV[0]	PPC.CPMDCRCLK
CELL_W[7].IMUX_CE_OPTINV[0]	PPC.TIEDCRADDR[5]
CELL_W[7].IMUX_CE_OPTINV[1]	PPC.TESTSELI
CELL_W[7].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[63]
CELL_W[7].IMUX_CE_OPTINV[3]	PPC.TSTUSECPMCLKSELI
CELL_W[7].IMUX_IMUX[0]	EMAC.HOSTWRDATA[2]
CELL_W[7].IMUX_IMUX[1]	EMAC.HOSTWRDATA[3]
CELL_W[7].IMUX_IMUX[2]	EMAC.HOSTWRDATA[4]
CELL_W[7].IMUX_IMUX[3]	EMAC.HOSTWRDATA[5]
CELL_W[7].IMUX_IMUX[4]	EMAC.HOSTWRDATA[6]
CELL_W[7].IMUX_IMUX[5]	EMAC.HOSTWRDATA[7]
CELL_W[7].IMUX_IMUX[6]	EMAC.HOSTWRDATA[8]
CELL_W[7].IMUX_IMUX[7]	EMAC.HOSTWRDATA[9]
CELL_W[7].IMUX_IMUX[8]	EMAC.HOSTWRDATA[10]
CELL_W[7].IMUX_IMUX[9]	EMAC.HOSTWRDATA[11]
CELL_W[7].IMUX_IMUX[10]	EMAC.HOSTWRDATA[12]
CELL_W[7].IMUX_IMUX[11]	EMAC.HOSTWRDATA[13]
CELL_W[7].IMUX_IMUX[12]	EMAC.CLIENTEMAC0PAUSEVAL[12]
CELL_W[7].IMUX_IMUX[13]	EMAC.CLIENTEMAC0PAUSEVAL[13]
CELL_W[7].IMUX_IMUX[14]	EMAC.CLIENTEMAC0PAUSEVAL[14]
CELL_W[7].IMUX_IMUX[15]	EMAC.CLIENTEMAC0PAUSEVAL[15]
CELL_W[7].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[0]
CELL_W[7].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[1]
CELL_W[7].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[2]
CELL_W[7].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[3]
CELL_W[7].OUT_BEST_TMIN[0]	EMAC.HOSTRDDATA[8]
CELL_W[7].OUT_BEST_TMIN[1]	EMAC.HOSTRDDATA[9]
CELL_W[7].OUT_BEST_TMIN[2]	EMAC.HOSTRDDATA[10]
CELL_W[7].OUT_BEST_TMIN[3]	EMAC.HOSTRDDATA[11]
CELL_W[7].OUT_BEST_TMIN[4]	EMAC.EMAC0CLIENTRXD[12]
CELL_W[7].OUT_BEST_TMIN[5]	EMAC.EMAC0CLIENTRXD[13]
CELL_W[7].OUT_BEST_TMIN[6]	EMAC.EMAC0CLIENTRXD[14]
CELL_W[7].OUT_BEST_TMIN[7]	EMAC.EMAC0CLIENTRXD[15]
CELL_W[7].OUT_SEC_TMIN[0]	EMAC.HOSTRDDATA[12]
CELL_W[7].OUT_SEC_TMIN[1]	EMAC.HOSTRDDATA[13]
CELL_W[7].OUT_SEC_TMIN[2]	EMAC.HOSTRDDATA[14]
CELL_W[7].OUT_SEC_TMIN[3]	EMAC.HOSTRDDATA[15]
CELL_W[7].OUT_HALF0_BEL[0]	PPC.C405DSOCMCACHEABLE
CELL_W[7].OUT_HALF0_BEL[1]	PPC.C405DSOCMGUARDED
CELL_W[7].OUT_HALF0_BEL[2]	PPC.C405DSOCMSTRINGMULTIPLE
CELL_W[7].OUT_HALF0_BEL[3]	PPC.C405DSOCMU0ATTR
CELL_W[7].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXEWDCNTO[0]
CELL_W[7].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXEWDCNTO[1]
CELL_W[7].OUT_HALF0_BEL[6]	PPC.TSTC405APUMSRFE0O
CELL_W[7].OUT_HALF0_BEL[7]	PPC.TSTC405APUMSRFE1O
CELL_W[7].OUT_HALF1_BEL[0]	PPC.C405DSOCMCACHEABLE
CELL_W[7].OUT_HALF1_BEL[1]	PPC.C405DSOCMGUARDED
CELL_W[7].OUT_HALF1_BEL[2]	PPC.C405DSOCMSTRINGMULTIPLE
CELL_W[7].OUT_HALF1_BEL[3]	PPC.C405DSOCMU0ATTR
CELL_W[7].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXEWDCNTO[0]
CELL_W[7].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXEWDCNTO[1]
CELL_W[7].OUT_HALF1_BEL[6]	PPC.TSTC405APUMSRFE0O
CELL_W[7].OUT_HALF1_BEL[7]	PPC.TSTC405APUMSRFE1O
CELL_W[8].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[49]
CELL_W[8].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[50]
CELL_W[8].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[51]
CELL_W[8].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[52]
CELL_W[8].IMUX_CLK_OPTINV[0]	EMAC.EMAC0TIBUS[1]
CELL_W[8].IMUX_CE_OPTINV[0]	PPC.TIEPVRBIT[28]
CELL_W[8].IMUX_CE_OPTINV[1]	PPC.TIEPVRBIT[29]
CELL_W[8].IMUX_CE_OPTINV[2]	PPC.TIEPVRBIT[30]
CELL_W[8].IMUX_CE_OPTINV[3]	PPC.TIEPVRBIT[31]
CELL_W[8].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[28]
CELL_W[8].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[29]
CELL_W[8].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[30]
CELL_W[8].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[31]
CELL_W[8].IMUX_IMUX[4]	EMAC.CLIENTEMAC0PAUSEVAL[8]
CELL_W[8].IMUX_IMUX[5]	EMAC.CLIENTEMAC0PAUSEVAL[9]
CELL_W[8].IMUX_IMUX[6]	EMAC.CLIENTEMAC0PAUSEVAL[10]
CELL_W[8].IMUX_IMUX[7]	EMAC.CLIENTEMAC0PAUSEVAL[11]
CELL_W[8].IMUX_IMUX[8]	EMAC.PHYEMAC0RXCLKCORCNT[1]
CELL_W[8].IMUX_IMUX[9]	EMAC.PHYEMAC0RXCLKCORCNT[2]
CELL_W[8].IMUX_IMUX[10]	EMAC.PHYEMAC0RXBUFERR
CELL_W[8].IMUX_IMUX[11]	PPC.CPMC405PLBSAMPLECYCLEALT
CELL_W[8].IMUX_IMUX[12]	PPC.CPMC405PLBSYNCCLOCK
CELL_W[8].IMUX_IMUX[13]	PPC.TSTC405ISOCMABUSI[25]
CELL_W[8].IMUX_IMUX[14]	PPC.TSTC405ISOCMABUSI[26]
CELL_W[8].IMUX_IMUX[15]	PPC.TSTC405ISOCMABUSI[27]
CELL_W[8].IMUX_IMUX[16]	PPC.TSTC405ISOCMABUSI[28]
CELL_W[8].IMUX_IMUX[17]	PPC.TSTC405ISOCMABUSI[29]
CELL_W[8].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[28]
CELL_W[8].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[29]
CELL_W[8].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[30]
CELL_W[8].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[31]
CELL_W[8].OUT_BEST_TMIN[4]	PPC.C405DBGWBIAR[28]
CELL_W[8].OUT_BEST_TMIN[5]	PPC.C405DBGWBIAR[29]
CELL_W[8].OUT_BEST_TMIN[6]	PPC.C405DBGWBFULL
CELL_W[8].OUT_BEST_TMIN[7]	PPC.C405CPMCORESLEEPREQ
CELL_W[8].OUT_SEC_TMIN[0]	PPC.C405CPMMSRCE
CELL_W[8].OUT_SEC_TMIN[1]	PPC.C405CPMMSREE
CELL_W[8].OUT_SEC_TMIN[2]	PPC.C405CPMTIMERIRQ
CELL_W[8].OUT_SEC_TMIN[3]	PPC.C405CPMTIMERRESETREQ
CELL_W[8].OUT_SEC_TMIN[4]	EMAC.EMAC0CLIENTANINTERRUPT
CELL_W[8].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[60]
CELL_W[8].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[61]
CELL_W[8].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[62]
CELL_W[8].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[63]
CELL_W[8].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[28]
CELL_W[8].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[29]
CELL_W[8].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[30]
CELL_W[8].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[31]
CELL_W[8].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[60]
CELL_W[8].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[61]
CELL_W[8].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[62]
CELL_W[8].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[63]
CELL_W[8].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[28]
CELL_W[8].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[29]
CELL_W[8].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[30]
CELL_W[8].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[31]
CELL_W[9].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[53]
CELL_W[9].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[54]
CELL_W[9].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[55]
CELL_W[9].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[56]
CELL_W[9].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC0MCLKIN
CELL_W[9].IMUX_CE_OPTINV[0]	PPC.LSSDSCANIN[0]
CELL_W[9].IMUX_CE_OPTINV[1]	PPC.LSSDSCANIN[1]
CELL_W[9].IMUX_CE_OPTINV[2]	PPC.LSSDSCANIN[2]
CELL_W[9].IMUX_CE_OPTINV[3]	PPC.LSSDSCANIN[3]
CELL_W[9].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[24]
CELL_W[9].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[25]
CELL_W[9].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[26]
CELL_W[9].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[27]
CELL_W[9].IMUX_IMUX[4]	PPC.RSTC405RESETCORE
CELL_W[9].IMUX_IMUX[5]	PPC.RSTC405RESETCHIP
CELL_W[9].IMUX_IMUX[6]	PPC.RSTC405RESETSYS
CELL_W[9].IMUX_IMUX[7]	PPC.TIEC405CLOCKENABLE
CELL_W[9].IMUX_IMUX[8]	PPC.TIEC405DUTYENABLE
CELL_W[9].IMUX_IMUX[9]	EMAC.TIEEMAC0CONFIGVEC[73]
CELL_W[9].IMUX_IMUX[10]	EMAC.TIEEMAC0CONFIGVEC[74]
CELL_W[9].IMUX_IMUX[11]	EMAC.TIEEMAC0CONFIGVEC[75]
CELL_W[9].IMUX_IMUX[12]	EMAC.TIEEMAC0CONFIGVEC[76]
CELL_W[9].IMUX_IMUX[13]	PPC.LSSDCE1C1
CELL_W[9].IMUX_IMUX[14]	PPC.LSSDCE1CA1
CELL_W[9].IMUX_IMUX[15]	PPC.TSTC405ISOCMABUSI[20]
CELL_W[9].IMUX_IMUX[16]	PPC.TSTC405ISOCMABUSI[21]
CELL_W[9].IMUX_IMUX[17]	PPC.TSTC405ISOCMABUSI[22]
CELL_W[9].IMUX_IMUX[18]	PPC.TSTC405ISOCMABUSI[23]
CELL_W[9].IMUX_IMUX[19]	PPC.TSTC405ISOCMABUSI[24]
CELL_W[9].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[24]
CELL_W[9].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[25]
CELL_W[9].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[26]
CELL_W[9].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[27]
CELL_W[9].OUT_BEST_TMIN[4]	PPC.C405DBGWBIAR[24]
CELL_W[9].OUT_BEST_TMIN[5]	PPC.C405DBGWBIAR[25]
CELL_W[9].OUT_BEST_TMIN[6]	PPC.C405DBGWBIAR[26]
CELL_W[9].OUT_BEST_TMIN[7]	PPC.C405DBGWBIAR[27]
CELL_W[9].OUT_SEC_TMIN[0]	PPC.C405XXXMACHINECHECK
CELL_W[9].OUT_SEC_TMIN[1]	PPC.C405RSTCHIPRESETREQ
CELL_W[9].OUT_SEC_TMIN[2]	PPC.C405RSTCORERESETREQ
CELL_W[9].OUT_SEC_TMIN[3]	PPC.C405RSTSYSRESETREQ
CELL_W[9].OUT_SEC_TMIN[4]	EMAC.EMAC0PHYENCOMMAALIGN
CELL_W[9].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[56]
CELL_W[9].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[57]
CELL_W[9].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[58]
CELL_W[9].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[59]
CELL_W[9].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[24]
CELL_W[9].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[25]
CELL_W[9].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[26]
CELL_W[9].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[27]
CELL_W[9].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[56]
CELL_W[9].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[57]
CELL_W[9].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[58]
CELL_W[9].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[59]
CELL_W[9].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[24]
CELL_W[9].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[25]
CELL_W[9].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[26]
CELL_W[9].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[27]
CELL_W[10].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[57]
CELL_W[10].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[58]
CELL_W[10].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[59]
CELL_W[10].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[60]
CELL_W[10].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC0RXCLIENTCLKIN
CELL_W[10].IMUX_CE_OPTINV[0]	PPC.LSSDSCANIN[4]
CELL_W[10].IMUX_CE_OPTINV[1]	PPC.LSSDSCANIN[5]
CELL_W[10].IMUX_CE_OPTINV[2]	PPC.LSSDSCANIN[6]
CELL_W[10].IMUX_CE_OPTINV[3]	PPC.LSSDSCANIN[7]
CELL_W[10].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[20]
CELL_W[10].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[21]
CELL_W[10].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[22]
CELL_W[10].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[23]
CELL_W[10].IMUX_IMUX[4]	EMAC.CLIENTEMAC0DCMLOCKED
CELL_W[10].IMUX_IMUX[5]	EMAC.TIEEMAC0CONFIGVEC[77]
CELL_W[10].IMUX_IMUX[6]	EMAC.TIEEMAC0CONFIGVEC[78]
CELL_W[10].IMUX_IMUX[7]	EMAC.TIEEMAC0CONFIGVEC[79]
CELL_W[10].IMUX_IMUX[8]	EMAC.TIEEMAC0CONFIGVEC[61]
CELL_W[10].IMUX_IMUX[9]	EMAC.TIEEMAC0CONFIGVEC[62]
CELL_W[10].IMUX_IMUX[10]	EMAC.TSTSIEMACI[6]
CELL_W[10].IMUX_IMUX[11]	PPC.TSTCPUCLKENI
CELL_W[10].IMUX_IMUX[12]	PPC.TSTCLKINACTI
CELL_W[10].IMUX_IMUX[13]	PPC.TSTTIMERENI
CELL_W[10].IMUX_IMUX[14]	PPC.TSTJTAGENI
CELL_W[10].IMUX_IMUX[15]	PPC.TSTRESETCOREI
CELL_W[10].IMUX_IMUX[16]	PPC.TSTC405ISOCMABUSI[16]
CELL_W[10].IMUX_IMUX[17]	PPC.TSTC405ISOCMABUSI[17]
CELL_W[10].IMUX_IMUX[18]	PPC.TSTC405ISOCMABUSI[18]
CELL_W[10].IMUX_IMUX[19]	PPC.TSTC405ISOCMABUSI[19]
CELL_W[10].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[20]
CELL_W[10].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[21]
CELL_W[10].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[22]
CELL_W[10].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[23]
CELL_W[10].OUT_BEST_TMIN[4]	PPC.C405DBGWBIAR[20]
CELL_W[10].OUT_BEST_TMIN[5]	PPC.C405DBGWBIAR[21]
CELL_W[10].OUT_BEST_TMIN[6]	PPC.C405DBGWBIAR[22]
CELL_W[10].OUT_BEST_TMIN[7]	PPC.C405DBGWBIAR[23]
CELL_W[10].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[16]
CELL_W[10].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[17]
CELL_W[10].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[18]
CELL_W[10].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[19]
CELL_W[10].OUT_SEC_TMIN[4]	EMAC.EMAC0PHYPOWERDOWN
CELL_W[10].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[52]
CELL_W[10].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[53]
CELL_W[10].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[54]
CELL_W[10].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[55]
CELL_W[10].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[20]
CELL_W[10].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[21]
CELL_W[10].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[22]
CELL_W[10].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[23]
CELL_W[10].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[52]
CELL_W[10].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[53]
CELL_W[10].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[54]
CELL_W[10].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[55]
CELL_W[10].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[20]
CELL_W[10].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[21]
CELL_W[10].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[22]
CELL_W[10].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[23]
CELL_W[11].IMUX_SR_OPTINV[0]	PPC.BISTCE0LOADIN
CELL_W[11].IMUX_SR_OPTINV[1]	PPC.C405TESTRESERVE1
CELL_W[11].IMUX_SR_OPTINV[2]	PPC.C405TESTRESERVE2
CELL_W[11].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[61]
CELL_W[11].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC0TXGMIIMIICLKIN
CELL_W[11].IMUX_CE_OPTINV[0]	PPC.LSSDSCANIN[8]
CELL_W[11].IMUX_CE_OPTINV[1]	PPC.LSSDSCANIN[9]
CELL_W[11].IMUX_CE_OPTINV[2]	PPC.LSSDSCANIN[10]
CELL_W[11].IMUX_CE_OPTINV[3]	PPC.LSSDSCANIN[11]
CELL_W[11].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[16]
CELL_W[11].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[17]
CELL_W[11].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[18]
CELL_W[11].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[19]
CELL_W[11].IMUX_IMUX[4]	PPC.CPMC405SYNCBYPASS
CELL_W[11].IMUX_IMUX[5]	PPC.TSTC405DSOCMABUSI[12]
CELL_W[11].IMUX_IMUX[6]	PPC.TSTC405DSOCMABUSI[13]
CELL_W[11].IMUX_IMUX[7]	PPC.TSTC405DSOCMABUSI[14]
CELL_W[11].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[15]
CELL_W[11].IMUX_IMUX[9]	PPC.TSTRESETCHIPI
CELL_W[11].IMUX_IMUX[10]	PPC.TSTRESETSYSI
CELL_W[11].IMUX_IMUX[11]	PPC.TSTC405ISOCMABUSI[12]
CELL_W[11].IMUX_IMUX[12]	PPC.TSTC405ISOCMABUSI[13]
CELL_W[11].IMUX_IMUX[13]	PPC.TSTC405ISOCMABUSI[14]
CELL_W[11].IMUX_IMUX[14]	PPC.TSTC405ISOCMABUSI[15]
CELL_W[11].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[16]
CELL_W[11].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[17]
CELL_W[11].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[18]
CELL_W[11].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[19]
CELL_W[11].OUT_BEST_TMIN[4]	PPC.C405DBGWBIAR[16]
CELL_W[11].OUT_BEST_TMIN[5]	PPC.C405DBGWBIAR[17]
CELL_W[11].OUT_BEST_TMIN[6]	PPC.C405DBGWBIAR[18]
CELL_W[11].OUT_BEST_TMIN[7]	PPC.C405DBGWBIAR[19]
CELL_W[11].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[12]
CELL_W[11].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[13]
CELL_W[11].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[14]
CELL_W[11].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[15]
CELL_W[11].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[48]
CELL_W[11].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[49]
CELL_W[11].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[50]
CELL_W[11].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[51]
CELL_W[11].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[16]
CELL_W[11].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[17]
CELL_W[11].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[18]
CELL_W[11].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[19]
CELL_W[11].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[48]
CELL_W[11].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[49]
CELL_W[11].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[50]
CELL_W[11].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[51]
CELL_W[11].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[16]
CELL_W[11].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[17]
CELL_W[11].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[18]
CELL_W[11].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[19]
CELL_W[12].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[60]
CELL_W[12].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[59]
CELL_W[12].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[58]
CELL_W[12].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[57]
CELL_W[12].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC0TXCLIENTCLKIN
CELL_W[12].IMUX_CE_OPTINV[0]	PPC.LSSDSCANIN[12]
CELL_W[12].IMUX_CE_OPTINV[1]	PPC.LSSDSCANIN[13]
CELL_W[12].IMUX_CE_OPTINV[2]	PPC.LSSDSCANIN[14]
CELL_W[12].IMUX_CE_OPTINV[3]	PPC.LSSDSCANIN[15]
CELL_W[12].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[12]
CELL_W[12].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[13]
CELL_W[12].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[14]
CELL_W[12].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[15]
CELL_W[12].IMUX_IMUX[4]	EMAC.TIEEMAC1CONFIGVEC[62]
CELL_W[12].IMUX_IMUX[5]	PPC.LSSDCE1CRAM
CELL_W[12].IMUX_IMUX[6]	PPC.LSSDCE1C3BIST
CELL_W[12].IMUX_IMUX[7]	PPC.CPMC405PLBSAMPLECYCLE
CELL_W[12].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[8]
CELL_W[12].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[9]
CELL_W[12].IMUX_IMUX[10]	PPC.TSTC405DSOCMABUSI[10]
CELL_W[12].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[11]
CELL_W[12].IMUX_IMUX[12]	PPC.TSTC405ISOCMABUSI[8]
CELL_W[12].IMUX_IMUX[13]	PPC.TSTC405ISOCMABUSI[9]
CELL_W[12].IMUX_IMUX[14]	PPC.TSTC405ISOCMABUSI[10]
CELL_W[12].IMUX_IMUX[15]	PPC.TSTC405ISOCMABUSI[11]
CELL_W[12].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[12]
CELL_W[12].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[13]
CELL_W[12].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[14]
CELL_W[12].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[15]
CELL_W[12].OUT_BEST_TMIN[4]	PPC.EXTDCRREAD
CELL_W[12].OUT_BEST_TMIN[5]	PPC.EXTDCRWRITE
CELL_W[12].OUT_BEST_TMIN[6]	PPC.C405DBGMSRWE
CELL_W[12].OUT_BEST_TMIN[7]	PPC.C405DBGWBIAR[12]
CELL_W[12].OUT_SEC_TMIN[0]	PPC.C405DBGWBIAR[13]
CELL_W[12].OUT_SEC_TMIN[1]	PPC.C405DBGWBIAR[14]
CELL_W[12].OUT_SEC_TMIN[2]	PPC.C405DBGWBIAR[15]
CELL_W[12].OUT_SEC_TMIN[3]	PPC.C405DBGLOADDATAONAPUDBUS
CELL_W[12].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[44]
CELL_W[12].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[45]
CELL_W[12].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[46]
CELL_W[12].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[47]
CELL_W[12].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[12]
CELL_W[12].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[13]
CELL_W[12].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[14]
CELL_W[12].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[15]
CELL_W[12].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[44]
CELL_W[12].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[45]
CELL_W[12].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[46]
CELL_W[12].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[47]
CELL_W[12].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[12]
CELL_W[12].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[13]
CELL_W[12].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[14]
CELL_W[12].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[15]
CELL_W[13].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[56]
CELL_W[13].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[55]
CELL_W[13].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[54]
CELL_W[13].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[53]
CELL_W[13].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC0MIITXCLK
CELL_W[13].IMUX_CE_OPTINV[0]	PPC.TIEPVRBIT[8]
CELL_W[13].IMUX_CE_OPTINV[1]	PPC.TIEPVRBIT[9]
CELL_W[13].IMUX_CE_OPTINV[2]	PPC.TIEPVRBIT[10]
CELL_W[13].IMUX_CE_OPTINV[3]	PPC.TIEPVRBIT[11]
CELL_W[13].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[8]
CELL_W[13].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[9]
CELL_W[13].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[10]
CELL_W[13].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[11]
CELL_W[13].IMUX_IMUX[4]	EMAC.TIEEMAC1CONFIGVEC[73]
CELL_W[13].IMUX_IMUX[5]	EMAC.TIEEMAC1CONFIGVEC[74]
CELL_W[13].IMUX_IMUX[6]	EMAC.TIEEMAC1CONFIGVEC[75]
CELL_W[13].IMUX_IMUX[7]	EMAC.TIEEMAC1CONFIGVEC[76]
CELL_W[13].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[4]
CELL_W[13].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[5]
CELL_W[13].IMUX_IMUX[10]	PPC.TSTC405DSOCMABUSI[6]
CELL_W[13].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[7]
CELL_W[13].IMUX_IMUX[12]	PPC.TSTC405ISOCMABUSI[4]
CELL_W[13].IMUX_IMUX[13]	PPC.TSTC405ISOCMABUSI[5]
CELL_W[13].IMUX_IMUX[14]	PPC.TSTC405ISOCMABUSI[6]
CELL_W[13].IMUX_IMUX[15]	PPC.TSTC405ISOCMABUSI[7]
CELL_W[13].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[8]
CELL_W[13].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[9]
CELL_W[13].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[10]
CELL_W[13].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[11]
CELL_W[13].OUT_BEST_TMIN[4]	PPC.EXTDCRABUS[9]
CELL_W[13].OUT_BEST_TMIN[5]	PPC.EXTDCRABUS[8]
CELL_W[13].OUT_BEST_TMIN[6]	PPC.C405DBGWBCOMPLETE
CELL_W[13].OUT_BEST_TMIN[7]	PPC.C405DBGWBIAR[8]
CELL_W[13].OUT_SEC_TMIN[0]	PPC.C405DBGWBIAR[9]
CELL_W[13].OUT_SEC_TMIN[1]	PPC.C405DBGWBIAR[10]
CELL_W[13].OUT_SEC_TMIN[2]	PPC.C405DBGWBIAR[11]
CELL_W[13].OUT_SEC_TMIN[3]	PPC.C405DBGSTOPACK
CELL_W[13].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[40]
CELL_W[13].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[41]
CELL_W[13].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[42]
CELL_W[13].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[43]
CELL_W[13].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[8]
CELL_W[13].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[9]
CELL_W[13].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[10]
CELL_W[13].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[11]
CELL_W[13].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[40]
CELL_W[13].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[41]
CELL_W[13].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[42]
CELL_W[13].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[43]
CELL_W[13].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[8]
CELL_W[13].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[9]
CELL_W[13].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[10]
CELL_W[13].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[11]
CELL_W[14].IMUX_SR_OPTINV[0]	PPC.MCBJTAGEN
CELL_W[14].IMUX_SR_OPTINV[1]	PPC.MCBCPUCLKEN
CELL_W[14].IMUX_SR_OPTINV[2]	PPC.MCBTIMEREN
CELL_W[14].IMUX_SR_OPTINV[3]	PPC.MCPPCRST
CELL_W[14].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC0RXCLK
CELL_W[14].IMUX_CE_OPTINV[0]	PPC.BISTCE0CONTINUE
CELL_W[14].IMUX_CE_OPTINV[1]	PPC.LSSDCE0TESTM3
CELL_W[14].IMUX_CE_OPTINV[2]	PPC.LSSDCE0SCAN
CELL_W[14].IMUX_CE_OPTINV[3]	PPC.LSSDCE0CNTLPOINT
CELL_W[14].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[4]
CELL_W[14].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[5]
CELL_W[14].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[6]
CELL_W[14].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[7]
CELL_W[14].IMUX_IMUX[4]	PPC.DBGC405DEBUGHALT
CELL_W[14].IMUX_IMUX[5]	PPC.DBGC405EXTBUSHOLDACK
CELL_W[14].IMUX_IMUX[6]	PPC.DBGC405UNCONDDEBUGEVENT
CELL_W[14].IMUX_IMUX[7]	PPC.CPMC405TIMERCLKEN
CELL_W[14].IMUX_IMUX[8]	PPC.CPMC405TIMERTICK
CELL_W[14].IMUX_IMUX[9]	PPC.CPMC405CPUCLKEN
CELL_W[14].IMUX_IMUX[10]	PPC.CPMC405JTAGCLKEN
CELL_W[14].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[0]
CELL_W[14].IMUX_IMUX[12]	PPC.TSTC405DSOCMABUSI[1]
CELL_W[14].IMUX_IMUX[13]	PPC.TSTC405DSOCMABUSI[2]
CELL_W[14].IMUX_IMUX[14]	PPC.TSTC405DSOCMABUSI[3]
CELL_W[14].IMUX_IMUX[15]	PPC.TSTC405ISOCMABUSI[0]
CELL_W[14].IMUX_IMUX[16]	PPC.TSTC405ISOCMABUSI[1]
CELL_W[14].IMUX_IMUX[17]	PPC.TSTC405ISOCMABUSI[2]
CELL_W[14].IMUX_IMUX[18]	PPC.TSTC405ISOCMABUSI[3]
CELL_W[14].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[4]
CELL_W[14].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[5]
CELL_W[14].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[6]
CELL_W[14].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[7]
CELL_W[14].OUT_BEST_TMIN[4]	PPC.EXTDCRABUS[4]
CELL_W[14].OUT_BEST_TMIN[5]	PPC.EXTDCRABUS[5]
CELL_W[14].OUT_BEST_TMIN[6]	PPC.EXTDCRABUS[6]
CELL_W[14].OUT_BEST_TMIN[7]	PPC.EXTDCRABUS[7]
CELL_W[14].OUT_SEC_TMIN[0]	PPC.C405DBGWBIAR[4]
CELL_W[14].OUT_SEC_TMIN[1]	PPC.C405DBGWBIAR[5]
CELL_W[14].OUT_SEC_TMIN[2]	PPC.C405DBGWBIAR[6]
CELL_W[14].OUT_SEC_TMIN[3]	PPC.C405DBGWBIAR[7]
CELL_W[14].OUT_SEC_TMIN[4]	EMAC.EMAC1CLIENTANINTERRUPT
CELL_W[14].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[36]
CELL_W[14].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[37]
CELL_W[14].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[38]
CELL_W[14].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[39]
CELL_W[14].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[4]
CELL_W[14].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[5]
CELL_W[14].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[6]
CELL_W[14].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[7]
CELL_W[14].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[36]
CELL_W[14].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[37]
CELL_W[14].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[38]
CELL_W[14].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[39]
CELL_W[14].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[4]
CELL_W[14].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[5]
CELL_W[14].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[6]
CELL_W[14].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[7]
CELL_W[15].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[63]
CELL_W[15].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[52]
CELL_W[15].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[51]
CELL_W[15].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[50]
CELL_W[15].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC0GTXCLK
CELL_W[15].IMUX_CE_OPTINV[0]	PPC.LSSDCE0A
CELL_W[15].IMUX_CE_OPTINV[1]	PPC.BISTCE0TESTM1
CELL_W[15].IMUX_CE_OPTINV[2]	PPC.BISTCE0DIAGSHIFTSEL
CELL_W[15].IMUX_CE_OPTINV[3]	PPC.BISTCE0LOADOPCODE
CELL_W[15].IMUX_IMUX[0]	PPC.EXTDCRDBUSIN[0]
CELL_W[15].IMUX_IMUX[1]	PPC.EXTDCRDBUSIN[1]
CELL_W[15].IMUX_IMUX[2]	PPC.EXTDCRDBUSIN[2]
CELL_W[15].IMUX_IMUX[3]	PPC.EXTDCRDBUSIN[3]
CELL_W[15].IMUX_IMUX[4]	PPC.EXTDCRACK
CELL_W[15].IMUX_IMUX[5]	PPC.CPMC405CORECLKINACTIVE
CELL_W[15].IMUX_IMUX[6]	EMAC.TIEEMAC1CONFIGVEC[64]
CELL_W[15].IMUX_IMUX[7]	EMAC.TIEEMAC1CONFIGVEC[65]
CELL_W[15].IMUX_IMUX[8]	EMAC.TIEEMAC1CONFIGVEC[66]
CELL_W[15].IMUX_IMUX[9]	EMAC.TIEEMAC1CONFIGVEC[67]
CELL_W[15].IMUX_IMUX[10]	EMAC.TIEEMAC1CONFIGVEC[68]
CELL_W[15].IMUX_IMUX[11]	EMAC.TIEEMAC1CONFIGVEC[69]
CELL_W[15].IMUX_IMUX[12]	EMAC.TIEEMAC1CONFIGVEC[70]
CELL_W[15].IMUX_IMUX[13]	EMAC.TIEEMAC1CONFIGVEC[71]
CELL_W[15].IMUX_IMUX[14]	EMAC.TIEEMAC1CONFIGVEC[72]
CELL_W[15].IMUX_IMUX[15]	EMAC.EMAC1TIBUS[4]
CELL_W[15].IMUX_IMUX[16]	PPC.LSSDCE1B
CELL_W[15].OUT_BEST_TMIN[0]	PPC.EXTDCRDBUSOUT[0]
CELL_W[15].OUT_BEST_TMIN[1]	PPC.EXTDCRDBUSOUT[1]
CELL_W[15].OUT_BEST_TMIN[2]	PPC.EXTDCRDBUSOUT[2]
CELL_W[15].OUT_BEST_TMIN[3]	PPC.EXTDCRDBUSOUT[3]
CELL_W[15].OUT_BEST_TMIN[4]	PPC.EXTDCRABUS[0]
CELL_W[15].OUT_BEST_TMIN[5]	PPC.EXTDCRABUS[1]
CELL_W[15].OUT_BEST_TMIN[6]	PPC.EXTDCRABUS[2]
CELL_W[15].OUT_BEST_TMIN[7]	PPC.EXTDCRABUS[3]
CELL_W[15].OUT_SEC_TMIN[0]	PPC.C405DBGWBIAR[0]
CELL_W[15].OUT_SEC_TMIN[1]	PPC.C405DBGWBIAR[1]
CELL_W[15].OUT_SEC_TMIN[2]	PPC.C405DBGWBIAR[2]
CELL_W[15].OUT_SEC_TMIN[3]	PPC.C405DBGWBIAR[3]
CELL_W[15].OUT_SEC_TMIN[4]	EMAC.EMAC1PHYENCOMMAALIGN
CELL_W[15].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[32]
CELL_W[15].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[33]
CELL_W[15].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[34]
CELL_W[15].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[35]
CELL_W[15].OUT_HALF0_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[0]
CELL_W[15].OUT_HALF0_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[1]
CELL_W[15].OUT_HALF0_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[2]
CELL_W[15].OUT_HALF0_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[3]
CELL_W[15].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[32]
CELL_W[15].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[33]
CELL_W[15].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[34]
CELL_W[15].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[35]
CELL_W[15].OUT_HALF1_BEL[4]	PPC.TSTDSOCMC405RDDBUSO[0]
CELL_W[15].OUT_HALF1_BEL[5]	PPC.TSTDSOCMC405RDDBUSO[1]
CELL_W[15].OUT_HALF1_BEL[6]	PPC.TSTDSOCMC405RDDBUSO[2]
CELL_W[15].OUT_HALF1_BEL[7]	PPC.TSTDSOCMC405RDDBUSO[3]
CELL_W[16].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[7]
CELL_W[16].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[6]
CELL_W[16].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[5]
CELL_W[16].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[4]
CELL_W[16].IMUX_CLK_OPTINV[0]	EMAC.HOSTCLK
CELL_W[16].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[11]
CELL_W[16].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[10]
CELL_W[16].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[9]
CELL_W[16].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[8]
CELL_W[16].IMUX_IMUX[0]	EMAC.HOSTWRDATA[14]
CELL_W[16].IMUX_IMUX[1]	EMAC.HOSTWRDATA[15]
CELL_W[16].IMUX_IMUX[2]	EMAC.HOSTWRDATA[16]
CELL_W[16].IMUX_IMUX[3]	EMAC.HOSTWRDATA[17]
CELL_W[16].IMUX_IMUX[4]	EMAC.HOSTWRDATA[18]
CELL_W[16].IMUX_IMUX[5]	EMAC.HOSTWRDATA[19]
CELL_W[16].IMUX_IMUX[6]	EMAC.HOSTWRDATA[20]
CELL_W[16].IMUX_IMUX[7]	EMAC.HOSTWRDATA[21]
CELL_W[16].IMUX_IMUX[8]	EMAC.HOSTWRDATA[22]
CELL_W[16].IMUX_IMUX[9]	EMAC.HOSTWRDATA[23]
CELL_W[16].IMUX_IMUX[10]	EMAC.HOSTWRDATA[24]
CELL_W[16].IMUX_IMUX[11]	EMAC.HOSTWRDATA[25]
CELL_W[16].IMUX_IMUX[12]	EMAC.CLIENTEMAC1PAUSEVAL[12]
CELL_W[16].IMUX_IMUX[13]	EMAC.CLIENTEMAC1PAUSEVAL[13]
CELL_W[16].IMUX_IMUX[14]	EMAC.CLIENTEMAC1PAUSEVAL[14]
CELL_W[16].IMUX_IMUX[15]	EMAC.CLIENTEMAC1PAUSEVAL[15]
CELL_W[16].IMUX_IMUX[16]	PPC.TIEPVRBIT[12]
CELL_W[16].IMUX_IMUX[17]	PPC.TIEPVRBIT[13]
CELL_W[16].IMUX_IMUX[18]	PPC.TIEPVRBIT[14]
CELL_W[16].IMUX_IMUX[19]	PPC.TIEPVRBIT[15]
CELL_W[16].OUT_BEST_TMIN[0]	EMAC.HOSTRDDATA[16]
CELL_W[16].OUT_BEST_TMIN[1]	EMAC.HOSTRDDATA[17]
CELL_W[16].OUT_BEST_TMIN[2]	EMAC.HOSTRDDATA[18]
CELL_W[16].OUT_BEST_TMIN[3]	EMAC.HOSTRDDATA[19]
CELL_W[16].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTRXD[12]
CELL_W[16].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXD[13]
CELL_W[16].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXD[14]
CELL_W[16].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXD[15]
CELL_W[16].OUT_SEC_TMIN[0]	EMAC.HOSTRDDATA[20]
CELL_W[16].OUT_SEC_TMIN[1]	EMAC.HOSTRDDATA[21]
CELL_W[16].OUT_SEC_TMIN[2]	EMAC.HOSTRDDATA[22]
CELL_W[16].OUT_SEC_TMIN[3]	EMAC.HOSTRDDATA[23]
CELL_W[16].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[28]
CELL_W[16].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[29]
CELL_W[16].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMWRDBUSO[28]
CELL_W[16].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMWRDBUSO[29]
CELL_W[16].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[30]
CELL_W[16].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[31]
CELL_W[16].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMSTOREREQO
CELL_W[16].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWAITO
CELL_W[16].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[28]
CELL_W[16].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[29]
CELL_W[16].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMWRDBUSO[28]
CELL_W[16].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMWRDBUSO[29]
CELL_W[16].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[30]
CELL_W[16].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[31]
CELL_W[16].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMSTOREREQO
CELL_W[16].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWAITO
CELL_W[17].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[15]
CELL_W[17].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[14]
CELL_W[17].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[13]
CELL_W[17].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[12]
CELL_W[17].IMUX_CLK_OPTINV[0]	EMAC.EMAC1TIBUS[0]
CELL_W[17].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[19]
CELL_W[17].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[18]
CELL_W[17].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[17]
CELL_W[17].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[16]
CELL_W[17].IMUX_IMUX[0]	EMAC.HOSTWRDATA[26]
CELL_W[17].IMUX_IMUX[1]	EMAC.HOSTWRDATA[27]
CELL_W[17].IMUX_IMUX[2]	EMAC.HOSTWRDATA[28]
CELL_W[17].IMUX_IMUX[3]	EMAC.HOSTWRDATA[29]
CELL_W[17].IMUX_IMUX[4]	EMAC.HOSTWRDATA[30]
CELL_W[17].IMUX_IMUX[5]	EMAC.HOSTWRDATA[31]
CELL_W[17].IMUX_IMUX[6]	EMAC.HOSTOPCODE[1]
CELL_W[17].IMUX_IMUX[7]	EMAC.HOSTOPCODE[0]
CELL_W[17].IMUX_IMUX[8]	EMAC.HOSTMIIMSEL
CELL_W[17].IMUX_IMUX[9]	EMAC.HOSTREQ
CELL_W[17].IMUX_IMUX[10]	EMAC.HOSTEMAC1SEL
CELL_W[17].IMUX_IMUX[11]	EMAC.CLIENTEMAC1PAUSEVAL[8]
CELL_W[17].IMUX_IMUX[12]	EMAC.CLIENTEMAC1PAUSEVAL[9]
CELL_W[17].IMUX_IMUX[13]	EMAC.CLIENTEMAC1PAUSEVAL[10]
CELL_W[17].IMUX_IMUX[14]	EMAC.CLIENTEMAC1PAUSEVAL[11]
CELL_W[17].IMUX_IMUX[15]	EMAC.DCREMACENABLE
CELL_W[17].IMUX_IMUX[16]	PPC.TIEPVRBIT[16]
CELL_W[17].IMUX_IMUX[17]	PPC.TIEPVRBIT[17]
CELL_W[17].IMUX_IMUX[18]	PPC.TIEPVRBIT[18]
CELL_W[17].IMUX_IMUX[19]	PPC.TIEPVRBIT[19]
CELL_W[17].OUT_BEST_TMIN[0]	EMAC.HOSTRDDATA[24]
CELL_W[17].OUT_BEST_TMIN[1]	EMAC.HOSTRDDATA[25]
CELL_W[17].OUT_BEST_TMIN[2]	EMAC.HOSTRDDATA[26]
CELL_W[17].OUT_BEST_TMIN[3]	EMAC.HOSTRDDATA[27]
CELL_W[17].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTRXD[8]
CELL_W[17].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXD[9]
CELL_W[17].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXD[10]
CELL_W[17].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXD[11]
CELL_W[17].OUT_SEC_TMIN[0]	EMAC.HOSTRDDATA[28]
CELL_W[17].OUT_SEC_TMIN[1]	EMAC.HOSTRDDATA[29]
CELL_W[17].OUT_SEC_TMIN[2]	EMAC.HOSTRDDATA[30]
CELL_W[17].OUT_SEC_TMIN[3]	EMAC.HOSTRDDATA[31]
CELL_W[17].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[24]
CELL_W[17].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[25]
CELL_W[17].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[26]
CELL_W[17].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[27]
CELL_W[17].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[24]
CELL_W[17].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[25]
CELL_W[17].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[26]
CELL_W[17].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[27]
CELL_W[17].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[24]
CELL_W[17].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[25]
CELL_W[17].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[26]
CELL_W[17].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[27]
CELL_W[17].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[24]
CELL_W[17].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[25]
CELL_W[17].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[26]
CELL_W[17].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[27]
CELL_W[18].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[23]
CELL_W[18].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[22]
CELL_W[18].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[21]
CELL_W[18].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[20]
CELL_W[18].IMUX_CLK_OPTINV[0]	EMAC.EMAC1TIBUS[1]
CELL_W[18].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[27]
CELL_W[18].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[26]
CELL_W[18].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[25]
CELL_W[18].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[24]
CELL_W[18].IMUX_IMUX[0]	EMAC.CLIENTEMAC1TXD[12]
CELL_W[18].IMUX_IMUX[1]	EMAC.CLIENTEMAC1TXD[13]
CELL_W[18].IMUX_IMUX[2]	EMAC.CLIENTEMAC1TXD[14]
CELL_W[18].IMUX_IMUX[3]	EMAC.CLIENTEMAC1TXD[15]
CELL_W[18].IMUX_IMUX[4]	EMAC.CLIENTEMAC1TXIFGDELAY[4]
CELL_W[18].IMUX_IMUX[5]	EMAC.CLIENTEMAC1TXIFGDELAY[5]
CELL_W[18].IMUX_IMUX[6]	EMAC.CLIENTEMAC1TXIFGDELAY[6]
CELL_W[18].IMUX_IMUX[7]	EMAC.CLIENTEMAC1TXIFGDELAY[7]
CELL_W[18].IMUX_IMUX[8]	EMAC.CLIENTEMAC1PAUSEVAL[4]
CELL_W[18].IMUX_IMUX[9]	EMAC.CLIENTEMAC1PAUSEVAL[5]
CELL_W[18].IMUX_IMUX[10]	EMAC.CLIENTEMAC1PAUSEVAL[6]
CELL_W[18].IMUX_IMUX[11]	EMAC.CLIENTEMAC1PAUSEVAL[7]
CELL_W[18].IMUX_IMUX[12]	EMAC.CLIENTEMAC1DCMLOCKED
CELL_W[18].IMUX_IMUX[13]	EMAC.TSTSIEMACI[0]
CELL_W[18].IMUX_IMUX[14]	EMAC.TSTSIEMACI[1]
CELL_W[18].IMUX_IMUX[15]	PPC.TIEPVRBIT[20]
CELL_W[18].IMUX_IMUX[16]	PPC.TIEPVRBIT[21]
CELL_W[18].IMUX_IMUX[17]	PPC.TIEPVRBIT[22]
CELL_W[18].IMUX_IMUX[18]	PPC.TIEPVRBIT[23]
CELL_W[18].OUT_BEST_TMIN[0]	EMAC.EMAC1PHYSYNCACQSTATUS
CELL_W[18].OUT_BEST_TMIN[1]	EMAC.EMAC1PHYMCLKOUT
CELL_W[18].OUT_BEST_TMIN[2]	EMAC.EMAC1PHYMDTRI
CELL_W[18].OUT_BEST_TMIN[3]	EMAC.EMAC1PHYMDOUT
CELL_W[18].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTRXD[4]
CELL_W[18].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXD[5]
CELL_W[18].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXD[6]
CELL_W[18].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXD[7]
CELL_W[18].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[8]
CELL_W[18].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[9]
CELL_W[18].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[10]
CELL_W[18].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[11]
CELL_W[18].OUT_SEC_TMIN[4]	EMAC.EMAC1CLIENTRXDVREG6
CELL_W[18].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[20]
CELL_W[18].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[21]
CELL_W[18].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[22]
CELL_W[18].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[23]
CELL_W[18].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[20]
CELL_W[18].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[21]
CELL_W[18].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[22]
CELL_W[18].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[23]
CELL_W[18].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[20]
CELL_W[18].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[21]
CELL_W[18].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[22]
CELL_W[18].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[23]
CELL_W[18].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[20]
CELL_W[18].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[21]
CELL_W[18].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[22]
CELL_W[18].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[23]
CELL_W[19].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[31]
CELL_W[19].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[30]
CELL_W[19].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[29]
CELL_W[19].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[28]
CELL_W[19].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC1MCLKIN
CELL_W[19].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[35]
CELL_W[19].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[34]
CELL_W[19].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[33]
CELL_W[19].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[32]
CELL_W[19].IMUX_IMUX[0]	EMAC.CLIENTEMAC1TXD[8]
CELL_W[19].IMUX_IMUX[1]	EMAC.CLIENTEMAC1TXD[9]
CELL_W[19].IMUX_IMUX[2]	EMAC.CLIENTEMAC1TXD[10]
CELL_W[19].IMUX_IMUX[3]	EMAC.CLIENTEMAC1TXD[11]
CELL_W[19].IMUX_IMUX[4]	EMAC.CLIENTEMAC1TXIFGDELAY[0]
CELL_W[19].IMUX_IMUX[5]	EMAC.CLIENTEMAC1TXIFGDELAY[1]
CELL_W[19].IMUX_IMUX[6]	EMAC.CLIENTEMAC1TXIFGDELAY[2]
CELL_W[19].IMUX_IMUX[7]	EMAC.CLIENTEMAC1TXIFGDELAY[3]
CELL_W[19].IMUX_IMUX[8]	EMAC.CLIENTEMAC1PAUSEVAL[0]
CELL_W[19].IMUX_IMUX[9]	EMAC.CLIENTEMAC1PAUSEVAL[1]
CELL_W[19].IMUX_IMUX[10]	EMAC.CLIENTEMAC1PAUSEVAL[2]
CELL_W[19].IMUX_IMUX[11]	EMAC.CLIENTEMAC1PAUSEVAL[3]
CELL_W[19].IMUX_IMUX[12]	EMAC.PHYEMAC1SIGNALDET
CELL_W[19].IMUX_IMUX[13]	EMAC.TSTSIEMACI[2]
CELL_W[19].IMUX_IMUX[14]	EMAC.TSTSIEMACI[3]
CELL_W[19].IMUX_IMUX[15]	PPC.TIEPVRBIT[24]
CELL_W[19].IMUX_IMUX[16]	PPC.TIEPVRBIT[25]
CELL_W[19].IMUX_IMUX[17]	PPC.TIEPVRBIT[26]
CELL_W[19].IMUX_IMUX[18]	PPC.TIEPVRBIT[27]
CELL_W[19].OUT_BEST_TMIN[0]	EMAC.EMAC1CLIENTRXD[0]
CELL_W[19].OUT_BEST_TMIN[1]	EMAC.EMAC1CLIENTRXD[1]
CELL_W[19].OUT_BEST_TMIN[2]	EMAC.EMAC1CLIENTRXD[2]
CELL_W[19].OUT_BEST_TMIN[3]	EMAC.EMAC1CLIENTRXD[3]
CELL_W[19].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTTXSTATS
CELL_W[19].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXSTATS[6]
CELL_W[19].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXSTATS[4]
CELL_W[19].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXSTATS[5]
CELL_W[19].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[4]
CELL_W[19].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[5]
CELL_W[19].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[6]
CELL_W[19].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[7]
CELL_W[19].OUT_SEC_TMIN[4]	EMAC.EMAC1PHYPOWERDOWN
CELL_W[19].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[16]
CELL_W[19].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[17]
CELL_W[19].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[18]
CELL_W[19].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[19]
CELL_W[19].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[16]
CELL_W[19].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[17]
CELL_W[19].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[18]
CELL_W[19].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[19]
CELL_W[19].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[16]
CELL_W[19].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[17]
CELL_W[19].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[18]
CELL_W[19].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[19]
CELL_W[19].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[16]
CELL_W[19].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[17]
CELL_W[19].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[18]
CELL_W[19].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[19]
CELL_W[20].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[39]
CELL_W[20].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[38]
CELL_W[20].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[37]
CELL_W[20].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[36]
CELL_W[20].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC1RXCLIENTCLKIN
CELL_W[20].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[43]
CELL_W[20].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[42]
CELL_W[20].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[41]
CELL_W[20].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[40]
CELL_W[20].IMUX_IMUX[0]	EMAC.CLIENTEMAC1TXFIRSTBYTE
CELL_W[20].IMUX_IMUX[1]	EMAC.PHYEMAC1RXCLKCORCNT[0]
CELL_W[20].IMUX_IMUX[2]	EMAC.PHYEMAC1RXRUNDISP
CELL_W[20].IMUX_IMUX[3]	EMAC.PHYEMAC1TXBUFERR
CELL_W[20].IMUX_IMUX[4]	EMAC.PHYEMAC1MDIN
CELL_W[20].IMUX_IMUX[5]	EMAC.CLIENTEMAC1TXD[4]
CELL_W[20].IMUX_IMUX[6]	EMAC.CLIENTEMAC1TXD[5]
CELL_W[20].IMUX_IMUX[7]	EMAC.CLIENTEMAC1TXD[6]
CELL_W[20].IMUX_IMUX[8]	EMAC.CLIENTEMAC1TXD[7]
CELL_W[20].IMUX_IMUX[9]	EMAC.TIEEMAC1CONFIGVEC[77]
CELL_W[20].IMUX_IMUX[10]	EMAC.TIEEMAC1CONFIGVEC[78]
CELL_W[20].IMUX_IMUX[11]	EMAC.TIEEMAC1CONFIGVEC[79]
CELL_W[20].IMUX_IMUX[12]	EMAC.PHYEMAC1RXBUFERR
CELL_W[20].IMUX_IMUX[13]	PPC.TSTSIGASKETI[0]
CELL_W[20].IMUX_IMUX[14]	PPC.TSTSIGASKETI[1]
CELL_W[20].IMUX_IMUX[15]	PPC.TIEPVRBIT[0]
CELL_W[20].IMUX_IMUX[16]	PPC.TIEPVRBIT[1]
CELL_W[20].IMUX_IMUX[17]	PPC.TIEPVRBIT[2]
CELL_W[20].IMUX_IMUX[18]	PPC.TIEPVRBIT[3]
CELL_W[20].OUT_BEST_TMIN[0]	EMAC.EMAC1PHYTXCHARDISPMODE
CELL_W[20].OUT_BEST_TMIN[1]	EMAC.EMAC1PHYTXCHARDISPVAL
CELL_W[20].OUT_BEST_TMIN[2]	EMAC.EMAC1CLIENTTXGMIIMIICLKOUT
CELL_W[20].OUT_BEST_TMIN[3]	EMAC.EMAC1PHYLOOPBACKMSB
CELL_W[20].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTRXCLIENTCLKOUT
CELL_W[20].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXFRAMEDROP
CELL_W[20].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXGOODFRAME
CELL_W[20].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXBADFRAME
CELL_W[20].OUT_SEC_TMIN[0]	PPC.TSTDCRC405DBUSINO[0]
CELL_W[20].OUT_SEC_TMIN[1]	PPC.TSTDCRC405DBUSINO[1]
CELL_W[20].OUT_SEC_TMIN[2]	PPC.TSTDCRC405DBUSINO[2]
CELL_W[20].OUT_SEC_TMIN[3]	PPC.TSTDCRC405DBUSINO[3]
CELL_W[20].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[12]
CELL_W[20].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[13]
CELL_W[20].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[14]
CELL_W[20].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[15]
CELL_W[20].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[12]
CELL_W[20].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[13]
CELL_W[20].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[14]
CELL_W[20].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[15]
CELL_W[20].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[12]
CELL_W[20].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[13]
CELL_W[20].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[14]
CELL_W[20].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[15]
CELL_W[20].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[12]
CELL_W[20].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[13]
CELL_W[20].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[14]
CELL_W[20].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[15]
CELL_W[21].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1UNICASTADDR[47]
CELL_W[21].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1UNICASTADDR[46]
CELL_W[21].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1UNICASTADDR[45]
CELL_W[21].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1UNICASTADDR[44]
CELL_W[21].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC1TXGMIIMIICLKIN
CELL_W[21].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[3]
CELL_W[21].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[2]
CELL_W[21].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[1]
CELL_W[21].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[0]
CELL_W[21].IMUX_IMUX[0]	EMAC.PHYEMAC1RXNOTINTABLE
CELL_W[21].IMUX_IMUX[1]	EMAC.PHYEMAC1RXDISPERR
CELL_W[21].IMUX_IMUX[2]	EMAC.PHYEMAC1RXCHARISK
CELL_W[21].IMUX_IMUX[3]	EMAC.PHYEMAC1RXCHARISCOMMA
CELL_W[21].IMUX_IMUX[4]	EMAC.PHYEMAC1RXBUFSTATUS[0]
CELL_W[21].IMUX_IMUX[5]	EMAC.PHYEMAC1RXBUFSTATUS[1]
CELL_W[21].IMUX_IMUX[6]	EMAC.PHYEMAC1RXLOSSOFSYNC[0]
CELL_W[21].IMUX_IMUX[7]	EMAC.PHYEMAC1RXLOSSOFSYNC[1]
CELL_W[21].IMUX_IMUX[8]	EMAC.CLIENTEMAC1TXD[0]
CELL_W[21].IMUX_IMUX[9]	EMAC.CLIENTEMAC1TXD[1]
CELL_W[21].IMUX_IMUX[10]	EMAC.CLIENTEMAC1TXD[2]
CELL_W[21].IMUX_IMUX[11]	EMAC.CLIENTEMAC1TXD[3]
CELL_W[21].IMUX_IMUX[12]	EMAC.PHYEMAC1RXCLKCORCNT[1]
CELL_W[21].IMUX_IMUX[13]	EMAC.PHYEMAC1RXCLKCORCNT[2]
CELL_W[21].IMUX_IMUX[14]	EMAC.TSTSIEMACI[4]
CELL_W[21].IMUX_IMUX[15]	PPC.TIEPVRBIT[4]
CELL_W[21].IMUX_IMUX[16]	PPC.TIEPVRBIT[5]
CELL_W[21].IMUX_IMUX[17]	PPC.TIEPVRBIT[6]
CELL_W[21].IMUX_IMUX[18]	PPC.TIEPVRBIT[7]
CELL_W[21].OUT_BEST_TMIN[0]	EMAC.EMAC1PHYMGTRXRESET
CELL_W[21].OUT_BEST_TMIN[1]	EMAC.EMAC1CLIENTTXCLIENTCLKOUT
CELL_W[21].OUT_BEST_TMIN[2]	EMAC.EMAC1CLIENTTXACK
CELL_W[21].OUT_BEST_TMIN[3]	EMAC.EMAC1CLIENTTXCOLLISION
CELL_W[21].OUT_BEST_TMIN[4]	EMAC.EMAC1CLIENTTXRETRANSMIT
CELL_W[21].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTTXSTATSBYTEVLD
CELL_W[21].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXSTATSBYTEVLD
CELL_W[21].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTTXSTATSVLD
CELL_W[21].OUT_SEC_TMIN[0]	PPC.DSOCMBRAMABUS[8]
CELL_W[21].OUT_SEC_TMIN[1]	PPC.DSOCMBRAMABUS[9]
CELL_W[21].OUT_SEC_TMIN[2]	PPC.DSOCMBRAMABUS[10]
CELL_W[21].OUT_SEC_TMIN[3]	PPC.DSOCMBRAMABUS[11]
CELL_W[21].OUT_SEC_TMIN[4]	PPC.TSTPLBSAMPLECYCLEO
CELL_W[21].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[8]
CELL_W[21].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[9]
CELL_W[21].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[10]
CELL_W[21].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[11]
CELL_W[21].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[8]
CELL_W[21].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[9]
CELL_W[21].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[10]
CELL_W[21].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[11]
CELL_W[21].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[8]
CELL_W[21].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[9]
CELL_W[21].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[10]
CELL_W[21].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[11]
CELL_W[21].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[8]
CELL_W[21].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[9]
CELL_W[21].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[10]
CELL_W[21].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[11]
CELL_W[22].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[7]
CELL_W[22].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[6]
CELL_W[22].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[5]
CELL_W[22].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[4]
CELL_W[22].IMUX_CLK_OPTINV[0]	EMAC.CLIENTEMAC1TXCLIENTCLKIN
CELL_W[22].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[11]
CELL_W[22].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[10]
CELL_W[22].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[9]
CELL_W[22].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[8]
CELL_W[22].IMUX_IMUX[0]	EMAC.PHYEMAC1RXD[4]
CELL_W[22].IMUX_IMUX[1]	EMAC.PHYEMAC1RXD[5]
CELL_W[22].IMUX_IMUX[2]	EMAC.PHYEMAC1RXD[6]
CELL_W[22].IMUX_IMUX[3]	EMAC.PHYEMAC1RXD[7]
CELL_W[22].IMUX_IMUX[4]	EMAC.PHYEMAC1RXDV
CELL_W[22].IMUX_IMUX[5]	EMAC.PHYEMAC1RXER
CELL_W[22].IMUX_IMUX[6]	EMAC.PHYEMAC1RXCOMMADET
CELL_W[22].IMUX_IMUX[7]	EMAC.PHYEMAC1RXCHECKINGCRC
CELL_W[22].IMUX_IMUX[8]	EMAC.EMAC1TIBUS[3]
CELL_W[22].IMUX_IMUX[9]	EMAC.EMAC1TIBUS[2]
CELL_W[22].IMUX_IMUX[10]	EMAC.CLIENTEMAC1TXUNDERRUN
CELL_W[22].IMUX_IMUX[11]	EMAC.CLIENTEMAC1PAUSEREQ
CELL_W[22].IMUX_IMUX[12]	EMAC.CLIENTEMAC1TXDVLD
CELL_W[22].IMUX_IMUX[13]	EMAC.CLIENTEMAC1TXDVLDMSW
CELL_W[22].IMUX_IMUX[14]	EMAC.PHYEMAC1PHYAD[1]
CELL_W[22].IMUX_IMUX[15]	EMAC.PHYEMAC1PHYAD[0]
CELL_W[22].IMUX_IMUX[16]	PPC.TSTTRSTNEGI
CELL_W[22].OUT_BEST_TMIN[0]	EMAC.EMAC1PHYTXD[4]
CELL_W[22].OUT_BEST_TMIN[1]	EMAC.EMAC1PHYTXD[5]
CELL_W[22].OUT_BEST_TMIN[2]	EMAC.EMAC1PHYTXD[6]
CELL_W[22].OUT_BEST_TMIN[3]	EMAC.EMAC1PHYTXD[7]
CELL_W[22].OUT_BEST_TMIN[4]	EMAC.EMAC1PHYTXCHARISK
CELL_W[22].OUT_BEST_TMIN[5]	EMAC.EMAC1CLIENTRXDVLDMSW
CELL_W[22].OUT_BEST_TMIN[6]	EMAC.EMAC1CLIENTRXDVLD
CELL_W[22].OUT_BEST_TMIN[7]	EMAC.EMAC1CLIENTRXSTATSVLD
CELL_W[22].OUT_SEC_TMIN[0]	EMAC.EMAC1CLIENTRXSTATS[0]
CELL_W[22].OUT_SEC_TMIN[1]	EMAC.EMAC1CLIENTRXSTATS[1]
CELL_W[22].OUT_SEC_TMIN[2]	EMAC.EMAC1CLIENTRXSTATS[2]
CELL_W[22].OUT_SEC_TMIN[3]	EMAC.EMAC1CLIENTRXSTATS[3]
CELL_W[22].OUT_SEC_TMIN[4]	PPC.DSOCMWRADDRVALID
CELL_W[22].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[4]
CELL_W[22].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[5]
CELL_W[22].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[6]
CELL_W[22].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[7]
CELL_W[22].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[4]
CELL_W[22].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[5]
CELL_W[22].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[6]
CELL_W[22].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[7]
CELL_W[22].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[4]
CELL_W[22].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[5]
CELL_W[22].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[6]
CELL_W[22].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[7]
CELL_W[22].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[4]
CELL_W[22].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[5]
CELL_W[22].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[6]
CELL_W[22].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[7]
CELL_W[23].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[15]
CELL_W[23].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[14]
CELL_W[23].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[13]
CELL_W[23].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[12]
CELL_W[23].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[19]
CELL_W[23].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[18]
CELL_W[23].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[17]
CELL_W[23].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[16]
CELL_W[23].IMUX_IMUX[0]	EMAC.PHYEMAC1RXD[0]
CELL_W[23].IMUX_IMUX[1]	EMAC.PHYEMAC1RXD[1]
CELL_W[23].IMUX_IMUX[2]	EMAC.PHYEMAC1RXD[2]
CELL_W[23].IMUX_IMUX[3]	EMAC.PHYEMAC1RXD[3]
CELL_W[23].IMUX_IMUX[4]	EMAC.PHYEMAC1CRS
CELL_W[23].IMUX_IMUX[5]	EMAC.PHYEMAC1COL
CELL_W[23].IMUX_IMUX[6]	EMAC.TIEEMAC1CONFIGVEC[25]
CELL_W[23].IMUX_IMUX[7]	EMAC.TIEEMAC1CONFIGVEC[24]
CELL_W[23].IMUX_IMUX[8]	EMAC.TIEEMAC1CONFIGVEC[23]
CELL_W[23].IMUX_IMUX[9]	EMAC.TIEEMAC1CONFIGVEC[22]
CELL_W[23].IMUX_IMUX[10]	EMAC.TIEEMAC1CONFIGVEC[21]
CELL_W[23].IMUX_IMUX[11]	EMAC.TIEEMAC1CONFIGVEC[20]
CELL_W[23].IMUX_IMUX[12]	EMAC.PHYEMAC1PHYAD[4]
CELL_W[23].IMUX_IMUX[13]	EMAC.PHYEMAC1PHYAD[3]
CELL_W[23].IMUX_IMUX[14]	EMAC.PHYEMAC1PHYAD[2]
CELL_W[23].IMUX_IMUX[15]	EMAC.TSTSIEMACI[5]
CELL_W[23].OUT_BEST_TMIN[0]	EMAC.EMAC1PHYTXD[0]
CELL_W[23].OUT_BEST_TMIN[1]	EMAC.EMAC1PHYTXD[1]
CELL_W[23].OUT_BEST_TMIN[2]	EMAC.EMAC1PHYTXD[2]
CELL_W[23].OUT_BEST_TMIN[3]	EMAC.EMAC1PHYTXD[3]
CELL_W[23].OUT_BEST_TMIN[4]	EMAC.EMAC1PHYTXCLK
CELL_W[23].OUT_BEST_TMIN[5]	EMAC.EMAC1PHYTXEN
CELL_W[23].OUT_BEST_TMIN[6]	EMAC.EMAC1PHYTXER
CELL_W[23].OUT_BEST_TMIN[7]	EMAC.DCRHOSTDONEIR
CELL_W[23].OUT_SEC_TMIN[0]	PPC.DSOCMBRAMABUS[12]
CELL_W[23].OUT_SEC_TMIN[1]	PPC.DSOCMBRAMABUS[13]
CELL_W[23].OUT_SEC_TMIN[2]	PPC.DSOCMBRAMABUS[14]
CELL_W[23].OUT_SEC_TMIN[3]	PPC.DSOCMBRAMABUS[15]
CELL_W[23].OUT_SEC_TMIN[4]	EMAC.EMAC1PHYMGTTXRESET
CELL_W[23].OUT_HALF0_BEL[0]	PPC.TSTC405DSOCMABUSO[0]
CELL_W[23].OUT_HALF0_BEL[1]	PPC.TSTC405DSOCMABUSO[1]
CELL_W[23].OUT_HALF0_BEL[2]	PPC.TSTC405DSOCMABUSO[2]
CELL_W[23].OUT_HALF0_BEL[3]	PPC.TSTC405DSOCMABUSO[3]
CELL_W[23].OUT_HALF0_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[0]
CELL_W[23].OUT_HALF0_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[1]
CELL_W[23].OUT_HALF0_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[2]
CELL_W[23].OUT_HALF0_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[3]
CELL_W[23].OUT_HALF1_BEL[0]	PPC.TSTC405DSOCMABUSO[0]
CELL_W[23].OUT_HALF1_BEL[1]	PPC.TSTC405DSOCMABUSO[1]
CELL_W[23].OUT_HALF1_BEL[2]	PPC.TSTC405DSOCMABUSO[2]
CELL_W[23].OUT_HALF1_BEL[3]	PPC.TSTC405DSOCMABUSO[3]
CELL_W[23].OUT_HALF1_BEL[4]	PPC.TSTC405DSOCMWRDBUSO[0]
CELL_W[23].OUT_HALF1_BEL[5]	PPC.TSTC405DSOCMWRDBUSO[1]
CELL_W[23].OUT_HALF1_BEL[6]	PPC.TSTC405DSOCMWRDBUSO[2]
CELL_W[23].OUT_HALF1_BEL[7]	PPC.TSTC405DSOCMWRDBUSO[3]
CELL_E[0].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI8[19]
CELL_E[0].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI8[18]
CELL_E[0].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI8[17]
CELL_E[0].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI8[16]
CELL_E[0].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI8[23]
CELL_E[0].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI8[22]
CELL_E[0].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI8[21]
CELL_E[0].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI8[20]
CELL_E[0].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[60]
CELL_E[0].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[61]
CELL_E[0].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[62]
CELL_E[0].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[63]
CELL_E[0].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[60]
CELL_E[0].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[61]
CELL_E[0].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[62]
CELL_E[0].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[63]
CELL_E[0].IMUX_IMUX[8]	PPC.TRCC405TRACEDISABLE
CELL_E[0].IMUX_IMUX[9]	PPC.TRCC405TRIGGEREVENTIN
CELL_E[0].IMUX_IMUX[10]	PPC.TSTC405APUWBBYTEENI[0]
CELL_E[0].IMUX_IMUX[11]	PPC.TSTC405APUWBBYTEENI[1]
CELL_E[0].IMUX_IMUX[12]	PPC.TSTC405APUWBBYTEENI[2]
CELL_E[0].IMUX_IMUX[13]	PPC.TSTC405APUWBBYTEENI[3]
CELL_E[0].IMUX_IMUX[14]	PPC.TSTC405ISOCMREQPENDINGI
CELL_E[0].IMUX_IMUX[15]	PPC.TSTC405ISOCMICUREADYI
CELL_E[0].IMUX_IMUX[16]	PPC.TSTC405ISOCMXLTVALIDI
CELL_E[0].IMUX_IMUX[17]	PPC.TSTC405ISOCMABORTI
CELL_E[0].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[60]
CELL_E[0].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[61]
CELL_E[0].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[62]
CELL_E[0].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[63]
CELL_E[0].OUT_BEST_TMIN[4]	PPC.C405TRCTRIGGEREVENTTYPE[0]
CELL_E[0].OUT_BEST_TMIN[5]	PPC.C405TRCTRIGGEREVENTTYPE[1]
CELL_E[0].OUT_BEST_TMIN[6]	PPC.C405TRCTRIGGEREVENTTYPE[2]
CELL_E[0].OUT_BEST_TMIN[7]	PPC.C405TRCTRIGGEREVENTTYPE[3]
CELL_E[0].OUT_SEC_TMIN[0]	PPC.C405TRCTRIGGEREVENTTYPE[4]
CELL_E[0].OUT_SEC_TMIN[1]	PPC.C405TRCTRIGGEREVENTTYPE[5]
CELL_E[0].OUT_SEC_TMIN[2]	PPC.C405TRCTRIGGEREVENTTYPE[6]
CELL_E[0].OUT_SEC_TMIN[3]	PPC.C405TRCTRIGGEREVENTTYPE[7]
CELL_E[0].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[24]
CELL_E[0].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[25]
CELL_E[0].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[26]
CELL_E[0].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[27]
CELL_E[0].OUT_HALF0_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[28]
CELL_E[0].OUT_HALF0_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[29]
CELL_E[0].OUT_HALF0_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[30]
CELL_E[0].OUT_HALF0_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[31]
CELL_E[0].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[24]
CELL_E[0].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[25]
CELL_E[0].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[26]
CELL_E[0].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[27]
CELL_E[0].OUT_HALF1_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[28]
CELL_E[0].OUT_HALF1_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[29]
CELL_E[0].OUT_HALF1_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[30]
CELL_E[0].OUT_HALF1_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[31]
CELL_E[1].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI8[11]
CELL_E[1].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI8[10]
CELL_E[1].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI8[9]
CELL_E[1].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI8[8]
CELL_E[1].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI8[15]
CELL_E[1].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI8[14]
CELL_E[1].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI8[13]
CELL_E[1].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI8[12]
CELL_E[1].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[56]
CELL_E[1].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[57]
CELL_E[1].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[58]
CELL_E[1].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[59]
CELL_E[1].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[56]
CELL_E[1].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[57]
CELL_E[1].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[58]
CELL_E[1].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[59]
CELL_E[1].IMUX_IMUX[8]	PPC.TSTC405APUEXERBDATAI[24]
CELL_E[1].IMUX_IMUX[9]	PPC.TSTC405APUEXERBDATAI[25]
CELL_E[1].IMUX_IMUX[10]	PPC.TSTC405APUEXERBDATAI[26]
CELL_E[1].IMUX_IMUX[11]	PPC.TSTC405APUEXERBDATAI[27]
CELL_E[1].IMUX_IMUX[12]	PPC.TSTC405APUEXERBDATAI[28]
CELL_E[1].IMUX_IMUX[13]	PPC.TSTC405APUEXERBDATAI[29]
CELL_E[1].IMUX_IMUX[14]	PPC.TSTC405APUEXERBDATAI[30]
CELL_E[1].IMUX_IMUX[15]	PPC.TSTC405APUEXERBDATAI[31]
CELL_E[1].IMUX_IMUX[16]	PPC.TSTC405APUEXELOADDBUSI[28]
CELL_E[1].IMUX_IMUX[17]	PPC.TSTC405APUEXELOADDBUSI[29]
CELL_E[1].IMUX_IMUX[18]	PPC.TSTC405APUEXELOADDBUSI[30]
CELL_E[1].IMUX_IMUX[19]	PPC.TSTC405APUEXELOADDBUSI[31]
CELL_E[1].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[56]
CELL_E[1].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[57]
CELL_E[1].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[58]
CELL_E[1].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[59]
CELL_E[1].OUT_BEST_TMIN[4]	PPC.C405TRCTRIGGEREVENTTYPE[8]
CELL_E[1].OUT_BEST_TMIN[5]	PPC.C405TRCTRIGGEREVENTTYPE[9]
CELL_E[1].OUT_BEST_TMIN[6]	PPC.C405TRCTRIGGEREVENTTYPE[10]
CELL_E[1].OUT_BEST_TMIN[7]	PPC.C405TRCTRIGGEREVENTOUT
CELL_E[1].OUT_SEC_TMIN[0]	PPC.C405TRCTRACESTATUS[0]
CELL_E[1].OUT_SEC_TMIN[1]	PPC.C405TRCTRACESTATUS[1]
CELL_E[1].OUT_SEC_TMIN[2]	PPC.C405TRCTRACESTATUS[2]
CELL_E[1].OUT_SEC_TMIN[3]	PPC.C405TRCTRACESTATUS[3]
CELL_E[1].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[16]
CELL_E[1].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[17]
CELL_E[1].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[18]
CELL_E[1].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[19]
CELL_E[1].OUT_HALF0_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[20]
CELL_E[1].OUT_HALF0_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[21]
CELL_E[1].OUT_HALF0_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[22]
CELL_E[1].OUT_HALF0_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[23]
CELL_E[1].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[16]
CELL_E[1].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[17]
CELL_E[1].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[18]
CELL_E[1].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[19]
CELL_E[1].OUT_HALF1_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[20]
CELL_E[1].OUT_HALF1_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[21]
CELL_E[1].OUT_HALF1_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[22]
CELL_E[1].OUT_HALF1_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[23]
CELL_E[2].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI8[3]
CELL_E[2].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI8[2]
CELL_E[2].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI8[1]
CELL_E[2].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI8[0]
CELL_E[2].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI8[7]
CELL_E[2].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI8[6]
CELL_E[2].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI8[5]
CELL_E[2].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI8[4]
CELL_E[2].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[52]
CELL_E[2].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[53]
CELL_E[2].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[54]
CELL_E[2].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[55]
CELL_E[2].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[52]
CELL_E[2].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[53]
CELL_E[2].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[54]
CELL_E[2].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[55]
CELL_E[2].IMUX_IMUX[8]	PPC.TSTC405APUEXELOADDBUSI[20]
CELL_E[2].IMUX_IMUX[9]	PPC.TSTC405APUEXELOADDBUSI[21]
CELL_E[2].IMUX_IMUX[10]	PPC.TSTC405APUEXELOADDBUSI[22]
CELL_E[2].IMUX_IMUX[11]	PPC.TSTC405APUEXELOADDBUSI[23]
CELL_E[2].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[24]
CELL_E[2].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[25]
CELL_E[2].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[26]
CELL_E[2].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[27]
CELL_E[2].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[20]
CELL_E[2].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[21]
CELL_E[2].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[22]
CELL_E[2].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[23]
CELL_E[2].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[52]
CELL_E[2].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[53]
CELL_E[2].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[54]
CELL_E[2].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[55]
CELL_E[2].OUT_BEST_TMIN[4]	PPC.C405PLBDCUBE[4]
CELL_E[2].OUT_BEST_TMIN[5]	PPC.C405PLBDCUBE[5]
CELL_E[2].OUT_BEST_TMIN[6]	PPC.C405PLBDCUBE[6]
CELL_E[2].OUT_BEST_TMIN[7]	PPC.C405PLBDCUBE[7]
CELL_E[2].OUT_SEC_TMIN[0]	PPC.C405PLBICUSIZE[2]
CELL_E[2].OUT_SEC_TMIN[1]	PPC.C405PLBICUSIZE[3]
CELL_E[2].OUT_SEC_TMIN[2]	PPC.C405PLBICUU0ATTR
CELL_E[2].OUT_SEC_TMIN[3]	PPC.C405TRCCYCLE
CELL_E[2].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[8]
CELL_E[2].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[9]
CELL_E[2].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[10]
CELL_E[2].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[11]
CELL_E[2].OUT_HALF0_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[12]
CELL_E[2].OUT_HALF0_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[13]
CELL_E[2].OUT_HALF0_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[14]
CELL_E[2].OUT_HALF0_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[15]
CELL_E[2].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[8]
CELL_E[2].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[9]
CELL_E[2].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[10]
CELL_E[2].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[11]
CELL_E[2].OUT_HALF1_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[12]
CELL_E[2].OUT_HALF1_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[13]
CELL_E[2].OUT_HALF1_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[14]
CELL_E[2].OUT_HALF1_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[15]
CELL_E[3].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI7[19]
CELL_E[3].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI7[18]
CELL_E[3].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI7[17]
CELL_E[3].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI7[16]
CELL_E[3].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI7[23]
CELL_E[3].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI7[22]
CELL_E[3].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI7[21]
CELL_E[3].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI7[20]
CELL_E[3].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[48]
CELL_E[3].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[49]
CELL_E[3].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[50]
CELL_E[3].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[51]
CELL_E[3].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[48]
CELL_E[3].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[49]
CELL_E[3].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[50]
CELL_E[3].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[51]
CELL_E[3].IMUX_IMUX[8]	PPC.TSTC405DCRABUSI[0]
CELL_E[3].IMUX_IMUX[9]	PPC.TSTC405DCRABUSI[1]
CELL_E[3].IMUX_IMUX[10]	PPC.TSTC405DCRABUSI[2]
CELL_E[3].IMUX_IMUX[11]	PPC.TSTC405DCRABUSI[3]
CELL_E[3].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[16]
CELL_E[3].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[17]
CELL_E[3].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[18]
CELL_E[3].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[19]
CELL_E[3].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[16]
CELL_E[3].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[17]
CELL_E[3].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[18]
CELL_E[3].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[19]
CELL_E[3].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[48]
CELL_E[3].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[49]
CELL_E[3].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[50]
CELL_E[3].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[51]
CELL_E[3].OUT_BEST_TMIN[4]	PPC.C405PLBICUREQUEST
CELL_E[3].OUT_BEST_TMIN[5]	PPC.C405PLBICUPRIORITY[0]
CELL_E[3].OUT_BEST_TMIN[6]	PPC.C405PLBICUPRIORITY[1]
CELL_E[3].OUT_BEST_TMIN[7]	PPC.C405PLBICUABORT
CELL_E[3].OUT_SEC_TMIN[0]	PPC.C405PLBDCUSIZE2
CELL_E[3].OUT_SEC_TMIN[1]	PPC.C405PLBDCUU0ATTR
CELL_E[3].OUT_SEC_TMIN[2]	PPC.C405PLBDCUCACHEABLE
CELL_E[3].OUT_SEC_TMIN[3]	PPC.C405PLBICUCACHEABLE
CELL_E[3].OUT_HALF0_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[0]
CELL_E[3].OUT_HALF0_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[1]
CELL_E[3].OUT_HALF0_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[2]
CELL_E[3].OUT_HALF0_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[3]
CELL_E[3].OUT_HALF0_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[4]
CELL_E[3].OUT_HALF0_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[5]
CELL_E[3].OUT_HALF0_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[6]
CELL_E[3].OUT_HALF0_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[7]
CELL_E[3].OUT_HALF1_BEL[0]	PPC.TSTISOCMC405READDATAOUTO[0]
CELL_E[3].OUT_HALF1_BEL[1]	PPC.TSTISOCMC405READDATAOUTO[1]
CELL_E[3].OUT_HALF1_BEL[2]	PPC.TSTISOCMC405READDATAOUTO[2]
CELL_E[3].OUT_HALF1_BEL[3]	PPC.TSTISOCMC405READDATAOUTO[3]
CELL_E[3].OUT_HALF1_BEL[4]	PPC.TSTISOCMC405READDATAOUTO[4]
CELL_E[3].OUT_HALF1_BEL[5]	PPC.TSTISOCMC405READDATAOUTO[5]
CELL_E[3].OUT_HALF1_BEL[6]	PPC.TSTISOCMC405READDATAOUTO[6]
CELL_E[3].OUT_HALF1_BEL[7]	PPC.TSTISOCMC405READDATAOUTO[7]
CELL_E[4].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI7[11]
CELL_E[4].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI7[10]
CELL_E[4].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI7[9]
CELL_E[4].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI7[8]
CELL_E[4].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI7[15]
CELL_E[4].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI7[14]
CELL_E[4].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI7[13]
CELL_E[4].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI7[12]
CELL_E[4].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[44]
CELL_E[4].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[45]
CELL_E[4].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[46]
CELL_E[4].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[47]
CELL_E[4].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[44]
CELL_E[4].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[45]
CELL_E[4].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[46]
CELL_E[4].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[47]
CELL_E[4].IMUX_IMUX[8]	PPC.TSTC405DCRABUSI[4]
CELL_E[4].IMUX_IMUX[9]	PPC.TSTC405DCRABUSI[5]
CELL_E[4].IMUX_IMUX[10]	PPC.TSTC405DCRABUSI[6]
CELL_E[4].IMUX_IMUX[11]	PPC.TSTC405DCRABUSI[7]
CELL_E[4].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[12]
CELL_E[4].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[13]
CELL_E[4].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[14]
CELL_E[4].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[15]
CELL_E[4].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[12]
CELL_E[4].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[13]
CELL_E[4].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[14]
CELL_E[4].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[15]
CELL_E[4].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[44]
CELL_E[4].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[45]
CELL_E[4].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[46]
CELL_E[4].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[47]
CELL_E[4].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[28]
CELL_E[4].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[29]
CELL_E[4].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[30]
CELL_E[4].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[31]
CELL_E[4].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[28]
CELL_E[4].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[29]
CELL_E[4].OUT_SEC_TMIN[2]	PPC.TSTAPUC405EXEXEROVO
CELL_E[4].OUT_SEC_TMIN[3]	PPC.TSTAPUC405EXCEPTIONO
CELL_E[4].OUT_HALF0_BEL[0]	PPC.TSTAPUC405EXEBLOCKINGMCOO
CELL_E[4].OUT_HALF0_BEL[1]	PPC.TSTAPUC405EXENONBLOCKINGMCOO
CELL_E[4].OUT_HALF0_BEL[2]	PPC.TSTAPUC405EXEBUSYO
CELL_E[4].OUT_HALF0_BEL[3]	PPC.TSTAPUC405EXEXERCAO
CELL_E[4].OUT_HALF0_BEL[4]	PPC.TSTAPUC405DCDTRAPLEO
CELL_E[4].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXELDDEPENDO
CELL_E[4].OUT_HALF0_BEL[6]	PPC.TSTAPUC405WBLDDEPENDO
CELL_E[4].OUT_HALF0_BEL[7]	PPC.TSTAPUC405LWBLDDEPENDO
CELL_E[4].OUT_HALF1_BEL[0]	PPC.TSTAPUC405EXEBLOCKINGMCOO
CELL_E[4].OUT_HALF1_BEL[1]	PPC.TSTAPUC405EXENONBLOCKINGMCOO
CELL_E[4].OUT_HALF1_BEL[2]	PPC.TSTAPUC405EXEBUSYO
CELL_E[4].OUT_HALF1_BEL[3]	PPC.TSTAPUC405EXEXERCAO
CELL_E[4].OUT_HALF1_BEL[4]	PPC.TSTAPUC405DCDTRAPLEO
CELL_E[4].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXELDDEPENDO
CELL_E[4].OUT_HALF1_BEL[6]	PPC.TSTAPUC405WBLDDEPENDO
CELL_E[4].OUT_HALF1_BEL[7]	PPC.TSTAPUC405LWBLDDEPENDO
CELL_E[5].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI7[3]
CELL_E[5].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI7[2]
CELL_E[5].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI7[1]
CELL_E[5].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI7[0]
CELL_E[5].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI7[7]
CELL_E[5].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI7[6]
CELL_E[5].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI7[5]
CELL_E[5].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI7[4]
CELL_E[5].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[40]
CELL_E[5].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[41]
CELL_E[5].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[42]
CELL_E[5].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[43]
CELL_E[5].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[40]
CELL_E[5].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[41]
CELL_E[5].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[42]
CELL_E[5].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[43]
CELL_E[5].IMUX_IMUX[8]	PPC.TSTC405DCRABUSI[8]
CELL_E[5].IMUX_IMUX[9]	PPC.TSTC405DCRABUSI[9]
CELL_E[5].IMUX_IMUX[10]	PPC.TSTC405DCRREADI
CELL_E[5].IMUX_IMUX[11]	PPC.TSTC405DCRWRITEI
CELL_E[5].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[8]
CELL_E[5].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[9]
CELL_E[5].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[10]
CELL_E[5].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[11]
CELL_E[5].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[8]
CELL_E[5].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[9]
CELL_E[5].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[10]
CELL_E[5].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[11]
CELL_E[5].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[40]
CELL_E[5].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[41]
CELL_E[5].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[42]
CELL_E[5].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[43]
CELL_E[5].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[24]
CELL_E[5].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[25]
CELL_E[5].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[26]
CELL_E[5].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[27]
CELL_E[5].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[24]
CELL_E[5].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[25]
CELL_E[5].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[26]
CELL_E[5].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[27]
CELL_E[5].OUT_HALF0_BEL[0]	PPC.TSTAPUC405DCDLDSTWDO
CELL_E[5].OUT_HALF0_BEL[1]	PPC.TSTAPUC405DCDLDSTDWO
CELL_E[5].OUT_HALF0_BEL[2]	PPC.TSTAPUC405DCDLDSTQWO
CELL_E[5].OUT_HALF0_BEL[3]	PPC.TSTAPUC405DCDTRAPBEO
CELL_E[5].OUT_HALF0_BEL[4]	PPC.TSTAPUC405DCDCRENO
CELL_E[5].OUT_HALF0_BEL[5]	PPC.TSTAPUC405DCDUPDATEO
CELL_E[5].OUT_HALF0_BEL[6]	PPC.TSTAPUC405SLEEPREQO
CELL_E[5].OUT_HALF0_BEL[7]	PPC.TSTAPUC405DCDLDSTHWO
CELL_E[5].OUT_HALF1_BEL[0]	PPC.TSTAPUC405DCDLDSTWDO
CELL_E[5].OUT_HALF1_BEL[1]	PPC.TSTAPUC405DCDLDSTDWO
CELL_E[5].OUT_HALF1_BEL[2]	PPC.TSTAPUC405DCDLDSTQWO
CELL_E[5].OUT_HALF1_BEL[3]	PPC.TSTAPUC405DCDTRAPBEO
CELL_E[5].OUT_HALF1_BEL[4]	PPC.TSTAPUC405DCDCRENO
CELL_E[5].OUT_HALF1_BEL[5]	PPC.TSTAPUC405DCDUPDATEO
CELL_E[5].OUT_HALF1_BEL[6]	PPC.TSTAPUC405SLEEPREQO
CELL_E[5].OUT_HALF1_BEL[7]	PPC.TSTAPUC405DCDLDSTHWO
CELL_E[6].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI6[19]
CELL_E[6].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI6[18]
CELL_E[6].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI6[17]
CELL_E[6].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI6[16]
CELL_E[6].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI6[23]
CELL_E[6].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI6[22]
CELL_E[6].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI6[21]
CELL_E[6].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI6[20]
CELL_E[6].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[36]
CELL_E[6].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[37]
CELL_E[6].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[38]
CELL_E[6].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[39]
CELL_E[6].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[36]
CELL_E[6].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[37]
CELL_E[6].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[38]
CELL_E[6].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[39]
CELL_E[6].IMUX_IMUX[8]	PPC.PLBC405ICURDWDADDR[1]
CELL_E[6].IMUX_IMUX[9]	PPC.PLBC405ICURDWDADDR[2]
CELL_E[6].IMUX_IMUX[10]	PPC.PLBC405ICURDWDADDR[3]
CELL_E[6].IMUX_IMUX[11]	PPC.PLBC405ICURDDACK
CELL_E[6].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[4]
CELL_E[6].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[5]
CELL_E[6].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[6]
CELL_E[6].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[7]
CELL_E[6].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[4]
CELL_E[6].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[5]
CELL_E[6].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[6]
CELL_E[6].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[7]
CELL_E[6].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[36]
CELL_E[6].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[37]
CELL_E[6].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[38]
CELL_E[6].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[39]
CELL_E[6].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[20]
CELL_E[6].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[21]
CELL_E[6].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[22]
CELL_E[6].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[23]
CELL_E[6].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[20]
CELL_E[6].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[21]
CELL_E[6].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[22]
CELL_E[6].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[23]
CELL_E[6].OUT_HALF0_BEL[0]	PPC.TSTAPUC405DCDSTOREO
CELL_E[6].OUT_HALF0_BEL[1]	PPC.TSTAPUC405DCDXERCAENO
CELL_E[6].OUT_HALF0_BEL[2]	PPC.TSTAPUC405DCDXEROVENO
CELL_E[6].OUT_HALF0_BEL[3]	PPC.TSTAPUC405DCDPRIVOPO
CELL_E[6].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXECRO[0]
CELL_E[6].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXECRO[1]
CELL_E[6].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXECRO[2]
CELL_E[6].OUT_HALF0_BEL[7]	PPC.TSTAPUC405EXECRO[3]
CELL_E[6].OUT_HALF1_BEL[0]	PPC.TSTAPUC405DCDSTOREO
CELL_E[6].OUT_HALF1_BEL[1]	PPC.TSTAPUC405DCDXERCAENO
CELL_E[6].OUT_HALF1_BEL[2]	PPC.TSTAPUC405DCDXEROVENO
CELL_E[6].OUT_HALF1_BEL[3]	PPC.TSTAPUC405DCDPRIVOPO
CELL_E[6].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXECRO[0]
CELL_E[6].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXECRO[1]
CELL_E[6].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXECRO[2]
CELL_E[6].OUT_HALF1_BEL[7]	PPC.TSTAPUC405EXECRO[3]
CELL_E[7].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI6[11]
CELL_E[7].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI6[10]
CELL_E[7].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI6[9]
CELL_E[7].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI6[8]
CELL_E[7].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI6[15]
CELL_E[7].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI6[14]
CELL_E[7].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI6[13]
CELL_E[7].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI6[12]
CELL_E[7].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[32]
CELL_E[7].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[33]
CELL_E[7].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[34]
CELL_E[7].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[35]
CELL_E[7].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[32]
CELL_E[7].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[33]
CELL_E[7].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[34]
CELL_E[7].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[35]
CELL_E[7].IMUX_IMUX[8]	PPC.PLBC405ICUADDRACK
CELL_E[7].IMUX_IMUX[9]	PPC.PLBC405ICUSSIZE1
CELL_E[7].IMUX_IMUX[10]	PPC.PLBC405ICUBUSY
CELL_E[7].IMUX_IMUX[11]	PPC.PLBC405ICUERR
CELL_E[7].IMUX_IMUX[12]	PPC.TSTC405APUEXELOADDBUSI[0]
CELL_E[7].IMUX_IMUX[13]	PPC.TSTC405APUEXELOADDBUSI[1]
CELL_E[7].IMUX_IMUX[14]	PPC.TSTC405APUEXELOADDBUSI[2]
CELL_E[7].IMUX_IMUX[15]	PPC.TSTC405APUEXELOADDBUSI[3]
CELL_E[7].IMUX_IMUX[16]	PPC.TSTC405APUEXERBDATAI[0]
CELL_E[7].IMUX_IMUX[17]	PPC.TSTC405APUEXERBDATAI[1]
CELL_E[7].IMUX_IMUX[18]	PPC.TSTC405APUEXERBDATAI[2]
CELL_E[7].IMUX_IMUX[19]	PPC.TSTC405APUEXERBDATAI[3]
CELL_E[7].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[32]
CELL_E[7].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[33]
CELL_E[7].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[34]
CELL_E[7].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[35]
CELL_E[7].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[16]
CELL_E[7].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[17]
CELL_E[7].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[18]
CELL_E[7].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[19]
CELL_E[7].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[16]
CELL_E[7].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[17]
CELL_E[7].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[18]
CELL_E[7].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[19]
CELL_E[7].OUT_HALF0_BEL[0]	PPC.TSTAPUC405DCDGPRWRITEO
CELL_E[7].OUT_HALF0_BEL[1]	PPC.TSTAPUC405DCDRAENO
CELL_E[7].OUT_HALF0_BEL[2]	PPC.TSTAPUC405DCDRBENO
CELL_E[7].OUT_HALF0_BEL[3]	PPC.TSTAPUC405DCDLOADO
CELL_E[7].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXECRFIELDO[0]
CELL_E[7].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXECRFIELDO[1]
CELL_E[7].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXECRFIELDO[2]
CELL_E[7].OUT_HALF0_BEL[7]	PPC.TSTAPUC405DCDFPUOPO
CELL_E[7].OUT_HALF1_BEL[0]	PPC.TSTAPUC405DCDGPRWRITEO
CELL_E[7].OUT_HALF1_BEL[1]	PPC.TSTAPUC405DCDRAENO
CELL_E[7].OUT_HALF1_BEL[2]	PPC.TSTAPUC405DCDRBENO
CELL_E[7].OUT_HALF1_BEL[3]	PPC.TSTAPUC405DCDLOADO
CELL_E[7].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXECRFIELDO[0]
CELL_E[7].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXECRFIELDO[1]
CELL_E[7].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXECRFIELDO[2]
CELL_E[7].OUT_HALF1_BEL[7]	PPC.TSTAPUC405DCDFPUOPO
CELL_E[8].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI6[3]
CELL_E[8].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI6[2]
CELL_E[8].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI6[1]
CELL_E[8].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI6[0]
CELL_E[8].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI6[7]
CELL_E[8].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI6[6]
CELL_E[8].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI6[5]
CELL_E[8].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI6[4]
CELL_E[8].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[28]
CELL_E[8].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[29]
CELL_E[8].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[30]
CELL_E[8].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[31]
CELL_E[8].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[28]
CELL_E[8].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[29]
CELL_E[8].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[30]
CELL_E[8].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[31]
CELL_E[8].IMUX_IMUX[8]	PPC.PLBC405DCUADDRACK
CELL_E[8].IMUX_IMUX[9]	PPC.PLBC405DCUSSIZE1
CELL_E[8].IMUX_IMUX[10]	PPC.PLBC405DCUBUSY
CELL_E[8].IMUX_IMUX[11]	PPC.PLBC405DCUERR
CELL_E[8].IMUX_IMUX[12]	PPC.TSTC405APUDCDINSTRUCTIONI[28]
CELL_E[8].IMUX_IMUX[13]	PPC.TSTC405APUDCDINSTRUCTIONI[29]
CELL_E[8].IMUX_IMUX[14]	PPC.TSTC405APUDCDINSTRUCTIONI[30]
CELL_E[8].IMUX_IMUX[15]	PPC.TSTC405APUDCDINSTRUCTIONI[31]
CELL_E[8].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[28]
CELL_E[8].IMUX_IMUX[17]	PPC.TSTC405APUEXERADATAI[29]
CELL_E[8].IMUX_IMUX[18]	PPC.TSTC405APUEXERADATAI[30]
CELL_E[8].IMUX_IMUX[19]	PPC.TSTC405APUEXERADATAI[31]
CELL_E[8].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[28]
CELL_E[8].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[29]
CELL_E[8].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[30]
CELL_E[8].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[31]
CELL_E[8].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[12]
CELL_E[8].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[13]
CELL_E[8].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[14]
CELL_E[8].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[15]
CELL_E[8].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[12]
CELL_E[8].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[13]
CELL_E[8].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[14]
CELL_E[8].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[15]
CELL_E[8].OUT_HALF0_BEL[0]	PPC.TSTAPUC405EXERESULTO[24]
CELL_E[8].OUT_HALF0_BEL[1]	PPC.TSTAPUC405EXERESULTO[25]
CELL_E[8].OUT_HALF0_BEL[2]	PPC.TSTAPUC405EXERESULTO[26]
CELL_E[8].OUT_HALF0_BEL[3]	PPC.TSTAPUC405EXERESULTO[27]
CELL_E[8].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXERESULTO[28]
CELL_E[8].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXERESULTO[29]
CELL_E[8].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXERESULTO[30]
CELL_E[8].OUT_HALF0_BEL[7]	PPC.TSTAPUC405EXERESULTO[31]
CELL_E[8].OUT_HALF1_BEL[0]	PPC.TSTAPUC405EXERESULTO[24]
CELL_E[8].OUT_HALF1_BEL[1]	PPC.TSTAPUC405EXERESULTO[25]
CELL_E[8].OUT_HALF1_BEL[2]	PPC.TSTAPUC405EXERESULTO[26]
CELL_E[8].OUT_HALF1_BEL[3]	PPC.TSTAPUC405EXERESULTO[27]
CELL_E[8].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXERESULTO[28]
CELL_E[8].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXERESULTO[29]
CELL_E[8].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXERESULTO[30]
CELL_E[8].OUT_HALF1_BEL[7]	PPC.TSTAPUC405EXERESULTO[31]
CELL_E[9].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI5[19]
CELL_E[9].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI5[18]
CELL_E[9].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI5[17]
CELL_E[9].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI5[16]
CELL_E[9].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI5[23]
CELL_E[9].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI5[22]
CELL_E[9].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI5[21]
CELL_E[9].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI5[20]
CELL_E[9].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[24]
CELL_E[9].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[25]
CELL_E[9].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[26]
CELL_E[9].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[27]
CELL_E[9].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[24]
CELL_E[9].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[25]
CELL_E[9].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[26]
CELL_E[9].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[27]
CELL_E[9].IMUX_IMUX[8]	PPC.PLBC405DCURDWDADDR[1]
CELL_E[9].IMUX_IMUX[9]	PPC.PLBC405DCURDWDADDR[2]
CELL_E[9].IMUX_IMUX[10]	PPC.PLBC405DCURDWDADDR[3]
CELL_E[9].IMUX_IMUX[11]	PPC.PLBC405DCURDDACK
CELL_E[9].IMUX_IMUX[12]	PPC.TSTC405APUDCDINSTRUCTIONI[24]
CELL_E[9].IMUX_IMUX[13]	PPC.TSTC405APUDCDINSTRUCTIONI[25]
CELL_E[9].IMUX_IMUX[14]	PPC.TSTC405APUDCDINSTRUCTIONI[26]
CELL_E[9].IMUX_IMUX[15]	PPC.TSTC405APUDCDINSTRUCTIONI[27]
CELL_E[9].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[24]
CELL_E[9].IMUX_IMUX[17]	PPC.TSTC405APUEXERADATAI[25]
CELL_E[9].IMUX_IMUX[18]	PPC.TSTC405APUEXERADATAI[26]
CELL_E[9].IMUX_IMUX[19]	PPC.TSTC405APUEXERADATAI[27]
CELL_E[9].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[24]
CELL_E[9].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[25]
CELL_E[9].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[26]
CELL_E[9].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[27]
CELL_E[9].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[8]
CELL_E[9].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[9]
CELL_E[9].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[10]
CELL_E[9].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[11]
CELL_E[9].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[8]
CELL_E[9].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[9]
CELL_E[9].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[10]
CELL_E[9].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[11]
CELL_E[9].OUT_HALF0_BEL[0]	PPC.TSTAPUC405EXERESULTO[16]
CELL_E[9].OUT_HALF0_BEL[1]	PPC.TSTAPUC405EXERESULTO[17]
CELL_E[9].OUT_HALF0_BEL[2]	PPC.TSTAPUC405EXERESULTO[18]
CELL_E[9].OUT_HALF0_BEL[3]	PPC.TSTAPUC405EXERESULTO[19]
CELL_E[9].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXERESULTO[20]
CELL_E[9].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXERESULTO[21]
CELL_E[9].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXERESULTO[22]
CELL_E[9].OUT_HALF0_BEL[7]	PPC.TSTAPUC405EXERESULTO[23]
CELL_E[9].OUT_HALF1_BEL[0]	PPC.TSTAPUC405EXERESULTO[16]
CELL_E[9].OUT_HALF1_BEL[1]	PPC.TSTAPUC405EXERESULTO[17]
CELL_E[9].OUT_HALF1_BEL[2]	PPC.TSTAPUC405EXERESULTO[18]
CELL_E[9].OUT_HALF1_BEL[3]	PPC.TSTAPUC405EXERESULTO[19]
CELL_E[9].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXERESULTO[20]
CELL_E[9].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXERESULTO[21]
CELL_E[9].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXERESULTO[22]
CELL_E[9].OUT_HALF1_BEL[7]	PPC.TSTAPUC405EXERESULTO[23]
CELL_E[10].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI5[11]
CELL_E[10].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI5[10]
CELL_E[10].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI5[9]
CELL_E[10].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI5[8]
CELL_E[10].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI5[15]
CELL_E[10].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI5[14]
CELL_E[10].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI5[13]
CELL_E[10].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI5[12]
CELL_E[10].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[20]
CELL_E[10].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[21]
CELL_E[10].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[22]
CELL_E[10].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[23]
CELL_E[10].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[20]
CELL_E[10].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[21]
CELL_E[10].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[22]
CELL_E[10].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[23]
CELL_E[10].IMUX_IMUX[8]	PPC.PLBC405DCUWRDACK
CELL_E[10].IMUX_IMUX[9]	PPC.TSTC405APUDCDINSTRUCTIONI[20]
CELL_E[10].IMUX_IMUX[10]	PPC.TSTC405APUDCDINSTRUCTIONI[21]
CELL_E[10].IMUX_IMUX[11]	PPC.TSTC405APUDCDINSTRUCTIONI[22]
CELL_E[10].IMUX_IMUX[12]	PPC.TSTC405APUDCDINSTRUCTIONI[23]
CELL_E[10].IMUX_IMUX[13]	PPC.TSTC405APUEXERADATAI[20]
CELL_E[10].IMUX_IMUX[14]	PPC.TSTC405APUEXERADATAI[21]
CELL_E[10].IMUX_IMUX[15]	PPC.TSTC405APUEXERADATAI[22]
CELL_E[10].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[23]
CELL_E[10].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[20]
CELL_E[10].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[21]
CELL_E[10].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[22]
CELL_E[10].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[23]
CELL_E[10].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[4]
CELL_E[10].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[5]
CELL_E[10].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[6]
CELL_E[10].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[7]
CELL_E[10].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[4]
CELL_E[10].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[5]
CELL_E[10].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[6]
CELL_E[10].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[7]
CELL_E[10].OUT_HALF0_BEL[0]	PPC.TSTAPUC405EXERESULTO[8]
CELL_E[10].OUT_HALF0_BEL[1]	PPC.TSTAPUC405EXERESULTO[9]
CELL_E[10].OUT_HALF0_BEL[2]	PPC.TSTAPUC405EXERESULTO[10]
CELL_E[10].OUT_HALF0_BEL[3]	PPC.TSTAPUC405EXERESULTO[11]
CELL_E[10].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXERESULTO[12]
CELL_E[10].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXERESULTO[13]
CELL_E[10].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXERESULTO[14]
CELL_E[10].OUT_HALF0_BEL[7]	PPC.TSTAPUC405EXERESULTO[15]
CELL_E[10].OUT_HALF1_BEL[0]	PPC.TSTAPUC405EXERESULTO[8]
CELL_E[10].OUT_HALF1_BEL[1]	PPC.TSTAPUC405EXERESULTO[9]
CELL_E[10].OUT_HALF1_BEL[2]	PPC.TSTAPUC405EXERESULTO[10]
CELL_E[10].OUT_HALF1_BEL[3]	PPC.TSTAPUC405EXERESULTO[11]
CELL_E[10].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXERESULTO[12]
CELL_E[10].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXERESULTO[13]
CELL_E[10].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXERESULTO[14]
CELL_E[10].OUT_HALF1_BEL[7]	PPC.TSTAPUC405EXERESULTO[15]
CELL_E[11].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI5[3]
CELL_E[11].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI5[2]
CELL_E[11].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI5[1]
CELL_E[11].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI5[0]
CELL_E[11].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI5[7]
CELL_E[11].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI5[6]
CELL_E[11].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI5[5]
CELL_E[11].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI5[4]
CELL_E[11].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[16]
CELL_E[11].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[17]
CELL_E[11].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[18]
CELL_E[11].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[19]
CELL_E[11].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[16]
CELL_E[11].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[17]
CELL_E[11].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[18]
CELL_E[11].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[19]
CELL_E[11].IMUX_IMUX[8]	PPC.TSTC405APUDCDINSTRUCTIONI[16]
CELL_E[11].IMUX_IMUX[9]	PPC.TSTC405APUDCDINSTRUCTIONI[17]
CELL_E[11].IMUX_IMUX[10]	PPC.TSTC405APUDCDINSTRUCTIONI[18]
CELL_E[11].IMUX_IMUX[11]	PPC.TSTC405APUDCDINSTRUCTIONI[19]
CELL_E[11].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[28]
CELL_E[11].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[29]
CELL_E[11].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[30]
CELL_E[11].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[31]
CELL_E[11].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[16]
CELL_E[11].IMUX_IMUX[17]	PPC.TSTC405APUEXERADATAI[17]
CELL_E[11].IMUX_IMUX[18]	PPC.TSTC405APUEXERADATAI[18]
CELL_E[11].IMUX_IMUX[19]	PPC.TSTC405APUEXERADATAI[19]
CELL_E[11].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[16]
CELL_E[11].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[17]
CELL_E[11].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[18]
CELL_E[11].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[19]
CELL_E[11].OUT_BEST_TMIN[4]	PPC.C405PLBDCUABUS[0]
CELL_E[11].OUT_BEST_TMIN[5]	PPC.C405PLBDCUABUS[1]
CELL_E[11].OUT_BEST_TMIN[6]	PPC.C405PLBDCUABUS[2]
CELL_E[11].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABUS[3]
CELL_E[11].OUT_SEC_TMIN[0]	PPC.C405PLBICUABUS[0]
CELL_E[11].OUT_SEC_TMIN[1]	PPC.C405PLBICUABUS[1]
CELL_E[11].OUT_SEC_TMIN[2]	PPC.C405PLBICUABUS[2]
CELL_E[11].OUT_SEC_TMIN[3]	PPC.C405PLBICUABUS[3]
CELL_E[11].OUT_HALF0_BEL[0]	PPC.TSTAPUC405EXERESULTO[0]
CELL_E[11].OUT_HALF0_BEL[1]	PPC.TSTAPUC405EXERESULTO[1]
CELL_E[11].OUT_HALF0_BEL[2]	PPC.TSTAPUC405EXERESULTO[2]
CELL_E[11].OUT_HALF0_BEL[3]	PPC.TSTAPUC405EXERESULTO[3]
CELL_E[11].OUT_HALF0_BEL[4]	PPC.TSTAPUC405EXERESULTO[4]
CELL_E[11].OUT_HALF0_BEL[5]	PPC.TSTAPUC405EXERESULTO[5]
CELL_E[11].OUT_HALF0_BEL[6]	PPC.TSTAPUC405EXERESULTO[6]
CELL_E[11].OUT_HALF0_BEL[7]	PPC.TSTAPUC405EXERESULTO[7]
CELL_E[11].OUT_HALF1_BEL[0]	PPC.TSTAPUC405EXERESULTO[0]
CELL_E[11].OUT_HALF1_BEL[1]	PPC.TSTAPUC405EXERESULTO[1]
CELL_E[11].OUT_HALF1_BEL[2]	PPC.TSTAPUC405EXERESULTO[2]
CELL_E[11].OUT_HALF1_BEL[3]	PPC.TSTAPUC405EXERESULTO[3]
CELL_E[11].OUT_HALF1_BEL[4]	PPC.TSTAPUC405EXERESULTO[4]
CELL_E[11].OUT_HALF1_BEL[5]	PPC.TSTAPUC405EXERESULTO[5]
CELL_E[11].OUT_HALF1_BEL[6]	PPC.TSTAPUC405EXERESULTO[6]
CELL_E[11].OUT_HALF1_BEL[7]	PPC.TSTAPUC405EXERESULTO[7]
CELL_E[12].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI4[19]
CELL_E[12].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI4[18]
CELL_E[12].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI4[17]
CELL_E[12].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI4[16]
CELL_E[12].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI4[23]
CELL_E[12].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI4[22]
CELL_E[12].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI4[21]
CELL_E[12].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI4[20]
CELL_E[12].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[12]
CELL_E[12].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[13]
CELL_E[12].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[14]
CELL_E[12].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[15]
CELL_E[12].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[12]
CELL_E[12].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[13]
CELL_E[12].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[14]
CELL_E[12].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[15]
CELL_E[12].IMUX_IMUX[8]	PPC.TSTC405APUDCDINSTRUCTIONI[12]
CELL_E[12].IMUX_IMUX[9]	PPC.TSTC405APUDCDINSTRUCTIONI[13]
CELL_E[12].IMUX_IMUX[10]	PPC.TSTC405APUDCDINSTRUCTIONI[14]
CELL_E[12].IMUX_IMUX[11]	PPC.TSTC405APUDCDINSTRUCTIONI[15]
CELL_E[12].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[24]
CELL_E[12].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[25]
CELL_E[12].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[26]
CELL_E[12].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[27]
CELL_E[12].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[12]
CELL_E[12].IMUX_IMUX[17]	PPC.TSTC405APUEXERADATAI[13]
CELL_E[12].IMUX_IMUX[18]	PPC.TSTC405APUEXERADATAI[14]
CELL_E[12].IMUX_IMUX[19]	PPC.TSTC405APUEXERADATAI[15]
CELL_E[12].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[12]
CELL_E[12].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[13]
CELL_E[12].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[14]
CELL_E[12].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[15]
CELL_E[12].OUT_BEST_TMIN[4]	PPC.C405PLBDCUBE[0]
CELL_E[12].OUT_BEST_TMIN[5]	PPC.C405PLBDCUBE[1]
CELL_E[12].OUT_BEST_TMIN[6]	PPC.C405PLBDCUBE[2]
CELL_E[12].OUT_BEST_TMIN[7]	PPC.C405PLBDCUBE[3]
CELL_E[12].OUT_SEC_TMIN[0]	PPC.TSTC405APUWBENDIANO
CELL_E[12].OUT_SEC_TMIN[1]	PPC.TSTC405APUEXELOADDVALIDO
CELL_E[12].OUT_SEC_TMIN[2]	PPC.TSTC405APUEXEFLUSHO
CELL_E[12].OUT_SEC_TMIN[3]	PPC.C405CPMCLOCKFB
CELL_E[12].OUT_HALF0_BEL[0]	PPC.TSTAPUC405FPUEXCEPTIONO
CELL_E[12].OUT_HALF0_BEL[1]	PPC.TSTAPUC405DCDVALIDOPO
CELL_E[12].OUT_HALF0_BEL[2]	PPC.TSTAPUC405APUDIVENO
CELL_E[12].OUT_HALF0_BEL[3]	PPC.TSTAPUC405APUPRESENTO
CELL_E[12].OUT_HALF0_BEL[4]	PPC.TSTAPUC405DCDAPUOPO
CELL_E[12].OUT_HALF0_BEL[5]	PPC.TSTAPUC405DCDFORCEALIGNO
CELL_E[12].OUT_HALF0_BEL[6]	PPC.TSTAPUC405DCDFORCEBESTEERINGO
CELL_E[12].OUT_HALF0_BEL[7]	PPC.TSTAPUC405DCDLDSTBYTEO
CELL_E[12].OUT_HALF1_BEL[0]	PPC.TSTAPUC405FPUEXCEPTIONO
CELL_E[12].OUT_HALF1_BEL[1]	PPC.TSTAPUC405DCDVALIDOPO
CELL_E[12].OUT_HALF1_BEL[2]	PPC.TSTAPUC405APUDIVENO
CELL_E[12].OUT_HALF1_BEL[3]	PPC.TSTAPUC405APUPRESENTO
CELL_E[12].OUT_HALF1_BEL[4]	PPC.TSTAPUC405DCDAPUOPO
CELL_E[12].OUT_HALF1_BEL[5]	PPC.TSTAPUC405DCDFORCEALIGNO
CELL_E[12].OUT_HALF1_BEL[6]	PPC.TSTAPUC405DCDFORCEBESTEERINGO
CELL_E[12].OUT_HALF1_BEL[7]	PPC.TSTAPUC405DCDLDSTBYTEO
CELL_E[13].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI4[11]
CELL_E[13].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI4[10]
CELL_E[13].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI4[9]
CELL_E[13].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI4[8]
CELL_E[13].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI4[15]
CELL_E[13].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI4[14]
CELL_E[13].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI4[13]
CELL_E[13].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI4[12]
CELL_E[13].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[8]
CELL_E[13].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[9]
CELL_E[13].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[10]
CELL_E[13].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[11]
CELL_E[13].IMUX_IMUX[4]	PPC.PLBC405ICURDDBUS[8]
CELL_E[13].IMUX_IMUX[5]	PPC.PLBC405ICURDDBUS[9]
CELL_E[13].IMUX_IMUX[6]	PPC.PLBC405ICURDDBUS[10]
CELL_E[13].IMUX_IMUX[7]	PPC.PLBC405ICURDDBUS[11]
CELL_E[13].IMUX_IMUX[8]	PPC.TSTC405APUDCDINSTRUCTIONI[4]
CELL_E[13].IMUX_IMUX[9]	PPC.TSTC405APUDCDINSTRUCTIONI[5]
CELL_E[13].IMUX_IMUX[10]	PPC.TSTC405APUDCDINSTRUCTIONI[6]
CELL_E[13].IMUX_IMUX[11]	PPC.TSTC405APUDCDINSTRUCTIONI[7]
CELL_E[13].IMUX_IMUX[12]	PPC.TSTC405APUDCDINSTRUCTIONI[8]
CELL_E[13].IMUX_IMUX[13]	PPC.TSTC405APUDCDINSTRUCTIONI[9]
CELL_E[13].IMUX_IMUX[14]	PPC.TSTC405APUDCDINSTRUCTIONI[10]
CELL_E[13].IMUX_IMUX[15]	PPC.TSTC405APUDCDINSTRUCTIONI[11]
CELL_E[13].IMUX_IMUX[16]	PPC.TSTC405APUEXERADATAI[8]
CELL_E[13].IMUX_IMUX[17]	PPC.TSTC405APUEXERADATAI[9]
CELL_E[13].IMUX_IMUX[18]	PPC.TSTC405APUEXERADATAI[10]
CELL_E[13].IMUX_IMUX[19]	PPC.TSTC405APUEXERADATAI[11]
CELL_E[13].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[8]
CELL_E[13].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[9]
CELL_E[13].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[10]
CELL_E[13].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[11]
CELL_E[13].OUT_BEST_TMIN[4]	PPC.C405PLBDCUGUARDED
CELL_E[13].OUT_BEST_TMIN[5]	PPC.C405PLBDCUWRITETHRU
CELL_E[13].OUT_BEST_TMIN[6]	PPC.C405PLBDCURNW
CELL_E[13].OUT_BEST_TMIN[7]	PPC.APUFCMOPERANDVALID
CELL_E[13].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDVALID
CELL_E[13].OUT_SEC_TMIN[1]	PPC.APUFCMDECUDI[0]
CELL_E[13].OUT_SEC_TMIN[2]	PPC.APUFCMDECUDI[1]
CELL_E[13].OUT_SEC_TMIN[3]	PPC.APUFCMDECUDI[2]
CELL_E[13].OUT_HALF0_BEL[0]	EMAC.TSTSOEMACO[4]
CELL_E[13].OUT_HALF0_BEL[1]	EMAC.TSTSOEMACO[5]
CELL_E[13].OUT_HALF0_BEL[2]	EMAC.TSTSOEMACO[6]
CELL_E[13].OUT_HALF0_BEL[3]	PPC.TSTSOGASKETO[0]
CELL_E[13].OUT_HALF0_BEL[4]	PPC.TSTSOGASKETO[1]
CELL_E[13].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXEHOLDO
CELL_E[13].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDHOLDO
CELL_E[13].OUT_HALF0_BEL[7]	PPC.TSTC405APUXERCAO
CELL_E[13].OUT_HALF1_BEL[0]	EMAC.TSTSOEMACO[4]
CELL_E[13].OUT_HALF1_BEL[1]	EMAC.TSTSOEMACO[5]
CELL_E[13].OUT_HALF1_BEL[2]	EMAC.TSTSOEMACO[6]
CELL_E[13].OUT_HALF1_BEL[3]	PPC.TSTSOGASKETO[0]
CELL_E[13].OUT_HALF1_BEL[4]	PPC.TSTSOGASKETO[1]
CELL_E[13].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXEHOLDO
CELL_E[13].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDHOLDO
CELL_E[13].OUT_HALF1_BEL[7]	PPC.TSTC405APUXERCAO
CELL_E[14].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI4[3]
CELL_E[14].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI4[2]
CELL_E[14].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI4[1]
CELL_E[14].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI4[0]
CELL_E[14].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI4[7]
CELL_E[14].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI4[6]
CELL_E[14].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI4[5]
CELL_E[14].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI4[4]
CELL_E[14].IMUX_IMUX[0]	PPC.PLBC405ICURDDBUS[4]
CELL_E[14].IMUX_IMUX[1]	PPC.PLBC405ICURDDBUS[5]
CELL_E[14].IMUX_IMUX[2]	PPC.PLBC405ICURDDBUS[6]
CELL_E[14].IMUX_IMUX[3]	PPC.PLBC405ICURDDBUS[7]
CELL_E[14].IMUX_IMUX[4]	PPC.FCMAPUDECODEBUSY
CELL_E[14].IMUX_IMUX[5]	PPC.TSTC405APUEXERADATAI[0]
CELL_E[14].IMUX_IMUX[6]	PPC.TSTC405APUEXERADATAI[1]
CELL_E[14].IMUX_IMUX[7]	PPC.TSTC405APUEXERADATAI[2]
CELL_E[14].IMUX_IMUX[8]	PPC.TSTC405APUEXERADATAI[3]
CELL_E[14].IMUX_IMUX[9]	PPC.TSTC405APUEXERADATAI[4]
CELL_E[14].IMUX_IMUX[10]	PPC.TSTC405APUEXERADATAI[5]
CELL_E[14].IMUX_IMUX[11]	PPC.TSTC405APUEXERADATAI[6]
CELL_E[14].IMUX_IMUX[12]	PPC.TSTC405APUEXERADATAI[7]
CELL_E[14].IMUX_IMUX[13]	PPC.TSTC405APUDCDINSTRUCTIONI[0]
CELL_E[14].IMUX_IMUX[14]	PPC.TSTC405APUDCDINSTRUCTIONI[1]
CELL_E[14].IMUX_IMUX[15]	PPC.TSTC405APUDCDINSTRUCTIONI[2]
CELL_E[14].IMUX_IMUX[16]	PPC.TSTC405APUDCDINSTRUCTIONI[3]
CELL_E[14].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[4]
CELL_E[14].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[5]
CELL_E[14].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[6]
CELL_E[14].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[7]
CELL_E[14].OUT_BEST_TMIN[4]	PPC.APUFCMFLUSH
CELL_E[14].OUT_BEST_TMIN[5]	PPC.APUFCMWRITEBACKOK
CELL_E[14].OUT_BEST_TMIN[6]	PPC.APUFCMENDIAN
CELL_E[14].OUT_BEST_TMIN[7]	PPC.APUFCMXERCA
CELL_E[14].OUT_SEC_TMIN[0]	PPC.DSOCMBUSY
CELL_E[14].OUT_SEC_TMIN[1]	PPC.APUFCMINSTRVALID
CELL_E[14].OUT_SEC_TMIN[2]	PPC.APUFCMDECODED
CELL_E[14].OUT_SEC_TMIN[3]	PPC.APUFCMDECUDIVALID
CELL_E[14].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[28]
CELL_E[14].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[29]
CELL_E[14].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[30]
CELL_E[14].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[31]
CELL_E[14].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[28]
CELL_E[14].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[29]
CELL_E[14].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[30]
CELL_E[14].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[31]
CELL_E[14].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[28]
CELL_E[14].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[29]
CELL_E[14].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[30]
CELL_E[14].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[31]
CELL_E[14].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[28]
CELL_E[14].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[29]
CELL_E[14].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[30]
CELL_E[14].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[31]
CELL_E[15].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI3[19]
CELL_E[15].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI3[18]
CELL_E[15].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI3[17]
CELL_E[15].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI3[16]
CELL_E[15].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI3[23]
CELL_E[15].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI3[22]
CELL_E[15].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI3[21]
CELL_E[15].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI3[20]
CELL_E[15].IMUX_IMUX[0]	PPC.PLBC405DCURDDBUS[4]
CELL_E[15].IMUX_IMUX[1]	PPC.PLBC405DCURDDBUS[5]
CELL_E[15].IMUX_IMUX[2]	PPC.PLBC405DCURDDBUS[6]
CELL_E[15].IMUX_IMUX[3]	PPC.PLBC405DCURDDBUS[7]
CELL_E[15].IMUX_IMUX[4]	PPC.FCMAPUEXCEPTION
CELL_E[15].IMUX_IMUX[5]	PPC.FCMAPUXERCA
CELL_E[15].IMUX_IMUX[6]	PPC.FCMAPUXEROV
CELL_E[15].IMUX_IMUX[7]	PPC.FCMAPUSLEEPNOTREADY
CELL_E[15].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[28]
CELL_E[15].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[29]
CELL_E[15].IMUX_IMUX[10]	PPC.TSTC405DSOCMBYTEENI[0]
CELL_E[15].IMUX_IMUX[11]	PPC.TSTC405DSOCMBYTEENI[1]
CELL_E[15].IMUX_IMUX[12]	PPC.TSTC405DSOCMBYTEENI[2]
CELL_E[15].IMUX_IMUX[13]	PPC.TSTC405DSOCMBYTEENI[3]
CELL_E[15].IMUX_IMUX[14]	PPC.TSTC405DSOCMABORTREQI
CELL_E[15].IMUX_IMUX[15]	PPC.TSTC405DSOCMABORTOPI
CELL_E[15].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[28]
CELL_E[15].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[29]
CELL_E[15].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[30]
CELL_E[15].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[31]
CELL_E[15].OUT_BEST_TMIN[0]	PPC.C405PLBDCUWRDBUS[0]
CELL_E[15].OUT_BEST_TMIN[1]	PPC.C405PLBDCUWRDBUS[1]
CELL_E[15].OUT_BEST_TMIN[2]	PPC.C405PLBDCUWRDBUS[2]
CELL_E[15].OUT_BEST_TMIN[3]	PPC.C405PLBDCUWRDBUS[3]
CELL_E[15].OUT_BEST_TMIN[4]	PPC.C405PLBDCUREQUEST
CELL_E[15].OUT_BEST_TMIN[5]	PPC.C405PLBDCUPRIORITY[0]
CELL_E[15].OUT_BEST_TMIN[6]	PPC.C405PLBDCUPRIORITY[1]
CELL_E[15].OUT_BEST_TMIN[7]	PPC.C405PLBDCUABORT
CELL_E[15].OUT_SEC_TMIN[0]	PPC.APUFCMLOADBYTEEN[0]
CELL_E[15].OUT_SEC_TMIN[1]	PPC.APUFCMLOADBYTEEN[1]
CELL_E[15].OUT_SEC_TMIN[2]	PPC.APUFCMLOADBYTEEN[2]
CELL_E[15].OUT_SEC_TMIN[3]	PPC.APUFCMLOADBYTEEN[3]
CELL_E[15].OUT_HALF0_BEL[0]	PPC.TSTDSOCMC405COMPLETEO
CELL_E[15].OUT_HALF0_BEL[1]	PPC.TSTDSOCMC405DISOPERANDFWDO
CELL_E[15].OUT_HALF0_BEL[2]	PPC.TSTDSOCMC405HOLDO
CELL_E[15].OUT_HALF0_BEL[3]	PPC.TSTDCRC405ACKO
CELL_E[15].OUT_HALF0_BEL[4]	PPC.TSTRESETCOREO
CELL_E[15].OUT_HALF0_BEL[5]	PPC.TSTRESETCHIPO
CELL_E[15].OUT_HALF0_BEL[6]	PPC.TSTRESETSYSO
CELL_E[15].OUT_HALF0_BEL[7]	PPC.TSTTRSTNEGO
CELL_E[15].OUT_HALF1_BEL[0]	PPC.TSTDSOCMC405COMPLETEO
CELL_E[15].OUT_HALF1_BEL[1]	PPC.TSTDSOCMC405DISOPERANDFWDO
CELL_E[15].OUT_HALF1_BEL[2]	PPC.TSTDSOCMC405HOLDO
CELL_E[15].OUT_HALF1_BEL[3]	PPC.TSTDCRC405ACKO
CELL_E[15].OUT_HALF1_BEL[4]	PPC.TSTRESETCOREO
CELL_E[15].OUT_HALF1_BEL[5]	PPC.TSTRESETCHIPO
CELL_E[15].OUT_HALF1_BEL[6]	PPC.TSTRESETSYSO
CELL_E[15].OUT_HALF1_BEL[7]	PPC.TSTTRSTNEGO
CELL_E[16].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI3[11]
CELL_E[16].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI3[10]
CELL_E[16].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI3[9]
CELL_E[16].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI3[8]
CELL_E[16].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI3[15]
CELL_E[16].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI3[14]
CELL_E[16].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI3[13]
CELL_E[16].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI3[12]
CELL_E[16].IMUX_IMUX[0]	PPC.FCMAPURESULT[28]
CELL_E[16].IMUX_IMUX[1]	PPC.FCMAPURESULT[29]
CELL_E[16].IMUX_IMUX[2]	PPC.FCMAPURESULT[30]
CELL_E[16].IMUX_IMUX[3]	PPC.FCMAPURESULT[31]
CELL_E[16].IMUX_IMUX[4]	PPC.FCMAPUCR[0]
CELL_E[16].IMUX_IMUX[5]	PPC.FCMAPUCR[1]
CELL_E[16].IMUX_IMUX[6]	PPC.FCMAPUCR[2]
CELL_E[16].IMUX_IMUX[7]	PPC.FCMAPUCR[3]
CELL_E[16].IMUX_IMUX[8]	PPC.FCMAPURESULTVALID
CELL_E[16].IMUX_IMUX[9]	PPC.FCMAPUINSTRACK
CELL_E[16].IMUX_IMUX[10]	PPC.FCMAPUDCDFPUOP
CELL_E[16].IMUX_IMUX[11]	PPC.FCMAPUDONE
CELL_E[16].IMUX_IMUX[12]	PPC.PLBC405ICURDDBUS[0]
CELL_E[16].IMUX_IMUX[13]	PPC.PLBC405ICURDDBUS[1]
CELL_E[16].IMUX_IMUX[14]	PPC.PLBC405ICURDDBUS[2]
CELL_E[16].IMUX_IMUX[15]	PPC.PLBC405ICURDDBUS[3]
CELL_E[16].IMUX_IMUX[16]	PPC.TSTC405DCRDBUSOUTI[20]
CELL_E[16].IMUX_IMUX[17]	PPC.TSTC405DCRDBUSOUTI[21]
CELL_E[16].IMUX_IMUX[18]	PPC.TSTC405DCRDBUSOUTI[22]
CELL_E[16].IMUX_IMUX[19]	PPC.TSTC405DCRDBUSOUTI[23]
CELL_E[16].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[28]
CELL_E[16].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[29]
CELL_E[16].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[30]
CELL_E[16].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[31]
CELL_E[16].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[28]
CELL_E[16].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[29]
CELL_E[16].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[30]
CELL_E[16].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[31]
CELL_E[16].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[28]
CELL_E[16].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[29]
CELL_E[16].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[30]
CELL_E[16].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[31]
CELL_E[16].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[24]
CELL_E[16].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[25]
CELL_E[16].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[26]
CELL_E[16].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[27]
CELL_E[16].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[28]
CELL_E[16].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[29]
CELL_E[16].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[30]
CELL_E[16].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[31]
CELL_E[16].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[24]
CELL_E[16].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[25]
CELL_E[16].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[26]
CELL_E[16].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[27]
CELL_E[16].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[28]
CELL_E[16].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[29]
CELL_E[16].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[30]
CELL_E[16].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[31]
CELL_E[17].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI3[3]
CELL_E[17].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI3[2]
CELL_E[17].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI3[1]
CELL_E[17].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI3[0]
CELL_E[17].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI3[7]
CELL_E[17].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI3[6]
CELL_E[17].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI3[5]
CELL_E[17].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI3[4]
CELL_E[17].IMUX_IMUX[0]	PPC.FCMAPURESULT[24]
CELL_E[17].IMUX_IMUX[1]	PPC.FCMAPURESULT[25]
CELL_E[17].IMUX_IMUX[2]	PPC.FCMAPURESULT[26]
CELL_E[17].IMUX_IMUX[3]	PPC.FCMAPURESULT[27]
CELL_E[17].IMUX_IMUX[4]	PPC.PLBC405DCURDDBUS[0]
CELL_E[17].IMUX_IMUX[5]	PPC.PLBC405DCURDDBUS[1]
CELL_E[17].IMUX_IMUX[6]	PPC.PLBC405DCURDDBUS[2]
CELL_E[17].IMUX_IMUX[7]	PPC.PLBC405DCURDDBUS[3]
CELL_E[17].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[24]
CELL_E[17].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[25]
CELL_E[17].IMUX_IMUX[10]	PPC.TSTC405DSOCMABUSI[26]
CELL_E[17].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[27]
CELL_E[17].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[16]
CELL_E[17].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[17]
CELL_E[17].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[18]
CELL_E[17].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[19]
CELL_E[17].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[24]
CELL_E[17].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[25]
CELL_E[17].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[26]
CELL_E[17].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[27]
CELL_E[17].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[24]
CELL_E[17].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[25]
CELL_E[17].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[26]
CELL_E[17].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[27]
CELL_E[17].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[24]
CELL_E[17].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[25]
CELL_E[17].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[26]
CELL_E[17].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[27]
CELL_E[17].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[24]
CELL_E[17].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[25]
CELL_E[17].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[26]
CELL_E[17].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[27]
CELL_E[17].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[16]
CELL_E[17].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[17]
CELL_E[17].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[18]
CELL_E[17].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[19]
CELL_E[17].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[20]
CELL_E[17].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[21]
CELL_E[17].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[22]
CELL_E[17].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[23]
CELL_E[17].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[16]
CELL_E[17].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[17]
CELL_E[17].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[18]
CELL_E[17].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[19]
CELL_E[17].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[20]
CELL_E[17].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[21]
CELL_E[17].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[22]
CELL_E[17].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[23]
CELL_E[18].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI2[19]
CELL_E[18].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI2[18]
CELL_E[18].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI2[17]
CELL_E[18].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI2[16]
CELL_E[18].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI2[23]
CELL_E[18].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI2[22]
CELL_E[18].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI2[21]
CELL_E[18].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI2[20]
CELL_E[18].IMUX_IMUX[0]	PPC.FCMAPURESULT[20]
CELL_E[18].IMUX_IMUX[1]	PPC.FCMAPURESULT[21]
CELL_E[18].IMUX_IMUX[2]	PPC.FCMAPURESULT[22]
CELL_E[18].IMUX_IMUX[3]	PPC.FCMAPURESULT[23]
CELL_E[18].IMUX_IMUX[4]	PPC.TSTAPUC405DCDFORCEALIGNI
CELL_E[18].IMUX_IMUX[5]	PPC.TSTAPUC405DCDFORCEBESTEERINGI
CELL_E[18].IMUX_IMUX[6]	PPC.TSTAPUC405DCDLDSTBYTEI
CELL_E[18].IMUX_IMUX[7]	PPC.TSTAPUC405FPUEXCEPTIONI
CELL_E[18].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[20]
CELL_E[18].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[21]
CELL_E[18].IMUX_IMUX[10]	PPC.TSTC405DSOCMABUSI[22]
CELL_E[18].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[23]
CELL_E[18].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[12]
CELL_E[18].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[13]
CELL_E[18].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[14]
CELL_E[18].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[15]
CELL_E[18].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[20]
CELL_E[18].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[21]
CELL_E[18].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[22]
CELL_E[18].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[23]
CELL_E[18].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[20]
CELL_E[18].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[21]
CELL_E[18].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[22]
CELL_E[18].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[23]
CELL_E[18].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[20]
CELL_E[18].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[21]
CELL_E[18].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[22]
CELL_E[18].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[23]
CELL_E[18].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[20]
CELL_E[18].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[21]
CELL_E[18].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[22]
CELL_E[18].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[23]
CELL_E[18].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[8]
CELL_E[18].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[9]
CELL_E[18].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[10]
CELL_E[18].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[11]
CELL_E[18].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[12]
CELL_E[18].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[13]
CELL_E[18].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[14]
CELL_E[18].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[15]
CELL_E[18].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[8]
CELL_E[18].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[9]
CELL_E[18].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[10]
CELL_E[18].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[11]
CELL_E[18].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[12]
CELL_E[18].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[13]
CELL_E[18].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[14]
CELL_E[18].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[15]
CELL_E[19].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI2[11]
CELL_E[19].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI2[10]
CELL_E[19].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI2[9]
CELL_E[19].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI2[8]
CELL_E[19].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI2[15]
CELL_E[19].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI2[14]
CELL_E[19].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI2[13]
CELL_E[19].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI2[12]
CELL_E[19].IMUX_IMUX[0]	PPC.FCMAPURESULT[16]
CELL_E[19].IMUX_IMUX[1]	PPC.FCMAPURESULT[17]
CELL_E[19].IMUX_IMUX[2]	PPC.FCMAPURESULT[18]
CELL_E[19].IMUX_IMUX[3]	PPC.FCMAPURESULT[19]
CELL_E[19].IMUX_IMUX[4]	PPC.TSTAPUC405DCDLDSTHWI
CELL_E[19].IMUX_IMUX[5]	PPC.TSTAPUC405DCDLDSTWDI
CELL_E[19].IMUX_IMUX[6]	PPC.TSTAPUC405DCDLDSTDWI
CELL_E[19].IMUX_IMUX[7]	PPC.TSTAPUC405DCDLDSTQWI
CELL_E[19].IMUX_IMUX[8]	PPC.TSTC405DSOCMABUSI[16]
CELL_E[19].IMUX_IMUX[9]	PPC.TSTC405DSOCMABUSI[17]
CELL_E[19].IMUX_IMUX[10]	PPC.TSTC405DSOCMABUSI[18]
CELL_E[19].IMUX_IMUX[11]	PPC.TSTC405DSOCMABUSI[19]
CELL_E[19].IMUX_IMUX[12]	PPC.TSTC405DSOCMLOADREQI
CELL_E[19].IMUX_IMUX[13]	PPC.TSTC405DSOCMSTOREREQI
CELL_E[19].IMUX_IMUX[14]	PPC.TSTC405DSOCMWAITI
CELL_E[19].IMUX_IMUX[15]	PPC.TSTC405DSOCMXLTVALIDI
CELL_E[19].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[16]
CELL_E[19].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[17]
CELL_E[19].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[18]
CELL_E[19].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[19]
CELL_E[19].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[16]
CELL_E[19].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[17]
CELL_E[19].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[18]
CELL_E[19].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[19]
CELL_E[19].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[16]
CELL_E[19].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[17]
CELL_E[19].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[18]
CELL_E[19].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[19]
CELL_E[19].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[16]
CELL_E[19].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[17]
CELL_E[19].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[18]
CELL_E[19].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[19]
CELL_E[19].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[0]
CELL_E[19].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[1]
CELL_E[19].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[2]
CELL_E[19].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[3]
CELL_E[19].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[4]
CELL_E[19].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[5]
CELL_E[19].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[6]
CELL_E[19].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[7]
CELL_E[19].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXELOADDBUSO[0]
CELL_E[19].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXELOADDBUSO[1]
CELL_E[19].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXELOADDBUSO[2]
CELL_E[19].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXELOADDBUSO[3]
CELL_E[19].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXELOADDBUSO[4]
CELL_E[19].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXELOADDBUSO[5]
CELL_E[19].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXELOADDBUSO[6]
CELL_E[19].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXELOADDBUSO[7]
CELL_E[20].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI2[3]
CELL_E[20].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI2[2]
CELL_E[20].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI2[1]
CELL_E[20].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI2[0]
CELL_E[20].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI2[7]
CELL_E[20].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI2[6]
CELL_E[20].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI2[5]
CELL_E[20].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI2[4]
CELL_E[20].IMUX_IMUX[0]	PPC.FCMAPURESULT[12]
CELL_E[20].IMUX_IMUX[1]	PPC.FCMAPURESULT[13]
CELL_E[20].IMUX_IMUX[2]	PPC.FCMAPURESULT[14]
CELL_E[20].IMUX_IMUX[3]	PPC.FCMAPURESULT[15]
CELL_E[20].IMUX_IMUX[4]	PPC.FCMAPUDCDFORCEALIGN
CELL_E[20].IMUX_IMUX[5]	PPC.TSTC405APUXERCAI
CELL_E[20].IMUX_IMUX[6]	PPC.TSTAPUC405APUDIVENI
CELL_E[20].IMUX_IMUX[7]	PPC.TSTAPUC405APUPRESENTI
CELL_E[20].IMUX_IMUX[8]	PPC.TSTAPUC405DCDVALIDOPI
CELL_E[20].IMUX_IMUX[9]	PPC.TSTAPUC405DCDAPUOPI
CELL_E[20].IMUX_IMUX[10]	PPC.TSTAPUC405EXEXERCAI
CELL_E[20].IMUX_IMUX[11]	PPC.TSTAPUC405EXEXEROVI
CELL_E[20].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[8]
CELL_E[20].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[9]
CELL_E[20].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[10]
CELL_E[20].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[11]
CELL_E[20].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[12]
CELL_E[20].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[13]
CELL_E[20].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[14]
CELL_E[20].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[15]
CELL_E[20].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[12]
CELL_E[20].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[13]
CELL_E[20].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[14]
CELL_E[20].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[15]
CELL_E[20].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[12]
CELL_E[20].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[13]
CELL_E[20].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[14]
CELL_E[20].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[15]
CELL_E[20].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[12]
CELL_E[20].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[13]
CELL_E[20].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[14]
CELL_E[20].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[15]
CELL_E[20].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERBDATAO[24]
CELL_E[20].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERBDATAO[25]
CELL_E[20].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERBDATAO[26]
CELL_E[20].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERBDATAO[27]
CELL_E[20].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXERBDATAO[28]
CELL_E[20].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXERBDATAO[29]
CELL_E[20].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXERBDATAO[30]
CELL_E[20].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXERBDATAO[31]
CELL_E[20].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERBDATAO[24]
CELL_E[20].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERBDATAO[25]
CELL_E[20].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERBDATAO[26]
CELL_E[20].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERBDATAO[27]
CELL_E[20].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXERBDATAO[28]
CELL_E[20].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXERBDATAO[29]
CELL_E[20].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXERBDATAO[30]
CELL_E[20].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXERBDATAO[31]
CELL_E[21].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI1[19]
CELL_E[21].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI1[18]
CELL_E[21].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI1[17]
CELL_E[21].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI1[16]
CELL_E[21].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI1[23]
CELL_E[21].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI1[22]
CELL_E[21].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI1[21]
CELL_E[21].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI1[20]
CELL_E[21].IMUX_IMUX[0]	PPC.FCMAPURESULT[8]
CELL_E[21].IMUX_IMUX[1]	PPC.FCMAPURESULT[9]
CELL_E[21].IMUX_IMUX[2]	PPC.FCMAPURESULT[10]
CELL_E[21].IMUX_IMUX[3]	PPC.FCMAPURESULT[11]
CELL_E[21].IMUX_IMUX[4]	PPC.TSTAPUC405EXCEPTIONI
CELL_E[21].IMUX_IMUX[5]	PPC.TSTAPUC405EXEBLOCKINGMCOI
CELL_E[21].IMUX_IMUX[6]	PPC.TSTAPUC405EXENONBLOCKINGMCOI
CELL_E[21].IMUX_IMUX[7]	PPC.TSTAPUC405EXEBUSYI
CELL_E[21].IMUX_IMUX[8]	PPC.TSTC405APUDCDFULLI
CELL_E[21].IMUX_IMUX[9]	PPC.TSTC405APUDCDHOLDI
CELL_E[21].IMUX_IMUX[10]	PPC.TSTC405APUEXEFLUSHI
CELL_E[21].IMUX_IMUX[11]	PPC.TSTC405APUEXEHOLDI
CELL_E[21].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[4]
CELL_E[21].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[5]
CELL_E[21].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[6]
CELL_E[21].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[7]
CELL_E[21].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[8]
CELL_E[21].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[9]
CELL_E[21].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[10]
CELL_E[21].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[11]
CELL_E[21].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[8]
CELL_E[21].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[9]
CELL_E[21].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[10]
CELL_E[21].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[11]
CELL_E[21].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[8]
CELL_E[21].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[9]
CELL_E[21].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[10]
CELL_E[21].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[11]
CELL_E[21].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[8]
CELL_E[21].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[9]
CELL_E[21].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[10]
CELL_E[21].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[11]
CELL_E[21].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERBDATAO[16]
CELL_E[21].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERBDATAO[17]
CELL_E[21].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERBDATAO[18]
CELL_E[21].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERBDATAO[19]
CELL_E[21].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXERBDATAO[20]
CELL_E[21].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXERBDATAO[21]
CELL_E[21].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXERBDATAO[22]
CELL_E[21].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXERBDATAO[23]
CELL_E[21].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERBDATAO[16]
CELL_E[21].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERBDATAO[17]
CELL_E[21].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERBDATAO[18]
CELL_E[21].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERBDATAO[19]
CELL_E[21].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXERBDATAO[20]
CELL_E[21].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXERBDATAO[21]
CELL_E[21].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXERBDATAO[22]
CELL_E[21].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXERBDATAO[23]
CELL_E[22].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI1[11]
CELL_E[22].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI1[10]
CELL_E[22].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI1[9]
CELL_E[22].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI1[8]
CELL_E[22].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI1[15]
CELL_E[22].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI1[14]
CELL_E[22].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI1[13]
CELL_E[22].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI1[12]
CELL_E[22].IMUX_IMUX[0]	PPC.FCMAPURESULT[4]
CELL_E[22].IMUX_IMUX[1]	PPC.FCMAPURESULT[5]
CELL_E[22].IMUX_IMUX[2]	PPC.FCMAPURESULT[6]
CELL_E[22].IMUX_IMUX[3]	PPC.FCMAPURESULT[7]
CELL_E[22].IMUX_IMUX[4]	PPC.TSTAPUC405SLEEPREQI
CELL_E[22].IMUX_IMUX[5]	PPC.TSTAPUC405EXELDDEPENDI
CELL_E[22].IMUX_IMUX[6]	PPC.TSTAPUC405WBLDDEPENDI
CELL_E[22].IMUX_IMUX[7]	PPC.TSTAPUC405LWBLDDEPENDI
CELL_E[22].IMUX_IMUX[8]	PPC.TSTC405APUEXELOADDVALIDI
CELL_E[22].IMUX_IMUX[9]	PPC.TSTC405APUWBENDIANI
CELL_E[22].IMUX_IMUX[10]	PPC.TSTC405APUWBFLUSHI
CELL_E[22].IMUX_IMUX[11]	PPC.TSTC405APUWBHOLDI
CELL_E[22].IMUX_IMUX[12]	PPC.TSTC405DCRDBUSOUTI[0]
CELL_E[22].IMUX_IMUX[13]	PPC.TSTC405DCRDBUSOUTI[1]
CELL_E[22].IMUX_IMUX[14]	PPC.TSTC405DCRDBUSOUTI[2]
CELL_E[22].IMUX_IMUX[15]	PPC.TSTC405DCRDBUSOUTI[3]
CELL_E[22].IMUX_IMUX[16]	PPC.TSTC405DSOCMWRDBUSI[4]
CELL_E[22].IMUX_IMUX[17]	PPC.TSTC405DSOCMWRDBUSI[5]
CELL_E[22].IMUX_IMUX[18]	PPC.TSTC405DSOCMWRDBUSI[6]
CELL_E[22].IMUX_IMUX[19]	PPC.TSTC405DSOCMWRDBUSI[7]
CELL_E[22].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[4]
CELL_E[22].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[5]
CELL_E[22].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[6]
CELL_E[22].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[7]
CELL_E[22].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[4]
CELL_E[22].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[5]
CELL_E[22].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[6]
CELL_E[22].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[7]
CELL_E[22].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[4]
CELL_E[22].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[5]
CELL_E[22].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[6]
CELL_E[22].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[7]
CELL_E[22].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERBDATAO[8]
CELL_E[22].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERBDATAO[9]
CELL_E[22].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERBDATAO[10]
CELL_E[22].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERBDATAO[11]
CELL_E[22].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXERBDATAO[12]
CELL_E[22].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXERBDATAO[13]
CELL_E[22].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXERBDATAO[14]
CELL_E[22].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXERBDATAO[15]
CELL_E[22].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERBDATAO[8]
CELL_E[22].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERBDATAO[9]
CELL_E[22].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERBDATAO[10]
CELL_E[22].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERBDATAO[11]
CELL_E[22].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXERBDATAO[12]
CELL_E[22].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXERBDATAO[13]
CELL_E[22].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXERBDATAO[14]
CELL_E[22].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXERBDATAO[15]
CELL_E[23].IMUX_SR_OPTINV[0]	PPC.TIEAPUUDI1[3]
CELL_E[23].IMUX_SR_OPTINV[1]	PPC.TIEAPUUDI1[2]
CELL_E[23].IMUX_SR_OPTINV[2]	PPC.TIEAPUUDI1[1]
CELL_E[23].IMUX_SR_OPTINV[3]	PPC.TIEAPUUDI1[0]
CELL_E[23].IMUX_CE_OPTINV[0]	PPC.TIEAPUUDI1[7]
CELL_E[23].IMUX_CE_OPTINV[1]	PPC.TIEAPUUDI1[6]
CELL_E[23].IMUX_CE_OPTINV[2]	PPC.TIEAPUUDI1[5]
CELL_E[23].IMUX_CE_OPTINV[3]	PPC.TIEAPUUDI1[4]
CELL_E[23].IMUX_IMUX[0]	PPC.FCMAPURESULT[0]
CELL_E[23].IMUX_IMUX[1]	PPC.FCMAPURESULT[1]
CELL_E[23].IMUX_IMUX[2]	PPC.FCMAPURESULT[2]
CELL_E[23].IMUX_IMUX[3]	PPC.FCMAPURESULT[3]
CELL_E[23].IMUX_IMUX[4]	PPC.FCMAPUDCDXERCAEN
CELL_E[23].IMUX_IMUX[5]	PPC.FCMAPUDCDXEROVEN
CELL_E[23].IMUX_IMUX[6]	PPC.FCMAPUDCDPRIVOP
CELL_E[23].IMUX_IMUX[7]	PPC.FCMAPUDCDCREN
CELL_E[23].IMUX_IMUX[8]	PPC.TSTC405APUEXEWDCNTI[0]
CELL_E[23].IMUX_IMUX[9]	PPC.TSTC405APUEXEWDCNTI[1]
CELL_E[23].IMUX_IMUX[10]	PPC.TSTC405APUMSRFE0I
CELL_E[23].IMUX_IMUX[11]	PPC.TSTC405APUMSRFE1I
CELL_E[23].IMUX_IMUX[12]	PPC.TSTC405DSOCMWRDBUSI[0]
CELL_E[23].IMUX_IMUX[13]	PPC.TSTC405DSOCMWRDBUSI[1]
CELL_E[23].IMUX_IMUX[14]	PPC.TSTC405DSOCMWRDBUSI[2]
CELL_E[23].IMUX_IMUX[15]	PPC.TSTC405DSOCMWRDBUSI[3]
CELL_E[23].OUT_BEST_TMIN[0]	PPC.APUFCMRADATA[0]
CELL_E[23].OUT_BEST_TMIN[1]	PPC.APUFCMRADATA[1]
CELL_E[23].OUT_BEST_TMIN[2]	PPC.APUFCMRADATA[2]
CELL_E[23].OUT_BEST_TMIN[3]	PPC.APUFCMRADATA[3]
CELL_E[23].OUT_BEST_TMIN[4]	PPC.APUFCMRBDATA[0]
CELL_E[23].OUT_BEST_TMIN[5]	PPC.APUFCMRBDATA[1]
CELL_E[23].OUT_BEST_TMIN[6]	PPC.APUFCMRBDATA[2]
CELL_E[23].OUT_BEST_TMIN[7]	PPC.APUFCMRBDATA[3]
CELL_E[23].OUT_SEC_TMIN[0]	PPC.APUFCMLOADDATA[0]
CELL_E[23].OUT_SEC_TMIN[1]	PPC.APUFCMLOADDATA[1]
CELL_E[23].OUT_SEC_TMIN[2]	PPC.APUFCMLOADDATA[2]
CELL_E[23].OUT_SEC_TMIN[3]	PPC.APUFCMLOADDATA[3]
CELL_E[23].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERBDATAO[0]
CELL_E[23].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERBDATAO[1]
CELL_E[23].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERBDATAO[2]
CELL_E[23].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERBDATAO[3]
CELL_E[23].OUT_HALF0_BEL[4]	PPC.TSTC405APUEXERBDATAO[4]
CELL_E[23].OUT_HALF0_BEL[5]	PPC.TSTC405APUEXERBDATAO[5]
CELL_E[23].OUT_HALF0_BEL[6]	PPC.TSTC405APUEXERBDATAO[6]
CELL_E[23].OUT_HALF0_BEL[7]	PPC.TSTC405APUEXERBDATAO[7]
CELL_E[23].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERBDATAO[0]
CELL_E[23].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERBDATAO[1]
CELL_E[23].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERBDATAO[2]
CELL_E[23].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERBDATAO[3]
CELL_E[23].OUT_HALF1_BEL[4]	PPC.TSTC405APUEXERBDATAO[4]
CELL_E[23].OUT_HALF1_BEL[5]	PPC.TSTC405APUEXERBDATAO[5]
CELL_E[23].OUT_HALF1_BEL[6]	PPC.TSTC405APUEXERBDATAO[6]
CELL_E[23].OUT_HALF1_BEL[7]	PPC.TSTC405APUEXERBDATAO[7]
CELL_S[0].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[24]
CELL_S[0].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[25]
CELL_S[0].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[26]
CELL_S[0].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[27]
CELL_S[0].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[20]
CELL_S[0].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[21]
CELL_S[0].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[22]
CELL_S[0].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[23]
CELL_S[0].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[40]
CELL_S[0].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[41]
CELL_S[0].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[42]
CELL_S[0].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[43]
CELL_S[0].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[56]
CELL_S[0].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[57]
CELL_S[0].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[58]
CELL_S[0].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[59]
CELL_S[0].IMUX_IMUX[8]	PPC.BRAMISOCMRDDBUS[44]
CELL_S[0].IMUX_IMUX[9]	PPC.BRAMISOCMRDDBUS[45]
CELL_S[0].IMUX_IMUX[10]	PPC.BRAMISOCMRDDBUS[46]
CELL_S[0].IMUX_IMUX[11]	PPC.BRAMISOCMRDDBUS[47]
CELL_S[0].IMUX_IMUX[12]	PPC.TSTISOCMC405READDATAOUTI[60]
CELL_S[0].IMUX_IMUX[13]	PPC.TSTISOCMC405READDATAOUTI[61]
CELL_S[0].IMUX_IMUX[14]	PPC.TSTISOCMC405READDATAOUTI[62]
CELL_S[0].IMUX_IMUX[15]	PPC.TSTISOCMC405READDATAOUTI[63]
CELL_S[0].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[56]
CELL_S[0].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[57]
CELL_S[0].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[58]
CELL_S[0].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[59]
CELL_S[0].OUT_BEST_TMIN[0]	PPC.C405JTGCAPTUREDR
CELL_S[0].OUT_BEST_TMIN[1]	PPC.C405JTGEXTEST
CELL_S[0].OUT_BEST_TMIN[2]	PPC.C405JTGPGMOUT
CELL_S[0].OUT_BEST_TMIN[3]	PPC.C405TRCEVENEXECUTIONSTATUS[0]
CELL_S[0].OUT_BEST_TMIN[4]	PPC.C405TRCEVENEXECUTIONSTATUS[1]
CELL_S[0].OUT_BEST_TMIN[5]	PPC.C405TRCODDEXECUTIONSTATUS[0]
CELL_S[0].OUT_BEST_TMIN[6]	PPC.C405TRCODDEXECUTIONSTATUS[1]
CELL_S[0].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMWRDBUS[0]
CELL_S[0].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMWRDBUS[1]
CELL_S[0].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMWRDBUS[2]
CELL_S[0].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMWRDBUS[3]
CELL_S[0].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMWRDBUS[4]
CELL_S[0].OUT_HALF0_BEL[0]	PPC.TSTCPUCLKENO
CELL_S[0].OUT_HALF0_BEL[1]	PPC.TSTCLKINACTO
CELL_S[0].OUT_HALF0_BEL[2]	PPC.TSTTIMERENO
CELL_S[0].OUT_HALF0_BEL[3]	PPC.TSTJTAGENO
CELL_S[0].OUT_HALF0_BEL[4]	PPC.TSTISOCMC405RDDVALIDO[0]
CELL_S[0].OUT_HALF0_BEL[5]	PPC.TSTISOCMC405RDDVALIDO[1]
CELL_S[0].OUT_HALF0_BEL[6]	PPC.TSTISOCMC405HOLDO
CELL_S[0].OUT_HALF1_BEL[0]	PPC.TSTCPUCLKENO
CELL_S[0].OUT_HALF1_BEL[1]	PPC.TSTCLKINACTO
CELL_S[0].OUT_HALF1_BEL[2]	PPC.TSTTIMERENO
CELL_S[0].OUT_HALF1_BEL[3]	PPC.TSTJTAGENO
CELL_S[0].OUT_HALF1_BEL[4]	PPC.TSTISOCMC405RDDVALIDO[0]
CELL_S[0].OUT_HALF1_BEL[5]	PPC.TSTISOCMC405RDDVALIDO[1]
CELL_S[0].OUT_HALF1_BEL[6]	PPC.TSTISOCMC405HOLDO
CELL_S[1].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[32]
CELL_S[1].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[33]
CELL_S[1].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[34]
CELL_S[1].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[35]
CELL_S[1].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[28]
CELL_S[1].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[29]
CELL_S[1].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[30]
CELL_S[1].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[31]
CELL_S[1].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[36]
CELL_S[1].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[37]
CELL_S[1].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[38]
CELL_S[1].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[39]
CELL_S[1].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[52]
CELL_S[1].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[53]
CELL_S[1].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[54]
CELL_S[1].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[55]
CELL_S[1].IMUX_IMUX[8]	PPC.BRAMISOCMRDDBUS[60]
CELL_S[1].IMUX_IMUX[9]	PPC.BRAMISOCMRDDBUS[61]
CELL_S[1].IMUX_IMUX[10]	PPC.BRAMISOCMRDDBUS[62]
CELL_S[1].IMUX_IMUX[11]	PPC.BRAMISOCMRDDBUS[63]
CELL_S[1].IMUX_IMUX[12]	PPC.BRAMISOCMDCRRDDBUS[28]
CELL_S[1].IMUX_IMUX[13]	PPC.BRAMISOCMDCRRDDBUS[29]
CELL_S[1].IMUX_IMUX[14]	PPC.BRAMISOCMDCRRDDBUS[30]
CELL_S[1].IMUX_IMUX[15]	PPC.BRAMISOCMDCRRDDBUS[31]
CELL_S[1].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[52]
CELL_S[1].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[53]
CELL_S[1].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[54]
CELL_S[1].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[55]
CELL_S[1].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMWRDBUS[5]
CELL_S[1].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMWRDBUS[6]
CELL_S[1].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMWRDBUS[7]
CELL_S[1].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMWRDBUS[8]
CELL_S[1].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMWRDBUS[9]
CELL_S[1].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMWRDBUS[10]
CELL_S[1].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMWRDBUS[11]
CELL_S[1].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMWRDBUS[12]
CELL_S[1].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMWRDBUS[13]
CELL_S[1].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMWRDBUS[14]
CELL_S[1].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMWRDBUS[15]
CELL_S[1].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMWRDBUS[16]
CELL_S[1].OUT_HALF0_BEL[0]	PPC.TSTC405ISOCMREQPENDINGO
CELL_S[1].OUT_HALF0_BEL[1]	PPC.TSTC405ISOCMICUREADYO
CELL_S[1].OUT_HALF0_BEL[2]	PPC.TSTC405ISOCMXLTVALIDO
CELL_S[1].OUT_HALF0_BEL[3]	PPC.TSTC405ISOCMABORTO
CELL_S[1].OUT_HALF0_BEL[4]	PPC.C405ISOCMCACHEABLE
CELL_S[1].OUT_HALF0_BEL[5]	PPC.C405ISOCMCONTEXTSYNC
CELL_S[1].OUT_HALF0_BEL[6]	PPC.C405ISOCMU0ATTR
CELL_S[1].OUT_HALF1_BEL[0]	PPC.TSTC405ISOCMREQPENDINGO
CELL_S[1].OUT_HALF1_BEL[1]	PPC.TSTC405ISOCMICUREADYO
CELL_S[1].OUT_HALF1_BEL[2]	PPC.TSTC405ISOCMXLTVALIDO
CELL_S[1].OUT_HALF1_BEL[3]	PPC.TSTC405ISOCMABORTO
CELL_S[1].OUT_HALF1_BEL[4]	PPC.C405ISOCMCACHEABLE
CELL_S[1].OUT_HALF1_BEL[5]	PPC.C405ISOCMCONTEXTSYNC
CELL_S[1].OUT_HALF1_BEL[6]	PPC.C405ISOCMU0ATTR
CELL_S[2].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[37]
CELL_S[2].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[38]
CELL_S[2].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[39]
CELL_S[2].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[40]
CELL_S[2].IMUX_CE_OPTINV[0]	PPC.TIEC405DETERMINISTICMULT
CELL_S[2].IMUX_CE_OPTINV[1]	PPC.TIEC405DISOPERANDFWD
CELL_S[2].IMUX_CE_OPTINV[2]	PPC.TIEC405MMUEN
CELL_S[2].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[36]
CELL_S[2].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[32]
CELL_S[2].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[33]
CELL_S[2].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[34]
CELL_S[2].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[35]
CELL_S[2].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[48]
CELL_S[2].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[49]
CELL_S[2].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[50]
CELL_S[2].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[51]
CELL_S[2].IMUX_IMUX[8]	PPC.BRAMISOCMDCRRDDBUS[20]
CELL_S[2].IMUX_IMUX[9]	PPC.BRAMISOCMDCRRDDBUS[21]
CELL_S[2].IMUX_IMUX[10]	PPC.BRAMISOCMDCRRDDBUS[22]
CELL_S[2].IMUX_IMUX[11]	PPC.BRAMISOCMDCRRDDBUS[23]
CELL_S[2].IMUX_IMUX[12]	PPC.BRAMISOCMDCRRDDBUS[24]
CELL_S[2].IMUX_IMUX[13]	PPC.BRAMISOCMDCRRDDBUS[25]
CELL_S[2].IMUX_IMUX[14]	PPC.BRAMISOCMDCRRDDBUS[26]
CELL_S[2].IMUX_IMUX[15]	PPC.BRAMISOCMDCRRDDBUS[27]
CELL_S[2].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[48]
CELL_S[2].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[49]
CELL_S[2].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[50]
CELL_S[2].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[51]
CELL_S[2].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMWRDBUS[17]
CELL_S[2].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMWRDBUS[18]
CELL_S[2].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMWRDBUS[19]
CELL_S[2].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMWRDBUS[20]
CELL_S[2].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMWRDBUS[21]
CELL_S[2].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMWRDBUS[22]
CELL_S[2].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMWRDBUS[23]
CELL_S[2].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMWRDBUS[24]
CELL_S[2].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMWRDBUS[25]
CELL_S[2].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMWRDBUS[26]
CELL_S[2].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMWRDBUS[27]
CELL_S[2].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMWRDBUS[28]
CELL_S[2].OUT_HALF0_BEL[0]	PPC.TSTC405ISOCMABUSO[24]
CELL_S[2].OUT_HALF0_BEL[1]	PPC.TSTC405ISOCMABUSO[25]
CELL_S[2].OUT_HALF0_BEL[2]	PPC.TSTC405ISOCMABUSO[26]
CELL_S[2].OUT_HALF0_BEL[3]	PPC.TSTC405ISOCMABUSO[27]
CELL_S[2].OUT_HALF0_BEL[4]	PPC.TSTC405ISOCMABUSO[28]
CELL_S[2].OUT_HALF0_BEL[5]	PPC.TSTC405ISOCMABUSO[29]
CELL_S[2].OUT_HALF1_BEL[0]	PPC.TSTC405ISOCMABUSO[24]
CELL_S[2].OUT_HALF1_BEL[1]	PPC.TSTC405ISOCMABUSO[25]
CELL_S[2].OUT_HALF1_BEL[2]	PPC.TSTC405ISOCMABUSO[26]
CELL_S[2].OUT_HALF1_BEL[3]	PPC.TSTC405ISOCMABUSO[27]
CELL_S[2].OUT_HALF1_BEL[4]	PPC.TSTC405ISOCMABUSO[28]
CELL_S[2].OUT_HALF1_BEL[5]	PPC.TSTC405ISOCMABUSO[29]
CELL_S[3].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[45]
CELL_S[3].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[46]
CELL_S[3].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[47]
CELL_S[3].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[48]
CELL_S[3].IMUX_CLK_OPTINV[0]	PPC.PLBCLK
CELL_S[3].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC0CONFIGVEC[41]
CELL_S[3].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC0CONFIGVEC[42]
CELL_S[3].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC0CONFIGVEC[43]
CELL_S[3].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC0CONFIGVEC[44]
CELL_S[3].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[12]
CELL_S[3].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[13]
CELL_S[3].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[14]
CELL_S[3].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[15]
CELL_S[3].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[28]
CELL_S[3].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[29]
CELL_S[3].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[30]
CELL_S[3].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[31]
CELL_S[3].IMUX_IMUX[8]	PPC.BRAMISOCMDCRRDDBUS[12]
CELL_S[3].IMUX_IMUX[9]	PPC.BRAMISOCMDCRRDDBUS[13]
CELL_S[3].IMUX_IMUX[10]	PPC.BRAMISOCMDCRRDDBUS[14]
CELL_S[3].IMUX_IMUX[11]	PPC.BRAMISOCMDCRRDDBUS[15]
CELL_S[3].IMUX_IMUX[12]	PPC.BRAMISOCMDCRRDDBUS[16]
CELL_S[3].IMUX_IMUX[13]	PPC.BRAMISOCMDCRRDDBUS[17]
CELL_S[3].IMUX_IMUX[14]	PPC.BRAMISOCMDCRRDDBUS[18]
CELL_S[3].IMUX_IMUX[15]	PPC.BRAMISOCMDCRRDDBUS[19]
CELL_S[3].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[44]
CELL_S[3].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[45]
CELL_S[3].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[46]
CELL_S[3].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[47]
CELL_S[3].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMWRDBUS[29]
CELL_S[3].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMWRDBUS[30]
CELL_S[3].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMWRDBUS[31]
CELL_S[3].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMWRABUS[8]
CELL_S[3].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMWRABUS[9]
CELL_S[3].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMWRABUS[10]
CELL_S[3].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMWRABUS[11]
CELL_S[3].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMWRABUS[12]
CELL_S[3].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMWRABUS[13]
CELL_S[3].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMWRABUS[14]
CELL_S[3].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMWRABUS[15]
CELL_S[3].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMWRABUS[16]
CELL_S[3].OUT_HALF0_BEL[0]	PPC.TSTC405ISOCMABUSO[16]
CELL_S[3].OUT_HALF0_BEL[1]	PPC.TSTC405ISOCMABUSO[17]
CELL_S[3].OUT_HALF0_BEL[2]	PPC.TSTC405ISOCMABUSO[18]
CELL_S[3].OUT_HALF0_BEL[3]	PPC.TSTC405ISOCMABUSO[19]
CELL_S[3].OUT_HALF0_BEL[4]	PPC.TSTC405ISOCMABUSO[20]
CELL_S[3].OUT_HALF0_BEL[5]	PPC.TSTC405ISOCMABUSO[21]
CELL_S[3].OUT_HALF0_BEL[6]	PPC.TSTC405ISOCMABUSO[22]
CELL_S[3].OUT_HALF0_BEL[7]	PPC.TSTC405ISOCMABUSO[23]
CELL_S[3].OUT_HALF1_BEL[0]	PPC.TSTC405ISOCMABUSO[16]
CELL_S[3].OUT_HALF1_BEL[1]	PPC.TSTC405ISOCMABUSO[17]
CELL_S[3].OUT_HALF1_BEL[2]	PPC.TSTC405ISOCMABUSO[18]
CELL_S[3].OUT_HALF1_BEL[3]	PPC.TSTC405ISOCMABUSO[19]
CELL_S[3].OUT_HALF1_BEL[4]	PPC.TSTC405ISOCMABUSO[20]
CELL_S[3].OUT_HALF1_BEL[5]	PPC.TSTC405ISOCMABUSO[21]
CELL_S[3].OUT_HALF1_BEL[6]	PPC.TSTC405ISOCMABUSO[22]
CELL_S[3].OUT_HALF1_BEL[7]	PPC.TSTC405ISOCMABUSO[23]
CELL_S[4].IMUX_SR_OPTINV[0]	PPC.ISCNTLVALUE[4]
CELL_S[4].IMUX_SR_OPTINV[1]	PPC.ISCNTLVALUE[5]
CELL_S[4].IMUX_SR_OPTINV[2]	PPC.ISCNTLVALUE[6]
CELL_S[4].IMUX_SR_OPTINV[3]	PPC.ISCNTLVALUE[7]
CELL_S[4].IMUX_CLK_OPTINV[0]	PPC.JTGC405TCK
CELL_S[4].IMUX_CE_OPTINV[0]	PPC.ISCNTLVALUE[0]
CELL_S[4].IMUX_CE_OPTINV[1]	PPC.ISCNTLVALUE[1]
CELL_S[4].IMUX_CE_OPTINV[2]	PPC.ISCNTLVALUE[2]
CELL_S[4].IMUX_CE_OPTINV[3]	PPC.ISCNTLVALUE[3]
CELL_S[4].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[8]
CELL_S[4].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[9]
CELL_S[4].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[10]
CELL_S[4].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[11]
CELL_S[4].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[24]
CELL_S[4].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[25]
CELL_S[4].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[26]
CELL_S[4].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[27]
CELL_S[4].IMUX_IMUX[8]	PPC.BRAMISOCMDCRRDDBUS[8]
CELL_S[4].IMUX_IMUX[9]	PPC.BRAMISOCMDCRRDDBUS[9]
CELL_S[4].IMUX_IMUX[10]	PPC.BRAMISOCMDCRRDDBUS[10]
CELL_S[4].IMUX_IMUX[11]	PPC.BRAMISOCMDCRRDDBUS[11]
CELL_S[4].IMUX_IMUX[12]	PPC.TSTISOCMC405READDATAOUTI[40]
CELL_S[4].IMUX_IMUX[13]	PPC.TSTISOCMC405READDATAOUTI[41]
CELL_S[4].IMUX_IMUX[14]	PPC.TSTISOCMC405READDATAOUTI[42]
CELL_S[4].IMUX_IMUX[15]	PPC.TSTISOCMC405READDATAOUTI[43]
CELL_S[4].IMUX_IMUX[16]	PPC.TSTISOCMC405RDDVALIDI[0]
CELL_S[4].IMUX_IMUX[17]	PPC.TSTISOCMC405RDDVALIDI[1]
CELL_S[4].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMWRABUS[17]
CELL_S[4].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMWRABUS[18]
CELL_S[4].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMWRABUS[19]
CELL_S[4].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMWRABUS[20]
CELL_S[4].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMWRABUS[21]
CELL_S[4].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMWRABUS[22]
CELL_S[4].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMWRABUS[23]
CELL_S[4].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMWRABUS[24]
CELL_S[4].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMWRABUS[25]
CELL_S[4].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMWRABUS[26]
CELL_S[4].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMWRABUS[27]
CELL_S[4].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMWRABUS[28]
CELL_S[4].OUT_HALF0_BEL[0]	PPC.TSTC405ISOCMABUSO[8]
CELL_S[4].OUT_HALF0_BEL[1]	PPC.TSTC405ISOCMABUSO[9]
CELL_S[4].OUT_HALF0_BEL[2]	PPC.TSTC405ISOCMABUSO[10]
CELL_S[4].OUT_HALF0_BEL[3]	PPC.TSTC405ISOCMABUSO[11]
CELL_S[4].OUT_HALF0_BEL[4]	PPC.TSTC405ISOCMABUSO[12]
CELL_S[4].OUT_HALF0_BEL[5]	PPC.TSTC405ISOCMABUSO[13]
CELL_S[4].OUT_HALF0_BEL[6]	PPC.TSTC405ISOCMABUSO[14]
CELL_S[4].OUT_HALF0_BEL[7]	PPC.TSTC405ISOCMABUSO[15]
CELL_S[4].OUT_HALF1_BEL[0]	PPC.TSTC405ISOCMABUSO[8]
CELL_S[4].OUT_HALF1_BEL[1]	PPC.TSTC405ISOCMABUSO[9]
CELL_S[4].OUT_HALF1_BEL[2]	PPC.TSTC405ISOCMABUSO[10]
CELL_S[4].OUT_HALF1_BEL[3]	PPC.TSTC405ISOCMABUSO[11]
CELL_S[4].OUT_HALF1_BEL[4]	PPC.TSTC405ISOCMABUSO[12]
CELL_S[4].OUT_HALF1_BEL[5]	PPC.TSTC405ISOCMABUSO[13]
CELL_S[4].OUT_HALF1_BEL[6]	PPC.TSTC405ISOCMABUSO[14]
CELL_S[4].OUT_HALF1_BEL[7]	PPC.TSTC405ISOCMABUSO[15]
CELL_S[5].IMUX_SR_OPTINV[0]	PPC.ISARCVALUE[4]
CELL_S[5].IMUX_SR_OPTINV[1]	PPC.ISARCVALUE[5]
CELL_S[5].IMUX_SR_OPTINV[2]	PPC.ISARCVALUE[6]
CELL_S[5].IMUX_SR_OPTINV[3]	PPC.ISARCVALUE[7]
CELL_S[5].IMUX_CLK_OPTINV[0]	PPC.CPMC405CLOCK
CELL_S[5].IMUX_CE_OPTINV[0]	PPC.ISARCVALUE[0]
CELL_S[5].IMUX_CE_OPTINV[1]	PPC.ISARCVALUE[1]
CELL_S[5].IMUX_CE_OPTINV[2]	PPC.ISARCVALUE[2]
CELL_S[5].IMUX_CE_OPTINV[3]	PPC.ISARCVALUE[3]
CELL_S[5].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[4]
CELL_S[5].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[5]
CELL_S[5].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[6]
CELL_S[5].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[7]
CELL_S[5].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[20]
CELL_S[5].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[21]
CELL_S[5].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[22]
CELL_S[5].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[23]
CELL_S[5].IMUX_IMUX[8]	PPC.EICC405CRITINPUTIRQ
CELL_S[5].IMUX_IMUX[9]	PPC.EICC405EXTINPUTIRQ
CELL_S[5].IMUX_IMUX[10]	PPC.BRAMISOCMDCRRDDBUS[4]
CELL_S[5].IMUX_IMUX[11]	PPC.BRAMISOCMDCRRDDBUS[5]
CELL_S[5].IMUX_IMUX[12]	PPC.BRAMISOCMDCRRDDBUS[6]
CELL_S[5].IMUX_IMUX[13]	PPC.BRAMISOCMDCRRDDBUS[7]
CELL_S[5].IMUX_IMUX[14]	PPC.TSTISOCMC405HOLDI
CELL_S[5].IMUX_IMUX[15]	PPC.TSTISOCMC405READDATAOUTI[36]
CELL_S[5].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[37]
CELL_S[5].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[38]
CELL_S[5].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[39]
CELL_S[5].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMEVENWRITEEN
CELL_S[5].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMODDWRITEEN
CELL_S[5].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMEN
CELL_S[5].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMRDABUS[8]
CELL_S[5].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMRDABUS[9]
CELL_S[5].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMRDABUS[10]
CELL_S[5].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMRDABUS[11]
CELL_S[5].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMRDABUS[12]
CELL_S[5].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMRDABUS[13]
CELL_S[5].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMRDABUS[14]
CELL_S[5].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMRDABUS[15]
CELL_S[5].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMRDABUS[16]
CELL_S[5].OUT_HALF0_BEL[0]	PPC.TSTC405ISOCMABUSO[0]
CELL_S[5].OUT_HALF0_BEL[1]	PPC.TSTC405ISOCMABUSO[1]
CELL_S[5].OUT_HALF0_BEL[2]	PPC.TSTC405ISOCMABUSO[2]
CELL_S[5].OUT_HALF0_BEL[3]	PPC.TSTC405ISOCMABUSO[3]
CELL_S[5].OUT_HALF0_BEL[4]	PPC.TSTC405ISOCMABUSO[4]
CELL_S[5].OUT_HALF0_BEL[5]	PPC.TSTC405ISOCMABUSO[5]
CELL_S[5].OUT_HALF0_BEL[6]	PPC.TSTC405ISOCMABUSO[6]
CELL_S[5].OUT_HALF0_BEL[7]	PPC.TSTC405ISOCMABUSO[7]
CELL_S[5].OUT_HALF1_BEL[0]	PPC.TSTC405ISOCMABUSO[0]
CELL_S[5].OUT_HALF1_BEL[1]	PPC.TSTC405ISOCMABUSO[1]
CELL_S[5].OUT_HALF1_BEL[2]	PPC.TSTC405ISOCMABUSO[2]
CELL_S[5].OUT_HALF1_BEL[3]	PPC.TSTC405ISOCMABUSO[3]
CELL_S[5].OUT_HALF1_BEL[4]	PPC.TSTC405ISOCMABUSO[4]
CELL_S[5].OUT_HALF1_BEL[5]	PPC.TSTC405ISOCMABUSO[5]
CELL_S[5].OUT_HALF1_BEL[6]	PPC.TSTC405ISOCMABUSO[6]
CELL_S[5].OUT_HALF1_BEL[7]	PPC.TSTC405ISOCMABUSO[7]
CELL_S[6].IMUX_SR_OPTINV[0]	PPC.TIEC405CLOCKSELECTS[0]
CELL_S[6].IMUX_SR_OPTINV[1]	PPC.TIEC405CLOCKSELECTS[1]
CELL_S[6].IMUX_SR_OPTINV[2]	PPC.CPMC405CLOCKFBENABLE
CELL_S[6].IMUX_SR_OPTINV[3]	PPC.TSTSEPPCEMACI
CELL_S[6].IMUX_CLK_OPTINV[0]	PPC.BRAMISOCMCLK
CELL_S[6].IMUX_CE_OPTINV[0]	PPC.TIEC405ICUMARGIN
CELL_S[6].IMUX_CE_OPTINV[1]	PPC.TIEC405DCUMARGIN
CELL_S[6].IMUX_CE_OPTINV[2]	PPC.TIEC405TAGMARGIN
CELL_S[6].IMUX_CE_OPTINV[3]	PPC.TIEC405TLBMARGIN
CELL_S[6].IMUX_IMUX[0]	PPC.BRAMISOCMRDDBUS[0]
CELL_S[6].IMUX_IMUX[1]	PPC.BRAMISOCMRDDBUS[1]
CELL_S[6].IMUX_IMUX[2]	PPC.BRAMISOCMRDDBUS[2]
CELL_S[6].IMUX_IMUX[3]	PPC.BRAMISOCMRDDBUS[3]
CELL_S[6].IMUX_IMUX[4]	PPC.BRAMISOCMRDDBUS[16]
CELL_S[6].IMUX_IMUX[5]	PPC.BRAMISOCMRDDBUS[17]
CELL_S[6].IMUX_IMUX[6]	PPC.BRAMISOCMRDDBUS[18]
CELL_S[6].IMUX_IMUX[7]	PPC.BRAMISOCMRDDBUS[19]
CELL_S[6].IMUX_IMUX[8]	PPC.JTGC405BNDSCANTDO
CELL_S[6].IMUX_IMUX[9]	PPC.JTGC405TDI
CELL_S[6].IMUX_IMUX[10]	PPC.JTGC405TMS
CELL_S[6].IMUX_IMUX[11]	PPC.JTGC405TRSTNEG
CELL_S[6].IMUX_IMUX[12]	PPC.BRAMISOCMDCRRDDBUS[0]
CELL_S[6].IMUX_IMUX[13]	PPC.BRAMISOCMDCRRDDBUS[1]
CELL_S[6].IMUX_IMUX[14]	PPC.BRAMISOCMDCRRDDBUS[2]
CELL_S[6].IMUX_IMUX[15]	PPC.BRAMISOCMDCRRDDBUS[3]
CELL_S[6].IMUX_IMUX[16]	PPC.TSTISOCMC405READDATAOUTI[32]
CELL_S[6].IMUX_IMUX[17]	PPC.TSTISOCMC405READDATAOUTI[33]
CELL_S[6].IMUX_IMUX[18]	PPC.TSTISOCMC405READDATAOUTI[34]
CELL_S[6].IMUX_IMUX[19]	PPC.TSTISOCMC405READDATAOUTI[35]
CELL_S[6].OUT_BEST_TMIN[0]	PPC.ISOCMBRAMRDABUS[17]
CELL_S[6].OUT_BEST_TMIN[1]	PPC.ISOCMBRAMRDABUS[18]
CELL_S[6].OUT_BEST_TMIN[2]	PPC.ISOCMBRAMRDABUS[19]
CELL_S[6].OUT_BEST_TMIN[3]	PPC.ISOCMBRAMRDABUS[20]
CELL_S[6].OUT_BEST_TMIN[4]	PPC.ISOCMBRAMRDABUS[21]
CELL_S[6].OUT_BEST_TMIN[5]	PPC.ISOCMBRAMRDABUS[22]
CELL_S[6].OUT_BEST_TMIN[6]	PPC.ISOCMBRAMRDABUS[23]
CELL_S[6].OUT_BEST_TMIN[7]	PPC.ISOCMBRAMRDABUS[24]
CELL_S[6].OUT_SEC_TMIN[0]	PPC.ISOCMBRAMRDABUS[25]
CELL_S[6].OUT_SEC_TMIN[1]	PPC.ISOCMBRAMRDABUS[26]
CELL_S[6].OUT_SEC_TMIN[2]	PPC.ISOCMBRAMRDABUS[27]
CELL_S[6].OUT_SEC_TMIN[3]	PPC.ISOCMBRAMRDABUS[28]
CELL_N[0].IMUX_SR_OPTINV[0]	PPC.DSARCVALUE[4]
CELL_N[0].IMUX_SR_OPTINV[1]	PPC.DSARCVALUE[5]
CELL_N[0].IMUX_SR_OPTINV[2]	PPC.DSARCVALUE[6]
CELL_N[0].IMUX_SR_OPTINV[3]	PPC.DSARCVALUE[7]
CELL_N[0].IMUX_CLK_OPTINV[0]	PPC.BRAMDSOCMCLK
CELL_N[0].IMUX_CE_OPTINV[0]	PPC.DSARCVALUE[0]
CELL_N[0].IMUX_CE_OPTINV[1]	PPC.DSARCVALUE[1]
CELL_N[0].IMUX_CE_OPTINV[2]	PPC.DSARCVALUE[2]
CELL_N[0].IMUX_CE_OPTINV[3]	PPC.DSARCVALUE[3]
CELL_N[0].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[0]
CELL_N[0].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[1]
CELL_N[0].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[2]
CELL_N[0].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[3]
CELL_N[0].IMUX_IMUX[4]	PPC.BRAMDSOCMRDDBUS[4]
CELL_N[0].IMUX_IMUX[5]	PPC.BRAMDSOCMRDDBUS[5]
CELL_N[0].IMUX_IMUX[6]	PPC.BRAMDSOCMRDDBUS[6]
CELL_N[0].IMUX_IMUX[7]	PPC.BRAMDSOCMRDDBUS[7]
CELL_N[0].IMUX_IMUX[8]	PPC.TSTAPUC405EXERESULTI[28]
CELL_N[0].IMUX_IMUX[9]	PPC.TSTAPUC405EXERESULTI[29]
CELL_N[0].IMUX_IMUX[10]	PPC.TSTAPUC405EXERESULTI[30]
CELL_N[0].IMUX_IMUX[11]	PPC.TSTAPUC405EXERESULTI[31]
CELL_N[0].IMUX_IMUX[12]	PPC.TSTDSOCMC405RDDBUSI[28]
CELL_N[0].IMUX_IMUX[13]	PPC.TSTDSOCMC405RDDBUSI[29]
CELL_N[0].IMUX_IMUX[14]	PPC.TSTDSOCMC405RDDBUSI[30]
CELL_N[0].IMUX_IMUX[15]	PPC.TSTDSOCMC405RDDBUSI[31]
CELL_N[0].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[24]
CELL_N[0].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[25]
CELL_N[0].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[26]
CELL_N[0].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[27]
CELL_N[0].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[0]
CELL_N[0].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[1]
CELL_N[0].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[2]
CELL_N[0].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[3]
CELL_N[0].OUT_BEST_TMIN[4]	PPC.DSOCMBRAMWRDBUS[4]
CELL_N[0].OUT_BEST_TMIN[5]	PPC.DSOCMBRAMWRDBUS[5]
CELL_N[0].OUT_BEST_TMIN[6]	PPC.DSOCMBRAMWRDBUS[6]
CELL_N[0].OUT_BEST_TMIN[7]	PPC.DSOCMBRAMWRDBUS[7]
CELL_N[0].OUT_SEC_TMIN[0]	PPC.DSOCMBRAMABUS[24]
CELL_N[0].OUT_SEC_TMIN[1]	PPC.DSOCMBRAMABUS[25]
CELL_N[0].OUT_SEC_TMIN[2]	PPC.DSOCMBRAMABUS[26]
CELL_N[0].OUT_SEC_TMIN[3]	PPC.DSOCMBRAMABUS[27]
CELL_N[0].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[24]
CELL_N[0].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[25]
CELL_N[0].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[26]
CELL_N[0].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[27]
CELL_N[0].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[24]
CELL_N[0].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[25]
CELL_N[0].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[26]
CELL_N[0].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[27]
CELL_N[0].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[24]
CELL_N[0].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[25]
CELL_N[0].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[26]
CELL_N[0].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[27]
CELL_N[0].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[24]
CELL_N[0].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[25]
CELL_N[0].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[26]
CELL_N[0].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[27]
CELL_N[1].IMUX_SR_OPTINV[0]	PPC.DSCNTLVALUE[4]
CELL_N[1].IMUX_SR_OPTINV[1]	PPC.DSCNTLVALUE[5]
CELL_N[1].IMUX_SR_OPTINV[2]	PPC.DSCNTLVALUE[6]
CELL_N[1].IMUX_SR_OPTINV[3]	PPC.DSCNTLVALUE[7]
CELL_N[1].IMUX_CE_OPTINV[0]	PPC.DSCNTLVALUE[0]
CELL_N[1].IMUX_CE_OPTINV[1]	PPC.DSCNTLVALUE[1]
CELL_N[1].IMUX_CE_OPTINV[2]	PPC.DSCNTLVALUE[2]
CELL_N[1].IMUX_CE_OPTINV[3]	PPC.DSCNTLVALUE[3]
CELL_N[1].IMUX_IMUX[0]	PPC.FCMAPUDCDLDSTBYTE
CELL_N[1].IMUX_IMUX[1]	PPC.FCMAPUDCDLDSTHW
CELL_N[1].IMUX_IMUX[2]	PPC.FCMAPUDCDLDSTWD
CELL_N[1].IMUX_IMUX[3]	PPC.FCMAPUDCDLDSTDW
CELL_N[1].IMUX_IMUX[4]	PPC.FCMAPUDCDLDSTQW
CELL_N[1].IMUX_IMUX[5]	PPC.FCMAPUDCDTRAPBE
CELL_N[1].IMUX_IMUX[6]	PPC.FCMAPUDCDTRAPLE
CELL_N[1].IMUX_IMUX[7]	PPC.FCMAPULOADWAIT
CELL_N[1].IMUX_IMUX[8]	PPC.TSTAPUC405EXERESULTI[20]
CELL_N[1].IMUX_IMUX[9]	PPC.TSTAPUC405EXERESULTI[21]
CELL_N[1].IMUX_IMUX[10]	PPC.TSTAPUC405EXERESULTI[22]
CELL_N[1].IMUX_IMUX[11]	PPC.TSTAPUC405EXERESULTI[23]
CELL_N[1].IMUX_IMUX[12]	PPC.TSTAPUC405EXERESULTI[24]
CELL_N[1].IMUX_IMUX[13]	PPC.TSTAPUC405EXERESULTI[25]
CELL_N[1].IMUX_IMUX[14]	PPC.TSTAPUC405EXERESULTI[26]
CELL_N[1].IMUX_IMUX[15]	PPC.TSTAPUC405EXERESULTI[27]
CELL_N[1].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[20]
CELL_N[1].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[21]
CELL_N[1].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[22]
CELL_N[1].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[23]
CELL_N[1].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[8]
CELL_N[1].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[9]
CELL_N[1].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[10]
CELL_N[1].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[11]
CELL_N[1].OUT_BEST_TMIN[4]	PPC.DSOCMBRAMABUS[16]
CELL_N[1].OUT_BEST_TMIN[5]	PPC.DSOCMBRAMABUS[17]
CELL_N[1].OUT_BEST_TMIN[6]	PPC.DSOCMBRAMABUS[18]
CELL_N[1].OUT_BEST_TMIN[7]	PPC.DSOCMBRAMABUS[19]
CELL_N[1].OUT_SEC_TMIN[0]	PPC.DSOCMBRAMABUS[20]
CELL_N[1].OUT_SEC_TMIN[1]	PPC.DSOCMBRAMABUS[21]
CELL_N[1].OUT_SEC_TMIN[2]	PPC.DSOCMBRAMABUS[22]
CELL_N[1].OUT_SEC_TMIN[3]	PPC.DSOCMBRAMABUS[23]
CELL_N[1].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[20]
CELL_N[1].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[21]
CELL_N[1].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[22]
CELL_N[1].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[23]
CELL_N[1].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[20]
CELL_N[1].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[21]
CELL_N[1].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[22]
CELL_N[1].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[23]
CELL_N[1].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[20]
CELL_N[1].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[21]
CELL_N[1].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[22]
CELL_N[1].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[23]
CELL_N[1].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[20]
CELL_N[1].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[21]
CELL_N[1].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[22]
CELL_N[1].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[23]
CELL_N[2].IMUX_SR_OPTINV[0]	PPC.TIEAPUCONTROL[11]
CELL_N[2].IMUX_SR_OPTINV[1]	PPC.TIEAPUCONTROL[10]
CELL_N[2].IMUX_SR_OPTINV[2]	PPC.TIEAPUCONTROL[9]
CELL_N[2].IMUX_SR_OPTINV[3]	PPC.TIEAPUCONTROL[8]
CELL_N[2].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC1GTXCLK
CELL_N[2].IMUX_CE_OPTINV[0]	PPC.TIEAPUCONTROL[15]
CELL_N[2].IMUX_CE_OPTINV[1]	PPC.TIEAPUCONTROL[14]
CELL_N[2].IMUX_CE_OPTINV[2]	PPC.TIEAPUCONTROL[13]
CELL_N[2].IMUX_CE_OPTINV[3]	PPC.TIEAPUCONTROL[12]
CELL_N[2].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[8]
CELL_N[2].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[9]
CELL_N[2].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[10]
CELL_N[2].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[11]
CELL_N[2].IMUX_IMUX[4]	PPC.FCMAPUEXECRFIELD[0]
CELL_N[2].IMUX_IMUX[5]	PPC.FCMAPUEXECRFIELD[1]
CELL_N[2].IMUX_IMUX[6]	PPC.FCMAPUEXECRFIELD[2]
CELL_N[2].IMUX_IMUX[7]	PPC.DSOCMRWCOMPLETE
CELL_N[2].IMUX_IMUX[8]	PPC.FCMAPUDCDLOAD
CELL_N[2].IMUX_IMUX[9]	PPC.FCMAPUDCDSTORE
CELL_N[2].IMUX_IMUX[10]	PPC.TSTDSOCMC405COMPLETEI
CELL_N[2].IMUX_IMUX[11]	PPC.TSTDSOCMC405DISOPERANDFWDI
CELL_N[2].IMUX_IMUX[12]	PPC.TSTAPUC405EXERESULTI[16]
CELL_N[2].IMUX_IMUX[13]	PPC.TSTAPUC405EXERESULTI[17]
CELL_N[2].IMUX_IMUX[14]	PPC.TSTAPUC405EXERESULTI[18]
CELL_N[2].IMUX_IMUX[15]	PPC.TSTAPUC405EXERESULTI[19]
CELL_N[2].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[16]
CELL_N[2].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[17]
CELL_N[2].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[18]
CELL_N[2].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[19]
CELL_N[2].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[12]
CELL_N[2].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[13]
CELL_N[2].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[14]
CELL_N[2].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[15]
CELL_N[2].OUT_BEST_TMIN[4]	PPC.DSOCMBRAMBYTEWRITE[0]
CELL_N[2].OUT_BEST_TMIN[5]	PPC.DSOCMBRAMBYTEWRITE[1]
CELL_N[2].OUT_BEST_TMIN[6]	PPC.DSOCMBRAMBYTEWRITE[2]
CELL_N[2].OUT_BEST_TMIN[7]	PPC.DSOCMBRAMBYTEWRITE[3]
CELL_N[2].OUT_SEC_TMIN[0]	PPC.DSOCMBRAMABUS[28]
CELL_N[2].OUT_SEC_TMIN[1]	PPC.DSOCMBRAMABUS[29]
CELL_N[2].OUT_SEC_TMIN[2]	PPC.DSOCMBRAMEN
CELL_N[2].OUT_SEC_TMIN[3]	PPC.DSOCMRDADDRVALID
CELL_N[2].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[16]
CELL_N[2].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[17]
CELL_N[2].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[18]
CELL_N[2].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[19]
CELL_N[2].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[16]
CELL_N[2].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[17]
CELL_N[2].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[18]
CELL_N[2].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[19]
CELL_N[2].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[16]
CELL_N[2].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[17]
CELL_N[2].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[18]
CELL_N[2].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[19]
CELL_N[2].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[16]
CELL_N[2].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[17]
CELL_N[2].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[18]
CELL_N[2].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[19]
CELL_N[3].IMUX_SR_OPTINV[0]	PPC.TIEAPUCONTROL[3]
CELL_N[3].IMUX_SR_OPTINV[1]	PPC.TIEAPUCONTROL[2]
CELL_N[3].IMUX_SR_OPTINV[2]	PPC.TIEAPUCONTROL[1]
CELL_N[3].IMUX_SR_OPTINV[3]	PPC.TIEAPUCONTROL[0]
CELL_N[3].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC1RXCLK
CELL_N[3].IMUX_CE_OPTINV[0]	PPC.TIEAPUCONTROL[7]
CELL_N[3].IMUX_CE_OPTINV[1]	PPC.TIEAPUCONTROL[6]
CELL_N[3].IMUX_CE_OPTINV[2]	PPC.TIEAPUCONTROL[5]
CELL_N[3].IMUX_CE_OPTINV[3]	PPC.TIEAPUCONTROL[4]
CELL_N[3].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[12]
CELL_N[3].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[13]
CELL_N[3].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[14]
CELL_N[3].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[15]
CELL_N[3].IMUX_IMUX[4]	PPC.BRAMDSOCMRDDBUS[16]
CELL_N[3].IMUX_IMUX[5]	PPC.BRAMDSOCMRDDBUS[17]
CELL_N[3].IMUX_IMUX[6]	PPC.BRAMDSOCMRDDBUS[18]
CELL_N[3].IMUX_IMUX[7]	PPC.BRAMDSOCMRDDBUS[19]
CELL_N[3].IMUX_IMUX[8]	PPC.FCMAPUEXEBLOCKINGMCO
CELL_N[3].IMUX_IMUX[9]	PPC.TSTAPUC405EXERESULTI[12]
CELL_N[3].IMUX_IMUX[10]	PPC.TSTAPUC405EXERESULTI[13]
CELL_N[3].IMUX_IMUX[11]	PPC.TSTAPUC405EXERESULTI[14]
CELL_N[3].IMUX_IMUX[12]	PPC.TSTAPUC405EXERESULTI[15]
CELL_N[3].IMUX_IMUX[13]	PPC.TSTDSOCMC405HOLDI
CELL_N[3].IMUX_IMUX[14]	PPC.TSTAPUC405DCDTRAPBEI
CELL_N[3].IMUX_IMUX[15]	PPC.TSTAPUC405DCDTRAPLEI
CELL_N[3].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[12]
CELL_N[3].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[13]
CELL_N[3].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[14]
CELL_N[3].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[15]
CELL_N[3].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[16]
CELL_N[3].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[17]
CELL_N[3].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[18]
CELL_N[3].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[19]
CELL_N[3].OUT_BEST_TMIN[4]	PPC.APUFCMINSTRUCTION[31]
CELL_N[3].OUT_BEST_TMIN[5]	PPC.APUFCMINSTRUCTION[30]
CELL_N[3].OUT_BEST_TMIN[6]	PPC.APUFCMINSTRUCTION[29]
CELL_N[3].OUT_BEST_TMIN[7]	PPC.APUFCMINSTRUCTION[28]
CELL_N[3].OUT_SEC_TMIN[0]	PPC.APUFCMINSTRUCTION[27]
CELL_N[3].OUT_SEC_TMIN[1]	PPC.APUFCMINSTRUCTION[26]
CELL_N[3].OUT_SEC_TMIN[2]	PPC.APUFCMINSTRUCTION[25]
CELL_N[3].OUT_SEC_TMIN[3]	PPC.APUFCMINSTRUCTION[24]
CELL_N[3].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[12]
CELL_N[3].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[13]
CELL_N[3].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[14]
CELL_N[3].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[15]
CELL_N[3].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[12]
CELL_N[3].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[13]
CELL_N[3].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[14]
CELL_N[3].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[15]
CELL_N[3].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[12]
CELL_N[3].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[13]
CELL_N[3].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[14]
CELL_N[3].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[15]
CELL_N[3].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[12]
CELL_N[3].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[13]
CELL_N[3].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[14]
CELL_N[3].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[15]
CELL_N[4].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[29]
CELL_N[4].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[28]
CELL_N[4].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[27]
CELL_N[4].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[26]
CELL_N[4].IMUX_CLK_OPTINV[0]	EMAC.PHYEMAC1MIITXCLK
CELL_N[4].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[33]
CELL_N[4].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[32]
CELL_N[4].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[31]
CELL_N[4].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[30]
CELL_N[4].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[20]
CELL_N[4].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[21]
CELL_N[4].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[22]
CELL_N[4].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[23]
CELL_N[4].IMUX_IMUX[4]	PPC.FCMAPUEXENONBLOCKINGMCO
CELL_N[4].IMUX_IMUX[5]	PPC.TSTAPUC405EXERESULTI[8]
CELL_N[4].IMUX_IMUX[6]	PPC.TSTAPUC405EXERESULTI[9]
CELL_N[4].IMUX_IMUX[7]	PPC.TSTAPUC405EXERESULTI[10]
CELL_N[4].IMUX_IMUX[8]	PPC.TSTAPUC405EXERESULTI[11]
CELL_N[4].IMUX_IMUX[9]	PPC.TSTAPUC405DCDLOADI
CELL_N[4].IMUX_IMUX[10]	PPC.TSTAPUC405DCDSTOREI
CELL_N[4].IMUX_IMUX[11]	PPC.TSTAPUC405DCDXERCAENI
CELL_N[4].IMUX_IMUX[12]	PPC.TSTAPUC405DCDXEROVENI
CELL_N[4].IMUX_IMUX[13]	PPC.TSTAPUC405DCDPRIVOPI
CELL_N[4].IMUX_IMUX[14]	PPC.TSTAPUC405DCDCRENI
CELL_N[4].IMUX_IMUX[15]	PPC.TSTAPUC405DCDUPDATEI
CELL_N[4].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[8]
CELL_N[4].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[9]
CELL_N[4].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[10]
CELL_N[4].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[11]
CELL_N[4].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[20]
CELL_N[4].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[21]
CELL_N[4].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[22]
CELL_N[4].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[23]
CELL_N[4].OUT_BEST_TMIN[4]	PPC.APUFCMINSTRUCTION[23]
CELL_N[4].OUT_BEST_TMIN[5]	PPC.APUFCMINSTRUCTION[22]
CELL_N[4].OUT_BEST_TMIN[6]	PPC.APUFCMINSTRUCTION[21]
CELL_N[4].OUT_BEST_TMIN[7]	PPC.APUFCMINSTRUCTION[20]
CELL_N[4].OUT_SEC_TMIN[0]	PPC.APUFCMINSTRUCTION[19]
CELL_N[4].OUT_SEC_TMIN[1]	PPC.APUFCMINSTRUCTION[18]
CELL_N[4].OUT_SEC_TMIN[2]	PPC.APUFCMINSTRUCTION[17]
CELL_N[4].OUT_SEC_TMIN[3]	PPC.APUFCMINSTRUCTION[16]
CELL_N[4].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[8]
CELL_N[4].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[9]
CELL_N[4].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[10]
CELL_N[4].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[11]
CELL_N[4].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[8]
CELL_N[4].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[9]
CELL_N[4].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[10]
CELL_N[4].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[11]
CELL_N[4].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[8]
CELL_N[4].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[9]
CELL_N[4].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[10]
CELL_N[4].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[11]
CELL_N[4].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[8]
CELL_N[4].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[9]
CELL_N[4].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[10]
CELL_N[4].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[11]
CELL_N[5].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[37]
CELL_N[5].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[36]
CELL_N[5].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[35]
CELL_N[5].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[34]
CELL_N[5].IMUX_CLK_OPTINV[0]	PPC.CPMFCMCLK
CELL_N[5].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[41]
CELL_N[5].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[40]
CELL_N[5].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[39]
CELL_N[5].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[38]
CELL_N[5].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[24]
CELL_N[5].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[25]
CELL_N[5].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[26]
CELL_N[5].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[27]
CELL_N[5].IMUX_IMUX[4]	PPC.FCMAPUDCDFORCEBESTEERING
CELL_N[5].IMUX_IMUX[5]	PPC.TSTAPUC405EXERESULTI[4]
CELL_N[5].IMUX_IMUX[6]	PPC.TSTAPUC405EXERESULTI[5]
CELL_N[5].IMUX_IMUX[7]	PPC.TSTAPUC405EXERESULTI[6]
CELL_N[5].IMUX_IMUX[8]	PPC.TSTAPUC405EXERESULTI[7]
CELL_N[5].IMUX_IMUX[9]	PPC.TSTAPUC405EXECRFIELDI[0]
CELL_N[5].IMUX_IMUX[10]	PPC.TSTAPUC405EXECRFIELDI[1]
CELL_N[5].IMUX_IMUX[11]	PPC.TSTAPUC405EXECRFIELDI[2]
CELL_N[5].IMUX_IMUX[12]	PPC.TSTAPUC405DCDFPUOPI
CELL_N[5].IMUX_IMUX[13]	PPC.TSTAPUC405DCDGPRWRITEI
CELL_N[5].IMUX_IMUX[14]	PPC.TSTAPUC405DCDRAENI
CELL_N[5].IMUX_IMUX[15]	PPC.TSTAPUC405DCDRBENI
CELL_N[5].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[4]
CELL_N[5].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[5]
CELL_N[5].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[6]
CELL_N[5].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[7]
CELL_N[5].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[24]
CELL_N[5].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[25]
CELL_N[5].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[26]
CELL_N[5].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[27]
CELL_N[5].OUT_BEST_TMIN[4]	PPC.APUFCMINSTRUCTION[15]
CELL_N[5].OUT_BEST_TMIN[5]	PPC.APUFCMINSTRUCTION[14]
CELL_N[5].OUT_BEST_TMIN[6]	PPC.APUFCMINSTRUCTION[13]
CELL_N[5].OUT_BEST_TMIN[7]	PPC.APUFCMINSTRUCTION[12]
CELL_N[5].OUT_SEC_TMIN[0]	PPC.APUFCMINSTRUCTION[11]
CELL_N[5].OUT_SEC_TMIN[1]	PPC.APUFCMINSTRUCTION[10]
CELL_N[5].OUT_SEC_TMIN[2]	PPC.APUFCMINSTRUCTION[9]
CELL_N[5].OUT_SEC_TMIN[3]	PPC.APUFCMINSTRUCTION[8]
CELL_N[5].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[4]
CELL_N[5].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[5]
CELL_N[5].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[6]
CELL_N[5].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[7]
CELL_N[5].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[4]
CELL_N[5].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[5]
CELL_N[5].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[6]
CELL_N[5].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[7]
CELL_N[5].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[4]
CELL_N[5].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[5]
CELL_N[5].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[6]
CELL_N[5].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[7]
CELL_N[5].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[4]
CELL_N[5].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[5]
CELL_N[5].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[6]
CELL_N[5].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[7]
CELL_N[6].IMUX_SR_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[45]
CELL_N[6].IMUX_SR_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[44]
CELL_N[6].IMUX_SR_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[43]
CELL_N[6].IMUX_SR_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[42]
CELL_N[6].IMUX_CE_OPTINV[0]	EMAC.TIEEMAC1CONFIGVEC[49]
CELL_N[6].IMUX_CE_OPTINV[1]	EMAC.TIEEMAC1CONFIGVEC[48]
CELL_N[6].IMUX_CE_OPTINV[2]	EMAC.TIEEMAC1CONFIGVEC[47]
CELL_N[6].IMUX_CE_OPTINV[3]	EMAC.TIEEMAC1CONFIGVEC[46]
CELL_N[6].IMUX_IMUX[0]	PPC.BRAMDSOCMRDDBUS[28]
CELL_N[6].IMUX_IMUX[1]	PPC.BRAMDSOCMRDDBUS[29]
CELL_N[6].IMUX_IMUX[2]	PPC.BRAMDSOCMRDDBUS[30]
CELL_N[6].IMUX_IMUX[3]	PPC.BRAMDSOCMRDDBUS[31]
CELL_N[6].IMUX_IMUX[4]	PPC.FCMAPUDCDUPDATE
CELL_N[6].IMUX_IMUX[5]	PPC.FCMAPUDCDGPRWRITE
CELL_N[6].IMUX_IMUX[6]	PPC.FCMAPUDCDRAEN
CELL_N[6].IMUX_IMUX[7]	PPC.FCMAPUDCDRBEN
CELL_N[6].IMUX_IMUX[8]	PPC.TSTAPUC405EXERESULTI[0]
CELL_N[6].IMUX_IMUX[9]	PPC.TSTAPUC405EXERESULTI[1]
CELL_N[6].IMUX_IMUX[10]	PPC.TSTAPUC405EXERESULTI[2]
CELL_N[6].IMUX_IMUX[11]	PPC.TSTAPUC405EXERESULTI[3]
CELL_N[6].IMUX_IMUX[12]	PPC.TSTAPUC405EXECRI[0]
CELL_N[6].IMUX_IMUX[13]	PPC.TSTAPUC405EXECRI[1]
CELL_N[6].IMUX_IMUX[14]	PPC.TSTAPUC405EXECRI[2]
CELL_N[6].IMUX_IMUX[15]	PPC.TSTAPUC405EXECRI[3]
CELL_N[6].IMUX_IMUX[16]	PPC.TSTDSOCMC405RDDBUSI[0]
CELL_N[6].IMUX_IMUX[17]	PPC.TSTDSOCMC405RDDBUSI[1]
CELL_N[6].IMUX_IMUX[18]	PPC.TSTDSOCMC405RDDBUSI[2]
CELL_N[6].IMUX_IMUX[19]	PPC.TSTDSOCMC405RDDBUSI[3]
CELL_N[6].OUT_BEST_TMIN[0]	PPC.DSOCMBRAMWRDBUS[28]
CELL_N[6].OUT_BEST_TMIN[1]	PPC.DSOCMBRAMWRDBUS[29]
CELL_N[6].OUT_BEST_TMIN[2]	PPC.DSOCMBRAMWRDBUS[30]
CELL_N[6].OUT_BEST_TMIN[3]	PPC.DSOCMBRAMWRDBUS[31]
CELL_N[6].OUT_BEST_TMIN[4]	PPC.APUFCMINSTRUCTION[7]
CELL_N[6].OUT_BEST_TMIN[5]	PPC.APUFCMINSTRUCTION[6]
CELL_N[6].OUT_BEST_TMIN[6]	PPC.APUFCMINSTRUCTION[5]
CELL_N[6].OUT_BEST_TMIN[7]	PPC.APUFCMINSTRUCTION[4]
CELL_N[6].OUT_SEC_TMIN[0]	PPC.APUFCMINSTRUCTION[3]
CELL_N[6].OUT_SEC_TMIN[1]	PPC.APUFCMINSTRUCTION[2]
CELL_N[6].OUT_SEC_TMIN[2]	PPC.APUFCMINSTRUCTION[1]
CELL_N[6].OUT_SEC_TMIN[3]	PPC.APUFCMINSTRUCTION[0]
CELL_N[6].OUT_HALF0_BEL[0]	PPC.TSTC405APUEXERADATAO[0]
CELL_N[6].OUT_HALF0_BEL[1]	PPC.TSTC405APUEXERADATAO[1]
CELL_N[6].OUT_HALF0_BEL[2]	PPC.TSTC405APUEXERADATAO[2]
CELL_N[6].OUT_HALF0_BEL[3]	PPC.TSTC405APUEXERADATAO[3]
CELL_N[6].OUT_HALF0_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[0]
CELL_N[6].OUT_HALF0_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[1]
CELL_N[6].OUT_HALF0_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[2]
CELL_N[6].OUT_HALF0_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[3]
CELL_N[6].OUT_HALF1_BEL[0]	PPC.TSTC405APUEXERADATAO[0]
CELL_N[6].OUT_HALF1_BEL[1]	PPC.TSTC405APUEXERADATAO[1]
CELL_N[6].OUT_HALF1_BEL[2]	PPC.TSTC405APUEXERADATAO[2]
CELL_N[6].OUT_HALF1_BEL[3]	PPC.TSTC405APUEXERADATAO[3]
CELL_N[6].OUT_HALF1_BEL[4]	PPC.TSTC405APUDCDINSTRUCTIONO[0]
CELL_N[6].OUT_HALF1_BEL[5]	PPC.TSTC405APUDCDINSTRUCTIONO[1]
CELL_N[6].OUT_HALF1_BEL[6]	PPC.TSTC405APUDCDINSTRUCTIONO[2]
CELL_N[6].OUT_HALF1_BEL[7]	PPC.TSTC405APUDCDINSTRUCTIONO[3]

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PowerPC 405 and Ethernet MAC

Tile PPC

Bels PPC405

Bels EMAC_V4

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