Configuration Center
TODO: document
Tile CFG
Cells: 20 IRIs: 0
Bel SYSMON
Pin | Direction | Wires |
---|---|---|
ALM0 | output | TCELL13:OUT10 |
ALM1 | output | TCELL13:OUT11 |
ALM2 | output | TCELL13:OUT12 |
BUSY | output | TCELL13:OUT8 |
CHANNEL0 | output | TCELL13:OUT1 |
CHANNEL1 | output | TCELL13:OUT2 |
CHANNEL2 | output | TCELL13:OUT3 |
CHANNEL3 | output | TCELL13:OUT4 |
CHANNEL4 | output | TCELL13:OUT5 |
CONVST | input | TCELL13:IMUX.IMUX8 |
CONVSTCLK | input | TCELL13:IMUX.CLK0 |
DADDR0 | input | TCELL12:IMUX.IMUX16 |
DADDR1 | input | TCELL12:IMUX.IMUX17 |
DADDR2 | input | TCELL12:IMUX.IMUX18 |
DADDR3 | input | TCELL12:IMUX.IMUX19 |
DADDR4 | input | TCELL12:IMUX.IMUX20 |
DADDR5 | input | TCELL12:IMUX.IMUX21 |
DADDR6 | input | TCELL12:IMUX.IMUX22 |
DCLK | input | TCELL12:IMUX.CLK0 |
DEN | input | TCELL12:IMUX.IMUX24 |
DI0 | input | TCELL12:IMUX.IMUX0 |
DI1 | input | TCELL12:IMUX.IMUX1 |
DI10 | input | TCELL12:IMUX.IMUX10 |
DI11 | input | TCELL12:IMUX.IMUX11 |
DI12 | input | TCELL12:IMUX.IMUX12 |
DI13 | input | TCELL12:IMUX.IMUX13 |
DI14 | input | TCELL12:IMUX.IMUX14 |
DI15 | input | TCELL12:IMUX.IMUX15 |
DI2 | input | TCELL12:IMUX.IMUX2 |
DI3 | input | TCELL12:IMUX.IMUX3 |
DI4 | input | TCELL12:IMUX.IMUX4 |
DI5 | input | TCELL12:IMUX.IMUX5 |
DI6 | input | TCELL12:IMUX.IMUX6 |
DI7 | input | TCELL12:IMUX.IMUX7 |
DI8 | input | TCELL12:IMUX.IMUX8 |
DI9 | input | TCELL12:IMUX.IMUX9 |
DO0 | output | TCELL12:OUT0 |
DO1 | output | TCELL12:OUT1 |
DO10 | output | TCELL12:OUT10 |
DO11 | output | TCELL12:OUT11 |
DO12 | output | TCELL12:OUT12 |
DO13 | output | TCELL12:OUT13 |
DO14 | output | TCELL12:OUT14 |
DO15 | output | TCELL12:OUT15 |
DO2 | output | TCELL12:OUT2 |
DO3 | output | TCELL12:OUT3 |
DO4 | output | TCELL12:OUT4 |
DO5 | output | TCELL12:OUT5 |
DO6 | output | TCELL12:OUT6 |
DO7 | output | TCELL12:OUT7 |
DO8 | output | TCELL12:OUT8 |
DO9 | output | TCELL12:OUT9 |
DRDY | output | TCELL13:OUT0 |
DWE | input | TCELL12:IMUX.IMUX23 |
EOC | output | TCELL13:OUT6 |
EOS | output | TCELL13:OUT7 |
JTAGBUSY | output | TCELL13:OUT14 |
JTAGLOCKED | output | TCELL13:OUT16 |
JTAGMODIFIED | output | TCELL13:OUT15 |
OT | output | TCELL13:OUT9 |
RESET | input | TCELL13:IMUX.CTRL0.SITE |
TESTADCCLK0 | input | TCELL18:IMUX.CLK0 |
TESTADCCLK1 | input | TCELL18:IMUX.CLK1 |
TESTADCCLK2 | input | TCELL19:IMUX.CLK0 |
TESTADCCLK3 | input | TCELL19:IMUX.CLK1 |
TESTADCIN0 | input | TCELL18:IMUX.IMUX0 |
TESTADCIN1 | input | TCELL18:IMUX.IMUX1 |
TESTADCIN10 | input | TCELL18:IMUX.IMUX10 |
TESTADCIN11 | input | TCELL18:IMUX.IMUX11 |
TESTADCIN12 | input | TCELL18:IMUX.IMUX12 |
TESTADCIN13 | input | TCELL18:IMUX.IMUX13 |
TESTADCIN14 | input | TCELL18:IMUX.IMUX14 |
TESTADCIN15 | input | TCELL18:IMUX.IMUX15 |
TESTADCIN16 | input | TCELL18:IMUX.IMUX16 |
TESTADCIN17 | input | TCELL18:IMUX.IMUX17 |
TESTADCIN18 | input | TCELL18:IMUX.IMUX18 |
TESTADCIN19 | input | TCELL18:IMUX.IMUX19 |
TESTADCIN2 | input | TCELL18:IMUX.IMUX2 |
TESTADCIN3 | input | TCELL18:IMUX.IMUX3 |
TESTADCIN4 | input | TCELL18:IMUX.IMUX4 |
TESTADCIN5 | input | TCELL18:IMUX.IMUX5 |
TESTADCIN6 | input | TCELL18:IMUX.IMUX6 |
TESTADCIN7 | input | TCELL18:IMUX.IMUX7 |
TESTADCIN8 | input | TCELL18:IMUX.IMUX8 |
TESTADCIN9 | input | TCELL18:IMUX.IMUX9 |
TESTADCOUT0 | output | TCELL19:OUT0 |
TESTADCOUT1 | output | TCELL19:OUT1 |
TESTADCOUT10 | output | TCELL19:OUT10 |
TESTADCOUT11 | output | TCELL19:OUT11 |
TESTADCOUT12 | output | TCELL19:OUT12 |
TESTADCOUT13 | output | TCELL19:OUT13 |
TESTADCOUT14 | output | TCELL19:OUT14 |
TESTADCOUT15 | output | TCELL19:OUT15 |
TESTADCOUT16 | output | TCELL19:OUT16 |
TESTADCOUT17 | output | TCELL19:OUT17 |
TESTADCOUT18 | output | TCELL19:OUT18 |
TESTADCOUT19 | output | TCELL19:OUT19 |
TESTADCOUT2 | output | TCELL19:OUT2 |
TESTADCOUT3 | output | TCELL19:OUT3 |
TESTADCOUT4 | output | TCELL19:OUT4 |
TESTADCOUT5 | output | TCELL19:OUT5 |
TESTADCOUT6 | output | TCELL19:OUT6 |
TESTADCOUT7 | output | TCELL19:OUT7 |
TESTADCOUT8 | output | TCELL19:OUT8 |
TESTADCOUT9 | output | TCELL19:OUT9 |
TESTCAPTURE | input | TCELL13:IMUX.IMUX7 |
TESTDB0 | output | TCELL18:OUT0 |
TESTDB1 | output | TCELL18:OUT1 |
TESTDB10 | output | TCELL18:OUT10 |
TESTDB11 | output | TCELL18:OUT11 |
TESTDB12 | output | TCELL18:OUT12 |
TESTDB13 | output | TCELL18:OUT13 |
TESTDB14 | output | TCELL18:OUT14 |
TESTDB15 | output | TCELL18:OUT15 |
TESTDB2 | output | TCELL18:OUT2 |
TESTDB3 | output | TCELL18:OUT3 |
TESTDB4 | output | TCELL18:OUT4 |
TESTDB5 | output | TCELL18:OUT5 |
TESTDB6 | output | TCELL18:OUT6 |
TESTDB7 | output | TCELL18:OUT7 |
TESTDB8 | output | TCELL18:OUT8 |
TESTDB9 | output | TCELL18:OUT9 |
TESTDRCK | input | TCELL13:IMUX.IMUX3 |
TESTENJTAG | input | TCELL13:IMUX.IMUX0 |
TESTRST | input | TCELL13:IMUX.IMUX1 |
TESTSCANCLKA | input | TCELL14:IMUX.IMUX1 |
TESTSCANCLKB | input | TCELL14:IMUX.IMUX5 |
TESTSCANCLKC | input | TCELL14:IMUX.IMUX9 |
TESTSCANCLKD | input | TCELL14:IMUX.IMUX13 |
TESTSCANCLKE | input | TCELL14:IMUX.IMUX17 |
TESTSCANMODEA | input | TCELL14:IMUX.IMUX3 |
TESTSCANMODEB | input | TCELL14:IMUX.IMUX7 |
TESTSCANMODEC | input | TCELL14:IMUX.IMUX11 |
TESTSCANMODED | input | TCELL14:IMUX.IMUX15 |
TESTSCANMODEE | input | TCELL14:IMUX.IMUX19 |
TESTSCANRESET | input | TCELL14:IMUX.IMUX20 |
TESTSEA | input | TCELL14:IMUX.IMUX2 |
TESTSEB | input | TCELL14:IMUX.IMUX6 |
TESTSEC | input | TCELL14:IMUX.IMUX10 |
TESTSED | input | TCELL14:IMUX.IMUX14 |
TESTSEE | input | TCELL14:IMUX.IMUX18 |
TESTSEL | input | TCELL13:IMUX.IMUX4 |
TESTSHIFT | input | TCELL13:IMUX.IMUX5 |
TESTSIA | input | TCELL14:IMUX.IMUX0 |
TESTSIB | input | TCELL14:IMUX.IMUX4 |
TESTSIC | input | TCELL14:IMUX.IMUX8 |
TESTSID | input | TCELL14:IMUX.IMUX12 |
TESTSIE | input | TCELL14:IMUX.IMUX16 |
TESTSOA | output | TCELL14:OUT0 |
TESTSOB | output | TCELL14:OUT1 |
TESTSOC | output | TCELL14:OUT2 |
TESTSOD | output | TCELL14:OUT3 |
TESTSOE | output | TCELL14:OUT4 |
TESTTDI | input | TCELL13:IMUX.IMUX2 |
TESTTDO | output | TCELL13:OUT13 |
TESTUPDATE | input | TCELL13:IMUX.IMUX6 |
Bel IPAD_VP
Pin | Direction | Wires |
---|
Bel IPAD_VN
Pin | Direction | Wires |
---|
Bel BUFGCTRL0
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL2:IMUX.IMUX1 |
CE1 | input | TCELL2:IMUX.IMUX13 |
CKINT0 | input | TCELL2:IMUX.IMUX3 |
CKINT1 | input | TCELL2:IMUX.IMUX15 |
I0MUX | output | TCELL2:OUT3 |
I1MUX | output | TCELL2:OUT2 |
IGNORE0 | input | TCELL2:IMUX.IMUX2 |
IGNORE1 | input | TCELL2:IMUX.IMUX14 |
S0 | input | TCELL2:IMUX.IMUX0 |
S1 | input | TCELL2:IMUX.IMUX12 |
Bel BUFGCTRL1
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL2:IMUX.IMUX7 |
CE1 | input | TCELL2:IMUX.IMUX19 |
CKINT0 | input | TCELL2:IMUX.IMUX9 |
CKINT1 | input | TCELL2:IMUX.IMUX21 |
I0MUX | output | TCELL2:OUT1 |
I1MUX | output | TCELL2:OUT0 |
IGNORE0 | input | TCELL2:IMUX.IMUX8 |
IGNORE1 | input | TCELL2:IMUX.IMUX20 |
S0 | input | TCELL2:IMUX.IMUX6 |
S1 | input | TCELL2:IMUX.IMUX18 |
Bel BUFGCTRL2
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL2:IMUX.IMUX25 |
CE1 | input | TCELL2:IMUX.IMUX37 |
CKINT0 | input | TCELL2:IMUX.IMUX27 |
CKINT1 | input | TCELL2:IMUX.IMUX39 |
I0MUX | output | TCELL2:OUT7 |
I1MUX | output | TCELL2:OUT6 |
IGNORE0 | input | TCELL2:IMUX.IMUX26 |
IGNORE1 | input | TCELL2:IMUX.IMUX38 |
S0 | input | TCELL2:IMUX.IMUX24 |
S1 | input | TCELL2:IMUX.IMUX36 |
Bel BUFGCTRL3
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL2:IMUX.IMUX31 |
CE1 | input | TCELL2:IMUX.IMUX43 |
CKINT0 | input | TCELL2:IMUX.IMUX33 |
CKINT1 | input | TCELL2:IMUX.IMUX45 |
I0MUX | output | TCELL2:OUT5 |
I1MUX | output | TCELL2:OUT4 |
IGNORE0 | input | TCELL2:IMUX.IMUX32 |
IGNORE1 | input | TCELL2:IMUX.IMUX44 |
S0 | input | TCELL2:IMUX.IMUX30 |
S1 | input | TCELL2:IMUX.IMUX42 |
Bel BUFGCTRL4
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX1 |
CE1 | input | TCELL3:IMUX.IMUX13 |
CKINT0 | input | TCELL3:IMUX.IMUX3 |
CKINT1 | input | TCELL3:IMUX.IMUX15 |
I0MUX | output | TCELL2:OUT11 |
I1MUX | output | TCELL2:OUT10 |
IGNORE0 | input | TCELL3:IMUX.IMUX2 |
IGNORE1 | input | TCELL3:IMUX.IMUX14 |
S0 | input | TCELL3:IMUX.IMUX0 |
S1 | input | TCELL3:IMUX.IMUX12 |
Bel BUFGCTRL5
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX7 |
CE1 | input | TCELL3:IMUX.IMUX19 |
CKINT0 | input | TCELL3:IMUX.IMUX9 |
CKINT1 | input | TCELL3:IMUX.IMUX21 |
I0MUX | output | TCELL2:OUT9 |
I1MUX | output | TCELL2:OUT8 |
IGNORE0 | input | TCELL3:IMUX.IMUX8 |
IGNORE1 | input | TCELL3:IMUX.IMUX20 |
S0 | input | TCELL3:IMUX.IMUX6 |
S1 | input | TCELL3:IMUX.IMUX18 |
Bel BUFGCTRL6
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX25 |
CE1 | input | TCELL3:IMUX.IMUX37 |
CKINT0 | input | TCELL3:IMUX.IMUX27 |
CKINT1 | input | TCELL3:IMUX.IMUX39 |
I0MUX | output | TCELL3:OUT3 |
I1MUX | output | TCELL3:OUT2 |
IGNORE0 | input | TCELL3:IMUX.IMUX26 |
IGNORE1 | input | TCELL3:IMUX.IMUX38 |
S0 | input | TCELL3:IMUX.IMUX24 |
S1 | input | TCELL3:IMUX.IMUX36 |
Bel BUFGCTRL7
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX31 |
CE1 | input | TCELL3:IMUX.IMUX43 |
CKINT0 | input | TCELL3:IMUX.IMUX33 |
CKINT1 | input | TCELL3:IMUX.IMUX45 |
I0MUX | output | TCELL3:OUT1 |
I1MUX | output | TCELL3:OUT0 |
IGNORE0 | input | TCELL3:IMUX.IMUX32 |
IGNORE1 | input | TCELL3:IMUX.IMUX44 |
S0 | input | TCELL3:IMUX.IMUX30 |
S1 | input | TCELL3:IMUX.IMUX42 |
Bel BUFGCTRL8
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX1 |
CE1 | input | TCELL4:IMUX.IMUX13 |
CKINT0 | input | TCELL4:IMUX.IMUX3 |
CKINT1 | input | TCELL4:IMUX.IMUX15 |
I0MUX | output | TCELL3:OUT7 |
I1MUX | output | TCELL3:OUT6 |
IGNORE0 | input | TCELL4:IMUX.IMUX2 |
IGNORE1 | input | TCELL4:IMUX.IMUX14 |
S0 | input | TCELL4:IMUX.IMUX0 |
S1 | input | TCELL4:IMUX.IMUX12 |
Bel BUFGCTRL9
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX7 |
CE1 | input | TCELL4:IMUX.IMUX19 |
CKINT0 | input | TCELL4:IMUX.IMUX9 |
CKINT1 | input | TCELL4:IMUX.IMUX21 |
I0MUX | output | TCELL3:OUT5 |
I1MUX | output | TCELL3:OUT4 |
IGNORE0 | input | TCELL4:IMUX.IMUX8 |
IGNORE1 | input | TCELL4:IMUX.IMUX20 |
S0 | input | TCELL4:IMUX.IMUX6 |
S1 | input | TCELL4:IMUX.IMUX18 |
Bel BUFGCTRL10
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX25 |
CE1 | input | TCELL4:IMUX.IMUX37 |
CKINT0 | input | TCELL4:IMUX.IMUX27 |
CKINT1 | input | TCELL4:IMUX.IMUX39 |
I0MUX | output | TCELL3:OUT11 |
I1MUX | output | TCELL3:OUT10 |
IGNORE0 | input | TCELL4:IMUX.IMUX26 |
IGNORE1 | input | TCELL4:IMUX.IMUX38 |
S0 | input | TCELL4:IMUX.IMUX24 |
S1 | input | TCELL4:IMUX.IMUX36 |
Bel BUFGCTRL11
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX31 |
CE1 | input | TCELL4:IMUX.IMUX43 |
CKINT0 | input | TCELL4:IMUX.IMUX33 |
CKINT1 | input | TCELL4:IMUX.IMUX45 |
I0MUX | output | TCELL3:OUT9 |
I1MUX | output | TCELL3:OUT8 |
IGNORE0 | input | TCELL4:IMUX.IMUX32 |
IGNORE1 | input | TCELL4:IMUX.IMUX44 |
S0 | input | TCELL4:IMUX.IMUX30 |
S1 | input | TCELL4:IMUX.IMUX42 |
Bel BUFGCTRL12
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX5 |
CE1 | input | TCELL3:IMUX.IMUX29 |
CKINT0 | input | TCELL3:IMUX.IMUX11 |
CKINT1 | input | TCELL3:IMUX.IMUX35 |
I0MUX | output | TCELL4:OUT3 |
I1MUX | output | TCELL4:OUT2 |
IGNORE0 | input | TCELL3:IMUX.IMUX10 |
IGNORE1 | input | TCELL3:IMUX.IMUX34 |
S0 | input | TCELL3:IMUX.IMUX4 |
S1 | input | TCELL3:IMUX.IMUX28 |
Bel BUFGCTRL13
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL3:IMUX.IMUX17 |
CE1 | input | TCELL3:IMUX.IMUX41 |
CKINT0 | input | TCELL3:IMUX.IMUX23 |
CKINT1 | input | TCELL3:IMUX.IMUX47 |
I0MUX | output | TCELL4:OUT1 |
I1MUX | output | TCELL4:OUT0 |
IGNORE0 | input | TCELL3:IMUX.IMUX22 |
IGNORE1 | input | TCELL3:IMUX.IMUX46 |
S0 | input | TCELL3:IMUX.IMUX16 |
S1 | input | TCELL3:IMUX.IMUX40 |
Bel BUFGCTRL14
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX5 |
CE1 | input | TCELL4:IMUX.IMUX29 |
CKINT0 | input | TCELL4:IMUX.IMUX11 |
CKINT1 | input | TCELL4:IMUX.IMUX35 |
I0MUX | output | TCELL4:OUT7 |
I1MUX | output | TCELL4:OUT6 |
IGNORE0 | input | TCELL4:IMUX.IMUX10 |
IGNORE1 | input | TCELL4:IMUX.IMUX34 |
S0 | input | TCELL4:IMUX.IMUX4 |
S1 | input | TCELL4:IMUX.IMUX28 |
Bel BUFGCTRL15
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL4:IMUX.IMUX17 |
CE1 | input | TCELL4:IMUX.IMUX41 |
CKINT0 | input | TCELL4:IMUX.IMUX23 |
CKINT1 | input | TCELL4:IMUX.IMUX47 |
I0MUX | output | TCELL4:OUT5 |
I1MUX | output | TCELL4:OUT4 |
IGNORE0 | input | TCELL4:IMUX.IMUX22 |
IGNORE1 | input | TCELL4:IMUX.IMUX46 |
S0 | input | TCELL4:IMUX.IMUX16 |
S1 | input | TCELL4:IMUX.IMUX40 |
Bel BUFGCTRL16
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX17 |
CE1 | input | TCELL17:IMUX.IMUX41 |
CKINT0 | input | TCELL17:IMUX.IMUX23 |
CKINT1 | input | TCELL17:IMUX.IMUX47 |
I0MUX | output | TCELL17:OUT5 |
I1MUX | output | TCELL17:OUT4 |
IGNORE0 | input | TCELL17:IMUX.IMUX22 |
IGNORE1 | input | TCELL17:IMUX.IMUX46 |
S0 | input | TCELL17:IMUX.IMUX16 |
S1 | input | TCELL17:IMUX.IMUX40 |
Bel BUFGCTRL17
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX5 |
CE1 | input | TCELL17:IMUX.IMUX29 |
CKINT0 | input | TCELL17:IMUX.IMUX11 |
CKINT1 | input | TCELL17:IMUX.IMUX35 |
I0MUX | output | TCELL17:OUT7 |
I1MUX | output | TCELL17:OUT6 |
IGNORE0 | input | TCELL17:IMUX.IMUX10 |
IGNORE1 | input | TCELL17:IMUX.IMUX34 |
S0 | input | TCELL17:IMUX.IMUX4 |
S1 | input | TCELL17:IMUX.IMUX28 |
Bel BUFGCTRL18
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX17 |
CE1 | input | TCELL16:IMUX.IMUX41 |
CKINT0 | input | TCELL16:IMUX.IMUX23 |
CKINT1 | input | TCELL16:IMUX.IMUX47 |
I0MUX | output | TCELL17:OUT1 |
I1MUX | output | TCELL17:OUT0 |
IGNORE0 | input | TCELL16:IMUX.IMUX22 |
IGNORE1 | input | TCELL16:IMUX.IMUX46 |
S0 | input | TCELL16:IMUX.IMUX16 |
S1 | input | TCELL16:IMUX.IMUX40 |
Bel BUFGCTRL19
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX5 |
CE1 | input | TCELL16:IMUX.IMUX29 |
CKINT0 | input | TCELL16:IMUX.IMUX11 |
CKINT1 | input | TCELL16:IMUX.IMUX35 |
I0MUX | output | TCELL17:OUT3 |
I1MUX | output | TCELL17:OUT2 |
IGNORE0 | input | TCELL16:IMUX.IMUX10 |
IGNORE1 | input | TCELL16:IMUX.IMUX34 |
S0 | input | TCELL16:IMUX.IMUX4 |
S1 | input | TCELL16:IMUX.IMUX28 |
Bel BUFGCTRL20
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX31 |
CE1 | input | TCELL17:IMUX.IMUX43 |
CKINT0 | input | TCELL17:IMUX.IMUX33 |
CKINT1 | input | TCELL17:IMUX.IMUX45 |
I0MUX | output | TCELL16:OUT9 |
I1MUX | output | TCELL16:OUT8 |
IGNORE0 | input | TCELL17:IMUX.IMUX32 |
IGNORE1 | input | TCELL17:IMUX.IMUX44 |
S0 | input | TCELL17:IMUX.IMUX30 |
S1 | input | TCELL17:IMUX.IMUX42 |
Bel BUFGCTRL21
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX25 |
CE1 | input | TCELL17:IMUX.IMUX37 |
CKINT0 | input | TCELL17:IMUX.IMUX27 |
CKINT1 | input | TCELL17:IMUX.IMUX39 |
I0MUX | output | TCELL16:OUT11 |
I1MUX | output | TCELL16:OUT10 |
IGNORE0 | input | TCELL17:IMUX.IMUX26 |
IGNORE1 | input | TCELL17:IMUX.IMUX38 |
S0 | input | TCELL17:IMUX.IMUX24 |
S1 | input | TCELL17:IMUX.IMUX36 |
Bel BUFGCTRL22
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX7 |
CE1 | input | TCELL17:IMUX.IMUX19 |
CKINT0 | input | TCELL17:IMUX.IMUX9 |
CKINT1 | input | TCELL17:IMUX.IMUX21 |
I0MUX | output | TCELL16:OUT5 |
I1MUX | output | TCELL16:OUT4 |
IGNORE0 | input | TCELL17:IMUX.IMUX8 |
IGNORE1 | input | TCELL17:IMUX.IMUX20 |
S0 | input | TCELL17:IMUX.IMUX6 |
S1 | input | TCELL17:IMUX.IMUX18 |
Bel BUFGCTRL23
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL17:IMUX.IMUX1 |
CE1 | input | TCELL17:IMUX.IMUX13 |
CKINT0 | input | TCELL17:IMUX.IMUX3 |
CKINT1 | input | TCELL17:IMUX.IMUX15 |
I0MUX | output | TCELL16:OUT7 |
I1MUX | output | TCELL16:OUT6 |
IGNORE0 | input | TCELL17:IMUX.IMUX2 |
IGNORE1 | input | TCELL17:IMUX.IMUX14 |
S0 | input | TCELL17:IMUX.IMUX0 |
S1 | input | TCELL17:IMUX.IMUX12 |
Bel BUFGCTRL24
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX31 |
CE1 | input | TCELL16:IMUX.IMUX43 |
CKINT0 | input | TCELL16:IMUX.IMUX33 |
CKINT1 | input | TCELL16:IMUX.IMUX45 |
I0MUX | output | TCELL16:OUT1 |
I1MUX | output | TCELL16:OUT0 |
IGNORE0 | input | TCELL16:IMUX.IMUX32 |
IGNORE1 | input | TCELL16:IMUX.IMUX44 |
S0 | input | TCELL16:IMUX.IMUX30 |
S1 | input | TCELL16:IMUX.IMUX42 |
Bel BUFGCTRL25
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX25 |
CE1 | input | TCELL16:IMUX.IMUX37 |
CKINT0 | input | TCELL16:IMUX.IMUX27 |
CKINT1 | input | TCELL16:IMUX.IMUX39 |
I0MUX | output | TCELL16:OUT3 |
I1MUX | output | TCELL16:OUT2 |
IGNORE0 | input | TCELL16:IMUX.IMUX26 |
IGNORE1 | input | TCELL16:IMUX.IMUX38 |
S0 | input | TCELL16:IMUX.IMUX24 |
S1 | input | TCELL16:IMUX.IMUX36 |
Bel BUFGCTRL26
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX7 |
CE1 | input | TCELL16:IMUX.IMUX19 |
CKINT0 | input | TCELL16:IMUX.IMUX9 |
CKINT1 | input | TCELL16:IMUX.IMUX21 |
I0MUX | output | TCELL15:OUT9 |
I1MUX | output | TCELL15:OUT8 |
IGNORE0 | input | TCELL16:IMUX.IMUX8 |
IGNORE1 | input | TCELL16:IMUX.IMUX20 |
S0 | input | TCELL16:IMUX.IMUX6 |
S1 | input | TCELL16:IMUX.IMUX18 |
Bel BUFGCTRL27
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL16:IMUX.IMUX1 |
CE1 | input | TCELL16:IMUX.IMUX13 |
CKINT0 | input | TCELL16:IMUX.IMUX3 |
CKINT1 | input | TCELL16:IMUX.IMUX15 |
I0MUX | output | TCELL15:OUT11 |
I1MUX | output | TCELL15:OUT10 |
IGNORE0 | input | TCELL16:IMUX.IMUX2 |
IGNORE1 | input | TCELL16:IMUX.IMUX14 |
S0 | input | TCELL16:IMUX.IMUX0 |
S1 | input | TCELL16:IMUX.IMUX12 |
Bel BUFGCTRL28
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL15:IMUX.IMUX31 |
CE1 | input | TCELL15:IMUX.IMUX43 |
CKINT0 | input | TCELL15:IMUX.IMUX33 |
CKINT1 | input | TCELL15:IMUX.IMUX45 |
I0MUX | output | TCELL15:OUT5 |
I1MUX | output | TCELL15:OUT4 |
IGNORE0 | input | TCELL15:IMUX.IMUX32 |
IGNORE1 | input | TCELL15:IMUX.IMUX44 |
S0 | input | TCELL15:IMUX.IMUX30 |
S1 | input | TCELL15:IMUX.IMUX42 |
Bel BUFGCTRL29
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL15:IMUX.IMUX25 |
CE1 | input | TCELL15:IMUX.IMUX37 |
CKINT0 | input | TCELL15:IMUX.IMUX27 |
CKINT1 | input | TCELL15:IMUX.IMUX39 |
I0MUX | output | TCELL15:OUT7 |
I1MUX | output | TCELL15:OUT6 |
IGNORE0 | input | TCELL15:IMUX.IMUX26 |
IGNORE1 | input | TCELL15:IMUX.IMUX38 |
S0 | input | TCELL15:IMUX.IMUX24 |
S1 | input | TCELL15:IMUX.IMUX36 |
Bel BUFGCTRL30
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL15:IMUX.IMUX7 |
CE1 | input | TCELL15:IMUX.IMUX19 |
CKINT0 | input | TCELL15:IMUX.IMUX9 |
CKINT1 | input | TCELL15:IMUX.IMUX21 |
I0MUX | output | TCELL15:OUT1 |
I1MUX | output | TCELL15:OUT0 |
IGNORE0 | input | TCELL15:IMUX.IMUX8 |
IGNORE1 | input | TCELL15:IMUX.IMUX20 |
S0 | input | TCELL15:IMUX.IMUX6 |
S1 | input | TCELL15:IMUX.IMUX18 |
Bel BUFGCTRL31
Pin | Direction | Wires |
---|---|---|
CE0 | input | TCELL15:IMUX.IMUX1 |
CE1 | input | TCELL15:IMUX.IMUX13 |
CKINT0 | input | TCELL15:IMUX.IMUX3 |
CKINT1 | input | TCELL15:IMUX.IMUX15 |
I0MUX | output | TCELL15:OUT3 |
I1MUX | output | TCELL15:OUT2 |
IGNORE0 | input | TCELL15:IMUX.IMUX2 |
IGNORE1 | input | TCELL15:IMUX.IMUX14 |
S0 | input | TCELL15:IMUX.IMUX0 |
S1 | input | TCELL15:IMUX.IMUX12 |
Bel BUFG_MGTCLK_S
Pin | Direction | Wires |
---|
Bel BUFG_MGTCLK_N
Pin | Direction | Wires |
---|
Bel BSCAN0
Pin | Direction | Wires |
---|---|---|
CAPTURE | output | TCELL1:OUT15 |
DRCK | output | TCELL1:OUT13 |
RESET | output | TCELL0:OUT15 |
SEL | output | TCELL0:OUT5 |
SHIFT | output | TCELL1:OUT17 |
TDI | output | TCELL1:OUT19 |
TDO | input | TCELL1:IMUX.IMUX0 |
UPDATE | output | TCELL1:OUT21 |
Bel BSCAN1
Pin | Direction | Wires |
---|---|---|
CAPTURE | output | TCELL1:OUT16 |
DRCK | output | TCELL1:OUT14 |
RESET | output | TCELL0:OUT16 |
SEL | output | TCELL0:OUT6 |
SHIFT | output | TCELL1:OUT18 |
TDI | output | TCELL1:OUT20 |
TDO | input | TCELL1:IMUX.IMUX1 |
UPDATE | output | TCELL1:OUT22 |
Bel BSCAN2
Pin | Direction | Wires |
---|---|---|
CAPTURE | output | TCELL5:OUT15 |
DRCK | output | TCELL5:OUT13 |
RESET | output | TCELL5:OUT23 |
SEL | output | TCELL0:OUT7 |
SHIFT | output | TCELL5:OUT17 |
TDI | output | TCELL5:OUT19 |
TDO | input | TCELL5:IMUX.IMUX0 |
UPDATE | output | TCELL5:OUT21 |
Bel BSCAN3
Pin | Direction | Wires |
---|---|---|
CAPTURE | output | TCELL5:OUT16 |
DRCK | output | TCELL5:OUT14 |
RESET | output | TCELL5:OUT0 |
SEL | output | TCELL0:OUT8 |
SHIFT | output | TCELL5:OUT18 |
TDI | output | TCELL5:OUT20 |
TDO | input | TCELL5:IMUX.IMUX1 |
UPDATE | output | TCELL5:OUT22 |
Bel ICAP0
Pin | Direction | Wires |
---|---|---|
BUSY | output | TCELL7:OUT16 |
CE | input | TCELL7:IMUX.IMUX16 |
CLK | input | TCELL6:IMUX.CLK0 |
I0 | input | TCELL6:IMUX.IMUX0 |
I1 | input | TCELL6:IMUX.IMUX1 |
I10 | input | TCELL6:IMUX.IMUX10 |
I11 | input | TCELL6:IMUX.IMUX11 |
I12 | input | TCELL6:IMUX.IMUX12 |
I13 | input | TCELL6:IMUX.IMUX13 |
I14 | input | TCELL6:IMUX.IMUX14 |
I15 | input | TCELL6:IMUX.IMUX15 |
I16 | input | TCELL7:IMUX.IMUX0 |
I17 | input | TCELL7:IMUX.IMUX1 |
I18 | input | TCELL7:IMUX.IMUX2 |
I19 | input | TCELL7:IMUX.IMUX3 |
I2 | input | TCELL6:IMUX.IMUX2 |
I20 | input | TCELL7:IMUX.IMUX4 |
I21 | input | TCELL7:IMUX.IMUX5 |
I22 | input | TCELL7:IMUX.IMUX6 |
I23 | input | TCELL7:IMUX.IMUX7 |
I24 | input | TCELL7:IMUX.IMUX8 |
I25 | input | TCELL7:IMUX.IMUX9 |
I26 | input | TCELL7:IMUX.IMUX10 |
I27 | input | TCELL7:IMUX.IMUX11 |
I28 | input | TCELL7:IMUX.IMUX12 |
I29 | input | TCELL7:IMUX.IMUX13 |
I3 | input | TCELL6:IMUX.IMUX3 |
I30 | input | TCELL7:IMUX.IMUX14 |
I31 | input | TCELL7:IMUX.IMUX15 |
I4 | input | TCELL6:IMUX.IMUX4 |
I5 | input | TCELL6:IMUX.IMUX5 |
I6 | input | TCELL6:IMUX.IMUX6 |
I7 | input | TCELL6:IMUX.IMUX7 |
I8 | input | TCELL6:IMUX.IMUX8 |
I9 | input | TCELL6:IMUX.IMUX9 |
O0 | output | TCELL6:OUT0 |
O1 | output | TCELL6:OUT1 |
O10 | output | TCELL6:OUT10 |
O11 | output | TCELL6:OUT11 |
O12 | output | TCELL6:OUT12 |
O13 | output | TCELL6:OUT13 |
O14 | output | TCELL6:OUT14 |
O15 | output | TCELL6:OUT15 |
O16 | output | TCELL7:OUT0 |
O17 | output | TCELL7:OUT1 |
O18 | output | TCELL7:OUT2 |
O19 | output | TCELL7:OUT3 |
O2 | output | TCELL6:OUT2 |
O20 | output | TCELL7:OUT4 |
O21 | output | TCELL7:OUT5 |
O22 | output | TCELL7:OUT6 |
O23 | output | TCELL7:OUT7 |
O24 | output | TCELL7:OUT8 |
O25 | output | TCELL7:OUT9 |
O26 | output | TCELL7:OUT10 |
O27 | output | TCELL7:OUT11 |
O28 | output | TCELL7:OUT12 |
O29 | output | TCELL7:OUT13 |
O3 | output | TCELL6:OUT3 |
O30 | output | TCELL7:OUT14 |
O31 | output | TCELL7:OUT15 |
O4 | output | TCELL6:OUT4 |
O5 | output | TCELL6:OUT5 |
O6 | output | TCELL6:OUT6 |
O7 | output | TCELL6:OUT7 |
O8 | output | TCELL6:OUT8 |
O9 | output | TCELL6:OUT9 |
WRITE | input | TCELL6:IMUX.IMUX16 |
Bel ICAP1
Pin | Direction | Wires |
---|---|---|
BUSY | output | TCELL7:OUT18 |
CE | input | TCELL10:IMUX.IMUX16 |
CLK | input | TCELL9:IMUX.CLK0 |
I0 | input | TCELL9:IMUX.IMUX0 |
I1 | input | TCELL9:IMUX.IMUX1 |
I10 | input | TCELL9:IMUX.IMUX10 |
I11 | input | TCELL9:IMUX.IMUX11 |
I12 | input | TCELL9:IMUX.IMUX12 |
I13 | input | TCELL9:IMUX.IMUX13 |
I14 | input | TCELL9:IMUX.IMUX14 |
I15 | input | TCELL9:IMUX.IMUX15 |
I16 | input | TCELL10:IMUX.IMUX0 |
I17 | input | TCELL10:IMUX.IMUX1 |
I18 | input | TCELL10:IMUX.IMUX2 |
I19 | input | TCELL10:IMUX.IMUX3 |
I2 | input | TCELL9:IMUX.IMUX2 |
I20 | input | TCELL10:IMUX.IMUX4 |
I21 | input | TCELL10:IMUX.IMUX5 |
I22 | input | TCELL10:IMUX.IMUX6 |
I23 | input | TCELL10:IMUX.IMUX7 |
I24 | input | TCELL10:IMUX.IMUX8 |
I25 | input | TCELL10:IMUX.IMUX9 |
I26 | input | TCELL10:IMUX.IMUX10 |
I27 | input | TCELL10:IMUX.IMUX11 |
I28 | input | TCELL10:IMUX.IMUX12 |
I29 | input | TCELL10:IMUX.IMUX13 |
I3 | input | TCELL9:IMUX.IMUX3 |
I30 | input | TCELL10:IMUX.IMUX14 |
I31 | input | TCELL10:IMUX.IMUX15 |
I4 | input | TCELL9:IMUX.IMUX4 |
I5 | input | TCELL9:IMUX.IMUX5 |
I6 | input | TCELL9:IMUX.IMUX6 |
I7 | input | TCELL9:IMUX.IMUX7 |
I8 | input | TCELL9:IMUX.IMUX8 |
I9 | input | TCELL9:IMUX.IMUX9 |
O0 | output | TCELL9:OUT0 |
O1 | output | TCELL9:OUT1 |
O10 | output | TCELL9:OUT10 |
O11 | output | TCELL9:OUT11 |
O12 | output | TCELL9:OUT12 |
O13 | output | TCELL9:OUT13 |
O14 | output | TCELL9:OUT14 |
O15 | output | TCELL9:OUT15 |
O16 | output | TCELL10:OUT0 |
O17 | output | TCELL10:OUT1 |
O18 | output | TCELL10:OUT2 |
O19 | output | TCELL10:OUT3 |
O2 | output | TCELL9:OUT2 |
O20 | output | TCELL10:OUT4 |
O21 | output | TCELL10:OUT5 |
O22 | output | TCELL10:OUT6 |
O23 | output | TCELL10:OUT7 |
O24 | output | TCELL10:OUT8 |
O25 | output | TCELL10:OUT9 |
O26 | output | TCELL10:OUT10 |
O27 | output | TCELL10:OUT11 |
O28 | output | TCELL10:OUT12 |
O29 | output | TCELL10:OUT13 |
O3 | output | TCELL9:OUT3 |
O30 | output | TCELL10:OUT14 |
O31 | output | TCELL10:OUT15 |
O4 | output | TCELL9:OUT4 |
O5 | output | TCELL9:OUT5 |
O6 | output | TCELL9:OUT6 |
O7 | output | TCELL9:OUT7 |
O8 | output | TCELL9:OUT8 |
O9 | output | TCELL9:OUT9 |
WRITE | input | TCELL9:IMUX.IMUX16 |
Bel STARTUP
Pin | Direction | Wires |
---|---|---|
CFGCLK | output | TCELL6:OUT17 |
CFGMCLK | output | TCELL7:OUT17 |
CLK | input | TCELL8:IMUX.CLK1 |
DINSPI | output | TCELL8:OUT18 |
EOS | output | TCELL0:OUT9 |
GSR | input | TCELL8:IMUX.IMUX0 |
GTS | input | TCELL8:IMUX.IMUX1 |
TCKSPI | output | TCELL8:OUT17 |
USRCCLKO | input | TCELL8:IMUX.CLK0 |
USRCCLKTS | input | TCELL9:IMUX.CLK1 |
USRDONEO | input | TCELL8:IMUX.IMUX2 |
USRDONETS | input | TCELL8:IMUX.IMUX3 |
Bel CAPTURE
Pin | Direction | Wires |
---|---|---|
CAP | input | TCELL1:IMUX.IMUX2 |
CLK | input | TCELL1:IMUX.CLK0 |
Bel JTAGPPC
Pin | Direction | Wires |
---|---|---|
TCK | output | TCELL5:OUT1 |
TDIPPC | output | TCELL5:OUT3 |
TDOPPC | input | TCELL5:IMUX.IMUX2 |
TMS | output | TCELL5:OUT2 |
Bel PMV0
Pin | Direction | Wires |
---|---|---|
A0 | input | TCELL0:IMUX.IMUX0 |
A1 | input | TCELL0:IMUX.IMUX1 |
A2 | input | TCELL0:IMUX.IMUX2 |
A3 | input | TCELL0:IMUX.IMUX3 |
A4 | input | TCELL0:IMUX.IMUX4 |
A5 | input | TCELL0:IMUX.IMUX5 |
EN | input | TCELL0:IMUX.IMUX6 |
O | output | TCELL0:OUT13 |
ODIV2 | output | TCELL0:OUT12 |
ODIV4 | output | TCELL0:OUT11 |
Bel DCIRESET
Pin | Direction | Wires |
---|---|---|
LOCKED | output | TCELL6:OUT18 |
RST | input | TCELL10:IMUX.IMUX18 |
Bel FRAME_ECC
Pin | Direction | Wires |
---|---|---|
CRCERROR | output | TCELL6:OUT16 |
ECCERROR | output | TCELL5:OUT4 |
SYNDROME0 | output | TCELL1:OUT0 |
SYNDROME1 | output | TCELL1:OUT1 |
SYNDROME10 | output | TCELL1:OUT10 |
SYNDROME11 | output | TCELL1:OUT11 |
SYNDROME2 | output | TCELL1:OUT2 |
SYNDROME3 | output | TCELL1:OUT3 |
SYNDROME4 | output | TCELL1:OUT4 |
SYNDROME5 | output | TCELL1:OUT5 |
SYNDROME6 | output | TCELL1:OUT6 |
SYNDROME7 | output | TCELL1:OUT7 |
SYNDROME8 | output | TCELL1:OUT8 |
SYNDROME9 | output | TCELL1:OUT9 |
SYNDROMEVALID | output | TCELL1:OUT12 |
Bel USR_ACCESS
Pin | Direction | Wires |
---|---|---|
CFGCLK | output | TCELL8:OUT19 |
DATA0 | output | TCELL10:OUT16 |
DATA1 | output | TCELL10:OUT17 |
DATA10 | output | TCELL9:OUT18 |
DATA11 | output | TCELL9:OUT19 |
DATA12 | output | TCELL9:OUT20 |
DATA13 | output | TCELL9:OUT21 |
DATA14 | output | TCELL9:OUT22 |
DATA15 | output | TCELL9:OUT23 |
DATA16 | output | TCELL8:OUT0 |
DATA17 | output | TCELL8:OUT1 |
DATA18 | output | TCELL8:OUT2 |
DATA19 | output | TCELL8:OUT3 |
DATA2 | output | TCELL10:OUT18 |
DATA20 | output | TCELL8:OUT4 |
DATA21 | output | TCELL8:OUT5 |
DATA22 | output | TCELL8:OUT6 |
DATA23 | output | TCELL8:OUT7 |
DATA24 | output | TCELL8:OUT8 |
DATA25 | output | TCELL8:OUT9 |
DATA26 | output | TCELL8:OUT10 |
DATA27 | output | TCELL8:OUT11 |
DATA28 | output | TCELL8:OUT12 |
DATA29 | output | TCELL8:OUT13 |
DATA3 | output | TCELL10:OUT19 |
DATA30 | output | TCELL8:OUT14 |
DATA31 | output | TCELL8:OUT15 |
DATA4 | output | TCELL10:OUT20 |
DATA5 | output | TCELL10:OUT21 |
DATA6 | output | TCELL10:OUT22 |
DATA7 | output | TCELL10:OUT23 |
DATA8 | output | TCELL9:OUT16 |
DATA9 | output | TCELL9:OUT17 |
DATAVALID | output | TCELL8:OUT16 |
Bel KEY_CLEAR
Pin | Direction | Wires |
---|---|---|
KEYCLEARB | input | TCELL8:IMUX.IMUX8 |
Bel EFUSE_USR
Pin | Direction | Wires |
---|---|---|
EFUSEUSR0 | output | TCELL11:OUT0 |
EFUSEUSR1 | output | TCELL11:OUT1 |
EFUSEUSR10 | output | TCELL11:OUT10 |
EFUSEUSR11 | output | TCELL11:OUT11 |
EFUSEUSR12 | output | TCELL11:OUT12 |
EFUSEUSR13 | output | TCELL11:OUT13 |
EFUSEUSR14 | output | TCELL11:OUT14 |
EFUSEUSR15 | output | TCELL11:OUT15 |
EFUSEUSR16 | output | TCELL11:OUT16 |
EFUSEUSR17 | output | TCELL11:OUT17 |
EFUSEUSR18 | output | TCELL11:OUT18 |
EFUSEUSR19 | output | TCELL11:OUT19 |
EFUSEUSR2 | output | TCELL11:OUT2 |
EFUSEUSR20 | output | TCELL11:OUT20 |
EFUSEUSR21 | output | TCELL11:OUT21 |
EFUSEUSR22 | output | TCELL11:OUT22 |
EFUSEUSR23 | output | TCELL11:OUT23 |
EFUSEUSR24 | output | TCELL5:OUT5 |
EFUSEUSR25 | output | TCELL5:OUT6 |
EFUSEUSR26 | output | TCELL5:OUT7 |
EFUSEUSR27 | output | TCELL5:OUT8 |
EFUSEUSR28 | output | TCELL5:OUT9 |
EFUSEUSR29 | output | TCELL5:OUT10 |
EFUSEUSR3 | output | TCELL11:OUT3 |
EFUSEUSR30 | output | TCELL5:OUT11 |
EFUSEUSR31 | output | TCELL5:OUT12 |
EFUSEUSR4 | output | TCELL11:OUT4 |
EFUSEUSR5 | output | TCELL11:OUT5 |
EFUSEUSR6 | output | TCELL11:OUT6 |
EFUSEUSR7 | output | TCELL11:OUT7 |
EFUSEUSR8 | output | TCELL11:OUT8 |
EFUSEUSR9 | output | TCELL11:OUT9 |
Bel wires
Wire | Pins |
---|---|
TCELL0:IMUX.IMUX0 | PMV0.A0 |
TCELL0:IMUX.IMUX1 | PMV0.A1 |
TCELL0:IMUX.IMUX2 | PMV0.A2 |
TCELL0:IMUX.IMUX3 | PMV0.A3 |
TCELL0:IMUX.IMUX4 | PMV0.A4 |
TCELL0:IMUX.IMUX5 | PMV0.A5 |
TCELL0:IMUX.IMUX6 | PMV0.EN |
TCELL0:OUT5 | BSCAN0.SEL |
TCELL0:OUT6 | BSCAN1.SEL |
TCELL0:OUT7 | BSCAN2.SEL |
TCELL0:OUT8 | BSCAN3.SEL |
TCELL0:OUT9 | STARTUP.EOS |
TCELL0:OUT11 | PMV0.ODIV4 |
TCELL0:OUT12 | PMV0.ODIV2 |
TCELL0:OUT13 | PMV0.O |
TCELL0:OUT15 | BSCAN0.RESET |
TCELL0:OUT16 | BSCAN1.RESET |
TCELL1:IMUX.CLK0 | CAPTURE.CLK |
TCELL1:IMUX.IMUX0 | BSCAN0.TDO |
TCELL1:IMUX.IMUX1 | BSCAN1.TDO |
TCELL1:IMUX.IMUX2 | CAPTURE.CAP |
TCELL1:OUT0 | FRAME_ECC.SYNDROME0 |
TCELL1:OUT1 | FRAME_ECC.SYNDROME1 |
TCELL1:OUT2 | FRAME_ECC.SYNDROME2 |
TCELL1:OUT3 | FRAME_ECC.SYNDROME3 |
TCELL1:OUT4 | FRAME_ECC.SYNDROME4 |
TCELL1:OUT5 | FRAME_ECC.SYNDROME5 |
TCELL1:OUT6 | FRAME_ECC.SYNDROME6 |
TCELL1:OUT7 | FRAME_ECC.SYNDROME7 |
TCELL1:OUT8 | FRAME_ECC.SYNDROME8 |
TCELL1:OUT9 | FRAME_ECC.SYNDROME9 |
TCELL1:OUT10 | FRAME_ECC.SYNDROME10 |
TCELL1:OUT11 | FRAME_ECC.SYNDROME11 |
TCELL1:OUT12 | FRAME_ECC.SYNDROMEVALID |
TCELL1:OUT13 | BSCAN0.DRCK |
TCELL1:OUT14 | BSCAN1.DRCK |
TCELL1:OUT15 | BSCAN0.CAPTURE |
TCELL1:OUT16 | BSCAN1.CAPTURE |
TCELL1:OUT17 | BSCAN0.SHIFT |
TCELL1:OUT18 | BSCAN1.SHIFT |
TCELL1:OUT19 | BSCAN0.TDI |
TCELL1:OUT20 | BSCAN1.TDI |
TCELL1:OUT21 | BSCAN0.UPDATE |
TCELL1:OUT22 | BSCAN1.UPDATE |
TCELL2:IMUX.IMUX0 | BUFGCTRL0.S0 |
TCELL2:IMUX.IMUX1 | BUFGCTRL0.CE0 |
TCELL2:IMUX.IMUX2 | BUFGCTRL0.IGNORE0 |
TCELL2:IMUX.IMUX3 | BUFGCTRL0.CKINT0 |
TCELL2:IMUX.IMUX6 | BUFGCTRL1.S0 |
TCELL2:IMUX.IMUX7 | BUFGCTRL1.CE0 |
TCELL2:IMUX.IMUX8 | BUFGCTRL1.IGNORE0 |
TCELL2:IMUX.IMUX9 | BUFGCTRL1.CKINT0 |
TCELL2:IMUX.IMUX12 | BUFGCTRL0.S1 |
TCELL2:IMUX.IMUX13 | BUFGCTRL0.CE1 |
TCELL2:IMUX.IMUX14 | BUFGCTRL0.IGNORE1 |
TCELL2:IMUX.IMUX15 | BUFGCTRL0.CKINT1 |
TCELL2:IMUX.IMUX18 | BUFGCTRL1.S1 |
TCELL2:IMUX.IMUX19 | BUFGCTRL1.CE1 |
TCELL2:IMUX.IMUX20 | BUFGCTRL1.IGNORE1 |
TCELL2:IMUX.IMUX21 | BUFGCTRL1.CKINT1 |
TCELL2:IMUX.IMUX24 | BUFGCTRL2.S0 |
TCELL2:IMUX.IMUX25 | BUFGCTRL2.CE0 |
TCELL2:IMUX.IMUX26 | BUFGCTRL2.IGNORE0 |
TCELL2:IMUX.IMUX27 | BUFGCTRL2.CKINT0 |
TCELL2:IMUX.IMUX30 | BUFGCTRL3.S0 |
TCELL2:IMUX.IMUX31 | BUFGCTRL3.CE0 |
TCELL2:IMUX.IMUX32 | BUFGCTRL3.IGNORE0 |
TCELL2:IMUX.IMUX33 | BUFGCTRL3.CKINT0 |
TCELL2:IMUX.IMUX36 | BUFGCTRL2.S1 |
TCELL2:IMUX.IMUX37 | BUFGCTRL2.CE1 |
TCELL2:IMUX.IMUX38 | BUFGCTRL2.IGNORE1 |
TCELL2:IMUX.IMUX39 | BUFGCTRL2.CKINT1 |
TCELL2:IMUX.IMUX42 | BUFGCTRL3.S1 |
TCELL2:IMUX.IMUX43 | BUFGCTRL3.CE1 |
TCELL2:IMUX.IMUX44 | BUFGCTRL3.IGNORE1 |
TCELL2:IMUX.IMUX45 | BUFGCTRL3.CKINT1 |
TCELL2:OUT0 | BUFGCTRL1.I1MUX |
TCELL2:OUT1 | BUFGCTRL1.I0MUX |
TCELL2:OUT2 | BUFGCTRL0.I1MUX |
TCELL2:OUT3 | BUFGCTRL0.I0MUX |
TCELL2:OUT4 | BUFGCTRL3.I1MUX |
TCELL2:OUT5 | BUFGCTRL3.I0MUX |
TCELL2:OUT6 | BUFGCTRL2.I1MUX |
TCELL2:OUT7 | BUFGCTRL2.I0MUX |
TCELL2:OUT8 | BUFGCTRL5.I1MUX |
TCELL2:OUT9 | BUFGCTRL5.I0MUX |
TCELL2:OUT10 | BUFGCTRL4.I1MUX |
TCELL2:OUT11 | BUFGCTRL4.I0MUX |
TCELL3:IMUX.IMUX0 | BUFGCTRL4.S0 |
TCELL3:IMUX.IMUX1 | BUFGCTRL4.CE0 |
TCELL3:IMUX.IMUX2 | BUFGCTRL4.IGNORE0 |
TCELL3:IMUX.IMUX3 | BUFGCTRL4.CKINT0 |
TCELL3:IMUX.IMUX4 | BUFGCTRL12.S0 |
TCELL3:IMUX.IMUX5 | BUFGCTRL12.CE0 |
TCELL3:IMUX.IMUX6 | BUFGCTRL5.S0 |
TCELL3:IMUX.IMUX7 | BUFGCTRL5.CE0 |
TCELL3:IMUX.IMUX8 | BUFGCTRL5.IGNORE0 |
TCELL3:IMUX.IMUX9 | BUFGCTRL5.CKINT0 |
TCELL3:IMUX.IMUX10 | BUFGCTRL12.IGNORE0 |
TCELL3:IMUX.IMUX11 | BUFGCTRL12.CKINT0 |
TCELL3:IMUX.IMUX12 | BUFGCTRL4.S1 |
TCELL3:IMUX.IMUX13 | BUFGCTRL4.CE1 |
TCELL3:IMUX.IMUX14 | BUFGCTRL4.IGNORE1 |
TCELL3:IMUX.IMUX15 | BUFGCTRL4.CKINT1 |
TCELL3:IMUX.IMUX16 | BUFGCTRL13.S0 |
TCELL3:IMUX.IMUX17 | BUFGCTRL13.CE0 |
TCELL3:IMUX.IMUX18 | BUFGCTRL5.S1 |
TCELL3:IMUX.IMUX19 | BUFGCTRL5.CE1 |
TCELL3:IMUX.IMUX20 | BUFGCTRL5.IGNORE1 |
TCELL3:IMUX.IMUX21 | BUFGCTRL5.CKINT1 |
TCELL3:IMUX.IMUX22 | BUFGCTRL13.IGNORE0 |
TCELL3:IMUX.IMUX23 | BUFGCTRL13.CKINT0 |
TCELL3:IMUX.IMUX24 | BUFGCTRL6.S0 |
TCELL3:IMUX.IMUX25 | BUFGCTRL6.CE0 |
TCELL3:IMUX.IMUX26 | BUFGCTRL6.IGNORE0 |
TCELL3:IMUX.IMUX27 | BUFGCTRL6.CKINT0 |
TCELL3:IMUX.IMUX28 | BUFGCTRL12.S1 |
TCELL3:IMUX.IMUX29 | BUFGCTRL12.CE1 |
TCELL3:IMUX.IMUX30 | BUFGCTRL7.S0 |
TCELL3:IMUX.IMUX31 | BUFGCTRL7.CE0 |
TCELL3:IMUX.IMUX32 | BUFGCTRL7.IGNORE0 |
TCELL3:IMUX.IMUX33 | BUFGCTRL7.CKINT0 |
TCELL3:IMUX.IMUX34 | BUFGCTRL12.IGNORE1 |
TCELL3:IMUX.IMUX35 | BUFGCTRL12.CKINT1 |
TCELL3:IMUX.IMUX36 | BUFGCTRL6.S1 |
TCELL3:IMUX.IMUX37 | BUFGCTRL6.CE1 |
TCELL3:IMUX.IMUX38 | BUFGCTRL6.IGNORE1 |
TCELL3:IMUX.IMUX39 | BUFGCTRL6.CKINT1 |
TCELL3:IMUX.IMUX40 | BUFGCTRL13.S1 |
TCELL3:IMUX.IMUX41 | BUFGCTRL13.CE1 |
TCELL3:IMUX.IMUX42 | BUFGCTRL7.S1 |
TCELL3:IMUX.IMUX43 | BUFGCTRL7.CE1 |
TCELL3:IMUX.IMUX44 | BUFGCTRL7.IGNORE1 |
TCELL3:IMUX.IMUX45 | BUFGCTRL7.CKINT1 |
TCELL3:IMUX.IMUX46 | BUFGCTRL13.IGNORE1 |
TCELL3:IMUX.IMUX47 | BUFGCTRL13.CKINT1 |
TCELL3:OUT0 | BUFGCTRL7.I1MUX |
TCELL3:OUT1 | BUFGCTRL7.I0MUX |
TCELL3:OUT2 | BUFGCTRL6.I1MUX |
TCELL3:OUT3 | BUFGCTRL6.I0MUX |
TCELL3:OUT4 | BUFGCTRL9.I1MUX |
TCELL3:OUT5 | BUFGCTRL9.I0MUX |
TCELL3:OUT6 | BUFGCTRL8.I1MUX |
TCELL3:OUT7 | BUFGCTRL8.I0MUX |
TCELL3:OUT8 | BUFGCTRL11.I1MUX |
TCELL3:OUT9 | BUFGCTRL11.I0MUX |
TCELL3:OUT10 | BUFGCTRL10.I1MUX |
TCELL3:OUT11 | BUFGCTRL10.I0MUX |
TCELL4:IMUX.IMUX0 | BUFGCTRL8.S0 |
TCELL4:IMUX.IMUX1 | BUFGCTRL8.CE0 |
TCELL4:IMUX.IMUX2 | BUFGCTRL8.IGNORE0 |
TCELL4:IMUX.IMUX3 | BUFGCTRL8.CKINT0 |
TCELL4:IMUX.IMUX4 | BUFGCTRL14.S0 |
TCELL4:IMUX.IMUX5 | BUFGCTRL14.CE0 |
TCELL4:IMUX.IMUX6 | BUFGCTRL9.S0 |
TCELL4:IMUX.IMUX7 | BUFGCTRL9.CE0 |
TCELL4:IMUX.IMUX8 | BUFGCTRL9.IGNORE0 |
TCELL4:IMUX.IMUX9 | BUFGCTRL9.CKINT0 |
TCELL4:IMUX.IMUX10 | BUFGCTRL14.IGNORE0 |
TCELL4:IMUX.IMUX11 | BUFGCTRL14.CKINT0 |
TCELL4:IMUX.IMUX12 | BUFGCTRL8.S1 |
TCELL4:IMUX.IMUX13 | BUFGCTRL8.CE1 |
TCELL4:IMUX.IMUX14 | BUFGCTRL8.IGNORE1 |
TCELL4:IMUX.IMUX15 | BUFGCTRL8.CKINT1 |
TCELL4:IMUX.IMUX16 | BUFGCTRL15.S0 |
TCELL4:IMUX.IMUX17 | BUFGCTRL15.CE0 |
TCELL4:IMUX.IMUX18 | BUFGCTRL9.S1 |
TCELL4:IMUX.IMUX19 | BUFGCTRL9.CE1 |
TCELL4:IMUX.IMUX20 | BUFGCTRL9.IGNORE1 |
TCELL4:IMUX.IMUX21 | BUFGCTRL9.CKINT1 |
TCELL4:IMUX.IMUX22 | BUFGCTRL15.IGNORE0 |
TCELL4:IMUX.IMUX23 | BUFGCTRL15.CKINT0 |
TCELL4:IMUX.IMUX24 | BUFGCTRL10.S0 |
TCELL4:IMUX.IMUX25 | BUFGCTRL10.CE0 |
TCELL4:IMUX.IMUX26 | BUFGCTRL10.IGNORE0 |
TCELL4:IMUX.IMUX27 | BUFGCTRL10.CKINT0 |
TCELL4:IMUX.IMUX28 | BUFGCTRL14.S1 |
TCELL4:IMUX.IMUX29 | BUFGCTRL14.CE1 |
TCELL4:IMUX.IMUX30 | BUFGCTRL11.S0 |
TCELL4:IMUX.IMUX31 | BUFGCTRL11.CE0 |
TCELL4:IMUX.IMUX32 | BUFGCTRL11.IGNORE0 |
TCELL4:IMUX.IMUX33 | BUFGCTRL11.CKINT0 |
TCELL4:IMUX.IMUX34 | BUFGCTRL14.IGNORE1 |
TCELL4:IMUX.IMUX35 | BUFGCTRL14.CKINT1 |
TCELL4:IMUX.IMUX36 | BUFGCTRL10.S1 |
TCELL4:IMUX.IMUX37 | BUFGCTRL10.CE1 |
TCELL4:IMUX.IMUX38 | BUFGCTRL10.IGNORE1 |
TCELL4:IMUX.IMUX39 | BUFGCTRL10.CKINT1 |
TCELL4:IMUX.IMUX40 | BUFGCTRL15.S1 |
TCELL4:IMUX.IMUX41 | BUFGCTRL15.CE1 |
TCELL4:IMUX.IMUX42 | BUFGCTRL11.S1 |
TCELL4:IMUX.IMUX43 | BUFGCTRL11.CE1 |
TCELL4:IMUX.IMUX44 | BUFGCTRL11.IGNORE1 |
TCELL4:IMUX.IMUX45 | BUFGCTRL11.CKINT1 |
TCELL4:IMUX.IMUX46 | BUFGCTRL15.IGNORE1 |
TCELL4:IMUX.IMUX47 | BUFGCTRL15.CKINT1 |
TCELL4:OUT0 | BUFGCTRL13.I1MUX |
TCELL4:OUT1 | BUFGCTRL13.I0MUX |
TCELL4:OUT2 | BUFGCTRL12.I1MUX |
TCELL4:OUT3 | BUFGCTRL12.I0MUX |
TCELL4:OUT4 | BUFGCTRL15.I1MUX |
TCELL4:OUT5 | BUFGCTRL15.I0MUX |
TCELL4:OUT6 | BUFGCTRL14.I1MUX |
TCELL4:OUT7 | BUFGCTRL14.I0MUX |
TCELL5:IMUX.IMUX0 | BSCAN2.TDO |
TCELL5:IMUX.IMUX1 | BSCAN3.TDO |
TCELL5:IMUX.IMUX2 | JTAGPPC.TDOPPC |
TCELL5:OUT0 | BSCAN3.RESET |
TCELL5:OUT1 | JTAGPPC.TCK |
TCELL5:OUT2 | JTAGPPC.TMS |
TCELL5:OUT3 | JTAGPPC.TDIPPC |
TCELL5:OUT4 | FRAME_ECC.ECCERROR |
TCELL5:OUT5 | EFUSE_USR.EFUSEUSR24 |
TCELL5:OUT6 | EFUSE_USR.EFUSEUSR25 |
TCELL5:OUT7 | EFUSE_USR.EFUSEUSR26 |
TCELL5:OUT8 | EFUSE_USR.EFUSEUSR27 |
TCELL5:OUT9 | EFUSE_USR.EFUSEUSR28 |
TCELL5:OUT10 | EFUSE_USR.EFUSEUSR29 |
TCELL5:OUT11 | EFUSE_USR.EFUSEUSR30 |
TCELL5:OUT12 | EFUSE_USR.EFUSEUSR31 |
TCELL5:OUT13 | BSCAN2.DRCK |
TCELL5:OUT14 | BSCAN3.DRCK |
TCELL5:OUT15 | BSCAN2.CAPTURE |
TCELL5:OUT16 | BSCAN3.CAPTURE |
TCELL5:OUT17 | BSCAN2.SHIFT |
TCELL5:OUT18 | BSCAN3.SHIFT |
TCELL5:OUT19 | BSCAN2.TDI |
TCELL5:OUT20 | BSCAN3.TDI |
TCELL5:OUT21 | BSCAN2.UPDATE |
TCELL5:OUT22 | BSCAN3.UPDATE |
TCELL5:OUT23 | BSCAN2.RESET |
TCELL6:IMUX.CLK0 | ICAP0.CLK |
TCELL6:IMUX.IMUX0 | ICAP0.I0 |
TCELL6:IMUX.IMUX1 | ICAP0.I1 |
TCELL6:IMUX.IMUX2 | ICAP0.I2 |
TCELL6:IMUX.IMUX3 | ICAP0.I3 |
TCELL6:IMUX.IMUX4 | ICAP0.I4 |
TCELL6:IMUX.IMUX5 | ICAP0.I5 |
TCELL6:IMUX.IMUX6 | ICAP0.I6 |
TCELL6:IMUX.IMUX7 | ICAP0.I7 |
TCELL6:IMUX.IMUX8 | ICAP0.I8 |
TCELL6:IMUX.IMUX9 | ICAP0.I9 |
TCELL6:IMUX.IMUX10 | ICAP0.I10 |
TCELL6:IMUX.IMUX11 | ICAP0.I11 |
TCELL6:IMUX.IMUX12 | ICAP0.I12 |
TCELL6:IMUX.IMUX13 | ICAP0.I13 |
TCELL6:IMUX.IMUX14 | ICAP0.I14 |
TCELL6:IMUX.IMUX15 | ICAP0.I15 |
TCELL6:IMUX.IMUX16 | ICAP0.WRITE |
TCELL6:OUT0 | ICAP0.O0 |
TCELL6:OUT1 | ICAP0.O1 |
TCELL6:OUT2 | ICAP0.O2 |
TCELL6:OUT3 | ICAP0.O3 |
TCELL6:OUT4 | ICAP0.O4 |
TCELL6:OUT5 | ICAP0.O5 |
TCELL6:OUT6 | ICAP0.O6 |
TCELL6:OUT7 | ICAP0.O7 |
TCELL6:OUT8 | ICAP0.O8 |
TCELL6:OUT9 | ICAP0.O9 |
TCELL6:OUT10 | ICAP0.O10 |
TCELL6:OUT11 | ICAP0.O11 |
TCELL6:OUT12 | ICAP0.O12 |
TCELL6:OUT13 | ICAP0.O13 |
TCELL6:OUT14 | ICAP0.O14 |
TCELL6:OUT15 | ICAP0.O15 |
TCELL6:OUT16 | FRAME_ECC.CRCERROR |
TCELL6:OUT17 | STARTUP.CFGCLK |
TCELL6:OUT18 | DCIRESET.LOCKED |
TCELL7:IMUX.IMUX0 | ICAP0.I16 |
TCELL7:IMUX.IMUX1 | ICAP0.I17 |
TCELL7:IMUX.IMUX2 | ICAP0.I18 |
TCELL7:IMUX.IMUX3 | ICAP0.I19 |
TCELL7:IMUX.IMUX4 | ICAP0.I20 |
TCELL7:IMUX.IMUX5 | ICAP0.I21 |
TCELL7:IMUX.IMUX6 | ICAP0.I22 |
TCELL7:IMUX.IMUX7 | ICAP0.I23 |
TCELL7:IMUX.IMUX8 | ICAP0.I24 |
TCELL7:IMUX.IMUX9 | ICAP0.I25 |
TCELL7:IMUX.IMUX10 | ICAP0.I26 |
TCELL7:IMUX.IMUX11 | ICAP0.I27 |
TCELL7:IMUX.IMUX12 | ICAP0.I28 |
TCELL7:IMUX.IMUX13 | ICAP0.I29 |
TCELL7:IMUX.IMUX14 | ICAP0.I30 |
TCELL7:IMUX.IMUX15 | ICAP0.I31 |
TCELL7:IMUX.IMUX16 | ICAP0.CE |
TCELL7:OUT0 | ICAP0.O16 |
TCELL7:OUT1 | ICAP0.O17 |
TCELL7:OUT2 | ICAP0.O18 |
TCELL7:OUT3 | ICAP0.O19 |
TCELL7:OUT4 | ICAP0.O20 |
TCELL7:OUT5 | ICAP0.O21 |
TCELL7:OUT6 | ICAP0.O22 |
TCELL7:OUT7 | ICAP0.O23 |
TCELL7:OUT8 | ICAP0.O24 |
TCELL7:OUT9 | ICAP0.O25 |
TCELL7:OUT10 | ICAP0.O26 |
TCELL7:OUT11 | ICAP0.O27 |
TCELL7:OUT12 | ICAP0.O28 |
TCELL7:OUT13 | ICAP0.O29 |
TCELL7:OUT14 | ICAP0.O30 |
TCELL7:OUT15 | ICAP0.O31 |
TCELL7:OUT16 | ICAP0.BUSY |
TCELL7:OUT17 | STARTUP.CFGMCLK |
TCELL7:OUT18 | ICAP1.BUSY |
TCELL8:IMUX.CLK0 | STARTUP.USRCCLKO |
TCELL8:IMUX.CLK1 | STARTUP.CLK |
TCELL8:IMUX.IMUX0 | STARTUP.GSR |
TCELL8:IMUX.IMUX1 | STARTUP.GTS |
TCELL8:IMUX.IMUX2 | STARTUP.USRDONEO |
TCELL8:IMUX.IMUX3 | STARTUP.USRDONETS |
TCELL8:IMUX.IMUX8 | KEY_CLEAR.KEYCLEARB |
TCELL8:OUT0 | USR_ACCESS.DATA16 |
TCELL8:OUT1 | USR_ACCESS.DATA17 |
TCELL8:OUT2 | USR_ACCESS.DATA18 |
TCELL8:OUT3 | USR_ACCESS.DATA19 |
TCELL8:OUT4 | USR_ACCESS.DATA20 |
TCELL8:OUT5 | USR_ACCESS.DATA21 |
TCELL8:OUT6 | USR_ACCESS.DATA22 |
TCELL8:OUT7 | USR_ACCESS.DATA23 |
TCELL8:OUT8 | USR_ACCESS.DATA24 |
TCELL8:OUT9 | USR_ACCESS.DATA25 |
TCELL8:OUT10 | USR_ACCESS.DATA26 |
TCELL8:OUT11 | USR_ACCESS.DATA27 |
TCELL8:OUT12 | USR_ACCESS.DATA28 |
TCELL8:OUT13 | USR_ACCESS.DATA29 |
TCELL8:OUT14 | USR_ACCESS.DATA30 |
TCELL8:OUT15 | USR_ACCESS.DATA31 |
TCELL8:OUT16 | USR_ACCESS.DATAVALID |
TCELL8:OUT17 | STARTUP.TCKSPI |
TCELL8:OUT18 | STARTUP.DINSPI |
TCELL8:OUT19 | USR_ACCESS.CFGCLK |
TCELL9:IMUX.CLK0 | ICAP1.CLK |
TCELL9:IMUX.CLK1 | STARTUP.USRCCLKTS |
TCELL9:IMUX.IMUX0 | ICAP1.I0 |
TCELL9:IMUX.IMUX1 | ICAP1.I1 |
TCELL9:IMUX.IMUX2 | ICAP1.I2 |
TCELL9:IMUX.IMUX3 | ICAP1.I3 |
TCELL9:IMUX.IMUX4 | ICAP1.I4 |
TCELL9:IMUX.IMUX5 | ICAP1.I5 |
TCELL9:IMUX.IMUX6 | ICAP1.I6 |
TCELL9:IMUX.IMUX7 | ICAP1.I7 |
TCELL9:IMUX.IMUX8 | ICAP1.I8 |
TCELL9:IMUX.IMUX9 | ICAP1.I9 |
TCELL9:IMUX.IMUX10 | ICAP1.I10 |
TCELL9:IMUX.IMUX11 | ICAP1.I11 |
TCELL9:IMUX.IMUX12 | ICAP1.I12 |
TCELL9:IMUX.IMUX13 | ICAP1.I13 |
TCELL9:IMUX.IMUX14 | ICAP1.I14 |
TCELL9:IMUX.IMUX15 | ICAP1.I15 |
TCELL9:IMUX.IMUX16 | ICAP1.WRITE |
TCELL9:OUT0 | ICAP1.O0 |
TCELL9:OUT1 | ICAP1.O1 |
TCELL9:OUT2 | ICAP1.O2 |
TCELL9:OUT3 | ICAP1.O3 |
TCELL9:OUT4 | ICAP1.O4 |
TCELL9:OUT5 | ICAP1.O5 |
TCELL9:OUT6 | ICAP1.O6 |
TCELL9:OUT7 | ICAP1.O7 |
TCELL9:OUT8 | ICAP1.O8 |
TCELL9:OUT9 | ICAP1.O9 |
TCELL9:OUT10 | ICAP1.O10 |
TCELL9:OUT11 | ICAP1.O11 |
TCELL9:OUT12 | ICAP1.O12 |
TCELL9:OUT13 | ICAP1.O13 |
TCELL9:OUT14 | ICAP1.O14 |
TCELL9:OUT15 | ICAP1.O15 |
TCELL9:OUT16 | USR_ACCESS.DATA8 |
TCELL9:OUT17 | USR_ACCESS.DATA9 |
TCELL9:OUT18 | USR_ACCESS.DATA10 |
TCELL9:OUT19 | USR_ACCESS.DATA11 |
TCELL9:OUT20 | USR_ACCESS.DATA12 |
TCELL9:OUT21 | USR_ACCESS.DATA13 |
TCELL9:OUT22 | USR_ACCESS.DATA14 |
TCELL9:OUT23 | USR_ACCESS.DATA15 |
TCELL10:IMUX.IMUX0 | ICAP1.I16 |
TCELL10:IMUX.IMUX1 | ICAP1.I17 |
TCELL10:IMUX.IMUX2 | ICAP1.I18 |
TCELL10:IMUX.IMUX3 | ICAP1.I19 |
TCELL10:IMUX.IMUX4 | ICAP1.I20 |
TCELL10:IMUX.IMUX5 | ICAP1.I21 |
TCELL10:IMUX.IMUX6 | ICAP1.I22 |
TCELL10:IMUX.IMUX7 | ICAP1.I23 |
TCELL10:IMUX.IMUX8 | ICAP1.I24 |
TCELL10:IMUX.IMUX9 | ICAP1.I25 |
TCELL10:IMUX.IMUX10 | ICAP1.I26 |
TCELL10:IMUX.IMUX11 | ICAP1.I27 |
TCELL10:IMUX.IMUX12 | ICAP1.I28 |
TCELL10:IMUX.IMUX13 | ICAP1.I29 |
TCELL10:IMUX.IMUX14 | ICAP1.I30 |
TCELL10:IMUX.IMUX15 | ICAP1.I31 |
TCELL10:IMUX.IMUX16 | ICAP1.CE |
TCELL10:IMUX.IMUX18 | DCIRESET.RST |
TCELL10:OUT0 | ICAP1.O16 |
TCELL10:OUT1 | ICAP1.O17 |
TCELL10:OUT2 | ICAP1.O18 |
TCELL10:OUT3 | ICAP1.O19 |
TCELL10:OUT4 | ICAP1.O20 |
TCELL10:OUT5 | ICAP1.O21 |
TCELL10:OUT6 | ICAP1.O22 |
TCELL10:OUT7 | ICAP1.O23 |
TCELL10:OUT8 | ICAP1.O24 |
TCELL10:OUT9 | ICAP1.O25 |
TCELL10:OUT10 | ICAP1.O26 |
TCELL10:OUT11 | ICAP1.O27 |
TCELL10:OUT12 | ICAP1.O28 |
TCELL10:OUT13 | ICAP1.O29 |
TCELL10:OUT14 | ICAP1.O30 |
TCELL10:OUT15 | ICAP1.O31 |
TCELL10:OUT16 | USR_ACCESS.DATA0 |
TCELL10:OUT17 | USR_ACCESS.DATA1 |
TCELL10:OUT18 | USR_ACCESS.DATA2 |
TCELL10:OUT19 | USR_ACCESS.DATA3 |
TCELL10:OUT20 | USR_ACCESS.DATA4 |
TCELL10:OUT21 | USR_ACCESS.DATA5 |
TCELL10:OUT22 | USR_ACCESS.DATA6 |
TCELL10:OUT23 | USR_ACCESS.DATA7 |
TCELL11:OUT0 | EFUSE_USR.EFUSEUSR0 |
TCELL11:OUT1 | EFUSE_USR.EFUSEUSR1 |
TCELL11:OUT2 | EFUSE_USR.EFUSEUSR2 |
TCELL11:OUT3 | EFUSE_USR.EFUSEUSR3 |
TCELL11:OUT4 | EFUSE_USR.EFUSEUSR4 |
TCELL11:OUT5 | EFUSE_USR.EFUSEUSR5 |
TCELL11:OUT6 | EFUSE_USR.EFUSEUSR6 |
TCELL11:OUT7 | EFUSE_USR.EFUSEUSR7 |
TCELL11:OUT8 | EFUSE_USR.EFUSEUSR8 |
TCELL11:OUT9 | EFUSE_USR.EFUSEUSR9 |
TCELL11:OUT10 | EFUSE_USR.EFUSEUSR10 |
TCELL11:OUT11 | EFUSE_USR.EFUSEUSR11 |
TCELL11:OUT12 | EFUSE_USR.EFUSEUSR12 |
TCELL11:OUT13 | EFUSE_USR.EFUSEUSR13 |
TCELL11:OUT14 | EFUSE_USR.EFUSEUSR14 |
TCELL11:OUT15 | EFUSE_USR.EFUSEUSR15 |
TCELL11:OUT16 | EFUSE_USR.EFUSEUSR16 |
TCELL11:OUT17 | EFUSE_USR.EFUSEUSR17 |
TCELL11:OUT18 | EFUSE_USR.EFUSEUSR18 |
TCELL11:OUT19 | EFUSE_USR.EFUSEUSR19 |
TCELL11:OUT20 | EFUSE_USR.EFUSEUSR20 |
TCELL11:OUT21 | EFUSE_USR.EFUSEUSR21 |
TCELL11:OUT22 | EFUSE_USR.EFUSEUSR22 |
TCELL11:OUT23 | EFUSE_USR.EFUSEUSR23 |
TCELL12:IMUX.CLK0 | SYSMON.DCLK |
TCELL12:IMUX.IMUX0 | SYSMON.DI0 |
TCELL12:IMUX.IMUX1 | SYSMON.DI1 |
TCELL12:IMUX.IMUX2 | SYSMON.DI2 |
TCELL12:IMUX.IMUX3 | SYSMON.DI3 |
TCELL12:IMUX.IMUX4 | SYSMON.DI4 |
TCELL12:IMUX.IMUX5 | SYSMON.DI5 |
TCELL12:IMUX.IMUX6 | SYSMON.DI6 |
TCELL12:IMUX.IMUX7 | SYSMON.DI7 |
TCELL12:IMUX.IMUX8 | SYSMON.DI8 |
TCELL12:IMUX.IMUX9 | SYSMON.DI9 |
TCELL12:IMUX.IMUX10 | SYSMON.DI10 |
TCELL12:IMUX.IMUX11 | SYSMON.DI11 |
TCELL12:IMUX.IMUX12 | SYSMON.DI12 |
TCELL12:IMUX.IMUX13 | SYSMON.DI13 |
TCELL12:IMUX.IMUX14 | SYSMON.DI14 |
TCELL12:IMUX.IMUX15 | SYSMON.DI15 |
TCELL12:IMUX.IMUX16 | SYSMON.DADDR0 |
TCELL12:IMUX.IMUX17 | SYSMON.DADDR1 |
TCELL12:IMUX.IMUX18 | SYSMON.DADDR2 |
TCELL12:IMUX.IMUX19 | SYSMON.DADDR3 |
TCELL12:IMUX.IMUX20 | SYSMON.DADDR4 |
TCELL12:IMUX.IMUX21 | SYSMON.DADDR5 |
TCELL12:IMUX.IMUX22 | SYSMON.DADDR6 |
TCELL12:IMUX.IMUX23 | SYSMON.DWE |
TCELL12:IMUX.IMUX24 | SYSMON.DEN |
TCELL12:OUT0 | SYSMON.DO0 |
TCELL12:OUT1 | SYSMON.DO1 |
TCELL12:OUT2 | SYSMON.DO2 |
TCELL12:OUT3 | SYSMON.DO3 |
TCELL12:OUT4 | SYSMON.DO4 |
TCELL12:OUT5 | SYSMON.DO5 |
TCELL12:OUT6 | SYSMON.DO6 |
TCELL12:OUT7 | SYSMON.DO7 |
TCELL12:OUT8 | SYSMON.DO8 |
TCELL12:OUT9 | SYSMON.DO9 |
TCELL12:OUT10 | SYSMON.DO10 |
TCELL12:OUT11 | SYSMON.DO11 |
TCELL12:OUT12 | SYSMON.DO12 |
TCELL12:OUT13 | SYSMON.DO13 |
TCELL12:OUT14 | SYSMON.DO14 |
TCELL12:OUT15 | SYSMON.DO15 |
TCELL13:IMUX.CLK0 | SYSMON.CONVSTCLK |
TCELL13:IMUX.CTRL0.SITE | SYSMON.RESET |
TCELL13:IMUX.IMUX0 | SYSMON.TESTENJTAG |
TCELL13:IMUX.IMUX1 | SYSMON.TESTRST |
TCELL13:IMUX.IMUX2 | SYSMON.TESTTDI |
TCELL13:IMUX.IMUX3 | SYSMON.TESTDRCK |
TCELL13:IMUX.IMUX4 | SYSMON.TESTSEL |
TCELL13:IMUX.IMUX5 | SYSMON.TESTSHIFT |
TCELL13:IMUX.IMUX6 | SYSMON.TESTUPDATE |
TCELL13:IMUX.IMUX7 | SYSMON.TESTCAPTURE |
TCELL13:IMUX.IMUX8 | SYSMON.CONVST |
TCELL13:OUT0 | SYSMON.DRDY |
TCELL13:OUT1 | SYSMON.CHANNEL0 |
TCELL13:OUT2 | SYSMON.CHANNEL1 |
TCELL13:OUT3 | SYSMON.CHANNEL2 |
TCELL13:OUT4 | SYSMON.CHANNEL3 |
TCELL13:OUT5 | SYSMON.CHANNEL4 |
TCELL13:OUT6 | SYSMON.EOC |
TCELL13:OUT7 | SYSMON.EOS |
TCELL13:OUT8 | SYSMON.BUSY |
TCELL13:OUT9 | SYSMON.OT |
TCELL13:OUT10 | SYSMON.ALM0 |
TCELL13:OUT11 | SYSMON.ALM1 |
TCELL13:OUT12 | SYSMON.ALM2 |
TCELL13:OUT13 | SYSMON.TESTTDO |
TCELL13:OUT14 | SYSMON.JTAGBUSY |
TCELL13:OUT15 | SYSMON.JTAGMODIFIED |
TCELL13:OUT16 | SYSMON.JTAGLOCKED |
TCELL14:IMUX.IMUX0 | SYSMON.TESTSIA |
TCELL14:IMUX.IMUX1 | SYSMON.TESTSCANCLKA |
TCELL14:IMUX.IMUX2 | SYSMON.TESTSEA |
TCELL14:IMUX.IMUX3 | SYSMON.TESTSCANMODEA |
TCELL14:IMUX.IMUX4 | SYSMON.TESTSIB |
TCELL14:IMUX.IMUX5 | SYSMON.TESTSCANCLKB |
TCELL14:IMUX.IMUX6 | SYSMON.TESTSEB |
TCELL14:IMUX.IMUX7 | SYSMON.TESTSCANMODEB |
TCELL14:IMUX.IMUX8 | SYSMON.TESTSIC |
TCELL14:IMUX.IMUX9 | SYSMON.TESTSCANCLKC |
TCELL14:IMUX.IMUX10 | SYSMON.TESTSEC |
TCELL14:IMUX.IMUX11 | SYSMON.TESTSCANMODEC |
TCELL14:IMUX.IMUX12 | SYSMON.TESTSID |
TCELL14:IMUX.IMUX13 | SYSMON.TESTSCANCLKD |
TCELL14:IMUX.IMUX14 | SYSMON.TESTSED |
TCELL14:IMUX.IMUX15 | SYSMON.TESTSCANMODED |
TCELL14:IMUX.IMUX16 | SYSMON.TESTSIE |
TCELL14:IMUX.IMUX17 | SYSMON.TESTSCANCLKE |
TCELL14:IMUX.IMUX18 | SYSMON.TESTSEE |
TCELL14:IMUX.IMUX19 | SYSMON.TESTSCANMODEE |
TCELL14:IMUX.IMUX20 | SYSMON.TESTSCANRESET |
TCELL14:OUT0 | SYSMON.TESTSOA |
TCELL14:OUT1 | SYSMON.TESTSOB |
TCELL14:OUT2 | SYSMON.TESTSOC |
TCELL14:OUT3 | SYSMON.TESTSOD |
TCELL14:OUT4 | SYSMON.TESTSOE |
TCELL15:IMUX.IMUX0 | BUFGCTRL31.S0 |
TCELL15:IMUX.IMUX1 | BUFGCTRL31.CE0 |
TCELL15:IMUX.IMUX2 | BUFGCTRL31.IGNORE0 |
TCELL15:IMUX.IMUX3 | BUFGCTRL31.CKINT0 |
TCELL15:IMUX.IMUX6 | BUFGCTRL30.S0 |
TCELL15:IMUX.IMUX7 | BUFGCTRL30.CE0 |
TCELL15:IMUX.IMUX8 | BUFGCTRL30.IGNORE0 |
TCELL15:IMUX.IMUX9 | BUFGCTRL30.CKINT0 |
TCELL15:IMUX.IMUX12 | BUFGCTRL31.S1 |
TCELL15:IMUX.IMUX13 | BUFGCTRL31.CE1 |
TCELL15:IMUX.IMUX14 | BUFGCTRL31.IGNORE1 |
TCELL15:IMUX.IMUX15 | BUFGCTRL31.CKINT1 |
TCELL15:IMUX.IMUX18 | BUFGCTRL30.S1 |
TCELL15:IMUX.IMUX19 | BUFGCTRL30.CE1 |
TCELL15:IMUX.IMUX20 | BUFGCTRL30.IGNORE1 |
TCELL15:IMUX.IMUX21 | BUFGCTRL30.CKINT1 |
TCELL15:IMUX.IMUX24 | BUFGCTRL29.S0 |
TCELL15:IMUX.IMUX25 | BUFGCTRL29.CE0 |
TCELL15:IMUX.IMUX26 | BUFGCTRL29.IGNORE0 |
TCELL15:IMUX.IMUX27 | BUFGCTRL29.CKINT0 |
TCELL15:IMUX.IMUX30 | BUFGCTRL28.S0 |
TCELL15:IMUX.IMUX31 | BUFGCTRL28.CE0 |
TCELL15:IMUX.IMUX32 | BUFGCTRL28.IGNORE0 |
TCELL15:IMUX.IMUX33 | BUFGCTRL28.CKINT0 |
TCELL15:IMUX.IMUX36 | BUFGCTRL29.S1 |
TCELL15:IMUX.IMUX37 | BUFGCTRL29.CE1 |
TCELL15:IMUX.IMUX38 | BUFGCTRL29.IGNORE1 |
TCELL15:IMUX.IMUX39 | BUFGCTRL29.CKINT1 |
TCELL15:IMUX.IMUX42 | BUFGCTRL28.S1 |
TCELL15:IMUX.IMUX43 | BUFGCTRL28.CE1 |
TCELL15:IMUX.IMUX44 | BUFGCTRL28.IGNORE1 |
TCELL15:IMUX.IMUX45 | BUFGCTRL28.CKINT1 |
TCELL15:OUT0 | BUFGCTRL30.I1MUX |
TCELL15:OUT1 | BUFGCTRL30.I0MUX |
TCELL15:OUT2 | BUFGCTRL31.I1MUX |
TCELL15:OUT3 | BUFGCTRL31.I0MUX |
TCELL15:OUT4 | BUFGCTRL28.I1MUX |
TCELL15:OUT5 | BUFGCTRL28.I0MUX |
TCELL15:OUT6 | BUFGCTRL29.I1MUX |
TCELL15:OUT7 | BUFGCTRL29.I0MUX |
TCELL15:OUT8 | BUFGCTRL26.I1MUX |
TCELL15:OUT9 | BUFGCTRL26.I0MUX |
TCELL15:OUT10 | BUFGCTRL27.I1MUX |
TCELL15:OUT11 | BUFGCTRL27.I0MUX |
TCELL16:IMUX.IMUX0 | BUFGCTRL27.S0 |
TCELL16:IMUX.IMUX1 | BUFGCTRL27.CE0 |
TCELL16:IMUX.IMUX2 | BUFGCTRL27.IGNORE0 |
TCELL16:IMUX.IMUX3 | BUFGCTRL27.CKINT0 |
TCELL16:IMUX.IMUX4 | BUFGCTRL19.S0 |
TCELL16:IMUX.IMUX5 | BUFGCTRL19.CE0 |
TCELL16:IMUX.IMUX6 | BUFGCTRL26.S0 |
TCELL16:IMUX.IMUX7 | BUFGCTRL26.CE0 |
TCELL16:IMUX.IMUX8 | BUFGCTRL26.IGNORE0 |
TCELL16:IMUX.IMUX9 | BUFGCTRL26.CKINT0 |
TCELL16:IMUX.IMUX10 | BUFGCTRL19.IGNORE0 |
TCELL16:IMUX.IMUX11 | BUFGCTRL19.CKINT0 |
TCELL16:IMUX.IMUX12 | BUFGCTRL27.S1 |
TCELL16:IMUX.IMUX13 | BUFGCTRL27.CE1 |
TCELL16:IMUX.IMUX14 | BUFGCTRL27.IGNORE1 |
TCELL16:IMUX.IMUX15 | BUFGCTRL27.CKINT1 |
TCELL16:IMUX.IMUX16 | BUFGCTRL18.S0 |
TCELL16:IMUX.IMUX17 | BUFGCTRL18.CE0 |
TCELL16:IMUX.IMUX18 | BUFGCTRL26.S1 |
TCELL16:IMUX.IMUX19 | BUFGCTRL26.CE1 |
TCELL16:IMUX.IMUX20 | BUFGCTRL26.IGNORE1 |
TCELL16:IMUX.IMUX21 | BUFGCTRL26.CKINT1 |
TCELL16:IMUX.IMUX22 | BUFGCTRL18.IGNORE0 |
TCELL16:IMUX.IMUX23 | BUFGCTRL18.CKINT0 |
TCELL16:IMUX.IMUX24 | BUFGCTRL25.S0 |
TCELL16:IMUX.IMUX25 | BUFGCTRL25.CE0 |
TCELL16:IMUX.IMUX26 | BUFGCTRL25.IGNORE0 |
TCELL16:IMUX.IMUX27 | BUFGCTRL25.CKINT0 |
TCELL16:IMUX.IMUX28 | BUFGCTRL19.S1 |
TCELL16:IMUX.IMUX29 | BUFGCTRL19.CE1 |
TCELL16:IMUX.IMUX30 | BUFGCTRL24.S0 |
TCELL16:IMUX.IMUX31 | BUFGCTRL24.CE0 |
TCELL16:IMUX.IMUX32 | BUFGCTRL24.IGNORE0 |
TCELL16:IMUX.IMUX33 | BUFGCTRL24.CKINT0 |
TCELL16:IMUX.IMUX34 | BUFGCTRL19.IGNORE1 |
TCELL16:IMUX.IMUX35 | BUFGCTRL19.CKINT1 |
TCELL16:IMUX.IMUX36 | BUFGCTRL25.S1 |
TCELL16:IMUX.IMUX37 | BUFGCTRL25.CE1 |
TCELL16:IMUX.IMUX38 | BUFGCTRL25.IGNORE1 |
TCELL16:IMUX.IMUX39 | BUFGCTRL25.CKINT1 |
TCELL16:IMUX.IMUX40 | BUFGCTRL18.S1 |
TCELL16:IMUX.IMUX41 | BUFGCTRL18.CE1 |
TCELL16:IMUX.IMUX42 | BUFGCTRL24.S1 |
TCELL16:IMUX.IMUX43 | BUFGCTRL24.CE1 |
TCELL16:IMUX.IMUX44 | BUFGCTRL24.IGNORE1 |
TCELL16:IMUX.IMUX45 | BUFGCTRL24.CKINT1 |
TCELL16:IMUX.IMUX46 | BUFGCTRL18.IGNORE1 |
TCELL16:IMUX.IMUX47 | BUFGCTRL18.CKINT1 |
TCELL16:OUT0 | BUFGCTRL24.I1MUX |
TCELL16:OUT1 | BUFGCTRL24.I0MUX |
TCELL16:OUT2 | BUFGCTRL25.I1MUX |
TCELL16:OUT3 | BUFGCTRL25.I0MUX |
TCELL16:OUT4 | BUFGCTRL22.I1MUX |
TCELL16:OUT5 | BUFGCTRL22.I0MUX |
TCELL16:OUT6 | BUFGCTRL23.I1MUX |
TCELL16:OUT7 | BUFGCTRL23.I0MUX |
TCELL16:OUT8 | BUFGCTRL20.I1MUX |
TCELL16:OUT9 | BUFGCTRL20.I0MUX |
TCELL16:OUT10 | BUFGCTRL21.I1MUX |
TCELL16:OUT11 | BUFGCTRL21.I0MUX |
TCELL17:IMUX.IMUX0 | BUFGCTRL23.S0 |
TCELL17:IMUX.IMUX1 | BUFGCTRL23.CE0 |
TCELL17:IMUX.IMUX2 | BUFGCTRL23.IGNORE0 |
TCELL17:IMUX.IMUX3 | BUFGCTRL23.CKINT0 |
TCELL17:IMUX.IMUX4 | BUFGCTRL17.S0 |
TCELL17:IMUX.IMUX5 | BUFGCTRL17.CE0 |
TCELL17:IMUX.IMUX6 | BUFGCTRL22.S0 |
TCELL17:IMUX.IMUX7 | BUFGCTRL22.CE0 |
TCELL17:IMUX.IMUX8 | BUFGCTRL22.IGNORE0 |
TCELL17:IMUX.IMUX9 | BUFGCTRL22.CKINT0 |
TCELL17:IMUX.IMUX10 | BUFGCTRL17.IGNORE0 |
TCELL17:IMUX.IMUX11 | BUFGCTRL17.CKINT0 |
TCELL17:IMUX.IMUX12 | BUFGCTRL23.S1 |
TCELL17:IMUX.IMUX13 | BUFGCTRL23.CE1 |
TCELL17:IMUX.IMUX14 | BUFGCTRL23.IGNORE1 |
TCELL17:IMUX.IMUX15 | BUFGCTRL23.CKINT1 |
TCELL17:IMUX.IMUX16 | BUFGCTRL16.S0 |
TCELL17:IMUX.IMUX17 | BUFGCTRL16.CE0 |
TCELL17:IMUX.IMUX18 | BUFGCTRL22.S1 |
TCELL17:IMUX.IMUX19 | BUFGCTRL22.CE1 |
TCELL17:IMUX.IMUX20 | BUFGCTRL22.IGNORE1 |
TCELL17:IMUX.IMUX21 | BUFGCTRL22.CKINT1 |
TCELL17:IMUX.IMUX22 | BUFGCTRL16.IGNORE0 |
TCELL17:IMUX.IMUX23 | BUFGCTRL16.CKINT0 |
TCELL17:IMUX.IMUX24 | BUFGCTRL21.S0 |
TCELL17:IMUX.IMUX25 | BUFGCTRL21.CE0 |
TCELL17:IMUX.IMUX26 | BUFGCTRL21.IGNORE0 |
TCELL17:IMUX.IMUX27 | BUFGCTRL21.CKINT0 |
TCELL17:IMUX.IMUX28 | BUFGCTRL17.S1 |
TCELL17:IMUX.IMUX29 | BUFGCTRL17.CE1 |
TCELL17:IMUX.IMUX30 | BUFGCTRL20.S0 |
TCELL17:IMUX.IMUX31 | BUFGCTRL20.CE0 |
TCELL17:IMUX.IMUX32 | BUFGCTRL20.IGNORE0 |
TCELL17:IMUX.IMUX33 | BUFGCTRL20.CKINT0 |
TCELL17:IMUX.IMUX34 | BUFGCTRL17.IGNORE1 |
TCELL17:IMUX.IMUX35 | BUFGCTRL17.CKINT1 |
TCELL17:IMUX.IMUX36 | BUFGCTRL21.S1 |
TCELL17:IMUX.IMUX37 | BUFGCTRL21.CE1 |
TCELL17:IMUX.IMUX38 | BUFGCTRL21.IGNORE1 |
TCELL17:IMUX.IMUX39 | BUFGCTRL21.CKINT1 |
TCELL17:IMUX.IMUX40 | BUFGCTRL16.S1 |
TCELL17:IMUX.IMUX41 | BUFGCTRL16.CE1 |
TCELL17:IMUX.IMUX42 | BUFGCTRL20.S1 |
TCELL17:IMUX.IMUX43 | BUFGCTRL20.CE1 |
TCELL17:IMUX.IMUX44 | BUFGCTRL20.IGNORE1 |
TCELL17:IMUX.IMUX45 | BUFGCTRL20.CKINT1 |
TCELL17:IMUX.IMUX46 | BUFGCTRL16.IGNORE1 |
TCELL17:IMUX.IMUX47 | BUFGCTRL16.CKINT1 |
TCELL17:OUT0 | BUFGCTRL18.I1MUX |
TCELL17:OUT1 | BUFGCTRL18.I0MUX |
TCELL17:OUT2 | BUFGCTRL19.I1MUX |
TCELL17:OUT3 | BUFGCTRL19.I0MUX |
TCELL17:OUT4 | BUFGCTRL16.I1MUX |
TCELL17:OUT5 | BUFGCTRL16.I0MUX |
TCELL17:OUT6 | BUFGCTRL17.I1MUX |
TCELL17:OUT7 | BUFGCTRL17.I0MUX |
TCELL18:IMUX.CLK0 | SYSMON.TESTADCCLK0 |
TCELL18:IMUX.CLK1 | SYSMON.TESTADCCLK1 |
TCELL18:IMUX.IMUX0 | SYSMON.TESTADCIN0 |
TCELL18:IMUX.IMUX1 | SYSMON.TESTADCIN1 |
TCELL18:IMUX.IMUX2 | SYSMON.TESTADCIN2 |
TCELL18:IMUX.IMUX3 | SYSMON.TESTADCIN3 |
TCELL18:IMUX.IMUX4 | SYSMON.TESTADCIN4 |
TCELL18:IMUX.IMUX5 | SYSMON.TESTADCIN5 |
TCELL18:IMUX.IMUX6 | SYSMON.TESTADCIN6 |
TCELL18:IMUX.IMUX7 | SYSMON.TESTADCIN7 |
TCELL18:IMUX.IMUX8 | SYSMON.TESTADCIN8 |
TCELL18:IMUX.IMUX9 | SYSMON.TESTADCIN9 |
TCELL18:IMUX.IMUX10 | SYSMON.TESTADCIN10 |
TCELL18:IMUX.IMUX11 | SYSMON.TESTADCIN11 |
TCELL18:IMUX.IMUX12 | SYSMON.TESTADCIN12 |
TCELL18:IMUX.IMUX13 | SYSMON.TESTADCIN13 |
TCELL18:IMUX.IMUX14 | SYSMON.TESTADCIN14 |
TCELL18:IMUX.IMUX15 | SYSMON.TESTADCIN15 |
TCELL18:IMUX.IMUX16 | SYSMON.TESTADCIN16 |
TCELL18:IMUX.IMUX17 | SYSMON.TESTADCIN17 |
TCELL18:IMUX.IMUX18 | SYSMON.TESTADCIN18 |
TCELL18:IMUX.IMUX19 | SYSMON.TESTADCIN19 |
TCELL18:OUT0 | SYSMON.TESTDB0 |
TCELL18:OUT1 | SYSMON.TESTDB1 |
TCELL18:OUT2 | SYSMON.TESTDB2 |
TCELL18:OUT3 | SYSMON.TESTDB3 |
TCELL18:OUT4 | SYSMON.TESTDB4 |
TCELL18:OUT5 | SYSMON.TESTDB5 |
TCELL18:OUT6 | SYSMON.TESTDB6 |
TCELL18:OUT7 | SYSMON.TESTDB7 |
TCELL18:OUT8 | SYSMON.TESTDB8 |
TCELL18:OUT9 | SYSMON.TESTDB9 |
TCELL18:OUT10 | SYSMON.TESTDB10 |
TCELL18:OUT11 | SYSMON.TESTDB11 |
TCELL18:OUT12 | SYSMON.TESTDB12 |
TCELL18:OUT13 | SYSMON.TESTDB13 |
TCELL18:OUT14 | SYSMON.TESTDB14 |
TCELL18:OUT15 | SYSMON.TESTDB15 |
TCELL19:IMUX.CLK0 | SYSMON.TESTADCCLK2 |
TCELL19:IMUX.CLK1 | SYSMON.TESTADCCLK3 |
TCELL19:OUT0 | SYSMON.TESTADCOUT0 |
TCELL19:OUT1 | SYSMON.TESTADCOUT1 |
TCELL19:OUT2 | SYSMON.TESTADCOUT2 |
TCELL19:OUT3 | SYSMON.TESTADCOUT3 |
TCELL19:OUT4 | SYSMON.TESTADCOUT4 |
TCELL19:OUT5 | SYSMON.TESTADCOUT5 |
TCELL19:OUT6 | SYSMON.TESTADCOUT6 |
TCELL19:OUT7 | SYSMON.TESTADCOUT7 |
TCELL19:OUT8 | SYSMON.TESTADCOUT8 |
TCELL19:OUT9 | SYSMON.TESTADCOUT9 |
TCELL19:OUT10 | SYSMON.TESTADCOUT10 |
TCELL19:OUT11 | SYSMON.TESTADCOUT11 |
TCELL19:OUT12 | SYSMON.TESTADCOUT12 |
TCELL19:OUT13 | SYSMON.TESTADCOUT13 |
TCELL19:OUT14 | SYSMON.TESTADCOUT14 |
TCELL19:OUT15 | SYSMON.TESTADCOUT15 |
TCELL19:OUT16 | SYSMON.TESTADCOUT16 |
TCELL19:OUT17 | SYSMON.TESTADCOUT17 |
TCELL19:OUT18 | SYSMON.TESTADCOUT18 |
TCELL19:OUT19 | SYSMON.TESTADCOUT19 |
Bitstream
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:TCKPIN[0] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:TCKPIN[1] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:TMSPIN[1] | MISC:TMSPIN[0] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:TDIPIN[0] | MISC:TDIPIN[1] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:TDOPIN[0] | MISC:TDOPIN[1] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:BUSYPIN[0] | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:BUSYPIN[1] | MISC:M2PIN[1] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:M1PIN[1] | MISC:M2PIN[0] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:M1PIN[0] | MISC:M0PIN[1] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:M0PIN[0] |
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[15] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[14] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[12] | ~BSCAN_COMMON:USERID[13] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[11] | ~BSCAN_COMMON:USERID[10] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[8] | ~BSCAN_COMMON:USERID[9] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[7] | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[6] | ~BSCAN_COMMON:USERID[5] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[3] | ~BSCAN_COMMON:USERID[4] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[2] | ~BSCAN_COMMON:USERID[1] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[0] |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[31] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[30] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[28] | ~BSCAN_COMMON:USERID[29] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[27] | ~BSCAN_COMMON:USERID[26] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[24] | ~BSCAN_COMMON:USERID[25] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[23] | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[22] | ~BSCAN_COMMON:USERID[21] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[19] | ~BSCAN_COMMON:USERID[20] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[18] | ~BSCAN_COMMON:USERID[17] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~BSCAN_COMMON:USERID[16] |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | STARTUP:GSR_SYNC |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | STARTUP:GTS_SYNC | STARTUP:GTS_GSR_ENABLE |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ICAP_COMMON:ICAP_WIDTH[0] | STARTUP:USRCCLK_ENABLE |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ICAP_COMMON:ICAP_WIDTH[1] | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ICAP0:ENABLE | ICAP1:ENABLE |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | BSCAN2:ENABLE | BSCAN3:ENABLE |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | BSCAN1:ENABLE | BSCAN0:ENABLE |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | JTAGPPC:NUM_PPC[2] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | JTAGPPC:NUM_PPC[1] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | DCIRESET:ENABLE | JTAGPPC:NUM_PPC[0] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:DCI_CLK_ENABLE[0] | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:DCI_CLK_ENABLE[1] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:HSWAPENPIN[0] | MISC:HSWAPENPIN[1] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:INITPIN[0] | MISC:PROGPIN[0] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:DONEPIN[0] | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:CCLKPIN[0] | MISC:DINPIN[1] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:CSPIN[1] | MISC:DINPIN[0] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:CSPIN[0] | MISC:RDWRPIN[1] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | MISC:RDWRPIN[0] |
Bit | Frame |
---|
Bit | Frame | |||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[15] | - | - | - | - | - |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[14] | - | - | - | - |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[13] | - | - | - | - |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[12] | - | - | - | - | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[11] | - | - | - | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[10] | - | - | - | - |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[9] | - | - | - | - | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[8] | - | - | - | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[7] | - | SYSMON:INIT_46[7] | SYSMON:INIT_47[7] | SYSMON:INIT_46[15] | SYSMON:INIT_47[15] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[6] | - | SYSMON:INIT_45[7] | SYSMON:INIT_44[7] | SYSMON:INIT_45[15] | SYSMON:INIT_44[15] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[5] | SYSMON:INIT_42[7] | SYSMON:INIT_43[7] | SYSMON:INIT_42[15] | SYSMON:INIT_43[15] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[4] | - | SYSMON:INIT_41[7] | SYSMON:INIT_40[7] | SYSMON:INIT_41[15] | SYSMON:INIT_40[15] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[3] | - | SYSMON:INIT_46[6] | SYSMON:INIT_47[6] | SYSMON:INIT_46[14] | SYSMON:INIT_47[14] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[2] | - | SYSMON:INIT_45[6] | SYSMON:INIT_44[6] | SYSMON:INIT_45[14] | SYSMON:INIT_44[14] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[1] | SYSMON:INIT_42[6] | SYSMON:INIT_43[6] | SYSMON:INIT_42[14] | SYSMON:INIT_43[14] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[6] | SYSMON:INIT_40[6] | SYSMON:INIT_41[14] | SYSMON:INIT_40[14] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_B[0] | - | SYSMON:INIT_46[5] | SYSMON:INIT_47[5] | SYSMON:INIT_46[13] | SYSMON:INIT_47[13] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[5] | SYSMON:INIT_44[5] | SYSMON:INIT_45[13] | SYSMON:INIT_44[13] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[5] | SYSMON:INIT_43[5] | SYSMON:INIT_42[13] | SYSMON:INIT_43[13] |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[5] | SYSMON:INIT_40[5] | SYSMON:INIT_41[13] | SYSMON:INIT_40[13] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_46[4] | SYSMON:INIT_47[4] | SYSMON:INIT_46[12] | SYSMON:INIT_47[12] |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[4] | SYSMON:INIT_44[4] | SYSMON:INIT_45[12] | SYSMON:INIT_44[12] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[4] | SYSMON:INIT_43[4] | SYSMON:INIT_42[12] | SYSMON:INIT_43[12] |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[4] | SYSMON:INIT_40[4] | SYSMON:INIT_41[12] | SYSMON:INIT_40[12] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_46[3] | SYSMON:INIT_47[3] | SYSMON:INIT_46[11] | SYSMON:INIT_47[11] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[3] | SYSMON:INIT_44[3] | SYSMON:INIT_45[11] | SYSMON:INIT_44[11] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[3] | SYSMON:INIT_43[3] | SYSMON:INIT_42[11] | SYSMON:INIT_43[11] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[3] | SYSMON:INIT_40[3] | SYSMON:INIT_41[11] | SYSMON:INIT_40[11] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_46[2] | SYSMON:INIT_47[2] | SYSMON:INIT_46[10] | SYSMON:INIT_47[10] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[2] | SYSMON:INIT_44[2] | SYSMON:INIT_45[10] | SYSMON:INIT_44[10] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[2] | SYSMON:INIT_43[2] | SYSMON:INIT_42[10] | SYSMON:INIT_43[10] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[2] | SYSMON:INIT_40[2] | SYSMON:INIT_41[10] | SYSMON:INIT_40[10] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_46[1] | SYSMON:INIT_47[1] | SYSMON:INIT_46[9] | SYSMON:INIT_47[9] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[1] | SYSMON:INIT_44[1] | SYSMON:INIT_45[9] | SYSMON:INIT_44[9] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[1] | SYSMON:INIT_43[1] | SYSMON:INIT_42[9] | SYSMON:INIT_43[9] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[1] | SYSMON:INIT_40[1] | SYSMON:INIT_41[9] | SYSMON:INIT_40[9] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_46[0] | SYSMON:INIT_47[0] | SYSMON:INIT_46[8] | SYSMON:INIT_47[8] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_45[0] | SYSMON:INIT_44[0] | SYSMON:INIT_45[8] | SYSMON:INIT_44[8] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_42[0] | SYSMON:INIT_43[0] | SYSMON:INIT_42[8] | SYSMON:INIT_43[8] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_41[0] | SYSMON:INIT_40[0] | SYSMON:INIT_41[8] | SYSMON:INIT_40[8] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_4E[7] | SYSMON:INIT_4F[7] | SYSMON:INIT_4E[15] | SYSMON:INIT_4F[15] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_4D[7] | SYSMON:INIT_4C[7] | SYSMON:INIT_4D[15] | SYSMON:INIT_4C[15] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_4A[7] | SYSMON:INIT_4B[7] | SYSMON:INIT_4A[15] | SYSMON:INIT_4B[15] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:INIT_49[7] | SYSMON:INIT_48[7] | SYSMON:INIT_49[15] | SYSMON:INIT_48[15] |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[15] | - |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[14] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[13] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[12] | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[11] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[10] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[9] | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[8] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[7] | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[6] | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[5] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[4] | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[3] | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[2] | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[1] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_C[0] | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[15] | - |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[14] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[13] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[12] | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[11] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[10] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[9] | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[8] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[7] | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[6] | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[5] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[4] | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[3] | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[2] | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[1] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_D[0] | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[15] | - |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[14] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[13] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[12] | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[11] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[10] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[9] | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[8] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[7] | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[6] | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[5] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[4] | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[3] | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[2] | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[1] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | SYSMON:SYSMON_TEST_E[0] | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame |
---|
BSCAN0:ENABLE | 7.27.1 |
---|---|
BSCAN1:ENABLE | 7.26.1 |
BSCAN2:ENABLE | 7.26.2 |
BSCAN3:ENABLE | 7.27.2 |
BUFGCTRL0:I0_FABRIC_OUT | 21.0.12 |
BUFGCTRL0:I1_FABRIC_OUT | 21.2.12 |
BUFGCTRL0:INIT_OUT | 26.0.7 |
BUFGCTRL0:PRESELECT_I0 | 26.1.4 |
BUFGCTRL0:PRESELECT_I1 | 26.1.3 |
BUFGCTRL10:I0_FABRIC_OUT | 23.0.44 |
BUFGCTRL10:I1_FABRIC_OUT | 23.2.44 |
BUFGCTRL10:INIT_OUT | 26.0.47 |
BUFGCTRL10:PRESELECT_I0 | 26.1.44 |
BUFGCTRL10:PRESELECT_I1 | 26.1.43 |
BUFGCTRL11:I0_FABRIC_OUT | 23.0.60 |
BUFGCTRL11:I1_FABRIC_OUT | 23.2.60 |
BUFGCTRL11:INIT_OUT | 26.2.47 |
BUFGCTRL11:PRESELECT_I0 | 26.3.44 |
BUFGCTRL11:PRESELECT_I1 | 26.3.43 |
BUFGCTRL12:I0_FABRIC_OUT | 24.0.12 |
BUFGCTRL12:I1_FABRIC_OUT | 24.2.12 |
BUFGCTRL12:INIT_OUT | 26.0.55 |
BUFGCTRL12:PRESELECT_I0 | 26.1.52 |
BUFGCTRL12:PRESELECT_I1 | 26.1.51 |
BUFGCTRL13:I0_FABRIC_OUT | 24.0.28 |
BUFGCTRL13:I1_FABRIC_OUT | 24.2.28 |
BUFGCTRL13:INIT_OUT | 26.2.55 |
BUFGCTRL13:PRESELECT_I0 | 26.3.52 |
BUFGCTRL13:PRESELECT_I1 | 26.3.51 |
BUFGCTRL14:I0_FABRIC_OUT | 24.0.44 |
BUFGCTRL14:I1_FABRIC_OUT | 24.2.44 |
BUFGCTRL14:INIT_OUT | 26.0.63 |
BUFGCTRL14:PRESELECT_I0 | 26.1.60 |
BUFGCTRL14:PRESELECT_I1 | 26.1.59 |
BUFGCTRL15:I0_FABRIC_OUT | 24.0.60 |
BUFGCTRL15:I1_FABRIC_OUT | 24.2.60 |
BUFGCTRL15:INIT_OUT | 26.2.63 |
BUFGCTRL15:PRESELECT_I0 | 26.3.60 |
BUFGCTRL15:PRESELECT_I1 | 26.3.59 |
BUFGCTRL16:I0_FABRIC_OUT | 38.0.51 |
BUFGCTRL16:I1_FABRIC_OUT | 38.2.51 |
BUFGCTRL16:INIT_OUT | 33.0.56 |
BUFGCTRL16:PRESELECT_I0 | 33.1.59 |
BUFGCTRL16:PRESELECT_I1 | 33.1.60 |
BUFGCTRL17:I0_FABRIC_OUT | 38.0.35 |
BUFGCTRL17:I1_FABRIC_OUT | 38.2.35 |
BUFGCTRL17:INIT_OUT | 33.2.56 |
BUFGCTRL17:PRESELECT_I0 | 33.3.59 |
BUFGCTRL17:PRESELECT_I1 | 33.3.60 |
BUFGCTRL18:I0_FABRIC_OUT | 38.0.19 |
BUFGCTRL18:I1_FABRIC_OUT | 38.2.19 |
BUFGCTRL18:INIT_OUT | 33.0.48 |
BUFGCTRL18:PRESELECT_I0 | 33.1.51 |
BUFGCTRL18:PRESELECT_I1 | 33.1.52 |
BUFGCTRL19:I0_FABRIC_OUT | 38.0.3 |
BUFGCTRL19:I1_FABRIC_OUT | 38.2.3 |
BUFGCTRL19:INIT_OUT | 33.2.48 |
BUFGCTRL19:PRESELECT_I0 | 33.3.51 |
BUFGCTRL19:PRESELECT_I1 | 33.3.52 |
BUFGCTRL1:I0_FABRIC_OUT | 21.0.28 |
BUFGCTRL1:I1_FABRIC_OUT | 21.2.28 |
BUFGCTRL1:INIT_OUT | 26.2.7 |
BUFGCTRL1:PRESELECT_I0 | 26.3.4 |
BUFGCTRL1:PRESELECT_I1 | 26.3.3 |
BUFGCTRL20:I0_FABRIC_OUT | 37.0.51 |
BUFGCTRL20:I1_FABRIC_OUT | 37.2.51 |
BUFGCTRL20:INIT_OUT | 33.0.40 |
BUFGCTRL20:PRESELECT_I0 | 33.1.43 |
BUFGCTRL20:PRESELECT_I1 | 33.1.44 |
BUFGCTRL21:I0_FABRIC_OUT | 37.0.35 |
BUFGCTRL21:I1_FABRIC_OUT | 37.2.35 |
BUFGCTRL21:INIT_OUT | 33.2.40 |
BUFGCTRL21:PRESELECT_I0 | 33.3.43 |
BUFGCTRL21:PRESELECT_I1 | 33.3.44 |
BUFGCTRL22:I0_FABRIC_OUT | 37.0.19 |
BUFGCTRL22:I1_FABRIC_OUT | 37.2.19 |
BUFGCTRL22:INIT_OUT | 33.0.32 |
BUFGCTRL22:PRESELECT_I0 | 33.1.35 |
BUFGCTRL22:PRESELECT_I1 | 33.1.36 |
BUFGCTRL23:I0_FABRIC_OUT | 37.0.3 |
BUFGCTRL23:I1_FABRIC_OUT | 37.2.3 |
BUFGCTRL23:INIT_OUT | 33.2.32 |
BUFGCTRL23:PRESELECT_I0 | 33.3.35 |
BUFGCTRL23:PRESELECT_I1 | 33.3.36 |
BUFGCTRL24:I0_FABRIC_OUT | 36.0.51 |
BUFGCTRL24:I1_FABRIC_OUT | 36.2.51 |
BUFGCTRL24:INIT_OUT | 33.0.24 |
BUFGCTRL24:PRESELECT_I0 | 33.1.27 |
BUFGCTRL24:PRESELECT_I1 | 33.1.28 |
BUFGCTRL25:I0_FABRIC_OUT | 36.0.35 |
BUFGCTRL25:I1_FABRIC_OUT | 36.2.35 |
BUFGCTRL25:INIT_OUT | 33.2.24 |
BUFGCTRL25:PRESELECT_I0 | 33.3.27 |
BUFGCTRL25:PRESELECT_I1 | 33.3.28 |
BUFGCTRL26:I0_FABRIC_OUT | 36.0.19 |
BUFGCTRL26:I1_FABRIC_OUT | 36.2.19 |
BUFGCTRL26:INIT_OUT | 33.0.16 |
BUFGCTRL26:PRESELECT_I0 | 33.1.19 |
BUFGCTRL26:PRESELECT_I1 | 33.1.20 |
BUFGCTRL27:I0_FABRIC_OUT | 36.0.3 |
BUFGCTRL27:I1_FABRIC_OUT | 36.2.3 |
BUFGCTRL27:INIT_OUT | 33.2.16 |
BUFGCTRL27:PRESELECT_I0 | 33.3.19 |
BUFGCTRL27:PRESELECT_I1 | 33.3.20 |
BUFGCTRL28:I0_FABRIC_OUT | 35.0.51 |
BUFGCTRL28:I1_FABRIC_OUT | 35.2.51 |
BUFGCTRL28:INIT_OUT | 33.0.8 |
BUFGCTRL28:PRESELECT_I0 | 33.1.11 |
BUFGCTRL28:PRESELECT_I1 | 33.1.12 |
BUFGCTRL29:I0_FABRIC_OUT | 35.0.35 |
BUFGCTRL29:I1_FABRIC_OUT | 35.2.35 |
BUFGCTRL29:INIT_OUT | 33.2.8 |
BUFGCTRL29:PRESELECT_I0 | 33.3.11 |
BUFGCTRL29:PRESELECT_I1 | 33.3.12 |
BUFGCTRL2:I0_FABRIC_OUT | 21.0.44 |
BUFGCTRL2:I1_FABRIC_OUT | 21.2.44 |
BUFGCTRL2:INIT_OUT | 26.0.15 |
BUFGCTRL2:PRESELECT_I0 | 26.1.12 |
BUFGCTRL2:PRESELECT_I1 | 26.1.11 |
BUFGCTRL30:I0_FABRIC_OUT | 35.0.19 |
BUFGCTRL30:I1_FABRIC_OUT | 35.2.19 |
BUFGCTRL30:INIT_OUT | 33.0.0 |
BUFGCTRL30:PRESELECT_I0 | 33.1.3 |
BUFGCTRL30:PRESELECT_I1 | 33.1.4 |
BUFGCTRL31:I0_FABRIC_OUT | 35.0.3 |
BUFGCTRL31:I1_FABRIC_OUT | 35.2.3 |
BUFGCTRL31:INIT_OUT | 33.2.0 |
BUFGCTRL31:PRESELECT_I0 | 33.3.3 |
BUFGCTRL31:PRESELECT_I1 | 33.3.4 |
BUFGCTRL3:I0_FABRIC_OUT | 21.0.60 |
BUFGCTRL3:I1_FABRIC_OUT | 21.2.60 |
BUFGCTRL3:INIT_OUT | 26.2.15 |
BUFGCTRL3:PRESELECT_I0 | 26.3.12 |
BUFGCTRL3:PRESELECT_I1 | 26.3.11 |
BUFGCTRL4:I0_FABRIC_OUT | 22.0.12 |
BUFGCTRL4:I1_FABRIC_OUT | 22.2.12 |
BUFGCTRL4:INIT_OUT | 26.0.23 |
BUFGCTRL4:PRESELECT_I0 | 26.1.20 |
BUFGCTRL4:PRESELECT_I1 | 26.1.19 |
BUFGCTRL5:I0_FABRIC_OUT | 22.0.28 |
BUFGCTRL5:I1_FABRIC_OUT | 22.2.28 |
BUFGCTRL5:INIT_OUT | 26.2.23 |
BUFGCTRL5:PRESELECT_I0 | 26.3.20 |
BUFGCTRL5:PRESELECT_I1 | 26.3.19 |
BUFGCTRL6:I0_FABRIC_OUT | 22.0.44 |
BUFGCTRL6:I1_FABRIC_OUT | 22.2.44 |
BUFGCTRL6:INIT_OUT | 26.0.31 |
BUFGCTRL6:PRESELECT_I0 | 26.1.28 |
BUFGCTRL6:PRESELECT_I1 | 26.1.27 |
BUFGCTRL7:I0_FABRIC_OUT | 22.0.60 |
BUFGCTRL7:I1_FABRIC_OUT | 22.2.60 |
BUFGCTRL7:INIT_OUT | 26.2.31 |
BUFGCTRL7:PRESELECT_I0 | 26.3.28 |
BUFGCTRL7:PRESELECT_I1 | 26.3.27 |
BUFGCTRL8:I0_FABRIC_OUT | 23.0.12 |
BUFGCTRL8:I1_FABRIC_OUT | 23.2.12 |
BUFGCTRL8:INIT_OUT | 26.0.39 |
BUFGCTRL8:PRESELECT_I0 | 26.1.36 |
BUFGCTRL8:PRESELECT_I1 | 26.1.35 |
BUFGCTRL9:I0_FABRIC_OUT | 23.0.28 |
BUFGCTRL9:I1_FABRIC_OUT | 23.2.28 |
BUFGCTRL9:INIT_OUT | 26.2.39 |
BUFGCTRL9:PRESELECT_I0 | 26.3.36 |
BUFGCTRL9:PRESELECT_I1 | 26.3.35 |
BUFG_MGTCLK_N:BUF.MGT_L0 | 38.1.63 |
BUFG_MGTCLK_N:BUF.MGT_L1 | 38.0.63 |
BUFG_MGTCLK_N:BUF.MGT_L2 | 38.0.62 |
BUFG_MGTCLK_N:BUF.MGT_L3 | 38.1.62 |
BUFG_MGTCLK_N:BUF.MGT_L4 | 38.1.61 |
BUFG_MGTCLK_N:BUF.MGT_R0 | 38.3.63 |
BUFG_MGTCLK_N:BUF.MGT_R1 | 38.2.63 |
BUFG_MGTCLK_N:BUF.MGT_R2 | 38.2.62 |
BUFG_MGTCLK_N:BUF.MGT_R3 | 38.3.62 |
BUFG_MGTCLK_N:BUF.MGT_R4 | 38.3.61 |
BUFG_MGTCLK_S:BUF.MGT_L0 | 21.1.0 |
BUFG_MGTCLK_S:BUF.MGT_L1 | 21.0.0 |
BUFG_MGTCLK_S:BUF.MGT_L2 | 21.0.1 |
BUFG_MGTCLK_S:BUF.MGT_L3 | 21.1.1 |
BUFG_MGTCLK_S:BUF.MGT_L4 | 21.1.2 |
BUFG_MGTCLK_S:BUF.MGT_R0 | 21.3.0 |
BUFG_MGTCLK_S:BUF.MGT_R1 | 21.2.0 |
BUFG_MGTCLK_S:BUF.MGT_R2 | 21.2.1 |
BUFG_MGTCLK_S:BUF.MGT_R3 | 21.3.1 |
BUFG_MGTCLK_S:BUF.MGT_R4 | 21.3.2 |
DCIRESET:ENABLE | 8.26.8 |
ICAP0:ENABLE | 7.26.3 |
ICAP1:ENABLE | 7.27.3 |
STARTUP:GSR_SYNC | 7.27.8 |
STARTUP:GTS_GSR_ENABLE | 7.27.7 |
STARTUP:GTS_SYNC | 7.26.7 |
STARTUP:USRCCLK_ENABLE | 7.27.6 |
non-inverted | [0] |
BSCAN_COMMON:USERID | 6.27.10 | 6.27.9 | 6.27.8 | 6.26.8 | 6.26.7 | 6.27.7 | 6.27.6 | 6.26.6 | 6.26.5 | 6.26.3 | 6.27.3 | 6.27.2 | 6.26.2 | 6.26.1 | 6.27.1 | 6.27.0 | 5.27.10 | 5.27.9 | 5.27.8 | 5.26.8 | 5.26.7 | 5.27.7 | 5.27.6 | 5.26.6 | 5.26.5 | 5.26.3 | 5.27.3 | 5.27.2 | 5.26.2 | 5.26.1 | 5.27.1 | 5.27.0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
inverted | ~[31] | ~[30] | ~[29] | ~[28] | ~[27] | ~[26] | ~[25] | ~[24] | ~[23] | ~[22] | ~[21] | ~[20] | ~[19] | ~[18] | ~[17] | ~[16] | ~[15] | ~[14] | ~[13] | ~[12] | ~[11] | ~[10] | ~[9] | ~[8] | ~[7] | ~[6] | ~[5] | ~[4] | ~[3] | ~[2] | ~[1] | ~[0] |
BUFGCTRL0:CREATE_EDGE | 26.1.1 |
---|---|
BUFGCTRL0:INV.CE0 | 26.1.5 |
BUFGCTRL0:INV.CE1 | 26.1.2 |
BUFGCTRL0:INV.IGNORE0 | 26.0.5 |
BUFGCTRL0:INV.IGNORE1 | 26.0.2 |
BUFGCTRL0:INV.S0 | 26.1.7 |
BUFGCTRL0:INV.S1 | 26.1.0 |
BUFGCTRL10:CREATE_EDGE | 26.1.41 |
BUFGCTRL10:INV.CE0 | 26.1.45 |
BUFGCTRL10:INV.CE1 | 26.1.42 |
BUFGCTRL10:INV.IGNORE0 | 26.0.45 |
BUFGCTRL10:INV.IGNORE1 | 26.0.42 |
BUFGCTRL10:INV.S0 | 26.1.47 |
BUFGCTRL10:INV.S1 | 26.1.40 |
BUFGCTRL11:CREATE_EDGE | 26.3.41 |
BUFGCTRL11:INV.CE0 | 26.3.45 |
BUFGCTRL11:INV.CE1 | 26.3.42 |
BUFGCTRL11:INV.IGNORE0 | 26.2.45 |
BUFGCTRL11:INV.IGNORE1 | 26.2.42 |
BUFGCTRL11:INV.S0 | 26.3.47 |
BUFGCTRL11:INV.S1 | 26.3.40 |
BUFGCTRL12:CREATE_EDGE | 26.1.49 |
BUFGCTRL12:INV.CE0 | 26.1.53 |
BUFGCTRL12:INV.CE1 | 26.1.50 |
BUFGCTRL12:INV.IGNORE0 | 26.0.53 |
BUFGCTRL12:INV.IGNORE1 | 26.0.50 |
BUFGCTRL12:INV.S0 | 26.1.55 |
BUFGCTRL12:INV.S1 | 26.1.48 |
BUFGCTRL13:CREATE_EDGE | 26.3.49 |
BUFGCTRL13:INV.CE0 | 26.3.53 |
BUFGCTRL13:INV.CE1 | 26.3.50 |
BUFGCTRL13:INV.IGNORE0 | 26.2.53 |
BUFGCTRL13:INV.IGNORE1 | 26.2.50 |
BUFGCTRL13:INV.S0 | 26.3.55 |
BUFGCTRL13:INV.S1 | 26.3.48 |
BUFGCTRL14:CREATE_EDGE | 26.1.57 |
BUFGCTRL14:INV.CE0 | 26.1.61 |
BUFGCTRL14:INV.CE1 | 26.1.58 |
BUFGCTRL14:INV.IGNORE0 | 26.0.61 |
BUFGCTRL14:INV.IGNORE1 | 26.0.58 |
BUFGCTRL14:INV.S0 | 26.1.63 |
BUFGCTRL14:INV.S1 | 26.1.56 |
BUFGCTRL15:CREATE_EDGE | 26.3.57 |
BUFGCTRL15:INV.CE0 | 26.3.61 |
BUFGCTRL15:INV.CE1 | 26.3.58 |
BUFGCTRL15:INV.IGNORE0 | 26.2.61 |
BUFGCTRL15:INV.IGNORE1 | 26.2.58 |
BUFGCTRL15:INV.S0 | 26.3.63 |
BUFGCTRL15:INV.S1 | 26.3.56 |
BUFGCTRL16:CREATE_EDGE | 33.1.62 |
BUFGCTRL16:INV.CE0 | 33.1.58 |
BUFGCTRL16:INV.CE1 | 33.1.61 |
BUFGCTRL16:INV.IGNORE0 | 33.0.58 |
BUFGCTRL16:INV.IGNORE1 | 33.0.61 |
BUFGCTRL16:INV.S0 | 33.1.56 |
BUFGCTRL16:INV.S1 | 33.1.63 |
BUFGCTRL17:CREATE_EDGE | 33.3.62 |
BUFGCTRL17:INV.CE0 | 33.3.58 |
BUFGCTRL17:INV.CE1 | 33.3.61 |
BUFGCTRL17:INV.IGNORE0 | 33.2.58 |
BUFGCTRL17:INV.IGNORE1 | 33.2.61 |
BUFGCTRL17:INV.S0 | 33.3.56 |
BUFGCTRL17:INV.S1 | 33.3.63 |
BUFGCTRL18:CREATE_EDGE | 33.1.54 |
BUFGCTRL18:INV.CE0 | 33.1.50 |
BUFGCTRL18:INV.CE1 | 33.1.53 |
BUFGCTRL18:INV.IGNORE0 | 33.0.50 |
BUFGCTRL18:INV.IGNORE1 | 33.0.53 |
BUFGCTRL18:INV.S0 | 33.1.48 |
BUFGCTRL18:INV.S1 | 33.1.55 |
BUFGCTRL19:CREATE_EDGE | 33.3.54 |
BUFGCTRL19:INV.CE0 | 33.3.50 |
BUFGCTRL19:INV.CE1 | 33.3.53 |
BUFGCTRL19:INV.IGNORE0 | 33.2.50 |
BUFGCTRL19:INV.IGNORE1 | 33.2.53 |
BUFGCTRL19:INV.S0 | 33.3.48 |
BUFGCTRL19:INV.S1 | 33.3.55 |
BUFGCTRL1:CREATE_EDGE | 26.3.1 |
BUFGCTRL1:INV.CE0 | 26.3.5 |
BUFGCTRL1:INV.CE1 | 26.3.2 |
BUFGCTRL1:INV.IGNORE0 | 26.2.5 |
BUFGCTRL1:INV.IGNORE1 | 26.2.2 |
BUFGCTRL1:INV.S0 | 26.3.7 |
BUFGCTRL1:INV.S1 | 26.3.0 |
BUFGCTRL20:CREATE_EDGE | 33.1.46 |
BUFGCTRL20:INV.CE0 | 33.1.42 |
BUFGCTRL20:INV.CE1 | 33.1.45 |
BUFGCTRL20:INV.IGNORE0 | 33.0.42 |
BUFGCTRL20:INV.IGNORE1 | 33.0.45 |
BUFGCTRL20:INV.S0 | 33.1.40 |
BUFGCTRL20:INV.S1 | 33.1.47 |
BUFGCTRL21:CREATE_EDGE | 33.3.46 |
BUFGCTRL21:INV.CE0 | 33.3.42 |
BUFGCTRL21:INV.CE1 | 33.3.45 |
BUFGCTRL21:INV.IGNORE0 | 33.2.42 |
BUFGCTRL21:INV.IGNORE1 | 33.2.45 |
BUFGCTRL21:INV.S0 | 33.3.40 |
BUFGCTRL21:INV.S1 | 33.3.47 |
BUFGCTRL22:CREATE_EDGE | 33.1.38 |
BUFGCTRL22:INV.CE0 | 33.1.34 |
BUFGCTRL22:INV.CE1 | 33.1.37 |
BUFGCTRL22:INV.IGNORE0 | 33.0.34 |
BUFGCTRL22:INV.IGNORE1 | 33.0.37 |
BUFGCTRL22:INV.S0 | 33.1.32 |
BUFGCTRL22:INV.S1 | 33.1.39 |
BUFGCTRL23:CREATE_EDGE | 33.3.38 |
BUFGCTRL23:INV.CE0 | 33.3.34 |
BUFGCTRL23:INV.CE1 | 33.3.37 |
BUFGCTRL23:INV.IGNORE0 | 33.2.34 |
BUFGCTRL23:INV.IGNORE1 | 33.2.37 |
BUFGCTRL23:INV.S0 | 33.3.32 |
BUFGCTRL23:INV.S1 | 33.3.39 |
BUFGCTRL24:CREATE_EDGE | 33.1.30 |
BUFGCTRL24:INV.CE0 | 33.1.26 |
BUFGCTRL24:INV.CE1 | 33.1.29 |
BUFGCTRL24:INV.IGNORE0 | 33.0.26 |
BUFGCTRL24:INV.IGNORE1 | 33.0.29 |
BUFGCTRL24:INV.S0 | 33.1.24 |
BUFGCTRL24:INV.S1 | 33.1.31 |
BUFGCTRL25:CREATE_EDGE | 33.3.30 |
BUFGCTRL25:INV.CE0 | 33.3.26 |
BUFGCTRL25:INV.CE1 | 33.3.29 |
BUFGCTRL25:INV.IGNORE0 | 33.2.26 |
BUFGCTRL25:INV.IGNORE1 | 33.2.29 |
BUFGCTRL25:INV.S0 | 33.3.24 |
BUFGCTRL25:INV.S1 | 33.3.31 |
BUFGCTRL26:CREATE_EDGE | 33.1.22 |
BUFGCTRL26:INV.CE0 | 33.1.18 |
BUFGCTRL26:INV.CE1 | 33.1.21 |
BUFGCTRL26:INV.IGNORE0 | 33.0.18 |
BUFGCTRL26:INV.IGNORE1 | 33.0.21 |
BUFGCTRL26:INV.S0 | 33.1.16 |
BUFGCTRL26:INV.S1 | 33.1.23 |
BUFGCTRL27:CREATE_EDGE | 33.3.22 |
BUFGCTRL27:INV.CE0 | 33.3.18 |
BUFGCTRL27:INV.CE1 | 33.3.21 |
BUFGCTRL27:INV.IGNORE0 | 33.2.18 |
BUFGCTRL27:INV.IGNORE1 | 33.2.21 |
BUFGCTRL27:INV.S0 | 33.3.16 |
BUFGCTRL27:INV.S1 | 33.3.23 |
BUFGCTRL28:CREATE_EDGE | 33.1.14 |
BUFGCTRL28:INV.CE0 | 33.1.10 |
BUFGCTRL28:INV.CE1 | 33.1.13 |
BUFGCTRL28:INV.IGNORE0 | 33.0.10 |
BUFGCTRL28:INV.IGNORE1 | 33.0.13 |
BUFGCTRL28:INV.S0 | 33.1.8 |
BUFGCTRL28:INV.S1 | 33.1.15 |
BUFGCTRL29:CREATE_EDGE | 33.3.14 |
BUFGCTRL29:INV.CE0 | 33.3.10 |
BUFGCTRL29:INV.CE1 | 33.3.13 |
BUFGCTRL29:INV.IGNORE0 | 33.2.10 |
BUFGCTRL29:INV.IGNORE1 | 33.2.13 |
BUFGCTRL29:INV.S0 | 33.3.8 |
BUFGCTRL29:INV.S1 | 33.3.15 |
BUFGCTRL2:CREATE_EDGE | 26.1.9 |
BUFGCTRL2:INV.CE0 | 26.1.13 |
BUFGCTRL2:INV.CE1 | 26.1.10 |
BUFGCTRL2:INV.IGNORE0 | 26.0.13 |
BUFGCTRL2:INV.IGNORE1 | 26.0.10 |
BUFGCTRL2:INV.S0 | 26.1.15 |
BUFGCTRL2:INV.S1 | 26.1.8 |
BUFGCTRL30:CREATE_EDGE | 33.1.6 |
BUFGCTRL30:INV.CE0 | 33.1.2 |
BUFGCTRL30:INV.CE1 | 33.1.5 |
BUFGCTRL30:INV.IGNORE0 | 33.0.2 |
BUFGCTRL30:INV.IGNORE1 | 33.0.5 |
BUFGCTRL30:INV.S0 | 33.1.0 |
BUFGCTRL30:INV.S1 | 33.1.7 |
BUFGCTRL31:CREATE_EDGE | 33.3.6 |
BUFGCTRL31:INV.CE0 | 33.3.2 |
BUFGCTRL31:INV.CE1 | 33.3.5 |
BUFGCTRL31:INV.IGNORE0 | 33.2.2 |
BUFGCTRL31:INV.IGNORE1 | 33.2.5 |
BUFGCTRL31:INV.S0 | 33.3.0 |
BUFGCTRL31:INV.S1 | 33.3.7 |
BUFGCTRL3:CREATE_EDGE | 26.3.9 |
BUFGCTRL3:INV.CE0 | 26.3.13 |
BUFGCTRL3:INV.CE1 | 26.3.10 |
BUFGCTRL3:INV.IGNORE0 | 26.2.13 |
BUFGCTRL3:INV.IGNORE1 | 26.2.10 |
BUFGCTRL3:INV.S0 | 26.3.15 |
BUFGCTRL3:INV.S1 | 26.3.8 |
BUFGCTRL4:CREATE_EDGE | 26.1.17 |
BUFGCTRL4:INV.CE0 | 26.1.21 |
BUFGCTRL4:INV.CE1 | 26.1.18 |
BUFGCTRL4:INV.IGNORE0 | 26.0.21 |
BUFGCTRL4:INV.IGNORE1 | 26.0.18 |
BUFGCTRL4:INV.S0 | 26.1.23 |
BUFGCTRL4:INV.S1 | 26.1.16 |
BUFGCTRL5:CREATE_EDGE | 26.3.17 |
BUFGCTRL5:INV.CE0 | 26.3.21 |
BUFGCTRL5:INV.CE1 | 26.3.18 |
BUFGCTRL5:INV.IGNORE0 | 26.2.21 |
BUFGCTRL5:INV.IGNORE1 | 26.2.18 |
BUFGCTRL5:INV.S0 | 26.3.23 |
BUFGCTRL5:INV.S1 | 26.3.16 |
BUFGCTRL6:CREATE_EDGE | 26.1.25 |
BUFGCTRL6:INV.CE0 | 26.1.29 |
BUFGCTRL6:INV.CE1 | 26.1.26 |
BUFGCTRL6:INV.IGNORE0 | 26.0.29 |
BUFGCTRL6:INV.IGNORE1 | 26.0.26 |
BUFGCTRL6:INV.S0 | 26.1.31 |
BUFGCTRL6:INV.S1 | 26.1.24 |
BUFGCTRL7:CREATE_EDGE | 26.3.25 |
BUFGCTRL7:INV.CE0 | 26.3.29 |
BUFGCTRL7:INV.CE1 | 26.3.26 |
BUFGCTRL7:INV.IGNORE0 | 26.2.29 |
BUFGCTRL7:INV.IGNORE1 | 26.2.26 |
BUFGCTRL7:INV.S0 | 26.3.31 |
BUFGCTRL7:INV.S1 | 26.3.24 |
BUFGCTRL8:CREATE_EDGE | 26.1.33 |
BUFGCTRL8:INV.CE0 | 26.1.37 |
BUFGCTRL8:INV.CE1 | 26.1.34 |
BUFGCTRL8:INV.IGNORE0 | 26.0.37 |
BUFGCTRL8:INV.IGNORE1 | 26.0.34 |
BUFGCTRL8:INV.S0 | 26.1.39 |
BUFGCTRL8:INV.S1 | 26.1.32 |
BUFGCTRL9:CREATE_EDGE | 26.3.33 |
BUFGCTRL9:INV.CE0 | 26.3.37 |
BUFGCTRL9:INV.CE1 | 26.3.34 |
BUFGCTRL9:INV.IGNORE0 | 26.2.37 |
BUFGCTRL9:INV.IGNORE1 | 26.2.34 |
BUFGCTRL9:INV.S0 | 26.3.39 |
BUFGCTRL9:INV.S1 | 26.3.32 |
SYSMON:INV.CONVSTCLK | 12.26.48 |
SYSMON:INV.DCLK | 12.27.47 |
inverted | ~[0] |
BUFGCTRL0:MUX.I0 | 21.0.2 | 21.0.3 | 21.1.3 | 21.1.4 | 21.0.5 | 21.1.8 | 21.0.7 | 21.1.6 | 21.0.9 | 21.1.10 | 21.0.8 | 21.1.9 | 21.0.13 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
BUFGCTRL0:MUX.I1 | 21.2.2 | 21.2.3 | 21.3.3 | 21.3.4 | 21.2.5 | 21.3.8 | 21.2.7 | 21.3.6 | 21.2.9 | 21.3.10 | 21.2.8 | 21.3.9 | 21.2.13 |
BUFGCTRL10:MUX.I0 | 23.0.34 | 23.0.35 | 23.1.35 | 23.1.36 | 23.0.37 | 23.1.40 | 23.0.39 | 23.1.38 | 23.0.41 | 23.1.42 | 23.0.40 | 23.1.41 | 23.0.45 |
BUFGCTRL10:MUX.I1 | 23.2.34 | 23.2.35 | 23.3.35 | 23.3.36 | 23.2.37 | 23.3.40 | 23.2.39 | 23.3.38 | 23.2.41 | 23.3.42 | 23.2.40 | 23.3.41 | 23.2.45 |
BUFGCTRL11:MUX.I0 | 23.0.50 | 23.0.51 | 23.1.51 | 23.1.52 | 23.0.53 | 23.1.56 | 23.0.55 | 23.1.54 | 23.0.57 | 23.1.58 | 23.0.56 | 23.1.57 | 23.0.61 |
BUFGCTRL11:MUX.I1 | 23.2.50 | 23.2.51 | 23.3.51 | 23.3.52 | 23.2.53 | 23.3.56 | 23.2.55 | 23.3.54 | 23.2.57 | 23.3.58 | 23.2.56 | 23.3.57 | 23.2.61 |
BUFGCTRL12:MUX.I0 | 24.0.2 | 24.0.3 | 24.1.3 | 24.1.4 | 24.0.5 | 24.1.8 | 24.0.7 | 24.1.6 | 24.0.9 | 24.1.10 | 24.0.8 | 24.1.9 | 24.0.13 |
BUFGCTRL12:MUX.I1 | 24.2.2 | 24.2.3 | 24.3.3 | 24.3.4 | 24.2.5 | 24.3.8 | 24.2.7 | 24.3.6 | 24.2.9 | 24.3.10 | 24.2.8 | 24.3.9 | 24.2.13 |
BUFGCTRL13:MUX.I0 | 24.0.18 | 24.0.19 | 24.1.19 | 24.1.20 | 24.0.21 | 24.1.24 | 24.0.23 | 24.1.22 | 24.0.25 | 24.1.26 | 24.0.24 | 24.1.25 | 24.0.29 |
BUFGCTRL13:MUX.I1 | 24.2.18 | 24.2.19 | 24.3.19 | 24.3.20 | 24.2.21 | 24.3.24 | 24.2.23 | 24.3.22 | 24.2.25 | 24.3.26 | 24.2.24 | 24.3.25 | 24.2.29 |
BUFGCTRL14:MUX.I0 | 24.0.34 | 24.0.35 | 24.1.35 | 24.1.36 | 24.0.37 | 24.1.40 | 24.0.39 | 24.1.38 | 24.0.41 | 24.1.42 | 24.0.40 | 24.1.41 | 24.0.45 |
BUFGCTRL14:MUX.I1 | 24.2.34 | 24.2.35 | 24.3.35 | 24.3.36 | 24.2.37 | 24.3.40 | 24.2.39 | 24.3.38 | 24.2.41 | 24.3.42 | 24.2.40 | 24.3.41 | 24.2.45 |
BUFGCTRL15:MUX.I0 | 24.0.50 | 24.0.51 | 24.1.51 | 24.1.52 | 24.0.53 | 24.1.56 | 24.0.55 | 24.1.54 | 24.0.57 | 24.1.58 | 24.0.56 | 24.1.57 | 24.0.61 |
BUFGCTRL15:MUX.I1 | 24.2.50 | 24.2.51 | 24.3.51 | 24.3.52 | 24.2.53 | 24.3.56 | 24.2.55 | 24.3.54 | 24.2.57 | 24.3.58 | 24.2.56 | 24.3.57 | 24.2.61 |
BUFGCTRL16:MUX.I0 | 38.0.61 | 38.0.60 | 38.1.60 | 38.1.59 | 38.0.58 | 38.1.55 | 38.0.56 | 38.1.57 | 38.0.54 | 38.1.53 | 38.0.55 | 38.1.54 | 38.0.50 |
BUFGCTRL16:MUX.I1 | 38.2.61 | 38.2.60 | 38.3.60 | 38.3.59 | 38.2.58 | 38.3.55 | 38.2.56 | 38.3.57 | 38.2.54 | 38.3.53 | 38.2.55 | 38.3.54 | 38.2.50 |
BUFGCTRL17:MUX.I0 | 38.0.45 | 38.0.44 | 38.1.44 | 38.1.43 | 38.0.42 | 38.1.39 | 38.0.40 | 38.1.41 | 38.0.38 | 38.1.37 | 38.0.39 | 38.1.38 | 38.0.34 |
BUFGCTRL17:MUX.I1 | 38.2.45 | 38.2.44 | 38.3.44 | 38.3.43 | 38.2.42 | 38.3.39 | 38.2.40 | 38.3.41 | 38.2.38 | 38.3.37 | 38.2.39 | 38.3.38 | 38.2.34 |
BUFGCTRL18:MUX.I0 | 38.0.29 | 38.0.28 | 38.1.28 | 38.1.27 | 38.0.26 | 38.1.23 | 38.0.24 | 38.1.25 | 38.0.22 | 38.1.21 | 38.0.23 | 38.1.22 | 38.0.18 |
BUFGCTRL18:MUX.I1 | 38.2.29 | 38.2.28 | 38.3.28 | 38.3.27 | 38.2.26 | 38.3.23 | 38.2.24 | 38.3.25 | 38.2.22 | 38.3.21 | 38.2.23 | 38.3.22 | 38.2.18 |
BUFGCTRL19:MUX.I0 | 38.0.13 | 38.0.12 | 38.1.12 | 38.1.11 | 38.0.10 | 38.1.7 | 38.0.8 | 38.1.9 | 38.0.6 | 38.1.5 | 38.0.7 | 38.1.6 | 38.0.2 |
BUFGCTRL19:MUX.I1 | 38.2.13 | 38.2.12 | 38.3.12 | 38.3.11 | 38.2.10 | 38.3.7 | 38.2.8 | 38.3.9 | 38.2.6 | 38.3.5 | 38.2.7 | 38.3.6 | 38.2.2 |
BUFGCTRL1:MUX.I0 | 21.0.18 | 21.0.19 | 21.1.19 | 21.1.20 | 21.0.21 | 21.1.24 | 21.0.23 | 21.1.22 | 21.0.25 | 21.1.26 | 21.0.24 | 21.1.25 | 21.0.29 |
BUFGCTRL1:MUX.I1 | 21.2.18 | 21.2.19 | 21.3.19 | 21.3.20 | 21.2.21 | 21.3.24 | 21.2.23 | 21.3.22 | 21.2.25 | 21.3.26 | 21.2.24 | 21.3.25 | 21.2.29 |
BUFGCTRL20:MUX.I0 | 37.0.61 | 37.0.60 | 37.1.60 | 37.1.59 | 37.0.58 | 37.1.55 | 37.0.56 | 37.1.57 | 37.0.54 | 37.1.53 | 37.0.55 | 37.1.54 | 37.0.50 |
BUFGCTRL20:MUX.I1 | 37.2.61 | 37.2.60 | 37.3.60 | 37.3.59 | 37.2.58 | 37.3.55 | 37.2.56 | 37.3.57 | 37.2.54 | 37.3.53 | 37.2.55 | 37.3.54 | 37.2.50 |
BUFGCTRL21:MUX.I0 | 37.0.45 | 37.0.44 | 37.1.44 | 37.1.43 | 37.0.42 | 37.1.39 | 37.0.40 | 37.1.41 | 37.0.38 | 37.1.37 | 37.0.39 | 37.1.38 | 37.0.34 |
BUFGCTRL21:MUX.I1 | 37.2.45 | 37.2.44 | 37.3.44 | 37.3.43 | 37.2.42 | 37.3.39 | 37.2.40 | 37.3.41 | 37.2.38 | 37.3.37 | 37.2.39 | 37.3.38 | 37.2.34 |
BUFGCTRL22:MUX.I0 | 37.0.29 | 37.0.28 | 37.1.28 | 37.1.27 | 37.0.26 | 37.1.23 | 37.0.24 | 37.1.25 | 37.0.22 | 37.1.21 | 37.0.23 | 37.1.22 | 37.0.18 |
BUFGCTRL22:MUX.I1 | 37.2.29 | 37.2.28 | 37.3.28 | 37.3.27 | 37.2.26 | 37.3.23 | 37.2.24 | 37.3.25 | 37.2.22 | 37.3.21 | 37.2.23 | 37.3.22 | 37.2.18 |
BUFGCTRL23:MUX.I0 | 37.0.13 | 37.0.12 | 37.1.12 | 37.1.11 | 37.0.10 | 37.1.7 | 37.0.8 | 37.1.9 | 37.0.6 | 37.1.5 | 37.0.7 | 37.1.6 | 37.0.2 |
BUFGCTRL23:MUX.I1 | 37.2.13 | 37.2.12 | 37.3.12 | 37.3.11 | 37.2.10 | 37.3.7 | 37.2.8 | 37.3.9 | 37.2.6 | 37.3.5 | 37.2.7 | 37.3.6 | 37.2.2 |
BUFGCTRL24:MUX.I0 | 36.0.61 | 36.0.60 | 36.1.60 | 36.1.59 | 36.0.58 | 36.1.55 | 36.0.56 | 36.1.57 | 36.0.54 | 36.1.53 | 36.0.55 | 36.1.54 | 36.0.50 |
BUFGCTRL24:MUX.I1 | 36.2.61 | 36.2.60 | 36.3.60 | 36.3.59 | 36.2.58 | 36.3.55 | 36.2.56 | 36.3.57 | 36.2.54 | 36.3.53 | 36.2.55 | 36.3.54 | 36.2.50 |
BUFGCTRL25:MUX.I0 | 36.0.45 | 36.0.44 | 36.1.44 | 36.1.43 | 36.0.42 | 36.1.39 | 36.0.40 | 36.1.41 | 36.0.38 | 36.1.37 | 36.0.39 | 36.1.38 | 36.0.34 |
BUFGCTRL25:MUX.I1 | 36.2.45 | 36.2.44 | 36.3.44 | 36.3.43 | 36.2.42 | 36.3.39 | 36.2.40 | 36.3.41 | 36.2.38 | 36.3.37 | 36.2.39 | 36.3.38 | 36.2.34 |
BUFGCTRL26:MUX.I0 | 36.0.29 | 36.0.28 | 36.1.28 | 36.1.27 | 36.0.26 | 36.1.23 | 36.0.24 | 36.1.25 | 36.0.22 | 36.1.21 | 36.0.23 | 36.1.22 | 36.0.18 |
BUFGCTRL26:MUX.I1 | 36.2.29 | 36.2.28 | 36.3.28 | 36.3.27 | 36.2.26 | 36.3.23 | 36.2.24 | 36.3.25 | 36.2.22 | 36.3.21 | 36.2.23 | 36.3.22 | 36.2.18 |
BUFGCTRL27:MUX.I0 | 36.0.13 | 36.0.12 | 36.1.12 | 36.1.11 | 36.0.10 | 36.1.7 | 36.0.8 | 36.1.9 | 36.0.6 | 36.1.5 | 36.0.7 | 36.1.6 | 36.0.2 |
BUFGCTRL27:MUX.I1 | 36.2.13 | 36.2.12 | 36.3.12 | 36.3.11 | 36.2.10 | 36.3.7 | 36.2.8 | 36.3.9 | 36.2.6 | 36.3.5 | 36.2.7 | 36.3.6 | 36.2.2 |
BUFGCTRL28:MUX.I0 | 35.0.61 | 35.0.60 | 35.1.60 | 35.1.59 | 35.0.58 | 35.1.55 | 35.0.56 | 35.1.57 | 35.0.54 | 35.1.53 | 35.0.55 | 35.1.54 | 35.0.50 |
BUFGCTRL28:MUX.I1 | 35.2.61 | 35.2.60 | 35.3.60 | 35.3.59 | 35.2.58 | 35.3.55 | 35.2.56 | 35.3.57 | 35.2.54 | 35.3.53 | 35.2.55 | 35.3.54 | 35.2.50 |
BUFGCTRL29:MUX.I0 | 35.0.45 | 35.0.44 | 35.1.44 | 35.1.43 | 35.0.42 | 35.1.39 | 35.0.40 | 35.1.41 | 35.0.38 | 35.1.37 | 35.0.39 | 35.1.38 | 35.0.34 |
BUFGCTRL29:MUX.I1 | 35.2.45 | 35.2.44 | 35.3.44 | 35.3.43 | 35.2.42 | 35.3.39 | 35.2.40 | 35.3.41 | 35.2.38 | 35.3.37 | 35.2.39 | 35.3.38 | 35.2.34 |
BUFGCTRL2:MUX.I0 | 21.0.34 | 21.0.35 | 21.1.35 | 21.1.36 | 21.0.37 | 21.1.40 | 21.0.39 | 21.1.38 | 21.0.41 | 21.1.42 | 21.0.40 | 21.1.41 | 21.0.45 |
BUFGCTRL2:MUX.I1 | 21.2.34 | 21.2.35 | 21.3.35 | 21.3.36 | 21.2.37 | 21.3.40 | 21.2.39 | 21.3.38 | 21.2.41 | 21.3.42 | 21.2.40 | 21.3.41 | 21.2.45 |
BUFGCTRL30:MUX.I0 | 35.0.29 | 35.0.28 | 35.1.28 | 35.1.27 | 35.0.26 | 35.1.23 | 35.0.24 | 35.1.25 | 35.0.22 | 35.1.21 | 35.0.23 | 35.1.22 | 35.0.18 |
BUFGCTRL30:MUX.I1 | 35.2.29 | 35.2.28 | 35.3.28 | 35.3.27 | 35.2.26 | 35.3.23 | 35.2.24 | 35.3.25 | 35.2.22 | 35.3.21 | 35.2.23 | 35.3.22 | 35.2.18 |
BUFGCTRL31:MUX.I0 | 35.0.13 | 35.0.12 | 35.1.12 | 35.1.11 | 35.0.10 | 35.1.7 | 35.0.8 | 35.1.9 | 35.0.6 | 35.1.5 | 35.0.7 | 35.1.6 | 35.0.2 |
BUFGCTRL31:MUX.I1 | 35.2.13 | 35.2.12 | 35.3.12 | 35.3.11 | 35.2.10 | 35.3.7 | 35.2.8 | 35.3.9 | 35.2.6 | 35.3.5 | 35.2.7 | 35.3.6 | 35.2.2 |
BUFGCTRL3:MUX.I0 | 21.0.50 | 21.0.51 | 21.1.51 | 21.1.52 | 21.0.53 | 21.1.56 | 21.0.55 | 21.1.54 | 21.0.57 | 21.1.58 | 21.0.56 | 21.1.57 | 21.0.61 |
BUFGCTRL3:MUX.I1 | 21.2.50 | 21.2.51 | 21.3.51 | 21.3.52 | 21.2.53 | 21.3.56 | 21.2.55 | 21.3.54 | 21.2.57 | 21.3.58 | 21.2.56 | 21.3.57 | 21.2.61 |
BUFGCTRL4:MUX.I0 | 22.0.2 | 22.0.3 | 22.1.3 | 22.1.4 | 22.0.5 | 22.1.8 | 22.0.7 | 22.1.6 | 22.0.9 | 22.1.10 | 22.0.8 | 22.1.9 | 22.0.13 |
BUFGCTRL4:MUX.I1 | 22.2.2 | 22.2.3 | 22.3.3 | 22.3.4 | 22.2.5 | 22.3.8 | 22.2.7 | 22.3.6 | 22.2.9 | 22.3.10 | 22.2.8 | 22.3.9 | 22.2.13 |
BUFGCTRL5:MUX.I0 | 22.0.18 | 22.0.19 | 22.1.19 | 22.1.20 | 22.0.21 | 22.1.24 | 22.0.23 | 22.1.22 | 22.0.25 | 22.1.26 | 22.0.24 | 22.1.25 | 22.0.29 |
BUFGCTRL5:MUX.I1 | 22.2.18 | 22.2.19 | 22.3.19 | 22.3.20 | 22.2.21 | 22.3.24 | 22.2.23 | 22.3.22 | 22.2.25 | 22.3.26 | 22.2.24 | 22.3.25 | 22.2.29 |
BUFGCTRL6:MUX.I0 | 22.0.34 | 22.0.35 | 22.1.35 | 22.1.36 | 22.0.37 | 22.1.40 | 22.0.39 | 22.1.38 | 22.0.41 | 22.1.42 | 22.0.40 | 22.1.41 | 22.0.45 |
BUFGCTRL6:MUX.I1 | 22.2.34 | 22.2.35 | 22.3.35 | 22.3.36 | 22.2.37 | 22.3.40 | 22.2.39 | 22.3.38 | 22.2.41 | 22.3.42 | 22.2.40 | 22.3.41 | 22.2.45 |
BUFGCTRL7:MUX.I0 | 22.0.50 | 22.0.51 | 22.1.51 | 22.1.52 | 22.0.53 | 22.1.56 | 22.0.55 | 22.1.54 | 22.0.57 | 22.1.58 | 22.0.56 | 22.1.57 | 22.0.61 |
BUFGCTRL7:MUX.I1 | 22.2.50 | 22.2.51 | 22.3.51 | 22.3.52 | 22.2.53 | 22.3.56 | 22.2.55 | 22.3.54 | 22.2.57 | 22.3.58 | 22.2.56 | 22.3.57 | 22.2.61 |
BUFGCTRL8:MUX.I0 | 23.0.2 | 23.0.3 | 23.1.3 | 23.1.4 | 23.0.5 | 23.1.8 | 23.0.7 | 23.1.6 | 23.0.9 | 23.1.10 | 23.0.8 | 23.1.9 | 23.0.13 |
BUFGCTRL8:MUX.I1 | 23.2.2 | 23.2.3 | 23.3.3 | 23.3.4 | 23.2.5 | 23.3.8 | 23.2.7 | 23.3.6 | 23.2.9 | 23.3.10 | 23.2.8 | 23.3.9 | 23.2.13 |
BUFGCTRL9:MUX.I0 | 23.0.18 | 23.0.19 | 23.1.19 | 23.1.20 | 23.0.21 | 23.1.24 | 23.0.23 | 23.1.22 | 23.0.25 | 23.1.26 | 23.0.24 | 23.1.25 | 23.0.29 |
BUFGCTRL9:MUX.I1 | 23.2.18 | 23.2.19 | 23.3.19 | 23.3.20 | 23.2.21 | 23.3.24 | 23.2.23 | 23.3.22 | 23.2.25 | 23.3.26 | 23.2.24 | 23.3.25 | 23.2.29 |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
MUXBUS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CKINT0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
GFB2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 |
GFB10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
MGT_L2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 |
CKINT1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB9 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_L1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |
GFB0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_L0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
MGT_R0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB3 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB11 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_L3 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
MGT_R1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB12 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_L4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
MGT_R2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB5 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB13 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_R3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB14 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
MGT_R4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
GFB7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
GFB15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
ICAP_COMMON:ICAP_WIDTH | 7.26.5 | 7.26.6 |
---|---|---|
X32 | 0 | 0 |
X8 | 0 | 1 |
X16 | 1 | 0 |
JTAGPPC:NUM_PPC | 8.27.10 | 8.27.9 | 8.27.8 |
---|---|---|---|
0 | 0 | 0 | 0 |
1 | 0 | 0 | 1 |
2 | 0 | 1 | 0 |
3 | 0 | 1 | 1 |
4 | 1 | 0 | 0 |
MISC:BUSYPIN | 0.26.3 | 0.26.5 |
---|---|---|
MISC:CSPIN | 10.26.2 | 10.26.1 |
MISC:DINPIN | 10.27.3 | 10.27.2 |
MISC:HSWAPENPIN | 10.27.7 | 10.26.7 |
MISC:M0PIN | 0.27.1 | 0.27.0 |
MISC:M1PIN | 0.26.2 | 0.26.1 |
MISC:M2PIN | 0.27.3 | 0.27.2 |
MISC:RDWRPIN | 10.27.1 | 10.27.0 |
MISC:TCKPIN | 0.27.9 | 0.27.10 |
MISC:TDIPIN | 0.27.7 | 0.26.7 |
MISC:TDOPIN | 0.27.6 | 0.26.6 |
MISC:TMSPIN | 0.26.8 | 0.27.8 |
PULLUP | 0 | 0 |
PULLNONE | 0 | 1 |
PULLDOWN | 1 | 1 |
MISC:CCLKPIN | 10.26.3 |
---|---|
MISC:DONEPIN | 10.26.5 |
MISC:INITPIN | 10.26.6 |
MISC:PROGPIN | 10.27.6 |
PULLUP | 0 |
PULLNONE | 1 |
MISC:DCI_CLK_ENABLE | 9.27.1 | 9.26.2 |
---|---|---|
non-inverted | [1] | [0] |
SYSMON:INIT_40 | 13.31.32 | 13.31.28 | 13.31.24 | 13.31.20 | 13.31.16 | 13.31.12 | 13.31.8 | 13.31.4 | 13.29.32 | 13.29.28 | 13.29.24 | 13.29.20 | 13.29.16 | 13.29.12 | 13.29.8 | 13.29.4 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
SYSMON:INIT_41 | 13.30.32 | 13.30.28 | 13.30.24 | 13.30.20 | 13.30.16 | 13.30.12 | 13.30.8 | 13.30.4 | 13.28.32 | 13.28.28 | 13.28.24 | 13.28.20 | 13.28.16 | 13.28.12 | 13.28.8 | 13.28.4 |
SYSMON:INIT_42 | 13.30.33 | 13.30.29 | 13.30.25 | 13.30.21 | 13.30.17 | 13.30.13 | 13.30.9 | 13.30.5 | 13.28.33 | 13.28.29 | 13.28.25 | 13.28.21 | 13.28.17 | 13.28.13 | 13.28.9 | 13.28.5 |
SYSMON:INIT_43 | 13.31.33 | 13.31.29 | 13.31.25 | 13.31.21 | 13.31.17 | 13.31.13 | 13.31.9 | 13.31.5 | 13.29.33 | 13.29.29 | 13.29.25 | 13.29.21 | 13.29.17 | 13.29.13 | 13.29.9 | 13.29.5 |
SYSMON:INIT_44 | 13.31.34 | 13.31.30 | 13.31.26 | 13.31.22 | 13.31.18 | 13.31.14 | 13.31.10 | 13.31.6 | 13.29.34 | 13.29.30 | 13.29.26 | 13.29.22 | 13.29.18 | 13.29.14 | 13.29.10 | 13.29.6 |
SYSMON:INIT_45 | 13.30.34 | 13.30.30 | 13.30.26 | 13.30.22 | 13.30.18 | 13.30.14 | 13.30.10 | 13.30.6 | 13.28.34 | 13.28.30 | 13.28.26 | 13.28.22 | 13.28.18 | 13.28.14 | 13.28.10 | 13.28.6 |
SYSMON:INIT_46 | 13.30.35 | 13.30.31 | 13.30.27 | 13.30.23 | 13.30.19 | 13.30.15 | 13.30.11 | 13.30.7 | 13.28.35 | 13.28.31 | 13.28.27 | 13.28.23 | 13.28.19 | 13.28.15 | 13.28.11 | 13.28.7 |
SYSMON:INIT_47 | 13.31.35 | 13.31.31 | 13.31.27 | 13.31.23 | 13.31.19 | 13.31.15 | 13.31.11 | 13.31.7 | 13.29.35 | 13.29.31 | 13.29.27 | 13.29.23 | 13.29.19 | 13.29.15 | 13.29.11 | 13.29.7 |
SYSMON:INIT_48 | 13.31.0 | 12.31.60 | 12.31.56 | 12.31.52 | 12.31.48 | 12.31.44 | 12.31.40 | 12.31.36 | 13.29.0 | 12.29.60 | 12.29.56 | 12.29.52 | 12.29.48 | 12.29.44 | 12.29.40 | 12.29.36 |
SYSMON:INIT_49 | 13.30.0 | 12.30.60 | 12.30.56 | 12.30.52 | 12.30.48 | 12.30.44 | 12.30.40 | 12.30.36 | 13.28.0 | 12.28.60 | 12.28.56 | 12.28.52 | 12.28.48 | 12.28.44 | 12.28.40 | 12.28.36 |
SYSMON:INIT_4A | 13.30.1 | 12.30.61 | 12.30.57 | 12.30.53 | 12.30.49 | 12.30.45 | 12.30.41 | 12.30.37 | 13.28.1 | 12.28.61 | 12.28.57 | 12.28.53 | 12.28.49 | 12.28.45 | 12.28.41 | 12.28.37 |
SYSMON:INIT_4B | 13.31.1 | 12.31.61 | 12.31.57 | 12.31.53 | 12.31.49 | 12.31.45 | 12.31.41 | 12.31.37 | 13.29.1 | 12.29.61 | 12.29.57 | 12.29.53 | 12.29.49 | 12.29.45 | 12.29.41 | 12.29.37 |
SYSMON:INIT_4C | 13.31.2 | 12.31.62 | 12.31.58 | 12.31.54 | 12.31.50 | 12.31.46 | 12.31.42 | 12.31.38 | 13.29.2 | 12.29.62 | 12.29.58 | 12.29.54 | 12.29.50 | 12.29.46 | 12.29.42 | 12.29.38 |
SYSMON:INIT_4D | 13.30.2 | 12.30.62 | 12.30.58 | 12.30.54 | 12.30.50 | 12.30.46 | 12.30.42 | 12.30.38 | 13.28.2 | 12.28.62 | 12.28.58 | 12.28.54 | 12.28.50 | 12.28.46 | 12.28.42 | 12.28.38 |
SYSMON:INIT_4E | 13.30.3 | 12.30.63 | 12.30.59 | 12.30.55 | 12.30.51 | 12.30.47 | 12.30.43 | 12.30.39 | 13.28.3 | 12.28.63 | 12.28.59 | 12.28.55 | 12.28.51 | 12.28.47 | 12.28.43 | 12.28.39 |
SYSMON:INIT_4F | 13.31.3 | 12.31.63 | 12.31.59 | 12.31.55 | 12.31.51 | 12.31.47 | 12.31.43 | 12.31.39 | 13.29.3 | 12.29.63 | 12.29.59 | 12.29.55 | 12.29.51 | 12.29.47 | 12.29.43 | 12.29.39 |
SYSMON:INIT_50 | 12.31.32 | 12.31.28 | 12.31.24 | 12.31.20 | 12.31.16 | 12.31.12 | 12.31.8 | 12.31.4 | 12.29.32 | 12.29.28 | 12.29.24 | 12.29.20 | 12.29.16 | 12.29.12 | 12.29.8 | 12.29.4 |
SYSMON:INIT_51 | 12.30.32 | 12.30.28 | 12.30.24 | 12.30.20 | 12.30.16 | 12.30.12 | 12.30.8 | 12.30.4 | 12.28.32 | 12.28.28 | 12.28.24 | 12.28.20 | 12.28.16 | 12.28.12 | 12.28.8 | 12.28.4 |
SYSMON:INIT_52 | 12.30.33 | 12.30.29 | 12.30.25 | 12.30.21 | 12.30.17 | 12.30.13 | 12.30.9 | 12.30.5 | 12.28.33 | 12.28.29 | 12.28.25 | 12.28.21 | 12.28.17 | 12.28.13 | 12.28.9 | 12.28.5 |
SYSMON:INIT_53 | 12.31.33 | 12.31.29 | 12.31.25 | 12.31.21 | 12.31.17 | 12.31.13 | 12.31.9 | 12.31.5 | 12.29.33 | 12.29.29 | 12.29.25 | 12.29.21 | 12.29.17 | 12.29.13 | 12.29.9 | 12.29.5 |
SYSMON:INIT_54 | 12.31.34 | 12.31.30 | 12.31.26 | 12.31.22 | 12.31.18 | 12.31.14 | 12.31.10 | 12.31.6 | 12.29.34 | 12.29.30 | 12.29.26 | 12.29.22 | 12.29.18 | 12.29.14 | 12.29.10 | 12.29.6 |
SYSMON:INIT_55 | 12.30.34 | 12.30.30 | 12.30.26 | 12.30.22 | 12.30.18 | 12.30.14 | 12.30.10 | 12.30.6 | 12.28.34 | 12.28.30 | 12.28.26 | 12.28.22 | 12.28.18 | 12.28.14 | 12.28.10 | 12.28.6 |
SYSMON:INIT_56 | 12.30.35 | 12.30.31 | 12.30.27 | 12.30.23 | 12.30.19 | 12.30.15 | 12.30.11 | 12.30.7 | 12.28.35 | 12.28.31 | 12.28.27 | 12.28.23 | 12.28.19 | 12.28.15 | 12.28.11 | 12.28.7 |
SYSMON:INIT_57 | 12.31.35 | 12.31.31 | 12.31.27 | 12.31.23 | 12.31.19 | 12.31.15 | 12.31.11 | 12.31.7 | 12.29.35 | 12.29.31 | 12.29.27 | 12.29.23 | 12.29.19 | 12.29.15 | 12.29.11 | 12.29.7 |
SYSMON:SYSMON_TEST_A | 12.26.46 | 12.27.45 | 12.27.43 | 12.26.42 | 12.27.41 | 12.27.39 | 12.26.37 | 12.27.36 | 12.26.35 | 12.26.34 | 12.27.33 | 12.26.32 | 12.26.31 | 12.26.30 | 12.27.29 | 12.26.27 |
SYSMON:SYSMON_TEST_B | 13.26.46 | 13.27.45 | 13.27.43 | 13.26.42 | 13.27.41 | 13.27.39 | 13.26.37 | 13.27.36 | 13.26.35 | 13.26.34 | 13.27.33 | 13.26.32 | 13.26.31 | 13.26.30 | 13.27.29 | 13.26.27 |
SYSMON:SYSMON_TEST_C | 14.26.46 | 14.27.45 | 14.27.43 | 14.26.42 | 14.27.41 | 14.27.39 | 14.26.37 | 14.27.36 | 14.26.35 | 14.26.34 | 14.27.33 | 14.26.32 | 14.26.31 | 14.26.30 | 14.27.29 | 14.26.27 |
SYSMON:SYSMON_TEST_D | 18.26.46 | 18.27.45 | 18.27.43 | 18.26.42 | 18.27.41 | 18.27.39 | 18.26.37 | 18.27.36 | 18.26.35 | 18.26.34 | 18.27.33 | 18.26.32 | 18.26.31 | 18.26.30 | 18.27.29 | 18.26.27 |
SYSMON:SYSMON_TEST_E | 19.26.46 | 19.27.45 | 19.27.43 | 19.26.42 | 19.27.41 | 19.27.39 | 19.26.37 | 19.27.36 | 19.26.35 | 19.26.34 | 19.27.33 | 19.26.32 | 19.26.31 | 19.26.30 | 19.27.29 | 19.26.27 |
non-inverted | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |