GTP transceivers

TODO: document

Tile GTP

Cells: 20

Bel GTP_DUAL

virtex5 GTP bel GTP_DUAL
Pin	Direction	Wires
DADDR0	input	CELL10.IMUX.IMUX32.DELAY
DADDR1	input	CELL10.IMUX.IMUX31.DELAY
DADDR2	input	CELL10.IMUX.IMUX24.DELAY
DADDR3	input	CELL9.IMUX.IMUX29.DELAY
DADDR4	input	CELL9.IMUX.IMUX28.DELAY
DADDR5	input	CELL9.IMUX.IMUX27.DELAY
DADDR6	input	CELL9.IMUX.IMUX26.DELAY
DCLK	input	CELL7.IMUX.CLK1
DEN	input	CELL10.IMUX.IMUX39.DELAY
DI0	input	CELL11.IMUX.IMUX3.DELAY
DI1	input	CELL11.IMUX.IMUX2.DELAY
DI10	input	CELL9.IMUX.IMUX43.DELAY
DI11	input	CELL9.IMUX.IMUX42.DELAY
DI12	input	CELL8.IMUX.IMUX47.DELAY
DI13	input	CELL8.IMUX.IMUX46.DELAY
DI14	input	CELL8.IMUX.IMUX45.DELAY
DI15	input	CELL8.IMUX.IMUX44.DELAY
DI2	input	CELL11.IMUX.IMUX1.DELAY
DI3	input	CELL11.IMUX.IMUX0.DELAY
DI4	input	CELL10.IMUX.IMUX3.DELAY
DI5	input	CELL10.IMUX.IMUX2.DELAY
DI6	input	CELL10.IMUX.IMUX1.DELAY
DI7	input	CELL10.IMUX.IMUX0.DELAY
DI8	input	CELL9.IMUX.IMUX45.DELAY
DI9	input	CELL9.IMUX.IMUX44.DELAY
DO0	output	CELL11.OUT21.TMIN
DO1	output	CELL11.OUT17.TMIN
DO10	output	CELL9.OUT20.TMIN
DO11	output	CELL9.OUT10.TMIN
DO12	output	CELL8.OUT13.TMIN
DO13	output	CELL8.OUT18.TMIN
DO14	output	CELL8.OUT12.TMIN
DO15	output	CELL8.OUT8.TMIN
DO2	output	CELL11.OUT15.TMIN
DO3	output	CELL11.OUT14.TMIN
DO4	output	CELL10.OUT10.TMIN
DO5	output	CELL10.OUT9.TMIN
DO6	output	CELL10.OUT0.TMIN
DO7	output	CELL10.OUT12.TMIN
DO8	output	CELL9.OUT21.TMIN
DO9	output	CELL9.OUT6.TMIN
DRDY	output	CELL9.OUT15.TMIN
DWE	input	CELL9.IMUX.IMUX19.DELAY
GREFCLK	input	CELL12.IMUX.CLK0
GTPRESET	input	CELL11.IMUX.IMUX36.DELAY
GTPTEST0	input	CELL0.IMUX.IMUX13.DELAY
GTPTEST1	input	CELL19.IMUX.IMUX27.DELAY
GTPTEST2	input	CELL9.IMUX.IMUX16.DELAY
GTPTEST3	input	CELL9.IMUX.IMUX17.DELAY
INTDATAWIDTH	input	CELL10.IMUX.IMUX6.DELAY
LOOPBACK00	input	CELL12.IMUX.IMUX15.DELAY
LOOPBACK01	input	CELL12.IMUX.IMUX16.DELAY
LOOPBACK02	input	CELL12.IMUX.IMUX17.DELAY
LOOPBACK10	input	CELL7.IMUX.IMUX20.DELAY
LOOPBACK11	input	CELL7.IMUX.IMUX19.DELAY
LOOPBACK12	input	CELL7.IMUX.IMUX18.DELAY
PHYSTATUS0	output	CELL15.OUT12.TMIN
PHYSTATUS1	output	CELL4.OUT17.TMIN
PLLLKDET	output	CELL9.OUT23.TMIN
PLLLKDETEN	input	CELL9.IMUX.IMUX8.DELAY
PLLPOWERDOWN	input	CELL10.IMUX.IMUX36.DELAY
PMAAMUX0	input	CELL9.IMUX.IMUX3.DELAY
PMAAMUX1	input	CELL9.IMUX.IMUX4.DELAY
PMAAMUX2	input	CELL9.IMUX.IMUX5.DELAY
PMATSTCLK	output	CELL10.OUT22.TMIN
PMATSTCLKSEL0	input	CELL10.IMUX.IMUX14.DELAY
PMATSTCLKSEL1	input	CELL10.IMUX.IMUX13.DELAY
PMATSTCLKSEL2	input	CELL10.IMUX.IMUX12.DELAY
PRBSCNTRESET0	input	CELL11.IMUX.IMUX45.DELAY
PRBSCNTRESET1	input	CELL8.IMUX.IMUX2.DELAY
REFCLKOUT	output	CELL10.OUT8.TMIN
REFCLKPWRDNB	input	CELL9.IMUX.IMUX18.DELAY
RESETDONE0	output	CELL15.OUT7.TMIN
RESETDONE1	output	CELL4.OUT0.TMIN
RXBUFRESET0	input	CELL12.IMUX.IMUX43.DELAY
RXBUFRESET1	input	CELL7.IMUX.IMUX4.DELAY
RXBUFSTATUS00	output	CELL15.OUT1.TMIN
RXBUFSTATUS01	output	CELL15.OUT13.TMIN
RXBUFSTATUS02	output	CELL15.OUT14.TMIN
RXBUFSTATUS10	output	CELL4.OUT6.TMIN
RXBUFSTATUS11	output	CELL4.OUT16.TMIN
RXBUFSTATUS12	output	CELL4.OUT19.TMIN
RXBYTEISALIGNED0	output	CELL14.OUT7.TMIN
RXBYTEISALIGNED1	output	CELL5.OUT0.TMIN
RXBYTEREALIGN0	output	CELL14.OUT15.TMIN
RXBYTEREALIGN1	output	CELL5.OUT18.TMIN
RXCDRRESET0	input	CELL12.IMUX.IMUX47.DELAY
RXCDRRESET1	input	CELL7.IMUX.IMUX0.DELAY
RXCHANBONDSEQ0	output	CELL12.OUT1.TMIN
RXCHANBONDSEQ1	output	CELL7.OUT6.TMIN
RXCHANISALIGNED0	output	CELL12.OUT15.TMIN
RXCHANISALIGNED1	output	CELL7.OUT18.TMIN
RXCHANREALIGN0	output	CELL12.OUT3.TMIN
RXCHANREALIGN1	output	CELL7.OUT4.TMIN
RXCHARISCOMMA00	output	CELL14.OUT12.TMIN
RXCHARISCOMMA01	output	CELL13.OUT12.TMIN
RXCHARISCOMMA10	output	CELL5.OUT17.TMIN
RXCHARISCOMMA11	output	CELL6.OUT17.TMIN
RXCHARISK00	output	CELL14.OUT13.TMIN
RXCHARISK01	output	CELL13.OUT13.TMIN
RXCHARISK10	output	CELL5.OUT16.TMIN
RXCHARISK11	output	CELL6.OUT16.TMIN
RXCHBONDI00	input	CELL13.IMUX.IMUX44.DELAY
RXCHBONDI01	input	CELL13.IMUX.IMUX45.DELAY
RXCHBONDI02	input	CELL13.IMUX.IMUX46.DELAY
RXCHBONDI10	input	CELL6.IMUX.IMUX3.DELAY
RXCHBONDI11	input	CELL6.IMUX.IMUX2.DELAY
RXCHBONDI12	input	CELL6.IMUX.IMUX1.DELAY
RXCHBONDO00	output	CELL12.OUT14.TMIN
RXCHBONDO01	output	CELL12.OUT7.TMIN
RXCHBONDO02	output	CELL12.OUT21.TMIN
RXCHBONDO10	output	CELL7.OUT19.TMIN
RXCHBONDO11	output	CELL7.OUT0.TMIN
RXCHBONDO12	output	CELL7.OUT8.TMIN
RXCLKCORCNT00	output	CELL16.OUT5.TMIN
RXCLKCORCNT01	output	CELL16.OUT23.TMIN
RXCLKCORCNT02	output	CELL16.OUT20.TMIN
RXCLKCORCNT10	output	CELL3.OUT2.TMIN
RXCLKCORCNT11	output	CELL3.OUT10.TMIN
RXCLKCORCNT12	output	CELL3.OUT9.TMIN
RXCOMMADET0	output	CELL14.OUT21.TMIN
RXCOMMADET1	output	CELL5.OUT8.TMIN
RXCOMMADETUSE0	input	CELL15.IMUX.IMUX30.DELAY
RXCOMMADETUSE1	input	CELL4.IMUX.IMUX17.DELAY
RXDATA00	output	CELL15.OUT20.TMIN
RXDATA01	output	CELL15.OUT23.TMIN
RXDATA010	output	CELL13.OUT5.TMIN
RXDATA011	output	CELL13.OUT22.TMIN
RXDATA012	output	CELL12.OUT20.TMIN
RXDATA013	output	CELL12.OUT23.TMIN
RXDATA014	output	CELL12.OUT5.TMIN
RXDATA015	output	CELL12.OUT22.TMIN
RXDATA02	output	CELL15.OUT5.TMIN
RXDATA03	output	CELL15.OUT22.TMIN
RXDATA04	output	CELL14.OUT20.TMIN
RXDATA05	output	CELL14.OUT23.TMIN
RXDATA06	output	CELL14.OUT5.TMIN
RXDATA07	output	CELL14.OUT22.TMIN
RXDATA08	output	CELL13.OUT20.TMIN
RXDATA09	output	CELL13.OUT23.TMIN
RXDATA10	output	CELL4.OUT9.TMIN
RXDATA11	output	CELL4.OUT10.TMIN
RXDATA110	output	CELL6.OUT2.TMIN
RXDATA111	output	CELL6.OUT11.TMIN
RXDATA112	output	CELL7.OUT9.TMIN
RXDATA113	output	CELL7.OUT10.TMIN
RXDATA114	output	CELL7.OUT2.TMIN
RXDATA115	output	CELL7.OUT11.TMIN
RXDATA12	output	CELL4.OUT2.TMIN
RXDATA13	output	CELL4.OUT11.TMIN
RXDATA14	output	CELL5.OUT9.TMIN
RXDATA15	output	CELL5.OUT10.TMIN
RXDATA16	output	CELL5.OUT2.TMIN
RXDATA17	output	CELL5.OUT11.TMIN
RXDATA18	output	CELL6.OUT9.TMIN
RXDATA19	output	CELL6.OUT10.TMIN
RXDATAWIDTH0	input	CELL15.IMUX.IMUX37.DELAY
RXDATAWIDTH1	input	CELL4.IMUX.IMUX10.DELAY
RXDEC8B10BUSE0	input	CELL13.IMUX.IMUX41.DELAY
RXDEC8B10BUSE1	input	CELL6.IMUX.IMUX6.DELAY
RXDISPERR00	output	CELL14.OUT14.TMIN
RXDISPERR01	output	CELL13.OUT14.TMIN
RXDISPERR10	output	CELL5.OUT19.TMIN
RXDISPERR11	output	CELL6.OUT19.TMIN
RXELECIDLE0	output	CELL17.OUT5.TMIN
RXELECIDLE1	output	CELL2.OUT2.TMIN
RXELECIDLERESET0	input	CELL19.IMUX.IMUX28.DELAY
RXELECIDLERESET1	input	CELL0.IMUX.IMUX12.DELAY
RXENCHANSYNC0	input	CELL13.IMUX.IMUX23.DELAY
RXENCHANSYNC1	input	CELL6.IMUX.IMUX24.DELAY
RXENELECIDLERESETB	input	CELL10.IMUX.IMUX33.DELAY
RXENEQB0	input	CELL15.IMUX.IMUX42.DELAY
RXENEQB1	input	CELL4.IMUX.IMUX5.DELAY
RXENMCOMMAALIGN0	input	CELL15.IMUX.IMUX45.DELAY
RXENMCOMMAALIGN1	input	CELL4.IMUX.IMUX2.DELAY
RXENPCOMMAALIGN0	input	CELL15.IMUX.IMUX46.DELAY
RXENPCOMMAALIGN1	input	CELL4.IMUX.IMUX1.DELAY
RXENPRBSTST00	input	CELL15.IMUX.IMUX28.DELAY
RXENPRBSTST01	input	CELL15.IMUX.IMUX29.DELAY
RXENPRBSTST10	input	CELL4.IMUX.IMUX25.DELAY
RXENPRBSTST11	input	CELL4.IMUX.IMUX24.DELAY
RXENSAMPLEALIGN0	input	CELL15.IMUX.IMUX14.DELAY
RXENSAMPLEALIGN1	input	CELL4.IMUX.IMUX33.DELAY
RXEQMIX00	input	CELL14.IMUX.IMUX46.DELAY
RXEQMIX01	input	CELL14.IMUX.IMUX47.DELAY
RXEQMIX10	input	CELL5.IMUX.IMUX1.DELAY
RXEQMIX11	input	CELL5.IMUX.IMUX0.DELAY
RXEQPOLE00	input	CELL14.IMUX.IMUX42.DELAY
RXEQPOLE01	input	CELL14.IMUX.IMUX43.DELAY
RXEQPOLE02	input	CELL14.IMUX.IMUX44.DELAY
RXEQPOLE03	input	CELL14.IMUX.IMUX45.DELAY
RXEQPOLE10	input	CELL5.IMUX.IMUX5.DELAY
RXEQPOLE11	input	CELL5.IMUX.IMUX4.DELAY
RXEQPOLE12	input	CELL5.IMUX.IMUX3.DELAY
RXEQPOLE13	input	CELL5.IMUX.IMUX2.DELAY
RXLOSSOFSYNC00	output	CELL13.OUT11.TMIN
RXLOSSOFSYNC01	output	CELL13.OUT21.TMIN
RXLOSSOFSYNC10	output	CELL6.OUT22.TMIN
RXLOSSOFSYNC11	output	CELL6.OUT8.TMIN
RXNOTINTABLE00	output	CELL14.OUT3.TMIN
RXNOTINTABLE01	output	CELL13.OUT3.TMIN
RXNOTINTABLE10	output	CELL5.OUT4.TMIN
RXNOTINTABLE11	output	CELL6.OUT4.TMIN
RXOVERSAMPLEERR0	output	CELL15.OUT3.TMIN
RXOVERSAMPLEERR1	output	CELL4.OUT4.TMIN
RXPMASETPHASE0	input	CELL12.IMUX.IMUX7.DELAY
RXPMASETPHASE1	input	CELL7.IMUX.IMUX40.DELAY
RXPOLARITY0	input	CELL15.IMUX.IMUX41.DELAY
RXPOLARITY1	input	CELL4.IMUX.IMUX0.DELAY
RXPOWERDOWN00	input	CELL12.IMUX.IMUX38.DELAY
RXPOWERDOWN01	input	CELL12.IMUX.IMUX39.DELAY
RXPOWERDOWN10	input	CELL7.IMUX.IMUX9.DELAY
RXPOWERDOWN11	input	CELL7.IMUX.IMUX8.DELAY
RXPRBSERR0	output	CELL16.OUT22.TMIN
RXPRBSERR1	output	CELL3.OUT11.TMIN
RXRECCLK0	output	CELL12.OUT13.TMIN
RXRECCLK1	output	CELL7.OUT20.TMIN
RXRESET0	input	CELL12.IMUX.IMUX42.DELAY
RXRESET1	input	CELL7.IMUX.IMUX5.DELAY
RXRUNDISP00	output	CELL14.OUT1.TMIN
RXRUNDISP01	output	CELL13.OUT1.TMIN
RXRUNDISP10	output	CELL5.OUT6.TMIN
RXRUNDISP11	output	CELL6.OUT6.TMIN
RXSLIDE0	input	CELL15.IMUX.IMUX44.DELAY
RXSLIDE1	input	CELL4.IMUX.IMUX3.DELAY
RXSTATUS00	output	CELL16.OUT14.TMIN
RXSTATUS01	output	CELL16.OUT7.TMIN
RXSTATUS02	output	CELL16.OUT21.TMIN
RXSTATUS10	output	CELL3.OUT19.TMIN
RXSTATUS11	output	CELL3.OUT0.TMIN
RXSTATUS12	output	CELL3.OUT8.TMIN
RXUSRCLK0	input	CELL10.IMUX.CLK0
RXUSRCLK1	input	CELL9.IMUX.CLK1
RXUSRCLK20	input	CELL10.IMUX.CLK1
RXUSRCLK21	input	CELL9.IMUX.CLK0
RXVALID0	output	CELL13.OUT7.TMIN
RXVALID1	output	CELL6.OUT0.TMIN
SCANEN	input	CELL19.IMUX.IMUX17.DELAY
SCANIN	input	CELL19.IMUX.IMUX47.DELAY
SCANMODE	input	CELL0.IMUX.IMUX36.DELAY
SCANOUT	output	CELL0.OUT8.TMIN
TSTPWRDN00	input	CELL13.IMUX.IMUX31.DELAY
TSTPWRDN01	input	CELL13.IMUX.IMUX32.DELAY
TSTPWRDN02	input	CELL13.IMUX.IMUX33.DELAY
TSTPWRDN03	input	CELL13.IMUX.IMUX34.DELAY
TSTPWRDN04	input	CELL13.IMUX.IMUX35.DELAY
TSTPWRDN10	input	CELL6.IMUX.IMUX16.DELAY
TSTPWRDN11	input	CELL6.IMUX.IMUX15.DELAY
TSTPWRDN12	input	CELL6.IMUX.IMUX14.DELAY
TSTPWRDN13	input	CELL6.IMUX.IMUX13.DELAY
TSTPWRDN14	input	CELL6.IMUX.IMUX12.DELAY
TSTPWRDNOVRD0	input	CELL18.IMUX.IMUX30.DELAY
TSTPWRDNOVRD1	input	CELL1.IMUX.IMUX47.DELAY
TXBUFDIFFCTRL00	input	CELL19.IMUX.IMUX30.DELAY
TXBUFDIFFCTRL01	input	CELL19.IMUX.IMUX31.DELAY
TXBUFDIFFCTRL02	input	CELL19.IMUX.IMUX32.DELAY
TXBUFDIFFCTRL10	input	CELL0.IMUX.IMUX17.DELAY
TXBUFDIFFCTRL11	input	CELL0.IMUX.IMUX16.DELAY
TXBUFDIFFCTRL12	input	CELL0.IMUX.IMUX15.DELAY
TXBUFSTATUS00	output	CELL18.OUT0.TMIN
TXBUFSTATUS01	output	CELL18.OUT23.TMIN
TXBUFSTATUS10	output	CELL1.OUT2.TMIN
TXBUFSTATUS11	output	CELL1.OUT10.TMIN
TXBYPASS8B10B00	input	CELL18.IMUX.IMUX29.DELAY
TXBYPASS8B10B01	input	CELL17.IMUX.IMUX29.DELAY
TXBYPASS8B10B10	input	CELL1.IMUX.IMUX12.DELAY
TXBYPASS8B10B11	input	CELL2.IMUX.IMUX24.DELAY
TXCHARDISPMODE00	input	CELL18.IMUX.IMUX27.DELAY
TXCHARDISPMODE01	input	CELL17.IMUX.IMUX27.DELAY
TXCHARDISPMODE10	input	CELL1.IMUX.IMUX8.DELAY
TXCHARDISPMODE11	input	CELL2.IMUX.IMUX20.DELAY
TXCHARDISPVAL00	input	CELL18.IMUX.IMUX26.DELAY
TXCHARDISPVAL01	input	CELL17.IMUX.IMUX26.DELAY
TXCHARDISPVAL10	input	CELL1.IMUX.IMUX21.DELAY
TXCHARDISPVAL11	input	CELL2.IMUX.IMUX21.DELAY
TXCHARISK00	input	CELL18.IMUX.IMUX46.DELAY
TXCHARISK01	input	CELL17.IMUX.IMUX28.DELAY
TXCHARISK10	input	CELL1.IMUX.IMUX1.DELAY
TXCHARISK11	input	CELL2.IMUX.IMUX25.DELAY
TXCOMSTART0	input	CELL18.IMUX.IMUX4.DELAY
TXCOMSTART1	input	CELL1.IMUX.IMUX37.DELAY
TXCOMTYPE0	input	CELL18.IMUX.IMUX5.DELAY
TXCOMTYPE1	input	CELL1.IMUX.IMUX0.DELAY
TXDATA00	input	CELL19.IMUX.IMUX45.DELAY
TXDATA01	input	CELL19.IMUX.IMUX44.DELAY
TXDATA010	input	CELL17.IMUX.IMUX43.DELAY
TXDATA011	input	CELL17.IMUX.IMUX42.DELAY
TXDATA012	input	CELL16.IMUX.IMUX45.DELAY
TXDATA013	input	CELL16.IMUX.IMUX44.DELAY
TXDATA014	input	CELL16.IMUX.IMUX43.DELAY
TXDATA015	input	CELL16.IMUX.IMUX42.DELAY
TXDATA02	input	CELL19.IMUX.IMUX43.DELAY
TXDATA03	input	CELL19.IMUX.IMUX42.DELAY
TXDATA04	input	CELL18.IMUX.IMUX45.DELAY
TXDATA05	input	CELL18.IMUX.IMUX44.DELAY
TXDATA06	input	CELL18.IMUX.IMUX43.DELAY
TXDATA07	input	CELL18.IMUX.IMUX42.DELAY
TXDATA08	input	CELL17.IMUX.IMUX45.DELAY
TXDATA09	input	CELL17.IMUX.IMUX44.DELAY
TXDATA10	input	CELL0.IMUX.IMUX32.DELAY
TXDATA11	input	CELL0.IMUX.IMUX33.DELAY
TXDATA110	input	CELL2.IMUX.IMUX34.DELAY
TXDATA111	input	CELL2.IMUX.IMUX35.DELAY
TXDATA112	input	CELL3.IMUX.IMUX32.DELAY
TXDATA113	input	CELL3.IMUX.IMUX33.DELAY
TXDATA114	input	CELL3.IMUX.IMUX34.DELAY
TXDATA115	input	CELL3.IMUX.IMUX35.DELAY
TXDATA12	input	CELL0.IMUX.IMUX34.DELAY
TXDATA13	input	CELL0.IMUX.IMUX35.DELAY
TXDATA14	input	CELL1.IMUX.IMUX32.DELAY
TXDATA15	input	CELL1.IMUX.IMUX33.DELAY
TXDATA16	input	CELL1.IMUX.IMUX34.DELAY
TXDATA17	input	CELL1.IMUX.IMUX35.DELAY
TXDATA18	input	CELL2.IMUX.IMUX32.DELAY
TXDATA19	input	CELL2.IMUX.IMUX33.DELAY
TXDATAWIDTH0	input	CELL16.IMUX.IMUX31.DELAY
TXDATAWIDTH1	input	CELL3.IMUX.IMUX4.DELAY
TXDETECTRX0	input	CELL19.IMUX.IMUX19.DELAY
TXDETECTRX1	input	CELL0.IMUX.IMUX47.DELAY
TXDIFFCTRL00	input	CELL19.IMUX.IMUX33.DELAY
TXDIFFCTRL01	input	CELL19.IMUX.IMUX34.DELAY
TXDIFFCTRL02	input	CELL19.IMUX.IMUX35.DELAY
TXDIFFCTRL10	input	CELL0.IMUX.IMUX8.DELAY
TXDIFFCTRL11	input	CELL0.IMUX.IMUX7.DELAY
TXDIFFCTRL12	input	CELL0.IMUX.IMUX6.DELAY
TXELECIDLE0	input	CELL19.IMUX.IMUX18.DELAY
TXELECIDLE1	input	CELL0.IMUX.IMUX4.DELAY
TXENC8B10BUSE0	input	CELL16.IMUX.IMUX30.DELAY
TXENC8B10BUSE1	input	CELL3.IMUX.IMUX47.DELAY
TXENPMAPHASEALIGN	input	CELL10.IMUX.IMUX16.DELAY
TXENPRBSTST00	input	CELL18.IMUX.IMUX24.DELAY
TXENPRBSTST01	input	CELL18.IMUX.IMUX25.DELAY
TXENPRBSTST10	input	CELL1.IMUX.IMUX11.DELAY
TXENPRBSTST11	input	CELL1.IMUX.IMUX10.DELAY
TXINHIBIT0	input	CELL16.IMUX.IMUX28.DELAY
TXINHIBIT1	input	CELL3.IMUX.IMUX1.DELAY
TXKERR00	output	CELL18.OUT5.TMIN
TXKERR01	output	CELL17.OUT18.TMIN
TXKERR10	output	CELL1.OUT7.TMIN
TXKERR11	output	CELL2.OUT15.TMIN
TXOUTCLK0	output	CELL10.OUT13.TMIN
TXOUTCLK1	output	CELL9.OUT2.TMIN
TXPMASETPHASE	input	CELL10.IMUX.IMUX17.DELAY
TXPOLARITY0	input	CELL17.IMUX.IMUX15.DELAY
TXPOLARITY1	input	CELL2.IMUX.IMUX2.DELAY
TXPOWERDOWN00	input	CELL17.IMUX.IMUX10.DELAY
TXPOWERDOWN01	input	CELL17.IMUX.IMUX11.DELAY
TXPOWERDOWN10	input	CELL2.IMUX.IMUX43.DELAY
TXPOWERDOWN11	input	CELL2.IMUX.IMUX42.DELAY
TXPREEMPHASIS00	input	CELL18.IMUX.IMUX15.DELAY
TXPREEMPHASIS01	input	CELL18.IMUX.IMUX16.DELAY
TXPREEMPHASIS02	input	CELL18.IMUX.IMUX17.DELAY
TXPREEMPHASIS10	input	CELL1.IMUX.IMUX26.DELAY
TXPREEMPHASIS11	input	CELL1.IMUX.IMUX25.DELAY
TXPREEMPHASIS12	input	CELL1.IMUX.IMUX24.DELAY
TXRESET0	input	CELL16.IMUX.IMUX47.DELAY
TXRESET1	input	CELL3.IMUX.IMUX0.DELAY
TXRUNDISP00	output	CELL18.OUT22.TMIN
TXRUNDISP01	output	CELL17.OUT2.TMIN
TXRUNDISP10	output	CELL1.OUT11.TMIN
TXRUNDISP11	output	CELL2.OUT5.TMIN
TXUSRCLK0	input	CELL11.IMUX.CLK0
TXUSRCLK1	input	CELL8.IMUX.CLK1
TXUSRCLK20	input	CELL11.IMUX.CLK1
TXUSRCLK21	input	CELL8.IMUX.CLK0

Bel BUFDS0

virtex5 GTP bel BUFDS0
Pin	Direction	Wires

Bel CRC32_0

virtex5 GTP bel CRC32_0
Pin	Direction	Wires
CRCCLK	input	CELL1.IMUX.CLK1
CRCDATAVALID	input	CELL3.IMUX.IMUX22.DELAY
CRCDATAWIDTH0	input	CELL3.IMUX.IMUX40.DELAY
CRCDATAWIDTH1	input	CELL3.IMUX.IMUX23.DELAY
CRCDATAWIDTH2	input	CELL3.IMUX.IMUX21.DELAY
CRCIN0	input	CELL3.IMUX.IMUX17.DELAY
CRCIN1	input	CELL3.IMUX.IMUX16.DELAY
CRCIN10	input	CELL2.IMUX.IMUX15.DELAY
CRCIN11	input	CELL2.IMUX.IMUX14.DELAY
CRCIN12	input	CELL2.IMUX.IMUX13.DELAY
CRCIN13	input	CELL2.IMUX.IMUX12.DELAY
CRCIN14	input	CELL2.IMUX.IMUX37.DELAY
CRCIN15	input	CELL2.IMUX.IMUX36.DELAY
CRCIN16	input	CELL1.IMUX.IMUX23.DELAY
CRCIN17	input	CELL1.IMUX.IMUX22.DELAY
CRCIN18	input	CELL1.IMUX.IMUX45.DELAY
CRCIN19	input	CELL1.IMUX.IMUX44.DELAY
CRCIN2	input	CELL3.IMUX.IMUX15.DELAY
CRCIN20	input	CELL1.IMUX.IMUX43.DELAY
CRCIN21	input	CELL1.IMUX.IMUX42.DELAY
CRCIN22	input	CELL1.IMUX.IMUX19.DELAY
CRCIN23	input	CELL1.IMUX.IMUX18.DELAY
CRCIN24	input	CELL0.IMUX.IMUX23.DELAY
CRCIN25	input	CELL0.IMUX.IMUX22.DELAY
CRCIN26	input	CELL0.IMUX.IMUX21.DELAY
CRCIN27	input	CELL0.IMUX.IMUX20.DELAY
CRCIN28	input	CELL0.IMUX.IMUX25.DELAY
CRCIN29	input	CELL0.IMUX.IMUX24.DELAY
CRCIN3	input	CELL3.IMUX.IMUX14.DELAY
CRCIN30	input	CELL0.IMUX.IMUX43.DELAY
CRCIN31	input	CELL0.IMUX.IMUX42.DELAY
CRCIN4	input	CELL3.IMUX.IMUX13.DELAY
CRCIN5	input	CELL3.IMUX.IMUX12.DELAY
CRCIN6	input	CELL3.IMUX.IMUX37.DELAY
CRCIN7	input	CELL3.IMUX.IMUX36.DELAY
CRCIN8	input	CELL2.IMUX.IMUX17.DELAY
CRCIN9	input	CELL2.IMUX.IMUX16.DELAY
CRCOUT0	output	CELL3.OUT6.TMIN
CRCOUT1	output	CELL3.OUT4.TMIN
CRCOUT10	output	CELL2.OUT22.TMIN
CRCOUT11	output	CELL2.OUT12.TMIN
CRCOUT12	output	CELL1.OUT17.TMIN
CRCOUT13	output	CELL1.OUT16.TMIN
CRCOUT14	output	CELL1.OUT23.TMIN
CRCOUT15	output	CELL1.OUT13.TMIN
CRCOUT16	output	CELL1.OUT5.TMIN
CRCOUT17	output	CELL1.OUT1.TMIN
CRCOUT18	output	CELL1.OUT22.TMIN
CRCOUT19	output	CELL1.OUT12.TMIN
CRCOUT2	output	CELL3.OUT18.TMIN
CRCOUT20	output	CELL0.OUT21.TMIN
CRCOUT21	output	CELL0.OUT15.TMIN
CRCOUT22	output	CELL0.OUT7.TMIN
CRCOUT23	output	CELL0.OUT3.TMIN
CRCOUT24	output	CELL0.OUT20.TMIN
CRCOUT25	output	CELL0.OUT14.TMIN
CRCOUT26	output	CELL0.OUT23.TMIN
CRCOUT27	output	CELL0.OUT13.TMIN
CRCOUT28	output	CELL0.OUT5.TMIN
CRCOUT29	output	CELL0.OUT1.TMIN
CRCOUT3	output	CELL2.OUT21.TMIN
CRCOUT30	output	CELL0.OUT22.TMIN
CRCOUT31	output	CELL0.OUT4.TMIN
CRCOUT4	output	CELL2.OUT6.TMIN
CRCOUT5	output	CELL2.OUT20.TMIN
CRCOUT6	output	CELL2.OUT14.TMIN
CRCOUT7	output	CELL2.OUT23.TMIN
CRCOUT8	output	CELL2.OUT13.TMIN
CRCOUT9	output	CELL2.OUT1.TMIN
CRCRESET	input	CELL2.IMUX.IMUX5.DELAY

Bel CRC32_1

virtex5 GTP bel CRC32_1
Pin	Direction	Wires
CRCCLK	input	CELL6.IMUX.CLK1
CRCDATAVALID	input	CELL8.IMUX.IMUX35.DELAY
CRCDATAWIDTH0	input	CELL8.IMUX.IMUX11.DELAY
CRCDATAWIDTH1	input	CELL8.IMUX.IMUX34.DELAY
CRCDATAWIDTH2	input	CELL3.IMUX.IMUX21.DELAY
CRCIN0	input	CELL7.IMUX.IMUX47.DELAY
CRCIN1	input	CELL7.IMUX.IMUX46.DELAY
CRCIN10	input	CELL6.IMUX.IMUX45.DELAY
CRCIN11	input	CELL6.IMUX.IMUX44.DELAY
CRCIN12	input	CELL6.IMUX.IMUX43.DELAY
CRCIN13	input	CELL6.IMUX.IMUX42.DELAY
CRCIN14	input	CELL6.IMUX.IMUX37.DELAY
CRCIN15	input	CELL6.IMUX.IMUX36.DELAY
CRCIN16	input	CELL5.IMUX.IMUX47.DELAY
CRCIN17	input	CELL5.IMUX.IMUX46.DELAY
CRCIN18	input	CELL5.IMUX.IMUX45.DELAY
CRCIN19	input	CELL5.IMUX.IMUX44.DELAY
CRCIN2	input	CELL7.IMUX.IMUX45.DELAY
CRCIN20	input	CELL5.IMUX.IMUX43.DELAY
CRCIN21	input	CELL5.IMUX.IMUX42.DELAY
CRCIN22	input	CELL5.IMUX.IMUX37.DELAY
CRCIN23	input	CELL5.IMUX.IMUX36.DELAY
CRCIN24	input	CELL4.IMUX.IMUX47.DELAY
CRCIN25	input	CELL4.IMUX.IMUX46.DELAY
CRCIN26	input	CELL4.IMUX.IMUX45.DELAY
CRCIN27	input	CELL4.IMUX.IMUX44.DELAY
CRCIN28	input	CELL4.IMUX.IMUX43.DELAY
CRCIN29	input	CELL4.IMUX.IMUX42.DELAY
CRCIN3	input	CELL7.IMUX.IMUX44.DELAY
CRCIN30	input	CELL4.IMUX.IMUX37.DELAY
CRCIN31	input	CELL4.IMUX.IMUX36.DELAY
CRCIN4	input	CELL7.IMUX.IMUX43.DELAY
CRCIN5	input	CELL7.IMUX.IMUX42.DELAY
CRCIN6	input	CELL7.IMUX.IMUX37.DELAY
CRCIN7	input	CELL7.IMUX.IMUX36.DELAY
CRCIN8	input	CELL6.IMUX.IMUX47.DELAY
CRCIN9	input	CELL6.IMUX.IMUX46.DELAY
CRCOUT0	output	CELL9.OUT11.TMIN
CRCOUT1	output	CELL9.OUT3.TMIN
CRCOUT10	output	CELL8.OUT15.TMIN
CRCOUT11	output	CELL8.OUT11.TMIN
CRCOUT12	output	CELL8.OUT6.TMIN
CRCOUT13	output	CELL8.OUT2.TMIN
CRCOUT14	output	CELL8.OUT16.TMIN
CRCOUT15	output	CELL8.OUT10.TMIN
CRCOUT16	output	CELL8.OUT23.TMIN
CRCOUT17	output	CELL8.OUT9.TMIN
CRCOUT18	output	CELL8.OUT5.TMIN
CRCOUT19	output	CELL8.OUT0.TMIN
CRCOUT2	output	CELL9.OUT14.TMIN
CRCOUT20	output	CELL7.OUT21.TMIN
CRCOUT21	output	CELL7.OUT17.TMIN
CRCOUT22	output	CELL7.OUT3.TMIN
CRCOUT23	output	CELL7.OUT12.TMIN
CRCOUT24	output	CELL6.OUT15.TMIN
CRCOUT25	output	CELL6.OUT14.TMIN
CRCOUT26	output	CELL6.OUT12.TMIN
CRCOUT27	output	CELL5.OUT21.TMIN
CRCOUT28	output	CELL5.OUT7.TMIN
CRCOUT29	output	CELL5.OUT5.TMIN
CRCOUT3	output	CELL9.OUT13.TMIN
CRCOUT30	output	CELL5.OUT22.TMIN
CRCOUT31	output	CELL4.OUT21.TMIN
CRCOUT4	output	CELL9.OUT4.TMIN
CRCOUT5	output	CELL9.OUT0.TMIN
CRCOUT6	output	CELL9.OUT18.TMIN
CRCOUT7	output	CELL9.OUT12.TMIN
CRCOUT8	output	CELL9.OUT8.TMIN
CRCOUT9	output	CELL8.OUT17.TMIN
CRCRESET	input	CELL8.IMUX.IMUX0.DELAY

Bel CRC32_2

virtex5 GTP bel CRC32_2
Pin	Direction	Wires
CRCCLK	input	CELL13.IMUX.CLK0
CRCDATAVALID	input	CELL11.IMUX.IMUX30.DELAY
CRCDATAWIDTH0	input	CELL11.IMUX.IMUX24.DELAY
CRCDATAWIDTH1	input	CELL11.IMUX.IMUX13.DELAY
CRCDATAWIDTH2	input	CELL16.IMUX.IMUX8.DELAY
CRCIN0	input	CELL12.IMUX.IMUX0.DELAY
CRCIN1	input	CELL12.IMUX.IMUX1.DELAY
CRCIN10	input	CELL13.IMUX.IMUX8.DELAY
CRCIN11	input	CELL13.IMUX.IMUX9.DELAY
CRCIN12	input	CELL13.IMUX.IMUX4.DELAY
CRCIN13	input	CELL13.IMUX.IMUX5.DELAY
CRCIN14	input	CELL13.IMUX.IMUX10.DELAY
CRCIN15	input	CELL13.IMUX.IMUX11.DELAY
CRCIN16	input	CELL14.IMUX.IMUX6.DELAY
CRCIN17	input	CELL14.IMUX.IMUX7.DELAY
CRCIN18	input	CELL14.IMUX.IMUX8.DELAY
CRCIN19	input	CELL14.IMUX.IMUX9.DELAY
CRCIN2	input	CELL12.IMUX.IMUX2.DELAY
CRCIN20	input	CELL14.IMUX.IMUX4.DELAY
CRCIN21	input	CELL14.IMUX.IMUX5.DELAY
CRCIN22	input	CELL14.IMUX.IMUX10.DELAY
CRCIN23	input	CELL14.IMUX.IMUX11.DELAY
CRCIN24	input	CELL15.IMUX.IMUX6.DELAY
CRCIN25	input	CELL15.IMUX.IMUX7.DELAY
CRCIN26	input	CELL15.IMUX.IMUX8.DELAY
CRCIN27	input	CELL15.IMUX.IMUX9.DELAY
CRCIN28	input	CELL15.IMUX.IMUX4.DELAY
CRCIN29	input	CELL15.IMUX.IMUX5.DELAY
CRCIN3	input	CELL12.IMUX.IMUX9.DELAY
CRCIN30	input	CELL15.IMUX.IMUX10.DELAY
CRCIN31	input	CELL15.IMUX.IMUX11.DELAY
CRCIN4	input	CELL12.IMUX.IMUX45.DELAY
CRCIN5	input	CELL12.IMUX.IMUX35.DELAY
CRCIN6	input	CELL12.IMUX.IMUX10.DELAY
CRCIN7	input	CELL12.IMUX.IMUX11.DELAY
CRCIN8	input	CELL13.IMUX.IMUX6.DELAY
CRCIN9	input	CELL13.IMUX.IMUX7.DELAY
CRCOUT0	output	CELL10.OUT4.TMIN
CRCOUT1	output	CELL10.OUT23.TMIN
CRCOUT10	output	CELL11.OUT4.TMIN
CRCOUT11	output	CELL11.OUT22.TMIN
CRCOUT12	output	CELL11.OUT5.TMIN
CRCOUT13	output	CELL11.OUT13.TMIN
CRCOUT14	output	CELL11.OUT19.TMIN
CRCOUT15	output	CELL11.OUT23.TMIN
CRCOUT16	output	CELL11.OUT10.TMIN
CRCOUT17	output	CELL11.OUT16.TMIN
CRCOUT18	output	CELL11.OUT3.TMIN
CRCOUT19	output	CELL11.OUT7.TMIN
CRCOUT2	output	CELL10.OUT16.TMIN
CRCOUT20	output	CELL12.OUT8.TMIN
CRCOUT21	output	CELL12.OUT18.TMIN
CRCOUT22	output	CELL12.OUT4.TMIN
CRCOUT23	output	CELL12.OUT17.TMIN
CRCOUT24	output	CELL13.OUT18.TMIN
CRCOUT25	output	CELL13.OUT19.TMIN
CRCOUT26	output	CELL13.OUT17.TMIN
CRCOUT27	output	CELL14.OUT18.TMIN
CRCOUT28	output	CELL14.OUT4.TMIN
CRCOUT29	output	CELL14.OUT6.TMIN
CRCOUT3	output	CELL10.OUT2.TMIN
CRCOUT30	output	CELL14.OUT17.TMIN
CRCOUT31	output	CELL15.OUT18.TMIN
CRCOUT4	output	CELL10.OUT6.TMIN
CRCOUT5	output	CELL10.OUT7.TMIN
CRCOUT6	output	CELL10.OUT11.TMIN
CRCOUT7	output	CELL10.OUT15.TMIN
CRCOUT8	output	CELL10.OUT21.TMIN
CRCOUT9	output	CELL11.OUT12.TMIN
CRCRESET	input	CELL11.IMUX.IMUX5.DELAY

Bel CRC32_3

virtex5 GTP bel CRC32_3
Pin	Direction	Wires
CRCCLK	input	CELL18.IMUX.CLK0
CRCDATAVALID	input	CELL16.IMUX.IMUX7.DELAY
CRCDATAWIDTH0	input	CELL16.IMUX.IMUX6.DELAY
CRCDATAWIDTH1	input	CELL16.IMUX.IMUX1.DELAY
CRCDATAWIDTH2	input	CELL16.IMUX.IMUX8.DELAY
CRCIN0	input	CELL16.IMUX.IMUX36.DELAY
CRCIN1	input	CELL16.IMUX.IMUX37.DELAY
CRCIN10	input	CELL17.IMUX.IMUX32.DELAY
CRCIN11	input	CELL17.IMUX.IMUX33.DELAY
CRCIN12	input	CELL17.IMUX.IMUX34.DELAY
CRCIN13	input	CELL17.IMUX.IMUX35.DELAY
CRCIN14	input	CELL17.IMUX.IMUX46.DELAY
CRCIN15	input	CELL17.IMUX.IMUX47.DELAY
CRCIN16	input	CELL18.IMUX.IMUX6.DELAY
CRCIN17	input	CELL18.IMUX.IMUX7.DELAY
CRCIN18	input	CELL18.IMUX.IMUX8.DELAY
CRCIN19	input	CELL18.IMUX.IMUX21.DELAY
CRCIN2	input	CELL16.IMUX.IMUX38.DELAY
CRCIN20	input	CELL18.IMUX.IMUX10.DELAY
CRCIN21	input	CELL18.IMUX.IMUX11.DELAY
CRCIN22	input	CELL18.IMUX.IMUX40.DELAY
CRCIN23	input	CELL18.IMUX.IMUX41.DELAY
CRCIN24	input	CELL19.IMUX.IMUX24.DELAY
CRCIN25	input	CELL19.IMUX.IMUX25.DELAY
CRCIN26	input	CELL19.IMUX.IMUX26.DELAY
CRCIN27	input	CELL19.IMUX.IMUX21.DELAY
CRCIN28	input	CELL19.IMUX.IMUX10.DELAY
CRCIN29	input	CELL19.IMUX.IMUX11.DELAY
CRCIN3	input	CELL16.IMUX.IMUX39.DELAY
CRCIN30	input	CELL19.IMUX.IMUX40.DELAY
CRCIN31	input	CELL19.IMUX.IMUX41.DELAY
CRCIN4	input	CELL16.IMUX.IMUX40.DELAY
CRCIN5	input	CELL16.IMUX.IMUX35.DELAY
CRCIN6	input	CELL16.IMUX.IMUX10.DELAY
CRCIN7	input	CELL16.IMUX.IMUX11.DELAY
CRCIN8	input	CELL17.IMUX.IMUX30.DELAY
CRCIN9	input	CELL17.IMUX.IMUX31.DELAY
CRCOUT0	output	CELL16.OUT13.TMIN
CRCOUT1	output	CELL16.OUT3.TMIN
CRCOUT10	output	CELL17.OUT15.TMIN
CRCOUT11	output	CELL17.OUT17.TMIN
CRCOUT12	output	CELL18.OUT12.TMIN
CRCOUT13	output	CELL18.OUT9.TMIN
CRCOUT14	output	CELL18.OUT10.TMIN
CRCOUT15	output	CELL18.OUT6.TMIN
CRCOUT16	output	CELL18.OUT3.TMIN
CRCOUT17	output	CELL18.OUT7.TMIN
CRCOUT18	output	CELL18.OUT17.TMIN
CRCOUT19	output	CELL18.OUT21.TMIN
CRCOUT2	output	CELL16.OUT15.TMIN
CRCOUT20	output	CELL19.OUT12.TMIN
CRCOUT21	output	CELL19.OUT4.TMIN
CRCOUT22	output	CELL19.OUT1.TMIN
CRCOUT23	output	CELL19.OUT5.TMIN
CRCOUT24	output	CELL19.OUT19.TMIN
CRCOUT25	output	CELL19.OUT20.TMIN
CRCOUT26	output	CELL19.OUT10.TMIN
CRCOUT27	output	CELL19.OUT6.TMIN
CRCOUT28	output	CELL19.OUT3.TMIN
CRCOUT29	output	CELL19.OUT7.TMIN
CRCOUT3	output	CELL17.OUT8.TMIN
CRCOUT30	output	CELL19.OUT11.TMIN
CRCOUT31	output	CELL19.OUT21.TMIN
CRCOUT4	output	CELL17.OUT1.TMIN
CRCOUT5	output	CELL17.OUT13.TMIN
CRCOUT6	output	CELL17.OUT19.TMIN
CRCOUT7	output	CELL17.OUT14.TMIN
CRCOUT8	output	CELL17.OUT20.TMIN
CRCOUT9	output	CELL17.OUT6.TMIN
CRCRESET	input	CELL17.IMUX.IMUX0.DELAY

Bel CRC64_0

virtex5 GTP bel CRC64_0
Pin	Direction	Wires
CRCCLK	input	CELL1.IMUX.CLK1
CRCDATAVALID	input	CELL3.IMUX.IMUX22.DELAY
CRCDATAWIDTH0	input	CELL3.IMUX.IMUX40.DELAY
CRCDATAWIDTH1	input	CELL3.IMUX.IMUX23.DELAY
CRCDATAWIDTH2	input	CELL3.IMUX.IMUX21.DELAY
CRCIN0	input	CELL7.IMUX.IMUX47.DELAY
CRCIN1	input	CELL7.IMUX.IMUX46.DELAY
CRCIN10	input	CELL6.IMUX.IMUX45.DELAY
CRCIN11	input	CELL6.IMUX.IMUX44.DELAY
CRCIN12	input	CELL6.IMUX.IMUX43.DELAY
CRCIN13	input	CELL6.IMUX.IMUX42.DELAY
CRCIN14	input	CELL6.IMUX.IMUX37.DELAY
CRCIN15	input	CELL6.IMUX.IMUX36.DELAY
CRCIN16	input	CELL5.IMUX.IMUX47.DELAY
CRCIN17	input	CELL5.IMUX.IMUX46.DELAY
CRCIN18	input	CELL5.IMUX.IMUX45.DELAY
CRCIN19	input	CELL5.IMUX.IMUX44.DELAY
CRCIN2	input	CELL7.IMUX.IMUX45.DELAY
CRCIN20	input	CELL5.IMUX.IMUX43.DELAY
CRCIN21	input	CELL5.IMUX.IMUX42.DELAY
CRCIN22	input	CELL5.IMUX.IMUX37.DELAY
CRCIN23	input	CELL5.IMUX.IMUX36.DELAY
CRCIN24	input	CELL4.IMUX.IMUX47.DELAY
CRCIN25	input	CELL4.IMUX.IMUX46.DELAY
CRCIN26	input	CELL4.IMUX.IMUX45.DELAY
CRCIN27	input	CELL4.IMUX.IMUX44.DELAY
CRCIN28	input	CELL4.IMUX.IMUX43.DELAY
CRCIN29	input	CELL4.IMUX.IMUX42.DELAY
CRCIN3	input	CELL7.IMUX.IMUX44.DELAY
CRCIN30	input	CELL4.IMUX.IMUX37.DELAY
CRCIN31	input	CELL4.IMUX.IMUX36.DELAY
CRCIN32	input	CELL3.IMUX.IMUX17.DELAY
CRCIN33	input	CELL3.IMUX.IMUX16.DELAY
CRCIN34	input	CELL3.IMUX.IMUX15.DELAY
CRCIN35	input	CELL3.IMUX.IMUX14.DELAY
CRCIN36	input	CELL3.IMUX.IMUX13.DELAY
CRCIN37	input	CELL3.IMUX.IMUX12.DELAY
CRCIN38	input	CELL3.IMUX.IMUX37.DELAY
CRCIN39	input	CELL3.IMUX.IMUX36.DELAY
CRCIN4	input	CELL7.IMUX.IMUX43.DELAY
CRCIN40	input	CELL2.IMUX.IMUX17.DELAY
CRCIN41	input	CELL2.IMUX.IMUX16.DELAY
CRCIN42	input	CELL2.IMUX.IMUX15.DELAY
CRCIN43	input	CELL2.IMUX.IMUX14.DELAY
CRCIN44	input	CELL2.IMUX.IMUX13.DELAY
CRCIN45	input	CELL2.IMUX.IMUX12.DELAY
CRCIN46	input	CELL2.IMUX.IMUX37.DELAY
CRCIN47	input	CELL2.IMUX.IMUX36.DELAY
CRCIN48	input	CELL1.IMUX.IMUX23.DELAY
CRCIN49	input	CELL1.IMUX.IMUX22.DELAY
CRCIN5	input	CELL7.IMUX.IMUX42.DELAY
CRCIN50	input	CELL1.IMUX.IMUX45.DELAY
CRCIN51	input	CELL1.IMUX.IMUX44.DELAY
CRCIN52	input	CELL1.IMUX.IMUX43.DELAY
CRCIN53	input	CELL1.IMUX.IMUX42.DELAY
CRCIN54	input	CELL1.IMUX.IMUX19.DELAY
CRCIN55	input	CELL1.IMUX.IMUX18.DELAY
CRCIN56	input	CELL0.IMUX.IMUX23.DELAY
CRCIN57	input	CELL0.IMUX.IMUX22.DELAY
CRCIN58	input	CELL0.IMUX.IMUX21.DELAY
CRCIN59	input	CELL0.IMUX.IMUX20.DELAY
CRCIN6	input	CELL7.IMUX.IMUX37.DELAY
CRCIN60	input	CELL0.IMUX.IMUX25.DELAY
CRCIN61	input	CELL0.IMUX.IMUX24.DELAY
CRCIN62	input	CELL0.IMUX.IMUX43.DELAY
CRCIN63	input	CELL0.IMUX.IMUX42.DELAY
CRCIN7	input	CELL7.IMUX.IMUX36.DELAY
CRCIN8	input	CELL6.IMUX.IMUX47.DELAY
CRCIN9	input	CELL6.IMUX.IMUX46.DELAY
CRCOUT0	output	CELL3.OUT6.TMIN
CRCOUT1	output	CELL3.OUT4.TMIN
CRCOUT10	output	CELL2.OUT22.TMIN
CRCOUT11	output	CELL2.OUT12.TMIN
CRCOUT12	output	CELL1.OUT17.TMIN
CRCOUT13	output	CELL1.OUT16.TMIN
CRCOUT14	output	CELL1.OUT23.TMIN
CRCOUT15	output	CELL1.OUT13.TMIN
CRCOUT16	output	CELL1.OUT5.TMIN
CRCOUT17	output	CELL1.OUT1.TMIN
CRCOUT18	output	CELL1.OUT22.TMIN
CRCOUT19	output	CELL1.OUT12.TMIN
CRCOUT2	output	CELL3.OUT18.TMIN
CRCOUT20	output	CELL0.OUT21.TMIN
CRCOUT21	output	CELL0.OUT15.TMIN
CRCOUT22	output	CELL0.OUT7.TMIN
CRCOUT23	output	CELL0.OUT3.TMIN
CRCOUT24	output	CELL0.OUT20.TMIN
CRCOUT25	output	CELL0.OUT14.TMIN
CRCOUT26	output	CELL0.OUT23.TMIN
CRCOUT27	output	CELL0.OUT13.TMIN
CRCOUT28	output	CELL0.OUT5.TMIN
CRCOUT29	output	CELL0.OUT1.TMIN
CRCOUT3	output	CELL2.OUT21.TMIN
CRCOUT30	output	CELL0.OUT22.TMIN
CRCOUT31	output	CELL0.OUT4.TMIN
CRCOUT4	output	CELL2.OUT6.TMIN
CRCOUT5	output	CELL2.OUT20.TMIN
CRCOUT6	output	CELL2.OUT14.TMIN
CRCOUT7	output	CELL2.OUT23.TMIN
CRCOUT8	output	CELL2.OUT13.TMIN
CRCOUT9	output	CELL2.OUT1.TMIN
CRCRESET	input	CELL2.IMUX.IMUX5.DELAY

Bel CRC64_1

virtex5 GTP bel CRC64_1
Pin	Direction	Wires
CRCCLK	input	CELL18.IMUX.CLK0
CRCDATAVALID	input	CELL16.IMUX.IMUX7.DELAY
CRCDATAWIDTH0	input	CELL16.IMUX.IMUX6.DELAY
CRCDATAWIDTH1	input	CELL16.IMUX.IMUX1.DELAY
CRCDATAWIDTH2	input	CELL16.IMUX.IMUX8.DELAY
CRCIN0	input	CELL12.IMUX.IMUX0.DELAY
CRCIN1	input	CELL12.IMUX.IMUX1.DELAY
CRCIN10	input	CELL13.IMUX.IMUX8.DELAY
CRCIN11	input	CELL13.IMUX.IMUX9.DELAY
CRCIN12	input	CELL13.IMUX.IMUX4.DELAY
CRCIN13	input	CELL13.IMUX.IMUX5.DELAY
CRCIN14	input	CELL13.IMUX.IMUX10.DELAY
CRCIN15	input	CELL13.IMUX.IMUX11.DELAY
CRCIN16	input	CELL14.IMUX.IMUX6.DELAY
CRCIN17	input	CELL14.IMUX.IMUX7.DELAY
CRCIN18	input	CELL14.IMUX.IMUX8.DELAY
CRCIN19	input	CELL14.IMUX.IMUX9.DELAY
CRCIN2	input	CELL12.IMUX.IMUX2.DELAY
CRCIN20	input	CELL14.IMUX.IMUX4.DELAY
CRCIN21	input	CELL14.IMUX.IMUX5.DELAY
CRCIN22	input	CELL14.IMUX.IMUX10.DELAY
CRCIN23	input	CELL14.IMUX.IMUX11.DELAY
CRCIN24	input	CELL15.IMUX.IMUX6.DELAY
CRCIN25	input	CELL15.IMUX.IMUX7.DELAY
CRCIN26	input	CELL15.IMUX.IMUX8.DELAY
CRCIN27	input	CELL15.IMUX.IMUX9.DELAY
CRCIN28	input	CELL15.IMUX.IMUX4.DELAY
CRCIN29	input	CELL15.IMUX.IMUX5.DELAY
CRCIN3	input	CELL12.IMUX.IMUX9.DELAY
CRCIN30	input	CELL15.IMUX.IMUX10.DELAY
CRCIN31	input	CELL15.IMUX.IMUX11.DELAY
CRCIN32	input	CELL16.IMUX.IMUX36.DELAY
CRCIN33	input	CELL16.IMUX.IMUX37.DELAY
CRCIN34	input	CELL16.IMUX.IMUX38.DELAY
CRCIN35	input	CELL16.IMUX.IMUX39.DELAY
CRCIN36	input	CELL16.IMUX.IMUX40.DELAY
CRCIN37	input	CELL16.IMUX.IMUX35.DELAY
CRCIN38	input	CELL16.IMUX.IMUX10.DELAY
CRCIN39	input	CELL16.IMUX.IMUX11.DELAY
CRCIN4	input	CELL12.IMUX.IMUX45.DELAY
CRCIN40	input	CELL17.IMUX.IMUX30.DELAY
CRCIN41	input	CELL17.IMUX.IMUX31.DELAY
CRCIN42	input	CELL17.IMUX.IMUX32.DELAY
CRCIN43	input	CELL17.IMUX.IMUX33.DELAY
CRCIN44	input	CELL17.IMUX.IMUX34.DELAY
CRCIN45	input	CELL17.IMUX.IMUX35.DELAY
CRCIN46	input	CELL17.IMUX.IMUX46.DELAY
CRCIN47	input	CELL17.IMUX.IMUX47.DELAY
CRCIN48	input	CELL18.IMUX.IMUX6.DELAY
CRCIN49	input	CELL18.IMUX.IMUX7.DELAY
CRCIN5	input	CELL12.IMUX.IMUX35.DELAY
CRCIN50	input	CELL18.IMUX.IMUX8.DELAY
CRCIN51	input	CELL18.IMUX.IMUX21.DELAY
CRCIN52	input	CELL18.IMUX.IMUX10.DELAY
CRCIN53	input	CELL18.IMUX.IMUX11.DELAY
CRCIN54	input	CELL18.IMUX.IMUX40.DELAY
CRCIN55	input	CELL18.IMUX.IMUX41.DELAY
CRCIN56	input	CELL19.IMUX.IMUX24.DELAY
CRCIN57	input	CELL19.IMUX.IMUX25.DELAY
CRCIN58	input	CELL19.IMUX.IMUX26.DELAY
CRCIN59	input	CELL19.IMUX.IMUX21.DELAY
CRCIN6	input	CELL12.IMUX.IMUX10.DELAY
CRCIN60	input	CELL19.IMUX.IMUX10.DELAY
CRCIN61	input	CELL19.IMUX.IMUX11.DELAY
CRCIN62	input	CELL19.IMUX.IMUX40.DELAY
CRCIN63	input	CELL19.IMUX.IMUX41.DELAY
CRCIN7	input	CELL12.IMUX.IMUX11.DELAY
CRCIN8	input	CELL13.IMUX.IMUX6.DELAY
CRCIN9	input	CELL13.IMUX.IMUX7.DELAY
CRCOUT0	output	CELL16.OUT13.TMIN
CRCOUT1	output	CELL16.OUT3.TMIN
CRCOUT10	output	CELL17.OUT15.TMIN
CRCOUT11	output	CELL17.OUT17.TMIN
CRCOUT12	output	CELL18.OUT12.TMIN
CRCOUT13	output	CELL18.OUT9.TMIN
CRCOUT14	output	CELL18.OUT10.TMIN
CRCOUT15	output	CELL18.OUT6.TMIN
CRCOUT16	output	CELL18.OUT3.TMIN
CRCOUT17	output	CELL18.OUT7.TMIN
CRCOUT18	output	CELL18.OUT17.TMIN
CRCOUT19	output	CELL18.OUT21.TMIN
CRCOUT2	output	CELL16.OUT15.TMIN
CRCOUT20	output	CELL19.OUT12.TMIN
CRCOUT21	output	CELL19.OUT4.TMIN
CRCOUT22	output	CELL19.OUT1.TMIN
CRCOUT23	output	CELL19.OUT5.TMIN
CRCOUT24	output	CELL19.OUT19.TMIN
CRCOUT25	output	CELL19.OUT20.TMIN
CRCOUT26	output	CELL19.OUT10.TMIN
CRCOUT27	output	CELL19.OUT6.TMIN
CRCOUT28	output	CELL19.OUT3.TMIN
CRCOUT29	output	CELL19.OUT7.TMIN
CRCOUT3	output	CELL17.OUT8.TMIN
CRCOUT30	output	CELL19.OUT11.TMIN
CRCOUT31	output	CELL19.OUT21.TMIN
CRCOUT4	output	CELL17.OUT1.TMIN
CRCOUT5	output	CELL17.OUT13.TMIN
CRCOUT6	output	CELL17.OUT19.TMIN
CRCOUT7	output	CELL17.OUT14.TMIN
CRCOUT8	output	CELL17.OUT20.TMIN
CRCOUT9	output	CELL17.OUT6.TMIN
CRCRESET	input	CELL17.IMUX.IMUX0.DELAY

Bel IPAD_CLKP0

virtex5 GTP bel IPAD_CLKP0
Pin	Direction	Wires

Bel IPAD_CLKN0

virtex5 GTP bel IPAD_CLKN0
Pin	Direction	Wires

Bel IPAD_RXP0

virtex5 GTP bel IPAD_RXP0
Pin	Direction	Wires

Bel IPAD_RXN0

virtex5 GTP bel IPAD_RXN0
Pin	Direction	Wires

Bel IPAD_RXP1

virtex5 GTP bel IPAD_RXP1
Pin	Direction	Wires

Bel IPAD_RXN1

virtex5 GTP bel IPAD_RXN1
Pin	Direction	Wires

Bel OPAD_TXP0

virtex5 GTP bel OPAD_TXP0
Pin	Direction	Wires

Bel OPAD_TXN0

virtex5 GTP bel OPAD_TXN0
Pin	Direction	Wires

Bel OPAD_TXP1

virtex5 GTP bel OPAD_TXP1
Pin	Direction	Wires

Bel OPAD_TXN1

virtex5 GTP bel OPAD_TXN1
Pin	Direction	Wires

Bel wires

virtex5 GTP bel wires
Wire	Pins
CELL0.IMUX.IMUX4.DELAY	GTP_DUAL.TXELECIDLE1
CELL0.IMUX.IMUX6.DELAY	GTP_DUAL.TXDIFFCTRL12
CELL0.IMUX.IMUX7.DELAY	GTP_DUAL.TXDIFFCTRL11
CELL0.IMUX.IMUX8.DELAY	GTP_DUAL.TXDIFFCTRL10
CELL0.IMUX.IMUX12.DELAY	GTP_DUAL.RXELECIDLERESET1
CELL0.IMUX.IMUX13.DELAY	GTP_DUAL.GTPTEST0
CELL0.IMUX.IMUX15.DELAY	GTP_DUAL.TXBUFDIFFCTRL12
CELL0.IMUX.IMUX16.DELAY	GTP_DUAL.TXBUFDIFFCTRL11
CELL0.IMUX.IMUX17.DELAY	GTP_DUAL.TXBUFDIFFCTRL10
CELL0.IMUX.IMUX20.DELAY	CRC32_0.CRCIN27, CRC64_0.CRCIN59
CELL0.IMUX.IMUX21.DELAY	CRC32_0.CRCIN26, CRC64_0.CRCIN58
CELL0.IMUX.IMUX22.DELAY	CRC32_0.CRCIN25, CRC64_0.CRCIN57
CELL0.IMUX.IMUX23.DELAY	CRC32_0.CRCIN24, CRC64_0.CRCIN56
CELL0.IMUX.IMUX24.DELAY	CRC32_0.CRCIN29, CRC64_0.CRCIN61
CELL0.IMUX.IMUX25.DELAY	CRC32_0.CRCIN28, CRC64_0.CRCIN60
CELL0.IMUX.IMUX32.DELAY	GTP_DUAL.TXDATA10
CELL0.IMUX.IMUX33.DELAY	GTP_DUAL.TXDATA11
CELL0.IMUX.IMUX34.DELAY	GTP_DUAL.TXDATA12
CELL0.IMUX.IMUX35.DELAY	GTP_DUAL.TXDATA13
CELL0.IMUX.IMUX36.DELAY	GTP_DUAL.SCANMODE
CELL0.IMUX.IMUX42.DELAY	CRC32_0.CRCIN31, CRC64_0.CRCIN63
CELL0.IMUX.IMUX43.DELAY	CRC32_0.CRCIN30, CRC64_0.CRCIN62
CELL0.IMUX.IMUX47.DELAY	GTP_DUAL.TXDETECTRX1
CELL0.OUT1.TMIN	CRC32_0.CRCOUT29, CRC64_0.CRCOUT29
CELL0.OUT3.TMIN	CRC32_0.CRCOUT23, CRC64_0.CRCOUT23
CELL0.OUT4.TMIN	CRC32_0.CRCOUT31, CRC64_0.CRCOUT31
CELL0.OUT5.TMIN	CRC32_0.CRCOUT28, CRC64_0.CRCOUT28
CELL0.OUT7.TMIN	CRC32_0.CRCOUT22, CRC64_0.CRCOUT22
CELL0.OUT8.TMIN	GTP_DUAL.SCANOUT
CELL0.OUT13.TMIN	CRC32_0.CRCOUT27, CRC64_0.CRCOUT27
CELL0.OUT14.TMIN	CRC32_0.CRCOUT25, CRC64_0.CRCOUT25
CELL0.OUT15.TMIN	CRC32_0.CRCOUT21, CRC64_0.CRCOUT21
CELL0.OUT20.TMIN	CRC32_0.CRCOUT24, CRC64_0.CRCOUT24
CELL0.OUT21.TMIN	CRC32_0.CRCOUT20, CRC64_0.CRCOUT20
CELL0.OUT22.TMIN	CRC32_0.CRCOUT30, CRC64_0.CRCOUT30
CELL0.OUT23.TMIN	CRC32_0.CRCOUT26, CRC64_0.CRCOUT26
CELL1.IMUX.CLK1	CRC32_0.CRCCLK, CRC64_0.CRCCLK
CELL1.IMUX.IMUX0.DELAY	GTP_DUAL.TXCOMTYPE1
CELL1.IMUX.IMUX1.DELAY	GTP_DUAL.TXCHARISK10
CELL1.IMUX.IMUX8.DELAY	GTP_DUAL.TXCHARDISPMODE10
CELL1.IMUX.IMUX10.DELAY	GTP_DUAL.TXENPRBSTST11
CELL1.IMUX.IMUX11.DELAY	GTP_DUAL.TXENPRBSTST10
CELL1.IMUX.IMUX12.DELAY	GTP_DUAL.TXBYPASS8B10B10
CELL1.IMUX.IMUX18.DELAY	CRC32_0.CRCIN23, CRC64_0.CRCIN55
CELL1.IMUX.IMUX19.DELAY	CRC32_0.CRCIN22, CRC64_0.CRCIN54
CELL1.IMUX.IMUX21.DELAY	GTP_DUAL.TXCHARDISPVAL10
CELL1.IMUX.IMUX22.DELAY	CRC32_0.CRCIN17, CRC64_0.CRCIN49
CELL1.IMUX.IMUX23.DELAY	CRC32_0.CRCIN16, CRC64_0.CRCIN48
CELL1.IMUX.IMUX24.DELAY	GTP_DUAL.TXPREEMPHASIS12
CELL1.IMUX.IMUX25.DELAY	GTP_DUAL.TXPREEMPHASIS11
CELL1.IMUX.IMUX26.DELAY	GTP_DUAL.TXPREEMPHASIS10
CELL1.IMUX.IMUX32.DELAY	GTP_DUAL.TXDATA14
CELL1.IMUX.IMUX33.DELAY	GTP_DUAL.TXDATA15
CELL1.IMUX.IMUX34.DELAY	GTP_DUAL.TXDATA16
CELL1.IMUX.IMUX35.DELAY	GTP_DUAL.TXDATA17
CELL1.IMUX.IMUX37.DELAY	GTP_DUAL.TXCOMSTART1
CELL1.IMUX.IMUX42.DELAY	CRC32_0.CRCIN21, CRC64_0.CRCIN53
CELL1.IMUX.IMUX43.DELAY	CRC32_0.CRCIN20, CRC64_0.CRCIN52
CELL1.IMUX.IMUX44.DELAY	CRC32_0.CRCIN19, CRC64_0.CRCIN51
CELL1.IMUX.IMUX45.DELAY	CRC32_0.CRCIN18, CRC64_0.CRCIN50
CELL1.IMUX.IMUX47.DELAY	GTP_DUAL.TSTPWRDNOVRD1
CELL1.OUT1.TMIN	CRC32_0.CRCOUT17, CRC64_0.CRCOUT17
CELL1.OUT2.TMIN	GTP_DUAL.TXBUFSTATUS10
CELL1.OUT5.TMIN	CRC32_0.CRCOUT16, CRC64_0.CRCOUT16
CELL1.OUT7.TMIN	GTP_DUAL.TXKERR10
CELL1.OUT10.TMIN	GTP_DUAL.TXBUFSTATUS11
CELL1.OUT11.TMIN	GTP_DUAL.TXRUNDISP10
CELL1.OUT12.TMIN	CRC32_0.CRCOUT19, CRC64_0.CRCOUT19
CELL1.OUT13.TMIN	CRC32_0.CRCOUT15, CRC64_0.CRCOUT15
CELL1.OUT16.TMIN	CRC32_0.CRCOUT13, CRC64_0.CRCOUT13
CELL1.OUT17.TMIN	CRC32_0.CRCOUT12, CRC64_0.CRCOUT12
CELL1.OUT22.TMIN	CRC32_0.CRCOUT18, CRC64_0.CRCOUT18
CELL1.OUT23.TMIN	CRC32_0.CRCOUT14, CRC64_0.CRCOUT14
CELL2.IMUX.IMUX2.DELAY	GTP_DUAL.TXPOLARITY1
CELL2.IMUX.IMUX5.DELAY	CRC32_0.CRCRESET, CRC64_0.CRCRESET
CELL2.IMUX.IMUX12.DELAY	CRC32_0.CRCIN13, CRC64_0.CRCIN45
CELL2.IMUX.IMUX13.DELAY	CRC32_0.CRCIN12, CRC64_0.CRCIN44
CELL2.IMUX.IMUX14.DELAY	CRC32_0.CRCIN11, CRC64_0.CRCIN43
CELL2.IMUX.IMUX15.DELAY	CRC32_0.CRCIN10, CRC64_0.CRCIN42
CELL2.IMUX.IMUX16.DELAY	CRC32_0.CRCIN9, CRC64_0.CRCIN41
CELL2.IMUX.IMUX17.DELAY	CRC32_0.CRCIN8, CRC64_0.CRCIN40
CELL2.IMUX.IMUX20.DELAY	GTP_DUAL.TXCHARDISPMODE11
CELL2.IMUX.IMUX21.DELAY	GTP_DUAL.TXCHARDISPVAL11
CELL2.IMUX.IMUX24.DELAY	GTP_DUAL.TXBYPASS8B10B11
CELL2.IMUX.IMUX25.DELAY	GTP_DUAL.TXCHARISK11
CELL2.IMUX.IMUX32.DELAY	GTP_DUAL.TXDATA18
CELL2.IMUX.IMUX33.DELAY	GTP_DUAL.TXDATA19
CELL2.IMUX.IMUX34.DELAY	GTP_DUAL.TXDATA110
CELL2.IMUX.IMUX35.DELAY	GTP_DUAL.TXDATA111
CELL2.IMUX.IMUX36.DELAY	CRC32_0.CRCIN15, CRC64_0.CRCIN47
CELL2.IMUX.IMUX37.DELAY	CRC32_0.CRCIN14, CRC64_0.CRCIN46
CELL2.IMUX.IMUX42.DELAY	GTP_DUAL.TXPOWERDOWN11
CELL2.IMUX.IMUX43.DELAY	GTP_DUAL.TXPOWERDOWN10
CELL2.OUT1.TMIN	CRC32_0.CRCOUT9, CRC64_0.CRCOUT9
CELL2.OUT2.TMIN	GTP_DUAL.RXELECIDLE1
CELL2.OUT5.TMIN	GTP_DUAL.TXRUNDISP11
CELL2.OUT6.TMIN	CRC32_0.CRCOUT4, CRC64_0.CRCOUT4
CELL2.OUT12.TMIN	CRC32_0.CRCOUT11, CRC64_0.CRCOUT11
CELL2.OUT13.TMIN	CRC32_0.CRCOUT8, CRC64_0.CRCOUT8
CELL2.OUT14.TMIN	CRC32_0.CRCOUT6, CRC64_0.CRCOUT6
CELL2.OUT15.TMIN	GTP_DUAL.TXKERR11
CELL2.OUT20.TMIN	CRC32_0.CRCOUT5, CRC64_0.CRCOUT5
CELL2.OUT21.TMIN	CRC32_0.CRCOUT3, CRC64_0.CRCOUT3
CELL2.OUT22.TMIN	CRC32_0.CRCOUT10, CRC64_0.CRCOUT10
CELL2.OUT23.TMIN	CRC32_0.CRCOUT7, CRC64_0.CRCOUT7
CELL3.IMUX.IMUX0.DELAY	GTP_DUAL.TXRESET1
CELL3.IMUX.IMUX1.DELAY	GTP_DUAL.TXINHIBIT1
CELL3.IMUX.IMUX4.DELAY	GTP_DUAL.TXDATAWIDTH1
CELL3.IMUX.IMUX12.DELAY	CRC32_0.CRCIN5, CRC64_0.CRCIN37
CELL3.IMUX.IMUX13.DELAY	CRC32_0.CRCIN4, CRC64_0.CRCIN36
CELL3.IMUX.IMUX14.DELAY	CRC32_0.CRCIN3, CRC64_0.CRCIN35
CELL3.IMUX.IMUX15.DELAY	CRC32_0.CRCIN2, CRC64_0.CRCIN34
CELL3.IMUX.IMUX16.DELAY	CRC32_0.CRCIN1, CRC64_0.CRCIN33
CELL3.IMUX.IMUX17.DELAY	CRC32_0.CRCIN0, CRC64_0.CRCIN32
CELL3.IMUX.IMUX21.DELAY	CRC32_0.CRCDATAWIDTH2, CRC32_1.CRCDATAWIDTH2, CRC64_0.CRCDATAWIDTH2
CELL3.IMUX.IMUX22.DELAY	CRC32_0.CRCDATAVALID, CRC64_0.CRCDATAVALID
CELL3.IMUX.IMUX23.DELAY	CRC32_0.CRCDATAWIDTH1, CRC64_0.CRCDATAWIDTH1
CELL3.IMUX.IMUX32.DELAY	GTP_DUAL.TXDATA112
CELL3.IMUX.IMUX33.DELAY	GTP_DUAL.TXDATA113
CELL3.IMUX.IMUX34.DELAY	GTP_DUAL.TXDATA114
CELL3.IMUX.IMUX35.DELAY	GTP_DUAL.TXDATA115
CELL3.IMUX.IMUX36.DELAY	CRC32_0.CRCIN7, CRC64_0.CRCIN39
CELL3.IMUX.IMUX37.DELAY	CRC32_0.CRCIN6, CRC64_0.CRCIN38
CELL3.IMUX.IMUX40.DELAY	CRC32_0.CRCDATAWIDTH0, CRC64_0.CRCDATAWIDTH0
CELL3.IMUX.IMUX47.DELAY	GTP_DUAL.TXENC8B10BUSE1
CELL3.OUT0.TMIN	GTP_DUAL.RXSTATUS11
CELL3.OUT2.TMIN	GTP_DUAL.RXCLKCORCNT10
CELL3.OUT4.TMIN	CRC32_0.CRCOUT1, CRC64_0.CRCOUT1
CELL3.OUT6.TMIN	CRC32_0.CRCOUT0, CRC64_0.CRCOUT0
CELL3.OUT8.TMIN	GTP_DUAL.RXSTATUS12
CELL3.OUT9.TMIN	GTP_DUAL.RXCLKCORCNT12
CELL3.OUT10.TMIN	GTP_DUAL.RXCLKCORCNT11
CELL3.OUT11.TMIN	GTP_DUAL.RXPRBSERR1
CELL3.OUT18.TMIN	CRC32_0.CRCOUT2, CRC64_0.CRCOUT2
CELL3.OUT19.TMIN	GTP_DUAL.RXSTATUS10
CELL4.IMUX.IMUX0.DELAY	GTP_DUAL.RXPOLARITY1
CELL4.IMUX.IMUX1.DELAY	GTP_DUAL.RXENPCOMMAALIGN1
CELL4.IMUX.IMUX2.DELAY	GTP_DUAL.RXENMCOMMAALIGN1
CELL4.IMUX.IMUX3.DELAY	GTP_DUAL.RXSLIDE1
CELL4.IMUX.IMUX5.DELAY	GTP_DUAL.RXENEQB1
CELL4.IMUX.IMUX10.DELAY	GTP_DUAL.RXDATAWIDTH1
CELL4.IMUX.IMUX17.DELAY	GTP_DUAL.RXCOMMADETUSE1
CELL4.IMUX.IMUX24.DELAY	GTP_DUAL.RXENPRBSTST11
CELL4.IMUX.IMUX25.DELAY	GTP_DUAL.RXENPRBSTST10
CELL4.IMUX.IMUX33.DELAY	GTP_DUAL.RXENSAMPLEALIGN1
CELL4.IMUX.IMUX36.DELAY	CRC32_1.CRCIN31, CRC64_0.CRCIN31
CELL4.IMUX.IMUX37.DELAY	CRC32_1.CRCIN30, CRC64_0.CRCIN30
CELL4.IMUX.IMUX42.DELAY	CRC32_1.CRCIN29, CRC64_0.CRCIN29
CELL4.IMUX.IMUX43.DELAY	CRC32_1.CRCIN28, CRC64_0.CRCIN28
CELL4.IMUX.IMUX44.DELAY	CRC32_1.CRCIN27, CRC64_0.CRCIN27
CELL4.IMUX.IMUX45.DELAY	CRC32_1.CRCIN26, CRC64_0.CRCIN26
CELL4.IMUX.IMUX46.DELAY	CRC32_1.CRCIN25, CRC64_0.CRCIN25
CELL4.IMUX.IMUX47.DELAY	CRC32_1.CRCIN24, CRC64_0.CRCIN24
CELL4.OUT0.TMIN	GTP_DUAL.RESETDONE1
CELL4.OUT2.TMIN	GTP_DUAL.RXDATA12
CELL4.OUT4.TMIN	GTP_DUAL.RXOVERSAMPLEERR1
CELL4.OUT6.TMIN	GTP_DUAL.RXBUFSTATUS10
CELL4.OUT9.TMIN	GTP_DUAL.RXDATA10
CELL4.OUT10.TMIN	GTP_DUAL.RXDATA11
CELL4.OUT11.TMIN	GTP_DUAL.RXDATA13
CELL4.OUT16.TMIN	GTP_DUAL.RXBUFSTATUS11
CELL4.OUT17.TMIN	GTP_DUAL.PHYSTATUS1
CELL4.OUT19.TMIN	GTP_DUAL.RXBUFSTATUS12
CELL4.OUT21.TMIN	CRC32_1.CRCOUT31
CELL5.IMUX.IMUX0.DELAY	GTP_DUAL.RXEQMIX11
CELL5.IMUX.IMUX1.DELAY	GTP_DUAL.RXEQMIX10
CELL5.IMUX.IMUX2.DELAY	GTP_DUAL.RXEQPOLE13
CELL5.IMUX.IMUX3.DELAY	GTP_DUAL.RXEQPOLE12
CELL5.IMUX.IMUX4.DELAY	GTP_DUAL.RXEQPOLE11
CELL5.IMUX.IMUX5.DELAY	GTP_DUAL.RXEQPOLE10
CELL5.IMUX.IMUX36.DELAY	CRC32_1.CRCIN23, CRC64_0.CRCIN23
CELL5.IMUX.IMUX37.DELAY	CRC32_1.CRCIN22, CRC64_0.CRCIN22
CELL5.IMUX.IMUX42.DELAY	CRC32_1.CRCIN21, CRC64_0.CRCIN21
CELL5.IMUX.IMUX43.DELAY	CRC32_1.CRCIN20, CRC64_0.CRCIN20
CELL5.IMUX.IMUX44.DELAY	CRC32_1.CRCIN19, CRC64_0.CRCIN19
CELL5.IMUX.IMUX45.DELAY	CRC32_1.CRCIN18, CRC64_0.CRCIN18
CELL5.IMUX.IMUX46.DELAY	CRC32_1.CRCIN17, CRC64_0.CRCIN17
CELL5.IMUX.IMUX47.DELAY	CRC32_1.CRCIN16, CRC64_0.CRCIN16
CELL5.OUT0.TMIN	GTP_DUAL.RXBYTEISALIGNED1
CELL5.OUT2.TMIN	GTP_DUAL.RXDATA16
CELL5.OUT4.TMIN	GTP_DUAL.RXNOTINTABLE10
CELL5.OUT5.TMIN	CRC32_1.CRCOUT29
CELL5.OUT6.TMIN	GTP_DUAL.RXRUNDISP10
CELL5.OUT7.TMIN	CRC32_1.CRCOUT28
CELL5.OUT8.TMIN	GTP_DUAL.RXCOMMADET1
CELL5.OUT9.TMIN	GTP_DUAL.RXDATA14
CELL5.OUT10.TMIN	GTP_DUAL.RXDATA15
CELL5.OUT11.TMIN	GTP_DUAL.RXDATA17
CELL5.OUT16.TMIN	GTP_DUAL.RXCHARISK10
CELL5.OUT17.TMIN	GTP_DUAL.RXCHARISCOMMA10
CELL5.OUT18.TMIN	GTP_DUAL.RXBYTEREALIGN1
CELL5.OUT19.TMIN	GTP_DUAL.RXDISPERR10
CELL5.OUT21.TMIN	CRC32_1.CRCOUT27
CELL5.OUT22.TMIN	CRC32_1.CRCOUT30
CELL6.IMUX.CLK1	CRC32_1.CRCCLK
CELL6.IMUX.IMUX1.DELAY	GTP_DUAL.RXCHBONDI12
CELL6.IMUX.IMUX2.DELAY	GTP_DUAL.RXCHBONDI11
CELL6.IMUX.IMUX3.DELAY	GTP_DUAL.RXCHBONDI10
CELL6.IMUX.IMUX6.DELAY	GTP_DUAL.RXDEC8B10BUSE1
CELL6.IMUX.IMUX12.DELAY	GTP_DUAL.TSTPWRDN14
CELL6.IMUX.IMUX13.DELAY	GTP_DUAL.TSTPWRDN13
CELL6.IMUX.IMUX14.DELAY	GTP_DUAL.TSTPWRDN12
CELL6.IMUX.IMUX15.DELAY	GTP_DUAL.TSTPWRDN11
CELL6.IMUX.IMUX16.DELAY	GTP_DUAL.TSTPWRDN10
CELL6.IMUX.IMUX24.DELAY	GTP_DUAL.RXENCHANSYNC1
CELL6.IMUX.IMUX36.DELAY	CRC32_1.CRCIN15, CRC64_0.CRCIN15
CELL6.IMUX.IMUX37.DELAY	CRC32_1.CRCIN14, CRC64_0.CRCIN14
CELL6.IMUX.IMUX42.DELAY	CRC32_1.CRCIN13, CRC64_0.CRCIN13
CELL6.IMUX.IMUX43.DELAY	CRC32_1.CRCIN12, CRC64_0.CRCIN12
CELL6.IMUX.IMUX44.DELAY	CRC32_1.CRCIN11, CRC64_0.CRCIN11
CELL6.IMUX.IMUX45.DELAY	CRC32_1.CRCIN10, CRC64_0.CRCIN10
CELL6.IMUX.IMUX46.DELAY	CRC32_1.CRCIN9, CRC64_0.CRCIN9
CELL6.IMUX.IMUX47.DELAY	CRC32_1.CRCIN8, CRC64_0.CRCIN8
CELL6.OUT0.TMIN	GTP_DUAL.RXVALID1
CELL6.OUT2.TMIN	GTP_DUAL.RXDATA110
CELL6.OUT4.TMIN	GTP_DUAL.RXNOTINTABLE11
CELL6.OUT6.TMIN	GTP_DUAL.RXRUNDISP11
CELL6.OUT8.TMIN	GTP_DUAL.RXLOSSOFSYNC11
CELL6.OUT9.TMIN	GTP_DUAL.RXDATA18
CELL6.OUT10.TMIN	GTP_DUAL.RXDATA19
CELL6.OUT11.TMIN	GTP_DUAL.RXDATA111
CELL6.OUT12.TMIN	CRC32_1.CRCOUT26
CELL6.OUT14.TMIN	CRC32_1.CRCOUT25
CELL6.OUT15.TMIN	CRC32_1.CRCOUT24
CELL6.OUT16.TMIN	GTP_DUAL.RXCHARISK11
CELL6.OUT17.TMIN	GTP_DUAL.RXCHARISCOMMA11
CELL6.OUT19.TMIN	GTP_DUAL.RXDISPERR11
CELL6.OUT22.TMIN	GTP_DUAL.RXLOSSOFSYNC10
CELL7.IMUX.CLK1	GTP_DUAL.DCLK
CELL7.IMUX.IMUX0.DELAY	GTP_DUAL.RXCDRRESET1
CELL7.IMUX.IMUX4.DELAY	GTP_DUAL.RXBUFRESET1
CELL7.IMUX.IMUX5.DELAY	GTP_DUAL.RXRESET1
CELL7.IMUX.IMUX8.DELAY	GTP_DUAL.RXPOWERDOWN11
CELL7.IMUX.IMUX9.DELAY	GTP_DUAL.RXPOWERDOWN10
CELL7.IMUX.IMUX18.DELAY	GTP_DUAL.LOOPBACK12
CELL7.IMUX.IMUX19.DELAY	GTP_DUAL.LOOPBACK11
CELL7.IMUX.IMUX20.DELAY	GTP_DUAL.LOOPBACK10
CELL7.IMUX.IMUX36.DELAY	CRC32_1.CRCIN7, CRC64_0.CRCIN7
CELL7.IMUX.IMUX37.DELAY	CRC32_1.CRCIN6, CRC64_0.CRCIN6
CELL7.IMUX.IMUX40.DELAY	GTP_DUAL.RXPMASETPHASE1
CELL7.IMUX.IMUX42.DELAY	CRC32_1.CRCIN5, CRC64_0.CRCIN5
CELL7.IMUX.IMUX43.DELAY	CRC32_1.CRCIN4, CRC64_0.CRCIN4
CELL7.IMUX.IMUX44.DELAY	CRC32_1.CRCIN3, CRC64_0.CRCIN3
CELL7.IMUX.IMUX45.DELAY	CRC32_1.CRCIN2, CRC64_0.CRCIN2
CELL7.IMUX.IMUX46.DELAY	CRC32_1.CRCIN1, CRC64_0.CRCIN1
CELL7.IMUX.IMUX47.DELAY	CRC32_1.CRCIN0, CRC64_0.CRCIN0
CELL7.OUT0.TMIN	GTP_DUAL.RXCHBONDO11
CELL7.OUT2.TMIN	GTP_DUAL.RXDATA114
CELL7.OUT3.TMIN	CRC32_1.CRCOUT22
CELL7.OUT4.TMIN	GTP_DUAL.RXCHANREALIGN1
CELL7.OUT6.TMIN	GTP_DUAL.RXCHANBONDSEQ1
CELL7.OUT8.TMIN	GTP_DUAL.RXCHBONDO12
CELL7.OUT9.TMIN	GTP_DUAL.RXDATA112
CELL7.OUT10.TMIN	GTP_DUAL.RXDATA113
CELL7.OUT11.TMIN	GTP_DUAL.RXDATA115
CELL7.OUT12.TMIN	CRC32_1.CRCOUT23
CELL7.OUT17.TMIN	CRC32_1.CRCOUT21
CELL7.OUT18.TMIN	GTP_DUAL.RXCHANISALIGNED1
CELL7.OUT19.TMIN	GTP_DUAL.RXCHBONDO10
CELL7.OUT20.TMIN	GTP_DUAL.RXRECCLK1
CELL7.OUT21.TMIN	CRC32_1.CRCOUT20
CELL8.IMUX.CLK0	GTP_DUAL.TXUSRCLK21
CELL8.IMUX.CLK1	GTP_DUAL.TXUSRCLK1
CELL8.IMUX.IMUX0.DELAY	CRC32_1.CRCRESET
CELL8.IMUX.IMUX2.DELAY	GTP_DUAL.PRBSCNTRESET1
CELL8.IMUX.IMUX11.DELAY	CRC32_1.CRCDATAWIDTH0
CELL8.IMUX.IMUX34.DELAY	CRC32_1.CRCDATAWIDTH1
CELL8.IMUX.IMUX35.DELAY	CRC32_1.CRCDATAVALID
CELL8.IMUX.IMUX44.DELAY	GTP_DUAL.DI15
CELL8.IMUX.IMUX45.DELAY	GTP_DUAL.DI14
CELL8.IMUX.IMUX46.DELAY	GTP_DUAL.DI13
CELL8.IMUX.IMUX47.DELAY	GTP_DUAL.DI12
CELL8.OUT0.TMIN	CRC32_1.CRCOUT19
CELL8.OUT2.TMIN	CRC32_1.CRCOUT13
CELL8.OUT5.TMIN	CRC32_1.CRCOUT18
CELL8.OUT6.TMIN	CRC32_1.CRCOUT12
CELL8.OUT8.TMIN	GTP_DUAL.DO15
CELL8.OUT9.TMIN	CRC32_1.CRCOUT17
CELL8.OUT10.TMIN	CRC32_1.CRCOUT15
CELL8.OUT11.TMIN	CRC32_1.CRCOUT11
CELL8.OUT12.TMIN	GTP_DUAL.DO14
CELL8.OUT13.TMIN	GTP_DUAL.DO12
CELL8.OUT15.TMIN	CRC32_1.CRCOUT10
CELL8.OUT16.TMIN	CRC32_1.CRCOUT14
CELL8.OUT17.TMIN	CRC32_1.CRCOUT9
CELL8.OUT18.TMIN	GTP_DUAL.DO13
CELL8.OUT23.TMIN	CRC32_1.CRCOUT16
CELL9.IMUX.CLK0	GTP_DUAL.RXUSRCLK21
CELL9.IMUX.CLK1	GTP_DUAL.RXUSRCLK1
CELL9.IMUX.IMUX3.DELAY	GTP_DUAL.PMAAMUX0
CELL9.IMUX.IMUX4.DELAY	GTP_DUAL.PMAAMUX1
CELL9.IMUX.IMUX5.DELAY	GTP_DUAL.PMAAMUX2
CELL9.IMUX.IMUX8.DELAY	GTP_DUAL.PLLLKDETEN
CELL9.IMUX.IMUX16.DELAY	GTP_DUAL.GTPTEST2
CELL9.IMUX.IMUX17.DELAY	GTP_DUAL.GTPTEST3
CELL9.IMUX.IMUX18.DELAY	GTP_DUAL.REFCLKPWRDNB
CELL9.IMUX.IMUX19.DELAY	GTP_DUAL.DWE
CELL9.IMUX.IMUX26.DELAY	GTP_DUAL.DADDR6
CELL9.IMUX.IMUX27.DELAY	GTP_DUAL.DADDR5
CELL9.IMUX.IMUX28.DELAY	GTP_DUAL.DADDR4
CELL9.IMUX.IMUX29.DELAY	GTP_DUAL.DADDR3
CELL9.IMUX.IMUX42.DELAY	GTP_DUAL.DI11
CELL9.IMUX.IMUX43.DELAY	GTP_DUAL.DI10
CELL9.IMUX.IMUX44.DELAY	GTP_DUAL.DI9
CELL9.IMUX.IMUX45.DELAY	GTP_DUAL.DI8
CELL9.OUT0.TMIN	CRC32_1.CRCOUT5
CELL9.OUT2.TMIN	GTP_DUAL.TXOUTCLK1
CELL9.OUT3.TMIN	CRC32_1.CRCOUT1
CELL9.OUT4.TMIN	CRC32_1.CRCOUT4
CELL9.OUT6.TMIN	GTP_DUAL.DO9
CELL9.OUT8.TMIN	CRC32_1.CRCOUT8
CELL9.OUT10.TMIN	GTP_DUAL.DO11
CELL9.OUT11.TMIN	CRC32_1.CRCOUT0
CELL9.OUT12.TMIN	CRC32_1.CRCOUT7
CELL9.OUT13.TMIN	CRC32_1.CRCOUT3
CELL9.OUT14.TMIN	CRC32_1.CRCOUT2
CELL9.OUT15.TMIN	GTP_DUAL.DRDY
CELL9.OUT18.TMIN	CRC32_1.CRCOUT6
CELL9.OUT20.TMIN	GTP_DUAL.DO10
CELL9.OUT21.TMIN	GTP_DUAL.DO8
CELL9.OUT23.TMIN	GTP_DUAL.PLLLKDET
CELL10.IMUX.CLK0	GTP_DUAL.RXUSRCLK0
CELL10.IMUX.CLK1	GTP_DUAL.RXUSRCLK20
CELL10.IMUX.IMUX0.DELAY	GTP_DUAL.DI7
CELL10.IMUX.IMUX1.DELAY	GTP_DUAL.DI6
CELL10.IMUX.IMUX2.DELAY	GTP_DUAL.DI5
CELL10.IMUX.IMUX3.DELAY	GTP_DUAL.DI4
CELL10.IMUX.IMUX6.DELAY	GTP_DUAL.INTDATAWIDTH
CELL10.IMUX.IMUX12.DELAY	GTP_DUAL.PMATSTCLKSEL2
CELL10.IMUX.IMUX13.DELAY	GTP_DUAL.PMATSTCLKSEL1
CELL10.IMUX.IMUX14.DELAY	GTP_DUAL.PMATSTCLKSEL0
CELL10.IMUX.IMUX16.DELAY	GTP_DUAL.TXENPMAPHASEALIGN
CELL10.IMUX.IMUX17.DELAY	GTP_DUAL.TXPMASETPHASE
CELL10.IMUX.IMUX24.DELAY	GTP_DUAL.DADDR2
CELL10.IMUX.IMUX31.DELAY	GTP_DUAL.DADDR1
CELL10.IMUX.IMUX32.DELAY	GTP_DUAL.DADDR0
CELL10.IMUX.IMUX33.DELAY	GTP_DUAL.RXENELECIDLERESETB
CELL10.IMUX.IMUX36.DELAY	GTP_DUAL.PLLPOWERDOWN
CELL10.IMUX.IMUX39.DELAY	GTP_DUAL.DEN
CELL10.OUT0.TMIN	GTP_DUAL.DO6
CELL10.OUT2.TMIN	CRC32_2.CRCOUT3
CELL10.OUT4.TMIN	CRC32_2.CRCOUT0
CELL10.OUT6.TMIN	CRC32_2.CRCOUT4
CELL10.OUT7.TMIN	CRC32_2.CRCOUT5
CELL10.OUT8.TMIN	GTP_DUAL.REFCLKOUT
CELL10.OUT9.TMIN	GTP_DUAL.DO5
CELL10.OUT10.TMIN	GTP_DUAL.DO4
CELL10.OUT11.TMIN	CRC32_2.CRCOUT6
CELL10.OUT12.TMIN	GTP_DUAL.DO7
CELL10.OUT13.TMIN	GTP_DUAL.TXOUTCLK0
CELL10.OUT15.TMIN	CRC32_2.CRCOUT7
CELL10.OUT16.TMIN	CRC32_2.CRCOUT2
CELL10.OUT21.TMIN	CRC32_2.CRCOUT8
CELL10.OUT22.TMIN	GTP_DUAL.PMATSTCLK
CELL10.OUT23.TMIN	CRC32_2.CRCOUT1
CELL11.IMUX.CLK0	GTP_DUAL.TXUSRCLK0
CELL11.IMUX.CLK1	GTP_DUAL.TXUSRCLK20
CELL11.IMUX.IMUX0.DELAY	GTP_DUAL.DI3
CELL11.IMUX.IMUX1.DELAY	GTP_DUAL.DI2
CELL11.IMUX.IMUX2.DELAY	GTP_DUAL.DI1
CELL11.IMUX.IMUX3.DELAY	GTP_DUAL.DI0
CELL11.IMUX.IMUX5.DELAY	CRC32_2.CRCRESET
CELL11.IMUX.IMUX13.DELAY	CRC32_2.CRCDATAWIDTH1
CELL11.IMUX.IMUX24.DELAY	CRC32_2.CRCDATAWIDTH0
CELL11.IMUX.IMUX30.DELAY	CRC32_2.CRCDATAVALID
CELL11.IMUX.IMUX36.DELAY	GTP_DUAL.GTPRESET
CELL11.IMUX.IMUX45.DELAY	GTP_DUAL.PRBSCNTRESET0
CELL11.OUT3.TMIN	CRC32_2.CRCOUT18
CELL11.OUT4.TMIN	CRC32_2.CRCOUT10
CELL11.OUT5.TMIN	CRC32_2.CRCOUT12
CELL11.OUT7.TMIN	CRC32_2.CRCOUT19
CELL11.OUT10.TMIN	CRC32_2.CRCOUT16
CELL11.OUT12.TMIN	CRC32_2.CRCOUT9
CELL11.OUT13.TMIN	CRC32_2.CRCOUT13
CELL11.OUT14.TMIN	GTP_DUAL.DO3
CELL11.OUT15.TMIN	GTP_DUAL.DO2
CELL11.OUT16.TMIN	CRC32_2.CRCOUT17
CELL11.OUT17.TMIN	GTP_DUAL.DO1
CELL11.OUT19.TMIN	CRC32_2.CRCOUT14
CELL11.OUT21.TMIN	GTP_DUAL.DO0
CELL11.OUT22.TMIN	CRC32_2.CRCOUT11
CELL11.OUT23.TMIN	CRC32_2.CRCOUT15
CELL12.IMUX.CLK0	GTP_DUAL.GREFCLK
CELL12.IMUX.IMUX0.DELAY	CRC32_2.CRCIN0, CRC64_1.CRCIN0
CELL12.IMUX.IMUX1.DELAY	CRC32_2.CRCIN1, CRC64_1.CRCIN1
CELL12.IMUX.IMUX2.DELAY	CRC32_2.CRCIN2, CRC64_1.CRCIN2
CELL12.IMUX.IMUX7.DELAY	GTP_DUAL.RXPMASETPHASE0
CELL12.IMUX.IMUX9.DELAY	CRC32_2.CRCIN3, CRC64_1.CRCIN3
CELL12.IMUX.IMUX10.DELAY	CRC32_2.CRCIN6, CRC64_1.CRCIN6
CELL12.IMUX.IMUX11.DELAY	CRC32_2.CRCIN7, CRC64_1.CRCIN7
CELL12.IMUX.IMUX15.DELAY	GTP_DUAL.LOOPBACK00
CELL12.IMUX.IMUX16.DELAY	GTP_DUAL.LOOPBACK01
CELL12.IMUX.IMUX17.DELAY	GTP_DUAL.LOOPBACK02
CELL12.IMUX.IMUX35.DELAY	CRC32_2.CRCIN5, CRC64_1.CRCIN5
CELL12.IMUX.IMUX38.DELAY	GTP_DUAL.RXPOWERDOWN00
CELL12.IMUX.IMUX39.DELAY	GTP_DUAL.RXPOWERDOWN01
CELL12.IMUX.IMUX42.DELAY	GTP_DUAL.RXRESET0
CELL12.IMUX.IMUX43.DELAY	GTP_DUAL.RXBUFRESET0
CELL12.IMUX.IMUX45.DELAY	CRC32_2.CRCIN4, CRC64_1.CRCIN4
CELL12.IMUX.IMUX47.DELAY	GTP_DUAL.RXCDRRESET0
CELL12.OUT1.TMIN	GTP_DUAL.RXCHANBONDSEQ0
CELL12.OUT3.TMIN	GTP_DUAL.RXCHANREALIGN0
CELL12.OUT4.TMIN	CRC32_2.CRCOUT22
CELL12.OUT5.TMIN	GTP_DUAL.RXDATA014
CELL12.OUT7.TMIN	GTP_DUAL.RXCHBONDO01
CELL12.OUT8.TMIN	CRC32_2.CRCOUT20
CELL12.OUT13.TMIN	GTP_DUAL.RXRECCLK0
CELL12.OUT14.TMIN	GTP_DUAL.RXCHBONDO00
CELL12.OUT15.TMIN	GTP_DUAL.RXCHANISALIGNED0
CELL12.OUT17.TMIN	CRC32_2.CRCOUT23
CELL12.OUT18.TMIN	CRC32_2.CRCOUT21
CELL12.OUT20.TMIN	GTP_DUAL.RXDATA012
CELL12.OUT21.TMIN	GTP_DUAL.RXCHBONDO02
CELL12.OUT22.TMIN	GTP_DUAL.RXDATA015
CELL12.OUT23.TMIN	GTP_DUAL.RXDATA013
CELL13.IMUX.CLK0	CRC32_2.CRCCLK
CELL13.IMUX.IMUX4.DELAY	CRC32_2.CRCIN12, CRC64_1.CRCIN12
CELL13.IMUX.IMUX5.DELAY	CRC32_2.CRCIN13, CRC64_1.CRCIN13
CELL13.IMUX.IMUX6.DELAY	CRC32_2.CRCIN8, CRC64_1.CRCIN8
CELL13.IMUX.IMUX7.DELAY	CRC32_2.CRCIN9, CRC64_1.CRCIN9
CELL13.IMUX.IMUX8.DELAY	CRC32_2.CRCIN10, CRC64_1.CRCIN10
CELL13.IMUX.IMUX9.DELAY	CRC32_2.CRCIN11, CRC64_1.CRCIN11
CELL13.IMUX.IMUX10.DELAY	CRC32_2.CRCIN14, CRC64_1.CRCIN14
CELL13.IMUX.IMUX11.DELAY	CRC32_2.CRCIN15, CRC64_1.CRCIN15
CELL13.IMUX.IMUX23.DELAY	GTP_DUAL.RXENCHANSYNC0
CELL13.IMUX.IMUX31.DELAY	GTP_DUAL.TSTPWRDN00
CELL13.IMUX.IMUX32.DELAY	GTP_DUAL.TSTPWRDN01
CELL13.IMUX.IMUX33.DELAY	GTP_DUAL.TSTPWRDN02
CELL13.IMUX.IMUX34.DELAY	GTP_DUAL.TSTPWRDN03
CELL13.IMUX.IMUX35.DELAY	GTP_DUAL.TSTPWRDN04
CELL13.IMUX.IMUX41.DELAY	GTP_DUAL.RXDEC8B10BUSE0
CELL13.IMUX.IMUX44.DELAY	GTP_DUAL.RXCHBONDI00
CELL13.IMUX.IMUX45.DELAY	GTP_DUAL.RXCHBONDI01
CELL13.IMUX.IMUX46.DELAY	GTP_DUAL.RXCHBONDI02
CELL13.OUT1.TMIN	GTP_DUAL.RXRUNDISP01
CELL13.OUT3.TMIN	GTP_DUAL.RXNOTINTABLE01
CELL13.OUT5.TMIN	GTP_DUAL.RXDATA010
CELL13.OUT7.TMIN	GTP_DUAL.RXVALID0
CELL13.OUT11.TMIN	GTP_DUAL.RXLOSSOFSYNC00
CELL13.OUT12.TMIN	GTP_DUAL.RXCHARISCOMMA01
CELL13.OUT13.TMIN	GTP_DUAL.RXCHARISK01
CELL13.OUT14.TMIN	GTP_DUAL.RXDISPERR01
CELL13.OUT17.TMIN	CRC32_2.CRCOUT26
CELL13.OUT18.TMIN	CRC32_2.CRCOUT24
CELL13.OUT19.TMIN	CRC32_2.CRCOUT25
CELL13.OUT20.TMIN	GTP_DUAL.RXDATA08
CELL13.OUT21.TMIN	GTP_DUAL.RXLOSSOFSYNC01
CELL13.OUT22.TMIN	GTP_DUAL.RXDATA011
CELL13.OUT23.TMIN	GTP_DUAL.RXDATA09
CELL14.IMUX.IMUX4.DELAY	CRC32_2.CRCIN20, CRC64_1.CRCIN20
CELL14.IMUX.IMUX5.DELAY	CRC32_2.CRCIN21, CRC64_1.CRCIN21
CELL14.IMUX.IMUX6.DELAY	CRC32_2.CRCIN16, CRC64_1.CRCIN16
CELL14.IMUX.IMUX7.DELAY	CRC32_2.CRCIN17, CRC64_1.CRCIN17
CELL14.IMUX.IMUX8.DELAY	CRC32_2.CRCIN18, CRC64_1.CRCIN18
CELL14.IMUX.IMUX9.DELAY	CRC32_2.CRCIN19, CRC64_1.CRCIN19
CELL14.IMUX.IMUX10.DELAY	CRC32_2.CRCIN22, CRC64_1.CRCIN22
CELL14.IMUX.IMUX11.DELAY	CRC32_2.CRCIN23, CRC64_1.CRCIN23
CELL14.IMUX.IMUX42.DELAY	GTP_DUAL.RXEQPOLE00
CELL14.IMUX.IMUX43.DELAY	GTP_DUAL.RXEQPOLE01
CELL14.IMUX.IMUX44.DELAY	GTP_DUAL.RXEQPOLE02
CELL14.IMUX.IMUX45.DELAY	GTP_DUAL.RXEQPOLE03
CELL14.IMUX.IMUX46.DELAY	GTP_DUAL.RXEQMIX00
CELL14.IMUX.IMUX47.DELAY	GTP_DUAL.RXEQMIX01
CELL14.OUT1.TMIN	GTP_DUAL.RXRUNDISP00
CELL14.OUT3.TMIN	GTP_DUAL.RXNOTINTABLE00
CELL14.OUT4.TMIN	CRC32_2.CRCOUT28
CELL14.OUT5.TMIN	GTP_DUAL.RXDATA06
CELL14.OUT6.TMIN	CRC32_2.CRCOUT29
CELL14.OUT7.TMIN	GTP_DUAL.RXBYTEISALIGNED0
CELL14.OUT12.TMIN	GTP_DUAL.RXCHARISCOMMA00
CELL14.OUT13.TMIN	GTP_DUAL.RXCHARISK00
CELL14.OUT14.TMIN	GTP_DUAL.RXDISPERR00
CELL14.OUT15.TMIN	GTP_DUAL.RXBYTEREALIGN0
CELL14.OUT17.TMIN	CRC32_2.CRCOUT30
CELL14.OUT18.TMIN	CRC32_2.CRCOUT27
CELL14.OUT20.TMIN	GTP_DUAL.RXDATA04
CELL14.OUT21.TMIN	GTP_DUAL.RXCOMMADET0
CELL14.OUT22.TMIN	GTP_DUAL.RXDATA07
CELL14.OUT23.TMIN	GTP_DUAL.RXDATA05
CELL15.IMUX.IMUX4.DELAY	CRC32_2.CRCIN28, CRC64_1.CRCIN28
CELL15.IMUX.IMUX5.DELAY	CRC32_2.CRCIN29, CRC64_1.CRCIN29
CELL15.IMUX.IMUX6.DELAY	CRC32_2.CRCIN24, CRC64_1.CRCIN24
CELL15.IMUX.IMUX7.DELAY	CRC32_2.CRCIN25, CRC64_1.CRCIN25
CELL15.IMUX.IMUX8.DELAY	CRC32_2.CRCIN26, CRC64_1.CRCIN26
CELL15.IMUX.IMUX9.DELAY	CRC32_2.CRCIN27, CRC64_1.CRCIN27
CELL15.IMUX.IMUX10.DELAY	CRC32_2.CRCIN30, CRC64_1.CRCIN30
CELL15.IMUX.IMUX11.DELAY	CRC32_2.CRCIN31, CRC64_1.CRCIN31
CELL15.IMUX.IMUX14.DELAY	GTP_DUAL.RXENSAMPLEALIGN0
CELL15.IMUX.IMUX28.DELAY	GTP_DUAL.RXENPRBSTST00
CELL15.IMUX.IMUX29.DELAY	GTP_DUAL.RXENPRBSTST01
CELL15.IMUX.IMUX30.DELAY	GTP_DUAL.RXCOMMADETUSE0
CELL15.IMUX.IMUX37.DELAY	GTP_DUAL.RXDATAWIDTH0
CELL15.IMUX.IMUX41.DELAY	GTP_DUAL.RXPOLARITY0
CELL15.IMUX.IMUX42.DELAY	GTP_DUAL.RXENEQB0
CELL15.IMUX.IMUX44.DELAY	GTP_DUAL.RXSLIDE0
CELL15.IMUX.IMUX45.DELAY	GTP_DUAL.RXENMCOMMAALIGN0
CELL15.IMUX.IMUX46.DELAY	GTP_DUAL.RXENPCOMMAALIGN0
CELL15.OUT1.TMIN	GTP_DUAL.RXBUFSTATUS00
CELL15.OUT3.TMIN	GTP_DUAL.RXOVERSAMPLEERR0
CELL15.OUT5.TMIN	GTP_DUAL.RXDATA02
CELL15.OUT7.TMIN	GTP_DUAL.RESETDONE0
CELL15.OUT12.TMIN	GTP_DUAL.PHYSTATUS0
CELL15.OUT13.TMIN	GTP_DUAL.RXBUFSTATUS01
CELL15.OUT14.TMIN	GTP_DUAL.RXBUFSTATUS02
CELL15.OUT18.TMIN	CRC32_2.CRCOUT31
CELL15.OUT20.TMIN	GTP_DUAL.RXDATA00
CELL15.OUT22.TMIN	GTP_DUAL.RXDATA03
CELL15.OUT23.TMIN	GTP_DUAL.RXDATA01
CELL16.IMUX.IMUX1.DELAY	CRC32_3.CRCDATAWIDTH1, CRC64_1.CRCDATAWIDTH1
CELL16.IMUX.IMUX6.DELAY	CRC32_3.CRCDATAWIDTH0, CRC64_1.CRCDATAWIDTH0
CELL16.IMUX.IMUX7.DELAY	CRC32_3.CRCDATAVALID, CRC64_1.CRCDATAVALID
CELL16.IMUX.IMUX8.DELAY	CRC32_2.CRCDATAWIDTH2, CRC32_3.CRCDATAWIDTH2, CRC64_1.CRCDATAWIDTH2
CELL16.IMUX.IMUX10.DELAY	CRC32_3.CRCIN6, CRC64_1.CRCIN38
CELL16.IMUX.IMUX11.DELAY	CRC32_3.CRCIN7, CRC64_1.CRCIN39
CELL16.IMUX.IMUX28.DELAY	GTP_DUAL.TXINHIBIT0
CELL16.IMUX.IMUX30.DELAY	GTP_DUAL.TXENC8B10BUSE0
CELL16.IMUX.IMUX31.DELAY	GTP_DUAL.TXDATAWIDTH0
CELL16.IMUX.IMUX35.DELAY	CRC32_3.CRCIN5, CRC64_1.CRCIN37
CELL16.IMUX.IMUX36.DELAY	CRC32_3.CRCIN0, CRC64_1.CRCIN32
CELL16.IMUX.IMUX37.DELAY	CRC32_3.CRCIN1, CRC64_1.CRCIN33
CELL16.IMUX.IMUX38.DELAY	CRC32_3.CRCIN2, CRC64_1.CRCIN34
CELL16.IMUX.IMUX39.DELAY	CRC32_3.CRCIN3, CRC64_1.CRCIN35
CELL16.IMUX.IMUX40.DELAY	CRC32_3.CRCIN4, CRC64_1.CRCIN36
CELL16.IMUX.IMUX42.DELAY	GTP_DUAL.TXDATA015
CELL16.IMUX.IMUX43.DELAY	GTP_DUAL.TXDATA014
CELL16.IMUX.IMUX44.DELAY	GTP_DUAL.TXDATA013
CELL16.IMUX.IMUX45.DELAY	GTP_DUAL.TXDATA012
CELL16.IMUX.IMUX47.DELAY	GTP_DUAL.TXRESET0
CELL16.OUT3.TMIN	CRC32_3.CRCOUT1, CRC64_1.CRCOUT1
CELL16.OUT5.TMIN	GTP_DUAL.RXCLKCORCNT00
CELL16.OUT7.TMIN	GTP_DUAL.RXSTATUS01
CELL16.OUT13.TMIN	CRC32_3.CRCOUT0, CRC64_1.CRCOUT0
CELL16.OUT14.TMIN	GTP_DUAL.RXSTATUS00
CELL16.OUT15.TMIN	CRC32_3.CRCOUT2, CRC64_1.CRCOUT2
CELL16.OUT20.TMIN	GTP_DUAL.RXCLKCORCNT02
CELL16.OUT21.TMIN	GTP_DUAL.RXSTATUS02
CELL16.OUT22.TMIN	GTP_DUAL.RXPRBSERR0
CELL16.OUT23.TMIN	GTP_DUAL.RXCLKCORCNT01
CELL17.IMUX.IMUX0.DELAY	CRC32_3.CRCRESET, CRC64_1.CRCRESET
CELL17.IMUX.IMUX10.DELAY	GTP_DUAL.TXPOWERDOWN00
CELL17.IMUX.IMUX11.DELAY	GTP_DUAL.TXPOWERDOWN01
CELL17.IMUX.IMUX15.DELAY	GTP_DUAL.TXPOLARITY0
CELL17.IMUX.IMUX26.DELAY	GTP_DUAL.TXCHARDISPVAL01
CELL17.IMUX.IMUX27.DELAY	GTP_DUAL.TXCHARDISPMODE01
CELL17.IMUX.IMUX28.DELAY	GTP_DUAL.TXCHARISK01
CELL17.IMUX.IMUX29.DELAY	GTP_DUAL.TXBYPASS8B10B01
CELL17.IMUX.IMUX30.DELAY	CRC32_3.CRCIN8, CRC64_1.CRCIN40
CELL17.IMUX.IMUX31.DELAY	CRC32_3.CRCIN9, CRC64_1.CRCIN41
CELL17.IMUX.IMUX32.DELAY	CRC32_3.CRCIN10, CRC64_1.CRCIN42
CELL17.IMUX.IMUX33.DELAY	CRC32_3.CRCIN11, CRC64_1.CRCIN43
CELL17.IMUX.IMUX34.DELAY	CRC32_3.CRCIN12, CRC64_1.CRCIN44
CELL17.IMUX.IMUX35.DELAY	CRC32_3.CRCIN13, CRC64_1.CRCIN45
CELL17.IMUX.IMUX42.DELAY	GTP_DUAL.TXDATA011
CELL17.IMUX.IMUX43.DELAY	GTP_DUAL.TXDATA010
CELL17.IMUX.IMUX44.DELAY	GTP_DUAL.TXDATA09
CELL17.IMUX.IMUX45.DELAY	GTP_DUAL.TXDATA08
CELL17.IMUX.IMUX46.DELAY	CRC32_3.CRCIN14, CRC64_1.CRCIN46
CELL17.IMUX.IMUX47.DELAY	CRC32_3.CRCIN15, CRC64_1.CRCIN47
CELL17.OUT1.TMIN	CRC32_3.CRCOUT4, CRC64_1.CRCOUT4
CELL17.OUT2.TMIN	GTP_DUAL.TXRUNDISP01
CELL17.OUT5.TMIN	GTP_DUAL.RXELECIDLE0
CELL17.OUT6.TMIN	CRC32_3.CRCOUT9, CRC64_1.CRCOUT9
CELL17.OUT8.TMIN	CRC32_3.CRCOUT3, CRC64_1.CRCOUT3
CELL17.OUT13.TMIN	CRC32_3.CRCOUT5, CRC64_1.CRCOUT5
CELL17.OUT14.TMIN	CRC32_3.CRCOUT7, CRC64_1.CRCOUT7
CELL17.OUT15.TMIN	CRC32_3.CRCOUT10, CRC64_1.CRCOUT10
CELL17.OUT17.TMIN	CRC32_3.CRCOUT11, CRC64_1.CRCOUT11
CELL17.OUT18.TMIN	GTP_DUAL.TXKERR01
CELL17.OUT19.TMIN	CRC32_3.CRCOUT6, CRC64_1.CRCOUT6
CELL17.OUT20.TMIN	CRC32_3.CRCOUT8, CRC64_1.CRCOUT8
CELL18.IMUX.CLK0	CRC32_3.CRCCLK, CRC64_1.CRCCLK
CELL18.IMUX.IMUX4.DELAY	GTP_DUAL.TXCOMSTART0
CELL18.IMUX.IMUX5.DELAY	GTP_DUAL.TXCOMTYPE0
CELL18.IMUX.IMUX6.DELAY	CRC32_3.CRCIN16, CRC64_1.CRCIN48
CELL18.IMUX.IMUX7.DELAY	CRC32_3.CRCIN17, CRC64_1.CRCIN49
CELL18.IMUX.IMUX8.DELAY	CRC32_3.CRCIN18, CRC64_1.CRCIN50
CELL18.IMUX.IMUX10.DELAY	CRC32_3.CRCIN20, CRC64_1.CRCIN52
CELL18.IMUX.IMUX11.DELAY	CRC32_3.CRCIN21, CRC64_1.CRCIN53
CELL18.IMUX.IMUX15.DELAY	GTP_DUAL.TXPREEMPHASIS00
CELL18.IMUX.IMUX16.DELAY	GTP_DUAL.TXPREEMPHASIS01
CELL18.IMUX.IMUX17.DELAY	GTP_DUAL.TXPREEMPHASIS02
CELL18.IMUX.IMUX21.DELAY	CRC32_3.CRCIN19, CRC64_1.CRCIN51
CELL18.IMUX.IMUX24.DELAY	GTP_DUAL.TXENPRBSTST00
CELL18.IMUX.IMUX25.DELAY	GTP_DUAL.TXENPRBSTST01
CELL18.IMUX.IMUX26.DELAY	GTP_DUAL.TXCHARDISPVAL00
CELL18.IMUX.IMUX27.DELAY	GTP_DUAL.TXCHARDISPMODE00
CELL18.IMUX.IMUX29.DELAY	GTP_DUAL.TXBYPASS8B10B00
CELL18.IMUX.IMUX30.DELAY	GTP_DUAL.TSTPWRDNOVRD0
CELL18.IMUX.IMUX40.DELAY	CRC32_3.CRCIN22, CRC64_1.CRCIN54
CELL18.IMUX.IMUX41.DELAY	CRC32_3.CRCIN23, CRC64_1.CRCIN55
CELL18.IMUX.IMUX42.DELAY	GTP_DUAL.TXDATA07
CELL18.IMUX.IMUX43.DELAY	GTP_DUAL.TXDATA06
CELL18.IMUX.IMUX44.DELAY	GTP_DUAL.TXDATA05
CELL18.IMUX.IMUX45.DELAY	GTP_DUAL.TXDATA04
CELL18.IMUX.IMUX46.DELAY	GTP_DUAL.TXCHARISK00
CELL18.OUT0.TMIN	GTP_DUAL.TXBUFSTATUS00
CELL18.OUT3.TMIN	CRC32_3.CRCOUT16, CRC64_1.CRCOUT16
CELL18.OUT5.TMIN	GTP_DUAL.TXKERR00
CELL18.OUT6.TMIN	CRC32_3.CRCOUT15, CRC64_1.CRCOUT15
CELL18.OUT7.TMIN	CRC32_3.CRCOUT17, CRC64_1.CRCOUT17
CELL18.OUT9.TMIN	CRC32_3.CRCOUT13, CRC64_1.CRCOUT13
CELL18.OUT10.TMIN	CRC32_3.CRCOUT14, CRC64_1.CRCOUT14
CELL18.OUT12.TMIN	CRC32_3.CRCOUT12, CRC64_1.CRCOUT12
CELL18.OUT17.TMIN	CRC32_3.CRCOUT18, CRC64_1.CRCOUT18
CELL18.OUT21.TMIN	CRC32_3.CRCOUT19, CRC64_1.CRCOUT19
CELL18.OUT22.TMIN	GTP_DUAL.TXRUNDISP00
CELL18.OUT23.TMIN	GTP_DUAL.TXBUFSTATUS01
CELL19.IMUX.IMUX10.DELAY	CRC32_3.CRCIN28, CRC64_1.CRCIN60
CELL19.IMUX.IMUX11.DELAY	CRC32_3.CRCIN29, CRC64_1.CRCIN61
CELL19.IMUX.IMUX17.DELAY	GTP_DUAL.SCANEN
CELL19.IMUX.IMUX18.DELAY	GTP_DUAL.TXELECIDLE0
CELL19.IMUX.IMUX19.DELAY	GTP_DUAL.TXDETECTRX0
CELL19.IMUX.IMUX21.DELAY	CRC32_3.CRCIN27, CRC64_1.CRCIN59
CELL19.IMUX.IMUX24.DELAY	CRC32_3.CRCIN24, CRC64_1.CRCIN56
CELL19.IMUX.IMUX25.DELAY	CRC32_3.CRCIN25, CRC64_1.CRCIN57
CELL19.IMUX.IMUX26.DELAY	CRC32_3.CRCIN26, CRC64_1.CRCIN58
CELL19.IMUX.IMUX27.DELAY	GTP_DUAL.GTPTEST1
CELL19.IMUX.IMUX28.DELAY	GTP_DUAL.RXELECIDLERESET0
CELL19.IMUX.IMUX30.DELAY	GTP_DUAL.TXBUFDIFFCTRL00
CELL19.IMUX.IMUX31.DELAY	GTP_DUAL.TXBUFDIFFCTRL01
CELL19.IMUX.IMUX32.DELAY	GTP_DUAL.TXBUFDIFFCTRL02
CELL19.IMUX.IMUX33.DELAY	GTP_DUAL.TXDIFFCTRL00
CELL19.IMUX.IMUX34.DELAY	GTP_DUAL.TXDIFFCTRL01
CELL19.IMUX.IMUX35.DELAY	GTP_DUAL.TXDIFFCTRL02
CELL19.IMUX.IMUX40.DELAY	CRC32_3.CRCIN30, CRC64_1.CRCIN62
CELL19.IMUX.IMUX41.DELAY	CRC32_3.CRCIN31, CRC64_1.CRCIN63
CELL19.IMUX.IMUX42.DELAY	GTP_DUAL.TXDATA03
CELL19.IMUX.IMUX43.DELAY	GTP_DUAL.TXDATA02
CELL19.IMUX.IMUX44.DELAY	GTP_DUAL.TXDATA01
CELL19.IMUX.IMUX45.DELAY	GTP_DUAL.TXDATA00
CELL19.IMUX.IMUX47.DELAY	GTP_DUAL.SCANIN
CELL19.OUT1.TMIN	CRC32_3.CRCOUT22, CRC64_1.CRCOUT22
CELL19.OUT3.TMIN	CRC32_3.CRCOUT28, CRC64_1.CRCOUT28
CELL19.OUT4.TMIN	CRC32_3.CRCOUT21, CRC64_1.CRCOUT21
CELL19.OUT5.TMIN	CRC32_3.CRCOUT23, CRC64_1.CRCOUT23
CELL19.OUT6.TMIN	CRC32_3.CRCOUT27, CRC64_1.CRCOUT27
CELL19.OUT7.TMIN	CRC32_3.CRCOUT29, CRC64_1.CRCOUT29
CELL19.OUT10.TMIN	CRC32_3.CRCOUT26, CRC64_1.CRCOUT26
CELL19.OUT11.TMIN	CRC32_3.CRCOUT30, CRC64_1.CRCOUT30
CELL19.OUT12.TMIN	CRC32_3.CRCOUT20, CRC64_1.CRCOUT20
CELL19.OUT19.TMIN	CRC32_3.CRCOUT24, CRC64_1.CRCOUT24
CELL19.OUT20.TMIN	CRC32_3.CRCOUT25, CRC64_1.CRCOUT25
CELL19.OUT21.TMIN	CRC32_3.CRCOUT31, CRC64_1.CRCOUT31

Bitstream

virtex5 GTP rect R0
Bit	Frame
Bit

virtex5 GTP rect R1
Bit	Frame
Bit

virtex5 GTP rect R2
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[12]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[13]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[14]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[15]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[16]	-
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[17]	-
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
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B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
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B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[20]	-
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[21]	-
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[22]	-
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[23]	-
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[24]	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[25]	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[26]	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[27]	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[28]	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[29]	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[30]	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[31]	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:ENABLE64
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex5 GTP rect R3
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[0]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[1]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[2]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[3]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[4]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[5]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[6]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[7]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[8]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[9]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[10]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_0:CRC_INIT[11]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex5 GTP rect R4
Bit	Frame
Bit

virtex5 GTP rect R5
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[2] GTP_DUAL:DRP07[14]	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[3] GTP_DUAL:DRP07[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[1] GTP_DUAL:DRP07[13]	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[0] GTP_DUAL:DRP07[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[10] GTP_DUAL:PMA_RX_CFG_1[7]	GTP_DUAL:DRP07[11] GTP_DUAL:PMA_RX_CFG_1[6]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[9] GTP_DUAL:PMA_RX_CFG_1[8]	GTP_DUAL:DRP07[8] GTP_DUAL:PMA_RX_CFG_1[9]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[6] GTP_DUAL:PMA_RX_CFG_1[23]	GTP_DUAL:DRP07[7] GTP_DUAL:PMA_RX_CFG_1[10]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[5] GTP_DUAL:PMA_RX_CFG_1[2]	GTP_DUAL:DRP07[4] GTP_DUAL:PMA_RX_CFG_1[3]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[2] GTP_DUAL:PMA_RX_CFG_1[5]	GTP_DUAL:DRP07[3] GTP_DUAL:PMA_RX_CFG_1[4]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP07[1] GTP_DUAL:RX_CDR_FORCE_ROTATE_1	GTP_DUAL:DRP07[0] GTP_DUAL:PMA_RX_CFG_0[13]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[14] GTP_DUAL:PMA_RX_CFG_1[15]	GTP_DUAL:DRP06[15] GTP_DUAL:PMA_RX_CFG_1[14]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[13] GTP_DUAL:PMA_RX_CFG_1[16]	GTP_DUAL:DRP06[12] GTP_DUAL:PMA_RX_CFG_1[17]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[10] GTP_DUAL:PMA_RX_CFG_1[19]	GTP_DUAL:DRP06[11] GTP_DUAL:PMA_RX_CFG_1[18]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[9] GTP_DUAL:PMA_RX_CFG_1[20]	GTP_DUAL:DRP06[8] GTP_DUAL:PMA_RX_CFG_1[21]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[6] GTP_DUAL:PMA_RX_CFG_0[11]	GTP_DUAL:DRP06[7] GTP_DUAL:PMA_RX_CFG_1[22]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[5] GTP_DUAL:PMA_RX_CFG_1[0]	GTP_DUAL:DRP06[4] GTP_DUAL:PMA_RX_CFG_1[1]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP06[2] GTP_DUAL:PMA_RX_CFG_1[12]	GTP_DUAL:DRP06[3] GTP_DUAL:PMA_RX_CFG_1[24]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:AC_CAP_DIS_1 GTP_DUAL:DRP06[1]	GTP_DUAL:DRP06[0] GTP_DUAL:RCV_TERM_MID_1
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[14] GTP_DUAL:RCV_TERM_VTTRX_1	GTP_DUAL:DRP05[15] GTP_DUAL:RCV_TERM_GND_1
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[13] GTP_DUAL:PMA_COM_CFG[22]	GTP_DUAL:DRP05[12] GTP_DUAL:PMA_COM_CFG[23]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[10] GTP_DUAL:PMA_COM_CFG[25]	GTP_DUAL:DRP05[11] GTP_DUAL:PMA_COM_CFG[24]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[9] GTP_DUAL:PMA_COM_CFG[26]	GTP_DUAL:DRP05[8] GTP_DUAL:PMA_COM_CFG[21]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[6]	GTP_DUAL:DRP05[7]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[5] GTP_DUAL:SYS_CLK_EN	GTP_DUAL:DRP05[4] GTP_DUAL:PLL_TXDIVSEL_OUT_1[0]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[2] GTP_DUAL:TX_DIFF_BOOST_1	GTP_DUAL:DRP05[3] GTP_DUAL:PLL_TXDIVSEL_OUT_1[1]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP05[1] GTP_DUAL:PLLLKDET_CFG[0]	GTP_DUAL:DRP05[0] GTP_DUAL:PLLLKDET_CFG[1]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[14]	GTP_DUAL:DRP04[15] GTP_DUAL:PLLLKDET_CFG[2]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[13] GTP_DUAL:PLL_DIVSEL_REF[0]	GTP_DUAL:DRP04[12] GTP_DUAL:PLL_DIVSEL_REF[4]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[10] GTP_DUAL:PLL_DIVSEL_REF[2]	GTP_DUAL:DRP04[11] GTP_DUAL:PLL_DIVSEL_REF[3]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[9] GTP_DUAL:PLL_DIVSEL_REF[1]	GTP_DUAL:DRP04[8] GTP_DUAL:MUX.CLKOUT_NORTH[0]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[6] GTP_DUAL:MUX.CLKIN[0]	GTP_DUAL:DRP04[7] GTP_DUAL:MUX.CLKOUT_SOUTH[0]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[5] GTP_DUAL:MUX.CLKIN[1]	GTP_DUAL:DRP04[4] GTP_DUAL:MUX.CLKIN[2]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[2]	GTP_DUAL:CLKINDC_B GTP_DUAL:DRP04[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP04[1]	GTP_DUAL:DRP04[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[14]	GTP_DUAL:DRP03[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[13]	GTP_DUAL:DRP03[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[10]	GTP_DUAL:DRP03[11]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[9]	GTP_DUAL:DRP03[8]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[6]	GTP_DUAL:DRP03[7]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[5]	GTP_DUAL:DRP03[4]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[2]	GTP_DUAL:DRP03[3]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP03[1]	GTP_DUAL:DRP03[0]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[14]	GTP_DUAL:DRP02[15]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[13]	GTP_DUAL:DRP02[12]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[10]	GTP_DUAL:DRP02[11]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[9]	GTP_DUAL:DRP02[8]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[6]	GTP_DUAL:DRP02[7]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[5]	GTP_DUAL:DRP02[4]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[2]	GTP_DUAL:DRP02[3]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP02[1]	GTP_DUAL:DRP02[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[14]	GTP_DUAL:DRP01[15]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[13]	GTP_DUAL:DRP01[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[10]	GTP_DUAL:DRP01[11]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[9]	GTP_DUAL:DRP01[8]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[6]	GTP_DUAL:DRP01[7]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[5]	GTP_DUAL:DRP01[4]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[2]	GTP_DUAL:DRP01[3]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP01[1]	GTP_DUAL:DRP01[0]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[14]	GTP_DUAL:DRP00[15]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[13]	GTP_DUAL:DRP00[12]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[10]	GTP_DUAL:DRP00[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[9]	GTP_DUAL:DRP00[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[6]	GTP_DUAL:DRP00[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[5]	GTP_DUAL:DRP00[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[2]	GTP_DUAL:DRP00[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP00[1]	GTP_DUAL:DRP00[0]

virtex5 GTP rect R6
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[14] GTP_DUAL:SATA_MAX_WAKE_1[1]	GTP_DUAL:DRP0F[15] GTP_DUAL:SATA_MAX_WAKE_1[0]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[13] GTP_DUAL:SATA_MAX_WAKE_1[2]	GTP_DUAL:DRP0F[12] GTP_DUAL:SATA_MAX_WAKE_1[3]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[10] GTP_DUAL:SATA_MAX_WAKE_1[5]	GTP_DUAL:DRP0F[11] GTP_DUAL:SATA_MAX_WAKE_1[4]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[9] GTP_DUAL:SATA_MAX_INIT_1[0]	GTP_DUAL:DRP0F[8] GTP_DUAL:SATA_MAX_INIT_1[1]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[6] GTP_DUAL:SATA_MAX_INIT_1[3]	GTP_DUAL:DRP0F[7] GTP_DUAL:SATA_MAX_INIT_1[2]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[5] GTP_DUAL:SATA_MAX_INIT_1[4]	GTP_DUAL:DRP0F[4] GTP_DUAL:SATA_MAX_INIT_1[5]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[2] GTP_DUAL:SATA_MAX_BURST_1[1]	GTP_DUAL:DRP0F[3] GTP_DUAL:SATA_MAX_BURST_1[0]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0F[1] GTP_DUAL:SATA_MAX_BURST_1[2]	GTP_DUAL:DRP0F[0] GTP_DUAL:SATA_MAX_BURST_1[3]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[14] GTP_DUAL:SATA_MAX_BURST_1[5]	GTP_DUAL:DRP0E[15] GTP_DUAL:SATA_MAX_BURST_1[4]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[13] GTP_DUAL:SATA_IDLE_VAL_1[0]	GTP_DUAL:DRP0E[12] GTP_DUAL:SATA_IDLE_VAL_1[1]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[10] GTP_DUAL:SATA_BURST_VAL_1[0]	GTP_DUAL:DRP0E[11] GTP_DUAL:SATA_IDLE_VAL_1[2]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[9] GTP_DUAL:SATA_BURST_VAL_1[1]	GTP_DUAL:DRP0E[8] GTP_DUAL:SATA_BURST_VAL_1[2]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[6] GTP_DUAL:RX_STATUS_FMT_1[0]	GTP_DUAL:DRP0E[7] GTP_DUAL:RX_XCLK_SEL_1[0]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[5] GTP_DUAL:RX_SLIDE_MODE_1[0]	GTP_DUAL:DRP0E[4] GTP_DUAL:RX_LOS_THRESHOLD_1[0]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[2] GTP_DUAL:RX_LOS_THRESHOLD_1[2]	GTP_DUAL:DRP0E[3] GTP_DUAL:RX_LOS_THRESHOLD_1[1]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0E[1] GTP_DUAL:RX_LOSS_OF_SYNC_FSM_1	GTP_DUAL:DRP0E[0] GTP_DUAL:RX_LOS_INVALID_INCR_1[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[14] GTP_DUAL:RX_LOS_INVALID_INCR_1[2]	GTP_DUAL:DRP0D[15] GTP_DUAL:RX_LOS_INVALID_INCR_1[1]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[13] GTP_DUAL:RX_DECODE_SEQ_MATCH_1	GTP_DUAL:DRP0D[12] GTP_DUAL:RX_BUFFER_USE_1
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[10] GTP_DUAL:PRBS_ERR_THRESHOLD_1[1]	GTP_DUAL:DRP0D[11] GTP_DUAL:PRBS_ERR_THRESHOLD_1[0]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[9] GTP_DUAL:PRBS_ERR_THRESHOLD_1[2]	GTP_DUAL:DRP0D[8] GTP_DUAL:PRBS_ERR_THRESHOLD_1[3]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[6] GTP_DUAL:PRBS_ERR_THRESHOLD_1[5]	GTP_DUAL:DRP0D[7] GTP_DUAL:PRBS_ERR_THRESHOLD_1[4]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[5] GTP_DUAL:PRBS_ERR_THRESHOLD_1[6]	GTP_DUAL:DRP0D[4] GTP_DUAL:PRBS_ERR_THRESHOLD_1[7]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[2] GTP_DUAL:PRBS_ERR_THRESHOLD_1[9]	GTP_DUAL:DRP0D[3] GTP_DUAL:PRBS_ERR_THRESHOLD_1[8]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0D[1] GTP_DUAL:PRBS_ERR_THRESHOLD_1[10]	GTP_DUAL:DRP0D[0] GTP_DUAL:PRBS_ERR_THRESHOLD_1[11]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[14] GTP_DUAL:PRBS_ERR_THRESHOLD_1[13]	GTP_DUAL:DRP0C[15] GTP_DUAL:PRBS_ERR_THRESHOLD_1[12]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[13] GTP_DUAL:PRBS_ERR_THRESHOLD_1[14]	GTP_DUAL:DRP0C[12] GTP_DUAL:PRBS_ERR_THRESHOLD_1[15]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[10] GTP_DUAL:PRBS_ERR_THRESHOLD_1[17]	GTP_DUAL:DRP0C[11] GTP_DUAL:PRBS_ERR_THRESHOLD_1[16]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[9] GTP_DUAL:PRBS_ERR_THRESHOLD_1[18]	GTP_DUAL:DRP0C[8] GTP_DUAL:PRBS_ERR_THRESHOLD_1[19]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[6] GTP_DUAL:PRBS_ERR_THRESHOLD_1[21]	GTP_DUAL:DRP0C[7] GTP_DUAL:PRBS_ERR_THRESHOLD_1[20]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[5] GTP_DUAL:PRBS_ERR_THRESHOLD_1[22]	GTP_DUAL:DRP0C[4] GTP_DUAL:PRBS_ERR_THRESHOLD_1[23]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[2] GTP_DUAL:PRBS_ERR_THRESHOLD_1[25]	GTP_DUAL:DRP0C[3] GTP_DUAL:PRBS_ERR_THRESHOLD_1[24]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0C[1] GTP_DUAL:PRBS_ERR_THRESHOLD_1[26]	GTP_DUAL:DRP0C[0] GTP_DUAL:PRBS_ERR_THRESHOLD_1[27]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[14] GTP_DUAL:PRBS_ERR_THRESHOLD_1[29]	GTP_DUAL:DRP0B[15] GTP_DUAL:PRBS_ERR_THRESHOLD_1[28]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[13] GTP_DUAL:PRBS_ERR_THRESHOLD_1[30]	GTP_DUAL:DRP0B[12] GTP_DUAL:PRBS_ERR_THRESHOLD_1[31]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[10] GTP_DUAL:PMA_CDR_SCAN_1[1]	GTP_DUAL:DRP0B[11] GTP_DUAL:PMA_CDR_SCAN_1[0]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[9] GTP_DUAL:PMA_CDR_SCAN_1[2]	GTP_DUAL:DRP0B[8] GTP_DUAL:PMA_CDR_SCAN_1[3]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[6] GTP_DUAL:PMA_CDR_SCAN_1[5]	GTP_DUAL:DRP0B[7] GTP_DUAL:PMA_CDR_SCAN_1[4]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[5] GTP_DUAL:PMA_CDR_SCAN_1[6]	GTP_DUAL:DRP0B[4] GTP_DUAL:PMA_CDR_SCAN_1[7]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[2] GTP_DUAL:PMA_CDR_SCAN_1[9]	GTP_DUAL:DRP0B[3] GTP_DUAL:PMA_CDR_SCAN_1[8]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0B[1] GTP_DUAL:PMA_CDR_SCAN_1[10]	GTP_DUAL:DRP0B[0] GTP_DUAL:PMA_CDR_SCAN_1[11]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[14] GTP_DUAL:PMA_CDR_SCAN_1[13]	GTP_DUAL:DRP0A[15] GTP_DUAL:PMA_CDR_SCAN_1[12]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[13] GTP_DUAL:PMA_CDR_SCAN_1[14]	GTP_DUAL:DRP0A[12] GTP_DUAL:PMA_CDR_SCAN_1[15]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[10] GTP_DUAL:PMA_CDR_SCAN_1[17]	GTP_DUAL:DRP0A[11] GTP_DUAL:PMA_CDR_SCAN_1[16]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[9] GTP_DUAL:PMA_CDR_SCAN_1[18]	GTP_DUAL:DRP0A[8] GTP_DUAL:PMA_CDR_SCAN_1[19]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[6] GTP_DUAL:PMA_CDR_SCAN_1[21]	GTP_DUAL:DRP0A[7] GTP_DUAL:PMA_CDR_SCAN_1[20]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[5] GTP_DUAL:PMA_CDR_SCAN_1[22]	GTP_DUAL:DRP0A[4] GTP_DUAL:PMA_CDR_SCAN_1[23]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[2] GTP_DUAL:PMA_CDR_SCAN_1[25]	GTP_DUAL:DRP0A[3] GTP_DUAL:PMA_CDR_SCAN_1[24]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP0A[1] GTP_DUAL:PMA_CDR_SCAN_1[26]	GTP_DUAL:DRP0A[0] GTP_DUAL:PLL_RXDIVSEL_OUT_1[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[14] GTP_DUAL:PLL_SATA_1	GTP_DUAL:DRP09[15] GTP_DUAL:PLL_RXDIVSEL_OUT_1[1]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[13]	GTP_DUAL:DRP09[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[10] GTP_DUAL:PCOMMA_10B_VALUE_1[0]	GTP_DUAL:DRP09[11] GTP_DUAL:PCOMMA_DETECT_1
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[9] GTP_DUAL:PCOMMA_10B_VALUE_1[1]	GTP_DUAL:DRP09[8] GTP_DUAL:PCOMMA_10B_VALUE_1[2]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[6] GTP_DUAL:PCOMMA_10B_VALUE_1[4]	GTP_DUAL:DRP09[7] GTP_DUAL:PCOMMA_10B_VALUE_1[3]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[5] GTP_DUAL:PCOMMA_10B_VALUE_1[5]	GTP_DUAL:DRP09[4] GTP_DUAL:PCOMMA_10B_VALUE_1[6]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[2] GTP_DUAL:PCOMMA_10B_VALUE_1[8]	GTP_DUAL:DRP09[3] GTP_DUAL:PCOMMA_10B_VALUE_1[7]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP09[1] GTP_DUAL:PCOMMA_10B_VALUE_1[9]	GTP_DUAL:DRP09[0] GTP_DUAL:PCI_EXPRESS_MODE_1
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[8] GTP_DUAL:DRP08[14]	GTP_DUAL:DRP08[15]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[7] GTP_DUAL:DRP08[13]	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[6] GTP_DUAL:DRP08[12]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[4] GTP_DUAL:DRP08[10]	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[5] GTP_DUAL:DRP08[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[3] GTP_DUAL:DRP08[9]	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[2] GTP_DUAL:DRP08[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[0] GTP_DUAL:DRP08[6]	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[1] GTP_DUAL:DRP08[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[9] GTP_DUAL:DRP08[5]	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[8] GTP_DUAL:DRP08[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[6] GTP_DUAL:DRP08[2]	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[7] GTP_DUAL:DRP08[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[5] GTP_DUAL:DRP08[1]	GTP_DUAL:CHAN_BOND_SEQ_2_4_1[4] GTP_DUAL:DRP08[0]

virtex5 GTP rect R7
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_1[9] GTP_DUAL:DRP17[14]	GTP_DUAL:CLK_COR_SEQ_1_1_1[8] GTP_DUAL:DRP17[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_1[0] GTP_DUAL:DRP17[13]	GTP_DUAL:CLK_COR_REPEAT_WAIT_1[1] GTP_DUAL:DRP17[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_1[3] GTP_DUAL:DRP17[10]	GTP_DUAL:CLK_COR_REPEAT_WAIT_1[2] GTP_DUAL:DRP17[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_1[4] GTP_DUAL:DRP17[9]	GTP_DUAL:CLK_CORRECT_USE_1 GTP_DUAL:DRP17[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_1[0] GTP_DUAL:DRP17[6]	GTP_DUAL:CLK_COR_PRECEDENCE_1 GTP_DUAL:DRP17[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_1[1] GTP_DUAL:DRP17[5]	GTP_DUAL:CLK_COR_MIN_LAT_1[2] GTP_DUAL:DRP17[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_1[4] GTP_DUAL:DRP17[2]	GTP_DUAL:CLK_COR_MIN_LAT_1[3] GTP_DUAL:DRP17[3]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_1[5] GTP_DUAL:DRP17[1]	GTP_DUAL:CLK_COR_MAX_LAT_1[0] GTP_DUAL:DRP17[0]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MAX_LAT_1[2] GTP_DUAL:DRP16[14]	GTP_DUAL:CLK_COR_MAX_LAT_1[1] GTP_DUAL:DRP16[15]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MAX_LAT_1[3] GTP_DUAL:DRP16[13]	GTP_DUAL:CLK_COR_MAX_LAT_1[4] GTP_DUAL:DRP16[12]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_KEEP_IDLE_1 GTP_DUAL:DRP16[10]	GTP_DUAL:CLK_COR_MAX_LAT_1[5] GTP_DUAL:DRP16[11]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_1 GTP_DUAL:DRP16[9]	GTP_DUAL:CLK_COR_DET_LEN_1[0] GTP_DUAL:DRP16[8]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_ADJ_LEN_1[0] GTP_DUAL:DRP16[6]	GTP_DUAL:CLK_COR_DET_LEN_1[1] GTP_DUAL:DRP16[7]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_ADJ_LEN_1[1] GTP_DUAL:DRP16[5]	GTP_DUAL:CHAN_BOND_SEQ_LEN_1[0] GTP_DUAL:DRP16[4]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_USE_1 GTP_DUAL:DRP16[2]	GTP_DUAL:CHAN_BOND_SEQ_LEN_1[1] GTP_DUAL:DRP16[3]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[0] GTP_DUAL:DRP16[1]	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[1] GTP_DUAL:DRP16[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[3] GTP_DUAL:DRP15[14]	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[2] GTP_DUAL:DRP15[15]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[13] GTP_DUAL:PMA_COM_CFG[8]	GTP_DUAL:DRP15[12] GTP_DUAL:OOBDETECT_THRESHOLD_1[0]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[10] GTP_DUAL:OOBDETECT_THRESHOLD_1[2]	GTP_DUAL:DRP15[11] GTP_DUAL:OOBDETECT_THRESHOLD_1[1]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[9]	GTP_DUAL:DRP15[8] GTP_DUAL:TXOUTCLK_SEL_1
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[6] GTP_DUAL:TXRX_INVERT_1[0]	GTP_DUAL:DRP15[7] GTP_DUAL:TX_XCLK_SEL_1[0]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[5] GTP_DUAL:TXRX_INVERT_1[1]	GTP_DUAL:DRP15[4] GTP_DUAL:TXRX_INVERT_1[2]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[2] GTP_DUAL:TXRX_INVERT_1[4]	GTP_DUAL:DRP15[3] GTP_DUAL:TXRX_INVERT_1[3]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP15[1] GTP_DUAL:TX_DETECT_RX_CFG_1[0]	GTP_DUAL:DRP15[0] GTP_DUAL:TX_DETECT_RX_CFG_1[1]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[14] GTP_DUAL:TX_DETECT_RX_CFG_1[3]	GTP_DUAL:DRP14[15] GTP_DUAL:TX_DETECT_RX_CFG_1[2]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[13] GTP_DUAL:TX_DETECT_RX_CFG_1[4]	GTP_DUAL:DRP14[12] GTP_DUAL:TX_DETECT_RX_CFG_1[5]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[10] GTP_DUAL:TX_DETECT_RX_CFG_1[7]	GTP_DUAL:DRP14[11] GTP_DUAL:TX_DETECT_RX_CFG_1[6]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[9] GTP_DUAL:TX_DETECT_RX_CFG_1[8]	GTP_DUAL:DRP14[8] GTP_DUAL:TX_DETECT_RX_CFG_1[9]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[6] GTP_DUAL:TX_DETECT_RX_CFG_1[11]	GTP_DUAL:DRP14[7] GTP_DUAL:TX_DETECT_RX_CFG_1[10]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[5] GTP_DUAL:TX_DETECT_RX_CFG_1[12]	GTP_DUAL:DRP14[4] GTP_DUAL:TX_DETECT_RX_CFG_1[13]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[2] GTP_DUAL:TRANS_TIME_TO_P2_1[0]	GTP_DUAL:DRP14[3] GTP_DUAL:TX_BUFFER_USE_1
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP14[1] GTP_DUAL:TRANS_TIME_TO_P2_1[1]	GTP_DUAL:DRP14[0] GTP_DUAL:TRANS_TIME_TO_P2_1[2]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[14] GTP_DUAL:TRANS_TIME_TO_P2_1[4]	GTP_DUAL:DRP13[15] GTP_DUAL:TRANS_TIME_TO_P2_1[3]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[13] GTP_DUAL:TRANS_TIME_TO_P2_1[5]	GTP_DUAL:DRP13[12] GTP_DUAL:TRANS_TIME_TO_P2_1[6]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[10] GTP_DUAL:TRANS_TIME_TO_P2_1[8]	GTP_DUAL:DRP13[11] GTP_DUAL:TRANS_TIME_TO_P2_1[7]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[9] GTP_DUAL:TRANS_TIME_TO_P2_1[9]	GTP_DUAL:DRP13[8] GTP_DUAL:TRANS_TIME_TO_P2_1[10]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[6] GTP_DUAL:TRANS_TIME_TO_P2_1[12]	GTP_DUAL:DRP13[7] GTP_DUAL:TRANS_TIME_TO_P2_1[11]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[5] GTP_DUAL:TRANS_TIME_TO_P2_1[13]	GTP_DUAL:DRP13[4] GTP_DUAL:TRANS_TIME_TO_P2_1[14]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[2] GTP_DUAL:TRANS_TIME_NON_P2_1[0]	GTP_DUAL:DRP13[3] GTP_DUAL:TRANS_TIME_TO_P2_1[15]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP13[1] GTP_DUAL:TRANS_TIME_NON_P2_1[1]	GTP_DUAL:DRP13[0] GTP_DUAL:TRANS_TIME_NON_P2_1[2]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[14] GTP_DUAL:TRANS_TIME_NON_P2_1[4]	GTP_DUAL:DRP12[15] GTP_DUAL:TRANS_TIME_NON_P2_1[3]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[13] GTP_DUAL:TRANS_TIME_NON_P2_1[5]	GTP_DUAL:DRP12[12] GTP_DUAL:TRANS_TIME_NON_P2_1[6]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[10] GTP_DUAL:TRANS_TIME_NON_P2_1[8]	GTP_DUAL:DRP12[11] GTP_DUAL:TRANS_TIME_NON_P2_1[7]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[9] GTP_DUAL:TRANS_TIME_NON_P2_1[9]	GTP_DUAL:DRP12[8] GTP_DUAL:TRANS_TIME_NON_P2_1[10]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[6] GTP_DUAL:TRANS_TIME_NON_P2_1[12]	GTP_DUAL:DRP12[7] GTP_DUAL:TRANS_TIME_NON_P2_1[11]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[5] GTP_DUAL:TRANS_TIME_NON_P2_1[13]	GTP_DUAL:DRP12[4] GTP_DUAL:TRANS_TIME_NON_P2_1[14]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[2] GTP_DUAL:TRANS_TIME_FROM_P2_1[0]	GTP_DUAL:DRP12[3] GTP_DUAL:TRANS_TIME_NON_P2_1[15]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP12[1] GTP_DUAL:TRANS_TIME_FROM_P2_1[1]	GTP_DUAL:DRP12[0] GTP_DUAL:TRANS_TIME_FROM_P2_1[2]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[14] GTP_DUAL:TRANS_TIME_FROM_P2_1[4]	GTP_DUAL:DRP11[15] GTP_DUAL:TRANS_TIME_FROM_P2_1[3]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[13] GTP_DUAL:TRANS_TIME_FROM_P2_1[5]	GTP_DUAL:DRP11[12] GTP_DUAL:TRANS_TIME_FROM_P2_1[6]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[10] GTP_DUAL:TRANS_TIME_FROM_P2_1[8]	GTP_DUAL:DRP11[11] GTP_DUAL:TRANS_TIME_FROM_P2_1[7]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[9] GTP_DUAL:TRANS_TIME_FROM_P2_1[9]	GTP_DUAL:DRP11[8] GTP_DUAL:TRANS_TIME_FROM_P2_1[10]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[6] GTP_DUAL:TRANS_TIME_FROM_P2_1[12]	GTP_DUAL:DRP11[7] GTP_DUAL:TRANS_TIME_FROM_P2_1[11]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[5] GTP_DUAL:TRANS_TIME_FROM_P2_1[13]	GTP_DUAL:DRP11[4] GTP_DUAL:TRANS_TIME_FROM_P2_1[14]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[2] GTP_DUAL:TERMINATION_IMP_1[0]	GTP_DUAL:DRP11[3] GTP_DUAL:TRANS_TIME_FROM_P2_1[15]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP11[1] GTP_DUAL:SATA_MIN_WAKE_1[0]	GTP_DUAL:DRP11[0] GTP_DUAL:SATA_MIN_WAKE_1[1]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[14] GTP_DUAL:SATA_MIN_WAKE_1[3]	GTP_DUAL:DRP10[15] GTP_DUAL:SATA_MIN_WAKE_1[2]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[13] GTP_DUAL:SATA_MIN_WAKE_1[4]	GTP_DUAL:DRP10[12] GTP_DUAL:SATA_MIN_WAKE_1[5]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[10] GTP_DUAL:SATA_MIN_INIT_1[1]	GTP_DUAL:DRP10[11] GTP_DUAL:SATA_MIN_INIT_1[0]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[9] GTP_DUAL:SATA_MIN_INIT_1[2]	GTP_DUAL:DRP10[8] GTP_DUAL:SATA_MIN_INIT_1[3]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[6] GTP_DUAL:SATA_MIN_INIT_1[5]	GTP_DUAL:DRP10[7] GTP_DUAL:SATA_MIN_INIT_1[4]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[5] GTP_DUAL:SATA_MIN_BURST_1[0]	GTP_DUAL:DRP10[4] GTP_DUAL:SATA_MIN_BURST_1[1]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[2] GTP_DUAL:SATA_MIN_BURST_1[3]	GTP_DUAL:DRP10[3] GTP_DUAL:SATA_MIN_BURST_1[2]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP10[1] GTP_DUAL:SATA_MIN_BURST_1[4]	GTP_DUAL:DRP10[0] GTP_DUAL:SATA_MIN_BURST_1[5]

virtex5 GTP rect R8
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[28]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[8] GTP_DUAL:DRP1F[14]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[9] GTP_DUAL:DRP1F[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[29]	-	GTP_DUAL:DRP1F[13]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[7] GTP_DUAL:DRP1F[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[30]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[5] GTP_DUAL:DRP1F[10]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[6] GTP_DUAL:DRP1F[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[31]	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[4] GTP_DUAL:DRP1F[9]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[3] GTP_DUAL:DRP1F[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[1] GTP_DUAL:DRP1F[6]	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[2] GTP_DUAL:DRP1F[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_1[0] GTP_DUAL:DRP1F[5]	GTP_DUAL:CHAN_BOND_SEQ_2_3_1[9] GTP_DUAL:DRP1F[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1F[2] GTP_DUAL:MCOMMA_10B_VALUE_1[0]	GTP_DUAL:DRP1F[3] GTP_DUAL:MCOMMA_DETECT_1
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1F[1] GTP_DUAL:MCOMMA_10B_VALUE_1[1]	GTP_DUAL:DRP1F[0] GTP_DUAL:MCOMMA_10B_VALUE_1[2]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1E[14] GTP_DUAL:MCOMMA_10B_VALUE_1[4]	GTP_DUAL:DRP1E[15] GTP_DUAL:MCOMMA_10B_VALUE_1[3]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1E[13] GTP_DUAL:MCOMMA_10B_VALUE_1[5]	GTP_DUAL:DRP1E[12] GTP_DUAL:MCOMMA_10B_VALUE_1[6]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1E[10] GTP_DUAL:MCOMMA_10B_VALUE_1[8]	GTP_DUAL:DRP1E[11] GTP_DUAL:MCOMMA_10B_VALUE_1[7]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP1E[9] GTP_DUAL:MCOMMA_10B_VALUE_1[9]	GTP_DUAL:DEC_VALID_COMMA_ONLY_1 GTP_DUAL:DRP1E[8]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DEC_MCOMMA_DETECT_1 GTP_DUAL:DRP1E[6]	GTP_DUAL:DEC_PCOMMA_DETECT_1 GTP_DUAL:DRP1E[7]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_DOUBLE_1 GTP_DUAL:DRP1E[5]	GTP_DUAL:COMMA_10B_ENABLE_1[0] GTP_DUAL:DRP1E[4]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_1[2] GTP_DUAL:DRP1E[2]	GTP_DUAL:COMMA_10B_ENABLE_1[1] GTP_DUAL:DRP1E[3]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_1[3] GTP_DUAL:DRP1E[1]	GTP_DUAL:COMMA_10B_ENABLE_1[4] GTP_DUAL:DRP1E[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_1[6] GTP_DUAL:DRP1D[14]	GTP_DUAL:COMMA_10B_ENABLE_1[5] GTP_DUAL:DRP1D[15]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_1[7] GTP_DUAL:DRP1D[13]	GTP_DUAL:COMMA_10B_ENABLE_1[8] GTP_DUAL:DRP1D[12]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COM_BURST_VAL_1[0] GTP_DUAL:DRP1D[10]	GTP_DUAL:COMMA_10B_ENABLE_1[9] GTP_DUAL:DRP1D[11]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COM_BURST_VAL_1[1] GTP_DUAL:DRP1D[9]	GTP_DUAL:COM_BURST_VAL_1[2] GTP_DUAL:DRP1D[8]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_USE_1 GTP_DUAL:DRP1D[6]	GTP_DUAL:COM_BURST_VAL_1[3] GTP_DUAL:DRP1D[7]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[0] GTP_DUAL:DRP1D[5]	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[1] GTP_DUAL:DRP1D[4]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[3] GTP_DUAL:DRP1D[2]	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[2] GTP_DUAL:DRP1D[3]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_1[0] GTP_DUAL:DRP1D[1]	GTP_DUAL:CLK_COR_SEQ_2_4_1[1] GTP_DUAL:DRP1D[0]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_1[3] GTP_DUAL:DRP1C[14]	GTP_DUAL:CLK_COR_SEQ_2_4_1[2] GTP_DUAL:DRP1C[15]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_1[4] GTP_DUAL:DRP1C[13]	GTP_DUAL:CLK_COR_SEQ_2_4_1[5] GTP_DUAL:DRP1C[12]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_1[7] GTP_DUAL:DRP1C[10]	GTP_DUAL:CLK_COR_SEQ_2_4_1[6] GTP_DUAL:DRP1C[11]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_1[8] GTP_DUAL:DRP1C[9]	GTP_DUAL:CLK_COR_SEQ_2_4_1[9] GTP_DUAL:DRP1C[8]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_1[1] GTP_DUAL:DRP1C[6]	GTP_DUAL:CLK_COR_SEQ_2_3_1[0] GTP_DUAL:DRP1C[7]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_1[2] GTP_DUAL:DRP1C[5]	GTP_DUAL:CLK_COR_SEQ_2_3_1[3] GTP_DUAL:DRP1C[4]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_1[5] GTP_DUAL:DRP1C[2]	GTP_DUAL:CLK_COR_SEQ_2_3_1[4] GTP_DUAL:DRP1C[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_1[6] GTP_DUAL:DRP1C[1]	GTP_DUAL:CLK_COR_SEQ_2_3_1[7] GTP_DUAL:DRP1C[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_1[9] GTP_DUAL:DRP1B[14]	GTP_DUAL:CLK_COR_SEQ_2_3_1[8] GTP_DUAL:DRP1B[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_1[0] GTP_DUAL:DRP1B[13]	GTP_DUAL:CLK_COR_SEQ_2_2_1[1] GTP_DUAL:DRP1B[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_1[3] GTP_DUAL:DRP1B[10]	GTP_DUAL:CLK_COR_SEQ_2_2_1[2] GTP_DUAL:DRP1B[11]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_1[4] GTP_DUAL:DRP1B[9]	GTP_DUAL:CLK_COR_SEQ_2_2_1[5] GTP_DUAL:DRP1B[8]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_1[7] GTP_DUAL:DRP1B[6]	GTP_DUAL:CLK_COR_SEQ_2_2_1[6] GTP_DUAL:DRP1B[7]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_1[8] GTP_DUAL:DRP1B[5]	GTP_DUAL:CLK_COR_SEQ_2_2_1[9] GTP_DUAL:DRP1B[4]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_1[1] GTP_DUAL:DRP1B[2]	GTP_DUAL:CLK_COR_SEQ_2_1_1[0] GTP_DUAL:DRP1B[3]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_1[2] GTP_DUAL:DRP1B[1]	GTP_DUAL:CLK_COR_SEQ_2_1_1[3] GTP_DUAL:DRP1B[0]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_1[5] GTP_DUAL:DRP1A[14]	GTP_DUAL:CLK_COR_SEQ_2_1_1[4] GTP_DUAL:DRP1A[15]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_1[6] GTP_DUAL:DRP1A[13]	GTP_DUAL:CLK_COR_SEQ_2_1_1[7] GTP_DUAL:DRP1A[12]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_1[9] GTP_DUAL:DRP1A[10]	GTP_DUAL:CLK_COR_SEQ_2_1_1[8] GTP_DUAL:DRP1A[11]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[0] GTP_DUAL:DRP1A[9]	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[1] GTP_DUAL:DRP1A[8]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[3] GTP_DUAL:DRP1A[6]	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[2] GTP_DUAL:DRP1A[7]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_1[0] GTP_DUAL:DRP1A[5]	GTP_DUAL:CLK_COR_SEQ_1_4_1[1] GTP_DUAL:DRP1A[4]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_1[3] GTP_DUAL:DRP1A[2]	GTP_DUAL:CLK_COR_SEQ_1_4_1[2] GTP_DUAL:DRP1A[3]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_1[4] GTP_DUAL:DRP1A[1]	GTP_DUAL:CLK_COR_SEQ_1_4_1[5] GTP_DUAL:DRP1A[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_1[7] GTP_DUAL:DRP19[14]	GTP_DUAL:CLK_COR_SEQ_1_4_1[6] GTP_DUAL:DRP19[15]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_1[8] GTP_DUAL:DRP19[13]	GTP_DUAL:CLK_COR_SEQ_1_4_1[9] GTP_DUAL:DRP19[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_1[1] GTP_DUAL:DRP19[10]	GTP_DUAL:CLK_COR_SEQ_1_3_1[0] GTP_DUAL:DRP19[11]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_1[2] GTP_DUAL:DRP19[9]	GTP_DUAL:CLK_COR_SEQ_1_3_1[3] GTP_DUAL:DRP19[8]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_1[5] GTP_DUAL:DRP19[6]	GTP_DUAL:CLK_COR_SEQ_1_3_1[4] GTP_DUAL:DRP19[7]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_1[6] GTP_DUAL:DRP19[5]	GTP_DUAL:CLK_COR_SEQ_1_3_1[7] GTP_DUAL:DRP19[4]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_1[9] GTP_DUAL:DRP19[2]	GTP_DUAL:CLK_COR_SEQ_1_3_1[8] GTP_DUAL:DRP19[3]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_1[0] GTP_DUAL:DRP19[1]	GTP_DUAL:CLK_COR_SEQ_1_2_1[1] GTP_DUAL:DRP19[0]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_1[3] GTP_DUAL:DRP18[14]	GTP_DUAL:CLK_COR_SEQ_1_2_1[2] GTP_DUAL:DRP18[15]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_1[4] GTP_DUAL:DRP18[13]	GTP_DUAL:CLK_COR_SEQ_1_2_1[5] GTP_DUAL:DRP18[12]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_1[7] GTP_DUAL:DRP18[10]	GTP_DUAL:CLK_COR_SEQ_1_2_1[6] GTP_DUAL:DRP18[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_1[8] GTP_DUAL:DRP18[9]	GTP_DUAL:CLK_COR_SEQ_1_2_1[9] GTP_DUAL:DRP18[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_1[1] GTP_DUAL:DRP18[6]	GTP_DUAL:CLK_COR_SEQ_1_1_1[0] GTP_DUAL:DRP18[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_1[2] GTP_DUAL:DRP18[5]	GTP_DUAL:CLK_COR_SEQ_1_1_1[3] GTP_DUAL:DRP18[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_1[5] GTP_DUAL:DRP18[2]	GTP_DUAL:CLK_COR_SEQ_1_1_1[4] GTP_DUAL:DRP18[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_1[6] GTP_DUAL:DRP18[1]	GTP_DUAL:CLK_COR_SEQ_1_1_1[7] GTP_DUAL:DRP18[0]

virtex5 GTP rect R9
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[14] GTP_DUAL:PCS_COM_CFG[13]	GTP_DUAL:DRP27[15] GTP_DUAL:PCS_COM_CFG[12]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[13] GTP_DUAL:PCS_COM_CFG[14]	GTP_DUAL:DRP27[12] GTP_DUAL:PCS_COM_CFG[15]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[10] GTP_DUAL:PCS_COM_CFG[17]	GTP_DUAL:DRP27[11] GTP_DUAL:PCS_COM_CFG[16]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[9] GTP_DUAL:PCS_COM_CFG[18]	GTP_DUAL:DRP27[8] GTP_DUAL:PCS_COM_CFG[19]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[6] GTP_DUAL:PCS_COM_CFG[21]	GTP_DUAL:DRP27[7] GTP_DUAL:PCS_COM_CFG[20]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[5] GTP_DUAL:PCS_COM_CFG[22]	GTP_DUAL:DRP27[4] GTP_DUAL:PCS_COM_CFG[23]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[2] GTP_DUAL:PCS_COM_CFG[25]	GTP_DUAL:DRP27[3] GTP_DUAL:PCS_COM_CFG[24]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP27[1] GTP_DUAL:PCS_COM_CFG[26]	GTP_DUAL:DRP27[0] GTP_DUAL:PCS_COM_CFG[27]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[14] GTP_DUAL:OOB_CLK_DIVIDER[0]	GTP_DUAL:DRP26[15] GTP_DUAL:OVERSAMPLE_MODE
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[13] GTP_DUAL:OOB_CLK_DIVIDER[1]	GTP_DUAL:DRP26[12] GTP_DUAL:OOB_CLK_DIVIDER[2]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK25_DIVIDER[1] GTP_DUAL:DRP26[10]	GTP_DUAL:CLK25_DIVIDER[0] GTP_DUAL:DRP26[11]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK25_DIVIDER[2] GTP_DUAL:DRP26[9]	GTP_DUAL:DRP26[8] GTP_DUAL:PMA_COM_CFG[48]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[6] GTP_DUAL:PMA_COM_CFG[44]	GTP_DUAL:DRP26[7] GTP_DUAL:PMA_COM_CFG[46]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[5] GTP_DUAL:PMA_COM_CFG[42]	GTP_DUAL:DRP26[4] GTP_DUAL:PMA_COM_CFG[38]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[2] GTP_DUAL:PMA_COM_CFG[36]	GTP_DUAL:DRP26[3] GTP_DUAL:PMA_COM_CFG[40]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP26[1] GTP_DUAL:PMA_COM_CFG[34]	GTP_DUAL:DRP26[0] GTP_DUAL:PMA_COM_CFG[56]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[14] GTP_DUAL:PMA_COM_CFG[64]	GTP_DUAL:DRP25[15] GTP_DUAL:PMA_COM_CFG[54]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[13] GTP_DUAL:PMA_COM_CFG[62]	GTP_DUAL:DRP25[12] GTP_DUAL:PMA_COM_CFG[61]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[10] GTP_DUAL:PMA_COM_CFG[68]	GTP_DUAL:DRP25[11] GTP_DUAL:PMA_COM_CFG[63]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[9] GTP_DUAL:PMA_COM_CFG[66]	GTP_DUAL:DRP25[8] GTP_DUAL:PMA_COM_CFG[80]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[6] GTP_DUAL:PMA_COM_CFG[76]	GTP_DUAL:DRP25[7] GTP_DUAL:PMA_COM_CFG[70]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[5] GTP_DUAL:PMA_COM_CFG[78]	GTP_DUAL:DRP25[4] GTP_DUAL:PMA_COM_CFG[82]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[2] GTP_DUAL:PMA_COM_CFG[50]	GTP_DUAL:DRP25[3] GTP_DUAL:PMA_COM_CFG[84]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP25[1] GTP_DUAL:PMA_COM_CFG[52]	GTP_DUAL:DRP25[0] GTP_DUAL:PMA_COM_CFG[72]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[14] GTP_DUAL:PMA_COM_CFG[86]	GTP_DUAL:DRP24[15] GTP_DUAL:PMA_COM_CFG[74]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[13] GTP_DUAL:TX_SYNC_FILTERB	GTP_DUAL:DRP24[12] GTP_DUAL:PMA_COM_CFG[10]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[10] GTP_DUAL:PMA_COM_CFG[12]	GTP_DUAL:DRP24[11] GTP_DUAL:PMA_COM_CFG[11]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[9] GTP_DUAL:PMA_COM_CFG[13]	GTP_DUAL:DRP24[8] GTP_DUAL:PMA_COM_CFG[14]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[6] GTP_DUAL:PMA_COM_CFG[16]	GTP_DUAL:DRP24[7] GTP_DUAL:PMA_COM_CFG[15]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP24[5] GTP_DUAL:PMA_COM_CFG[17]	GTP_DUAL:DRP24[4] GTP_DUAL:PMA_COM_CFG[18]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[3] GTP_DUAL:DRP24[2]	GTP_DUAL:ALIGN_COMMA_WORD_1[0] GTP_DUAL:DRP24[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[2] GTP_DUAL:DRP24[1]	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[1] GTP_DUAL:DRP24[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[3] GTP_DUAL:DRP23[14]	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[0] GTP_DUAL:DRP23[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[2] GTP_DUAL:DRP23[13]	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[1] GTP_DUAL:DRP23[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_LEVEL_1[2] GTP_DUAL:DRP23[10]	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[0] GTP_DUAL:DRP23[11]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_LEVEL_1[1] GTP_DUAL:DRP23[9]	GTP_DUAL:CHAN_BOND_LEVEL_1[0] GTP_DUAL:DRP23[8]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[0]	GTP_DUAL:CHAN_BOND_MODE_1[1] GTP_DUAL:DRP23[6]	GTP_DUAL:CHAN_BOND_MODE_1[0] GTP_DUAL:DRP23[7]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[1]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[9] GTP_DUAL:DRP23[5]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[8] GTP_DUAL:DRP23[4]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[2]	-	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[6] GTP_DUAL:DRP23[2]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[7] GTP_DUAL:DRP23[3]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[3]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[5] GTP_DUAL:DRP23[1]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[4] GTP_DUAL:DRP23[0]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[4]	-	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[2] GTP_DUAL:DRP22[14]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[3] GTP_DUAL:DRP22[15]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[5]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[1] GTP_DUAL:DRP22[13]	GTP_DUAL:CHAN_BOND_SEQ_1_1_1[0] GTP_DUAL:DRP22[12]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[6]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[8] GTP_DUAL:DRP22[10]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[9] GTP_DUAL:DRP22[11]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[7]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[7] GTP_DUAL:DRP22[9]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[6] GTP_DUAL:DRP22[8]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[8]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[4] GTP_DUAL:DRP22[6]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[5] GTP_DUAL:DRP22[7]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[9]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[3] GTP_DUAL:DRP22[5]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[2] GTP_DUAL:DRP22[4]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[10]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[0] GTP_DUAL:DRP22[2]	GTP_DUAL:CHAN_BOND_SEQ_1_2_1[1] GTP_DUAL:DRP22[3]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[9] GTP_DUAL:DRP22[1]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[8] GTP_DUAL:DRP22[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[11]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[6] GTP_DUAL:DRP21[14]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[7] GTP_DUAL:DRP21[15]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[12]	-	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[5] GTP_DUAL:DRP21[13]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[4] GTP_DUAL:DRP21[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[13]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[2] GTP_DUAL:DRP21[10]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[3] GTP_DUAL:DRP21[11]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[14]	CRC32_1:CRC_INIT[15]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[1] GTP_DUAL:DRP21[9]	GTP_DUAL:CHAN_BOND_SEQ_1_3_1[0] GTP_DUAL:DRP21[8]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[16]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[8] GTP_DUAL:DRP21[6]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[9] GTP_DUAL:DRP21[7]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[17]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[7] GTP_DUAL:DRP21[5]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[6] GTP_DUAL:DRP21[4]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[18]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[4] GTP_DUAL:DRP21[2]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[5] GTP_DUAL:DRP21[3]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[19]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[3] GTP_DUAL:DRP21[1]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[2] GTP_DUAL:DRP21[0]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[20]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[0] GTP_DUAL:DRP20[14]	GTP_DUAL:CHAN_BOND_SEQ_1_4_1[1] GTP_DUAL:DRP20[15]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[21]	CRC32_1:CRC_INIT[22]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[3] GTP_DUAL:DRP20[13]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[2] GTP_DUAL:DRP20[12]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[0] GTP_DUAL:DRP20[10]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[1] GTP_DUAL:DRP20[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[23]	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[9] GTP_DUAL:DRP20[9]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[8] GTP_DUAL:DRP20[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[25]	CRC32_1:CRC_INIT[24]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[6] GTP_DUAL:DRP20[6]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[7] GTP_DUAL:DRP20[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[5] GTP_DUAL:DRP20[5]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[4] GTP_DUAL:DRP20[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[26]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[2] GTP_DUAL:DRP20[2]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[3] GTP_DUAL:DRP20[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_1:CRC_INIT[27]	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[1] GTP_DUAL:DRP20[1]	GTP_DUAL:CHAN_BOND_SEQ_2_1_1[0] GTP_DUAL:DRP20[0]

virtex5 GTP rect R10
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[27]	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[1] GTP_DUAL:DRP2F[14]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[0] GTP_DUAL:DRP2F[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[26]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[2] GTP_DUAL:DRP2F[13]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[3] GTP_DUAL:DRP2F[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[5] GTP_DUAL:DRP2F[10]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[4] GTP_DUAL:DRP2F[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[25]	CRC32_2:CRC_INIT[24]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[6] GTP_DUAL:DRP2F[9]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[7] GTP_DUAL:DRP2F[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[23]	-	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[9] GTP_DUAL:DRP2F[6]	GTP_DUAL:CHAN_BOND_SEQ_2_1_0[8] GTP_DUAL:DRP2F[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[0] GTP_DUAL:DRP2F[5]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[1] GTP_DUAL:DRP2F[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[21]	CRC32_2:CRC_INIT[22]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[3] GTP_DUAL:DRP2F[2]	GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[2] GTP_DUAL:DRP2F[3]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[20]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[0] GTP_DUAL:DRP2F[1]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[1] GTP_DUAL:DRP2F[0]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[19]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[3] GTP_DUAL:DRP2E[14]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[2] GTP_DUAL:DRP2E[15]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[18]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[4] GTP_DUAL:DRP2E[13]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[5] GTP_DUAL:DRP2E[12]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[17]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[7] GTP_DUAL:DRP2E[10]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[6] GTP_DUAL:DRP2E[11]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[16]	-	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[8] GTP_DUAL:DRP2E[9]	GTP_DUAL:CHAN_BOND_SEQ_1_4_0[9] GTP_DUAL:DRP2E[8]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[14]	CRC32_2:CRC_INIT[15]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[1] GTP_DUAL:DRP2E[6]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[0] GTP_DUAL:DRP2E[7]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[13]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[2] GTP_DUAL:DRP2E[5]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[3] GTP_DUAL:DRP2E[4]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[12]	-	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[5] GTP_DUAL:DRP2E[2]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[4] GTP_DUAL:DRP2E[3]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[11]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[6] GTP_DUAL:DRP2E[1]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[7] GTP_DUAL:DRP2E[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[9] GTP_DUAL:DRP2D[14]	GTP_DUAL:CHAN_BOND_SEQ_1_3_0[8] GTP_DUAL:DRP2D[15]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[10]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[0] GTP_DUAL:DRP2D[13]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[1] GTP_DUAL:DRP2D[12]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[9]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[3] GTP_DUAL:DRP2D[10]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[2] GTP_DUAL:DRP2D[11]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[8]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[4] GTP_DUAL:DRP2D[9]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[5] GTP_DUAL:DRP2D[8]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[7]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[7] GTP_DUAL:DRP2D[6]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[6] GTP_DUAL:DRP2D[7]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[6]	-	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[8] GTP_DUAL:DRP2D[5]	GTP_DUAL:CHAN_BOND_SEQ_1_2_0[9] GTP_DUAL:DRP2D[4]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[5]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[1] GTP_DUAL:DRP2D[2]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[0] GTP_DUAL:DRP2D[3]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[4]	-	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[2] GTP_DUAL:DRP2D[1]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[3] GTP_DUAL:DRP2D[0]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[3]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[5] GTP_DUAL:DRP2C[14]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[4] GTP_DUAL:DRP2C[15]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[2]	-	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[6] GTP_DUAL:DRP2C[13]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[7] GTP_DUAL:DRP2C[12]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[1]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[9] GTP_DUAL:DRP2C[10]	GTP_DUAL:CHAN_BOND_SEQ_1_1_0[8] GTP_DUAL:DRP2C[11]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[0]	GTP_DUAL:CHAN_BOND_MODE_0[1] GTP_DUAL:DRP2C[9]	GTP_DUAL:CHAN_BOND_MODE_0[0] GTP_DUAL:DRP2C[8]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_LEVEL_0[1] GTP_DUAL:DRP2C[6]	GTP_DUAL:CHAN_BOND_LEVEL_0[0] GTP_DUAL:DRP2C[7]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_LEVEL_0[2] GTP_DUAL:DRP2C[5]	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[0] GTP_DUAL:DRP2C[4]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[2] GTP_DUAL:DRP2C[2]	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[1] GTP_DUAL:DRP2C[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[3] GTP_DUAL:DRP2C[1]	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[0] GTP_DUAL:DRP2C[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[2] GTP_DUAL:DRP2B[14]	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[1] GTP_DUAL:DRP2B[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[3] GTP_DUAL:DRP2B[13]	GTP_DUAL:ALIGN_COMMA_WORD_0[0] GTP_DUAL:DRP2B[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[10] GTP_DUAL:PMA_COM_CFG[1]	GTP_DUAL:DRP2B[11] GTP_DUAL:PMA_COM_CFG[9]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[9] GTP_DUAL:PMA_COM_CFG[2]	GTP_DUAL:DRP2B[8] GTP_DUAL:PMA_COM_CFG[3]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[6] GTP_DUAL:PMA_COM_CFG[0]	GTP_DUAL:DRP2B[7] GTP_DUAL:PMA_COM_CFG[4]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[5] GTP_DUAL:PMA_COM_CFG[5]	GTP_DUAL:DRP2B[4] GTP_DUAL:PMA_COM_CFG[6]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[2] GTP_DUAL:PMA_COM_CFG[85]	GTP_DUAL:DRP2B[3] GTP_DUAL:PMA_COM_CFG[7]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2B[1] GTP_DUAL:PMA_COM_CFG[71]	GTP_DUAL:DRP2B[0] GTP_DUAL:PMA_COM_CFG[73]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[14] GTP_DUAL:PMA_COM_CFG[51]	GTP_DUAL:DRP2A[15] GTP_DUAL:PMA_COM_CFG[49]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[13] GTP_DUAL:PMA_COM_CFG[83]	GTP_DUAL:DRP2A[12] GTP_DUAL:PMA_COM_CFG[81]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[10] GTP_DUAL:PMA_COM_CFG[75]	GTP_DUAL:DRP2A[11] GTP_DUAL:PMA_COM_CFG[77]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[9] GTP_DUAL:PMA_COM_CFG[69]	GTP_DUAL:DRP2A[8] GTP_DUAL:PMA_COM_CFG[79]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[6] GTP_DUAL:PMA_COM_CFG[67]	GTP_DUAL:DRP2A[7] GTP_DUAL:PMA_COM_CFG[65]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[5] GTP_DUAL:PMA_COM_CFG[59]	GTP_DUAL:DRP2A[4] GTP_DUAL:PMA_COM_CFG[57]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[2] GTP_DUAL:PMA_COM_CFG[60]	GTP_DUAL:DRP2A[3] GTP_DUAL:PMA_COM_CFG[58]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP2A[1] GTP_DUAL:PMA_COM_CFG[55]	GTP_DUAL:DRP2A[0] GTP_DUAL:PMA_COM_CFG[53]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[14] GTP_DUAL:PMA_COM_CFG[33]	GTP_DUAL:DRP29[15] GTP_DUAL:PMA_COM_CFG[35]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[13] GTP_DUAL:PMA_COM_CFG[37]	GTP_DUAL:DRP29[12] GTP_DUAL:PMA_COM_CFG[39]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[10] GTP_DUAL:PMA_COM_CFG[43]	GTP_DUAL:DRP29[11] GTP_DUAL:PMA_COM_CFG[41]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[9] GTP_DUAL:PMA_COM_CFG[45]	GTP_DUAL:DRP29[8] GTP_DUAL:PMA_COM_CFG[47]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[6] GTP_DUAL:TERMINATION_OVRD	GTP_DUAL:DRP29[7] GTP_DUAL:PMA_COM_CFG[32]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[5] GTP_DUAL:TERMINATION_CTRL[0]	GTP_DUAL:DRP29[4] GTP_DUAL:TERMINATION_CTRL[1]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[2] GTP_DUAL:TERMINATION_CTRL[3]	GTP_DUAL:DRP29[3] GTP_DUAL:TERMINATION_CTRL[2]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP29[1] GTP_DUAL:TERMINATION_CTRL[4]	GTP_DUAL:DRP29[0] GTP_DUAL:PLL_DIVSEL_FB[1]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[14] GTP_DUAL:PLL_DIVSEL_FB[3]	GTP_DUAL:DRP28[15] GTP_DUAL:PLL_DIVSEL_FB[2]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[13]	GTP_DUAL:DRP28[12] GTP_DUAL:PLL_DIVSEL_FB[0]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[10] GTP_DUAL:PCS_COM_CFG[1]	GTP_DUAL:DRP28[11] GTP_DUAL:PCS_COM_CFG[0]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[9] GTP_DUAL:PCS_COM_CFG[2]	GTP_DUAL:DRP28[8] GTP_DUAL:PCS_COM_CFG[3]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[6] GTP_DUAL:PCS_COM_CFG[5]	GTP_DUAL:DRP28[7] GTP_DUAL:PCS_COM_CFG[4]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[5] GTP_DUAL:PCS_COM_CFG[6]	GTP_DUAL:DRP28[4] GTP_DUAL:PCS_COM_CFG[7]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[2] GTP_DUAL:PCS_COM_CFG[9]	GTP_DUAL:DRP28[3] GTP_DUAL:PCS_COM_CFG[8]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP28[1] GTP_DUAL:PCS_COM_CFG[10]	GTP_DUAL:DRP28[0] GTP_DUAL:PCS_COM_CFG[11]

virtex5 GTP rect R11
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_0[6] GTP_DUAL:DRP37[14]	GTP_DUAL:CLK_COR_SEQ_1_1_0[7] GTP_DUAL:DRP37[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_0[5] GTP_DUAL:DRP37[13]	GTP_DUAL:CLK_COR_SEQ_1_1_0[4] GTP_DUAL:DRP37[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_0[2] GTP_DUAL:DRP37[10]	GTP_DUAL:CLK_COR_SEQ_1_1_0[3] GTP_DUAL:DRP37[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_0[1] GTP_DUAL:DRP37[9]	GTP_DUAL:CLK_COR_SEQ_1_1_0[0] GTP_DUAL:DRP37[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_0[8] GTP_DUAL:DRP37[6]	GTP_DUAL:CLK_COR_SEQ_1_2_0[9] GTP_DUAL:DRP37[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_0[7] GTP_DUAL:DRP37[5]	GTP_DUAL:CLK_COR_SEQ_1_2_0[6] GTP_DUAL:DRP37[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_0[4] GTP_DUAL:DRP37[2]	GTP_DUAL:CLK_COR_SEQ_1_2_0[5] GTP_DUAL:DRP37[3]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_0[3] GTP_DUAL:DRP37[1]	GTP_DUAL:CLK_COR_SEQ_1_2_0[2] GTP_DUAL:DRP37[0]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_2_0[0] GTP_DUAL:DRP36[14]	GTP_DUAL:CLK_COR_SEQ_1_2_0[1] GTP_DUAL:DRP36[15]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_0[9] GTP_DUAL:DRP36[13]	GTP_DUAL:CLK_COR_SEQ_1_3_0[8] GTP_DUAL:DRP36[12]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_0[6] GTP_DUAL:DRP36[10]	GTP_DUAL:CLK_COR_SEQ_1_3_0[7] GTP_DUAL:DRP36[11]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_0[5] GTP_DUAL:DRP36[9]	GTP_DUAL:CLK_COR_SEQ_1_3_0[4] GTP_DUAL:DRP36[8]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_0[2] GTP_DUAL:DRP36[6]	GTP_DUAL:CLK_COR_SEQ_1_3_0[3] GTP_DUAL:DRP36[7]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_3_0[1] GTP_DUAL:DRP36[5]	GTP_DUAL:CLK_COR_SEQ_1_3_0[0] GTP_DUAL:DRP36[4]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_0[8] GTP_DUAL:DRP36[2]	GTP_DUAL:CLK_COR_SEQ_1_4_0[9] GTP_DUAL:DRP36[3]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_0[7] GTP_DUAL:DRP36[1]	GTP_DUAL:CLK_COR_SEQ_1_4_0[6] GTP_DUAL:DRP36[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_0[4] GTP_DUAL:DRP35[14]	GTP_DUAL:CLK_COR_SEQ_1_4_0[5] GTP_DUAL:DRP35[15]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_0[3] GTP_DUAL:DRP35[13]	GTP_DUAL:CLK_COR_SEQ_1_4_0[2] GTP_DUAL:DRP35[12]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_4_0[0] GTP_DUAL:DRP35[10]	GTP_DUAL:CLK_COR_SEQ_1_4_0[1] GTP_DUAL:DRP35[11]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[3] GTP_DUAL:DRP35[9]	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[2] GTP_DUAL:DRP35[8]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[0] GTP_DUAL:DRP35[6]	GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[1] GTP_DUAL:DRP35[7]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_0[9] GTP_DUAL:DRP35[5]	GTP_DUAL:CLK_COR_SEQ_2_1_0[8] GTP_DUAL:DRP35[4]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_0[6] GTP_DUAL:DRP35[2]	GTP_DUAL:CLK_COR_SEQ_2_1_0[7] GTP_DUAL:DRP35[3]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_0[5] GTP_DUAL:DRP35[1]	GTP_DUAL:CLK_COR_SEQ_2_1_0[4] GTP_DUAL:DRP35[0]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_0[2] GTP_DUAL:DRP34[14]	GTP_DUAL:CLK_COR_SEQ_2_1_0[3] GTP_DUAL:DRP34[15]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_1_0[1] GTP_DUAL:DRP34[13]	GTP_DUAL:CLK_COR_SEQ_2_1_0[0] GTP_DUAL:DRP34[12]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_0[8] GTP_DUAL:DRP34[10]	GTP_DUAL:CLK_COR_SEQ_2_2_0[9] GTP_DUAL:DRP34[11]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_0[7] GTP_DUAL:DRP34[9]	GTP_DUAL:CLK_COR_SEQ_2_2_0[6] GTP_DUAL:DRP34[8]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_0[4] GTP_DUAL:DRP34[6]	GTP_DUAL:CLK_COR_SEQ_2_2_0[5] GTP_DUAL:DRP34[7]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_0[3] GTP_DUAL:DRP34[5]	GTP_DUAL:CLK_COR_SEQ_2_2_0[2] GTP_DUAL:DRP34[4]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_2_0[0] GTP_DUAL:DRP34[2]	GTP_DUAL:CLK_COR_SEQ_2_2_0[1] GTP_DUAL:DRP34[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_0[9] GTP_DUAL:DRP34[1]	GTP_DUAL:CLK_COR_SEQ_2_3_0[8] GTP_DUAL:DRP34[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_0[6] GTP_DUAL:DRP33[14]	GTP_DUAL:CLK_COR_SEQ_2_3_0[7] GTP_DUAL:DRP33[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_0[5] GTP_DUAL:DRP33[13]	GTP_DUAL:CLK_COR_SEQ_2_3_0[4] GTP_DUAL:DRP33[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_0[2] GTP_DUAL:DRP33[10]	GTP_DUAL:CLK_COR_SEQ_2_3_0[3] GTP_DUAL:DRP33[11]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_3_0[1] GTP_DUAL:DRP33[9]	GTP_DUAL:CLK_COR_SEQ_2_3_0[0] GTP_DUAL:DRP33[8]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_0[8] GTP_DUAL:DRP33[6]	GTP_DUAL:CLK_COR_SEQ_2_4_0[9] GTP_DUAL:DRP33[7]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_0[7] GTP_DUAL:DRP33[5]	GTP_DUAL:CLK_COR_SEQ_2_4_0[6] GTP_DUAL:DRP33[4]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_0[4] GTP_DUAL:DRP33[2]	GTP_DUAL:CLK_COR_SEQ_2_4_0[5] GTP_DUAL:DRP33[3]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_0[3] GTP_DUAL:DRP33[1]	GTP_DUAL:CLK_COR_SEQ_2_4_0[2] GTP_DUAL:DRP33[0]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_4_0[0] GTP_DUAL:DRP32[14]	GTP_DUAL:CLK_COR_SEQ_2_4_0[1] GTP_DUAL:DRP32[15]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[3] GTP_DUAL:DRP32[13]	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[2] GTP_DUAL:DRP32[12]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[0] GTP_DUAL:DRP32[10]	GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[1] GTP_DUAL:DRP32[11]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_2_USE_0 GTP_DUAL:DRP32[9]	GTP_DUAL:COM_BURST_VAL_0[3] GTP_DUAL:DRP32[8]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COM_BURST_VAL_0[1] GTP_DUAL:DRP32[6]	GTP_DUAL:COM_BURST_VAL_0[2] GTP_DUAL:DRP32[7]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COM_BURST_VAL_0[0] GTP_DUAL:DRP32[5]	GTP_DUAL:COMMA_10B_ENABLE_0[9] GTP_DUAL:DRP32[4]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_0[7] GTP_DUAL:DRP32[2]	GTP_DUAL:COMMA_10B_ENABLE_0[8] GTP_DUAL:DRP32[3]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_0[6] GTP_DUAL:DRP32[1]	GTP_DUAL:COMMA_10B_ENABLE_0[5] GTP_DUAL:DRP32[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_0[3] GTP_DUAL:DRP31[14]	GTP_DUAL:COMMA_10B_ENABLE_0[4] GTP_DUAL:DRP31[15]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_10B_ENABLE_0[2] GTP_DUAL:DRP31[13]	GTP_DUAL:COMMA_10B_ENABLE_0[1] GTP_DUAL:DRP31[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:COMMA_DOUBLE_0 GTP_DUAL:DRP31[10]	GTP_DUAL:COMMA_10B_ENABLE_0[0] GTP_DUAL:DRP31[11]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DEC_MCOMMA_DETECT_0 GTP_DUAL:DRP31[9]	GTP_DUAL:DEC_PCOMMA_DETECT_0 GTP_DUAL:DRP31[8]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP31[6] GTP_DUAL:MCOMMA_10B_VALUE_0[9]	GTP_DUAL:DEC_VALID_COMMA_ONLY_0 GTP_DUAL:DRP31[7]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP31[5] GTP_DUAL:MCOMMA_10B_VALUE_0[8]	GTP_DUAL:DRP31[4] GTP_DUAL:MCOMMA_10B_VALUE_0[7]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP31[2] GTP_DUAL:MCOMMA_10B_VALUE_0[5]	GTP_DUAL:DRP31[3] GTP_DUAL:MCOMMA_10B_VALUE_0[6]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP31[1] GTP_DUAL:MCOMMA_10B_VALUE_0[4]	GTP_DUAL:DRP31[0] GTP_DUAL:MCOMMA_10B_VALUE_0[3]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP30[14] GTP_DUAL:MCOMMA_10B_VALUE_0[1]	GTP_DUAL:DRP30[15] GTP_DUAL:MCOMMA_10B_VALUE_0[2]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP30[13] GTP_DUAL:MCOMMA_10B_VALUE_0[0]	GTP_DUAL:DRP30[12] GTP_DUAL:MCOMMA_DETECT_0
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[0] GTP_DUAL:DRP30[10]	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[9] GTP_DUAL:DRP30[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[1] GTP_DUAL:DRP30[9]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[2] GTP_DUAL:DRP30[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[31]	-	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[4] GTP_DUAL:DRP30[6]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[3] GTP_DUAL:DRP30[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[30]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[5] GTP_DUAL:DRP30[5]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[6] GTP_DUAL:DRP30[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[29]	-	GTP_DUAL:DRP30[2]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[7] GTP_DUAL:DRP30[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_2:CRC_INIT[28]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[8] GTP_DUAL:DRP30[1]	GTP_DUAL:CHAN_BOND_SEQ_2_2_0[9] GTP_DUAL:DRP30[0]

virtex5 GTP rect R12
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[14] GTP_DUAL:SATA_MIN_BURST_0[4]	GTP_DUAL:DRP3F[15] GTP_DUAL:SATA_MIN_BURST_0[5]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[13] GTP_DUAL:SATA_MIN_BURST_0[3]	GTP_DUAL:DRP3F[12] GTP_DUAL:SATA_MIN_BURST_0[2]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[10] GTP_DUAL:SATA_MIN_BURST_0[0]	GTP_DUAL:DRP3F[11] GTP_DUAL:SATA_MIN_BURST_0[1]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[9] GTP_DUAL:SATA_MIN_INIT_0[5]	GTP_DUAL:DRP3F[8] GTP_DUAL:SATA_MIN_INIT_0[4]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[6] GTP_DUAL:SATA_MIN_INIT_0[2]	GTP_DUAL:DRP3F[7] GTP_DUAL:SATA_MIN_INIT_0[3]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[5] GTP_DUAL:SATA_MIN_INIT_0[1]	GTP_DUAL:DRP3F[4] GTP_DUAL:SATA_MIN_INIT_0[0]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[2] GTP_DUAL:SATA_MIN_WAKE_0[4]	GTP_DUAL:DRP3F[3] GTP_DUAL:SATA_MIN_WAKE_0[5]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3F[1] GTP_DUAL:SATA_MIN_WAKE_0[3]	GTP_DUAL:DRP3F[0] GTP_DUAL:SATA_MIN_WAKE_0[2]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[14] GTP_DUAL:SATA_MIN_WAKE_0[0]	GTP_DUAL:DRP3E[15] GTP_DUAL:SATA_MIN_WAKE_0[1]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[13] GTP_DUAL:TERMINATION_IMP_0[0]	GTP_DUAL:DRP3E[12] GTP_DUAL:TRANS_TIME_FROM_P2_0[15]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[10] GTP_DUAL:TRANS_TIME_FROM_P2_0[13]	GTP_DUAL:DRP3E[11] GTP_DUAL:TRANS_TIME_FROM_P2_0[14]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[9] GTP_DUAL:TRANS_TIME_FROM_P2_0[12]	GTP_DUAL:DRP3E[8] GTP_DUAL:TRANS_TIME_FROM_P2_0[11]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[6] GTP_DUAL:TRANS_TIME_FROM_P2_0[9]	GTP_DUAL:DRP3E[7] GTP_DUAL:TRANS_TIME_FROM_P2_0[10]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[5] GTP_DUAL:TRANS_TIME_FROM_P2_0[8]	GTP_DUAL:DRP3E[4] GTP_DUAL:TRANS_TIME_FROM_P2_0[7]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[2] GTP_DUAL:TRANS_TIME_FROM_P2_0[5]	GTP_DUAL:DRP3E[3] GTP_DUAL:TRANS_TIME_FROM_P2_0[6]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3E[1] GTP_DUAL:TRANS_TIME_FROM_P2_0[4]	GTP_DUAL:DRP3E[0] GTP_DUAL:TRANS_TIME_FROM_P2_0[3]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[14] GTP_DUAL:TRANS_TIME_FROM_P2_0[1]	GTP_DUAL:DRP3D[15] GTP_DUAL:TRANS_TIME_FROM_P2_0[2]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[13] GTP_DUAL:TRANS_TIME_FROM_P2_0[0]	GTP_DUAL:DRP3D[12] GTP_DUAL:TRANS_TIME_NON_P2_0[15]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[10] GTP_DUAL:TRANS_TIME_NON_P2_0[13]	GTP_DUAL:DRP3D[11] GTP_DUAL:TRANS_TIME_NON_P2_0[14]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[9] GTP_DUAL:TRANS_TIME_NON_P2_0[12]	GTP_DUAL:DRP3D[8] GTP_DUAL:TRANS_TIME_NON_P2_0[11]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[6] GTP_DUAL:TRANS_TIME_NON_P2_0[9]	GTP_DUAL:DRP3D[7] GTP_DUAL:TRANS_TIME_NON_P2_0[10]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[5] GTP_DUAL:TRANS_TIME_NON_P2_0[8]	GTP_DUAL:DRP3D[4] GTP_DUAL:TRANS_TIME_NON_P2_0[7]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[2] GTP_DUAL:TRANS_TIME_NON_P2_0[5]	GTP_DUAL:DRP3D[3] GTP_DUAL:TRANS_TIME_NON_P2_0[6]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3D[1] GTP_DUAL:TRANS_TIME_NON_P2_0[4]	GTP_DUAL:DRP3D[0] GTP_DUAL:TRANS_TIME_NON_P2_0[3]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[14] GTP_DUAL:TRANS_TIME_NON_P2_0[1]	GTP_DUAL:DRP3C[15] GTP_DUAL:TRANS_TIME_NON_P2_0[2]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[13] GTP_DUAL:TRANS_TIME_NON_P2_0[0]	GTP_DUAL:DRP3C[12] GTP_DUAL:TRANS_TIME_TO_P2_0[15]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[10] GTP_DUAL:TRANS_TIME_TO_P2_0[13]	GTP_DUAL:DRP3C[11] GTP_DUAL:TRANS_TIME_TO_P2_0[14]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[9] GTP_DUAL:TRANS_TIME_TO_P2_0[12]	GTP_DUAL:DRP3C[8] GTP_DUAL:TRANS_TIME_TO_P2_0[11]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[6] GTP_DUAL:TRANS_TIME_TO_P2_0[9]	GTP_DUAL:DRP3C[7] GTP_DUAL:TRANS_TIME_TO_P2_0[10]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[5] GTP_DUAL:TRANS_TIME_TO_P2_0[8]	GTP_DUAL:DRP3C[4] GTP_DUAL:TRANS_TIME_TO_P2_0[7]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[2] GTP_DUAL:TRANS_TIME_TO_P2_0[5]	GTP_DUAL:DRP3C[3] GTP_DUAL:TRANS_TIME_TO_P2_0[6]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3C[1] GTP_DUAL:TRANS_TIME_TO_P2_0[4]	GTP_DUAL:DRP3C[0] GTP_DUAL:TRANS_TIME_TO_P2_0[3]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[14] GTP_DUAL:TRANS_TIME_TO_P2_0[1]	GTP_DUAL:DRP3B[15] GTP_DUAL:TRANS_TIME_TO_P2_0[2]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[13] GTP_DUAL:TRANS_TIME_TO_P2_0[0]	GTP_DUAL:DRP3B[12] GTP_DUAL:TX_BUFFER_USE_0
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[10] GTP_DUAL:TX_DETECT_RX_CFG_0[12]	GTP_DUAL:DRP3B[11] GTP_DUAL:TX_DETECT_RX_CFG_0[13]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[9] GTP_DUAL:TX_DETECT_RX_CFG_0[11]	GTP_DUAL:DRP3B[8] GTP_DUAL:TX_DETECT_RX_CFG_0[10]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[6] GTP_DUAL:TX_DETECT_RX_CFG_0[8]	GTP_DUAL:DRP3B[7] GTP_DUAL:TX_DETECT_RX_CFG_0[9]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[5] GTP_DUAL:TX_DETECT_RX_CFG_0[7]	GTP_DUAL:DRP3B[4] GTP_DUAL:TX_DETECT_RX_CFG_0[6]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[2] GTP_DUAL:TX_DETECT_RX_CFG_0[4]	GTP_DUAL:DRP3B[3] GTP_DUAL:TX_DETECT_RX_CFG_0[5]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3B[1] GTP_DUAL:TX_DETECT_RX_CFG_0[3]	GTP_DUAL:DRP3B[0] GTP_DUAL:TX_DETECT_RX_CFG_0[2]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[14] GTP_DUAL:TX_DETECT_RX_CFG_0[0]	GTP_DUAL:DRP3A[15] GTP_DUAL:TX_DETECT_RX_CFG_0[1]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[13] GTP_DUAL:TXRX_INVERT_0[4]	GTP_DUAL:DRP3A[12] GTP_DUAL:TXRX_INVERT_0[3]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[10] GTP_DUAL:TXRX_INVERT_0[1]	GTP_DUAL:DRP3A[11] GTP_DUAL:TXRX_INVERT_0[2]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[9] GTP_DUAL:TXRX_INVERT_0[0]	GTP_DUAL:DRP3A[8] GTP_DUAL:TX_XCLK_SEL_0[0]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[6] GTP_DUAL:PMA_COM_CFG[19]	GTP_DUAL:DRP3A[7] GTP_DUAL:TXOUTCLK_SEL_0
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[5] GTP_DUAL:OOBDETECT_THRESHOLD_0[2]	GTP_DUAL:DRP3A[4] GTP_DUAL:OOBDETECT_THRESHOLD_0[1]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP3A[2]	GTP_DUAL:DRP3A[3] GTP_DUAL:OOBDETECT_THRESHOLD_0[0]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[3] GTP_DUAL:DRP3A[1]	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[2] GTP_DUAL:DRP3A[0]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[0] GTP_DUAL:DRP39[14]	GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[1] GTP_DUAL:DRP39[15]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_USE_0 GTP_DUAL:DRP39[13]	GTP_DUAL:CHAN_BOND_SEQ_LEN_0[1] GTP_DUAL:DRP39[12]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_ADJ_LEN_0[1] GTP_DUAL:DRP39[10]	GTP_DUAL:CHAN_BOND_SEQ_LEN_0[0] GTP_DUAL:DRP39[11]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_ADJ_LEN_0[0] GTP_DUAL:DRP39[9]	GTP_DUAL:CLK_COR_DET_LEN_0[1] GTP_DUAL:DRP39[8]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_0 GTP_DUAL:DRP39[6]	GTP_DUAL:CLK_COR_DET_LEN_0[0] GTP_DUAL:DRP39[7]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_KEEP_IDLE_0 GTP_DUAL:DRP39[5]	GTP_DUAL:CLK_COR_MAX_LAT_0[5] GTP_DUAL:DRP39[4]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MAX_LAT_0[3] GTP_DUAL:DRP39[2]	GTP_DUAL:CLK_COR_MAX_LAT_0[4] GTP_DUAL:DRP39[3]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MAX_LAT_0[2] GTP_DUAL:DRP39[1]	GTP_DUAL:CLK_COR_MAX_LAT_0[1] GTP_DUAL:DRP39[0]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_0[5] GTP_DUAL:DRP38[14]	GTP_DUAL:CLK_COR_MAX_LAT_0[0] GTP_DUAL:DRP38[15]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_0[4] GTP_DUAL:DRP38[13]	GTP_DUAL:CLK_COR_MIN_LAT_0[3] GTP_DUAL:DRP38[12]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_0[1] GTP_DUAL:DRP38[10]	GTP_DUAL:CLK_COR_MIN_LAT_0[2] GTP_DUAL:DRP38[11]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_MIN_LAT_0[0] GTP_DUAL:DRP38[9]	GTP_DUAL:CLK_COR_PRECEDENCE_0 GTP_DUAL:DRP38[8]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_0[4] GTP_DUAL:DRP38[6]	GTP_DUAL:CLK_CORRECT_USE_0 GTP_DUAL:DRP38[7]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_0[3] GTP_DUAL:DRP38[5]	GTP_DUAL:CLK_COR_REPEAT_WAIT_0[2] GTP_DUAL:DRP38[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_REPEAT_WAIT_0[0] GTP_DUAL:DRP38[2]	GTP_DUAL:CLK_COR_REPEAT_WAIT_0[1] GTP_DUAL:DRP38[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CLK_COR_SEQ_1_1_0[9] GTP_DUAL:DRP38[1]	GTP_DUAL:CLK_COR_SEQ_1_1_0[8] GTP_DUAL:DRP38[0]

virtex5 GTP rect R13
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[5] GTP_DUAL:DRP47[14]	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[4] GTP_DUAL:DRP47[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[6] GTP_DUAL:DRP47[13]	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[7] GTP_DUAL:DRP47[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[9] GTP_DUAL:DRP47[10]	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[8] GTP_DUAL:DRP47[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[0] GTP_DUAL:DRP47[9]	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[1] GTP_DUAL:DRP47[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[3] GTP_DUAL:DRP47[6]	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[2] GTP_DUAL:DRP47[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[4] GTP_DUAL:DRP47[5]	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[5] GTP_DUAL:DRP47[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[7] GTP_DUAL:DRP47[2]	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[6] GTP_DUAL:DRP47[3]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_3_0[8] GTP_DUAL:DRP47[1]	GTP_DUAL:DRP47[0]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[14] GTP_DUAL:PCOMMA_10B_VALUE_0[9]	GTP_DUAL:DRP46[15] GTP_DUAL:PCI_EXPRESS_MODE_0
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[13] GTP_DUAL:PCOMMA_10B_VALUE_0[8]	GTP_DUAL:DRP46[12] GTP_DUAL:PCOMMA_10B_VALUE_0[7]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[10] GTP_DUAL:PCOMMA_10B_VALUE_0[5]	GTP_DUAL:DRP46[11] GTP_DUAL:PCOMMA_10B_VALUE_0[6]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[9] GTP_DUAL:PCOMMA_10B_VALUE_0[4]	GTP_DUAL:DRP46[8] GTP_DUAL:PCOMMA_10B_VALUE_0[3]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[6] GTP_DUAL:PCOMMA_10B_VALUE_0[1]	GTP_DUAL:DRP46[7] GTP_DUAL:PCOMMA_10B_VALUE_0[2]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[5] GTP_DUAL:PCOMMA_10B_VALUE_0[0]	GTP_DUAL:DRP46[4] GTP_DUAL:PCOMMA_DETECT_0
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[2] GTP_DUAL:PLL_RXDIVSEL_OUT_0[0]	GTP_DUAL:DRP46[3] GTP_DUAL:PLL_RXDIVSEL_OUT_0[1]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP46[1] GTP_DUAL:PLL_SATA_0	GTP_DUAL:DRP46[0] GTP_DUAL:PLL_TXDIVSEL_OUT_0[1]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[14] GTP_DUAL:PMA_CDR_SCAN_0[26]	GTP_DUAL:DRP45[15] GTP_DUAL:PLL_TXDIVSEL_OUT_0[0]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[13] GTP_DUAL:PMA_CDR_SCAN_0[25]	GTP_DUAL:DRP45[12] GTP_DUAL:PMA_CDR_SCAN_0[24]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[10] GTP_DUAL:PMA_CDR_SCAN_0[22]	GTP_DUAL:DRP45[11] GTP_DUAL:PMA_CDR_SCAN_0[23]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[9] GTP_DUAL:PMA_CDR_SCAN_0[21]	GTP_DUAL:DRP45[8] GTP_DUAL:PMA_CDR_SCAN_0[20]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[6] GTP_DUAL:PMA_CDR_SCAN_0[18]	GTP_DUAL:DRP45[7] GTP_DUAL:PMA_CDR_SCAN_0[19]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[5] GTP_DUAL:PMA_CDR_SCAN_0[17]	GTP_DUAL:DRP45[4] GTP_DUAL:PMA_CDR_SCAN_0[16]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[2] GTP_DUAL:PMA_CDR_SCAN_0[14]	GTP_DUAL:DRP45[3] GTP_DUAL:PMA_CDR_SCAN_0[15]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP45[1] GTP_DUAL:PMA_CDR_SCAN_0[13]	GTP_DUAL:DRP45[0] GTP_DUAL:PMA_CDR_SCAN_0[12]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[14] GTP_DUAL:PMA_CDR_SCAN_0[10]	GTP_DUAL:DRP44[15] GTP_DUAL:PMA_CDR_SCAN_0[11]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[13] GTP_DUAL:PMA_CDR_SCAN_0[9]	GTP_DUAL:DRP44[12] GTP_DUAL:PMA_CDR_SCAN_0[8]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[10] GTP_DUAL:PMA_CDR_SCAN_0[6]	GTP_DUAL:DRP44[11] GTP_DUAL:PMA_CDR_SCAN_0[7]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[9] GTP_DUAL:PMA_CDR_SCAN_0[5]	GTP_DUAL:DRP44[8] GTP_DUAL:PMA_CDR_SCAN_0[4]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[6] GTP_DUAL:PMA_CDR_SCAN_0[2]	GTP_DUAL:DRP44[7] GTP_DUAL:PMA_CDR_SCAN_0[3]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[5] GTP_DUAL:PMA_CDR_SCAN_0[1]	GTP_DUAL:DRP44[4] GTP_DUAL:PMA_CDR_SCAN_0[0]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[2] GTP_DUAL:PRBS_ERR_THRESHOLD_0[30]	GTP_DUAL:DRP44[3] GTP_DUAL:PRBS_ERR_THRESHOLD_0[31]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP44[1] GTP_DUAL:PRBS_ERR_THRESHOLD_0[29]	GTP_DUAL:DRP44[0] GTP_DUAL:PRBS_ERR_THRESHOLD_0[28]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[14] GTP_DUAL:PRBS_ERR_THRESHOLD_0[26]	GTP_DUAL:DRP43[15] GTP_DUAL:PRBS_ERR_THRESHOLD_0[27]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[13] GTP_DUAL:PRBS_ERR_THRESHOLD_0[25]	GTP_DUAL:DRP43[12] GTP_DUAL:PRBS_ERR_THRESHOLD_0[24]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[10] GTP_DUAL:PRBS_ERR_THRESHOLD_0[22]	GTP_DUAL:DRP43[11] GTP_DUAL:PRBS_ERR_THRESHOLD_0[23]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[9] GTP_DUAL:PRBS_ERR_THRESHOLD_0[21]	GTP_DUAL:DRP43[8] GTP_DUAL:PRBS_ERR_THRESHOLD_0[20]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[6] GTP_DUAL:PRBS_ERR_THRESHOLD_0[18]	GTP_DUAL:DRP43[7] GTP_DUAL:PRBS_ERR_THRESHOLD_0[19]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[5] GTP_DUAL:PRBS_ERR_THRESHOLD_0[17]	GTP_DUAL:DRP43[4] GTP_DUAL:PRBS_ERR_THRESHOLD_0[16]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[2] GTP_DUAL:PRBS_ERR_THRESHOLD_0[14]	GTP_DUAL:DRP43[3] GTP_DUAL:PRBS_ERR_THRESHOLD_0[15]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP43[1] GTP_DUAL:PRBS_ERR_THRESHOLD_0[13]	GTP_DUAL:DRP43[0] GTP_DUAL:PRBS_ERR_THRESHOLD_0[12]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[14] GTP_DUAL:PRBS_ERR_THRESHOLD_0[10]	GTP_DUAL:DRP42[15] GTP_DUAL:PRBS_ERR_THRESHOLD_0[11]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[13] GTP_DUAL:PRBS_ERR_THRESHOLD_0[9]	GTP_DUAL:DRP42[12] GTP_DUAL:PRBS_ERR_THRESHOLD_0[8]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[10] GTP_DUAL:PRBS_ERR_THRESHOLD_0[6]	GTP_DUAL:DRP42[11] GTP_DUAL:PRBS_ERR_THRESHOLD_0[7]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[9] GTP_DUAL:PRBS_ERR_THRESHOLD_0[5]	GTP_DUAL:DRP42[8] GTP_DUAL:PRBS_ERR_THRESHOLD_0[4]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[6] GTP_DUAL:PRBS_ERR_THRESHOLD_0[2]	GTP_DUAL:DRP42[7] GTP_DUAL:PRBS_ERR_THRESHOLD_0[3]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[5] GTP_DUAL:PRBS_ERR_THRESHOLD_0[1]	GTP_DUAL:DRP42[4] GTP_DUAL:PRBS_ERR_THRESHOLD_0[0]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[2] GTP_DUAL:RX_DECODE_SEQ_MATCH_0	GTP_DUAL:DRP42[3] GTP_DUAL:RX_BUFFER_USE_0
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP42[1] GTP_DUAL:RX_LOS_INVALID_INCR_0[2]	GTP_DUAL:DRP42[0] GTP_DUAL:RX_LOS_INVALID_INCR_0[1]
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[14] GTP_DUAL:RX_LOSS_OF_SYNC_FSM_0	GTP_DUAL:DRP41[15] GTP_DUAL:RX_LOS_INVALID_INCR_0[0]
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[13] GTP_DUAL:RX_LOS_THRESHOLD_0[2]	GTP_DUAL:DRP41[12] GTP_DUAL:RX_LOS_THRESHOLD_0[1]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[10] GTP_DUAL:RX_SLIDE_MODE_0[0]	GTP_DUAL:DRP41[11] GTP_DUAL:RX_LOS_THRESHOLD_0[0]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[9] GTP_DUAL:RX_STATUS_FMT_0[0]	GTP_DUAL:DRP41[8] GTP_DUAL:RX_XCLK_SEL_0[0]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[6] GTP_DUAL:SATA_BURST_VAL_0[1]	GTP_DUAL:DRP41[7] GTP_DUAL:SATA_BURST_VAL_0[2]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[5] GTP_DUAL:SATA_BURST_VAL_0[0]	GTP_DUAL:DRP41[4] GTP_DUAL:SATA_IDLE_VAL_0[2]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[2] GTP_DUAL:SATA_IDLE_VAL_0[0]	GTP_DUAL:DRP41[3] GTP_DUAL:SATA_IDLE_VAL_0[1]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP41[1] GTP_DUAL:SATA_MAX_BURST_0[5]	GTP_DUAL:DRP41[0] GTP_DUAL:SATA_MAX_BURST_0[4]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[14] GTP_DUAL:SATA_MAX_BURST_0[2]	GTP_DUAL:DRP40[15] GTP_DUAL:SATA_MAX_BURST_0[3]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[13] GTP_DUAL:SATA_MAX_BURST_0[1]	GTP_DUAL:DRP40[12] GTP_DUAL:SATA_MAX_BURST_0[0]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[10] GTP_DUAL:SATA_MAX_INIT_0[4]	GTP_DUAL:DRP40[11] GTP_DUAL:SATA_MAX_INIT_0[5]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[9] GTP_DUAL:SATA_MAX_INIT_0[3]	GTP_DUAL:DRP40[8] GTP_DUAL:SATA_MAX_INIT_0[2]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[6] GTP_DUAL:SATA_MAX_INIT_0[0]	GTP_DUAL:DRP40[7] GTP_DUAL:SATA_MAX_INIT_0[1]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[5] GTP_DUAL:SATA_MAX_WAKE_0[5]	GTP_DUAL:DRP40[4] GTP_DUAL:SATA_MAX_WAKE_0[4]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[2] GTP_DUAL:SATA_MAX_WAKE_0[2]	GTP_DUAL:DRP40[3] GTP_DUAL:SATA_MAX_WAKE_0[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP40[1] GTP_DUAL:SATA_MAX_WAKE_0[1]	GTP_DUAL:DRP40[0] GTP_DUAL:SATA_MAX_WAKE_0[0]

virtex5 GTP rect R14
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29	F30	F31
B63	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[14]	GTP_DUAL:DRP4F[15]
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[13]	GTP_DUAL:DRP4F[12]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[10]	GTP_DUAL:DRP4F[11]
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[9]	GTP_DUAL:DRP4F[8]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[6]	GTP_DUAL:DRP4F[7]
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[5]	GTP_DUAL:DRP4F[4]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[2]	GTP_DUAL:DRP4F[3]
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4F[1]	GTP_DUAL:DRP4F[0]
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[14]	GTP_DUAL:DRP4E[15]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[13]	GTP_DUAL:DRP4E[12]
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[10]	GTP_DUAL:DRP4E[11]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[9]	GTP_DUAL:DRP4E[8]
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[6]	GTP_DUAL:DRP4E[7]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[5]	GTP_DUAL:DRP4E[4]
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[2]	GTP_DUAL:DRP4E[3]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4E[1]	GTP_DUAL:DRP4E[0]
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[14]	GTP_DUAL:DRP4D[15]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[13]	GTP_DUAL:DRP4D[12]
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[10]	GTP_DUAL:DRP4D[11]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[9]	GTP_DUAL:DRP4D[8]
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[6]	GTP_DUAL:DRP4D[7]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[5]	GTP_DUAL:DRP4D[4]
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[2]	GTP_DUAL:DRP4D[3]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4D[1]	GTP_DUAL:DRP4D[0]
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[14]	GTP_DUAL:DRP4C[15]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[13]	GTP_DUAL:DRP4C[12]
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[10]	GTP_DUAL:DRP4C[11]
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[9]	GTP_DUAL:DRP4C[8]
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[6]	GTP_DUAL:DRP4C[7]
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[5]	GTP_DUAL:DRP4C[4]
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[2]	GTP_DUAL:DRP4C[3]
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4C[1]	GTP_DUAL:DRP4C[0]
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[14]	GTP_DUAL:DRP4B[15]
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[13]	GTP_DUAL:DRP4B[12]
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[10]	GTP_DUAL:DRP4B[11]
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[9]	GTP_DUAL:DRP4B[8]
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[6]	GTP_DUAL:DRP4B[7]
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[5]	GTP_DUAL:DRP4B[4]
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[2]	GTP_DUAL:DRP4B[3]
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4B[1]	GTP_DUAL:DRP4B[0] GTP_DUAL:PMA_COM_CFG[89]
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[14] GTP_DUAL:PMA_COM_CFG[88]	GTP_DUAL:DRP4A[15] GTP_DUAL:PMA_COM_CFG[87]
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[13] GTP_DUAL:TX_DIFF_BOOST_0	GTP_DUAL:DRP4A[12]
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[10] GTP_DUAL:PLL_STARTUP_EN	GTP_DUAL:DRP4A[11]
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[9] GTP_DUAL:PLL_TXDIVSEL_COMM_OUT[0]	GTP_DUAL:DRP4A[8] GTP_DUAL:PLL_TXDIVSEL_COMM_OUT[1]
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[6] GTP_DUAL:PMA_COM_CFG[31]	GTP_DUAL:DRP4A[7] GTP_DUAL:PMA_COM_CFG[20]
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[5] GTP_DUAL:PMA_COM_CFG[30]	GTP_DUAL:DRP4A[4] GTP_DUAL:PMA_COM_CFG[29]
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[2] GTP_DUAL:PMA_COM_CFG[27]	GTP_DUAL:DRP4A[3] GTP_DUAL:PMA_COM_CFG[28]
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP4A[1] GTP_DUAL:RCV_TERM_VTTRX_0	GTP_DUAL:DRP4A[0] GTP_DUAL:RCV_TERM_GND_0
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:AC_CAP_DIS_0 GTP_DUAL:DRP49[14]	GTP_DUAL:DRP49[15] GTP_DUAL:RCV_TERM_MID_0
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[13] GTP_DUAL:PMA_RX_CFG_0[12]	GTP_DUAL:DRP49[12] GTP_DUAL:PMA_RX_CFG_0[24]
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[10] GTP_DUAL:PMA_RX_CFG_0[0]	GTP_DUAL:DRP49[11] GTP_DUAL:PMA_RX_CFG_0[1]
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[9] GTP_DUAL:PMA_RX_CFG_1[11]	GTP_DUAL:DRP49[8] GTP_DUAL:PMA_RX_CFG_0[22]
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[6] GTP_DUAL:PMA_RX_CFG_0[20]	GTP_DUAL:DRP49[7] GTP_DUAL:PMA_RX_CFG_0[21]
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[5] GTP_DUAL:PMA_RX_CFG_0[19]	GTP_DUAL:DRP49[4] GTP_DUAL:PMA_RX_CFG_0[18]
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[2] GTP_DUAL:PMA_RX_CFG_0[16]	GTP_DUAL:DRP49[3] GTP_DUAL:PMA_RX_CFG_0[17]
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP49[1] GTP_DUAL:PMA_RX_CFG_0[15]	GTP_DUAL:DRP49[0] GTP_DUAL:PMA_RX_CFG_0[14]
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[14] GTP_DUAL:RX_CDR_FORCE_ROTATE_0	GTP_DUAL:DRP48[15] GTP_DUAL:PMA_RX_CFG_1[13]
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[13] GTP_DUAL:PMA_RX_CFG_0[5]	GTP_DUAL:DRP48[12] GTP_DUAL:PMA_RX_CFG_0[4]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[10] GTP_DUAL:PMA_RX_CFG_0[2]	GTP_DUAL:DRP48[11] GTP_DUAL:PMA_RX_CFG_0[3]
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[9] GTP_DUAL:PMA_RX_CFG_0[23]	GTP_DUAL:DRP48[8] GTP_DUAL:PMA_RX_CFG_0[10]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[6] GTP_DUAL:PMA_RX_CFG_0[8]	GTP_DUAL:DRP48[7] GTP_DUAL:PMA_RX_CFG_0[9]
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:DRP48[5] GTP_DUAL:PMA_RX_CFG_0[7]	GTP_DUAL:DRP48[4] GTP_DUAL:PMA_RX_CFG_0[6]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[1] GTP_DUAL:DRP48[2]	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[0] GTP_DUAL:DRP48[3]
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[2] GTP_DUAL:DRP48[1]	GTP_DUAL:CHAN_BOND_SEQ_2_4_0[3] GTP_DUAL:DRP48[0]

virtex5 GTP rect R15
Bit	Frame
Bit

virtex5 GTP rect R16
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B62	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[11]
B61	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B60	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[10]
B59	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B58	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[9]
B57	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B56	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B55	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[8]
B54	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B53	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[7]
B52	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B51	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[6]
B50	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B49	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[5]
B48	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B47	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[4]
B46	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B45	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[3]
B44	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B43	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[2]
B42	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[1]
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[0]
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

virtex5 GTP rect R17
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28	F29
B41	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:ENABLE64
B40	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B39	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[31]	-
B38	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B37	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[30]	-
B36	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B35	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[29]	-
B34	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B33	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[28]	-
B32	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B31	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[27]	-
B30	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B29	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B28	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[26]	-
B27	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[25]	-
B26	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B25	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B24	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[24]	-
B23	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B22	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[23]	-
B21	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B20	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[22]	-
B19	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B18	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[21]	-
B17	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B16	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[20]	-
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[19]	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[18]	-
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[17]	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[16]	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[15]
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[14]
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[13]
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	CRC32_3:CRC_INIT[12]

virtex5 GTP rect R18
Bit	Frame
Bit

virtex5 GTP rect R19
Bit	Frame
Bit

virtex5 GTP rect R20
Bit	Frame
Bit	F0	F1	F2	F3	F4	F5	F6	F7	F8	F9	F10	F11	F12	F13	F14	F15	F16	F17	F18	F19	F20	F21	F22	F23	F24	F25	F26	F27	F28
B15	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:USRCLK0	~CRC32_0:INV.CRCCLK	-	-	-	-	-	-	-	-	-	-
B14	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	~CRC32_2:INV.CRCCLK	-	-	-	-	-	-	-	-	-	-
B13	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	~CRC32_3:INV.CRCCLK	GTP_DUAL:INV.DCLK	GTP_DUAL:INV.TXUSRCLK1	GTP_DUAL:INV.RXUSRCLK1	GTP_DUAL:INV.RXUSRCLK20	GTP_DUAL:INV.TXUSRCLK20	-	-	-	-	-
B12	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	GTP_DUAL:USRCLK1	~CRC32_1:INV.CRCCLK	GTP_DUAL:INV.TXUSRCLK21	GTP_DUAL:INV.RXUSRCLK21	GTP_DUAL:INV.RXUSRCLK0	GTP_DUAL:INV.TXUSRCLK0	-	-	-	-	GTP_DUAL:ENABLE
B11	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B10	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B9	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B8	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B7	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B6	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B5	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B4	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B3	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B2	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-
B0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

CRC32_0:CRC_INIT	2.F28.B24	2.F28.B26	2.F28.B28	2.F28.B30	2.F28.B32	2.F28.B35	2.F28.B36	2.F28.B39	2.F28.B41	2.F28.B43	2.F28.B45	2.F28.B47	2.F28.B49	2.F28.B51	2.F28.B53	2.F28.B55	2.F29.B57	2.F29.B59	2.F29.B61	2.F29.B63	3.F29.B1	3.F29.B3	3.F29.B5	3.F29.B8	3.F29.B10	3.F29.B12	3.F29.B14	3.F29.B16	3.F29.B18	3.F29.B20	3.F29.B22	3.F29.B24
CRC32_1:CRC_INIT	8.F28.B60	8.F29.B61	8.F28.B62	8.F29.B63	9.F28.B0	9.F29.B1	9.F28.B3	9.F29.B3	9.F28.B4	9.F29.B6	9.F28.B6	9.F29.B7	9.F28.B8	9.F28.B9	9.F29.B10	9.F28.B11	9.F29.B12	9.F28.B12	9.F29.B13	9.F28.B14	9.F29.B15	9.F28.B17	9.F29.B18	9.F28.B19	9.F29.B20	9.F28.B21	9.F29.B22	9.F28.B23	9.F29.B24	9.F28.B25	9.F29.B26	9.F29.B27
CRC32_2:CRC_INIT	11.F28.B3	11.F29.B2	11.F28.B1	11.F29.B0	10.F28.B63	10.F29.B62	10.F28.B60	10.F29.B60	10.F28.B59	10.F29.B57	10.F28.B57	10.F29.B56	10.F28.B55	10.F28.B54	10.F29.B53	10.F28.B52	10.F29.B51	10.F28.B51	10.F29.B50	10.F28.B49	10.F29.B48	10.F28.B46	10.F29.B45	10.F28.B44	10.F29.B43	10.F28.B42	10.F29.B41	10.F28.B40	10.F29.B39	10.F28.B38	10.F29.B37	10.F29.B36
CRC32_3:CRC_INIT	17.F28.B39	17.F28.B37	17.F28.B35	17.F28.B33	17.F28.B31	17.F28.B28	17.F28.B27	17.F28.B24	17.F28.B22	17.F28.B20	17.F28.B18	17.F28.B16	17.F28.B14	17.F28.B12	17.F28.B10	17.F28.B8	17.F29.B6	17.F29.B4	17.F29.B2	17.F29.B0	16.F29.B62	16.F29.B60	16.F29.B58	16.F29.B55	16.F29.B53	16.F29.B51	16.F29.B49	16.F29.B47	16.F29.B45	16.F29.B43	16.F29.B41	16.F29.B39
GTP_DUAL:PRBS_ERR_THRESHOLD_0	13.F31.B33	13.F30.B33	13.F30.B32	13.F31.B32	13.F31.B31	13.F30.B31	13.F30.B30	13.F31.B30	13.F31.B29	13.F30.B29	13.F30.B28	13.F31.B28	13.F31.B27	13.F30.B27	13.F30.B26	13.F31.B26	13.F31.B25	13.F30.B25	13.F30.B24	13.F31.B24	13.F31.B23	13.F30.B23	13.F30.B22	13.F31.B22	13.F31.B21	13.F30.B21	13.F30.B20	13.F31.B20	13.F31.B19	13.F30.B19	13.F30.B18	13.F31.B18
GTP_DUAL:PRBS_ERR_THRESHOLD_1	6.F31.B30	6.F30.B30	6.F30.B31	6.F31.B31	6.F31.B32	6.F30.B32	6.F30.B33	6.F31.B33	6.F31.B34	6.F30.B34	6.F30.B35	6.F31.B35	6.F31.B36	6.F30.B36	6.F30.B37	6.F31.B37	6.F31.B38	6.F30.B38	6.F30.B39	6.F31.B39	6.F31.B40	6.F30.B40	6.F30.B41	6.F31.B41	6.F31.B42	6.F30.B42	6.F30.B43	6.F31.B43	6.F31.B44	6.F30.B44	6.F30.B45	6.F31.B45
non-inverted	[31]	[30]	[29]	[28]	[27]	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

CRC32_0:ENABLE64	2.F29.B22
CRC32_3:ENABLE64	17.F29.B41
GTP_DUAL:AC_CAP_DIS_0	14.F30.B15
GTP_DUAL:AC_CAP_DIS_1	5.F30.B48
GTP_DUAL:CHAN_BOND_SEQ_2_USE_0	12.F30.B14
GTP_DUAL:CHAN_BOND_SEQ_2_USE_1	7.F30.B49
GTP_DUAL:CLKINDC_B	5.F31.B33
GTP_DUAL:CLK_CORRECT_USE_0	12.F31.B3
GTP_DUAL:CLK_CORRECT_USE_1	7.F31.B60
GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_0	12.F30.B11
GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_1	7.F30.B52
GTP_DUAL:CLK_COR_KEEP_IDLE_0	12.F30.B10
GTP_DUAL:CLK_COR_KEEP_IDLE_1	7.F30.B53
GTP_DUAL:CLK_COR_PRECEDENCE_0	12.F31.B4
GTP_DUAL:CLK_COR_PRECEDENCE_1	7.F31.B59
GTP_DUAL:CLK_COR_SEQ_2_USE_0	11.F30.B20
GTP_DUAL:CLK_COR_SEQ_2_USE_1	8.F30.B43
GTP_DUAL:COMMA_DOUBLE_0	11.F30.B13
GTP_DUAL:COMMA_DOUBLE_1	8.F30.B50
GTP_DUAL:DEC_MCOMMA_DETECT_0	11.F30.B12
GTP_DUAL:DEC_MCOMMA_DETECT_1	8.F30.B51
GTP_DUAL:DEC_PCOMMA_DETECT_0	11.F31.B12
GTP_DUAL:DEC_PCOMMA_DETECT_1	8.F31.B51
GTP_DUAL:DEC_VALID_COMMA_ONLY_0	11.F31.B11
GTP_DUAL:DEC_VALID_COMMA_ONLY_1	8.F31.B52
GTP_DUAL:ENABLE	20.F28.B12
GTP_DUAL:INV.DCLK	20.F19.B13
GTP_DUAL:INV.RXUSRCLK0	20.F22.B12
GTP_DUAL:INV.RXUSRCLK1	20.F21.B13
GTP_DUAL:INV.RXUSRCLK20	20.F22.B13
GTP_DUAL:INV.RXUSRCLK21	20.F21.B12
GTP_DUAL:INV.TXUSRCLK0	20.F23.B12
GTP_DUAL:INV.TXUSRCLK1	20.F20.B13
GTP_DUAL:INV.TXUSRCLK20	20.F23.B13
GTP_DUAL:INV.TXUSRCLK21	20.F20.B12
GTP_DUAL:MCOMMA_DETECT_0	11.F31.B6
GTP_DUAL:MCOMMA_DETECT_1	8.F31.B57
GTP_DUAL:OVERSAMPLE_MODE	9.F31.B55
GTP_DUAL:PCI_EXPRESS_MODE_0	13.F31.B55
GTP_DUAL:PCI_EXPRESS_MODE_1	6.F31.B8
GTP_DUAL:PCOMMA_DETECT_0	13.F31.B50
GTP_DUAL:PCOMMA_DETECT_1	6.F31.B13
GTP_DUAL:PLL_SATA_0	13.F30.B48
GTP_DUAL:PLL_SATA_1	6.F30.B15
GTP_DUAL:PLL_STARTUP_EN	14.F30.B21
GTP_DUAL:RCV_TERM_GND_0	14.F31.B16
GTP_DUAL:RCV_TERM_GND_1	5.F31.B47
GTP_DUAL:RCV_TERM_MID_0	14.F31.B15
GTP_DUAL:RCV_TERM_MID_1	5.F31.B48
GTP_DUAL:RCV_TERM_VTTRX_0	14.F30.B16
GTP_DUAL:RCV_TERM_VTTRX_1	5.F30.B47
GTP_DUAL:RX_BUFFER_USE_0	13.F31.B17
GTP_DUAL:RX_BUFFER_USE_1	6.F31.B46
GTP_DUAL:RX_CDR_FORCE_ROTATE_0	14.F30.B7
GTP_DUAL:RX_CDR_FORCE_ROTATE_1	5.F30.B56
GTP_DUAL:RX_DECODE_SEQ_MATCH_0	13.F30.B17
GTP_DUAL:RX_DECODE_SEQ_MATCH_1	6.F30.B46
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_0	13.F30.B15
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_1	6.F30.B48
GTP_DUAL:SYS_CLK_EN	5.F30.B42
GTP_DUAL:TERMINATION_OVRD	10.F30.B11
GTP_DUAL:TXOUTCLK_SEL_0	12.F31.B19
GTP_DUAL:TXOUTCLK_SEL_1	7.F31.B44
GTP_DUAL:TX_BUFFER_USE_0	12.F31.B30
GTP_DUAL:TX_BUFFER_USE_1	7.F31.B33
GTP_DUAL:TX_DIFF_BOOST_0	14.F30.B22
GTP_DUAL:TX_DIFF_BOOST_1	5.F30.B41
GTP_DUAL:TX_SYNC_FILTERB	9.F30.B38
GTP_DUAL:USRCLK0	20.F17.B15
GTP_DUAL:USRCLK1	20.F18.B12
non-inverted	[0]

CRC32_0:INV.CRCCLK	20.F18.B15
CRC32_1:INV.CRCCLK	20.F19.B12
CRC32_2:INV.CRCCLK	20.F18.B14
CRC32_3:INV.CRCCLK	20.F18.B13
inverted	~[0]

GTP_DUAL:ALIGN_COMMA_WORD_0	10.F31.B30
GTP_DUAL:ALIGN_COMMA_WORD_1	9.F31.B33
1	0
2	1

GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0	10.F30.B30	10.F30.B31	10.F31.B31	10.F31.B32
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1	9.F30.B33	9.F30.B32	9.F31.B32	9.F31.B31
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0	10.F30.B32	10.F30.B33	10.F31.B33	10.F31.B34
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1	9.F30.B31	9.F30.B30	9.F31.B30	9.F31.B29
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0	10.F30.B57	10.F31.B57	10.F31.B58	10.F30.B58
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1	9.F30.B6	9.F31.B6	9.F31.B5	9.F30.B5
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0	12.F30.B16	12.F31.B16	12.F31.B15	12.F30.B15
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1	7.F30.B47	7.F31.B47	7.F31.B48	7.F30.B48
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0	11.F30.B44	11.F31.B44	11.F31.B43	11.F30.B43
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1	8.F30.B19	8.F31.B19	8.F31.B20	8.F30.B20
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0	11.F30.B22	11.F31.B22	11.F31.B21	11.F30.B21
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1	8.F30.B41	8.F31.B41	8.F31.B42	8.F30.B42
GTP_DUAL:COM_BURST_VAL_0	11.F31.B20	11.F31.B19	11.F30.B19	11.F30.B18
GTP_DUAL:COM_BURST_VAL_1	8.F31.B43	8.F31.B44	8.F30.B44	8.F30.B45
non-inverted	[3]	[2]	[1]	[0]

GTP_DUAL:CHAN_BOND_LEVEL_0	10.F30.B34	10.F30.B35	10.F31.B35
GTP_DUAL:CHAN_BOND_LEVEL_1	9.F30.B29	9.F30.B28	9.F31.B28
GTP_DUAL:OOBDETECT_THRESHOLD_0	12.F30.B18	12.F31.B18	12.F31.B17
GTP_DUAL:OOBDETECT_THRESHOLD_1	7.F30.B45	7.F31.B45	7.F31.B46
GTP_DUAL:PLLLKDET_CFG	5.F31.B39	5.F31.B40	5.F30.B40
GTP_DUAL:SATA_BURST_VAL_0	13.F31.B11	13.F30.B11	13.F30.B10
GTP_DUAL:SATA_BURST_VAL_1	6.F31.B52	6.F30.B52	6.F30.B53
GTP_DUAL:SATA_IDLE_VAL_0	13.F31.B10	13.F31.B9	13.F30.B9
GTP_DUAL:SATA_IDLE_VAL_1	6.F31.B53	6.F31.B54	6.F30.B54
non-inverted	[2]	[1]	[0]

GTP_DUAL:CHAN_BOND_MODE_0	10.F30.B36	10.F31.B36
GTP_DUAL:CHAN_BOND_MODE_1	9.F30.B27	9.F31.B27
#OFF	0	0
SLAVE	0	1
MASTER	1	0

GTP_DUAL:CHAN_BOND_SEQ_1_1_0	10.F30.B37	10.F31.B37	10.F31.B38	10.F30.B38	10.F30.B39	10.F31.B39	10.F31.B40	10.F30.B40	10.F30.B41	10.F31.B41
GTP_DUAL:CHAN_BOND_SEQ_1_1_1	9.F30.B26	9.F31.B26	9.F31.B25	9.F30.B25	9.F30.B24	9.F31.B24	9.F31.B23	9.F30.B23	9.F30.B22	9.F31.B22
GTP_DUAL:CHAN_BOND_SEQ_1_2_0	10.F31.B42	10.F30.B42	10.F30.B43	10.F31.B43	10.F31.B44	10.F30.B44	10.F30.B45	10.F31.B45	10.F31.B46	10.F30.B46
GTP_DUAL:CHAN_BOND_SEQ_1_2_1	9.F31.B21	9.F30.B21	9.F30.B20	9.F31.B20	9.F31.B19	9.F30.B19	9.F30.B18	9.F31.B18	9.F31.B17	9.F30.B17
GTP_DUAL:CHAN_BOND_SEQ_1_3_0	10.F30.B47	10.F31.B47	10.F31.B48	10.F30.B48	10.F30.B49	10.F31.B49	10.F31.B50	10.F30.B50	10.F30.B51	10.F31.B51
GTP_DUAL:CHAN_BOND_SEQ_1_3_1	9.F30.B16	9.F31.B16	9.F31.B15	9.F30.B15	9.F30.B14	9.F31.B14	9.F31.B13	9.F30.B13	9.F30.B12	9.F31.B12
GTP_DUAL:CHAN_BOND_SEQ_1_4_0	10.F31.B52	10.F30.B52	10.F30.B53	10.F31.B53	10.F31.B54	10.F30.B54	10.F30.B55	10.F31.B55	10.F31.B56	10.F30.B56
GTP_DUAL:CHAN_BOND_SEQ_1_4_1	9.F31.B11	9.F30.B11	9.F30.B10	9.F31.B10	9.F31.B9	9.F30.B9	9.F30.B8	9.F31.B8	9.F31.B7	9.F30.B7
GTP_DUAL:CHAN_BOND_SEQ_2_1_0	10.F30.B59	10.F31.B59	10.F31.B60	10.F30.B60	10.F30.B61	10.F31.B61	10.F31.B62	10.F30.B62	10.F30.B63	10.F31.B63
GTP_DUAL:CHAN_BOND_SEQ_2_1_1	9.F30.B4	9.F31.B4	9.F31.B3	9.F30.B3	9.F30.B2	9.F31.B2	9.F31.B1	9.F30.B1	9.F30.B0	9.F31.B0
GTP_DUAL:CHAN_BOND_SEQ_2_2_0	11.F31.B0	11.F30.B0	11.F31.B1	11.F31.B2	11.F30.B2	11.F30.B3	11.F31.B3	11.F31.B4	11.F30.B4	11.F30.B5
GTP_DUAL:CHAN_BOND_SEQ_2_2_1	8.F31.B63	8.F30.B63	8.F31.B62	8.F31.B61	8.F30.B61	8.F30.B60	8.F31.B60	8.F31.B59	8.F30.B59	8.F30.B58
GTP_DUAL:CHAN_BOND_SEQ_2_3_0	11.F31.B5	13.F30.B56	13.F30.B57	13.F31.B57	13.F31.B58	13.F30.B58	13.F30.B59	13.F31.B59	13.F31.B60	13.F30.B60
GTP_DUAL:CHAN_BOND_SEQ_2_3_1	8.F31.B58	6.F30.B7	6.F30.B6	6.F31.B6	6.F31.B5	6.F30.B5	6.F30.B4	6.F31.B4	6.F31.B3	6.F30.B3
GTP_DUAL:CHAN_BOND_SEQ_2_4_0	13.F30.B61	13.F31.B61	13.F31.B62	13.F30.B62	13.F30.B63	13.F31.B63	14.F31.B0	14.F30.B0	14.F30.B1	14.F31.B1
GTP_DUAL:CHAN_BOND_SEQ_2_4_1	6.F30.B2	6.F31.B2	6.F31.B1	6.F30.B1	6.F30.B0	6.F31.B0	5.F31.B63	5.F30.B63	5.F30.B62	5.F31.B62
GTP_DUAL:CLK_COR_SEQ_1_1_0	12.F30.B0	12.F31.B0	11.F31.B63	11.F30.B63	11.F30.B62	11.F31.B62	11.F31.B61	11.F30.B61	11.F30.B60	11.F31.B60
GTP_DUAL:CLK_COR_SEQ_1_1_1	7.F30.B63	7.F31.B63	8.F31.B0	8.F30.B0	8.F30.B1	8.F31.B1	8.F31.B2	8.F30.B2	8.F30.B3	8.F31.B3
GTP_DUAL:CLK_COR_SEQ_1_2_0	11.F31.B59	11.F30.B59	11.F30.B58	11.F31.B58	11.F31.B57	11.F30.B57	11.F30.B56	11.F31.B56	11.F31.B55	11.F30.B55
GTP_DUAL:CLK_COR_SEQ_1_2_1	8.F31.B4	8.F30.B4	8.F30.B5	8.F31.B5	8.F31.B6	8.F30.B6	8.F30.B7	8.F31.B7	8.F31.B8	8.F30.B8
GTP_DUAL:CLK_COR_SEQ_1_3_0	11.F30.B54	11.F31.B54	11.F31.B53	11.F30.B53	11.F30.B52	11.F31.B52	11.F31.B51	11.F30.B51	11.F30.B50	11.F31.B50
GTP_DUAL:CLK_COR_SEQ_1_3_1	8.F30.B9	8.F31.B9	8.F31.B10	8.F30.B10	8.F30.B11	8.F31.B11	8.F31.B12	8.F30.B12	8.F30.B13	8.F31.B13
GTP_DUAL:CLK_COR_SEQ_1_4_0	11.F31.B49	11.F30.B49	11.F30.B48	11.F31.B48	11.F31.B47	11.F30.B47	11.F30.B46	11.F31.B46	11.F31.B45	11.F30.B45
GTP_DUAL:CLK_COR_SEQ_1_4_1	8.F31.B14	8.F30.B14	8.F30.B15	8.F31.B15	8.F31.B16	8.F30.B16	8.F30.B17	8.F31.B17	8.F31.B18	8.F30.B18
GTP_DUAL:CLK_COR_SEQ_2_1_0	11.F30.B42	11.F31.B42	11.F31.B41	11.F30.B41	11.F30.B40	11.F31.B40	11.F31.B39	11.F30.B39	11.F30.B38	11.F31.B38
GTP_DUAL:CLK_COR_SEQ_2_1_1	8.F30.B21	8.F31.B21	8.F31.B22	8.F30.B22	8.F30.B23	8.F31.B23	8.F31.B24	8.F30.B24	8.F30.B25	8.F31.B25
GTP_DUAL:CLK_COR_SEQ_2_2_0	11.F31.B37	11.F30.B37	11.F30.B36	11.F31.B36	11.F31.B35	11.F30.B35	11.F30.B34	11.F31.B34	11.F31.B33	11.F30.B33
GTP_DUAL:CLK_COR_SEQ_2_2_1	8.F31.B26	8.F30.B26	8.F30.B27	8.F31.B27	8.F31.B28	8.F30.B28	8.F30.B29	8.F31.B29	8.F31.B30	8.F30.B30
GTP_DUAL:CLK_COR_SEQ_2_3_0	11.F30.B32	11.F31.B32	11.F31.B31	11.F30.B31	11.F30.B30	11.F31.B30	11.F31.B29	11.F30.B29	11.F30.B28	11.F31.B28
GTP_DUAL:CLK_COR_SEQ_2_3_1	8.F30.B31	8.F31.B31	8.F31.B32	8.F30.B32	8.F30.B33	8.F31.B33	8.F31.B34	8.F30.B34	8.F30.B35	8.F31.B35
GTP_DUAL:CLK_COR_SEQ_2_4_0	11.F31.B27	11.F30.B27	11.F30.B26	11.F31.B26	11.F31.B25	11.F30.B25	11.F30.B24	11.F31.B24	11.F31.B23	11.F30.B23
GTP_DUAL:CLK_COR_SEQ_2_4_1	8.F31.B36	8.F30.B36	8.F30.B37	8.F31.B37	8.F31.B38	8.F30.B38	8.F30.B39	8.F31.B39	8.F31.B40	8.F30.B40
GTP_DUAL:COMMA_10B_ENABLE_0	11.F31.B18	11.F31.B17	11.F30.B17	11.F30.B16	11.F31.B16	11.F31.B15	11.F30.B15	11.F30.B14	11.F31.B14	11.F31.B13
GTP_DUAL:COMMA_10B_ENABLE_1	8.F31.B45	8.F31.B46	8.F30.B46	8.F30.B47	8.F31.B47	8.F31.B48	8.F30.B48	8.F30.B49	8.F31.B49	8.F31.B50
GTP_DUAL:MCOMMA_10B_VALUE_0	11.F30.B11	11.F30.B10	11.F31.B10	11.F31.B9	11.F30.B9	11.F30.B8	11.F31.B8	11.F31.B7	11.F30.B7	11.F30.B6
GTP_DUAL:MCOMMA_10B_VALUE_1	8.F30.B52	8.F30.B53	8.F31.B53	8.F31.B54	8.F30.B54	8.F30.B55	8.F31.B55	8.F31.B56	8.F30.B56	8.F30.B57
GTP_DUAL:PCOMMA_10B_VALUE_0	13.F30.B55	13.F30.B54	13.F31.B54	13.F31.B53	13.F30.B53	13.F30.B52	13.F31.B52	13.F31.B51	13.F30.B51	13.F30.B50
GTP_DUAL:PCOMMA_10B_VALUE_1	6.F30.B8	6.F30.B9	6.F31.B9	6.F31.B10	6.F30.B10	6.F30.B11	6.F31.B11	6.F31.B12	6.F30.B12	6.F30.B13
non-inverted	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:CHAN_BOND_SEQ_LEN_0	12.F31.B14	12.F31.B13
GTP_DUAL:CHAN_BOND_SEQ_LEN_1	7.F31.B49	7.F31.B50
GTP_DUAL:CLK_COR_ADJ_LEN_0	12.F30.B13	12.F30.B12
GTP_DUAL:CLK_COR_ADJ_LEN_1	7.F30.B50	7.F30.B51
GTP_DUAL:CLK_COR_DET_LEN_0	12.F31.B12	12.F31.B11
GTP_DUAL:CLK_COR_DET_LEN_1	7.F31.B51	7.F31.B52
1	0	0
2	0	1
3	1	0
4	1	1

GTP_DUAL:CLK25_DIVIDER	9.F30.B52	9.F30.B53	9.F31.B53
1	0	0	0
2	0	0	1
3	0	1	0
4	0	1	1
5	1	0	0
6	1	0	1
10	1	1	0
12	1	1	1

GTP_DUAL:CLK_COR_MAX_LAT_0	12.F31.B10	12.F31.B9	12.F30.B9	12.F30.B8	12.F31.B8	12.F31.B7
GTP_DUAL:CLK_COR_MAX_LAT_1	7.F31.B53	7.F31.B54	7.F30.B54	7.F30.B55	7.F31.B55	7.F31.B56
GTP_DUAL:CLK_COR_MIN_LAT_0	12.F30.B7	12.F30.B6	12.F31.B6	12.F31.B5	12.F30.B5	12.F30.B4
GTP_DUAL:CLK_COR_MIN_LAT_1	7.F30.B56	7.F30.B57	7.F31.B57	7.F31.B58	7.F30.B58	7.F30.B59
GTP_DUAL:SATA_MAX_BURST_0	13.F30.B8	13.F31.B8	13.F31.B7	13.F30.B7	13.F30.B6	13.F31.B6
GTP_DUAL:SATA_MAX_BURST_1	6.F30.B55	6.F31.B55	6.F31.B56	6.F30.B56	6.F30.B57	6.F31.B57
GTP_DUAL:SATA_MAX_INIT_0	13.F31.B5	13.F30.B5	13.F30.B4	13.F31.B4	13.F31.B3	13.F30.B3
GTP_DUAL:SATA_MAX_INIT_1	6.F31.B58	6.F30.B58	6.F30.B59	6.F31.B59	6.F31.B60	6.F30.B60
GTP_DUAL:SATA_MAX_WAKE_0	13.F30.B2	13.F31.B2	13.F31.B1	13.F30.B1	13.F30.B0	13.F31.B0
GTP_DUAL:SATA_MAX_WAKE_1	6.F30.B61	6.F31.B61	6.F31.B62	6.F30.B62	6.F30.B63	6.F31.B63
GTP_DUAL:SATA_MIN_BURST_0	12.F31.B63	12.F30.B63	12.F30.B62	12.F31.B62	12.F31.B61	12.F30.B61
GTP_DUAL:SATA_MIN_BURST_1	7.F31.B0	7.F30.B0	7.F30.B1	7.F31.B1	7.F31.B2	7.F30.B2
GTP_DUAL:SATA_MIN_INIT_0	12.F30.B60	12.F31.B60	12.F31.B59	12.F30.B59	12.F30.B58	12.F31.B58
GTP_DUAL:SATA_MIN_INIT_1	7.F30.B3	7.F31.B3	7.F31.B4	7.F30.B4	7.F30.B5	7.F31.B5
GTP_DUAL:SATA_MIN_WAKE_0	12.F31.B57	12.F30.B57	12.F30.B56	12.F31.B56	12.F31.B55	12.F30.B55
GTP_DUAL:SATA_MIN_WAKE_1	7.F31.B6	7.F30.B6	7.F30.B7	7.F31.B7	7.F31.B8	7.F30.B8
non-inverted	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:CLK_COR_REPEAT_WAIT_0	12.F30.B3	12.F30.B2	12.F31.B2	12.F31.B1	12.F30.B1
GTP_DUAL:CLK_COR_REPEAT_WAIT_1	7.F30.B60	7.F30.B61	7.F31.B61	7.F31.B62	7.F30.B62
GTP_DUAL:TERMINATION_CTRL	10.F30.B8	10.F30.B9	10.F31.B9	10.F31.B10	10.F30.B10
GTP_DUAL:TXRX_INVERT_0	12.F30.B22	12.F31.B22	12.F31.B21	12.F30.B21	12.F30.B20
GTP_DUAL:TXRX_INVERT_1	7.F30.B41	7.F31.B41	7.F31.B42	7.F30.B42	7.F30.B43
non-inverted	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:DRP00	5.F31.B7	5.F30.B7	5.F30.B6	5.F31.B6	5.F31.B5	5.F30.B5	5.F30.B4	5.F31.B4	5.F31.B3	5.F30.B3	5.F30.B2	5.F31.B2	5.F31.B1	5.F30.B1	5.F30.B0	5.F31.B0
GTP_DUAL:DRP01	5.F31.B15	5.F30.B15	5.F30.B14	5.F31.B14	5.F31.B13	5.F30.B13	5.F30.B12	5.F31.B12	5.F31.B11	5.F30.B11	5.F30.B10	5.F31.B10	5.F31.B9	5.F30.B9	5.F30.B8	5.F31.B8
GTP_DUAL:DRP02	5.F31.B23	5.F30.B23	5.F30.B22	5.F31.B22	5.F31.B21	5.F30.B21	5.F30.B20	5.F31.B20	5.F31.B19	5.F30.B19	5.F30.B18	5.F31.B18	5.F31.B17	5.F30.B17	5.F30.B16	5.F31.B16
GTP_DUAL:DRP03	5.F31.B31	5.F30.B31	5.F30.B30	5.F31.B30	5.F31.B29	5.F30.B29	5.F30.B28	5.F31.B28	5.F31.B27	5.F30.B27	5.F30.B26	5.F31.B26	5.F31.B25	5.F30.B25	5.F30.B24	5.F31.B24
GTP_DUAL:DRP04	5.F31.B39	5.F30.B39	5.F30.B38	5.F31.B38	5.F31.B37	5.F30.B37	5.F30.B36	5.F31.B36	5.F31.B35	5.F30.B35	5.F30.B34	5.F31.B34	5.F31.B33	5.F30.B33	5.F30.B32	5.F31.B32
GTP_DUAL:DRP05	5.F31.B47	5.F30.B47	5.F30.B46	5.F31.B46	5.F31.B45	5.F30.B45	5.F30.B44	5.F31.B44	5.F31.B43	5.F30.B43	5.F30.B42	5.F31.B42	5.F31.B41	5.F30.B41	5.F30.B40	5.F31.B40
GTP_DUAL:DRP06	5.F31.B55	5.F30.B55	5.F30.B54	5.F31.B54	5.F31.B53	5.F30.B53	5.F30.B52	5.F31.B52	5.F31.B51	5.F30.B51	5.F30.B50	5.F31.B50	5.F31.B49	5.F30.B49	5.F30.B48	5.F31.B48
GTP_DUAL:DRP07	5.F31.B63	5.F30.B63	5.F30.B62	5.F31.B62	5.F31.B61	5.F30.B61	5.F30.B60	5.F31.B60	5.F31.B59	5.F30.B59	5.F30.B58	5.F31.B58	5.F31.B57	5.F30.B57	5.F30.B56	5.F31.B56
GTP_DUAL:DRP08	6.F31.B7	6.F30.B7	6.F30.B6	6.F31.B6	6.F31.B5	6.F30.B5	6.F30.B4	6.F31.B4	6.F31.B3	6.F30.B3	6.F30.B2	6.F31.B2	6.F31.B1	6.F30.B1	6.F30.B0	6.F31.B0
GTP_DUAL:DRP09	6.F31.B15	6.F30.B15	6.F30.B14	6.F31.B14	6.F31.B13	6.F30.B13	6.F30.B12	6.F31.B12	6.F31.B11	6.F30.B11	6.F30.B10	6.F31.B10	6.F31.B9	6.F30.B9	6.F30.B8	6.F31.B8
GTP_DUAL:DRP0A	6.F31.B23	6.F30.B23	6.F30.B22	6.F31.B22	6.F31.B21	6.F30.B21	6.F30.B20	6.F31.B20	6.F31.B19	6.F30.B19	6.F30.B18	6.F31.B18	6.F31.B17	6.F30.B17	6.F30.B16	6.F31.B16
GTP_DUAL:DRP0B	6.F31.B31	6.F30.B31	6.F30.B30	6.F31.B30	6.F31.B29	6.F30.B29	6.F30.B28	6.F31.B28	6.F31.B27	6.F30.B27	6.F30.B26	6.F31.B26	6.F31.B25	6.F30.B25	6.F30.B24	6.F31.B24
GTP_DUAL:DRP0C	6.F31.B39	6.F30.B39	6.F30.B38	6.F31.B38	6.F31.B37	6.F30.B37	6.F30.B36	6.F31.B36	6.F31.B35	6.F30.B35	6.F30.B34	6.F31.B34	6.F31.B33	6.F30.B33	6.F30.B32	6.F31.B32
GTP_DUAL:DRP0D	6.F31.B47	6.F30.B47	6.F30.B46	6.F31.B46	6.F31.B45	6.F30.B45	6.F30.B44	6.F31.B44	6.F31.B43	6.F30.B43	6.F30.B42	6.F31.B42	6.F31.B41	6.F30.B41	6.F30.B40	6.F31.B40
GTP_DUAL:DRP0E	6.F31.B55	6.F30.B55	6.F30.B54	6.F31.B54	6.F31.B53	6.F30.B53	6.F30.B52	6.F31.B52	6.F31.B51	6.F30.B51	6.F30.B50	6.F31.B50	6.F31.B49	6.F30.B49	6.F30.B48	6.F31.B48
GTP_DUAL:DRP0F	6.F31.B63	6.F30.B63	6.F30.B62	6.F31.B62	6.F31.B61	6.F30.B61	6.F30.B60	6.F31.B60	6.F31.B59	6.F30.B59	6.F30.B58	6.F31.B58	6.F31.B57	6.F30.B57	6.F30.B56	6.F31.B56
GTP_DUAL:DRP10	7.F31.B7	7.F30.B7	7.F30.B6	7.F31.B6	7.F31.B5	7.F30.B5	7.F30.B4	7.F31.B4	7.F31.B3	7.F30.B3	7.F30.B2	7.F31.B2	7.F31.B1	7.F30.B1	7.F30.B0	7.F31.B0
GTP_DUAL:DRP11	7.F31.B15	7.F30.B15	7.F30.B14	7.F31.B14	7.F31.B13	7.F30.B13	7.F30.B12	7.F31.B12	7.F31.B11	7.F30.B11	7.F30.B10	7.F31.B10	7.F31.B9	7.F30.B9	7.F30.B8	7.F31.B8
GTP_DUAL:DRP12	7.F31.B23	7.F30.B23	7.F30.B22	7.F31.B22	7.F31.B21	7.F30.B21	7.F30.B20	7.F31.B20	7.F31.B19	7.F30.B19	7.F30.B18	7.F31.B18	7.F31.B17	7.F30.B17	7.F30.B16	7.F31.B16
GTP_DUAL:DRP13	7.F31.B31	7.F30.B31	7.F30.B30	7.F31.B30	7.F31.B29	7.F30.B29	7.F30.B28	7.F31.B28	7.F31.B27	7.F30.B27	7.F30.B26	7.F31.B26	7.F31.B25	7.F30.B25	7.F30.B24	7.F31.B24
GTP_DUAL:DRP14	7.F31.B39	7.F30.B39	7.F30.B38	7.F31.B38	7.F31.B37	7.F30.B37	7.F30.B36	7.F31.B36	7.F31.B35	7.F30.B35	7.F30.B34	7.F31.B34	7.F31.B33	7.F30.B33	7.F30.B32	7.F31.B32
GTP_DUAL:DRP15	7.F31.B47	7.F30.B47	7.F30.B46	7.F31.B46	7.F31.B45	7.F30.B45	7.F30.B44	7.F31.B44	7.F31.B43	7.F30.B43	7.F30.B42	7.F31.B42	7.F31.B41	7.F30.B41	7.F30.B40	7.F31.B40
GTP_DUAL:DRP16	7.F31.B55	7.F30.B55	7.F30.B54	7.F31.B54	7.F31.B53	7.F30.B53	7.F30.B52	7.F31.B52	7.F31.B51	7.F30.B51	7.F30.B50	7.F31.B50	7.F31.B49	7.F30.B49	7.F30.B48	7.F31.B48
GTP_DUAL:DRP17	7.F31.B63	7.F30.B63	7.F30.B62	7.F31.B62	7.F31.B61	7.F30.B61	7.F30.B60	7.F31.B60	7.F31.B59	7.F30.B59	7.F30.B58	7.F31.B58	7.F31.B57	7.F30.B57	7.F30.B56	7.F31.B56
GTP_DUAL:DRP18	8.F31.B7	8.F30.B7	8.F30.B6	8.F31.B6	8.F31.B5	8.F30.B5	8.F30.B4	8.F31.B4	8.F31.B3	8.F30.B3	8.F30.B2	8.F31.B2	8.F31.B1	8.F30.B1	8.F30.B0	8.F31.B0
GTP_DUAL:DRP19	8.F31.B15	8.F30.B15	8.F30.B14	8.F31.B14	8.F31.B13	8.F30.B13	8.F30.B12	8.F31.B12	8.F31.B11	8.F30.B11	8.F30.B10	8.F31.B10	8.F31.B9	8.F30.B9	8.F30.B8	8.F31.B8
GTP_DUAL:DRP1A	8.F31.B23	8.F30.B23	8.F30.B22	8.F31.B22	8.F31.B21	8.F30.B21	8.F30.B20	8.F31.B20	8.F31.B19	8.F30.B19	8.F30.B18	8.F31.B18	8.F31.B17	8.F30.B17	8.F30.B16	8.F31.B16
GTP_DUAL:DRP1B	8.F31.B31	8.F30.B31	8.F30.B30	8.F31.B30	8.F31.B29	8.F30.B29	8.F30.B28	8.F31.B28	8.F31.B27	8.F30.B27	8.F30.B26	8.F31.B26	8.F31.B25	8.F30.B25	8.F30.B24	8.F31.B24
GTP_DUAL:DRP1C	8.F31.B39	8.F30.B39	8.F30.B38	8.F31.B38	8.F31.B37	8.F30.B37	8.F30.B36	8.F31.B36	8.F31.B35	8.F30.B35	8.F30.B34	8.F31.B34	8.F31.B33	8.F30.B33	8.F30.B32	8.F31.B32
GTP_DUAL:DRP1D	8.F31.B47	8.F30.B47	8.F30.B46	8.F31.B46	8.F31.B45	8.F30.B45	8.F30.B44	8.F31.B44	8.F31.B43	8.F30.B43	8.F30.B42	8.F31.B42	8.F31.B41	8.F30.B41	8.F30.B40	8.F31.B40
GTP_DUAL:DRP1E	8.F31.B55	8.F30.B55	8.F30.B54	8.F31.B54	8.F31.B53	8.F30.B53	8.F30.B52	8.F31.B52	8.F31.B51	8.F30.B51	8.F30.B50	8.F31.B50	8.F31.B49	8.F30.B49	8.F30.B48	8.F31.B48
GTP_DUAL:DRP1F	8.F31.B63	8.F30.B63	8.F30.B62	8.F31.B62	8.F31.B61	8.F30.B61	8.F30.B60	8.F31.B60	8.F31.B59	8.F30.B59	8.F30.B58	8.F31.B58	8.F31.B57	8.F30.B57	8.F30.B56	8.F31.B56
GTP_DUAL:DRP20	9.F31.B7	9.F30.B7	9.F30.B6	9.F31.B6	9.F31.B5	9.F30.B5	9.F30.B4	9.F31.B4	9.F31.B3	9.F30.B3	9.F30.B2	9.F31.B2	9.F31.B1	9.F30.B1	9.F30.B0	9.F31.B0
GTP_DUAL:DRP21	9.F31.B15	9.F30.B15	9.F30.B14	9.F31.B14	9.F31.B13	9.F30.B13	9.F30.B12	9.F31.B12	9.F31.B11	9.F30.B11	9.F30.B10	9.F31.B10	9.F31.B9	9.F30.B9	9.F30.B8	9.F31.B8
GTP_DUAL:DRP22	9.F31.B23	9.F30.B23	9.F30.B22	9.F31.B22	9.F31.B21	9.F30.B21	9.F30.B20	9.F31.B20	9.F31.B19	9.F30.B19	9.F30.B18	9.F31.B18	9.F31.B17	9.F30.B17	9.F30.B16	9.F31.B16
GTP_DUAL:DRP23	9.F31.B31	9.F30.B31	9.F30.B30	9.F31.B30	9.F31.B29	9.F30.B29	9.F30.B28	9.F31.B28	9.F31.B27	9.F30.B27	9.F30.B26	9.F31.B26	9.F31.B25	9.F30.B25	9.F30.B24	9.F31.B24
GTP_DUAL:DRP24	9.F31.B39	9.F30.B39	9.F30.B38	9.F31.B38	9.F31.B37	9.F30.B37	9.F30.B36	9.F31.B36	9.F31.B35	9.F30.B35	9.F30.B34	9.F31.B34	9.F31.B33	9.F30.B33	9.F30.B32	9.F31.B32
GTP_DUAL:DRP25	9.F31.B47	9.F30.B47	9.F30.B46	9.F31.B46	9.F31.B45	9.F30.B45	9.F30.B44	9.F31.B44	9.F31.B43	9.F30.B43	9.F30.B42	9.F31.B42	9.F31.B41	9.F30.B41	9.F30.B40	9.F31.B40
GTP_DUAL:DRP26	9.F31.B55	9.F30.B55	9.F30.B54	9.F31.B54	9.F31.B53	9.F30.B53	9.F30.B52	9.F31.B52	9.F31.B51	9.F30.B51	9.F30.B50	9.F31.B50	9.F31.B49	9.F30.B49	9.F30.B48	9.F31.B48
GTP_DUAL:DRP27	9.F31.B63	9.F30.B63	9.F30.B62	9.F31.B62	9.F31.B61	9.F30.B61	9.F30.B60	9.F31.B60	9.F31.B59	9.F30.B59	9.F30.B58	9.F31.B58	9.F31.B57	9.F30.B57	9.F30.B56	9.F31.B56
GTP_DUAL:DRP28	10.F31.B7	10.F30.B7	10.F30.B6	10.F31.B6	10.F31.B5	10.F30.B5	10.F30.B4	10.F31.B4	10.F31.B3	10.F30.B3	10.F30.B2	10.F31.B2	10.F31.B1	10.F30.B1	10.F30.B0	10.F31.B0
GTP_DUAL:DRP29	10.F31.B15	10.F30.B15	10.F30.B14	10.F31.B14	10.F31.B13	10.F30.B13	10.F30.B12	10.F31.B12	10.F31.B11	10.F30.B11	10.F30.B10	10.F31.B10	10.F31.B9	10.F30.B9	10.F30.B8	10.F31.B8
GTP_DUAL:DRP2A	10.F31.B23	10.F30.B23	10.F30.B22	10.F31.B22	10.F31.B21	10.F30.B21	10.F30.B20	10.F31.B20	10.F31.B19	10.F30.B19	10.F30.B18	10.F31.B18	10.F31.B17	10.F30.B17	10.F30.B16	10.F31.B16
GTP_DUAL:DRP2B	10.F31.B31	10.F30.B31	10.F30.B30	10.F31.B30	10.F31.B29	10.F30.B29	10.F30.B28	10.F31.B28	10.F31.B27	10.F30.B27	10.F30.B26	10.F31.B26	10.F31.B25	10.F30.B25	10.F30.B24	10.F31.B24
GTP_DUAL:DRP2C	10.F31.B39	10.F30.B39	10.F30.B38	10.F31.B38	10.F31.B37	10.F30.B37	10.F30.B36	10.F31.B36	10.F31.B35	10.F30.B35	10.F30.B34	10.F31.B34	10.F31.B33	10.F30.B33	10.F30.B32	10.F31.B32
GTP_DUAL:DRP2D	10.F31.B47	10.F30.B47	10.F30.B46	10.F31.B46	10.F31.B45	10.F30.B45	10.F30.B44	10.F31.B44	10.F31.B43	10.F30.B43	10.F30.B42	10.F31.B42	10.F31.B41	10.F30.B41	10.F30.B40	10.F31.B40
GTP_DUAL:DRP2E	10.F31.B55	10.F30.B55	10.F30.B54	10.F31.B54	10.F31.B53	10.F30.B53	10.F30.B52	10.F31.B52	10.F31.B51	10.F30.B51	10.F30.B50	10.F31.B50	10.F31.B49	10.F30.B49	10.F30.B48	10.F31.B48
GTP_DUAL:DRP2F	10.F31.B63	10.F30.B63	10.F30.B62	10.F31.B62	10.F31.B61	10.F30.B61	10.F30.B60	10.F31.B60	10.F31.B59	10.F30.B59	10.F30.B58	10.F31.B58	10.F31.B57	10.F30.B57	10.F30.B56	10.F31.B56
GTP_DUAL:DRP30	11.F31.B7	11.F30.B7	11.F30.B6	11.F31.B6	11.F31.B5	11.F30.B5	11.F30.B4	11.F31.B4	11.F31.B3	11.F30.B3	11.F30.B2	11.F31.B2	11.F31.B1	11.F30.B1	11.F30.B0	11.F31.B0
GTP_DUAL:DRP31	11.F31.B15	11.F30.B15	11.F30.B14	11.F31.B14	11.F31.B13	11.F30.B13	11.F30.B12	11.F31.B12	11.F31.B11	11.F30.B11	11.F30.B10	11.F31.B10	11.F31.B9	11.F30.B9	11.F30.B8	11.F31.B8
GTP_DUAL:DRP32	11.F31.B23	11.F30.B23	11.F30.B22	11.F31.B22	11.F31.B21	11.F30.B21	11.F30.B20	11.F31.B20	11.F31.B19	11.F30.B19	11.F30.B18	11.F31.B18	11.F31.B17	11.F30.B17	11.F30.B16	11.F31.B16
GTP_DUAL:DRP33	11.F31.B31	11.F30.B31	11.F30.B30	11.F31.B30	11.F31.B29	11.F30.B29	11.F30.B28	11.F31.B28	11.F31.B27	11.F30.B27	11.F30.B26	11.F31.B26	11.F31.B25	11.F30.B25	11.F30.B24	11.F31.B24
GTP_DUAL:DRP34	11.F31.B39	11.F30.B39	11.F30.B38	11.F31.B38	11.F31.B37	11.F30.B37	11.F30.B36	11.F31.B36	11.F31.B35	11.F30.B35	11.F30.B34	11.F31.B34	11.F31.B33	11.F30.B33	11.F30.B32	11.F31.B32
GTP_DUAL:DRP35	11.F31.B47	11.F30.B47	11.F30.B46	11.F31.B46	11.F31.B45	11.F30.B45	11.F30.B44	11.F31.B44	11.F31.B43	11.F30.B43	11.F30.B42	11.F31.B42	11.F31.B41	11.F30.B41	11.F30.B40	11.F31.B40
GTP_DUAL:DRP36	11.F31.B55	11.F30.B55	11.F30.B54	11.F31.B54	11.F31.B53	11.F30.B53	11.F30.B52	11.F31.B52	11.F31.B51	11.F30.B51	11.F30.B50	11.F31.B50	11.F31.B49	11.F30.B49	11.F30.B48	11.F31.B48
GTP_DUAL:DRP37	11.F31.B63	11.F30.B63	11.F30.B62	11.F31.B62	11.F31.B61	11.F30.B61	11.F30.B60	11.F31.B60	11.F31.B59	11.F30.B59	11.F30.B58	11.F31.B58	11.F31.B57	11.F30.B57	11.F30.B56	11.F31.B56
GTP_DUAL:DRP38	12.F31.B7	12.F30.B7	12.F30.B6	12.F31.B6	12.F31.B5	12.F30.B5	12.F30.B4	12.F31.B4	12.F31.B3	12.F30.B3	12.F30.B2	12.F31.B2	12.F31.B1	12.F30.B1	12.F30.B0	12.F31.B0
GTP_DUAL:DRP39	12.F31.B15	12.F30.B15	12.F30.B14	12.F31.B14	12.F31.B13	12.F30.B13	12.F30.B12	12.F31.B12	12.F31.B11	12.F30.B11	12.F30.B10	12.F31.B10	12.F31.B9	12.F30.B9	12.F30.B8	12.F31.B8
GTP_DUAL:DRP3A	12.F31.B23	12.F30.B23	12.F30.B22	12.F31.B22	12.F31.B21	12.F30.B21	12.F30.B20	12.F31.B20	12.F31.B19	12.F30.B19	12.F30.B18	12.F31.B18	12.F31.B17	12.F30.B17	12.F30.B16	12.F31.B16
GTP_DUAL:DRP3B	12.F31.B31	12.F30.B31	12.F30.B30	12.F31.B30	12.F31.B29	12.F30.B29	12.F30.B28	12.F31.B28	12.F31.B27	12.F30.B27	12.F30.B26	12.F31.B26	12.F31.B25	12.F30.B25	12.F30.B24	12.F31.B24
GTP_DUAL:DRP3C	12.F31.B39	12.F30.B39	12.F30.B38	12.F31.B38	12.F31.B37	12.F30.B37	12.F30.B36	12.F31.B36	12.F31.B35	12.F30.B35	12.F30.B34	12.F31.B34	12.F31.B33	12.F30.B33	12.F30.B32	12.F31.B32
GTP_DUAL:DRP3D	12.F31.B47	12.F30.B47	12.F30.B46	12.F31.B46	12.F31.B45	12.F30.B45	12.F30.B44	12.F31.B44	12.F31.B43	12.F30.B43	12.F30.B42	12.F31.B42	12.F31.B41	12.F30.B41	12.F30.B40	12.F31.B40
GTP_DUAL:DRP3E	12.F31.B55	12.F30.B55	12.F30.B54	12.F31.B54	12.F31.B53	12.F30.B53	12.F30.B52	12.F31.B52	12.F31.B51	12.F30.B51	12.F30.B50	12.F31.B50	12.F31.B49	12.F30.B49	12.F30.B48	12.F31.B48
GTP_DUAL:DRP3F	12.F31.B63	12.F30.B63	12.F30.B62	12.F31.B62	12.F31.B61	12.F30.B61	12.F30.B60	12.F31.B60	12.F31.B59	12.F30.B59	12.F30.B58	12.F31.B58	12.F31.B57	12.F30.B57	12.F30.B56	12.F31.B56
GTP_DUAL:DRP40	13.F31.B7	13.F30.B7	13.F30.B6	13.F31.B6	13.F31.B5	13.F30.B5	13.F30.B4	13.F31.B4	13.F31.B3	13.F30.B3	13.F30.B2	13.F31.B2	13.F31.B1	13.F30.B1	13.F30.B0	13.F31.B0
GTP_DUAL:DRP41	13.F31.B15	13.F30.B15	13.F30.B14	13.F31.B14	13.F31.B13	13.F30.B13	13.F30.B12	13.F31.B12	13.F31.B11	13.F30.B11	13.F30.B10	13.F31.B10	13.F31.B9	13.F30.B9	13.F30.B8	13.F31.B8
GTP_DUAL:DRP42	13.F31.B23	13.F30.B23	13.F30.B22	13.F31.B22	13.F31.B21	13.F30.B21	13.F30.B20	13.F31.B20	13.F31.B19	13.F30.B19	13.F30.B18	13.F31.B18	13.F31.B17	13.F30.B17	13.F30.B16	13.F31.B16
GTP_DUAL:DRP43	13.F31.B31	13.F30.B31	13.F30.B30	13.F31.B30	13.F31.B29	13.F30.B29	13.F30.B28	13.F31.B28	13.F31.B27	13.F30.B27	13.F30.B26	13.F31.B26	13.F31.B25	13.F30.B25	13.F30.B24	13.F31.B24
GTP_DUAL:DRP44	13.F31.B39	13.F30.B39	13.F30.B38	13.F31.B38	13.F31.B37	13.F30.B37	13.F30.B36	13.F31.B36	13.F31.B35	13.F30.B35	13.F30.B34	13.F31.B34	13.F31.B33	13.F30.B33	13.F30.B32	13.F31.B32
GTP_DUAL:DRP45	13.F31.B47	13.F30.B47	13.F30.B46	13.F31.B46	13.F31.B45	13.F30.B45	13.F30.B44	13.F31.B44	13.F31.B43	13.F30.B43	13.F30.B42	13.F31.B42	13.F31.B41	13.F30.B41	13.F30.B40	13.F31.B40
GTP_DUAL:DRP46	13.F31.B55	13.F30.B55	13.F30.B54	13.F31.B54	13.F31.B53	13.F30.B53	13.F30.B52	13.F31.B52	13.F31.B51	13.F30.B51	13.F30.B50	13.F31.B50	13.F31.B49	13.F30.B49	13.F30.B48	13.F31.B48
GTP_DUAL:DRP47	13.F31.B63	13.F30.B63	13.F30.B62	13.F31.B62	13.F31.B61	13.F30.B61	13.F30.B60	13.F31.B60	13.F31.B59	13.F30.B59	13.F30.B58	13.F31.B58	13.F31.B57	13.F30.B57	13.F30.B56	13.F31.B56
GTP_DUAL:DRP48	14.F31.B7	14.F30.B7	14.F30.B6	14.F31.B6	14.F31.B5	14.F30.B5	14.F30.B4	14.F31.B4	14.F31.B3	14.F30.B3	14.F30.B2	14.F31.B2	14.F31.B1	14.F30.B1	14.F30.B0	14.F31.B0
GTP_DUAL:DRP49	14.F31.B15	14.F30.B15	14.F30.B14	14.F31.B14	14.F31.B13	14.F30.B13	14.F30.B12	14.F31.B12	14.F31.B11	14.F30.B11	14.F30.B10	14.F31.B10	14.F31.B9	14.F30.B9	14.F30.B8	14.F31.B8
GTP_DUAL:DRP4A	14.F31.B23	14.F30.B23	14.F30.B22	14.F31.B22	14.F31.B21	14.F30.B21	14.F30.B20	14.F31.B20	14.F31.B19	14.F30.B19	14.F30.B18	14.F31.B18	14.F31.B17	14.F30.B17	14.F30.B16	14.F31.B16
GTP_DUAL:DRP4B	14.F31.B31	14.F30.B31	14.F30.B30	14.F31.B30	14.F31.B29	14.F30.B29	14.F30.B28	14.F31.B28	14.F31.B27	14.F30.B27	14.F30.B26	14.F31.B26	14.F31.B25	14.F30.B25	14.F30.B24	14.F31.B24
GTP_DUAL:DRP4C	14.F31.B39	14.F30.B39	14.F30.B38	14.F31.B38	14.F31.B37	14.F30.B37	14.F30.B36	14.F31.B36	14.F31.B35	14.F30.B35	14.F30.B34	14.F31.B34	14.F31.B33	14.F30.B33	14.F30.B32	14.F31.B32
GTP_DUAL:DRP4D	14.F31.B47	14.F30.B47	14.F30.B46	14.F31.B46	14.F31.B45	14.F30.B45	14.F30.B44	14.F31.B44	14.F31.B43	14.F30.B43	14.F30.B42	14.F31.B42	14.F31.B41	14.F30.B41	14.F30.B40	14.F31.B40
GTP_DUAL:DRP4E	14.F31.B55	14.F30.B55	14.F30.B54	14.F31.B54	14.F31.B53	14.F30.B53	14.F30.B52	14.F31.B52	14.F31.B51	14.F30.B51	14.F30.B50	14.F31.B50	14.F31.B49	14.F30.B49	14.F30.B48	14.F31.B48
GTP_DUAL:DRP4F	14.F31.B63	14.F30.B63	14.F30.B62	14.F31.B62	14.F31.B61	14.F30.B61	14.F30.B60	14.F31.B60	14.F31.B59	14.F30.B59	14.F30.B58	14.F31.B58	14.F31.B57	14.F30.B57	14.F30.B56	14.F31.B56
GTP_DUAL:TRANS_TIME_FROM_P2_0	12.F31.B54	12.F31.B53	12.F30.B53	12.F30.B52	12.F31.B52	12.F31.B51	12.F30.B51	12.F30.B50	12.F31.B50	12.F31.B49	12.F30.B49	12.F30.B48	12.F31.B48	12.F31.B47	12.F30.B47	12.F30.B46
GTP_DUAL:TRANS_TIME_FROM_P2_1	7.F31.B9	7.F31.B10	7.F30.B10	7.F30.B11	7.F31.B11	7.F31.B12	7.F30.B12	7.F30.B13	7.F31.B13	7.F31.B14	7.F30.B14	7.F30.B15	7.F31.B15	7.F31.B16	7.F30.B16	7.F30.B17
GTP_DUAL:TRANS_TIME_NON_P2_0	12.F31.B46	12.F31.B45	12.F30.B45	12.F30.B44	12.F31.B44	12.F31.B43	12.F30.B43	12.F30.B42	12.F31.B42	12.F31.B41	12.F30.B41	12.F30.B40	12.F31.B40	12.F31.B39	12.F30.B39	12.F30.B38
GTP_DUAL:TRANS_TIME_NON_P2_1	7.F31.B17	7.F31.B18	7.F30.B18	7.F30.B19	7.F31.B19	7.F31.B20	7.F30.B20	7.F30.B21	7.F31.B21	7.F31.B22	7.F30.B22	7.F30.B23	7.F31.B23	7.F31.B24	7.F30.B24	7.F30.B25
GTP_DUAL:TRANS_TIME_TO_P2_0	12.F31.B38	12.F31.B37	12.F30.B37	12.F30.B36	12.F31.B36	12.F31.B35	12.F30.B35	12.F30.B34	12.F31.B34	12.F31.B33	12.F30.B33	12.F30.B32	12.F31.B32	12.F31.B31	12.F30.B31	12.F30.B30
GTP_DUAL:TRANS_TIME_TO_P2_1	7.F31.B25	7.F31.B26	7.F30.B26	7.F30.B27	7.F31.B27	7.F31.B28	7.F30.B28	7.F30.B29	7.F31.B29	7.F31.B30	7.F30.B30	7.F30.B31	7.F31.B31	7.F31.B32	7.F30.B32	7.F30.B33
non-inverted	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:MUX.CLKIN	5.F31.B34	5.F30.B34	5.F30.B35
GREFCLK	0	0	0
CLKOUT_SOUTH_N	0	0	1
CLKPN	0	1	1
CLKOUT_NORTH_S	1	0	1

GTP_DUAL:MUX.CLKOUT_NORTH	5.F31.B36
CLKOUT_NORTH_S	0
CLKPN	1

GTP_DUAL:MUX.CLKOUT_SOUTH	5.F31.B35
CLKOUT_SOUTH_N	0
CLKPN	1

GTP_DUAL:OOB_CLK_DIVIDER	9.F31.B54	9.F30.B54	9.F30.B55
1	0	0	0
2	0	0	1
4	0	1	0
6	0	1	1
8	1	0	0
10	1	0	1
12	1	1	0
14	1	1	1

GTP_DUAL:PCS_COM_CFG	9.F31.B56	9.F30.B56	9.F30.B57	9.F31.B57	9.F31.B58	9.F30.B58	9.F30.B59	9.F31.B59	9.F31.B60	9.F30.B60	9.F30.B61	9.F31.B61	9.F31.B62	9.F30.B62	9.F30.B63	9.F31.B63	10.F31.B0	10.F30.B0	10.F30.B1	10.F31.B1	10.F31.B2	10.F30.B2	10.F30.B3	10.F31.B3	10.F31.B4	10.F30.B4	10.F30.B5	10.F31.B5
non-inverted	[27]	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:PLL_DIVSEL_FB	10.F30.B7	10.F31.B7	10.F31.B8	10.F31.B6
2	0	0	0	0
1	0	0	0	1
3	0	0	1	0
4	0	1	0	0
5	0	1	1	0
8	1	1	0	0
10	1	1	1	0

GTP_DUAL:PLL_DIVSEL_REF	5.F31.B38	5.F31.B37	5.F30.B37	5.F30.B36	5.F30.B38
2	0	0	0	0	0
1	0	0	0	0	1
3	0	0	0	1	0
4	0	0	1	0	0
5	0	0	1	1	0
6	0	1	0	1	0
8	0	1	1	0	0
10	0	1	1	1	0
12	1	1	0	1	0
16	1	1	1	0	0
20	1	1	1	1	0

GTP_DUAL:PLL_RXDIVSEL_OUT_0	13.F31.B49	13.F30.B49
GTP_DUAL:PLL_RXDIVSEL_OUT_1	6.F31.B15	6.F31.B16
GTP_DUAL:PLL_TXDIVSEL_COMM_OUT	14.F31.B20	14.F30.B20
GTP_DUAL:PLL_TXDIVSEL_OUT_0	13.F31.B48	13.F31.B47
GTP_DUAL:PLL_TXDIVSEL_OUT_1	5.F31.B41	5.F31.B42
1	0	0
2	0	1
4	1	0

GTP_DUAL:PMA_CDR_SCAN_0	13.F30.B47	13.F30.B46	13.F31.B46	13.F31.B45	13.F30.B45	13.F30.B44	13.F31.B44	13.F31.B43	13.F30.B43	13.F30.B42	13.F31.B42	13.F31.B41	13.F30.B41	13.F30.B40	13.F31.B40	13.F31.B39	13.F30.B39	13.F30.B38	13.F31.B38	13.F31.B37	13.F30.B37	13.F30.B36	13.F31.B36	13.F31.B35	13.F30.B35	13.F30.B34	13.F31.B34
GTP_DUAL:PMA_CDR_SCAN_1	6.F30.B16	6.F30.B17	6.F31.B17	6.F31.B18	6.F30.B18	6.F30.B19	6.F31.B19	6.F31.B20	6.F30.B20	6.F30.B21	6.F31.B21	6.F31.B22	6.F30.B22	6.F30.B23	6.F31.B23	6.F31.B24	6.F30.B24	6.F30.B25	6.F31.B25	6.F31.B26	6.F30.B26	6.F30.B27	6.F31.B27	6.F31.B28	6.F30.B28	6.F30.B29	6.F31.B29
non-inverted	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:PMA_COM_CFG	14.F31.B24	14.F30.B23	14.F31.B23	9.F30.B39	10.F30.B25	9.F31.B41	10.F30.B22	9.F31.B42	10.F31.B22	9.F31.B44	10.F31.B20	9.F30.B42	10.F31.B21	9.F30.B43	10.F30.B21	9.F31.B39	10.F31.B24	9.F31.B40	10.F30.B24	9.F31.B43	10.F30.B20	9.F30.B45	10.F30.B19	9.F30.B44	10.F31.B19	9.F30.B47	9.F31.B45	9.F30.B46	9.F31.B46	10.F30.B17	10.F30.B18	10.F31.B17	10.F31.B18	9.F31.B48	10.F30.B16	9.F31.B47	10.F31.B16	9.F30.B40	10.F30.B23	9.F30.B41	10.F31.B23	9.F31.B52	10.F31.B12	9.F31.B51	10.F30.B12	9.F30.B51	10.F30.B13	9.F30.B50	10.F31.B13	9.F31.B49	10.F31.B14	9.F31.B50	10.F30.B14	9.F30.B49	10.F31.B15	9.F30.B48	10.F30.B15	10.F31.B11	14.F30.B19	14.F30.B18	14.F31.B18	14.F31.B17	14.F30.B17	5.F30.B44	5.F30.B45	5.F31.B45	5.F31.B46	5.F30.B46	5.F31.B44	14.F31.B19	12.F30.B19	9.F31.B34	9.F30.B34	9.F30.B35	9.F31.B35	9.F31.B36	9.F30.B36	9.F30.B37	9.F31.B37	9.F31.B38	10.F31.B29	7.F30.B46	10.F31.B25	10.F31.B26	10.F30.B26	10.F31.B27	10.F31.B28	10.F30.B28	10.F30.B29	10.F30.B27
non-inverted	[89]	[88]	[87]	[86]	[85]	[84]	[83]	[82]	[81]	[80]	[79]	[78]	[77]	[76]	[75]	[74]	[73]	[72]	[71]	[70]	[69]	[68]	[67]	[66]	[65]	[64]	[63]	[62]	[61]	[60]	[59]	[58]	[57]	[56]	[55]	[54]	[53]	[52]	[51]	[50]	[49]	[48]	[47]	[46]	[45]	[44]	[43]	[42]	[41]	[40]	[39]	[38]	[37]	[36]	[35]	[34]	[33]	[32]	[31]	[30]	[29]	[28]	[27]	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:PMA_RX_CFG_0	14.F31.B14	14.F30.B4	14.F31.B12	14.F31.B11	14.F30.B11	14.F30.B10	14.F31.B10	14.F31.B9	14.F30.B9	14.F30.B8	14.F31.B8	5.F31.B56	14.F30.B14	5.F30.B51	14.F31.B4	14.F31.B3	14.F30.B3	14.F30.B2	14.F31.B2	14.F30.B6	14.F31.B6	14.F31.B5	14.F30.B5	14.F31.B13	14.F30.B13
GTP_DUAL:PMA_RX_CFG_1	5.F31.B49	5.F30.B59	5.F31.B51	5.F31.B52	5.F30.B52	5.F30.B53	5.F31.B53	5.F31.B54	5.F30.B54	5.F30.B55	5.F31.B55	14.F31.B7	5.F30.B49	14.F30.B12	5.F31.B59	5.F31.B60	5.F30.B60	5.F30.B61	5.F31.B61	5.F30.B57	5.F31.B57	5.F31.B58	5.F30.B58	5.F31.B50	5.F30.B50
non-inverted	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:RX_LOS_INVALID_INCR_0	13.F30.B16	13.F31.B16	13.F31.B15
GTP_DUAL:RX_LOS_INVALID_INCR_1	6.F30.B47	6.F31.B47	6.F31.B48
1	0	0	0
2	0	0	1
4	0	1	0
8	0	1	1
16	1	0	0
32	1	0	1
64	1	1	0
128	1	1	1

GTP_DUAL:RX_LOS_THRESHOLD_0	13.F30.B14	13.F31.B14	13.F31.B13
GTP_DUAL:RX_LOS_THRESHOLD_1	6.F30.B49	6.F31.B49	6.F31.B50
4	0	0	0
8	0	0	1
16	0	1	0
32	0	1	1
64	1	0	0
128	1	0	1
256	1	1	0
512	1	1	1

GTP_DUAL:RX_SLIDE_MODE_0	13.F30.B13
GTP_DUAL:RX_SLIDE_MODE_1	6.F30.B50
PCS	0
PMA	1

GTP_DUAL:RX_STATUS_FMT_0	13.F30.B12
GTP_DUAL:RX_STATUS_FMT_1	6.F30.B51
PCIE	0
SATA	1

GTP_DUAL:RX_XCLK_SEL_0	13.F31.B12
GTP_DUAL:RX_XCLK_SEL_1	6.F31.B51
RXREC	0
RXUSR	1

GTP_DUAL:TERMINATION_IMP_0	12.F30.B54
GTP_DUAL:TERMINATION_IMP_1	7.F30.B9
50	0
75	1

GTP_DUAL:TX_DETECT_RX_CFG_0	12.F31.B29	12.F30.B29	12.F30.B28	12.F31.B28	12.F31.B27	12.F30.B27	12.F30.B26	12.F31.B26	12.F31.B25	12.F30.B25	12.F30.B24	12.F31.B24	12.F31.B23	12.F30.B23
GTP_DUAL:TX_DETECT_RX_CFG_1	7.F31.B34	7.F30.B34	7.F30.B35	7.F31.B35	7.F31.B36	7.F30.B36	7.F30.B37	7.F31.B37	7.F31.B38	7.F30.B38	7.F30.B39	7.F31.B39	7.F31.B40	7.F30.B40
non-inverted	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

GTP_DUAL:TX_XCLK_SEL_0	12.F31.B20
GTP_DUAL:TX_XCLK_SEL_1	7.F31.B43
TXOUT	0
TXUSR	1

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