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63 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[12] |
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60 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
59 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[14] |
58 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
57 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[15] |
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53 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[17] | - |
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51 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[18] | - |
50 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
49 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[19] | - |
48 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[20] | - |
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45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[21] | - |
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43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[22] | - |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[23] | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[24] | - |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[25] | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[26] | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[27] | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[28] | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[29] | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[30] | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[31] | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:ENABLE64 |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||||
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0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[0] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[1] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[2] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[3] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[4] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[5] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[6] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[7] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[8] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[9] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[10] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_0:CRC_INIT[11] |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame |
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Bit | Frame |
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Bit | Frame | |||||||||||||||||||||||||||||
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0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
62 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[11] |
61 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
60 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[10] |
59 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
58 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[9] |
57 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
56 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
55 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[8] |
54 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
53 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[7] |
52 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
51 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[6] |
50 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
49 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[5] |
48 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[4] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[3] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[2] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[1] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[0] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Bit | Frame | |||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:ENABLE64 |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[31] | - |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[30] | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[29] | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[28] | - |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[27] | - |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[26] | - |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[25] | - |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[24] | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[23] | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[22] | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[21] | - |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[20] | - |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[19] | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[18] | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[17] | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[16] | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[15] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[14] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[13] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | CRC32_3:CRC_INIT[12] |
Bit | Frame |
---|
Bit | Frame |
---|
Bit | Frame | ||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | GTX_DUAL:USRCLK0 | ~CRC32_0:INV.CRCCLK | - | - | - | - | - | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~CRC32_2:INV.CRCCLK | - | - | - | - | - | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | ~CRC32_3:INV.CRCCLK | GTX_DUAL:INV.DCLK | GTX_DUAL:INV.TXUSRCLK1 | GTX_DUAL:INV.RXUSRCLK1 | GTX_DUAL:INV.RXUSRCLK20 | GTX_DUAL:INV.TXUSRCLK20 | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | GTX_DUAL:USRCLK1 | ~CRC32_1:INV.CRCCLK | GTX_DUAL:INV.TXUSRCLK21 | GTX_DUAL:INV.RXUSRCLK21 | GTX_DUAL:INV.RXUSRCLK0 | GTX_DUAL:INV.TXUSRCLK0 | - | - | - | - | GTX_DUAL:ENABLE |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
CRC32_0:CRC_INIT | 2.28.24 | 2.28.26 | 2.28.28 | 2.28.30 | 2.28.32 | 2.28.35 | 2.28.36 | 2.28.39 | 2.28.41 | 2.28.43 | 2.28.45 | 2.28.47 | 2.28.49 | 2.28.51 | 2.28.53 | 2.28.55 | 2.29.57 | 2.29.59 | 2.29.61 | 2.29.63 | 3.29.1 | 3.29.3 | 3.29.5 | 3.29.8 | 3.29.10 | 3.29.12 | 3.29.14 | 3.29.16 | 3.29.18 | 3.29.20 | 3.29.22 | 3.29.24 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CRC32_1:CRC_INIT | 8.28.60 | 8.29.61 | 8.28.62 | 8.29.63 | 9.28.0 | 9.29.1 | 9.28.3 | 9.29.3 | 9.28.4 | 9.29.6 | 9.28.6 | 9.29.7 | 9.28.8 | 9.28.9 | 9.29.10 | 9.28.11 | 9.29.12 | 9.28.12 | 9.29.13 | 9.28.14 | 9.29.15 | 9.28.17 | 9.29.18 | 9.28.19 | 9.29.20 | 9.28.21 | 9.29.22 | 9.28.23 | 9.29.24 | 9.28.25 | 9.29.26 | 9.29.27 |
CRC32_2:CRC_INIT | 11.28.3 | 11.29.2 | 11.28.1 | 11.29.0 | 10.28.63 | 10.29.62 | 10.28.60 | 10.29.60 | 10.28.59 | 10.29.57 | 10.28.57 | 10.29.56 | 10.28.55 | 10.28.54 | 10.29.53 | 10.28.52 | 10.29.51 | 10.28.51 | 10.29.50 | 10.28.49 | 10.29.48 | 10.28.46 | 10.29.45 | 10.28.44 | 10.29.43 | 10.28.42 | 10.29.41 | 10.28.40 | 10.29.39 | 10.28.38 | 10.29.37 | 10.29.36 |
CRC32_3:CRC_INIT | 17.28.39 | 17.28.37 | 17.28.35 | 17.28.33 | 17.28.31 | 17.28.28 | 17.28.27 | 17.28.24 | 17.28.22 | 17.28.20 | 17.28.18 | 17.28.16 | 17.28.14 | 17.28.12 | 17.28.10 | 17.28.8 | 17.29.6 | 17.29.4 | 17.29.2 | 17.29.0 | 16.29.62 | 16.29.60 | 16.29.58 | 16.29.55 | 16.29.53 | 16.29.51 | 16.29.49 | 16.29.47 | 16.29.45 | 16.29.43 | 16.29.41 | 16.29.39 |
GTX_DUAL:PRBS_ERR_THRESHOLD_0 | 13.31.33 | 13.30.33 | 13.30.32 | 13.31.32 | 13.31.31 | 13.30.31 | 13.30.30 | 13.31.30 | 13.31.29 | 13.30.29 | 13.30.28 | 13.31.28 | 13.31.27 | 13.30.27 | 13.30.26 | 13.31.26 | 13.31.25 | 13.30.25 | 13.30.24 | 13.31.24 | 13.31.23 | 13.30.23 | 13.30.22 | 13.31.22 | 13.31.21 | 13.30.21 | 13.30.20 | 13.31.20 | 13.31.19 | 13.30.19 | 13.30.18 | 13.31.18 |
GTX_DUAL:PRBS_ERR_THRESHOLD_1 | 6.31.30 | 6.30.30 | 6.30.31 | 6.31.31 | 6.31.32 | 6.30.32 | 6.30.33 | 6.31.33 | 6.31.34 | 6.30.34 | 6.30.35 | 6.31.35 | 6.31.36 | 6.30.36 | 6.30.37 | 6.31.37 | 6.31.38 | 6.30.38 | 6.30.39 | 6.31.39 | 6.31.40 | 6.30.40 | 6.30.41 | 6.31.41 | 6.31.42 | 6.30.42 | 6.30.43 | 6.31.43 | 6.31.44 | 6.30.44 | 6.30.45 | 6.31.45 |
non-inverted | [31] | [30] | [29] | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
CRC32_0:ENABLE64 | 2.29.22 |
---|---|
CRC32_3:ENABLE64 | 17.29.41 |
GTX_DUAL:AC_CAP_DIS_0 | 14.30.15 |
GTX_DUAL:AC_CAP_DIS_1 | 5.30.48 |
GTX_DUAL:CHAN_BOND_KEEP_ALIGN_0 | 14.31.42 |
GTX_DUAL:CHAN_BOND_KEEP_ALIGN_1 | 5.31.22 |
GTX_DUAL:CHAN_BOND_SEQ_2_USE_0 | 12.30.14 |
GTX_DUAL:CHAN_BOND_SEQ_2_USE_1 | 7.30.49 |
GTX_DUAL:CLKINDC_B | 5.31.33 |
GTX_DUAL:CLKRCV_TRST | 6.31.14 |
GTX_DUAL:CLK_CORRECT_USE_0 | 12.31.3 |
GTX_DUAL:CLK_CORRECT_USE_1 | 7.31.60 |
GTX_DUAL:CLK_COR_INSERT_IDLE_FLAG_0 | 12.30.11 |
GTX_DUAL:CLK_COR_INSERT_IDLE_FLAG_1 | 7.30.52 |
GTX_DUAL:CLK_COR_KEEP_IDLE_0 | 12.30.10 |
GTX_DUAL:CLK_COR_KEEP_IDLE_1 | 7.30.53 |
GTX_DUAL:CLK_COR_PRECEDENCE_0 | 12.31.4 |
GTX_DUAL:CLK_COR_PRECEDENCE_1 | 7.31.59 |
GTX_DUAL:CLK_COR_SEQ_2_USE_0 | 11.30.20 |
GTX_DUAL:CLK_COR_SEQ_2_USE_1 | 8.30.43 |
GTX_DUAL:COMMA_DOUBLE_0 | 11.30.13 |
GTX_DUAL:COMMA_DOUBLE_1 | 8.30.50 |
GTX_DUAL:DEC_MCOMMA_DETECT_0 | 11.30.12 |
GTX_DUAL:DEC_MCOMMA_DETECT_1 | 8.30.51 |
GTX_DUAL:DEC_PCOMMA_DETECT_0 | 11.31.12 |
GTX_DUAL:DEC_PCOMMA_DETECT_1 | 8.31.51 |
GTX_DUAL:DEC_VALID_COMMA_ONLY_0 | 11.31.11 |
GTX_DUAL:DEC_VALID_COMMA_ONLY_1 | 8.31.52 |
GTX_DUAL:ENABLE | 20.28.12 |
GTX_DUAL:INV.DCLK | 20.19.13 |
GTX_DUAL:INV.RXUSRCLK0 | 20.22.12 |
GTX_DUAL:INV.RXUSRCLK1 | 20.21.13 |
GTX_DUAL:INV.RXUSRCLK20 | 20.22.13 |
GTX_DUAL:INV.RXUSRCLK21 | 20.21.12 |
GTX_DUAL:INV.TXUSRCLK0 | 20.23.12 |
GTX_DUAL:INV.TXUSRCLK1 | 20.20.13 |
GTX_DUAL:INV.TXUSRCLK20 | 20.23.13 |
GTX_DUAL:INV.TXUSRCLK21 | 20.20.12 |
GTX_DUAL:MCOMMA_DETECT_0 | 11.31.6 |
GTX_DUAL:MCOMMA_DETECT_1 | 8.31.57 |
GTX_DUAL:OVERSAMPLE_MODE | 9.31.55 |
GTX_DUAL:PCI_EXPRESS_MODE_0 | 13.31.55 |
GTX_DUAL:PCI_EXPRESS_MODE_1 | 6.31.8 |
GTX_DUAL:PCOMMA_DETECT_0 | 13.31.50 |
GTX_DUAL:PCOMMA_DETECT_1 | 6.31.13 |
GTX_DUAL:PLL_FB_DCCEN | 11.30.1 |
GTX_DUAL:PLL_SATA_0 | 13.30.48 |
GTX_DUAL:PLL_SATA_1 | 6.30.15 |
GTX_DUAL:PLL_STARTUP_EN | 14.30.21 |
GTX_DUAL:RCV_TERM_GND_0 | 14.31.16 |
GTX_DUAL:RCV_TERM_GND_1 | 5.31.47 |
GTX_DUAL:RCV_TERM_VTTRX_0 | 14.30.16 |
GTX_DUAL:RCV_TERM_VTTRX_1 | 5.30.47 |
GTX_DUAL:RXGEARBOX_USE_0 | 14.31.44 |
GTX_DUAL:RXGEARBOX_USE_1 | 5.31.20 |
GTX_DUAL:RX_BUFFER_USE_0 | 13.31.17 |
GTX_DUAL:RX_BUFFER_USE_1 | 6.31.46 |
GTX_DUAL:RX_CDR_FORCE_ROTATE_0 | 14.30.7 |
GTX_DUAL:RX_CDR_FORCE_ROTATE_1 | 5.30.56 |
GTX_DUAL:RX_DECODE_SEQ_MATCH_0 | 13.30.17 |
GTX_DUAL:RX_DECODE_SEQ_MATCH_1 | 6.30.46 |
GTX_DUAL:RX_EN_IDLE_HOLD_CDR | 12.30.20 |
GTX_DUAL:RX_EN_IDLE_HOLD_DFE_0 | 14.30.32 |
GTX_DUAL:RX_EN_IDLE_HOLD_DFE_1 | 5.30.31 |
GTX_DUAL:RX_EN_IDLE_RESET_BUF_0 | 14.31.33 |
GTX_DUAL:RX_EN_IDLE_RESET_BUF_1 | 5.31.30 |
GTX_DUAL:RX_EN_IDLE_RESET_FR | 12.30.21 |
GTX_DUAL:RX_EN_IDLE_RESET_PH | 12.30.17 |
GTX_DUAL:RX_LOSS_OF_SYNC_FSM_0 | 13.30.15 |
GTX_DUAL:RX_LOSS_OF_SYNC_FSM_1 | 6.30.48 |
GTX_DUAL:TERMINATION_OVRD | 10.30.11 |
GTX_DUAL:TXGEARBOX_USE_0 | 14.30.44 |
GTX_DUAL:TXGEARBOX_USE_1 | 5.31.19 |
GTX_DUAL:TXOUTCLK_SEL_0 | 12.31.19 |
GTX_DUAL:TXOUTCLK_SEL_1 | 7.31.44 |
GTX_DUAL:TX_BUFFER_USE_0 | 12.31.30 |
GTX_DUAL:TX_BUFFER_USE_1 | 7.31.33 |
GTX_DUAL:USRCLK0 | 20.17.15 |
GTX_DUAL:USRCLK1 | 20.18.12 |
non-inverted | [0] |
CRC32_0:INV.CRCCLK | 20.18.15 |
---|---|
CRC32_1:INV.CRCCLK | 20.19.12 |
CRC32_2:INV.CRCCLK | 20.18.14 |
CRC32_3:INV.CRCCLK | 20.18.13 |
inverted | ~[0] |
GTX_DUAL:ALIGN_COMMA_WORD_0 | 10.31.30 |
---|---|
GTX_DUAL:ALIGN_COMMA_WORD_1 | 9.31.33 |
1 | 0 |
2 | 1 |
GTX_DUAL:CB2_INH_CC_PERIOD_0 | 14.31.41 | 14.30.41 | 14.30.40 | 14.31.40 |
---|---|---|---|---|
GTX_DUAL:CB2_INH_CC_PERIOD_1 | 5.30.22 | 5.30.23 | 5.31.23 | 5.31.24 |
GTX_DUAL:CHAN_BOND_1_MAX_SKEW_0 | 10.30.30 | 10.30.31 | 10.31.31 | 10.31.32 |
GTX_DUAL:CHAN_BOND_1_MAX_SKEW_1 | 9.30.33 | 9.30.32 | 9.31.32 | 9.31.31 |
GTX_DUAL:CHAN_BOND_2_MAX_SKEW_0 | 10.30.32 | 10.30.33 | 10.31.33 | 10.31.34 |
GTX_DUAL:CHAN_BOND_2_MAX_SKEW_1 | 9.30.31 | 9.30.30 | 9.31.30 | 9.31.29 |
GTX_DUAL:CHAN_BOND_SEQ_1_ENABLE_0 | 10.30.57 | 10.31.57 | 10.31.58 | 10.30.58 |
GTX_DUAL:CHAN_BOND_SEQ_1_ENABLE_1 | 9.30.6 | 9.31.6 | 9.31.5 | 9.30.5 |
GTX_DUAL:CHAN_BOND_SEQ_2_ENABLE_0 | 12.30.16 | 12.31.16 | 12.31.15 | 12.30.15 |
GTX_DUAL:CHAN_BOND_SEQ_2_ENABLE_1 | 7.30.47 | 7.31.47 | 7.31.48 | 7.30.48 |
GTX_DUAL:CLK_COR_SEQ_1_ENABLE_0 | 11.30.44 | 11.31.44 | 11.31.43 | 11.30.43 |
GTX_DUAL:CLK_COR_SEQ_1_ENABLE_1 | 8.30.19 | 8.31.19 | 8.31.20 | 8.30.20 |
GTX_DUAL:CLK_COR_SEQ_2_ENABLE_0 | 11.30.22 | 11.31.22 | 11.31.21 | 11.30.21 |
GTX_DUAL:CLK_COR_SEQ_2_ENABLE_1 | 8.30.41 | 8.31.41 | 8.31.42 | 8.30.42 |
GTX_DUAL:COM_BURST_VAL_0 | 11.31.20 | 11.31.19 | 11.30.19 | 11.30.18 |
GTX_DUAL:COM_BURST_VAL_1 | 8.31.43 | 8.31.44 | 8.30.44 | 8.30.45 |
GTX_DUAL:RX_IDLE_HI_CNT_0 | 14.30.36 | 14.31.36 | 14.31.35 | 14.30.35 |
GTX_DUAL:RX_IDLE_HI_CNT_1 | 5.30.27 | 5.31.27 | 5.31.28 | 5.30.28 |
GTX_DUAL:RX_IDLE_LO_CNT_0 | 14.31.39 | 14.30.39 | 14.30.38 | 14.31.38 |
GTX_DUAL:RX_IDLE_LO_CNT_1 | 5.30.24 | 5.30.25 | 5.31.25 | 5.31.26 |
non-inverted | [3] | [2] | [1] | [0] |
GTX_DUAL:CDR_PH_ADJ_TIME | 12.31.41 | 12.30.41 | 12.30.40 | 12.31.40 | 12.31.39 |
---|---|---|---|---|---|
GTX_DUAL:CLK_COR_REPEAT_WAIT_0 | 12.30.3 | 12.30.2 | 12.31.2 | 12.31.1 | 12.30.1 |
GTX_DUAL:CLK_COR_REPEAT_WAIT_1 | 7.30.60 | 7.30.61 | 7.31.61 | 7.31.62 | 7.30.62 |
GTX_DUAL:DFE_CAL_TIME | 12.30.33 | 12.30.32 | 12.31.32 | 12.31.31 | 12.30.31 |
GTX_DUAL:TERMINATION_CTRL | 10.30.8 | 10.30.9 | 10.31.9 | 10.31.10 | 10.30.10 |
non-inverted | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:CHAN_BOND_LEVEL_0 | 10.30.34 | 10.30.35 | 10.31.35 |
---|---|---|---|
GTX_DUAL:CHAN_BOND_LEVEL_1 | 9.30.29 | 9.30.28 | 9.31.28 |
GTX_DUAL:GEARBOX_ENDEC_0 | 14.31.43 | 14.30.43 | 14.30.42 |
GTX_DUAL:GEARBOX_ENDEC_1 | 5.30.20 | 5.30.21 | 5.31.21 |
GTX_DUAL:OOBDETECT_THRESHOLD_0 | 12.30.18 | 12.31.18 | 12.31.17 |
GTX_DUAL:OOBDETECT_THRESHOLD_1 | 7.30.45 | 7.31.45 | 7.31.46 |
GTX_DUAL:PLL_LKDET_CFG | 5.31.39 | 5.31.40 | 5.30.40 |
GTX_DUAL:PLL_TDCC_CFG | 14.31.24 | 14.30.23 | 14.31.23 |
GTX_DUAL:SATA_BURST_VAL_0 | 13.31.11 | 13.30.11 | 13.30.10 |
GTX_DUAL:SATA_BURST_VAL_1 | 6.31.52 | 6.30.52 | 6.30.53 |
GTX_DUAL:SATA_IDLE_VAL_0 | 13.31.10 | 13.31.9 | 13.30.9 |
GTX_DUAL:SATA_IDLE_VAL_1 | 6.31.53 | 6.31.54 | 6.30.54 |
GTX_DUAL:TXRX_INVERT_0 | 12.30.22 | 12.31.22 | 12.31.21 |
GTX_DUAL:TXRX_INVERT_1 | 7.30.41 | 7.31.41 | 7.31.42 |
GTX_DUAL:TX_IDLE_DELAY_0 | 14.31.28 | 14.31.27 | 14.30.27 |
GTX_DUAL:TX_IDLE_DELAY_1 | 5.31.31 | 5.31.32 | 5.30.32 |
non-inverted | [2] | [1] | [0] |
GTX_DUAL:CHAN_BOND_MODE_0 | 10.30.36 | 10.31.36 |
---|---|---|
GTX_DUAL:CHAN_BOND_MODE_1 | 9.30.27 | 9.31.27 |
#OFF | 0 | 0 |
SLAVE | 0 | 1 |
MASTER | 1 | 0 |
GTX_DUAL:CHAN_BOND_SEQ_1_1_0 | 10.30.37 | 10.31.37 | 10.31.38 | 10.30.38 | 10.30.39 | 10.31.39 | 10.31.40 | 10.30.40 | 10.30.41 | 10.31.41 |
---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:CHAN_BOND_SEQ_1_1_1 | 9.30.26 | 9.31.26 | 9.31.25 | 9.30.25 | 9.30.24 | 9.31.24 | 9.31.23 | 9.30.23 | 9.30.22 | 9.31.22 |
GTX_DUAL:CHAN_BOND_SEQ_1_2_0 | 10.31.42 | 10.30.42 | 10.30.43 | 10.31.43 | 10.31.44 | 10.30.44 | 10.30.45 | 10.31.45 | 10.31.46 | 10.30.46 |
GTX_DUAL:CHAN_BOND_SEQ_1_2_1 | 9.31.21 | 9.30.21 | 9.30.20 | 9.31.20 | 9.31.19 | 9.30.19 | 9.30.18 | 9.31.18 | 9.31.17 | 9.30.17 |
GTX_DUAL:CHAN_BOND_SEQ_1_3_0 | 10.30.47 | 10.31.47 | 10.31.48 | 10.30.48 | 10.30.49 | 10.31.49 | 10.31.50 | 10.30.50 | 10.30.51 | 10.31.51 |
GTX_DUAL:CHAN_BOND_SEQ_1_3_1 | 9.30.16 | 9.31.16 | 9.31.15 | 9.30.15 | 9.30.14 | 9.31.14 | 9.31.13 | 9.30.13 | 9.30.12 | 9.31.12 |
GTX_DUAL:CHAN_BOND_SEQ_1_4_0 | 10.31.52 | 10.30.52 | 10.30.53 | 10.31.53 | 10.31.54 | 10.30.54 | 10.30.55 | 10.31.55 | 10.31.56 | 10.30.56 |
GTX_DUAL:CHAN_BOND_SEQ_1_4_1 | 9.31.11 | 9.30.11 | 9.30.10 | 9.31.10 | 9.31.9 | 9.30.9 | 9.30.8 | 9.31.8 | 9.31.7 | 9.30.7 |
GTX_DUAL:CHAN_BOND_SEQ_2_1_0 | 10.30.59 | 10.31.59 | 10.31.60 | 10.30.60 | 10.30.61 | 10.31.61 | 10.31.62 | 10.30.62 | 10.30.63 | 10.31.63 |
GTX_DUAL:CHAN_BOND_SEQ_2_1_1 | 9.30.4 | 9.31.4 | 9.31.3 | 9.30.3 | 9.30.2 | 9.31.2 | 9.31.1 | 9.30.1 | 9.30.0 | 9.31.0 |
GTX_DUAL:CHAN_BOND_SEQ_2_2_0 | 11.31.0 | 11.30.0 | 11.31.1 | 11.31.2 | 11.30.2 | 11.30.3 | 11.31.3 | 11.31.4 | 11.30.4 | 11.30.5 |
GTX_DUAL:CHAN_BOND_SEQ_2_2_1 | 8.31.63 | 8.30.63 | 8.31.62 | 8.31.61 | 8.30.61 | 8.30.60 | 8.31.60 | 8.31.59 | 8.30.59 | 8.30.58 |
GTX_DUAL:CHAN_BOND_SEQ_2_3_0 | 11.31.5 | 13.30.56 | 13.30.57 | 13.31.57 | 13.31.58 | 13.30.58 | 13.30.59 | 13.31.59 | 13.31.60 | 13.30.60 |
GTX_DUAL:CHAN_BOND_SEQ_2_3_1 | 8.31.58 | 6.30.7 | 6.30.6 | 6.31.6 | 6.31.5 | 6.30.5 | 6.30.4 | 6.31.4 | 6.31.3 | 6.30.3 |
GTX_DUAL:CHAN_BOND_SEQ_2_4_0 | 13.30.61 | 13.31.61 | 13.31.62 | 13.30.62 | 13.30.63 | 13.31.63 | 14.31.0 | 14.30.0 | 14.30.1 | 14.31.1 |
GTX_DUAL:CHAN_BOND_SEQ_2_4_1 | 6.30.2 | 6.31.2 | 6.31.1 | 6.30.1 | 6.30.0 | 6.31.0 | 5.31.63 | 5.30.63 | 5.30.62 | 5.31.62 |
GTX_DUAL:CLK_COR_SEQ_1_1_0 | 12.30.0 | 12.31.0 | 11.31.63 | 11.30.63 | 11.30.62 | 11.31.62 | 11.31.61 | 11.30.61 | 11.30.60 | 11.31.60 |
GTX_DUAL:CLK_COR_SEQ_1_1_1 | 7.30.63 | 7.31.63 | 8.31.0 | 8.30.0 | 8.30.1 | 8.31.1 | 8.31.2 | 8.30.2 | 8.30.3 | 8.31.3 |
GTX_DUAL:CLK_COR_SEQ_1_2_0 | 11.31.59 | 11.30.59 | 11.30.58 | 11.31.58 | 11.31.57 | 11.30.57 | 11.30.56 | 11.31.56 | 11.31.55 | 11.30.55 |
GTX_DUAL:CLK_COR_SEQ_1_2_1 | 8.31.4 | 8.30.4 | 8.30.5 | 8.31.5 | 8.31.6 | 8.30.6 | 8.30.7 | 8.31.7 | 8.31.8 | 8.30.8 |
GTX_DUAL:CLK_COR_SEQ_1_3_0 | 11.30.54 | 11.31.54 | 11.31.53 | 11.30.53 | 11.30.52 | 11.31.52 | 11.31.51 | 11.30.51 | 11.30.50 | 11.31.50 |
GTX_DUAL:CLK_COR_SEQ_1_3_1 | 8.30.9 | 8.31.9 | 8.31.10 | 8.30.10 | 8.30.11 | 8.31.11 | 8.31.12 | 8.30.12 | 8.30.13 | 8.31.13 |
GTX_DUAL:CLK_COR_SEQ_1_4_0 | 11.31.49 | 11.30.49 | 11.30.48 | 11.31.48 | 11.31.47 | 11.30.47 | 11.30.46 | 11.31.46 | 11.31.45 | 11.30.45 |
GTX_DUAL:CLK_COR_SEQ_1_4_1 | 8.31.14 | 8.30.14 | 8.30.15 | 8.31.15 | 8.31.16 | 8.30.16 | 8.30.17 | 8.31.17 | 8.31.18 | 8.30.18 |
GTX_DUAL:CLK_COR_SEQ_2_1_0 | 11.30.42 | 11.31.42 | 11.31.41 | 11.30.41 | 11.30.40 | 11.31.40 | 11.31.39 | 11.30.39 | 11.30.38 | 11.31.38 |
GTX_DUAL:CLK_COR_SEQ_2_1_1 | 8.30.21 | 8.31.21 | 8.31.22 | 8.30.22 | 8.30.23 | 8.31.23 | 8.31.24 | 8.30.24 | 8.30.25 | 8.31.25 |
GTX_DUAL:CLK_COR_SEQ_2_2_0 | 11.31.37 | 11.30.37 | 11.30.36 | 11.31.36 | 11.31.35 | 11.30.35 | 11.30.34 | 11.31.34 | 11.31.33 | 11.30.33 |
GTX_DUAL:CLK_COR_SEQ_2_2_1 | 8.31.26 | 8.30.26 | 8.30.27 | 8.31.27 | 8.31.28 | 8.30.28 | 8.30.29 | 8.31.29 | 8.31.30 | 8.30.30 |
GTX_DUAL:CLK_COR_SEQ_2_3_0 | 11.30.32 | 11.31.32 | 11.31.31 | 11.30.31 | 11.30.30 | 11.31.30 | 11.31.29 | 11.30.29 | 11.30.28 | 11.31.28 |
GTX_DUAL:CLK_COR_SEQ_2_3_1 | 8.30.31 | 8.31.31 | 8.31.32 | 8.30.32 | 8.30.33 | 8.31.33 | 8.31.34 | 8.30.34 | 8.30.35 | 8.31.35 |
GTX_DUAL:CLK_COR_SEQ_2_4_0 | 11.31.27 | 11.30.27 | 11.30.26 | 11.31.26 | 11.31.25 | 11.30.25 | 11.30.24 | 11.31.24 | 11.31.23 | 11.30.23 |
GTX_DUAL:CLK_COR_SEQ_2_4_1 | 8.31.36 | 8.30.36 | 8.30.37 | 8.31.37 | 8.31.38 | 8.30.38 | 8.30.39 | 8.31.39 | 8.31.40 | 8.30.40 |
GTX_DUAL:COMMA_10B_ENABLE_0 | 11.31.18 | 11.31.17 | 11.30.17 | 11.30.16 | 11.31.16 | 11.31.15 | 11.30.15 | 11.30.14 | 11.31.14 | 11.31.13 |
GTX_DUAL:COMMA_10B_ENABLE_1 | 8.31.45 | 8.31.46 | 8.30.46 | 8.30.47 | 8.31.47 | 8.31.48 | 8.30.48 | 8.30.49 | 8.31.49 | 8.31.50 |
GTX_DUAL:DFE_CFG_0 | 14.31.49 | 14.30.49 | 14.30.48 | 14.31.48 | 14.31.47 | 14.30.47 | 14.30.46 | 14.31.46 | 14.31.45 | 14.30.45 |
GTX_DUAL:DFE_CFG_1 | 5.30.14 | 5.30.15 | 5.31.15 | 5.31.16 | 5.30.16 | 5.30.17 | 5.31.17 | 5.31.18 | 5.30.18 | 5.30.19 |
GTX_DUAL:MCOMMA_10B_VALUE_0 | 11.30.11 | 11.30.10 | 11.31.10 | 11.31.9 | 11.30.9 | 11.30.8 | 11.31.8 | 11.31.7 | 11.30.7 | 11.30.6 |
GTX_DUAL:MCOMMA_10B_VALUE_1 | 8.30.52 | 8.30.53 | 8.31.53 | 8.31.54 | 8.30.54 | 8.30.55 | 8.31.55 | 8.31.56 | 8.30.56 | 8.30.57 |
GTX_DUAL:PCOMMA_10B_VALUE_0 | 13.30.55 | 13.30.54 | 13.31.54 | 13.31.53 | 13.30.53 | 13.30.52 | 13.31.52 | 13.31.51 | 13.30.51 | 13.30.50 |
GTX_DUAL:PCOMMA_10B_VALUE_1 | 6.30.8 | 6.30.9 | 6.31.9 | 6.31.10 | 6.30.10 | 6.30.11 | 6.31.11 | 6.31.12 | 6.30.12 | 6.30.13 |
GTX_DUAL:TRANS_TIME_TO_P2_0 | 12.31.38 | 12.31.37 | 12.30.37 | 12.30.36 | 12.31.36 | 12.31.35 | 12.30.35 | 12.30.34 | 12.31.34 | 12.31.33 |
GTX_DUAL:TRANS_TIME_TO_P2_1 | 7.31.25 | 7.31.26 | 7.30.26 | 7.30.27 | 7.31.27 | 7.31.28 | 7.30.28 | 7.30.29 | 7.31.29 | 7.31.30 |
non-inverted | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:CHAN_BOND_SEQ_LEN_0 | 12.31.14 | 12.31.13 |
---|---|---|
GTX_DUAL:CHAN_BOND_SEQ_LEN_1 | 7.31.49 | 7.31.50 |
GTX_DUAL:CLK_COR_ADJ_LEN_0 | 12.30.13 | 12.30.12 |
GTX_DUAL:CLK_COR_ADJ_LEN_1 | 7.30.50 | 7.30.51 |
GTX_DUAL:CLK_COR_DET_LEN_0 | 12.31.12 | 12.31.11 |
GTX_DUAL:CLK_COR_DET_LEN_1 | 7.31.51 | 7.31.52 |
1 | 0 | 0 |
2 | 0 | 1 |
3 | 1 | 0 |
4 | 1 | 1 |
GTX_DUAL:CLK25_DIVIDER | 9.30.52 | 9.30.53 | 9.31.53 |
---|---|---|---|
1 | 0 | 0 | 0 |
2 | 0 | 0 | 1 |
3 | 0 | 1 | 0 |
4 | 0 | 1 | 1 |
5 | 1 | 0 | 0 |
6 | 1 | 0 | 1 |
10 | 1 | 1 | 0 |
12 | 1 | 1 | 1 |
GTX_DUAL:CLK_COR_MAX_LAT_0 | 12.31.10 | 12.31.9 | 12.30.9 | 12.30.8 | 12.31.8 | 12.31.7 |
---|---|---|---|---|---|---|
GTX_DUAL:CLK_COR_MAX_LAT_1 | 7.31.53 | 7.31.54 | 7.30.54 | 7.30.55 | 7.31.55 | 7.31.56 |
GTX_DUAL:CLK_COR_MIN_LAT_0 | 12.30.7 | 12.30.6 | 12.31.6 | 12.31.5 | 12.30.5 | 12.30.4 |
GTX_DUAL:CLK_COR_MIN_LAT_1 | 7.30.56 | 7.30.57 | 7.31.57 | 7.31.58 | 7.30.58 | 7.30.59 |
GTX_DUAL:SATA_MAX_BURST_0 | 13.30.8 | 13.31.8 | 13.31.7 | 13.30.7 | 13.30.6 | 13.31.6 |
GTX_DUAL:SATA_MAX_BURST_1 | 6.30.55 | 6.31.55 | 6.31.56 | 6.30.56 | 6.30.57 | 6.31.57 |
GTX_DUAL:SATA_MAX_INIT_0 | 13.31.5 | 13.30.5 | 13.30.4 | 13.31.4 | 13.31.3 | 13.30.3 |
GTX_DUAL:SATA_MAX_INIT_1 | 6.31.58 | 6.30.58 | 6.30.59 | 6.31.59 | 6.31.60 | 6.30.60 |
GTX_DUAL:SATA_MAX_WAKE_0 | 13.30.2 | 13.31.2 | 13.31.1 | 13.30.1 | 13.30.0 | 13.31.0 |
GTX_DUAL:SATA_MAX_WAKE_1 | 6.30.61 | 6.31.61 | 6.31.62 | 6.30.62 | 6.30.63 | 6.31.63 |
GTX_DUAL:SATA_MIN_BURST_0 | 12.31.63 | 12.30.63 | 12.30.62 | 12.31.62 | 12.31.61 | 12.30.61 |
GTX_DUAL:SATA_MIN_BURST_1 | 7.31.0 | 7.30.0 | 7.30.1 | 7.31.1 | 7.31.2 | 7.30.2 |
GTX_DUAL:SATA_MIN_INIT_0 | 12.30.60 | 12.31.60 | 12.31.59 | 12.30.59 | 12.30.58 | 12.31.58 |
GTX_DUAL:SATA_MIN_INIT_1 | 7.30.3 | 7.31.3 | 7.31.4 | 7.30.4 | 7.30.5 | 7.31.5 |
GTX_DUAL:SATA_MIN_WAKE_0 | 12.31.57 | 12.30.57 | 12.30.56 | 12.31.56 | 12.31.55 | 12.30.55 |
GTX_DUAL:SATA_MIN_WAKE_1 | 7.31.6 | 7.30.6 | 7.30.7 | 7.31.7 | 7.31.8 | 7.30.8 |
non-inverted | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:CM_TRIM_0 | 14.30.50 | 14.31.50 |
---|---|---|
GTX_DUAL:CM_TRIM_1 | 5.31.13 | 5.31.14 |
non-inverted | [1] | [0] |
GTX_DUAL:DRP00 | 5.31.7 | 5.30.7 | 5.30.6 | 5.31.6 | 5.31.5 | 5.30.5 | 5.30.4 | 5.31.4 | 5.31.3 | 5.30.3 | 5.30.2 | 5.31.2 | 5.31.1 | 5.30.1 | 5.30.0 | 5.31.0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:DRP01 | 5.31.15 | 5.30.15 | 5.30.14 | 5.31.14 | 5.31.13 | 5.30.13 | 5.30.12 | 5.31.12 | 5.31.11 | 5.30.11 | 5.30.10 | 5.31.10 | 5.31.9 | 5.30.9 | 5.30.8 | 5.31.8 |
GTX_DUAL:DRP02 | 5.31.23 | 5.30.23 | 5.30.22 | 5.31.22 | 5.31.21 | 5.30.21 | 5.30.20 | 5.31.20 | 5.31.19 | 5.30.19 | 5.30.18 | 5.31.18 | 5.31.17 | 5.30.17 | 5.30.16 | 5.31.16 |
GTX_DUAL:DRP03 | 5.31.31 | 5.30.31 | 5.30.30 | 5.31.30 | 5.31.29 | 5.30.29 | 5.30.28 | 5.31.28 | 5.31.27 | 5.30.27 | 5.30.26 | 5.31.26 | 5.31.25 | 5.30.25 | 5.30.24 | 5.31.24 |
GTX_DUAL:DRP04 | 5.31.39 | 5.30.39 | 5.30.38 | 5.31.38 | 5.31.37 | 5.30.37 | 5.30.36 | 5.31.36 | 5.31.35 | 5.30.35 | 5.30.34 | 5.31.34 | 5.31.33 | 5.30.33 | 5.30.32 | 5.31.32 |
GTX_DUAL:DRP05 | 5.31.47 | 5.30.47 | 5.30.46 | 5.31.46 | 5.31.45 | 5.30.45 | 5.30.44 | 5.31.44 | 5.31.43 | 5.30.43 | 5.30.42 | 5.31.42 | 5.31.41 | 5.30.41 | 5.30.40 | 5.31.40 |
GTX_DUAL:DRP06 | 5.31.55 | 5.30.55 | 5.30.54 | 5.31.54 | 5.31.53 | 5.30.53 | 5.30.52 | 5.31.52 | 5.31.51 | 5.30.51 | 5.30.50 | 5.31.50 | 5.31.49 | 5.30.49 | 5.30.48 | 5.31.48 |
GTX_DUAL:DRP07 | 5.31.63 | 5.30.63 | 5.30.62 | 5.31.62 | 5.31.61 | 5.30.61 | 5.30.60 | 5.31.60 | 5.31.59 | 5.30.59 | 5.30.58 | 5.31.58 | 5.31.57 | 5.30.57 | 5.30.56 | 5.31.56 |
GTX_DUAL:DRP08 | 6.31.7 | 6.30.7 | 6.30.6 | 6.31.6 | 6.31.5 | 6.30.5 | 6.30.4 | 6.31.4 | 6.31.3 | 6.30.3 | 6.30.2 | 6.31.2 | 6.31.1 | 6.30.1 | 6.30.0 | 6.31.0 |
GTX_DUAL:DRP09 | 6.31.15 | 6.30.15 | 6.30.14 | 6.31.14 | 6.31.13 | 6.30.13 | 6.30.12 | 6.31.12 | 6.31.11 | 6.30.11 | 6.30.10 | 6.31.10 | 6.31.9 | 6.30.9 | 6.30.8 | 6.31.8 |
GTX_DUAL:DRP0A | 6.31.23 | 6.30.23 | 6.30.22 | 6.31.22 | 6.31.21 | 6.30.21 | 6.30.20 | 6.31.20 | 6.31.19 | 6.30.19 | 6.30.18 | 6.31.18 | 6.31.17 | 6.30.17 | 6.30.16 | 6.31.16 |
GTX_DUAL:DRP0B | 6.31.31 | 6.30.31 | 6.30.30 | 6.31.30 | 6.31.29 | 6.30.29 | 6.30.28 | 6.31.28 | 6.31.27 | 6.30.27 | 6.30.26 | 6.31.26 | 6.31.25 | 6.30.25 | 6.30.24 | 6.31.24 |
GTX_DUAL:DRP0C | 6.31.39 | 6.30.39 | 6.30.38 | 6.31.38 | 6.31.37 | 6.30.37 | 6.30.36 | 6.31.36 | 6.31.35 | 6.30.35 | 6.30.34 | 6.31.34 | 6.31.33 | 6.30.33 | 6.30.32 | 6.31.32 |
GTX_DUAL:DRP0D | 6.31.47 | 6.30.47 | 6.30.46 | 6.31.46 | 6.31.45 | 6.30.45 | 6.30.44 | 6.31.44 | 6.31.43 | 6.30.43 | 6.30.42 | 6.31.42 | 6.31.41 | 6.30.41 | 6.30.40 | 6.31.40 |
GTX_DUAL:DRP0E | 6.31.55 | 6.30.55 | 6.30.54 | 6.31.54 | 6.31.53 | 6.30.53 | 6.30.52 | 6.31.52 | 6.31.51 | 6.30.51 | 6.30.50 | 6.31.50 | 6.31.49 | 6.30.49 | 6.30.48 | 6.31.48 |
GTX_DUAL:DRP0F | 6.31.63 | 6.30.63 | 6.30.62 | 6.31.62 | 6.31.61 | 6.30.61 | 6.30.60 | 6.31.60 | 6.31.59 | 6.30.59 | 6.30.58 | 6.31.58 | 6.31.57 | 6.30.57 | 6.30.56 | 6.31.56 |
GTX_DUAL:DRP10 | 7.31.7 | 7.30.7 | 7.30.6 | 7.31.6 | 7.31.5 | 7.30.5 | 7.30.4 | 7.31.4 | 7.31.3 | 7.30.3 | 7.30.2 | 7.31.2 | 7.31.1 | 7.30.1 | 7.30.0 | 7.31.0 |
GTX_DUAL:DRP11 | 7.31.15 | 7.30.15 | 7.30.14 | 7.31.14 | 7.31.13 | 7.30.13 | 7.30.12 | 7.31.12 | 7.31.11 | 7.30.11 | 7.30.10 | 7.31.10 | 7.31.9 | 7.30.9 | 7.30.8 | 7.31.8 |
GTX_DUAL:DRP12 | 7.31.23 | 7.30.23 | 7.30.22 | 7.31.22 | 7.31.21 | 7.30.21 | 7.30.20 | 7.31.20 | 7.31.19 | 7.30.19 | 7.30.18 | 7.31.18 | 7.31.17 | 7.30.17 | 7.30.16 | 7.31.16 |
GTX_DUAL:DRP13 | 7.31.31 | 7.30.31 | 7.30.30 | 7.31.30 | 7.31.29 | 7.30.29 | 7.30.28 | 7.31.28 | 7.31.27 | 7.30.27 | 7.30.26 | 7.31.26 | 7.31.25 | 7.30.25 | 7.30.24 | 7.31.24 |
GTX_DUAL:DRP14 | 7.31.39 | 7.30.39 | 7.30.38 | 7.31.38 | 7.31.37 | 7.30.37 | 7.30.36 | 7.31.36 | 7.31.35 | 7.30.35 | 7.30.34 | 7.31.34 | 7.31.33 | 7.30.33 | 7.30.32 | 7.31.32 |
GTX_DUAL:DRP15 | 7.31.47 | 7.30.47 | 7.30.46 | 7.31.46 | 7.31.45 | 7.30.45 | 7.30.44 | 7.31.44 | 7.31.43 | 7.30.43 | 7.30.42 | 7.31.42 | 7.31.41 | 7.30.41 | 7.30.40 | 7.31.40 |
GTX_DUAL:DRP16 | 7.31.55 | 7.30.55 | 7.30.54 | 7.31.54 | 7.31.53 | 7.30.53 | 7.30.52 | 7.31.52 | 7.31.51 | 7.30.51 | 7.30.50 | 7.31.50 | 7.31.49 | 7.30.49 | 7.30.48 | 7.31.48 |
GTX_DUAL:DRP17 | 7.31.63 | 7.30.63 | 7.30.62 | 7.31.62 | 7.31.61 | 7.30.61 | 7.30.60 | 7.31.60 | 7.31.59 | 7.30.59 | 7.30.58 | 7.31.58 | 7.31.57 | 7.30.57 | 7.30.56 | 7.31.56 |
GTX_DUAL:DRP18 | 8.31.7 | 8.30.7 | 8.30.6 | 8.31.6 | 8.31.5 | 8.30.5 | 8.30.4 | 8.31.4 | 8.31.3 | 8.30.3 | 8.30.2 | 8.31.2 | 8.31.1 | 8.30.1 | 8.30.0 | 8.31.0 |
GTX_DUAL:DRP19 | 8.31.15 | 8.30.15 | 8.30.14 | 8.31.14 | 8.31.13 | 8.30.13 | 8.30.12 | 8.31.12 | 8.31.11 | 8.30.11 | 8.30.10 | 8.31.10 | 8.31.9 | 8.30.9 | 8.30.8 | 8.31.8 |
GTX_DUAL:DRP1A | 8.31.23 | 8.30.23 | 8.30.22 | 8.31.22 | 8.31.21 | 8.30.21 | 8.30.20 | 8.31.20 | 8.31.19 | 8.30.19 | 8.30.18 | 8.31.18 | 8.31.17 | 8.30.17 | 8.30.16 | 8.31.16 |
GTX_DUAL:DRP1B | 8.31.31 | 8.30.31 | 8.30.30 | 8.31.30 | 8.31.29 | 8.30.29 | 8.30.28 | 8.31.28 | 8.31.27 | 8.30.27 | 8.30.26 | 8.31.26 | 8.31.25 | 8.30.25 | 8.30.24 | 8.31.24 |
GTX_DUAL:DRP1C | 8.31.39 | 8.30.39 | 8.30.38 | 8.31.38 | 8.31.37 | 8.30.37 | 8.30.36 | 8.31.36 | 8.31.35 | 8.30.35 | 8.30.34 | 8.31.34 | 8.31.33 | 8.30.33 | 8.30.32 | 8.31.32 |
GTX_DUAL:DRP1D | 8.31.47 | 8.30.47 | 8.30.46 | 8.31.46 | 8.31.45 | 8.30.45 | 8.30.44 | 8.31.44 | 8.31.43 | 8.30.43 | 8.30.42 | 8.31.42 | 8.31.41 | 8.30.41 | 8.30.40 | 8.31.40 |
GTX_DUAL:DRP1E | 8.31.55 | 8.30.55 | 8.30.54 | 8.31.54 | 8.31.53 | 8.30.53 | 8.30.52 | 8.31.52 | 8.31.51 | 8.30.51 | 8.30.50 | 8.31.50 | 8.31.49 | 8.30.49 | 8.30.48 | 8.31.48 |
GTX_DUAL:DRP1F | 8.31.63 | 8.30.63 | 8.30.62 | 8.31.62 | 8.31.61 | 8.30.61 | 8.30.60 | 8.31.60 | 8.31.59 | 8.30.59 | 8.30.58 | 8.31.58 | 8.31.57 | 8.30.57 | 8.30.56 | 8.31.56 |
GTX_DUAL:DRP20 | 9.31.7 | 9.30.7 | 9.30.6 | 9.31.6 | 9.31.5 | 9.30.5 | 9.30.4 | 9.31.4 | 9.31.3 | 9.30.3 | 9.30.2 | 9.31.2 | 9.31.1 | 9.30.1 | 9.30.0 | 9.31.0 |
GTX_DUAL:DRP21 | 9.31.15 | 9.30.15 | 9.30.14 | 9.31.14 | 9.31.13 | 9.30.13 | 9.30.12 | 9.31.12 | 9.31.11 | 9.30.11 | 9.30.10 | 9.31.10 | 9.31.9 | 9.30.9 | 9.30.8 | 9.31.8 |
GTX_DUAL:DRP22 | 9.31.23 | 9.30.23 | 9.30.22 | 9.31.22 | 9.31.21 | 9.30.21 | 9.30.20 | 9.31.20 | 9.31.19 | 9.30.19 | 9.30.18 | 9.31.18 | 9.31.17 | 9.30.17 | 9.30.16 | 9.31.16 |
GTX_DUAL:DRP23 | 9.31.31 | 9.30.31 | 9.30.30 | 9.31.30 | 9.31.29 | 9.30.29 | 9.30.28 | 9.31.28 | 9.31.27 | 9.30.27 | 9.30.26 | 9.31.26 | 9.31.25 | 9.30.25 | 9.30.24 | 9.31.24 |
GTX_DUAL:DRP24 | 9.31.39 | 9.30.39 | 9.30.38 | 9.31.38 | 9.31.37 | 9.30.37 | 9.30.36 | 9.31.36 | 9.31.35 | 9.30.35 | 9.30.34 | 9.31.34 | 9.31.33 | 9.30.33 | 9.30.32 | 9.31.32 |
GTX_DUAL:DRP25 | 9.31.47 | 9.30.47 | 9.30.46 | 9.31.46 | 9.31.45 | 9.30.45 | 9.30.44 | 9.31.44 | 9.31.43 | 9.30.43 | 9.30.42 | 9.31.42 | 9.31.41 | 9.30.41 | 9.30.40 | 9.31.40 |
GTX_DUAL:DRP26 | 9.31.55 | 9.30.55 | 9.30.54 | 9.31.54 | 9.31.53 | 9.30.53 | 9.30.52 | 9.31.52 | 9.31.51 | 9.30.51 | 9.30.50 | 9.31.50 | 9.31.49 | 9.30.49 | 9.30.48 | 9.31.48 |
GTX_DUAL:DRP27 | 9.31.63 | 9.30.63 | 9.30.62 | 9.31.62 | 9.31.61 | 9.30.61 | 9.30.60 | 9.31.60 | 9.31.59 | 9.30.59 | 9.30.58 | 9.31.58 | 9.31.57 | 9.30.57 | 9.30.56 | 9.31.56 |
GTX_DUAL:DRP28 | 10.31.7 | 10.30.7 | 10.30.6 | 10.31.6 | 10.31.5 | 10.30.5 | 10.30.4 | 10.31.4 | 10.31.3 | 10.30.3 | 10.30.2 | 10.31.2 | 10.31.1 | 10.30.1 | 10.30.0 | 10.31.0 |
GTX_DUAL:DRP29 | 10.31.15 | 10.30.15 | 10.30.14 | 10.31.14 | 10.31.13 | 10.30.13 | 10.30.12 | 10.31.12 | 10.31.11 | 10.30.11 | 10.30.10 | 10.31.10 | 10.31.9 | 10.30.9 | 10.30.8 | 10.31.8 |
GTX_DUAL:DRP2A | 10.31.23 | 10.30.23 | 10.30.22 | 10.31.22 | 10.31.21 | 10.30.21 | 10.30.20 | 10.31.20 | 10.31.19 | 10.30.19 | 10.30.18 | 10.31.18 | 10.31.17 | 10.30.17 | 10.30.16 | 10.31.16 |
GTX_DUAL:DRP2B | 10.31.31 | 10.30.31 | 10.30.30 | 10.31.30 | 10.31.29 | 10.30.29 | 10.30.28 | 10.31.28 | 10.31.27 | 10.30.27 | 10.30.26 | 10.31.26 | 10.31.25 | 10.30.25 | 10.30.24 | 10.31.24 |
GTX_DUAL:DRP2C | 10.31.39 | 10.30.39 | 10.30.38 | 10.31.38 | 10.31.37 | 10.30.37 | 10.30.36 | 10.31.36 | 10.31.35 | 10.30.35 | 10.30.34 | 10.31.34 | 10.31.33 | 10.30.33 | 10.30.32 | 10.31.32 |
GTX_DUAL:DRP2D | 10.31.47 | 10.30.47 | 10.30.46 | 10.31.46 | 10.31.45 | 10.30.45 | 10.30.44 | 10.31.44 | 10.31.43 | 10.30.43 | 10.30.42 | 10.31.42 | 10.31.41 | 10.30.41 | 10.30.40 | 10.31.40 |
GTX_DUAL:DRP2E | 10.31.55 | 10.30.55 | 10.30.54 | 10.31.54 | 10.31.53 | 10.30.53 | 10.30.52 | 10.31.52 | 10.31.51 | 10.30.51 | 10.30.50 | 10.31.50 | 10.31.49 | 10.30.49 | 10.30.48 | 10.31.48 |
GTX_DUAL:DRP2F | 10.31.63 | 10.30.63 | 10.30.62 | 10.31.62 | 10.31.61 | 10.30.61 | 10.30.60 | 10.31.60 | 10.31.59 | 10.30.59 | 10.30.58 | 10.31.58 | 10.31.57 | 10.30.57 | 10.30.56 | 10.31.56 |
GTX_DUAL:DRP30 | 11.31.7 | 11.30.7 | 11.30.6 | 11.31.6 | 11.31.5 | 11.30.5 | 11.30.4 | 11.31.4 | 11.31.3 | 11.30.3 | 11.30.2 | 11.31.2 | 11.31.1 | 11.30.1 | 11.30.0 | 11.31.0 |
GTX_DUAL:DRP31 | 11.31.15 | 11.30.15 | 11.30.14 | 11.31.14 | 11.31.13 | 11.30.13 | 11.30.12 | 11.31.12 | 11.31.11 | 11.30.11 | 11.30.10 | 11.31.10 | 11.31.9 | 11.30.9 | 11.30.8 | 11.31.8 |
GTX_DUAL:DRP32 | 11.31.23 | 11.30.23 | 11.30.22 | 11.31.22 | 11.31.21 | 11.30.21 | 11.30.20 | 11.31.20 | 11.31.19 | 11.30.19 | 11.30.18 | 11.31.18 | 11.31.17 | 11.30.17 | 11.30.16 | 11.31.16 |
GTX_DUAL:DRP33 | 11.31.31 | 11.30.31 | 11.30.30 | 11.31.30 | 11.31.29 | 11.30.29 | 11.30.28 | 11.31.28 | 11.31.27 | 11.30.27 | 11.30.26 | 11.31.26 | 11.31.25 | 11.30.25 | 11.30.24 | 11.31.24 |
GTX_DUAL:DRP34 | 11.31.39 | 11.30.39 | 11.30.38 | 11.31.38 | 11.31.37 | 11.30.37 | 11.30.36 | 11.31.36 | 11.31.35 | 11.30.35 | 11.30.34 | 11.31.34 | 11.31.33 | 11.30.33 | 11.30.32 | 11.31.32 |
GTX_DUAL:DRP35 | 11.31.47 | 11.30.47 | 11.30.46 | 11.31.46 | 11.31.45 | 11.30.45 | 11.30.44 | 11.31.44 | 11.31.43 | 11.30.43 | 11.30.42 | 11.31.42 | 11.31.41 | 11.30.41 | 11.30.40 | 11.31.40 |
GTX_DUAL:DRP36 | 11.31.55 | 11.30.55 | 11.30.54 | 11.31.54 | 11.31.53 | 11.30.53 | 11.30.52 | 11.31.52 | 11.31.51 | 11.30.51 | 11.30.50 | 11.31.50 | 11.31.49 | 11.30.49 | 11.30.48 | 11.31.48 |
GTX_DUAL:DRP37 | 11.31.63 | 11.30.63 | 11.30.62 | 11.31.62 | 11.31.61 | 11.30.61 | 11.30.60 | 11.31.60 | 11.31.59 | 11.30.59 | 11.30.58 | 11.31.58 | 11.31.57 | 11.30.57 | 11.30.56 | 11.31.56 |
GTX_DUAL:DRP38 | 12.31.7 | 12.30.7 | 12.30.6 | 12.31.6 | 12.31.5 | 12.30.5 | 12.30.4 | 12.31.4 | 12.31.3 | 12.30.3 | 12.30.2 | 12.31.2 | 12.31.1 | 12.30.1 | 12.30.0 | 12.31.0 |
GTX_DUAL:DRP39 | 12.31.15 | 12.30.15 | 12.30.14 | 12.31.14 | 12.31.13 | 12.30.13 | 12.30.12 | 12.31.12 | 12.31.11 | 12.30.11 | 12.30.10 | 12.31.10 | 12.31.9 | 12.30.9 | 12.30.8 | 12.31.8 |
GTX_DUAL:DRP3A | 12.31.23 | 12.30.23 | 12.30.22 | 12.31.22 | 12.31.21 | 12.30.21 | 12.30.20 | 12.31.20 | 12.31.19 | 12.30.19 | 12.30.18 | 12.31.18 | 12.31.17 | 12.30.17 | 12.30.16 | 12.31.16 |
GTX_DUAL:DRP3B | 12.31.31 | 12.30.31 | 12.30.30 | 12.31.30 | 12.31.29 | 12.30.29 | 12.30.28 | 12.31.28 | 12.31.27 | 12.30.27 | 12.30.26 | 12.31.26 | 12.31.25 | 12.30.25 | 12.30.24 | 12.31.24 |
GTX_DUAL:DRP3C | 12.31.39 | 12.30.39 | 12.30.38 | 12.31.38 | 12.31.37 | 12.30.37 | 12.30.36 | 12.31.36 | 12.31.35 | 12.30.35 | 12.30.34 | 12.31.34 | 12.31.33 | 12.30.33 | 12.30.32 | 12.31.32 |
GTX_DUAL:DRP3D | 12.31.47 | 12.30.47 | 12.30.46 | 12.31.46 | 12.31.45 | 12.30.45 | 12.30.44 | 12.31.44 | 12.31.43 | 12.30.43 | 12.30.42 | 12.31.42 | 12.31.41 | 12.30.41 | 12.30.40 | 12.31.40 |
GTX_DUAL:DRP3E | 12.31.55 | 12.30.55 | 12.30.54 | 12.31.54 | 12.31.53 | 12.30.53 | 12.30.52 | 12.31.52 | 12.31.51 | 12.30.51 | 12.30.50 | 12.31.50 | 12.31.49 | 12.30.49 | 12.30.48 | 12.31.48 |
GTX_DUAL:DRP3F | 12.31.63 | 12.30.63 | 12.30.62 | 12.31.62 | 12.31.61 | 12.30.61 | 12.30.60 | 12.31.60 | 12.31.59 | 12.30.59 | 12.30.58 | 12.31.58 | 12.31.57 | 12.30.57 | 12.30.56 | 12.31.56 |
GTX_DUAL:DRP40 | 13.31.7 | 13.30.7 | 13.30.6 | 13.31.6 | 13.31.5 | 13.30.5 | 13.30.4 | 13.31.4 | 13.31.3 | 13.30.3 | 13.30.2 | 13.31.2 | 13.31.1 | 13.30.1 | 13.30.0 | 13.31.0 |
GTX_DUAL:DRP41 | 13.31.15 | 13.30.15 | 13.30.14 | 13.31.14 | 13.31.13 | 13.30.13 | 13.30.12 | 13.31.12 | 13.31.11 | 13.30.11 | 13.30.10 | 13.31.10 | 13.31.9 | 13.30.9 | 13.30.8 | 13.31.8 |
GTX_DUAL:DRP42 | 13.31.23 | 13.30.23 | 13.30.22 | 13.31.22 | 13.31.21 | 13.30.21 | 13.30.20 | 13.31.20 | 13.31.19 | 13.30.19 | 13.30.18 | 13.31.18 | 13.31.17 | 13.30.17 | 13.30.16 | 13.31.16 |
GTX_DUAL:DRP43 | 13.31.31 | 13.30.31 | 13.30.30 | 13.31.30 | 13.31.29 | 13.30.29 | 13.30.28 | 13.31.28 | 13.31.27 | 13.30.27 | 13.30.26 | 13.31.26 | 13.31.25 | 13.30.25 | 13.30.24 | 13.31.24 |
GTX_DUAL:DRP44 | 13.31.39 | 13.30.39 | 13.30.38 | 13.31.38 | 13.31.37 | 13.30.37 | 13.30.36 | 13.31.36 | 13.31.35 | 13.30.35 | 13.30.34 | 13.31.34 | 13.31.33 | 13.30.33 | 13.30.32 | 13.31.32 |
GTX_DUAL:DRP45 | 13.31.47 | 13.30.47 | 13.30.46 | 13.31.46 | 13.31.45 | 13.30.45 | 13.30.44 | 13.31.44 | 13.31.43 | 13.30.43 | 13.30.42 | 13.31.42 | 13.31.41 | 13.30.41 | 13.30.40 | 13.31.40 |
GTX_DUAL:DRP46 | 13.31.55 | 13.30.55 | 13.30.54 | 13.31.54 | 13.31.53 | 13.30.53 | 13.30.52 | 13.31.52 | 13.31.51 | 13.30.51 | 13.30.50 | 13.31.50 | 13.31.49 | 13.30.49 | 13.30.48 | 13.31.48 |
GTX_DUAL:DRP47 | 13.31.63 | 13.30.63 | 13.30.62 | 13.31.62 | 13.31.61 | 13.30.61 | 13.30.60 | 13.31.60 | 13.31.59 | 13.30.59 | 13.30.58 | 13.31.58 | 13.31.57 | 13.30.57 | 13.30.56 | 13.31.56 |
GTX_DUAL:DRP48 | 14.31.7 | 14.30.7 | 14.30.6 | 14.31.6 | 14.31.5 | 14.30.5 | 14.30.4 | 14.31.4 | 14.31.3 | 14.30.3 | 14.30.2 | 14.31.2 | 14.31.1 | 14.30.1 | 14.30.0 | 14.31.0 |
GTX_DUAL:DRP49 | 14.31.15 | 14.30.15 | 14.30.14 | 14.31.14 | 14.31.13 | 14.30.13 | 14.30.12 | 14.31.12 | 14.31.11 | 14.30.11 | 14.30.10 | 14.31.10 | 14.31.9 | 14.30.9 | 14.30.8 | 14.31.8 |
GTX_DUAL:DRP4A | 14.31.23 | 14.30.23 | 14.30.22 | 14.31.22 | 14.31.21 | 14.30.21 | 14.30.20 | 14.31.20 | 14.31.19 | 14.30.19 | 14.30.18 | 14.31.18 | 14.31.17 | 14.30.17 | 14.30.16 | 14.31.16 |
GTX_DUAL:DRP4B | 14.31.31 | 14.30.31 | 14.30.30 | 14.31.30 | 14.31.29 | 14.30.29 | 14.30.28 | 14.31.28 | 14.31.27 | 14.30.27 | 14.30.26 | 14.31.26 | 14.31.25 | 14.30.25 | 14.30.24 | 14.31.24 |
GTX_DUAL:DRP4C | 14.31.39 | 14.30.39 | 14.30.38 | 14.31.38 | 14.31.37 | 14.30.37 | 14.30.36 | 14.31.36 | 14.31.35 | 14.30.35 | 14.30.34 | 14.31.34 | 14.31.33 | 14.30.33 | 14.30.32 | 14.31.32 |
GTX_DUAL:DRP4D | 14.31.47 | 14.30.47 | 14.30.46 | 14.31.46 | 14.31.45 | 14.30.45 | 14.30.44 | 14.31.44 | 14.31.43 | 14.30.43 | 14.30.42 | 14.31.42 | 14.31.41 | 14.30.41 | 14.30.40 | 14.31.40 |
GTX_DUAL:DRP4E | 14.31.55 | 14.30.55 | 14.30.54 | 14.31.54 | 14.31.53 | 14.30.53 | 14.30.52 | 14.31.52 | 14.31.51 | 14.30.51 | 14.30.50 | 14.31.50 | 14.31.49 | 14.30.49 | 14.30.48 | 14.31.48 |
GTX_DUAL:DRP4F | 14.31.63 | 14.30.63 | 14.30.62 | 14.31.62 | 14.31.61 | 14.30.61 | 14.30.60 | 14.31.60 | 14.31.59 | 14.30.59 | 14.30.58 | 14.31.58 | 14.31.57 | 14.30.57 | 14.30.56 | 14.31.56 |
non-inverted | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:MUX.CLKIN | 5.31.34 | 5.30.34 | 5.30.35 |
---|---|---|---|
GREFCLK | 0 | 0 | 0 |
CLKOUT_SOUTH_N | 0 | 0 | 1 |
CLKPN | 0 | 1 | 1 |
CLKOUT_NORTH_S | 1 | 0 | 1 |
GTX_DUAL:MUX.CLKOUT_NORTH | 5.31.36 |
---|---|
CLKOUT_NORTH_S | 0 |
CLKPN | 1 |
GTX_DUAL:MUX.CLKOUT_SOUTH | 5.31.35 |
---|---|
CLKOUT_SOUTH_N | 0 |
CLKPN | 1 |
GTX_DUAL:OOB_CLK_DIVIDER | 9.31.54 | 9.30.54 | 9.30.55 |
---|---|---|---|
1 | 0 | 0 | 0 |
2 | 0 | 0 | 1 |
4 | 0 | 1 | 0 |
6 | 0 | 1 | 1 |
8 | 1 | 0 | 0 |
10 | 1 | 0 | 1 |
12 | 1 | 1 | 0 |
14 | 1 | 1 | 1 |
GTX_DUAL:PLL_COM_CFG | 7.30.33 | 7.30.32 | 7.31.32 | 7.31.31 | 9.31.56 | 9.30.56 | 9.30.57 | 9.31.57 | 9.31.58 | 9.30.58 | 9.30.59 | 9.31.59 | 9.31.60 | 9.30.60 | 9.30.61 | 9.31.61 | 9.31.62 | 9.30.62 | 9.30.63 | 9.31.63 | 10.31.0 | 10.30.0 | 10.30.1 | 10.31.1 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
non-inverted | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PLL_CP_CFG | 10.31.2 | 10.30.2 | 10.30.3 | 10.31.3 | 10.31.4 | 10.30.4 | 10.30.5 | 10.31.5 |
---|---|---|---|---|---|---|---|---|
GTX_DUAL:TRANS_TIME_NON_P2_0 | 12.31.46 | 12.31.45 | 12.30.45 | 12.30.44 | 12.31.44 | 12.31.43 | 12.30.43 | 12.30.42 |
GTX_DUAL:TRANS_TIME_NON_P2_1 | 7.31.17 | 7.31.18 | 7.30.18 | 7.30.19 | 7.31.19 | 7.31.20 | 7.30.20 | 7.30.21 |
non-inverted | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PLL_DIVSEL_FB | 10.30.7 | 10.31.7 | 10.31.8 | 10.31.6 |
---|---|---|---|---|
2 | 0 | 0 | 0 | 0 |
1 | 0 | 0 | 0 | 1 |
3 | 0 | 0 | 1 | 0 |
4 | 0 | 1 | 0 | 0 |
5 | 0 | 1 | 1 | 0 |
8 | 1 | 1 | 0 | 0 |
10 | 1 | 1 | 1 | 0 |
GTX_DUAL:PLL_DIVSEL_REF | 5.31.38 | 5.31.37 | 5.30.37 | 5.30.36 | 5.30.38 |
---|---|---|---|---|---|
2 | 0 | 0 | 0 | 0 | 0 |
1 | 0 | 0 | 0 | 0 | 1 |
3 | 0 | 0 | 0 | 1 | 0 |
4 | 0 | 0 | 1 | 0 | 0 |
5 | 0 | 0 | 1 | 1 | 0 |
6 | 0 | 1 | 0 | 1 | 0 |
8 | 0 | 1 | 1 | 0 | 0 |
10 | 0 | 1 | 1 | 1 | 0 |
12 | 1 | 1 | 0 | 1 | 0 |
16 | 1 | 1 | 1 | 0 | 0 |
20 | 1 | 1 | 1 | 1 | 0 |
GTX_DUAL:PLL_RXDIVSEL_OUT_0 | 13.31.49 | 13.30.49 |
---|---|---|
GTX_DUAL:PLL_RXDIVSEL_OUT_1 | 6.31.15 | 6.31.16 |
GTX_DUAL:PLL_TXDIVSEL_OUT_0 | 13.31.48 | 13.31.47 |
GTX_DUAL:PLL_TXDIVSEL_OUT_1 | 5.31.41 | 5.31.42 |
1 | 0 | 0 |
2 | 0 | 1 |
4 | 1 | 0 |
GTX_DUAL:PMA_CDR_SCAN_0 | 13.30.47 | 13.30.46 | 13.31.46 | 13.31.45 | 13.30.45 | 13.30.44 | 13.31.44 | 13.31.43 | 13.30.43 | 13.30.42 | 13.31.42 | 13.31.41 | 13.30.41 | 13.30.40 | 13.31.40 | 13.31.39 | 13.30.39 | 13.30.38 | 13.31.38 | 13.31.37 | 13.30.37 | 13.30.36 | 13.31.36 | 13.31.35 | 13.30.35 | 13.30.34 | 13.31.34 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:PMA_CDR_SCAN_1 | 6.30.16 | 6.30.17 | 6.31.17 | 6.31.18 | 6.30.18 | 6.30.19 | 6.31.19 | 6.31.20 | 6.30.20 | 6.30.21 | 6.31.21 | 6.31.22 | 6.30.22 | 6.30.23 | 6.31.23 | 6.31.24 | 6.30.24 | 6.30.25 | 6.31.25 | 6.31.26 | 6.30.26 | 6.30.27 | 6.31.27 | 6.31.28 | 6.30.28 | 6.30.29 | 6.31.29 |
non-inverted | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PMA_COM_CFG | 9.30.45 | 10.30.19 | 9.30.44 | 10.31.19 | 9.30.47 | 9.31.45 | 9.30.46 | 9.31.46 | 10.30.17 | 10.30.18 | 10.31.17 | 10.31.18 | 9.31.48 | 10.30.16 | 9.31.47 | 10.31.16 | 9.30.40 | 10.30.23 | 9.30.41 | 10.31.23 | 9.31.52 | 10.31.12 | 9.31.51 | 10.30.12 | 9.30.51 | 10.30.13 | 9.30.50 | 10.31.13 | 9.31.49 | 10.31.14 | 9.31.50 | 10.30.14 | 9.30.49 | 10.31.15 | 9.30.48 | 10.30.15 | 10.31.11 | 14.30.19 | 14.30.18 | 14.31.18 | 14.31.17 | 14.30.17 | 5.30.44 | 5.30.45 | 5.31.45 | 5.31.46 | 5.30.46 | 5.31.44 | 14.31.19 | 12.30.19 | 9.31.34 | 9.30.34 | 9.30.35 | 9.31.35 | 9.31.36 | 9.30.36 | 9.30.37 | 9.31.37 | 9.31.38 | 10.31.29 | 7.30.46 | 10.31.25 | 10.31.26 | 10.30.26 | 10.31.27 | 10.31.28 | 10.30.28 | 10.30.29 | 10.30.27 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
non-inverted | [68] | [67] | [66] | [65] | [64] | [63] | [62] | [61] | [60] | [59] | [58] | [57] | [56] | [55] | [54] | [53] | [52] | [51] | [50] | [49] | [48] | [47] | [46] | [45] | [44] | [43] | [42] | [41] | [40] | [39] | [38] | [37] | [36] | [35] | [34] | [33] | [32] | [31] | [30] | [29] | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PMA_RXSYNC_CFG_0 | 14.31.31 | 14.30.31 | 14.30.30 | 14.31.30 | 14.31.29 | 14.30.29 | 14.30.28 |
---|---|---|---|---|---|---|---|
GTX_DUAL:PMA_RXSYNC_CFG_1 | 5.31.0 | 5.30.0 | 5.30.1 | 5.31.1 | 5.31.2 | 5.30.2 | 5.30.3 |
non-inverted | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PMA_RX_CFG_0 | 5.31.49 | 5.30.59 | 14.31.12 | 14.31.11 | 14.30.11 | 14.30.10 | 14.31.10 | 14.31.9 | 14.30.9 | 14.30.8 | 14.31.8 | 14.31.7 | 5.30.49 | 5.30.51 | 14.31.4 | 14.31.3 | 14.30.3 | 14.30.2 | 14.31.2 | 14.30.6 | 14.31.6 | 14.31.5 | 14.30.5 | 5.31.50 | 5.30.50 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:PMA_RX_CFG_1 | 14.31.14 | 14.30.4 | 5.31.51 | 5.31.52 | 5.30.52 | 5.30.53 | 5.31.53 | 5.31.54 | 5.30.54 | 5.30.55 | 5.31.55 | 5.31.56 | 14.30.14 | 14.30.12 | 5.31.59 | 5.31.60 | 5.30.60 | 5.30.61 | 5.31.61 | 5.30.57 | 5.31.57 | 5.31.58 | 5.30.58 | 14.31.13 | 14.30.13 |
non-inverted | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:PMA_TX_CFG_0 | 14.30.60 | 14.31.60 | 14.31.59 | 14.30.59 | 14.30.58 | 14.31.58 | 14.31.57 | 14.30.57 | 14.30.56 | 14.31.56 | 14.31.55 | 14.30.55 | 14.30.54 | 14.31.54 | 14.31.53 | 14.30.53 | 14.30.52 | 14.31.52 | 14.31.51 | 14.30.51 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:PMA_TX_CFG_1 | 5.31.3 | 5.31.4 | 5.30.4 | 5.30.5 | 5.31.5 | 5.31.6 | 5.30.6 | 5.30.7 | 5.31.7 | 5.31.8 | 5.30.8 | 5.30.9 | 5.31.9 | 5.31.10 | 5.30.10 | 5.30.11 | 5.31.11 | 5.31.12 | 5.30.12 | 5.30.13 |
non-inverted | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:RX_LOS_INVALID_INCR_0 | 13.30.16 | 13.31.16 | 13.31.15 |
---|---|---|---|
GTX_DUAL:RX_LOS_INVALID_INCR_1 | 6.30.47 | 6.31.47 | 6.31.48 |
1 | 0 | 0 | 0 |
2 | 0 | 0 | 1 |
4 | 0 | 1 | 0 |
8 | 0 | 1 | 1 |
16 | 1 | 0 | 0 |
32 | 1 | 0 | 1 |
64 | 1 | 1 | 0 |
128 | 1 | 1 | 1 |
GTX_DUAL:RX_LOS_THRESHOLD_0 | 13.30.14 | 13.31.14 | 13.31.13 |
---|---|---|---|
GTX_DUAL:RX_LOS_THRESHOLD_1 | 6.30.49 | 6.31.49 | 6.31.50 |
4 | 0 | 0 | 0 |
8 | 0 | 0 | 1 |
16 | 0 | 1 | 0 |
32 | 0 | 1 | 1 |
64 | 1 | 0 | 0 |
128 | 1 | 0 | 1 |
256 | 1 | 1 | 0 |
512 | 1 | 1 | 1 |
GTX_DUAL:RX_SLIDE_MODE_0 | 13.30.13 |
---|---|
GTX_DUAL:RX_SLIDE_MODE_1 | 6.30.50 |
PCS | 0 |
PMA | 1 |
GTX_DUAL:RX_STATUS_FMT_0 | 13.30.12 |
---|---|
GTX_DUAL:RX_STATUS_FMT_1 | 6.30.51 |
PCIE | 0 |
SATA | 1 |
GTX_DUAL:RX_XCLK_SEL_0 | 13.31.12 |
---|---|
GTX_DUAL:RX_XCLK_SEL_1 | 6.31.51 |
RXREC | 0 |
RXUSR | 1 |
GTX_DUAL:TERMINATION_IMP_0 | 12.30.54 |
---|---|
GTX_DUAL:TERMINATION_IMP_1 | 7.30.9 |
50 | 0 |
75 | 1 |
GTX_DUAL:TRANS_TIME_FROM_P2_0 | 12.31.54 | 12.31.53 | 12.30.53 | 12.30.52 | 12.31.52 | 12.31.51 | 12.30.51 | 12.30.50 | 12.31.50 | 12.31.49 | 12.30.49 | 12.30.48 |
---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:TRANS_TIME_FROM_P2_1 | 7.31.9 | 7.31.10 | 7.30.10 | 7.30.11 | 7.31.11 | 7.31.12 | 7.30.12 | 7.30.13 | 7.31.13 | 7.31.14 | 7.30.14 | 7.30.15 |
non-inverted | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:TX_DETECT_RX_CFG_0 | 12.31.29 | 12.30.29 | 12.30.28 | 12.31.28 | 12.31.27 | 12.30.27 | 12.30.26 | 12.31.26 | 12.31.25 | 12.30.25 | 12.30.24 | 12.31.24 | 12.31.23 | 12.30.23 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
GTX_DUAL:TX_DETECT_RX_CFG_1 | 7.31.34 | 7.30.34 | 7.30.35 | 7.31.35 | 7.31.36 | 7.30.36 | 7.30.37 | 7.31.37 | 7.31.38 | 7.30.38 | 7.30.39 | 7.31.39 | 7.31.40 | 7.30.40 |
non-inverted | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
GTX_DUAL:TX_XCLK_SEL_0 | 12.31.20 |
---|---|
GTX_DUAL:TX_XCLK_SEL_1 | 7.31.43 |
TXOUT | 0 |
TXUSR | 1 |