Keyboard shortcuts

Press ← or → to navigate between chapters

Press ? to show this help

Press Esc to hide this help

Clock row buffers

Tile CLK_HROW

Cells: 2

Bel BUFHCE_W0

virtex7 CLK_HROW bel BUFHCE_W0
PinDirectionWires
CEinputTCELL0:IMUX.IMUX6

Bel BUFHCE_W1

virtex7 CLK_HROW bel BUFHCE_W1
PinDirectionWires
CEinputTCELL0:IMUX.IMUX7

Bel BUFHCE_W2

virtex7 CLK_HROW bel BUFHCE_W2
PinDirectionWires
CEinputTCELL0:IMUX.IMUX8

Bel BUFHCE_W3

virtex7 CLK_HROW bel BUFHCE_W3
PinDirectionWires
CEinputTCELL0:IMUX.IMUX9

Bel BUFHCE_W4

virtex7 CLK_HROW bel BUFHCE_W4
PinDirectionWires
CEinputTCELL0:IMUX.IMUX10

Bel BUFHCE_W5

virtex7 CLK_HROW bel BUFHCE_W5
PinDirectionWires
CEinputTCELL0:IMUX.IMUX11

Bel BUFHCE_W6

virtex7 CLK_HROW bel BUFHCE_W6
PinDirectionWires
CEinputTCELL1:IMUX.IMUX0

Bel BUFHCE_W7

virtex7 CLK_HROW bel BUFHCE_W7
PinDirectionWires
CEinputTCELL1:IMUX.IMUX1

Bel BUFHCE_W8

virtex7 CLK_HROW bel BUFHCE_W8
PinDirectionWires
CEinputTCELL1:IMUX.IMUX2

Bel BUFHCE_W9

virtex7 CLK_HROW bel BUFHCE_W9
PinDirectionWires
CEinputTCELL1:IMUX.IMUX3

Bel BUFHCE_W10

virtex7 CLK_HROW bel BUFHCE_W10
PinDirectionWires
CEinputTCELL1:IMUX.IMUX4

Bel BUFHCE_W11

virtex7 CLK_HROW bel BUFHCE_W11
PinDirectionWires
CEinputTCELL1:IMUX.IMUX5

Bel BUFHCE_E0

virtex7 CLK_HROW bel BUFHCE_E0
PinDirectionWires
CEinputTCELL0:IMUX.IMUX0

Bel BUFHCE_E1

virtex7 CLK_HROW bel BUFHCE_E1
PinDirectionWires
CEinputTCELL0:IMUX.IMUX1

Bel BUFHCE_E2

virtex7 CLK_HROW bel BUFHCE_E2
PinDirectionWires
CEinputTCELL0:IMUX.IMUX2

Bel BUFHCE_E3

virtex7 CLK_HROW bel BUFHCE_E3
PinDirectionWires
CEinputTCELL0:IMUX.IMUX3

Bel BUFHCE_E4

virtex7 CLK_HROW bel BUFHCE_E4
PinDirectionWires
CEinputTCELL0:IMUX.IMUX4

Bel BUFHCE_E5

virtex7 CLK_HROW bel BUFHCE_E5
PinDirectionWires
CEinputTCELL0:IMUX.IMUX5

Bel BUFHCE_E6

virtex7 CLK_HROW bel BUFHCE_E6
PinDirectionWires
CEinputTCELL1:IMUX.IMUX6

Bel BUFHCE_E7

virtex7 CLK_HROW bel BUFHCE_E7
PinDirectionWires
CEinputTCELL1:IMUX.IMUX7

Bel BUFHCE_E8

virtex7 CLK_HROW bel BUFHCE_E8
PinDirectionWires
CEinputTCELL1:IMUX.IMUX8

Bel BUFHCE_E9

virtex7 CLK_HROW bel BUFHCE_E9
PinDirectionWires
CEinputTCELL1:IMUX.IMUX9

Bel BUFHCE_E10

virtex7 CLK_HROW bel BUFHCE_E10
PinDirectionWires
CEinputTCELL1:IMUX.IMUX10

Bel BUFHCE_E11

virtex7 CLK_HROW bel BUFHCE_E11
PinDirectionWires
CEinputTCELL1:IMUX.IMUX11

Bel CLK_HROW

virtex7 CLK_HROW bel CLK_HROW
PinDirectionWires
BUFHCE_CKINT0inputTCELL0:IMUX.CLK0
BUFHCE_CKINT1inputTCELL0:IMUX.CLK1
BUFHCE_CKINT2inputTCELL1:IMUX.CLK0
BUFHCE_CKINT3inputTCELL1:IMUX.CLK1

Bel GCLK_TEST_BUF_HROW_GCLK0

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK0
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK1

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK1
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK2

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK2
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK3

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK3
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK4

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK4
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK5

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK5
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK6

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK6
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK7

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK7
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK8

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK8
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK9

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK9
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK10

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK10
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK11

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK11
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK12

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK12
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK13

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK13
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK14

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK14
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK15

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK15
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK16

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK16
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK17

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK17
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK18

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK18
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK19

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK19
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK20

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK20
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK21

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK21
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK22

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK22
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK23

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK23
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK24

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK24
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK25

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK25
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK26

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK26
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK27

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK27
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK28

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK28
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK29

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK29
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK30

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK30
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_GCLK31

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_GCLK31
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_BUFH_W

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_BUFH_W
PinDirectionWires

Bel GCLK_TEST_BUF_HROW_BUFH_E

virtex7 CLK_HROW bel GCLK_TEST_BUF_HROW_BUFH_E
PinDirectionWires

Bel wires

virtex7 CLK_HROW bel wires
WirePins
TCELL0:IMUX.CLK0CLK_HROW.BUFHCE_CKINT0
TCELL0:IMUX.CLK1CLK_HROW.BUFHCE_CKINT1
TCELL0:IMUX.IMUX0BUFHCE_E0.CE
TCELL0:IMUX.IMUX1BUFHCE_E1.CE
TCELL0:IMUX.IMUX2BUFHCE_E2.CE
TCELL0:IMUX.IMUX3BUFHCE_E3.CE
TCELL0:IMUX.IMUX4BUFHCE_E4.CE
TCELL0:IMUX.IMUX5BUFHCE_E5.CE
TCELL0:IMUX.IMUX6BUFHCE_W0.CE
TCELL0:IMUX.IMUX7BUFHCE_W1.CE
TCELL0:IMUX.IMUX8BUFHCE_W2.CE
TCELL0:IMUX.IMUX9BUFHCE_W3.CE
TCELL0:IMUX.IMUX10BUFHCE_W4.CE
TCELL0:IMUX.IMUX11BUFHCE_W5.CE
TCELL1:IMUX.CLK0CLK_HROW.BUFHCE_CKINT2
TCELL1:IMUX.CLK1CLK_HROW.BUFHCE_CKINT3
TCELL1:IMUX.IMUX0BUFHCE_W6.CE
TCELL1:IMUX.IMUX1BUFHCE_W7.CE
TCELL1:IMUX.IMUX2BUFHCE_W8.CE
TCELL1:IMUX.IMUX3BUFHCE_W9.CE
TCELL1:IMUX.IMUX4BUFHCE_W10.CE
TCELL1:IMUX.IMUX5BUFHCE_W11.CE
TCELL1:IMUX.IMUX6BUFHCE_E6.CE
TCELL1:IMUX.IMUX7BUFHCE_E7.CE
TCELL1:IMUX.IMUX8BUFHCE_E8.CE
TCELL1:IMUX.IMUX9BUFHCE_E9.CE
TCELL1:IMUX.IMUX10BUFHCE_E10.CE
TCELL1:IMUX.IMUX11BUFHCE_E11.CE

Bitstream

virtex7 CLK_HROW bittile 0
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[6] CLK_HROW:MUX.CASCO4[7] CLK_HROW:MUX.CASCO5[6] CLK_HROW:MUX.CASCO5[7]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[12] CLK_HROW:MUX.CASCO4[13] CLK_HROW:MUX.CASCO5[12] CLK_HROW:MUX.CASCO5[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[10] CLK_HROW:MUX.CASCO4[11] CLK_HROW:MUX.CASCO5[10] CLK_HROW:MUX.CASCO5[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[8] CLK_HROW:MUX.CASCO4[9] CLK_HROW:MUX.CASCO5[8] CLK_HROW:MUX.CASCO5[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
58 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[3] - CLK_HROW:MUX.CASCO5[3] -
57 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[4] CLK_HROW:MUX.CASCO4[5] CLK_HROW:MUX.CASCO5[4] CLK_HROW:MUX.CASCO5[5]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[2] CLK_HROW:MUX.CASCO4[1] CLK_HROW:MUX.CASCO5[2] CLK_HROW:MUX.CASCO5[1]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
53 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST4 - CLK_HROW:INV.GCLK_TEST5 -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO4[0] CLK_HROW:ENABLE.GCLK_TEST4 CLK_HROW:MUX.CASCO5[0] CLK_HROW:ENABLE.GCLK_TEST5
51 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[6] CLK_HROW:MUX.CASCO2[7] CLK_HROW:MUX.CASCO3[6] CLK_HROW:MUX.CASCO3[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[12] CLK_HROW:MUX.CASCO2[13] CLK_HROW:MUX.CASCO3[12] CLK_HROW:MUX.CASCO3[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[10] CLK_HROW:MUX.CASCO2[11] CLK_HROW:MUX.CASCO3[10] CLK_HROW:MUX.CASCO3[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[8] CLK_HROW:MUX.CASCO2[9] CLK_HROW:MUX.CASCO3[8] CLK_HROW:MUX.CASCO3[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
42 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[3] - CLK_HROW:MUX.CASCO3[3] -
41 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[4] CLK_HROW:MUX.CASCO2[5] CLK_HROW:MUX.CASCO3[4] CLK_HROW:MUX.CASCO3[5]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[2] CLK_HROW:MUX.CASCO2[1] CLK_HROW:MUX.CASCO3[2] CLK_HROW:MUX.CASCO3[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
37 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST2 - CLK_HROW:INV.GCLK_TEST3 -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO2[0] CLK_HROW:ENABLE.GCLK_TEST2 CLK_HROW:MUX.CASCO3[0] CLK_HROW:ENABLE.GCLK_TEST3
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[6] CLK_HROW:MUX.CASCO0[7] CLK_HROW:MUX.CASCO1[6] CLK_HROW:MUX.CASCO1[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[12] CLK_HROW:MUX.CASCO0[13] CLK_HROW:MUX.CASCO1[12] CLK_HROW:MUX.CASCO1[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[10] CLK_HROW:MUX.CASCO0[11] CLK_HROW:MUX.CASCO1[10] CLK_HROW:MUX.CASCO1[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[8] CLK_HROW:MUX.CASCO0[9] CLK_HROW:MUX.CASCO1[8] CLK_HROW:MUX.CASCO1[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
26 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[3] - CLK_HROW:MUX.CASCO1[3] -
25 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[4] CLK_HROW:MUX.CASCO0[5] CLK_HROW:MUX.CASCO1[4] CLK_HROW:MUX.CASCO1[5]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[2] CLK_HROW:MUX.CASCO0[1] CLK_HROW:MUX.CASCO1[2] CLK_HROW:MUX.CASCO1[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
21 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST0 - CLK_HROW:INV.GCLK_TEST1 -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO0[0] CLK_HROW:ENABLE.GCLK_TEST0 CLK_HROW:MUX.CASCO1[0] CLK_HROW:ENABLE.GCLK_TEST1
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 1
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[6] CLK_HROW:MUX.CASCO12[7] CLK_HROW:MUX.CASCO13[6] CLK_HROW:MUX.CASCO13[7]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[12] CLK_HROW:MUX.CASCO12[13] CLK_HROW:MUX.CASCO13[12] CLK_HROW:MUX.CASCO13[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[10] CLK_HROW:MUX.CASCO12[11] CLK_HROW:MUX.CASCO13[10] CLK_HROW:MUX.CASCO13[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[8] CLK_HROW:MUX.CASCO12[9] CLK_HROW:MUX.CASCO13[8] CLK_HROW:MUX.CASCO13[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
58 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[3] - CLK_HROW:MUX.CASCO13[3] -
57 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[4] CLK_HROW:MUX.CASCO12[5] CLK_HROW:MUX.CASCO13[4] CLK_HROW:MUX.CASCO13[5]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[2] CLK_HROW:MUX.CASCO12[1] CLK_HROW:MUX.CASCO13[2] CLK_HROW:MUX.CASCO13[1]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
53 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST12 - CLK_HROW:INV.GCLK_TEST13 -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO12[0] CLK_HROW:ENABLE.GCLK_TEST12 CLK_HROW:MUX.CASCO13[0] CLK_HROW:ENABLE.GCLK_TEST13
51 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[6] CLK_HROW:MUX.CASCO10[7] CLK_HROW:MUX.CASCO11[6] CLK_HROW:MUX.CASCO11[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[12] CLK_HROW:MUX.CASCO10[13] CLK_HROW:MUX.CASCO11[12] CLK_HROW:MUX.CASCO11[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[10] CLK_HROW:MUX.CASCO10[11] CLK_HROW:MUX.CASCO11[10] CLK_HROW:MUX.CASCO11[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[8] CLK_HROW:MUX.CASCO10[9] CLK_HROW:MUX.CASCO11[8] CLK_HROW:MUX.CASCO11[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
42 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[3] - CLK_HROW:MUX.CASCO11[3] -
41 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[4] CLK_HROW:MUX.CASCO10[5] CLK_HROW:MUX.CASCO11[4] CLK_HROW:MUX.CASCO11[5]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[2] CLK_HROW:MUX.CASCO10[1] CLK_HROW:MUX.CASCO11[2] CLK_HROW:MUX.CASCO11[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
37 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST10 - CLK_HROW:INV.GCLK_TEST11 -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO10[0] CLK_HROW:ENABLE.GCLK_TEST10 CLK_HROW:MUX.CASCO11[0] CLK_HROW:ENABLE.GCLK_TEST11
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[6] CLK_HROW:MUX.CASCO8[7] CLK_HROW:MUX.CASCO9[6] CLK_HROW:MUX.CASCO9[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[12] CLK_HROW:MUX.CASCO8[13] CLK_HROW:MUX.CASCO9[12] CLK_HROW:MUX.CASCO9[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[10] CLK_HROW:MUX.CASCO8[11] CLK_HROW:MUX.CASCO9[10] CLK_HROW:MUX.CASCO9[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[8] CLK_HROW:MUX.CASCO8[9] CLK_HROW:MUX.CASCO9[8] CLK_HROW:MUX.CASCO9[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
26 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[3] - CLK_HROW:MUX.CASCO9[3] -
25 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[4] CLK_HROW:MUX.CASCO8[5] CLK_HROW:MUX.CASCO9[4] CLK_HROW:MUX.CASCO9[5]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[2] CLK_HROW:MUX.CASCO8[1] CLK_HROW:MUX.CASCO9[2] CLK_HROW:MUX.CASCO9[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
21 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST8 - CLK_HROW:INV.GCLK_TEST9 -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO8[0] CLK_HROW:ENABLE.GCLK_TEST8 CLK_HROW:MUX.CASCO9[0] CLK_HROW:ENABLE.GCLK_TEST9
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[6] CLK_HROW:MUX.CASCO6[7] CLK_HROW:MUX.CASCO7[6] CLK_HROW:MUX.CASCO7[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[12] CLK_HROW:MUX.CASCO6[13] CLK_HROW:MUX.CASCO7[12] CLK_HROW:MUX.CASCO7[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[10] CLK_HROW:MUX.CASCO6[11] CLK_HROW:MUX.CASCO7[10] CLK_HROW:MUX.CASCO7[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[8] CLK_HROW:MUX.CASCO6[9] CLK_HROW:MUX.CASCO7[8] CLK_HROW:MUX.CASCO7[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[3] - CLK_HROW:MUX.CASCO7[3] -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[4] CLK_HROW:MUX.CASCO6[5] CLK_HROW:MUX.CASCO7[4] CLK_HROW:MUX.CASCO7[5]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[2] CLK_HROW:MUX.CASCO6[1] CLK_HROW:MUX.CASCO7[2] CLK_HROW:MUX.CASCO7[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST6 - CLK_HROW:INV.GCLK_TEST7 -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO6[0] CLK_HROW:ENABLE.GCLK_TEST6 CLK_HROW:MUX.CASCO7[0] CLK_HROW:ENABLE.GCLK_TEST7
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 2
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[14] BUFHCE_E2:MUX.I[15] BUFHCE_E3:MUX.I[14] BUFHCE_E3:MUX.I[15]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[12] BUFHCE_E2:MUX.I[13] BUFHCE_E3:MUX.I[12] BUFHCE_E3:MUX.I[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[10] BUFHCE_E2:MUX.I[11] BUFHCE_E3:MUX.I[10] BUFHCE_E3:MUX.I[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[8] BUFHCE_E2:MUX.I[9] BUFHCE_E3:MUX.I[8] BUFHCE_E3:MUX.I[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[1] BUFHCE_E2:MUX.I[0] BUFHCE_E3:MUX.I[1] BUFHCE_E3:MUX.I[0]
58 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[3] BUFHCE_E2:MUX.I[2] BUFHCE_E3:MUX.I[3] BUFHCE_E3:MUX.I[2]
57 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[6] BUFHCE_E2:MUX.I[7] BUFHCE_E3:MUX.I[6] BUFHCE_E3:MUX.I[7]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:MUX.I[4] BUFHCE_E2:MUX.I[5] BUFHCE_E3:MUX.I[4] BUFHCE_E3:MUX.I[5]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:ENABLE - BUFHCE_E3:ENABLE
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:CE_TYPE[0] - BUFHCE_E3:CE_TYPE[0]
53 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
51 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E2:INIT_OUT ~BUFHCE_E2:INV.CE BUFHCE_E3:INIT_OUT ~BUFHCE_E3:INV.CE
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[14] BUFHCE_E0:MUX.I[15] BUFHCE_E1:MUX.I[14] BUFHCE_E1:MUX.I[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[12] BUFHCE_E0:MUX.I[13] BUFHCE_E1:MUX.I[12] BUFHCE_E1:MUX.I[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[10] BUFHCE_E0:MUX.I[11] BUFHCE_E1:MUX.I[10] BUFHCE_E1:MUX.I[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[8] BUFHCE_E0:MUX.I[9] BUFHCE_E1:MUX.I[8] BUFHCE_E1:MUX.I[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[1] BUFHCE_E0:MUX.I[0] BUFHCE_E1:MUX.I[1] BUFHCE_E1:MUX.I[0]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[3] BUFHCE_E0:MUX.I[2] BUFHCE_E1:MUX.I[3] BUFHCE_E1:MUX.I[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[6] BUFHCE_E0:MUX.I[7] BUFHCE_E1:MUX.I[6] BUFHCE_E1:MUX.I[7]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:MUX.I[4] BUFHCE_E0:MUX.I[5] BUFHCE_E1:MUX.I[4] BUFHCE_E1:MUX.I[5]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:ENABLE - BUFHCE_E1:ENABLE
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:CE_TYPE[0] - BUFHCE_E1:CE_TYPE[0]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
35 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E0:INIT_OUT ~BUFHCE_E0:INV.CE BUFHCE_E1:INIT_OUT ~BUFHCE_E1:INV.CE
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[6] CLK_HROW:MUX.CASCO14[7] CLK_HROW:MUX.CASCO15[6] CLK_HROW:MUX.CASCO15[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[12] CLK_HROW:MUX.CASCO14[13] CLK_HROW:MUX.CASCO15[12] CLK_HROW:MUX.CASCO15[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[10] CLK_HROW:MUX.CASCO14[11] CLK_HROW:MUX.CASCO15[10] CLK_HROW:MUX.CASCO15[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[8] CLK_HROW:MUX.CASCO14[9] CLK_HROW:MUX.CASCO15[8] CLK_HROW:MUX.CASCO15[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[3] - CLK_HROW:MUX.CASCO15[3] -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[4] CLK_HROW:MUX.CASCO14[5] CLK_HROW:MUX.CASCO15[4] CLK_HROW:MUX.CASCO15[5]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[2] CLK_HROW:MUX.CASCO14[1] CLK_HROW:MUX.CASCO15[2] CLK_HROW:MUX.CASCO15[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST14 - CLK_HROW:INV.GCLK_TEST15 -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO14[0] CLK_HROW:ENABLE.GCLK_TEST14 CLK_HROW:MUX.CASCO15[0] CLK_HROW:ENABLE.GCLK_TEST15
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 3
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[14] BUFHCE_W4:MUX.I[15] BUFHCE_W5:MUX.I[14] BUFHCE_W5:MUX.I[15]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[12] BUFHCE_W4:MUX.I[13] BUFHCE_W5:MUX.I[12] BUFHCE_W5:MUX.I[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[10] BUFHCE_W4:MUX.I[11] BUFHCE_W5:MUX.I[10] BUFHCE_W5:MUX.I[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[8] BUFHCE_W4:MUX.I[9] BUFHCE_W5:MUX.I[8] BUFHCE_W5:MUX.I[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[1] BUFHCE_W4:MUX.I[0] BUFHCE_W5:MUX.I[1] BUFHCE_W5:MUX.I[0]
58 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[3] BUFHCE_W4:MUX.I[2] BUFHCE_W5:MUX.I[3] BUFHCE_W5:MUX.I[2]
57 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[6] BUFHCE_W4:MUX.I[7] BUFHCE_W5:MUX.I[6] BUFHCE_W5:MUX.I[7]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:MUX.I[4] BUFHCE_W4:MUX.I[5] BUFHCE_W5:MUX.I[4] BUFHCE_W5:MUX.I[5]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:ENABLE - BUFHCE_W5:ENABLE
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:CE_TYPE[0] - BUFHCE_W5:CE_TYPE[0]
53 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
51 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W4:INIT_OUT ~BUFHCE_W4:INV.CE BUFHCE_W5:INIT_OUT ~BUFHCE_W5:INV.CE
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN12_L CLK_HROW:ENABLE.HIN13_L CLK_HROW:ENABLE.HIN12_R CLK_HROW:ENABLE.HIN13_R
48 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN10_L CLK_HROW:ENABLE.HIN11_L CLK_HROW:ENABLE.HIN10_R CLK_HROW:ENABLE.HIN11_R
47 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[14] BUFHCE_W2:MUX.I[15] BUFHCE_W3:MUX.I[14] BUFHCE_W3:MUX.I[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[12] BUFHCE_W2:MUX.I[13] BUFHCE_W3:MUX.I[12] BUFHCE_W3:MUX.I[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[10] BUFHCE_W2:MUX.I[11] BUFHCE_W3:MUX.I[10] BUFHCE_W3:MUX.I[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[8] BUFHCE_W2:MUX.I[9] BUFHCE_W3:MUX.I[8] BUFHCE_W3:MUX.I[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[1] BUFHCE_W2:MUX.I[0] BUFHCE_W3:MUX.I[1] BUFHCE_W3:MUX.I[0]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[3] BUFHCE_W2:MUX.I[2] BUFHCE_W3:MUX.I[3] BUFHCE_W3:MUX.I[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[6] BUFHCE_W2:MUX.I[7] BUFHCE_W3:MUX.I[6] BUFHCE_W3:MUX.I[7]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:MUX.I[4] BUFHCE_W2:MUX.I[5] BUFHCE_W3:MUX.I[4] BUFHCE_W3:MUX.I[5]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:ENABLE - BUFHCE_W3:ENABLE
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:CE_TYPE[0] - BUFHCE_W3:CE_TYPE[0]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
35 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W2:INIT_OUT ~BUFHCE_W2:INV.CE BUFHCE_W3:INIT_OUT ~BUFHCE_W3:INV.CE
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[14] BUFHCE_W0:MUX.I[15] BUFHCE_W1:MUX.I[14] BUFHCE_W1:MUX.I[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[12] BUFHCE_W0:MUX.I[13] BUFHCE_W1:MUX.I[12] BUFHCE_W1:MUX.I[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[10] BUFHCE_W0:MUX.I[11] BUFHCE_W1:MUX.I[10] BUFHCE_W1:MUX.I[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[8] BUFHCE_W0:MUX.I[9] BUFHCE_W1:MUX.I[8] BUFHCE_W1:MUX.I[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[1] BUFHCE_W0:MUX.I[0] BUFHCE_W1:MUX.I[1] BUFHCE_W1:MUX.I[0]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[3] BUFHCE_W0:MUX.I[2] BUFHCE_W1:MUX.I[3] BUFHCE_W1:MUX.I[2]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[6] BUFHCE_W0:MUX.I[7] BUFHCE_W1:MUX.I[6] BUFHCE_W1:MUX.I[7]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:MUX.I[4] BUFHCE_W0:MUX.I[5] BUFHCE_W1:MUX.I[4] BUFHCE_W1:MUX.I[5]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:ENABLE - BUFHCE_W1:ENABLE
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:CE_TYPE[0] - BUFHCE_W1:CE_TYPE[0]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
19 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W0:INIT_OUT ~BUFHCE_W0:INV.CE BUFHCE_W1:INIT_OUT ~BUFHCE_W1:INV.CE
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[14] BUFHCE_E4:MUX.I[15] BUFHCE_E5:MUX.I[14] BUFHCE_E5:MUX.I[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[12] BUFHCE_E4:MUX.I[13] BUFHCE_E5:MUX.I[12] BUFHCE_E5:MUX.I[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[10] BUFHCE_E4:MUX.I[11] BUFHCE_E5:MUX.I[10] BUFHCE_E5:MUX.I[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[8] BUFHCE_E4:MUX.I[9] BUFHCE_E5:MUX.I[8] BUFHCE_E5:MUX.I[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[1] BUFHCE_E4:MUX.I[0] BUFHCE_E5:MUX.I[1] BUFHCE_E5:MUX.I[0]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[3] BUFHCE_E4:MUX.I[2] BUFHCE_E5:MUX.I[3] BUFHCE_E5:MUX.I[2]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[6] BUFHCE_E4:MUX.I[7] BUFHCE_E5:MUX.I[6] BUFHCE_E5:MUX.I[7]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:MUX.I[4] BUFHCE_E4:MUX.I[5] BUFHCE_E5:MUX.I[4] BUFHCE_E5:MUX.I[5]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:ENABLE - BUFHCE_E5:ENABLE
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:CE_TYPE[0] - BUFHCE_E5:CE_TYPE[0]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E4:INIT_OUT ~BUFHCE_E4:INV.CE BUFHCE_E5:INIT_OUT ~BUFHCE_E5:INV.CE
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 4
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[14] BUFHCE_E6:MUX.I[15] BUFHCE_E7:MUX.I[14] BUFHCE_E7:MUX.I[15]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[12] BUFHCE_E6:MUX.I[13] BUFHCE_E7:MUX.I[12] BUFHCE_E7:MUX.I[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[10] BUFHCE_E6:MUX.I[11] BUFHCE_E7:MUX.I[10] BUFHCE_E7:MUX.I[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[8] BUFHCE_E6:MUX.I[9] BUFHCE_E7:MUX.I[8] BUFHCE_E7:MUX.I[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[1] BUFHCE_E6:MUX.I[0] BUFHCE_E7:MUX.I[1] BUFHCE_E7:MUX.I[0]
58 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[3] BUFHCE_E6:MUX.I[2] BUFHCE_E7:MUX.I[3] BUFHCE_E7:MUX.I[2]
57 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[6] BUFHCE_E6:MUX.I[7] BUFHCE_E7:MUX.I[6] BUFHCE_E7:MUX.I[7]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:MUX.I[4] BUFHCE_E6:MUX.I[5] BUFHCE_E7:MUX.I[4] BUFHCE_E7:MUX.I[5]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:ENABLE - BUFHCE_E7:ENABLE
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:CE_TYPE[0] - BUFHCE_E7:CE_TYPE[0]
53 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
51 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E6:INIT_OUT ~BUFHCE_E6:INV.CE BUFHCE_E7:INIT_OUT ~BUFHCE_E7:INV.CE
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[14] BUFHCE_W10:MUX.I[15] BUFHCE_W11:MUX.I[14] BUFHCE_W11:MUX.I[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[12] BUFHCE_W10:MUX.I[13] BUFHCE_W11:MUX.I[12] BUFHCE_W11:MUX.I[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[10] BUFHCE_W10:MUX.I[11] BUFHCE_W11:MUX.I[10] BUFHCE_W11:MUX.I[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[8] BUFHCE_W10:MUX.I[9] BUFHCE_W11:MUX.I[8] BUFHCE_W11:MUX.I[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[1] BUFHCE_W10:MUX.I[0] BUFHCE_W11:MUX.I[1] BUFHCE_W11:MUX.I[0]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[3] BUFHCE_W10:MUX.I[2] BUFHCE_W11:MUX.I[3] BUFHCE_W11:MUX.I[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[6] BUFHCE_W10:MUX.I[7] BUFHCE_W11:MUX.I[6] BUFHCE_W11:MUX.I[7]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:MUX.I[4] BUFHCE_W10:MUX.I[5] BUFHCE_W11:MUX.I[4] BUFHCE_W11:MUX.I[5]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:ENABLE - BUFHCE_W11:ENABLE
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:CE_TYPE[0] - BUFHCE_W11:CE_TYPE[0]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
35 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W10:INIT_OUT ~BUFHCE_W10:INV.CE BUFHCE_W11:INIT_OUT ~BUFHCE_W11:INV.CE
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[14] BUFHCE_W8:MUX.I[15] BUFHCE_W9:MUX.I[14] BUFHCE_W9:MUX.I[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[12] BUFHCE_W8:MUX.I[13] BUFHCE_W9:MUX.I[12] BUFHCE_W9:MUX.I[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[10] BUFHCE_W8:MUX.I[11] BUFHCE_W9:MUX.I[10] BUFHCE_W9:MUX.I[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[8] BUFHCE_W8:MUX.I[9] BUFHCE_W9:MUX.I[8] BUFHCE_W9:MUX.I[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[1] BUFHCE_W8:MUX.I[0] BUFHCE_W9:MUX.I[1] BUFHCE_W9:MUX.I[0]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[3] BUFHCE_W8:MUX.I[2] BUFHCE_W9:MUX.I[3] BUFHCE_W9:MUX.I[2]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[6] BUFHCE_W8:MUX.I[7] BUFHCE_W9:MUX.I[6] BUFHCE_W9:MUX.I[7]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:MUX.I[4] BUFHCE_W8:MUX.I[5] BUFHCE_W9:MUX.I[4] BUFHCE_W9:MUX.I[5]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:ENABLE - BUFHCE_W9:ENABLE
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:CE_TYPE[0] - BUFHCE_W9:CE_TYPE[0]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
19 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W8:INIT_OUT ~BUFHCE_W8:INV.CE BUFHCE_W9:INIT_OUT ~BUFHCE_W9:INV.CE
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[14] BUFHCE_W6:MUX.I[15] BUFHCE_W7:MUX.I[14] BUFHCE_W7:MUX.I[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[12] BUFHCE_W6:MUX.I[13] BUFHCE_W7:MUX.I[12] BUFHCE_W7:MUX.I[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[10] BUFHCE_W6:MUX.I[11] BUFHCE_W7:MUX.I[10] BUFHCE_W7:MUX.I[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[8] BUFHCE_W6:MUX.I[9] BUFHCE_W7:MUX.I[8] BUFHCE_W7:MUX.I[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[1] BUFHCE_W6:MUX.I[0] BUFHCE_W7:MUX.I[1] BUFHCE_W7:MUX.I[0]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[3] BUFHCE_W6:MUX.I[2] BUFHCE_W7:MUX.I[3] BUFHCE_W7:MUX.I[2]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[6] BUFHCE_W6:MUX.I[7] BUFHCE_W7:MUX.I[6] BUFHCE_W7:MUX.I[7]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:MUX.I[4] BUFHCE_W6:MUX.I[5] BUFHCE_W7:MUX.I[4] BUFHCE_W7:MUX.I[5]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:ENABLE - BUFHCE_W7:ENABLE
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:CE_TYPE[0] - BUFHCE_W7:CE_TYPE[0]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_W6:INIT_OUT ~BUFHCE_W6:INV.CE BUFHCE_W7:INIT_OUT ~BUFHCE_W7:INV.CE
2 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.HCLK_TEST_W[7] - CLK_HROW:MUX.HCLK_TEST_E[7] -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.HCLK_TEST_W[5] CLK_HROW:MUX.HCLK_TEST_W[6] CLK_HROW:MUX.HCLK_TEST_E[5] CLK_HROW:MUX.HCLK_TEST_E[6]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.HCLK_TEST_W CLK_HROW:MUX.HCLK_TEST_W[4] CLK_HROW:INV.HCLK_TEST_E CLK_HROW:MUX.HCLK_TEST_E[4]
virtex7 CLK_HROW bittile 5
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[6] CLK_HROW:MUX.CASCO16[7] CLK_HROW:MUX.CASCO17[6] CLK_HROW:MUX.CASCO17[7]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[12] CLK_HROW:MUX.CASCO16[13] CLK_HROW:MUX.CASCO17[12] CLK_HROW:MUX.CASCO17[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[10] CLK_HROW:MUX.CASCO16[11] CLK_HROW:MUX.CASCO17[10] CLK_HROW:MUX.CASCO17[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[8] CLK_HROW:MUX.CASCO16[9] CLK_HROW:MUX.CASCO17[8] CLK_HROW:MUX.CASCO17[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
58 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[3] - CLK_HROW:MUX.CASCO17[3] -
57 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[4] CLK_HROW:MUX.CASCO16[5] CLK_HROW:MUX.CASCO17[4] CLK_HROW:MUX.CASCO17[5]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[2] CLK_HROW:MUX.CASCO16[1] CLK_HROW:MUX.CASCO17[2] CLK_HROW:MUX.CASCO17[1]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
53 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST16 - CLK_HROW:INV.GCLK_TEST17 -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO16[0] CLK_HROW:ENABLE.GCLK_TEST16 CLK_HROW:MUX.CASCO17[0] CLK_HROW:ENABLE.GCLK_TEST17
51 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[14] BUFHCE_E10:MUX.I[15] BUFHCE_E11:MUX.I[14] BUFHCE_E11:MUX.I[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[12] BUFHCE_E10:MUX.I[13] BUFHCE_E11:MUX.I[12] BUFHCE_E11:MUX.I[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[10] BUFHCE_E10:MUX.I[11] BUFHCE_E11:MUX.I[10] BUFHCE_E11:MUX.I[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[8] BUFHCE_E10:MUX.I[9] BUFHCE_E11:MUX.I[8] BUFHCE_E11:MUX.I[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[1] BUFHCE_E10:MUX.I[0] BUFHCE_E11:MUX.I[1] BUFHCE_E11:MUX.I[0]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[3] BUFHCE_E10:MUX.I[2] BUFHCE_E11:MUX.I[3] BUFHCE_E11:MUX.I[2]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[6] BUFHCE_E10:MUX.I[7] BUFHCE_E11:MUX.I[6] BUFHCE_E11:MUX.I[7]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:MUX.I[4] BUFHCE_E10:MUX.I[5] BUFHCE_E11:MUX.I[4] BUFHCE_E11:MUX.I[5]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:ENABLE - BUFHCE_E11:ENABLE
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:CE_TYPE[0] - BUFHCE_E11:CE_TYPE[0]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
19 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E10:INIT_OUT ~BUFHCE_E10:INV.CE BUFHCE_E11:INIT_OUT ~BUFHCE_E11:INV.CE
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[14] BUFHCE_E8:MUX.I[15] BUFHCE_E9:MUX.I[14] BUFHCE_E9:MUX.I[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[12] BUFHCE_E8:MUX.I[13] BUFHCE_E9:MUX.I[12] BUFHCE_E9:MUX.I[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[10] BUFHCE_E8:MUX.I[11] BUFHCE_E9:MUX.I[10] BUFHCE_E9:MUX.I[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[8] BUFHCE_E8:MUX.I[9] BUFHCE_E9:MUX.I[8] BUFHCE_E9:MUX.I[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[1] BUFHCE_E8:MUX.I[0] BUFHCE_E9:MUX.I[1] BUFHCE_E9:MUX.I[0]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[3] BUFHCE_E8:MUX.I[2] BUFHCE_E9:MUX.I[3] BUFHCE_E9:MUX.I[2]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[6] BUFHCE_E8:MUX.I[7] BUFHCE_E9:MUX.I[6] BUFHCE_E9:MUX.I[7]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:MUX.I[4] BUFHCE_E8:MUX.I[5] BUFHCE_E9:MUX.I[4] BUFHCE_E9:MUX.I[5]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:ENABLE - BUFHCE_E9:ENABLE
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:CE_TYPE[0] - BUFHCE_E9:CE_TYPE[0]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - BUFHCE_E8:INIT_OUT ~BUFHCE_E8:INV.CE BUFHCE_E9:INIT_OUT ~BUFHCE_E9:INV.CE
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 6
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
63 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[6] CLK_HROW:MUX.CASCO24[7] CLK_HROW:MUX.CASCO25[6] CLK_HROW:MUX.CASCO25[7]
62 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[12] CLK_HROW:MUX.CASCO24[13] CLK_HROW:MUX.CASCO25[12] CLK_HROW:MUX.CASCO25[13]
61 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[10] CLK_HROW:MUX.CASCO24[11] CLK_HROW:MUX.CASCO25[10] CLK_HROW:MUX.CASCO25[11]
60 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[8] CLK_HROW:MUX.CASCO24[9] CLK_HROW:MUX.CASCO25[8] CLK_HROW:MUX.CASCO25[9]
59 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
58 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[3] - CLK_HROW:MUX.CASCO25[3] -
57 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[4] CLK_HROW:MUX.CASCO24[5] CLK_HROW:MUX.CASCO25[4] CLK_HROW:MUX.CASCO25[5]
56 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[2] CLK_HROW:MUX.CASCO24[1] CLK_HROW:MUX.CASCO25[2] CLK_HROW:MUX.CASCO25[1]
55 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
54 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
53 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST24 - CLK_HROW:INV.GCLK_TEST25 -
52 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO24[0] CLK_HROW:ENABLE.GCLK_TEST24 CLK_HROW:MUX.CASCO25[0] CLK_HROW:ENABLE.GCLK_TEST25
51 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
49 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
48 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
47 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[6] CLK_HROW:MUX.CASCO22[7] CLK_HROW:MUX.CASCO23[6] CLK_HROW:MUX.CASCO23[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[12] CLK_HROW:MUX.CASCO22[13] CLK_HROW:MUX.CASCO23[12] CLK_HROW:MUX.CASCO23[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[10] CLK_HROW:MUX.CASCO22[11] CLK_HROW:MUX.CASCO23[10] CLK_HROW:MUX.CASCO23[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[8] CLK_HROW:MUX.CASCO22[9] CLK_HROW:MUX.CASCO23[8] CLK_HROW:MUX.CASCO23[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
42 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[3] - CLK_HROW:MUX.CASCO23[3] -
41 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[4] CLK_HROW:MUX.CASCO22[5] CLK_HROW:MUX.CASCO23[4] CLK_HROW:MUX.CASCO23[5]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[2] CLK_HROW:MUX.CASCO22[1] CLK_HROW:MUX.CASCO23[2] CLK_HROW:MUX.CASCO23[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
37 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST22 - CLK_HROW:INV.GCLK_TEST23 -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO22[0] CLK_HROW:ENABLE.GCLK_TEST22 CLK_HROW:MUX.CASCO23[0] CLK_HROW:ENABLE.GCLK_TEST23
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[6] CLK_HROW:MUX.CASCO20[7] CLK_HROW:MUX.CASCO21[6] CLK_HROW:MUX.CASCO21[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[12] CLK_HROW:MUX.CASCO20[13] CLK_HROW:MUX.CASCO21[12] CLK_HROW:MUX.CASCO21[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[10] CLK_HROW:MUX.CASCO20[11] CLK_HROW:MUX.CASCO21[10] CLK_HROW:MUX.CASCO21[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[8] CLK_HROW:MUX.CASCO20[9] CLK_HROW:MUX.CASCO21[8] CLK_HROW:MUX.CASCO21[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
26 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[3] - CLK_HROW:MUX.CASCO21[3] -
25 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[4] CLK_HROW:MUX.CASCO20[5] CLK_HROW:MUX.CASCO21[4] CLK_HROW:MUX.CASCO21[5]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[2] CLK_HROW:MUX.CASCO20[1] CLK_HROW:MUX.CASCO21[2] CLK_HROW:MUX.CASCO21[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
21 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST20 - CLK_HROW:INV.GCLK_TEST21 -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO20[0] CLK_HROW:ENABLE.GCLK_TEST20 CLK_HROW:MUX.CASCO21[0] CLK_HROW:ENABLE.GCLK_TEST21
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[6] CLK_HROW:MUX.CASCO18[7] CLK_HROW:MUX.CASCO19[6] CLK_HROW:MUX.CASCO19[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[12] CLK_HROW:MUX.CASCO18[13] CLK_HROW:MUX.CASCO19[12] CLK_HROW:MUX.CASCO19[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[10] CLK_HROW:MUX.CASCO18[11] CLK_HROW:MUX.CASCO19[10] CLK_HROW:MUX.CASCO19[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[8] CLK_HROW:MUX.CASCO18[9] CLK_HROW:MUX.CASCO19[8] CLK_HROW:MUX.CASCO19[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[3] - CLK_HROW:MUX.CASCO19[3] -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[4] CLK_HROW:MUX.CASCO18[5] CLK_HROW:MUX.CASCO19[4] CLK_HROW:MUX.CASCO19[5]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[2] CLK_HROW:MUX.CASCO18[1] CLK_HROW:MUX.CASCO19[2] CLK_HROW:MUX.CASCO19[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST18 - CLK_HROW:INV.GCLK_TEST19 -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO18[0] CLK_HROW:ENABLE.GCLK_TEST18 CLK_HROW:MUX.CASCO19[0] CLK_HROW:ENABLE.GCLK_TEST19
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 7
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[6] CLK_HROW:MUX.CASCO30[7] CLK_HROW:MUX.CASCO31[6] CLK_HROW:MUX.CASCO31[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[12] CLK_HROW:MUX.CASCO30[13] CLK_HROW:MUX.CASCO31[12] CLK_HROW:MUX.CASCO31[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[10] CLK_HROW:MUX.CASCO30[11] CLK_HROW:MUX.CASCO31[10] CLK_HROW:MUX.CASCO31[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[8] CLK_HROW:MUX.CASCO30[9] CLK_HROW:MUX.CASCO31[8] CLK_HROW:MUX.CASCO31[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
42 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[3] - CLK_HROW:MUX.CASCO31[3] -
41 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[4] CLK_HROW:MUX.CASCO30[5] CLK_HROW:MUX.CASCO31[4] CLK_HROW:MUX.CASCO31[5]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[2] CLK_HROW:MUX.CASCO30[1] CLK_HROW:MUX.CASCO31[2] CLK_HROW:MUX.CASCO31[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
37 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST30 - CLK_HROW:INV.GCLK_TEST31 -
36 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO30[0] CLK_HROW:ENABLE.GCLK_TEST30 CLK_HROW:MUX.CASCO31[0] CLK_HROW:ENABLE.GCLK_TEST31
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
31 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[6] CLK_HROW:MUX.CASCO28[7] CLK_HROW:MUX.CASCO29[6] CLK_HROW:MUX.CASCO29[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[12] CLK_HROW:MUX.CASCO28[13] CLK_HROW:MUX.CASCO29[12] CLK_HROW:MUX.CASCO29[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[10] CLK_HROW:MUX.CASCO28[11] CLK_HROW:MUX.CASCO29[10] CLK_HROW:MUX.CASCO29[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[8] CLK_HROW:MUX.CASCO28[9] CLK_HROW:MUX.CASCO29[8] CLK_HROW:MUX.CASCO29[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
26 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[3] - CLK_HROW:MUX.CASCO29[3] -
25 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[4] CLK_HROW:MUX.CASCO28[5] CLK_HROW:MUX.CASCO29[4] CLK_HROW:MUX.CASCO29[5]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[2] CLK_HROW:MUX.CASCO28[1] CLK_HROW:MUX.CASCO29[2] CLK_HROW:MUX.CASCO29[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
21 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST28 - CLK_HROW:INV.GCLK_TEST29 -
20 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO28[0] CLK_HROW:ENABLE.GCLK_TEST28 CLK_HROW:MUX.CASCO29[0] CLK_HROW:ENABLE.GCLK_TEST29
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
15 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[6] CLK_HROW:MUX.CASCO26[7] CLK_HROW:MUX.CASCO27[6] CLK_HROW:MUX.CASCO27[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[12] CLK_HROW:MUX.CASCO26[13] CLK_HROW:MUX.CASCO27[12] CLK_HROW:MUX.CASCO27[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[10] CLK_HROW:MUX.CASCO26[11] CLK_HROW:MUX.CASCO27[10] CLK_HROW:MUX.CASCO27[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[8] CLK_HROW:MUX.CASCO26[9] CLK_HROW:MUX.CASCO27[8] CLK_HROW:MUX.CASCO27[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[3] - CLK_HROW:MUX.CASCO27[3] -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[4] CLK_HROW:MUX.CASCO26[5] CLK_HROW:MUX.CASCO27[4] CLK_HROW:MUX.CASCO27[5]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[2] CLK_HROW:MUX.CASCO26[1] CLK_HROW:MUX.CASCO27[2] CLK_HROW:MUX.CASCO27[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:INV.GCLK_TEST26 - CLK_HROW:INV.GCLK_TEST27 -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.CASCO26[0] CLK_HROW:ENABLE.GCLK_TEST26 CLK_HROW:MUX.CASCO27[0] CLK_HROW:ENABLE.GCLK_TEST27
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
virtex7 CLK_HROW bittile 8
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
31 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.CKINT0 CLK_HROW:ENABLE.CKINT1 CLK_HROW:ENABLE.CKINT2 CLK_HROW:ENABLE.CKINT3
30 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK30 CLK_HROW:ENABLE.GCLK31 CLK_HROW:ENABLE.GCLK14 CLK_HROW:ENABLE.GCLK15
29 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK28 CLK_HROW:ENABLE.GCLK29 CLK_HROW:ENABLE.GCLK12 CLK_HROW:ENABLE.GCLK13
28 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK26 CLK_HROW:ENABLE.GCLK27 CLK_HROW:ENABLE.GCLK10 CLK_HROW:ENABLE.GCLK11
27 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK24 CLK_HROW:ENABLE.GCLK25 CLK_HROW:ENABLE.GCLK8 CLK_HROW:ENABLE.GCLK9
26 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK22 CLK_HROW:ENABLE.GCLK23 CLK_HROW:ENABLE.GCLK6 CLK_HROW:ENABLE.GCLK7
25 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK20 CLK_HROW:ENABLE.GCLK21 CLK_HROW:ENABLE.GCLK4 CLK_HROW:ENABLE.GCLK5
24 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK18 CLK_HROW:ENABLE.GCLK19 CLK_HROW:ENABLE.GCLK2 CLK_HROW:ENABLE.GCLK3
23 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.GCLK16 CLK_HROW:ENABLE.GCLK17 CLK_HROW:ENABLE.GCLK0 CLK_HROW:ENABLE.GCLK1
22 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN8_L CLK_HROW:ENABLE.HIN9_L CLK_HROW:ENABLE.HIN8_R CLK_HROW:ENABLE.HIN9_R
21 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN6_L CLK_HROW:ENABLE.HIN7_L CLK_HROW:ENABLE.HIN6_R CLK_HROW:ENABLE.HIN7_R
20 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN4_L CLK_HROW:ENABLE.HIN5_L CLK_HROW:ENABLE.HIN4_R CLK_HROW:ENABLE.HIN5_R
19 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN2_L CLK_HROW:ENABLE.HIN3_L CLK_HROW:ENABLE.HIN2_R CLK_HROW:ENABLE.HIN3_R
18 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.HIN0_L CLK_HROW:ENABLE.HIN1_L CLK_HROW:ENABLE.HIN0_R CLK_HROW:ENABLE.HIN1_R
17 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.HCLK_TEST_W[2] CLK_HROW:MUX.HCLK_TEST_W[3] CLK_HROW:MUX.HCLK_TEST_E[2] CLK_HROW:MUX.HCLK_TEST_E[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:MUX.HCLK_TEST_W[0] CLK_HROW:MUX.HCLK_TEST_W[1] CLK_HROW:MUX.HCLK_TEST_E[0] CLK_HROW:MUX.HCLK_TEST_E[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.RCLK2_L CLK_HROW:ENABLE.RCLK3_L CLK_HROW:ENABLE.RCLK2_R CLK_HROW:ENABLE.RCLK3_R
14 - - - - - - - - - - - - - - - - - - - - - - - - - - CLK_HROW:ENABLE.RCLK0_L CLK_HROW:ENABLE.RCLK1_L CLK_HROW:ENABLE.RCLK0_R CLK_HROW:ENABLE.RCLK1_R
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
BUFHCE_E0:CE_TYPE 2.27.38
BUFHCE_E10:CE_TYPE 5.27.22
BUFHCE_E11:CE_TYPE 5.29.22
BUFHCE_E1:CE_TYPE 2.29.38
BUFHCE_E2:CE_TYPE 2.27.54
BUFHCE_E3:CE_TYPE 2.29.54
BUFHCE_E4:CE_TYPE 3.27.6
BUFHCE_E5:CE_TYPE 3.29.6
BUFHCE_E6:CE_TYPE 4.27.54
BUFHCE_E7:CE_TYPE 4.29.54
BUFHCE_E8:CE_TYPE 5.27.6
BUFHCE_E9:CE_TYPE 5.29.6
BUFHCE_W0:CE_TYPE 3.27.22
BUFHCE_W10:CE_TYPE 4.27.38
BUFHCE_W11:CE_TYPE 4.29.38
BUFHCE_W1:CE_TYPE 3.29.22
BUFHCE_W2:CE_TYPE 3.27.38
BUFHCE_W3:CE_TYPE 3.29.38
BUFHCE_W4:CE_TYPE 3.27.54
BUFHCE_W5:CE_TYPE 3.29.54
BUFHCE_W6:CE_TYPE 4.27.6
BUFHCE_W7:CE_TYPE 4.29.6
BUFHCE_W8:CE_TYPE 4.27.22
BUFHCE_W9:CE_TYPE 4.29.22
SYNC 0
ASYNC 1
BUFHCE_E0:ENABLE 2.27.39
BUFHCE_E0:INIT_OUT 2.26.35
BUFHCE_E10:ENABLE 5.27.23
BUFHCE_E10:INIT_OUT 5.26.19
BUFHCE_E11:ENABLE 5.29.23
BUFHCE_E11:INIT_OUT 5.28.19
BUFHCE_E1:ENABLE 2.29.39
BUFHCE_E1:INIT_OUT 2.28.35
BUFHCE_E2:ENABLE 2.27.55
BUFHCE_E2:INIT_OUT 2.26.51
BUFHCE_E3:ENABLE 2.29.55
BUFHCE_E3:INIT_OUT 2.28.51
BUFHCE_E4:ENABLE 3.27.7
BUFHCE_E4:INIT_OUT 3.26.3
BUFHCE_E5:ENABLE 3.29.7
BUFHCE_E5:INIT_OUT 3.28.3
BUFHCE_E6:ENABLE 4.27.55
BUFHCE_E6:INIT_OUT 4.26.51
BUFHCE_E7:ENABLE 4.29.55
BUFHCE_E7:INIT_OUT 4.28.51
BUFHCE_E8:ENABLE 5.27.7
BUFHCE_E8:INIT_OUT 5.26.3
BUFHCE_E9:ENABLE 5.29.7
BUFHCE_E9:INIT_OUT 5.28.3
BUFHCE_W0:ENABLE 3.27.23
BUFHCE_W0:INIT_OUT 3.26.19
BUFHCE_W10:ENABLE 4.27.39
BUFHCE_W10:INIT_OUT 4.26.35
BUFHCE_W11:ENABLE 4.29.39
BUFHCE_W11:INIT_OUT 4.28.35
BUFHCE_W1:ENABLE 3.29.23
BUFHCE_W1:INIT_OUT 3.28.19
BUFHCE_W2:ENABLE 3.27.39
BUFHCE_W2:INIT_OUT 3.26.35
BUFHCE_W3:ENABLE 3.29.39
BUFHCE_W3:INIT_OUT 3.28.35
BUFHCE_W4:ENABLE 3.27.55
BUFHCE_W4:INIT_OUT 3.26.51
BUFHCE_W5:ENABLE 3.29.55
BUFHCE_W5:INIT_OUT 3.28.51
BUFHCE_W6:ENABLE 4.27.7
BUFHCE_W6:INIT_OUT 4.26.3
BUFHCE_W7:ENABLE 4.29.7
BUFHCE_W7:INIT_OUT 4.28.3
BUFHCE_W8:ENABLE 4.27.23
BUFHCE_W8:INIT_OUT 4.26.19
BUFHCE_W9:ENABLE 4.29.23
BUFHCE_W9:INIT_OUT 4.28.19
CLK_HROW:ENABLE.CKINT0 8.26.31
CLK_HROW:ENABLE.CKINT1 8.27.31
CLK_HROW:ENABLE.CKINT2 8.28.31
CLK_HROW:ENABLE.CKINT3 8.29.31
CLK_HROW:ENABLE.GCLK0 8.28.23
CLK_HROW:ENABLE.GCLK1 8.29.23
CLK_HROW:ENABLE.GCLK10 8.28.28
CLK_HROW:ENABLE.GCLK11 8.29.28
CLK_HROW:ENABLE.GCLK12 8.28.29
CLK_HROW:ENABLE.GCLK13 8.29.29
CLK_HROW:ENABLE.GCLK14 8.28.30
CLK_HROW:ENABLE.GCLK15 8.29.30
CLK_HROW:ENABLE.GCLK16 8.26.23
CLK_HROW:ENABLE.GCLK17 8.27.23
CLK_HROW:ENABLE.GCLK18 8.26.24
CLK_HROW:ENABLE.GCLK19 8.27.24
CLK_HROW:ENABLE.GCLK2 8.28.24
CLK_HROW:ENABLE.GCLK20 8.26.25
CLK_HROW:ENABLE.GCLK21 8.27.25
CLK_HROW:ENABLE.GCLK22 8.26.26
CLK_HROW:ENABLE.GCLK23 8.27.26
CLK_HROW:ENABLE.GCLK24 8.26.27
CLK_HROW:ENABLE.GCLK25 8.27.27
CLK_HROW:ENABLE.GCLK26 8.26.28
CLK_HROW:ENABLE.GCLK27 8.27.28
CLK_HROW:ENABLE.GCLK28 8.26.29
CLK_HROW:ENABLE.GCLK29 8.27.29
CLK_HROW:ENABLE.GCLK3 8.29.24
CLK_HROW:ENABLE.GCLK30 8.26.30
CLK_HROW:ENABLE.GCLK31 8.27.30
CLK_HROW:ENABLE.GCLK4 8.28.25
CLK_HROW:ENABLE.GCLK5 8.29.25
CLK_HROW:ENABLE.GCLK6 8.28.26
CLK_HROW:ENABLE.GCLK7 8.29.26
CLK_HROW:ENABLE.GCLK8 8.28.27
CLK_HROW:ENABLE.GCLK9 8.29.27
CLK_HROW:ENABLE.GCLK_TEST0 0.27.20
CLK_HROW:ENABLE.GCLK_TEST1 0.29.20
CLK_HROW:ENABLE.GCLK_TEST10 1.27.36
CLK_HROW:ENABLE.GCLK_TEST11 1.29.36
CLK_HROW:ENABLE.GCLK_TEST12 1.27.52
CLK_HROW:ENABLE.GCLK_TEST13 1.29.52
CLK_HROW:ENABLE.GCLK_TEST14 2.27.4
CLK_HROW:ENABLE.GCLK_TEST15 2.29.4
CLK_HROW:ENABLE.GCLK_TEST16 5.27.52
CLK_HROW:ENABLE.GCLK_TEST17 5.29.52
CLK_HROW:ENABLE.GCLK_TEST18 6.27.4
CLK_HROW:ENABLE.GCLK_TEST19 6.29.4
CLK_HROW:ENABLE.GCLK_TEST2 0.27.36
CLK_HROW:ENABLE.GCLK_TEST20 6.27.20
CLK_HROW:ENABLE.GCLK_TEST21 6.29.20
CLK_HROW:ENABLE.GCLK_TEST22 6.27.36
CLK_HROW:ENABLE.GCLK_TEST23 6.29.36
CLK_HROW:ENABLE.GCLK_TEST24 6.27.52
CLK_HROW:ENABLE.GCLK_TEST25 6.29.52
CLK_HROW:ENABLE.GCLK_TEST26 7.27.4
CLK_HROW:ENABLE.GCLK_TEST27 7.29.4
CLK_HROW:ENABLE.GCLK_TEST28 7.27.20
CLK_HROW:ENABLE.GCLK_TEST29 7.29.20
CLK_HROW:ENABLE.GCLK_TEST3 0.29.36
CLK_HROW:ENABLE.GCLK_TEST30 7.27.36
CLK_HROW:ENABLE.GCLK_TEST31 7.29.36
CLK_HROW:ENABLE.GCLK_TEST4 0.27.52
CLK_HROW:ENABLE.GCLK_TEST5 0.29.52
CLK_HROW:ENABLE.GCLK_TEST6 1.27.4
CLK_HROW:ENABLE.GCLK_TEST7 1.29.4
CLK_HROW:ENABLE.GCLK_TEST8 1.27.20
CLK_HROW:ENABLE.GCLK_TEST9 1.29.20
CLK_HROW:ENABLE.HIN0_L 8.26.18
CLK_HROW:ENABLE.HIN0_R 8.28.18
CLK_HROW:ENABLE.HIN10_L 3.26.48
CLK_HROW:ENABLE.HIN10_R 3.28.48
CLK_HROW:ENABLE.HIN11_L 3.27.48
CLK_HROW:ENABLE.HIN11_R 3.29.48
CLK_HROW:ENABLE.HIN12_L 3.26.49
CLK_HROW:ENABLE.HIN12_R 3.28.49
CLK_HROW:ENABLE.HIN13_L 3.27.49
CLK_HROW:ENABLE.HIN13_R 3.29.49
CLK_HROW:ENABLE.HIN1_L 8.27.18
CLK_HROW:ENABLE.HIN1_R 8.29.18
CLK_HROW:ENABLE.HIN2_L 8.26.19
CLK_HROW:ENABLE.HIN2_R 8.28.19
CLK_HROW:ENABLE.HIN3_L 8.27.19
CLK_HROW:ENABLE.HIN3_R 8.29.19
CLK_HROW:ENABLE.HIN4_L 8.26.20
CLK_HROW:ENABLE.HIN4_R 8.28.20
CLK_HROW:ENABLE.HIN5_L 8.27.20
CLK_HROW:ENABLE.HIN5_R 8.29.20
CLK_HROW:ENABLE.HIN6_L 8.26.21
CLK_HROW:ENABLE.HIN6_R 8.28.21
CLK_HROW:ENABLE.HIN7_L 8.27.21
CLK_HROW:ENABLE.HIN7_R 8.29.21
CLK_HROW:ENABLE.HIN8_L 8.26.22
CLK_HROW:ENABLE.HIN8_R 8.28.22
CLK_HROW:ENABLE.HIN9_L 8.27.22
CLK_HROW:ENABLE.HIN9_R 8.29.22
CLK_HROW:ENABLE.RCLK0_L 8.26.14
CLK_HROW:ENABLE.RCLK0_R 8.28.14
CLK_HROW:ENABLE.RCLK1_L 8.27.14
CLK_HROW:ENABLE.RCLK1_R 8.29.14
CLK_HROW:ENABLE.RCLK2_L 8.26.15
CLK_HROW:ENABLE.RCLK2_R 8.28.15
CLK_HROW:ENABLE.RCLK3_L 8.27.15
CLK_HROW:ENABLE.RCLK3_R 8.29.15
CLK_HROW:INV.GCLK_TEST0 0.26.21
CLK_HROW:INV.GCLK_TEST1 0.28.21
CLK_HROW:INV.GCLK_TEST10 1.26.37
CLK_HROW:INV.GCLK_TEST11 1.28.37
CLK_HROW:INV.GCLK_TEST12 1.26.53
CLK_HROW:INV.GCLK_TEST13 1.28.53
CLK_HROW:INV.GCLK_TEST14 2.26.5
CLK_HROW:INV.GCLK_TEST15 2.28.5
CLK_HROW:INV.GCLK_TEST16 5.26.53
CLK_HROW:INV.GCLK_TEST17 5.28.53
CLK_HROW:INV.GCLK_TEST18 6.26.5
CLK_HROW:INV.GCLK_TEST19 6.28.5
CLK_HROW:INV.GCLK_TEST2 0.26.37
CLK_HROW:INV.GCLK_TEST20 6.26.21
CLK_HROW:INV.GCLK_TEST21 6.28.21
CLK_HROW:INV.GCLK_TEST22 6.26.37
CLK_HROW:INV.GCLK_TEST23 6.28.37
CLK_HROW:INV.GCLK_TEST24 6.26.53
CLK_HROW:INV.GCLK_TEST25 6.28.53
CLK_HROW:INV.GCLK_TEST26 7.26.5
CLK_HROW:INV.GCLK_TEST27 7.28.5
CLK_HROW:INV.GCLK_TEST28 7.26.21
CLK_HROW:INV.GCLK_TEST29 7.28.21
CLK_HROW:INV.GCLK_TEST3 0.28.37
CLK_HROW:INV.GCLK_TEST30 7.26.37
CLK_HROW:INV.GCLK_TEST31 7.28.37
CLK_HROW:INV.GCLK_TEST4 0.26.53
CLK_HROW:INV.GCLK_TEST5 0.28.53
CLK_HROW:INV.GCLK_TEST6 1.26.5
CLK_HROW:INV.GCLK_TEST7 1.28.5
CLK_HROW:INV.GCLK_TEST8 1.26.21
CLK_HROW:INV.GCLK_TEST9 1.28.21
CLK_HROW:INV.HCLK_TEST_E 4.28.0
CLK_HROW:INV.HCLK_TEST_W 4.26.0
non-inverted [0]
BUFHCE_E0:INV.CE 2.27.35
BUFHCE_E10:INV.CE 5.27.19
BUFHCE_E11:INV.CE 5.29.19
BUFHCE_E1:INV.CE 2.29.35
BUFHCE_E2:INV.CE 2.27.51
BUFHCE_E3:INV.CE 2.29.51
BUFHCE_E4:INV.CE 3.27.3
BUFHCE_E5:INV.CE 3.29.3
BUFHCE_E6:INV.CE 4.27.51
BUFHCE_E7:INV.CE 4.29.51
BUFHCE_E8:INV.CE 5.27.3
BUFHCE_E9:INV.CE 5.29.3
BUFHCE_W0:INV.CE 3.27.19
BUFHCE_W10:INV.CE 4.27.35
BUFHCE_W11:INV.CE 4.29.35
BUFHCE_W1:INV.CE 3.29.19
BUFHCE_W2:INV.CE 3.27.35
BUFHCE_W3:INV.CE 3.29.35
BUFHCE_W4:INV.CE 3.27.51
BUFHCE_W5:INV.CE 3.29.51
BUFHCE_W6:INV.CE 4.27.3
BUFHCE_W7:INV.CE 4.29.3
BUFHCE_W8:INV.CE 4.27.19
BUFHCE_W9:INV.CE 4.29.19
inverted ~[0]
BUFHCE_E0:MUX.I 2.27.47 2.26.47 2.27.46 2.26.46 2.27.45 2.26.45 2.27.44 2.26.44 2.27.41 2.26.41 2.27.40 2.26.40 2.26.42 2.27.42 2.26.43 2.27.43
BUFHCE_E1:MUX.I 2.29.47 2.28.47 2.29.46 2.28.46 2.29.45 2.28.45 2.29.44 2.28.44 2.29.41 2.28.41 2.29.40 2.28.40 2.28.42 2.29.42 2.28.43 2.29.43
BUFHCE_E2:MUX.I 2.27.63 2.26.63 2.27.62 2.26.62 2.27.61 2.26.61 2.27.60 2.26.60 2.27.57 2.26.57 2.27.56 2.26.56 2.26.58 2.27.58 2.26.59 2.27.59
BUFHCE_E3:MUX.I 2.29.63 2.28.63 2.29.62 2.28.62 2.29.61 2.28.61 2.29.60 2.28.60 2.29.57 2.28.57 2.29.56 2.28.56 2.28.58 2.29.58 2.28.59 2.29.59
BUFHCE_E4:MUX.I 3.27.15 3.26.15 3.27.14 3.26.14 3.27.13 3.26.13 3.27.12 3.26.12 3.27.9 3.26.9 3.27.8 3.26.8 3.26.10 3.27.10 3.26.11 3.27.11
BUFHCE_E5:MUX.I 3.29.15 3.28.15 3.29.14 3.28.14 3.29.13 3.28.13 3.29.12 3.28.12 3.29.9 3.28.9 3.29.8 3.28.8 3.28.10 3.29.10 3.28.11 3.29.11
BUFHCE_W10:MUX.I 4.27.47 4.26.47 4.27.46 4.26.46 4.27.45 4.26.45 4.27.44 4.26.44 4.27.41 4.26.41 4.27.40 4.26.40 4.26.42 4.27.42 4.26.43 4.27.43
BUFHCE_W11:MUX.I 4.29.47 4.28.47 4.29.46 4.28.46 4.29.45 4.28.45 4.29.44 4.28.44 4.29.41 4.28.41 4.29.40 4.28.40 4.28.42 4.29.42 4.28.43 4.29.43
BUFHCE_W6:MUX.I 4.27.15 4.26.15 4.27.14 4.26.14 4.27.13 4.26.13 4.27.12 4.26.12 4.27.9 4.26.9 4.27.8 4.26.8 4.26.10 4.27.10 4.26.11 4.27.11
BUFHCE_W7:MUX.I 4.29.15 4.28.15 4.29.14 4.28.14 4.29.13 4.28.13 4.29.12 4.28.12 4.29.9 4.28.9 4.29.8 4.28.8 4.28.10 4.29.10 4.28.11 4.29.11
BUFHCE_W8:MUX.I 4.27.31 4.26.31 4.27.30 4.26.30 4.27.29 4.26.29 4.27.28 4.26.28 4.27.25 4.26.25 4.27.24 4.26.24 4.26.26 4.27.26 4.26.27 4.27.27
BUFHCE_W9:MUX.I 4.29.31 4.28.31 4.29.30 4.28.30 4.29.29 4.28.29 4.29.28 4.28.28 4.29.25 4.28.25 4.29.24 4.28.24 4.28.26 4.29.26 4.28.27 4.29.27
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GCLK0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1
GCLK8 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0
GCLK16 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0
GCLK24 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_L 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN0_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0
HIN8_R 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0
GCLK1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1
GCLK9 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0
GCLK17 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0
GCLK25 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_L 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN1_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0
HIN9_R 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0
GCLK2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1
GCLK10 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0
GCLK18 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0
GCLK26 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN2_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0
HIN10_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0
GCLK3 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1
GCLK11 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0
GCLK19 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0
GCLK27 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN3_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0
HIN11_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0
GCLK4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1
GCLK12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0
GCLK20 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0
GCLK28 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN4_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0
HIN12_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0
GCLK5 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK13 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK21 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK29 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN5_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0
HIN13_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0
GCLK6 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK14 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK22 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK30 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN6_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0
HCLK_TEST_L 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN6_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0
CKINT0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0
GCLK7 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK15 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK23 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK31 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN7_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
HCLK_TEST_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN7_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
CKINT1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
BUFHCE_E10:MUX.I 5.27.31 5.26.31 5.27.30 5.26.30 5.27.29 5.26.29 5.27.28 5.26.28 5.27.25 5.26.25 5.27.24 5.26.24 5.26.26 5.27.26 5.26.27 5.27.27
BUFHCE_E11:MUX.I 5.29.31 5.28.31 5.29.30 5.28.30 5.29.29 5.28.29 5.29.28 5.28.28 5.29.25 5.28.25 5.29.24 5.28.24 5.28.26 5.29.26 5.28.27 5.29.27
BUFHCE_E6:MUX.I 4.27.63 4.26.63 4.27.62 4.26.62 4.27.61 4.26.61 4.27.60 4.26.60 4.27.57 4.26.57 4.27.56 4.26.56 4.26.58 4.27.58 4.26.59 4.27.59
BUFHCE_E7:MUX.I 4.29.63 4.28.63 4.29.62 4.28.62 4.29.61 4.28.61 4.29.60 4.28.60 4.29.57 4.28.57 4.29.56 4.28.56 4.28.58 4.29.58 4.28.59 4.29.59
BUFHCE_E8:MUX.I 5.27.15 5.26.15 5.27.14 5.26.14 5.27.13 5.26.13 5.27.12 5.26.12 5.27.9 5.26.9 5.27.8 5.26.8 5.26.10 5.27.10 5.26.11 5.27.11
BUFHCE_E9:MUX.I 5.29.15 5.28.15 5.29.14 5.28.14 5.29.13 5.28.13 5.29.12 5.28.12 5.29.9 5.28.9 5.29.8 5.28.8 5.28.10 5.29.10 5.28.11 5.29.11
BUFHCE_W0:MUX.I 3.27.31 3.26.31 3.27.30 3.26.30 3.27.29 3.26.29 3.27.28 3.26.28 3.27.25 3.26.25 3.27.24 3.26.24 3.26.26 3.27.26 3.26.27 3.27.27
BUFHCE_W1:MUX.I 3.29.31 3.28.31 3.29.30 3.28.30 3.29.29 3.28.29 3.29.28 3.28.28 3.29.25 3.28.25 3.29.24 3.28.24 3.28.26 3.29.26 3.28.27 3.29.27
BUFHCE_W2:MUX.I 3.27.47 3.26.47 3.27.46 3.26.46 3.27.45 3.26.45 3.27.44 3.26.44 3.27.41 3.26.41 3.27.40 3.26.40 3.26.42 3.27.42 3.26.43 3.27.43
BUFHCE_W3:MUX.I 3.29.47 3.28.47 3.29.46 3.28.46 3.29.45 3.28.45 3.29.44 3.28.44 3.29.41 3.28.41 3.29.40 3.28.40 3.28.42 3.29.42 3.28.43 3.29.43
BUFHCE_W4:MUX.I 3.27.63 3.26.63 3.27.62 3.26.62 3.27.61 3.26.61 3.27.60 3.26.60 3.27.57 3.26.57 3.27.56 3.26.56 3.26.58 3.27.58 3.26.59 3.27.59
BUFHCE_W5:MUX.I 3.29.63 3.28.63 3.29.62 3.28.62 3.29.61 3.28.61 3.29.60 3.28.60 3.29.57 3.28.57 3.29.56 3.28.56 3.28.58 3.29.58 3.28.59 3.29.59
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GCLK0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1
GCLK8 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0
GCLK16 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0
GCLK24 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_L 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN0_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0
HIN8_R 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0
GCLK1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1
GCLK9 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0
GCLK17 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0
GCLK25 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_L 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN1_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0
HIN9_R 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0
GCLK2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1
GCLK10 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0
GCLK18 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0
GCLK26 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN2_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0
HIN10_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0
GCLK3 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1
GCLK11 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0
GCLK19 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0
GCLK27 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN3_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0
HIN11_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0
GCLK4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1
GCLK12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0
GCLK20 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0
GCLK28 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN4_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0
HIN12_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0
GCLK5 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK13 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK21 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK29 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN5_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0
HIN13_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0
GCLK6 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK14 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK22 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK30 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN6_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0
HCLK_TEST_L 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN6_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0
CKINT2 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0
GCLK7 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
GCLK15 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
GCLK23 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
GCLK31 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN7_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
HCLK_TEST_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
HIN7_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
CKINT3 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
CLK_HROW:MUX.CASCO0 0.27.30 0.26.30 0.27.29 0.26.29 0.27.28 0.26.28 0.27.31 0.26.31 0.27.25 0.26.25 0.26.26 0.26.24 0.27.24 0.26.20
CLK_HROW:MUX.CASCO1 0.29.30 0.28.30 0.29.29 0.28.29 0.29.28 0.28.28 0.29.31 0.28.31 0.29.25 0.28.25 0.28.26 0.28.24 0.29.24 0.28.20
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST0 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST1 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO10 1.27.46 1.26.46 1.27.45 1.26.45 1.27.44 1.26.44 1.27.47 1.26.47 1.27.41 1.26.41 1.26.42 1.26.40 1.27.40 1.26.36
CLK_HROW:MUX.CASCO11 1.29.46 1.28.46 1.29.45 1.28.45 1.29.44 1.28.44 1.29.47 1.28.47 1.29.41 1.28.41 1.28.42 1.28.40 1.29.40 1.28.36
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST10 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST11 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO12 1.27.62 1.26.62 1.27.61 1.26.61 1.27.60 1.26.60 1.27.63 1.26.63 1.27.57 1.26.57 1.26.58 1.26.56 1.27.56 1.26.52
CLK_HROW:MUX.CASCO13 1.29.62 1.28.62 1.29.61 1.28.61 1.29.60 1.28.60 1.29.63 1.28.63 1.29.57 1.28.57 1.28.58 1.28.56 1.29.56 1.28.52
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST12 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST13 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO14 2.27.14 2.26.14 2.27.13 2.26.13 2.27.12 2.26.12 2.27.15 2.26.15 2.27.9 2.26.9 2.26.10 2.26.8 2.27.8 2.26.4
CLK_HROW:MUX.CASCO15 2.29.14 2.28.14 2.29.13 2.28.13 2.29.12 2.28.12 2.29.15 2.28.15 2.29.9 2.28.9 2.28.10 2.28.8 2.29.8 2.28.4
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST14 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST15 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO16 5.27.62 5.26.62 5.27.61 5.26.61 5.27.60 5.26.60 5.27.63 5.26.63 5.27.57 5.26.57 5.26.58 5.26.56 5.27.56 5.26.52
CLK_HROW:MUX.CASCO17 5.29.62 5.28.62 5.29.61 5.28.61 5.29.60 5.28.60 5.29.63 5.28.63 5.29.57 5.28.57 5.28.58 5.28.56 5.29.56 5.28.52
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST16 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST17 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO18 6.27.14 6.26.14 6.27.13 6.26.13 6.27.12 6.26.12 6.27.15 6.26.15 6.27.9 6.26.9 6.26.10 6.26.8 6.27.8 6.26.4
CLK_HROW:MUX.CASCO19 6.29.14 6.28.14 6.29.13 6.28.13 6.29.12 6.28.12 6.29.15 6.28.15 6.29.9 6.28.9 6.28.10 6.28.8 6.29.8 6.28.4
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST18 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST19 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO2 0.27.46 0.26.46 0.27.45 0.26.45 0.27.44 0.26.44 0.27.47 0.26.47 0.27.41 0.26.41 0.26.42 0.26.40 0.27.40 0.26.36
CLK_HROW:MUX.CASCO3 0.29.46 0.28.46 0.29.45 0.28.45 0.29.44 0.28.44 0.29.47 0.28.47 0.29.41 0.28.41 0.28.42 0.28.40 0.29.40 0.28.36
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST2 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST3 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO20 6.27.30 6.26.30 6.27.29 6.26.29 6.27.28 6.26.28 6.27.31 6.26.31 6.27.25 6.26.25 6.26.26 6.26.24 6.27.24 6.26.20
CLK_HROW:MUX.CASCO21 6.29.30 6.28.30 6.29.29 6.28.29 6.29.28 6.28.28 6.29.31 6.28.31 6.29.25 6.28.25 6.28.26 6.28.24 6.29.24 6.28.20
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST20 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST21 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO22 6.27.46 6.26.46 6.27.45 6.26.45 6.27.44 6.26.44 6.27.47 6.26.47 6.27.41 6.26.41 6.26.42 6.26.40 6.27.40 6.26.36
CLK_HROW:MUX.CASCO23 6.29.46 6.28.46 6.29.45 6.28.45 6.29.44 6.28.44 6.29.47 6.28.47 6.29.41 6.28.41 6.28.42 6.28.40 6.29.40 6.28.36
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST22 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST23 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO24 6.27.62 6.26.62 6.27.61 6.26.61 6.27.60 6.26.60 6.27.63 6.26.63 6.27.57 6.26.57 6.26.58 6.26.56 6.27.56 6.26.52
CLK_HROW:MUX.CASCO25 6.29.62 6.28.62 6.29.61 6.28.61 6.29.60 6.28.60 6.29.63 6.28.63 6.29.57 6.28.57 6.28.58 6.28.56 6.29.56 6.28.52
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST24 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST25 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO26 7.27.14 7.26.14 7.27.13 7.26.13 7.27.12 7.26.12 7.27.15 7.26.15 7.27.9 7.26.9 7.26.10 7.26.8 7.27.8 7.26.4
CLK_HROW:MUX.CASCO27 7.29.14 7.28.14 7.29.13 7.28.13 7.29.12 7.28.12 7.29.15 7.28.15 7.29.9 7.28.9 7.28.10 7.28.8 7.29.8 7.28.4
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST26 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST27 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO28 7.27.30 7.26.30 7.27.29 7.26.29 7.27.28 7.26.28 7.27.31 7.26.31 7.27.25 7.26.25 7.26.26 7.26.24 7.27.24 7.26.20
CLK_HROW:MUX.CASCO29 7.29.30 7.28.30 7.29.29 7.28.29 7.29.28 7.28.28 7.29.31 7.28.31 7.29.25 7.28.25 7.28.26 7.28.24 7.29.24 7.28.20
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST28 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST29 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO30 7.27.46 7.26.46 7.27.45 7.26.45 7.27.44 7.26.44 7.27.47 7.26.47 7.27.41 7.26.41 7.26.42 7.26.40 7.27.40 7.26.36
CLK_HROW:MUX.CASCO31 7.29.46 7.28.46 7.29.45 7.28.45 7.29.44 7.28.44 7.29.47 7.28.47 7.29.41 7.28.41 7.28.42 7.28.40 7.29.40 7.28.36
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST30 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST31 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO4 0.27.62 0.26.62 0.27.61 0.26.61 0.27.60 0.26.60 0.27.63 0.26.63 0.27.57 0.26.57 0.26.58 0.26.56 0.27.56 0.26.52
CLK_HROW:MUX.CASCO5 0.29.62 0.28.62 0.29.61 0.28.61 0.29.60 0.28.60 0.29.63 0.28.63 0.29.57 0.28.57 0.28.58 0.28.56 0.29.56 0.28.52
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST4 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST5 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO6 1.27.14 1.26.14 1.27.13 1.26.13 1.27.12 1.26.12 1.27.15 1.26.15 1.27.9 1.26.9 1.26.10 1.26.8 1.27.8 1.26.4
CLK_HROW:MUX.CASCO7 1.29.14 1.28.14 1.29.13 1.28.13 1.29.12 1.28.12 1.29.15 1.28.15 1.29.9 1.28.9 1.28.10 1.28.8 1.29.8 1.28.4
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST6 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST7 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.CASCO8 1.27.30 1.26.30 1.27.29 1.26.29 1.27.28 1.26.28 1.27.31 1.26.31 1.27.25 1.26.25 1.26.26 1.26.24 1.27.24 1.26.20
CLK_HROW:MUX.CASCO9 1.29.30 1.28.30 1.29.29 1.28.29 1.29.28 1.28.28 1.29.31 1.28.31 1.29.25 1.28.25 1.28.26 1.28.24 1.29.24 1.28.20
NONE 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CASCI 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HCLK_TEST_L 0 0 0 0 0 0 0 1 0 0 0 0 1 0
HIN6_L 0 0 0 0 0 0 0 1 0 0 0 1 0 0
RCLK2_R 0 0 0 0 0 0 0 1 0 0 1 0 0 0
HIN6_R 0 0 0 0 0 0 0 1 0 1 0 0 0 0
GCLK_TEST8 0 0 0 0 0 0 0 1 1 0 0 0 0 0
HCLK_TEST_R 0 0 0 0 0 0 1 0 0 0 0 0 1 0
HIN7_L 0 0 0 0 0 0 1 0 0 0 0 1 0 0
RCLK3_R 0 0 0 0 0 0 1 0 0 0 1 0 0 0
HIN7_R 0 0 0 0 0 0 1 0 0 1 0 0 0 0
GCLK_TEST9 0 0 0 0 0 0 1 0 1 0 0 0 0 0
HIN8_L 0 0 0 0 0 1 0 0 0 0 0 0 1 0
HIN0_L 0 0 0 0 0 1 0 0 0 0 0 1 0 0
RCLK0_L 0 0 0 0 0 1 0 0 0 0 1 0 0 0
HIN0_R 0 0 0 0 0 1 0 0 0 1 0 0 0 0
HIN8_R 0 0 0 0 0 1 0 0 1 0 0 0 0 0
HIN9_L 0 0 0 0 1 0 0 0 0 0 0 0 1 0
HIN1_L 0 0 0 0 1 0 0 0 0 0 0 1 0 0
RCLK1_L 0 0 0 0 1 0 0 0 0 0 1 0 0 0
HIN1_R 0 0 0 0 1 0 0 0 0 1 0 0 0 0
HIN9_R 0 0 0 0 1 0 0 0 1 0 0 0 0 0
HIN10_L 0 0 0 1 0 0 0 0 0 0 0 0 1 0
HIN2_L 0 0 0 1 0 0 0 0 0 0 0 1 0 0
RCLK2_L 0 0 0 1 0 0 0 0 0 0 1 0 0 0
HIN2_R 0 0 0 1 0 0 0 0 0 1 0 0 0 0
HIN10_R 0 0 0 1 0 0 0 0 1 0 0 0 0 0
HIN11_L 0 0 1 0 0 0 0 0 0 0 0 0 1 0
HIN3_L 0 0 1 0 0 0 0 0 0 0 0 1 0 0
RCLK3_L 0 0 1 0 0 0 0 0 0 0 1 0 0 0
HIN3_R 0 0 1 0 0 0 0 0 0 1 0 0 0 0
HIN11_R 0 0 1 0 0 0 0 0 1 0 0 0 0 0
HIN12_L 0 1 0 0 0 0 0 0 0 0 0 0 1 0
HIN4_L 0 1 0 0 0 0 0 0 0 0 0 1 0 0
RCLK0_R 0 1 0 0 0 0 0 0 0 0 1 0 0 0
HIN4_R 0 1 0 0 0 0 0 0 0 1 0 0 0 0
HIN12_R 0 1 0 0 0 0 0 0 1 0 0 0 0 0
HIN13_L 1 0 0 0 0 0 0 0 0 0 0 0 1 0
HIN5_L 1 0 0 0 0 0 0 0 0 0 0 1 0 0
RCLK1_R 1 0 0 0 0 0 0 0 0 0 1 0 0 0
HIN5_R 1 0 0 0 0 0 0 0 0 1 0 0 0 0
HIN13_R 1 0 0 0 0 0 0 0 1 0 0 0 0 0
CLK_HROW:MUX.HCLK_TEST_E 4.28.2 4.29.1 4.28.1 4.29.0 8.29.17 8.28.17 8.29.16 8.28.16
CLK_HROW:MUX.HCLK_TEST_W 4.26.2 4.27.1 4.26.1 4.27.0 8.27.17 8.26.17 8.27.16 8.26.16
NONE 0 0 0 0 0 0 0 0
HIN0 0 0 0 1 0 0 0 1
HIN4 0 0 0 1 0 0 1 0
HIN8 0 0 0 1 0 1 0 0
HIN12 0 0 0 1 1 0 0 0
HIN1 0 0 1 0 0 0 0 1
HIN5 0 0 1 0 0 0 1 0
HIN9 0 0 1 0 0 1 0 0
HIN13 0 0 1 0 1 0 0 0
HIN2 0 1 0 0 0 0 0 1
HIN6 0 1 0 0 0 0 1 0
HIN10 0 1 0 0 0 1 0 0
HIN3 1 0 0 0 0 0 0 1
HIN7 1 0 0 0 0 0 1 0
HIN11 1 0 0 0 0 1 0 0