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PCI Express Gen2 cores

Tile PCIE

Cells: 50 IRIs: 0

Bel PCIE

virtex7 PCIE bel PCIE
PinDirectionWires
CFGAERECRCCHECKENoutputTCELL44:OUT17
CFGAERECRCGENENoutputTCELL44:OUT18
CFGAERINTERRUPTMSGNUM0inputTCELL39:IMUX.IMUX12
CFGAERINTERRUPTMSGNUM1inputTCELL39:IMUX.IMUX13
CFGAERINTERRUPTMSGNUM2inputTCELL39:IMUX.IMUX14
CFGAERINTERRUPTMSGNUM3inputTCELL39:IMUX.IMUX15
CFGAERINTERRUPTMSGNUM4inputTCELL41:IMUX.IMUX12
CFGAERROOTERRCORRERRRECEIVEDoutputTCELL45:OUT21
CFGAERROOTERRCORRERRREPORTINGENoutputTCELL44:OUT19
CFGAERROOTERRFATALERRRECEIVEDoutputTCELL46:OUT16
CFGAERROOTERRFATALERRREPORTINGENoutputTCELL45:OUT20
CFGAERROOTERRNONFATALERRRECEIVEDoutputTCELL45:OUT22
CFGAERROOTERRNONFATALERRREPORTINGENoutputTCELL45:OUT19
CFGBRIDGESERRENoutputTCELL33:OUT17
CFGCOMMANDBUSMASTERENABLEoutputTCELL24:OUT20
CFGCOMMANDINTERRUPTDISABLEoutputTCELL24:OUT21
CFGCOMMANDIOENABLEoutputTCELL49:OUT11
CFGCOMMANDMEMENABLEoutputTCELL24:OUT17
CFGCOMMANDSERRENoutputTCELL33:OUT16
CFGDEVCONTROL2ARIFORWARDENoutputTCELL48:OUT15
CFGDEVCONTROL2ATOMICEGRESSBLOCKoutputTCELL49:OUT13
CFGDEVCONTROL2ATOMICREQUESTERENoutputTCELL49:OUT12
CFGDEVCONTROL2CPLTIMEOUTDISoutputTCELL48:OUT14
CFGDEVCONTROL2CPLTIMEOUTVAL0outputTCELL47:OUT14
CFGDEVCONTROL2CPLTIMEOUTVAL1outputTCELL47:OUT15
CFGDEVCONTROL2CPLTIMEOUTVAL2outputTCELL48:OUT12
CFGDEVCONTROL2CPLTIMEOUTVAL3outputTCELL48:OUT13
CFGDEVCONTROL2IDOCPLENoutputTCELL49:OUT15
CFGDEVCONTROL2IDOREQENoutputTCELL49:OUT14
CFGDEVCONTROL2LTRENoutputTCELL24:OUT23
CFGDEVCONTROL2TLPPREFIXBLOCKoutputTCELL40:OUT21
CFGDEVCONTROLAUXPOWERENoutputTCELL40:OUT19
CFGDEVCONTROLCORRERRREPORTINGENoutputTCELL37:OUT20
CFGDEVCONTROLENABLEROoutputTCELL39:OUT18
CFGDEVCONTROLEXTTAGENoutputTCELL40:OUT17
CFGDEVCONTROLFATALERRREPORTINGENoutputTCELL38:OUT20
CFGDEVCONTROLMAXPAYLOAD0outputTCELL39:OUT19
CFGDEVCONTROLMAXPAYLOAD1outputTCELL39:OUT20
CFGDEVCONTROLMAXPAYLOAD2outputTCELL39:OUT21
CFGDEVCONTROLMAXREADREQ0outputTCELL41:OUT16
CFGDEVCONTROLMAXREADREQ1outputTCELL41:OUT17
CFGDEVCONTROLMAXREADREQ2outputTCELL41:OUT18
CFGDEVCONTROLNONFATALREPORTINGENoutputTCELL37:OUT21
CFGDEVCONTROLNOSNOOPENoutputTCELL40:OUT20
CFGDEVCONTROLPHANTOMENoutputTCELL40:OUT18
CFGDEVCONTROLURERRREPORTINGENoutputTCELL38:OUT21
CFGDEVID0inputTCELL46:IMUX.IMUX11
CFGDEVID1inputTCELL47:IMUX.IMUX8
CFGDEVID10inputTCELL49:IMUX.IMUX9
CFGDEVID11inputTCELL49:IMUX.IMUX10
CFGDEVID12inputTCELL49:IMUX.IMUX11
CFGDEVID13inputTCELL24:IMUX.IMUX21
CFGDEVID14inputTCELL24:IMUX.IMUX22
CFGDEVID15inputTCELL24:IMUX.IMUX23
CFGDEVID2inputTCELL47:IMUX.IMUX9
CFGDEVID3inputTCELL47:IMUX.IMUX10
CFGDEVID4inputTCELL47:IMUX.IMUX11
CFGDEVID5inputTCELL48:IMUX.IMUX8
CFGDEVID6inputTCELL48:IMUX.IMUX9
CFGDEVID7inputTCELL48:IMUX.IMUX10
CFGDEVID8inputTCELL48:IMUX.IMUX11
CFGDEVID9inputTCELL49:IMUX.IMUX8
CFGDEVSTATUSCORRERRDETECTEDoutputTCELL34:OUT16
CFGDEVSTATUSFATALERRDETECTEDoutputTCELL35:OUT16
CFGDEVSTATUSNONFATALERRDETECTEDoutputTCELL34:OUT17
CFGDEVSTATUSURDETECTEDoutputTCELL35:OUT17
CFGDSBUSNUMBER0inputTCELL12:IMUX.IMUX14
CFGDSBUSNUMBER1inputTCELL12:IMUX.IMUX15
CFGDSBUSNUMBER2inputTCELL12:IMUX.IMUX16
CFGDSBUSNUMBER3inputTCELL11:IMUX.IMUX13
CFGDSBUSNUMBER4inputTCELL11:IMUX.IMUX14
CFGDSBUSNUMBER5inputTCELL11:IMUX.IMUX15
CFGDSBUSNUMBER6inputTCELL11:IMUX.IMUX16
CFGDSBUSNUMBER7inputTCELL10:IMUX.IMUX13
CFGDSDEVICENUMBER0inputTCELL10:IMUX.IMUX14
CFGDSDEVICENUMBER1inputTCELL10:IMUX.IMUX15
CFGDSDEVICENUMBER2inputTCELL10:IMUX.IMUX17
CFGDSDEVICENUMBER3inputTCELL2:IMUX.IMUX20
CFGDSDEVICENUMBER4inputTCELL1:IMUX.IMUX16
CFGDSFUNCTIONNUMBER0inputTCELL1:IMUX.IMUX17
CFGDSFUNCTIONNUMBER1inputTCELL1:IMUX.IMUX18
CFGDSFUNCTIONNUMBER2inputTCELL1:IMUX.IMUX19
CFGDSN0inputTCELL30:IMUX.IMUX11
CFGDSN1inputTCELL31:IMUX.IMUX8
CFGDSN10inputTCELL33:IMUX.IMUX9
CFGDSN11inputTCELL33:IMUX.IMUX10
CFGDSN12inputTCELL33:IMUX.IMUX11
CFGDSN13inputTCELL34:IMUX.IMUX8
CFGDSN14inputTCELL34:IMUX.IMUX9
CFGDSN15inputTCELL34:IMUX.IMUX10
CFGDSN16inputTCELL34:IMUX.IMUX11
CFGDSN17inputTCELL35:IMUX.IMUX8
CFGDSN18inputTCELL35:IMUX.IMUX9
CFGDSN19inputTCELL35:IMUX.IMUX10
CFGDSN2inputTCELL31:IMUX.IMUX9
CFGDSN20inputTCELL35:IMUX.IMUX11
CFGDSN21inputTCELL36:IMUX.IMUX8
CFGDSN22inputTCELL36:IMUX.IMUX9
CFGDSN23inputTCELL36:IMUX.IMUX10
CFGDSN24inputTCELL36:IMUX.IMUX11
CFGDSN25inputTCELL37:IMUX.IMUX8
CFGDSN26inputTCELL37:IMUX.IMUX9
CFGDSN27inputTCELL37:IMUX.IMUX10
CFGDSN28inputTCELL37:IMUX.IMUX11
CFGDSN29inputTCELL38:IMUX.IMUX8
CFGDSN3inputTCELL31:IMUX.IMUX10
CFGDSN30inputTCELL38:IMUX.IMUX9
CFGDSN31inputTCELL38:IMUX.IMUX10
CFGDSN32inputTCELL38:IMUX.IMUX11
CFGDSN33inputTCELL39:IMUX.IMUX8
CFGDSN34inputTCELL39:IMUX.IMUX9
CFGDSN35inputTCELL39:IMUX.IMUX10
CFGDSN36inputTCELL39:IMUX.IMUX11
CFGDSN37inputTCELL40:IMUX.IMUX8
CFGDSN38inputTCELL40:IMUX.IMUX9
CFGDSN39inputTCELL40:IMUX.IMUX10
CFGDSN4inputTCELL31:IMUX.IMUX11
CFGDSN40inputTCELL40:IMUX.IMUX11
CFGDSN41inputTCELL41:IMUX.IMUX8
CFGDSN42inputTCELL41:IMUX.IMUX9
CFGDSN43inputTCELL41:IMUX.IMUX10
CFGDSN44inputTCELL41:IMUX.IMUX11
CFGDSN45inputTCELL42:IMUX.IMUX8
CFGDSN46inputTCELL42:IMUX.IMUX9
CFGDSN47inputTCELL42:IMUX.IMUX10
CFGDSN48inputTCELL42:IMUX.IMUX11
CFGDSN49inputTCELL43:IMUX.IMUX8
CFGDSN5inputTCELL32:IMUX.IMUX8
CFGDSN50inputTCELL43:IMUX.IMUX9
CFGDSN51inputTCELL43:IMUX.IMUX10
CFGDSN52inputTCELL43:IMUX.IMUX11
CFGDSN53inputTCELL44:IMUX.IMUX8
CFGDSN54inputTCELL44:IMUX.IMUX9
CFGDSN55inputTCELL44:IMUX.IMUX10
CFGDSN56inputTCELL44:IMUX.IMUX11
CFGDSN57inputTCELL45:IMUX.IMUX8
CFGDSN58inputTCELL45:IMUX.IMUX9
CFGDSN59inputTCELL45:IMUX.IMUX10
CFGDSN6inputTCELL32:IMUX.IMUX9
CFGDSN60inputTCELL45:IMUX.IMUX11
CFGDSN61inputTCELL46:IMUX.IMUX8
CFGDSN62inputTCELL46:IMUX.IMUX9
CFGDSN63inputTCELL46:IMUX.IMUX10
CFGDSN7inputTCELL32:IMUX.IMUX10
CFGDSN8inputTCELL32:IMUX.IMUX11
CFGDSN9inputTCELL33:IMUX.IMUX8
CFGERRACSNinputTCELL16:IMUX.IMUX12
CFGERRAERHEADERLOG0inputTCELL22:IMUX.IMUX19
CFGERRAERHEADERLOG1inputTCELL22:IMUX.IMUX20
CFGERRAERHEADERLOG10inputTCELL23:IMUX.IMUX24
CFGERRAERHEADERLOG100inputTCELL31:IMUX.IMUX6
CFGERRAERHEADERLOG101inputTCELL31:IMUX.IMUX7
CFGERRAERHEADERLOG102inputTCELL32:IMUX.IMUX4
CFGERRAERHEADERLOG103inputTCELL32:IMUX.IMUX5
CFGERRAERHEADERLOG104inputTCELL32:IMUX.IMUX6
CFGERRAERHEADERLOG105inputTCELL32:IMUX.IMUX7
CFGERRAERHEADERLOG106inputTCELL33:IMUX.IMUX4
CFGERRAERHEADERLOG107inputTCELL33:IMUX.IMUX5
CFGERRAERHEADERLOG108inputTCELL33:IMUX.IMUX6
CFGERRAERHEADERLOG109inputTCELL33:IMUX.IMUX7
CFGERRAERHEADERLOG11inputTCELL22:IMUX.IMUX21
CFGERRAERHEADERLOG110inputTCELL34:IMUX.IMUX4
CFGERRAERHEADERLOG111inputTCELL34:IMUX.IMUX5
CFGERRAERHEADERLOG112inputTCELL34:IMUX.IMUX6
CFGERRAERHEADERLOG113inputTCELL34:IMUX.IMUX7
CFGERRAERHEADERLOG114inputTCELL35:IMUX.IMUX4
CFGERRAERHEADERLOG115inputTCELL35:IMUX.IMUX5
CFGERRAERHEADERLOG116inputTCELL35:IMUX.IMUX6
CFGERRAERHEADERLOG117inputTCELL35:IMUX.IMUX7
CFGERRAERHEADERLOG118inputTCELL36:IMUX.IMUX4
CFGERRAERHEADERLOG119inputTCELL36:IMUX.IMUX5
CFGERRAERHEADERLOG12inputTCELL16:IMUX.IMUX13
CFGERRAERHEADERLOG120inputTCELL36:IMUX.IMUX6
CFGERRAERHEADERLOG121inputTCELL36:IMUX.IMUX7
CFGERRAERHEADERLOG122inputTCELL37:IMUX.IMUX4
CFGERRAERHEADERLOG123inputTCELL37:IMUX.IMUX5
CFGERRAERHEADERLOG124inputTCELL37:IMUX.IMUX6
CFGERRAERHEADERLOG125inputTCELL37:IMUX.IMUX7
CFGERRAERHEADERLOG126inputTCELL38:IMUX.IMUX4
CFGERRAERHEADERLOG127inputTCELL38:IMUX.IMUX5
CFGERRAERHEADERLOG13inputTCELL16:IMUX.IMUX14
CFGERRAERHEADERLOG14inputTCELL14:IMUX.IMUX9
CFGERRAERHEADERLOG15inputTCELL14:IMUX.IMUX10
CFGERRAERHEADERLOG16inputTCELL14:IMUX.IMUX11
CFGERRAERHEADERLOG17inputTCELL14:IMUX.IMUX12
CFGERRAERHEADERLOG18inputTCELL13:IMUX.IMUX9
CFGERRAERHEADERLOG19inputTCELL13:IMUX.IMUX10
CFGERRAERHEADERLOG2inputTCELL23:IMUX.IMUX20
CFGERRAERHEADERLOG20inputTCELL13:IMUX.IMUX11
CFGERRAERHEADERLOG21inputTCELL13:IMUX.IMUX12
CFGERRAERHEADERLOG22inputTCELL12:IMUX.IMUX9
CFGERRAERHEADERLOG23inputTCELL12:IMUX.IMUX10
CFGERRAERHEADERLOG24inputTCELL12:IMUX.IMUX11
CFGERRAERHEADERLOG25inputTCELL12:IMUX.IMUX12
CFGERRAERHEADERLOG26inputTCELL11:IMUX.IMUX9
CFGERRAERHEADERLOG27inputTCELL11:IMUX.IMUX10
CFGERRAERHEADERLOG28inputTCELL11:IMUX.IMUX11
CFGERRAERHEADERLOG29inputTCELL11:IMUX.IMUX12
CFGERRAERHEADERLOG3inputTCELL23:IMUX.IMUX21
CFGERRAERHEADERLOG30inputTCELL10:IMUX.IMUX9
CFGERRAERHEADERLOG31inputTCELL10:IMUX.IMUX10
CFGERRAERHEADERLOG32inputTCELL10:IMUX.IMUX11
CFGERRAERHEADERLOG33inputTCELL10:IMUX.IMUX12
CFGERRAERHEADERLOG34inputTCELL9:IMUX.IMUX11
CFGERRAERHEADERLOG35inputTCELL9:IMUX.IMUX12
CFGERRAERHEADERLOG36inputTCELL9:IMUX.IMUX13
CFGERRAERHEADERLOG37inputTCELL9:IMUX.IMUX14
CFGERRAERHEADERLOG38inputTCELL8:IMUX.IMUX9
CFGERRAERHEADERLOG39inputTCELL8:IMUX.IMUX10
CFGERRAERHEADERLOG4inputTCELL23:IMUX.IMUX22
CFGERRAERHEADERLOG40inputTCELL8:IMUX.IMUX11
CFGERRAERHEADERLOG41inputTCELL8:IMUX.IMUX12
CFGERRAERHEADERLOG42inputTCELL7:IMUX.IMUX14
CFGERRAERHEADERLOG43inputTCELL7:IMUX.IMUX15
CFGERRAERHEADERLOG44inputTCELL7:IMUX.IMUX16
CFGERRAERHEADERLOG45inputTCELL7:IMUX.IMUX17
CFGERRAERHEADERLOG46inputTCELL6:IMUX.IMUX13
CFGERRAERHEADERLOG47inputTCELL6:IMUX.IMUX14
CFGERRAERHEADERLOG48inputTCELL6:IMUX.IMUX15
CFGERRAERHEADERLOG49inputTCELL6:IMUX.IMUX17
CFGERRAERHEADERLOG5inputTCELL23:IMUX.IMUX23
CFGERRAERHEADERLOG50inputTCELL5:IMUX.IMUX11
CFGERRAERHEADERLOG51inputTCELL5:IMUX.IMUX12
CFGERRAERHEADERLOG52inputTCELL5:IMUX.IMUX13
CFGERRAERHEADERLOG53inputTCELL5:IMUX.IMUX14
CFGERRAERHEADERLOG54inputTCELL4:IMUX.IMUX8
CFGERRAERHEADERLOG55inputTCELL4:IMUX.IMUX9
CFGERRAERHEADERLOG56inputTCELL4:IMUX.IMUX10
CFGERRAERHEADERLOG57inputTCELL4:IMUX.IMUX11
CFGERRAERHEADERLOG58inputTCELL3:IMUX.IMUX13
CFGERRAERHEADERLOG59inputTCELL3:IMUX.IMUX14
CFGERRAERHEADERLOG6inputTCELL24:IMUX.IMUX13
CFGERRAERHEADERLOG60inputTCELL3:IMUX.IMUX15
CFGERRAERHEADERLOG61inputTCELL3:IMUX.IMUX16
CFGERRAERHEADERLOG62inputTCELL2:IMUX.IMUX16
CFGERRAERHEADERLOG63inputTCELL2:IMUX.IMUX17
CFGERRAERHEADERLOG64inputTCELL2:IMUX.IMUX18
CFGERRAERHEADERLOG65inputTCELL2:IMUX.IMUX19
CFGERRAERHEADERLOG66inputTCELL1:IMUX.IMUX12
CFGERRAERHEADERLOG67inputTCELL1:IMUX.IMUX13
CFGERRAERHEADERLOG68inputTCELL1:IMUX.IMUX14
CFGERRAERHEADERLOG69inputTCELL1:IMUX.IMUX15
CFGERRAERHEADERLOG7inputTCELL24:IMUX.IMUX14
CFGERRAERHEADERLOG70inputTCELL0:IMUX.IMUX12
CFGERRAERHEADERLOG71inputTCELL0:IMUX.IMUX13
CFGERRAERHEADERLOG72inputTCELL0:IMUX.IMUX14
CFGERRAERHEADERLOG73inputTCELL0:IMUX.IMUX15
CFGERRAERHEADERLOG74inputTCELL25:IMUX.IMUX13
CFGERRAERHEADERLOG75inputTCELL25:IMUX.IMUX14
CFGERRAERHEADERLOG76inputTCELL25:IMUX.IMUX15
CFGERRAERHEADERLOG77inputTCELL25:IMUX.IMUX16
CFGERRAERHEADERLOG78inputTCELL26:IMUX.IMUX4
CFGERRAERHEADERLOG79inputTCELL26:IMUX.IMUX5
CFGERRAERHEADERLOG8inputTCELL24:IMUX.IMUX15
CFGERRAERHEADERLOG80inputTCELL26:IMUX.IMUX6
CFGERRAERHEADERLOG81inputTCELL26:IMUX.IMUX7
CFGERRAERHEADERLOG82inputTCELL27:IMUX.IMUX4
CFGERRAERHEADERLOG83inputTCELL27:IMUX.IMUX5
CFGERRAERHEADERLOG84inputTCELL27:IMUX.IMUX6
CFGERRAERHEADERLOG85inputTCELL27:IMUX.IMUX7
CFGERRAERHEADERLOG86inputTCELL28:IMUX.IMUX4
CFGERRAERHEADERLOG87inputTCELL28:IMUX.IMUX5
CFGERRAERHEADERLOG88inputTCELL28:IMUX.IMUX6
CFGERRAERHEADERLOG89inputTCELL28:IMUX.IMUX7
CFGERRAERHEADERLOG9inputTCELL24:IMUX.IMUX16
CFGERRAERHEADERLOG90inputTCELL29:IMUX.IMUX4
CFGERRAERHEADERLOG91inputTCELL29:IMUX.IMUX5
CFGERRAERHEADERLOG92inputTCELL29:IMUX.IMUX6
CFGERRAERHEADERLOG93inputTCELL29:IMUX.IMUX7
CFGERRAERHEADERLOG94inputTCELL30:IMUX.IMUX4
CFGERRAERHEADERLOG95inputTCELL30:IMUX.IMUX5
CFGERRAERHEADERLOG96inputTCELL30:IMUX.IMUX6
CFGERRAERHEADERLOG97inputTCELL30:IMUX.IMUX7
CFGERRAERHEADERLOG98inputTCELL31:IMUX.IMUX4
CFGERRAERHEADERLOG99inputTCELL31:IMUX.IMUX5
CFGERRAERHEADERLOGSETNoutputTCELL12:OUT17
CFGERRATOMICEGRESSBLOCKEDNinputTCELL17:IMUX.IMUX13
CFGERRCORNinputTCELL15:IMUX.IMUX9
CFGERRCPLABORTNinputTCELL16:IMUX.IMUX9
CFGERRCPLRDYNoutputTCELL10:OUT14
CFGERRCPLTIMEOUTNinputTCELL15:IMUX.IMUX12
CFGERRCPLUNEXPECTNinputTCELL16:IMUX.IMUX10
CFGERRECRCNinputTCELL15:IMUX.IMUX11
CFGERRINTERNALCORNinputTCELL17:IMUX.IMUX17
CFGERRINTERNALUNCORNinputTCELL17:IMUX.IMUX15
CFGERRLOCKEDNinputTCELL22:IMUX.IMUX17
CFGERRMALFORMEDNinputTCELL14:IMUX.IMUX8
CFGERRMCBLOCKEDNinputTCELL17:IMUX.IMUX14
CFGERRNORECOVERYNinputTCELL22:IMUX.IMUX18
CFGERRPOISONEDNinputTCELL16:IMUX.IMUX11
CFGERRPOSTEDNinputTCELL18:IMUX.IMUX17
CFGERRTLPCPLHEADER0inputTCELL38:IMUX.IMUX6
CFGERRTLPCPLHEADER1inputTCELL38:IMUX.IMUX7
CFGERRTLPCPLHEADER10inputTCELL41:IMUX.IMUX4
CFGERRTLPCPLHEADER11inputTCELL41:IMUX.IMUX5
CFGERRTLPCPLHEADER12inputTCELL41:IMUX.IMUX6
CFGERRTLPCPLHEADER13inputTCELL41:IMUX.IMUX7
CFGERRTLPCPLHEADER14inputTCELL42:IMUX.IMUX4
CFGERRTLPCPLHEADER15inputTCELL42:IMUX.IMUX5
CFGERRTLPCPLHEADER16inputTCELL42:IMUX.IMUX6
CFGERRTLPCPLHEADER17inputTCELL42:IMUX.IMUX7
CFGERRTLPCPLHEADER18inputTCELL43:IMUX.IMUX4
CFGERRTLPCPLHEADER19inputTCELL43:IMUX.IMUX5
CFGERRTLPCPLHEADER2inputTCELL39:IMUX.IMUX4
CFGERRTLPCPLHEADER20inputTCELL43:IMUX.IMUX6
CFGERRTLPCPLHEADER21inputTCELL43:IMUX.IMUX7
CFGERRTLPCPLHEADER22inputTCELL44:IMUX.IMUX4
CFGERRTLPCPLHEADER23inputTCELL44:IMUX.IMUX5
CFGERRTLPCPLHEADER24inputTCELL44:IMUX.IMUX6
CFGERRTLPCPLHEADER25inputTCELL44:IMUX.IMUX7
CFGERRTLPCPLHEADER26inputTCELL45:IMUX.IMUX4
CFGERRTLPCPLHEADER27inputTCELL45:IMUX.IMUX5
CFGERRTLPCPLHEADER28inputTCELL45:IMUX.IMUX6
CFGERRTLPCPLHEADER29inputTCELL45:IMUX.IMUX7
CFGERRTLPCPLHEADER3inputTCELL39:IMUX.IMUX5
CFGERRTLPCPLHEADER30inputTCELL46:IMUX.IMUX4
CFGERRTLPCPLHEADER31inputTCELL46:IMUX.IMUX5
CFGERRTLPCPLHEADER32inputTCELL46:IMUX.IMUX6
CFGERRTLPCPLHEADER33inputTCELL46:IMUX.IMUX7
CFGERRTLPCPLHEADER34inputTCELL47:IMUX.IMUX4
CFGERRTLPCPLHEADER35inputTCELL47:IMUX.IMUX5
CFGERRTLPCPLHEADER36inputTCELL47:IMUX.IMUX6
CFGERRTLPCPLHEADER37inputTCELL47:IMUX.IMUX7
CFGERRTLPCPLHEADER38inputTCELL48:IMUX.IMUX4
CFGERRTLPCPLHEADER39inputTCELL48:IMUX.IMUX5
CFGERRTLPCPLHEADER4inputTCELL39:IMUX.IMUX6
CFGERRTLPCPLHEADER40inputTCELL48:IMUX.IMUX6
CFGERRTLPCPLHEADER41inputTCELL48:IMUX.IMUX7
CFGERRTLPCPLHEADER42inputTCELL49:IMUX.IMUX4
CFGERRTLPCPLHEADER43inputTCELL49:IMUX.IMUX5
CFGERRTLPCPLHEADER44inputTCELL49:IMUX.IMUX6
CFGERRTLPCPLHEADER45inputTCELL49:IMUX.IMUX7
CFGERRTLPCPLHEADER46inputTCELL24:IMUX.IMUX17
CFGERRTLPCPLHEADER47inputTCELL24:IMUX.IMUX18
CFGERRTLPCPLHEADER5inputTCELL39:IMUX.IMUX7
CFGERRTLPCPLHEADER6inputTCELL40:IMUX.IMUX4
CFGERRTLPCPLHEADER7inputTCELL40:IMUX.IMUX5
CFGERRTLPCPLHEADER8inputTCELL40:IMUX.IMUX6
CFGERRTLPCPLHEADER9inputTCELL40:IMUX.IMUX7
CFGERRURNinputTCELL15:IMUX.IMUX10
CFGFORCECOMMONCLOCKOFFinputTCELL30:IMUX.IMUX9
CFGFORCEEXTENDEDSYNCONinputTCELL30:IMUX.IMUX10
CFGFORCEMPS0inputTCELL29:IMUX.IMUX10
CFGFORCEMPS1inputTCELL29:IMUX.IMUX11
CFGFORCEMPS2inputTCELL30:IMUX.IMUX8
CFGINTERRUPTASSERTNinputTCELL13:IMUX.IMUX16
CFGINTERRUPTDI0inputTCELL24:IMUX.IMUX20
CFGINTERRUPTDI1inputTCELL14:IMUX.IMUX13
CFGINTERRUPTDI2inputTCELL14:IMUX.IMUX14
CFGINTERRUPTDI3inputTCELL14:IMUX.IMUX15
CFGINTERRUPTDI4inputTCELL14:IMUX.IMUX16
CFGINTERRUPTDI5inputTCELL13:IMUX.IMUX13
CFGINTERRUPTDI6inputTCELL13:IMUX.IMUX14
CFGINTERRUPTDI7inputTCELL13:IMUX.IMUX15
CFGINTERRUPTDO0outputTCELL30:OUT17
CFGINTERRUPTDO1outputTCELL33:OUT12
CFGINTERRUPTDO2outputTCELL33:OUT13
CFGINTERRUPTDO3outputTCELL33:OUT14
CFGINTERRUPTDO4outputTCELL33:OUT15
CFGINTERRUPTDO5outputTCELL34:OUT12
CFGINTERRUPTDO6outputTCELL34:OUT13
CFGINTERRUPTDO7outputTCELL34:OUT14
CFGINTERRUPTMMENABLE0outputTCELL10:OUT16
CFGINTERRUPTMMENABLE1outputTCELL10:OUT17
CFGINTERRUPTMMENABLE2outputTCELL26:OUT16
CFGINTERRUPTMSIENABLEoutputTCELL26:OUT17
CFGINTERRUPTMSIXENABLEoutputTCELL29:OUT17
CFGINTERRUPTMSIXFMoutputTCELL30:OUT16
CFGINTERRUPTNinputTCELL24:IMUX.IMUX19
CFGINTERRUPTRDYNoutputTCELL10:OUT15
CFGINTERRUPTSTATNinputTCELL12:IMUX.IMUX13
CFGLINKCONTROLASPMCONTROL0outputTCELL44:OUT15
CFGLINKCONTROLASPMCONTROL1outputTCELL45:OUT13
CFGLINKCONTROLAUTOBANDWIDTHINTENoutputTCELL47:OUT13
CFGLINKCONTROLBANDWIDTHINTENoutputTCELL47:OUT12
CFGLINKCONTROLCLOCKPMENoutputTCELL46:OUT14
CFGLINKCONTROLCOMMONCLOCKoutputTCELL46:OUT12
CFGLINKCONTROLEXTENDEDSYNCoutputTCELL46:OUT13
CFGLINKCONTROLHWAUTOWIDTHDISoutputTCELL46:OUT15
CFGLINKCONTROLLINKDISABLEoutputTCELL45:OUT15
CFGLINKCONTROLRCBoutputTCELL45:OUT14
CFGLINKCONTROLRETRAINLINKoutputTCELL45:OUT17
CFGLINKSTATUSAUTOBANDWIDTHSTATUSoutputTCELL44:OUT14
CFGLINKSTATUSBANDWIDTHSTATUSoutputTCELL44:OUT13
CFGLINKSTATUSCURRENTSPEED0outputTCELL41:OUT19
CFGLINKSTATUSCURRENTSPEED1outputTCELL42:OUT20
CFGLINKSTATUSDLLACTIVEoutputTCELL44:OUT12
CFGLINKSTATUSLINKTRAININGoutputTCELL43:OUT21
CFGLINKSTATUSNEGOTIATEDWIDTH0outputTCELL42:OUT21
CFGLINKSTATUSNEGOTIATEDWIDTH1outputTCELL43:OUT18
CFGLINKSTATUSNEGOTIATEDWIDTH2outputTCELL43:OUT19
CFGLINKSTATUSNEGOTIATEDWIDTH3outputTCELL43:OUT20
CFGMGMTBYTEENN0inputTCELL10:IMUX.IMUX6
CFGMGMTBYTEENN1inputTCELL10:IMUX.IMUX7
CFGMGMTBYTEENN2inputTCELL10:IMUX.IMUX8
CFGMGMTBYTEENN3inputTCELL11:IMUX.IMUX5
CFGMGMTDI0inputTCELL2:IMUX.IMUX13
CFGMGMTDI1inputTCELL2:IMUX.IMUX14
CFGMGMTDI10inputTCELL4:IMUX.IMUX7
CFGMGMTDI11inputTCELL5:IMUX.IMUX7
CFGMGMTDI12inputTCELL5:IMUX.IMUX8
CFGMGMTDI13inputTCELL5:IMUX.IMUX9
CFGMGMTDI14inputTCELL5:IMUX.IMUX10
CFGMGMTDI15inputTCELL6:IMUX.IMUX9
CFGMGMTDI16inputTCELL6:IMUX.IMUX10
CFGMGMTDI17inputTCELL6:IMUX.IMUX11
CFGMGMTDI18inputTCELL6:IMUX.IMUX12
CFGMGMTDI19inputTCELL7:IMUX.IMUX10
CFGMGMTDI2inputTCELL2:IMUX.IMUX15
CFGMGMTDI20inputTCELL7:IMUX.IMUX11
CFGMGMTDI21inputTCELL7:IMUX.IMUX12
CFGMGMTDI22inputTCELL7:IMUX.IMUX13
CFGMGMTDI23inputTCELL8:IMUX.IMUX5
CFGMGMTDI24inputTCELL8:IMUX.IMUX6
CFGMGMTDI25inputTCELL8:IMUX.IMUX7
CFGMGMTDI26inputTCELL8:IMUX.IMUX8
CFGMGMTDI27inputTCELL9:IMUX.IMUX7
CFGMGMTDI28inputTCELL9:IMUX.IMUX8
CFGMGMTDI29inputTCELL9:IMUX.IMUX9
CFGMGMTDI3inputTCELL3:IMUX.IMUX9
CFGMGMTDI30inputTCELL9:IMUX.IMUX10
CFGMGMTDI31inputTCELL10:IMUX.IMUX5
CFGMGMTDI4inputTCELL3:IMUX.IMUX10
CFGMGMTDI5inputTCELL3:IMUX.IMUX11
CFGMGMTDI6inputTCELL3:IMUX.IMUX12
CFGMGMTDI7inputTCELL4:IMUX.IMUX4
CFGMGMTDI8inputTCELL4:IMUX.IMUX5
CFGMGMTDI9inputTCELL4:IMUX.IMUX6
CFGMGMTDO0outputTCELL10:OUT11
CFGMGMTDO1outputTCELL10:OUT12
CFGMGMTDO10outputTCELL13:OUT15
CFGMGMTDO11outputTCELL13:OUT17
CFGMGMTDO12outputTCELL14:OUT12
CFGMGMTDO13outputTCELL14:OUT14
CFGMGMTDO14outputTCELL14:OUT16
CFGMGMTDO15outputTCELL14:OUT17
CFGMGMTDO16outputTCELL21:OUT21
CFGMGMTDO17outputTCELL22:OUT16
CFGMGMTDO18outputTCELL22:OUT17
CFGMGMTDO19outputTCELL22:OUT19
CFGMGMTDO2outputTCELL10:OUT13
CFGMGMTDO20outputTCELL23:OUT11
CFGMGMTDO21outputTCELL23:OUT12
CFGMGMTDO22outputTCELL23:OUT13
CFGMGMTDO23outputTCELL23:OUT15
CFGMGMTDO24outputTCELL24:OUT13
CFGMGMTDO25outputTCELL24:OUT14
CFGMGMTDO26outputTCELL24:OUT15
CFGMGMTDO27outputTCELL24:OUT16
CFGMGMTDO28outputTCELL23:OUT16
CFGMGMTDO29outputTCELL23:OUT17
CFGMGMTDO3outputTCELL11:OUT13
CFGMGMTDO30outputTCELL23:OUT18
CFGMGMTDO31outputTCELL14:OUT18
CFGMGMTDO4outputTCELL11:OUT14
CFGMGMTDO5outputTCELL11:OUT15
CFGMGMTDO6outputTCELL12:OUT8
CFGMGMTDO7outputTCELL12:OUT10
CFGMGMTDO8outputTCELL12:OUT12
CFGMGMTDO9outputTCELL12:OUT14
CFGMGMTDWADDR0inputTCELL11:IMUX.IMUX6
CFGMGMTDWADDR1inputTCELL11:IMUX.IMUX7
CFGMGMTDWADDR2inputTCELL11:IMUX.IMUX8
CFGMGMTDWADDR3inputTCELL12:IMUX.IMUX5
CFGMGMTDWADDR4inputTCELL12:IMUX.IMUX6
CFGMGMTDWADDR5inputTCELL12:IMUX.IMUX7
CFGMGMTDWADDR6inputTCELL12:IMUX.IMUX8
CFGMGMTDWADDR7inputTCELL13:IMUX.IMUX5
CFGMGMTDWADDR8inputTCELL13:IMUX.IMUX6
CFGMGMTDWADDR9inputTCELL13:IMUX.IMUX7
CFGMGMTRDENNinputTCELL14:IMUX.IMUX7
CFGMGMTRDWRDONENoutputTCELL12:OUT16
CFGMGMTWRENNinputTCELL14:IMUX.IMUX6
CFGMGMTWRREADONLYNinputTCELL14:IMUX.IMUX5
CFGMGMTWRRW1CASRWNinputTCELL13:IMUX.IMUX8
CFGMSGDATA0outputTCELL35:OUT12
CFGMSGDATA1outputTCELL35:OUT13
CFGMSGDATA10outputTCELL39:OUT12
CFGMSGDATA11outputTCELL39:OUT14
CFGMSGDATA12outputTCELL39:OUT16
CFGMSGDATA13outputTCELL39:OUT17
CFGMSGDATA14outputTCELL40:OUT12
CFGMSGDATA15outputTCELL40:OUT13
CFGMSGDATA2outputTCELL35:OUT14
CFGMSGDATA3outputTCELL35:OUT15
CFGMSGDATA4outputTCELL36:OUT17
CFGMSGDATA5outputTCELL36:OUT18
CFGMSGDATA6outputTCELL37:OUT16
CFGMSGDATA7outputTCELL37:OUT17
CFGMSGDATA8outputTCELL37:OUT18
CFGMSGDATA9outputTCELL37:OUT19
CFGMSGRECEIVEDoutputTCELL34:OUT15
CFGMSGRECEIVEDASSERTINTAoutputTCELL41:OUT10
CFGMSGRECEIVEDASSERTINTBoutputTCELL41:OUT14
CFGMSGRECEIVEDASSERTINTCoutputTCELL42:OUT17
CFGMSGRECEIVEDASSERTINTDoutputTCELL42:OUT19
CFGMSGRECEIVEDDEASSERTINTAoutputTCELL41:OUT12
CFGMSGRECEIVEDDEASSERTINTBoutputTCELL42:OUT15
CFGMSGRECEIVEDDEASSERTINTCoutputTCELL42:OUT18
CFGMSGRECEIVEDDEASSERTINTDoutputTCELL43:OUT12
CFGMSGRECEIVEDERRCORoutputTCELL40:OUT14
CFGMSGRECEIVEDERRFATALoutputTCELL41:OUT8
CFGMSGRECEIVEDERRNONFATALoutputTCELL40:OUT15
CFGMSGRECEIVEDPMASNAKoutputTCELL44:OUT10
CFGMSGRECEIVEDPMETOoutputTCELL43:OUT17
CFGMSGRECEIVEDPMETOACKoutputTCELL43:OUT16
CFGMSGRECEIVEDPMPMEoutputTCELL43:OUT14
CFGMSGRECEIVEDSETSLOTPOWERLIMIToutputTCELL44:OUT8
CFGMSGRECEIVEDUNLOCKoutputTCELL44:OUT9
CFGPCIECAPINTERRUPTMSGNUM0inputTCELL28:IMUX.IMUX8
CFGPCIECAPINTERRUPTMSGNUM1inputTCELL28:IMUX.IMUX9
CFGPCIECAPINTERRUPTMSGNUM2inputTCELL28:IMUX.IMUX10
CFGPCIECAPINTERRUPTMSGNUM3inputTCELL28:IMUX.IMUX11
CFGPCIECAPINTERRUPTMSGNUM4inputTCELL29:IMUX.IMUX8
CFGPCIELINKSTATE0outputTCELL44:OUT11
CFGPCIELINKSTATE1outputTCELL45:OUT9
CFGPCIELINKSTATE2outputTCELL45:OUT10
CFGPMCSRPMEENoutputTCELL47:OUT8
CFGPMCSRPMESTATUSoutputTCELL47:OUT9
CFGPMCSRPOWERSTATE0outputTCELL46:OUT10
CFGPMCSRPOWERSTATE1outputTCELL46:OUT11
CFGPMFORCESTATE0inputTCELL26:IMUX.IMUX11
CFGPMFORCESTATE1inputTCELL27:IMUX.IMUX8
CFGPMFORCESTATEENNinputTCELL26:IMUX.IMUX10
CFGPMHALTASPML0SNinputTCELL26:IMUX.IMUX8
CFGPMHALTASPML1NinputTCELL26:IMUX.IMUX9
CFGPMRCVASREQL1NoutputTCELL45:OUT11
CFGPMRCVENTERL1NoutputTCELL45:OUT12
CFGPMRCVENTERL23NoutputTCELL46:OUT8
CFGPMRCVREQACKNoutputTCELL46:OUT9
CFGPMSENDPMETONinputTCELL27:IMUX.IMUX11
CFGPMTURNOFFOKNinputTCELL27:IMUX.IMUX10
CFGPMWAKENinputTCELL27:IMUX.IMUX9
CFGPORTNUMBER0inputTCELL0:IMUX.IMUX16
CFGPORTNUMBER1inputTCELL0:IMUX.IMUX17
CFGPORTNUMBER2inputTCELL0:IMUX.IMUX18
CFGPORTNUMBER3inputTCELL0:IMUX.IMUX19
CFGPORTNUMBER4inputTCELL25:IMUX.IMUX17
CFGPORTNUMBER5inputTCELL25:IMUX.IMUX18
CFGPORTNUMBER6inputTCELL25:IMUX.IMUX19
CFGPORTNUMBER7inputTCELL25:IMUX.IMUX20
CFGREVID0inputTCELL26:IMUX.IMUX12
CFGREVID1inputTCELL26:IMUX.IMUX13
CFGREVID2inputTCELL26:IMUX.IMUX14
CFGREVID3inputTCELL26:IMUX.IMUX15
CFGREVID4inputTCELL27:IMUX.IMUX12
CFGREVID5inputTCELL27:IMUX.IMUX13
CFGREVID6inputTCELL27:IMUX.IMUX14
CFGREVID7inputTCELL27:IMUX.IMUX15
CFGROOTCONTROLPMEINTENoutputTCELL44:OUT16
CFGROOTCONTROLSYSERRCORRERRENoutputTCELL41:OUT20
CFGROOTCONTROLSYSERRFATALERRENoutputTCELL43:OUT22
CFGROOTCONTROLSYSERRNONFATALERRENoutputTCELL41:OUT21
CFGSLOTCONTROLELECTROMECHILCTLPULSEoutputTCELL40:OUT22
CFGSUBSYSID0inputTCELL28:IMUX.IMUX12
CFGSUBSYSID1inputTCELL28:IMUX.IMUX13
CFGSUBSYSID10inputTCELL32:IMUX.IMUX12
CFGSUBSYSID11inputTCELL32:IMUX.IMUX13
CFGSUBSYSID12inputTCELL32:IMUX.IMUX14
CFGSUBSYSID13inputTCELL32:IMUX.IMUX15
CFGSUBSYSID14inputTCELL34:IMUX.IMUX12
CFGSUBSYSID15inputTCELL34:IMUX.IMUX13
CFGSUBSYSID2inputTCELL28:IMUX.IMUX14
CFGSUBSYSID3inputTCELL28:IMUX.IMUX15
CFGSUBSYSID4inputTCELL30:IMUX.IMUX12
CFGSUBSYSID5inputTCELL30:IMUX.IMUX13
CFGSUBSYSID6inputTCELL31:IMUX.IMUX12
CFGSUBSYSID7inputTCELL31:IMUX.IMUX13
CFGSUBSYSID8inputTCELL31:IMUX.IMUX14
CFGSUBSYSID9inputTCELL31:IMUX.IMUX15
CFGSUBSYSVENDID0inputTCELL35:IMUX.IMUX12
CFGSUBSYSVENDID1inputTCELL35:IMUX.IMUX13
CFGSUBSYSVENDID10inputTCELL37:IMUX.IMUX14
CFGSUBSYSVENDID11inputTCELL37:IMUX.IMUX15
CFGSUBSYSVENDID12inputTCELL38:IMUX.IMUX12
CFGSUBSYSVENDID13inputTCELL38:IMUX.IMUX13
CFGSUBSYSVENDID14inputTCELL38:IMUX.IMUX14
CFGSUBSYSVENDID15inputTCELL38:IMUX.IMUX15
CFGSUBSYSVENDID2inputTCELL35:IMUX.IMUX14
CFGSUBSYSVENDID3inputTCELL35:IMUX.IMUX15
CFGSUBSYSVENDID4inputTCELL36:IMUX.IMUX12
CFGSUBSYSVENDID5inputTCELL36:IMUX.IMUX13
CFGSUBSYSVENDID6inputTCELL36:IMUX.IMUX14
CFGSUBSYSVENDID7inputTCELL36:IMUX.IMUX15
CFGSUBSYSVENDID8inputTCELL37:IMUX.IMUX12
CFGSUBSYSVENDID9inputTCELL37:IMUX.IMUX13
CFGTRANSACTIONoutputTCELL47:OUT10
CFGTRANSACTIONADDR0outputTCELL48:OUT8
CFGTRANSACTIONADDR1outputTCELL48:OUT9
CFGTRANSACTIONADDR2outputTCELL48:OUT10
CFGTRANSACTIONADDR3outputTCELL48:OUT11
CFGTRANSACTIONADDR4outputTCELL49:OUT8
CFGTRANSACTIONADDR5outputTCELL49:OUT9
CFGTRANSACTIONADDR6outputTCELL49:OUT10
CFGTRANSACTIONTYPEoutputTCELL47:OUT11
CFGTRNPENDINGNinputTCELL29:IMUX.IMUX9
CFGVCTCVCMAP0outputTCELL46:OUT17
CFGVCTCVCMAP1outputTCELL46:OUT18
CFGVCTCVCMAP2outputTCELL46:OUT19
CFGVCTCVCMAP3outputTCELL47:OUT16
CFGVCTCVCMAP4outputTCELL47:OUT17
CFGVCTCVCMAP5outputTCELL47:OUT18
CFGVCTCVCMAP6outputTCELL47:OUT19
CFGVENDID0inputTCELL24:IMUX.IMUX24
CFGVENDID1inputTCELL14:IMUX.IMUX17
CFGVENDID10inputTCELL11:IMUX.IMUX17
CFGVENDID11inputTCELL11:IMUX.IMUX18
CFGVENDID12inputTCELL11:IMUX.IMUX19
CFGVENDID13inputTCELL11:IMUX.IMUX20
CFGVENDID14inputTCELL1:IMUX.IMUX20
CFGVENDID15inputTCELL0:IMUX.IMUX20
CFGVENDID2inputTCELL13:IMUX.IMUX17
CFGVENDID3inputTCELL13:IMUX.IMUX18
CFGVENDID4inputTCELL13:IMUX.IMUX19
CFGVENDID5inputTCELL13:IMUX.IMUX20
CFGVENDID6inputTCELL12:IMUX.IMUX17
CFGVENDID7inputTCELL12:IMUX.IMUX18
CFGVENDID8inputTCELL12:IMUX.IMUX19
CFGVENDID9inputTCELL12:IMUX.IMUX20
CMRSTNinputTCELL0:IMUX.CTRL1
CMSTICKYRSTNinputTCELL1:IMUX.CTRL0
DBGMODE0inputTCELL24:IMUX.IMUX25
DBGMODE1inputTCELL13:IMUX.IMUX21
DBGSCLRAoutputTCELL35:OUT19
DBGSCLRBoutputTCELL35:OUT20
DBGSCLRCoutputTCELL35:OUT21
DBGSCLRDoutputTCELL36:OUT19
DBGSCLREoutputTCELL36:OUT20
DBGSCLRFoutputTCELL36:OUT21
DBGSCLRGoutputTCELL36:OUT22
DBGSCLRHoutputTCELL37:OUT22
DBGSCLRIoutputTCELL37:OUT23
DBGSCLRJoutputTCELL38:OUT22
DBGSCLRKoutputTCELL38:OUT23
DBGSUBMODEinputTCELL12:IMUX.IMUX21
DBGVECA0outputTCELL47:OUT21
DBGVECA1outputTCELL47:OUT22
DBGVECA10outputTCELL49:OUT23
DBGVECA11outputTCELL24:OUT22
DBGVECA12outputTCELL23:OUT20
DBGVECA13outputTCELL23:OUT21
DBGVECA14outputTCELL22:OUT20
DBGVECA15outputTCELL22:OUT23
DBGVECA16outputTCELL21:OUT22
DBGVECA17outputTCELL21:OUT23
DBGVECA18outputTCELL20:OUT14
DBGVECA19outputTCELL20:OUT19
DBGVECA2outputTCELL47:OUT23
DBGVECA20outputTCELL20:OUT20
DBGVECA21outputTCELL20:OUT21
DBGVECA22outputTCELL19:OUT21
DBGVECA23outputTCELL19:OUT22
DBGVECA24outputTCELL19:OUT23
DBGVECA25outputTCELL18:OUT7
DBGVECA26outputTCELL18:OUT8
DBGVECA27outputTCELL18:OUT20
DBGVECA28outputTCELL18:OUT21
DBGVECA29outputTCELL17:OUT20
DBGVECA3outputTCELL48:OUT20
DBGVECA30outputTCELL17:OUT21
DBGVECA31outputTCELL17:OUT22
DBGVECA32outputTCELL16:OUT2
DBGVECA33outputTCELL16:OUT22
DBGVECA34outputTCELL15:OUT10
DBGVECA35outputTCELL15:OUT11
DBGVECA36outputTCELL15:OUT19
DBGVECA37outputTCELL15:OUT20
DBGVECA38outputTCELL14:OUT19
DBGVECA39outputTCELL14:OUT20
DBGVECA4outputTCELL48:OUT21
DBGVECA40outputTCELL14:OUT21
DBGVECA41outputTCELL14:OUT22
DBGVECA42outputTCELL13:OUT18
DBGVECA43outputTCELL13:OUT19
DBGVECA44outputTCELL13:OUT20
DBGVECA45outputTCELL13:OUT21
DBGVECA46outputTCELL12:OUT18
DBGVECA47outputTCELL12:OUT19
DBGVECA48outputTCELL12:OUT20
DBGVECA49outputTCELL12:OUT21
DBGVECA5outputTCELL48:OUT22
DBGVECA50outputTCELL11:OUT17
DBGVECA51outputTCELL11:OUT18
DBGVECA52outputTCELL11:OUT20
DBGVECA53outputTCELL11:OUT21
DBGVECA54outputTCELL10:OUT18
DBGVECA55outputTCELL10:OUT19
DBGVECA56outputTCELL10:OUT20
DBGVECA57outputTCELL10:OUT21
DBGVECA58outputTCELL9:OUT14
DBGVECA59outputTCELL9:OUT19
DBGVECA6outputTCELL48:OUT23
DBGVECA60outputTCELL9:OUT20
DBGVECA61outputTCELL9:OUT21
DBGVECA62outputTCELL8:OUT14
DBGVECA63outputTCELL8:OUT15
DBGVECA7outputTCELL49:OUT20
DBGVECA8outputTCELL49:OUT21
DBGVECA9outputTCELL49:OUT22
DBGVECB0outputTCELL8:OUT16
DBGVECB1outputTCELL8:OUT17
DBGVECB10outputTCELL20:OUT22
DBGVECB11outputTCELL8:OUT18
DBGVECB12outputTCELL7:OUT10
DBGVECB13outputTCELL7:OUT14
DBGVECB14outputTCELL7:OUT17
DBGVECB15outputTCELL7:OUT18
DBGVECB16outputTCELL6:OUT9
DBGVECB17outputTCELL6:OUT13
DBGVECB18outputTCELL5:OUT6
DBGVECB19outputTCELL5:OUT7
DBGVECB2outputTCELL9:OUT22
DBGVECB20outputTCELL5:OUT16
DBGVECB21outputTCELL5:OUT18
DBGVECB22outputTCELL4:OUT7
DBGVECB23outputTCELL4:OUT8
DBGVECB24outputTCELL4:OUT12
DBGVECB25outputTCELL4:OUT19
DBGVECB26outputTCELL3:OUT7
DBGVECB27outputTCELL3:OUT8
DBGVECB28outputTCELL3:OUT16
DBGVECB29outputTCELL3:OUT20
DBGVECB3outputTCELL10:OUT22
DBGVECB30outputTCELL2:OUT12
DBGVECB31outputTCELL2:OUT13
DBGVECB32outputTCELL2:OUT15
DBGVECB33outputTCELL2:OUT22
DBGVECB34outputTCELL1:OUT22
DBGVECB35outputTCELL0:OUT22
DBGVECB36outputTCELL25:OUT20
DBGVECB37outputTCELL25:OUT21
DBGVECB38outputTCELL25:OUT22
DBGVECB39outputTCELL26:OUT18
DBGVECB4outputTCELL11:OUT22
DBGVECB40outputTCELL26:OUT19
DBGVECB41outputTCELL26:OUT20
DBGVECB42outputTCELL26:OUT21
DBGVECB43outputTCELL27:OUT18
DBGVECB44outputTCELL27:OUT19
DBGVECB45outputTCELL27:OUT20
DBGVECB46outputTCELL27:OUT21
DBGVECB47outputTCELL28:OUT18
DBGVECB48outputTCELL28:OUT19
DBGVECB49outputTCELL28:OUT20
DBGVECB5outputTCELL12:OUT22
DBGVECB50outputTCELL28:OUT21
DBGVECB51outputTCELL29:OUT18
DBGVECB52outputTCELL29:OUT19
DBGVECB53outputTCELL29:OUT20
DBGVECB54outputTCELL29:OUT21
DBGVECB55outputTCELL30:OUT18
DBGVECB56outputTCELL30:OUT19
DBGVECB57outputTCELL30:OUT20
DBGVECB58outputTCELL30:OUT21
DBGVECB59outputTCELL31:OUT18
DBGVECB6outputTCELL13:OUT22
DBGVECB60outputTCELL31:OUT19
DBGVECB61outputTCELL31:OUT20
DBGVECB62outputTCELL31:OUT21
DBGVECB63outputTCELL32:OUT18
DBGVECB7outputTCELL14:OUT23
DBGVECB8outputTCELL15:OUT22
DBGVECB9outputTCELL18:OUT22
DBGVECC0outputTCELL32:OUT19
DBGVECC1outputTCELL32:OUT20
DBGVECC10outputTCELL34:OUT21
DBGVECC11outputTCELL35:OUT18
DBGVECC2outputTCELL32:OUT21
DBGVECC3outputTCELL33:OUT18
DBGVECC4outputTCELL33:OUT19
DBGVECC5outputTCELL33:OUT20
DBGVECC6outputTCELL33:OUT21
DBGVECC7outputTCELL34:OUT18
DBGVECC8outputTCELL34:OUT19
DBGVECC9outputTCELL34:OUT20
DLRSTNinputTCELL2:IMUX.CTRL1
DRPADDR0inputTCELL42:IMUX.IMUX13
DRPADDR1inputTCELL42:IMUX.IMUX14
DRPADDR2inputTCELL42:IMUX.IMUX15
DRPADDR3inputTCELL43:IMUX.IMUX12
DRPADDR4inputTCELL43:IMUX.IMUX13
DRPADDR5inputTCELL43:IMUX.IMUX14
DRPADDR6inputTCELL43:IMUX.IMUX15
DRPADDR7inputTCELL45:IMUX.IMUX12
DRPADDR8inputTCELL45:IMUX.IMUX13
DRPCLKinputTCELL11:IMUX.CLK1
DRPDI0inputTCELL46:IMUX.IMUX12
DRPDI1inputTCELL46:IMUX.IMUX13
DRPDI10inputTCELL48:IMUX.IMUX14
DRPDI11inputTCELL48:IMUX.IMUX15
DRPDI12inputTCELL49:IMUX.IMUX12
DRPDI13inputTCELL49:IMUX.IMUX13
DRPDI14inputTCELL49:IMUX.IMUX14
DRPDI15inputTCELL49:IMUX.IMUX15
DRPDI2inputTCELL46:IMUX.IMUX14
DRPDI3inputTCELL46:IMUX.IMUX15
DRPDI4inputTCELL47:IMUX.IMUX12
DRPDI5inputTCELL47:IMUX.IMUX13
DRPDI6inputTCELL47:IMUX.IMUX14
DRPDI7inputTCELL47:IMUX.IMUX15
DRPDI8inputTCELL48:IMUX.IMUX12
DRPDI9inputTCELL48:IMUX.IMUX13
DRPDO0outputTCELL48:OUT17
DRPDO1outputTCELL48:OUT18
DRPDO10outputTCELL44:OUT23
DRPDO11outputTCELL46:OUT20
DRPDO12outputTCELL46:OUT21
DRPDO13outputTCELL46:OUT22
DRPDO14outputTCELL46:OUT23
DRPDO15outputTCELL47:OUT20
DRPDO2outputTCELL48:OUT19
DRPDO3outputTCELL49:OUT16
DRPDO4outputTCELL49:OUT17
DRPDO5outputTCELL49:OUT18
DRPDO6outputTCELL49:OUT19
DRPDO7outputTCELL44:OUT20
DRPDO8outputTCELL44:OUT21
DRPDO9outputTCELL44:OUT22
DRPENinputTCELL41:IMUX.IMUX13
DRPRDYoutputTCELL48:OUT16
DRPWEinputTCELL42:IMUX.IMUX12
EDTBYPASSinputTCELL21:IMUX.IMUX17
EDTCHANNELSIN1inputTCELL18:IMUX.IMUX16
EDTCHANNELSIN2inputTCELL17:IMUX.IMUX12
EDTCHANNELSIN3inputTCELL16:IMUX.IMUX8
EDTCHANNELSIN4inputTCELL15:IMUX.IMUX8
EDTCHANNELSIN5inputTCELL14:IMUX.IMUX4
EDTCHANNELSIN6inputTCELL13:IMUX.IMUX4
EDTCHANNELSIN7inputTCELL12:IMUX.IMUX4
EDTCHANNELSIN8inputTCELL11:IMUX.IMUX4
EDTCHANNELSOUT1outputTCELL0:OUT15
EDTCHANNELSOUT2outputTCELL0:OUT19
EDTCHANNELSOUT3outputTCELL0:OUT20
EDTCHANNELSOUT4outputTCELL0:OUT21
EDTCHANNELSOUT5outputTCELL1:OUT17
EDTCHANNELSOUT6outputTCELL1:OUT18
EDTCHANNELSOUT7outputTCELL1:OUT20
EDTCHANNELSOUT8outputTCELL1:OUT21
EDTCLKinputTCELL10:IMUX.CLK0
EDTCONFIGURATIONinputTCELL20:IMUX.IMUX14
EDTSINGLEBYPASSCHAINinputTCELL19:IMUX.IMUX12
EDTUPDATEinputTCELL22:IMUX.IMUX16
FUNCLVLRSTNinputTCELL1:IMUX.CTRL1
LL2BADDLLPERRoutputTCELL13:OUT14
LL2BADTLPERRoutputTCELL13:OUT13
LL2LINKSTATUS0outputTCELL17:OUT15
LL2LINKSTATUS1outputTCELL17:OUT19
LL2LINKSTATUS2outputTCELL16:OUT3
LL2LINKSTATUS3outputTCELL16:OUT4
LL2LINKSTATUS4outputTCELL16:OUT20
LL2PROTOCOLERRoutputTCELL13:OUT12
LL2RECEIVERERRoutputTCELL13:OUT11
LL2REPLAYROERRoutputTCELL12:OUT4
LL2REPLAYTOERRoutputTCELL12:OUT5
LL2SENDASREQL1inputTCELL49:IMUX.IMUX1
LL2SENDENTERL1inputTCELL48:IMUX.IMUX3
LL2SENDENTERL23inputTCELL49:IMUX.IMUX0
LL2SENDPMACKinputTCELL49:IMUX.IMUX2
LL2SUSPENDNOWinputTCELL23:IMUX.IMUX16
LL2SUSPENDOKoutputTCELL17:OUT12
LL2TFCINIT1SEQoutputTCELL21:OUT16
LL2TFCINIT2SEQoutputTCELL21:OUT20
LL2TLPRCVinputTCELL48:IMUX.IMUX2
LL2TXIDLEoutputTCELL17:OUT13
LNKCLKENoutputTCELL10:OUT10
MIMRXRADDR0outputTCELL22:OUT13
MIMRXRADDR1outputTCELL21:OUT11
MIMRXRADDR10outputTCELL20:OUT3
MIMRXRADDR11outputTCELL20:OUT10
MIMRXRADDR12outputTCELL15:OUT21
MIMRXRADDR2outputTCELL22:OUT12
MIMRXRADDR3outputTCELL18:OUT16
MIMRXRADDR4outputTCELL22:OUT5
MIMRXRADDR5outputTCELL19:OUT8
MIMRXRADDR6outputTCELL19:OUT9
MIMRXRADDR7outputTCELL19:OUT15
MIMRXRADDR8outputTCELL20:OUT17
MIMRXRADDR9outputTCELL20:OUT8
MIMRXRDATA0inputTCELL15:IMUX.IMUX0
MIMRXRDATA1inputTCELL15:IMUX.IMUX1
MIMRXRDATA10inputTCELL17:IMUX.IMUX2
MIMRXRDATA11inputTCELL17:IMUX.IMUX3
MIMRXRDATA12inputTCELL18:IMUX.IMUX0
MIMRXRDATA13inputTCELL18:IMUX.IMUX1
MIMRXRDATA14inputTCELL18:IMUX.IMUX2
MIMRXRDATA15inputTCELL18:IMUX.IMUX3
MIMRXRDATA16inputTCELL19:IMUX.IMUX0
MIMRXRDATA17inputTCELL19:IMUX.IMUX1
MIMRXRDATA18inputTCELL19:IMUX.IMUX2
MIMRXRDATA19inputTCELL19:IMUX.IMUX3
MIMRXRDATA2inputTCELL15:IMUX.IMUX2
MIMRXRDATA20inputTCELL20:IMUX.IMUX0
MIMRXRDATA21inputTCELL20:IMUX.IMUX1
MIMRXRDATA22inputTCELL20:IMUX.IMUX2
MIMRXRDATA23inputTCELL20:IMUX.IMUX3
MIMRXRDATA24inputTCELL21:IMUX.IMUX0
MIMRXRDATA25inputTCELL21:IMUX.IMUX1
MIMRXRDATA26inputTCELL21:IMUX.IMUX2
MIMRXRDATA27inputTCELL21:IMUX.IMUX3
MIMRXRDATA28inputTCELL22:IMUX.IMUX0
MIMRXRDATA29inputTCELL22:IMUX.IMUX1
MIMRXRDATA3inputTCELL15:IMUX.IMUX3
MIMRXRDATA30inputTCELL22:IMUX.IMUX2
MIMRXRDATA31inputTCELL22:IMUX.IMUX3
MIMRXRDATA32inputTCELL23:IMUX.IMUX0
MIMRXRDATA33inputTCELL23:IMUX.IMUX1
MIMRXRDATA34inputTCELL23:IMUX.IMUX2
MIMRXRDATA35inputTCELL23:IMUX.IMUX3
MIMRXRDATA36inputTCELL24:IMUX.IMUX0
MIMRXRDATA37inputTCELL24:IMUX.IMUX1
MIMRXRDATA38inputTCELL24:IMUX.IMUX2
MIMRXRDATA39inputTCELL24:IMUX.IMUX3
MIMRXRDATA4inputTCELL16:IMUX.IMUX0
MIMRXRDATA40inputTCELL23:IMUX.IMUX4
MIMRXRDATA41inputTCELL23:IMUX.IMUX5
MIMRXRDATA42inputTCELL23:IMUX.IMUX6
MIMRXRDATA43inputTCELL23:IMUX.IMUX7
MIMRXRDATA44inputTCELL22:IMUX.IMUX4
MIMRXRDATA45inputTCELL22:IMUX.IMUX5
MIMRXRDATA46inputTCELL22:IMUX.IMUX6
MIMRXRDATA47inputTCELL22:IMUX.IMUX7
MIMRXRDATA48inputTCELL21:IMUX.IMUX4
MIMRXRDATA49inputTCELL21:IMUX.IMUX5
MIMRXRDATA5inputTCELL16:IMUX.IMUX1
MIMRXRDATA50inputTCELL21:IMUX.IMUX6
MIMRXRDATA51inputTCELL21:IMUX.IMUX7
MIMRXRDATA52inputTCELL20:IMUX.IMUX4
MIMRXRDATA53inputTCELL20:IMUX.IMUX5
MIMRXRDATA54inputTCELL20:IMUX.IMUX6
MIMRXRDATA55inputTCELL20:IMUX.IMUX7
MIMRXRDATA56inputTCELL19:IMUX.IMUX4
MIMRXRDATA57inputTCELL19:IMUX.IMUX5
MIMRXRDATA58inputTCELL19:IMUX.IMUX6
MIMRXRDATA59inputTCELL19:IMUX.IMUX7
MIMRXRDATA6inputTCELL16:IMUX.IMUX2
MIMRXRDATA60inputTCELL18:IMUX.IMUX4
MIMRXRDATA61inputTCELL18:IMUX.IMUX5
MIMRXRDATA62inputTCELL18:IMUX.IMUX6
MIMRXRDATA63inputTCELL18:IMUX.IMUX7
MIMRXRDATA64inputTCELL17:IMUX.IMUX4
MIMRXRDATA65inputTCELL17:IMUX.IMUX5
MIMRXRDATA66inputTCELL17:IMUX.IMUX6
MIMRXRDATA67inputTCELL17:IMUX.IMUX7
MIMRXRDATA7inputTCELL16:IMUX.IMUX3
MIMRXRDATA8inputTCELL17:IMUX.IMUX0
MIMRXRDATA9inputTCELL17:IMUX.IMUX1
MIMRXRENoutputTCELL21:OUT12
MIMRXWADDR0outputTCELL19:OUT14
MIMRXWADDR1outputTCELL21:OUT15
MIMRXWADDR10outputTCELL16:OUT12
MIMRXWADDR11outputTCELL16:OUT14
MIMRXWADDR12outputTCELL20:OUT1
MIMRXWADDR2outputTCELL22:OUT0
MIMRXWADDR3outputTCELL16:OUT7
MIMRXWADDR4outputTCELL19:OUT16
MIMRXWADDR5outputTCELL21:OUT9
MIMRXWADDR6outputTCELL17:OUT17
MIMRXWADDR7outputTCELL19:OUT11
MIMRXWADDR8outputTCELL16:OUT8
MIMRXWADDR9outputTCELL19:OUT17
MIMRXWDATA0outputTCELL20:OUT11
MIMRXWDATA1outputTCELL20:OUT13
MIMRXWDATA10outputTCELL21:OUT19
MIMRXWDATA11outputTCELL24:OUT18
MIMRXWDATA12outputTCELL21:OUT2
MIMRXWDATA13outputTCELL24:OUT9
MIMRXWDATA14outputTCELL18:OUT4
MIMRXWDATA15outputTCELL24:OUT10
MIMRXWDATA16outputTCELL19:OUT0
MIMRXWDATA17outputTCELL22:OUT9
MIMRXWDATA18outputTCELL19:OUT2
MIMRXWDATA19outputTCELL23:OUT8
MIMRXWDATA2outputTCELL20:OUT18
MIMRXWDATA20outputTCELL20:OUT0
MIMRXWDATA21outputTCELL23:OUT19
MIMRXWDATA22outputTCELL20:OUT15
MIMRXWDATA23outputTCELL23:OUT14
MIMRXWDATA24outputTCELL21:OUT0
MIMRXWDATA25outputTCELL23:OUT10
MIMRXWDATA26outputTCELL21:OUT13
MIMRXWDATA27outputTCELL24:OUT19
MIMRXWDATA28outputTCELL22:OUT14
MIMRXWDATA29outputTCELL24:OUT8
MIMRXWDATA3outputTCELL22:OUT15
MIMRXWDATA30outputTCELL22:OUT18
MIMRXWDATA31outputTCELL22:OUT21
MIMRXWDATA32outputTCELL22:OUT1
MIMRXWDATA33outputTCELL22:OUT22
MIMRXWDATA34outputTCELL21:OUT17
MIMRXWDATA35outputTCELL24:OUT11
MIMRXWDATA36outputTCELL15:OUT17
MIMRXWDATA37outputTCELL15:OUT9
MIMRXWDATA38outputTCELL15:OUT12
MIMRXWDATA39outputTCELL17:OUT23
MIMRXWDATA4outputTCELL20:OUT9
MIMRXWDATA40outputTCELL15:OUT13
MIMRXWDATA41outputTCELL18:OUT18
MIMRXWDATA42outputTCELL15:OUT14
MIMRXWDATA43outputTCELL18:OUT19
MIMRXWDATA44outputTCELL16:OUT18
MIMRXWDATA45outputTCELL18:OUT17
MIMRXWDATA46outputTCELL16:OUT23
MIMRXWDATA47outputTCELL19:OUT18
MIMRXWDATA48outputTCELL16:OUT16
MIMRXWDATA49outputTCELL21:OUT5
MIMRXWDATA5outputTCELL23:OUT22
MIMRXWDATA50outputTCELL16:OUT17
MIMRXWDATA51outputTCELL21:OUT7
MIMRXWDATA52outputTCELL15:OUT18
MIMRXWDATA53outputTCELL17:OUT11
MIMRXWDATA54outputTCELL16:OUT5
MIMRXWDATA55outputTCELL18:OUT12
MIMRXWDATA56outputTCELL16:OUT6
MIMRXWDATA57outputTCELL19:OUT5
MIMRXWDATA58outputTCELL15:OUT15
MIMRXWDATA59outputTCELL18:OUT14
MIMRXWDATA6outputTCELL20:OUT16
MIMRXWDATA60outputTCELL18:OUT6
MIMRXWDATA61outputTCELL19:OUT12
MIMRXWDATA62outputTCELL16:OUT19
MIMRXWDATA63outputTCELL18:OUT10
MIMRXWDATA64outputTCELL16:OUT10
MIMRXWDATA65outputTCELL19:OUT10
MIMRXWDATA66outputTCELL17:OUT18
MIMRXWDATA67outputTCELL17:OUT14
MIMRXWDATA7outputTCELL23:OUT23
MIMRXWDATA8outputTCELL21:OUT8
MIMRXWDATA9outputTCELL23:OUT3
MIMRXWENoutputTCELL21:OUT18
MIMTXRADDR0outputTCELL4:OUT20
MIMTXRADDR1outputTCELL6:OUT11
MIMTXRADDR10outputTCELL9:OUT8
MIMTXRADDR11outputTCELL5:OUT8
MIMTXRADDR12outputTCELL7:OUT8
MIMTXRADDR2outputTCELL7:OUT22
MIMTXRADDR3outputTCELL2:OUT10
MIMTXRADDR4outputTCELL4:OUT14
MIMTXRADDR5outputTCELL6:OUT19
MIMTXRADDR6outputTCELL2:OUT17
MIMTXRADDR7outputTCELL4:OUT17
MIMTXRADDR8outputTCELL3:OUT22
MIMTXRADDR9outputTCELL4:OUT3
MIMTXRDATA0inputTCELL0:IMUX.IMUX0
MIMTXRDATA1inputTCELL0:IMUX.IMUX1
MIMTXRDATA10inputTCELL2:IMUX.IMUX2
MIMTXRDATA11inputTCELL2:IMUX.IMUX3
MIMTXRDATA12inputTCELL3:IMUX.IMUX0
MIMTXRDATA13inputTCELL3:IMUX.IMUX1
MIMTXRDATA14inputTCELL3:IMUX.IMUX2
MIMTXRDATA15inputTCELL3:IMUX.IMUX3
MIMTXRDATA16inputTCELL4:IMUX.IMUX0
MIMTXRDATA17inputTCELL4:IMUX.IMUX1
MIMTXRDATA18inputTCELL4:IMUX.IMUX2
MIMTXRDATA19inputTCELL4:IMUX.IMUX3
MIMTXRDATA2inputTCELL0:IMUX.IMUX2
MIMTXRDATA20inputTCELL5:IMUX.IMUX0
MIMTXRDATA21inputTCELL5:IMUX.IMUX1
MIMTXRDATA22inputTCELL5:IMUX.IMUX2
MIMTXRDATA23inputTCELL5:IMUX.IMUX3
MIMTXRDATA24inputTCELL6:IMUX.IMUX0
MIMTXRDATA25inputTCELL6:IMUX.IMUX1
MIMTXRDATA26inputTCELL6:IMUX.IMUX2
MIMTXRDATA27inputTCELL6:IMUX.IMUX3
MIMTXRDATA28inputTCELL7:IMUX.IMUX0
MIMTXRDATA29inputTCELL7:IMUX.IMUX1
MIMTXRDATA3inputTCELL0:IMUX.IMUX3
MIMTXRDATA30inputTCELL7:IMUX.IMUX2
MIMTXRDATA31inputTCELL7:IMUX.IMUX3
MIMTXRDATA32inputTCELL8:IMUX.IMUX0
MIMTXRDATA33inputTCELL8:IMUX.IMUX1
MIMTXRDATA34inputTCELL8:IMUX.IMUX2
MIMTXRDATA35inputTCELL8:IMUX.IMUX3
MIMTXRDATA36inputTCELL9:IMUX.IMUX0
MIMTXRDATA37inputTCELL9:IMUX.IMUX1
MIMTXRDATA38inputTCELL9:IMUX.IMUX2
MIMTXRDATA39inputTCELL9:IMUX.IMUX3
MIMTXRDATA4inputTCELL1:IMUX.IMUX0
MIMTXRDATA40inputTCELL7:IMUX.IMUX4
MIMTXRDATA41inputTCELL7:IMUX.IMUX5
MIMTXRDATA42inputTCELL7:IMUX.IMUX6
MIMTXRDATA43inputTCELL7:IMUX.IMUX7
MIMTXRDATA44inputTCELL6:IMUX.IMUX4
MIMTXRDATA45inputTCELL6:IMUX.IMUX5
MIMTXRDATA46inputTCELL6:IMUX.IMUX6
MIMTXRDATA47inputTCELL6:IMUX.IMUX7
MIMTXRDATA48inputTCELL5:IMUX.IMUX4
MIMTXRDATA49inputTCELL5:IMUX.IMUX5
MIMTXRDATA5inputTCELL1:IMUX.IMUX1
MIMTXRDATA50inputTCELL3:IMUX.IMUX4
MIMTXRDATA51inputTCELL3:IMUX.IMUX5
MIMTXRDATA52inputTCELL3:IMUX.IMUX6
MIMTXRDATA53inputTCELL3:IMUX.IMUX7
MIMTXRDATA54inputTCELL2:IMUX.IMUX4
MIMTXRDATA55inputTCELL2:IMUX.IMUX5
MIMTXRDATA56inputTCELL2:IMUX.IMUX6
MIMTXRDATA57inputTCELL2:IMUX.IMUX7
MIMTXRDATA58inputTCELL1:IMUX.IMUX4
MIMTXRDATA59inputTCELL1:IMUX.IMUX5
MIMTXRDATA6inputTCELL1:IMUX.IMUX2
MIMTXRDATA60inputTCELL1:IMUX.IMUX6
MIMTXRDATA61inputTCELL1:IMUX.IMUX7
MIMTXRDATA62inputTCELL0:IMUX.IMUX4
MIMTXRDATA63inputTCELL0:IMUX.IMUX5
MIMTXRDATA64inputTCELL0:IMUX.IMUX6
MIMTXRDATA65inputTCELL0:IMUX.IMUX7
MIMTXRDATA66inputTCELL9:IMUX.IMUX4
MIMTXRDATA67inputTCELL9:IMUX.IMUX5
MIMTXRDATA68inputTCELL7:IMUX.IMUX8
MIMTXRDATA7inputTCELL1:IMUX.IMUX3
MIMTXRDATA8inputTCELL2:IMUX.IMUX0
MIMTXRDATA9inputTCELL2:IMUX.IMUX1
MIMTXRENoutputTCELL6:OUT8
MIMTXWADDR0outputTCELL7:OUT23
MIMTXWADDR1outputTCELL1:OUT6
MIMTXWADDR10outputTCELL8:OUT23
MIMTXWADDR11outputTCELL3:OUT2
MIMTXWADDR12outputTCELL1:OUT10
MIMTXWADDR2outputTCELL7:OUT12
MIMTXWADDR3outputTCELL5:OUT23
MIMTXWADDR4outputTCELL4:OUT10
MIMTXWADDR5outputTCELL3:OUT14
MIMTXWADDR6outputTCELL2:OUT11
MIMTXWADDR7outputTCELL4:OUT15
MIMTXWADDR8outputTCELL3:OUT12
MIMTXWADDR9outputTCELL4:OUT21
MIMTXWDATA0outputTCELL5:OUT17
MIMTXWDATA1outputTCELL5:OUT19
MIMTXWDATA10outputTCELL6:OUT23
MIMTXWDATA11outputTCELL9:OUT18
MIMTXWDATA12outputTCELL6:OUT10
MIMTXWDATA13outputTCELL9:OUT5
MIMTXWDATA14outputTCELL6:OUT21
MIMTXWDATA15outputTCELL9:OUT16
MIMTXWDATA16outputTCELL4:OUT1
MIMTXWDATA17outputTCELL7:OUT5
MIMTXWDATA18outputTCELL5:OUT1
MIMTXWDATA19outputTCELL8:OUT4
MIMTXWDATA2outputTCELL5:OUT12
MIMTXWDATA20outputTCELL5:OUT0
MIMTXWDATA21outputTCELL8:OUT5
MIMTXWDATA22outputTCELL6:OUT17
MIMTXWDATA23outputTCELL8:OUT20
MIMTXWDATA24outputTCELL6:OUT18
MIMTXWDATA25outputTCELL8:OUT10
MIMTXWDATA26outputTCELL6:OUT5
MIMTXWDATA27outputTCELL9:OUT13
MIMTXWDATA28outputTCELL7:OUT16
MIMTXWDATA29outputTCELL10:OUT2
MIMTXWDATA3outputTCELL7:OUT7
MIMTXWDATA30outputTCELL6:OUT20
MIMTXWDATA31outputTCELL9:OUT7
MIMTXWDATA32outputTCELL7:OUT19
MIMTXWDATA33outputTCELL7:OUT4
MIMTXWDATA34outputTCELL6:OUT15
MIMTXWDATA35outputTCELL9:OUT17
MIMTXWDATA36outputTCELL0:OUT11
MIMTXWDATA37outputTCELL0:OUT9
MIMTXWDATA38outputTCELL0:OUT18
MIMTXWDATA39outputTCELL2:OUT21
MIMTXWDATA4outputTCELL5:OUT5
MIMTXWDATA40outputTCELL0:OUT1
MIMTXWDATA41outputTCELL3:OUT18
MIMTXWDATA42outputTCELL0:OUT14
MIMTXWDATA43outputTCELL3:OUT19
MIMTXWDATA44outputTCELL1:OUT8
MIMTXWDATA45outputTCELL3:OUT17
MIMTXWDATA46outputTCELL1:OUT19
MIMTXWDATA47outputTCELL4:OUT18
MIMTXWDATA48outputTCELL1:OUT14
MIMTXWDATA49outputTCELL4:OUT13
MIMTXWDATA5outputTCELL9:OUT4
MIMTXWDATA50outputTCELL1:OUT7
MIMTXWDATA51outputTCELL5:OUT14
MIMTXWDATA52outputTCELL0:OUT12
MIMTXWDATA53outputTCELL2:OUT19
MIMTXWDATA54outputTCELL0:OUT13
MIMTXWDATA55outputTCELL2:OUT20
MIMTXWDATA56outputTCELL0:OUT10
MIMTXWDATA57outputTCELL4:OUT9
MIMTXWDATA58outputTCELL0:OUT17
MIMTXWDATA59outputTCELL4:OUT11
MIMTXWDATA6outputTCELL5:OUT20
MIMTXWDATA60outputTCELL1:OUT12
MIMTXWDATA61outputTCELL3:OUT6
MIMTXWDATA62outputTCELL1:OUT5
MIMTXWDATA63outputTCELL3:OUT10
MIMTXWDATA64outputTCELL1:OUT16
MIMTXWDATA65outputTCELL5:OUT10
MIMTXWDATA66outputTCELL2:OUT18
MIMTXWDATA67outputTCELL2:OUT14
MIMTXWDATA68outputTCELL2:OUT5
MIMTXWDATA7outputTCELL8:OUT19
MIMTXWDATA8outputTCELL6:OUT22
MIMTXWDATA9outputTCELL8:OUT21
MIMTXWENoutputTCELL6:OUT12
PIPECLKinputTCELL11:IMUX.CLK0
PIPERX0CHANISALIGNEDinputTCELL45:IMUX.IMUX33
PIPERX0CHARISK0inputTCELL46:IMUX.IMUX16
PIPERX0CHARISK1inputTCELL44:IMUX.IMUX16
PIPERX0DATA0inputTCELL46:IMUX.IMUX37
PIPERX0DATA1inputTCELL46:IMUX.IMUX36
PIPERX0DATA10inputTCELL44:IMUX.IMUX33
PIPERX0DATA11inputTCELL44:IMUX.IMUX32
PIPERX0DATA12inputTCELL43:IMUX.IMUX39
PIPERX0DATA13inputTCELL43:IMUX.IMUX38
PIPERX0DATA14inputTCELL43:IMUX.IMUX35
PIPERX0DATA15inputTCELL43:IMUX.IMUX34
PIPERX0DATA2inputTCELL46:IMUX.IMUX33
PIPERX0DATA3inputTCELL46:IMUX.IMUX32
PIPERX0DATA4inputTCELL45:IMUX.IMUX39
PIPERX0DATA5inputTCELL45:IMUX.IMUX38
PIPERX0DATA6inputTCELL45:IMUX.IMUX35
PIPERX0DATA7inputTCELL45:IMUX.IMUX34
PIPERX0DATA8inputTCELL44:IMUX.IMUX37
PIPERX0DATA9inputTCELL44:IMUX.IMUX36
PIPERX0ELECIDLEinputTCELL44:IMUX.IMUX34
PIPERX0PHYSTATUSinputTCELL45:IMUX.IMUX37
PIPERX0POLARITYoutputTCELL43:OUT1
PIPERX0STATUS0inputTCELL44:IMUX.IMUX39
PIPERX0STATUS1inputTCELL44:IMUX.IMUX38
PIPERX0STATUS2inputTCELL44:IMUX.IMUX35
PIPERX0VALIDinputTCELL45:IMUX.IMUX36
PIPERX1CHANISALIGNEDinputTCELL34:IMUX.IMUX33
PIPERX1CHARISK0inputTCELL35:IMUX.IMUX16
PIPERX1CHARISK1inputTCELL33:IMUX.IMUX16
PIPERX1DATA0inputTCELL35:IMUX.IMUX37
PIPERX1DATA1inputTCELL35:IMUX.IMUX36
PIPERX1DATA10inputTCELL33:IMUX.IMUX33
PIPERX1DATA11inputTCELL33:IMUX.IMUX32
PIPERX1DATA12inputTCELL32:IMUX.IMUX39
PIPERX1DATA13inputTCELL32:IMUX.IMUX38
PIPERX1DATA14inputTCELL32:IMUX.IMUX35
PIPERX1DATA15inputTCELL32:IMUX.IMUX34
PIPERX1DATA2inputTCELL35:IMUX.IMUX33
PIPERX1DATA3inputTCELL35:IMUX.IMUX32
PIPERX1DATA4inputTCELL34:IMUX.IMUX39
PIPERX1DATA5inputTCELL34:IMUX.IMUX38
PIPERX1DATA6inputTCELL34:IMUX.IMUX35
PIPERX1DATA7inputTCELL34:IMUX.IMUX34
PIPERX1DATA8inputTCELL33:IMUX.IMUX37
PIPERX1DATA9inputTCELL33:IMUX.IMUX36
PIPERX1ELECIDLEinputTCELL33:IMUX.IMUX34
PIPERX1PHYSTATUSinputTCELL34:IMUX.IMUX37
PIPERX1POLARITYoutputTCELL32:OUT1
PIPERX1STATUS0inputTCELL33:IMUX.IMUX39
PIPERX1STATUS1inputTCELL33:IMUX.IMUX38
PIPERX1STATUS2inputTCELL33:IMUX.IMUX35
PIPERX1VALIDinputTCELL34:IMUX.IMUX36
PIPERX2CHANISALIGNEDinputTCELL41:IMUX.IMUX33
PIPERX2CHARISK0inputTCELL42:IMUX.IMUX16
PIPERX2CHARISK1inputTCELL40:IMUX.IMUX16
PIPERX2DATA0inputTCELL42:IMUX.IMUX37
PIPERX2DATA1inputTCELL42:IMUX.IMUX36
PIPERX2DATA10inputTCELL40:IMUX.IMUX33
PIPERX2DATA11inputTCELL40:IMUX.IMUX32
PIPERX2DATA12inputTCELL39:IMUX.IMUX39
PIPERX2DATA13inputTCELL39:IMUX.IMUX38
PIPERX2DATA14inputTCELL39:IMUX.IMUX35
PIPERX2DATA15inputTCELL39:IMUX.IMUX34
PIPERX2DATA2inputTCELL42:IMUX.IMUX33
PIPERX2DATA3inputTCELL42:IMUX.IMUX32
PIPERX2DATA4inputTCELL41:IMUX.IMUX39
PIPERX2DATA5inputTCELL41:IMUX.IMUX38
PIPERX2DATA6inputTCELL41:IMUX.IMUX35
PIPERX2DATA7inputTCELL41:IMUX.IMUX34
PIPERX2DATA8inputTCELL40:IMUX.IMUX37
PIPERX2DATA9inputTCELL40:IMUX.IMUX36
PIPERX2ELECIDLEinputTCELL40:IMUX.IMUX34
PIPERX2PHYSTATUSinputTCELL41:IMUX.IMUX37
PIPERX2POLARITYoutputTCELL39:OUT1
PIPERX2STATUS0inputTCELL40:IMUX.IMUX39
PIPERX2STATUS1inputTCELL40:IMUX.IMUX38
PIPERX2STATUS2inputTCELL40:IMUX.IMUX35
PIPERX2VALIDinputTCELL41:IMUX.IMUX36
PIPERX3CHANISALIGNEDinputTCELL30:IMUX.IMUX33
PIPERX3CHARISK0inputTCELL31:IMUX.IMUX16
PIPERX3CHARISK1inputTCELL29:IMUX.IMUX16
PIPERX3DATA0inputTCELL31:IMUX.IMUX37
PIPERX3DATA1inputTCELL31:IMUX.IMUX36
PIPERX3DATA10inputTCELL29:IMUX.IMUX33
PIPERX3DATA11inputTCELL29:IMUX.IMUX32
PIPERX3DATA12inputTCELL28:IMUX.IMUX39
PIPERX3DATA13inputTCELL28:IMUX.IMUX38
PIPERX3DATA14inputTCELL28:IMUX.IMUX35
PIPERX3DATA15inputTCELL28:IMUX.IMUX34
PIPERX3DATA2inputTCELL31:IMUX.IMUX33
PIPERX3DATA3inputTCELL31:IMUX.IMUX32
PIPERX3DATA4inputTCELL30:IMUX.IMUX39
PIPERX3DATA5inputTCELL30:IMUX.IMUX38
PIPERX3DATA6inputTCELL30:IMUX.IMUX35
PIPERX3DATA7inputTCELL30:IMUX.IMUX34
PIPERX3DATA8inputTCELL29:IMUX.IMUX37
PIPERX3DATA9inputTCELL29:IMUX.IMUX36
PIPERX3ELECIDLEinputTCELL29:IMUX.IMUX34
PIPERX3PHYSTATUSinputTCELL30:IMUX.IMUX37
PIPERX3POLARITYoutputTCELL28:OUT1
PIPERX3STATUS0inputTCELL29:IMUX.IMUX39
PIPERX3STATUS1inputTCELL29:IMUX.IMUX38
PIPERX3STATUS2inputTCELL29:IMUX.IMUX35
PIPERX3VALIDinputTCELL30:IMUX.IMUX36
PIPERX4CHANISALIGNEDinputTCELL20:IMUX.IMUX33
PIPERX4CHARISK0inputTCELL21:IMUX.IMUX16
PIPERX4CHARISK1inputTCELL19:IMUX.IMUX16
PIPERX4DATA0inputTCELL21:IMUX.IMUX37
PIPERX4DATA1inputTCELL21:IMUX.IMUX36
PIPERX4DATA10inputTCELL19:IMUX.IMUX33
PIPERX4DATA11inputTCELL19:IMUX.IMUX32
PIPERX4DATA12inputTCELL18:IMUX.IMUX39
PIPERX4DATA13inputTCELL18:IMUX.IMUX38
PIPERX4DATA14inputTCELL18:IMUX.IMUX35
PIPERX4DATA15inputTCELL18:IMUX.IMUX34
PIPERX4DATA2inputTCELL21:IMUX.IMUX33
PIPERX4DATA3inputTCELL21:IMUX.IMUX32
PIPERX4DATA4inputTCELL20:IMUX.IMUX39
PIPERX4DATA5inputTCELL20:IMUX.IMUX38
PIPERX4DATA6inputTCELL20:IMUX.IMUX35
PIPERX4DATA7inputTCELL20:IMUX.IMUX34
PIPERX4DATA8inputTCELL19:IMUX.IMUX37
PIPERX4DATA9inputTCELL19:IMUX.IMUX36
PIPERX4ELECIDLEinputTCELL19:IMUX.IMUX34
PIPERX4PHYSTATUSinputTCELL20:IMUX.IMUX37
PIPERX4POLARITYoutputTCELL18:OUT1
PIPERX4STATUS0inputTCELL19:IMUX.IMUX39
PIPERX4STATUS1inputTCELL19:IMUX.IMUX38
PIPERX4STATUS2inputTCELL19:IMUX.IMUX35
PIPERX4VALIDinputTCELL20:IMUX.IMUX36
PIPERX5CHANISALIGNEDinputTCELL9:IMUX.IMUX33
PIPERX5CHARISK0inputTCELL10:IMUX.IMUX16
PIPERX5CHARISK1inputTCELL8:IMUX.IMUX16
PIPERX5DATA0inputTCELL10:IMUX.IMUX37
PIPERX5DATA1inputTCELL10:IMUX.IMUX36
PIPERX5DATA10inputTCELL8:IMUX.IMUX33
PIPERX5DATA11inputTCELL8:IMUX.IMUX32
PIPERX5DATA12inputTCELL7:IMUX.IMUX39
PIPERX5DATA13inputTCELL7:IMUX.IMUX38
PIPERX5DATA14inputTCELL7:IMUX.IMUX35
PIPERX5DATA15inputTCELL7:IMUX.IMUX34
PIPERX5DATA2inputTCELL10:IMUX.IMUX33
PIPERX5DATA3inputTCELL10:IMUX.IMUX32
PIPERX5DATA4inputTCELL9:IMUX.IMUX39
PIPERX5DATA5inputTCELL9:IMUX.IMUX38
PIPERX5DATA6inputTCELL9:IMUX.IMUX35
PIPERX5DATA7inputTCELL9:IMUX.IMUX34
PIPERX5DATA8inputTCELL8:IMUX.IMUX37
PIPERX5DATA9inputTCELL8:IMUX.IMUX36
PIPERX5ELECIDLEinputTCELL8:IMUX.IMUX34
PIPERX5PHYSTATUSinputTCELL9:IMUX.IMUX37
PIPERX5POLARITYoutputTCELL7:OUT1
PIPERX5STATUS0inputTCELL8:IMUX.IMUX39
PIPERX5STATUS1inputTCELL8:IMUX.IMUX38
PIPERX5STATUS2inputTCELL8:IMUX.IMUX35
PIPERX5VALIDinputTCELL9:IMUX.IMUX36
PIPERX6CHANISALIGNEDinputTCELL16:IMUX.IMUX33
PIPERX6CHARISK0inputTCELL17:IMUX.IMUX16
PIPERX6CHARISK1inputTCELL15:IMUX.IMUX16
PIPERX6DATA0inputTCELL17:IMUX.IMUX37
PIPERX6DATA1inputTCELL17:IMUX.IMUX36
PIPERX6DATA10inputTCELL15:IMUX.IMUX33
PIPERX6DATA11inputTCELL15:IMUX.IMUX32
PIPERX6DATA12inputTCELL14:IMUX.IMUX39
PIPERX6DATA13inputTCELL14:IMUX.IMUX38
PIPERX6DATA14inputTCELL14:IMUX.IMUX35
PIPERX6DATA15inputTCELL14:IMUX.IMUX34
PIPERX6DATA2inputTCELL17:IMUX.IMUX33
PIPERX6DATA3inputTCELL17:IMUX.IMUX32
PIPERX6DATA4inputTCELL16:IMUX.IMUX39
PIPERX6DATA5inputTCELL16:IMUX.IMUX38
PIPERX6DATA6inputTCELL16:IMUX.IMUX35
PIPERX6DATA7inputTCELL16:IMUX.IMUX34
PIPERX6DATA8inputTCELL15:IMUX.IMUX37
PIPERX6DATA9inputTCELL15:IMUX.IMUX36
PIPERX6ELECIDLEinputTCELL15:IMUX.IMUX34
PIPERX6PHYSTATUSinputTCELL16:IMUX.IMUX37
PIPERX6POLARITYoutputTCELL14:OUT1
PIPERX6STATUS0inputTCELL15:IMUX.IMUX39
PIPERX6STATUS1inputTCELL15:IMUX.IMUX38
PIPERX6STATUS2inputTCELL15:IMUX.IMUX35
PIPERX6VALIDinputTCELL16:IMUX.IMUX36
PIPERX7CHANISALIGNEDinputTCELL5:IMUX.IMUX33
PIPERX7CHARISK0inputTCELL6:IMUX.IMUX16
PIPERX7CHARISK1inputTCELL4:IMUX.IMUX16
PIPERX7DATA0inputTCELL6:IMUX.IMUX37
PIPERX7DATA1inputTCELL6:IMUX.IMUX36
PIPERX7DATA10inputTCELL4:IMUX.IMUX33
PIPERX7DATA11inputTCELL4:IMUX.IMUX32
PIPERX7DATA12inputTCELL3:IMUX.IMUX39
PIPERX7DATA13inputTCELL3:IMUX.IMUX38
PIPERX7DATA14inputTCELL3:IMUX.IMUX35
PIPERX7DATA15inputTCELL3:IMUX.IMUX34
PIPERX7DATA2inputTCELL6:IMUX.IMUX33
PIPERX7DATA3inputTCELL6:IMUX.IMUX32
PIPERX7DATA4inputTCELL5:IMUX.IMUX39
PIPERX7DATA5inputTCELL5:IMUX.IMUX38
PIPERX7DATA6inputTCELL5:IMUX.IMUX35
PIPERX7DATA7inputTCELL5:IMUX.IMUX34
PIPERX7DATA8inputTCELL4:IMUX.IMUX37
PIPERX7DATA9inputTCELL4:IMUX.IMUX36
PIPERX7ELECIDLEinputTCELL4:IMUX.IMUX34
PIPERX7PHYSTATUSinputTCELL5:IMUX.IMUX37
PIPERX7POLARITYoutputTCELL3:OUT1
PIPERX7STATUS0inputTCELL4:IMUX.IMUX39
PIPERX7STATUS1inputTCELL4:IMUX.IMUX38
PIPERX7STATUS2inputTCELL4:IMUX.IMUX35
PIPERX7VALIDinputTCELL5:IMUX.IMUX36
PIPETX0CHARISK0outputTCELL42:OUT16
PIPETX0CHARISK1outputTCELL40:OUT16
PIPETX0COMPLIANCEoutputTCELL43:OUT3
PIPETX0DATA0outputTCELL43:OUT9
PIPETX0DATA1outputTCELL43:OUT13
PIPETX0DATA10outputTCELL41:OUT11
PIPETX0DATA11outputTCELL41:OUT15
PIPETX0DATA12outputTCELL40:OUT0
PIPETX0DATA13outputTCELL40:OUT4
PIPETX0DATA14outputTCELL40:OUT2
PIPETX0DATA15outputTCELL40:OUT6
PIPETX0DATA2outputTCELL43:OUT11
PIPETX0DATA3outputTCELL43:OUT15
PIPETX0DATA4outputTCELL42:OUT0
PIPETX0DATA5outputTCELL42:OUT4
PIPETX0DATA6outputTCELL42:OUT2
PIPETX0DATA7outputTCELL42:OUT6
PIPETX0DATA8outputTCELL41:OUT9
PIPETX0DATA9outputTCELL41:OUT13
PIPETX0ELECIDLEoutputTCELL42:OUT3
PIPETX0POWERDOWN0outputTCELL42:OUT1
PIPETX0POWERDOWN1outputTCELL42:OUT7
PIPETX1CHARISK0outputTCELL31:OUT16
PIPETX1CHARISK1outputTCELL29:OUT16
PIPETX1COMPLIANCEoutputTCELL32:OUT3
PIPETX1DATA0outputTCELL32:OUT9
PIPETX1DATA1outputTCELL32:OUT13
PIPETX1DATA10outputTCELL30:OUT11
PIPETX1DATA11outputTCELL30:OUT15
PIPETX1DATA12outputTCELL29:OUT0
PIPETX1DATA13outputTCELL29:OUT4
PIPETX1DATA14outputTCELL29:OUT2
PIPETX1DATA15outputTCELL29:OUT6
PIPETX1DATA2outputTCELL32:OUT11
PIPETX1DATA3outputTCELL32:OUT15
PIPETX1DATA4outputTCELL31:OUT0
PIPETX1DATA5outputTCELL31:OUT4
PIPETX1DATA6outputTCELL31:OUT2
PIPETX1DATA7outputTCELL31:OUT6
PIPETX1DATA8outputTCELL30:OUT9
PIPETX1DATA9outputTCELL30:OUT13
PIPETX1ELECIDLEoutputTCELL31:OUT3
PIPETX1POWERDOWN0outputTCELL31:OUT1
PIPETX1POWERDOWN1outputTCELL31:OUT7
PIPETX2CHARISK0outputTCELL38:OUT16
PIPETX2CHARISK1outputTCELL36:OUT16
PIPETX2COMPLIANCEoutputTCELL39:OUT3
PIPETX2DATA0outputTCELL39:OUT9
PIPETX2DATA1outputTCELL39:OUT13
PIPETX2DATA10outputTCELL37:OUT11
PIPETX2DATA11outputTCELL37:OUT15
PIPETX2DATA12outputTCELL36:OUT0
PIPETX2DATA13outputTCELL36:OUT4
PIPETX2DATA14outputTCELL36:OUT2
PIPETX2DATA15outputTCELL36:OUT6
PIPETX2DATA2outputTCELL39:OUT11
PIPETX2DATA3outputTCELL39:OUT15
PIPETX2DATA4outputTCELL38:OUT0
PIPETX2DATA5outputTCELL38:OUT4
PIPETX2DATA6outputTCELL38:OUT2
PIPETX2DATA7outputTCELL38:OUT6
PIPETX2DATA8outputTCELL37:OUT9
PIPETX2DATA9outputTCELL37:OUT13
PIPETX2ELECIDLEoutputTCELL38:OUT3
PIPETX2POWERDOWN0outputTCELL38:OUT1
PIPETX2POWERDOWN1outputTCELL38:OUT7
PIPETX3CHARISK0outputTCELL27:OUT16
PIPETX3CHARISK1outputTCELL25:OUT16
PIPETX3COMPLIANCEoutputTCELL28:OUT3
PIPETX3DATA0outputTCELL28:OUT9
PIPETX3DATA1outputTCELL28:OUT13
PIPETX3DATA10outputTCELL26:OUT11
PIPETX3DATA11outputTCELL26:OUT15
PIPETX3DATA12outputTCELL25:OUT0
PIPETX3DATA13outputTCELL25:OUT4
PIPETX3DATA14outputTCELL25:OUT2
PIPETX3DATA15outputTCELL25:OUT6
PIPETX3DATA2outputTCELL28:OUT11
PIPETX3DATA3outputTCELL28:OUT15
PIPETX3DATA4outputTCELL27:OUT0
PIPETX3DATA5outputTCELL27:OUT4
PIPETX3DATA6outputTCELL27:OUT2
PIPETX3DATA7outputTCELL27:OUT6
PIPETX3DATA8outputTCELL26:OUT9
PIPETX3DATA9outputTCELL26:OUT13
PIPETX3ELECIDLEoutputTCELL27:OUT3
PIPETX3POWERDOWN0outputTCELL27:OUT1
PIPETX3POWERDOWN1outputTCELL27:OUT7
PIPETX4CHARISK0outputTCELL17:OUT16
PIPETX4CHARISK1outputTCELL15:OUT16
PIPETX4COMPLIANCEoutputTCELL18:OUT3
PIPETX4DATA0outputTCELL18:OUT9
PIPETX4DATA1outputTCELL18:OUT13
PIPETX4DATA10outputTCELL16:OUT11
PIPETX4DATA11outputTCELL16:OUT15
PIPETX4DATA12outputTCELL15:OUT0
PIPETX4DATA13outputTCELL15:OUT4
PIPETX4DATA14outputTCELL15:OUT2
PIPETX4DATA15outputTCELL15:OUT6
PIPETX4DATA2outputTCELL18:OUT11
PIPETX4DATA3outputTCELL18:OUT15
PIPETX4DATA4outputTCELL17:OUT0
PIPETX4DATA5outputTCELL17:OUT4
PIPETX4DATA6outputTCELL17:OUT2
PIPETX4DATA7outputTCELL17:OUT6
PIPETX4DATA8outputTCELL16:OUT9
PIPETX4DATA9outputTCELL16:OUT13
PIPETX4ELECIDLEoutputTCELL17:OUT3
PIPETX4POWERDOWN0outputTCELL17:OUT1
PIPETX4POWERDOWN1outputTCELL17:OUT7
PIPETX5CHARISK0outputTCELL6:OUT16
PIPETX5CHARISK1outputTCELL4:OUT16
PIPETX5COMPLIANCEoutputTCELL7:OUT3
PIPETX5DATA0outputTCELL7:OUT9
PIPETX5DATA1outputTCELL7:OUT13
PIPETX5DATA10outputTCELL5:OUT11
PIPETX5DATA11outputTCELL5:OUT15
PIPETX5DATA12outputTCELL4:OUT0
PIPETX5DATA13outputTCELL4:OUT4
PIPETX5DATA14outputTCELL4:OUT2
PIPETX5DATA15outputTCELL4:OUT6
PIPETX5DATA2outputTCELL7:OUT11
PIPETX5DATA3outputTCELL7:OUT15
PIPETX5DATA4outputTCELL6:OUT0
PIPETX5DATA5outputTCELL6:OUT4
PIPETX5DATA6outputTCELL6:OUT2
PIPETX5DATA7outputTCELL6:OUT6
PIPETX5DATA8outputTCELL5:OUT9
PIPETX5DATA9outputTCELL5:OUT13
PIPETX5ELECIDLEoutputTCELL6:OUT3
PIPETX5POWERDOWN0outputTCELL6:OUT1
PIPETX5POWERDOWN1outputTCELL6:OUT7
PIPETX6CHARISK0outputTCELL13:OUT16
PIPETX6CHARISK1outputTCELL11:OUT16
PIPETX6COMPLIANCEoutputTCELL14:OUT3
PIPETX6DATA0outputTCELL14:OUT9
PIPETX6DATA1outputTCELL14:OUT13
PIPETX6DATA10outputTCELL12:OUT11
PIPETX6DATA11outputTCELL12:OUT15
PIPETX6DATA12outputTCELL11:OUT0
PIPETX6DATA13outputTCELL11:OUT4
PIPETX6DATA14outputTCELL11:OUT2
PIPETX6DATA15outputTCELL11:OUT6
PIPETX6DATA2outputTCELL14:OUT11
PIPETX6DATA3outputTCELL14:OUT15
PIPETX6DATA4outputTCELL13:OUT0
PIPETX6DATA5outputTCELL13:OUT4
PIPETX6DATA6outputTCELL13:OUT2
PIPETX6DATA7outputTCELL13:OUT6
PIPETX6DATA8outputTCELL12:OUT9
PIPETX6DATA9outputTCELL12:OUT13
PIPETX6ELECIDLEoutputTCELL13:OUT3
PIPETX6POWERDOWN0outputTCELL13:OUT1
PIPETX6POWERDOWN1outputTCELL13:OUT7
PIPETX7CHARISK0outputTCELL2:OUT16
PIPETX7CHARISK1outputTCELL0:OUT16
PIPETX7COMPLIANCEoutputTCELL3:OUT3
PIPETX7DATA0outputTCELL3:OUT9
PIPETX7DATA1outputTCELL3:OUT13
PIPETX7DATA10outputTCELL1:OUT11
PIPETX7DATA11outputTCELL1:OUT15
PIPETX7DATA12outputTCELL0:OUT0
PIPETX7DATA13outputTCELL0:OUT4
PIPETX7DATA14outputTCELL0:OUT2
PIPETX7DATA15outputTCELL0:OUT6
PIPETX7DATA2outputTCELL3:OUT11
PIPETX7DATA3outputTCELL3:OUT15
PIPETX7DATA4outputTCELL2:OUT0
PIPETX7DATA5outputTCELL2:OUT4
PIPETX7DATA6outputTCELL2:OUT2
PIPETX7DATA7outputTCELL2:OUT6
PIPETX7DATA8outputTCELL1:OUT9
PIPETX7DATA9outputTCELL1:OUT13
PIPETX7ELECIDLEoutputTCELL2:OUT3
PIPETX7POWERDOWN0outputTCELL2:OUT1
PIPETX7POWERDOWN1outputTCELL2:OUT7
PIPETXDEEMPHoutputTCELL8:OUT0
PIPETXMARGIN0outputTCELL45:OUT18
PIPETXMARGIN1outputTCELL45:OUT16
PIPETXMARGIN2outputTCELL45:OUT6
PIPETXRATEoutputTCELL11:OUT19
PIPETXRCVRDEToutputTCELL9:OUT15
PIPETXRESEToutputTCELL11:OUT9
PL2DIRECTEDLSTATE0inputTCELL49:IMUX.IMUX3
PL2DIRECTEDLSTATE1inputTCELL24:IMUX.IMUX8
PL2DIRECTEDLSTATE2inputTCELL24:IMUX.IMUX9
PL2DIRECTEDLSTATE3inputTCELL24:IMUX.IMUX10
PL2DIRECTEDLSTATE4inputTCELL24:IMUX.IMUX11
PL2L0REQoutputTCELL19:OUT20
PL2LINKUPoutputTCELL14:OUT8
PL2RECEIVERERRoutputTCELL14:OUT10
PL2RECOVERYoutputTCELL20:OUT12
PL2RXELECIDLEoutputTCELL19:OUT7
PL2RXPMSTATE0outputTCELL19:OUT13
PL2RXPMSTATE1outputTCELL19:OUT19
PL2SUSPENDOKoutputTCELL20:OUT7
PLDBGMODE0inputTCELL11:IMUX.IMUX21
PLDBGMODE1inputTCELL26:IMUX.IMUX16
PLDBGMODE2inputTCELL26:IMUX.IMUX17
PLDBGVEC0outputTCELL39:OUT22
PLDBGVEC1outputTCELL39:OUT23
PLDBGVEC10outputTCELL5:OUT21
PLDBGVEC11outputTCELL4:OUT22
PLDBGVEC2outputTCELL40:OUT23
PLDBGVEC3outputTCELL41:OUT22
PLDBGVEC4outputTCELL41:OUT23
PLDBGVEC5outputTCELL42:OUT22
PLDBGVEC6outputTCELL42:OUT23
PLDBGVEC7outputTCELL43:OUT23
PLDBGVEC8outputTCELL45:OUT23
PLDBGVEC9outputTCELL7:OUT20
PLDIRECTEDCHANGEDONEoutputTCELL28:OUT0
PLDIRECTEDLINKAUTONinputTCELL25:IMUX.IMUX5
PLDIRECTEDLINKCHANGE0inputTCELL25:IMUX.IMUX0
PLDIRECTEDLINKCHANGE1inputTCELL25:IMUX.IMUX1
PLDIRECTEDLINKSPEEDinputTCELL25:IMUX.IMUX4
PLDIRECTEDLINKWIDTH0inputTCELL25:IMUX.IMUX2
PLDIRECTEDLINKWIDTH1inputTCELL25:IMUX.IMUX3
PLDIRECTEDLTSSMNEW0inputTCELL25:IMUX.IMUX9
PLDIRECTEDLTSSMNEW1inputTCELL25:IMUX.IMUX10
PLDIRECTEDLTSSMNEW2inputTCELL25:IMUX.IMUX11
PLDIRECTEDLTSSMNEW3inputTCELL25:IMUX.IMUX12
PLDIRECTEDLTSSMNEW4inputTCELL26:IMUX.IMUX0
PLDIRECTEDLTSSMNEW5inputTCELL26:IMUX.IMUX1
PLDIRECTEDLTSSMNEWVLDinputTCELL25:IMUX.IMUX8
PLDIRECTEDLTSSMSTALLinputTCELL26:IMUX.IMUX2
PLDOWNSTREAMDEEMPHSOURCEinputTCELL25:IMUX.IMUX7
PLINITIALLINKWIDTH0outputTCELL27:OUT8
PLINITIALLINKWIDTH1outputTCELL27:OUT9
PLINITIALLINKWIDTH2outputTCELL27:OUT10
PLLANEREVERSALMODE0outputTCELL25:OUT13
PLLANEREVERSALMODE1outputTCELL25:OUT14
PLLINKGEN2CAPoutputTCELL26:OUT3
PLLINKPARTNERGEN2SUPPORTEDoutputTCELL27:OUT5
PLLINKUPCFGCAPoutputTCELL26:OUT2
PLLTSSMSTATE0outputTCELL25:OUT7
PLLTSSMSTATE1outputTCELL25:OUT8
PLLTSSMSTATE2outputTCELL25:OUT9
PLLTSSMSTATE3outputTCELL25:OUT10
PLLTSSMSTATE4outputTCELL25:OUT11
PLLTSSMSTATE5outputTCELL25:OUT12
PLPHYLNKUPNoutputTCELL25:OUT15
PLRECEIVEDHOTRSToutputTCELL8:OUT13
PLRSTNinputTCELL3:IMUX.CTRL0
PLRXPMSTATE0outputTCELL26:OUT0
PLRXPMSTATE1outputTCELL26:OUT1
PLSELLNKRATEoutputTCELL25:OUT1
PLSELLNKWIDTH0outputTCELL25:OUT3
PLSELLNKWIDTH1outputTCELL25:OUT5
PLTRANSMITHOTRSTinputTCELL2:IMUX.IMUX12
PLTXPMSTATE0outputTCELL25:OUT17
PLTXPMSTATE1outputTCELL25:OUT18
PLTXPMSTATE2outputTCELL25:OUT19
PLUPSTREAMPREFERDEEMPHinputTCELL25:IMUX.IMUX6
PMVDIVIDE0inputTCELL6:IMUX.IMUX8
PMVDIVIDE1inputTCELL5:IMUX.IMUX6
PMVENABLENinputTCELL10:IMUX.IMUX4
PMVOUToutputTCELL2:OUT9
PMVSELECT0inputTCELL9:IMUX.IMUX6
PMVSELECT1inputTCELL8:IMUX.IMUX4
PMVSELECT2inputTCELL7:IMUX.IMUX9
RECEIVEDFUNCLVLRSTNoutputTCELL9:OUT12
SCANENABLENinputTCELL24:IMUX.IMUX12
SCANMODENinputTCELL23:IMUX.IMUX19
SYSRSTNinputTCELL0:IMUX.CTRL0
TL2ASPMSUSPENDCREDITCHECKinputTCELL23:IMUX.IMUX18
TL2ASPMSUSPENDCREDITCHECKOKoutputTCELL14:OUT7
TL2ASPMSUSPENDREQoutputTCELL14:OUT6
TL2ERRFCPEoutputTCELL38:OUT19
TL2ERRHDR0outputTCELL12:OUT6
TL2ERRHDR1outputTCELL12:OUT7
TL2ERRHDR10outputTCELL9:OUT6
TL2ERRHDR11outputTCELL9:OUT9
TL2ERRHDR12outputTCELL9:OUT10
TL2ERRHDR13outputTCELL9:OUT11
TL2ERRHDR14outputTCELL8:OUT7
TL2ERRHDR15outputTCELL8:OUT8
TL2ERRHDR16outputTCELL8:OUT9
TL2ERRHDR17outputTCELL8:OUT11
TL2ERRHDR18outputTCELL1:OUT4
TL2ERRHDR19outputTCELL26:OUT8
TL2ERRHDR2outputTCELL11:OUT8
TL2ERRHDR20outputTCELL26:OUT10
TL2ERRHDR21outputTCELL26:OUT12
TL2ERRHDR22outputTCELL26:OUT14
TL2ERRHDR23outputTCELL27:OUT15
TL2ERRHDR24outputTCELL27:OUT17
TL2ERRHDR25outputTCELL28:OUT12
TL2ERRHDR26outputTCELL28:OUT14
TL2ERRHDR27outputTCELL28:OUT16
TL2ERRHDR28outputTCELL28:OUT17
TL2ERRHDR29outputTCELL29:OUT12
TL2ERRHDR3outputTCELL11:OUT10
TL2ERRHDR30outputTCELL29:OUT13
TL2ERRHDR31outputTCELL29:OUT14
TL2ERRHDR32outputTCELL29:OUT15
TL2ERRHDR33outputTCELL30:OUT8
TL2ERRHDR34outputTCELL30:OUT10
TL2ERRHDR35outputTCELL30:OUT12
TL2ERRHDR36outputTCELL30:OUT14
TL2ERRHDR37outputTCELL31:OUT15
TL2ERRHDR38outputTCELL31:OUT17
TL2ERRHDR39outputTCELL32:OUT12
TL2ERRHDR4outputTCELL11:OUT11
TL2ERRHDR40outputTCELL32:OUT14
TL2ERRHDR41outputTCELL32:OUT16
TL2ERRHDR42outputTCELL32:OUT17
TL2ERRHDR43outputTCELL33:OUT8
TL2ERRHDR44outputTCELL33:OUT9
TL2ERRHDR45outputTCELL33:OUT10
TL2ERRHDR46outputTCELL33:OUT11
TL2ERRHDR47outputTCELL34:OUT8
TL2ERRHDR48outputTCELL34:OUT9
TL2ERRHDR49outputTCELL34:OUT10
TL2ERRHDR5outputTCELL11:OUT12
TL2ERRHDR50outputTCELL34:OUT11
TL2ERRHDR51outputTCELL35:OUT8
TL2ERRHDR52outputTCELL35:OUT9
TL2ERRHDR53outputTCELL35:OUT10
TL2ERRHDR54outputTCELL35:OUT11
TL2ERRHDR55outputTCELL36:OUT12
TL2ERRHDR56outputTCELL36:OUT13
TL2ERRHDR57outputTCELL36:OUT14
TL2ERRHDR58outputTCELL36:OUT15
TL2ERRHDR59outputTCELL37:OUT8
TL2ERRHDR6outputTCELL10:OUT6
TL2ERRHDR60outputTCELL37:OUT10
TL2ERRHDR61outputTCELL37:OUT12
TL2ERRHDR62outputTCELL37:OUT14
TL2ERRHDR63outputTCELL38:OUT15
TL2ERRHDR7outputTCELL10:OUT7
TL2ERRHDR8outputTCELL10:OUT8
TL2ERRHDR9outputTCELL10:OUT9
TL2ERRMALFORMEDoutputTCELL38:OUT17
TL2ERRRXOVERFLOWoutputTCELL38:OUT18
TL2PPMSUSPENDOKoutputTCELL16:OUT21
TL2PPMSUSPENDREQinputTCELL23:IMUX.IMUX17
TLRSTNinputTCELL2:IMUX.CTRL0
TRNFCCPLD0outputTCELL33:OUT7
TRNFCCPLD1outputTCELL34:OUT4
TRNFCCPLD10outputTCELL36:OUT9
TRNFCCPLD11outputTCELL36:OUT10
TRNFCCPLD2outputTCELL34:OUT5
TRNFCCPLD3outputTCELL34:OUT6
TRNFCCPLD4outputTCELL34:OUT7
TRNFCCPLD5outputTCELL35:OUT4
TRNFCCPLD6outputTCELL35:OUT5
TRNFCCPLD7outputTCELL35:OUT6
TRNFCCPLD8outputTCELL35:OUT7
TRNFCCPLD9outputTCELL36:OUT8
TRNFCCPLH0outputTCELL31:OUT14
TRNFCCPLH1outputTCELL32:OUT6
TRNFCCPLH2outputTCELL32:OUT7
TRNFCCPLH3outputTCELL32:OUT8
TRNFCCPLH4outputTCELL32:OUT10
TRNFCCPLH5outputTCELL33:OUT4
TRNFCCPLH6outputTCELL33:OUT5
TRNFCCPLH7outputTCELL33:OUT6
TRNFCNPD0outputTCELL28:OUT10
TRNFCNPD1outputTCELL29:OUT8
TRNFCNPD10outputTCELL31:OUT12
TRNFCNPD11outputTCELL31:OUT13
TRNFCNPD2outputTCELL29:OUT9
TRNFCNPD3outputTCELL29:OUT10
TRNFCNPD4outputTCELL29:OUT11
TRNFCNPD5outputTCELL30:OUT4
TRNFCNPD6outputTCELL30:OUT5
TRNFCNPD7outputTCELL30:OUT6
TRNFCNPD8outputTCELL30:OUT7
TRNFCNPD9outputTCELL31:OUT11
TRNFCNPH0outputTCELL26:OUT7
TRNFCNPH1outputTCELL27:OUT11
TRNFCNPH2outputTCELL27:OUT12
TRNFCNPH3outputTCELL27:OUT13
TRNFCNPH4outputTCELL27:OUT14
TRNFCNPH5outputTCELL28:OUT6
TRNFCNPH6outputTCELL28:OUT7
TRNFCNPH7outputTCELL28:OUT8
TRNFCPD0outputTCELL3:OUT5
TRNFCPD1outputTCELL2:OUT8
TRNFCPD10outputTCELL26:OUT5
TRNFCPD11outputTCELL26:OUT6
TRNFCPD2outputTCELL1:OUT0
TRNFCPD3outputTCELL1:OUT1
TRNFCPD4outputTCELL1:OUT2
TRNFCPD5outputTCELL1:OUT3
TRNFCPD6outputTCELL0:OUT5
TRNFCPD7outputTCELL0:OUT7
TRNFCPD8outputTCELL0:OUT8
TRNFCPD9outputTCELL26:OUT4
TRNFCPH0outputTCELL7:OUT2
TRNFCPH1outputTCELL7:OUT6
TRNFCPH2outputTCELL5:OUT2
TRNFCPH3outputTCELL5:OUT3
TRNFCPH4outputTCELL5:OUT4
TRNFCPH5outputTCELL4:OUT5
TRNFCPH6outputTCELL3:OUT0
TRNFCPH7outputTCELL3:OUT4
TRNFCSEL0inputTCELL39:IMUX.IMUX2
TRNFCSEL1inputTCELL39:IMUX.IMUX3
TRNFCSEL2inputTCELL40:IMUX.IMUX0
TRNLNKUPoutputTCELL7:OUT0
TRNRBARHIT0outputTCELL9:OUT0
TRNRBARHIT1outputTCELL9:OUT1
TRNRBARHIT2outputTCELL9:OUT2
TRNRBARHIT3outputTCELL9:OUT3
TRNRBARHIT4outputTCELL8:OUT1
TRNRBARHIT5outputTCELL8:OUT2
TRNRBARHIT6outputTCELL8:OUT3
TRNRBARHIT7outputTCELL8:OUT6
TRNRD0outputTCELL30:OUT1
TRNRD1outputTCELL30:OUT2
TRNRD10outputTCELL32:OUT5
TRNRD100outputTCELL19:OUT3
TRNRD101outputTCELL19:OUT4
TRNRD102outputTCELL19:OUT6
TRNRD103outputTCELL18:OUT0
TRNRD104outputTCELL18:OUT2
TRNRD105outputTCELL18:OUT5
TRNRD106outputTCELL17:OUT5
TRNRD107outputTCELL17:OUT8
TRNRD108outputTCELL17:OUT9
TRNRD109outputTCELL17:OUT10
TRNRD11outputTCELL33:OUT0
TRNRD110outputTCELL16:OUT0
TRNRD111outputTCELL16:OUT1
TRNRD112outputTCELL15:OUT3
TRNRD113outputTCELL15:OUT5
TRNRD114outputTCELL15:OUT7
TRNRD115outputTCELL15:OUT8
TRNRD116outputTCELL14:OUT0
TRNRD117outputTCELL14:OUT2
TRNRD118outputTCELL14:OUT4
TRNRD119outputTCELL14:OUT5
TRNRD12outputTCELL33:OUT1
TRNRD120outputTCELL13:OUT5
TRNRD121outputTCELL13:OUT8
TRNRD122outputTCELL13:OUT9
TRNRD123outputTCELL13:OUT10
TRNRD124outputTCELL12:OUT0
TRNRD125outputTCELL12:OUT1
TRNRD126outputTCELL12:OUT2
TRNRD127outputTCELL12:OUT3
TRNRD13outputTCELL33:OUT2
TRNRD14outputTCELL33:OUT3
TRNRD15outputTCELL34:OUT0
TRNRD16outputTCELL34:OUT1
TRNRD17outputTCELL34:OUT2
TRNRD18outputTCELL34:OUT3
TRNRD19outputTCELL35:OUT0
TRNRD2outputTCELL30:OUT3
TRNRD20outputTCELL35:OUT1
TRNRD21outputTCELL35:OUT2
TRNRD22outputTCELL35:OUT3
TRNRD23outputTCELL36:OUT1
TRNRD24outputTCELL36:OUT3
TRNRD25outputTCELL36:OUT5
TRNRD26outputTCELL36:OUT7
TRNRD27outputTCELL37:OUT0
TRNRD28outputTCELL37:OUT1
TRNRD29outputTCELL37:OUT2
TRNRD3outputTCELL31:OUT5
TRNRD30outputTCELL37:OUT3
TRNRD31outputTCELL38:OUT5
TRNRD32outputTCELL38:OUT8
TRNRD33outputTCELL38:OUT9
TRNRD34outputTCELL38:OUT10
TRNRD35outputTCELL39:OUT0
TRNRD36outputTCELL39:OUT2
TRNRD37outputTCELL39:OUT4
TRNRD38outputTCELL39:OUT5
TRNRD39outputTCELL40:OUT1
TRNRD4outputTCELL31:OUT8
TRNRD40outputTCELL40:OUT3
TRNRD41outputTCELL40:OUT5
TRNRD42outputTCELL40:OUT7
TRNRD43outputTCELL41:OUT0
TRNRD44outputTCELL41:OUT1
TRNRD45outputTCELL41:OUT2
TRNRD46outputTCELL41:OUT3
TRNRD47outputTCELL42:OUT5
TRNRD48outputTCELL42:OUT8
TRNRD49outputTCELL42:OUT9
TRNRD5outputTCELL31:OUT9
TRNRD50outputTCELL42:OUT10
TRNRD51outputTCELL43:OUT0
TRNRD52outputTCELL43:OUT2
TRNRD53outputTCELL43:OUT4
TRNRD54outputTCELL43:OUT5
TRNRD55outputTCELL44:OUT0
TRNRD56outputTCELL44:OUT1
TRNRD57outputTCELL44:OUT2
TRNRD58outputTCELL44:OUT3
TRNRD59outputTCELL45:OUT0
TRNRD6outputTCELL31:OUT10
TRNRD60outputTCELL45:OUT1
TRNRD61outputTCELL45:OUT2
TRNRD62outputTCELL45:OUT3
TRNRD63outputTCELL46:OUT0
TRNRD64outputTCELL46:OUT1
TRNRD65outputTCELL46:OUT2
TRNRD66outputTCELL46:OUT3
TRNRD67outputTCELL47:OUT0
TRNRD68outputTCELL47:OUT1
TRNRD69outputTCELL47:OUT2
TRNRD7outputTCELL32:OUT0
TRNRD70outputTCELL47:OUT3
TRNRD71outputTCELL48:OUT0
TRNRD72outputTCELL48:OUT1
TRNRD73outputTCELL48:OUT2
TRNRD74outputTCELL48:OUT3
TRNRD75outputTCELL49:OUT0
TRNRD76outputTCELL49:OUT1
TRNRD77outputTCELL49:OUT2
TRNRD78outputTCELL49:OUT3
TRNRD79outputTCELL24:OUT0
TRNRD8outputTCELL32:OUT2
TRNRD80outputTCELL24:OUT2
TRNRD81outputTCELL24:OUT3
TRNRD82outputTCELL24:OUT4
TRNRD83outputTCELL23:OUT0
TRNRD84outputTCELL23:OUT1
TRNRD85outputTCELL23:OUT2
TRNRD86outputTCELL23:OUT4
TRNRD87outputTCELL22:OUT2
TRNRD88outputTCELL22:OUT3
TRNRD89outputTCELL22:OUT4
TRNRD9outputTCELL32:OUT4
TRNRD90outputTCELL22:OUT6
TRNRD91outputTCELL21:OUT1
TRNRD92outputTCELL21:OUT3
TRNRD93outputTCELL21:OUT4
TRNRD94outputTCELL21:OUT6
TRNRD95outputTCELL20:OUT2
TRNRD96outputTCELL20:OUT4
TRNRD97outputTCELL20:OUT5
TRNRD98outputTCELL20:OUT6
TRNRD99outputTCELL19:OUT1
TRNRDLLPDATA0outputTCELL37:OUT4
TRNRDLLPDATA1outputTCELL37:OUT5
TRNRDLLPDATA10outputTCELL39:OUT8
TRNRDLLPDATA11outputTCELL39:OUT10
TRNRDLLPDATA12outputTCELL40:OUT8
TRNRDLLPDATA13outputTCELL40:OUT9
TRNRDLLPDATA14outputTCELL40:OUT10
TRNRDLLPDATA15outputTCELL40:OUT11
TRNRDLLPDATA16outputTCELL41:OUT4
TRNRDLLPDATA17outputTCELL41:OUT5
TRNRDLLPDATA18outputTCELL41:OUT6
TRNRDLLPDATA19outputTCELL41:OUT7
TRNRDLLPDATA2outputTCELL37:OUT6
TRNRDLLPDATA20outputTCELL42:OUT11
TRNRDLLPDATA21outputTCELL42:OUT12
TRNRDLLPDATA22outputTCELL42:OUT13
TRNRDLLPDATA23outputTCELL42:OUT14
TRNRDLLPDATA24outputTCELL43:OUT6
TRNRDLLPDATA25outputTCELL43:OUT7
TRNRDLLPDATA26outputTCELL43:OUT8
TRNRDLLPDATA27outputTCELL43:OUT10
TRNRDLLPDATA28outputTCELL44:OUT4
TRNRDLLPDATA29outputTCELL44:OUT5
TRNRDLLPDATA3outputTCELL37:OUT7
TRNRDLLPDATA30outputTCELL44:OUT6
TRNRDLLPDATA31outputTCELL44:OUT7
TRNRDLLPDATA32outputTCELL45:OUT4
TRNRDLLPDATA33outputTCELL45:OUT5
TRNRDLLPDATA34outputTCELL45:OUT7
TRNRDLLPDATA35outputTCELL45:OUT8
TRNRDLLPDATA36outputTCELL46:OUT4
TRNRDLLPDATA37outputTCELL46:OUT5
TRNRDLLPDATA38outputTCELL46:OUT6
TRNRDLLPDATA39outputTCELL46:OUT7
TRNRDLLPDATA4outputTCELL38:OUT11
TRNRDLLPDATA40outputTCELL47:OUT4
TRNRDLLPDATA41outputTCELL47:OUT5
TRNRDLLPDATA42outputTCELL47:OUT6
TRNRDLLPDATA43outputTCELL47:OUT7
TRNRDLLPDATA44outputTCELL48:OUT4
TRNRDLLPDATA45outputTCELL48:OUT5
TRNRDLLPDATA46outputTCELL48:OUT6
TRNRDLLPDATA47outputTCELL48:OUT7
TRNRDLLPDATA48outputTCELL49:OUT4
TRNRDLLPDATA49outputTCELL49:OUT5
TRNRDLLPDATA5outputTCELL38:OUT12
TRNRDLLPDATA50outputTCELL49:OUT6
TRNRDLLPDATA51outputTCELL49:OUT7
TRNRDLLPDATA52outputTCELL24:OUT5
TRNRDLLPDATA53outputTCELL24:OUT6
TRNRDLLPDATA54outputTCELL24:OUT7
TRNRDLLPDATA55outputTCELL24:OUT12
TRNRDLLPDATA56outputTCELL23:OUT5
TRNRDLLPDATA57outputTCELL23:OUT6
TRNRDLLPDATA58outputTCELL23:OUT7
TRNRDLLPDATA59outputTCELL23:OUT9
TRNRDLLPDATA6outputTCELL38:OUT13
TRNRDLLPDATA60outputTCELL22:OUT7
TRNRDLLPDATA61outputTCELL22:OUT8
TRNRDLLPDATA62outputTCELL22:OUT10
TRNRDLLPDATA63outputTCELL22:OUT11
TRNRDLLPDATA7outputTCELL38:OUT14
TRNRDLLPDATA8outputTCELL39:OUT6
TRNRDLLPDATA9outputTCELL39:OUT7
TRNRDLLPSRCRDY0outputTCELL21:OUT10
TRNRDLLPSRCRDY1outputTCELL21:OUT14
TRNRDSTRDYinputTCELL38:IMUX.IMUX2
TRNRECRCERRoutputTCELL10:OUT4
TRNREOFoutputTCELL11:OUT7
TRNRERRFWDoutputTCELL10:OUT5
TRNRFCPRETinputTCELL39:IMUX.IMUX0
TRNRNPOKinputTCELL39:IMUX.IMUX1
TRNRNPREQinputTCELL38:IMUX.IMUX3
TRNRREM0outputTCELL11:OUT1
TRNRREM1outputTCELL11:OUT3
TRNRSOFoutputTCELL11:OUT5
TRNRSRCDSCoutputTCELL10:OUT3
TRNRSRCRDYoutputTCELL10:OUT0
TRNTBUFAV0outputTCELL28:OUT4
TRNTBUFAV1outputTCELL28:OUT5
TRNTBUFAV2outputTCELL29:OUT1
TRNTBUFAV3outputTCELL29:OUT3
TRNTBUFAV4outputTCELL29:OUT5
TRNTBUFAV5outputTCELL29:OUT7
TRNTCFGGNTinputTCELL38:IMUX.IMUX1
TRNTCFGREQoutputTCELL30:OUT0
TRNTD0inputTCELL18:IMUX.IMUX8
TRNTD1inputTCELL18:IMUX.IMUX9
TRNTD10inputTCELL20:IMUX.IMUX10
TRNTD100inputTCELL29:IMUX.IMUX0
TRNTD101inputTCELL29:IMUX.IMUX1
TRNTD102inputTCELL29:IMUX.IMUX2
TRNTD103inputTCELL29:IMUX.IMUX3
TRNTD104inputTCELL30:IMUX.IMUX0
TRNTD105inputTCELL30:IMUX.IMUX1
TRNTD106inputTCELL30:IMUX.IMUX2
TRNTD107inputTCELL30:IMUX.IMUX3
TRNTD108inputTCELL31:IMUX.IMUX0
TRNTD109inputTCELL31:IMUX.IMUX1
TRNTD11inputTCELL20:IMUX.IMUX11
TRNTD110inputTCELL31:IMUX.IMUX2
TRNTD111inputTCELL31:IMUX.IMUX3
TRNTD112inputTCELL32:IMUX.IMUX0
TRNTD113inputTCELL32:IMUX.IMUX1
TRNTD114inputTCELL32:IMUX.IMUX2
TRNTD115inputTCELL32:IMUX.IMUX3
TRNTD116inputTCELL33:IMUX.IMUX0
TRNTD117inputTCELL33:IMUX.IMUX1
TRNTD118inputTCELL33:IMUX.IMUX2
TRNTD119inputTCELL33:IMUX.IMUX3
TRNTD12inputTCELL21:IMUX.IMUX8
TRNTD120inputTCELL34:IMUX.IMUX0
TRNTD121inputTCELL34:IMUX.IMUX1
TRNTD122inputTCELL34:IMUX.IMUX2
TRNTD123inputTCELL34:IMUX.IMUX3
TRNTD124inputTCELL35:IMUX.IMUX0
TRNTD125inputTCELL35:IMUX.IMUX1
TRNTD126inputTCELL35:IMUX.IMUX2
TRNTD127inputTCELL35:IMUX.IMUX3
TRNTD13inputTCELL21:IMUX.IMUX9
TRNTD14inputTCELL21:IMUX.IMUX10
TRNTD15inputTCELL21:IMUX.IMUX11
TRNTD16inputTCELL22:IMUX.IMUX8
TRNTD17inputTCELL22:IMUX.IMUX9
TRNTD18inputTCELL22:IMUX.IMUX10
TRNTD19inputTCELL22:IMUX.IMUX11
TRNTD2inputTCELL18:IMUX.IMUX10
TRNTD20inputTCELL23:IMUX.IMUX8
TRNTD21inputTCELL23:IMUX.IMUX9
TRNTD22inputTCELL23:IMUX.IMUX10
TRNTD23inputTCELL23:IMUX.IMUX11
TRNTD24inputTCELL24:IMUX.IMUX4
TRNTD25inputTCELL24:IMUX.IMUX5
TRNTD26inputTCELL24:IMUX.IMUX6
TRNTD27inputTCELL24:IMUX.IMUX7
TRNTD28inputTCELL23:IMUX.IMUX12
TRNTD29inputTCELL23:IMUX.IMUX13
TRNTD3inputTCELL18:IMUX.IMUX11
TRNTD30inputTCELL23:IMUX.IMUX14
TRNTD31inputTCELL23:IMUX.IMUX15
TRNTD32inputTCELL22:IMUX.IMUX12
TRNTD33inputTCELL22:IMUX.IMUX13
TRNTD34inputTCELL22:IMUX.IMUX14
TRNTD35inputTCELL22:IMUX.IMUX15
TRNTD36inputTCELL21:IMUX.IMUX12
TRNTD37inputTCELL21:IMUX.IMUX13
TRNTD38inputTCELL21:IMUX.IMUX14
TRNTD39inputTCELL21:IMUX.IMUX15
TRNTD4inputTCELL19:IMUX.IMUX8
TRNTD40inputTCELL20:IMUX.IMUX12
TRNTD41inputTCELL20:IMUX.IMUX13
TRNTD42inputTCELL18:IMUX.IMUX12
TRNTD43inputTCELL18:IMUX.IMUX13
TRNTD44inputTCELL18:IMUX.IMUX14
TRNTD45inputTCELL18:IMUX.IMUX15
TRNTD46inputTCELL17:IMUX.IMUX8
TRNTD47inputTCELL17:IMUX.IMUX9
TRNTD48inputTCELL17:IMUX.IMUX10
TRNTD49inputTCELL17:IMUX.IMUX11
TRNTD5inputTCELL19:IMUX.IMUX9
TRNTD50inputTCELL16:IMUX.IMUX4
TRNTD51inputTCELL16:IMUX.IMUX5
TRNTD52inputTCELL16:IMUX.IMUX6
TRNTD53inputTCELL16:IMUX.IMUX7
TRNTD54inputTCELL15:IMUX.IMUX4
TRNTD55inputTCELL15:IMUX.IMUX5
TRNTD56inputTCELL15:IMUX.IMUX6
TRNTD57inputTCELL15:IMUX.IMUX7
TRNTD58inputTCELL14:IMUX.IMUX0
TRNTD59inputTCELL14:IMUX.IMUX1
TRNTD6inputTCELL19:IMUX.IMUX10
TRNTD60inputTCELL14:IMUX.IMUX2
TRNTD61inputTCELL14:IMUX.IMUX3
TRNTD62inputTCELL13:IMUX.IMUX0
TRNTD63inputTCELL13:IMUX.IMUX1
TRNTD64inputTCELL13:IMUX.IMUX2
TRNTD65inputTCELL13:IMUX.IMUX3
TRNTD66inputTCELL12:IMUX.IMUX0
TRNTD67inputTCELL12:IMUX.IMUX1
TRNTD68inputTCELL12:IMUX.IMUX2
TRNTD69inputTCELL12:IMUX.IMUX3
TRNTD7inputTCELL19:IMUX.IMUX11
TRNTD70inputTCELL11:IMUX.IMUX0
TRNTD71inputTCELL11:IMUX.IMUX1
TRNTD72inputTCELL11:IMUX.IMUX2
TRNTD73inputTCELL11:IMUX.IMUX3
TRNTD74inputTCELL10:IMUX.IMUX0
TRNTD75inputTCELL10:IMUX.IMUX1
TRNTD76inputTCELL10:IMUX.IMUX2
TRNTD77inputTCELL10:IMUX.IMUX3
TRNTD78inputTCELL3:IMUX.IMUX8
TRNTD79inputTCELL2:IMUX.IMUX8
TRNTD8inputTCELL20:IMUX.IMUX8
TRNTD80inputTCELL2:IMUX.IMUX9
TRNTD81inputTCELL2:IMUX.IMUX10
TRNTD82inputTCELL2:IMUX.IMUX11
TRNTD83inputTCELL1:IMUX.IMUX8
TRNTD84inputTCELL1:IMUX.IMUX9
TRNTD85inputTCELL1:IMUX.IMUX10
TRNTD86inputTCELL1:IMUX.IMUX11
TRNTD87inputTCELL0:IMUX.IMUX8
TRNTD88inputTCELL0:IMUX.IMUX9
TRNTD89inputTCELL0:IMUX.IMUX10
TRNTD9inputTCELL20:IMUX.IMUX9
TRNTD90inputTCELL0:IMUX.IMUX11
TRNTD91inputTCELL26:IMUX.IMUX3
TRNTD92inputTCELL27:IMUX.IMUX0
TRNTD93inputTCELL27:IMUX.IMUX1
TRNTD94inputTCELL27:IMUX.IMUX2
TRNTD95inputTCELL27:IMUX.IMUX3
TRNTD96inputTCELL28:IMUX.IMUX0
TRNTD97inputTCELL28:IMUX.IMUX1
TRNTD98inputTCELL28:IMUX.IMUX2
TRNTD99inputTCELL28:IMUX.IMUX3
TRNTDLLPDATA0inputTCELL40:IMUX.IMUX1
TRNTDLLPDATA1inputTCELL40:IMUX.IMUX2
TRNTDLLPDATA10inputTCELL42:IMUX.IMUX3
TRNTDLLPDATA11inputTCELL43:IMUX.IMUX0
TRNTDLLPDATA12inputTCELL43:IMUX.IMUX1
TRNTDLLPDATA13inputTCELL43:IMUX.IMUX2
TRNTDLLPDATA14inputTCELL43:IMUX.IMUX3
TRNTDLLPDATA15inputTCELL44:IMUX.IMUX0
TRNTDLLPDATA16inputTCELL44:IMUX.IMUX1
TRNTDLLPDATA17inputTCELL44:IMUX.IMUX2
TRNTDLLPDATA18inputTCELL44:IMUX.IMUX3
TRNTDLLPDATA19inputTCELL45:IMUX.IMUX0
TRNTDLLPDATA2inputTCELL40:IMUX.IMUX3
TRNTDLLPDATA20inputTCELL45:IMUX.IMUX1
TRNTDLLPDATA21inputTCELL45:IMUX.IMUX2
TRNTDLLPDATA22inputTCELL45:IMUX.IMUX3
TRNTDLLPDATA23inputTCELL46:IMUX.IMUX0
TRNTDLLPDATA24inputTCELL46:IMUX.IMUX1
TRNTDLLPDATA25inputTCELL46:IMUX.IMUX2
TRNTDLLPDATA26inputTCELL46:IMUX.IMUX3
TRNTDLLPDATA27inputTCELL47:IMUX.IMUX0
TRNTDLLPDATA28inputTCELL47:IMUX.IMUX1
TRNTDLLPDATA29inputTCELL47:IMUX.IMUX2
TRNTDLLPDATA3inputTCELL41:IMUX.IMUX0
TRNTDLLPDATA30inputTCELL47:IMUX.IMUX3
TRNTDLLPDATA31inputTCELL48:IMUX.IMUX0
TRNTDLLPDATA4inputTCELL41:IMUX.IMUX1
TRNTDLLPDATA5inputTCELL41:IMUX.IMUX2
TRNTDLLPDATA6inputTCELL41:IMUX.IMUX3
TRNTDLLPDATA7inputTCELL42:IMUX.IMUX0
TRNTDLLPDATA8inputTCELL42:IMUX.IMUX1
TRNTDLLPDATA9inputTCELL42:IMUX.IMUX2
TRNTDLLPDSTRDYoutputTCELL36:OUT11
TRNTDLLPSRCRDYinputTCELL48:IMUX.IMUX1
TRNTDSTRDY0outputTCELL10:OUT1
TRNTDSTRDY1outputTCELL15:OUT1
TRNTDSTRDY2outputTCELL0:OUT3
TRNTDSTRDY3outputTCELL24:OUT1
TRNTECRCGENinputTCELL37:IMUX.IMUX3
TRNTEOFinputTCELL36:IMUX.IMUX3
TRNTERRDROPoutputTCELL28:OUT2
TRNTERRFWDinputTCELL37:IMUX.IMUX2
TRNTREM0inputTCELL36:IMUX.IMUX0
TRNTREM1inputTCELL36:IMUX.IMUX1
TRNTSOFinputTCELL36:IMUX.IMUX2
TRNTSRCDSCinputTCELL37:IMUX.IMUX1
TRNTSRCRDYinputTCELL37:IMUX.IMUX0
TRNTSTRinputTCELL38:IMUX.IMUX0
USERCLKinputTCELL12:IMUX.CLK0
USERCLK2inputTCELL12:IMUX.CLK1
USERCLKPREBUFinputTCELL0:IMUX.CLK0
USERCLKPREBUFENinputTCELL0:IMUX.CLK1
USERRSTNoutputTCELL8:OUT12
XILUNCONNOUT0outputTCELL4:OUT23
XILUNCONNOUT1outputTCELL3:OUT21
XILUNCONNOUT10outputTCELL27:OUT23
XILUNCONNOUT11outputTCELL28:OUT22
XILUNCONNOUT12outputTCELL28:OUT23
XILUNCONNOUT13outputTCELL29:OUT22
XILUNCONNOUT14outputTCELL29:OUT23
XILUNCONNOUT15outputTCELL30:OUT22
XILUNCONNOUT16outputTCELL30:OUT23
XILUNCONNOUT17outputTCELL31:OUT22
XILUNCONNOUT18outputTCELL31:OUT23
XILUNCONNOUT19outputTCELL32:OUT22
XILUNCONNOUT2outputTCELL3:OUT23
XILUNCONNOUT20outputTCELL32:OUT23
XILUNCONNOUT21outputTCELL33:OUT22
XILUNCONNOUT22outputTCELL33:OUT23
XILUNCONNOUT23outputTCELL34:OUT22
XILUNCONNOUT24outputTCELL34:OUT23
XILUNCONNOUT25outputTCELL35:OUT22
XILUNCONNOUT26outputTCELL35:OUT23
XILUNCONNOUT27outputTCELL36:OUT23
XILUNCONNOUT28outputTCELL20:OUT23
XILUNCONNOUT29outputTCELL18:OUT23
XILUNCONNOUT3outputTCELL2:OUT23
XILUNCONNOUT30outputTCELL15:OUT23
XILUNCONNOUT31outputTCELL13:OUT23
XILUNCONNOUT32outputTCELL12:OUT23
XILUNCONNOUT33outputTCELL11:OUT23
XILUNCONNOUT34outputTCELL10:OUT23
XILUNCONNOUT35outputTCELL9:OUT23
XILUNCONNOUT36outputTCELL8:OUT22
XILUNCONNOUT37outputTCELL6:OUT14
XILUNCONNOUT38outputTCELL7:OUT21
XILUNCONNOUT39outputTCELL5:OUT22
XILUNCONNOUT4outputTCELL1:OUT23
XILUNCONNOUT5outputTCELL0:OUT23
XILUNCONNOUT6outputTCELL25:OUT23
XILUNCONNOUT7outputTCELL26:OUT22
XILUNCONNOUT8outputTCELL26:OUT23
XILUNCONNOUT9outputTCELL27:OUT22

Bel wires

virtex7 PCIE bel wires
WirePins
TCELL0:IMUX.CLK0PCIE.USERCLKPREBUF
TCELL0:IMUX.CLK1PCIE.USERCLKPREBUFEN
TCELL0:IMUX.CTRL0PCIE.SYSRSTN
TCELL0:IMUX.CTRL1PCIE.CMRSTN
TCELL0:IMUX.IMUX0PCIE.MIMTXRDATA0
TCELL0:IMUX.IMUX1PCIE.MIMTXRDATA1
TCELL0:IMUX.IMUX2PCIE.MIMTXRDATA2
TCELL0:IMUX.IMUX3PCIE.MIMTXRDATA3
TCELL0:IMUX.IMUX4PCIE.MIMTXRDATA62
TCELL0:IMUX.IMUX5PCIE.MIMTXRDATA63
TCELL0:IMUX.IMUX6PCIE.MIMTXRDATA64
TCELL0:IMUX.IMUX7PCIE.MIMTXRDATA65
TCELL0:IMUX.IMUX8PCIE.TRNTD87
TCELL0:IMUX.IMUX9PCIE.TRNTD88
TCELL0:IMUX.IMUX10PCIE.TRNTD89
TCELL0:IMUX.IMUX11PCIE.TRNTD90
TCELL0:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG70
TCELL0:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG71
TCELL0:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG72
TCELL0:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG73
TCELL0:IMUX.IMUX16PCIE.CFGPORTNUMBER0
TCELL0:IMUX.IMUX17PCIE.CFGPORTNUMBER1
TCELL0:IMUX.IMUX18PCIE.CFGPORTNUMBER2
TCELL0:IMUX.IMUX19PCIE.CFGPORTNUMBER3
TCELL0:IMUX.IMUX20PCIE.CFGVENDID15
TCELL0:OUT0PCIE.PIPETX7DATA12
TCELL0:OUT1PCIE.MIMTXWDATA40
TCELL0:OUT2PCIE.PIPETX7DATA14
TCELL0:OUT3PCIE.TRNTDSTRDY2
TCELL0:OUT4PCIE.PIPETX7DATA13
TCELL0:OUT5PCIE.TRNFCPD6
TCELL0:OUT6PCIE.PIPETX7DATA15
TCELL0:OUT7PCIE.TRNFCPD7
TCELL0:OUT8PCIE.TRNFCPD8
TCELL0:OUT9PCIE.MIMTXWDATA37
TCELL0:OUT10PCIE.MIMTXWDATA56
TCELL0:OUT11PCIE.MIMTXWDATA36
TCELL0:OUT12PCIE.MIMTXWDATA52
TCELL0:OUT13PCIE.MIMTXWDATA54
TCELL0:OUT14PCIE.MIMTXWDATA42
TCELL0:OUT15PCIE.EDTCHANNELSOUT1
TCELL0:OUT16PCIE.PIPETX7CHARISK1
TCELL0:OUT17PCIE.MIMTXWDATA58
TCELL0:OUT18PCIE.MIMTXWDATA38
TCELL0:OUT19PCIE.EDTCHANNELSOUT2
TCELL0:OUT20PCIE.EDTCHANNELSOUT3
TCELL0:OUT21PCIE.EDTCHANNELSOUT4
TCELL0:OUT22PCIE.DBGVECB35
TCELL0:OUT23PCIE.XILUNCONNOUT5
TCELL1:IMUX.CTRL0PCIE.CMSTICKYRSTN
TCELL1:IMUX.CTRL1PCIE.FUNCLVLRSTN
TCELL1:IMUX.IMUX0PCIE.MIMTXRDATA4
TCELL1:IMUX.IMUX1PCIE.MIMTXRDATA5
TCELL1:IMUX.IMUX2PCIE.MIMTXRDATA6
TCELL1:IMUX.IMUX3PCIE.MIMTXRDATA7
TCELL1:IMUX.IMUX4PCIE.MIMTXRDATA58
TCELL1:IMUX.IMUX5PCIE.MIMTXRDATA59
TCELL1:IMUX.IMUX6PCIE.MIMTXRDATA60
TCELL1:IMUX.IMUX7PCIE.MIMTXRDATA61
TCELL1:IMUX.IMUX8PCIE.TRNTD83
TCELL1:IMUX.IMUX9PCIE.TRNTD84
TCELL1:IMUX.IMUX10PCIE.TRNTD85
TCELL1:IMUX.IMUX11PCIE.TRNTD86
TCELL1:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG66
TCELL1:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG67
TCELL1:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG68
TCELL1:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG69
TCELL1:IMUX.IMUX16PCIE.CFGDSDEVICENUMBER4
TCELL1:IMUX.IMUX17PCIE.CFGDSFUNCTIONNUMBER0
TCELL1:IMUX.IMUX18PCIE.CFGDSFUNCTIONNUMBER1
TCELL1:IMUX.IMUX19PCIE.CFGDSFUNCTIONNUMBER2
TCELL1:IMUX.IMUX20PCIE.CFGVENDID14
TCELL1:OUT0PCIE.TRNFCPD2
TCELL1:OUT1PCIE.TRNFCPD3
TCELL1:OUT2PCIE.TRNFCPD4
TCELL1:OUT3PCIE.TRNFCPD5
TCELL1:OUT4PCIE.TL2ERRHDR18
TCELL1:OUT5PCIE.MIMTXWDATA62
TCELL1:OUT6PCIE.MIMTXWADDR1
TCELL1:OUT7PCIE.MIMTXWDATA50
TCELL1:OUT8PCIE.MIMTXWDATA44
TCELL1:OUT9PCIE.PIPETX7DATA8
TCELL1:OUT10PCIE.MIMTXWADDR12
TCELL1:OUT11PCIE.PIPETX7DATA10
TCELL1:OUT12PCIE.MIMTXWDATA60
TCELL1:OUT13PCIE.PIPETX7DATA9
TCELL1:OUT14PCIE.MIMTXWDATA48
TCELL1:OUT15PCIE.PIPETX7DATA11
TCELL1:OUT16PCIE.MIMTXWDATA64
TCELL1:OUT17PCIE.EDTCHANNELSOUT5
TCELL1:OUT18PCIE.EDTCHANNELSOUT6
TCELL1:OUT19PCIE.MIMTXWDATA46
TCELL1:OUT20PCIE.EDTCHANNELSOUT7
TCELL1:OUT21PCIE.EDTCHANNELSOUT8
TCELL1:OUT22PCIE.DBGVECB34
TCELL1:OUT23PCIE.XILUNCONNOUT4
TCELL2:IMUX.CTRL0PCIE.TLRSTN
TCELL2:IMUX.CTRL1PCIE.DLRSTN
TCELL2:IMUX.IMUX0PCIE.MIMTXRDATA8
TCELL2:IMUX.IMUX1PCIE.MIMTXRDATA9
TCELL2:IMUX.IMUX2PCIE.MIMTXRDATA10
TCELL2:IMUX.IMUX3PCIE.MIMTXRDATA11
TCELL2:IMUX.IMUX4PCIE.MIMTXRDATA54
TCELL2:IMUX.IMUX5PCIE.MIMTXRDATA55
TCELL2:IMUX.IMUX6PCIE.MIMTXRDATA56
TCELL2:IMUX.IMUX7PCIE.MIMTXRDATA57
TCELL2:IMUX.IMUX8PCIE.TRNTD79
TCELL2:IMUX.IMUX9PCIE.TRNTD80
TCELL2:IMUX.IMUX10PCIE.TRNTD81
TCELL2:IMUX.IMUX11PCIE.TRNTD82
TCELL2:IMUX.IMUX12PCIE.PLTRANSMITHOTRST
TCELL2:IMUX.IMUX13PCIE.CFGMGMTDI0
TCELL2:IMUX.IMUX14PCIE.CFGMGMTDI1
TCELL2:IMUX.IMUX15PCIE.CFGMGMTDI2
TCELL2:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG62
TCELL2:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG63
TCELL2:IMUX.IMUX18PCIE.CFGERRAERHEADERLOG64
TCELL2:IMUX.IMUX19PCIE.CFGERRAERHEADERLOG65
TCELL2:IMUX.IMUX20PCIE.CFGDSDEVICENUMBER3
TCELL2:OUT0PCIE.PIPETX7DATA4
TCELL2:OUT1PCIE.PIPETX7POWERDOWN0
TCELL2:OUT2PCIE.PIPETX7DATA6
TCELL2:OUT3PCIE.PIPETX7ELECIDLE
TCELL2:OUT4PCIE.PIPETX7DATA5
TCELL2:OUT5PCIE.MIMTXWDATA68
TCELL2:OUT6PCIE.PIPETX7DATA7
TCELL2:OUT7PCIE.PIPETX7POWERDOWN1
TCELL2:OUT8PCIE.TRNFCPD1
TCELL2:OUT9PCIE.PMVOUT
TCELL2:OUT10PCIE.MIMTXRADDR3
TCELL2:OUT11PCIE.MIMTXWADDR6
TCELL2:OUT12PCIE.DBGVECB30
TCELL2:OUT13PCIE.DBGVECB31
TCELL2:OUT14PCIE.MIMTXWDATA67
TCELL2:OUT15PCIE.DBGVECB32
TCELL2:OUT16PCIE.PIPETX7CHARISK0
TCELL2:OUT17PCIE.MIMTXRADDR6
TCELL2:OUT18PCIE.MIMTXWDATA66
TCELL2:OUT19PCIE.MIMTXWDATA53
TCELL2:OUT20PCIE.MIMTXWDATA55
TCELL2:OUT21PCIE.MIMTXWDATA39
TCELL2:OUT22PCIE.DBGVECB33
TCELL2:OUT23PCIE.XILUNCONNOUT3
TCELL3:IMUX.CTRL0PCIE.PLRSTN
TCELL3:IMUX.IMUX0PCIE.MIMTXRDATA12
TCELL3:IMUX.IMUX1PCIE.MIMTXRDATA13
TCELL3:IMUX.IMUX2PCIE.MIMTXRDATA14
TCELL3:IMUX.IMUX3PCIE.MIMTXRDATA15
TCELL3:IMUX.IMUX4PCIE.MIMTXRDATA50
TCELL3:IMUX.IMUX5PCIE.MIMTXRDATA51
TCELL3:IMUX.IMUX6PCIE.MIMTXRDATA52
TCELL3:IMUX.IMUX7PCIE.MIMTXRDATA53
TCELL3:IMUX.IMUX8PCIE.TRNTD78
TCELL3:IMUX.IMUX9PCIE.CFGMGMTDI3
TCELL3:IMUX.IMUX10PCIE.CFGMGMTDI4
TCELL3:IMUX.IMUX11PCIE.CFGMGMTDI5
TCELL3:IMUX.IMUX12PCIE.CFGMGMTDI6
TCELL3:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG58
TCELL3:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG59
TCELL3:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG60
TCELL3:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG61
TCELL3:IMUX.IMUX34PCIE.PIPERX7DATA15
TCELL3:IMUX.IMUX35PCIE.PIPERX7DATA14
TCELL3:IMUX.IMUX38PCIE.PIPERX7DATA13
TCELL3:IMUX.IMUX39PCIE.PIPERX7DATA12
TCELL3:OUT0PCIE.TRNFCPH6
TCELL3:OUT1PCIE.PIPERX7POLARITY
TCELL3:OUT2PCIE.MIMTXWADDR11
TCELL3:OUT3PCIE.PIPETX7COMPLIANCE
TCELL3:OUT4PCIE.TRNFCPH7
TCELL3:OUT5PCIE.TRNFCPD0
TCELL3:OUT6PCIE.MIMTXWDATA61
TCELL3:OUT7PCIE.DBGVECB26
TCELL3:OUT8PCIE.DBGVECB27
TCELL3:OUT9PCIE.PIPETX7DATA0
TCELL3:OUT10PCIE.MIMTXWDATA63
TCELL3:OUT11PCIE.PIPETX7DATA2
TCELL3:OUT12PCIE.MIMTXWADDR8
TCELL3:OUT13PCIE.PIPETX7DATA1
TCELL3:OUT14PCIE.MIMTXWADDR5
TCELL3:OUT15PCIE.PIPETX7DATA3
TCELL3:OUT16PCIE.DBGVECB28
TCELL3:OUT17PCIE.MIMTXWDATA45
TCELL3:OUT18PCIE.MIMTXWDATA41
TCELL3:OUT19PCIE.MIMTXWDATA43
TCELL3:OUT20PCIE.DBGVECB29
TCELL3:OUT21PCIE.XILUNCONNOUT1
TCELL3:OUT22PCIE.MIMTXRADDR8
TCELL3:OUT23PCIE.XILUNCONNOUT2
TCELL4:IMUX.IMUX0PCIE.MIMTXRDATA16
TCELL4:IMUX.IMUX1PCIE.MIMTXRDATA17
TCELL4:IMUX.IMUX2PCIE.MIMTXRDATA18
TCELL4:IMUX.IMUX3PCIE.MIMTXRDATA19
TCELL4:IMUX.IMUX4PCIE.CFGMGMTDI7
TCELL4:IMUX.IMUX5PCIE.CFGMGMTDI8
TCELL4:IMUX.IMUX6PCIE.CFGMGMTDI9
TCELL4:IMUX.IMUX7PCIE.CFGMGMTDI10
TCELL4:IMUX.IMUX8PCIE.CFGERRAERHEADERLOG54
TCELL4:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG55
TCELL4:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG56
TCELL4:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG57
TCELL4:IMUX.IMUX16PCIE.PIPERX7CHARISK1
TCELL4:IMUX.IMUX32PCIE.PIPERX7DATA11
TCELL4:IMUX.IMUX33PCIE.PIPERX7DATA10
TCELL4:IMUX.IMUX34PCIE.PIPERX7ELECIDLE
TCELL4:IMUX.IMUX35PCIE.PIPERX7STATUS2
TCELL4:IMUX.IMUX36PCIE.PIPERX7DATA9
TCELL4:IMUX.IMUX37PCIE.PIPERX7DATA8
TCELL4:IMUX.IMUX38PCIE.PIPERX7STATUS1
TCELL4:IMUX.IMUX39PCIE.PIPERX7STATUS0
TCELL4:OUT0PCIE.PIPETX5DATA12
TCELL4:OUT1PCIE.MIMTXWDATA16
TCELL4:OUT2PCIE.PIPETX5DATA14
TCELL4:OUT3PCIE.MIMTXRADDR9
TCELL4:OUT4PCIE.PIPETX5DATA13
TCELL4:OUT5PCIE.TRNFCPH5
TCELL4:OUT6PCIE.PIPETX5DATA15
TCELL4:OUT7PCIE.DBGVECB22
TCELL4:OUT8PCIE.DBGVECB23
TCELL4:OUT9PCIE.MIMTXWDATA57
TCELL4:OUT10PCIE.MIMTXWADDR4
TCELL4:OUT11PCIE.MIMTXWDATA59
TCELL4:OUT12PCIE.DBGVECB24
TCELL4:OUT13PCIE.MIMTXWDATA49
TCELL4:OUT14PCIE.MIMTXRADDR4
TCELL4:OUT15PCIE.MIMTXWADDR7
TCELL4:OUT16PCIE.PIPETX5CHARISK1
TCELL4:OUT17PCIE.MIMTXRADDR7
TCELL4:OUT18PCIE.MIMTXWDATA47
TCELL4:OUT19PCIE.DBGVECB25
TCELL4:OUT20PCIE.MIMTXRADDR0
TCELL4:OUT21PCIE.MIMTXWADDR9
TCELL4:OUT22PCIE.PLDBGVEC11
TCELL4:OUT23PCIE.XILUNCONNOUT0
TCELL5:IMUX.IMUX0PCIE.MIMTXRDATA20
TCELL5:IMUX.IMUX1PCIE.MIMTXRDATA21
TCELL5:IMUX.IMUX2PCIE.MIMTXRDATA22
TCELL5:IMUX.IMUX3PCIE.MIMTXRDATA23
TCELL5:IMUX.IMUX4PCIE.MIMTXRDATA48
TCELL5:IMUX.IMUX5PCIE.MIMTXRDATA49
TCELL5:IMUX.IMUX6PCIE.PMVDIVIDE1
TCELL5:IMUX.IMUX7PCIE.CFGMGMTDI11
TCELL5:IMUX.IMUX8PCIE.CFGMGMTDI12
TCELL5:IMUX.IMUX9PCIE.CFGMGMTDI13
TCELL5:IMUX.IMUX10PCIE.CFGMGMTDI14
TCELL5:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG50
TCELL5:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG51
TCELL5:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG52
TCELL5:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG53
TCELL5:IMUX.IMUX33PCIE.PIPERX7CHANISALIGNED
TCELL5:IMUX.IMUX34PCIE.PIPERX7DATA7
TCELL5:IMUX.IMUX35PCIE.PIPERX7DATA6
TCELL5:IMUX.IMUX36PCIE.PIPERX7VALID
TCELL5:IMUX.IMUX37PCIE.PIPERX7PHYSTATUS
TCELL5:IMUX.IMUX38PCIE.PIPERX7DATA5
TCELL5:IMUX.IMUX39PCIE.PIPERX7DATA4
TCELL5:OUT0PCIE.MIMTXWDATA20
TCELL5:OUT1PCIE.MIMTXWDATA18
TCELL5:OUT2PCIE.TRNFCPH2
TCELL5:OUT3PCIE.TRNFCPH3
TCELL5:OUT4PCIE.TRNFCPH4
TCELL5:OUT5PCIE.MIMTXWDATA4
TCELL5:OUT6PCIE.DBGVECB18
TCELL5:OUT7PCIE.DBGVECB19
TCELL5:OUT8PCIE.MIMTXRADDR11
TCELL5:OUT9PCIE.PIPETX5DATA8
TCELL5:OUT10PCIE.MIMTXWDATA65
TCELL5:OUT11PCIE.PIPETX5DATA10
TCELL5:OUT12PCIE.MIMTXWDATA2
TCELL5:OUT13PCIE.PIPETX5DATA9
TCELL5:OUT14PCIE.MIMTXWDATA51
TCELL5:OUT15PCIE.PIPETX5DATA11
TCELL5:OUT16PCIE.DBGVECB20
TCELL5:OUT17PCIE.MIMTXWDATA0
TCELL5:OUT18PCIE.DBGVECB21
TCELL5:OUT19PCIE.MIMTXWDATA1
TCELL5:OUT20PCIE.MIMTXWDATA6
TCELL5:OUT21PCIE.PLDBGVEC10
TCELL5:OUT22PCIE.XILUNCONNOUT39
TCELL5:OUT23PCIE.MIMTXWADDR3
TCELL6:IMUX.IMUX0PCIE.MIMTXRDATA24
TCELL6:IMUX.IMUX1PCIE.MIMTXRDATA25
TCELL6:IMUX.IMUX2PCIE.MIMTXRDATA26
TCELL6:IMUX.IMUX3PCIE.MIMTXRDATA27
TCELL6:IMUX.IMUX4PCIE.MIMTXRDATA44
TCELL6:IMUX.IMUX5PCIE.MIMTXRDATA45
TCELL6:IMUX.IMUX6PCIE.MIMTXRDATA46
TCELL6:IMUX.IMUX7PCIE.MIMTXRDATA47
TCELL6:IMUX.IMUX8PCIE.PMVDIVIDE0
TCELL6:IMUX.IMUX9PCIE.CFGMGMTDI15
TCELL6:IMUX.IMUX10PCIE.CFGMGMTDI16
TCELL6:IMUX.IMUX11PCIE.CFGMGMTDI17
TCELL6:IMUX.IMUX12PCIE.CFGMGMTDI18
TCELL6:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG46
TCELL6:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG47
TCELL6:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG48
TCELL6:IMUX.IMUX16PCIE.PIPERX7CHARISK0
TCELL6:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG49
TCELL6:IMUX.IMUX32PCIE.PIPERX7DATA3
TCELL6:IMUX.IMUX33PCIE.PIPERX7DATA2
TCELL6:IMUX.IMUX36PCIE.PIPERX7DATA1
TCELL6:IMUX.IMUX37PCIE.PIPERX7DATA0
TCELL6:OUT0PCIE.PIPETX5DATA4
TCELL6:OUT1PCIE.PIPETX5POWERDOWN0
TCELL6:OUT2PCIE.PIPETX5DATA6
TCELL6:OUT3PCIE.PIPETX5ELECIDLE
TCELL6:OUT4PCIE.PIPETX5DATA5
TCELL6:OUT5PCIE.MIMTXWDATA26
TCELL6:OUT6PCIE.PIPETX5DATA7
TCELL6:OUT7PCIE.PIPETX5POWERDOWN1
TCELL6:OUT8PCIE.MIMTXREN
TCELL6:OUT9PCIE.DBGVECB16
TCELL6:OUT10PCIE.MIMTXWDATA12
TCELL6:OUT11PCIE.MIMTXRADDR1
TCELL6:OUT12PCIE.MIMTXWEN
TCELL6:OUT13PCIE.DBGVECB17
TCELL6:OUT14PCIE.XILUNCONNOUT37
TCELL6:OUT15PCIE.MIMTXWDATA34
TCELL6:OUT16PCIE.PIPETX5CHARISK0
TCELL6:OUT17PCIE.MIMTXWDATA22
TCELL6:OUT18PCIE.MIMTXWDATA24
TCELL6:OUT19PCIE.MIMTXRADDR5
TCELL6:OUT20PCIE.MIMTXWDATA30
TCELL6:OUT21PCIE.MIMTXWDATA14
TCELL6:OUT22PCIE.MIMTXWDATA8
TCELL6:OUT23PCIE.MIMTXWDATA10
TCELL7:IMUX.IMUX0PCIE.MIMTXRDATA28
TCELL7:IMUX.IMUX1PCIE.MIMTXRDATA29
TCELL7:IMUX.IMUX2PCIE.MIMTXRDATA30
TCELL7:IMUX.IMUX3PCIE.MIMTXRDATA31
TCELL7:IMUX.IMUX4PCIE.MIMTXRDATA40
TCELL7:IMUX.IMUX5PCIE.MIMTXRDATA41
TCELL7:IMUX.IMUX6PCIE.MIMTXRDATA42
TCELL7:IMUX.IMUX7PCIE.MIMTXRDATA43
TCELL7:IMUX.IMUX8PCIE.MIMTXRDATA68
TCELL7:IMUX.IMUX9PCIE.PMVSELECT2
TCELL7:IMUX.IMUX10PCIE.CFGMGMTDI19
TCELL7:IMUX.IMUX11PCIE.CFGMGMTDI20
TCELL7:IMUX.IMUX12PCIE.CFGMGMTDI21
TCELL7:IMUX.IMUX13PCIE.CFGMGMTDI22
TCELL7:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG42
TCELL7:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG43
TCELL7:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG44
TCELL7:IMUX.IMUX17PCIE.CFGERRAERHEADERLOG45
TCELL7:IMUX.IMUX34PCIE.PIPERX5DATA15
TCELL7:IMUX.IMUX35PCIE.PIPERX5DATA14
TCELL7:IMUX.IMUX38PCIE.PIPERX5DATA13
TCELL7:IMUX.IMUX39PCIE.PIPERX5DATA12
TCELL7:OUT0PCIE.TRNLNKUP
TCELL7:OUT1PCIE.PIPERX5POLARITY
TCELL7:OUT2PCIE.TRNFCPH0
TCELL7:OUT3PCIE.PIPETX5COMPLIANCE
TCELL7:OUT4PCIE.MIMTXWDATA33
TCELL7:OUT5PCIE.MIMTXWDATA17
TCELL7:OUT6PCIE.TRNFCPH1
TCELL7:OUT7PCIE.MIMTXWDATA3
TCELL7:OUT8PCIE.MIMTXRADDR12
TCELL7:OUT9PCIE.PIPETX5DATA0
TCELL7:OUT10PCIE.DBGVECB12
TCELL7:OUT11PCIE.PIPETX5DATA2
TCELL7:OUT12PCIE.MIMTXWADDR2
TCELL7:OUT13PCIE.PIPETX5DATA1
TCELL7:OUT14PCIE.DBGVECB13
TCELL7:OUT15PCIE.PIPETX5DATA3
TCELL7:OUT16PCIE.MIMTXWDATA28
TCELL7:OUT17PCIE.DBGVECB14
TCELL7:OUT18PCIE.DBGVECB15
TCELL7:OUT19PCIE.MIMTXWDATA32
TCELL7:OUT20PCIE.PLDBGVEC9
TCELL7:OUT21PCIE.XILUNCONNOUT38
TCELL7:OUT22PCIE.MIMTXRADDR2
TCELL7:OUT23PCIE.MIMTXWADDR0
TCELL8:IMUX.IMUX0PCIE.MIMTXRDATA32
TCELL8:IMUX.IMUX1PCIE.MIMTXRDATA33
TCELL8:IMUX.IMUX2PCIE.MIMTXRDATA34
TCELL8:IMUX.IMUX3PCIE.MIMTXRDATA35
TCELL8:IMUX.IMUX4PCIE.PMVSELECT1
TCELL8:IMUX.IMUX5PCIE.CFGMGMTDI23
TCELL8:IMUX.IMUX6PCIE.CFGMGMTDI24
TCELL8:IMUX.IMUX7PCIE.CFGMGMTDI25
TCELL8:IMUX.IMUX8PCIE.CFGMGMTDI26
TCELL8:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG38
TCELL8:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG39
TCELL8:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG40
TCELL8:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG41
TCELL8:IMUX.IMUX16PCIE.PIPERX5CHARISK1
TCELL8:IMUX.IMUX32PCIE.PIPERX5DATA11
TCELL8:IMUX.IMUX33PCIE.PIPERX5DATA10
TCELL8:IMUX.IMUX34PCIE.PIPERX5ELECIDLE
TCELL8:IMUX.IMUX35PCIE.PIPERX5STATUS2
TCELL8:IMUX.IMUX36PCIE.PIPERX5DATA9
TCELL8:IMUX.IMUX37PCIE.PIPERX5DATA8
TCELL8:IMUX.IMUX38PCIE.PIPERX5STATUS1
TCELL8:IMUX.IMUX39PCIE.PIPERX5STATUS0
TCELL8:OUT0PCIE.PIPETXDEEMPH
TCELL8:OUT1PCIE.TRNRBARHIT4
TCELL8:OUT2PCIE.TRNRBARHIT5
TCELL8:OUT3PCIE.TRNRBARHIT6
TCELL8:OUT4PCIE.MIMTXWDATA19
TCELL8:OUT5PCIE.MIMTXWDATA21
TCELL8:OUT6PCIE.TRNRBARHIT7
TCELL8:OUT7PCIE.TL2ERRHDR14
TCELL8:OUT8PCIE.TL2ERRHDR15
TCELL8:OUT9PCIE.TL2ERRHDR16
TCELL8:OUT10PCIE.MIMTXWDATA25
TCELL8:OUT11PCIE.TL2ERRHDR17
TCELL8:OUT12PCIE.USERRSTN
TCELL8:OUT13PCIE.PLRECEIVEDHOTRST
TCELL8:OUT14PCIE.DBGVECA62
TCELL8:OUT15PCIE.DBGVECA63
TCELL8:OUT16PCIE.DBGVECB0
TCELL8:OUT17PCIE.DBGVECB1
TCELL8:OUT18PCIE.DBGVECB11
TCELL8:OUT19PCIE.MIMTXWDATA7
TCELL8:OUT20PCIE.MIMTXWDATA23
TCELL8:OUT21PCIE.MIMTXWDATA9
TCELL8:OUT22PCIE.XILUNCONNOUT36
TCELL8:OUT23PCIE.MIMTXWADDR10
TCELL9:IMUX.IMUX0PCIE.MIMTXRDATA36
TCELL9:IMUX.IMUX1PCIE.MIMTXRDATA37
TCELL9:IMUX.IMUX2PCIE.MIMTXRDATA38
TCELL9:IMUX.IMUX3PCIE.MIMTXRDATA39
TCELL9:IMUX.IMUX4PCIE.MIMTXRDATA66
TCELL9:IMUX.IMUX5PCIE.MIMTXRDATA67
TCELL9:IMUX.IMUX6PCIE.PMVSELECT0
TCELL9:IMUX.IMUX7PCIE.CFGMGMTDI27
TCELL9:IMUX.IMUX8PCIE.CFGMGMTDI28
TCELL9:IMUX.IMUX9PCIE.CFGMGMTDI29
TCELL9:IMUX.IMUX10PCIE.CFGMGMTDI30
TCELL9:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG34
TCELL9:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG35
TCELL9:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG36
TCELL9:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG37
TCELL9:IMUX.IMUX33PCIE.PIPERX5CHANISALIGNED
TCELL9:IMUX.IMUX34PCIE.PIPERX5DATA7
TCELL9:IMUX.IMUX35PCIE.PIPERX5DATA6
TCELL9:IMUX.IMUX36PCIE.PIPERX5VALID
TCELL9:IMUX.IMUX37PCIE.PIPERX5PHYSTATUS
TCELL9:IMUX.IMUX38PCIE.PIPERX5DATA5
TCELL9:IMUX.IMUX39PCIE.PIPERX5DATA4
TCELL9:OUT0PCIE.TRNRBARHIT0
TCELL9:OUT1PCIE.TRNRBARHIT1
TCELL9:OUT2PCIE.TRNRBARHIT2
TCELL9:OUT3PCIE.TRNRBARHIT3
TCELL9:OUT4PCIE.MIMTXWDATA5
TCELL9:OUT5PCIE.MIMTXWDATA13
TCELL9:OUT6PCIE.TL2ERRHDR10
TCELL9:OUT7PCIE.MIMTXWDATA31
TCELL9:OUT8PCIE.MIMTXRADDR10
TCELL9:OUT9PCIE.TL2ERRHDR11
TCELL9:OUT10PCIE.TL2ERRHDR12
TCELL9:OUT11PCIE.TL2ERRHDR13
TCELL9:OUT12PCIE.RECEIVEDFUNCLVLRSTN
TCELL9:OUT13PCIE.MIMTXWDATA27
TCELL9:OUT14PCIE.DBGVECA58
TCELL9:OUT15PCIE.PIPETXRCVRDET
TCELL9:OUT16PCIE.MIMTXWDATA15
TCELL9:OUT17PCIE.MIMTXWDATA35
TCELL9:OUT18PCIE.MIMTXWDATA11
TCELL9:OUT19PCIE.DBGVECA59
TCELL9:OUT20PCIE.DBGVECA60
TCELL9:OUT21PCIE.DBGVECA61
TCELL9:OUT22PCIE.DBGVECB2
TCELL9:OUT23PCIE.XILUNCONNOUT35
TCELL10:IMUX.CLK0PCIE.EDTCLK
TCELL10:IMUX.IMUX0PCIE.TRNTD74
TCELL10:IMUX.IMUX1PCIE.TRNTD75
TCELL10:IMUX.IMUX2PCIE.TRNTD76
TCELL10:IMUX.IMUX3PCIE.TRNTD77
TCELL10:IMUX.IMUX4PCIE.PMVENABLEN
TCELL10:IMUX.IMUX5PCIE.CFGMGMTDI31
TCELL10:IMUX.IMUX6PCIE.CFGMGMTBYTEENN0
TCELL10:IMUX.IMUX7PCIE.CFGMGMTBYTEENN1
TCELL10:IMUX.IMUX8PCIE.CFGMGMTBYTEENN2
TCELL10:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG30
TCELL10:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG31
TCELL10:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG32
TCELL10:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG33
TCELL10:IMUX.IMUX13PCIE.CFGDSBUSNUMBER7
TCELL10:IMUX.IMUX14PCIE.CFGDSDEVICENUMBER0
TCELL10:IMUX.IMUX15PCIE.CFGDSDEVICENUMBER1
TCELL10:IMUX.IMUX16PCIE.PIPERX5CHARISK0
TCELL10:IMUX.IMUX17PCIE.CFGDSDEVICENUMBER2
TCELL10:IMUX.IMUX32PCIE.PIPERX5DATA3
TCELL10:IMUX.IMUX33PCIE.PIPERX5DATA2
TCELL10:IMUX.IMUX36PCIE.PIPERX5DATA1
TCELL10:IMUX.IMUX37PCIE.PIPERX5DATA0
TCELL10:OUT0PCIE.TRNRSRCRDY
TCELL10:OUT1PCIE.TRNTDSTRDY0
TCELL10:OUT2PCIE.MIMTXWDATA29
TCELL10:OUT3PCIE.TRNRSRCDSC
TCELL10:OUT4PCIE.TRNRECRCERR
TCELL10:OUT5PCIE.TRNRERRFWD
TCELL10:OUT6PCIE.TL2ERRHDR6
TCELL10:OUT7PCIE.TL2ERRHDR7
TCELL10:OUT8PCIE.TL2ERRHDR8
TCELL10:OUT9PCIE.TL2ERRHDR9
TCELL10:OUT10PCIE.LNKCLKEN
TCELL10:OUT11PCIE.CFGMGMTDO0
TCELL10:OUT12PCIE.CFGMGMTDO1
TCELL10:OUT13PCIE.CFGMGMTDO2
TCELL10:OUT14PCIE.CFGERRCPLRDYN
TCELL10:OUT15PCIE.CFGINTERRUPTRDYN
TCELL10:OUT16PCIE.CFGINTERRUPTMMENABLE0
TCELL10:OUT17PCIE.CFGINTERRUPTMMENABLE1
TCELL10:OUT18PCIE.DBGVECA54
TCELL10:OUT19PCIE.DBGVECA55
TCELL10:OUT20PCIE.DBGVECA56
TCELL10:OUT21PCIE.DBGVECA57
TCELL10:OUT22PCIE.DBGVECB3
TCELL10:OUT23PCIE.XILUNCONNOUT34
TCELL11:IMUX.CLK0PCIE.PIPECLK
TCELL11:IMUX.CLK1PCIE.DRPCLK
TCELL11:IMUX.IMUX0PCIE.TRNTD70
TCELL11:IMUX.IMUX1PCIE.TRNTD71
TCELL11:IMUX.IMUX2PCIE.TRNTD72
TCELL11:IMUX.IMUX3PCIE.TRNTD73
TCELL11:IMUX.IMUX4PCIE.EDTCHANNELSIN8
TCELL11:IMUX.IMUX5PCIE.CFGMGMTBYTEENN3
TCELL11:IMUX.IMUX6PCIE.CFGMGMTDWADDR0
TCELL11:IMUX.IMUX7PCIE.CFGMGMTDWADDR1
TCELL11:IMUX.IMUX8PCIE.CFGMGMTDWADDR2
TCELL11:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG26
TCELL11:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG27
TCELL11:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG28
TCELL11:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG29
TCELL11:IMUX.IMUX13PCIE.CFGDSBUSNUMBER3
TCELL11:IMUX.IMUX14PCIE.CFGDSBUSNUMBER4
TCELL11:IMUX.IMUX15PCIE.CFGDSBUSNUMBER5
TCELL11:IMUX.IMUX16PCIE.CFGDSBUSNUMBER6
TCELL11:IMUX.IMUX17PCIE.CFGVENDID10
TCELL11:IMUX.IMUX18PCIE.CFGVENDID11
TCELL11:IMUX.IMUX19PCIE.CFGVENDID12
TCELL11:IMUX.IMUX20PCIE.CFGVENDID13
TCELL11:IMUX.IMUX21PCIE.PLDBGMODE0
TCELL11:OUT0PCIE.PIPETX6DATA12
TCELL11:OUT1PCIE.TRNRREM0
TCELL11:OUT2PCIE.PIPETX6DATA14
TCELL11:OUT3PCIE.TRNRREM1
TCELL11:OUT4PCIE.PIPETX6DATA13
TCELL11:OUT5PCIE.TRNRSOF
TCELL11:OUT6PCIE.PIPETX6DATA15
TCELL11:OUT7PCIE.TRNREOF
TCELL11:OUT8PCIE.TL2ERRHDR2
TCELL11:OUT9PCIE.PIPETXRESET
TCELL11:OUT10PCIE.TL2ERRHDR3
TCELL11:OUT11PCIE.TL2ERRHDR4
TCELL11:OUT12PCIE.TL2ERRHDR5
TCELL11:OUT13PCIE.CFGMGMTDO3
TCELL11:OUT14PCIE.CFGMGMTDO4
TCELL11:OUT15PCIE.CFGMGMTDO5
TCELL11:OUT16PCIE.PIPETX6CHARISK1
TCELL11:OUT17PCIE.DBGVECA50
TCELL11:OUT18PCIE.DBGVECA51
TCELL11:OUT19PCIE.PIPETXRATE
TCELL11:OUT20PCIE.DBGVECA52
TCELL11:OUT21PCIE.DBGVECA53
TCELL11:OUT22PCIE.DBGVECB4
TCELL11:OUT23PCIE.XILUNCONNOUT33
TCELL12:IMUX.CLK0PCIE.USERCLK
TCELL12:IMUX.CLK1PCIE.USERCLK2
TCELL12:IMUX.IMUX0PCIE.TRNTD66
TCELL12:IMUX.IMUX1PCIE.TRNTD67
TCELL12:IMUX.IMUX2PCIE.TRNTD68
TCELL12:IMUX.IMUX3PCIE.TRNTD69
TCELL12:IMUX.IMUX4PCIE.EDTCHANNELSIN7
TCELL12:IMUX.IMUX5PCIE.CFGMGMTDWADDR3
TCELL12:IMUX.IMUX6PCIE.CFGMGMTDWADDR4
TCELL12:IMUX.IMUX7PCIE.CFGMGMTDWADDR5
TCELL12:IMUX.IMUX8PCIE.CFGMGMTDWADDR6
TCELL12:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG22
TCELL12:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG23
TCELL12:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG24
TCELL12:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG25
TCELL12:IMUX.IMUX13PCIE.CFGINTERRUPTSTATN
TCELL12:IMUX.IMUX14PCIE.CFGDSBUSNUMBER0
TCELL12:IMUX.IMUX15PCIE.CFGDSBUSNUMBER1
TCELL12:IMUX.IMUX16PCIE.CFGDSBUSNUMBER2
TCELL12:IMUX.IMUX17PCIE.CFGVENDID6
TCELL12:IMUX.IMUX18PCIE.CFGVENDID7
TCELL12:IMUX.IMUX19PCIE.CFGVENDID8
TCELL12:IMUX.IMUX20PCIE.CFGVENDID9
TCELL12:IMUX.IMUX21PCIE.DBGSUBMODE
TCELL12:OUT0PCIE.TRNRD124
TCELL12:OUT1PCIE.TRNRD125
TCELL12:OUT2PCIE.TRNRD126
TCELL12:OUT3PCIE.TRNRD127
TCELL12:OUT4PCIE.LL2REPLAYROERR
TCELL12:OUT5PCIE.LL2REPLAYTOERR
TCELL12:OUT6PCIE.TL2ERRHDR0
TCELL12:OUT7PCIE.TL2ERRHDR1
TCELL12:OUT8PCIE.CFGMGMTDO6
TCELL12:OUT9PCIE.PIPETX6DATA8
TCELL12:OUT10PCIE.CFGMGMTDO7
TCELL12:OUT11PCIE.PIPETX6DATA10
TCELL12:OUT12PCIE.CFGMGMTDO8
TCELL12:OUT13PCIE.PIPETX6DATA9
TCELL12:OUT14PCIE.CFGMGMTDO9
TCELL12:OUT15PCIE.PIPETX6DATA11
TCELL12:OUT16PCIE.CFGMGMTRDWRDONEN
TCELL12:OUT17PCIE.CFGERRAERHEADERLOGSETN
TCELL12:OUT18PCIE.DBGVECA46
TCELL12:OUT19PCIE.DBGVECA47
TCELL12:OUT20PCIE.DBGVECA48
TCELL12:OUT21PCIE.DBGVECA49
TCELL12:OUT22PCIE.DBGVECB5
TCELL12:OUT23PCIE.XILUNCONNOUT32
TCELL13:IMUX.IMUX0PCIE.TRNTD62
TCELL13:IMUX.IMUX1PCIE.TRNTD63
TCELL13:IMUX.IMUX2PCIE.TRNTD64
TCELL13:IMUX.IMUX3PCIE.TRNTD65
TCELL13:IMUX.IMUX4PCIE.EDTCHANNELSIN6
TCELL13:IMUX.IMUX5PCIE.CFGMGMTDWADDR7
TCELL13:IMUX.IMUX6PCIE.CFGMGMTDWADDR8
TCELL13:IMUX.IMUX7PCIE.CFGMGMTDWADDR9
TCELL13:IMUX.IMUX8PCIE.CFGMGMTWRRW1CASRWN
TCELL13:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG18
TCELL13:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG19
TCELL13:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG20
TCELL13:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG21
TCELL13:IMUX.IMUX13PCIE.CFGINTERRUPTDI5
TCELL13:IMUX.IMUX14PCIE.CFGINTERRUPTDI6
TCELL13:IMUX.IMUX15PCIE.CFGINTERRUPTDI7
TCELL13:IMUX.IMUX16PCIE.CFGINTERRUPTASSERTN
TCELL13:IMUX.IMUX17PCIE.CFGVENDID2
TCELL13:IMUX.IMUX18PCIE.CFGVENDID3
TCELL13:IMUX.IMUX19PCIE.CFGVENDID4
TCELL13:IMUX.IMUX20PCIE.CFGVENDID5
TCELL13:IMUX.IMUX21PCIE.DBGMODE1
TCELL13:OUT0PCIE.PIPETX6DATA4
TCELL13:OUT1PCIE.PIPETX6POWERDOWN0
TCELL13:OUT2PCIE.PIPETX6DATA6
TCELL13:OUT3PCIE.PIPETX6ELECIDLE
TCELL13:OUT4PCIE.PIPETX6DATA5
TCELL13:OUT5PCIE.TRNRD120
TCELL13:OUT6PCIE.PIPETX6DATA7
TCELL13:OUT7PCIE.PIPETX6POWERDOWN1
TCELL13:OUT8PCIE.TRNRD121
TCELL13:OUT9PCIE.TRNRD122
TCELL13:OUT10PCIE.TRNRD123
TCELL13:OUT11PCIE.LL2RECEIVERERR
TCELL13:OUT12PCIE.LL2PROTOCOLERR
TCELL13:OUT13PCIE.LL2BADTLPERR
TCELL13:OUT14PCIE.LL2BADDLLPERR
TCELL13:OUT15PCIE.CFGMGMTDO10
TCELL13:OUT16PCIE.PIPETX6CHARISK0
TCELL13:OUT17PCIE.CFGMGMTDO11
TCELL13:OUT18PCIE.DBGVECA42
TCELL13:OUT19PCIE.DBGVECA43
TCELL13:OUT20PCIE.DBGVECA44
TCELL13:OUT21PCIE.DBGVECA45
TCELL13:OUT22PCIE.DBGVECB6
TCELL13:OUT23PCIE.XILUNCONNOUT31
TCELL14:IMUX.IMUX0PCIE.TRNTD58
TCELL14:IMUX.IMUX1PCIE.TRNTD59
TCELL14:IMUX.IMUX2PCIE.TRNTD60
TCELL14:IMUX.IMUX3PCIE.TRNTD61
TCELL14:IMUX.IMUX4PCIE.EDTCHANNELSIN5
TCELL14:IMUX.IMUX5PCIE.CFGMGMTWRREADONLYN
TCELL14:IMUX.IMUX6PCIE.CFGMGMTWRENN
TCELL14:IMUX.IMUX7PCIE.CFGMGMTRDENN
TCELL14:IMUX.IMUX8PCIE.CFGERRMALFORMEDN
TCELL14:IMUX.IMUX9PCIE.CFGERRAERHEADERLOG14
TCELL14:IMUX.IMUX10PCIE.CFGERRAERHEADERLOG15
TCELL14:IMUX.IMUX11PCIE.CFGERRAERHEADERLOG16
TCELL14:IMUX.IMUX12PCIE.CFGERRAERHEADERLOG17
TCELL14:IMUX.IMUX13PCIE.CFGINTERRUPTDI1
TCELL14:IMUX.IMUX14PCIE.CFGINTERRUPTDI2
TCELL14:IMUX.IMUX15PCIE.CFGINTERRUPTDI3
TCELL14:IMUX.IMUX16PCIE.CFGINTERRUPTDI4
TCELL14:IMUX.IMUX17PCIE.CFGVENDID1
TCELL14:IMUX.IMUX34PCIE.PIPERX6DATA15
TCELL14:IMUX.IMUX35PCIE.PIPERX6DATA14
TCELL14:IMUX.IMUX38PCIE.PIPERX6DATA13
TCELL14:IMUX.IMUX39PCIE.PIPERX6DATA12
TCELL14:OUT0PCIE.TRNRD116
TCELL14:OUT1PCIE.PIPERX6POLARITY
TCELL14:OUT2PCIE.TRNRD117
TCELL14:OUT3PCIE.PIPETX6COMPLIANCE
TCELL14:OUT4PCIE.TRNRD118
TCELL14:OUT5PCIE.TRNRD119
TCELL14:OUT6PCIE.TL2ASPMSUSPENDREQ
TCELL14:OUT7PCIE.TL2ASPMSUSPENDCREDITCHECKOK
TCELL14:OUT8PCIE.PL2LINKUP
TCELL14:OUT9PCIE.PIPETX6DATA0
TCELL14:OUT10PCIE.PL2RECEIVERERR
TCELL14:OUT11PCIE.PIPETX6DATA2
TCELL14:OUT12PCIE.CFGMGMTDO12
TCELL14:OUT13PCIE.PIPETX6DATA1
TCELL14:OUT14PCIE.CFGMGMTDO13
TCELL14:OUT15PCIE.PIPETX6DATA3
TCELL14:OUT16PCIE.CFGMGMTDO14
TCELL14:OUT17PCIE.CFGMGMTDO15
TCELL14:OUT18PCIE.CFGMGMTDO31
TCELL14:OUT19PCIE.DBGVECA38
TCELL14:OUT20PCIE.DBGVECA39
TCELL14:OUT21PCIE.DBGVECA40
TCELL14:OUT22PCIE.DBGVECA41
TCELL14:OUT23PCIE.DBGVECB7
TCELL15:IMUX.IMUX0PCIE.MIMRXRDATA0
TCELL15:IMUX.IMUX1PCIE.MIMRXRDATA1
TCELL15:IMUX.IMUX2PCIE.MIMRXRDATA2
TCELL15:IMUX.IMUX3PCIE.MIMRXRDATA3
TCELL15:IMUX.IMUX4PCIE.TRNTD54
TCELL15:IMUX.IMUX5PCIE.TRNTD55
TCELL15:IMUX.IMUX6PCIE.TRNTD56
TCELL15:IMUX.IMUX7PCIE.TRNTD57
TCELL15:IMUX.IMUX8PCIE.EDTCHANNELSIN4
TCELL15:IMUX.IMUX9PCIE.CFGERRCORN
TCELL15:IMUX.IMUX10PCIE.CFGERRURN
TCELL15:IMUX.IMUX11PCIE.CFGERRECRCN
TCELL15:IMUX.IMUX12PCIE.CFGERRCPLTIMEOUTN
TCELL15:IMUX.IMUX16PCIE.PIPERX6CHARISK1
TCELL15:IMUX.IMUX32PCIE.PIPERX6DATA11
TCELL15:IMUX.IMUX33PCIE.PIPERX6DATA10
TCELL15:IMUX.IMUX34PCIE.PIPERX6ELECIDLE
TCELL15:IMUX.IMUX35PCIE.PIPERX6STATUS2
TCELL15:IMUX.IMUX36PCIE.PIPERX6DATA9
TCELL15:IMUX.IMUX37PCIE.PIPERX6DATA8
TCELL15:IMUX.IMUX38PCIE.PIPERX6STATUS1
TCELL15:IMUX.IMUX39PCIE.PIPERX6STATUS0
TCELL15:OUT0PCIE.PIPETX4DATA12
TCELL15:OUT1PCIE.TRNTDSTRDY1
TCELL15:OUT2PCIE.PIPETX4DATA14
TCELL15:OUT3PCIE.TRNRD112
TCELL15:OUT4PCIE.PIPETX4DATA13
TCELL15:OUT5PCIE.TRNRD113
TCELL15:OUT6PCIE.PIPETX4DATA15
TCELL15:OUT7PCIE.TRNRD114
TCELL15:OUT8PCIE.TRNRD115
TCELL15:OUT9PCIE.MIMRXWDATA37
TCELL15:OUT10PCIE.DBGVECA34
TCELL15:OUT11PCIE.DBGVECA35
TCELL15:OUT12PCIE.MIMRXWDATA38
TCELL15:OUT13PCIE.MIMRXWDATA40
TCELL15:OUT14PCIE.MIMRXWDATA42
TCELL15:OUT15PCIE.MIMRXWDATA58
TCELL15:OUT16PCIE.PIPETX4CHARISK1
TCELL15:OUT17PCIE.MIMRXWDATA36
TCELL15:OUT18PCIE.MIMRXWDATA52
TCELL15:OUT19PCIE.DBGVECA36
TCELL15:OUT20PCIE.DBGVECA37
TCELL15:OUT21PCIE.MIMRXRADDR12
TCELL15:OUT22PCIE.DBGVECB8
TCELL15:OUT23PCIE.XILUNCONNOUT30
TCELL16:IMUX.IMUX0PCIE.MIMRXRDATA4
TCELL16:IMUX.IMUX1PCIE.MIMRXRDATA5
TCELL16:IMUX.IMUX2PCIE.MIMRXRDATA6
TCELL16:IMUX.IMUX3PCIE.MIMRXRDATA7
TCELL16:IMUX.IMUX4PCIE.TRNTD50
TCELL16:IMUX.IMUX5PCIE.TRNTD51
TCELL16:IMUX.IMUX6PCIE.TRNTD52
TCELL16:IMUX.IMUX7PCIE.TRNTD53
TCELL16:IMUX.IMUX8PCIE.EDTCHANNELSIN3
TCELL16:IMUX.IMUX9PCIE.CFGERRCPLABORTN
TCELL16:IMUX.IMUX10PCIE.CFGERRCPLUNEXPECTN
TCELL16:IMUX.IMUX11PCIE.CFGERRPOISONEDN
TCELL16:IMUX.IMUX12PCIE.CFGERRACSN
TCELL16:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG12
TCELL16:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG13
TCELL16:IMUX.IMUX33PCIE.PIPERX6CHANISALIGNED
TCELL16:IMUX.IMUX34PCIE.PIPERX6DATA7
TCELL16:IMUX.IMUX35PCIE.PIPERX6DATA6
TCELL16:IMUX.IMUX36PCIE.PIPERX6VALID
TCELL16:IMUX.IMUX37PCIE.PIPERX6PHYSTATUS
TCELL16:IMUX.IMUX38PCIE.PIPERX6DATA5
TCELL16:IMUX.IMUX39PCIE.PIPERX6DATA4
TCELL16:OUT0PCIE.TRNRD110
TCELL16:OUT1PCIE.TRNRD111
TCELL16:OUT2PCIE.DBGVECA32
TCELL16:OUT3PCIE.LL2LINKSTATUS2
TCELL16:OUT4PCIE.LL2LINKSTATUS3
TCELL16:OUT5PCIE.MIMRXWDATA54
TCELL16:OUT6PCIE.MIMRXWDATA56
TCELL16:OUT7PCIE.MIMRXWADDR3
TCELL16:OUT8PCIE.MIMRXWADDR8
TCELL16:OUT9PCIE.PIPETX4DATA8
TCELL16:OUT10PCIE.MIMRXWDATA64
TCELL16:OUT11PCIE.PIPETX4DATA10
TCELL16:OUT12PCIE.MIMRXWADDR10
TCELL16:OUT13PCIE.PIPETX4DATA9
TCELL16:OUT14PCIE.MIMRXWADDR11
TCELL16:OUT15PCIE.PIPETX4DATA11
TCELL16:OUT16PCIE.MIMRXWDATA48
TCELL16:OUT17PCIE.MIMRXWDATA50
TCELL16:OUT18PCIE.MIMRXWDATA44
TCELL16:OUT19PCIE.MIMRXWDATA62
TCELL16:OUT20PCIE.LL2LINKSTATUS4
TCELL16:OUT21PCIE.TL2PPMSUSPENDOK
TCELL16:OUT22PCIE.DBGVECA33
TCELL16:OUT23PCIE.MIMRXWDATA46
TCELL17:IMUX.IMUX0PCIE.MIMRXRDATA8
TCELL17:IMUX.IMUX1PCIE.MIMRXRDATA9
TCELL17:IMUX.IMUX2PCIE.MIMRXRDATA10
TCELL17:IMUX.IMUX3PCIE.MIMRXRDATA11
TCELL17:IMUX.IMUX4PCIE.MIMRXRDATA64
TCELL17:IMUX.IMUX5PCIE.MIMRXRDATA65
TCELL17:IMUX.IMUX6PCIE.MIMRXRDATA66
TCELL17:IMUX.IMUX7PCIE.MIMRXRDATA67
TCELL17:IMUX.IMUX8PCIE.TRNTD46
TCELL17:IMUX.IMUX9PCIE.TRNTD47
TCELL17:IMUX.IMUX10PCIE.TRNTD48
TCELL17:IMUX.IMUX11PCIE.TRNTD49
TCELL17:IMUX.IMUX12PCIE.EDTCHANNELSIN2
TCELL17:IMUX.IMUX13PCIE.CFGERRATOMICEGRESSBLOCKEDN
TCELL17:IMUX.IMUX14PCIE.CFGERRMCBLOCKEDN
TCELL17:IMUX.IMUX15PCIE.CFGERRINTERNALUNCORN
TCELL17:IMUX.IMUX16PCIE.PIPERX6CHARISK0
TCELL17:IMUX.IMUX17PCIE.CFGERRINTERNALCORN
TCELL17:IMUX.IMUX32PCIE.PIPERX6DATA3
TCELL17:IMUX.IMUX33PCIE.PIPERX6DATA2
TCELL17:IMUX.IMUX36PCIE.PIPERX6DATA1
TCELL17:IMUX.IMUX37PCIE.PIPERX6DATA0
TCELL17:OUT0PCIE.PIPETX4DATA4
TCELL17:OUT1PCIE.PIPETX4POWERDOWN0
TCELL17:OUT2PCIE.PIPETX4DATA6
TCELL17:OUT3PCIE.PIPETX4ELECIDLE
TCELL17:OUT4PCIE.PIPETX4DATA5
TCELL17:OUT5PCIE.TRNRD106
TCELL17:OUT6PCIE.PIPETX4DATA7
TCELL17:OUT7PCIE.PIPETX4POWERDOWN1
TCELL17:OUT8PCIE.TRNRD107
TCELL17:OUT9PCIE.TRNRD108
TCELL17:OUT10PCIE.TRNRD109
TCELL17:OUT11PCIE.MIMRXWDATA53
TCELL17:OUT12PCIE.LL2SUSPENDOK
TCELL17:OUT13PCIE.LL2TXIDLE
TCELL17:OUT14PCIE.MIMRXWDATA67
TCELL17:OUT15PCIE.LL2LINKSTATUS0
TCELL17:OUT16PCIE.PIPETX4CHARISK0
TCELL17:OUT17PCIE.MIMRXWADDR6
TCELL17:OUT18PCIE.MIMRXWDATA66
TCELL17:OUT19PCIE.LL2LINKSTATUS1
TCELL17:OUT20PCIE.DBGVECA29
TCELL17:OUT21PCIE.DBGVECA30
TCELL17:OUT22PCIE.DBGVECA31
TCELL17:OUT23PCIE.MIMRXWDATA39
TCELL18:IMUX.IMUX0PCIE.MIMRXRDATA12
TCELL18:IMUX.IMUX1PCIE.MIMRXRDATA13
TCELL18:IMUX.IMUX2PCIE.MIMRXRDATA14
TCELL18:IMUX.IMUX3PCIE.MIMRXRDATA15
TCELL18:IMUX.IMUX4PCIE.MIMRXRDATA60
TCELL18:IMUX.IMUX5PCIE.MIMRXRDATA61
TCELL18:IMUX.IMUX6PCIE.MIMRXRDATA62
TCELL18:IMUX.IMUX7PCIE.MIMRXRDATA63
TCELL18:IMUX.IMUX8PCIE.TRNTD0
TCELL18:IMUX.IMUX9PCIE.TRNTD1
TCELL18:IMUX.IMUX10PCIE.TRNTD2
TCELL18:IMUX.IMUX11PCIE.TRNTD3
TCELL18:IMUX.IMUX12PCIE.TRNTD42
TCELL18:IMUX.IMUX13PCIE.TRNTD43
TCELL18:IMUX.IMUX14PCIE.TRNTD44
TCELL18:IMUX.IMUX15PCIE.TRNTD45
TCELL18:IMUX.IMUX16PCIE.EDTCHANNELSIN1
TCELL18:IMUX.IMUX17PCIE.CFGERRPOSTEDN
TCELL18:IMUX.IMUX34PCIE.PIPERX4DATA15
TCELL18:IMUX.IMUX35PCIE.PIPERX4DATA14
TCELL18:IMUX.IMUX38PCIE.PIPERX4DATA13
TCELL18:IMUX.IMUX39PCIE.PIPERX4DATA12
TCELL18:OUT0PCIE.TRNRD103
TCELL18:OUT1PCIE.PIPERX4POLARITY
TCELL18:OUT2PCIE.TRNRD104
TCELL18:OUT3PCIE.PIPETX4COMPLIANCE
TCELL18:OUT4PCIE.MIMRXWDATA14
TCELL18:OUT5PCIE.TRNRD105
TCELL18:OUT6PCIE.MIMRXWDATA60
TCELL18:OUT7PCIE.DBGVECA25
TCELL18:OUT8PCIE.DBGVECA26
TCELL18:OUT9PCIE.PIPETX4DATA0
TCELL18:OUT10PCIE.MIMRXWDATA63
TCELL18:OUT11PCIE.PIPETX4DATA2
TCELL18:OUT12PCIE.MIMRXWDATA55
TCELL18:OUT13PCIE.PIPETX4DATA1
TCELL18:OUT14PCIE.MIMRXWDATA59
TCELL18:OUT15PCIE.PIPETX4DATA3
TCELL18:OUT16PCIE.MIMRXRADDR3
TCELL18:OUT17PCIE.MIMRXWDATA45
TCELL18:OUT18PCIE.MIMRXWDATA41
TCELL18:OUT19PCIE.MIMRXWDATA43
TCELL18:OUT20PCIE.DBGVECA27
TCELL18:OUT21PCIE.DBGVECA28
TCELL18:OUT22PCIE.DBGVECB9
TCELL18:OUT23PCIE.XILUNCONNOUT29
TCELL19:IMUX.IMUX0PCIE.MIMRXRDATA16
TCELL19:IMUX.IMUX1PCIE.MIMRXRDATA17
TCELL19:IMUX.IMUX2PCIE.MIMRXRDATA18
TCELL19:IMUX.IMUX3PCIE.MIMRXRDATA19
TCELL19:IMUX.IMUX4PCIE.MIMRXRDATA56
TCELL19:IMUX.IMUX5PCIE.MIMRXRDATA57
TCELL19:IMUX.IMUX6PCIE.MIMRXRDATA58
TCELL19:IMUX.IMUX7PCIE.MIMRXRDATA59
TCELL19:IMUX.IMUX8PCIE.TRNTD4
TCELL19:IMUX.IMUX9PCIE.TRNTD5
TCELL19:IMUX.IMUX10PCIE.TRNTD6
TCELL19:IMUX.IMUX11PCIE.TRNTD7
TCELL19:IMUX.IMUX12PCIE.EDTSINGLEBYPASSCHAIN
TCELL19:IMUX.IMUX16PCIE.PIPERX4CHARISK1
TCELL19:IMUX.IMUX32PCIE.PIPERX4DATA11
TCELL19:IMUX.IMUX33PCIE.PIPERX4DATA10
TCELL19:IMUX.IMUX34PCIE.PIPERX4ELECIDLE
TCELL19:IMUX.IMUX35PCIE.PIPERX4STATUS2
TCELL19:IMUX.IMUX36PCIE.PIPERX4DATA9
TCELL19:IMUX.IMUX37PCIE.PIPERX4DATA8
TCELL19:IMUX.IMUX38PCIE.PIPERX4STATUS1
TCELL19:IMUX.IMUX39PCIE.PIPERX4STATUS0
TCELL19:OUT0PCIE.MIMRXWDATA16
TCELL19:OUT1PCIE.TRNRD99
TCELL19:OUT2PCIE.MIMRXWDATA18
TCELL19:OUT3PCIE.TRNRD100
TCELL19:OUT4PCIE.TRNRD101
TCELL19:OUT5PCIE.MIMRXWDATA57
TCELL19:OUT6PCIE.TRNRD102
TCELL19:OUT7PCIE.PL2RXELECIDLE
TCELL19:OUT8PCIE.MIMRXRADDR5
TCELL19:OUT9PCIE.MIMRXRADDR6
TCELL19:OUT10PCIE.MIMRXWDATA65
TCELL19:OUT11PCIE.MIMRXWADDR7
TCELL19:OUT12PCIE.MIMRXWDATA61
TCELL19:OUT13PCIE.PL2RXPMSTATE0
TCELL19:OUT14PCIE.MIMRXWADDR0
TCELL19:OUT15PCIE.MIMRXRADDR7
TCELL19:OUT16PCIE.MIMRXWADDR4
TCELL19:OUT17PCIE.MIMRXWADDR9
TCELL19:OUT18PCIE.MIMRXWDATA47
TCELL19:OUT19PCIE.PL2RXPMSTATE1
TCELL19:OUT20PCIE.PL2L0REQ
TCELL19:OUT21PCIE.DBGVECA22
TCELL19:OUT22PCIE.DBGVECA23
TCELL19:OUT23PCIE.DBGVECA24
TCELL20:IMUX.IMUX0PCIE.MIMRXRDATA20
TCELL20:IMUX.IMUX1PCIE.MIMRXRDATA21
TCELL20:IMUX.IMUX2PCIE.MIMRXRDATA22
TCELL20:IMUX.IMUX3PCIE.MIMRXRDATA23
TCELL20:IMUX.IMUX4PCIE.MIMRXRDATA52
TCELL20:IMUX.IMUX5PCIE.MIMRXRDATA53
TCELL20:IMUX.IMUX6PCIE.MIMRXRDATA54
TCELL20:IMUX.IMUX7PCIE.MIMRXRDATA55
TCELL20:IMUX.IMUX8PCIE.TRNTD8
TCELL20:IMUX.IMUX9PCIE.TRNTD9
TCELL20:IMUX.IMUX10PCIE.TRNTD10
TCELL20:IMUX.IMUX11PCIE.TRNTD11
TCELL20:IMUX.IMUX12PCIE.TRNTD40
TCELL20:IMUX.IMUX13PCIE.TRNTD41
TCELL20:IMUX.IMUX14PCIE.EDTCONFIGURATION
TCELL20:IMUX.IMUX33PCIE.PIPERX4CHANISALIGNED
TCELL20:IMUX.IMUX34PCIE.PIPERX4DATA7
TCELL20:IMUX.IMUX35PCIE.PIPERX4DATA6
TCELL20:IMUX.IMUX36PCIE.PIPERX4VALID
TCELL20:IMUX.IMUX37PCIE.PIPERX4PHYSTATUS
TCELL20:IMUX.IMUX38PCIE.PIPERX4DATA5
TCELL20:IMUX.IMUX39PCIE.PIPERX4DATA4
TCELL20:OUT0PCIE.MIMRXWDATA20
TCELL20:OUT1PCIE.MIMRXWADDR12
TCELL20:OUT2PCIE.TRNRD95
TCELL20:OUT3PCIE.MIMRXRADDR10
TCELL20:OUT4PCIE.TRNRD96
TCELL20:OUT5PCIE.TRNRD97
TCELL20:OUT6PCIE.TRNRD98
TCELL20:OUT7PCIE.PL2SUSPENDOK
TCELL20:OUT8PCIE.MIMRXRADDR9
TCELL20:OUT9PCIE.MIMRXWDATA4
TCELL20:OUT10PCIE.MIMRXRADDR11
TCELL20:OUT11PCIE.MIMRXWDATA0
TCELL20:OUT12PCIE.PL2RECOVERY
TCELL20:OUT13PCIE.MIMRXWDATA1
TCELL20:OUT14PCIE.DBGVECA18
TCELL20:OUT15PCIE.MIMRXWDATA22
TCELL20:OUT16PCIE.MIMRXWDATA6
TCELL20:OUT17PCIE.MIMRXRADDR8
TCELL20:OUT18PCIE.MIMRXWDATA2
TCELL20:OUT19PCIE.DBGVECA19
TCELL20:OUT20PCIE.DBGVECA20
TCELL20:OUT21PCIE.DBGVECA21
TCELL20:OUT22PCIE.DBGVECB10
TCELL20:OUT23PCIE.XILUNCONNOUT28
TCELL21:IMUX.IMUX0PCIE.MIMRXRDATA24
TCELL21:IMUX.IMUX1PCIE.MIMRXRDATA25
TCELL21:IMUX.IMUX2PCIE.MIMRXRDATA26
TCELL21:IMUX.IMUX3PCIE.MIMRXRDATA27
TCELL21:IMUX.IMUX4PCIE.MIMRXRDATA48
TCELL21:IMUX.IMUX5PCIE.MIMRXRDATA49
TCELL21:IMUX.IMUX6PCIE.MIMRXRDATA50
TCELL21:IMUX.IMUX7PCIE.MIMRXRDATA51
TCELL21:IMUX.IMUX8PCIE.TRNTD12
TCELL21:IMUX.IMUX9PCIE.TRNTD13
TCELL21:IMUX.IMUX10PCIE.TRNTD14
TCELL21:IMUX.IMUX11PCIE.TRNTD15
TCELL21:IMUX.IMUX12PCIE.TRNTD36
TCELL21:IMUX.IMUX13PCIE.TRNTD37
TCELL21:IMUX.IMUX14PCIE.TRNTD38
TCELL21:IMUX.IMUX15PCIE.TRNTD39
TCELL21:IMUX.IMUX16PCIE.PIPERX4CHARISK0
TCELL21:IMUX.IMUX17PCIE.EDTBYPASS
TCELL21:IMUX.IMUX32PCIE.PIPERX4DATA3
TCELL21:IMUX.IMUX33PCIE.PIPERX4DATA2
TCELL21:IMUX.IMUX36PCIE.PIPERX4DATA1
TCELL21:IMUX.IMUX37PCIE.PIPERX4DATA0
TCELL21:OUT0PCIE.MIMRXWDATA24
TCELL21:OUT1PCIE.TRNRD91
TCELL21:OUT2PCIE.MIMRXWDATA12
TCELL21:OUT3PCIE.TRNRD92
TCELL21:OUT4PCIE.TRNRD93
TCELL21:OUT5PCIE.MIMRXWDATA49
TCELL21:OUT6PCIE.TRNRD94
TCELL21:OUT7PCIE.MIMRXWDATA51
TCELL21:OUT8PCIE.MIMRXWDATA8
TCELL21:OUT9PCIE.MIMRXWADDR5
TCELL21:OUT10PCIE.TRNRDLLPSRCRDY0
TCELL21:OUT11PCIE.MIMRXRADDR1
TCELL21:OUT12PCIE.MIMRXREN
TCELL21:OUT13PCIE.MIMRXWDATA26
TCELL21:OUT14PCIE.TRNRDLLPSRCRDY1
TCELL21:OUT15PCIE.MIMRXWADDR1
TCELL21:OUT16PCIE.LL2TFCINIT1SEQ
TCELL21:OUT17PCIE.MIMRXWDATA34
TCELL21:OUT18PCIE.MIMRXWEN
TCELL21:OUT19PCIE.MIMRXWDATA10
TCELL21:OUT20PCIE.LL2TFCINIT2SEQ
TCELL21:OUT21PCIE.CFGMGMTDO16
TCELL21:OUT22PCIE.DBGVECA16
TCELL21:OUT23PCIE.DBGVECA17
TCELL22:IMUX.IMUX0PCIE.MIMRXRDATA28
TCELL22:IMUX.IMUX1PCIE.MIMRXRDATA29
TCELL22:IMUX.IMUX2PCIE.MIMRXRDATA30
TCELL22:IMUX.IMUX3PCIE.MIMRXRDATA31
TCELL22:IMUX.IMUX4PCIE.MIMRXRDATA44
TCELL22:IMUX.IMUX5PCIE.MIMRXRDATA45
TCELL22:IMUX.IMUX6PCIE.MIMRXRDATA46
TCELL22:IMUX.IMUX7PCIE.MIMRXRDATA47
TCELL22:IMUX.IMUX8PCIE.TRNTD16
TCELL22:IMUX.IMUX9PCIE.TRNTD17
TCELL22:IMUX.IMUX10PCIE.TRNTD18
TCELL22:IMUX.IMUX11PCIE.TRNTD19
TCELL22:IMUX.IMUX12PCIE.TRNTD32
TCELL22:IMUX.IMUX13PCIE.TRNTD33
TCELL22:IMUX.IMUX14PCIE.TRNTD34
TCELL22:IMUX.IMUX15PCIE.TRNTD35
TCELL22:IMUX.IMUX16PCIE.EDTUPDATE
TCELL22:IMUX.IMUX17PCIE.CFGERRLOCKEDN
TCELL22:IMUX.IMUX18PCIE.CFGERRNORECOVERYN
TCELL22:IMUX.IMUX19PCIE.CFGERRAERHEADERLOG0
TCELL22:IMUX.IMUX20PCIE.CFGERRAERHEADERLOG1
TCELL22:IMUX.IMUX21PCIE.CFGERRAERHEADERLOG11
TCELL22:OUT0PCIE.MIMRXWADDR2
TCELL22:OUT1PCIE.MIMRXWDATA32
TCELL22:OUT2PCIE.TRNRD87
TCELL22:OUT3PCIE.TRNRD88
TCELL22:OUT4PCIE.TRNRD89
TCELL22:OUT5PCIE.MIMRXRADDR4
TCELL22:OUT6PCIE.TRNRD90
TCELL22:OUT7PCIE.TRNRDLLPDATA60
TCELL22:OUT8PCIE.TRNRDLLPDATA61
TCELL22:OUT9PCIE.MIMRXWDATA17
TCELL22:OUT10PCIE.TRNRDLLPDATA62
TCELL22:OUT11PCIE.TRNRDLLPDATA63
TCELL22:OUT12PCIE.MIMRXRADDR2
TCELL22:OUT13PCIE.MIMRXRADDR0
TCELL22:OUT14PCIE.MIMRXWDATA28
TCELL22:OUT15PCIE.MIMRXWDATA3
TCELL22:OUT16PCIE.CFGMGMTDO17
TCELL22:OUT17PCIE.CFGMGMTDO18
TCELL22:OUT18PCIE.MIMRXWDATA30
TCELL22:OUT19PCIE.CFGMGMTDO19
TCELL22:OUT20PCIE.DBGVECA14
TCELL22:OUT21PCIE.MIMRXWDATA31
TCELL22:OUT22PCIE.MIMRXWDATA33
TCELL22:OUT23PCIE.DBGVECA15
TCELL23:IMUX.IMUX0PCIE.MIMRXRDATA32
TCELL23:IMUX.IMUX1PCIE.MIMRXRDATA33
TCELL23:IMUX.IMUX2PCIE.MIMRXRDATA34
TCELL23:IMUX.IMUX3PCIE.MIMRXRDATA35
TCELL23:IMUX.IMUX4PCIE.MIMRXRDATA40
TCELL23:IMUX.IMUX5PCIE.MIMRXRDATA41
TCELL23:IMUX.IMUX6PCIE.MIMRXRDATA42
TCELL23:IMUX.IMUX7PCIE.MIMRXRDATA43
TCELL23:IMUX.IMUX8PCIE.TRNTD20
TCELL23:IMUX.IMUX9PCIE.TRNTD21
TCELL23:IMUX.IMUX10PCIE.TRNTD22
TCELL23:IMUX.IMUX11PCIE.TRNTD23
TCELL23:IMUX.IMUX12PCIE.TRNTD28
TCELL23:IMUX.IMUX13PCIE.TRNTD29
TCELL23:IMUX.IMUX14PCIE.TRNTD30
TCELL23:IMUX.IMUX15PCIE.TRNTD31
TCELL23:IMUX.IMUX16PCIE.LL2SUSPENDNOW
TCELL23:IMUX.IMUX17PCIE.TL2PPMSUSPENDREQ
TCELL23:IMUX.IMUX18PCIE.TL2ASPMSUSPENDCREDITCHECK
TCELL23:IMUX.IMUX19PCIE.SCANMODEN
TCELL23:IMUX.IMUX20PCIE.CFGERRAERHEADERLOG2
TCELL23:IMUX.IMUX21PCIE.CFGERRAERHEADERLOG3
TCELL23:IMUX.IMUX22PCIE.CFGERRAERHEADERLOG4
TCELL23:IMUX.IMUX23PCIE.CFGERRAERHEADERLOG5
TCELL23:IMUX.IMUX24PCIE.CFGERRAERHEADERLOG10
TCELL23:OUT0PCIE.TRNRD83
TCELL23:OUT1PCIE.TRNRD84
TCELL23:OUT2PCIE.TRNRD85
TCELL23:OUT3PCIE.MIMRXWDATA9
TCELL23:OUT4PCIE.TRNRD86
TCELL23:OUT5PCIE.TRNRDLLPDATA56
TCELL23:OUT6PCIE.TRNRDLLPDATA57
TCELL23:OUT7PCIE.TRNRDLLPDATA58
TCELL23:OUT8PCIE.MIMRXWDATA19
TCELL23:OUT9PCIE.TRNRDLLPDATA59
TCELL23:OUT10PCIE.MIMRXWDATA25
TCELL23:OUT11PCIE.CFGMGMTDO20
TCELL23:OUT12PCIE.CFGMGMTDO21
TCELL23:OUT13PCIE.CFGMGMTDO22
TCELL23:OUT14PCIE.MIMRXWDATA23
TCELL23:OUT15PCIE.CFGMGMTDO23
TCELL23:OUT16PCIE.CFGMGMTDO28
TCELL23:OUT17PCIE.CFGMGMTDO29
TCELL23:OUT18PCIE.CFGMGMTDO30
TCELL23:OUT19PCIE.MIMRXWDATA21
TCELL23:OUT20PCIE.DBGVECA12
TCELL23:OUT21PCIE.DBGVECA13
TCELL23:OUT22PCIE.MIMRXWDATA5
TCELL23:OUT23PCIE.MIMRXWDATA7
TCELL24:IMUX.IMUX0PCIE.MIMRXRDATA36
TCELL24:IMUX.IMUX1PCIE.MIMRXRDATA37
TCELL24:IMUX.IMUX2PCIE.MIMRXRDATA38
TCELL24:IMUX.IMUX3PCIE.MIMRXRDATA39
TCELL24:IMUX.IMUX4PCIE.TRNTD24
TCELL24:IMUX.IMUX5PCIE.TRNTD25
TCELL24:IMUX.IMUX6PCIE.TRNTD26
TCELL24:IMUX.IMUX7PCIE.TRNTD27
TCELL24:IMUX.IMUX8PCIE.PL2DIRECTEDLSTATE1
TCELL24:IMUX.IMUX9PCIE.PL2DIRECTEDLSTATE2
TCELL24:IMUX.IMUX10PCIE.PL2DIRECTEDLSTATE3
TCELL24:IMUX.IMUX11PCIE.PL2DIRECTEDLSTATE4
TCELL24:IMUX.IMUX12PCIE.SCANENABLEN
TCELL24:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG6
TCELL24:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG7
TCELL24:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG8
TCELL24:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG9
TCELL24:IMUX.IMUX17PCIE.CFGERRTLPCPLHEADER46
TCELL24:IMUX.IMUX18PCIE.CFGERRTLPCPLHEADER47
TCELL24:IMUX.IMUX19PCIE.CFGINTERRUPTN
TCELL24:IMUX.IMUX20PCIE.CFGINTERRUPTDI0
TCELL24:IMUX.IMUX21PCIE.CFGDEVID13
TCELL24:IMUX.IMUX22PCIE.CFGDEVID14
TCELL24:IMUX.IMUX23PCIE.CFGDEVID15
TCELL24:IMUX.IMUX24PCIE.CFGVENDID0
TCELL24:IMUX.IMUX25PCIE.DBGMODE0
TCELL24:OUT0PCIE.TRNRD79
TCELL24:OUT1PCIE.TRNTDSTRDY3
TCELL24:OUT2PCIE.TRNRD80
TCELL24:OUT3PCIE.TRNRD81
TCELL24:OUT4PCIE.TRNRD82
TCELL24:OUT5PCIE.TRNRDLLPDATA52
TCELL24:OUT6PCIE.TRNRDLLPDATA53
TCELL24:OUT7PCIE.TRNRDLLPDATA54
TCELL24:OUT8PCIE.MIMRXWDATA29
TCELL24:OUT9PCIE.MIMRXWDATA13
TCELL24:OUT10PCIE.MIMRXWDATA15
TCELL24:OUT11PCIE.MIMRXWDATA35
TCELL24:OUT12PCIE.TRNRDLLPDATA55
TCELL24:OUT13PCIE.CFGMGMTDO24
TCELL24:OUT14PCIE.CFGMGMTDO25
TCELL24:OUT15PCIE.CFGMGMTDO26
TCELL24:OUT16PCIE.CFGMGMTDO27
TCELL24:OUT17PCIE.CFGCOMMANDMEMENABLE
TCELL24:OUT18PCIE.MIMRXWDATA11
TCELL24:OUT19PCIE.MIMRXWDATA27
TCELL24:OUT20PCIE.CFGCOMMANDBUSMASTERENABLE
TCELL24:OUT21PCIE.CFGCOMMANDINTERRUPTDISABLE
TCELL24:OUT22PCIE.DBGVECA11
TCELL24:OUT23PCIE.CFGDEVCONTROL2LTREN
TCELL25:IMUX.IMUX0PCIE.PLDIRECTEDLINKCHANGE0
TCELL25:IMUX.IMUX1PCIE.PLDIRECTEDLINKCHANGE1
TCELL25:IMUX.IMUX2PCIE.PLDIRECTEDLINKWIDTH0
TCELL25:IMUX.IMUX3PCIE.PLDIRECTEDLINKWIDTH1
TCELL25:IMUX.IMUX4PCIE.PLDIRECTEDLINKSPEED
TCELL25:IMUX.IMUX5PCIE.PLDIRECTEDLINKAUTON
TCELL25:IMUX.IMUX6PCIE.PLUPSTREAMPREFERDEEMPH
TCELL25:IMUX.IMUX7PCIE.PLDOWNSTREAMDEEMPHSOURCE
TCELL25:IMUX.IMUX8PCIE.PLDIRECTEDLTSSMNEWVLD
TCELL25:IMUX.IMUX9PCIE.PLDIRECTEDLTSSMNEW0
TCELL25:IMUX.IMUX10PCIE.PLDIRECTEDLTSSMNEW1
TCELL25:IMUX.IMUX11PCIE.PLDIRECTEDLTSSMNEW2
TCELL25:IMUX.IMUX12PCIE.PLDIRECTEDLTSSMNEW3
TCELL25:IMUX.IMUX13PCIE.CFGERRAERHEADERLOG74
TCELL25:IMUX.IMUX14PCIE.CFGERRAERHEADERLOG75
TCELL25:IMUX.IMUX15PCIE.CFGERRAERHEADERLOG76
TCELL25:IMUX.IMUX16PCIE.CFGERRAERHEADERLOG77
TCELL25:IMUX.IMUX17PCIE.CFGPORTNUMBER4
TCELL25:IMUX.IMUX18PCIE.CFGPORTNUMBER5
TCELL25:IMUX.IMUX19PCIE.CFGPORTNUMBER6
TCELL25:IMUX.IMUX20PCIE.CFGPORTNUMBER7
TCELL25:OUT0PCIE.PIPETX3DATA12
TCELL25:OUT1PCIE.PLSELLNKRATE
TCELL25:OUT2PCIE.PIPETX3DATA14
TCELL25:OUT3PCIE.PLSELLNKWIDTH0
TCELL25:OUT4PCIE.PIPETX3DATA13
TCELL25:OUT5PCIE.PLSELLNKWIDTH1
TCELL25:OUT6PCIE.PIPETX3DATA15
TCELL25:OUT7PCIE.PLLTSSMSTATE0
TCELL25:OUT8PCIE.PLLTSSMSTATE1
TCELL25:OUT9PCIE.PLLTSSMSTATE2
TCELL25:OUT10PCIE.PLLTSSMSTATE3
TCELL25:OUT11PCIE.PLLTSSMSTATE4
TCELL25:OUT12PCIE.PLLTSSMSTATE5
TCELL25:OUT13PCIE.PLLANEREVERSALMODE0
TCELL25:OUT14PCIE.PLLANEREVERSALMODE1
TCELL25:OUT15PCIE.PLPHYLNKUPN
TCELL25:OUT16PCIE.PIPETX3CHARISK1
TCELL25:OUT17PCIE.PLTXPMSTATE0
TCELL25:OUT18PCIE.PLTXPMSTATE1
TCELL25:OUT19PCIE.PLTXPMSTATE2
TCELL25:OUT20PCIE.DBGVECB36
TCELL25:OUT21PCIE.DBGVECB37
TCELL25:OUT22PCIE.DBGVECB38
TCELL25:OUT23PCIE.XILUNCONNOUT6
TCELL26:IMUX.IMUX0PCIE.PLDIRECTEDLTSSMNEW4
TCELL26:IMUX.IMUX1PCIE.PLDIRECTEDLTSSMNEW5
TCELL26:IMUX.IMUX2PCIE.PLDIRECTEDLTSSMSTALL
TCELL26:IMUX.IMUX3PCIE.TRNTD91
TCELL26:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG78
TCELL26:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG79
TCELL26:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG80
TCELL26:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG81
TCELL26:IMUX.IMUX8PCIE.CFGPMHALTASPML0SN
TCELL26:IMUX.IMUX9PCIE.CFGPMHALTASPML1N
TCELL26:IMUX.IMUX10PCIE.CFGPMFORCESTATEENN
TCELL26:IMUX.IMUX11PCIE.CFGPMFORCESTATE0
TCELL26:IMUX.IMUX12PCIE.CFGREVID0
TCELL26:IMUX.IMUX13PCIE.CFGREVID1
TCELL26:IMUX.IMUX14PCIE.CFGREVID2
TCELL26:IMUX.IMUX15PCIE.CFGREVID3
TCELL26:IMUX.IMUX16PCIE.PLDBGMODE1
TCELL26:IMUX.IMUX17PCIE.PLDBGMODE2
TCELL26:OUT0PCIE.PLRXPMSTATE0
TCELL26:OUT1PCIE.PLRXPMSTATE1
TCELL26:OUT2PCIE.PLLINKUPCFGCAP
TCELL26:OUT3PCIE.PLLINKGEN2CAP
TCELL26:OUT4PCIE.TRNFCPD9
TCELL26:OUT5PCIE.TRNFCPD10
TCELL26:OUT6PCIE.TRNFCPD11
TCELL26:OUT7PCIE.TRNFCNPH0
TCELL26:OUT8PCIE.TL2ERRHDR19
TCELL26:OUT9PCIE.PIPETX3DATA8
TCELL26:OUT10PCIE.TL2ERRHDR20
TCELL26:OUT11PCIE.PIPETX3DATA10
TCELL26:OUT12PCIE.TL2ERRHDR21
TCELL26:OUT13PCIE.PIPETX3DATA9
TCELL26:OUT14PCIE.TL2ERRHDR22
TCELL26:OUT15PCIE.PIPETX3DATA11
TCELL26:OUT16PCIE.CFGINTERRUPTMMENABLE2
TCELL26:OUT17PCIE.CFGINTERRUPTMSIENABLE
TCELL26:OUT18PCIE.DBGVECB39
TCELL26:OUT19PCIE.DBGVECB40
TCELL26:OUT20PCIE.DBGVECB41
TCELL26:OUT21PCIE.DBGVECB42
TCELL26:OUT22PCIE.XILUNCONNOUT7
TCELL26:OUT23PCIE.XILUNCONNOUT8
TCELL27:IMUX.IMUX0PCIE.TRNTD92
TCELL27:IMUX.IMUX1PCIE.TRNTD93
TCELL27:IMUX.IMUX2PCIE.TRNTD94
TCELL27:IMUX.IMUX3PCIE.TRNTD95
TCELL27:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG82
TCELL27:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG83
TCELL27:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG84
TCELL27:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG85
TCELL27:IMUX.IMUX8PCIE.CFGPMFORCESTATE1
TCELL27:IMUX.IMUX9PCIE.CFGPMWAKEN
TCELL27:IMUX.IMUX10PCIE.CFGPMTURNOFFOKN
TCELL27:IMUX.IMUX11PCIE.CFGPMSENDPMETON
TCELL27:IMUX.IMUX12PCIE.CFGREVID4
TCELL27:IMUX.IMUX13PCIE.CFGREVID5
TCELL27:IMUX.IMUX14PCIE.CFGREVID6
TCELL27:IMUX.IMUX15PCIE.CFGREVID7
TCELL27:OUT0PCIE.PIPETX3DATA4
TCELL27:OUT1PCIE.PIPETX3POWERDOWN0
TCELL27:OUT2PCIE.PIPETX3DATA6
TCELL27:OUT3PCIE.PIPETX3ELECIDLE
TCELL27:OUT4PCIE.PIPETX3DATA5
TCELL27:OUT5PCIE.PLLINKPARTNERGEN2SUPPORTED
TCELL27:OUT6PCIE.PIPETX3DATA7
TCELL27:OUT7PCIE.PIPETX3POWERDOWN1
TCELL27:OUT8PCIE.PLINITIALLINKWIDTH0
TCELL27:OUT9PCIE.PLINITIALLINKWIDTH1
TCELL27:OUT10PCIE.PLINITIALLINKWIDTH2
TCELL27:OUT11PCIE.TRNFCNPH1
TCELL27:OUT12PCIE.TRNFCNPH2
TCELL27:OUT13PCIE.TRNFCNPH3
TCELL27:OUT14PCIE.TRNFCNPH4
TCELL27:OUT15PCIE.TL2ERRHDR23
TCELL27:OUT16PCIE.PIPETX3CHARISK0
TCELL27:OUT17PCIE.TL2ERRHDR24
TCELL27:OUT18PCIE.DBGVECB43
TCELL27:OUT19PCIE.DBGVECB44
TCELL27:OUT20PCIE.DBGVECB45
TCELL27:OUT21PCIE.DBGVECB46
TCELL27:OUT22PCIE.XILUNCONNOUT9
TCELL27:OUT23PCIE.XILUNCONNOUT10
TCELL28:IMUX.IMUX0PCIE.TRNTD96
TCELL28:IMUX.IMUX1PCIE.TRNTD97
TCELL28:IMUX.IMUX2PCIE.TRNTD98
TCELL28:IMUX.IMUX3PCIE.TRNTD99
TCELL28:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG86
TCELL28:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG87
TCELL28:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG88
TCELL28:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG89
TCELL28:IMUX.IMUX8PCIE.CFGPCIECAPINTERRUPTMSGNUM0
TCELL28:IMUX.IMUX9PCIE.CFGPCIECAPINTERRUPTMSGNUM1
TCELL28:IMUX.IMUX10PCIE.CFGPCIECAPINTERRUPTMSGNUM2
TCELL28:IMUX.IMUX11PCIE.CFGPCIECAPINTERRUPTMSGNUM3
TCELL28:IMUX.IMUX12PCIE.CFGSUBSYSID0
TCELL28:IMUX.IMUX13PCIE.CFGSUBSYSID1
TCELL28:IMUX.IMUX14PCIE.CFGSUBSYSID2
TCELL28:IMUX.IMUX15PCIE.CFGSUBSYSID3
TCELL28:IMUX.IMUX34PCIE.PIPERX3DATA15
TCELL28:IMUX.IMUX35PCIE.PIPERX3DATA14
TCELL28:IMUX.IMUX38PCIE.PIPERX3DATA13
TCELL28:IMUX.IMUX39PCIE.PIPERX3DATA12
TCELL28:OUT0PCIE.PLDIRECTEDCHANGEDONE
TCELL28:OUT1PCIE.PIPERX3POLARITY
TCELL28:OUT2PCIE.TRNTERRDROP
TCELL28:OUT3PCIE.PIPETX3COMPLIANCE
TCELL28:OUT4PCIE.TRNTBUFAV0
TCELL28:OUT5PCIE.TRNTBUFAV1
TCELL28:OUT6PCIE.TRNFCNPH5
TCELL28:OUT7PCIE.TRNFCNPH6
TCELL28:OUT8PCIE.TRNFCNPH7
TCELL28:OUT9PCIE.PIPETX3DATA0
TCELL28:OUT10PCIE.TRNFCNPD0
TCELL28:OUT11PCIE.PIPETX3DATA2
TCELL28:OUT12PCIE.TL2ERRHDR25
TCELL28:OUT13PCIE.PIPETX3DATA1
TCELL28:OUT14PCIE.TL2ERRHDR26
TCELL28:OUT15PCIE.PIPETX3DATA3
TCELL28:OUT16PCIE.TL2ERRHDR27
TCELL28:OUT17PCIE.TL2ERRHDR28
TCELL28:OUT18PCIE.DBGVECB47
TCELL28:OUT19PCIE.DBGVECB48
TCELL28:OUT20PCIE.DBGVECB49
TCELL28:OUT21PCIE.DBGVECB50
TCELL28:OUT22PCIE.XILUNCONNOUT11
TCELL28:OUT23PCIE.XILUNCONNOUT12
TCELL29:IMUX.IMUX0PCIE.TRNTD100
TCELL29:IMUX.IMUX1PCIE.TRNTD101
TCELL29:IMUX.IMUX2PCIE.TRNTD102
TCELL29:IMUX.IMUX3PCIE.TRNTD103
TCELL29:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG90
TCELL29:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG91
TCELL29:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG92
TCELL29:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG93
TCELL29:IMUX.IMUX8PCIE.CFGPCIECAPINTERRUPTMSGNUM4
TCELL29:IMUX.IMUX9PCIE.CFGTRNPENDINGN
TCELL29:IMUX.IMUX10PCIE.CFGFORCEMPS0
TCELL29:IMUX.IMUX11PCIE.CFGFORCEMPS1
TCELL29:IMUX.IMUX16PCIE.PIPERX3CHARISK1
TCELL29:IMUX.IMUX32PCIE.PIPERX3DATA11
TCELL29:IMUX.IMUX33PCIE.PIPERX3DATA10
TCELL29:IMUX.IMUX34PCIE.PIPERX3ELECIDLE
TCELL29:IMUX.IMUX35PCIE.PIPERX3STATUS2
TCELL29:IMUX.IMUX36PCIE.PIPERX3DATA9
TCELL29:IMUX.IMUX37PCIE.PIPERX3DATA8
TCELL29:IMUX.IMUX38PCIE.PIPERX3STATUS1
TCELL29:IMUX.IMUX39PCIE.PIPERX3STATUS0
TCELL29:OUT0PCIE.PIPETX1DATA12
TCELL29:OUT1PCIE.TRNTBUFAV2
TCELL29:OUT2PCIE.PIPETX1DATA14
TCELL29:OUT3PCIE.TRNTBUFAV3
TCELL29:OUT4PCIE.PIPETX1DATA13
TCELL29:OUT5PCIE.TRNTBUFAV4
TCELL29:OUT6PCIE.PIPETX1DATA15
TCELL29:OUT7PCIE.TRNTBUFAV5
TCELL29:OUT8PCIE.TRNFCNPD1
TCELL29:OUT9PCIE.TRNFCNPD2
TCELL29:OUT10PCIE.TRNFCNPD3
TCELL29:OUT11PCIE.TRNFCNPD4
TCELL29:OUT12PCIE.TL2ERRHDR29
TCELL29:OUT13PCIE.TL2ERRHDR30
TCELL29:OUT14PCIE.TL2ERRHDR31
TCELL29:OUT15PCIE.TL2ERRHDR32
TCELL29:OUT16PCIE.PIPETX1CHARISK1
TCELL29:OUT17PCIE.CFGINTERRUPTMSIXENABLE
TCELL29:OUT18PCIE.DBGVECB51
TCELL29:OUT19PCIE.DBGVECB52
TCELL29:OUT20PCIE.DBGVECB53
TCELL29:OUT21PCIE.DBGVECB54
TCELL29:OUT22PCIE.XILUNCONNOUT13
TCELL29:OUT23PCIE.XILUNCONNOUT14
TCELL30:IMUX.IMUX0PCIE.TRNTD104
TCELL30:IMUX.IMUX1PCIE.TRNTD105
TCELL30:IMUX.IMUX2PCIE.TRNTD106
TCELL30:IMUX.IMUX3PCIE.TRNTD107
TCELL30:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG94
TCELL30:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG95
TCELL30:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG96
TCELL30:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG97
TCELL30:IMUX.IMUX8PCIE.CFGFORCEMPS2
TCELL30:IMUX.IMUX9PCIE.CFGFORCECOMMONCLOCKOFF
TCELL30:IMUX.IMUX10PCIE.CFGFORCEEXTENDEDSYNCON
TCELL30:IMUX.IMUX11PCIE.CFGDSN0
TCELL30:IMUX.IMUX12PCIE.CFGSUBSYSID4
TCELL30:IMUX.IMUX13PCIE.CFGSUBSYSID5
TCELL30:IMUX.IMUX33PCIE.PIPERX3CHANISALIGNED
TCELL30:IMUX.IMUX34PCIE.PIPERX3DATA7
TCELL30:IMUX.IMUX35PCIE.PIPERX3DATA6
TCELL30:IMUX.IMUX36PCIE.PIPERX3VALID
TCELL30:IMUX.IMUX37PCIE.PIPERX3PHYSTATUS
TCELL30:IMUX.IMUX38PCIE.PIPERX3DATA5
TCELL30:IMUX.IMUX39PCIE.PIPERX3DATA4
TCELL30:OUT0PCIE.TRNTCFGREQ
TCELL30:OUT1PCIE.TRNRD0
TCELL30:OUT2PCIE.TRNRD1
TCELL30:OUT3PCIE.TRNRD2
TCELL30:OUT4PCIE.TRNFCNPD5
TCELL30:OUT5PCIE.TRNFCNPD6
TCELL30:OUT6PCIE.TRNFCNPD7
TCELL30:OUT7PCIE.TRNFCNPD8
TCELL30:OUT8PCIE.TL2ERRHDR33
TCELL30:OUT9PCIE.PIPETX1DATA8
TCELL30:OUT10PCIE.TL2ERRHDR34
TCELL30:OUT11PCIE.PIPETX1DATA10
TCELL30:OUT12PCIE.TL2ERRHDR35
TCELL30:OUT13PCIE.PIPETX1DATA9
TCELL30:OUT14PCIE.TL2ERRHDR36
TCELL30:OUT15PCIE.PIPETX1DATA11
TCELL30:OUT16PCIE.CFGINTERRUPTMSIXFM
TCELL30:OUT17PCIE.CFGINTERRUPTDO0
TCELL30:OUT18PCIE.DBGVECB55
TCELL30:OUT19PCIE.DBGVECB56
TCELL30:OUT20PCIE.DBGVECB57
TCELL30:OUT21PCIE.DBGVECB58
TCELL30:OUT22PCIE.XILUNCONNOUT15
TCELL30:OUT23PCIE.XILUNCONNOUT16
TCELL31:IMUX.IMUX0PCIE.TRNTD108
TCELL31:IMUX.IMUX1PCIE.TRNTD109
TCELL31:IMUX.IMUX2PCIE.TRNTD110
TCELL31:IMUX.IMUX3PCIE.TRNTD111
TCELL31:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG98
TCELL31:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG99
TCELL31:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG100
TCELL31:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG101
TCELL31:IMUX.IMUX8PCIE.CFGDSN1
TCELL31:IMUX.IMUX9PCIE.CFGDSN2
TCELL31:IMUX.IMUX10PCIE.CFGDSN3
TCELL31:IMUX.IMUX11PCIE.CFGDSN4
TCELL31:IMUX.IMUX12PCIE.CFGSUBSYSID6
TCELL31:IMUX.IMUX13PCIE.CFGSUBSYSID7
TCELL31:IMUX.IMUX14PCIE.CFGSUBSYSID8
TCELL31:IMUX.IMUX15PCIE.CFGSUBSYSID9
TCELL31:IMUX.IMUX16PCIE.PIPERX3CHARISK0
TCELL31:IMUX.IMUX32PCIE.PIPERX3DATA3
TCELL31:IMUX.IMUX33PCIE.PIPERX3DATA2
TCELL31:IMUX.IMUX36PCIE.PIPERX3DATA1
TCELL31:IMUX.IMUX37PCIE.PIPERX3DATA0
TCELL31:OUT0PCIE.PIPETX1DATA4
TCELL31:OUT1PCIE.PIPETX1POWERDOWN0
TCELL31:OUT2PCIE.PIPETX1DATA6
TCELL31:OUT3PCIE.PIPETX1ELECIDLE
TCELL31:OUT4PCIE.PIPETX1DATA5
TCELL31:OUT5PCIE.TRNRD3
TCELL31:OUT6PCIE.PIPETX1DATA7
TCELL31:OUT7PCIE.PIPETX1POWERDOWN1
TCELL31:OUT8PCIE.TRNRD4
TCELL31:OUT9PCIE.TRNRD5
TCELL31:OUT10PCIE.TRNRD6
TCELL31:OUT11PCIE.TRNFCNPD9
TCELL31:OUT12PCIE.TRNFCNPD10
TCELL31:OUT13PCIE.TRNFCNPD11
TCELL31:OUT14PCIE.TRNFCCPLH0
TCELL31:OUT15PCIE.TL2ERRHDR37
TCELL31:OUT16PCIE.PIPETX1CHARISK0
TCELL31:OUT17PCIE.TL2ERRHDR38
TCELL31:OUT18PCIE.DBGVECB59
TCELL31:OUT19PCIE.DBGVECB60
TCELL31:OUT20PCIE.DBGVECB61
TCELL31:OUT21PCIE.DBGVECB62
TCELL31:OUT22PCIE.XILUNCONNOUT17
TCELL31:OUT23PCIE.XILUNCONNOUT18
TCELL32:IMUX.IMUX0PCIE.TRNTD112
TCELL32:IMUX.IMUX1PCIE.TRNTD113
TCELL32:IMUX.IMUX2PCIE.TRNTD114
TCELL32:IMUX.IMUX3PCIE.TRNTD115
TCELL32:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG102
TCELL32:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG103
TCELL32:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG104
TCELL32:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG105
TCELL32:IMUX.IMUX8PCIE.CFGDSN5
TCELL32:IMUX.IMUX9PCIE.CFGDSN6
TCELL32:IMUX.IMUX10PCIE.CFGDSN7
TCELL32:IMUX.IMUX11PCIE.CFGDSN8
TCELL32:IMUX.IMUX12PCIE.CFGSUBSYSID10
TCELL32:IMUX.IMUX13PCIE.CFGSUBSYSID11
TCELL32:IMUX.IMUX14PCIE.CFGSUBSYSID12
TCELL32:IMUX.IMUX15PCIE.CFGSUBSYSID13
TCELL32:IMUX.IMUX34PCIE.PIPERX1DATA15
TCELL32:IMUX.IMUX35PCIE.PIPERX1DATA14
TCELL32:IMUX.IMUX38PCIE.PIPERX1DATA13
TCELL32:IMUX.IMUX39PCIE.PIPERX1DATA12
TCELL32:OUT0PCIE.TRNRD7
TCELL32:OUT1PCIE.PIPERX1POLARITY
TCELL32:OUT2PCIE.TRNRD8
TCELL32:OUT3PCIE.PIPETX1COMPLIANCE
TCELL32:OUT4PCIE.TRNRD9
TCELL32:OUT5PCIE.TRNRD10
TCELL32:OUT6PCIE.TRNFCCPLH1
TCELL32:OUT7PCIE.TRNFCCPLH2
TCELL32:OUT8PCIE.TRNFCCPLH3
TCELL32:OUT9PCIE.PIPETX1DATA0
TCELL32:OUT10PCIE.TRNFCCPLH4
TCELL32:OUT11PCIE.PIPETX1DATA2
TCELL32:OUT12PCIE.TL2ERRHDR39
TCELL32:OUT13PCIE.PIPETX1DATA1
TCELL32:OUT14PCIE.TL2ERRHDR40
TCELL32:OUT15PCIE.PIPETX1DATA3
TCELL32:OUT16PCIE.TL2ERRHDR41
TCELL32:OUT17PCIE.TL2ERRHDR42
TCELL32:OUT18PCIE.DBGVECB63
TCELL32:OUT19PCIE.DBGVECC0
TCELL32:OUT20PCIE.DBGVECC1
TCELL32:OUT21PCIE.DBGVECC2
TCELL32:OUT22PCIE.XILUNCONNOUT19
TCELL32:OUT23PCIE.XILUNCONNOUT20
TCELL33:IMUX.IMUX0PCIE.TRNTD116
TCELL33:IMUX.IMUX1PCIE.TRNTD117
TCELL33:IMUX.IMUX2PCIE.TRNTD118
TCELL33:IMUX.IMUX3PCIE.TRNTD119
TCELL33:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG106
TCELL33:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG107
TCELL33:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG108
TCELL33:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG109
TCELL33:IMUX.IMUX8PCIE.CFGDSN9
TCELL33:IMUX.IMUX9PCIE.CFGDSN10
TCELL33:IMUX.IMUX10PCIE.CFGDSN11
TCELL33:IMUX.IMUX11PCIE.CFGDSN12
TCELL33:IMUX.IMUX16PCIE.PIPERX1CHARISK1
TCELL33:IMUX.IMUX32PCIE.PIPERX1DATA11
TCELL33:IMUX.IMUX33PCIE.PIPERX1DATA10
TCELL33:IMUX.IMUX34PCIE.PIPERX1ELECIDLE
TCELL33:IMUX.IMUX35PCIE.PIPERX1STATUS2
TCELL33:IMUX.IMUX36PCIE.PIPERX1DATA9
TCELL33:IMUX.IMUX37PCIE.PIPERX1DATA8
TCELL33:IMUX.IMUX38PCIE.PIPERX1STATUS1
TCELL33:IMUX.IMUX39PCIE.PIPERX1STATUS0
TCELL33:OUT0PCIE.TRNRD11
TCELL33:OUT1PCIE.TRNRD12
TCELL33:OUT2PCIE.TRNRD13
TCELL33:OUT3PCIE.TRNRD14
TCELL33:OUT4PCIE.TRNFCCPLH5
TCELL33:OUT5PCIE.TRNFCCPLH6
TCELL33:OUT6PCIE.TRNFCCPLH7
TCELL33:OUT7PCIE.TRNFCCPLD0
TCELL33:OUT8PCIE.TL2ERRHDR43
TCELL33:OUT9PCIE.TL2ERRHDR44
TCELL33:OUT10PCIE.TL2ERRHDR45
TCELL33:OUT11PCIE.TL2ERRHDR46
TCELL33:OUT12PCIE.CFGINTERRUPTDO1
TCELL33:OUT13PCIE.CFGINTERRUPTDO2
TCELL33:OUT14PCIE.CFGINTERRUPTDO3
TCELL33:OUT15PCIE.CFGINTERRUPTDO4
TCELL33:OUT16PCIE.CFGCOMMANDSERREN
TCELL33:OUT17PCIE.CFGBRIDGESERREN
TCELL33:OUT18PCIE.DBGVECC3
TCELL33:OUT19PCIE.DBGVECC4
TCELL33:OUT20PCIE.DBGVECC5
TCELL33:OUT21PCIE.DBGVECC6
TCELL33:OUT22PCIE.XILUNCONNOUT21
TCELL33:OUT23PCIE.XILUNCONNOUT22
TCELL34:IMUX.IMUX0PCIE.TRNTD120
TCELL34:IMUX.IMUX1PCIE.TRNTD121
TCELL34:IMUX.IMUX2PCIE.TRNTD122
TCELL34:IMUX.IMUX3PCIE.TRNTD123
TCELL34:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG110
TCELL34:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG111
TCELL34:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG112
TCELL34:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG113
TCELL34:IMUX.IMUX8PCIE.CFGDSN13
TCELL34:IMUX.IMUX9PCIE.CFGDSN14
TCELL34:IMUX.IMUX10PCIE.CFGDSN15
TCELL34:IMUX.IMUX11PCIE.CFGDSN16
TCELL34:IMUX.IMUX12PCIE.CFGSUBSYSID14
TCELL34:IMUX.IMUX13PCIE.CFGSUBSYSID15
TCELL34:IMUX.IMUX33PCIE.PIPERX1CHANISALIGNED
TCELL34:IMUX.IMUX34PCIE.PIPERX1DATA7
TCELL34:IMUX.IMUX35PCIE.PIPERX1DATA6
TCELL34:IMUX.IMUX36PCIE.PIPERX1VALID
TCELL34:IMUX.IMUX37PCIE.PIPERX1PHYSTATUS
TCELL34:IMUX.IMUX38PCIE.PIPERX1DATA5
TCELL34:IMUX.IMUX39PCIE.PIPERX1DATA4
TCELL34:OUT0PCIE.TRNRD15
TCELL34:OUT1PCIE.TRNRD16
TCELL34:OUT2PCIE.TRNRD17
TCELL34:OUT3PCIE.TRNRD18
TCELL34:OUT4PCIE.TRNFCCPLD1
TCELL34:OUT5PCIE.TRNFCCPLD2
TCELL34:OUT6PCIE.TRNFCCPLD3
TCELL34:OUT7PCIE.TRNFCCPLD4
TCELL34:OUT8PCIE.TL2ERRHDR47
TCELL34:OUT9PCIE.TL2ERRHDR48
TCELL34:OUT10PCIE.TL2ERRHDR49
TCELL34:OUT11PCIE.TL2ERRHDR50
TCELL34:OUT12PCIE.CFGINTERRUPTDO5
TCELL34:OUT13PCIE.CFGINTERRUPTDO6
TCELL34:OUT14PCIE.CFGINTERRUPTDO7
TCELL34:OUT15PCIE.CFGMSGRECEIVED
TCELL34:OUT16PCIE.CFGDEVSTATUSCORRERRDETECTED
TCELL34:OUT17PCIE.CFGDEVSTATUSNONFATALERRDETECTED
TCELL34:OUT18PCIE.DBGVECC7
TCELL34:OUT19PCIE.DBGVECC8
TCELL34:OUT20PCIE.DBGVECC9
TCELL34:OUT21PCIE.DBGVECC10
TCELL34:OUT22PCIE.XILUNCONNOUT23
TCELL34:OUT23PCIE.XILUNCONNOUT24
TCELL35:IMUX.IMUX0PCIE.TRNTD124
TCELL35:IMUX.IMUX1PCIE.TRNTD125
TCELL35:IMUX.IMUX2PCIE.TRNTD126
TCELL35:IMUX.IMUX3PCIE.TRNTD127
TCELL35:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG114
TCELL35:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG115
TCELL35:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG116
TCELL35:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG117
TCELL35:IMUX.IMUX8PCIE.CFGDSN17
TCELL35:IMUX.IMUX9PCIE.CFGDSN18
TCELL35:IMUX.IMUX10PCIE.CFGDSN19
TCELL35:IMUX.IMUX11PCIE.CFGDSN20
TCELL35:IMUX.IMUX12PCIE.CFGSUBSYSVENDID0
TCELL35:IMUX.IMUX13PCIE.CFGSUBSYSVENDID1
TCELL35:IMUX.IMUX14PCIE.CFGSUBSYSVENDID2
TCELL35:IMUX.IMUX15PCIE.CFGSUBSYSVENDID3
TCELL35:IMUX.IMUX16PCIE.PIPERX1CHARISK0
TCELL35:IMUX.IMUX32PCIE.PIPERX1DATA3
TCELL35:IMUX.IMUX33PCIE.PIPERX1DATA2
TCELL35:IMUX.IMUX36PCIE.PIPERX1DATA1
TCELL35:IMUX.IMUX37PCIE.PIPERX1DATA0
TCELL35:OUT0PCIE.TRNRD19
TCELL35:OUT1PCIE.TRNRD20
TCELL35:OUT2PCIE.TRNRD21
TCELL35:OUT3PCIE.TRNRD22
TCELL35:OUT4PCIE.TRNFCCPLD5
TCELL35:OUT5PCIE.TRNFCCPLD6
TCELL35:OUT6PCIE.TRNFCCPLD7
TCELL35:OUT7PCIE.TRNFCCPLD8
TCELL35:OUT8PCIE.TL2ERRHDR51
TCELL35:OUT9PCIE.TL2ERRHDR52
TCELL35:OUT10PCIE.TL2ERRHDR53
TCELL35:OUT11PCIE.TL2ERRHDR54
TCELL35:OUT12PCIE.CFGMSGDATA0
TCELL35:OUT13PCIE.CFGMSGDATA1
TCELL35:OUT14PCIE.CFGMSGDATA2
TCELL35:OUT15PCIE.CFGMSGDATA3
TCELL35:OUT16PCIE.CFGDEVSTATUSFATALERRDETECTED
TCELL35:OUT17PCIE.CFGDEVSTATUSURDETECTED
TCELL35:OUT18PCIE.DBGVECC11
TCELL35:OUT19PCIE.DBGSCLRA
TCELL35:OUT20PCIE.DBGSCLRB
TCELL35:OUT21PCIE.DBGSCLRC
TCELL35:OUT22PCIE.XILUNCONNOUT25
TCELL35:OUT23PCIE.XILUNCONNOUT26
TCELL36:IMUX.IMUX0PCIE.TRNTREM0
TCELL36:IMUX.IMUX1PCIE.TRNTREM1
TCELL36:IMUX.IMUX2PCIE.TRNTSOF
TCELL36:IMUX.IMUX3PCIE.TRNTEOF
TCELL36:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG118
TCELL36:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG119
TCELL36:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG120
TCELL36:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG121
TCELL36:IMUX.IMUX8PCIE.CFGDSN21
TCELL36:IMUX.IMUX9PCIE.CFGDSN22
TCELL36:IMUX.IMUX10PCIE.CFGDSN23
TCELL36:IMUX.IMUX11PCIE.CFGDSN24
TCELL36:IMUX.IMUX12PCIE.CFGSUBSYSVENDID4
TCELL36:IMUX.IMUX13PCIE.CFGSUBSYSVENDID5
TCELL36:IMUX.IMUX14PCIE.CFGSUBSYSVENDID6
TCELL36:IMUX.IMUX15PCIE.CFGSUBSYSVENDID7
TCELL36:OUT0PCIE.PIPETX2DATA12
TCELL36:OUT1PCIE.TRNRD23
TCELL36:OUT2PCIE.PIPETX2DATA14
TCELL36:OUT3PCIE.TRNRD24
TCELL36:OUT4PCIE.PIPETX2DATA13
TCELL36:OUT5PCIE.TRNRD25
TCELL36:OUT6PCIE.PIPETX2DATA15
TCELL36:OUT7PCIE.TRNRD26
TCELL36:OUT8PCIE.TRNFCCPLD9
TCELL36:OUT9PCIE.TRNFCCPLD10
TCELL36:OUT10PCIE.TRNFCCPLD11
TCELL36:OUT11PCIE.TRNTDLLPDSTRDY
TCELL36:OUT12PCIE.TL2ERRHDR55
TCELL36:OUT13PCIE.TL2ERRHDR56
TCELL36:OUT14PCIE.TL2ERRHDR57
TCELL36:OUT15PCIE.TL2ERRHDR58
TCELL36:OUT16PCIE.PIPETX2CHARISK1
TCELL36:OUT17PCIE.CFGMSGDATA4
TCELL36:OUT18PCIE.CFGMSGDATA5
TCELL36:OUT19PCIE.DBGSCLRD
TCELL36:OUT20PCIE.DBGSCLRE
TCELL36:OUT21PCIE.DBGSCLRF
TCELL36:OUT22PCIE.DBGSCLRG
TCELL36:OUT23PCIE.XILUNCONNOUT27
TCELL37:IMUX.IMUX0PCIE.TRNTSRCRDY
TCELL37:IMUX.IMUX1PCIE.TRNTSRCDSC
TCELL37:IMUX.IMUX2PCIE.TRNTERRFWD
TCELL37:IMUX.IMUX3PCIE.TRNTECRCGEN
TCELL37:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG122
TCELL37:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG123
TCELL37:IMUX.IMUX6PCIE.CFGERRAERHEADERLOG124
TCELL37:IMUX.IMUX7PCIE.CFGERRAERHEADERLOG125
TCELL37:IMUX.IMUX8PCIE.CFGDSN25
TCELL37:IMUX.IMUX9PCIE.CFGDSN26
TCELL37:IMUX.IMUX10PCIE.CFGDSN27
TCELL37:IMUX.IMUX11PCIE.CFGDSN28
TCELL37:IMUX.IMUX12PCIE.CFGSUBSYSVENDID8
TCELL37:IMUX.IMUX13PCIE.CFGSUBSYSVENDID9
TCELL37:IMUX.IMUX14PCIE.CFGSUBSYSVENDID10
TCELL37:IMUX.IMUX15PCIE.CFGSUBSYSVENDID11
TCELL37:OUT0PCIE.TRNRD27
TCELL37:OUT1PCIE.TRNRD28
TCELL37:OUT2PCIE.TRNRD29
TCELL37:OUT3PCIE.TRNRD30
TCELL37:OUT4PCIE.TRNRDLLPDATA0
TCELL37:OUT5PCIE.TRNRDLLPDATA1
TCELL37:OUT6PCIE.TRNRDLLPDATA2
TCELL37:OUT7PCIE.TRNRDLLPDATA3
TCELL37:OUT8PCIE.TL2ERRHDR59
TCELL37:OUT9PCIE.PIPETX2DATA8
TCELL37:OUT10PCIE.TL2ERRHDR60
TCELL37:OUT11PCIE.PIPETX2DATA10
TCELL37:OUT12PCIE.TL2ERRHDR61
TCELL37:OUT13PCIE.PIPETX2DATA9
TCELL37:OUT14PCIE.TL2ERRHDR62
TCELL37:OUT15PCIE.PIPETX2DATA11
TCELL37:OUT16PCIE.CFGMSGDATA6
TCELL37:OUT17PCIE.CFGMSGDATA7
TCELL37:OUT18PCIE.CFGMSGDATA8
TCELL37:OUT19PCIE.CFGMSGDATA9
TCELL37:OUT20PCIE.CFGDEVCONTROLCORRERRREPORTINGEN
TCELL37:OUT21PCIE.CFGDEVCONTROLNONFATALREPORTINGEN
TCELL37:OUT22PCIE.DBGSCLRH
TCELL37:OUT23PCIE.DBGSCLRI
TCELL38:IMUX.IMUX0PCIE.TRNTSTR
TCELL38:IMUX.IMUX1PCIE.TRNTCFGGNT
TCELL38:IMUX.IMUX2PCIE.TRNRDSTRDY
TCELL38:IMUX.IMUX3PCIE.TRNRNPREQ
TCELL38:IMUX.IMUX4PCIE.CFGERRAERHEADERLOG126
TCELL38:IMUX.IMUX5PCIE.CFGERRAERHEADERLOG127
TCELL38:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER0
TCELL38:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER1
TCELL38:IMUX.IMUX8PCIE.CFGDSN29
TCELL38:IMUX.IMUX9PCIE.CFGDSN30
TCELL38:IMUX.IMUX10PCIE.CFGDSN31
TCELL38:IMUX.IMUX11PCIE.CFGDSN32
TCELL38:IMUX.IMUX12PCIE.CFGSUBSYSVENDID12
TCELL38:IMUX.IMUX13PCIE.CFGSUBSYSVENDID13
TCELL38:IMUX.IMUX14PCIE.CFGSUBSYSVENDID14
TCELL38:IMUX.IMUX15PCIE.CFGSUBSYSVENDID15
TCELL38:OUT0PCIE.PIPETX2DATA4
TCELL38:OUT1PCIE.PIPETX2POWERDOWN0
TCELL38:OUT2PCIE.PIPETX2DATA6
TCELL38:OUT3PCIE.PIPETX2ELECIDLE
TCELL38:OUT4PCIE.PIPETX2DATA5
TCELL38:OUT5PCIE.TRNRD31
TCELL38:OUT6PCIE.PIPETX2DATA7
TCELL38:OUT7PCIE.PIPETX2POWERDOWN1
TCELL38:OUT8PCIE.TRNRD32
TCELL38:OUT9PCIE.TRNRD33
TCELL38:OUT10PCIE.TRNRD34
TCELL38:OUT11PCIE.TRNRDLLPDATA4
TCELL38:OUT12PCIE.TRNRDLLPDATA5
TCELL38:OUT13PCIE.TRNRDLLPDATA6
TCELL38:OUT14PCIE.TRNRDLLPDATA7
TCELL38:OUT15PCIE.TL2ERRHDR63
TCELL38:OUT16PCIE.PIPETX2CHARISK0
TCELL38:OUT17PCIE.TL2ERRMALFORMED
TCELL38:OUT18PCIE.TL2ERRRXOVERFLOW
TCELL38:OUT19PCIE.TL2ERRFCPE
TCELL38:OUT20PCIE.CFGDEVCONTROLFATALERRREPORTINGEN
TCELL38:OUT21PCIE.CFGDEVCONTROLURERRREPORTINGEN
TCELL38:OUT22PCIE.DBGSCLRJ
TCELL38:OUT23PCIE.DBGSCLRK
TCELL39:IMUX.IMUX0PCIE.TRNRFCPRET
TCELL39:IMUX.IMUX1PCIE.TRNRNPOK
TCELL39:IMUX.IMUX2PCIE.TRNFCSEL0
TCELL39:IMUX.IMUX3PCIE.TRNFCSEL1
TCELL39:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER2
TCELL39:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER3
TCELL39:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER4
TCELL39:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER5
TCELL39:IMUX.IMUX8PCIE.CFGDSN33
TCELL39:IMUX.IMUX9PCIE.CFGDSN34
TCELL39:IMUX.IMUX10PCIE.CFGDSN35
TCELL39:IMUX.IMUX11PCIE.CFGDSN36
TCELL39:IMUX.IMUX12PCIE.CFGAERINTERRUPTMSGNUM0
TCELL39:IMUX.IMUX13PCIE.CFGAERINTERRUPTMSGNUM1
TCELL39:IMUX.IMUX14PCIE.CFGAERINTERRUPTMSGNUM2
TCELL39:IMUX.IMUX15PCIE.CFGAERINTERRUPTMSGNUM3
TCELL39:IMUX.IMUX34PCIE.PIPERX2DATA15
TCELL39:IMUX.IMUX35PCIE.PIPERX2DATA14
TCELL39:IMUX.IMUX38PCIE.PIPERX2DATA13
TCELL39:IMUX.IMUX39PCIE.PIPERX2DATA12
TCELL39:OUT0PCIE.TRNRD35
TCELL39:OUT1PCIE.PIPERX2POLARITY
TCELL39:OUT2PCIE.TRNRD36
TCELL39:OUT3PCIE.PIPETX2COMPLIANCE
TCELL39:OUT4PCIE.TRNRD37
TCELL39:OUT5PCIE.TRNRD38
TCELL39:OUT6PCIE.TRNRDLLPDATA8
TCELL39:OUT7PCIE.TRNRDLLPDATA9
TCELL39:OUT8PCIE.TRNRDLLPDATA10
TCELL39:OUT9PCIE.PIPETX2DATA0
TCELL39:OUT10PCIE.TRNRDLLPDATA11
TCELL39:OUT11PCIE.PIPETX2DATA2
TCELL39:OUT12PCIE.CFGMSGDATA10
TCELL39:OUT13PCIE.PIPETX2DATA1
TCELL39:OUT14PCIE.CFGMSGDATA11
TCELL39:OUT15PCIE.PIPETX2DATA3
TCELL39:OUT16PCIE.CFGMSGDATA12
TCELL39:OUT17PCIE.CFGMSGDATA13
TCELL39:OUT18PCIE.CFGDEVCONTROLENABLERO
TCELL39:OUT19PCIE.CFGDEVCONTROLMAXPAYLOAD0
TCELL39:OUT20PCIE.CFGDEVCONTROLMAXPAYLOAD1
TCELL39:OUT21PCIE.CFGDEVCONTROLMAXPAYLOAD2
TCELL39:OUT22PCIE.PLDBGVEC0
TCELL39:OUT23PCIE.PLDBGVEC1
TCELL40:IMUX.IMUX0PCIE.TRNFCSEL2
TCELL40:IMUX.IMUX1PCIE.TRNTDLLPDATA0
TCELL40:IMUX.IMUX2PCIE.TRNTDLLPDATA1
TCELL40:IMUX.IMUX3PCIE.TRNTDLLPDATA2
TCELL40:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER6
TCELL40:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER7
TCELL40:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER8
TCELL40:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER9
TCELL40:IMUX.IMUX8PCIE.CFGDSN37
TCELL40:IMUX.IMUX9PCIE.CFGDSN38
TCELL40:IMUX.IMUX10PCIE.CFGDSN39
TCELL40:IMUX.IMUX11PCIE.CFGDSN40
TCELL40:IMUX.IMUX16PCIE.PIPERX2CHARISK1
TCELL40:IMUX.IMUX32PCIE.PIPERX2DATA11
TCELL40:IMUX.IMUX33PCIE.PIPERX2DATA10
TCELL40:IMUX.IMUX34PCIE.PIPERX2ELECIDLE
TCELL40:IMUX.IMUX35PCIE.PIPERX2STATUS2
TCELL40:IMUX.IMUX36PCIE.PIPERX2DATA9
TCELL40:IMUX.IMUX37PCIE.PIPERX2DATA8
TCELL40:IMUX.IMUX38PCIE.PIPERX2STATUS1
TCELL40:IMUX.IMUX39PCIE.PIPERX2STATUS0
TCELL40:OUT0PCIE.PIPETX0DATA12
TCELL40:OUT1PCIE.TRNRD39
TCELL40:OUT2PCIE.PIPETX0DATA14
TCELL40:OUT3PCIE.TRNRD40
TCELL40:OUT4PCIE.PIPETX0DATA13
TCELL40:OUT5PCIE.TRNRD41
TCELL40:OUT6PCIE.PIPETX0DATA15
TCELL40:OUT7PCIE.TRNRD42
TCELL40:OUT8PCIE.TRNRDLLPDATA12
TCELL40:OUT9PCIE.TRNRDLLPDATA13
TCELL40:OUT10PCIE.TRNRDLLPDATA14
TCELL40:OUT11PCIE.TRNRDLLPDATA15
TCELL40:OUT12PCIE.CFGMSGDATA14
TCELL40:OUT13PCIE.CFGMSGDATA15
TCELL40:OUT14PCIE.CFGMSGRECEIVEDERRCOR
TCELL40:OUT15PCIE.CFGMSGRECEIVEDERRNONFATAL
TCELL40:OUT16PCIE.PIPETX0CHARISK1
TCELL40:OUT17PCIE.CFGDEVCONTROLEXTTAGEN
TCELL40:OUT18PCIE.CFGDEVCONTROLPHANTOMEN
TCELL40:OUT19PCIE.CFGDEVCONTROLAUXPOWEREN
TCELL40:OUT20PCIE.CFGDEVCONTROLNOSNOOPEN
TCELL40:OUT21PCIE.CFGDEVCONTROL2TLPPREFIXBLOCK
TCELL40:OUT22PCIE.CFGSLOTCONTROLELECTROMECHILCTLPULSE
TCELL40:OUT23PCIE.PLDBGVEC2
TCELL41:IMUX.IMUX0PCIE.TRNTDLLPDATA3
TCELL41:IMUX.IMUX1PCIE.TRNTDLLPDATA4
TCELL41:IMUX.IMUX2PCIE.TRNTDLLPDATA5
TCELL41:IMUX.IMUX3PCIE.TRNTDLLPDATA6
TCELL41:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER10
TCELL41:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER11
TCELL41:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER12
TCELL41:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER13
TCELL41:IMUX.IMUX8PCIE.CFGDSN41
TCELL41:IMUX.IMUX9PCIE.CFGDSN42
TCELL41:IMUX.IMUX10PCIE.CFGDSN43
TCELL41:IMUX.IMUX11PCIE.CFGDSN44
TCELL41:IMUX.IMUX12PCIE.CFGAERINTERRUPTMSGNUM4
TCELL41:IMUX.IMUX13PCIE.DRPEN
TCELL41:IMUX.IMUX33PCIE.PIPERX2CHANISALIGNED
TCELL41:IMUX.IMUX34PCIE.PIPERX2DATA7
TCELL41:IMUX.IMUX35PCIE.PIPERX2DATA6
TCELL41:IMUX.IMUX36PCIE.PIPERX2VALID
TCELL41:IMUX.IMUX37PCIE.PIPERX2PHYSTATUS
TCELL41:IMUX.IMUX38PCIE.PIPERX2DATA5
TCELL41:IMUX.IMUX39PCIE.PIPERX2DATA4
TCELL41:OUT0PCIE.TRNRD43
TCELL41:OUT1PCIE.TRNRD44
TCELL41:OUT2PCIE.TRNRD45
TCELL41:OUT3PCIE.TRNRD46
TCELL41:OUT4PCIE.TRNRDLLPDATA16
TCELL41:OUT5PCIE.TRNRDLLPDATA17
TCELL41:OUT6PCIE.TRNRDLLPDATA18
TCELL41:OUT7PCIE.TRNRDLLPDATA19
TCELL41:OUT8PCIE.CFGMSGRECEIVEDERRFATAL
TCELL41:OUT9PCIE.PIPETX0DATA8
TCELL41:OUT10PCIE.CFGMSGRECEIVEDASSERTINTA
TCELL41:OUT11PCIE.PIPETX0DATA10
TCELL41:OUT12PCIE.CFGMSGRECEIVEDDEASSERTINTA
TCELL41:OUT13PCIE.PIPETX0DATA9
TCELL41:OUT14PCIE.CFGMSGRECEIVEDASSERTINTB
TCELL41:OUT15PCIE.PIPETX0DATA11
TCELL41:OUT16PCIE.CFGDEVCONTROLMAXREADREQ0
TCELL41:OUT17PCIE.CFGDEVCONTROLMAXREADREQ1
TCELL41:OUT18PCIE.CFGDEVCONTROLMAXREADREQ2
TCELL41:OUT19PCIE.CFGLINKSTATUSCURRENTSPEED0
TCELL41:OUT20PCIE.CFGROOTCONTROLSYSERRCORRERREN
TCELL41:OUT21PCIE.CFGROOTCONTROLSYSERRNONFATALERREN
TCELL41:OUT22PCIE.PLDBGVEC3
TCELL41:OUT23PCIE.PLDBGVEC4
TCELL42:IMUX.IMUX0PCIE.TRNTDLLPDATA7
TCELL42:IMUX.IMUX1PCIE.TRNTDLLPDATA8
TCELL42:IMUX.IMUX2PCIE.TRNTDLLPDATA9
TCELL42:IMUX.IMUX3PCIE.TRNTDLLPDATA10
TCELL42:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER14
TCELL42:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER15
TCELL42:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER16
TCELL42:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER17
TCELL42:IMUX.IMUX8PCIE.CFGDSN45
TCELL42:IMUX.IMUX9PCIE.CFGDSN46
TCELL42:IMUX.IMUX10PCIE.CFGDSN47
TCELL42:IMUX.IMUX11PCIE.CFGDSN48
TCELL42:IMUX.IMUX12PCIE.DRPWE
TCELL42:IMUX.IMUX13PCIE.DRPADDR0
TCELL42:IMUX.IMUX14PCIE.DRPADDR1
TCELL42:IMUX.IMUX15PCIE.DRPADDR2
TCELL42:IMUX.IMUX16PCIE.PIPERX2CHARISK0
TCELL42:IMUX.IMUX32PCIE.PIPERX2DATA3
TCELL42:IMUX.IMUX33PCIE.PIPERX2DATA2
TCELL42:IMUX.IMUX36PCIE.PIPERX2DATA1
TCELL42:IMUX.IMUX37PCIE.PIPERX2DATA0
TCELL42:OUT0PCIE.PIPETX0DATA4
TCELL42:OUT1PCIE.PIPETX0POWERDOWN0
TCELL42:OUT2PCIE.PIPETX0DATA6
TCELL42:OUT3PCIE.PIPETX0ELECIDLE
TCELL42:OUT4PCIE.PIPETX0DATA5
TCELL42:OUT5PCIE.TRNRD47
TCELL42:OUT6PCIE.PIPETX0DATA7
TCELL42:OUT7PCIE.PIPETX0POWERDOWN1
TCELL42:OUT8PCIE.TRNRD48
TCELL42:OUT9PCIE.TRNRD49
TCELL42:OUT10PCIE.TRNRD50
TCELL42:OUT11PCIE.TRNRDLLPDATA20
TCELL42:OUT12PCIE.TRNRDLLPDATA21
TCELL42:OUT13PCIE.TRNRDLLPDATA22
TCELL42:OUT14PCIE.TRNRDLLPDATA23
TCELL42:OUT15PCIE.CFGMSGRECEIVEDDEASSERTINTB
TCELL42:OUT16PCIE.PIPETX0CHARISK0
TCELL42:OUT17PCIE.CFGMSGRECEIVEDASSERTINTC
TCELL42:OUT18PCIE.CFGMSGRECEIVEDDEASSERTINTC
TCELL42:OUT19PCIE.CFGMSGRECEIVEDASSERTINTD
TCELL42:OUT20PCIE.CFGLINKSTATUSCURRENTSPEED1
TCELL42:OUT21PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH0
TCELL42:OUT22PCIE.PLDBGVEC5
TCELL42:OUT23PCIE.PLDBGVEC6
TCELL43:IMUX.IMUX0PCIE.TRNTDLLPDATA11
TCELL43:IMUX.IMUX1PCIE.TRNTDLLPDATA12
TCELL43:IMUX.IMUX2PCIE.TRNTDLLPDATA13
TCELL43:IMUX.IMUX3PCIE.TRNTDLLPDATA14
TCELL43:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER18
TCELL43:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER19
TCELL43:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER20
TCELL43:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER21
TCELL43:IMUX.IMUX8PCIE.CFGDSN49
TCELL43:IMUX.IMUX9PCIE.CFGDSN50
TCELL43:IMUX.IMUX10PCIE.CFGDSN51
TCELL43:IMUX.IMUX11PCIE.CFGDSN52
TCELL43:IMUX.IMUX12PCIE.DRPADDR3
TCELL43:IMUX.IMUX13PCIE.DRPADDR4
TCELL43:IMUX.IMUX14PCIE.DRPADDR5
TCELL43:IMUX.IMUX15PCIE.DRPADDR6
TCELL43:IMUX.IMUX34PCIE.PIPERX0DATA15
TCELL43:IMUX.IMUX35PCIE.PIPERX0DATA14
TCELL43:IMUX.IMUX38PCIE.PIPERX0DATA13
TCELL43:IMUX.IMUX39PCIE.PIPERX0DATA12
TCELL43:OUT0PCIE.TRNRD51
TCELL43:OUT1PCIE.PIPERX0POLARITY
TCELL43:OUT2PCIE.TRNRD52
TCELL43:OUT3PCIE.PIPETX0COMPLIANCE
TCELL43:OUT4PCIE.TRNRD53
TCELL43:OUT5PCIE.TRNRD54
TCELL43:OUT6PCIE.TRNRDLLPDATA24
TCELL43:OUT7PCIE.TRNRDLLPDATA25
TCELL43:OUT8PCIE.TRNRDLLPDATA26
TCELL43:OUT9PCIE.PIPETX0DATA0
TCELL43:OUT10PCIE.TRNRDLLPDATA27
TCELL43:OUT11PCIE.PIPETX0DATA2
TCELL43:OUT12PCIE.CFGMSGRECEIVEDDEASSERTINTD
TCELL43:OUT13PCIE.PIPETX0DATA1
TCELL43:OUT14PCIE.CFGMSGRECEIVEDPMPME
TCELL43:OUT15PCIE.PIPETX0DATA3
TCELL43:OUT16PCIE.CFGMSGRECEIVEDPMETOACK
TCELL43:OUT17PCIE.CFGMSGRECEIVEDPMETO
TCELL43:OUT18PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH1
TCELL43:OUT19PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH2
TCELL43:OUT20PCIE.CFGLINKSTATUSNEGOTIATEDWIDTH3
TCELL43:OUT21PCIE.CFGLINKSTATUSLINKTRAINING
TCELL43:OUT22PCIE.CFGROOTCONTROLSYSERRFATALERREN
TCELL43:OUT23PCIE.PLDBGVEC7
TCELL44:IMUX.IMUX0PCIE.TRNTDLLPDATA15
TCELL44:IMUX.IMUX1PCIE.TRNTDLLPDATA16
TCELL44:IMUX.IMUX2PCIE.TRNTDLLPDATA17
TCELL44:IMUX.IMUX3PCIE.TRNTDLLPDATA18
TCELL44:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER22
TCELL44:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER23
TCELL44:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER24
TCELL44:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER25
TCELL44:IMUX.IMUX8PCIE.CFGDSN53
TCELL44:IMUX.IMUX9PCIE.CFGDSN54
TCELL44:IMUX.IMUX10PCIE.CFGDSN55
TCELL44:IMUX.IMUX11PCIE.CFGDSN56
TCELL44:IMUX.IMUX16PCIE.PIPERX0CHARISK1
TCELL44:IMUX.IMUX32PCIE.PIPERX0DATA11
TCELL44:IMUX.IMUX33PCIE.PIPERX0DATA10
TCELL44:IMUX.IMUX34PCIE.PIPERX0ELECIDLE
TCELL44:IMUX.IMUX35PCIE.PIPERX0STATUS2
TCELL44:IMUX.IMUX36PCIE.PIPERX0DATA9
TCELL44:IMUX.IMUX37PCIE.PIPERX0DATA8
TCELL44:IMUX.IMUX38PCIE.PIPERX0STATUS1
TCELL44:IMUX.IMUX39PCIE.PIPERX0STATUS0
TCELL44:OUT0PCIE.TRNRD55
TCELL44:OUT1PCIE.TRNRD56
TCELL44:OUT2PCIE.TRNRD57
TCELL44:OUT3PCIE.TRNRD58
TCELL44:OUT4PCIE.TRNRDLLPDATA28
TCELL44:OUT5PCIE.TRNRDLLPDATA29
TCELL44:OUT6PCIE.TRNRDLLPDATA30
TCELL44:OUT7PCIE.TRNRDLLPDATA31
TCELL44:OUT8PCIE.CFGMSGRECEIVEDSETSLOTPOWERLIMIT
TCELL44:OUT9PCIE.CFGMSGRECEIVEDUNLOCK
TCELL44:OUT10PCIE.CFGMSGRECEIVEDPMASNAK
TCELL44:OUT11PCIE.CFGPCIELINKSTATE0
TCELL44:OUT12PCIE.CFGLINKSTATUSDLLACTIVE
TCELL44:OUT13PCIE.CFGLINKSTATUSBANDWIDTHSTATUS
TCELL44:OUT14PCIE.CFGLINKSTATUSAUTOBANDWIDTHSTATUS
TCELL44:OUT15PCIE.CFGLINKCONTROLASPMCONTROL0
TCELL44:OUT16PCIE.CFGROOTCONTROLPMEINTEN
TCELL44:OUT17PCIE.CFGAERECRCCHECKEN
TCELL44:OUT18PCIE.CFGAERECRCGENEN
TCELL44:OUT19PCIE.CFGAERROOTERRCORRERRREPORTINGEN
TCELL44:OUT20PCIE.DRPDO7
TCELL44:OUT21PCIE.DRPDO8
TCELL44:OUT22PCIE.DRPDO9
TCELL44:OUT23PCIE.DRPDO10
TCELL45:IMUX.IMUX0PCIE.TRNTDLLPDATA19
TCELL45:IMUX.IMUX1PCIE.TRNTDLLPDATA20
TCELL45:IMUX.IMUX2PCIE.TRNTDLLPDATA21
TCELL45:IMUX.IMUX3PCIE.TRNTDLLPDATA22
TCELL45:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER26
TCELL45:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER27
TCELL45:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER28
TCELL45:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER29
TCELL45:IMUX.IMUX8PCIE.CFGDSN57
TCELL45:IMUX.IMUX9PCIE.CFGDSN58
TCELL45:IMUX.IMUX10PCIE.CFGDSN59
TCELL45:IMUX.IMUX11PCIE.CFGDSN60
TCELL45:IMUX.IMUX12PCIE.DRPADDR7
TCELL45:IMUX.IMUX13PCIE.DRPADDR8
TCELL45:IMUX.IMUX33PCIE.PIPERX0CHANISALIGNED
TCELL45:IMUX.IMUX34PCIE.PIPERX0DATA7
TCELL45:IMUX.IMUX35PCIE.PIPERX0DATA6
TCELL45:IMUX.IMUX36PCIE.PIPERX0VALID
TCELL45:IMUX.IMUX37PCIE.PIPERX0PHYSTATUS
TCELL45:IMUX.IMUX38PCIE.PIPERX0DATA5
TCELL45:IMUX.IMUX39PCIE.PIPERX0DATA4
TCELL45:OUT0PCIE.TRNRD59
TCELL45:OUT1PCIE.TRNRD60
TCELL45:OUT2PCIE.TRNRD61
TCELL45:OUT3PCIE.TRNRD62
TCELL45:OUT4PCIE.TRNRDLLPDATA32
TCELL45:OUT5PCIE.TRNRDLLPDATA33
TCELL45:OUT6PCIE.PIPETXMARGIN2
TCELL45:OUT7PCIE.TRNRDLLPDATA34
TCELL45:OUT8PCIE.TRNRDLLPDATA35
TCELL45:OUT9PCIE.CFGPCIELINKSTATE1
TCELL45:OUT10PCIE.CFGPCIELINKSTATE2
TCELL45:OUT11PCIE.CFGPMRCVASREQL1N
TCELL45:OUT12PCIE.CFGPMRCVENTERL1N
TCELL45:OUT13PCIE.CFGLINKCONTROLASPMCONTROL1
TCELL45:OUT14PCIE.CFGLINKCONTROLRCB
TCELL45:OUT15PCIE.CFGLINKCONTROLLINKDISABLE
TCELL45:OUT16PCIE.PIPETXMARGIN1
TCELL45:OUT17PCIE.CFGLINKCONTROLRETRAINLINK
TCELL45:OUT18PCIE.PIPETXMARGIN0
TCELL45:OUT19PCIE.CFGAERROOTERRNONFATALERRREPORTINGEN
TCELL45:OUT20PCIE.CFGAERROOTERRFATALERRREPORTINGEN
TCELL45:OUT21PCIE.CFGAERROOTERRCORRERRRECEIVED
TCELL45:OUT22PCIE.CFGAERROOTERRNONFATALERRRECEIVED
TCELL45:OUT23PCIE.PLDBGVEC8
TCELL46:IMUX.IMUX0PCIE.TRNTDLLPDATA23
TCELL46:IMUX.IMUX1PCIE.TRNTDLLPDATA24
TCELL46:IMUX.IMUX2PCIE.TRNTDLLPDATA25
TCELL46:IMUX.IMUX3PCIE.TRNTDLLPDATA26
TCELL46:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER30
TCELL46:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER31
TCELL46:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER32
TCELL46:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER33
TCELL46:IMUX.IMUX8PCIE.CFGDSN61
TCELL46:IMUX.IMUX9PCIE.CFGDSN62
TCELL46:IMUX.IMUX10PCIE.CFGDSN63
TCELL46:IMUX.IMUX11PCIE.CFGDEVID0
TCELL46:IMUX.IMUX12PCIE.DRPDI0
TCELL46:IMUX.IMUX13PCIE.DRPDI1
TCELL46:IMUX.IMUX14PCIE.DRPDI2
TCELL46:IMUX.IMUX15PCIE.DRPDI3
TCELL46:IMUX.IMUX16PCIE.PIPERX0CHARISK0
TCELL46:IMUX.IMUX32PCIE.PIPERX0DATA3
TCELL46:IMUX.IMUX33PCIE.PIPERX0DATA2
TCELL46:IMUX.IMUX36PCIE.PIPERX0DATA1
TCELL46:IMUX.IMUX37PCIE.PIPERX0DATA0
TCELL46:OUT0PCIE.TRNRD63
TCELL46:OUT1PCIE.TRNRD64
TCELL46:OUT2PCIE.TRNRD65
TCELL46:OUT3PCIE.TRNRD66
TCELL46:OUT4PCIE.TRNRDLLPDATA36
TCELL46:OUT5PCIE.TRNRDLLPDATA37
TCELL46:OUT6PCIE.TRNRDLLPDATA38
TCELL46:OUT7PCIE.TRNRDLLPDATA39
TCELL46:OUT8PCIE.CFGPMRCVENTERL23N
TCELL46:OUT9PCIE.CFGPMRCVREQACKN
TCELL46:OUT10PCIE.CFGPMCSRPOWERSTATE0
TCELL46:OUT11PCIE.CFGPMCSRPOWERSTATE1
TCELL46:OUT12PCIE.CFGLINKCONTROLCOMMONCLOCK
TCELL46:OUT13PCIE.CFGLINKCONTROLEXTENDEDSYNC
TCELL46:OUT14PCIE.CFGLINKCONTROLCLOCKPMEN
TCELL46:OUT15PCIE.CFGLINKCONTROLHWAUTOWIDTHDIS
TCELL46:OUT16PCIE.CFGAERROOTERRFATALERRRECEIVED
TCELL46:OUT17PCIE.CFGVCTCVCMAP0
TCELL46:OUT18PCIE.CFGVCTCVCMAP1
TCELL46:OUT19PCIE.CFGVCTCVCMAP2
TCELL46:OUT20PCIE.DRPDO11
TCELL46:OUT21PCIE.DRPDO12
TCELL46:OUT22PCIE.DRPDO13
TCELL46:OUT23PCIE.DRPDO14
TCELL47:IMUX.IMUX0PCIE.TRNTDLLPDATA27
TCELL47:IMUX.IMUX1PCIE.TRNTDLLPDATA28
TCELL47:IMUX.IMUX2PCIE.TRNTDLLPDATA29
TCELL47:IMUX.IMUX3PCIE.TRNTDLLPDATA30
TCELL47:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER34
TCELL47:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER35
TCELL47:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER36
TCELL47:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER37
TCELL47:IMUX.IMUX8PCIE.CFGDEVID1
TCELL47:IMUX.IMUX9PCIE.CFGDEVID2
TCELL47:IMUX.IMUX10PCIE.CFGDEVID3
TCELL47:IMUX.IMUX11PCIE.CFGDEVID4
TCELL47:IMUX.IMUX12PCIE.DRPDI4
TCELL47:IMUX.IMUX13PCIE.DRPDI5
TCELL47:IMUX.IMUX14PCIE.DRPDI6
TCELL47:IMUX.IMUX15PCIE.DRPDI7
TCELL47:OUT0PCIE.TRNRD67
TCELL47:OUT1PCIE.TRNRD68
TCELL47:OUT2PCIE.TRNRD69
TCELL47:OUT3PCIE.TRNRD70
TCELL47:OUT4PCIE.TRNRDLLPDATA40
TCELL47:OUT5PCIE.TRNRDLLPDATA41
TCELL47:OUT6PCIE.TRNRDLLPDATA42
TCELL47:OUT7PCIE.TRNRDLLPDATA43
TCELL47:OUT8PCIE.CFGPMCSRPMEEN
TCELL47:OUT9PCIE.CFGPMCSRPMESTATUS
TCELL47:OUT10PCIE.CFGTRANSACTION
TCELL47:OUT11PCIE.CFGTRANSACTIONTYPE
TCELL47:OUT12PCIE.CFGLINKCONTROLBANDWIDTHINTEN
TCELL47:OUT13PCIE.CFGLINKCONTROLAUTOBANDWIDTHINTEN
TCELL47:OUT14PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL0
TCELL47:OUT15PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL1
TCELL47:OUT16PCIE.CFGVCTCVCMAP3
TCELL47:OUT17PCIE.CFGVCTCVCMAP4
TCELL47:OUT18PCIE.CFGVCTCVCMAP5
TCELL47:OUT19PCIE.CFGVCTCVCMAP6
TCELL47:OUT20PCIE.DRPDO15
TCELL47:OUT21PCIE.DBGVECA0
TCELL47:OUT22PCIE.DBGVECA1
TCELL47:OUT23PCIE.DBGVECA2
TCELL48:IMUX.IMUX0PCIE.TRNTDLLPDATA31
TCELL48:IMUX.IMUX1PCIE.TRNTDLLPSRCRDY
TCELL48:IMUX.IMUX2PCIE.LL2TLPRCV
TCELL48:IMUX.IMUX3PCIE.LL2SENDENTERL1
TCELL48:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER38
TCELL48:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER39
TCELL48:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER40
TCELL48:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER41
TCELL48:IMUX.IMUX8PCIE.CFGDEVID5
TCELL48:IMUX.IMUX9PCIE.CFGDEVID6
TCELL48:IMUX.IMUX10PCIE.CFGDEVID7
TCELL48:IMUX.IMUX11PCIE.CFGDEVID8
TCELL48:IMUX.IMUX12PCIE.DRPDI8
TCELL48:IMUX.IMUX13PCIE.DRPDI9
TCELL48:IMUX.IMUX14PCIE.DRPDI10
TCELL48:IMUX.IMUX15PCIE.DRPDI11
TCELL48:OUT0PCIE.TRNRD71
TCELL48:OUT1PCIE.TRNRD72
TCELL48:OUT2PCIE.TRNRD73
TCELL48:OUT3PCIE.TRNRD74
TCELL48:OUT4PCIE.TRNRDLLPDATA44
TCELL48:OUT5PCIE.TRNRDLLPDATA45
TCELL48:OUT6PCIE.TRNRDLLPDATA46
TCELL48:OUT7PCIE.TRNRDLLPDATA47
TCELL48:OUT8PCIE.CFGTRANSACTIONADDR0
TCELL48:OUT9PCIE.CFGTRANSACTIONADDR1
TCELL48:OUT10PCIE.CFGTRANSACTIONADDR2
TCELL48:OUT11PCIE.CFGTRANSACTIONADDR3
TCELL48:OUT12PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL2
TCELL48:OUT13PCIE.CFGDEVCONTROL2CPLTIMEOUTVAL3
TCELL48:OUT14PCIE.CFGDEVCONTROL2CPLTIMEOUTDIS
TCELL48:OUT15PCIE.CFGDEVCONTROL2ARIFORWARDEN
TCELL48:OUT16PCIE.DRPRDY
TCELL48:OUT17PCIE.DRPDO0
TCELL48:OUT18PCIE.DRPDO1
TCELL48:OUT19PCIE.DRPDO2
TCELL48:OUT20PCIE.DBGVECA3
TCELL48:OUT21PCIE.DBGVECA4
TCELL48:OUT22PCIE.DBGVECA5
TCELL48:OUT23PCIE.DBGVECA6
TCELL49:IMUX.IMUX0PCIE.LL2SENDENTERL23
TCELL49:IMUX.IMUX1PCIE.LL2SENDASREQL1
TCELL49:IMUX.IMUX2PCIE.LL2SENDPMACK
TCELL49:IMUX.IMUX3PCIE.PL2DIRECTEDLSTATE0
TCELL49:IMUX.IMUX4PCIE.CFGERRTLPCPLHEADER42
TCELL49:IMUX.IMUX5PCIE.CFGERRTLPCPLHEADER43
TCELL49:IMUX.IMUX6PCIE.CFGERRTLPCPLHEADER44
TCELL49:IMUX.IMUX7PCIE.CFGERRTLPCPLHEADER45
TCELL49:IMUX.IMUX8PCIE.CFGDEVID9
TCELL49:IMUX.IMUX9PCIE.CFGDEVID10
TCELL49:IMUX.IMUX10PCIE.CFGDEVID11
TCELL49:IMUX.IMUX11PCIE.CFGDEVID12
TCELL49:IMUX.IMUX12PCIE.DRPDI12
TCELL49:IMUX.IMUX13PCIE.DRPDI13
TCELL49:IMUX.IMUX14PCIE.DRPDI14
TCELL49:IMUX.IMUX15PCIE.DRPDI15
TCELL49:OUT0PCIE.TRNRD75
TCELL49:OUT1PCIE.TRNRD76
TCELL49:OUT2PCIE.TRNRD77
TCELL49:OUT3PCIE.TRNRD78
TCELL49:OUT4PCIE.TRNRDLLPDATA48
TCELL49:OUT5PCIE.TRNRDLLPDATA49
TCELL49:OUT6PCIE.TRNRDLLPDATA50
TCELL49:OUT7PCIE.TRNRDLLPDATA51
TCELL49:OUT8PCIE.CFGTRANSACTIONADDR4
TCELL49:OUT9PCIE.CFGTRANSACTIONADDR5
TCELL49:OUT10PCIE.CFGTRANSACTIONADDR6
TCELL49:OUT11PCIE.CFGCOMMANDIOENABLE
TCELL49:OUT12PCIE.CFGDEVCONTROL2ATOMICREQUESTEREN
TCELL49:OUT13PCIE.CFGDEVCONTROL2ATOMICEGRESSBLOCK
TCELL49:OUT14PCIE.CFGDEVCONTROL2IDOREQEN
TCELL49:OUT15PCIE.CFGDEVCONTROL2IDOCPLEN
TCELL49:OUT16PCIE.DRPDO3
TCELL49:OUT17PCIE.DRPDO4
TCELL49:OUT18PCIE.DRPDO5
TCELL49:OUT19PCIE.DRPDO6
TCELL49:OUT20PCIE.DBGVECA7
TCELL49:OUT21PCIE.DBGVECA8
TCELL49:OUT22PCIE.DBGVECA9
TCELL49:OUT23PCIE.DBGVECA10

Bitstream

virtex7 PCIE bittile 0
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[14] PCIE:DRP05[14] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[15] PCIE:DRP05[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[12] PCIE:DRP05[12] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[13] PCIE:DRP05[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[10] PCIE:DRP05[10] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[11] PCIE:DRP05[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[8] PCIE:DRP05[8] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[9] PCIE:DRP05[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[6] PCIE:DRP05[6] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[7] PCIE:DRP05[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[4] PCIE:DRP05[4] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[5] PCIE:DRP05[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[2] PCIE:DRP05[2] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[3] PCIE:DRP05[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[0] PCIE:DRP05[0] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[1] PCIE:DRP05[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP04[14] PCIE:DRP04[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ON PCIE:DRP04[12] PCIE:DRP04[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[10] PCIE:DRP04[10] PCIE:AER_CAP_NEXTPTR[11] PCIE:DRP04[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[8] PCIE:DRP04[8] PCIE:AER_CAP_NEXTPTR[9] PCIE:DRP04[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[6] PCIE:DRP04[6] PCIE:AER_CAP_NEXTPTR[7] PCIE:DRP04[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[4] PCIE:DRP04[4] PCIE:AER_CAP_NEXTPTR[5] PCIE:DRP04[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[2] PCIE:DRP04[2] PCIE:AER_CAP_NEXTPTR[3] PCIE:DRP04[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_NEXTPTR[0] PCIE:DRP04[0] PCIE:AER_CAP_NEXTPTR[1] PCIE:DRP04[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP03[14] PCIE:DRP03[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP03[12] PCIE:DRP03[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[10] PCIE:DRP03[10] PCIE:AER_BASE_PTR[11] PCIE:DRP03[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[8] PCIE:DRP03[8] PCIE:AER_BASE_PTR[9] PCIE:DRP03[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[6] PCIE:DRP03[6] PCIE:AER_BASE_PTR[7] PCIE:DRP03[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[4] PCIE:DRP03[4] PCIE:AER_BASE_PTR[5] PCIE:DRP03[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[2] PCIE:DRP03[2] PCIE:AER_BASE_PTR[3] PCIE:DRP03[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_BASE_PTR[0] PCIE:DRP03[0] PCIE:AER_BASE_PTR[1] PCIE:DRP03[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP02[14] PCIE:DRP02[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP02[12] PCIE:DRP02[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP02[10] PCIE:DRP02[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP02[8] PCIE:DRP02[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP02[6] PCIE:DRP02[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_VERSION[3] PCIE:DRP02[4] PCIE:DRP02[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_VERSION[1] PCIE:DRP02[2] PCIE:AER_CAP_VERSION[2] PCIE:DRP02[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE PCIE:DRP02[0] PCIE:AER_CAP_VERSION[0] PCIE:DRP02[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[14] PCIE:DRP01[14] PCIE:AER_CAP_ID[15] PCIE:DRP01[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[12] PCIE:DRP01[12] PCIE:AER_CAP_ID[13] PCIE:DRP01[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[10] PCIE:DRP01[10] PCIE:AER_CAP_ID[11] PCIE:DRP01[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[8] PCIE:DRP01[8] PCIE:AER_CAP_ID[9] PCIE:DRP01[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[6] PCIE:DRP01[6] PCIE:AER_CAP_ID[7] PCIE:DRP01[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[4] PCIE:DRP01[4] PCIE:AER_CAP_ID[5] PCIE:DRP01[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[2] PCIE:DRP01[2] PCIE:AER_CAP_ID[3] PCIE:DRP01[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ID[0] PCIE:DRP01[0] PCIE:AER_CAP_ID[1] PCIE:DRP01[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[14] PCIE:DRP00[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[12] PCIE:DRP00[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[10] PCIE:DRP00[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[8] PCIE:DRP00[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[6] PCIE:DRP00[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[4] PCIE:DRP00[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP00[2] PCIE:DRP00[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_ECRC_CHECK_CAPABLE PCIE:DRP00[0] PCIE:AER_CAP_ECRC_GEN_CAPABLE PCIE:DRP00[1]
virtex7 PCIE bittile 1
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[14] PCIE:DRP0B[14] PCIE:BAR2[15] PCIE:DRP0B[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[12] PCIE:DRP0B[12] PCIE:BAR2[13] PCIE:DRP0B[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[10] PCIE:DRP0B[10] PCIE:BAR2[11] PCIE:DRP0B[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[8] PCIE:DRP0B[8] PCIE:BAR2[9] PCIE:DRP0B[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[6] PCIE:DRP0B[6] PCIE:BAR2[7] PCIE:DRP0B[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[4] PCIE:DRP0B[4] PCIE:BAR2[5] PCIE:DRP0B[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[2] PCIE:DRP0B[2] PCIE:BAR2[3] PCIE:DRP0B[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[0] PCIE:DRP0B[0] PCIE:BAR2[1] PCIE:DRP0B[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[30] PCIE:DRP0A[14] PCIE:BAR1[31] PCIE:DRP0A[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[28] PCIE:DRP0A[12] PCIE:BAR1[29] PCIE:DRP0A[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[26] PCIE:DRP0A[10] PCIE:BAR1[27] PCIE:DRP0A[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[24] PCIE:DRP0A[8] PCIE:BAR1[25] PCIE:DRP0A[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[22] PCIE:DRP0A[6] PCIE:BAR1[23] PCIE:DRP0A[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[20] PCIE:DRP0A[4] PCIE:BAR1[21] PCIE:DRP0A[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[18] PCIE:DRP0A[2] PCIE:BAR1[19] PCIE:DRP0A[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[16] PCIE:DRP0A[0] PCIE:BAR1[17] PCIE:DRP0A[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[14] PCIE:DRP09[14] PCIE:BAR1[15] PCIE:DRP09[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[12] PCIE:DRP09[12] PCIE:BAR1[13] PCIE:DRP09[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[10] PCIE:DRP09[10] PCIE:BAR1[11] PCIE:DRP09[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[8] PCIE:DRP09[8] PCIE:BAR1[9] PCIE:DRP09[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[6] PCIE:DRP09[6] PCIE:BAR1[7] PCIE:DRP09[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[4] PCIE:DRP09[4] PCIE:BAR1[5] PCIE:DRP09[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[2] PCIE:DRP09[2] PCIE:BAR1[3] PCIE:DRP09[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR1[0] PCIE:DRP09[0] PCIE:BAR1[1] PCIE:DRP09[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[30] PCIE:DRP08[14] PCIE:BAR0[31] PCIE:DRP08[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[28] PCIE:DRP08[12] PCIE:BAR0[29] PCIE:DRP08[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[26] PCIE:DRP08[10] PCIE:BAR0[27] PCIE:DRP08[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[24] PCIE:DRP08[8] PCIE:BAR0[25] PCIE:DRP08[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[22] PCIE:DRP08[6] PCIE:BAR0[23] PCIE:DRP08[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[20] PCIE:DRP08[4] PCIE:BAR0[21] PCIE:DRP08[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[18] PCIE:DRP08[2] PCIE:BAR0[19] PCIE:DRP08[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[16] PCIE:DRP08[0] PCIE:BAR0[17] PCIE:DRP08[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[14] PCIE:DRP07[14] PCIE:BAR0[15] PCIE:DRP07[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[12] PCIE:DRP07[12] PCIE:BAR0[13] PCIE:DRP07[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[10] PCIE:DRP07[10] PCIE:BAR0[11] PCIE:DRP07[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[8] PCIE:DRP07[8] PCIE:BAR0[9] PCIE:DRP07[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[6] PCIE:DRP07[6] PCIE:BAR0[7] PCIE:DRP07[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[4] PCIE:DRP07[4] PCIE:BAR0[5] PCIE:DRP07[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[2] PCIE:DRP07[2] PCIE:BAR0[3] PCIE:DRP07[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR0[0] PCIE:DRP07[0] PCIE:BAR0[1] PCIE:DRP07[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP06[14] PCIE:DRP06[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP06[12] PCIE:DRP06[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP06[10] PCIE:DRP06[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_MULTIHEADER PCIE:DRP06[8] PCIE:DRP06[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[22] PCIE:DRP06[6] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[23] PCIE:DRP06[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[20] PCIE:DRP06[4] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[21] PCIE:DRP06[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[18] PCIE:DRP06[2] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[19] PCIE:DRP06[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[16] PCIE:DRP06[0] PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[17] PCIE:DRP06[1]
virtex7 PCIE bittile 2
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[14] PCIE:DRP11[14] PCIE:BAR5[15] PCIE:DRP11[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[12] PCIE:DRP11[12] PCIE:BAR5[13] PCIE:DRP11[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[10] PCIE:DRP11[10] PCIE:BAR5[11] PCIE:DRP11[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[8] PCIE:DRP11[8] PCIE:BAR5[9] PCIE:DRP11[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[6] PCIE:DRP11[6] PCIE:BAR5[7] PCIE:DRP11[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[4] PCIE:DRP11[4] PCIE:BAR5[5] PCIE:DRP11[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[2] PCIE:DRP11[2] PCIE:BAR5[3] PCIE:DRP11[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[0] PCIE:DRP11[0] PCIE:BAR5[1] PCIE:DRP11[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[30] PCIE:DRP10[14] PCIE:BAR4[31] PCIE:DRP10[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[28] PCIE:DRP10[12] PCIE:BAR4[29] PCIE:DRP10[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[26] PCIE:DRP10[10] PCIE:BAR4[27] PCIE:DRP10[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[24] PCIE:DRP10[8] PCIE:BAR4[25] PCIE:DRP10[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[22] PCIE:DRP10[6] PCIE:BAR4[23] PCIE:DRP10[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[20] PCIE:DRP10[4] PCIE:BAR4[21] PCIE:DRP10[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[18] PCIE:DRP10[2] PCIE:BAR4[19] PCIE:DRP10[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[16] PCIE:DRP10[0] PCIE:BAR4[17] PCIE:DRP10[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[14] PCIE:DRP0F[14] PCIE:BAR4[15] PCIE:DRP0F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[12] PCIE:DRP0F[12] PCIE:BAR4[13] PCIE:DRP0F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[10] PCIE:DRP0F[10] PCIE:BAR4[11] PCIE:DRP0F[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[8] PCIE:DRP0F[8] PCIE:BAR4[9] PCIE:DRP0F[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[6] PCIE:DRP0F[6] PCIE:BAR4[7] PCIE:DRP0F[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[4] PCIE:DRP0F[4] PCIE:BAR4[5] PCIE:DRP0F[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[2] PCIE:DRP0F[2] PCIE:BAR4[3] PCIE:DRP0F[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR4[0] PCIE:DRP0F[0] PCIE:BAR4[1] PCIE:DRP0F[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[30] PCIE:DRP0E[14] PCIE:BAR3[31] PCIE:DRP0E[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[28] PCIE:DRP0E[12] PCIE:BAR3[29] PCIE:DRP0E[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[26] PCIE:DRP0E[10] PCIE:BAR3[27] PCIE:DRP0E[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[24] PCIE:DRP0E[8] PCIE:BAR3[25] PCIE:DRP0E[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[22] PCIE:DRP0E[6] PCIE:BAR3[23] PCIE:DRP0E[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[20] PCIE:DRP0E[4] PCIE:BAR3[21] PCIE:DRP0E[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[18] PCIE:DRP0E[2] PCIE:BAR3[19] PCIE:DRP0E[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[16] PCIE:DRP0E[0] PCIE:BAR3[17] PCIE:DRP0E[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[14] PCIE:DRP0D[14] PCIE:BAR3[15] PCIE:DRP0D[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[12] PCIE:DRP0D[12] PCIE:BAR3[13] PCIE:DRP0D[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[10] PCIE:DRP0D[10] PCIE:BAR3[11] PCIE:DRP0D[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[8] PCIE:DRP0D[8] PCIE:BAR3[9] PCIE:DRP0D[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[6] PCIE:DRP0D[6] PCIE:BAR3[7] PCIE:DRP0D[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[4] PCIE:DRP0D[4] PCIE:BAR3[5] PCIE:DRP0D[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[2] PCIE:DRP0D[2] PCIE:BAR3[3] PCIE:DRP0D[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR3[0] PCIE:DRP0D[0] PCIE:BAR3[1] PCIE:DRP0D[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[30] PCIE:DRP0C[14] PCIE:BAR2[31] PCIE:DRP0C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[28] PCIE:DRP0C[12] PCIE:BAR2[29] PCIE:DRP0C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[26] PCIE:DRP0C[10] PCIE:BAR2[27] PCIE:DRP0C[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[24] PCIE:DRP0C[8] PCIE:BAR2[25] PCIE:DRP0C[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[22] PCIE:DRP0C[6] PCIE:BAR2[23] PCIE:DRP0C[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[20] PCIE:DRP0C[4] PCIE:BAR2[21] PCIE:DRP0C[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[18] PCIE:DRP0C[2] PCIE:BAR2[19] PCIE:DRP0C[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR2[16] PCIE:DRP0C[0] PCIE:BAR2[17] PCIE:DRP0C[1]
virtex7 PCIE bittile 3
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[30] PCIE:DRP17[14] PCIE:CARDBUS_CIS_POINTER[31] PCIE:DRP17[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[28] PCIE:DRP17[12] PCIE:CARDBUS_CIS_POINTER[29] PCIE:DRP17[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[26] PCIE:DRP17[10] PCIE:CARDBUS_CIS_POINTER[27] PCIE:DRP17[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[24] PCIE:DRP17[8] PCIE:CARDBUS_CIS_POINTER[25] PCIE:DRP17[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[22] PCIE:DRP17[6] PCIE:CARDBUS_CIS_POINTER[23] PCIE:DRP17[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[20] PCIE:DRP17[4] PCIE:CARDBUS_CIS_POINTER[21] PCIE:DRP17[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[18] PCIE:DRP17[2] PCIE:CARDBUS_CIS_POINTER[19] PCIE:DRP17[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[16] PCIE:DRP17[0] PCIE:CARDBUS_CIS_POINTER[17] PCIE:DRP17[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[14] PCIE:DRP16[14] PCIE:CARDBUS_CIS_POINTER[15] PCIE:DRP16[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[12] PCIE:DRP16[12] PCIE:CARDBUS_CIS_POINTER[13] PCIE:DRP16[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[10] PCIE:DRP16[10] PCIE:CARDBUS_CIS_POINTER[11] PCIE:DRP16[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[8] PCIE:DRP16[8] PCIE:CARDBUS_CIS_POINTER[9] PCIE:DRP16[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[6] PCIE:DRP16[6] PCIE:CARDBUS_CIS_POINTER[7] PCIE:DRP16[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[4] PCIE:DRP16[4] PCIE:CARDBUS_CIS_POINTER[5] PCIE:DRP16[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[2] PCIE:DRP16[2] PCIE:CARDBUS_CIS_POINTER[3] PCIE:DRP16[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CARDBUS_CIS_POINTER[0] PCIE:DRP16[0] PCIE:CARDBUS_CIS_POINTER[1] PCIE:DRP16[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP15[14] PCIE:DRP15[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP15[12] PCIE:DRP15[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP15[10] PCIE:DRP15[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP15[8] PCIE:DRP15[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[6] PCIE:DRP15[6] PCIE:CAPABILITIES_PTR[7] PCIE:DRP15[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[4] PCIE:DRP15[4] PCIE:CAPABILITIES_PTR[5] PCIE:DRP15[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[2] PCIE:DRP15[2] PCIE:CAPABILITIES_PTR[3] PCIE:DRP15[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CAPABILITIES_PTR[0] PCIE:DRP15[0] PCIE:CAPABILITIES_PTR[1] PCIE:DRP15[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[14] PCIE:EXPANSION_ROM[30] PCIE:DRP14[15] PCIE:EXPANSION_ROM[31]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[12] PCIE:EXPANSION_ROM[28] PCIE:DRP14[13] PCIE:EXPANSION_ROM[29]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[10] PCIE:EXPANSION_ROM[26] PCIE:DRP14[11] PCIE:EXPANSION_ROM[27]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[8] PCIE:EXPANSION_ROM[24] PCIE:DRP14[9] PCIE:EXPANSION_ROM[25]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[6] PCIE:EXPANSION_ROM[22] PCIE:DRP14[7] PCIE:EXPANSION_ROM[23]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[4] PCIE:EXPANSION_ROM[20] PCIE:DRP14[5] PCIE:EXPANSION_ROM[21]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[2] PCIE:EXPANSION_ROM[18] PCIE:DRP14[3] PCIE:EXPANSION_ROM[19]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP14[0] PCIE:EXPANSION_ROM[16] PCIE:DRP14[1] PCIE:EXPANSION_ROM[17]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[14] PCIE:EXPANSION_ROM[14] PCIE:DRP13[15] PCIE:EXPANSION_ROM[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[12] PCIE:EXPANSION_ROM[12] PCIE:DRP13[13] PCIE:EXPANSION_ROM[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[10] PCIE:EXPANSION_ROM[10] PCIE:DRP13[11] PCIE:EXPANSION_ROM[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[8] PCIE:EXPANSION_ROM[8] PCIE:DRP13[9] PCIE:EXPANSION_ROM[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[6] PCIE:EXPANSION_ROM[6] PCIE:DRP13[7] PCIE:EXPANSION_ROM[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[4] PCIE:EXPANSION_ROM[4] PCIE:DRP13[5] PCIE:EXPANSION_ROM[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[2] PCIE:EXPANSION_ROM[2] PCIE:DRP13[3] PCIE:EXPANSION_ROM[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP13[0] PCIE:EXPANSION_ROM[0] PCIE:DRP13[1] PCIE:EXPANSION_ROM[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[30] PCIE:DRP12[14] PCIE:BAR5[31] PCIE:DRP12[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[28] PCIE:DRP12[12] PCIE:BAR5[29] PCIE:DRP12[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[26] PCIE:DRP12[10] PCIE:BAR5[27] PCIE:DRP12[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[24] PCIE:DRP12[8] PCIE:BAR5[25] PCIE:DRP12[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[22] PCIE:DRP12[6] PCIE:BAR5[23] PCIE:DRP12[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[20] PCIE:DRP12[4] PCIE:BAR5[21] PCIE:DRP12[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[18] PCIE:DRP12[2] PCIE:BAR5[19] PCIE:DRP12[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:BAR5[16] PCIE:DRP12[0] PCIE:BAR5[17] PCIE:DRP12[1]
virtex7 PCIE bittile 4
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[14] PCIE:DRP1D[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[12] PCIE:DRP1D[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[10] PCIE:DSN_BASE_PTR[10] PCIE:DRP1D[11] PCIE:DSN_BASE_PTR[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[8] PCIE:DSN_BASE_PTR[8] PCIE:DRP1D[9] PCIE:DSN_BASE_PTR[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[6] PCIE:DSN_BASE_PTR[6] PCIE:DRP1D[7] PCIE:DSN_BASE_PTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[4] PCIE:DSN_BASE_PTR[4] PCIE:DRP1D[5] PCIE:DSN_BASE_PTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[2] PCIE:DSN_BASE_PTR[2] PCIE:DRP1D[3] PCIE:DSN_BASE_PTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1D[0] PCIE:DSN_BASE_PTR[0] PCIE:DRP1D[1] PCIE:DSN_BASE_PTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[14] PCIE:DRP1C[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[12] PCIE:DRP1C[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1C[10] PCIE:DRP1C[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED PCIE:DRP1C[8] PCIE:DEV_CONTROL_EXT_TAG_DEFAULT PCIE:DRP1C[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_31_29[1] PCIE:DRP1C[6] PCIE:DEV_CAP_RSVD_31_29[2] PCIE:DRP1C[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_17_16[1] PCIE:DRP1C[4] PCIE:DEV_CAP_RSVD_31_29[0] PCIE:DRP1C[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_14_12[2] PCIE:DRP1C[2] PCIE:DEV_CAP_RSVD_17_16[0] PCIE:DRP1C[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_RSVD_14_12[0] PCIE:DRP1C[0] PCIE:DEV_CAP_RSVD_14_12[1] PCIE:DRP1C[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1B[14] PCIE:DRP1B[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT[1] PCIE:DRP1B[12] PCIE:DEV_CAP_ROLE_BASED_ERROR PCIE:DRP1B[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[2] PCIE:DRP1B[10] PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT[0] PCIE:DRP1B[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[0] PCIE:DRP1B[8] PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED[1] PCIE:DRP1B[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_EXT_TAG_SUPPORTED PCIE:DRP1B[6] PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE PCIE:DRP1B[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[1] PCIE:DRP1B[4] PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[2] PCIE:DRP1B[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[2] PCIE:DRP1B[2] PCIE:DEV_CAP_ENDPOINT_L1_LATENCY[0] PCIE:DRP1B[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[0] PCIE:DRP1B[0] PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY[1] PCIE:DRP1B[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1A[14] PCIE:DRP1A[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE PCIE:DRP1A[12] PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE PCIE:DRP1A[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_MAX_ENDEND_TLP_PREFIXES[1] PCIE:DRP1A[10] PCIE:DRP1A[11] PCIE:ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED PCIE:DRP1A[8] PCIE:DEV_CAP2_MAX_ENDEND_TLP_PREFIXES[0] PCIE:DRP1A[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_TPH_COMPLETER_SUPPORTED[1] PCIE:DRP1A[6] PCIE:DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED PCIE:DRP1A[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_LTR_MECHANISM_SUPPORTED PCIE:DRP1A[4] PCIE:DEV_CAP2_TPH_COMPLETER_SUPPORTED[0] PCIE:DRP1A[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_CAS128_COMPLETER_SUPPORTED PCIE:DRP1A[2] PCIE:DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING PCIE:DRP1A[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED PCIE:DRP1A[0] PCIE:DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED PCIE:DRP1A[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DEV_CAP2_ARI_FORWARDING_SUPPORTED PCIE:DRP19[14] PCIE:DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED PCIE:DRP19[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[2] PCIE:DRP19[12] PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[3] PCIE:DRP19[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[0] PCIE:DRP19[10] PCIE:CPL_TIMEOUT_RANGES_SUPPORTED[1] PCIE:DRP19[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CMD_INTX_IMPLEMENTED PCIE:DRP19[8] PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED PCIE:DRP19[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[22] PCIE:DRP19[6] PCIE:CLASS_CODE[23] PCIE:DRP19[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[20] PCIE:DRP19[4] PCIE:CLASS_CODE[21] PCIE:DRP19[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[18] PCIE:DRP19[2] PCIE:CLASS_CODE[19] PCIE:DRP19[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[16] PCIE:DRP19[0] PCIE:CLASS_CODE[17] PCIE:DRP19[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[14] PCIE:DRP18[14] PCIE:CLASS_CODE[15] PCIE:DRP18[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[12] PCIE:DRP18[12] PCIE:CLASS_CODE[13] PCIE:DRP18[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[10] PCIE:DRP18[10] PCIE:CLASS_CODE[11] PCIE:DRP18[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[8] PCIE:DRP18[8] PCIE:CLASS_CODE[9] PCIE:DRP18[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[6] PCIE:DRP18[6] PCIE:CLASS_CODE[7] PCIE:DRP18[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[4] PCIE:DRP18[4] PCIE:CLASS_CODE[5] PCIE:DRP18[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[2] PCIE:DRP18[2] PCIE:CLASS_CODE[3] PCIE:DRP18[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CLASS_CODE[0] PCIE:DRP18[0] PCIE:CLASS_CODE[1] PCIE:DRP18[1]
virtex7 PCIE bittile 5
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[14] PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT PCIE:DRP23[15] PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[12] PCIE:LINK_CAP_ASPM_SUPPORT[0] PCIE:DRP23[13] PCIE:LINK_CAP_ASPM_SUPPORT[1]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[10] PCIE:LAST_CONFIG_DWORD[8] PCIE:DRP23[11] PCIE:LAST_CONFIG_DWORD[9]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[8] PCIE:LAST_CONFIG_DWORD[6] PCIE:DRP23[9] PCIE:LAST_CONFIG_DWORD[7]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[6] PCIE:LAST_CONFIG_DWORD[4] PCIE:DRP23[7] PCIE:LAST_CONFIG_DWORD[5]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[4] PCIE:LAST_CONFIG_DWORD[2] PCIE:DRP23[5] PCIE:LAST_CONFIG_DWORD[3]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[2] PCIE:LAST_CONFIG_DWORD[0] PCIE:DRP23[3] PCIE:LAST_CONFIG_DWORD[1]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP23[0] PCIE:INTERRUPT_STAT_AUTO PCIE:DRP23[1] PCIE:IS_SWITCH
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[14] PCIE:INTERRUPT_PIN[6] PCIE:DRP22[15] PCIE:INTERRUPT_PIN[7]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[12] PCIE:INTERRUPT_PIN[4] PCIE:DRP22[13] PCIE:INTERRUPT_PIN[5]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[10] PCIE:INTERRUPT_PIN[2] PCIE:DRP22[11] PCIE:INTERRUPT_PIN[3]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[8] PCIE:INTERRUPT_PIN[0] PCIE:DRP22[9] PCIE:INTERRUPT_PIN[1]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[6] PCIE:HEADER_TYPE[6] PCIE:DRP22[7] PCIE:HEADER_TYPE[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[4] PCIE:HEADER_TYPE[4] PCIE:DRP22[5] PCIE:HEADER_TYPE[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[2] PCIE:HEADER_TYPE[2] PCIE:DRP22[3] PCIE:HEADER_TYPE[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP22[0] PCIE:HEADER_TYPE[0] PCIE:DRP22[1] PCIE:HEADER_TYPE[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[14] PCIE:DRP21[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[12] PCIE:DRP21[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[10] PCIE:DRP21[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[8] PCIE:EXT_CFG_XP_CAP_PTR[8] PCIE:DRP21[9] PCIE:EXT_CFG_XP_CAP_PTR[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[6] PCIE:EXT_CFG_XP_CAP_PTR[6] PCIE:DRP21[7] PCIE:EXT_CFG_XP_CAP_PTR[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[4] PCIE:EXT_CFG_XP_CAP_PTR[4] PCIE:DRP21[5] PCIE:EXT_CFG_XP_CAP_PTR[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[2] PCIE:EXT_CFG_XP_CAP_PTR[2] PCIE:DRP21[3] PCIE:EXT_CFG_XP_CAP_PTR[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP21[0] PCIE:EXT_CFG_XP_CAP_PTR[0] PCIE:DRP21[1] PCIE:EXT_CFG_XP_CAP_PTR[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[14] PCIE:DRP20[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[12] PCIE:DRP20[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[10] PCIE:DRP20[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[8] PCIE:EXT_CFG_CAP_PTR[4] PCIE:DRP20[9] PCIE:EXT_CFG_CAP_PTR[5]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[6] PCIE:EXT_CFG_CAP_PTR[2] PCIE:DRP20[7] PCIE:EXT_CFG_CAP_PTR[3]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[4] PCIE:EXT_CFG_CAP_PTR[0] PCIE:DRP20[5] PCIE:EXT_CFG_CAP_PTR[1]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[2] PCIE:DSN_CAP_VERSION[2] PCIE:DRP20[3] PCIE:DSN_CAP_VERSION[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP20[0] PCIE:DSN_CAP_VERSION[0] PCIE:DRP20[1] PCIE:DSN_CAP_VERSION[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[14] PCIE:DRP1F[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[12] PCIE:DSN_CAP_ON PCIE:DRP1F[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[10] PCIE:DSN_CAP_NEXTPTR[10] PCIE:DRP1F[11] PCIE:DSN_CAP_NEXTPTR[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[8] PCIE:DSN_CAP_NEXTPTR[8] PCIE:DRP1F[9] PCIE:DSN_CAP_NEXTPTR[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[6] PCIE:DSN_CAP_NEXTPTR[6] PCIE:DRP1F[7] PCIE:DSN_CAP_NEXTPTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[4] PCIE:DSN_CAP_NEXTPTR[4] PCIE:DRP1F[5] PCIE:DSN_CAP_NEXTPTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[2] PCIE:DSN_CAP_NEXTPTR[2] PCIE:DRP1F[3] PCIE:DSN_CAP_NEXTPTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1F[0] PCIE:DSN_CAP_NEXTPTR[0] PCIE:DRP1F[1] PCIE:DSN_CAP_NEXTPTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[14] PCIE:DSN_CAP_ID[14] PCIE:DRP1E[15] PCIE:DSN_CAP_ID[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[12] PCIE:DSN_CAP_ID[12] PCIE:DRP1E[13] PCIE:DSN_CAP_ID[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[10] PCIE:DSN_CAP_ID[10] PCIE:DRP1E[11] PCIE:DSN_CAP_ID[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[8] PCIE:DSN_CAP_ID[8] PCIE:DRP1E[9] PCIE:DSN_CAP_ID[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[6] PCIE:DSN_CAP_ID[6] PCIE:DRP1E[7] PCIE:DSN_CAP_ID[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[4] PCIE:DSN_CAP_ID[4] PCIE:DRP1E[5] PCIE:DSN_CAP_ID[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[2] PCIE:DSN_CAP_ID[2] PCIE:DRP1E[3] PCIE:DSN_CAP_ID[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP1E[0] PCIE:DSN_CAP_ID[0] PCIE:DRP1E[1] PCIE:DSN_CAP_ID[1]
virtex7 PCIE bittile 6
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[14] PCIE:DRP29[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[12] PCIE:DRP29[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[10] PCIE:DRP29[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[8] PCIE:MSI_CAP_ON PCIE:DRP29[9] PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[6] PCIE:MSI_CAP_NEXTPTR[6] PCIE:DRP29[7] PCIE:MSI_CAP_NEXTPTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[4] PCIE:MSI_CAP_NEXTPTR[4] PCIE:DRP29[5] PCIE:MSI_CAP_NEXTPTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[2] PCIE:MSI_CAP_NEXTPTR[2] PCIE:DRP29[3] PCIE:MSI_CAP_NEXTPTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP29[0] PCIE:MSI_CAP_NEXTPTR[0] PCIE:DRP29[1] PCIE:MSI_CAP_NEXTPTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[14] PCIE:DRP28[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[12] PCIE:DRP28[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[10] PCIE:MSI_CAP_MULTIMSGCAP[1] PCIE:DRP28[11] PCIE:MSI_CAP_MULTIMSGCAP[2]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[8] PCIE:MSI_CAP_MULTIMSG_EXTENSION PCIE:DRP28[9] PCIE:MSI_CAP_MULTIMSGCAP[0]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[6] PCIE:MSI_CAP_ID[6] PCIE:DRP28[7] PCIE:MSI_CAP_ID[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[4] PCIE:MSI_CAP_ID[4] PCIE:DRP28[5] PCIE:MSI_CAP_ID[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[2] PCIE:MSI_CAP_ID[2] PCIE:DRP28[3] PCIE:MSI_CAP_ID[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP28[0] PCIE:MSI_CAP_ID[0] PCIE:DRP28[1] PCIE:MSI_CAP_ID[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[14] PCIE:DRP27[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[12] PCIE:DRP27[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[10] PCIE:DRP27[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[8] PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE PCIE:DRP27[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[6] PCIE:MSI_BASE_PTR[6] PCIE:DRP27[7] PCIE:MSI_BASE_PTR[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[4] PCIE:MSI_BASE_PTR[4] PCIE:DRP27[5] PCIE:MSI_BASE_PTR[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[2] PCIE:MSI_BASE_PTR[2] PCIE:DRP27[3] PCIE:MSI_BASE_PTR[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP27[0] PCIE:MSI_BASE_PTR[0] PCIE:DRP27[1] PCIE:MSI_BASE_PTR[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[14] PCIE:DRP26[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[12] PCIE:DRP26[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[10] PCIE:DRP26[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[8] PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG PCIE:DRP26[9] PCIE:MPS_FORCE
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[6] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[2] PCIE:DRP26[7] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[3]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[4] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[0] PCIE:DRP26[5] PCIE:LINK_CTRL2_TARGET_LINK_SPEED[1]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[2] PCIE:LINK_CTRL2_DEEMPHASIS PCIE:DRP26[3] PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP26[0] PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE PCIE:DRP26[1] PCIE:LINK_CONTROL_RCB
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[14] PCIE:LINK_CAP_ASPM_OPTIONALITY PCIE:DRP25[15] PCIE:LINK_CAP_RSVD_23
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[12] PCIE:LINK_CAP_MAX_LINK_SPEED[2] PCIE:DRP25[13] PCIE:LINK_CAP_MAX_LINK_SPEED[3]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[10] PCIE:LINK_CAP_MAX_LINK_SPEED[0] PCIE:DRP25[11] PCIE:LINK_CAP_MAX_LINK_SPEED[1]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[8] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[2] PCIE:DRP25[9] PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[6] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[0] PCIE:DRP25[7] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2[1]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[4] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[1] PCIE:DRP25[5] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[2]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[2] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[2] PCIE:DRP25[3] PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1[0]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP25[0] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[0] PCIE:DRP25[1] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[14] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[2] PCIE:DRP24[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[12] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[0] PCIE:DRP24[13] PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1[1]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[10] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[1] PCIE:DRP24[11] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[2]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[8] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[2] PCIE:DRP24[9] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2[0]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[6] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[0] PCIE:DRP24[7] PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1[1]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[4] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[1] PCIE:DRP24[5] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[2]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[2] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[2] PCIE:DRP24[3] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2[0]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP24[0] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[0] PCIE:DRP24[1] PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1[1]
virtex7 PCIE bittile 7
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[14] PCIE:DRP2F[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[12] PCIE:MSIX_CAP_TABLE_OFFSET[28] PCIE:DRP2F[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[10] PCIE:MSIX_CAP_TABLE_OFFSET[26] PCIE:DRP2F[11] PCIE:MSIX_CAP_TABLE_OFFSET[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[8] PCIE:MSIX_CAP_TABLE_OFFSET[24] PCIE:DRP2F[9] PCIE:MSIX_CAP_TABLE_OFFSET[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[6] PCIE:MSIX_CAP_TABLE_OFFSET[22] PCIE:DRP2F[7] PCIE:MSIX_CAP_TABLE_OFFSET[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[4] PCIE:MSIX_CAP_TABLE_OFFSET[20] PCIE:DRP2F[5] PCIE:MSIX_CAP_TABLE_OFFSET[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[2] PCIE:MSIX_CAP_TABLE_OFFSET[18] PCIE:DRP2F[3] PCIE:MSIX_CAP_TABLE_OFFSET[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2F[0] PCIE:MSIX_CAP_TABLE_OFFSET[16] PCIE:DRP2F[1] PCIE:MSIX_CAP_TABLE_OFFSET[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[14] PCIE:MSIX_CAP_TABLE_OFFSET[14] PCIE:DRP2E[15] PCIE:MSIX_CAP_TABLE_OFFSET[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[12] PCIE:MSIX_CAP_TABLE_OFFSET[12] PCIE:DRP2E[13] PCIE:MSIX_CAP_TABLE_OFFSET[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[10] PCIE:MSIX_CAP_TABLE_OFFSET[10] PCIE:DRP2E[11] PCIE:MSIX_CAP_TABLE_OFFSET[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[8] PCIE:MSIX_CAP_TABLE_OFFSET[8] PCIE:DRP2E[9] PCIE:MSIX_CAP_TABLE_OFFSET[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[6] PCIE:MSIX_CAP_TABLE_OFFSET[6] PCIE:DRP2E[7] PCIE:MSIX_CAP_TABLE_OFFSET[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[4] PCIE:MSIX_CAP_TABLE_OFFSET[4] PCIE:DRP2E[5] PCIE:MSIX_CAP_TABLE_OFFSET[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[2] PCIE:MSIX_CAP_TABLE_OFFSET[2] PCIE:DRP2E[3] PCIE:MSIX_CAP_TABLE_OFFSET[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2E[0] PCIE:MSIX_CAP_TABLE_OFFSET[0] PCIE:DRP2E[1] PCIE:MSIX_CAP_TABLE_OFFSET[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[14] PCIE:MSIX_CAP_TABLE_BIR[1] PCIE:DRP2D[15] PCIE:MSIX_CAP_TABLE_BIR[2]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[12] PCIE:MSIX_CAP_PBA_OFFSET[28] PCIE:DRP2D[13] PCIE:MSIX_CAP_TABLE_BIR[0]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[10] PCIE:MSIX_CAP_PBA_OFFSET[26] PCIE:DRP2D[11] PCIE:MSIX_CAP_PBA_OFFSET[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[8] PCIE:MSIX_CAP_PBA_OFFSET[24] PCIE:DRP2D[9] PCIE:MSIX_CAP_PBA_OFFSET[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[6] PCIE:MSIX_CAP_PBA_OFFSET[22] PCIE:DRP2D[7] PCIE:MSIX_CAP_PBA_OFFSET[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[4] PCIE:MSIX_CAP_PBA_OFFSET[20] PCIE:DRP2D[5] PCIE:MSIX_CAP_PBA_OFFSET[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[2] PCIE:MSIX_CAP_PBA_OFFSET[18] PCIE:DRP2D[3] PCIE:MSIX_CAP_PBA_OFFSET[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2D[0] PCIE:MSIX_CAP_PBA_OFFSET[16] PCIE:DRP2D[1] PCIE:MSIX_CAP_PBA_OFFSET[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[14] PCIE:MSIX_CAP_PBA_OFFSET[14] PCIE:DRP2C[15] PCIE:MSIX_CAP_PBA_OFFSET[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[12] PCIE:MSIX_CAP_PBA_OFFSET[12] PCIE:DRP2C[13] PCIE:MSIX_CAP_PBA_OFFSET[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[10] PCIE:MSIX_CAP_PBA_OFFSET[10] PCIE:DRP2C[11] PCIE:MSIX_CAP_PBA_OFFSET[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[8] PCIE:MSIX_CAP_PBA_OFFSET[8] PCIE:DRP2C[9] PCIE:MSIX_CAP_PBA_OFFSET[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[6] PCIE:MSIX_CAP_PBA_OFFSET[6] PCIE:DRP2C[7] PCIE:MSIX_CAP_PBA_OFFSET[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[4] PCIE:MSIX_CAP_PBA_OFFSET[4] PCIE:DRP2C[5] PCIE:MSIX_CAP_PBA_OFFSET[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[2] PCIE:MSIX_CAP_PBA_OFFSET[2] PCIE:DRP2C[3] PCIE:MSIX_CAP_PBA_OFFSET[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2C[0] PCIE:MSIX_CAP_PBA_OFFSET[0] PCIE:DRP2C[1] PCIE:MSIX_CAP_PBA_OFFSET[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[14] PCIE:DRP2B[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[12] PCIE:DRP2B[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[10] PCIE:MSIX_CAP_PBA_BIR[1] PCIE:DRP2B[11] PCIE:MSIX_CAP_PBA_BIR[2]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[8] PCIE:MSIX_CAP_ON PCIE:DRP2B[9] PCIE:MSIX_CAP_PBA_BIR[0]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[6] PCIE:MSIX_CAP_NEXTPTR[6] PCIE:DRP2B[7] PCIE:MSIX_CAP_NEXTPTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[4] PCIE:MSIX_CAP_NEXTPTR[4] PCIE:DRP2B[5] PCIE:MSIX_CAP_NEXTPTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[2] PCIE:MSIX_CAP_NEXTPTR[2] PCIE:DRP2B[3] PCIE:MSIX_CAP_NEXTPTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2B[0] PCIE:MSIX_CAP_NEXTPTR[0] PCIE:DRP2B[1] PCIE:MSIX_CAP_NEXTPTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[14] PCIE:MSIX_CAP_ID[6] PCIE:DRP2A[15] PCIE:MSIX_CAP_ID[7]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[12] PCIE:MSIX_CAP_ID[4] PCIE:DRP2A[13] PCIE:MSIX_CAP_ID[5]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[10] PCIE:MSIX_CAP_ID[2] PCIE:DRP2A[11] PCIE:MSIX_CAP_ID[3]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[8] PCIE:MSIX_CAP_ID[0] PCIE:DRP2A[9] PCIE:MSIX_CAP_ID[1]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[6] PCIE:MSIX_BASE_PTR[6] PCIE:DRP2A[7] PCIE:MSIX_BASE_PTR[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[4] PCIE:MSIX_BASE_PTR[4] PCIE:DRP2A[5] PCIE:MSIX_BASE_PTR[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[2] PCIE:MSIX_BASE_PTR[2] PCIE:DRP2A[3] PCIE:MSIX_BASE_PTR[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP2A[0] PCIE:MSIX_BASE_PTR[0] PCIE:DRP2A[1] PCIE:MSIX_BASE_PTR[1]
virtex7 PCIE bittile 8
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[14] PCIE:PM_CAP_PMESUPPORT[4] PCIE:DRP35[15] PCIE:PM_CAP_RSVD_04
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[12] PCIE:PM_CAP_PMESUPPORT[2] PCIE:DRP35[13] PCIE:PM_CAP_PMESUPPORT[3]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[10] PCIE:PM_CAP_PMESUPPORT[0] PCIE:DRP35[11] PCIE:PM_CAP_PMESUPPORT[1]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[8] PCIE:PM_CAP_ON PCIE:DRP35[9] PCIE:PM_CAP_PME_CLOCK
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[6] PCIE:PM_CAP_NEXTPTR[6] PCIE:DRP35[7] PCIE:PM_CAP_NEXTPTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[4] PCIE:PM_CAP_NEXTPTR[4] PCIE:DRP35[5] PCIE:PM_CAP_NEXTPTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[2] PCIE:PM_CAP_NEXTPTR[2] PCIE:DRP35[3] PCIE:PM_CAP_NEXTPTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP35[0] PCIE:PM_CAP_NEXTPTR[0] PCIE:DRP35[1] PCIE:PM_CAP_NEXTPTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[14] PCIE:DRP34[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[12] PCIE:PM_CAP_ID[6] PCIE:DRP34[13] PCIE:PM_CAP_ID[7]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[10] PCIE:PM_CAP_ID[4] PCIE:DRP34[11] PCIE:PM_CAP_ID[5]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[8] PCIE:PM_CAP_ID[2] PCIE:DRP34[9] PCIE:PM_CAP_ID[3]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[6] PCIE:PM_CAP_ID[0] PCIE:DRP34[7] PCIE:PM_CAP_ID[1]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[4] PCIE:PM_CAP_D2SUPPORT PCIE:DRP34[5] PCIE:PM_CAP_DSI
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[2] PCIE:PM_CAP_AUXCURRENT[2] PCIE:DRP34[3] PCIE:PM_CAP_D1SUPPORT
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP34[0] PCIE:PM_CAP_AUXCURRENT[0] PCIE:DRP34[1] PCIE:PM_CAP_AUXCURRENT[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[14] PCIE:PM_BASE_PTR[6] PCIE:DRP33[15] PCIE:PM_BASE_PTR[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[12] PCIE:PM_BASE_PTR[4] PCIE:DRP33[13] PCIE:PM_BASE_PTR[5]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[10] PCIE:PM_BASE_PTR[2] PCIE:DRP33[11] PCIE:PM_BASE_PTR[3]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[8] PCIE:PM_BASE_PTR[0] PCIE:DRP33[9] PCIE:PM_BASE_PTR[1]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[6] PCIE:PCIE_REVISION[2] PCIE:DRP33[7] PCIE:PCIE_REVISION[3]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[4] PCIE:PCIE_REVISION[0] PCIE:DRP33[5] PCIE:PCIE_REVISION[1]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[2] PCIE:PCIE_CAP_RSVD_15_14[1] PCIE:DRP33[3] PCIE:PCIE_CAP_SLOT_IMPLEMENTED
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP33[0] PCIE:PCIE_CAP_ON PCIE:DRP33[1] PCIE:PCIE_CAP_RSVD_15_14[0]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[14] PCIE:PCIE_CAP_NEXTPTR[6] PCIE:DRP32[15] PCIE:PCIE_CAP_NEXTPTR[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[12] PCIE:PCIE_CAP_NEXTPTR[4] PCIE:DRP32[13] PCIE:PCIE_CAP_NEXTPTR[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[10] PCIE:PCIE_CAP_NEXTPTR[2] PCIE:DRP32[11] PCIE:PCIE_CAP_NEXTPTR[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[8] PCIE:PCIE_CAP_NEXTPTR[0] PCIE:DRP32[9] PCIE:PCIE_CAP_NEXTPTR[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[6] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[2] PCIE:DRP32[7] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[3]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[4] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[0] PCIE:DRP32[5] PCIE:PCIE_CAP_DEVICE_PORT_TYPE[1]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[2] PCIE:PCIE_CAP_CAPABILITY_VERSION[2] PCIE:DRP32[3] PCIE:PCIE_CAP_CAPABILITY_VERSION[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP32[0] PCIE:PCIE_CAP_CAPABILITY_VERSION[0] PCIE:DRP32[1] PCIE:PCIE_CAP_CAPABILITY_VERSION[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[14] PCIE:PCIE_CAP_CAPABILITY_ID[6] PCIE:DRP31[15] PCIE:PCIE_CAP_CAPABILITY_ID[7]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[12] PCIE:PCIE_CAP_CAPABILITY_ID[4] PCIE:DRP31[13] PCIE:PCIE_CAP_CAPABILITY_ID[5]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[10] PCIE:PCIE_CAP_CAPABILITY_ID[2] PCIE:DRP31[11] PCIE:PCIE_CAP_CAPABILITY_ID[3]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[8] PCIE:PCIE_CAP_CAPABILITY_ID[0] PCIE:DRP31[9] PCIE:PCIE_CAP_CAPABILITY_ID[1]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[6] PCIE:PCIE_BASE_PTR[6] PCIE:DRP31[7] PCIE:PCIE_BASE_PTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[4] PCIE:PCIE_BASE_PTR[4] PCIE:DRP31[5] PCIE:PCIE_BASE_PTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[2] PCIE:PCIE_BASE_PTR[2] PCIE:DRP31[3] PCIE:PCIE_BASE_PTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP31[0] PCIE:PCIE_BASE_PTR[0] PCIE:DRP31[1] PCIE:PCIE_BASE_PTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[14] PCIE:DRP30[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[12] PCIE:DRP30[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[10] PCIE:MSIX_CAP_TABLE_SIZE[10] PCIE:DRP30[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[8] PCIE:MSIX_CAP_TABLE_SIZE[8] PCIE:DRP30[9] PCIE:MSIX_CAP_TABLE_SIZE[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[6] PCIE:MSIX_CAP_TABLE_SIZE[6] PCIE:DRP30[7] PCIE:MSIX_CAP_TABLE_SIZE[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[4] PCIE:MSIX_CAP_TABLE_SIZE[4] PCIE:DRP30[5] PCIE:MSIX_CAP_TABLE_SIZE[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[2] PCIE:MSIX_CAP_TABLE_SIZE[2] PCIE:DRP30[3] PCIE:MSIX_CAP_TABLE_SIZE[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP30[0] PCIE:MSIX_CAP_TABLE_SIZE[0] PCIE:DRP30[1] PCIE:MSIX_CAP_TABLE_SIZE[1]
virtex7 PCIE bittile 9
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[14] PCIE:DRP3B[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[12] PCIE:DRP3B[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[10] PCIE:DRP3B[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[8] PCIE:DRP3B[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[6] PCIE:PM_DATA7[6] PCIE:DRP3B[7] PCIE:PM_DATA7[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[4] PCIE:PM_DATA7[4] PCIE:DRP3B[5] PCIE:PM_DATA7[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[2] PCIE:PM_DATA7[2] PCIE:DRP3B[3] PCIE:PM_DATA7[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3B[0] PCIE:PM_DATA7[0] PCIE:DRP3B[1] PCIE:PM_DATA7[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[14] PCIE:PM_DATA6[6] PCIE:DRP3A[15] PCIE:PM_DATA6[7]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[12] PCIE:PM_DATA6[4] PCIE:DRP3A[13] PCIE:PM_DATA6[5]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[10] PCIE:PM_DATA6[2] PCIE:DRP3A[11] PCIE:PM_DATA6[3]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[8] PCIE:PM_DATA6[0] PCIE:DRP3A[9] PCIE:PM_DATA6[1]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[6] PCIE:PM_DATA5[6] PCIE:DRP3A[7] PCIE:PM_DATA5[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[4] PCIE:PM_DATA5[4] PCIE:DRP3A[5] PCIE:PM_DATA5[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[2] PCIE:PM_DATA5[2] PCIE:DRP3A[3] PCIE:PM_DATA5[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3A[0] PCIE:PM_DATA5[0] PCIE:DRP3A[1] PCIE:PM_DATA5[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[14] PCIE:PM_DATA4[6] PCIE:DRP39[15] PCIE:PM_DATA4[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[12] PCIE:PM_DATA4[4] PCIE:DRP39[13] PCIE:PM_DATA4[5]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[10] PCIE:PM_DATA4[2] PCIE:DRP39[11] PCIE:PM_DATA4[3]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[8] PCIE:PM_DATA4[0] PCIE:DRP39[9] PCIE:PM_DATA4[1]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[6] PCIE:PM_DATA3[6] PCIE:DRP39[7] PCIE:PM_DATA3[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[4] PCIE:PM_DATA3[4] PCIE:DRP39[5] PCIE:PM_DATA3[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[2] PCIE:PM_DATA3[2] PCIE:DRP39[3] PCIE:PM_DATA3[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP39[0] PCIE:PM_DATA3[0] PCIE:DRP39[1] PCIE:PM_DATA3[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[14] PCIE:PM_DATA2[6] PCIE:DRP38[15] PCIE:PM_DATA2[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[12] PCIE:PM_DATA2[4] PCIE:DRP38[13] PCIE:PM_DATA2[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[10] PCIE:PM_DATA2[2] PCIE:DRP38[11] PCIE:PM_DATA2[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[8] PCIE:PM_DATA2[0] PCIE:DRP38[9] PCIE:PM_DATA2[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[6] PCIE:PM_DATA1[6] PCIE:DRP38[7] PCIE:PM_DATA1[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[4] PCIE:PM_DATA1[4] PCIE:DRP38[5] PCIE:PM_DATA1[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[2] PCIE:PM_DATA1[2] PCIE:DRP38[3] PCIE:PM_DATA1[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP38[0] PCIE:PM_DATA1[0] PCIE:DRP38[1] PCIE:PM_DATA1[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[14] PCIE:DRP37[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[12] PCIE:PM_DATA0[6] PCIE:DRP37[13] PCIE:PM_DATA0[7]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[10] PCIE:PM_DATA0[4] PCIE:DRP37[11] PCIE:PM_DATA0[5]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[8] PCIE:PM_DATA0[2] PCIE:DRP37[9] PCIE:PM_DATA0[3]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[6] PCIE:PM_DATA0[0] PCIE:DRP37[7] PCIE:PM_DATA0[1]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[4] PCIE:PM_DATA_SCALE7[0] PCIE:DRP37[5] PCIE:PM_DATA_SCALE7[1]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[2] PCIE:PM_DATA_SCALE6[0] PCIE:DRP37[3] PCIE:PM_DATA_SCALE6[1]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP37[0] PCIE:PM_DATA_SCALE5[0] PCIE:DRP37[1] PCIE:PM_DATA_SCALE5[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[14] PCIE:PM_DATA_SCALE4[0] PCIE:DRP36[15] PCIE:PM_DATA_SCALE4[1]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[12] PCIE:PM_DATA_SCALE3[0] PCIE:DRP36[13] PCIE:PM_DATA_SCALE3[1]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[10] PCIE:PM_DATA_SCALE2[0] PCIE:DRP36[11] PCIE:PM_DATA_SCALE2[1]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[8] PCIE:PM_DATA_SCALE1[0] PCIE:DRP36[9] PCIE:PM_DATA_SCALE1[1]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[6] PCIE:PM_DATA_SCALE0[0] PCIE:DRP36[7] PCIE:PM_DATA_SCALE0[1]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[4] PCIE:PM_CSR_BPCCEN PCIE:DRP36[5] PCIE:PM_CSR_NOSOFTRST
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[2] PCIE:PM_CAP_VERSION[2] PCIE:DRP36[3] PCIE:PM_CSR_B2B3
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP36[0] PCIE:PM_CAP_VERSION[0] PCIE:DRP36[1] PCIE:PM_CAP_VERSION[1]
virtex7 PCIE bittile 10
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[14] PCIE:RBAR_CAP_SUP0[30] PCIE:DRP41[15] PCIE:RBAR_CAP_SUP0[31]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[12] PCIE:RBAR_CAP_SUP0[28] PCIE:DRP41[13] PCIE:RBAR_CAP_SUP0[29]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[10] PCIE:RBAR_CAP_SUP0[26] PCIE:DRP41[11] PCIE:RBAR_CAP_SUP0[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[8] PCIE:RBAR_CAP_SUP0[24] PCIE:DRP41[9] PCIE:RBAR_CAP_SUP0[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[6] PCIE:RBAR_CAP_SUP0[22] PCIE:DRP41[7] PCIE:RBAR_CAP_SUP0[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[4] PCIE:RBAR_CAP_SUP0[20] PCIE:DRP41[5] PCIE:RBAR_CAP_SUP0[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[2] PCIE:RBAR_CAP_SUP0[18] PCIE:DRP41[3] PCIE:RBAR_CAP_SUP0[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP41[0] PCIE:RBAR_CAP_SUP0[16] PCIE:DRP41[1] PCIE:RBAR_CAP_SUP0[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[14] PCIE:RBAR_CAP_SUP0[14] PCIE:DRP40[15] PCIE:RBAR_CAP_SUP0[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[12] PCIE:RBAR_CAP_SUP0[12] PCIE:DRP40[13] PCIE:RBAR_CAP_SUP0[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[10] PCIE:RBAR_CAP_SUP0[10] PCIE:DRP40[11] PCIE:RBAR_CAP_SUP0[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[8] PCIE:RBAR_CAP_SUP0[8] PCIE:DRP40[9] PCIE:RBAR_CAP_SUP0[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[6] PCIE:RBAR_CAP_SUP0[6] PCIE:DRP40[7] PCIE:RBAR_CAP_SUP0[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[4] PCIE:RBAR_CAP_SUP0[4] PCIE:DRP40[5] PCIE:RBAR_CAP_SUP0[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[2] PCIE:RBAR_CAP_SUP0[2] PCIE:DRP40[3] PCIE:RBAR_CAP_SUP0[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP40[0] PCIE:RBAR_CAP_SUP0[0] PCIE:DRP40[1] PCIE:RBAR_CAP_SUP0[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[14] PCIE:DRP3F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[12] PCIE:DRP3F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[10] PCIE:DRP3F[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[8] PCIE:DRP3F[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[6] PCIE:RBAR_NUM[2] PCIE:DRP3F[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[4] PCIE:RBAR_NUM[0] PCIE:DRP3F[5] PCIE:RBAR_NUM[1]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[2] PCIE:RBAR_CAP_VERSION[2] PCIE:DRP3F[3] PCIE:RBAR_CAP_VERSION[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3F[0] PCIE:RBAR_CAP_VERSION[0] PCIE:DRP3F[1] PCIE:RBAR_CAP_VERSION[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[14] PCIE:RBAR_CAP_ID[14] PCIE:DRP3E[15] PCIE:RBAR_CAP_ID[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[12] PCIE:RBAR_CAP_ID[12] PCIE:DRP3E[13] PCIE:RBAR_CAP_ID[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[10] PCIE:RBAR_CAP_ID[10] PCIE:DRP3E[11] PCIE:RBAR_CAP_ID[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[8] PCIE:RBAR_CAP_ID[8] PCIE:DRP3E[9] PCIE:RBAR_CAP_ID[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[6] PCIE:RBAR_CAP_ID[6] PCIE:DRP3E[7] PCIE:RBAR_CAP_ID[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[4] PCIE:RBAR_CAP_ID[4] PCIE:DRP3E[5] PCIE:RBAR_CAP_ID[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[2] PCIE:RBAR_CAP_ID[2] PCIE:DRP3E[3] PCIE:RBAR_CAP_ID[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3E[0] PCIE:RBAR_CAP_ID[0] PCIE:DRP3E[1] PCIE:RBAR_CAP_ID[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[14] PCIE:DRP3D[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[12] PCIE:RBAR_CAP_ON PCIE:DRP3D[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[10] PCIE:RBAR_CAP_NEXTPTR[10] PCIE:DRP3D[11] PCIE:RBAR_CAP_NEXTPTR[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[8] PCIE:RBAR_CAP_NEXTPTR[8] PCIE:DRP3D[9] PCIE:RBAR_CAP_NEXTPTR[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[6] PCIE:RBAR_CAP_NEXTPTR[6] PCIE:DRP3D[7] PCIE:RBAR_CAP_NEXTPTR[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[4] PCIE:RBAR_CAP_NEXTPTR[4] PCIE:DRP3D[5] PCIE:RBAR_CAP_NEXTPTR[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[2] PCIE:RBAR_CAP_NEXTPTR[2] PCIE:DRP3D[3] PCIE:RBAR_CAP_NEXTPTR[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3D[0] PCIE:RBAR_CAP_NEXTPTR[0] PCIE:DRP3D[1] PCIE:RBAR_CAP_NEXTPTR[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[14] PCIE:DRP3C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[12] PCIE:DRP3C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[10] PCIE:RBAR_BASE_PTR[10] PCIE:DRP3C[11] PCIE:RBAR_BASE_PTR[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[8] PCIE:RBAR_BASE_PTR[8] PCIE:DRP3C[9] PCIE:RBAR_BASE_PTR[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[6] PCIE:RBAR_BASE_PTR[6] PCIE:DRP3C[7] PCIE:RBAR_BASE_PTR[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[4] PCIE:RBAR_BASE_PTR[4] PCIE:DRP3C[5] PCIE:RBAR_BASE_PTR[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[2] PCIE:RBAR_BASE_PTR[2] PCIE:DRP3C[3] PCIE:RBAR_BASE_PTR[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP3C[0] PCIE:RBAR_BASE_PTR[0] PCIE:DRP3C[1] PCIE:RBAR_BASE_PTR[1]
virtex7 PCIE bittile 11
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[14] PCIE:RBAR_CAP_SUP3[30] PCIE:DRP47[15] PCIE:RBAR_CAP_SUP3[31]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[12] PCIE:RBAR_CAP_SUP3[28] PCIE:DRP47[13] PCIE:RBAR_CAP_SUP3[29]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[10] PCIE:RBAR_CAP_SUP3[26] PCIE:DRP47[11] PCIE:RBAR_CAP_SUP3[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[8] PCIE:RBAR_CAP_SUP3[24] PCIE:DRP47[9] PCIE:RBAR_CAP_SUP3[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[6] PCIE:RBAR_CAP_SUP3[22] PCIE:DRP47[7] PCIE:RBAR_CAP_SUP3[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[4] PCIE:RBAR_CAP_SUP3[20] PCIE:DRP47[5] PCIE:RBAR_CAP_SUP3[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[2] PCIE:RBAR_CAP_SUP3[18] PCIE:DRP47[3] PCIE:RBAR_CAP_SUP3[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP47[0] PCIE:RBAR_CAP_SUP3[16] PCIE:DRP47[1] PCIE:RBAR_CAP_SUP3[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[14] PCIE:RBAR_CAP_SUP3[14] PCIE:DRP46[15] PCIE:RBAR_CAP_SUP3[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[12] PCIE:RBAR_CAP_SUP3[12] PCIE:DRP46[13] PCIE:RBAR_CAP_SUP3[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[10] PCIE:RBAR_CAP_SUP3[10] PCIE:DRP46[11] PCIE:RBAR_CAP_SUP3[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[8] PCIE:RBAR_CAP_SUP3[8] PCIE:DRP46[9] PCIE:RBAR_CAP_SUP3[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[6] PCIE:RBAR_CAP_SUP3[6] PCIE:DRP46[7] PCIE:RBAR_CAP_SUP3[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[4] PCIE:RBAR_CAP_SUP3[4] PCIE:DRP46[5] PCIE:RBAR_CAP_SUP3[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[2] PCIE:RBAR_CAP_SUP3[2] PCIE:DRP46[3] PCIE:RBAR_CAP_SUP3[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP46[0] PCIE:RBAR_CAP_SUP3[0] PCIE:DRP46[1] PCIE:RBAR_CAP_SUP3[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[14] PCIE:RBAR_CAP_SUP2[30] PCIE:DRP45[15] PCIE:RBAR_CAP_SUP2[31]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[12] PCIE:RBAR_CAP_SUP2[28] PCIE:DRP45[13] PCIE:RBAR_CAP_SUP2[29]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[10] PCIE:RBAR_CAP_SUP2[26] PCIE:DRP45[11] PCIE:RBAR_CAP_SUP2[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[8] PCIE:RBAR_CAP_SUP2[24] PCIE:DRP45[9] PCIE:RBAR_CAP_SUP2[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[6] PCIE:RBAR_CAP_SUP2[22] PCIE:DRP45[7] PCIE:RBAR_CAP_SUP2[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[4] PCIE:RBAR_CAP_SUP2[20] PCIE:DRP45[5] PCIE:RBAR_CAP_SUP2[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[2] PCIE:RBAR_CAP_SUP2[18] PCIE:DRP45[3] PCIE:RBAR_CAP_SUP2[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP45[0] PCIE:RBAR_CAP_SUP2[16] PCIE:DRP45[1] PCIE:RBAR_CAP_SUP2[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[14] PCIE:RBAR_CAP_SUP2[14] PCIE:DRP44[15] PCIE:RBAR_CAP_SUP2[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[12] PCIE:RBAR_CAP_SUP2[12] PCIE:DRP44[13] PCIE:RBAR_CAP_SUP2[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[10] PCIE:RBAR_CAP_SUP2[10] PCIE:DRP44[11] PCIE:RBAR_CAP_SUP2[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[8] PCIE:RBAR_CAP_SUP2[8] PCIE:DRP44[9] PCIE:RBAR_CAP_SUP2[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[6] PCIE:RBAR_CAP_SUP2[6] PCIE:DRP44[7] PCIE:RBAR_CAP_SUP2[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[4] PCIE:RBAR_CAP_SUP2[4] PCIE:DRP44[5] PCIE:RBAR_CAP_SUP2[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[2] PCIE:RBAR_CAP_SUP2[2] PCIE:DRP44[3] PCIE:RBAR_CAP_SUP2[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP44[0] PCIE:RBAR_CAP_SUP2[0] PCIE:DRP44[1] PCIE:RBAR_CAP_SUP2[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[14] PCIE:RBAR_CAP_SUP1[30] PCIE:DRP43[15] PCIE:RBAR_CAP_SUP1[31]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[12] PCIE:RBAR_CAP_SUP1[28] PCIE:DRP43[13] PCIE:RBAR_CAP_SUP1[29]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[10] PCIE:RBAR_CAP_SUP1[26] PCIE:DRP43[11] PCIE:RBAR_CAP_SUP1[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[8] PCIE:RBAR_CAP_SUP1[24] PCIE:DRP43[9] PCIE:RBAR_CAP_SUP1[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[6] PCIE:RBAR_CAP_SUP1[22] PCIE:DRP43[7] PCIE:RBAR_CAP_SUP1[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[4] PCIE:RBAR_CAP_SUP1[20] PCIE:DRP43[5] PCIE:RBAR_CAP_SUP1[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[2] PCIE:RBAR_CAP_SUP1[18] PCIE:DRP43[3] PCIE:RBAR_CAP_SUP1[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP43[0] PCIE:RBAR_CAP_SUP1[16] PCIE:DRP43[1] PCIE:RBAR_CAP_SUP1[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[14] PCIE:RBAR_CAP_SUP1[14] PCIE:DRP42[15] PCIE:RBAR_CAP_SUP1[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[12] PCIE:RBAR_CAP_SUP1[12] PCIE:DRP42[13] PCIE:RBAR_CAP_SUP1[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[10] PCIE:RBAR_CAP_SUP1[10] PCIE:DRP42[11] PCIE:RBAR_CAP_SUP1[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[8] PCIE:RBAR_CAP_SUP1[8] PCIE:DRP42[9] PCIE:RBAR_CAP_SUP1[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[6] PCIE:RBAR_CAP_SUP1[6] PCIE:DRP42[7] PCIE:RBAR_CAP_SUP1[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[4] PCIE:RBAR_CAP_SUP1[4] PCIE:DRP42[5] PCIE:RBAR_CAP_SUP1[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[2] PCIE:RBAR_CAP_SUP1[2] PCIE:DRP42[3] PCIE:RBAR_CAP_SUP1[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP42[0] PCIE:RBAR_CAP_SUP1[0] PCIE:DRP42[1] PCIE:RBAR_CAP_SUP1[1]
virtex7 PCIE bittile 12
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[14] PCIE:DRP4D[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[12] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1[4] PCIE:DRP4D[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[10] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1[2] PCIE:DRP4D[11] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1[3]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[8] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1[0] PCIE:DRP4D[9] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1[1]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[6] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0[3] PCIE:DRP4D[7] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0[4]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[4] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0[1] PCIE:DRP4D[5] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0[2]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[2] PCIE:RBAR_CAP_INDEX5[2] PCIE:DRP4D[3] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0[0]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4D[0] PCIE:RBAR_CAP_INDEX5[0] PCIE:DRP4D[1] PCIE:RBAR_CAP_INDEX5[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[14] PCIE:RBAR_CAP_INDEX4[2] PCIE:DRP4C[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[12] PCIE:RBAR_CAP_INDEX4[0] PCIE:DRP4C[13] PCIE:RBAR_CAP_INDEX4[1]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[10] PCIE:RBAR_CAP_INDEX3[1] PCIE:DRP4C[11] PCIE:RBAR_CAP_INDEX3[2]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[8] PCIE:RBAR_CAP_INDEX2[2] PCIE:DRP4C[9] PCIE:RBAR_CAP_INDEX3[0]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[6] PCIE:RBAR_CAP_INDEX2[0] PCIE:DRP4C[7] PCIE:RBAR_CAP_INDEX2[1]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[4] PCIE:RBAR_CAP_INDEX1[1] PCIE:DRP4C[5] PCIE:RBAR_CAP_INDEX1[2]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[2] PCIE:RBAR_CAP_INDEX0[2] PCIE:DRP4C[3] PCIE:RBAR_CAP_INDEX1[0]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4C[0] PCIE:RBAR_CAP_INDEX0[0] PCIE:DRP4C[1] PCIE:RBAR_CAP_INDEX0[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[14] PCIE:RBAR_CAP_SUP5[30] PCIE:DRP4B[15] PCIE:RBAR_CAP_SUP5[31]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[12] PCIE:RBAR_CAP_SUP5[28] PCIE:DRP4B[13] PCIE:RBAR_CAP_SUP5[29]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[10] PCIE:RBAR_CAP_SUP5[26] PCIE:DRP4B[11] PCIE:RBAR_CAP_SUP5[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[8] PCIE:RBAR_CAP_SUP5[24] PCIE:DRP4B[9] PCIE:RBAR_CAP_SUP5[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[6] PCIE:RBAR_CAP_SUP5[22] PCIE:DRP4B[7] PCIE:RBAR_CAP_SUP5[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[4] PCIE:RBAR_CAP_SUP5[20] PCIE:DRP4B[5] PCIE:RBAR_CAP_SUP5[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[2] PCIE:RBAR_CAP_SUP5[18] PCIE:DRP4B[3] PCIE:RBAR_CAP_SUP5[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4B[0] PCIE:RBAR_CAP_SUP5[16] PCIE:DRP4B[1] PCIE:RBAR_CAP_SUP5[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[14] PCIE:RBAR_CAP_SUP5[14] PCIE:DRP4A[15] PCIE:RBAR_CAP_SUP5[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[12] PCIE:RBAR_CAP_SUP5[12] PCIE:DRP4A[13] PCIE:RBAR_CAP_SUP5[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[10] PCIE:RBAR_CAP_SUP5[10] PCIE:DRP4A[11] PCIE:RBAR_CAP_SUP5[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[8] PCIE:RBAR_CAP_SUP5[8] PCIE:DRP4A[9] PCIE:RBAR_CAP_SUP5[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[6] PCIE:RBAR_CAP_SUP5[6] PCIE:DRP4A[7] PCIE:RBAR_CAP_SUP5[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[4] PCIE:RBAR_CAP_SUP5[4] PCIE:DRP4A[5] PCIE:RBAR_CAP_SUP5[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[2] PCIE:RBAR_CAP_SUP5[2] PCIE:DRP4A[3] PCIE:RBAR_CAP_SUP5[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4A[0] PCIE:RBAR_CAP_SUP5[0] PCIE:DRP4A[1] PCIE:RBAR_CAP_SUP5[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[14] PCIE:RBAR_CAP_SUP4[30] PCIE:DRP49[15] PCIE:RBAR_CAP_SUP4[31]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[12] PCIE:RBAR_CAP_SUP4[28] PCIE:DRP49[13] PCIE:RBAR_CAP_SUP4[29]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[10] PCIE:RBAR_CAP_SUP4[26] PCIE:DRP49[11] PCIE:RBAR_CAP_SUP4[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[8] PCIE:RBAR_CAP_SUP4[24] PCIE:DRP49[9] PCIE:RBAR_CAP_SUP4[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[6] PCIE:RBAR_CAP_SUP4[22] PCIE:DRP49[7] PCIE:RBAR_CAP_SUP4[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[4] PCIE:RBAR_CAP_SUP4[20] PCIE:DRP49[5] PCIE:RBAR_CAP_SUP4[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[2] PCIE:RBAR_CAP_SUP4[18] PCIE:DRP49[3] PCIE:RBAR_CAP_SUP4[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP49[0] PCIE:RBAR_CAP_SUP4[16] PCIE:DRP49[1] PCIE:RBAR_CAP_SUP4[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[14] PCIE:RBAR_CAP_SUP4[14] PCIE:DRP48[15] PCIE:RBAR_CAP_SUP4[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[12] PCIE:RBAR_CAP_SUP4[12] PCIE:DRP48[13] PCIE:RBAR_CAP_SUP4[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[10] PCIE:RBAR_CAP_SUP4[10] PCIE:DRP48[11] PCIE:RBAR_CAP_SUP4[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[8] PCIE:RBAR_CAP_SUP4[8] PCIE:DRP48[9] PCIE:RBAR_CAP_SUP4[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[6] PCIE:RBAR_CAP_SUP4[6] PCIE:DRP48[7] PCIE:RBAR_CAP_SUP4[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[4] PCIE:RBAR_CAP_SUP4[4] PCIE:DRP48[5] PCIE:RBAR_CAP_SUP4[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[2] PCIE:RBAR_CAP_SUP4[2] PCIE:DRP48[3] PCIE:RBAR_CAP_SUP4[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP48[0] PCIE:RBAR_CAP_SUP4[0] PCIE:DRP48[1] PCIE:RBAR_CAP_SUP4[1]
virtex7 PCIE bittile 13
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[14] PCIE:DRP53[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[12] PCIE:VC_CAP_ON PCIE:DRP53[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[10] PCIE:VC_CAP_NEXTPTR[10] PCIE:DRP53[11] PCIE:VC_CAP_NEXTPTR[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[8] PCIE:VC_CAP_NEXTPTR[8] PCIE:DRP53[9] PCIE:VC_CAP_NEXTPTR[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[6] PCIE:VC_CAP_NEXTPTR[6] PCIE:DRP53[7] PCIE:VC_CAP_NEXTPTR[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[4] PCIE:VC_CAP_NEXTPTR[4] PCIE:DRP53[5] PCIE:VC_CAP_NEXTPTR[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[2] PCIE:VC_CAP_NEXTPTR[2] PCIE:DRP53[3] PCIE:VC_CAP_NEXTPTR[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP53[0] PCIE:VC_CAP_NEXTPTR[0] PCIE:DRP53[1] PCIE:VC_CAP_NEXTPTR[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[14] PCIE:DRP52[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[12] PCIE:DRP52[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[10] PCIE:VC_BASE_PTR[10] PCIE:DRP52[11] PCIE:VC_BASE_PTR[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[8] PCIE:VC_BASE_PTR[8] PCIE:DRP52[9] PCIE:VC_BASE_PTR[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[6] PCIE:VC_BASE_PTR[6] PCIE:DRP52[7] PCIE:VC_BASE_PTR[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[4] PCIE:VC_BASE_PTR[4] PCIE:DRP52[5] PCIE:VC_BASE_PTR[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[2] PCIE:VC_BASE_PTR[2] PCIE:DRP52[3] PCIE:VC_BASE_PTR[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP52[0] PCIE:VC_BASE_PTR[0] PCIE:DRP52[1] PCIE:VC_BASE_PTR[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[14] PCIE:DRP51[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[12] PCIE:DRP51[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[10] PCIE:SSL_MESSAGE_AUTO PCIE:DRP51[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[8] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[6] PCIE:DRP51[9] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[7]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[6] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[4] PCIE:DRP51[7] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[5]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[4] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[2] PCIE:DRP51[5] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[3]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[2] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[0] PCIE:DRP51[3] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE[1]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP51[0] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE[0] PCIE:DRP51[1] PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[14] PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT PCIE:DRP50[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[12] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[12] PCIE:DRP50[13] PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[10] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[10] PCIE:DRP50[11] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[8] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[8] PCIE:DRP50[9] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[6] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[6] PCIE:DRP50[7] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[4] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[4] PCIE:DRP50[5] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[2] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[2] PCIE:DRP50[3] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP50[0] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[0] PCIE:DRP50[1] PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[14] PCIE:DRP4F[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[12] PCIE:SLOT_CAP_MRL_SENSOR_PRESENT PCIE:DRP4F[13] PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[10] PCIE:SLOT_CAP_HOTPLUG_CAPABLE PCIE:DRP4F[11] PCIE:SLOT_CAP_HOTPLUG_SURPRISE
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[8] PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT PCIE:DRP4F[9] PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[6] PCIE:SELECT_DLL_IF PCIE:DRP4F[7] PCIE:SLOT_CAP_ATT_BUTTON_PRESENT
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[4] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5[4] PCIE:DRP4F[5] PCIE:ROOT_CAP_CRS_SW_VISIBILITY
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[2] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5[2] PCIE:DRP4F[3] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4F[0] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5[0] PCIE:DRP4F[1] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[14] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4[4] PCIE:DRP4E[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[12] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4[2] PCIE:DRP4E[13] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4[3]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[10] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4[0] PCIE:DRP4E[11] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4[1]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[8] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3[3] PCIE:DRP4E[9] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3[4]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[6] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3[1] PCIE:DRP4E[7] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3[2]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[4] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2[4] PCIE:DRP4E[5] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3[0]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[2] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2[2] PCIE:DRP4E[3] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP4E[0] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2[0] PCIE:DRP4E[1] PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2[1]
virtex7 PCIE bittile 14
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[14] PCIE:DRP59[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[12] PCIE:VSEC_CAP_NEXTPTR[11] PCIE:DRP59[13] PCIE:VSEC_CAP_ON
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[10] PCIE:VSEC_CAP_NEXTPTR[9] PCIE:DRP59[11] PCIE:VSEC_CAP_NEXTPTR[10]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[8] PCIE:VSEC_CAP_NEXTPTR[7] PCIE:DRP59[9] PCIE:VSEC_CAP_NEXTPTR[8]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[6] PCIE:VSEC_CAP_NEXTPTR[5] PCIE:DRP59[7] PCIE:VSEC_CAP_NEXTPTR[6]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[4] PCIE:VSEC_CAP_NEXTPTR[3] PCIE:DRP59[5] PCIE:VSEC_CAP_NEXTPTR[4]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[2] PCIE:VSEC_CAP_NEXTPTR[1] PCIE:DRP59[3] PCIE:VSEC_CAP_NEXTPTR[2]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP59[0] PCIE:VSEC_CAP_IS_LINK_VISIBLE PCIE:DRP59[1] PCIE:VSEC_CAP_NEXTPTR[0]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[14] PCIE:VSEC_CAP_ID[14] PCIE:DRP58[15] PCIE:VSEC_CAP_ID[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[12] PCIE:VSEC_CAP_ID[12] PCIE:DRP58[13] PCIE:VSEC_CAP_ID[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[10] PCIE:VSEC_CAP_ID[10] PCIE:DRP58[11] PCIE:VSEC_CAP_ID[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[8] PCIE:VSEC_CAP_ID[8] PCIE:DRP58[9] PCIE:VSEC_CAP_ID[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[6] PCIE:VSEC_CAP_ID[6] PCIE:DRP58[7] PCIE:VSEC_CAP_ID[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[4] PCIE:VSEC_CAP_ID[4] PCIE:DRP58[5] PCIE:VSEC_CAP_ID[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[2] PCIE:VSEC_CAP_ID[2] PCIE:DRP58[3] PCIE:VSEC_CAP_ID[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP58[0] PCIE:VSEC_CAP_ID[0] PCIE:DRP58[1] PCIE:VSEC_CAP_ID[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[14] PCIE:VSEC_CAP_HDR_REVISION[2] PCIE:DRP57[15] PCIE:VSEC_CAP_HDR_REVISION[3]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[12] PCIE:VSEC_CAP_HDR_REVISION[0] PCIE:DRP57[13] PCIE:VSEC_CAP_HDR_REVISION[1]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[10] PCIE:VSEC_CAP_HDR_LENGTH[10] PCIE:DRP57[11] PCIE:VSEC_CAP_HDR_LENGTH[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[8] PCIE:VSEC_CAP_HDR_LENGTH[8] PCIE:DRP57[9] PCIE:VSEC_CAP_HDR_LENGTH[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[6] PCIE:VSEC_CAP_HDR_LENGTH[6] PCIE:DRP57[7] PCIE:VSEC_CAP_HDR_LENGTH[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[4] PCIE:VSEC_CAP_HDR_LENGTH[4] PCIE:DRP57[5] PCIE:VSEC_CAP_HDR_LENGTH[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[2] PCIE:VSEC_CAP_HDR_LENGTH[2] PCIE:DRP57[3] PCIE:VSEC_CAP_HDR_LENGTH[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP57[0] PCIE:VSEC_CAP_HDR_LENGTH[0] PCIE:DRP57[1] PCIE:VSEC_CAP_HDR_LENGTH[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[14] PCIE:VSEC_CAP_HDR_ID[14] PCIE:DRP56[15] PCIE:VSEC_CAP_HDR_ID[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[12] PCIE:VSEC_CAP_HDR_ID[12] PCIE:DRP56[13] PCIE:VSEC_CAP_HDR_ID[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[10] PCIE:VSEC_CAP_HDR_ID[10] PCIE:DRP56[11] PCIE:VSEC_CAP_HDR_ID[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[8] PCIE:VSEC_CAP_HDR_ID[8] PCIE:DRP56[9] PCIE:VSEC_CAP_HDR_ID[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[6] PCIE:VSEC_CAP_HDR_ID[6] PCIE:DRP56[7] PCIE:VSEC_CAP_HDR_ID[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[4] PCIE:VSEC_CAP_HDR_ID[4] PCIE:DRP56[5] PCIE:VSEC_CAP_HDR_ID[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[2] PCIE:VSEC_CAP_HDR_ID[2] PCIE:DRP56[3] PCIE:VSEC_CAP_HDR_ID[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP56[0] PCIE:VSEC_CAP_HDR_ID[0] PCIE:DRP56[1] PCIE:VSEC_CAP_HDR_ID[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[14] PCIE:DRP55[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[12] PCIE:VSEC_BASE_PTR[11] PCIE:DRP55[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[10] PCIE:VSEC_BASE_PTR[9] PCIE:DRP55[11] PCIE:VSEC_BASE_PTR[10]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[8] PCIE:VSEC_BASE_PTR[7] PCIE:DRP55[9] PCIE:VSEC_BASE_PTR[8]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[6] PCIE:VSEC_BASE_PTR[5] PCIE:DRP55[7] PCIE:VSEC_BASE_PTR[6]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[4] PCIE:VSEC_BASE_PTR[3] PCIE:DRP55[5] PCIE:VSEC_BASE_PTR[4]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[2] PCIE:VSEC_BASE_PTR[1] PCIE:DRP55[3] PCIE:VSEC_BASE_PTR[2]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP55[0] PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS PCIE:DRP55[1] PCIE:VSEC_BASE_PTR[0]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[14] PCIE:VC_CAP_ID[14] PCIE:DRP54[15] PCIE:VC_CAP_ID[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[12] PCIE:VC_CAP_ID[12] PCIE:DRP54[13] PCIE:VC_CAP_ID[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[10] PCIE:VC_CAP_ID[10] PCIE:DRP54[11] PCIE:VC_CAP_ID[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[8] PCIE:VC_CAP_ID[8] PCIE:DRP54[9] PCIE:VC_CAP_ID[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[6] PCIE:VC_CAP_ID[6] PCIE:DRP54[7] PCIE:VC_CAP_ID[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[4] PCIE:VC_CAP_ID[4] PCIE:DRP54[5] PCIE:VC_CAP_ID[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[2] PCIE:VC_CAP_ID[2] PCIE:DRP54[3] PCIE:VC_CAP_ID[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP54[0] PCIE:VC_CAP_ID[0] PCIE:DRP54[1] PCIE:VC_CAP_ID[1]
virtex7 PCIE bittile 15
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[14] PCIE:PM_ASPML0S_TIMEOUT[14] PCIE:DRP5F[15] PCIE:PM_ASPML0S_TIMEOUT_EN
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[12] PCIE:PM_ASPML0S_TIMEOUT[12] PCIE:DRP5F[13] PCIE:PM_ASPML0S_TIMEOUT[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[10] PCIE:PM_ASPML0S_TIMEOUT[10] PCIE:DRP5F[11] PCIE:PM_ASPML0S_TIMEOUT[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[8] PCIE:PM_ASPML0S_TIMEOUT[8] PCIE:DRP5F[9] PCIE:PM_ASPML0S_TIMEOUT[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[6] PCIE:PM_ASPML0S_TIMEOUT[6] PCIE:DRP5F[7] PCIE:PM_ASPML0S_TIMEOUT[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[4] PCIE:PM_ASPML0S_TIMEOUT[4] PCIE:DRP5F[5] PCIE:PM_ASPML0S_TIMEOUT[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[2] PCIE:PM_ASPML0S_TIMEOUT[2] PCIE:DRP5F[3] PCIE:PM_ASPML0S_TIMEOUT[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5F[0] PCIE:PM_ASPML0S_TIMEOUT[0] PCIE:DRP5F[1] PCIE:PM_ASPML0S_TIMEOUT[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[14] PCIE:DRP5E[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[12] PCIE:DRP5E[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[10] PCIE:DRP5E[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[8] PCIE:DRP5E[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[6] PCIE:DRP5E[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[4] PCIE:DRP5E[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[2] PCIE:DRP5E[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5E[0] PCIE:LL_REPLAY_TIMEOUT_FUNC[0] PCIE:DRP5E[1] PCIE:LL_REPLAY_TIMEOUT_FUNC[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[14] PCIE:LL_REPLAY_TIMEOUT[14] PCIE:DRP5D[15] PCIE:LL_REPLAY_TIMEOUT_EN
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[12] PCIE:LL_REPLAY_TIMEOUT[12] PCIE:DRP5D[13] PCIE:LL_REPLAY_TIMEOUT[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[10] PCIE:LL_REPLAY_TIMEOUT[10] PCIE:DRP5D[11] PCIE:LL_REPLAY_TIMEOUT[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[8] PCIE:LL_REPLAY_TIMEOUT[8] PCIE:DRP5D[9] PCIE:LL_REPLAY_TIMEOUT[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[6] PCIE:LL_REPLAY_TIMEOUT[6] PCIE:DRP5D[7] PCIE:LL_REPLAY_TIMEOUT[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[4] PCIE:LL_REPLAY_TIMEOUT[4] PCIE:DRP5D[5] PCIE:LL_REPLAY_TIMEOUT[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[2] PCIE:LL_REPLAY_TIMEOUT[2] PCIE:DRP5D[3] PCIE:LL_REPLAY_TIMEOUT[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5D[0] PCIE:LL_REPLAY_TIMEOUT[0] PCIE:DRP5D[1] PCIE:LL_REPLAY_TIMEOUT[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[14] PCIE:DRP5C[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[12] PCIE:DRP5C[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[10] PCIE:DRP5C[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[8] PCIE:DRP5C[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[6] PCIE:DRP5C[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[4] PCIE:DRP5C[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[2] PCIE:DRP5C[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5C[0] PCIE:LL_ACK_TIMEOUT_FUNC[0] PCIE:DRP5C[1] PCIE:LL_ACK_TIMEOUT_FUNC[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[14] PCIE:LL_ACK_TIMEOUT[14] PCIE:DRP5B[15] PCIE:LL_ACK_TIMEOUT_EN
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[12] PCIE:LL_ACK_TIMEOUT[12] PCIE:DRP5B[13] PCIE:LL_ACK_TIMEOUT[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[10] PCIE:LL_ACK_TIMEOUT[10] PCIE:DRP5B[11] PCIE:LL_ACK_TIMEOUT[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[8] PCIE:LL_ACK_TIMEOUT[8] PCIE:DRP5B[9] PCIE:LL_ACK_TIMEOUT[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[6] PCIE:LL_ACK_TIMEOUT[6] PCIE:DRP5B[7] PCIE:LL_ACK_TIMEOUT[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[4] PCIE:LL_ACK_TIMEOUT[4] PCIE:DRP5B[5] PCIE:LL_ACK_TIMEOUT[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[2] PCIE:LL_ACK_TIMEOUT[2] PCIE:DRP5B[3] PCIE:LL_ACK_TIMEOUT[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5B[0] PCIE:LL_ACK_TIMEOUT[0] PCIE:DRP5B[1] PCIE:LL_ACK_TIMEOUT[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[14] PCIE:DRP5A[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[5] PCIE:DRP5A[12] PCIE:CRM_MODULE_RSTS[6] PCIE:DRP5A[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[3] PCIE:DRP5A[10] PCIE:CRM_MODULE_RSTS[4] PCIE:DRP5A[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CRM_MODULE_RSTS[1] PCIE:DRP5A[8] PCIE:CRM_MODULE_RSTS[2] PCIE:DRP5A[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[6] PCIE:USER_CLK_FREQ[2] PCIE:CRM_MODULE_RSTS[0] PCIE:DRP5A[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[4] PCIE:USER_CLK_FREQ[0] PCIE:DRP5A[5] PCIE:USER_CLK_FREQ[1]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[2] PCIE:VSEC_CAP_VERSION[2] PCIE:DRP5A[3] PCIE:VSEC_CAP_VERSION[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP5A[0] PCIE:VSEC_CAP_VERSION[0] PCIE:DRP5A[1] PCIE:VSEC_CAP_VERSION[1]
virtex7 PCIE bittile 16
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[14] PCIE:ENABLE_MSG_ROUTE[9] PCIE:DRP65[15] PCIE:ENABLE_MSG_ROUTE[10]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[12] PCIE:ENABLE_MSG_ROUTE[7] PCIE:DRP65[13] PCIE:ENABLE_MSG_ROUTE[8]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[10] PCIE:ENABLE_MSG_ROUTE[5] PCIE:DRP65[11] PCIE:ENABLE_MSG_ROUTE[6]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[8] PCIE:ENABLE_MSG_ROUTE[3] PCIE:DRP65[9] PCIE:ENABLE_MSG_ROUTE[4]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP65[6] PCIE:ENABLE_MSG_ROUTE[1] PCIE:DRP65[7] PCIE:ENABLE_MSG_ROUTE[2]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_RX_POISONED_RESP PCIE:DRP65[4] PCIE:DRP65[5] PCIE:ENABLE_MSG_ROUTE[0]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_ID_CHECK PCIE:DRP65[2] PCIE:DISABLE_RX_TC_FILTER PCIE:DRP65[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_ASPM_L1_TIMER PCIE:DRP65[0] PCIE:DISABLE_BAR_FILTERING PCIE:DRP65[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[6] PCIE:DRP64[14] PCIE:DNSTREAM_LINK_NUM[7] PCIE:DRP64[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[4] PCIE:DRP64[12] PCIE:DNSTREAM_LINK_NUM[5] PCIE:DRP64[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[2] PCIE:DRP64[10] PCIE:DNSTREAM_LINK_NUM[3] PCIE:DRP64[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DNSTREAM_LINK_NUM[0] PCIE:DRP64[8] PCIE:DNSTREAM_LINK_NUM[1] PCIE:DRP64[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[6] PCIE:UPSTREAM_FACING PCIE:DRP64[7] PCIE:EXIT_LOOPBACK_ON_EI
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[4] PCIE:PL_FAST_TRAIN PCIE:DRP64[5] PCIE:UPCONFIG_CAPABLE
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP64[2] PCIE:PL_AUTO_CONFIG[1] PCIE:DRP64[3] PCIE:PL_AUTO_CONFIG[2]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:ALLOW_X8_GEN2 PCIE:DRP64[0] PCIE:DRP64[1] PCIE:PL_AUTO_CONFIG[0]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[14] PCIE:N_FTS_GEN2[6] PCIE:DRP63[15] PCIE:N_FTS_GEN2[7]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[12] PCIE:N_FTS_GEN2[4] PCIE:DRP63[13] PCIE:N_FTS_GEN2[5]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[10] PCIE:N_FTS_GEN2[2] PCIE:DRP63[11] PCIE:N_FTS_GEN2[3]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[8] PCIE:N_FTS_GEN2[0] PCIE:DRP63[9] PCIE:N_FTS_GEN2[1]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[6] PCIE:N_FTS_GEN1[6] PCIE:DRP63[7] PCIE:N_FTS_GEN1[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[4] PCIE:N_FTS_GEN1[4] PCIE:DRP63[5] PCIE:N_FTS_GEN1[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[2] PCIE:N_FTS_GEN1[2] PCIE:DRP63[3] PCIE:N_FTS_GEN1[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP63[0] PCIE:N_FTS_GEN1[0] PCIE:DRP63[1] PCIE:N_FTS_GEN1[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[14] PCIE:N_FTS_COMCLK_GEN2[6] PCIE:DRP62[15] PCIE:N_FTS_COMCLK_GEN2[7]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[12] PCIE:N_FTS_COMCLK_GEN2[4] PCIE:DRP62[13] PCIE:N_FTS_COMCLK_GEN2[5]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[10] PCIE:N_FTS_COMCLK_GEN2[2] PCIE:DRP62[11] PCIE:N_FTS_COMCLK_GEN2[3]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[8] PCIE:N_FTS_COMCLK_GEN2[0] PCIE:DRP62[9] PCIE:N_FTS_COMCLK_GEN2[1]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[6] PCIE:N_FTS_COMCLK_GEN1[6] PCIE:DRP62[7] PCIE:N_FTS_COMCLK_GEN1[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[4] PCIE:N_FTS_COMCLK_GEN1[4] PCIE:DRP62[5] PCIE:N_FTS_COMCLK_GEN1[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[2] PCIE:N_FTS_COMCLK_GEN1[2] PCIE:DRP62[3] PCIE:N_FTS_COMCLK_GEN1[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP62[0] PCIE:N_FTS_COMCLK_GEN1[0] PCIE:DRP62[1] PCIE:N_FTS_COMCLK_GEN1[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[14] PCIE:DRP61[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[12] PCIE:DRP61[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[10] PCIE:LTSSM_MAX_LINK_WIDTH[4] PCIE:DRP61[11] PCIE:LTSSM_MAX_LINK_WIDTH[5]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[8] PCIE:LTSSM_MAX_LINK_WIDTH[2] PCIE:DRP61[9] PCIE:LTSSM_MAX_LINK_WIDTH[3]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[6] PCIE:LTSSM_MAX_LINK_WIDTH[0] PCIE:DRP61[7] PCIE:LTSSM_MAX_LINK_WIDTH[1]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[4] PCIE:LINK_CAP_MAX_LINK_WIDTH[4] PCIE:DRP61[5] PCIE:LINK_CAP_MAX_LINK_WIDTH[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[2] PCIE:LINK_CAP_MAX_LINK_WIDTH[2] PCIE:DRP61[3] PCIE:LINK_CAP_MAX_LINK_WIDTH[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP61[0] PCIE:LINK_CAP_MAX_LINK_WIDTH[0] PCIE:DRP61[1] PCIE:LINK_CAP_MAX_LINK_WIDTH[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[14] PCIE:DRP60[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[12] PCIE:DRP60[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[10] PCIE:INFER_EI[4] PCIE:DRP60[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[8] PCIE:INFER_EI[2] PCIE:DRP60[9] PCIE:INFER_EI[3]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[6] PCIE:INFER_EI[0] PCIE:DRP60[7] PCIE:INFER_EI[1]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_SCRAMBLING PCIE:DRP60[4] PCIE:DRP60[5] PCIE:ENTER_RVRY_EI_L0
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[2] PCIE:PM_ASPM_FASTEXIT PCIE:DISABLE_LANE_REVERSAL PCIE:DRP60[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP60[0] PCIE:PM_ASPML0S_TIMEOUT_FUNC[0] PCIE:DRP60[1] PCIE:PM_ASPML0S_TIMEOUT_FUNC[1]
virtex7 PCIE bittile 17
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[14] PCIE:DRP6B[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[12] PCIE:DRP6B[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[10] PCIE:VC0_TOTAL_CREDITS_NPD[10] PCIE:DRP6B[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[8] PCIE:VC0_TOTAL_CREDITS_NPD[8] PCIE:DRP6B[9] PCIE:VC0_TOTAL_CREDITS_NPD[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[6] PCIE:VC0_TOTAL_CREDITS_NPD[6] PCIE:DRP6B[7] PCIE:VC0_TOTAL_CREDITS_NPD[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[4] PCIE:VC0_TOTAL_CREDITS_NPD[4] PCIE:DRP6B[5] PCIE:VC0_TOTAL_CREDITS_NPD[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[2] PCIE:VC0_TOTAL_CREDITS_NPD[2] PCIE:DRP6B[3] PCIE:VC0_TOTAL_CREDITS_NPD[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6B[0] PCIE:VC0_TOTAL_CREDITS_NPD[0] PCIE:DRP6B[1] PCIE:VC0_TOTAL_CREDITS_NPD[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[14] PCIE:DRP6A[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[12] PCIE:VC0_TOTAL_CREDITS_NPH[5] PCIE:DRP6A[13] PCIE:VC0_TOTAL_CREDITS_NPH[6]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[10] PCIE:VC0_TOTAL_CREDITS_NPH[3] PCIE:DRP6A[11] PCIE:VC0_TOTAL_CREDITS_NPH[4]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[8] PCIE:VC0_TOTAL_CREDITS_NPH[1] PCIE:DRP6A[9] PCIE:VC0_TOTAL_CREDITS_NPH[2]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[6] PCIE:VC0_TOTAL_CREDITS_CH[6] PCIE:DRP6A[7] PCIE:VC0_TOTAL_CREDITS_NPH[0]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[4] PCIE:VC0_TOTAL_CREDITS_CH[4] PCIE:DRP6A[5] PCIE:VC0_TOTAL_CREDITS_CH[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[2] PCIE:VC0_TOTAL_CREDITS_CH[2] PCIE:DRP6A[3] PCIE:VC0_TOTAL_CREDITS_CH[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6A[0] PCIE:VC0_TOTAL_CREDITS_CH[0] PCIE:DRP6A[1] PCIE:VC0_TOTAL_CREDITS_CH[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[14] PCIE:DRP69[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[12] PCIE:DRP69[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[10] PCIE:VC0_TOTAL_CREDITS_CD[10] PCIE:DRP69[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[8] PCIE:VC0_TOTAL_CREDITS_CD[8] PCIE:DRP69[9] PCIE:VC0_TOTAL_CREDITS_CD[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[6] PCIE:VC0_TOTAL_CREDITS_CD[6] PCIE:DRP69[7] PCIE:VC0_TOTAL_CREDITS_CD[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[4] PCIE:VC0_TOTAL_CREDITS_CD[4] PCIE:DRP69[5] PCIE:VC0_TOTAL_CREDITS_CD[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[2] PCIE:VC0_TOTAL_CREDITS_CD[2] PCIE:DRP69[3] PCIE:VC0_TOTAL_CREDITS_CD[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP69[0] PCIE:VC0_TOTAL_CREDITS_CD[0] PCIE:DRP69[1] PCIE:VC0_TOTAL_CREDITS_CD[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[14] PCIE:DRP68[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[12] PCIE:VC0_RX_RAM_LIMIT[12] PCIE:DRP68[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[10] PCIE:VC0_RX_RAM_LIMIT[10] PCIE:DRP68[11] PCIE:VC0_RX_RAM_LIMIT[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[8] PCIE:VC0_RX_RAM_LIMIT[8] PCIE:DRP68[9] PCIE:VC0_RX_RAM_LIMIT[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[6] PCIE:VC0_RX_RAM_LIMIT[6] PCIE:DRP68[7] PCIE:VC0_RX_RAM_LIMIT[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[4] PCIE:VC0_RX_RAM_LIMIT[4] PCIE:DRP68[5] PCIE:VC0_RX_RAM_LIMIT[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[2] PCIE:VC0_RX_RAM_LIMIT[2] PCIE:DRP68[3] PCIE:VC0_RX_RAM_LIMIT[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP68[0] PCIE:VC0_RX_RAM_LIMIT[0] PCIE:DRP68[1] PCIE:VC0_RX_RAM_LIMIT[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[14] PCIE:DRP67[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[12] PCIE:DRP67[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[10] PCIE:DRP67[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[8] PCIE:DRP67[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[6] PCIE:DRP67[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[4] PCIE:VC_CAP_VERSION[3] PCIE:DRP67[5] PCIE:VC0_CPL_INFINITE
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[2] PCIE:VC_CAP_VERSION[1] PCIE:DRP67[3] PCIE:VC_CAP_VERSION[2]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP67[0] PCIE:TL_TX_RAM_WRITE_LATENCY PCIE:DRP67[1] PCIE:VC_CAP_VERSION[0]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[14] PCIE:TL_TX_RAM_RDATA_LATENCY[0] PCIE:DRP66[15] PCIE:TL_TX_RAM_RDATA_LATENCY[1]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[12] PCIE:PM_MF PCIE:DRP66[13] PCIE:TL_TX_RAM_RADDR_LATENCY
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[10] PCIE:USE_RID_PINS PCIE:DISABLE_ERR_MSG PCIE:DRP66[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DISABLE_PPM_FILTER PCIE:DRP66[8] PCIE:DISABLE_LOCKED_FILTER PCIE:DRP66[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[6] PCIE:TL_TX_CHECKS_DISABLE PCIE:DRP66[7] PCIE:TL_RBYPASS
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[4] PCIE:TL_RX_RAM_WRITE_LATENCY PCIE:DRP66[5] PCIE:TL_TFC_DISABLE
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[2] PCIE:TL_RX_RAM_RDATA_LATENCY[0] PCIE:DRP66[3] PCIE:TL_RX_RAM_RDATA_LATENCY[1]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP66[0] PCIE:ENABLE_RX_TD_ECRC_TRIM PCIE:DRP66[1] PCIE:TL_RX_RAM_RADDR_LATENCY
virtex7 PCIE bittile 18
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[14] PCIE:SPARE_BYTE3[6] PCIE:DRP71[15] PCIE:SPARE_BYTE3[7]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[12] PCIE:SPARE_BYTE3[4] PCIE:DRP71[13] PCIE:SPARE_BYTE3[5]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[10] PCIE:SPARE_BYTE3[2] PCIE:DRP71[11] PCIE:SPARE_BYTE3[3]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[8] PCIE:SPARE_BYTE3[0] PCIE:DRP71[9] PCIE:SPARE_BYTE3[1]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[6] PCIE:SPARE_BYTE2[6] PCIE:DRP71[7] PCIE:SPARE_BYTE2[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[4] PCIE:SPARE_BYTE2[4] PCIE:DRP71[5] PCIE:SPARE_BYTE2[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[2] PCIE:SPARE_BYTE2[2] PCIE:DRP71[3] PCIE:SPARE_BYTE2[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP71[0] PCIE:SPARE_BYTE2[0] PCIE:DRP71[1] PCIE:SPARE_BYTE2[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[14] PCIE:SPARE_BYTE1[6] PCIE:DRP70[15] PCIE:SPARE_BYTE1[7]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[12] PCIE:SPARE_BYTE1[4] PCIE:DRP70[13] PCIE:SPARE_BYTE1[5]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[10] PCIE:SPARE_BYTE1[2] PCIE:DRP70[11] PCIE:SPARE_BYTE1[3]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[8] PCIE:SPARE_BYTE1[0] PCIE:DRP70[9] PCIE:SPARE_BYTE1[1]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[6] PCIE:SPARE_BYTE0[6] PCIE:DRP70[7] PCIE:SPARE_BYTE0[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[4] PCIE:SPARE_BYTE0[4] PCIE:DRP70[5] PCIE:SPARE_BYTE0[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[2] PCIE:SPARE_BYTE0[2] PCIE:DRP70[3] PCIE:SPARE_BYTE0[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP70[0] PCIE:SPARE_BYTE0[0] PCIE:DRP70[1] PCIE:SPARE_BYTE0[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[14] PCIE:DRP6F[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[12] PCIE:DRP6F[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[10] PCIE:DRP6F[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[8] PCIE:SPARE_BIT7 PCIE:DRP6F[9] PCIE:SPARE_BIT8
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[6] PCIE:SPARE_BIT5 PCIE:DRP6F[7] PCIE:SPARE_BIT6
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[4] PCIE:SPARE_BIT3 PCIE:DRP6F[5] PCIE:SPARE_BIT4
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[2] PCIE:SPARE_BIT1 PCIE:DRP6F[3] PCIE:SPARE_BIT2
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6F[0] PCIE:TEST_MODE_PIN_CHAR PCIE:DRP6F[1] PCIE:SPARE_BIT0
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[14] PCIE:RP_AUTO_SPD_LOOPCNT[3] PCIE:DRP6E[15] PCIE:RP_AUTO_SPD_LOOPCNT[4]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[12] PCIE:RP_AUTO_SPD_LOOPCNT[1] PCIE:DRP6E[13] PCIE:RP_AUTO_SPD_LOOPCNT[2]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[10] PCIE:RP_AUTO_SPD[1] PCIE:DRP6E[11] PCIE:RP_AUTO_SPD_LOOPCNT[0]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[8] PCIE:USER_CLK2_DIV2 PCIE:DRP6E[9] PCIE:RP_AUTO_SPD[0]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[6] PCIE:TRN_DW PCIE:DRP6E[7] PCIE:TRN_NP_FC
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[4] PCIE:UR_ATOMIC PCIE:DRP6E[5] PCIE:UR_CFG1
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6E[2] PCIE:UR_INV_REQ PCIE:DRP6E[3] PCIE:UR_PRS_RESPONSE
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:CFG_ECRC_ERR_CPLSTAT[0] PCIE:DRP6E[0] PCIE:CFG_ECRC_ERR_CPLSTAT[1] PCIE:DRP6E[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[14] PCIE:RECRC_CHK_TRIM PCIE:DRP6D[15] PCIE:TECRC_EP_INV
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[12] PCIE:RECRC_CHK[0] PCIE:DRP6D[13] PCIE:RECRC_CHK[1]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[10] PCIE:VC0_TX_LASTPACKET[3] PCIE:DRP6D[11] PCIE:VC0_TX_LASTPACKET[4]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[8] PCIE:VC0_TX_LASTPACKET[1] PCIE:DRP6D[9] PCIE:VC0_TX_LASTPACKET[2]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[6] PCIE:VC0_TOTAL_CREDITS_PH[6] PCIE:DRP6D[7] PCIE:VC0_TX_LASTPACKET[0]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[4] PCIE:VC0_TOTAL_CREDITS_PH[4] PCIE:DRP6D[5] PCIE:VC0_TOTAL_CREDITS_PH[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[2] PCIE:VC0_TOTAL_CREDITS_PH[2] PCIE:DRP6D[3] PCIE:VC0_TOTAL_CREDITS_PH[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6D[0] PCIE:VC0_TOTAL_CREDITS_PH[0] PCIE:DRP6D[1] PCIE:VC0_TOTAL_CREDITS_PH[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[14] PCIE:DRP6C[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[12] PCIE:DRP6C[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[10] PCIE:VC0_TOTAL_CREDITS_PD[10] PCIE:DRP6C[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[8] PCIE:VC0_TOTAL_CREDITS_PD[8] PCIE:DRP6C[9] PCIE:VC0_TOTAL_CREDITS_PD[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[6] PCIE:VC0_TOTAL_CREDITS_PD[6] PCIE:DRP6C[7] PCIE:VC0_TOTAL_CREDITS_PD[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[4] PCIE:VC0_TOTAL_CREDITS_PD[4] PCIE:DRP6C[5] PCIE:VC0_TOTAL_CREDITS_PD[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[2] PCIE:VC0_TOTAL_CREDITS_PD[2] PCIE:DRP6C[3] PCIE:VC0_TOTAL_CREDITS_PD[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP6C[0] PCIE:VC0_TOTAL_CREDITS_PD[0] PCIE:DRP6C[1] PCIE:VC0_TOTAL_CREDITS_PD[1]
virtex7 PCIE bittile 19
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[14] PCIE:SPARE_WORD2[30] PCIE:DRP77[15] PCIE:SPARE_WORD2[31]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[12] PCIE:SPARE_WORD2[28] PCIE:DRP77[13] PCIE:SPARE_WORD2[29]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[10] PCIE:SPARE_WORD2[26] PCIE:DRP77[11] PCIE:SPARE_WORD2[27]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[8] PCIE:SPARE_WORD2[24] PCIE:DRP77[9] PCIE:SPARE_WORD2[25]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[6] PCIE:SPARE_WORD2[22] PCIE:DRP77[7] PCIE:SPARE_WORD2[23]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[4] PCIE:SPARE_WORD2[20] PCIE:DRP77[5] PCIE:SPARE_WORD2[21]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[2] PCIE:SPARE_WORD2[18] PCIE:DRP77[3] PCIE:SPARE_WORD2[19]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP77[0] PCIE:SPARE_WORD2[16] PCIE:DRP77[1] PCIE:SPARE_WORD2[17]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[14] PCIE:SPARE_WORD2[14] PCIE:DRP76[15] PCIE:SPARE_WORD2[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[12] PCIE:SPARE_WORD2[12] PCIE:DRP76[13] PCIE:SPARE_WORD2[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[10] PCIE:SPARE_WORD2[10] PCIE:DRP76[11] PCIE:SPARE_WORD2[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[8] PCIE:SPARE_WORD2[8] PCIE:DRP76[9] PCIE:SPARE_WORD2[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[6] PCIE:SPARE_WORD2[6] PCIE:DRP76[7] PCIE:SPARE_WORD2[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[4] PCIE:SPARE_WORD2[4] PCIE:DRP76[5] PCIE:SPARE_WORD2[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[2] PCIE:SPARE_WORD2[2] PCIE:DRP76[3] PCIE:SPARE_WORD2[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP76[0] PCIE:SPARE_WORD2[0] PCIE:DRP76[1] PCIE:SPARE_WORD2[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[14] PCIE:SPARE_WORD1[30] PCIE:DRP75[15] PCIE:SPARE_WORD1[31]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[12] PCIE:SPARE_WORD1[28] PCIE:DRP75[13] PCIE:SPARE_WORD1[29]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[10] PCIE:SPARE_WORD1[26] PCIE:DRP75[11] PCIE:SPARE_WORD1[27]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[8] PCIE:SPARE_WORD1[24] PCIE:DRP75[9] PCIE:SPARE_WORD1[25]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[6] PCIE:SPARE_WORD1[22] PCIE:DRP75[7] PCIE:SPARE_WORD1[23]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[4] PCIE:SPARE_WORD1[20] PCIE:DRP75[5] PCIE:SPARE_WORD1[21]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[2] PCIE:SPARE_WORD1[18] PCIE:DRP75[3] PCIE:SPARE_WORD1[19]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP75[0] PCIE:SPARE_WORD1[16] PCIE:DRP75[1] PCIE:SPARE_WORD1[17]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[14] PCIE:SPARE_WORD1[14] PCIE:DRP74[15] PCIE:SPARE_WORD1[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[12] PCIE:SPARE_WORD1[12] PCIE:DRP74[13] PCIE:SPARE_WORD1[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[10] PCIE:SPARE_WORD1[10] PCIE:DRP74[11] PCIE:SPARE_WORD1[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[8] PCIE:SPARE_WORD1[8] PCIE:DRP74[9] PCIE:SPARE_WORD1[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[6] PCIE:SPARE_WORD1[6] PCIE:DRP74[7] PCIE:SPARE_WORD1[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[4] PCIE:SPARE_WORD1[4] PCIE:DRP74[5] PCIE:SPARE_WORD1[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[2] PCIE:SPARE_WORD1[2] PCIE:DRP74[3] PCIE:SPARE_WORD1[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP74[0] PCIE:SPARE_WORD1[0] PCIE:DRP74[1] PCIE:SPARE_WORD1[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[14] PCIE:SPARE_WORD0[30] PCIE:DRP73[15] PCIE:SPARE_WORD0[31]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[12] PCIE:SPARE_WORD0[28] PCIE:DRP73[13] PCIE:SPARE_WORD0[29]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[10] PCIE:SPARE_WORD0[26] PCIE:DRP73[11] PCIE:SPARE_WORD0[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[8] PCIE:SPARE_WORD0[24] PCIE:DRP73[9] PCIE:SPARE_WORD0[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[6] PCIE:SPARE_WORD0[22] PCIE:DRP73[7] PCIE:SPARE_WORD0[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[4] PCIE:SPARE_WORD0[20] PCIE:DRP73[5] PCIE:SPARE_WORD0[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[2] PCIE:SPARE_WORD0[18] PCIE:DRP73[3] PCIE:SPARE_WORD0[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP73[0] PCIE:SPARE_WORD0[16] PCIE:DRP73[1] PCIE:SPARE_WORD0[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[14] PCIE:SPARE_WORD0[14] PCIE:DRP72[15] PCIE:SPARE_WORD0[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[12] PCIE:SPARE_WORD0[12] PCIE:DRP72[13] PCIE:SPARE_WORD0[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[10] PCIE:SPARE_WORD0[10] PCIE:DRP72[11] PCIE:SPARE_WORD0[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[8] PCIE:SPARE_WORD0[8] PCIE:DRP72[9] PCIE:SPARE_WORD0[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[6] PCIE:SPARE_WORD0[6] PCIE:DRP72[7] PCIE:SPARE_WORD0[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[4] PCIE:SPARE_WORD0[4] PCIE:DRP72[5] PCIE:SPARE_WORD0[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[2] PCIE:SPARE_WORD0[2] PCIE:DRP72[3] PCIE:SPARE_WORD0[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP72[0] PCIE:SPARE_WORD0[0] PCIE:DRP72[1] PCIE:SPARE_WORD0[1]
virtex7 PCIE bittile 20
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[14] PCIE:DRP7D[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[12] PCIE:DRP7D[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[10] PCIE:DRP7D[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[8] PCIE:DRP7D[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[6] PCIE:DRP7D[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[4] PCIE:DRP7D[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[2] PCIE:DRP7D[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7D[0] PCIE:DRP7D[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[14] PCIE:DRP7C[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[12] PCIE:DRP7C[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[10] PCIE:DRP7C[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[8] PCIE:DRP7C[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[6] PCIE:DRP7C[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[4] PCIE:DRP7C[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[2] PCIE:DRP7C[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7C[0] PCIE:DRP7C[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[14] PCIE:DRP7B[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[12] PCIE:DRP7B[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[10] PCIE:DRP7B[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[8] PCIE:DRP7B[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[6] PCIE:DRP7B[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[4] PCIE:DRP7B[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[2] PCIE:DRP7B[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7B[0] PCIE:DRP7B[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[14] PCIE:DRP7A[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[12] PCIE:DRP7A[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[10] PCIE:DRP7A[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[8] PCIE:DRP7A[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[6] PCIE:DRP7A[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[4] PCIE:DRP7A[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[2] PCIE:DRP7A[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7A[0] PCIE:DRP7A[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[14] PCIE:SPARE_WORD3[30] PCIE:DRP79[15] PCIE:SPARE_WORD3[31]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[12] PCIE:SPARE_WORD3[28] PCIE:DRP79[13] PCIE:SPARE_WORD3[29]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[10] PCIE:SPARE_WORD3[26] PCIE:DRP79[11] PCIE:SPARE_WORD3[27]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[8] PCIE:SPARE_WORD3[24] PCIE:DRP79[9] PCIE:SPARE_WORD3[25]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[6] PCIE:SPARE_WORD3[22] PCIE:DRP79[7] PCIE:SPARE_WORD3[23]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[4] PCIE:SPARE_WORD3[20] PCIE:DRP79[5] PCIE:SPARE_WORD3[21]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[2] PCIE:SPARE_WORD3[18] PCIE:DRP79[3] PCIE:SPARE_WORD3[19]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP79[0] PCIE:SPARE_WORD3[16] PCIE:DRP79[1] PCIE:SPARE_WORD3[17]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[14] PCIE:SPARE_WORD3[14] PCIE:DRP78[15] PCIE:SPARE_WORD3[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[12] PCIE:SPARE_WORD3[12] PCIE:DRP78[13] PCIE:SPARE_WORD3[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[10] PCIE:SPARE_WORD3[10] PCIE:DRP78[11] PCIE:SPARE_WORD3[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[8] PCIE:SPARE_WORD3[8] PCIE:DRP78[9] PCIE:SPARE_WORD3[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[6] PCIE:SPARE_WORD3[6] PCIE:DRP78[7] PCIE:SPARE_WORD3[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[4] PCIE:SPARE_WORD3[4] PCIE:DRP78[5] PCIE:SPARE_WORD3[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[2] PCIE:SPARE_WORD3[2] PCIE:DRP78[3] PCIE:SPARE_WORD3[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP78[0] PCIE:SPARE_WORD3[0] PCIE:DRP78[1] PCIE:SPARE_WORD3[1]
virtex7 PCIE bittile 21
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[14] PCIE:DRP83[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[12] PCIE:DRP83[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[10] PCIE:DRP83[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[8] PCIE:DRP83[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[6] PCIE:DRP83[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[4] PCIE:DRP83[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[2] PCIE:DRP83[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP83[0] PCIE:DRP83[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[14] PCIE:DRP82[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[12] PCIE:DRP82[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[10] PCIE:DRP82[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[8] PCIE:DRP82[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[6] PCIE:DRP82[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[4] PCIE:DRP82[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[2] PCIE:DRP82[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP82[0] PCIE:DRP82[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[14] PCIE:DRP81[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[12] PCIE:DRP81[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[10] PCIE:DRP81[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[8] PCIE:DRP81[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[6] PCIE:DRP81[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[4] PCIE:DRP81[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[2] PCIE:DRP81[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP81[0] PCIE:DRP81[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[14] PCIE:DRP80[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[12] PCIE:DRP80[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[10] PCIE:DRP80[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[8] PCIE:DRP80[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[6] PCIE:DRP80[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[4] PCIE:DRP80[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[2] PCIE:DRP80[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP80[0] PCIE:DRP80[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[14] PCIE:DRP7F[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[12] PCIE:DRP7F[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[10] PCIE:DRP7F[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[8] PCIE:DRP7F[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[6] PCIE:DRP7F[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[4] PCIE:DRP7F[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[2] PCIE:DRP7F[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7F[0] PCIE:DRP7F[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[14] PCIE:DRP7E[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[12] PCIE:DRP7E[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[10] PCIE:DRP7E[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[8] PCIE:DRP7E[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[6] PCIE:DRP7E[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[4] PCIE:DRP7E[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[2] PCIE:DRP7E[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP7E[0] PCIE:DRP7E[1]
virtex7 PCIE bittile 22
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[14] PCIE:DRP89[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[12] PCIE:DRP89[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[10] PCIE:DRP89[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[8] PCIE:DRP89[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[6] PCIE:DRP89[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[4] PCIE:DRP89[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[2] PCIE:DRP89[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP89[0] PCIE:DRP89[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[14] PCIE:DRP88[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[12] PCIE:DRP88[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[10] PCIE:DRP88[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[8] PCIE:DRP88[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[6] PCIE:DRP88[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[4] PCIE:DRP88[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[2] PCIE:DRP88[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP88[0] PCIE:DRP88[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[14] PCIE:DRP87[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[12] PCIE:DRP87[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[10] PCIE:DRP87[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[8] PCIE:DRP87[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[6] PCIE:DRP87[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[4] PCIE:DRP87[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[2] PCIE:DRP87[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP87[0] PCIE:DRP87[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[14] PCIE:DRP86[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[12] PCIE:DRP86[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[10] PCIE:DRP86[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[8] PCIE:DRP86[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[6] PCIE:DRP86[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[4] PCIE:DRP86[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[2] PCIE:DRP86[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP86[0] PCIE:DRP86[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[14] PCIE:DRP85[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[12] PCIE:DRP85[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[10] PCIE:DRP85[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[8] PCIE:DRP85[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[6] PCIE:DRP85[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[4] PCIE:DRP85[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[2] PCIE:DRP85[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP85[0] PCIE:DRP85[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[14] PCIE:DRP84[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[12] PCIE:DRP84[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[10] PCIE:DRP84[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[8] PCIE:DRP84[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[6] PCIE:DRP84[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[4] PCIE:DRP84[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[2] PCIE:DRP84[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP84[0] PCIE:DRP84[1]
virtex7 PCIE bittile 23
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[14] PCIE:DRP8F[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[12] PCIE:DRP8F[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[10] PCIE:DRP8F[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[8] PCIE:DRP8F[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[6] PCIE:DRP8F[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[4] PCIE:DRP8F[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[2] PCIE:DRP8F[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8F[0] PCIE:DRP8F[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[14] PCIE:DRP8E[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[12] PCIE:DRP8E[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[10] PCIE:DRP8E[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[8] PCIE:DRP8E[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[6] PCIE:DRP8E[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[4] PCIE:DRP8E[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[2] PCIE:DRP8E[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8E[0] PCIE:DRP8E[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[14] PCIE:DRP8D[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[12] PCIE:DRP8D[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[10] PCIE:DRP8D[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[8] PCIE:DRP8D[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[6] PCIE:DRP8D[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[4] PCIE:DRP8D[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[2] PCIE:DRP8D[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8D[0] PCIE:DRP8D[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[14] PCIE:DRP8C[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[12] PCIE:DRP8C[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[10] PCIE:DRP8C[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[8] PCIE:DRP8C[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[6] PCIE:DRP8C[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[4] PCIE:DRP8C[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[2] PCIE:DRP8C[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8C[0] PCIE:DRP8C[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[14] PCIE:DRP8B[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[12] PCIE:DRP8B[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[10] PCIE:DRP8B[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[8] PCIE:DRP8B[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[6] PCIE:DRP8B[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[4] PCIE:DRP8B[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[2] PCIE:DRP8B[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8B[0] PCIE:DRP8B[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[14] PCIE:DRP8A[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[12] PCIE:DRP8A[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[10] PCIE:DRP8A[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[8] PCIE:DRP8A[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[6] PCIE:DRP8A[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[4] PCIE:DRP8A[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[2] PCIE:DRP8A[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP8A[0] PCIE:DRP8A[1]
virtex7 PCIE bittile 24
BitFrame
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
47 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[14] PCIE:DRP95[15]
46 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[12] PCIE:DRP95[13]
45 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[10] PCIE:DRP95[11]
44 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[8] PCIE:DRP95[9]
43 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[6] PCIE:DRP95[7]
42 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[4] PCIE:DRP95[5]
41 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[2] PCIE:DRP95[3]
40 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP95[0] PCIE:DRP95[1]
39 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[14] PCIE:DRP94[15]
38 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[12] PCIE:DRP94[13]
37 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[10] PCIE:DRP94[11]
36 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[8] PCIE:DRP94[9]
35 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[6] PCIE:DRP94[7]
34 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[4] PCIE:DRP94[5]
33 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[2] PCIE:DRP94[3]
32 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP94[0] PCIE:DRP94[1]
31 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[14] PCIE:DRP93[15]
30 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[12] PCIE:DRP93[13]
29 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[10] PCIE:DRP93[11]
28 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[8] PCIE:DRP93[9]
27 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[6] PCIE:DRP93[7]
26 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[4] PCIE:DRP93[5]
25 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[2] PCIE:DRP93[3]
24 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP93[0] PCIE:DRP93[1]
23 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[14] PCIE:DRP92[15]
22 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[12] PCIE:DRP92[13]
21 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[10] PCIE:DRP92[11]
20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[8] PCIE:DRP92[9]
19 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[6] PCIE:DRP92[7]
18 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[4] PCIE:DRP92[5]
17 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[2] PCIE:DRP92[3]
16 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP92[0] PCIE:DRP92[1]
15 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[14] PCIE:DRP91[15]
14 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[12] PCIE:DRP91[13]
13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[10] PCIE:DRP91[11]
12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[8] PCIE:DRP91[9]
11 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[6] PCIE:DRP91[7]
10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[4] PCIE:DRP91[5]
9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[2] PCIE:DRP91[3]
8 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP91[0] PCIE:DRP91[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[14] PCIE:DRP90[15]
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[12] PCIE:DRP90[13]
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[10] PCIE:DRP90[11]
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[8] PCIE:DRP90[9]
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[6] PCIE:DRP90[7]
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[4] PCIE:DRP90[5]
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[2] PCIE:DRP90[3]
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - PCIE:DRP90[0] PCIE:DRP90[1]
PCIE:AER_BASE_PTR 0.29.29 0.28.29 0.29.28 0.28.28 0.29.27 0.28.27 0.29.26 0.28.26 0.29.25 0.28.25 0.29.24 0.28.24
PCIE:AER_CAP_NEXTPTR 0.29.37 0.28.37 0.29.36 0.28.36 0.29.35 0.28.35 0.29.34 0.28.34 0.29.33 0.28.33 0.29.32 0.28.32
PCIE:DSN_BASE_PTR 4.29.45 4.28.45 4.29.44 4.28.44 4.29.43 4.28.43 4.29.42 4.28.42 4.29.41 4.28.41 4.29.40 4.28.40
PCIE:DSN_CAP_NEXTPTR 5.29.13 5.28.13 5.29.12 5.28.12 5.29.11 5.28.11 5.29.10 5.28.10 5.29.9 5.28.9 5.29.8 5.28.8
PCIE:RBAR_BASE_PTR 10.29.5 10.28.5 10.29.4 10.28.4 10.29.3 10.28.3 10.29.2 10.28.2 10.29.1 10.28.1 10.29.0 10.28.0
PCIE:RBAR_CAP_NEXTPTR 10.29.13 10.28.13 10.29.12 10.28.12 10.29.11 10.28.11 10.29.10 10.28.10 10.29.9 10.28.9 10.29.8 10.28.8
PCIE:VC_BASE_PTR 13.29.37 13.28.37 13.29.36 13.28.36 13.29.35 13.28.35 13.29.34 13.28.34 13.29.33 13.28.33 13.29.32 13.28.32
PCIE:VC_CAP_NEXTPTR 13.29.45 13.28.45 13.29.44 13.28.44 13.29.43 13.28.43 13.29.42 13.28.42 13.29.41 13.28.41 13.29.40 13.28.40
PCIE:VSEC_BASE_PTR 14.28.14 14.29.13 14.28.13 14.29.12 14.28.12 14.29.11 14.28.11 14.29.10 14.28.10 14.29.9 14.28.9 14.29.8
PCIE:VSEC_CAP_HDR_LENGTH 14.29.29 14.28.29 14.29.28 14.28.28 14.29.27 14.28.27 14.29.26 14.28.26 14.29.25 14.28.25 14.29.24 14.28.24
PCIE:VSEC_CAP_NEXTPTR 14.28.46 14.29.45 14.28.45 14.29.44 14.28.44 14.29.43 14.28.43 14.29.42 14.28.42 14.29.41 14.28.41 14.29.40
non-inverted [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:AER_CAP_ECRC_CHECK_CAPABLE 0.28.0
PCIE:AER_CAP_ECRC_GEN_CAPABLE 0.29.0
PCIE:AER_CAP_MULTIHEADER 1.28.4
PCIE:AER_CAP_ON 0.28.38
PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE 0.28.16
PCIE:ALLOW_X8_GEN2 16.28.32
PCIE:CMD_INTX_IMPLEMENTED 4.28.12
PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED 4.29.12
PCIE:DEV_CAP2_ARI_FORWARDING_SUPPORTED 4.28.15
PCIE:DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED 4.28.16
PCIE:DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED 4.29.16
PCIE:DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED 4.29.15
PCIE:DEV_CAP2_CAS128_COMPLETER_SUPPORTED 4.28.17
PCIE:DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED 4.28.20
PCIE:DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED 4.29.19
PCIE:DEV_CAP2_LTR_MECHANISM_SUPPORTED 4.28.18
PCIE:DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING 4.29.17
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE 4.28.22
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE 4.29.22
PCIE:DEV_CAP_EXT_TAG_SUPPORTED 4.28.27
PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE 4.29.27
PCIE:DEV_CAP_ROLE_BASED_ERROR 4.29.30
PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED 4.28.36
PCIE:DEV_CONTROL_EXT_TAG_DEFAULT 4.29.36
PCIE:DISABLE_ASPM_L1_TIMER 16.28.40
PCIE:DISABLE_BAR_FILTERING 16.29.40
PCIE:DISABLE_ERR_MSG 17.29.5
PCIE:DISABLE_ID_CHECK 16.28.41
PCIE:DISABLE_LANE_REVERSAL 16.29.1
PCIE:DISABLE_LOCKED_FILTER 17.29.4
PCIE:DISABLE_PPM_FILTER 17.28.4
PCIE:DISABLE_RX_POISONED_RESP 16.28.42
PCIE:DISABLE_RX_TC_FILTER 16.29.41
PCIE:DISABLE_SCRAMBLING 16.28.2
PCIE:DSN_CAP_ON 5.28.14
PCIE:ENABLE_RX_TD_ECRC_TRIM 17.28.0
PCIE:ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED 4.29.21
PCIE:ENTER_RVRY_EI_L0 16.29.2
PCIE:EXIT_LOOPBACK_ON_EI 16.29.35
PCIE:INTERRUPT_STAT_AUTO 5.28.40
PCIE:IS_SWITCH 5.29.40
PCIE:LINK_CAP_ASPM_OPTIONALITY 6.28.15
PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT 5.28.47
PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP 5.29.47
PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP 6.29.12
PCIE:LINK_CAP_RSVD_23 6.29.15
PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE 6.28.16
PCIE:LINK_CONTROL_RCB 6.29.16
PCIE:LINK_CTRL2_DEEMPHASIS 6.28.17
PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE 6.29.17
PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG 6.28.20
PCIE:LL_ACK_TIMEOUT_EN 15.29.15
PCIE:LL_REPLAY_TIMEOUT_EN 15.29.31
PCIE:MPS_FORCE 6.29.20
PCIE:MSIX_CAP_ON 7.28.12
PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE 6.28.28
PCIE:MSI_CAP_MULTIMSG_EXTENSION 6.28.36
PCIE:MSI_CAP_ON 6.28.44
PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE 6.29.44
PCIE:PCIE_CAP_ON 8.28.24
PCIE:PCIE_CAP_SLOT_IMPLEMENTED 8.29.25
PCIE:PL_FAST_TRAIN 16.28.34
PCIE:PM_ASPML0S_TIMEOUT_EN 15.29.47
PCIE:PM_ASPM_FASTEXIT 16.28.1
PCIE:PM_CAP_D1SUPPORT 8.29.33
PCIE:PM_CAP_D2SUPPORT 8.28.34
PCIE:PM_CAP_DSI 8.29.34
PCIE:PM_CAP_ON 8.28.44
PCIE:PM_CAP_PME_CLOCK 8.29.44
PCIE:PM_CAP_RSVD_04 8.29.47
PCIE:PM_CSR_B2B3 9.29.1
PCIE:PM_CSR_BPCCEN 9.28.2
PCIE:PM_CSR_NOSOFTRST 9.29.2
PCIE:PM_MF 17.28.6
PCIE:RBAR_CAP_ON 10.28.14
PCIE:RECRC_CHK_TRIM 18.28.15
PCIE:ROOT_CAP_CRS_SW_VISIBILITY 13.29.10
PCIE:SELECT_DLL_IF 13.28.11
PCIE:SLOT_CAP_ATT_BUTTON_PRESENT 13.29.11
PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT 13.28.12
PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT 13.29.12
PCIE:SLOT_CAP_HOTPLUG_CAPABLE 13.28.13
PCIE:SLOT_CAP_HOTPLUG_SURPRISE 13.29.13
PCIE:SLOT_CAP_MRL_SENSOR_PRESENT 13.28.14
PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT 13.29.14
PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT 13.29.22
PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT 13.28.23
PCIE:SPARE_BIT0 18.29.24
PCIE:SPARE_BIT1 18.28.25
PCIE:SPARE_BIT2 18.29.25
PCIE:SPARE_BIT3 18.28.26
PCIE:SPARE_BIT4 18.29.26
PCIE:SPARE_BIT5 18.28.27
PCIE:SPARE_BIT6 18.29.27
PCIE:SPARE_BIT7 18.28.28
PCIE:SPARE_BIT8 18.29.28
PCIE:SSL_MESSAGE_AUTO 13.28.29
PCIE:TECRC_EP_INV 18.29.15
PCIE:TEST_MODE_PIN_CHAR 18.28.24
PCIE:TL_RBYPASS 17.29.3
PCIE:TL_RX_RAM_RADDR_LATENCY 17.29.0
PCIE:TL_RX_RAM_WRITE_LATENCY 17.28.2
PCIE:TL_TFC_DISABLE 17.29.2
PCIE:TL_TX_CHECKS_DISABLE 17.28.3
PCIE:TL_TX_RAM_RADDR_LATENCY 17.29.6
PCIE:TL_TX_RAM_WRITE_LATENCY 17.28.8
PCIE:TRN_DW 18.28.19
PCIE:TRN_NP_FC 18.29.19
PCIE:UPCONFIG_CAPABLE 16.29.34
PCIE:UPSTREAM_FACING 16.28.35
PCIE:UR_ATOMIC 18.28.18
PCIE:UR_CFG1 18.29.18
PCIE:UR_INV_REQ 18.28.17
PCIE:UR_PRS_RESPONSE 18.29.17
PCIE:USER_CLK2_DIV2 18.28.20
PCIE:USE_RID_PINS 17.28.5
PCIE:VC0_CPL_INFINITE 17.29.10
PCIE:VC_CAP_ON 13.28.46
PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS 14.28.8
PCIE:VSEC_CAP_IS_LINK_VISIBLE 14.28.40
PCIE:VSEC_CAP_ON 14.29.46
non-inverted [0]
PCIE:AER_CAP_ID 0.29.15 0.28.15 0.29.14 0.28.14 0.29.13 0.28.13 0.29.12 0.28.12 0.29.11 0.28.11 0.29.10 0.28.10 0.29.9 0.28.9 0.29.8 0.28.8
PCIE:DRP00 0.29.7 0.28.7 0.29.6 0.28.6 0.29.5 0.28.5 0.29.4 0.28.4 0.29.3 0.28.3 0.29.2 0.28.2 0.29.1 0.28.1 0.29.0 0.28.0
PCIE:DRP01 0.29.15 0.28.15 0.29.14 0.28.14 0.29.13 0.28.13 0.29.12 0.28.12 0.29.11 0.28.11 0.29.10 0.28.10 0.29.9 0.28.9 0.29.8 0.28.8
PCIE:DRP02 0.29.23 0.28.23 0.29.22 0.28.22 0.29.21 0.28.21 0.29.20 0.28.20 0.29.19 0.28.19 0.29.18 0.28.18 0.29.17 0.28.17 0.29.16 0.28.16
PCIE:DRP03 0.29.31 0.28.31 0.29.30 0.28.30 0.29.29 0.28.29 0.29.28 0.28.28 0.29.27 0.28.27 0.29.26 0.28.26 0.29.25 0.28.25 0.29.24 0.28.24
PCIE:DRP04 0.29.39 0.28.39 0.29.38 0.28.38 0.29.37 0.28.37 0.29.36 0.28.36 0.29.35 0.28.35 0.29.34 0.28.34 0.29.33 0.28.33 0.29.32 0.28.32
PCIE:DRP05 0.29.47 0.28.47 0.29.46 0.28.46 0.29.45 0.28.45 0.29.44 0.28.44 0.29.43 0.28.43 0.29.42 0.28.42 0.29.41 0.28.41 0.29.40 0.28.40
PCIE:DRP06 1.29.7 1.28.7 1.29.6 1.28.6 1.29.5 1.28.5 1.29.4 1.28.4 1.29.3 1.28.3 1.29.2 1.28.2 1.29.1 1.28.1 1.29.0 1.28.0
PCIE:DRP07 1.29.15 1.28.15 1.29.14 1.28.14 1.29.13 1.28.13 1.29.12 1.28.12 1.29.11 1.28.11 1.29.10 1.28.10 1.29.9 1.28.9 1.29.8 1.28.8
PCIE:DRP08 1.29.23 1.28.23 1.29.22 1.28.22 1.29.21 1.28.21 1.29.20 1.28.20 1.29.19 1.28.19 1.29.18 1.28.18 1.29.17 1.28.17 1.29.16 1.28.16
PCIE:DRP09 1.29.31 1.28.31 1.29.30 1.28.30 1.29.29 1.28.29 1.29.28 1.28.28 1.29.27 1.28.27 1.29.26 1.28.26 1.29.25 1.28.25 1.29.24 1.28.24
PCIE:DRP0A 1.29.39 1.28.39 1.29.38 1.28.38 1.29.37 1.28.37 1.29.36 1.28.36 1.29.35 1.28.35 1.29.34 1.28.34 1.29.33 1.28.33 1.29.32 1.28.32
PCIE:DRP0B 1.29.47 1.28.47 1.29.46 1.28.46 1.29.45 1.28.45 1.29.44 1.28.44 1.29.43 1.28.43 1.29.42 1.28.42 1.29.41 1.28.41 1.29.40 1.28.40
PCIE:DRP0C 2.29.7 2.28.7 2.29.6 2.28.6 2.29.5 2.28.5 2.29.4 2.28.4 2.29.3 2.28.3 2.29.2 2.28.2 2.29.1 2.28.1 2.29.0 2.28.0
PCIE:DRP0D 2.29.15 2.28.15 2.29.14 2.28.14 2.29.13 2.28.13 2.29.12 2.28.12 2.29.11 2.28.11 2.29.10 2.28.10 2.29.9 2.28.9 2.29.8 2.28.8
PCIE:DRP0E 2.29.23 2.28.23 2.29.22 2.28.22 2.29.21 2.28.21 2.29.20 2.28.20 2.29.19 2.28.19 2.29.18 2.28.18 2.29.17 2.28.17 2.29.16 2.28.16
PCIE:DRP0F 2.29.31 2.28.31 2.29.30 2.28.30 2.29.29 2.28.29 2.29.28 2.28.28 2.29.27 2.28.27 2.29.26 2.28.26 2.29.25 2.28.25 2.29.24 2.28.24
PCIE:DRP10 2.29.39 2.28.39 2.29.38 2.28.38 2.29.37 2.28.37 2.29.36 2.28.36 2.29.35 2.28.35 2.29.34 2.28.34 2.29.33 2.28.33 2.29.32 2.28.32
PCIE:DRP11 2.29.47 2.28.47 2.29.46 2.28.46 2.29.45 2.28.45 2.29.44 2.28.44 2.29.43 2.28.43 2.29.42 2.28.42 2.29.41 2.28.41 2.29.40 2.28.40
PCIE:DRP12 3.29.7 3.28.7 3.29.6 3.28.6 3.29.5 3.28.5 3.29.4 3.28.4 3.29.3 3.28.3 3.29.2 3.28.2 3.29.1 3.28.1 3.29.0 3.28.0
PCIE:DRP13 3.29.15 3.28.15 3.29.14 3.28.14 3.29.13 3.28.13 3.29.12 3.28.12 3.29.11 3.28.11 3.29.10 3.28.10 3.29.9 3.28.9 3.29.8 3.28.8
PCIE:DRP14 3.29.23 3.28.23 3.29.22 3.28.22 3.29.21 3.28.21 3.29.20 3.28.20 3.29.19 3.28.19 3.29.18 3.28.18 3.29.17 3.28.17 3.29.16 3.28.16
PCIE:DRP15 3.29.31 3.28.31 3.29.30 3.28.30 3.29.29 3.28.29 3.29.28 3.28.28 3.29.27 3.28.27 3.29.26 3.28.26 3.29.25 3.28.25 3.29.24 3.28.24
PCIE:DRP16 3.29.39 3.28.39 3.29.38 3.28.38 3.29.37 3.28.37 3.29.36 3.28.36 3.29.35 3.28.35 3.29.34 3.28.34 3.29.33 3.28.33 3.29.32 3.28.32
PCIE:DRP17 3.29.47 3.28.47 3.29.46 3.28.46 3.29.45 3.28.45 3.29.44 3.28.44 3.29.43 3.28.43 3.29.42 3.28.42 3.29.41 3.28.41 3.29.40 3.28.40
PCIE:DRP18 4.29.7 4.28.7 4.29.6 4.28.6 4.29.5 4.28.5 4.29.4 4.28.4 4.29.3 4.28.3 4.29.2 4.28.2 4.29.1 4.28.1 4.29.0 4.28.0
PCIE:DRP19 4.29.15 4.28.15 4.29.14 4.28.14 4.29.13 4.28.13 4.29.12 4.28.12 4.29.11 4.28.11 4.29.10 4.28.10 4.29.9 4.28.9 4.29.8 4.28.8
PCIE:DRP1A 4.29.23 4.28.23 4.29.22 4.28.22 4.29.21 4.28.21 4.29.20 4.28.20 4.29.19 4.28.19 4.29.18 4.28.18 4.29.17 4.28.17 4.29.16 4.28.16
PCIE:DRP1B 4.29.31 4.28.31 4.29.30 4.28.30 4.29.29 4.28.29 4.29.28 4.28.28 4.29.27 4.28.27 4.29.26 4.28.26 4.29.25 4.28.25 4.29.24 4.28.24
PCIE:DRP1C 4.29.39 4.28.39 4.29.38 4.28.38 4.29.37 4.28.37 4.29.36 4.28.36 4.29.35 4.28.35 4.29.34 4.28.34 4.29.33 4.28.33 4.29.32 4.28.32
PCIE:DRP1D 4.29.47 4.28.47 4.29.46 4.28.46 4.29.45 4.28.45 4.29.44 4.28.44 4.29.43 4.28.43 4.29.42 4.28.42 4.29.41 4.28.41 4.29.40 4.28.40
PCIE:DRP1E 5.29.7 5.28.7 5.29.6 5.28.6 5.29.5 5.28.5 5.29.4 5.28.4 5.29.3 5.28.3 5.29.2 5.28.2 5.29.1 5.28.1 5.29.0 5.28.0
PCIE:DRP1F 5.29.15 5.28.15 5.29.14 5.28.14 5.29.13 5.28.13 5.29.12 5.28.12 5.29.11 5.28.11 5.29.10 5.28.10 5.29.9 5.28.9 5.29.8 5.28.8
PCIE:DRP20 5.29.23 5.28.23 5.29.22 5.28.22 5.29.21 5.28.21 5.29.20 5.28.20 5.29.19 5.28.19 5.29.18 5.28.18 5.29.17 5.28.17 5.29.16 5.28.16
PCIE:DRP21 5.29.31 5.28.31 5.29.30 5.28.30 5.29.29 5.28.29 5.29.28 5.28.28 5.29.27 5.28.27 5.29.26 5.28.26 5.29.25 5.28.25 5.29.24 5.28.24
PCIE:DRP22 5.29.39 5.28.39 5.29.38 5.28.38 5.29.37 5.28.37 5.29.36 5.28.36 5.29.35 5.28.35 5.29.34 5.28.34 5.29.33 5.28.33 5.29.32 5.28.32
PCIE:DRP23 5.29.47 5.28.47 5.29.46 5.28.46 5.29.45 5.28.45 5.29.44 5.28.44 5.29.43 5.28.43 5.29.42 5.28.42 5.29.41 5.28.41 5.29.40 5.28.40
PCIE:DRP24 6.29.7 6.28.7 6.29.6 6.28.6 6.29.5 6.28.5 6.29.4 6.28.4 6.29.3 6.28.3 6.29.2 6.28.2 6.29.1 6.28.1 6.29.0 6.28.0
PCIE:DRP25 6.29.15 6.28.15 6.29.14 6.28.14 6.29.13 6.28.13 6.29.12 6.28.12 6.29.11 6.28.11 6.29.10 6.28.10 6.29.9 6.28.9 6.29.8 6.28.8
PCIE:DRP26 6.29.23 6.28.23 6.29.22 6.28.22 6.29.21 6.28.21 6.29.20 6.28.20 6.29.19 6.28.19 6.29.18 6.28.18 6.29.17 6.28.17 6.29.16 6.28.16
PCIE:DRP27 6.29.31 6.28.31 6.29.30 6.28.30 6.29.29 6.28.29 6.29.28 6.28.28 6.29.27 6.28.27 6.29.26 6.28.26 6.29.25 6.28.25 6.29.24 6.28.24
PCIE:DRP28 6.29.39 6.28.39 6.29.38 6.28.38 6.29.37 6.28.37 6.29.36 6.28.36 6.29.35 6.28.35 6.29.34 6.28.34 6.29.33 6.28.33 6.29.32 6.28.32
PCIE:DRP29 6.29.47 6.28.47 6.29.46 6.28.46 6.29.45 6.28.45 6.29.44 6.28.44 6.29.43 6.28.43 6.29.42 6.28.42 6.29.41 6.28.41 6.29.40 6.28.40
PCIE:DRP2A 7.29.7 7.28.7 7.29.6 7.28.6 7.29.5 7.28.5 7.29.4 7.28.4 7.29.3 7.28.3 7.29.2 7.28.2 7.29.1 7.28.1 7.29.0 7.28.0
PCIE:DRP2B 7.29.15 7.28.15 7.29.14 7.28.14 7.29.13 7.28.13 7.29.12 7.28.12 7.29.11 7.28.11 7.29.10 7.28.10 7.29.9 7.28.9 7.29.8 7.28.8
PCIE:DRP2C 7.29.23 7.28.23 7.29.22 7.28.22 7.29.21 7.28.21 7.29.20 7.28.20 7.29.19 7.28.19 7.29.18 7.28.18 7.29.17 7.28.17 7.29.16 7.28.16
PCIE:DRP2D 7.29.31 7.28.31 7.29.30 7.28.30 7.29.29 7.28.29 7.29.28 7.28.28 7.29.27 7.28.27 7.29.26 7.28.26 7.29.25 7.28.25 7.29.24 7.28.24
PCIE:DRP2E 7.29.39 7.28.39 7.29.38 7.28.38 7.29.37 7.28.37 7.29.36 7.28.36 7.29.35 7.28.35 7.29.34 7.28.34 7.29.33 7.28.33 7.29.32 7.28.32
PCIE:DRP2F 7.29.47 7.28.47 7.29.46 7.28.46 7.29.45 7.28.45 7.29.44 7.28.44 7.29.43 7.28.43 7.29.42 7.28.42 7.29.41 7.28.41 7.29.40 7.28.40
PCIE:DRP30 8.29.7 8.28.7 8.29.6 8.28.6 8.29.5 8.28.5 8.29.4 8.28.4 8.29.3 8.28.3 8.29.2 8.28.2 8.29.1 8.28.1 8.29.0 8.28.0
PCIE:DRP31 8.29.15 8.28.15 8.29.14 8.28.14 8.29.13 8.28.13 8.29.12 8.28.12 8.29.11 8.28.11 8.29.10 8.28.10 8.29.9 8.28.9 8.29.8 8.28.8
PCIE:DRP32 8.29.23 8.28.23 8.29.22 8.28.22 8.29.21 8.28.21 8.29.20 8.28.20 8.29.19 8.28.19 8.29.18 8.28.18 8.29.17 8.28.17 8.29.16 8.28.16
PCIE:DRP33 8.29.31 8.28.31 8.29.30 8.28.30 8.29.29 8.28.29 8.29.28 8.28.28 8.29.27 8.28.27 8.29.26 8.28.26 8.29.25 8.28.25 8.29.24 8.28.24
PCIE:DRP34 8.29.39 8.28.39 8.29.38 8.28.38 8.29.37 8.28.37 8.29.36 8.28.36 8.29.35 8.28.35 8.29.34 8.28.34 8.29.33 8.28.33 8.29.32 8.28.32
PCIE:DRP35 8.29.47 8.28.47 8.29.46 8.28.46 8.29.45 8.28.45 8.29.44 8.28.44 8.29.43 8.28.43 8.29.42 8.28.42 8.29.41 8.28.41 8.29.40 8.28.40
PCIE:DRP36 9.29.7 9.28.7 9.29.6 9.28.6 9.29.5 9.28.5 9.29.4 9.28.4 9.29.3 9.28.3 9.29.2 9.28.2 9.29.1 9.28.1 9.29.0 9.28.0
PCIE:DRP37 9.29.15 9.28.15 9.29.14 9.28.14 9.29.13 9.28.13 9.29.12 9.28.12 9.29.11 9.28.11 9.29.10 9.28.10 9.29.9 9.28.9 9.29.8 9.28.8
PCIE:DRP38 9.29.23 9.28.23 9.29.22 9.28.22 9.29.21 9.28.21 9.29.20 9.28.20 9.29.19 9.28.19 9.29.18 9.28.18 9.29.17 9.28.17 9.29.16 9.28.16
PCIE:DRP39 9.29.31 9.28.31 9.29.30 9.28.30 9.29.29 9.28.29 9.29.28 9.28.28 9.29.27 9.28.27 9.29.26 9.28.26 9.29.25 9.28.25 9.29.24 9.28.24
PCIE:DRP3A 9.29.39 9.28.39 9.29.38 9.28.38 9.29.37 9.28.37 9.29.36 9.28.36 9.29.35 9.28.35 9.29.34 9.28.34 9.29.33 9.28.33 9.29.32 9.28.32
PCIE:DRP3B 9.29.47 9.28.47 9.29.46 9.28.46 9.29.45 9.28.45 9.29.44 9.28.44 9.29.43 9.28.43 9.29.42 9.28.42 9.29.41 9.28.41 9.29.40 9.28.40
PCIE:DRP3C 10.29.7 10.28.7 10.29.6 10.28.6 10.29.5 10.28.5 10.29.4 10.28.4 10.29.3 10.28.3 10.29.2 10.28.2 10.29.1 10.28.1 10.29.0 10.28.0
PCIE:DRP3D 10.29.15 10.28.15 10.29.14 10.28.14 10.29.13 10.28.13 10.29.12 10.28.12 10.29.11 10.28.11 10.29.10 10.28.10 10.29.9 10.28.9 10.29.8 10.28.8
PCIE:DRP3E 10.29.23 10.28.23 10.29.22 10.28.22 10.29.21 10.28.21 10.29.20 10.28.20 10.29.19 10.28.19 10.29.18 10.28.18 10.29.17 10.28.17 10.29.16 10.28.16
PCIE:DRP3F 10.29.31 10.28.31 10.29.30 10.28.30 10.29.29 10.28.29 10.29.28 10.28.28 10.29.27 10.28.27 10.29.26 10.28.26 10.29.25 10.28.25 10.29.24 10.28.24
PCIE:DRP40 10.29.39 10.28.39 10.29.38 10.28.38 10.29.37 10.28.37 10.29.36 10.28.36 10.29.35 10.28.35 10.29.34 10.28.34 10.29.33 10.28.33 10.29.32 10.28.32
PCIE:DRP41 10.29.47 10.28.47 10.29.46 10.28.46 10.29.45 10.28.45 10.29.44 10.28.44 10.29.43 10.28.43 10.29.42 10.28.42 10.29.41 10.28.41 10.29.40 10.28.40
PCIE:DRP42 11.29.7 11.28.7 11.29.6 11.28.6 11.29.5 11.28.5 11.29.4 11.28.4 11.29.3 11.28.3 11.29.2 11.28.2 11.29.1 11.28.1 11.29.0 11.28.0
PCIE:DRP43 11.29.15 11.28.15 11.29.14 11.28.14 11.29.13 11.28.13 11.29.12 11.28.12 11.29.11 11.28.11 11.29.10 11.28.10 11.29.9 11.28.9 11.29.8 11.28.8
PCIE:DRP44 11.29.23 11.28.23 11.29.22 11.28.22 11.29.21 11.28.21 11.29.20 11.28.20 11.29.19 11.28.19 11.29.18 11.28.18 11.29.17 11.28.17 11.29.16 11.28.16
PCIE:DRP45 11.29.31 11.28.31 11.29.30 11.28.30 11.29.29 11.28.29 11.29.28 11.28.28 11.29.27 11.28.27 11.29.26 11.28.26 11.29.25 11.28.25 11.29.24 11.28.24
PCIE:DRP46 11.29.39 11.28.39 11.29.38 11.28.38 11.29.37 11.28.37 11.29.36 11.28.36 11.29.35 11.28.35 11.29.34 11.28.34 11.29.33 11.28.33 11.29.32 11.28.32
PCIE:DRP47 11.29.47 11.28.47 11.29.46 11.28.46 11.29.45 11.28.45 11.29.44 11.28.44 11.29.43 11.28.43 11.29.42 11.28.42 11.29.41 11.28.41 11.29.40 11.28.40
PCIE:DRP48 12.29.7 12.28.7 12.29.6 12.28.6 12.29.5 12.28.5 12.29.4 12.28.4 12.29.3 12.28.3 12.29.2 12.28.2 12.29.1 12.28.1 12.29.0 12.28.0
PCIE:DRP49 12.29.15 12.28.15 12.29.14 12.28.14 12.29.13 12.28.13 12.29.12 12.28.12 12.29.11 12.28.11 12.29.10 12.28.10 12.29.9 12.28.9 12.29.8 12.28.8
PCIE:DRP4A 12.29.23 12.28.23 12.29.22 12.28.22 12.29.21 12.28.21 12.29.20 12.28.20 12.29.19 12.28.19 12.29.18 12.28.18 12.29.17 12.28.17 12.29.16 12.28.16
PCIE:DRP4B 12.29.31 12.28.31 12.29.30 12.28.30 12.29.29 12.28.29 12.29.28 12.28.28 12.29.27 12.28.27 12.29.26 12.28.26 12.29.25 12.28.25 12.29.24 12.28.24
PCIE:DRP4C 12.29.39 12.28.39 12.29.38 12.28.38 12.29.37 12.28.37 12.29.36 12.28.36 12.29.35 12.28.35 12.29.34 12.28.34 12.29.33 12.28.33 12.29.32 12.28.32
PCIE:DRP4D 12.29.47 12.28.47 12.29.46 12.28.46 12.29.45 12.28.45 12.29.44 12.28.44 12.29.43 12.28.43 12.29.42 12.28.42 12.29.41 12.28.41 12.29.40 12.28.40
PCIE:DRP4E 13.29.7 13.28.7 13.29.6 13.28.6 13.29.5 13.28.5 13.29.4 13.28.4 13.29.3 13.28.3 13.29.2 13.28.2 13.29.1 13.28.1 13.29.0 13.28.0
PCIE:DRP4F 13.29.15 13.28.15 13.29.14 13.28.14 13.29.13 13.28.13 13.29.12 13.28.12 13.29.11 13.28.11 13.29.10 13.28.10 13.29.9 13.28.9 13.29.8 13.28.8
PCIE:DRP50 13.29.23 13.28.23 13.29.22 13.28.22 13.29.21 13.28.21 13.29.20 13.28.20 13.29.19 13.28.19 13.29.18 13.28.18 13.29.17 13.28.17 13.29.16 13.28.16
PCIE:DRP51 13.29.31 13.28.31 13.29.30 13.28.30 13.29.29 13.28.29 13.29.28 13.28.28 13.29.27 13.28.27 13.29.26 13.28.26 13.29.25 13.28.25 13.29.24 13.28.24
PCIE:DRP52 13.29.39 13.28.39 13.29.38 13.28.38 13.29.37 13.28.37 13.29.36 13.28.36 13.29.35 13.28.35 13.29.34 13.28.34 13.29.33 13.28.33 13.29.32 13.28.32
PCIE:DRP53 13.29.47 13.28.47 13.29.46 13.28.46 13.29.45 13.28.45 13.29.44 13.28.44 13.29.43 13.28.43 13.29.42 13.28.42 13.29.41 13.28.41 13.29.40 13.28.40
PCIE:DRP54 14.29.7 14.28.7 14.29.6 14.28.6 14.29.5 14.28.5 14.29.4 14.28.4 14.29.3 14.28.3 14.29.2 14.28.2 14.29.1 14.28.1 14.29.0 14.28.0
PCIE:DRP55 14.29.15 14.28.15 14.29.14 14.28.14 14.29.13 14.28.13 14.29.12 14.28.12 14.29.11 14.28.11 14.29.10 14.28.10 14.29.9 14.28.9 14.29.8 14.28.8
PCIE:DRP56 14.29.23 14.28.23 14.29.22 14.28.22 14.29.21 14.28.21 14.29.20 14.28.20 14.29.19 14.28.19 14.29.18 14.28.18 14.29.17 14.28.17 14.29.16 14.28.16
PCIE:DRP57 14.29.31 14.28.31 14.29.30 14.28.30 14.29.29 14.28.29 14.29.28 14.28.28 14.29.27 14.28.27 14.29.26 14.28.26 14.29.25 14.28.25 14.29.24 14.28.24
PCIE:DRP58 14.29.39 14.28.39 14.29.38 14.28.38 14.29.37 14.28.37 14.29.36 14.28.36 14.29.35 14.28.35 14.29.34 14.28.34 14.29.33 14.28.33 14.29.32 14.28.32
PCIE:DRP59 14.29.47 14.28.47 14.29.46 14.28.46 14.29.45 14.28.45 14.29.44 14.28.44 14.29.43 14.28.43 14.29.42 14.28.42 14.29.41 14.28.41 14.29.40 14.28.40
PCIE:DRP5A 15.29.7 15.28.7 15.29.6 15.28.6 15.29.5 15.28.5 15.29.4 15.28.4 15.29.3 15.28.3 15.29.2 15.28.2 15.29.1 15.28.1 15.29.0 15.28.0
PCIE:DRP5B 15.29.15 15.28.15 15.29.14 15.28.14 15.29.13 15.28.13 15.29.12 15.28.12 15.29.11 15.28.11 15.29.10 15.28.10 15.29.9 15.28.9 15.29.8 15.28.8
PCIE:DRP5C 15.29.23 15.28.23 15.29.22 15.28.22 15.29.21 15.28.21 15.29.20 15.28.20 15.29.19 15.28.19 15.29.18 15.28.18 15.29.17 15.28.17 15.29.16 15.28.16
PCIE:DRP5D 15.29.31 15.28.31 15.29.30 15.28.30 15.29.29 15.28.29 15.29.28 15.28.28 15.29.27 15.28.27 15.29.26 15.28.26 15.29.25 15.28.25 15.29.24 15.28.24
PCIE:DRP5E 15.29.39 15.28.39 15.29.38 15.28.38 15.29.37 15.28.37 15.29.36 15.28.36 15.29.35 15.28.35 15.29.34 15.28.34 15.29.33 15.28.33 15.29.32 15.28.32
PCIE:DRP5F 15.29.47 15.28.47 15.29.46 15.28.46 15.29.45 15.28.45 15.29.44 15.28.44 15.29.43 15.28.43 15.29.42 15.28.42 15.29.41 15.28.41 15.29.40 15.28.40
PCIE:DRP60 16.29.7 16.28.7 16.29.6 16.28.6 16.29.5 16.28.5 16.29.4 16.28.4 16.29.3 16.28.3 16.29.2 16.28.2 16.29.1 16.28.1 16.29.0 16.28.0
PCIE:DRP61 16.29.15 16.28.15 16.29.14 16.28.14 16.29.13 16.28.13 16.29.12 16.28.12 16.29.11 16.28.11 16.29.10 16.28.10 16.29.9 16.28.9 16.29.8 16.28.8
PCIE:DRP62 16.29.23 16.28.23 16.29.22 16.28.22 16.29.21 16.28.21 16.29.20 16.28.20 16.29.19 16.28.19 16.29.18 16.28.18 16.29.17 16.28.17 16.29.16 16.28.16
PCIE:DRP63 16.29.31 16.28.31 16.29.30 16.28.30 16.29.29 16.28.29 16.29.28 16.28.28 16.29.27 16.28.27 16.29.26 16.28.26 16.29.25 16.28.25 16.29.24 16.28.24
PCIE:DRP64 16.29.39 16.28.39 16.29.38 16.28.38 16.29.37 16.28.37 16.29.36 16.28.36 16.29.35 16.28.35 16.29.34 16.28.34 16.29.33 16.28.33 16.29.32 16.28.32
PCIE:DRP65 16.29.47 16.28.47 16.29.46 16.28.46 16.29.45 16.28.45 16.29.44 16.28.44 16.29.43 16.28.43 16.29.42 16.28.42 16.29.41 16.28.41 16.29.40 16.28.40
PCIE:DRP66 17.29.7 17.28.7 17.29.6 17.28.6 17.29.5 17.28.5 17.29.4 17.28.4 17.29.3 17.28.3 17.29.2 17.28.2 17.29.1 17.28.1 17.29.0 17.28.0
PCIE:DRP67 17.29.15 17.28.15 17.29.14 17.28.14 17.29.13 17.28.13 17.29.12 17.28.12 17.29.11 17.28.11 17.29.10 17.28.10 17.29.9 17.28.9 17.29.8 17.28.8
PCIE:DRP68 17.29.23 17.28.23 17.29.22 17.28.22 17.29.21 17.28.21 17.29.20 17.28.20 17.29.19 17.28.19 17.29.18 17.28.18 17.29.17 17.28.17 17.29.16 17.28.16
PCIE:DRP69 17.29.31 17.28.31 17.29.30 17.28.30 17.29.29 17.28.29 17.29.28 17.28.28 17.29.27 17.28.27 17.29.26 17.28.26 17.29.25 17.28.25 17.29.24 17.28.24
PCIE:DRP6A 17.29.39 17.28.39 17.29.38 17.28.38 17.29.37 17.28.37 17.29.36 17.28.36 17.29.35 17.28.35 17.29.34 17.28.34 17.29.33 17.28.33 17.29.32 17.28.32
PCIE:DRP6B 17.29.47 17.28.47 17.29.46 17.28.46 17.29.45 17.28.45 17.29.44 17.28.44 17.29.43 17.28.43 17.29.42 17.28.42 17.29.41 17.28.41 17.29.40 17.28.40
PCIE:DRP6C 18.29.7 18.28.7 18.29.6 18.28.6 18.29.5 18.28.5 18.29.4 18.28.4 18.29.3 18.28.3 18.29.2 18.28.2 18.29.1 18.28.1 18.29.0 18.28.0
PCIE:DRP6D 18.29.15 18.28.15 18.29.14 18.28.14 18.29.13 18.28.13 18.29.12 18.28.12 18.29.11 18.28.11 18.29.10 18.28.10 18.29.9 18.28.9 18.29.8 18.28.8
PCIE:DRP6E 18.29.23 18.28.23 18.29.22 18.28.22 18.29.21 18.28.21 18.29.20 18.28.20 18.29.19 18.28.19 18.29.18 18.28.18 18.29.17 18.28.17 18.29.16 18.28.16
PCIE:DRP6F 18.29.31 18.28.31 18.29.30 18.28.30 18.29.29 18.28.29 18.29.28 18.28.28 18.29.27 18.28.27 18.29.26 18.28.26 18.29.25 18.28.25 18.29.24 18.28.24
PCIE:DRP70 18.29.39 18.28.39 18.29.38 18.28.38 18.29.37 18.28.37 18.29.36 18.28.36 18.29.35 18.28.35 18.29.34 18.28.34 18.29.33 18.28.33 18.29.32 18.28.32
PCIE:DRP71 18.29.47 18.28.47 18.29.46 18.28.46 18.29.45 18.28.45 18.29.44 18.28.44 18.29.43 18.28.43 18.29.42 18.28.42 18.29.41 18.28.41 18.29.40 18.28.40
PCIE:DRP72 19.29.7 19.28.7 19.29.6 19.28.6 19.29.5 19.28.5 19.29.4 19.28.4 19.29.3 19.28.3 19.29.2 19.28.2 19.29.1 19.28.1 19.29.0 19.28.0
PCIE:DRP73 19.29.15 19.28.15 19.29.14 19.28.14 19.29.13 19.28.13 19.29.12 19.28.12 19.29.11 19.28.11 19.29.10 19.28.10 19.29.9 19.28.9 19.29.8 19.28.8
PCIE:DRP74 19.29.23 19.28.23 19.29.22 19.28.22 19.29.21 19.28.21 19.29.20 19.28.20 19.29.19 19.28.19 19.29.18 19.28.18 19.29.17 19.28.17 19.29.16 19.28.16
PCIE:DRP75 19.29.31 19.28.31 19.29.30 19.28.30 19.29.29 19.28.29 19.29.28 19.28.28 19.29.27 19.28.27 19.29.26 19.28.26 19.29.25 19.28.25 19.29.24 19.28.24
PCIE:DRP76 19.29.39 19.28.39 19.29.38 19.28.38 19.29.37 19.28.37 19.29.36 19.28.36 19.29.35 19.28.35 19.29.34 19.28.34 19.29.33 19.28.33 19.29.32 19.28.32
PCIE:DRP77 19.29.47 19.28.47 19.29.46 19.28.46 19.29.45 19.28.45 19.29.44 19.28.44 19.29.43 19.28.43 19.29.42 19.28.42 19.29.41 19.28.41 19.29.40 19.28.40
PCIE:DRP78 20.29.7 20.28.7 20.29.6 20.28.6 20.29.5 20.28.5 20.29.4 20.28.4 20.29.3 20.28.3 20.29.2 20.28.2 20.29.1 20.28.1 20.29.0 20.28.0
PCIE:DRP79 20.29.15 20.28.15 20.29.14 20.28.14 20.29.13 20.28.13 20.29.12 20.28.12 20.29.11 20.28.11 20.29.10 20.28.10 20.29.9 20.28.9 20.29.8 20.28.8
PCIE:DRP7A 20.29.23 20.28.23 20.29.22 20.28.22 20.29.21 20.28.21 20.29.20 20.28.20 20.29.19 20.28.19 20.29.18 20.28.18 20.29.17 20.28.17 20.29.16 20.28.16
PCIE:DRP7B 20.29.31 20.28.31 20.29.30 20.28.30 20.29.29 20.28.29 20.29.28 20.28.28 20.29.27 20.28.27 20.29.26 20.28.26 20.29.25 20.28.25 20.29.24 20.28.24
PCIE:DRP7C 20.29.39 20.28.39 20.29.38 20.28.38 20.29.37 20.28.37 20.29.36 20.28.36 20.29.35 20.28.35 20.29.34 20.28.34 20.29.33 20.28.33 20.29.32 20.28.32
PCIE:DRP7D 20.29.47 20.28.47 20.29.46 20.28.46 20.29.45 20.28.45 20.29.44 20.28.44 20.29.43 20.28.43 20.29.42 20.28.42 20.29.41 20.28.41 20.29.40 20.28.40
PCIE:DRP7E 21.29.7 21.28.7 21.29.6 21.28.6 21.29.5 21.28.5 21.29.4 21.28.4 21.29.3 21.28.3 21.29.2 21.28.2 21.29.1 21.28.1 21.29.0 21.28.0
PCIE:DRP7F 21.29.15 21.28.15 21.29.14 21.28.14 21.29.13 21.28.13 21.29.12 21.28.12 21.29.11 21.28.11 21.29.10 21.28.10 21.29.9 21.28.9 21.29.8 21.28.8
PCIE:DRP80 21.29.23 21.28.23 21.29.22 21.28.22 21.29.21 21.28.21 21.29.20 21.28.20 21.29.19 21.28.19 21.29.18 21.28.18 21.29.17 21.28.17 21.29.16 21.28.16
PCIE:DRP81 21.29.31 21.28.31 21.29.30 21.28.30 21.29.29 21.28.29 21.29.28 21.28.28 21.29.27 21.28.27 21.29.26 21.28.26 21.29.25 21.28.25 21.29.24 21.28.24
PCIE:DRP82 21.29.39 21.28.39 21.29.38 21.28.38 21.29.37 21.28.37 21.29.36 21.28.36 21.29.35 21.28.35 21.29.34 21.28.34 21.29.33 21.28.33 21.29.32 21.28.32
PCIE:DRP83 21.29.47 21.28.47 21.29.46 21.28.46 21.29.45 21.28.45 21.29.44 21.28.44 21.29.43 21.28.43 21.29.42 21.28.42 21.29.41 21.28.41 21.29.40 21.28.40
PCIE:DRP84 22.29.7 22.28.7 22.29.6 22.28.6 22.29.5 22.28.5 22.29.4 22.28.4 22.29.3 22.28.3 22.29.2 22.28.2 22.29.1 22.28.1 22.29.0 22.28.0
PCIE:DRP85 22.29.15 22.28.15 22.29.14 22.28.14 22.29.13 22.28.13 22.29.12 22.28.12 22.29.11 22.28.11 22.29.10 22.28.10 22.29.9 22.28.9 22.29.8 22.28.8
PCIE:DRP86 22.29.23 22.28.23 22.29.22 22.28.22 22.29.21 22.28.21 22.29.20 22.28.20 22.29.19 22.28.19 22.29.18 22.28.18 22.29.17 22.28.17 22.29.16 22.28.16
PCIE:DRP87 22.29.31 22.28.31 22.29.30 22.28.30 22.29.29 22.28.29 22.29.28 22.28.28 22.29.27 22.28.27 22.29.26 22.28.26 22.29.25 22.28.25 22.29.24 22.28.24
PCIE:DRP88 22.29.39 22.28.39 22.29.38 22.28.38 22.29.37 22.28.37 22.29.36 22.28.36 22.29.35 22.28.35 22.29.34 22.28.34 22.29.33 22.28.33 22.29.32 22.28.32
PCIE:DRP89 22.29.47 22.28.47 22.29.46 22.28.46 22.29.45 22.28.45 22.29.44 22.28.44 22.29.43 22.28.43 22.29.42 22.28.42 22.29.41 22.28.41 22.29.40 22.28.40
PCIE:DRP8A 23.29.7 23.28.7 23.29.6 23.28.6 23.29.5 23.28.5 23.29.4 23.28.4 23.29.3 23.28.3 23.29.2 23.28.2 23.29.1 23.28.1 23.29.0 23.28.0
PCIE:DRP8B 23.29.15 23.28.15 23.29.14 23.28.14 23.29.13 23.28.13 23.29.12 23.28.12 23.29.11 23.28.11 23.29.10 23.28.10 23.29.9 23.28.9 23.29.8 23.28.8
PCIE:DRP8C 23.29.23 23.28.23 23.29.22 23.28.22 23.29.21 23.28.21 23.29.20 23.28.20 23.29.19 23.28.19 23.29.18 23.28.18 23.29.17 23.28.17 23.29.16 23.28.16
PCIE:DRP8D 23.29.31 23.28.31 23.29.30 23.28.30 23.29.29 23.28.29 23.29.28 23.28.28 23.29.27 23.28.27 23.29.26 23.28.26 23.29.25 23.28.25 23.29.24 23.28.24
PCIE:DRP8E 23.29.39 23.28.39 23.29.38 23.28.38 23.29.37 23.28.37 23.29.36 23.28.36 23.29.35 23.28.35 23.29.34 23.28.34 23.29.33 23.28.33 23.29.32 23.28.32
PCIE:DRP8F 23.29.47 23.28.47 23.29.46 23.28.46 23.29.45 23.28.45 23.29.44 23.28.44 23.29.43 23.28.43 23.29.42 23.28.42 23.29.41 23.28.41 23.29.40 23.28.40
PCIE:DRP90 24.29.7 24.28.7 24.29.6 24.28.6 24.29.5 24.28.5 24.29.4 24.28.4 24.29.3 24.28.3 24.29.2 24.28.2 24.29.1 24.28.1 24.29.0 24.28.0
PCIE:DRP91 24.29.15 24.28.15 24.29.14 24.28.14 24.29.13 24.28.13 24.29.12 24.28.12 24.29.11 24.28.11 24.29.10 24.28.10 24.29.9 24.28.9 24.29.8 24.28.8
PCIE:DRP92 24.29.23 24.28.23 24.29.22 24.28.22 24.29.21 24.28.21 24.29.20 24.28.20 24.29.19 24.28.19 24.29.18 24.28.18 24.29.17 24.28.17 24.29.16 24.28.16
PCIE:DRP93 24.29.31 24.28.31 24.29.30 24.28.30 24.29.29 24.28.29 24.29.28 24.28.28 24.29.27 24.28.27 24.29.26 24.28.26 24.29.25 24.28.25 24.29.24 24.28.24
PCIE:DRP94 24.29.39 24.28.39 24.29.38 24.28.38 24.29.37 24.28.37 24.29.36 24.28.36 24.29.35 24.28.35 24.29.34 24.28.34 24.29.33 24.28.33 24.29.32 24.28.32
PCIE:DRP95 24.29.47 24.28.47 24.29.46 24.28.46 24.29.45 24.28.45 24.29.44 24.28.44 24.29.43 24.28.43 24.29.42 24.28.42 24.29.41 24.28.41 24.29.40 24.28.40
PCIE:DSN_CAP_ID 5.29.7 5.28.7 5.29.6 5.28.6 5.29.5 5.28.5 5.29.4 5.28.4 5.29.3 5.28.3 5.29.2 5.28.2 5.29.1 5.28.1 5.29.0 5.28.0
PCIE:RBAR_CAP_ID 10.29.23 10.28.23 10.29.22 10.28.22 10.29.21 10.28.21 10.29.20 10.28.20 10.29.19 10.28.19 10.29.18 10.28.18 10.29.17 10.28.17 10.29.16 10.28.16
PCIE:VC_CAP_ID 14.29.7 14.28.7 14.29.6 14.28.6 14.29.5 14.28.5 14.29.4 14.28.4 14.29.3 14.28.3 14.29.2 14.28.2 14.29.1 14.28.1 14.29.0 14.28.0
PCIE:VSEC_CAP_HDR_ID 14.29.23 14.28.23 14.29.22 14.28.22 14.29.21 14.28.21 14.29.20 14.28.20 14.29.19 14.28.19 14.29.18 14.28.18 14.29.17 14.28.17 14.29.16 14.28.16
PCIE:VSEC_CAP_ID 14.29.39 14.28.39 14.29.38 14.28.38 14.29.37 14.28.37 14.29.36 14.28.36 14.29.35 14.28.35 14.29.34 14.28.34 14.29.33 14.28.33 14.29.32 14.28.32
non-inverted [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT 1.29.3 1.28.3 1.29.2 1.28.2 1.29.1 1.28.1 1.29.0 1.28.0 0.29.47 0.28.47 0.29.46 0.28.46 0.29.45 0.28.45 0.29.44 0.28.44 0.29.43 0.28.43 0.29.42 0.28.42 0.29.41 0.28.41 0.29.40 0.28.40
PCIE:CLASS_CODE 4.29.11 4.28.11 4.29.10 4.28.10 4.29.9 4.28.9 4.29.8 4.28.8 4.29.7 4.28.7 4.29.6 4.28.6 4.29.5 4.28.5 4.29.4 4.28.4 4.29.3 4.28.3 4.29.2 4.28.2 4.29.1 4.28.1 4.29.0 4.28.0
non-inverted [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:AER_CAP_VERSION 0.28.18 0.29.17 0.28.17 0.29.16
PCIE:CPL_TIMEOUT_RANGES_SUPPORTED 4.29.14 4.28.14 4.29.13 4.28.13
PCIE:DSN_CAP_VERSION 5.29.17 5.28.17 5.29.16 5.28.16
PCIE:LINK_CAP_MAX_LINK_SPEED 6.29.14 6.28.14 6.29.13 6.28.13
PCIE:LINK_CTRL2_TARGET_LINK_SPEED 6.29.19 6.28.19 6.29.18 6.28.18
PCIE:PCIE_CAP_CAPABILITY_VERSION 8.29.17 8.28.17 8.29.16 8.28.16
PCIE:PCIE_CAP_DEVICE_PORT_TYPE 8.29.19 8.28.19 8.29.18 8.28.18
PCIE:PCIE_REVISION 8.29.27 8.28.27 8.29.26 8.28.26
PCIE:RBAR_CAP_VERSION 10.29.25 10.28.25 10.29.24 10.28.24
PCIE:VC_CAP_VERSION 17.28.10 17.29.9 17.28.9 17.29.8
PCIE:VSEC_CAP_HDR_REVISION 14.29.31 14.28.31 14.29.30 14.28.30
PCIE:VSEC_CAP_VERSION 15.29.1 15.28.1 15.29.0 15.28.0
non-inverted [3] [2] [1] [0]
PCIE:BAR0 1.29.23 1.28.23 1.29.22 1.28.22 1.29.21 1.28.21 1.29.20 1.28.20 1.29.19 1.28.19 1.29.18 1.28.18 1.29.17 1.28.17 1.29.16 1.28.16 1.29.15 1.28.15 1.29.14 1.28.14 1.29.13 1.28.13 1.29.12 1.28.12 1.29.11 1.28.11 1.29.10 1.28.10 1.29.9 1.28.9 1.29.8 1.28.8
PCIE:BAR1 1.29.39 1.28.39 1.29.38 1.28.38 1.29.37 1.28.37 1.29.36 1.28.36 1.29.35 1.28.35 1.29.34 1.28.34 1.29.33 1.28.33 1.29.32 1.28.32 1.29.31 1.28.31 1.29.30 1.28.30 1.29.29 1.28.29 1.29.28 1.28.28 1.29.27 1.28.27 1.29.26 1.28.26 1.29.25 1.28.25 1.29.24 1.28.24
PCIE:BAR2 2.29.7 2.28.7 2.29.6 2.28.6 2.29.5 2.28.5 2.29.4 2.28.4 2.29.3 2.28.3 2.29.2 2.28.2 2.29.1 2.28.1 2.29.0 2.28.0 1.29.47 1.28.47 1.29.46 1.28.46 1.29.45 1.28.45 1.29.44 1.28.44 1.29.43 1.28.43 1.29.42 1.28.42 1.29.41 1.28.41 1.29.40 1.28.40
PCIE:BAR3 2.29.23 2.28.23 2.29.22 2.28.22 2.29.21 2.28.21 2.29.20 2.28.20 2.29.19 2.28.19 2.29.18 2.28.18 2.29.17 2.28.17 2.29.16 2.28.16 2.29.15 2.28.15 2.29.14 2.28.14 2.29.13 2.28.13 2.29.12 2.28.12 2.29.11 2.28.11 2.29.10 2.28.10 2.29.9 2.28.9 2.29.8 2.28.8
PCIE:BAR4 2.29.39 2.28.39 2.29.38 2.28.38 2.29.37 2.28.37 2.29.36 2.28.36 2.29.35 2.28.35 2.29.34 2.28.34 2.29.33 2.28.33 2.29.32 2.28.32 2.29.31 2.28.31 2.29.30 2.28.30 2.29.29 2.28.29 2.29.28 2.28.28 2.29.27 2.28.27 2.29.26 2.28.26 2.29.25 2.28.25 2.29.24 2.28.24
PCIE:BAR5 3.29.7 3.28.7 3.29.6 3.28.6 3.29.5 3.28.5 3.29.4 3.28.4 3.29.3 3.28.3 3.29.2 3.28.2 3.29.1 3.28.1 3.29.0 3.28.0 2.29.47 2.28.47 2.29.46 2.28.46 2.29.45 2.28.45 2.29.44 2.28.44 2.29.43 2.28.43 2.29.42 2.28.42 2.29.41 2.28.41 2.29.40 2.28.40
PCIE:CARDBUS_CIS_POINTER 3.29.47 3.28.47 3.29.46 3.28.46 3.29.45 3.28.45 3.29.44 3.28.44 3.29.43 3.28.43 3.29.42 3.28.42 3.29.41 3.28.41 3.29.40 3.28.40 3.29.39 3.28.39 3.29.38 3.28.38 3.29.37 3.28.37 3.29.36 3.28.36 3.29.35 3.28.35 3.29.34 3.28.34 3.29.33 3.28.33 3.29.32 3.28.32
PCIE:EXPANSION_ROM 3.29.23 3.28.23 3.29.22 3.28.22 3.29.21 3.28.21 3.29.20 3.28.20 3.29.19 3.28.19 3.29.18 3.28.18 3.29.17 3.28.17 3.29.16 3.28.16 3.29.15 3.28.15 3.29.14 3.28.14 3.29.13 3.28.13 3.29.12 3.28.12 3.29.11 3.28.11 3.29.10 3.28.10 3.29.9 3.28.9 3.29.8 3.28.8
PCIE:RBAR_CAP_SUP0 10.29.47 10.28.47 10.29.46 10.28.46 10.29.45 10.28.45 10.29.44 10.28.44 10.29.43 10.28.43 10.29.42 10.28.42 10.29.41 10.28.41 10.29.40 10.28.40 10.29.39 10.28.39 10.29.38 10.28.38 10.29.37 10.28.37 10.29.36 10.28.36 10.29.35 10.28.35 10.29.34 10.28.34 10.29.33 10.28.33 10.29.32 10.28.32
PCIE:RBAR_CAP_SUP1 11.29.15 11.28.15 11.29.14 11.28.14 11.29.13 11.28.13 11.29.12 11.28.12 11.29.11 11.28.11 11.29.10 11.28.10 11.29.9 11.28.9 11.29.8 11.28.8 11.29.7 11.28.7 11.29.6 11.28.6 11.29.5 11.28.5 11.29.4 11.28.4 11.29.3 11.28.3 11.29.2 11.28.2 11.29.1 11.28.1 11.29.0 11.28.0
PCIE:RBAR_CAP_SUP2 11.29.31 11.28.31 11.29.30 11.28.30 11.29.29 11.28.29 11.29.28 11.28.28 11.29.27 11.28.27 11.29.26 11.28.26 11.29.25 11.28.25 11.29.24 11.28.24 11.29.23 11.28.23 11.29.22 11.28.22 11.29.21 11.28.21 11.29.20 11.28.20 11.29.19 11.28.19 11.29.18 11.28.18 11.29.17 11.28.17 11.29.16 11.28.16
PCIE:RBAR_CAP_SUP3 11.29.47 11.28.47 11.29.46 11.28.46 11.29.45 11.28.45 11.29.44 11.28.44 11.29.43 11.28.43 11.29.42 11.28.42 11.29.41 11.28.41 11.29.40 11.28.40 11.29.39 11.28.39 11.29.38 11.28.38 11.29.37 11.28.37 11.29.36 11.28.36 11.29.35 11.28.35 11.29.34 11.28.34 11.29.33 11.28.33 11.29.32 11.28.32
PCIE:RBAR_CAP_SUP4 12.29.15 12.28.15 12.29.14 12.28.14 12.29.13 12.28.13 12.29.12 12.28.12 12.29.11 12.28.11 12.29.10 12.28.10 12.29.9 12.28.9 12.29.8 12.28.8 12.29.7 12.28.7 12.29.6 12.28.6 12.29.5 12.28.5 12.29.4 12.28.4 12.29.3 12.28.3 12.29.2 12.28.2 12.29.1 12.28.1 12.29.0 12.28.0
PCIE:RBAR_CAP_SUP5 12.29.31 12.28.31 12.29.30 12.28.30 12.29.29 12.28.29 12.29.28 12.28.28 12.29.27 12.28.27 12.29.26 12.28.26 12.29.25 12.28.25 12.29.24 12.28.24 12.29.23 12.28.23 12.29.22 12.28.22 12.29.21 12.28.21 12.29.20 12.28.20 12.29.19 12.28.19 12.29.18 12.28.18 12.29.17 12.28.17 12.29.16 12.28.16
PCIE:SPARE_WORD0 19.29.15 19.28.15 19.29.14 19.28.14 19.29.13 19.28.13 19.29.12 19.28.12 19.29.11 19.28.11 19.29.10 19.28.10 19.29.9 19.28.9 19.29.8 19.28.8 19.29.7 19.28.7 19.29.6 19.28.6 19.29.5 19.28.5 19.29.4 19.28.4 19.29.3 19.28.3 19.29.2 19.28.2 19.29.1 19.28.1 19.29.0 19.28.0
PCIE:SPARE_WORD1 19.29.31 19.28.31 19.29.30 19.28.30 19.29.29 19.28.29 19.29.28 19.28.28 19.29.27 19.28.27 19.29.26 19.28.26 19.29.25 19.28.25 19.29.24 19.28.24 19.29.23 19.28.23 19.29.22 19.28.22 19.29.21 19.28.21 19.29.20 19.28.20 19.29.19 19.28.19 19.29.18 19.28.18 19.29.17 19.28.17 19.29.16 19.28.16
PCIE:SPARE_WORD2 19.29.47 19.28.47 19.29.46 19.28.46 19.29.45 19.28.45 19.29.44 19.28.44 19.29.43 19.28.43 19.29.42 19.28.42 19.29.41 19.28.41 19.29.40 19.28.40 19.29.39 19.28.39 19.29.38 19.28.38 19.29.37 19.28.37 19.29.36 19.28.36 19.29.35 19.28.35 19.29.34 19.28.34 19.29.33 19.28.33 19.29.32 19.28.32
PCIE:SPARE_WORD3 20.29.15 20.28.15 20.29.14 20.28.14 20.29.13 20.28.13 20.29.12 20.28.12 20.29.11 20.28.11 20.29.10 20.28.10 20.29.9 20.28.9 20.29.8 20.28.8 20.29.7 20.28.7 20.29.6 20.28.6 20.29.5 20.28.5 20.29.4 20.28.4 20.29.3 20.28.3 20.29.2 20.28.2 20.29.1 20.28.1 20.29.0 20.28.0
non-inverted [31] [30] [29] [28] [27] [26] [25] [24] [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:CAPABILITIES_PTR 3.29.27 3.28.27 3.29.26 3.28.26 3.29.25 3.28.25 3.29.24 3.28.24
PCIE:DNSTREAM_LINK_NUM 16.29.39 16.28.39 16.29.38 16.28.38 16.29.37 16.28.37 16.29.36 16.28.36
PCIE:HEADER_TYPE 5.29.35 5.28.35 5.29.34 5.28.34 5.29.33 5.28.33 5.29.32 5.28.32
PCIE:INTERRUPT_PIN 5.29.39 5.28.39 5.29.38 5.28.38 5.29.37 5.28.37 5.29.36 5.28.36
PCIE:MSIX_BASE_PTR 7.29.3 7.28.3 7.29.2 7.28.2 7.29.1 7.28.1 7.29.0 7.28.0
PCIE:MSIX_CAP_ID 7.29.7 7.28.7 7.29.6 7.28.6 7.29.5 7.28.5 7.29.4 7.28.4
PCIE:MSIX_CAP_NEXTPTR 7.29.11 7.28.11 7.29.10 7.28.10 7.29.9 7.28.9 7.29.8 7.28.8
PCIE:MSI_BASE_PTR 6.29.27 6.28.27 6.29.26 6.28.26 6.29.25 6.28.25 6.29.24 6.28.24
PCIE:MSI_CAP_ID 6.29.35 6.28.35 6.29.34 6.28.34 6.29.33 6.28.33 6.29.32 6.28.32
PCIE:MSI_CAP_NEXTPTR 6.29.43 6.28.43 6.29.42 6.28.42 6.29.41 6.28.41 6.29.40 6.28.40
PCIE:N_FTS_COMCLK_GEN1 16.29.19 16.28.19 16.29.18 16.28.18 16.29.17 16.28.17 16.29.16 16.28.16
PCIE:N_FTS_COMCLK_GEN2 16.29.23 16.28.23 16.29.22 16.28.22 16.29.21 16.28.21 16.29.20 16.28.20
PCIE:N_FTS_GEN1 16.29.27 16.28.27 16.29.26 16.28.26 16.29.25 16.28.25 16.29.24 16.28.24
PCIE:N_FTS_GEN2 16.29.31 16.28.31 16.29.30 16.28.30 16.29.29 16.28.29 16.29.28 16.28.28
PCIE:PCIE_BASE_PTR 8.29.11 8.28.11 8.29.10 8.28.10 8.29.9 8.28.9 8.29.8 8.28.8
PCIE:PCIE_CAP_CAPABILITY_ID 8.29.15 8.28.15 8.29.14 8.28.14 8.29.13 8.28.13 8.29.12 8.28.12
PCIE:PCIE_CAP_NEXTPTR 8.29.23 8.28.23 8.29.22 8.28.22 8.29.21 8.28.21 8.29.20 8.28.20
PCIE:PM_BASE_PTR 8.29.31 8.28.31 8.29.30 8.28.30 8.29.29 8.28.29 8.29.28 8.28.28
PCIE:PM_CAP_ID 8.29.38 8.28.38 8.29.37 8.28.37 8.29.36 8.28.36 8.29.35 8.28.35
PCIE:PM_CAP_NEXTPTR 8.29.43 8.28.43 8.29.42 8.28.42 8.29.41 8.28.41 8.29.40 8.28.40
PCIE:PM_DATA0 9.29.14 9.28.14 9.29.13 9.28.13 9.29.12 9.28.12 9.29.11 9.28.11
PCIE:PM_DATA1 9.29.19 9.28.19 9.29.18 9.28.18 9.29.17 9.28.17 9.29.16 9.28.16
PCIE:PM_DATA2 9.29.23 9.28.23 9.29.22 9.28.22 9.29.21 9.28.21 9.29.20 9.28.20
PCIE:PM_DATA3 9.29.27 9.28.27 9.29.26 9.28.26 9.29.25 9.28.25 9.29.24 9.28.24
PCIE:PM_DATA4 9.29.31 9.28.31 9.29.30 9.28.30 9.29.29 9.28.29 9.29.28 9.28.28
PCIE:PM_DATA5 9.29.35 9.28.35 9.29.34 9.28.34 9.29.33 9.28.33 9.29.32 9.28.32
PCIE:PM_DATA6 9.29.39 9.28.39 9.29.38 9.28.38 9.29.37 9.28.37 9.29.36 9.28.36
PCIE:PM_DATA7 9.29.43 9.28.43 9.29.42 9.28.42 9.29.41 9.28.41 9.29.40 9.28.40
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE 13.29.28 13.28.28 13.29.27 13.28.27 13.29.26 13.28.26 13.29.25 13.28.25
PCIE:SPARE_BYTE0 18.29.35 18.28.35 18.29.34 18.28.34 18.29.33 18.28.33 18.29.32 18.28.32
PCIE:SPARE_BYTE1 18.29.39 18.28.39 18.29.38 18.28.38 18.29.37 18.28.37 18.29.36 18.28.36
PCIE:SPARE_BYTE2 18.29.43 18.28.43 18.29.42 18.28.42 18.29.41 18.28.41 18.29.40 18.28.40
PCIE:SPARE_BYTE3 18.29.47 18.28.47 18.29.46 18.28.46 18.29.45 18.28.45 18.29.44 18.28.44
non-inverted [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:CFG_ECRC_ERR_CPLSTAT 18.29.16 18.28.16
PCIE:DEV_CAP2_MAX_ENDEND_TLP_PREFIXES 4.28.21 4.29.20
PCIE:DEV_CAP2_TPH_COMPLETER_SUPPORTED 4.28.19 4.29.18
PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT 4.28.30 4.29.29
PCIE:DEV_CAP_RSVD_17_16 4.28.34 4.29.33
PCIE:LINK_CAP_ASPM_SUPPORT 5.29.46 5.28.46
PCIE:LL_ACK_TIMEOUT_FUNC 15.29.16 15.28.16
PCIE:LL_REPLAY_TIMEOUT_FUNC 15.29.32 15.28.32
PCIE:PCIE_CAP_RSVD_15_14 8.28.25 8.29.24
PCIE:PM_ASPML0S_TIMEOUT_FUNC 16.29.0 16.28.0
PCIE:PM_DATA_SCALE0 9.29.3 9.28.3
PCIE:PM_DATA_SCALE1 9.29.4 9.28.4
PCIE:PM_DATA_SCALE2 9.29.5 9.28.5
PCIE:PM_DATA_SCALE3 9.29.6 9.28.6
PCIE:PM_DATA_SCALE4 9.29.7 9.28.7
PCIE:PM_DATA_SCALE5 9.29.8 9.28.8
PCIE:PM_DATA_SCALE6 9.29.9 9.28.9
PCIE:PM_DATA_SCALE7 9.29.10 9.28.10
PCIE:RECRC_CHK 18.29.14 18.28.14
PCIE:RP_AUTO_SPD 18.28.21 18.29.20
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE 13.29.24 13.28.24
PCIE:TL_RX_RAM_RDATA_LATENCY 17.29.1 17.28.1
PCIE:TL_TX_RAM_RDATA_LATENCY 17.29.7 17.28.7
non-inverted [1] [0]
PCIE:CRM_MODULE_RSTS 15.29.6 15.28.6 15.29.5 15.28.5 15.29.4 15.28.4 15.29.3
PCIE:VC0_TOTAL_CREDITS_CH 17.28.35 17.29.34 17.28.34 17.29.33 17.28.33 17.29.32 17.28.32
PCIE:VC0_TOTAL_CREDITS_NPH 17.29.38 17.28.38 17.29.37 17.28.37 17.29.36 17.28.36 17.29.35
PCIE:VC0_TOTAL_CREDITS_PH 18.28.11 18.29.10 18.28.10 18.29.9 18.28.9 18.29.8 18.28.8
non-inverted [6] [5] [4] [3] [2] [1] [0]
PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY 4.28.25 4.29.24 4.28.24
PCIE:DEV_CAP_ENDPOINT_L1_LATENCY 4.29.26 4.28.26 4.29.25
PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED 4.28.29 4.29.28 4.28.28
PCIE:DEV_CAP_RSVD_14_12 4.28.33 4.29.32 4.28.32
PCIE:DEV_CAP_RSVD_31_29 4.29.35 4.28.35 4.29.34
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 6.28.1 6.29.0 6.28.0
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 6.29.2 6.28.2 6.29.1
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1 6.28.4 6.29.3 6.28.3
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2 6.29.5 6.28.5 6.29.4
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 6.28.7 6.29.6 6.28.6
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 6.28.9 6.29.8 6.28.8
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1 6.29.10 6.28.10 6.29.9
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2 6.28.12 6.29.11 6.28.11
PCIE:MSIX_CAP_PBA_BIR 7.29.13 7.28.13 7.29.12
PCIE:MSIX_CAP_TABLE_BIR 7.29.31 7.28.31 7.29.30
PCIE:MSI_CAP_MULTIMSGCAP 6.29.37 6.28.37 6.29.36
PCIE:PL_AUTO_CONFIG 16.29.33 16.28.33 16.29.32
PCIE:PM_CAP_AUXCURRENT 8.28.33 8.29.32 8.28.32
PCIE:PM_CAP_VERSION 9.28.1 9.29.0 9.28.0
PCIE:RBAR_CAP_INDEX0 12.28.33 12.29.32 12.28.32
PCIE:RBAR_CAP_INDEX1 12.29.34 12.28.34 12.29.33
PCIE:RBAR_CAP_INDEX2 12.28.36 12.29.35 12.28.35
PCIE:RBAR_CAP_INDEX3 12.29.37 12.28.37 12.29.36
PCIE:RBAR_CAP_INDEX4 12.28.39 12.29.38 12.28.38
PCIE:RBAR_CAP_INDEX5 12.28.41 12.29.40 12.28.40
PCIE:RBAR_NUM 10.28.27 10.29.26 10.28.26
PCIE:USER_CLK_FREQ 15.28.3 15.29.2 15.28.2
non-inverted [2] [1] [0]
PCIE:ENABLE_MSG_ROUTE 16.29.47 16.28.47 16.29.46 16.28.46 16.29.45 16.28.45 16.29.44 16.28.44 16.29.43 16.28.43 16.29.42
PCIE:MSIX_CAP_TABLE_SIZE 8.28.5 8.29.4 8.28.4 8.29.3 8.28.3 8.29.2 8.28.2 8.29.1 8.28.1 8.29.0 8.28.0
PCIE:VC0_TOTAL_CREDITS_CD 17.28.29 17.29.28 17.28.28 17.29.27 17.28.27 17.29.26 17.28.26 17.29.25 17.28.25 17.29.24 17.28.24
PCIE:VC0_TOTAL_CREDITS_NPD 17.28.45 17.29.44 17.28.44 17.29.43 17.28.43 17.29.42 17.28.42 17.29.41 17.28.41 17.29.40 17.28.40
PCIE:VC0_TOTAL_CREDITS_PD 18.28.5 18.29.4 18.28.4 18.29.3 18.28.3 18.29.2 18.28.2 18.29.1 18.28.1 18.29.0 18.28.0
non-inverted [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:EXT_CFG_CAP_PTR 5.29.20 5.28.20 5.29.19 5.28.19 5.29.18 5.28.18
PCIE:LINK_CAP_MAX_LINK_WIDTH 16.29.10 16.28.10 16.29.9 16.28.9 16.29.8 16.28.8
PCIE:LTSSM_MAX_LINK_WIDTH 16.29.13 16.28.13 16.29.12 16.28.12 16.29.11 16.28.11
non-inverted [5] [4] [3] [2] [1] [0]
PCIE:EXT_CFG_XP_CAP_PTR 5.29.28 5.28.28 5.29.27 5.28.27 5.29.26 5.28.26 5.29.25 5.28.25 5.29.24 5.28.24
PCIE:LAST_CONFIG_DWORD 5.29.45 5.28.45 5.29.44 5.28.44 5.29.43 5.28.43 5.29.42 5.28.42 5.29.41 5.28.41
non-inverted [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:INFER_EI 16.28.5 16.29.4 16.28.4 16.29.3 16.28.3
PCIE:PM_CAP_PMESUPPORT 8.28.47 8.29.46 8.28.46 8.29.45 8.28.45
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0 12.29.43 12.28.43 12.29.42 12.28.42 12.29.41
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1 12.28.46 12.29.45 12.28.45 12.29.44 12.28.44
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2 13.28.2 13.29.1 13.28.1 13.29.0 13.28.0
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3 13.29.4 13.28.4 13.29.3 13.28.3 13.29.2
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4 13.28.7 13.29.6 13.28.6 13.29.5 13.28.5
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5 13.28.10 13.29.9 13.28.9 13.29.8 13.28.8
PCIE:RP_AUTO_SPD_LOOPCNT 18.29.23 18.28.23 18.29.22 18.28.22 18.29.21
PCIE:VC0_TX_LASTPACKET 18.29.13 18.28.13 18.29.12 18.28.12 18.29.11
non-inverted [4] [3] [2] [1] [0]
PCIE:LL_ACK_TIMEOUT 15.28.15 15.29.14 15.28.14 15.29.13 15.28.13 15.29.12 15.28.12 15.29.11 15.28.11 15.29.10 15.28.10 15.29.9 15.28.9 15.29.8 15.28.8
PCIE:LL_REPLAY_TIMEOUT 15.28.31 15.29.30 15.28.30 15.29.29 15.28.29 15.29.28 15.28.28 15.29.27 15.28.27 15.29.26 15.28.26 15.29.25 15.28.25 15.29.24 15.28.24
PCIE:PM_ASPML0S_TIMEOUT 15.28.47 15.29.46 15.28.46 15.29.45 15.28.45 15.29.44 15.28.44 15.29.43 15.28.43 15.29.42 15.28.42 15.29.41 15.28.41 15.29.40 15.28.40
non-inverted [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:MSIX_CAP_PBA_OFFSET 7.28.30 7.29.29 7.28.29 7.29.28 7.28.28 7.29.27 7.28.27 7.29.26 7.28.26 7.29.25 7.28.25 7.29.24 7.28.24 7.29.23 7.28.23 7.29.22 7.28.22 7.29.21 7.28.21 7.29.20 7.28.20 7.29.19 7.28.19 7.29.18 7.28.18 7.29.17 7.28.17 7.29.16 7.28.16
PCIE:MSIX_CAP_TABLE_OFFSET 7.28.46 7.29.45 7.28.45 7.29.44 7.28.44 7.29.43 7.28.43 7.29.42 7.28.42 7.29.41 7.28.41 7.29.40 7.28.40 7.29.39 7.28.39 7.29.38 7.28.38 7.29.37 7.28.37 7.29.36 7.28.36 7.29.35 7.28.35 7.29.34 7.28.34 7.29.33 7.28.33 7.29.32 7.28.32
non-inverted [28] [27] [26] [25] [24] [23] [22] [21] [20] [19] [18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM 13.28.22 13.29.21 13.28.21 13.29.20 13.28.20 13.29.19 13.28.19 13.29.18 13.28.18 13.29.17 13.28.17 13.29.16 13.28.16
PCIE:VC0_RX_RAM_LIMIT 17.28.22 17.29.21 17.28.21 17.29.20 17.28.20 17.29.19 17.28.19 17.29.18 17.28.18 17.29.17 17.28.17 17.29.16 17.28.16
non-inverted [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]