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Corners

CNR.BL

spartanxl CNR.BL bittile 0
BitFrame
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 - - - - - - - - - - ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.0 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.S.0 ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 ~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.W.2 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 - - ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.S.0 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 ~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2
11 MD1:PULL[1] MD1:PULL[0] - - - - - ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] INT:MUX.IO.DBUF.V1[0] - - - - ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S ~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 - - - - - ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 - - ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S
10 - - - - - - - - - - INT:MUX.IO.DBUF.V1[3] - - - - INT:MUX.LONG.H5[2] - ~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 - INT:MUX.LONG.H5[1] - - INT:MUX.LONG.H4[1] ~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S - -
9 - - - - - - - - - - - - ~INT:BUF.LONG.H3.0.LONG.IO.V1 - - ~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.V1 - ~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 - ~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 INT:MUX.LONG.H5[0] - ~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.V1 ~INT:PASS.DOUBLE.H1.0.0.OUT.RDBK.DATA INT:MUX.LONG.H4[2] INT:MUX.LONG.H4[0]
8 - - - - - - - - - - - - ~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.S.0 ~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.V1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.S.0 - ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 - ~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.W.2 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 - ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2
7 - - - MD1:5V_TOLERANT_IO MD0:5V_TOLERANT_IO MD2:5V_TOLERANT_IO INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[2] INT:MUX.IO.DBUF.V0[3] INT:MUX.LONG.IO.V3[4] INT:MUX.LONG.IO.V2[4] ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 ~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.W.2 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 - - ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 ~INT:PASS.SINGLE.H5.0.OUT.RDBK.DATA ~INT:PASS.SINGLE.H1.0.OUT.RDBK.DATA ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S
6 - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - INT:MUX.IMUX.BUFG.V[5] ~RDBK:ENABLE INT:MUX.LONG.IO.V0[3] INT:MUX.LONG.IO.V0[1] INT:MUX.LONG.IO.V0[0] INT:MUX.LONG.IO.V0[2] INT:MUX.IMUX.RDBK.TRIG[0] INT:MUX.IMUX.RDBK.TRIG[1] INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[2] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[4] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V3[0] INT:MUX.LONG.IO.V3[2] INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V3[3] - - - - INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[3]
4 - MD0:PULL[1] MD0:PULL[0] INT:MUX.IMUX.BUFG.V[0] INT:MUX.LONG.IO.H1[0] INT:MUX.IMUX.BUFG.V[6] INT:MUX.LONG.IO.H1[1] INT:MUX.IMUX.BUFG.V[1] INT:MUX.LONG.IO.H3[1] INT:MUX.LONG.IO.H3[0] ~MISC:READ_ABORT INT:MUX.LONG.IO.H0[0] ~MISC:READ_CAPTURE INT:MUX.LONG.IO.H0[1] INT:MUX.IMUX.BUFG.V[2] INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[0] INT:MUX.IMUX.BUFG.V[3] ~MISC:TM_BOT INT:MUX.IMUX.RDBK.TRIG[2] INT:MUX.IMUX.RDBK.TRIG[3] - - - - -
3 - - - - - - - - - - - - - - - - - - ~BUFGLS.V:CLK_EN INT:MUX.IMUX.BUFG.V[4] - - INT:MUX.IMUX.BUFG.H[0] INT:MUX.IMUX.BUFG.H[6] INT:MUX.IMUX.BUFG.H[3] INT:MUX.IMUX.BUFG.H[4]
2 - - - - - - - - - - - - - - - - - - ~BUFGLS.V:ALT_PAD ~BUFGLS.H:CLK_EN ~BUFGLS.H:ALT_PAD MD2:PULL[1] MD2:PULL[0] INT:MUX.IMUX.BUFG.H[5] INT:MUX.IMUX.BUFG.H[2] INT:MUX.IMUX.BUFG.H[1]
1 - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - -
BUFGLS.H:ALT_PAD 0.5.2
BUFGLS.H:CLK_EN 0.6.2
BUFGLS.V:ALT_PAD 0.7.2
BUFGLS.V:CLK_EN 0.7.3
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.S.0 0.8.8
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 0.5.8
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 0.2.8
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.S.0 0.14.12
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 0.12.12
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 0.10.12
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.S.0 0.5.12
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 0.3.12
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 0.1.12
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.S.0 0.11.8
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 0.12.7
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 0.10.7
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.W.2 0.3.8
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.W.2 0.11.12
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.W.2 0.11.7
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.W.2 0.2.12
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.0 0.9.8
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2 0.0.8
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 0.6.8
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.0 0.15.12
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 0.9.12
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 0.13.12
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.0 0.12.8
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 0.9.7
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 0.13.7
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.0 0.6.12
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2 0.0.12
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 0.4.12
INT:BUF.LONG.H3.0.LONG.IO.V1 0.13.9
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S 0.2.10
INT:PASS.DOUBLE.H1.0.0.OUT.RDBK.DATA 0.2.9
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S 0.2.7
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.V1 0.10.8
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 0.6.9
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.V1 0.10.9
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 0.9.11
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.V1 0.13.8
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 0.8.9
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.V1 0.3.9
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 0.8.10
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.1.7
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.3.7
INT:PASS.SINGLE.H1.0.OUT.RDBK.DATA 0.4.7
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.18.11
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.10.11
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.0.7
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.6.7
INT:PASS.SINGLE.H5.0.OUT.RDBK.DATA 0.5.7
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.3.11
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.0.11
MISC:READ_ABORT 0.15.4
MISC:READ_CAPTURE 0.13.4
MISC:TM_BOT 0.7.4
RDBK:ENABLE 0.23.5
inverted ~[0]
INT:MUX.IMUX.BUFG.H 0.2.3 0.2.2 0.0.3 0.1.3 0.1.2 0.0.2 0.3.3
0.IO.DOUBLE.0.S.0 0 0 0 0 1 1 1
0.IO.DOUBLE.1.S.0 0 0 0 1 0 1 1
0.IO.DOUBLE.2.S.0 0 0 0 1 1 0 1
0.IO.DOUBLE.0.W.1 0 0 1 1 1 1 1
0.IO.DOUBLE.2.W.1 0 1 0 0 1 1 1
0.IO.DOUBLE.3.S.0 0 1 0 1 0 1 1
0.IO.DOUBLE.3.W.1 0 1 0 1 1 0 1
0.IO.DOUBLE.1.W.1 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.W 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.IMUX.BUFG.V 0.20.4 0.24.5 0.6.3 0.8.4 0.11.4 0.18.4 0.22.4
0.IO.DOUBLE.0.W.1 0 0 0 0 1 1 1
0.IO.DOUBLE.1.S.0 0 0 0 1 0 1 1
0.IO.DOUBLE.1.W.1 0 0 0 1 1 0 1
0.IO.DOUBLE.0.S.0 0 0 1 1 1 1 1
0.IO.DOUBLE.2.W.1 0 1 0 0 1 1 1
0.IO.DOUBLE.3.S.0 0 1 0 1 0 1 1
0.IO.DOUBLE.3.W.1 0 1 0 1 1 0 1
0.IO.DOUBLE.2.S.0 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.S 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.IMUX.RDBK.TRIG 0.5.4 0.6.4 0.17.5 0.18.5
0.SINGLE.H3 0 0 1 1
0.SINGLE.H4 0 1 0 1
0.SINGLE.H5 0 1 1 0
0.SINGLE.H2 1 1 1 1
INT:MUX.IO.DBUF.V0 0.16.7 0.17.7 0.19.7 0.18.7
0.IO.DOUBLE.1.S.0 0 0 1 1
0.IO.DOUBLE.2.S.0 0 1 0 1
0.IO.DOUBLE.3.S.0 0 1 1 0
0.IO.DOUBLE.0.S.0 1 1 1 1
INT:MUX.IO.DBUF.V1 0.15.10 0.17.11 0.16.11 0.15.11
0.IO.DOUBLE.0.W.2 0 0 1 1
0.IO.DOUBLE.1.W.2 0 1 0 1
0.IO.DOUBLE.3.W.2 0 1 1 0
0.IO.DOUBLE.2.W.2 1 1 1 1
INT:MUX.LONG.H4 0.1.9 0.3.10 0.0.9
0.LONG.IO.V2 0 0 0
0.OUT.RDBK.DATA 0 1 1
NONE 1 1 1
INT:MUX.LONG.H5 0.10.10 0.6.10 0.5.9
0.LONG.IO.V3 0 0 0
0.OUT.RDBK.DATA 0 1 1
NONE 1 1 1
INT:MUX.LONG.IO.H0 0.12.4 0.14.4
0.LONG.IO.V2 0 0
0.LONG.IO.V0 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.19.4 0.21.4
0.LONG.IO.V3 0 0
0.LONG.IO.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H2 0.10.4 0.9.4
0.LONG.IO.V0 0 0
0.LONG.IO.V2 0 1
NONE 1 1
INT:MUX.LONG.IO.H3 0.17.4 0.16.4
0.LONG.IO.V1 0 0
0.LONG.IO.V3 0 1
NONE 1 1
INT:MUX.LONG.IO.V0 0.22.5 0.19.5 0.21.5 0.20.5
0.LONG.IO.H0 0 0 0 1
0.LONG.IO.H2 0 0 1 0
0.SINGLE.H1 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V1 0.13.5 0.12.5 0.15.5 0.14.5 0.16.5
0.LONG.H3 0 0 0 1 1
0.LONG.IO.H1 0 0 1 0 1
0.LONG.IO.H3 0 0 1 1 0
0.SINGLE.H2 0 1 1 1 1
NONE 1 1 1 1 1
INT:MUX.LONG.IO.V2 0.14.7 0.0.5 0.2.5 0.1.5 0.3.5
0.LONG.H4 0 0 0 1 1
0.LONG.IO.H0 0 0 1 0 1
0.LONG.IO.H2 0 0 1 1 0
0.SINGLE.H5 0 1 1 1 1
NONE 1 1 1 1 1
INT:MUX.LONG.IO.V3 0.15.7 0.8.5 0.10.5 0.9.5 0.11.5
0.LONG.H5 0 0 0 1 1
0.LONG.IO.H1 0 0 1 0 1
0.LONG.IO.H3 0 0 1 1 0
0.SINGLE.H6 0 1 1 1 1
NONE 1 1 1 1 1
MD0:5V_TOLERANT_IO 0.21.7
MD1:5V_TOLERANT_IO 0.22.7
MD2:5V_TOLERANT_IO 0.20.7
non-inverted [0]
MD0:PULL 0.24.4 0.23.4
MD1:PULL 0.25.11 0.24.11
PULLUP 0 1
PULLDOWN 1 0
PULLNONE 1 1
MD2:PULL 0.4.2 0.3.2
PULLDOWN 0 0
PULLNONE 0 1
PULLUP 1 1

CNR.TL

spartanxl CNR.TL bittile 0
BitFrame
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 BSCAN:CONFIG - - - - - - - - - - - - - - - - - - - ~BUFGLS.H:ALT_PAD ~BUFGLS.H:CLK_EN ~MISC:3V MISC:INPUT[0] INT:MUX.IMUX.BUFG.H[4]
5 - - - - - - - - - - - - - - - - - - - - - - - INT:MUX.IMUX.BUFG.H[5] INT:MUX.IMUX.BUFG.H[1]
4 - - - - - - - - - - - - - - - - - - ~MISC:TM_TOP INT:MUX.LONG.IO.H1[1] INT:MUX.IMUX.BUFG.H[0] INT:MUX.IMUX.BUFG.H[6] INT:MUX.IMUX.BUFG.H[2] INT:MUX.IMUX.BUFG.H[3] INT:MUX.LONG.IO.H3[1]
3 - - - - - - - ~BUFGLS.V:ALT_PAD - BSCAN:ENABLE INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V3[0] ~MISC:TM_LEFT INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[2] - INT:MUX.LONG.IO.V1[3] - INT:MUX.LONG.IO.H1[0] - INT:MUX.LONG.IO.H3[0] INT:MUX.IMUX.BSCAN.TDO1[1] INT:MUX.IMUX.BSCAN.TDO1[5] INT:MUX.IMUX.BSCAN.TDO1[4]
2 - - - - - MISC:OUTPUT[0] INT:MUX.LONG.H1[2] INT:MUX.LONG.H1[1] - INT:MUX.LONG.H1[0] - INT:MUX.LONG.H0[1] INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] - - - - INT:MUX.LONG.IO.V0[2] - - INT:MUX.IMUX.BSCAN.TDO1[0] INT:MUX.IMUX.BSCAN.TDO1[3] INT:MUX.IMUX.BSCAN.TDO1[2] INT:MUX.LONG.IO.H0[1]
1 - - - - - INT:MUX.IMUX.BUFG.V[0] INT:MUX.LONG.H2[1] INT:MUX.LONG.H2[0] INT:MUX.IMUX.BUFG.V[5] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V0[0] INT:MUX.LONG.IO.V0[1] INT:MUX.LONG.IO.V0[3] - - INT:MUX.LONG.IO.H2[1] INT:MUX.LONG.IO.H2[0] - INT:MUX.LONG.IO.H0[0] INT:MUX.IMUX.BSCAN.TDO2[4] INT:MUX.IMUX.BSCAN.TDO2[3] INT:MUX.IMUX.BSCAN.TDO2[0]
0 - - INT:MUX.IMUX.BUFG.V[6] INT:MUX.IMUX.BUFG.V[1] INT:MUX.IMUX.BUFG.V[2] INT:MUX.IMUX.BUFG.V[3] INT:MUX.IMUX.BUFG.V[4] - ~BUFGLS.V:CLK_EN - - - - - - - - - - - - - INT:MUX.IMUX.BSCAN.TDO2[2] INT:MUX.IMUX.BSCAN.TDO2[1] INT:MUX.IMUX.BSCAN.TDO2[5]
BSCAN:CONFIG 0.24.6
BSCAN:ENABLE 0.15.3
non-inverted [0]
BUFGLS.H:ALT_PAD 0.4.6
BUFGLS.H:CLK_EN 0.3.6
BUFGLS.V:ALT_PAD 0.17.3
BUFGLS.V:CLK_EN 0.16.0
MISC:3V 0.2.6
MISC:TM_LEFT 0.12.3
MISC:TM_TOP 0.6.4
inverted ~[0]
INT:MUX.IMUX.BSCAN.TDO1 0.1.3 0.0.3 0.2.2 0.1.2 0.2.3 0.3.2
1.LONG.V0 0 0 0 1 1 1
1.LONG.V1 0 0 1 0 1 1
1.LONG.V2 0 0 1 1 0 1
1.DOUBLE.V1.0 0 1 1 1 1 1
2.SINGLE.H2 1 0 0 1 1 1
2.SINGLE.H3 1 0 1 0 1 1
2.SINGLE.H4 1 0 1 1 0 1
2.SINGLE.H5 1 0 1 1 1 0
1.DOUBLE.V0.1 1 1 1 1 1 1
INT:MUX.IMUX.BSCAN.TDO2 0.0.0 0.2.1 0.1.1 0.2.0 0.1.0 0.0.1
0.LONG.H0 0 0 0 1 1 1
0.LONG.H1 0 0 1 0 1 1
0.LONG.H2 0 0 1 1 0 1
1.SINGLE.V2 0 1 0 1 1 1
1.SINGLE.V3 0 1 1 0 1 1
1.SINGLE.V4 0 1 1 1 0 1
1.SINGLE.V5 0 1 1 1 1 0
2.DOUBLE.H1.0 1 0 1 1 1 1
2.DOUBLE.H0.1 1 1 1 1 1 1
INT:MUX.IMUX.BUFG.H 0.3.4 0.1.5 0.0.6 0.1.4 0.2.4 0.0.5 0.4.4
0.IO.DOUBLE.0.N.1 0 0 0 0 1 1 1
0.IO.DOUBLE.1.N.1 0 0 0 1 0 1 1
0.IO.DOUBLE.2.N.1 0 0 0 1 1 0 1
0.IO.DOUBLE.0.N.2 0 0 1 1 1 1 1
0.IO.DOUBLE.2.N.2 0 1 0 0 1 1 1
0.IO.DOUBLE.3.N.1 0 1 0 1 0 1 1
0.IO.DOUBLE.3.N.2 0 1 0 1 1 0 1
0.IO.DOUBLE.1.N.2 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.W 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.IMUX.BUFG.V 0.22.0 0.16.1 0.18.0 0.19.0 0.20.0 0.21.0 0.19.1
0.IO.DOUBLE.0.N.2 0 0 0 0 1 1 1
0.IO.DOUBLE.1.N.1 0 0 0 1 0 1 1
0.IO.DOUBLE.1.N.2 0 0 0 1 1 0 1
0.IO.DOUBLE.0.N.1 0 0 1 1 1 1 1
0.IO.DOUBLE.2.N.2 0 1 0 0 1 1 1
0.IO.DOUBLE.3.N.1 0 1 0 1 0 1 1
0.IO.DOUBLE.3.N.2 0 1 0 1 1 0 1
0.IO.DOUBLE.2.N.1 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.N 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.LONG.H0 0.11.2 0.13.2 0.12.2
0.LONG.IO.V0 0 0 0
0.OUT.LR.IOB1.I2 0 1 1
NONE 1 1 1
INT:MUX.LONG.H1 0.18.2 0.17.2 0.15.2
0.LONG.IO.V1 0 0 0
0.OUT.LR.IOB1.I2 0 1 1
NONE 1 1 1
INT:MUX.LONG.H2 0.18.1 0.17.1
0.LONG.IO.V2 0 0
NONE 1 1
INT:MUX.LONG.IO.H0 0.0.2 0.3.1
0.LONG.IO.V2 0 0
0.LONG.IO.V0 0 1
NONE 1 1
INT:MUX.LONG.IO.H1 0.5.4 0.5.3
0.LONG.IO.V3 0 0
0.LONG.IO.V1 0 1
NONE 1 1
INT:MUX.LONG.IO.H2 0.6.1 0.5.1
0.LONG.IO.V0 0 0
0.LONG.IO.V2 0 1
NONE 1 1
INT:MUX.LONG.IO.H3 0.0.4 0.3.3
0.LONG.IO.V1 0 0
0.LONG.IO.V3 0 1
NONE 1 1
INT:MUX.LONG.IO.V0 0.9.1 0.6.2 0.10.1 0.11.1
0.LONG.H0 0 0 0 1
0.LONG.IO.H2 0 0 1 0
0.LONG.IO.H0 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V1 0.7.3 0.9.3 0.10.3 0.11.3
0.LONG.H1 0 0 0 1
0.LONG.IO.H3 0 0 1 0
0.LONG.IO.H1 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.15.1 0.12.1 0.14.1 0.13.1
0.LONG.H2 0 0 0 1
0.LONG.IO.H0 0 0 1 0
0.LONG.IO.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.14.3 0.13.3
0.LONG.IO.H1 0 0
0.LONG.IO.H3 0 1
NONE 1 1
MISC:INPUT 0.1.6
MISC:OUTPUT 0.19.2
CMOS 0
TTL 1

CNR.BR

spartanxl CNR.BR bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 ~INT:PASS.SINGLE.H2.E.0.LONG.V1 ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.H7.E ~INT:BIPASS.SINGLE.H7.E.SINGLE.V7 ~INT:BIPASS.SINGLE.V7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H7.SINGLE.V7 ~INT:PASS.SINGLE.H6.0.LONG.V5 - ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.E.SINGLE.V2 ~INT:BIPASS.SINGLE.V2.SINGLE.V2.S ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 ~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 ~INT:PASS.SINGLE.V7.0.GND - ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 ~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.S.1 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.1 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.1 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 INT:MUX.IO.DBUF.V1[0] INT:MUX.IO.DBUF.V1[2] INT:MUX.IO.DBUF.V1[1] ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.S.1 INT:MUX.IO.DBUF.V1[3] - INT:MUX.IO.DBUF.V0[1] INT:MUX.IO.DBUF.V0[0] INT:MUX.IO.DBUF.V0[2] ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 ~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.S.1 ~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.1
11 - ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4 ~INT:BUF.LONG.V1.0.SINGLE.H2.E ~INT:BIPASS.SINGLE.H7.SINGLE.V7.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6 ~INT:BUF.LONG.V5.0.SINGLE.H6 - ~INT:BIPASS.SINGLE.H2.SINGLE.V2.S ~INT:BIPASS.SINGLE.H2.SINGLE.H2.E ~INT:BIPASS.SINGLE.H2.SINGLE.V2 - ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 - ~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 - ~INT:PASS.SINGLE.H4.0.LONG.V3 ~INT:BUF.LONG.V3.0.SINGLE.H4 - - - - - - - - - - - - - - - - - - - - - - - -
10 ~INT:PASS.SINGLE.V6.0.LONG.H5 ~INT:PASS.SINGLE.H3.E.0.LONG.V2 ~INT:BIPASS.SINGLE.V6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.V6.S ~INT:BIPASS.SINGLE.H6.SINGLE.H6.E ~INT:BIPASS.SINGLE.H6.E.SINGLE.V6 ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S ~INT:BIPASS.SINGLE.H3.E.SINGLE.V3 ~INT:BIPASS.SINGLE.H3.SINGLE.H3.E ~INT:BIPASS.SINGLE.H3.SINGLE.V3.S ~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 ~INT:BIPASS.SINGLE.H3.SINGLE.V3 ~INT:BIPASS.SINGLE.V3.SINGLE.V3.S ~INT:PASS.SINGLE.V4.0.LONG.H3 - - - - - - - - - - - - - - - - - PROG:5V_TOLERANT_IO ~INT:PASS.SINGLE.H6.0.OUT.STARTUP.Q1Q4 ~INT:PASS.DOUBLE.H0.0.0.OUT.STARTUP.Q1Q4 ~INT:PASS.SINGLE.H2.0.OUT.STARTUP.Q1Q4 INT:MUX.IO.DBUF.V0[3] ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 ~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.S.1 OSC:MUX.OUT0[2]
9 ~INT:BUF.LONG.H5.0.SINGLE.V6 ~INT:BIPASS.SINGLE.H4.SINGLE.V4 ~INT:BIPASS.SINGLE.V4.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S ~INT:BIPASS.SINGLE.H4.SINGLE.H4.E ~INT:BIPASS.SINGLE.H4.SINGLE.V4.S ~INT:BUF.LONG.V2.0.SINGLE.H3.E ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 ~INT:BUF.LONG.V4.0.SINGLE.H5 ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S ~INT:BIPASS.SINGLE.H1.E.SINGLE.V1 ~INT:BIPASS.SINGLE.V1.SINGLE.V1.S ~INT:PASS.SINGLE.H5.0.LONG.V4 ~INT:PASS.SINGLE.V5.0.LONG.H4 ~INT:BUF.LONG.H4.0.SINGLE.V5 ~INT:BUF.LONG.V0.0.SINGLE.H1.E ~INT:PASS.SINGLE.H1.E.0.LONG.V0 ~INT:PASS.SINGLE.H5.0.OUT.STARTUP.Q3 ~INT:PASS.DOUBLE.H1.1.0.OUT.STARTUP.Q3 ~INT:PASS.SINGLE.H1.0.OUT.STARTUP.Q3 ~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S ~INT:PASS.SINGLE.H1.0.LONG.IO.V0 ~INT:PASS.SINGLE.H6.0.LONG.IO.V3 ~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 ~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.0.S.1.0.IO.DBUF.V1 ~INT:PASS.IO.DOUBLE.2.S.1.0.IO.DBUF.V1 ~INT:PASS.IO.DOUBLE.3.S.1.0.IO.DBUF.V1 ~INT:PASS.IO.DOUBLE.1.S.1.0.IO.DBUF.V1 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S - ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 ~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.1 OSC:MUX.OUT1[2]
8 ~INT:BIPASS.SINGLE.V5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.SINGLE.V5.S ~INT:BIPASS.SINGLE.H5.E.SINGLE.V5 ~INT:BIPASS.SINGLE.H5.SINGLE.H5.E ~INT:BIPASS.SINGLE.H5.SINGLE.V5 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 ~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 ~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 ~INT:BIPASS.SINGLE.H1.SINGLE.H1.E ~INT:BIPASS.SINGLE.H1.SINGLE.V1 ~INT:BIPASS.SINGLE.H1.SINGLE.V1.S ~INT:PASS.SINGLE.V0.0.GND ~INT:BIPASS.SINGLE.H0.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0 ~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S ~INT:BIPASS.SINGLE.H0.SINGLE.H0.E ~INT:BIPASS.SINGLE.H0.SINGLE.V0.S ~INT:BIPASS.SINGLE.V0.SINGLE.V0.S - - - - ~INT:PASS.SINGLE.H2.0.LONG.IO.V1 - ~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 ~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 ~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S ~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S - ~INT:PASS.SINGLE.H5.0.LONG.IO.V2 - INT:MUX.IMUX.READCLK.I[2] INT:MUX.IMUX.READCLK.I[1] INT:MUX.IMUX.READCLK.I[0] INT:MUX.IMUX.READCLK.I[3] ~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 OSC:MUX.OUT0[1] OSC:MUX.OUT1[1]
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E - ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[1] - INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[0] INT:MUX.IMUX.STARTUP.GSR[3] INT:MUX.IMUX.STARTUP.GSR[0] INT:MUX.IMUX.STARTUP.GSR[2] INT:MUX.IMUX.STARTUP.GSR[1] INT:MUX.IMUX.STARTUP.GSR[5] INT:MUX.IMUX.STARTUP.GSR[4] ~INT:PASS.SINGLE.V1.0.OUT.STARTUP.DONEIN - INT:MUX.LONG.V2[0] ~INT:BUF.LONG.H3.0.SINGLE.V4 - INT:MUX.LONG.H3[1] INT:MUX.LONG.H5[1] INT:MUX.IMUX.BUFG.V[2] INT:MUX.IMUX.BUFG.V[1] INT:MUX.IMUX.BUFG.V[3] INT:MUX.IMUX.BUFG.V[4] INT:MUX.IMUX.BUFG.V[5] ~BUFGLS.V:ALT_PAD INT:MUX.IMUX.BUFG.V[0] ~INT:PASS.DOUBLE.V0.1.0.OUT.STARTUP.Q2 ~INT:PASS.SINGLE.V2.0.OUT.STARTUP.Q2 ~INT:PASS.SINGLE.V6.0.OUT.STARTUP.Q2 ~BUFGLS.V:CLK_EN INT:MUX.LONG.H4[2] INT:MUX.LONG.H4[1] - INT:MUX.LONG.H4[0] - - - - - -
5 - - INT:MUX.LONG.V1[2] INT:MUX.LONG.V1[0] - INT:MUX.LONG.V3[2] INT:MUX.IMUX.STARTUP.GTS[1] INT:MUX.IMUX.STARTUP.GTS[2] INT:MUX.IMUX.STARTUP.GTS[3] INT:MUX.IMUX.STARTUP.GTS[4] INT:MUX.IMUX.STARTUP.GTS[5] INT:MUX.IMUX.STARTUP.GTS[0] INT:MUX.LONG.V2[2] INT:MUX.LONG.V2[1] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V4[2] - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[0] INT:MUX.LONG.H3[0] - INT:MUX.LONG.H5[0] INT:MUX.LONG.H5[2] INT:MUX.IMUX.BUFG.V[6] INT:MUX.LONG.IO.V2[2] INT:MUX.LONG.IO.V0[2] INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V2[0] - - ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 - - INT:MUX.LONG.IO.V1[2] INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.IO.V3[3] - OSC:MUX.OUT0[0] OSC:MUX.OUT1[0]
4 - INT:MUX.IMUX.STARTUP.CLK[1] INT:MUX.IMUX.STARTUP.CLK[2] INT:MUX.IMUX.STARTUP.CLK[3] ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E INT:MUX.LONG.V5[2] - INT:MUX.LONG.V5[1] - INT:MUX.LONG.V5[0] ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V1.0.0.OUT.STARTUP.DONEIN ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V5.0.OUT.STARTUP.DONEIN INT:MUX.LONG.IO.H3[2] - INT:MUX.LONG.V0[1] INT:MUX.LONG.IO.V2[4] INT:MUX.LONG.V0[0] INT:MUX.LONG.IO.V0[3] INT:MUX.LONG.V0[2] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 INT:MUX.LONG.IO.V3[4] INT:MUX.LONG.IO.V0[0] INT:MUX.LONG.IO.V0[1] - ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E INT:MUX.LONG.IO.V3[0] INT:MUX.IO.DBUF.H0[2] INT:MUX.LONG.IO.V1[4] INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IO.DBUF.H0[3] INT:MUX.LONG.IO.V3[2] INT:MUX.LONG.IO.V1[3] INT:MUX.LONG.IO.V3[1] OSC:MUX.OUT1[3] - OSC:MUX.OUT0[3] OSC:ENABLE
3 - INT:MUX.IMUX.STARTUP.CLK[0] INT:MUX.LONG.IO.H2[3] INT:MUX.LONG.IO.H2[2] INT:MUX.LONG.IO.H2[5] INT:MUX.LONG.IO.H3[3] INT:MUX.LONG.IO.H2[4] INT:MUX.LONG.IO.H1[5] INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H1[2] INT:MUX.LONG.IO.H1[4] INT:MUX.LONG.IO.H0[3] INT:MUX.LONG.IO.H0[2] ~INT:BIPASS.IO.DOUBLE.1.E.1.IO.DOUBLE.1.S.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 ~INT:BIPASS.IO.DOUBLE.0.E.1.IO.DOUBLE.0.S.2 INT:MUX.LONG.IO.H0[1] INT:MUX.LONG.IO.H0[0] INT:MUX.IMUX.BUFG.H[5] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] STARTUP:OUTPUTS_ACTIVE[1] STARTUP:OUTPUTS_ACTIVE[0] STARTUP:GSR_INACTIVE[0] STARTUP:GSR_INACTIVE[1] INT:MUX.LONG.IO.H1[1] INT:MUX.LONG.IO.H1[0] STARTUP:DONE_ACTIVE[1] INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H3[1] - - ~STARTUP:EXPRESS_MODE - - - - - - -
2 - INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.IO.DOUBLE.3.E.1.IO.DOUBLE.3.S.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.1 ~INT:PASS.IO.DOUBLE.0.E.1.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.E.1.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.E.1.0.IO.DBUF.H1 INT:MUX.IMUX.BUFG.H[0] INT:MUX.IMUX.BUFG.H[6] - - - - - - - - - - - - - - - - - - -
1 - INT:MUX.IO.DBUF.H1[0] INT:MUX.IO.DBUF.H1[1] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.1 ~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 ~INT:BIPASS.IO.DOUBLE.2.E.1.IO.DOUBLE.2.S.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.1 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.1 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 ~INT:PASS.IO.DOUBLE.3.E.1.0.IO.DBUF.H1 INT:MUX.IMUX.BUFG.H[2] INT:MUX.IMUX.BUFG.H[1] INT:MUX.IMUX.BUFG.H[4] INT:MUX.IMUX.BUFG.H[3] - - - ~BUFGLS.H:ALT_PAD OSC:OSC_CLK[0] ~OSC:TM_OSC STARTUP:DONE_ACTIVE[0] ~STARTUP:SYNC_TO_DONE STARTUP:STARTUP_CLK[0] ~STARTUP:INV.GSR ~STARTUP:ENABLE.GSR ~STARTUP:INV.GTS DONE:PULL[0] ~STARTUP:ENABLE.GTS ~MISC:TCTEST DONE:5V_TOLERANT_IO ~BUFGLS.H:CLK_EN - ~STARTUP:CRC
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - STARTUP:CONFIG_RATE[0]
BUFGLS.H:ALT_PAD 0.15.1
BUFGLS.H:CLK_EN 0.2.1
BUFGLS.V:ALT_PAD 0.15.6
BUFGLS.V:CLK_EN 0.10.6
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 0.29.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 0.27.12
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 0.28.12
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 0.3.12
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 0.3.9
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.S.1 0.1.12
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 0.14.9
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 0.11.12
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.S.1 0.16.12
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 0.29.10
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 0.29.11
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 0.33.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 0.32.9
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 0.31.8
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 0.2.10
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 0.4.9
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.S.1 0.2.9
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 0.23.12
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 0.20.12
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.S.1 0.19.12
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 0.33.8
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 0.34.8
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 0.27.11
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 0.28.2
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 0.26.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 0.30.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 0.25.2
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 0.25.3
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 0.26.2
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 0.32.8
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 0.27.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 0.29.1
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 0.32.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 0.36.1
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 0.34.2
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 0.36.2
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.S.1 0.10.12
INT:BIPASS.IO.DOUBLE.0.E.1.IO.DOUBLE.0.S.2 0.24.3
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.S.1 0.2.12
INT:BIPASS.IO.DOUBLE.1.E.1.IO.DOUBLE.1.S.2 0.27.3
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.S.1 0.1.10
INT:BIPASS.IO.DOUBLE.2.E.1.IO.DOUBLE.2.S.2 0.30.1
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.S.1 0.22.12
INT:BIPASS.IO.DOUBLE.3.E.1.IO.DOUBLE.3.S.2 0.35.2
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 0.25.8
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S 0.24.8
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 0.13.9
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.1 0.17.12
INT:BIPASS.SINGLE.H0.SINGLE.H0.E 0.23.8
INT:BIPASS.SINGLE.H0.SINGLE.V0 0.26.8
INT:BIPASS.SINGLE.H0.SINGLE.V0.S 0.22.8
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 0.29.9
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S 0.30.9
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 0.15.12
INT:BIPASS.SINGLE.H1.SINGLE.H1.E 0.30.8
INT:BIPASS.SINGLE.H1.SINGLE.V1 0.29.8
INT:BIPASS.SINGLE.H1.SINGLE.V1.S 0.28.8
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 0.31.12
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S 0.32.12
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 0.4.12
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.1 0.0.12
INT:BIPASS.SINGLE.H2.SINGLE.H2.E 0.32.11
INT:BIPASS.SINGLE.H2.SINGLE.V2 0.31.11
INT:BIPASS.SINGLE.H2.SINGLE.V2.S 0.33.11
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 0.32.10
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S 0.33.10
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 0.3.8
INT:BIPASS.SINGLE.H3.SINGLE.H3.E 0.31.10
INT:BIPASS.SINGLE.H3.SINGLE.V3 0.28.10
INT:BIPASS.SINGLE.H3.SINGLE.V3.S 0.30.10
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 0.39.11
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S 0.37.9
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 0.3.10
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.1 0.1.9
INT:BIPASS.SINGLE.H4.SINGLE.H4.E 0.36.9
INT:BIPASS.SINGLE.H4.SINGLE.V4 0.39.9
INT:BIPASS.SINGLE.H4.SINGLE.V4.S 0.35.9
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 0.37.8
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S 0.39.8
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 0.2.8
INT:BIPASS.SINGLE.H5.SINGLE.H5.E 0.36.8
INT:BIPASS.SINGLE.H5.SINGLE.V5 0.35.8
INT:BIPASS.SINGLE.H5.SINGLE.V5.S 0.38.8
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 0.34.10
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S 0.37.10
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 0.24.12
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.1 0.18.12
INT:BIPASS.SINGLE.H6.SINGLE.H6.E 0.35.10
INT:BIPASS.SINGLE.H6.SINGLE.V6 0.36.11
INT:BIPASS.SINGLE.H6.SINGLE.V6.S 0.36.10
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 0.37.12
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S 0.39.12
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 0.21.12
INT:BIPASS.SINGLE.H7.SINGLE.H7.E 0.38.12
INT:BIPASS.SINGLE.H7.SINGLE.V7 0.35.12
INT:BIPASS.SINGLE.H7.SINGLE.V7.S 0.37.11
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 0.24.1
INT:BIPASS.SINGLE.V0.SINGLE.V0.S 0.21.8
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.1 0.24.2
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 0.27.2
INT:BIPASS.SINGLE.V1.SINGLE.V1.S 0.28.9
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 0.29.2
INT:BIPASS.SINGLE.V2.SINGLE.V2.S 0.30.12
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.1 0.25.1
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 0.31.2
INT:BIPASS.SINGLE.V3.SINGLE.V3.S 0.27.10
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 0.26.1
INT:BIPASS.SINGLE.V4.SINGLE.V4.S 0.38.9
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.1 0.28.1
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 0.33.2
INT:BIPASS.SINGLE.V5.SINGLE.V5.S 0.40.8
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 0.37.1
INT:BIPASS.SINGLE.V6.SINGLE.V6.S 0.38.10
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.1 0.35.1
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 0.37.2
INT:BIPASS.SINGLE.V7.SINGLE.V7.S 0.36.12
INT:BUF.LONG.H3.0.SINGLE.V4 0.24.6
INT:BUF.LONG.H4.0.SINGLE.V5 0.25.9
INT:BUF.LONG.H5.0.SINGLE.V6 0.40.9
INT:BUF.LONG.V0.0.SINGLE.H1.E 0.24.9
INT:BUF.LONG.V1.0.SINGLE.H2.E 0.38.11
INT:BUF.LONG.V2.0.SINGLE.H3.E 0.34.9
INT:BUF.LONG.V3.0.SINGLE.H4 0.24.11
INT:BUF.LONG.V4.0.SINGLE.H5 0.31.9
INT:BUF.LONG.V5.0.SINGLE.H6 0.35.11
INT:PASS.DOUBLE.H0.0.0.OUT.STARTUP.Q1Q4 0.6.10
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S 0.12.8
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S 0.19.9
INT:PASS.DOUBLE.H1.1.0.OUT.STARTUP.Q3 0.21.9
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.13.4
INT:PASS.DOUBLE.V0.1.0.OUT.STARTUP.Q2 0.13.6
INT:PASS.DOUBLE.V1.0.0.OUT.STARTUP.DONEIN 0.29.4
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.38.6
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 0.14.8
INT:PASS.IO.DOUBLE.0.E.1.0.IO.DBUF.H1 0.23.2
INT:PASS.IO.DOUBLE.0.S.1.0.IO.DBUF.V1 0.10.9
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 0.31.1
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 0.13.8
INT:PASS.IO.DOUBLE.1.E.1.0.IO.DBUF.H1 0.21.2
INT:PASS.IO.DOUBLE.1.S.1.0.IO.DBUF.V1 0.7.9
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 0.32.1
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 0.11.9
INT:PASS.IO.DOUBLE.2.E.1.0.IO.DBUF.H1 0.22.2
INT:PASS.IO.DOUBLE.2.S.1.0.IO.DBUF.V1 0.9.9
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 0.33.1
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 0.12.9
INT:PASS.IO.DOUBLE.3.E.1.0.IO.DBUF.H1 0.23.1
INT:PASS.IO.DOUBLE.3.S.1.0.IO.DBUF.V1 0.8.9
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 0.34.1
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S 0.18.9
INT:PASS.SINGLE.H1.0.LONG.IO.V0 0.16.9
INT:PASS.SINGLE.H1.0.OUT.STARTUP.Q3 0.20.9
INT:PASS.SINGLE.H1.E.0.LONG.V0 0.23.9
INT:PASS.SINGLE.H2.0.LONG.IO.V1 0.16.8
INT:PASS.SINGLE.H2.0.OUT.STARTUP.Q1Q4 0.5.10
INT:PASS.SINGLE.H2.E.0.LONG.V1 0.40.12
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S 0.11.8
INT:PASS.SINGLE.H3.E.0.LONG.V2 0.39.10
INT:PASS.SINGLE.H4.0.LONG.V3 0.25.11
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S 0.17.9
INT:PASS.SINGLE.H5.0.LONG.IO.V2 0.9.8
INT:PASS.SINGLE.H5.0.LONG.V4 0.27.9
INT:PASS.SINGLE.H5.0.OUT.STARTUP.Q3 0.22.9
INT:PASS.SINGLE.H6.0.LONG.IO.V3 0.15.9
INT:PASS.SINGLE.H6.0.LONG.V5 0.34.12
INT:PASS.SINGLE.H6.0.OUT.STARTUP.Q1Q4 0.7.10
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S 0.6.9
INT:PASS.SINGLE.V0.0.GND 0.27.8
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.26.5
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.18.4
INT:PASS.SINGLE.V1.0.OUT.STARTUP.DONEIN 0.27.6
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.19.4
INT:PASS.SINGLE.V2.0.OUT.STARTUP.Q2 0.12.6
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.30.4
INT:PASS.SINGLE.V4.0.LONG.H3 0.26.10
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.40.6
INT:PASS.SINGLE.V5.0.LONG.H4 0.26.9
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.28.4
INT:PASS.SINGLE.V5.0.OUT.STARTUP.DONEIN 0.27.4
INT:PASS.SINGLE.V6.0.LONG.H5 0.40.10
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.10.5
INT:PASS.SINGLE.V6.0.OUT.STARTUP.Q2 0.11.6
INT:PASS.SINGLE.V7.0.GND 0.26.12
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.36.4
MISC:TCTEST 0.4.1
OSC:TM_OSC 0.13.1
STARTUP:CRC 0.0.1
STARTUP:ENABLE.GSR 0.8.1
STARTUP:ENABLE.GTS 0.5.1
STARTUP:EXPRESS_MODE 0.7.3
STARTUP:INV.GSR 0.9.1
STARTUP:INV.GTS 0.7.1
STARTUP:SYNC_TO_DONE 0.11.1
inverted ~[0]
DONE:5V_TOLERANT_IO 0.3.1
OSC:ENABLE 0.0.4
PROG:5V_TOLERANT_IO 0.8.10
non-inverted [0]
DONE:PULL 0.6.1
PULLUP 0
PULLNONE 1
INT:MUX.IMUX.BUFG.H 0.19.2 0.21.3 0.20.1 0.19.1 0.22.1 0.21.1 0.20.2
0.IO.DOUBLE.3.E.1 0 0 0 1 1 0 1
0.IO.DOUBLE.0.E.1 0 0 0 1 1 1 1
0.IO.DOUBLE.2.S.1 0 0 1 0 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 0 1 1 1
0.IO.DOUBLE.3.S.1 0 0 1 1 0 0 1
0.IO.DOUBLE.1.E.1 0 0 1 1 0 1 1
0.IO.DOUBLE.1.S.1 0 1 1 1 1 0 1
0.IO.DOUBLE.2.E.1 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.E 1 0 1 1 1 1 0
NONE 1 0 1 1 1 1 1
INT:MUX.IMUX.BUFG.V 0.17.5 0.16.6 0.17.6 0.18.6 0.20.6 0.19.6 0.14.6
0.IO.DOUBLE.0.E.1 0 0 0 0 1 1 1
0.IO.DOUBLE.1.E.1 0 0 0 1 0 1 1
0.IO.DOUBLE.1.S.1 0 0 0 1 1 0 1
0.IO.DOUBLE.0.S.1 0 0 1 1 1 1 1
0.IO.DOUBLE.2.E.1 0 1 0 0 1 1 1
0.IO.DOUBLE.3.E.1 0 1 0 1 0 1 1
0.IO.DOUBLE.3.S.1 0 1 0 1 1 0 1
0.IO.DOUBLE.2.S.1 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.S 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.IMUX.READCLK.I 0.4.8 0.7.8 0.6.8 0.5.8
0.SINGLE.H2 0 0 1 1
0.SINGLE.H3 0 1 0 1
0.SINGLE.H4 0 1 1 0
0.SINGLE.H5 1 1 1 1
INT:MUX.IMUX.STARTUP.CLK 0.37.4 0.38.4 0.39.4 0.39.3
0.SINGLE.V3 0 0 1 1
0.SINGLE.V4 0 1 0 1
0.SINGLE.V5 0 1 1 0
0.SINGLE.V2 1 1 1 1
INT:MUX.IMUX.STARTUP.GSR 0.29.6 0.28.6 0.33.6 0.31.6 0.30.6 0.32.6
0.SINGLE.H2 0 0 0 1 1 1
0.SINGLE.H3 0 0 1 0 1 1
0.LONG.V4 0 0 1 1 1 0
0.LONG.V5 0 1 0 1 1 1
0.DOUBLE.V1.1 0 1 1 0 1 1
0.SINGLE.H4 0 1 1 1 0 1
0.LONG.V3 0 1 1 1 1 0
0.DOUBLE.V0.0 1 0 1 1 1 1
0.SINGLE.H5 1 1 1 1 1 1
INT:MUX.IMUX.STARTUP.GTS 0.30.5 0.31.5 0.32.5 0.33.5 0.34.5 0.29.5
0.LONG.H3 0 0 1 1 1 0
0.SINGLE.V2 0 0 1 1 1 1
0.SINGLE.V3 0 1 0 1 1 1
0.LONG.H5 0 1 1 0 1 0
0.SINGLE.V4 0 1 1 0 1 1
0.LONG.H4 0 1 1 1 0 0
0.SINGLE.V5 0 1 1 1 0 1
0.DOUBLE.H1.0 1 1 1 1 1 0
0.DOUBLE.H0.1 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.4 0.11.4 0.8.4 0.9.4
0.IO.DOUBLE.0.E.1 0 0 1 1
0.IO.DOUBLE.2.E.1 0 1 0 1
0.IO.DOUBLE.3.E.1 0 1 1 0
0.IO.DOUBLE.1.E.1 1 1 1 1
INT:MUX.IO.DBUF.H1 0.38.2 0.39.2 0.38.1 0.39.1
0.IO.DOUBLE.1.S.2 0 0 1 1
0.IO.DOUBLE.2.S.2 0 1 0 1
0.IO.DOUBLE.3.S.2 0 1 1 0
0.IO.DOUBLE.0.S.2 1 1 1 1
INT:MUX.IO.DBUF.V0 0.4.10 0.5.12 0.7.12 0.6.12
0.IO.DOUBLE.1.S.1 0 0 1 1
0.IO.DOUBLE.2.S.1 0 1 0 1
0.IO.DOUBLE.3.S.1 0 1 1 0
0.IO.DOUBLE.0.S.1 1 1 1 1
INT:MUX.IO.DBUF.V1 0.9.12 0.13.12 0.12.12 0.14.12
0.IO.DOUBLE.0.E.0 0 0 1 1
0.IO.DOUBLE.1.E.0 0 1 0 1
0.IO.DOUBLE.3.E.0 0 1 1 0
0.IO.DOUBLE.2.E.0 1 1 1 1
INT:MUX.LONG.H3 0.22.6 0.21.5
0.LONG.IO.V1 0 0
NONE 1 1
INT:MUX.LONG.H4 0.9.6 0.8.6 0.6.6
0.LONG.IO.V2 0 0 0
0.OUT.STARTUP.Q3 0 1 1
NONE 1 1 1
INT:MUX.LONG.H5 0.18.5 0.21.6 0.19.5
0.LONG.IO.V3 0 0 0
0.OUT.STARTUP.Q3 0 1 1
NONE 1 1 1
INT:MUX.LONG.IO.H0 0.29.3 0.28.3 0.23.3 0.22.3
0.LONG.V0 0 0 1 1
0.SINGLE.V1 0 1 1 1
0.LONG.IO.V2 1 1 0 0
0.LONG.IO.V0 1 1 0 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H1 0.33.3 0.30.3 0.32.3 0.31.3 0.14.3 0.13.3
0.LONG.V1 0 0 0 1 1 1
0.LONG.V3 0 0 1 0 1 1
0.SINGLE.V2 0 1 1 1 1 1
0.LONG.IO.V3 1 1 1 1 0 0
0.LONG.IO.V1 1 1 1 1 0 1
NONE 1 1 1 1 1 1
INT:MUX.LONG.IO.H2 0.36.3 0.34.3 0.38.3 0.37.3 0.19.3 0.20.3
0.LONG.V2 0 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 1
0.SINGLE.V5 0 1 1 1 1 1
0.LONG.IO.V0 1 1 1 1 0 0
0.LONG.IO.V2 1 1 1 1 0 1
NONE 1 1 1 1 1 1
INT:MUX.LONG.IO.H3 0.35.3 0.26.4 0.10.3 0.11.3
0.LONG.V5 0 0 1 1
0.SINGLE.V6 0 1 1 1
0.LONG.IO.V1 1 1 0 0
0.LONG.IO.V3 1 1 0 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.4 0.15.5 0.15.4 0.16.4
0.LONG.IO.H0 0 0 0 1
0.LONG.IO.H2 0 0 1 0
0.SINGLE.H1 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V1 0.10.4 0.5.4 0.7.5 0.5.5 0.6.5
0.LONG.H3 0 0 0 1 1
0.LONG.IO.H1 0 0 1 0 1
0.LONG.IO.H3 0 0 1 1 0
0.SINGLE.H2 0 1 1 1 1
NONE 1 1 1 1 1
INT:MUX.LONG.IO.V2 0.23.4 0.4.5 0.16.5 0.14.5 0.13.5
0.LONG.H4 0 0 0 1 1
0.LONG.IO.H0 0 0 1 0 1
0.LONG.IO.H2 0 0 1 1 0
0.SINGLE.H5 0 1 1 1 1
NONE 1 1 1 1 1
INT:MUX.LONG.IO.V3 0.17.4 0.3.5 0.6.4 0.4.4 0.12.4
0.LONG.H5 0 0 0 1 1
0.LONG.IO.H1 0 0 1 0 1
0.LONG.IO.H3 0 0 1 1 0
0.SINGLE.H6 0 1 1 1 1
NONE 1 1 1 1 1
INT:MUX.LONG.V0 0.20.4 0.24.4 0.22.4
0.LONG.IO.H0 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V1 0.38.5 0.37.6 0.37.5
0.LONG.IO.H1 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V2 0.28.5 0.27.5 0.25.6
0.LONG.IO.H2 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V3 0.35.5 0.35.6 0.34.6
0.LONG.IO.H1 0 0 0
0.OUT.STARTUP.DONEIN 0 1 1
NONE 1 1 1
INT:MUX.LONG.V4 0.25.5 0.23.5 0.22.5
0.LONG.IO.H2 0 0 0
0.OUT.STARTUP.DONEIN 0 1 1
NONE 1 1 1
INT:MUX.LONG.V5 0.35.4 0.33.4 0.31.4
0.LONG.IO.H3 0 0 0
0.OUT.STARTUP.DONEIN 0 1 1
NONE 1 1 1
OSC:MUX.OUT0 0.1.4 0.0.10 0.1.8 0.1.5
OSC:MUX.OUT1 0.3.4 0.0.9 0.0.8 0.0.5
F500K 0 0 1 1
F16K 0 1 0 1
F490 0 1 1 0
F15 1 1 1 1
OSC:OSC_CLK 0.14.1
EXTCLK 0
CCLK 1
STARTUP:CONFIG_RATE 0.0.0
FAST 0
SLOW 1
STARTUP:DONE_ACTIVE 0.12.3 0.12.1
Q2 0 0
Q3 0 1
Q1Q4 1 0
Q0 1 1
STARTUP:GSR_INACTIVE 0.15.3 0.16.3
DONE_IN 0 0
Q3 0 1
Q1Q4 1 0
Q2 1 1
STARTUP:OUTPUTS_ACTIVE 0.18.3 0.17.3
Q3 0 0
DONE_IN 0 1
Q2 1 0
Q1Q4 1 1
STARTUP:STARTUP_CLK 0.10.1
CCLK 0
USERCLK 1

CNR.TR

spartanxl CNR.TR bittile 0
BitFrame
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ~BSCAN:STATUS ~BUFGLS.H:CLK_EN MISC:ADDRESS_LINES[0] -
5 - INT:MUX.IO.DBUF.H1[0] INT:MUX.IO.DBUF.H1[1] ~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.E.1 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.2 ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.2 ~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 ~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 ~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.2 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.2 ~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.E.1 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.E.1 ~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.H1 INT:MUX.IMUX.BUFG.H[6] INT:MUX.IMUX.BUFG.H[2] - - - - - - - - - - - - - - - - - - - - -
4 - INT:MUX.IO.DBUF.H1[2] INT:MUX.IO.DBUF.H1[3] ~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 ~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.E.2 ~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 ~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 ~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 ~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 ~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.2 ~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.2 ~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.H1 ~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.H1 INT:MUX.IMUX.BUFG.H[0] - - - - - - - - - - - - - - - - - - - -
3 - ~INT:PASS.SINGLE.V6.0.OUT.UPDATE.O INT:MUX.LONG.IO.H2[3] INT:MUX.LONG.IO.H2[2] INT:MUX.LONG.IO.H2[5] INT:MUX.LONG.IO.H3[3] INT:MUX.LONG.IO.H2[4] INT:MUX.LONG.IO.H1[5] INT:MUX.LONG.IO.H1[3] INT:MUX.LONG.IO.H1[2] INT:MUX.LONG.IO.H1[4] INT:MUX.LONG.IO.H0[3] INT:MUX.LONG.IO.H0[2] ~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.E.2 ~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 ~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 ~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.E.2 INT:MUX.LONG.IO.H0[1] INT:MUX.LONG.IO.H0[0] INT:MUX.IMUX.BUFG.H[5] INT:MUX.LONG.IO.H2[0] INT:MUX.LONG.IO.H2[1] TDO:PULL[1] BSCAN:ENABLE TDO:PULL[0] ~MISC:TAC INT:MUX.LONG.IO.H1[1] INT:MUX.LONG.IO.H1[0] READCLK:READ_CLK[0] INT:MUX.LONG.IO.H3[0] INT:MUX.LONG.IO.H3[1] - ~TDO:ENABLE.O ~TDO:ENABLE.T - - - - - - -
2 - ~INT:PASS.SINGLE.V2.0.OUT.UPDATE.O ~INT:PASS.DOUBLE.V0.1.0.OUT.UPDATE.O INT:MUX.IMUX.BUFG.H[1] ~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E INT:MUX.LONG.V5[2] INT:MUX.IMUX.BUFG.H[3] INT:MUX.LONG.V5[1] - INT:MUX.LONG.V5[0] ~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E ~INT:PASS.DOUBLE.V1.0.0.OUT.OSC.MUX1 ~INT:PASS.SINGLE.V5.0.LONG.IO.H2 ~INT:PASS.SINGLE.V5.0.OUT.OSC.MUX1 INT:MUX.LONG.IO.H3[2] - INT:MUX.LONG.V0[1] INT:MUX.LONG.IO.V2[3] INT:MUX.LONG.V0[0] INT:MUX.LONG.IO.V0[3] INT:MUX.LONG.V0[2] ~INT:PASS.SINGLE.V2.0.LONG.IO.H1 ~INT:PASS.SINGLE.V1.0.LONG.IO.H0 INT:MUX.LONG.IO.V3[1] INT:MUX.LONG.IO.V0[0] INT:MUX.LONG.IO.V0[2] INT:MUX.IMUX.BUFG.H[4] ~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E INT:MUX.LONG.IO.V3[0] INT:MUX.IO.DBUF.H0[2] INT:MUX.LONG.IO.V1[3] INT:MUX.IO.DBUF.H0[0] INT:MUX.IO.DBUF.H0[1] INT:MUX.IO.DBUF.H0[3] - - - - - - -
1 - - INT:MUX.LONG.V1[2] INT:MUX.LONG.V1[1] - INT:MUX.LONG.V3[2] INT:MUX.IMUX.TDO.O[1] INT:MUX.IMUX.TDO.O[2] INT:MUX.IMUX.TDO.O[3] INT:MUX.IMUX.TDO.O[4] INT:MUX.IMUX.TDO.O[5] INT:MUX.IMUX.TDO.O[0] INT:MUX.LONG.V2[2] INT:MUX.LONG.V2[1] ~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E - - INT:MUX.LONG.V4[1] INT:MUX.LONG.V4[0] INT:MUX.LONG.H2[0] - INT:MUX.LONG.H0[0] INT:MUX.LONG.H0[2] - INT:MUX.LONG.IO.V2[1] INT:MUX.LONG.IO.V0[1] INT:MUX.LONG.IO.V2[0] INT:MUX.LONG.IO.V2[2] INT:MUX.IMUX.BUFG.V[5] INT:MUX.LONG.V4[2] ~INT:PASS.SINGLE.V6.0.LONG.IO.H3 ~BUFGLS.H:ALT_PAD ~BUFGLS.V:ALT_PAD INT:MUX.LONG.IO.V1[1] INT:MUX.LONG.IO.V1[0] INT:MUX.LONG.IO.V1[2] - - - - -
0 ~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E - ~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E INT:MUX.LONG.V1[0] - INT:MUX.LONG.V3[1] INT:MUX.LONG.V3[0] INT:MUX.IMUX.TDO.T[1] INT:MUX.IMUX.TDO.T[2] INT:MUX.IMUX.TDO.T[3] INT:MUX.IMUX.TDO.T[0] INT:MUX.IMUX.TDO.T[4] INT:MUX.IMUX.TDO.T[5] ~INT:PASS.SINGLE.V1.0.OUT.OSC.MUX1 - INT:MUX.LONG.V2[0] ~INT:BUF.LONG.H2.0.SINGLE.V3 - INT:MUX.LONG.H2[1] INT:MUX.LONG.H0[1] INT:MUX.IMUX.BUFG.V[2] INT:MUX.IMUX.BUFG.V[1] INT:MUX.IMUX.BUFG.V[3] INT:MUX.IMUX.BUFG.V[4] INT:MUX.IMUX.BUFG.V[6] INT:MUX.IMUX.BUFG.V[0] ~MISC:TM_RIGHT CCLK:5V_TOLERANT_IO TDO:5V_TOLERANT_IO - INT:MUX.LONG.H1[2] INT:MUX.LONG.H1[1] ~BUFGLS.V:CLK_EN - INT:MUX.LONG.H1[0] - - - - - -
spartanxl CNR.TR bittile 1
BitFrame
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
9 - ~INT:PASS.SINGLE.V3.0.LONG.H2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8 ~INT:PASS.SINGLE.V2.0.LONG.H1 - - - ~INT:BUF.LONG.H1.0.SINGLE.V2 - ~INT:PASS.SINGLE.V1.0.LONG.H0 - ~INT:BUF.LONG.H0.0.SINGLE.V1 - - - - - - - - - - - - - - - - - - - - - - - - - -
7 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
spartanxl CNR.TR bittile 2
BitFrame
5 4 3 2 1 0
0 ~INT:BUF.LONG.V0.0.OUT.TOP.COUT.E - - - - -
BSCAN:ENABLE 0.17.3
CCLK:5V_TOLERANT_IO 0.13.0
TDO:5V_TOLERANT_IO 0.12.0
non-inverted [0]
BSCAN:STATUS 0.3.6
BUFGLS.H:ALT_PAD 0.9.1
BUFGLS.H:CLK_EN 0.2.6
BUFGLS.V:ALT_PAD 0.8.1
BUFGLS.V:CLK_EN 0.8.0
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 0.26.3
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.2 0.28.4
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 0.30.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 0.25.3
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.2 0.25.4
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 0.26.4
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 0.29.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.2 0.27.5
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 0.32.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 0.34.4
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.2 0.36.5
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 0.36.4
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.E.2 0.24.3
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.E.2 0.27.3
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.E.2 0.30.5
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.E.2 0.35.4
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.E.1 0.24.5
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.2 0.24.4
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 0.27.4
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.E.1 0.29.4
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.2 0.25.5
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 0.31.4
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.E.1 0.26.5
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.2 0.28.5
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 0.33.4
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.E.1 0.37.5
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.2 0.35.5
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 0.37.4
INT:BUF.LONG.H0.0.SINGLE.V1 1.26.8
INT:BUF.LONG.H1.0.SINGLE.V2 1.30.8
INT:BUF.LONG.H2.0.SINGLE.V3 0.24.0
INT:BUF.LONG.V0.0.OUT.TOP.COUT.E 2.5.0
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E 0.13.2
INT:PASS.DOUBLE.V0.1.0.OUT.UPDATE.O 0.38.2
INT:PASS.DOUBLE.V1.0.0.OUT.OSC.MUX1 0.29.2
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E 0.38.0
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.H1 0.23.4
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 0.31.5
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.H1 0.21.4
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 0.32.5
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.H1 0.22.4
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 0.33.5
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.H1 0.23.5
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 0.34.5
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E 0.26.1
INT:PASS.SINGLE.V1.0.LONG.H0 1.28.8
INT:PASS.SINGLE.V1.0.LONG.IO.H0 0.18.2
INT:PASS.SINGLE.V1.0.OUT.OSC.MUX1 0.27.0
INT:PASS.SINGLE.V2.0.LONG.H1 1.34.8
INT:PASS.SINGLE.V2.0.LONG.IO.H1 0.19.2
INT:PASS.SINGLE.V2.0.OUT.UPDATE.O 0.39.2
INT:PASS.SINGLE.V3.0.LONG.H2 1.33.9
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E 0.30.2
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E 0.40.0
INT:PASS.SINGLE.V5.0.LONG.IO.H2 0.28.2
INT:PASS.SINGLE.V5.0.OUT.OSC.MUX1 0.27.2
INT:PASS.SINGLE.V6.0.LONG.IO.H3 0.10.1
INT:PASS.SINGLE.V6.0.OUT.UPDATE.O 0.39.3
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E 0.36.2
MISC:TAC 0.15.3
MISC:TM_RIGHT 0.14.0
TDO:ENABLE.O 0.8.3
TDO:ENABLE.T 0.7.3
inverted ~[0]
INT:MUX.IMUX.BUFG.H 0.22.5 0.21.3 0.14.2 0.34.2 0.21.5 0.37.2 0.20.4
0.IO.DOUBLE.2.E.1 0 0 0 1 0 1 1
0.IO.DOUBLE.0.E.1 0 0 0 1 1 1 1
0.IO.DOUBLE.3.E.2 0 0 1 0 0 1 1
0.IO.DOUBLE.0.E.2 0 0 1 0 1 1 1
0.IO.DOUBLE.3.E.1 0 0 1 1 0 0 1
0.IO.DOUBLE.1.E.2 0 0 1 1 1 0 1
0.IO.DOUBLE.1.E.1 0 1 1 1 0 1 1
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.E 1 0 1 1 1 1 0
NONE 1 0 1 1 1 1 1
INT:MUX.IMUX.BUFG.V 0.16.0 0.12.1 0.17.0 0.18.0 0.20.0 0.19.0 0.15.0
0.IO.DOUBLE.0.E.1 0 0 0 0 1 1 1
0.IO.DOUBLE.1.E.1 0 0 0 1 0 1 1
0.IO.DOUBLE.1.E.2 0 0 0 1 1 0 1
0.IO.DOUBLE.0.E.2 0 0 1 1 1 1 1
0.IO.DOUBLE.2.E.1 0 1 0 0 1 1 1
0.IO.DOUBLE.3.E.1 0 1 0 1 0 1 1
0.IO.DOUBLE.3.E.2 0 1 0 1 1 0 1
0.IO.DOUBLE.2.E.2 0 1 1 1 1 1 1
0.OUT.IOB.CLKIN.N 1 1 0 1 1 1 0
NONE 1 1 0 1 1 1 1
INT:MUX.IMUX.TDO.O 0.30.1 0.31.1 0.32.1 0.33.1 0.34.1 0.29.1
0.LONG.H0 0 0 1 1 1 0
0.SINGLE.V2 0 0 1 1 1 1
0.SINGLE.V3 0 1 0 1 1 1
0.LONG.H1 0 1 1 0 1 0
0.SINGLE.V4 0 1 1 0 1 1
0.LONG.H2 0 1 1 1 0 0
0.SINGLE.V5 0 1 1 1 0 1
1.DOUBLE.H1.1 1 1 1 1 1 0
1.DOUBLE.H0.0 1 1 1 1 1 1
INT:MUX.IMUX.TDO.T 0.28.0 0.29.0 0.31.0 0.32.0 0.33.0 0.30.0
1.SINGLE.H3 0 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 1
1.SINGLE.H2 0 0 1 1 0 1
0.DOUBLE.V0.0 0 1 1 1 1 1
0.DOUBLE.V1.1 1 0 0 1 1 1
0.LONG.V3 1 0 1 0 1 1
0.LONG.V5 1 0 1 1 0 1
1.SINGLE.H4 1 0 1 1 1 0
1.SINGLE.H5 1 1 1 1 1 1
INT:MUX.IO.DBUF.H0 0.7.2 0.11.2 0.8.2 0.9.2
0.IO.DOUBLE.0.E.2 0 0 1 1
0.IO.DOUBLE.2.E.2 0 1 0 1
0.IO.DOUBLE.3.E.2 0 1 1 0
0.IO.DOUBLE.1.E.2 1 1 1 1
INT:MUX.IO.DBUF.H1 0.38.4 0.39.4 0.38.5 0.39.5
0.IO.DOUBLE.1.N.0 0 0 1 1
0.IO.DOUBLE.2.N.0 0 1 0 1
0.IO.DOUBLE.3.N.0 0 1 1 0
0.IO.DOUBLE.0.N.0 1 1 1 1
INT:MUX.LONG.H0 0.18.1 0.21.0 0.19.1
0.LONG.IO.V0 0 0 0
0.OUT.LR.IOB1.I2 0 1 1
NONE 1 1 1
INT:MUX.LONG.H1 0.10.0 0.9.0 0.6.0
0.LONG.IO.V1 0 0 0
0.OUT.LR.IOB1.I2 0 1 1
NONE 1 1 1
INT:MUX.LONG.H2 0.22.0 0.21.1
0.LONG.IO.V2 0 0
NONE 1 1
INT:MUX.LONG.IO.H0 0.29.3 0.28.3 0.23.3 0.22.3
0.LONG.V0 0 0 1 1
0.SINGLE.V1 0 1 1 1
0.LONG.IO.V2 1 1 0 0
0.LONG.IO.V0 1 1 0 1
NONE 1 1 1 1
INT:MUX.LONG.IO.H1 0.33.3 0.30.3 0.32.3 0.31.3 0.14.3 0.13.3
0.LONG.V1 0 0 0 1 1 1
0.LONG.V3 0 0 1 0 1 1
0.SINGLE.V2 0 1 1 1 1 1
0.LONG.IO.V3 1 1 1 1 0 0
0.LONG.IO.V1 1 1 1 1 0 1
NONE 1 1 1 1 1 1
INT:MUX.LONG.IO.H2 0.36.3 0.34.3 0.38.3 0.37.3 0.19.3 0.20.3
0.LONG.V2 0 0 0 1 1 1
0.LONG.V4 0 0 1 0 1 1
0.SINGLE.V5 0 1 1 1 1 1
0.LONG.IO.V0 1 1 1 1 0 0
0.LONG.IO.V2 1 1 1 1 0 1
NONE 1 1 1 1 1 1
INT:MUX.LONG.IO.H3 0.35.3 0.26.2 0.10.3 0.11.3
0.LONG.V5 0 0 1 1
0.SINGLE.V6 0 1 1 1
0.LONG.IO.V1 1 1 0 0
0.LONG.IO.V3 1 1 0 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V0 0.21.2 0.15.2 0.15.1 0.16.2
0.LONG.H0 0 0 0 1
0.LONG.IO.H2 0 0 1 0
0.LONG.IO.H0 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V1 0.10.2 0.5.1 0.7.1 0.6.1
0.LONG.H1 0 0 0 1
0.LONG.IO.H3 0 0 1 0
0.LONG.IO.H1 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V2 0.23.2 0.13.1 0.16.1 0.14.1
0.LONG.H2 0 0 0 1
0.LONG.IO.H0 0 0 1 0
0.LONG.IO.H2 0 1 1 1
NONE 1 1 1 1
INT:MUX.LONG.IO.V3 0.17.2 0.12.2
0.LONG.IO.H1 0 0
0.LONG.IO.H3 0 1
NONE 1 1
INT:MUX.LONG.V0 0.20.2 0.24.2 0.22.2
0.LONG.IO.H0 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V1 0.38.1 0.37.1 0.37.0
0.LONG.IO.H1 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V2 0.28.1 0.27.1 0.25.0
0.LONG.IO.H2 0 0 0
0.OUT.BT.IOB1.I2.E 0 1 1
NONE 1 1 1
INT:MUX.LONG.V3 0.35.1 0.35.0 0.34.0
0.LONG.IO.H1 0 0 0
0.OUT.OSC.MUX1 0 1 1
NONE 1 1 1
INT:MUX.LONG.V4 0.11.1 0.23.1 0.22.1
0.LONG.IO.H2 0 0 0
0.OUT.OSC.MUX1 0 1 1
NONE 1 1 1
INT:MUX.LONG.V5 0.35.2 0.33.2 0.31.2
0.LONG.IO.H3 0 0 0
0.OUT.OSC.MUX1 0 1 1
NONE 1 1 1
MISC:ADDRESS_LINES 0.1.6
22 0
18 1
READCLK:READ_CLK 0.12.3
RDBK 0
CCLK 1
TDO:PULL 0.18.3 0.16.3
PULLUP 0 1
PULLDOWN 1 0
PULLNONE 1 1